pax_global_header00006660000000000000000000000064126112225740014514gustar00rootroot0000000000000052 comment=05aa0b86cf166efa820933c91d80adc4f53708c7 rtl8812au-4.3.8.12175.20140902+dfsg/000077500000000000000000000000001261122257400154775ustar00rootroot00000000000000rtl8812au-4.3.8.12175.20140902+dfsg/Kconfig000077500000000000000000000001561261122257400170070ustar00rootroot00000000000000config RTL8812AU tristate "Realtek 8812A USB WiFi" depends on USB ---help--- Help message of RTL8812AU rtl8812au-4.3.8.12175.20140902+dfsg/Makefile000077500000000000000000001306701261122257400171510ustar00rootroot00000000000000EXTRA_CFLAGS += $(USER_EXTRA_CFLAGS) EXTRA_CFLAGS += -O1 #EXTRA_CFLAGS += -O3 #EXTRA_CFLAGS += -Wall #EXTRA_CFLAGS += -Wextra #EXTRA_CFLAGS += -Werror #EXTRA_CFLAGS += -pedantic #EXTRA_CFLAGS += -Wshadow -Wpointer-arith -Wcast-qual -Wstrict-prototypes -Wmissing-prototypes EXTRA_CFLAGS += -Wno-unused-variable EXTRA_CFLAGS += -Wno-unused-value EXTRA_CFLAGS += -Wno-unused-label EXTRA_CFLAGS += -Wno-unused-parameter EXTRA_CFLAGS += -Wno-unused-function EXTRA_CFLAGS += -Wno-unused #EXTRA_CFLAGS += -Wno-uninitialized EXTRA_CFLAGS += -I$(src)/include EXTRA_LDFLAGS += --strip-debug CONFIG_AUTOCFG_CP = n ########################## WIFI IC ############################ CONFIG_MULTIDRV = n CONFIG_RTL8192C = n CONFIG_RTL8192D = n CONFIG_RTL8723A = n CONFIG_RTL8188E = n CONFIG_RTL8812A = y CONFIG_RTL8821A = n CONFIG_RTL8192E = n CONFIG_RTL8723B = n ######################### Interface ########################### CONFIG_USB_HCI = y CONFIG_PCI_HCI = n CONFIG_SDIO_HCI = n CONFIG_GSPI_HCI = n ########################## Features ########################### CONFIG_MP_INCLUDED = y CONFIG_POWER_SAVING = y CONFIG_USB_AUTOSUSPEND = n CONFIG_HW_PWRP_DETECTION = n CONFIG_WIFI_TEST = n CONFIG_BT_COEXIST = n CONFIG_RTL8192CU_REDEFINE_1X1 = n CONFIG_INTEL_WIDI = n CONFIG_WAPI_SUPPORT = n CONFIG_EFUSE_CONFIG_FILE = n CONFIG_EXT_CLK = n CONFIG_TRAFFIC_PROTECT = y CONFIG_LOAD_PHY_PARA_FROM_FILE = y CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY = n CONFIG_CALIBRATE_TX_POWER_TO_MAX = n CONFIG_RTW_ADAPTIVITY_EN = disable CONFIG_RTW_ADAPTIVITY_MODE = normal CONFIG_SKIP_SIGNAL_SCALE_MAPPING = n CONFIG_80211W = n CONFIG_REDUCE_TX_CPU_LOADING = n CONFIG_BR_EXT = y CONFIG_ANTENNA_DIVERSITY = n ######################## Wake On Lan ########################## CONFIG_WOWLAN = n CONFIG_GPIO_WAKEUP = n CONFIG_WAKEUP_GPIO_IDX = default CONFIG_PNO_SUPPORT = n CONFIG_PNO_SET_DEBUG = n CONFIG_AP_WOWLAN = n ######### Notify SDIO Host Keep Power During Syspend ########## CONFIG_RTW_SDIO_PM_KEEP_POWER = y ###################### Platform Related ####################### CONFIG_PLATFORM_I386_PC = y CONFIG_PLATFORM_ANDROID_X86 = n CONFIG_PLATFORM_JB_X86 = n CONFIG_PLATFORM_ARM_S3C2K4 = n CONFIG_PLATFORM_ARM_PXA2XX = n CONFIG_PLATFORM_ARM_S3C6K4 = n CONFIG_PLATFORM_MIPS_RMI = n CONFIG_PLATFORM_RTD2880B = n CONFIG_PLATFORM_MIPS_AR9132 = n CONFIG_PLATFORM_RTK_DMP = n CONFIG_PLATFORM_MIPS_PLM = n CONFIG_PLATFORM_MSTAR389 = n CONFIG_PLATFORM_MT53XX = n CONFIG_PLATFORM_ARM_MX51_241H = n CONFIG_PLATFORM_FS_MX61 = n CONFIG_PLATFORM_ACTIONS_ATJ227X = n CONFIG_PLATFORM_TEGRA3_CARDHU = n CONFIG_PLATFORM_TEGRA4_DALMORE = n CONFIG_PLATFORM_ARM_TCC8900 = n CONFIG_PLATFORM_ARM_TCC8920 = n CONFIG_PLATFORM_ARM_TCC8920_JB42 = n CONFIG_PLATFORM_ARM_RK2818 = n CONFIG_PLATFORM_ARM_RK3066 = n CONFIG_PLATFORM_ARM_RK3188 = n CONFIG_PLATFORM_ARM_URBETTER = n CONFIG_PLATFORM_ARM_TI_PANDA = n CONFIG_PLATFORM_MIPS_JZ4760 = n CONFIG_PLATFORM_DMP_PHILIPS = n CONFIG_PLATFORM_MSTAR_TITANIA12 = n CONFIG_PLATFORM_MSTAR = n CONFIG_PLATFORM_SZEBOOK = n CONFIG_PLATFORM_ARM_SUNxI = n CONFIG_PLATFORM_ARM_SUN6I = n CONFIG_PLATFORM_ARM_SUN7I = n CONFIG_PLATFORM_ARM_SUN8I = n CONFIG_PLATFORM_ACTIONS_ATM702X = n CONFIG_PLATFORM_ACTIONS_ATV5201 = n CONFIG_PLATFORM_ARM_RTD299X = n CONFIG_PLATFORM_ARM_SPREADTRUM_6820 = n CONFIG_PLATFORM_ARM_SPREADTRUM_8810 = n CONFIG_PLATFORM_ARM_WMT = n CONFIG_PLATFORM_TI_DM365 = n CONFIG_PLATFORM_MOZART = n CONFIG_PLATFORM_RTK119X = n ############################################################### CONFIG_DRVEXT_MODULE = n export TopDIR ?= $(shell pwd) ########### COMMON ################################# ifeq ($(CONFIG_GSPI_HCI), y) HCI_NAME = gspi endif ifeq ($(CONFIG_SDIO_HCI), y) HCI_NAME = sdio endif ifeq ($(CONFIG_USB_HCI), y) HCI_NAME = usb endif ifeq ($(CONFIG_PCI_HCI), y) HCI_NAME = pci endif _OS_INTFS_FILES := os_dep/osdep_service.o \ os_dep/linux/os_intfs.o \ os_dep/linux/$(HCI_NAME)_intf.o \ os_dep/linux/$(HCI_NAME)_ops_linux.o \ os_dep/linux/ioctl_linux.o \ os_dep/linux/xmit_linux.o \ os_dep/linux/mlme_linux.o \ os_dep/linux/recv_linux.o \ os_dep/linux/ioctl_cfg80211.o \ os_dep/linux/rtw_cfgvendor.o \ os_dep/linux/wifi_regd.o \ os_dep/linux/rtw_android.o \ os_dep/linux/rtw_proc.o ifeq ($(CONFIG_SDIO_HCI), y) _OS_INTFS_FILES += os_dep/linux/custom_gpio_linux.o _OS_INTFS_FILES += os_dep/linux/$(HCI_NAME)_ops_linux.o endif ifeq ($(CONFIG_GSPI_HCI), y) _OS_INTFS_FILES += os_dep/linux/custom_gpio_linux.o _OS_INTFS_FILES += os_dep/linux/$(HCI_NAME)_ops_linux.o endif _HAL_INTFS_FILES := hal/hal_intf.o \ hal/hal_com.o \ hal/hal_com_phycfg.o \ hal/hal_phy.o \ hal/hal_dm.o \ hal/hal_btcoex.o \ hal/hal_hci/hal_$(HCI_NAME).o \ hal/led/hal_$(HCI_NAME)_led.o _OUTSRC_FILES := hal/OUTSRC/phydm_debug.o \ hal/OUTSRC/phydm_AntDiv.o\ hal/OUTSRC/phydm_interface.o\ hal/OUTSRC/phydm_HWConfig.o\ hal/OUTSRC/phydm.o\ hal/OUTSRC/HalPhyRf.o\ hal/OUTSRC/phydm_EdcaTurboCheck.o\ hal/OUTSRC/phydm_DIG.o\ hal/OUTSRC/phydm_PathDiv.o\ hal/OUTSRC/phydm_RaInfo.o\ hal/OUTSRC/phydm_DynamicBBPowerSaving.o\ hal/OUTSRC/phydm_PowerTracking.o\ hal/OUTSRC/phydm_DynamicTxPower.o\ hal/OUTSRC/PhyDM_Adaptivity.o\ hal/OUTSRC/phydm_CfoTracking.o\ hal/OUTSRC/phydm_NoiseMonitor.o\ hal/OUTSRC/phydm_ACS.o EXTRA_CFLAGS += -I$(src)/platform _PLATFORM_FILES := platform/platform_ops.o ifeq ($(CONFIG_BT_COEXIST), y) EXTRA_CFLAGS += -I$(src)/hal/OUTSRC-BTCoexist _OUTSRC_FILES += hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.o \ hal/OUTSRC-BTCoexist/HalBtc8192d2Ant.o \ hal/OUTSRC-BTCoexist/HalBtc8192e1Ant.o \ hal/OUTSRC-BTCoexist/HalBtc8192e2Ant.o \ hal/OUTSRC-BTCoexist/HalBtc8723a1Ant.o \ hal/OUTSRC-BTCoexist/HalBtc8723a2Ant.o \ hal/OUTSRC-BTCoexist/HalBtc8723b1Ant.o \ hal/OUTSRC-BTCoexist/HalBtc8723b2Ant.o \ hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.o \ hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.o \ hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.o \ hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.o \ hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.o endif ########### HAL_RTL8192C ################################# ifeq ($(CONFIG_RTL8192C), y) RTL871X = rtl8192c ifeq ($(CONFIG_USB_HCI), y) MODULE_NAME = 8192cu endif ifeq ($(CONFIG_PCI_HCI), y) MODULE_NAME = 8192ce endif EXTRA_CFLAGS += -DCONFIG_RTL8192C _HAL_INTFS_FILES += \ hal/$(RTL871X)/$(RTL871X)_sreset.o \ hal/$(RTL871X)/$(RTL871X)_xmit.o _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ hal/$(RTL871X)/$(RTL871X)_dm.o \ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ hal/$(RTL871X)/$(RTL871X)_cmd.o \ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o ifeq ($(CONFIG_MP_INCLUDED), y) _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o endif _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/phydm_RTL8192C.o\ hal/OUTSRC/$(RTL871X)/HalDMOutSrc8192C_CE.o ifeq ($(CONFIG_USB_HCI), y) _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/Hal8192CUFWImg_CE.o \ hal/OUTSRC/$(RTL871X)/Hal8192CUPHYImg_CE.o \ hal/OUTSRC/$(RTL871X)/Hal8192CUMACImg_CE.o endif ifeq ($(CONFIG_PCI_HCI), y) _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/Hal8192CEFWImg_CE.o \ hal/OUTSRC/$(RTL871X)/Hal8192CEPHYImg_CE.o \ hal/OUTSRC/$(RTL871X)/Hal8192CEMACImg_CE.o endif endif ########### HAL_RTL8192D ################################# ifeq ($(CONFIG_RTL8192D), y) RTL871X = rtl8192d ifeq ($(CONFIG_USB_HCI), y) MODULE_NAME = 8192du endif ifeq ($(CONFIG_PCI_HCI), y) MODULE_NAME = 8192de endif EXTRA_CFLAGS += -DCONFIG_RTL8192D _HAL_INTFS_FILES += \ hal/$(RTL871X)/$(RTL871X)_xmit.o _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ hal/$(RTL871X)/$(RTL871X)_dm.o \ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ hal/$(RTL871X)/$(RTL871X)_cmd.o \ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o ifeq ($(CONFIG_MP_INCLUDED), y) _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o endif _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/phydm_RTL8192D.o\ hal/OUTSRC/$(RTL871X)/HalDMOutSrc8192D_CE.o ifeq ($(CONFIG_USB_HCI), y) _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/Hal8192DUFWImg_CE.o \ hal/OUTSRC/$(RTL871X)/Hal8192DUPHYImg_CE.o \ hal/OUTSRC/$(RTL871X)/Hal8192DUMACImg_CE.o endif ifeq ($(CONFIG_PCI_HCI), y) _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/Hal8192DEFWImg_CE.o \ hal/OUTSRC/$(RTL871X)/Hal8192DEPHYImg_CE.o \ hal/OUTSRC/$(RTL871X)/Hal8192DEMACImg_CE.o endif endif ########### HAL_RTL8723A ################################# ifeq ($(CONFIG_RTL8723A), y) RTL871X = rtl8723a ifeq ($(CONFIG_GSPI_HCI), y) MODULE_NAME = 8723as endif ifeq ($(CONFIG_SDIO_HCI), y) MODULE_NAME = 8723as endif ifeq ($(CONFIG_USB_HCI), y) MODULE_NAME = 8723au endif ifeq ($(CONFIG_PCI_HCI), y) MODULE_NAME = 8723ae endif EXTRA_CFLAGS += -DCONFIG_RTL8723A _HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ hal/$(RTL871X)/Hal8723PwrSeq.o\ hal/$(RTL871X)/$(RTL871X)_xmit.o \ hal/$(RTL871X)/$(RTL871X)_sreset.o _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ hal/$(RTL871X)/$(RTL871X)_dm.o \ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ hal/$(RTL871X)/$(RTL871X)_cmd.o \ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o ifeq ($(CONFIG_SDIO_HCI), y) _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o else ifeq ($(CONFIG_GSPI_HCI), y) _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o else _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o endif endif ifeq ($(CONFIG_MP_INCLUDED), y) _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o endif ifeq ($(CONFIG_GSPI_HCI), y) _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/Hal8723SHWImg_CE.o endif ifeq ($(CONFIG_SDIO_HCI), y) _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/Hal8723SHWImg_CE.o endif ifeq ($(CONFIG_USB_HCI), y) _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/Hal8723UHWImg_CE.o endif ifeq ($(CONFIG_PCI_HCI), y) _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/Hal8723EHWImg_CE.o endif #hal/OUTSRC/$(RTL871X)/HalHWImg8723A_FW.o _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8723A_BB.o\ hal/OUTSRC/$(RTL871X)/HalHWImg8723A_MAC.o\ hal/OUTSRC/$(RTL871X)/HalHWImg8723A_RF.o\ hal/OUTSRC/$(RTL871X)/phydm_RegConfig8723A.o _OUTSRC_FILES += hal/OUTSRC/rtl8192c/HalDMOutSrc8192C_CE.o endif ########### HAL_RTL8188E ################################# ifeq ($(CONFIG_RTL8188E), y) RTL871X = rtl8188e ifeq ($(CONFIG_SDIO_HCI), y) MODULE_NAME = 8189es endif ifeq ($(CONFIG_GSPI_HCI), y) MODULE_NAME = 8189es endif ifeq ($(CONFIG_USB_HCI), y) MODULE_NAME = 8188eu endif ifeq ($(CONFIG_PCI_HCI), y) MODULE_NAME = 8188ee endif EXTRA_CFLAGS += -DCONFIG_RTL8188E _HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ hal/$(RTL871X)/Hal8188EPwrSeq.o\ hal/$(RTL871X)/$(RTL871X)_xmit.o\ hal/$(RTL871X)/$(RTL871X)_sreset.o _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ hal/$(RTL871X)/$(RTL871X)_dm.o \ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ hal/$(RTL871X)/$(RTL871X)_cmd.o \ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o ifeq ($(CONFIG_SDIO_HCI), y) _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o else ifeq ($(CONFIG_GSPI_HCI), y) _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o else _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o endif endif ifeq ($(CONFIG_MP_INCLUDED), y) _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o endif #hal/OUTSRC/$(RTL871X)/Hal8188EFWImg_CE.o _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8188E_MAC.o\ hal/OUTSRC/$(RTL871X)/HalHWImg8188E_BB.o\ hal/OUTSRC/$(RTL871X)/HalHWImg8188E_RF.o\ hal/OUTSRC/$(RTL871X)/HalHWImg8188E_FW.o\ hal/OUTSRC/$(RTL871X)/HalPhyRf_8188e.o\ hal/OUTSRC/$(RTL871X)/phydm_RegConfig8188E.o\ hal/OUTSRC/$(RTL871X)/Hal8188ERateAdaptive.o\ hal/OUTSRC/$(RTL871X)/phydm_RTL8188E.o endif ########### HAL_RTL8192E ################################# ifeq ($(CONFIG_RTL8192E), y) RTL871X = rtl8192e ifeq ($(CONFIG_SDIO_HCI), y) MODULE_NAME = 8192es endif ifeq ($(CONFIG_USB_HCI), y) MODULE_NAME = 8192eu endif ifeq ($(CONFIG_PCI_HCI), y) MODULE_NAME = 8192ee endif EXTRA_CFLAGS += -DCONFIG_RTL8192E _HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ hal/$(RTL871X)/Hal8192EPwrSeq.o\ hal/$(RTL871X)/$(RTL871X)_xmit.o\ hal/$(RTL871X)/$(RTL871X)_sreset.o _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ hal/$(RTL871X)/$(RTL871X)_dm.o \ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ hal/$(RTL871X)/$(RTL871X)_cmd.o \ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o ifeq ($(CONFIG_SDIO_HCI), y) _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o else ifeq ($(CONFIG_GSPI_HCI), y) _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o else _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o endif endif ifeq ($(CONFIG_MP_INCLUDED), y) _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o endif #hal/OUTSRC/$(RTL871X)/HalHWImg8188E_FW.o _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8192E_MAC.o\ hal/OUTSRC/$(RTL871X)/HalHWImg8192E_BB.o\ hal/OUTSRC/$(RTL871X)/HalHWImg8192E_RF.o\ hal/OUTSRC/$(RTL871X)/HalHWImg8192E_FW.o\ hal/OUTSRC/$(RTL871X)/HalPhyRf_8192e.o\ hal/OUTSRC/$(RTL871X)/phydm_RegConfig8192E.o\ hal/OUTSRC/$(RTL871X)/phydm_RTL8192E.o endif ########### HAL_RTL8812A_RTL8821A ################################# ifneq ($(CONFIG_RTL8812A)_$(CONFIG_RTL8821A), n_n) RTL871X = rtl8812a ifeq ($(CONFIG_USB_HCI), y) MODULE_NAME = 8812au endif ifeq ($(CONFIG_PCI_HCI), y) MODULE_NAME = 8812ae endif ifeq ($(CONFIG_SDIO_HCI), y) MODULE_NAME = 8812as endif _HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ hal/$(RTL871X)/Hal8812PwrSeq.o \ hal/$(RTL871X)/Hal8821APwrSeq.o\ hal/$(RTL871X)/$(RTL871X)_xmit.o\ hal/$(RTL871X)/$(RTL871X)_sreset.o _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ hal/$(RTL871X)/$(RTL871X)_dm.o \ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ hal/$(RTL871X)/$(RTL871X)_cmd.o \ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o ifeq ($(CONFIG_SDIO_HCI), y) _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o else ifeq ($(CONFIG_GSPI_HCI), y) _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o else _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o endif endif ifeq ($(CONFIG_MP_INCLUDED), y) _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o endif ifeq ($(CONFIG_RTL8812A), y) EXTRA_CFLAGS += -DCONFIG_RTL8812A _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8812A_FW.o\ hal/OUTSRC/$(RTL871X)/HalHWImg8812A_MAC.o\ hal/OUTSRC/$(RTL871X)/HalHWImg8812A_BB.o\ hal/OUTSRC/$(RTL871X)/HalHWImg8812A_RF.o\ hal/OUTSRC/$(RTL871X)/HalPhyRf_8812A.o\ hal/OUTSRC/$(RTL871X)/phydm_RegConfig8812A.o\ hal/OUTSRC/$(RTL871X)/phydm_RTL8812A.o endif ifeq ($(CONFIG_RTL8821A), y) ifeq ($(CONFIG_RTL8812A), n) RTL871X = rtl8821a ifeq ($(CONFIG_USB_HCI), y) MODULE_NAME := 8821au endif ifeq ($(CONFIG_PCI_HCI), y) MODULE_NAME := 8821ae endif ifeq ($(CONFIG_SDIO_HCI), y) MODULE_NAME := 8821as endif endif EXTRA_CFLAGS += -DCONFIG_RTL8821A _OUTSRC_FILES += hal/OUTSRC/rtl8821a/HalHWImg8821A_FW.o\ hal/OUTSRC/rtl8821a/HalHWImg8821A_MAC.o\ hal/OUTSRC/rtl8821a/HalHWImg8821A_BB.o\ hal/OUTSRC/rtl8821a/HalHWImg8821A_RF.o\ hal/OUTSRC/rtl8812a/HalPhyRf_8812A.o\ hal/OUTSRC/rtl8821a/HalPhyRf_8821A.o\ hal/OUTSRC/rtl8821a/phydm_RegConfig8821A.o\ hal/OUTSRC/rtl8821a/phydm_RTL8821A.o\ hal/OUTSRC/rtl8821a/PhyDM_IQK_8821A.o endif endif ########### HAL_RTL8723B ################################# ifeq ($(CONFIG_RTL8723B), y) RTL871X = rtl8723b ifeq ($(CONFIG_USB_HCI), y) MODULE_NAME = 8723bu endif ifeq ($(CONFIG_PCI_HCI), y) MODULE_NAME = 8723be endif ifeq ($(CONFIG_SDIO_HCI), y) MODULE_NAME = 8723bs endif EXTRA_CFLAGS += -DCONFIG_RTL8723B _HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ hal/$(RTL871X)/Hal8723BPwrSeq.o\ hal/$(RTL871X)/$(RTL871X)_sreset.o _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ hal/$(RTL871X)/$(RTL871X)_dm.o \ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ hal/$(RTL871X)/$(RTL871X)_cmd.o \ _HAL_INTFS_FILES += \ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o ifeq ($(CONFIG_PCI_HCI), y) _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o else _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o endif ifeq ($(CONFIG_MP_INCLUDED), y) _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o endif _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8723B_BB.o\ hal/OUTSRC/$(RTL871X)/HalHWImg8723B_MAC.o\ hal/OUTSRC/$(RTL871X)/HalHWImg8723B_RF.o\ hal/OUTSRC/$(RTL871X)/HalHWImg8723B_FW.o\ hal/OUTSRC/$(RTL871X)/HalHWImg8723B_MP.o\ hal/OUTSRC/$(RTL871X)/phydm_RegConfig8723B.o\ hal/OUTSRC/$(RTL871X)/HalPhyRf_8723B.o\ hal/OUTSRC/$(RTL871X)/phydm_RTL8723B.o endif ########### AUTO_CFG ################################# ifeq ($(CONFIG_AUTOCFG_CP), y) ifeq ($(CONFIG_MULTIDRV), y) $(shell cp $(TopDIR)/autoconf_multidrv_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) else ifeq ($(CONFIG_RTL8188E)$(CONFIG_SDIO_HCI),yy) $(shell cp $(TopDIR)/autoconf_rtl8189e_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) else $(shell cp $(TopDIR)/autoconf_$(RTL871X)_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) endif endif endif ########### END OF PATH ################################# ifeq ($(CONFIG_USB_HCI), y) ifeq ($(CONFIG_USB_AUTOSUSPEND), y) EXTRA_CFLAGS += -DCONFIG_USB_AUTOSUSPEND endif endif ifeq ($(CONFIG_MP_INCLUDED), y) #MODULE_NAME := $(MODULE_NAME)_mp EXTRA_CFLAGS += -DCONFIG_MP_INCLUDED endif ifeq ($(CONFIG_POWER_SAVING), y) EXTRA_CFLAGS += -DCONFIG_POWER_SAVING endif ifeq ($(CONFIG_HW_PWRP_DETECTION), y) EXTRA_CFLAGS += -DCONFIG_HW_PWRP_DETECTION endif ifeq ($(CONFIG_WIFI_TEST), y) EXTRA_CFLAGS += -DCONFIG_WIFI_TEST endif ifeq ($(CONFIG_BT_COEXIST), y) EXTRA_CFLAGS += -DCONFIG_BT_COEXIST endif ifeq ($(CONFIG_RTL8192CU_REDEFINE_1X1), y) EXTRA_CFLAGS += -DRTL8192C_RECONFIG_TO_1T1R endif ifeq ($(CONFIG_INTEL_WIDI), y) EXTRA_CFLAGS += -DCONFIG_INTEL_WIDI endif ifeq ($(CONFIG_WAPI_SUPPORT), y) EXTRA_CFLAGS += -DCONFIG_WAPI_SUPPORT endif ifeq ($(CONFIG_EFUSE_CONFIG_FILE), y) EXTRA_CFLAGS += -DCONFIG_EFUSE_CONFIG_FILE ifeq ($(MODULE_NAME), 8189es) EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"/system/etc/wifi/wifi_efuse_8189e.map\" else ifeq ($(MODULE_NAME), 8723bs) EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"/system/etc/wifi/wifi_efuse_8723bs.map\" else EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"/system/etc/wifi/wifi_efuse_$(MODULE_NAME).map\" endif EXTRA_CFLAGS += -DWIFIMAC_PATH=\"/data/wifimac.txt\" endif ifeq ($(CONFIG_EXT_CLK), y) EXTRA_CFLAGS += -DCONFIG_EXT_CLK endif ifeq ($(CONFIG_TRAFFIC_PROTECT), y) EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT endif ifeq ($(CONFIG_LOAD_PHY_PARA_FROM_FILE), y) EXTRA_CFLAGS += -DCONFIG_LOAD_PHY_PARA_FROM_FILE #EXTRA_CFLAGS += -DREALTEK_CONFIG_PATH=\"/lib/firmware/\" EXTRA_CFLAGS += -DREALTEK_CONFIG_PATH=\"\" endif ifeq ($(CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY), y) EXTRA_CFLAGS += -DCONFIG_CALIBRATE_TX_POWER_BY_REGULATORY endif ifeq ($(CONFIG_CALIBRATE_TX_POWER_TO_MAX), y) EXTRA_CFLAGS += -DCONFIG_CALIBRATE_TX_POWER_TO_MAX endif ifeq ($(CONFIG_RTW_ADAPTIVITY_EN), disable) EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_EN=0 else ifeq ($(CONFIG_RTW_ADAPTIVITY_EN), enable) EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_EN=1 endif ifeq ($(CONFIG_RTW_ADAPTIVITY_MODE), normal) EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_MODE=0 else ifeq ($(CONFIG_RTW_ADAPTIVITY_MODE), carrier_sense) EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_MODE=1 endif ifeq ($(CONFIG_SKIP_SIGNAL_SCALE_MAPPING), y) EXTRA_CFLAGS += -DCONFIG_SKIP_SIGNAL_SCALE_MAPPING endif ifeq ($(CONFIG_80211W), y) EXTRA_CFLAGS += -DCONFIG_IEEE80211W endif ifeq ($(CONFIG_WOWLAN), y) EXTRA_CFLAGS += -DCONFIG_WOWLAN ifeq ($(CONFIG_SDIO_HCI), y) EXTRA_CFLAGS += -DCONFIG_RTW_SDIO_PM_KEEP_POWER endif endif ifeq ($(CONFIG_AP_WOWLAN), y) EXTRA_CFLAGS += -DCONFIG_AP_WOWLAN ifeq ($(CONFIG_SDIO_HCI), y) EXTRA_CFLAGS += -DCONFIG_RTW_SDIO_PM_KEEP_POWER endif endif ifeq ($(CONFIG_PNO_SUPPORT), y) EXTRA_CFLAGS += -DCONFIG_PNO_SUPPORT ifeq ($(CONFIG_PNO_SET_DEBUG), y) EXTRA_CFLAGS += -DCONFIG_PNO_SET_DEBUG endif endif ifeq ($(CONFIG_GPIO_WAKEUP), y) EXTRA_CFLAGS += -DCONFIG_GPIO_WAKEUP endif ifneq ($(CONFIG_WAKEUP_GPIO_IDX), default) EXTRA_CFLAGS += -DWAKEUP_GPIO_IDX=$(CONFIG_WAKEUP_GPIO_IDX) endif ifeq ($(CONFIG_RTW_SDIO_PM_KEEP_POWER), y) ifeq ($(CONFIG_SDIO_HCI), y) EXTRA_CFLAGS += -DCONFIG_RTW_SDIO_PM_KEEP_POWER endif endif ifeq ($(CONFIG_REDUCE_TX_CPU_LOADING), y) EXTRA_CFLAGS += -DCONFIG_REDUCE_TX_CPU_LOADING endif ifeq ($(CONFIG_BR_EXT), y) BR_NAME = br0 EXTRA_CFLAGS += -DCONFIG_BR_EXT EXTRA_CFLAGS += '-DCONFIG_BR_EXT_BRNAME="'$(BR_NAME)'"' endif ifeq ($(CONFIG_ANTENNA_DIVERSITY), y) EXTRA_CFLAGS += -DCONFIG_ANTENNA_DIVERSITY endif ifeq ($(CONFIG_PLATFORM_I386_PC), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN SUBARCH := $(shell uname -m | sed -e s/i.86/i386/) ARCH ?= $(SUBARCH) CROSS_COMPILE ?= KVER := $(shell uname -r) KSRC := /lib/modules/$(KVER)/build MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/ INSTALL_PREFIX := endif ifeq ($(CONFIG_PLATFORM_ACTIONS_ATM702X), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_ACTIONS_ATM702X #ARCH := arm ARCH := $(R_ARCH) #CROSS_COMPILE := arm-none-linux-gnueabi- CROSS_COMPILE := $(R_CROSS_COMPILE) KVER:= 3.4.0 #KSRC := ../../../../build/out/kernel KSRC := $(KERNEL_BUILD_PATH) MODULE_NAME :=wlan endif ifeq ($(CONFIG_PLATFORM_TI_AM3517), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_SHUTTLE CROSS_COMPILE := arm-eabi- KSRC := $(shell pwd)/../../../Android/kernel ARCH := arm endif ifeq ($(CONFIG_PLATFORM_MSTAR_TITANIA12), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR -DCONFIG_PLATFORM_MSTAR_TITANIA12 ARCH:=mips CROSS_COMPILE:= /usr/src/Mstar_kernel/mips-4.3/bin/mips-linux-gnu- KVER:= 2.6.28.9 KSRC:= /usr/src/Mstar_kernel/2.6.28.9/ endif ifeq ($(CONFIG_PLATFORM_MSTAR), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR #-DCONFIG_PLATFORM_MSTAR_SCAN_BEFORE_CONNECT ARCH:=arm CROSS_COMPILE:= /usr/src/bin/arm-none-linux-gnueabi- KVER:= 3.1.10 KSRC:= /usr/src/Mstar_kernel/3.1.10/ endif ifeq ($(CONFIG_PLATFORM_ANDROID_X86), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN SUBARCH := $(shell uname -m | sed -e s/i.86/i386/) ARCH := $(SUBARCH) CROSS_COMPILE := /media/DATA-2/android-x86/ics-x86_20120130/prebuilt/linux-x86/toolchain/i686-unknown-linux-gnu-4.2.1/bin/i686-unknown-linux-gnu- KSRC := /media/DATA-2/android-x86/ics-x86_20120130/out/target/product/generic_x86/obj/kernel MODULE_NAME :=wlan endif ifeq ($(CONFIG_PLATFORM_JB_X86), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT EXTRA_CFLAGS += -DCONFIG_P2P_IPS SUBARCH := $(shell uname -m | sed -e s/i.86/i386/) ARCH := $(SUBARCH) CROSS_COMPILE := /home/android_sdk/android-x86_JB/prebuilts/gcc/linux-x86/x86/i686-linux-android-4.7/bin/i686-linux-android- KSRC := /home/android_sdk/android-x86_JB/out/target/product/x86/obj/kernel/ MODULE_NAME :=wlan endif ifeq ($(CONFIG_PLATFORM_ARM_PXA2XX), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ARCH := arm CROSS_COMPILE := arm-none-linux-gnueabi- KVER := 2.6.34.1 KSRC ?= /usr/src/linux-2.6.34.1 endif ifeq ($(CONFIG_PLATFORM_ARM_S3C2K4), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ARCH := arm CROSS_COMPILE := arm-linux- KVER := 2.6.24.7_$(ARCH) KSRC := /usr/src/kernels/linux-$(KVER) endif ifeq ($(CONFIG_PLATFORM_ARM_S3C6K4), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ARCH := arm CROSS_COMPILE := arm-none-linux-gnueabi- KVER := 2.6.34.1 KSRC ?= /usr/src/linux-2.6.34.1 endif ifeq ($(CONFIG_PLATFORM_RTD2880B), y) EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN -DCONFIG_PLATFORM_RTD2880B ARCH:= CROSS_COMPILE:= KVER:= KSRC:= endif ifeq ($(CONFIG_PLATFORM_MIPS_RMI), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ARCH:=mips CROSS_COMPILE:=mipsisa32r2-uclibc- KVER:= KSRC:= /root/work/kernel_realtek endif ifeq ($(CONFIG_PLATFORM_MIPS_PLM), y) EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN ARCH:=mips CROSS_COMPILE:=mipsisa32r2-uclibc- KVER:= KSRC:= /root/work/kernel_realtek endif ifeq ($(CONFIG_PLATFORM_MSTAR389), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR389 ARCH:=mips CROSS_COMPILE:= mips-linux-gnu- KVER:= 2.6.28.10 KSRC:= /home/mstar/mstar_linux/2.6.28.9/ endif ifeq ($(CONFIG_PLATFORM_MIPS_AR9132), y) EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN ARCH := mips CROSS_COMPILE := mips-openwrt-linux- KSRC := /home/alex/test_openwrt/tmp/linux-2.6.30.9 endif ifeq ($(CONFIG_PLATFORM_DMP_PHILIPS), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DRTK_DMP_PLATFORM ARCH := mips #CROSS_COMPILE:=/usr/local/msdk-4.3.6-mips-EL-2.6.12.6-0.9.30.3/bin/mipsel-linux- CROSS_COMPILE:=/usr/local/toolchain_mipsel/bin/mipsel-linux- KSRC ?=/usr/local/Jupiter/linux-2.6.12 endif ifeq ($(CONFIG_PLATFORM_RTK_DMP), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DRTK_DMP_PLATFORM -DCONFIG_WIRELESS_EXT EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS ifeq ($(CONFIG_USB_HCI), y) _PLATFORM_FILES += platform/platform_RTK_DMP_usb.o endif ARCH:=mips CROSS_COMPILE:=mipsel-linux- KVER:= KSRC ?= /usr/src/DMP_Kernel/jupiter/linux-2.6.12 endif ifeq ($(CONFIG_PLATFORM_MT53XX), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MT53XX ARCH:= arm CROSS_COMPILE:= arm11_mtk_le- KVER:= 2.6.27 KSRC?= /proj/mtk00802/BD_Compare/BDP/Dev/BDP_V301/BDP_Linux/linux-2.6.27 endif ifeq ($(CONFIG_PLATFORM_ARM_MX51_241H), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_WISTRON_PLATFORM ARCH := arm CROSS_COMPILE := /opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/bin/arm-none-linux-gnueabi- KVER := 2.6.31 KSRC ?= /lib/modules/2.6.31-770-g0e46b52/source endif ifeq ($(CONFIG_PLATFORM_FS_MX61), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ARCH := arm CROSS_COMPILE := /home/share/CusEnv/FreeScale/arm-eabi-4.4.3/bin/arm-eabi- KSRC ?= /home/share/CusEnv/FreeScale/FS_kernel_env endif ifeq ($(CONFIG_PLATFORM_ACTIONS_ATJ227X), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ACTIONS_ATJ227X ARCH := mips CROSS_COMPILE := /home/cnsd4/project/actions/tools-2.6.27/bin/mipsel-linux-gnu- KVER := 2.6.27 KSRC := /home/cnsd4/project/actions/linux-2.6.27.28 endif ifeq ($(CONFIG_PLATFORM_TI_DM365), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_TI_DM365 EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_RX EXTRA_CFLAGS += -DCONFIG_SINGLE_XMIT_BUF -DCONFIG_SINGLE_RECV_BUF ARCH := arm #CROSS_COMPILE := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/arm/v5t_le/bin/arm_v5t_le- #KSRC := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/lsp/ti-davinci/linux-dm365 CROSS_COMPILE := /opt/montavista/pro5.0/devkit/arm/v5t_le/bin/arm-linux- KSRC:= /home/vivotek/lsp/DM365/kernel_platform/kernel/linux-2.6.18 KERNELOUTPUT := ${PRODUCTDIR}/tmp KVER := 2.6.18 endif ifeq ($(CONFIG_PLATFORM_MOZART), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MOZART ARCH := arm CROSS_COMPILE := /home/vivotek/lsp/mozart3v2/Mozart3e_Toolchain/build_arm_nofpu/usr/bin/arm-linux- KVER := $(shell uname -r) KSRC:= /opt/Vivotek/lsp/mozart3v2/kernel_platform/kernel/mozart_kernel-1.17 KERNELOUTPUT := /home/pink/sample/ODM/IP8136W-VINT/tmp/kernel endif ifeq ($(CONFIG_PLATFORM_TEGRA3_CARDHU), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN # default setting for Android 4.1, 4.2 EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT EXTRA_CFLAGS += -DCONFIG_P2P_IPS ARCH := arm CROSS_COMPILE := /home/android_sdk/nvidia/tegra-16r3-partner-android-4.1_20120723/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- KSRC := /home/android_sdk/nvidia/tegra-16r3-partner-android-4.1_20120723/out/target/product/cardhu/obj/KERNEL MODULE_NAME := wlan endif ifeq ($(CONFIG_PLATFORM_TEGRA4_DALMORE), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN # default setting for Android 4.1, 4.2 EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT EXTRA_CFLAGS += -DCONFIG_P2P_IPS ARCH := arm CROSS_COMPILE := /home/android_sdk/nvidia/tegra-17r9-partner-android-4.2-dalmore_20130131/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi- KSRC := /home/android_sdk/nvidia/tegra-17r9-partner-android-4.2-dalmore_20130131/out/target/product/dalmore/obj/KERNEL MODULE_NAME := wlan endif ifeq ($(CONFIG_PLATFORM_ARM_TCC8900), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ARCH := arm CROSS_COMPILE := /home/android_sdk/Telechips/SDK_2304_20110613/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- KSRC := /home/android_sdk/Telechips/SDK_2304_20110613/kernel MODULE_NAME := wlan endif ifeq ($(CONFIG_PLATFORM_ARM_TCC8920), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ARCH := arm CROSS_COMPILE := /home/android_sdk/Telechips/v12.06_r1-tcc-android-4.0.4/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- KSRC := /home/android_sdk/Telechips/v12.06_r1-tcc-android-4.0.4/kernel MODULE_NAME := wlan endif ifeq ($(CONFIG_PLATFORM_ARM_TCC8920_JB42), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN # default setting for Android 4.1, 4.2 EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT EXTRA_CFLAGS += -DCONFIG_P2P_IPS ARCH := arm CROSS_COMPILE := /home/android_sdk/Telechips/v13.03_r1-tcc-android-4.2.2_ds_patched/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi- KSRC := /home/android_sdk/Telechips/v13.03_r1-tcc-android-4.2.2_ds_patched/kernel MODULE_NAME := wlan endif ifeq ($(CONFIG_PLATFORM_ARM_RK2818), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_ROCKCHIPS ARCH := arm CROSS_COMPILE := /usr/src/release_fae_version/toolchain/arm-eabi-4.4.0/bin/arm-eabi- KSRC := /usr/src/release_fae_version/kernel25_A7_281x MODULE_NAME := wlan endif ifeq ($(CONFIG_PLATFORM_ARM_RK3188), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_ROCKCHIPS # default setting for Android 4.1, 4.2, 4.3, 4.4 EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE # default setting for Power control EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC EXTRA_CFLAGS += -DRTW_SUPPORT_PLATFORM_SHUTDOWN # default setting for Special function EXTRA_CFLAGS += -DCONFIG_P2P_IPS ARCH := arm CROSS_COMPILE := /home/android_sdk/Rockchip/Rk3188/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi- KSRC := /home/android_sdk/Rockchip/Rk3188/kernel MODULE_NAME := wlan endif ifeq ($(CONFIG_PLATFORM_ARM_RK3066), y) EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_RK3066 EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 EXTRA_CFLAGS += -DCONFIG_P2P_IPS ifeq ($(CONFIG_SDIO_HCI), y) EXTRA_CFLAGS += -DRTW_SUPPORT_PLATFORM_SHUTDOWN endif EXTRA_CFLAGS += -fno-pic ARCH := arm CROSS_COMPILE := /home/android_sdk/Rockchip/rk3066_20130607/prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.6/bin/arm-linux-androideabi- #CROSS_COMPILE := /home/android_sdk/Rockchip/Rk3066sdk/prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.6/bin/arm-linux-androideabi- KSRC := /home/android_sdk/Rockchip/Rk3066sdk/kernel MODULE_NAME :=wlan endif ifeq ($(CONFIG_PLATFORM_ARM_URBETTER), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN #-DCONFIG_MINIMAL_MEMORY_USAGE ARCH := arm CROSS_COMPILE := /media/DATA-1/urbetter/arm-2009q3/bin/arm-none-linux-gnueabi- KSRC := /media/DATA-1/urbetter/ics-urbetter/kernel MODULE_NAME := wlan endif ifeq ($(CONFIG_PLATFORM_ARM_TI_PANDA), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN #-DCONFIG_MINIMAL_MEMORY_USAGE ARCH := arm #CROSS_COMPILE := /media/DATA-1/aosp/ics-aosp_20111227/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- #KSRC := /media/DATA-1/aosp/android-omap-panda-3.0_20120104 CROSS_COMPILE := /media/DATA-1/android-4.0/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- KSRC := /media/DATA-1/android-4.0/panda_kernel/omap MODULE_NAME := wlan endif ifeq ($(CONFIG_PLATFORM_MIPS_JZ4760), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_MINIMAL_MEMORY_USAGE ARCH ?= mips CROSS_COMPILE ?= /mnt/sdb5/Ingenic/Umido/mips-4.3/bin/mips-linux-gnu- KSRC ?= /mnt/sdb5/Ingenic/Umido/kernel endif ifeq ($(CONFIG_PLATFORM_SZEBOOK), y) EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN ARCH:=arm CROSS_COMPILE:=/opt/crosstool2/bin/armeb-unknown-linux-gnueabi- KVER:= 2.6.31.6 KSRC:= ../code/linux-2.6.31.6-2020/ endif #Add setting for MN10300 ifeq ($(CONFIG_PLATFORM_MN10300), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MN10300 ARCH := mn10300 CROSS_COMPILE := mn10300-linux- KVER := 2.6.32.2 KSRC := /home/winuser/work/Plat_sLD2T_V3010/usr/src/linux-2.6.32.2 INSTALL_PREFIX := endif ifeq ($(CONFIG_PLATFORM_ARM_SUNxI), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUNxI # default setting for Android 4.1, 4.2 EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT EXTRA_CFLAGS += -DDCONFIG_P2P_IPS EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS ifeq ($(CONFIG_USB_HCI), y) EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX _PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o endif ifeq ($(CONFIG_SDIO_HCI), y) # default setting for A10-EVB mmc0 #EXTRA_CFLAGS += -DCONFIG_WITS_EVB_V13 _PLATFORM_FILES += platform/platform_ARM_SUNxI_sdio.o endif ARCH := arm #CROSS_COMPILE := arm-none-linux-gnueabi- CROSS_COMPILE=/home/android_sdk/Allwinner/a10/android-jb42/lichee-jb42/buildroot/output/external-toolchain/bin/arm-none-linux-gnueabi- KVER := 3.0.8 #KSRC:= ../lichee/linux-3.0/ KSRC=/home/android_sdk/Allwinner/a10/android-jb42/lichee-jb42/linux-3.0 endif ifeq ($(CONFIG_PLATFORM_ARM_SUN6I), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN6I EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT # default setting for Android 4.1, 4.2, 4.3, 4.4 EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT EXTRA_CFLAGS += -DCONFIG_P2P_IPS -DCONFIG_QOS_OPTIMIZATION EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS ifeq ($(CONFIG_USB_HCI), y) EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX _PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o endif ifeq ($(CONFIG_SDIO_HCI), y) # default setting for A31-EVB mmc0 EXTRA_CFLAGS += -DCONFIG_A31_EVB _PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o endif ARCH := arm #Android-JB42 #CROSS_COMPILE := /home/android_sdk/Allwinner/a31/android-jb42/lichee/buildroot/output/external-toolchain/bin/arm-linux-gnueabi- #KSRC :=/home/android_sdk/Allwinner/a31/android-jb42/lichee/linux-3.3 #ifeq ($(CONFIG_USB_HCI), y) #MODULE_NAME := 8188eu_sw #endif # ==== Cross compile setting for kitkat-a3x_v4.5 ===== CROSS_COMPILE := /home/android_sdk/Allwinner/a31/kitkat-a3x_v4.5/lichee/buildroot/output/external-toolchain/bin/arm-linux-gnueabi- KSRC :=/home/android_sdk/Allwinner/a31/kitkat-a3x_v4.5/lichee/linux-3.3 endif ifeq ($(CONFIG_PLATFORM_ARM_SUN7I), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN7I EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT # default setting for Android 4.1, 4.2, 4.3, 4.4 EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT EXTRA_CFLAGS += -DCONFIG_P2P_IPS -DCONFIG_QOS_OPTIMIZATION EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS ifeq ($(CONFIG_USB_HCI), y) EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX _PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o endif ifeq ($(CONFIG_SDIO_HCI), y) _PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o endif ARCH := arm # ===Cross compile setting for Android 4.2 SDK === #CROSS_COMPILE := /home/android_sdk/Allwinner/a20_evb/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi- #KSRC := /home/android_sdk/Allwinner/a20_evb/lichee/linux-3.3 # ==== Cross compile setting for Android 4.3 SDK ===== #CROSS_COMPILE := /home/android_sdk/Allwinner/a20/android-jb43/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi- #KSRC := /home/android_sdk/Allwinner/a20/android-jb43/lichee/linux-3.4 # ==== Cross compile setting for kitkat-a20_v4.4 ===== CROSS_COMPILE := /home/android_sdk/Allwinner/a20/kitkat-a20_v4.4/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi- KSRC := /home/android_sdk/Allwinner/a20/kitkat-a20_v4.4/lichee/linux-3.4 endif ifeq ($(CONFIG_PLATFORM_ARM_SUN8I), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN8I EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT # default setting for Android 4.1, 4.2 EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT EXTRA_CFLAGS += -DCONFIG_P2P_IPS EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS ifeq ($(CONFIG_USB_HCI), y) EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX _PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o endif ifeq ($(CONFIG_SDIO_HCI), y) _PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o endif ARCH := arm # ===Cross compile setting for Android 4.2 SDK === #CROSS_COMPILE := /home/android_sdk/Allwinner/a23/android-jb42/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi- #KSRC :=/home/android_sdk/Allwinner/a23/android-jb42/lichee/linux-3.4 # ===Cross compile setting for Android 4.4 SDK === CROSS_COMPILE := /home/android_sdk/Allwinner/a23/android-kk44/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi- KSRC :=/home/android_sdk/Allwinner/a23/android-kk44/lichee/linux-3.4 endif ifeq ($(CONFIG_PLATFORM_ACTIONS_ATV5201), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ACTIONS_ATV5201 EXTRA_CFLAGS += -DCONFIG_SDIO_DISABLE_RXFIFO_POLLING_LOOP ARCH := mips CROSS_COMPILE := mipsel-linux-gnu- KVER := $(KERNEL_VER) KSRC:= $(CFGDIR)/../../kernel/linux-$(KERNEL_VER) endif ifeq ($(CONFIG_PLATFORM_ARM_RTD299X), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DUSB_XMITBUF_ALIGN_SZ=1024 -DUSB_PACKET_OFFSET_SZ=0 #ARCH, CROSS_COMPILE, KSRC,and MODDESTDIR are provided by external makefile INSTALL_PREFIX := endif # Platfrom setting ifeq ($(CONFIG_PLATFORM_ARM_SPREADTRUM_6820), y) ifeq ($(CONFIG_ANDROID_2X), y) EXTRA_CFLAGS += -DANDROID_2X endif EXTRA_CFLAGS += -DCONFIG_PLATFORM_SPRD EXTRA_CFLAGS += -DPLATFORM_SPREADTRUM_6820 EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ifeq ($(RTL871X), rtl8188e) EXTRA_CFLAGS += -DSOFTAP_PS_DURATION=50 endif ifeq ($(CONFIG_SDIO_HCI), y) EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS _PLATFORM_FILES += platform/platform_sprd_sdio.o endif endif ifeq ($(CONFIG_PLATFORM_ARM_SPREADTRUM_8810), y) ifeq ($(CONFIG_ANDROID_2X), y) EXTRA_CFLAGS += -DANDROID_2X endif EXTRA_CFLAGS += -DCONFIG_PLATFORM_SPRD EXTRA_CFLAGS += -DPLATFORM_SPREADTRUM_8810 EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ifeq ($(RTL871X), rtl8188e) EXTRA_CFLAGS += -DSOFTAP_PS_DURATION=50 endif ifeq ($(CONFIG_SDIO_HCI), y) EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS _PLATFORM_FILES += platform/platform_sprd_sdio.o endif endif ifeq ($(CONFIG_PLATFORM_ARM_WMT), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS ifeq ($(CONFIG_SDIO_HCI), y) _PLATFORM_FILES += platform/platform_ARM_WMT_sdio.o endif ARCH := arm CROSS_COMPILE := /home/android_sdk/WonderMedia/wm8880-android4.4/toolchain/arm_201103_gcc4.5.2/mybin/arm_1103_le- KSRC := /home/android_sdk/WonderMedia/wm8880-android4.4/kernel4.4/ MODULE_NAME :=8189es_kk endif ifeq ($(CONFIG_PLATFORM_RTK119X), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN #EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN7I EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT # default setting for Android 4.1, 4.2 EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT #EXTRA_CFLAGS += -DCONFIG_P2P_IPS -DCONFIG_QOS_OPTIMIZATION EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION #EXTRA_CFLAGS += -DCONFIG_#PLATFORM_OPS ifeq ($(CONFIG_USB_HCI), y) EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX #_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o endif ifeq ($(CONFIG_SDIO_HCI), y) _PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o endif ARCH := arm # ==== Cross compile setting for Android 4.4 SDK ===== #CROSS_COMPILE := arm-linux-gnueabihf- KVER := 3.10.24 #KSRC :=/home/android_sdk/Allwinner/a20/android-kitkat44/lichee/linux-3.4 CROSS_COMPILE := /home/realtek/software_phoenix/phoenix/toolchain/usr/local/arm-2013.11/bin/arm-linux-gnueabihf- KSRC := /home/realtek/software_phoenix/linux-kernel MODULE_NAME := 8192eu endif ifeq ($(CONFIG_MULTIDRV), y) ifeq ($(CONFIG_SDIO_HCI), y) MODULE_NAME := rtw_sdio endif ifeq ($(CONFIG_USB_HCI), y) MODULE_NAME := rtw_usb endif ifeq ($(CONFIG_PCI_HCI), y) MODULE_NAME := rtw_pci endif endif USER_MODULE_NAME ?= ifneq ($(USER_MODULE_NAME),) MODULE_NAME := $(USER_MODULE_NAME) endif ifneq ($(KERNELRELEASE),) rtk_core := core/rtw_cmd.o \ core/rtw_security.o \ core/rtw_debug.o \ core/rtw_io.o \ core/rtw_ioctl_query.o \ core/rtw_ioctl_set.o \ core/rtw_ieee80211.o \ core/rtw_mlme.o \ core/rtw_mlme_ext.o \ core/rtw_wlan_util.o \ core/rtw_vht.o \ core/rtw_pwrctrl.o \ core/rtw_rf.o \ core/rtw_recv.o \ core/rtw_sta_mgt.o \ core/rtw_ap.o \ core/rtw_xmit.o \ core/rtw_p2p.o \ core/rtw_tdls.o \ core/rtw_br_ext.o \ core/rtw_iol.o \ core/rtw_sreset.o \ core/rtw_btcoex.o \ core/rtw_beamforming.o \ core/rtw_odm.o \ core/efuse/rtw_efuse.o $(MODULE_NAME)-y += $(rtk_core) $(MODULE_NAME)-$(CONFIG_INTEL_WIDI) += core/rtw_intel_widi.o $(MODULE_NAME)-$(CONFIG_WAPI_SUPPORT) += core/rtw_wapi.o \ core/rtw_wapi_sms4.o $(MODULE_NAME)-y += $(_OS_INTFS_FILES) $(MODULE_NAME)-y += $(_HAL_INTFS_FILES) $(MODULE_NAME)-y += $(_OUTSRC_FILES) $(MODULE_NAME)-y += $(_PLATFORM_FILES) $(MODULE_NAME)-$(CONFIG_MP_INCLUDED) += core/rtw_mp.o \ core/rtw_mp_ioctl.o ifeq ($(CONFIG_RTL8723A), y) $(MODULE_NAME)-$(CONFIG_MP_INCLUDED)+= core/rtw_bt_mp.o endif ifeq ($(CONFIG_RTL8723B), y) $(MODULE_NAME)-$(CONFIG_MP_INCLUDED)+= core/rtw_bt_mp.o endif ifeq ($(CONFIG_RTL8821A), y) $(MODULE_NAME)-$(CONFIG_MP_INCLUDED)+= core/rtw_bt_mp.o endif obj-$(CONFIG_RTL8812AU) := $(MODULE_NAME).o else export CONFIG_RTL8812AU = m all: modules modules: $(MAKE) ARCH=$(ARCH) CROSS_COMPILE=$(CROSS_COMPILE) -C $(KSRC) M=$(shell pwd) modules strip: $(CROSS_COMPILE)strip $(MODULE_NAME).ko --strip-unneeded install: install -p -m 644 $(MODULE_NAME).ko $(MODDESTDIR) /sbin/depmod -a ${KVER} uninstall: rm -f $(MODDESTDIR)/$(MODULE_NAME).ko /sbin/depmod -a ${KVER} config_r: @echo "make config" /bin/bash script/Configure script/config.in .PHONY: modules clean clean: cd hal/OUTSRC/ ; rm -fr */*.mod.c */*.mod */*.o */.*.cmd */*.ko cd hal/OUTSRC/ ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko cd hal/led ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko cd hal ; rm -fr */*/*.mod.c */*/*.mod */*/*.o */*/.*.cmd */*/*.ko cd hal ; rm -fr */*.mod.c */*.mod */*.o */.*.cmd */*.ko cd hal ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko cd core/efuse ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko cd core ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko cd os_dep/linux ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko cd os_dep ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko cd platform ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko rm -fr Module.symvers ; rm -fr Module.markers ; rm -fr modules.order rm -fr *.mod.c *.mod *.o .*.cmd *.ko *~ rm -fr .tmp_versions endif rtl8812au-4.3.8.12175.20140902+dfsg/clean000066400000000000000000000001001261122257400164730ustar00rootroot00000000000000#!/bin/bash rmmod 8192cu rmmod 8192ce rmmod 8192du rmmod 8192de rtl8812au-4.3.8.12175.20140902+dfsg/core/000077500000000000000000000000001261122257400164275ustar00rootroot00000000000000rtl8812au-4.3.8.12175.20140902+dfsg/core/efuse/000077500000000000000000000000001261122257400175365ustar00rootroot00000000000000rtl8812au-4.3.8.12175.20140902+dfsg/core/efuse/rtw_efuse.c000066400000000000000000001046041261122257400217120ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_EFUSE_C_ #include #include /*------------------------Define local variable------------------------------*/ u8 fakeEfuseBank=0; u32 fakeEfuseUsedBytes=0; u8 fakeEfuseContent[EFUSE_MAX_HW_SIZE]={0}; u8 fakeEfuseInitMap[EFUSE_MAX_MAP_LEN]={0}; u8 fakeEfuseModifiedMap[EFUSE_MAX_MAP_LEN]={0}; u32 BTEfuseUsedBytes=0; u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; u8 BTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN]={0}; u8 BTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN]={0}; u32 fakeBTEfuseUsedBytes=0; u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; u8 fakeBTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN]={0}; u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN]={0}; /*------------------------Define local variable------------------------------*/ //------------------------------------------------------------------------------ #define REG_EFUSE_CTRL 0x0030 #define EFUSE_CTRL REG_EFUSE_CTRL // E-Fuse Control. //------------------------------------------------------------------------------ BOOLEAN Efuse_Read1ByteFromFakeContent( IN PADAPTER pAdapter, IN u16 Offset, IN OUT u8 *Value ); BOOLEAN Efuse_Read1ByteFromFakeContent( IN PADAPTER pAdapter, IN u16 Offset, IN OUT u8 *Value ) { if(Offset >= EFUSE_MAX_HW_SIZE) { return _FALSE; } //DbgPrint("Read fake content, offset = %d\n", Offset); if(fakeEfuseBank == 0) *Value = fakeEfuseContent[Offset]; else *Value = fakeBTEfuseContent[fakeEfuseBank-1][Offset]; return _TRUE; } BOOLEAN Efuse_Write1ByteToFakeContent( IN PADAPTER pAdapter, IN u16 Offset, IN u8 Value ); BOOLEAN Efuse_Write1ByteToFakeContent( IN PADAPTER pAdapter, IN u16 Offset, IN u8 Value ) { if(Offset >= EFUSE_MAX_HW_SIZE) { return _FALSE; } if(fakeEfuseBank == 0) fakeEfuseContent[Offset] = Value; else { fakeBTEfuseContent[fakeEfuseBank-1][Offset] = Value; } return _TRUE; } /*----------------------------------------------------------------------------- * Function: Efuse_PowerSwitch * * Overview: When we want to enable write operation, we should change to * pwr on state. When we stop write, we should switch to 500k mode * and disable LDO 2.5V. * * Input: NONE * * Output: NONE * * Return: NONE * * Revised History: * When Who Remark * 11/17/2008 MHC Create Version 0. * *---------------------------------------------------------------------------*/ VOID Efuse_PowerSwitch( IN PADAPTER pAdapter, IN u8 bWrite, IN u8 PwrState) { pAdapter->HalFunc.EfusePowerSwitch(pAdapter, bWrite, PwrState); } VOID BTEfuse_PowerSwitch( IN PADAPTER pAdapter, IN u8 bWrite, IN u8 PwrState) { if(pAdapter->HalFunc.BTEfusePowerSwitch) pAdapter->HalFunc.BTEfusePowerSwitch(pAdapter, bWrite, PwrState); } /*----------------------------------------------------------------------------- * Function: efuse_GetCurrentSize * * Overview: Get current efuse size!!! * * Input: NONE * * Output: NONE * * Return: NONE * * Revised History: * When Who Remark * 11/16/2008 MHC Create Version 0. * *---------------------------------------------------------------------------*/ u16 Efuse_GetCurrentSize( IN PADAPTER pAdapter, IN u8 efuseType, IN BOOLEAN bPseudoTest) { u16 ret=0; ret = pAdapter->HalFunc.EfuseGetCurrentSize(pAdapter, efuseType, bPseudoTest); return ret; } /* 11/16/2008 MH Add description. Get current efuse area enabled word!!. */ u8 Efuse_CalculateWordCnts(IN u8 word_en) { u8 word_cnts = 0; if(!(word_en & BIT(0))) word_cnts++; // 0 : write enable if(!(word_en & BIT(1))) word_cnts++; if(!(word_en & BIT(2))) word_cnts++; if(!(word_en & BIT(3))) word_cnts++; return word_cnts; } // // Description: // Execute E-Fuse read byte operation. // Refered from SD1 Richard. // // Assumption: // 1. Boot from E-Fuse and successfully auto-load. // 2. PASSIVE_LEVEL (USB interface) // // Created by Roger, 2008.10.21. // VOID ReadEFuseByte( PADAPTER Adapter, u16 _offset, u8 *pbuf, IN BOOLEAN bPseudoTest) { u32 value32; u8 readbyte; u16 retry; //u32 start=rtw_get_current_time(); if(bPseudoTest) { Efuse_Read1ByteFromFakeContent(Adapter, _offset, pbuf); return; } if (IS_HARDWARE_TYPE_8723B(Adapter)) { // <20130121, Kordan> For SMIC S55 EFUSE specificatoin. //0x34[11]: SW force PGMEN input of efuse to high. (for the bank selected by 0x34[9:8]) PHY_SetMacReg(Adapter, EFUSE_TEST, BIT11, 0); } //Write Address rtw_write8(Adapter, EFUSE_CTRL+1, (_offset & 0xff)); readbyte = rtw_read8(Adapter, EFUSE_CTRL+2); rtw_write8(Adapter, EFUSE_CTRL+2, ((_offset >> 8) & 0x03) | (readbyte & 0xfc)); //Write bit 32 0 readbyte = rtw_read8(Adapter, EFUSE_CTRL+3); rtw_write8(Adapter, EFUSE_CTRL+3, (readbyte & 0x7f)); //Check bit 32 read-ready retry = 0; value32 = rtw_read32(Adapter, EFUSE_CTRL); //while(!(((value32 >> 24) & 0xff) & 0x80) && (retry<10)) while(!(((value32 >> 24) & 0xff) & 0x80) && (retry<10000)) { value32 = rtw_read32(Adapter, EFUSE_CTRL); retry++; } // 20100205 Joseph: Add delay suggested by SD1 Victor. // This fix the problem that Efuse read error in high temperature condition. // Designer says that there shall be some delay after ready bit is set, or the // result will always stay on last data we read. rtw_udelay_os(50); value32 = rtw_read32(Adapter, EFUSE_CTRL); *pbuf = (u8)(value32 & 0xff); //DBG_871X("ReadEFuseByte _offset:%08u, in %d ms\n",_offset ,rtw_get_passing_time_ms(start)); } // // Description: // 1. Execute E-Fuse read byte operation according as map offset and // save to E-Fuse table. // 2. Refered from SD1 Richard. // // Assumption: // 1. Boot from E-Fuse and successfully auto-load. // 2. PASSIVE_LEVEL (USB interface) // // Created by Roger, 2008.10.21. // // 2008/12/12 MH 1. Reorganize code flow and reserve bytes. and add description. // 2. Add efuse utilization collect. // 2008/12/22 MH Read Efuse must check if we write section 1 data again!!! Sec1 // write addr must be after sec5. // VOID efuse_ReadEFuse( PADAPTER Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, IN BOOLEAN bPseudoTest ); VOID efuse_ReadEFuse( PADAPTER Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, IN BOOLEAN bPseudoTest ) { Adapter->HalFunc.ReadEFuse(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest); } VOID EFUSE_GetEfuseDefinition( IN PADAPTER pAdapter, IN u8 efuseType, IN u8 type, OUT void *pOut, IN BOOLEAN bPseudoTest ) { pAdapter->HalFunc.EFUSEGetEfuseDefinition(pAdapter, efuseType, type, pOut, bPseudoTest); } /*----------------------------------------------------------------------------- * Function: EFUSE_Read1Byte * * Overview: Copy from WMAC fot EFUSE read 1 byte. * * Input: NONE * * Output: NONE * * Return: NONE * * Revised History: * When Who Remark * 09/23/2008 MHC Copy from WMAC. * *---------------------------------------------------------------------------*/ u8 EFUSE_Read1Byte( IN PADAPTER Adapter, IN u16 Address) { u8 data; u8 Bytetemp = {0x00}; u8 temp = {0x00}; u32 k=0; u16 contentLen=0; EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI , TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&contentLen, _FALSE); if (Address < contentLen) //E-fuse 512Byte { //Write E-fuse Register address bit0~7 temp = Address & 0xFF; rtw_write8(Adapter, EFUSE_CTRL+1, temp); Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+2); //Write E-fuse Register address bit8~9 temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC); rtw_write8(Adapter, EFUSE_CTRL+2, temp); //Write 0x30[31]=0 Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); temp = Bytetemp & 0x7F; rtw_write8(Adapter, EFUSE_CTRL+3, temp); //Wait Write-ready (0x30[31]=1) Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); while(!(Bytetemp & 0x80)) { Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); k++; if(k==1000) { k=0; break; } } data=rtw_read8(Adapter, EFUSE_CTRL); return data; } else return 0xFF; }/* EFUSE_Read1Byte */ /*----------------------------------------------------------------------------- * Function: EFUSE_Write1Byte * * Overview: Copy from WMAC fot EFUSE write 1 byte. * * Input: NONE * * Output: NONE * * Return: NONE * * Revised History: * When Who Remark * 09/23/2008 MHC Copy from WMAC. * *---------------------------------------------------------------------------*/ void EFUSE_Write1Byte( IN PADAPTER Adapter, IN u16 Address, IN u8 Value); void EFUSE_Write1Byte( IN PADAPTER Adapter, IN u16 Address, IN u8 Value) { u8 Bytetemp = {0x00}; u8 temp = {0x00}; u32 k=0; u16 contentLen=0; //RT_TRACE(COMP_EFUSE, DBG_LOUD, ("Addr=%x Data =%x\n", Address, Value)); EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI , TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&contentLen, _FALSE); if( Address < contentLen) //E-fuse 512Byte { rtw_write8(Adapter, EFUSE_CTRL, Value); //Write E-fuse Register address bit0~7 temp = Address & 0xFF; rtw_write8(Adapter, EFUSE_CTRL+1, temp); Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+2); //Write E-fuse Register address bit8~9 temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC); rtw_write8(Adapter, EFUSE_CTRL+2, temp); //Write 0x30[31]=1 Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); temp = Bytetemp | 0x80; rtw_write8(Adapter, EFUSE_CTRL+3, temp); //Wait Write-ready (0x30[31]=0) Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); while(Bytetemp & 0x80) { Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); k++; if(k==100) { k=0; break; } } } }/* EFUSE_Write1Byte */ /* 11/16/2008 MH Read one byte from real Efuse. */ u8 efuse_OneByteRead( IN PADAPTER pAdapter, IN u16 addr, IN u8 *data, IN BOOLEAN bPseudoTest) { u32 tmpidx = 0; u8 bResult; u8 readbyte; //DBG_871X("===> EFUSE_OneByteRead(), addr = %x\n", addr); //DBG_871X("===> EFUSE_OneByteRead() start, 0x34 = 0x%X\n", rtw_read32(pAdapter, EFUSE_TEST)); if(bPseudoTest) { bResult = Efuse_Read1ByteFromFakeContent(pAdapter, addr, data); return bResult; } if( IS_HARDWARE_TYPE_8723B(pAdapter) || (IS_HARDWARE_TYPE_8192E(pAdapter) && IS_VENDOR_8192E_B_CUT(pAdapter))) { // <20130121, Kordan> For SMIC EFUSE specificatoin. //0x34[11]: SW force PGMEN input of efuse to high. (for the bank selected by 0x34[9:8]) //PHY_SetMacReg(pAdapter, 0x34, BIT11, 0); rtw_write16(pAdapter, 0x34, rtw_read16(pAdapter,0x34)& (~BIT11) ); } // -----------------e-fuse reg ctrl --------------------------------- //address rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr&0xff)); rtw_write8(pAdapter, EFUSE_CTRL+2, ((u8)((addr>>8) &0x03) ) | (rtw_read8(pAdapter, EFUSE_CTRL+2)&0xFC )); //rtw_write8(pAdapter, EFUSE_CTRL+3, 0x72);//read cmd //Write bit 32 0 readbyte = rtw_read8(pAdapter, EFUSE_CTRL+3); rtw_write8(pAdapter, EFUSE_CTRL+3, (readbyte & 0x7f)); while(!(0x80 &rtw_read8(pAdapter, EFUSE_CTRL+3))&&(tmpidx<1000)) { rtw_mdelay_os(1); tmpidx++; } if(tmpidx<100) { *data=rtw_read8(pAdapter, EFUSE_CTRL); bResult = _TRUE; } else { *data = 0xff; bResult = _FALSE; DBG_871X("%s: [ERROR] addr=0x%x bResult=%d time out 1s !!!\n", __FUNCTION__, addr, bResult); DBG_871X("%s: [ERROR] EFUSE_CTRL =0x%08x !!!\n", __FUNCTION__, rtw_read32(pAdapter, EFUSE_CTRL)); } return bResult; } /* 11/16/2008 MH Write one byte to reald Efuse. */ u8 efuse_OneByteWrite( IN PADAPTER pAdapter, IN u16 addr, IN u8 data, IN BOOLEAN bPseudoTest) { u8 tmpidx = 0; u8 bResult=_FALSE; u32 efuseValue = 0; //DBG_871X("===> EFUSE_OneByteWrite(), addr = %x data=%x\n", addr, data); //DBG_871X("===> EFUSE_OneByteWrite() start, 0x34 = 0x%X\n", rtw_read32(pAdapter, EFUSE_TEST)); if(bPseudoTest) { bResult = Efuse_Write1ByteToFakeContent(pAdapter, addr, data); return bResult; } // -----------------e-fuse reg ctrl --------------------------------- //address efuseValue = rtw_read32(pAdapter, EFUSE_CTRL); efuseValue |= (BIT21|BIT31); efuseValue &= ~(0x3FFFF); efuseValue |= ((addr<<8 | data) & 0x3FFFF); // <20130227, Kordan> 8192E MP chip A-cut had better not set 0x34[11] until B-Cut. if (IS_HARDWARE_TYPE_8723B(pAdapter)||(IS_HARDWARE_TYPE_8192E(pAdapter) && IS_VENDOR_8192E_B_CUT(pAdapter))) { // <20130121, Kordan> For SMIC EFUSE specificatoin. //0x34[11]: SW force PGMEN input of efuse to high. (for the bank selected by 0x34[9:8]) //PHY_SetMacReg(pAdapter, 0x34, BIT11, 1); rtw_write16(pAdapter, 0x34, rtw_read16(pAdapter,0x34)| (BIT11) ); rtw_write32(pAdapter, EFUSE_CTRL, 0x90600000|((addr<<8 | data)) ); } else { rtw_write32(pAdapter, EFUSE_CTRL, efuseValue); } while((0x80 & rtw_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx<100) ){ rtw_mdelay_os(1); tmpidx++; } if(tmpidx<100) { bResult = _TRUE; } else { bResult = _FALSE; DBG_871X("%s: [ERROR] addr=0x%x ,efuseValue=0x%x ,bResult=%d time out 1s !!! \n", __FUNCTION__, addr, efuseValue, bResult); DBG_871X("%s: [ERROR] EFUSE_CTRL =0x%08x !!!\n", __FUNCTION__, rtw_read32(pAdapter, EFUSE_CTRL)); } // disable Efuse program enable if (IS_HARDWARE_TYPE_8723B(pAdapter)) { PHY_SetMacReg(pAdapter, EFUSE_TEST, BIT(11), 0); } return bResult; } int Efuse_PgPacketRead( IN PADAPTER pAdapter, IN u8 offset, IN u8 *data, IN BOOLEAN bPseudoTest) { int ret=0; ret = pAdapter->HalFunc.Efuse_PgPacketRead(pAdapter, offset, data, bPseudoTest); return ret; } int Efuse_PgPacketWrite(IN PADAPTER pAdapter, IN u8 offset, IN u8 word_en, IN u8 *data, IN BOOLEAN bPseudoTest) { int ret; ret = pAdapter->HalFunc.Efuse_PgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest); return ret; } int Efuse_PgPacketWrite_BT(IN PADAPTER pAdapter, IN u8 offset, IN u8 word_en, IN u8 *data, IN BOOLEAN bPseudoTest) { int ret; ret = pAdapter->HalFunc.Efuse_PgPacketWrite_BT(pAdapter, offset, word_en, data, bPseudoTest); return ret; } /*----------------------------------------------------------------------------- * Function: efuse_WordEnableDataRead * * Overview: Read allowed word in current efuse section data. * * Input: NONE * * Output: NONE * * Return: NONE * * Revised History: * When Who Remark * 11/16/2008 MHC Create Version 0. * 11/21/2008 MHC Fix Write bug when we only enable late word. * *---------------------------------------------------------------------------*/ void efuse_WordEnableDataRead(IN u8 word_en, IN u8 *sourdata, IN u8 *targetdata) { if (!(word_en&BIT(0))) { targetdata[0] = sourdata[0]; targetdata[1] = sourdata[1]; } if (!(word_en&BIT(1))) { targetdata[2] = sourdata[2]; targetdata[3] = sourdata[3]; } if (!(word_en&BIT(2))) { targetdata[4] = sourdata[4]; targetdata[5] = sourdata[5]; } if (!(word_en&BIT(3))) { targetdata[6] = sourdata[6]; targetdata[7] = sourdata[7]; } } u8 Efuse_WordEnableDataWrite( IN PADAPTER pAdapter, IN u16 efuse_addr, IN u8 word_en, IN u8 *data, IN BOOLEAN bPseudoTest) { u8 ret=0; ret = pAdapter->HalFunc.Efuse_WordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest); return ret; } static u8 efuse_read8(PADAPTER padapter, u16 address, u8 *value) { return efuse_OneByteRead(padapter,address, value, _FALSE); } static u8 efuse_write8(PADAPTER padapter, u16 address, u8 *value) { return efuse_OneByteWrite(padapter,address, *value, _FALSE); } /* * read/wirte raw efuse data */ u8 rtw_efuse_access(PADAPTER padapter, u8 bWrite, u16 start_addr, u16 cnts, u8 *data) { int i = 0; u16 real_content_len = 0, max_available_size = 0; u8 res = _FAIL ; u8 (*rw8)(PADAPTER, u16, u8*); EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&real_content_len, _FALSE); EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); if (start_addr > real_content_len) return _FAIL; if (_TRUE == bWrite) { if ((start_addr + cnts) > max_available_size) return _FAIL; rw8 = &efuse_write8; } else rw8 = &efuse_read8; Efuse_PowerSwitch(padapter, bWrite, _TRUE); // e-fuse one byte read / write for (i = 0; i < cnts; i++) { if (start_addr >= real_content_len) { res = _FAIL; break; } res = rw8(padapter, start_addr++, data++); if (_FAIL == res) break; } Efuse_PowerSwitch(padapter, bWrite, _FALSE); return res; } //------------------------------------------------------------------------------ u16 efuse_GetMaxSize(PADAPTER padapter) { u16 max_size; EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI , TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_size, _FALSE); return max_size; } //------------------------------------------------------------------------------ u8 efuse_GetCurrentSize(PADAPTER padapter, u16 *size) { Efuse_PowerSwitch(padapter, _FALSE, _TRUE); *size = Efuse_GetCurrentSize(padapter, EFUSE_WIFI, _FALSE); Efuse_PowerSwitch(padapter, _FALSE, _FALSE); return _SUCCESS; } //------------------------------------------------------------------------------ u8 rtw_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) { u16 mapLen=0; EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE); if ((addr + cnts) > mapLen) return _FAIL; Efuse_PowerSwitch(padapter, _FALSE, _TRUE); efuse_ReadEFuse(padapter, EFUSE_WIFI, addr, cnts, data, _FALSE); Efuse_PowerSwitch(padapter, _FALSE, _FALSE); return _SUCCESS; } u8 rtw_BT_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) { u16 mapLen=0; EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE); if ((addr + cnts) > mapLen) return _FAIL; Efuse_PowerSwitch(padapter, _FALSE, _TRUE); efuse_ReadEFuse(padapter, EFUSE_BT, addr, cnts, data, _FALSE); Efuse_PowerSwitch(padapter, _FALSE, _FALSE); return _SUCCESS; } //------------------------------------------------------------------------------ u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) { #define RT_ASSERT_RET(expr) \ if(!(expr)) { \ printk( "Assertion failed! %s at ......\n", #expr); \ printk( " ......%s,%s,line=%d\n",__FILE__,__FUNCTION__,__LINE__); \ return _FAIL; \ } u8 offset, word_en; u8 *map; u8 newdata[PGPKT_DATA_SIZE]; s32 i, j, idx; u8 ret = _SUCCESS; u16 mapLen=0; EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE); if ((addr + cnts) > mapLen) return _FAIL; RT_ASSERT_RET(PGPKT_DATA_SIZE == 8); // have to be 8 byte alignment RT_ASSERT_RET((mapLen & 0x7) == 0); // have to be PGPKT_DATA_SIZE alignment for memcpy map = rtw_zmalloc(mapLen); if(map == NULL){ return _FAIL; } _rtw_memset(map, 0xFF, mapLen); ret = rtw_efuse_map_read(padapter, 0, mapLen, map); if (ret == _FAIL) goto exit; Efuse_PowerSwitch(padapter, _TRUE, _TRUE); idx = 0; offset = (addr >> 3); while (idx < cnts) { word_en = 0xF; j = (addr + idx) & 0x7; _rtw_memcpy(newdata, &map[offset << 3], PGPKT_DATA_SIZE); for (i = j; i> 1); newdata[i] = data[idx]; #ifdef CONFIG_RTL8723B if( addr + idx == 0x8) { if (IS_C_CUT(pHalData->VersionID) || IS_B_CUT(pHalData->VersionID)) { if(pEEPROM->adjuseVoltageVal == 6) { newdata[i] = map[addr + idx]; DBG_8192C(" %s ,\n adjuseVoltageVal = %d ,newdata[%d] = %x \n",__func__,pEEPROM->adjuseVoltageVal,i,newdata[i]); } } } #endif } } if (word_en != 0xF) { ret = Efuse_PgPacketWrite(padapter, offset, word_en, newdata, _FALSE); DBG_871X("offset=%x \n",offset); DBG_871X("word_en=%x \n",word_en); for(i=0;i mapLen) return _FAIL; RT_ASSERT_RET(PGPKT_DATA_SIZE == 8); // have to be 8 byte alignment RT_ASSERT_RET((mapLen & 0x7) == 0); // have to be PGPKT_DATA_SIZE alignment for memcpy map = rtw_zmalloc(mapLen); if(map == NULL){ return _FAIL; } ret = rtw_BT_efuse_map_read(padapter, 0, mapLen, map); if (ret == _FAIL) goto exit; DBG_871X("OFFSET\tVALUE(hex)\n"); for (i=0; i<1024; i+=16) // set 512 because the iwpriv's extra size have limit 0x7FF { DBG_871X("0x%03x\t", i); for (j=0; j<8; j++) { DBG_871X("%02X ", map[i+j]); } DBG_871X("\t"); for (; j<16; j++) { DBG_871X("%02X ", map[i+j]); } DBG_871X("\n"); } DBG_871X("\n"); Efuse_PowerSwitch(padapter, _TRUE, _TRUE); idx = 0; offset = (addr >> 3); while (idx < cnts) { word_en = 0xF; j = (addr + idx) & 0x7; _rtw_memcpy(newdata, &map[offset << 3], PGPKT_DATA_SIZE); for (i = j; i> 1); newdata[i] = data[idx]; } } if (word_en != 0xF) { DBG_871X("offset=%x \n",offset); DBG_871X("word_en=%x \n",word_en); DBG_871X("%s: data=", __FUNCTION__); for(i=0;iefuse_eeprom_data[Offset]; } // EFUSE_ShadowRead1Byte //---------------Read Two Bytes static VOID efuse_ShadowRead2Byte( IN PADAPTER pAdapter, IN u16 Offset, IN OUT u16 *Value) { EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); *Value = pEEPROM->efuse_eeprom_data[Offset]; *Value |= pEEPROM->efuse_eeprom_data[Offset+1]<<8; } // EFUSE_ShadowRead2Byte //---------------Read Four Bytes static VOID efuse_ShadowRead4Byte( IN PADAPTER pAdapter, IN u16 Offset, IN OUT u32 *Value) { EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); *Value = pEEPROM->efuse_eeprom_data[Offset]; *Value |= pEEPROM->efuse_eeprom_data[Offset+1]<<8; *Value |= pEEPROM->efuse_eeprom_data[Offset+2]<<16; *Value |= pEEPROM->efuse_eeprom_data[Offset+3]<<24; } // efuse_ShadowRead4Byte /*----------------------------------------------------------------------------- * Function: efuse_ShadowWrite1Byte * efuse_ShadowWrite2Byte * efuse_ShadowWrite4Byte * * Overview: Write efuse modify map by one/two/four byte. * * Input: NONE * * Output: NONE * * Return: NONE * * Revised History: * When Who Remark * 11/12/2008 MHC Create Version 0. * *---------------------------------------------------------------------------*/ #ifdef PLATFORM static VOID efuse_ShadowWrite1Byte( IN PADAPTER pAdapter, IN u16 Offset, IN u8 Value); #endif //PLATFORM static VOID efuse_ShadowWrite1Byte( IN PADAPTER pAdapter, IN u16 Offset, IN u8 Value) { EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); pEEPROM->efuse_eeprom_data[Offset] = Value; } // efuse_ShadowWrite1Byte //---------------Write Two Bytes static VOID efuse_ShadowWrite2Byte( IN PADAPTER pAdapter, IN u16 Offset, IN u16 Value) { EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); pEEPROM->efuse_eeprom_data[Offset] = Value&0x00FF; pEEPROM->efuse_eeprom_data[Offset+1] = Value>>8; } // efuse_ShadowWrite1Byte //---------------Write Four Bytes static VOID efuse_ShadowWrite4Byte( IN PADAPTER pAdapter, IN u16 Offset, IN u32 Value) { EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); pEEPROM->efuse_eeprom_data[Offset] = (u8)(Value&0x000000FF); pEEPROM->efuse_eeprom_data[Offset+1] = (u8)((Value>>8)&0x0000FF); pEEPROM->efuse_eeprom_data[Offset+2] = (u8)((Value>>16)&0x00FF); pEEPROM->efuse_eeprom_data[Offset+3] = (u8)((Value>>24)&0xFF); } // efuse_ShadowWrite1Byte /*----------------------------------------------------------------------------- * Function: EFUSE_ShadowMapUpdate * * Overview: Transfer current EFUSE content to shadow init and modify map. * * Input: NONE * * Output: NONE * * Return: NONE * * Revised History: * When Who Remark * 11/13/2008 MHC Create Version 0. * *---------------------------------------------------------------------------*/ void EFUSE_ShadowMapUpdate( IN PADAPTER pAdapter, IN u8 efuseType, IN BOOLEAN bPseudoTest) { EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); u16 mapLen=0; EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, bPseudoTest); if (pEEPROM->bautoload_fail_flag == _TRUE) { _rtw_memset(pEEPROM->efuse_eeprom_data, 0xFF, mapLen); } else { #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE if(_SUCCESS != retriveAdaptorInfoFile(pAdapter->registrypriv.adaptor_info_caching_file_path, pEEPROM)) { #endif Efuse_ReadAllMap(pAdapter, efuseType, pEEPROM->efuse_eeprom_data, bPseudoTest); #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE storeAdaptorInfoFile(pAdapter->registrypriv.adaptor_info_caching_file_path, pEEPROM); } #endif } //PlatformMoveMemory((PVOID)&pHalData->EfuseMap[EFUSE_MODIFY_MAP][0], //(PVOID)&pHalData->EfuseMap[EFUSE_INIT_MAP][0], mapLen); }// EFUSE_ShadowMapUpdate /*----------------------------------------------------------------------------- * Function: EFUSE_ShadowRead * * Overview: Read from efuse init map !!!!! * * Input: NONE * * Output: NONE * * Return: NONE * * Revised History: * When Who Remark * 11/12/2008 MHC Create Version 0. * *---------------------------------------------------------------------------*/ void EFUSE_ShadowRead( IN PADAPTER pAdapter, IN u8 Type, IN u16 Offset, IN OUT u32 *Value ) { if (Type == 1) efuse_ShadowRead1Byte(pAdapter, Offset, (u8 *)Value); else if (Type == 2) efuse_ShadowRead2Byte(pAdapter, Offset, (u16 *)Value); else if (Type == 4) efuse_ShadowRead4Byte(pAdapter, Offset, (u32 *)Value); } // EFUSE_ShadowRead /*----------------------------------------------------------------------------- * Function: EFUSE_ShadowWrite * * Overview: Write efuse modify map for later update operation to use!!!!! * * Input: NONE * * Output: NONE * * Return: NONE * * Revised History: * When Who Remark * 11/12/2008 MHC Create Version 0. * *---------------------------------------------------------------------------*/ VOID EFUSE_ShadowWrite( IN PADAPTER pAdapter, IN u8 Type, IN u16 Offset, IN OUT u32 Value); VOID EFUSE_ShadowWrite( IN PADAPTER pAdapter, IN u8 Type, IN u16 Offset, IN OUT u32 Value) { #if (MP_DRIVER == 0) return; #endif if ( pAdapter->registrypriv.mp_mode == 0) return; if (Type == 1) efuse_ShadowWrite1Byte(pAdapter, Offset, (u8)Value); else if (Type == 2) efuse_ShadowWrite2Byte(pAdapter, Offset, (u16)Value); else if (Type == 4) efuse_ShadowWrite4Byte(pAdapter, Offset, (u32)Value); } // EFUSE_ShadowWrite VOID Efuse_InitSomeVar( IN PADAPTER pAdapter ); VOID Efuse_InitSomeVar( IN PADAPTER pAdapter ) { u8 i; _rtw_memset((PVOID)&fakeEfuseContent[0], 0xff, EFUSE_MAX_HW_SIZE); _rtw_memset((PVOID)&fakeEfuseInitMap[0], 0xff, EFUSE_MAX_MAP_LEN); _rtw_memset((PVOID)&fakeEfuseModifiedMap[0], 0xff, EFUSE_MAX_MAP_LEN); for(i=0; i int isAdaptorInfoFileValid(void) { return _TRUE; } int storeAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv) { int ret =_SUCCESS; if(path && eeprom_priv) { ret = rtw_store_to_file(path, eeprom_priv->efuse_eeprom_data, EEPROM_MAX_SIZE_512); if(ret == EEPROM_MAX_SIZE) ret = _SUCCESS; else ret = _FAIL; } else { DBG_871X("%s NULL pointer\n",__FUNCTION__); ret = _FAIL; } return ret; } int retriveAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv) { int ret = _SUCCESS; mm_segment_t oldfs; struct file *fp; if(path && eeprom_priv) { ret = rtw_retrive_from_file(path, eeprom_priv->efuse_eeprom_data, EEPROM_MAX_SIZE); if(ret == EEPROM_MAX_SIZE) ret = _SUCCESS; else ret = _FAIL; #if 0 if(isAdaptorInfoFileValid()) { return 0; } else { return _FAIL; } #endif } else { DBG_871X("%s NULL pointer\n",__FUNCTION__); ret = _FAIL; } return ret; } #endif //CONFIG_ADAPTOR_INFO_CACHING_FILE #endif //PLATFORM_LINUX #ifdef CONFIG_EFUSE_CONFIG_FILE void Rtw_Hal_ReadMACAddrFromFile(PADAPTER padapter) { u32 i; struct file *fp; mm_segment_t fs; u8 source_addr[18]; loff_t pos = 0; u32 curtime = rtw_get_current_time(); EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); u8 *head, *end; u8 null_mac_addr[ETH_ALEN] = {0, 0, 0,0, 0, 0}; u8 multi_mac_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; _rtw_memset(source_addr, 0, 18); _rtw_memset(pEEPROM->mac_addr, 0, ETH_ALEN); fp = filp_open("/data/wifimac.txt", O_RDWR, 0644); if (IS_ERR(fp)) { pEEPROM->bloadmac_fail_flag = _TRUE; DBG_871X("Error, wifi mac address file doesn't exist.\n"); } else { fs = get_fs(); set_fs(KERNEL_DS); DBG_871X("wifi mac address:\n"); vfs_read(fp, source_addr, 18, &pos); source_addr[17] = ':'; head = end = source_addr; for (i=0; imac_addr[i] = simple_strtoul(head, NULL, 16 ); if (end) { end++; head = end; } DBG_871X("%02x \n", pEEPROM->mac_addr[i]); } DBG_871X("\n"); set_fs(fs); pEEPROM->bloadmac_fail_flag = _FALSE; filp_close(fp, NULL); } if ( (_rtw_memcmp(pEEPROM->mac_addr, null_mac_addr, ETH_ALEN)) || (_rtw_memcmp(pEEPROM->mac_addr, multi_mac_addr, ETH_ALEN)) ) { pEEPROM->mac_addr[0] = 0x00; pEEPROM->mac_addr[1] = 0xe0; pEEPROM->mac_addr[2] = 0x4c; pEEPROM->mac_addr[3] = (u8)(curtime & 0xff) ; pEEPROM->mac_addr[4] = (u8)((curtime>>8) & 0xff) ; pEEPROM->mac_addr[5] = (u8)((curtime>>16) & 0xff) ; } DBG_871X("Hal_ReadMACAddrFromFile: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x !!!\n", pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], pEEPROM->mac_addr[4], pEEPROM->mac_addr[5]); } u32 Rtw_Hal_readPGDataFromConfigFile(PADAPTER padapter) { u32 i; struct file *fp; mm_segment_t fs; u8 temp[3]; loff_t pos = 0; EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); u8 *PROMContent = pEEPROM->efuse_eeprom_data; temp[2] = 0; // add end of string '\0' fp = filp_open("/system/etc/wifi/wifi_efuse.map", O_RDWR, 0644); if (IS_ERR(fp)) { pEEPROM->bloadfile_fail_flag = _TRUE; DBG_871X("Error, Efuse configure file doesn't exist.\n"); return _FAIL; } fs = get_fs(); set_fs(KERNEL_DS); DBG_871X("Efuse configure file:\n"); for (i=0; i< EFUSE_MAP_SIZE ; i++) { vfs_read(fp, temp, 2, &pos); PROMContent[i] = simple_strtoul(temp, NULL, 16 ); pos += 1; // Filter the space character DBG_871X("%02X \n", PROMContent[i]); } DBG_871X("\n"); set_fs(fs); filp_close(fp, NULL); pEEPROM->bloadfile_fail_flag = _FALSE; return _SUCCESS; } #endif //#CONFIG_EFUSE_CONFIG_FILE rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_ap.c000066400000000000000000002772611261122257400201060ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_AP_C_ #include #ifdef CONFIG_AP_MODE extern unsigned char RTW_WPA_OUI[]; extern unsigned char WMM_OUI[]; extern unsigned char WPS_OUI[]; extern unsigned char P2P_OUI[]; extern unsigned char WFD_OUI[]; void init_mlme_ap_info(_adapter *padapter) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct sta_priv *pstapriv = &padapter->stapriv; struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; _rtw_spinlock_init(&pmlmepriv->bcn_update_lock); //for ACL _rtw_init_queue(&pacl_list->acl_node_q); //pmlmeext->bstart_bss = _FALSE; start_ap_mode(padapter); } void free_mlme_ap_info(_adapter *padapter) { _irqL irqL; struct sta_info *psta=NULL; struct sta_priv *pstapriv = &padapter->stapriv; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); //stop_ap_mode(padapter); pmlmepriv->update_bcn = _FALSE; pmlmeext->bstart_bss = _FALSE; rtw_sta_flush(padapter); pmlmeinfo->state = _HW_STATE_NOLINK_; //free_assoc_sta_resources rtw_free_all_stainfo(padapter); //free bc/mc sta_info psta = rtw_get_bcmc_stainfo(padapter); //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); rtw_free_stainfo(padapter, psta); //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); _rtw_spinlock_free(&pmlmepriv->bcn_update_lock); } static void update_BCNTIM(_adapter *padapter) { struct sta_priv *pstapriv = &padapter->stapriv; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); unsigned char *pie = pnetwork_mlmeext->IEs; //DBG_871X("%s\n", __FUNCTION__); //update TIM IE //if(pstapriv->tim_bitmap) if(_TRUE) { u8 *p, *dst_ie, *premainder_ie=NULL, *pbackup_remainder_ie=NULL; u16 tim_bitmap_le; uint offset, tmp_len, tim_ielen, tim_ie_offset, remainder_ielen; tim_bitmap_le = cpu_to_le16(pstapriv->tim_bitmap); p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, _TIM_IE_, &tim_ielen, pnetwork_mlmeext->IELength - _FIXED_IE_LENGTH_); if (p != NULL && tim_ielen>0) { tim_ielen += 2; premainder_ie = p+tim_ielen; tim_ie_offset = (sint)(p -pie); remainder_ielen = pnetwork_mlmeext->IELength - tim_ie_offset - tim_ielen; //append TIM IE from dst_ie offset dst_ie = p; } else { tim_ielen = 0; //calucate head_len offset = _FIXED_IE_LENGTH_; /* get ssid_ie len */ p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SSID_IE_, &tmp_len, (pnetwork_mlmeext->IELength - _BEACON_IE_OFFSET_)); if (p != NULL) offset += tmp_len+2; // get supported rates len p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &tmp_len, (pnetwork_mlmeext->IELength - _BEACON_IE_OFFSET_)); if (p != NULL) { offset += tmp_len+2; } //DS Parameter Set IE, len=3 offset += 3; premainder_ie = pie + offset; remainder_ielen = pnetwork_mlmeext->IELength - offset - tim_ielen; //append TIM IE from offset dst_ie = pie + offset; } if(remainder_ielen>0) { pbackup_remainder_ie = rtw_malloc(remainder_ielen); if(pbackup_remainder_ie && premainder_ie) _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); } *dst_ie++=_TIM_IE_; if((pstapriv->tim_bitmap&0xff00) && (pstapriv->tim_bitmap&0x00fe)) tim_ielen = 5; else tim_ielen = 4; *dst_ie++= tim_ielen; *dst_ie++=0;//DTIM count *dst_ie++=1;//DTIM peroid if(pstapriv->tim_bitmap&BIT(0))//for bc/mc frames *dst_ie++ = BIT(0);//bitmap ctrl else *dst_ie++ = 0; if(tim_ielen==4) { u8 pvb=0; if(pstapriv->tim_bitmap&0x00fe) pvb = (u8)tim_bitmap_le; else if(pstapriv->tim_bitmap&0xff00) pvb = (u8)(tim_bitmap_le>>8); else pvb = (u8)tim_bitmap_le; *dst_ie++ = pvb; } else if(tim_ielen==5) { _rtw_memcpy(dst_ie, &tim_bitmap_le, 2); dst_ie+=2; } //copy remainder IE if(pbackup_remainder_ie) { _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); rtw_mfree(pbackup_remainder_ie, remainder_ielen); } offset = (uint)(dst_ie - pie); pnetwork_mlmeext->IELength = offset + remainder_ielen; } } void rtw_add_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index, u8 *data, u8 len) { PNDIS_802_11_VARIABLE_IEs pIE; u8 bmatch = _FALSE; u8 *pie = pnetwork->IEs; u8 *p=NULL, *dst_ie=NULL, *premainder_ie=NULL, *pbackup_remainder_ie=NULL; u32 i, offset, ielen, ie_offset, remainder_ielen = 0; for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pnetwork->IELength;) { pIE = (PNDIS_802_11_VARIABLE_IEs)(pnetwork->IEs + i); if (pIE->ElementID > index) { break; } else if(pIE->ElementID == index) // already exist the same IE { p = (u8 *)pIE; ielen = pIE->Length; bmatch = _TRUE; break; } p = (u8 *)pIE; ielen = pIE->Length; i += (pIE->Length + 2); } if (p != NULL && ielen>0) { ielen += 2; premainder_ie = p+ielen; ie_offset = (sint)(p -pie); remainder_ielen = pnetwork->IELength - ie_offset - ielen; if(bmatch) dst_ie = p; else dst_ie = (p+ielen); } if(dst_ie == NULL) return; if(remainder_ielen>0) { pbackup_remainder_ie = rtw_malloc(remainder_ielen); if(pbackup_remainder_ie && premainder_ie) _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); } *dst_ie++=index; *dst_ie++=len; _rtw_memcpy(dst_ie, data, len); dst_ie+=len; //copy remainder IE if(pbackup_remainder_ie) { _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); rtw_mfree(pbackup_remainder_ie, remainder_ielen); } offset = (uint)(dst_ie - pie); pnetwork->IELength = offset + remainder_ielen; } void rtw_remove_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index) { u8 *p, *dst_ie=NULL, *premainder_ie=NULL, *pbackup_remainder_ie=NULL; uint offset, ielen, ie_offset, remainder_ielen = 0; u8 *pie = pnetwork->IEs; p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, index, &ielen, pnetwork->IELength - _FIXED_IE_LENGTH_); if (p != NULL && ielen>0) { ielen += 2; premainder_ie = p+ielen; ie_offset = (sint)(p -pie); remainder_ielen = pnetwork->IELength - ie_offset - ielen; dst_ie = p; } else { return; } if(remainder_ielen>0) { pbackup_remainder_ie = rtw_malloc(remainder_ielen); if(pbackup_remainder_ie && premainder_ie) _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); } //copy remainder IE if(pbackup_remainder_ie) { _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); rtw_mfree(pbackup_remainder_ie, remainder_ielen); } offset = (uint)(dst_ie - pie); pnetwork->IELength = offset + remainder_ielen; } u8 chk_sta_is_alive(struct sta_info *psta); u8 chk_sta_is_alive(struct sta_info *psta) { u8 ret = _FALSE; #ifdef DBG_EXPIRATION_CHK DBG_871X("sta:"MAC_FMT", rssi:%d, rx:"STA_PKTS_FMT", expire_to:%u, %s%ssq_len:%u\n" , MAC_ARG(psta->hwaddr) , psta->rssi_stat.UndecoratedSmoothedPWDB //, STA_RX_PKTS_ARG(psta) , STA_RX_PKTS_DIFF_ARG(psta) , psta->expire_to , psta->state&WIFI_SLEEP_STATE?"PS, ":"" , psta->state&WIFI_STA_ALIVE_CHK_STATE?"SAC, ":"" , psta->sleepq_len ); #endif //if(sta_last_rx_pkts(psta) == sta_rx_pkts(psta)) if((psta->sta_stats.last_rx_data_pkts + psta->sta_stats.last_rx_ctrl_pkts) == (psta->sta_stats.rx_data_pkts + psta->sta_stats.rx_ctrl_pkts)) { #if 0 if(psta->state&WIFI_SLEEP_STATE) ret = _TRUE; #endif } else { ret = _TRUE; } sta_update_last_rx_pkts(psta); return ret; } void expire_timeout_chk(_adapter *padapter) { _irqL irqL; _list *phead, *plist; u8 updated = _FALSE; struct sta_info *psta=NULL; struct sta_priv *pstapriv = &padapter->stapriv; u8 chk_alive_num = 0; char chk_alive_list[NUM_STA]; int i; _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); phead = &pstapriv->auth_list; plist = get_next(phead); //check auth_queue #ifdef DBG_EXPIRATION_CHK if (rtw_end_of_queue_search(phead, plist) == _FALSE) { DBG_871X(FUNC_NDEV_FMT" auth_list, cnt:%u\n" , FUNC_NDEV_ARG(padapter->pnetdev), pstapriv->auth_list_cnt); } #endif while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info, auth_list); plist = get_next(plist); #ifdef CONFIG_ATMEL_RC_PATCH if (_TRUE == _rtw_memcmp((void *)(pstapriv->atmel_rc_pattern), (void *)(psta->hwaddr), ETH_ALEN)) continue; if (psta->flag_atmel_rc) continue; #endif if(psta->expire_to>0) { psta->expire_to--; if (psta->expire_to == 0) { rtw_list_delete(&psta->auth_list); pstapriv->auth_list_cnt--; DBG_871X("auth expire %02X%02X%02X%02X%02X%02X\n", psta->hwaddr[0],psta->hwaddr[1],psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5]); _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); rtw_free_stainfo(padapter, psta); //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); } } } _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); psta = NULL; _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); phead = &pstapriv->asoc_list; plist = get_next(phead); //check asoc_queue #ifdef DBG_EXPIRATION_CHK if (rtw_end_of_queue_search(phead, plist) == _FALSE) { DBG_871X(FUNC_NDEV_FMT" asoc_list, cnt:%u\n" , FUNC_NDEV_ARG(padapter->pnetdev), pstapriv->asoc_list_cnt); } #endif while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); plist = get_next(plist); #ifdef CONFIG_ATMEL_RC_PATCH DBG_871X("%s:%d psta=%p, %02x,%02x||%02x,%02x \n\n", __func__, __LINE__, psta,pstapriv->atmel_rc_pattern[0], pstapriv->atmel_rc_pattern[5], psta->hwaddr[0], psta->hwaddr[5]); if (_TRUE == _rtw_memcmp((void *)pstapriv->atmel_rc_pattern, (void *)(psta->hwaddr), ETH_ALEN)) continue; if (psta->flag_atmel_rc) continue; DBG_871X("%s: debug line:%d \n", __func__, __LINE__); #endif #ifdef CONFIG_AUTO_AP_MODE if(psta->isrc) continue; #endif if (chk_sta_is_alive(psta) || !psta->expire_to) { psta->expire_to = pstapriv->expire_to; psta->keep_alive_trycnt = 0; #ifdef CONFIG_TX_MCAST2UNI psta->under_exist_checking = 0; #endif // CONFIG_TX_MCAST2UNI } else { psta->expire_to--; } #ifndef CONFIG_ACTIVE_KEEP_ALIVE_CHECK #ifdef CONFIG_80211N_HT #ifdef CONFIG_TX_MCAST2UNI if ( (psta->flags & WLAN_STA_HT) && (psta->htpriv.agg_enable_bitmap || psta->under_exist_checking) ) { // check sta by delba(addba) for 11n STA // ToDo: use CCX report to check for all STAs //DBG_871X("asoc check by DELBA/ADDBA! (pstapriv->expire_to=%d s)(psta->expire_to=%d s), [%02x, %d]\n", pstapriv->expire_to*2, psta->expire_to*2, psta->htpriv.agg_enable_bitmap, psta->under_exist_checking); if ( psta->expire_to <= (pstapriv->expire_to - 50 ) ) { DBG_871X("asoc expire by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to-psta->expire_to)*2); psta->under_exist_checking = 0; psta->expire_to = 0; } else if ( psta->expire_to <= (pstapriv->expire_to - 3) && (psta->under_exist_checking==0)) { DBG_871X("asoc check by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to-psta->expire_to)*2); psta->under_exist_checking = 1; //tear down TX AMPDU send_delba(padapter, 1, psta->hwaddr);// // originator psta->htpriv.agg_enable_bitmap = 0x0;//reset psta->htpriv.candidate_tid_bitmap = 0x0;//reset } } #endif //CONFIG_TX_MCAST2UNI #endif //CONFIG_80211N_HT #endif //CONFIG_ACTIVE_KEEP_ALIVE_CHECK if (psta->expire_to <= 0) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; if (padapter->registrypriv.wifi_spec == 1) { psta->expire_to = pstapriv->expire_to; continue; } #ifndef CONFIG_ACTIVE_KEEP_ALIVE_CHECK #ifdef CONFIG_80211N_HT #define KEEP_ALIVE_TRYCNT (3) if(psta->keep_alive_trycnt > 0 && psta->keep_alive_trycnt <= KEEP_ALIVE_TRYCNT) { if(psta->state & WIFI_STA_ALIVE_CHK_STATE) psta->state ^= WIFI_STA_ALIVE_CHK_STATE; else psta->keep_alive_trycnt = 0; } else if((psta->keep_alive_trycnt > KEEP_ALIVE_TRYCNT) && !(psta->state & WIFI_STA_ALIVE_CHK_STATE)) { psta->keep_alive_trycnt = 0; } if((psta->htpriv.ht_option==_TRUE) && (psta->htpriv.ampdu_enable==_TRUE)) { uint priority = 1; //test using BK u8 issued=0; //issued = (psta->htpriv.agg_enable_bitmap>>priority)&0x1; issued |= (psta->htpriv.candidate_tid_bitmap>>priority)&0x1; if(0==issued) { if (!(psta->state & WIFI_STA_ALIVE_CHK_STATE)) { psta->htpriv.candidate_tid_bitmap |= BIT((u8)priority); if (psta->state & WIFI_SLEEP_STATE) psta->expire_to = 2; // 2x2=4 sec else psta->expire_to = 1; // 2 sec psta->state |= WIFI_STA_ALIVE_CHK_STATE; //add_ba_hdl(padapter, (u8*)paddbareq_parm); DBG_871X("issue addba_req to check if sta alive, keep_alive_trycnt=%d\n", psta->keep_alive_trycnt); issue_action_BA(padapter, psta->hwaddr, RTW_WLAN_ACTION_ADDBA_REQ, (u16)priority); _set_timer(&psta->addba_retry_timer, ADDBA_TO); psta->keep_alive_trycnt++; continue; } } } if(psta->keep_alive_trycnt > 0 && psta->state & WIFI_STA_ALIVE_CHK_STATE) { psta->keep_alive_trycnt = 0; psta->state ^= WIFI_STA_ALIVE_CHK_STATE; DBG_871X("change to another methods to check alive if staion is at ps mode\n"); } #endif //CONFIG_80211N_HT #endif //CONFIG_ACTIVE_KEEP_ALIVE_CHECK if (psta->state & WIFI_SLEEP_STATE) { if (!(psta->state & WIFI_STA_ALIVE_CHK_STATE)) { //to check if alive by another methods if staion is at ps mode. psta->expire_to = pstapriv->expire_to; psta->state |= WIFI_STA_ALIVE_CHK_STATE; //DBG_871X("alive chk, sta:" MAC_FMT " is at ps mode!\n", MAC_ARG(psta->hwaddr)); //to update bcn with tim_bitmap for this station pstapriv->tim_bitmap |= BIT(psta->aid); update_beacon(padapter, _TIM_IE_, NULL, _TRUE); if(!pmlmeext->active_keep_alive_check) continue; } } #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK if (pmlmeext->active_keep_alive_check) { int stainfo_offset; stainfo_offset = rtw_stainfo_offset(pstapriv, psta); if (stainfo_offset_valid(stainfo_offset)) { chk_alive_list[chk_alive_num++] = stainfo_offset; } continue; } #endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ rtw_list_delete(&psta->asoc_list); pstapriv->asoc_list_cnt--; DBG_871X("asoc expire "MAC_FMT", state=0x%x\n", MAC_ARG(psta->hwaddr), psta->state); updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING); } else { /* TODO: Aging mechanism to digest frames in sleep_q to avoid running out of xmitframe */ if (psta->sleepq_len > (NR_XMITFRAME/pstapriv->asoc_list_cnt) && padapter->xmitpriv.free_xmitframe_cnt < ((NR_XMITFRAME/pstapriv->asoc_list_cnt)/2) ){ DBG_871X("%s sta:"MAC_FMT", sleepq_len:%u, free_xmitframe_cnt:%u, asoc_list_cnt:%u, clear sleep_q\n", __func__ , MAC_ARG(psta->hwaddr) , psta->sleepq_len, padapter->xmitpriv.free_xmitframe_cnt, pstapriv->asoc_list_cnt); wakeup_sta_to_xmit(padapter, psta); } } } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK if (chk_alive_num) { u8 backup_oper_channel=0; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; /* switch to correct channel of current network before issue keep-alive frames */ if (rtw_get_oper_ch(padapter) != pmlmeext->cur_channel) { backup_oper_channel = rtw_get_oper_ch(padapter); SelectChannel(padapter, pmlmeext->cur_channel); } /* issue null data to check sta alive*/ for (i = 0; i < chk_alive_num; i++) { int ret = _FAIL; psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); #ifdef CONFIG_ATMEL_RC_PATCH if (_TRUE == _rtw_memcmp( pstapriv->atmel_rc_pattern, psta->hwaddr, ETH_ALEN)) continue; if (psta->flag_atmel_rc) continue; #endif if(!(psta->state &_FW_LINKED)) continue; if (psta->state & WIFI_SLEEP_STATE) ret = issue_nulldata(padapter, psta->hwaddr, 0, 1, 50); else ret = issue_nulldata(padapter, psta->hwaddr, 0, 3, 50); psta->keep_alive_trycnt++; if (ret == _SUCCESS) { DBG_871X("asoc check, sta(" MAC_FMT ") is alive\n", MAC_ARG(psta->hwaddr)); psta->expire_to = pstapriv->expire_to; psta->keep_alive_trycnt = 0; continue; } else if (psta->keep_alive_trycnt <= 3) { DBG_871X("ack check for asoc expire, keep_alive_trycnt=%d\n", psta->keep_alive_trycnt); psta->expire_to = 1; continue; } psta->keep_alive_trycnt = 0; DBG_871X("asoc expire "MAC_FMT", state=0x%x\n", MAC_ARG(psta->hwaddr), psta->state); _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); if (rtw_is_list_empty(&psta->asoc_list)==_FALSE) { rtw_list_delete(&psta->asoc_list); pstapriv->asoc_list_cnt--; updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING); } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); } if (backup_oper_channel>0) /* back to the original operation channel */ SelectChannel(padapter, backup_oper_channel); } #endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ associated_clients_update(padapter, updated); } void add_RATid(_adapter *padapter, struct sta_info *psta, u8 rssi_level) { int i; u8 rf_type; unsigned char sta_band = 0, shortGIrate = _FALSE; unsigned int tx_ra_bitmap=0; struct ht_priv *psta_ht = NULL; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; #ifdef CONFIG_80211N_HT if(psta) psta_ht = &psta->htpriv; else return; #endif //CONFIG_80211N_HT if(!(psta->state & _FW_LINKED)) return; #if 0//gtest if(get_rf_mimo_mode(padapter) == RTL8712_RF_2T2R) { //is this a 2r STA? if((pstat->tx_ra_bitmap & 0x0ff00000) != 0 && !(priv->pshare->has_2r_sta & BIT(pstat->aid))) { priv->pshare->has_2r_sta |= BIT(pstat->aid); if(rtw_read16(padapter, 0x102501f6) != 0xffff) { rtw_write16(padapter, 0x102501f6, 0xffff); reset_1r_sta_RA(priv, 0xffff); Switch_1SS_Antenna(priv, 3); } } else// bg or 1R STA? { if((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) && pstat->ht_cap_len && priv->pshare->has_2r_sta == 0) { if(rtw_read16(padapter, 0x102501f6) != 0x7777) { // MCS7 SGI rtw_write16(padapter, 0x102501f6,0x7777); reset_1r_sta_RA(priv, 0x7777); Switch_1SS_Antenna(priv, 2); } } } } if ((pstat->rssi_level < 1) || (pstat->rssi_level > 3)) { if (pstat->rssi >= priv->pshare->rf_ft_var.raGoDownUpper) pstat->rssi_level = 1; else if ((pstat->rssi >= priv->pshare->rf_ft_var.raGoDown20MLower) || ((priv->pshare->is_40m_bw) && (pstat->ht_cap_len) && (pstat->rssi >= priv->pshare->rf_ft_var.raGoDown40MLower) && (pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_SUPPORT_CH_WDTH_)))) pstat->rssi_level = 2; else pstat->rssi_level = 3; } // rate adaptive by rssi if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) && pstat->ht_cap_len) { if ((get_rf_mimo_mode(priv) == MIMO_1T2R) || (get_rf_mimo_mode(priv) == MIMO_1T1R)) { switch (pstat->rssi_level) { case 1: pstat->tx_ra_bitmap &= 0x100f0000; break; case 2: pstat->tx_ra_bitmap &= 0x100ff000; break; case 3: if (priv->pshare->is_40m_bw) pstat->tx_ra_bitmap &= 0x100ff005; else pstat->tx_ra_bitmap &= 0x100ff001; break; } } else { switch (pstat->rssi_level) { case 1: pstat->tx_ra_bitmap &= 0x1f0f0000; break; case 2: pstat->tx_ra_bitmap &= 0x1f0ff000; break; case 3: if (priv->pshare->is_40m_bw) pstat->tx_ra_bitmap &= 0x000ff005; else pstat->tx_ra_bitmap &= 0x000ff001; break; } // Don't need to mask high rates due to new rate adaptive parameters //if (pstat->is_broadcom_sta) // use MCS12 as the highest rate vs. Broadcom sta // pstat->tx_ra_bitmap &= 0x81ffffff; // NIC driver will report not supporting MCS15 and MCS14 in asoc req //if (pstat->is_rtl8190_sta && !pstat->is_2t_mimo_sta) // pstat->tx_ra_bitmap &= 0x83ffffff; // if Realtek 1x2 sta, don't use MCS15 and MCS14 } } else if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) && isErpSta(pstat)) { switch (pstat->rssi_level) { case 1: pstat->tx_ra_bitmap &= 0x00000f00; break; case 2: pstat->tx_ra_bitmap &= 0x00000ff0; break; case 3: pstat->tx_ra_bitmap &= 0x00000ff5; break; } } else { pstat->tx_ra_bitmap &= 0x0000000d; } // disable tx short GI when station cannot rx MCS15(AP is 2T2R) // disable tx short GI when station cannot rx MCS7 (AP is 1T2R or 1T1R) // if there is only 1r STA and we are 2T2R, DO NOT mask SGI rate if ((!(pstat->tx_ra_bitmap & 0x8000000) && (priv->pshare->has_2r_sta > 0) && (get_rf_mimo_mode(padapter) == RTL8712_RF_2T2R)) || (!(pstat->tx_ra_bitmap & 0x80000) && (get_rf_mimo_mode(padapter) != RTL8712_RF_2T2R))) { pstat->tx_ra_bitmap &= ~BIT(28); } #endif rtw_hal_update_sta_rate_mask(padapter, psta); tx_ra_bitmap = psta->ra_mask; shortGIrate = query_ra_short_GI(psta); if ( pcur_network->Configuration.DSConfig > 14 ) { if (tx_ra_bitmap & 0xffff000) sta_band |= WIRELESS_11_5N ; if (tx_ra_bitmap & 0xff0) sta_band |= WIRELESS_11A; // 5G band #ifdef CONFIG_80211AC_VHT if (psta->vhtpriv.vht_option) { sta_band = WIRELESS_11_5AC; } #endif } else { if (tx_ra_bitmap & 0xffff000) sta_band |= WIRELESS_11_24N; if (tx_ra_bitmap & 0xff0) sta_band |= WIRELESS_11G; if (tx_ra_bitmap & 0x0f) sta_band |= WIRELESS_11B; } psta->wireless_mode = sta_band; psta->raid = rtw_hal_networktype_to_raid(padapter, psta); if (psta->aid < NUM_STA) { u8 arg[4] = {0}; arg[0] = psta->mac_id; arg[1] = psta->raid; arg[2] = shortGIrate; arg[3] = psta->init_rate; DBG_871X("%s=> mac_id:%d , raid:%d , shortGIrate=%d, bitmap=0x%x\n", __FUNCTION__ , psta->mac_id, psta->raid ,shortGIrate, tx_ra_bitmap); rtw_hal_add_ra_tid(padapter, tx_ra_bitmap, arg, rssi_level); } else { DBG_871X("station aid %d exceed the max number\n", psta->aid); } } void update_bmc_sta(_adapter *padapter) { _irqL irqL; unsigned char network_type; int supportRateNum = 0; unsigned int tx_ra_bitmap=0; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; struct sta_info *psta = rtw_get_bcmc_stainfo(padapter); if(psta) { psta->aid = 0;//default set to 0 pmlmeinfo->FW_sta_info[psta->mac_id].psta = psta; psta->qos_option = 0; #ifdef CONFIG_80211N_HT psta->htpriv.ht_option = _FALSE; #endif //CONFIG_80211N_HT psta->ieee8021x_blocked = 0; _rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); //psta->dot118021XPrivacy = _NO_PRIVACY_;//!!! remove it, because it has been set before this. //prepare for add_RATid supportRateNum = rtw_get_rateset_len((u8*)&pcur_network->SupportedRates); network_type = rtw_check_network_type((u8*)&pcur_network->SupportedRates, supportRateNum, pcur_network->Configuration.DSConfig); if (IsSupportedTxCCK(network_type)) { network_type = WIRELESS_11B; } else if (network_type == WIRELESS_INVALID) { // error handling if ( pcur_network->Configuration.DSConfig > 14 ) network_type = WIRELESS_11A; else network_type = WIRELESS_11B; } update_sta_basic_rate(psta, network_type); psta->wireless_mode = network_type; rtw_hal_update_sta_rate_mask(padapter, psta); tx_ra_bitmap = psta->ra_mask; psta->raid = rtw_hal_networktype_to_raid(padapter,psta); //ap mode rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, _TRUE); //if(pHalData->fw_ractrl == _TRUE) { u8 arg[4] = {0}; arg[0] = psta->mac_id; arg[1] = psta->raid; arg[2] = 0; arg[3] = psta->init_rate; DBG_871X("%s=> mac_id:%d , raid:%d , bitmap=0x%x\n", __FUNCTION__ , psta->mac_id, psta->raid , tx_ra_bitmap); rtw_hal_add_ra_tid(padapter, tx_ra_bitmap, arg, 0); } rtw_sta_media_status_rpt(padapter, psta, 1); _enter_critical_bh(&psta->lock, &irqL); psta->state = _FW_LINKED; _exit_critical_bh(&psta->lock, &irqL); } else { DBG_871X("add_RATid_bmc_sta error!\n"); } } //notes: //AID: 1~MAX for sta and 0 for bc/mc in ap/adhoc mode //MAC_ID = AID+1 for sta in ap/adhoc mode //MAC_ID = 1 for bc/mc for sta/ap/adhoc //MAC_ID = 0 for bssid for sta/ap/adhoc //CAM_ID = //0~3 for default key, cmd_id=macid + 3, macid=aid+1; void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta) { _irqL irqL; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct security_priv *psecuritypriv = &padapter->securitypriv; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); #ifdef CONFIG_80211N_HT struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; struct ht_priv *phtpriv_sta = &psta->htpriv; #endif //CONFIG_80211N_HT u8 cur_ldpc_cap=0, cur_stbc_cap=0, cur_beamform_cap=0; //set intf_tag to if1 //psta->intf_tag = 0; DBG_871X("%s\n",__FUNCTION__); //psta->mac_id = psta->aid+4; //psta->mac_id = psta->aid+1;//alloc macid when call rtw_alloc_stainfo(), //release macid when call rtw_free_stainfo() //ap mode rtw_hal_set_odm_var(padapter,HAL_ODM_STA_INFO,psta,_TRUE); if(psecuritypriv->dot11AuthAlgrthm==dot11AuthAlgrthm_8021X) psta->ieee8021x_blocked = _TRUE; else psta->ieee8021x_blocked = _FALSE; //update sta's cap //ERP VCS_update(padapter, psta); #ifdef CONFIG_80211N_HT //HT related cap if(phtpriv_sta->ht_option) { //check if sta supports rx ampdu phtpriv_sta->ampdu_enable = phtpriv_ap->ampdu_enable; phtpriv_sta->rx_ampdu_min_spacing = (phtpriv_sta->ht_cap.ampdu_params_info&IEEE80211_HT_CAP_AMPDU_DENSITY)>>2; // bwmode if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH)) { psta->bw_mode = CHANNEL_WIDTH_40; } else { psta->bw_mode = CHANNEL_WIDTH_20; } if(pmlmeext->cur_bwmode < psta->bw_mode) { psta->bw_mode = pmlmeext->cur_bwmode; } phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset; //check if sta support s Short GI 20M if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) { phtpriv_sta->sgi_20m = _TRUE; } //check if sta support s Short GI 40M if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) { if(psta->bw_mode == CHANNEL_WIDTH_40) //according to psta->bw_mode phtpriv_sta->sgi_40m = _TRUE; else phtpriv_sta->sgi_40m = _FALSE; } psta->qos_option = _TRUE; // B0 Config LDPC Coding Capability if (TEST_FLAG(phtpriv_ap->ldpc_cap, LDPC_HT_ENABLE_TX) && GET_HT_CAP_ELE_LDPC_CAP((u8 *)(&phtpriv_sta->ht_cap))) { SET_FLAG(cur_ldpc_cap, (LDPC_HT_ENABLE_TX | LDPC_HT_CAP_TX)); DBG_871X("Enable HT Tx LDPC for STA(%d)\n",psta->aid); } // B7 B8 B9 Config STBC setting if (TEST_FLAG(phtpriv_ap->stbc_cap, STBC_HT_ENABLE_TX) && GET_HT_CAP_ELE_RX_STBC((u8 *)(&phtpriv_sta->ht_cap))) { SET_FLAG(cur_stbc_cap, (STBC_HT_ENABLE_TX | STBC_HT_CAP_TX) ); DBG_871X("Enable HT Tx STBC for STA(%d)\n",psta->aid); } #ifdef CONFIG_BEAMFORMING // Config Tx beamforming setting if (TEST_FLAG(phtpriv_ap->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE) && GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP((u8 *)(&phtpriv_sta->ht_cap))) { SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); } if (TEST_FLAG(phtpriv_ap->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE) && GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP((u8 *)(&phtpriv_sta->ht_cap))) { SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); } if (cur_beamform_cap) { DBG_871X("Client STA(%d) HT Beamforming Cap = 0x%02X\n", psta->aid, cur_beamform_cap); } #endif //CONFIG_BEAMFORMING } else { phtpriv_sta->ampdu_enable = _FALSE; phtpriv_sta->sgi_20m = _FALSE; phtpriv_sta->sgi_40m = _FALSE; psta->bw_mode = CHANNEL_WIDTH_20; phtpriv_sta->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; } phtpriv_sta->ldpc_cap = cur_ldpc_cap; phtpriv_sta->stbc_cap = cur_stbc_cap; phtpriv_sta->beamform_cap = cur_beamform_cap; //Rx AMPDU send_delba(padapter, 0, psta->hwaddr);// recipient //TX AMPDU send_delba(padapter, 1, psta->hwaddr);// // originator phtpriv_sta->agg_enable_bitmap = 0x0;//reset phtpriv_sta->candidate_tid_bitmap = 0x0;//reset #endif //CONFIG_80211N_HT #ifdef CONFIG_80211AC_VHT update_sta_vht_info_apmode(padapter, psta); #endif update_ldpc_stbc_cap(psta); //todo: init other variables _rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); //add ratid //add_RATid(padapter, psta);//move to ap_sta_info_defer_update() _enter_critical_bh(&psta->lock, &irqL); psta->state |= _FW_LINKED; _exit_critical_bh(&psta->lock, &irqL); } static void update_ap_info(_adapter *padapter, struct sta_info *psta) { struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; struct security_priv *psecuritypriv = &padapter->securitypriv; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); #ifdef CONFIG_80211N_HT struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; #endif //CONFIG_80211N_HT psta->wireless_mode = pmlmeext->cur_wireless_mode; psta->bssratelen = rtw_get_rateset_len(pnetwork->SupportedRates); _rtw_memcpy(psta->bssrateset, pnetwork->SupportedRates, psta->bssratelen); #ifdef CONFIG_80211N_HT //HT related cap if(phtpriv_ap->ht_option) { //check if sta supports rx ampdu //phtpriv_ap->ampdu_enable = phtpriv_ap->ampdu_enable; //check if sta support s Short GI 20M if((phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) { phtpriv_ap->sgi_20m = _TRUE; } //check if sta support s Short GI 40M if((phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) { phtpriv_ap->sgi_40m = _TRUE; } psta->qos_option = _TRUE; } else { phtpriv_ap->ampdu_enable = _FALSE; phtpriv_ap->sgi_20m = _FALSE; phtpriv_ap->sgi_40m = _FALSE; } psta->bw_mode = pmlmeext->cur_bwmode; phtpriv_ap->ch_offset = pmlmeext->cur_ch_offset; phtpriv_ap->agg_enable_bitmap = 0x0;//reset phtpriv_ap->candidate_tid_bitmap = 0x0;//reset _rtw_memcpy(&psta->htpriv, &pmlmepriv->htpriv, sizeof(struct ht_priv)); #ifdef CONFIG_80211AC_VHT _rtw_memcpy(&psta->vhtpriv, &pmlmepriv->vhtpriv, sizeof(struct vht_priv)); #endif //CONFIG_80211AC_VHT #endif //CONFIG_80211N_HT } static void update_hw_ht_param(_adapter *padapter) { unsigned char max_AMPDU_len; unsigned char min_MPDU_spacing; struct registry_priv *pregpriv = &padapter->registrypriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); DBG_871X("%s\n", __FUNCTION__); //handle A-MPDU parameter field /* AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k AMPDU_para [4:2]:Min MPDU Start Spacing */ max_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) >> 2; rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing)); rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len)); // // Config SM Power Save setting // pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & 0x0C) >> 2; if(pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC) { /*u8 i; //update the MCS rates for (i = 0; i < 16; i++) { pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; }*/ DBG_871X("%s(): WLAN_HT_CAP_SM_PS_STATIC\n",__FUNCTION__); } // // Config current HT Protection mode. // //pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; } void start_bss_network(_adapter *padapter, u8 *pbuf) { u8 *p; u8 val8, cur_channel, cur_bwmode, cur_ch_offset; u16 bcn_interval; u32 acparm; int ie_len; struct registry_priv *pregpriv = &padapter->registrypriv; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct security_priv* psecuritypriv=&(padapter->securitypriv); WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); struct HT_info_element *pht_info=NULL; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &(padapter->wdinfo); #endif //CONFIG_P2P u8 cbw40_enable=0; u8 change_band = _FALSE; //DBG_871X("%s\n", __FUNCTION__); bcn_interval = (u16)pnetwork->Configuration.BeaconPeriod; cur_channel = pnetwork->Configuration.DSConfig; cur_bwmode = CHANNEL_WIDTH_20; cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; //check if there is wps ie, //if there is wpsie in beacon, the hostapd will update beacon twice when stating hostapd, //and at first time the security ie ( RSN/WPA IE) will not include in beacon. if(NULL == rtw_get_wps_ie(pnetwork->IEs+_FIXED_IE_LENGTH_, pnetwork->IELength-_FIXED_IE_LENGTH_, NULL, NULL)) { pmlmeext->bstart_bss = _TRUE; } //todo: update wmm, ht cap //pmlmeinfo->WMM_enable; //pmlmeinfo->HT_enable; if(pmlmepriv->qospriv.qos_option) pmlmeinfo->WMM_enable = _TRUE; #ifdef CONFIG_80211N_HT if(pmlmepriv->htpriv.ht_option) { pmlmeinfo->WMM_enable = _TRUE; pmlmeinfo->HT_enable = _TRUE; //pmlmeinfo->HT_info_enable = _TRUE; //pmlmeinfo->HT_caps_enable = _TRUE; update_hw_ht_param(padapter); } #endif //#CONFIG_80211N_HT #ifdef CONFIG_80211AC_VHT if(pmlmepriv->vhtpriv.vht_option) { pmlmeinfo->VHT_enable = _TRUE; update_hw_vht_param(padapter); } #endif //CONFIG_80211AC_VHT if(pmlmepriv->cur_network.join_res != _TRUE) //setting only at first time { //WEP Key will be set before this function, do not clear CAM. if ((psecuritypriv->dot11PrivacyAlgrthm != _WEP40_) && (psecuritypriv->dot11PrivacyAlgrthm != _WEP104_)) flush_all_cam_entry(padapter); //clear CAM } //set MSR to AP_Mode Set_MSR(padapter, _HW_STATE_AP_); //Set BSSID REG rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pnetwork->MacAddress); //Set EDCA param reg #ifdef CONFIG_CONCURRENT_MODE acparm = 0x005ea42b; #else acparm = 0x002F3217; // VO #endif rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm)); acparm = 0x005E4317; // VI rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm)); //acparm = 0x00105320; // BE acparm = 0x005ea42b; rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); acparm = 0x0000A444; // BK rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm)); //Set Security val8 = (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)? 0xcc: 0xcf; rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); //Beacon Control related register rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&bcn_interval)); rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, NULL); if(pmlmepriv->cur_network.join_res != _TRUE) //setting only at first time { //u32 initialgain; //initialgain = 0x1e; //disable dynamic functions, such as high power, DIG //Save_DM_Func_Flag(padapter); //Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); //turn on all dynamic functions Switch_DM_Func(padapter, DYNAMIC_ALL_FUNC_ENABLE, _TRUE); //rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); } #ifdef CONFIG_80211N_HT //set channel, bwmode p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); if( p && ie_len) { pht_info = (struct HT_info_element *)(p+2); if (cur_channel > 14) { if ((pregpriv->bw_mode & 0xf0) > 0) cbw40_enable = 1; } else { if ((pregpriv->bw_mode & 0x0f) > 0) cbw40_enable = 1; } if ((cbw40_enable) && (pht_info->infos[0] & BIT(2))) { //switch to the 40M Hz mode //pmlmeext->cur_bwmode = CHANNEL_WIDTH_40; cur_bwmode = CHANNEL_WIDTH_40; switch (pht_info->infos[0] & 0x3) { case 1: //pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; break; case 3: //pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; break; default: //pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; break; } } } #endif //CONFIG_80211N_HT #ifdef CONFIG_80211AC_VHT p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_VHTOperation, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); if( p && ie_len) { if(GET_VHT_OPERATION_ELE_CHL_WIDTH(p+2) >= 1) { cur_bwmode = CHANNEL_WIDTH_80; } } #endif #ifdef CONFIG_DUALMAC_CONCURRENT dc_set_ap_channel_bandwidth(padapter, cur_channel, cur_ch_offset, cur_bwmode); #else //!CONFIG_DUALMAC_CONCURRENT #ifdef CONFIG_CONCURRENT_MODE //TODO: need to judge the phy parameters on concurrent mode for single phy concurrent_set_ap_chbw(padapter, cur_channel, cur_ch_offset, cur_bwmode); #else //!CONFIG_CONCURRENT_MODE set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); DBG_871X("CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); pmlmeext->cur_channel = cur_channel; pmlmeext->cur_bwmode = cur_bwmode; pmlmeext->cur_ch_offset = cur_ch_offset; #endif //!CONFIG_CONCURRENT_MODE #endif //!CONFIG_DUALMAC_CONCURRENT pmlmeext->cur_wireless_mode = pmlmepriv->cur_network.network_type; //let pnetwork_mlmeext == pnetwork_mlme. _rtw_memcpy(pnetwork_mlmeext, pnetwork, pnetwork->Length); //update cur_wireless_mode update_wireless_mode(padapter); //update RRSR after set channel and bandwidth UpdateBrateTbl(padapter, pnetwork->SupportedRates); rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, pnetwork->SupportedRates); //udpate capability after cur_wireless_mode updated update_capinfo(padapter, rtw_get_capability((WLAN_BSSID_EX *)pnetwork)); #ifdef CONFIG_P2P _rtw_memcpy(pwdinfo->p2p_group_ssid, pnetwork->Ssid.Ssid, pnetwork->Ssid.SsidLength); pwdinfo->p2p_group_ssid_len = pnetwork->Ssid.SsidLength; #endif //CONFIG_P2P if(_TRUE == pmlmeext->bstart_bss) { update_beacon(padapter, _TIM_IE_, NULL, _TRUE); #ifndef CONFIG_INTERRUPT_BASED_TXBCN //other case will tx beacon when bcn interrupt coming in. #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) //issue beacon frame if(send_beacon(padapter)==_FAIL) { DBG_871X("issue_beacon, fail!\n"); } #endif #endif //!CONFIG_INTERRUPT_BASED_TXBCN } //update bc/mc sta_info update_bmc_sta(padapter); //pmlmeext->bstart_bss = _TRUE; } int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) { int ret=_SUCCESS; u8 *p; u8 *pHT_caps_ie=NULL; u8 *pHT_info_ie=NULL; struct sta_info *psta = NULL; u16 cap, ht_cap=_FALSE; uint ie_len = 0; int group_cipher, pairwise_cipher; u8 channel, network_type, supportRate[NDIS_802_11_LENGTH_RATES_EX]; int supportRateNum = 0; u8 OUI1[] = {0x00, 0x50, 0xf2,0x01}; u8 wps_oui[4]={0x0,0x50,0xf2,0x04}; u8 WMM_PARA_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; struct registry_priv *pregistrypriv = &padapter->registrypriv; struct security_priv *psecuritypriv = &padapter->securitypriv; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); WLAN_BSSID_EX *pbss_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; struct sta_priv *pstapriv = &padapter->stapriv; u8 *ie = pbss_network->IEs; u8 vht_cap=_FALSE; /* SSID */ /* Supported rates */ /* DS Params */ /* WLAN_EID_COUNTRY */ /* ERP Information element */ /* Extended supported rates */ /* WPA/WPA2 */ /* Wi-Fi Wireless Multimedia Extensions */ /* ht_capab, ht_oper */ /* WPS IE */ DBG_871X("%s, len=%d\n", __FUNCTION__, len); if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) return _FAIL; if(len>MAX_IE_SZ) return _FAIL; pbss_network->IELength = len; _rtw_memset(ie, 0, MAX_IE_SZ); _rtw_memcpy(ie, pbuf, pbss_network->IELength); if(pbss_network->InfrastructureMode!=Ndis802_11APMode) return _FAIL; pbss_network->Rssi = 0; _rtw_memcpy(pbss_network->MacAddress, myid(&(padapter->eeprompriv)), ETH_ALEN); //beacon interval p = rtw_get_beacon_interval_from_ie(ie);//ie + 8; // 8: TimeStamp, 2: Beacon Interval 2:Capability //pbss_network->Configuration.BeaconPeriod = le16_to_cpu(*(unsigned short*)p); pbss_network->Configuration.BeaconPeriod = RTW_GET_LE16(p); //capability //cap = *(unsigned short *)rtw_get_capability_from_ie(ie); //cap = le16_to_cpu(cap); cap = RTW_GET_LE16(ie); //SSID p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SSID_IE_, &ie_len, (pbss_network->IELength -_BEACON_IE_OFFSET_)); if(p && ie_len>0) { _rtw_memset(&pbss_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); _rtw_memcpy(pbss_network->Ssid.Ssid, (p + 2), ie_len); pbss_network->Ssid.SsidLength = ie_len; } //chnnel channel = 0; pbss_network->Configuration.Length = 0; p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _DSSET_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); if(p && ie_len>0) channel = *(p + 2); pbss_network->Configuration.DSConfig = channel; _rtw_memset(supportRate, 0, NDIS_802_11_LENGTH_RATES_EX); // get supported rates p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); if (p != NULL) { _rtw_memcpy(supportRate, p+2, ie_len); supportRateNum = ie_len; } //get ext_supported rates p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ie_len, pbss_network->IELength - _BEACON_IE_OFFSET_); if (p != NULL) { _rtw_memcpy(supportRate+supportRateNum, p+2, ie_len); supportRateNum += ie_len; } network_type = rtw_check_network_type(supportRate, supportRateNum, channel); rtw_set_supported_rate(pbss_network->SupportedRates, network_type); //parsing ERP_IE p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); if(p && ie_len>0) { ERP_IE_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)p); } //update privacy/security if (cap & BIT(4)) pbss_network->Privacy = 1; else pbss_network->Privacy = 0; psecuritypriv->wpa_psk = 0; //wpa2 group_cipher = 0; pairwise_cipher = 0; psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); if(p && ie_len>0) { if(rtw_parse_wpa2_ie(p, ie_len+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) { psecuritypriv->dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; psecuritypriv->dot8021xalg = 1;//psk, todo:802.1x psecuritypriv->wpa_psk |= BIT(1); psecuritypriv->wpa2_group_cipher = group_cipher; psecuritypriv->wpa2_pairwise_cipher = pairwise_cipher; #if 0 switch(group_cipher) { case WPA_CIPHER_NONE: psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; break; case WPA_CIPHER_WEP40: psecuritypriv->wpa2_group_cipher = _WEP40_; break; case WPA_CIPHER_TKIP: psecuritypriv->wpa2_group_cipher = _TKIP_; break; case WPA_CIPHER_CCMP: psecuritypriv->wpa2_group_cipher = _AES_; break; case WPA_CIPHER_WEP104: psecuritypriv->wpa2_group_cipher = _WEP104_; break; } switch(pairwise_cipher) { case WPA_CIPHER_NONE: psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; break; case WPA_CIPHER_WEP40: psecuritypriv->wpa2_pairwise_cipher = _WEP40_; break; case WPA_CIPHER_TKIP: psecuritypriv->wpa2_pairwise_cipher = _TKIP_; break; case WPA_CIPHER_CCMP: psecuritypriv->wpa2_pairwise_cipher = _AES_; break; case WPA_CIPHER_WEP104: psecuritypriv->wpa2_pairwise_cipher = _WEP104_; break; } #endif } } //wpa ie_len = 0; group_cipher = 0; pairwise_cipher = 0; psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; for (p = ie + _BEACON_IE_OFFSET_; ;p += (ie_len + 2)) { p = rtw_get_ie(p, _SSN_IE_1_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); if ((p) && (_rtw_memcmp(p+2, OUI1, 4))) { if(rtw_parse_wpa_ie(p, ie_len+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) { psecuritypriv->dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; psecuritypriv->dot8021xalg = 1;//psk, todo:802.1x psecuritypriv->wpa_psk |= BIT(0); psecuritypriv->wpa_group_cipher = group_cipher; psecuritypriv->wpa_pairwise_cipher = pairwise_cipher; #if 0 switch(group_cipher) { case WPA_CIPHER_NONE: psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; break; case WPA_CIPHER_WEP40: psecuritypriv->wpa_group_cipher = _WEP40_; break; case WPA_CIPHER_TKIP: psecuritypriv->wpa_group_cipher = _TKIP_; break; case WPA_CIPHER_CCMP: psecuritypriv->wpa_group_cipher = _AES_; break; case WPA_CIPHER_WEP104: psecuritypriv->wpa_group_cipher = _WEP104_; break; } switch(pairwise_cipher) { case WPA_CIPHER_NONE: psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; break; case WPA_CIPHER_WEP40: psecuritypriv->wpa_pairwise_cipher = _WEP40_; break; case WPA_CIPHER_TKIP: psecuritypriv->wpa_pairwise_cipher = _TKIP_; break; case WPA_CIPHER_CCMP: psecuritypriv->wpa_pairwise_cipher = _AES_; break; case WPA_CIPHER_WEP104: psecuritypriv->wpa_pairwise_cipher = _WEP104_; break; } #endif } break; } if ((p == NULL) || (ie_len == 0)) { break; } } //wmm ie_len = 0; pmlmepriv->qospriv.qos_option = 0; if(pregistrypriv->wmm_enable) { for (p = ie + _BEACON_IE_OFFSET_; ;p += (ie_len + 2)) { p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); if((p) && _rtw_memcmp(p+2, WMM_PARA_IE, 6)) { pmlmepriv->qospriv.qos_option = 1; *(p+8) |= BIT(7);//QoS Info, support U-APSD /* disable all ACM bits since the WMM admission control is not supported */ *(p + 10) &= ~BIT(4); /* BE */ *(p + 14) &= ~BIT(4); /* BK */ *(p + 18) &= ~BIT(4); /* VI */ *(p + 22) &= ~BIT(4); /* VO */ break; } if ((p == NULL) || (ie_len == 0)) { break; } } } #ifdef CONFIG_80211N_HT //parsing HT_CAP_IE p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); if(p && ie_len>0) { u8 rf_type=0; HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor=MAX_AMPDU_FACTOR_64K; struct rtw_ieee80211_ht_cap *pht_cap = (struct rtw_ieee80211_ht_cap *)(p+2); if (0) { DBG_871X(FUNC_ADPT_FMT" HT_CAP_IE from upper layer:\n", FUNC_ADPT_ARG(padapter)); dump_ht_cap_ie_content(RTW_DBGDUMP, p+2, ie_len); } pHT_caps_ie=p; ht_cap = _TRUE; network_type |= WIRELESS_11_24N; rtw_ht_use_default_setting(padapter); /* Update HT Capabilities Info field */ if (pmlmepriv->htpriv.sgi_20m == _FALSE) pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_20); if (pmlmepriv->htpriv.sgi_40m == _FALSE) pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_40); if (!TEST_FLAG(pmlmepriv->htpriv.ldpc_cap, LDPC_HT_ENABLE_RX)) { pht_cap->cap_info &= ~(IEEE80211_HT_CAP_LDPC_CODING); } if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_TX)) { pht_cap->cap_info &= ~(IEEE80211_HT_CAP_TX_STBC); } if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_RX)) { pht_cap->cap_info &= ~(IEEE80211_HT_CAP_RX_STBC_3R); } /* Update A-MPDU Parameters field */ pht_cap->ampdu_params_info &= ~(IEEE80211_HT_CAP_AMPDU_FACTOR|IEEE80211_HT_CAP_AMPDU_DENSITY); if((psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_CCMP) || (psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_CCMP)) { pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&(0x07<<2)); } else { pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&0x00); } rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_FACTOR & max_rx_ampdu_factor); //set Max Rx AMPDU size to 64K /* Update Supported MCS Set field */ { int i; rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); /* RX MCS Bitmask */ switch(rf_type) { case RF_1T1R: case RF_1T2R: //? set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_1R); break; case RF_2T2R: default: set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_2R); } for (i = 0; i < 10; i++) *(HT_CAP_ELE_RX_MCS_MAP(pht_cap)+i) &= padapter->mlmeextpriv.default_supported_mcs_set[i]; } #ifdef CONFIG_BEAMFORMING // Use registry value to enable HT Beamforming. // ToDo: use configure file to set these capability. pht_cap->tx_BF_cap_info = 0; // HT Beamformer if(TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) { // Transmit NDP Capable SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(pht_cap, 1); // Explicit Compressed Steering Capable SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(pht_cap, 1); // Compressed Steering Number Antennas SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pht_cap, 1); } // HT Beamformee if(TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) { // Receive NDP Capable SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(pht_cap, 1); // Explicit Compressed Beamforming Feedback Capable SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(pht_cap, 2); } #endif //CONFIG_BEAMFORMING _rtw_memcpy(&pmlmepriv->htpriv.ht_cap, p+2, ie_len); if (0) { DBG_871X(FUNC_ADPT_FMT" HT_CAP_IE driver masked:\n", FUNC_ADPT_ARG(padapter)); dump_ht_cap_ie_content(RTW_DBGDUMP, p+2, ie_len); } } //parsing HT_INFO_IE p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); if(p && ie_len>0) { pHT_info_ie=p; } #endif //CONFIG_80211N_HT switch(network_type) { case WIRELESS_11B: pbss_network->NetworkTypeInUse = Ndis802_11DS; break; case WIRELESS_11G: case WIRELESS_11BG: case WIRELESS_11G_24N: case WIRELESS_11BG_24N: pbss_network->NetworkTypeInUse = Ndis802_11OFDM24; break; case WIRELESS_11A: pbss_network->NetworkTypeInUse = Ndis802_11OFDM5; break; default : pbss_network->NetworkTypeInUse = Ndis802_11OFDM24; break; } pmlmepriv->cur_network.network_type = network_type; #ifdef CONFIG_80211N_HT pmlmepriv->htpriv.ht_option = _FALSE; if( (psecuritypriv->wpa2_pairwise_cipher&WPA_CIPHER_TKIP) || (psecuritypriv->wpa_pairwise_cipher&WPA_CIPHER_TKIP)) { //todo: //ht_cap = _FALSE; } //ht_cap if(pregistrypriv->ht_enable && ht_cap==_TRUE) { pmlmepriv->htpriv.ht_option = _TRUE; pmlmepriv->qospriv.qos_option = 1; if(pregistrypriv->ampdu_enable==1) { pmlmepriv->htpriv.ampdu_enable = _TRUE; } HT_caps_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_caps_ie); HT_info_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_info_ie); } #endif #ifdef CONFIG_80211AC_VHT //Parsing VHT CAP IE p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, EID_VHTCapability, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); if(p && ie_len>0) { vht_cap = _TRUE; } //Parsing VHT OPERATION IE pmlmepriv->vhtpriv.vht_option = _FALSE; // if channel in 5G band, then add vht ie . if ((pbss_network->Configuration.DSConfig > 14) && (pmlmepriv->htpriv.ht_option == _TRUE) && (pregistrypriv->vht_enable)) { if(vht_cap == _TRUE) { pmlmepriv->vhtpriv.vht_option = _TRUE; } else if(pregistrypriv->vht_enable == 2) // auto enabled { u8 cap_len, operation_len; rtw_vht_use_default_setting(padapter); // VHT Capabilities element cap_len = rtw_build_vht_cap_ie(padapter, pbss_network->IEs + pbss_network->IELength); pbss_network->IELength += cap_len; // VHT Operation element operation_len = rtw_build_vht_operation_ie(padapter, pbss_network->IEs + pbss_network->IELength, pbss_network->Configuration.DSConfig); pbss_network->IELength += operation_len; pmlmepriv->vhtpriv.vht_option = _TRUE; } } #endif //CONFIG_80211AC_VHT pbss_network->Length = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX *)pbss_network); //issue beacon to start bss network //start_bss_network(padapter, (u8*)pbss_network); rtw_startbss_cmd(padapter, RTW_CMDF_WAIT_ACK); //alloc sta_info for ap itself psta = rtw_get_stainfo(&padapter->stapriv, pbss_network->MacAddress); if(!psta) { psta = rtw_alloc_stainfo(&padapter->stapriv, pbss_network->MacAddress); if (psta == NULL) { return _FAIL; } } // update AP's sta info update_ap_info(padapter, psta); psta->state |= WIFI_AP_STATE; //Aries, add,fix bug of flush_cam_entry at STOP AP mode , 0724 rtw_indicate_connect( padapter); pmlmepriv->cur_network.join_res = _TRUE;//for check if already set beacon //update bc/mc sta_info //update_bmc_sta(padapter); return ret; } void rtw_set_macaddr_acl(_adapter *padapter, int mode) { struct sta_priv *pstapriv = &padapter->stapriv; struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; DBG_871X("%s, mode=%d\n", __func__, mode); pacl_list->mode = mode; } int rtw_acl_add_sta(_adapter *padapter, u8 *addr) { _irqL irqL; _list *plist, *phead; u8 added = _FALSE; int i, ret=0; struct rtw_wlan_acl_node *paclnode; struct sta_priv *pstapriv = &padapter->stapriv; struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; _queue *pacl_node_q =&pacl_list->acl_node_q; DBG_871X("%s(acl_num=%d)=" MAC_FMT "\n", __func__, pacl_list->num, MAC_ARG(addr)); if((NUM_ACL-1) < pacl_list->num) return (-1); _enter_critical_bh(&(pacl_node_q->lock), &irqL); phead = get_list_head(pacl_node_q); plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); plist = get_next(plist); if(_rtw_memcmp(paclnode->addr, addr, ETH_ALEN)) { if(paclnode->valid == _TRUE) { added = _TRUE; DBG_871X("%s, sta has been added\n", __func__); break; } } } _exit_critical_bh(&(pacl_node_q->lock), &irqL); if(added == _TRUE) return ret; _enter_critical_bh(&(pacl_node_q->lock), &irqL); for(i=0; i< NUM_ACL; i++) { paclnode = &pacl_list->aclnode[i]; if(paclnode->valid == _FALSE) { _rtw_init_listhead(&paclnode->list); _rtw_memcpy(paclnode->addr, addr, ETH_ALEN); paclnode->valid = _TRUE; rtw_list_insert_tail(&paclnode->list, get_list_head(pacl_node_q)); pacl_list->num++; break; } } DBG_871X("%s, acl_num=%d\n", __func__, pacl_list->num); _exit_critical_bh(&(pacl_node_q->lock), &irqL); return ret; } int rtw_acl_remove_sta(_adapter *padapter, u8 *addr) { _irqL irqL; _list *plist, *phead; int i, ret=0; struct rtw_wlan_acl_node *paclnode; struct sta_priv *pstapriv = &padapter->stapriv; struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; _queue *pacl_node_q =&pacl_list->acl_node_q; u8 baddr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; //Baddr is used for clearing acl_list DBG_871X("%s(acl_num=%d)=" MAC_FMT "\n", __func__, pacl_list->num, MAC_ARG(addr)); _enter_critical_bh(&(pacl_node_q->lock), &irqL); phead = get_list_head(pacl_node_q); plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); plist = get_next(plist); if(_rtw_memcmp(paclnode->addr, addr, ETH_ALEN) || _rtw_memcmp(baddr, addr, ETH_ALEN)) { if(paclnode->valid == _TRUE) { paclnode->valid = _FALSE; rtw_list_delete(&paclnode->list); pacl_list->num--; } } } _exit_critical_bh(&(pacl_node_q->lock), &irqL); DBG_871X("%s, acl_num=%d\n", __func__, pacl_list->num); return ret; } u8 rtw_ap_set_pairwise_key(_adapter *padapter, struct sta_info *psta) { struct cmd_obj* ph2c; struct set_stakey_parm *psetstakey_para; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; u8 res=_SUCCESS; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if ( ph2c == NULL){ res= _FAIL; goto exit; } psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm)); if(psetstakey_para==NULL){ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); res=_FAIL; goto exit; } init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_); psetstakey_para->algorithm = (u8)psta->dot118021XPrivacy; _rtw_memcpy(psetstakey_para->addr, psta->hwaddr, ETH_ALEN); _rtw_memcpy(psetstakey_para->key, &psta->dot118021x_UncstKey, 16); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: return res; } static int rtw_ap_set_key(_adapter *padapter, u8 *key, u8 alg, int keyid, u8 set_tx) { u8 keylen; struct cmd_obj* pcmd; struct setkey_parm *psetkeyparm; struct cmd_priv *pcmdpriv=&(padapter->cmdpriv); int res=_SUCCESS; //DBG_871X("%s\n", __FUNCTION__); pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(pcmd==NULL){ res= _FAIL; goto exit; } psetkeyparm=(struct setkey_parm*)rtw_zmalloc(sizeof(struct setkey_parm)); if(psetkeyparm==NULL){ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } _rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm)); psetkeyparm->keyid=(u8)keyid; if (is_wep_enc(alg)) padapter->securitypriv.key_mask |= BIT(psetkeyparm->keyid); psetkeyparm->algorithm = alg; psetkeyparm->set_tx = set_tx; switch(alg) { case _WEP40_: keylen = 5; break; case _WEP104_: keylen = 13; break; case _TKIP_: case _TKIP_WTMIC_: case _AES_: default: keylen = 16; } _rtw_memcpy(&(psetkeyparm->key[0]), key, keylen); pcmd->cmdcode = _SetKey_CMD_; pcmd->parmbuf = (u8 *)psetkeyparm; pcmd->cmdsz = (sizeof(struct setkey_parm)); pcmd->rsp = NULL; pcmd->rspsz = 0; _rtw_init_listhead(&pcmd->list); res = rtw_enqueue_cmd(pcmdpriv, pcmd); exit: return res; } int rtw_ap_set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid) { DBG_871X("%s\n", __FUNCTION__); return rtw_ap_set_key(padapter, key, alg, keyid, 1); } int rtw_ap_set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid, u8 set_tx) { u8 alg; switch(keylen) { case 5: alg =_WEP40_; break; case 13: alg =_WEP104_; break; default: alg =_NO_PRIVACY_; } DBG_871X("%s\n", __FUNCTION__); return rtw_ap_set_key(padapter, key, alg, keyid, set_tx); } #ifdef CONFIG_NATIVEAP_MLME static void update_bcn_fixed_ie(_adapter *padapter) { DBG_871X("%s\n", __FUNCTION__); } static void update_bcn_erpinfo_ie(_adapter *padapter) { struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); unsigned char *p, *ie = pnetwork->IEs; u32 len = 0; DBG_871X("%s, ERP_enable=%d\n", __FUNCTION__, pmlmeinfo->ERP_enable); if(!pmlmeinfo->ERP_enable) return; //parsing ERP_IE p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); if(p && len>0) { PNDIS_802_11_VARIABLE_IEs pIE = (PNDIS_802_11_VARIABLE_IEs)p; if (pmlmepriv->num_sta_non_erp == 1) pIE->data[0] |= RTW_ERP_INFO_NON_ERP_PRESENT|RTW_ERP_INFO_USE_PROTECTION; else pIE->data[0] &= ~(RTW_ERP_INFO_NON_ERP_PRESENT|RTW_ERP_INFO_USE_PROTECTION); if(pmlmepriv->num_sta_no_short_preamble > 0) pIE->data[0] |= RTW_ERP_INFO_BARKER_PREAMBLE_MODE; else pIE->data[0] &= ~(RTW_ERP_INFO_BARKER_PREAMBLE_MODE); ERP_IE_handler(padapter, pIE); } } static void update_bcn_htcap_ie(_adapter *padapter) { DBG_871X("%s\n", __FUNCTION__); } static void update_bcn_htinfo_ie(_adapter *padapter) { DBG_871X("%s\n", __FUNCTION__); } static void update_bcn_rsn_ie(_adapter *padapter) { DBG_871X("%s\n", __FUNCTION__); } static void update_bcn_wpa_ie(_adapter *padapter) { DBG_871X("%s\n", __FUNCTION__); } static void update_bcn_wmm_ie(_adapter *padapter) { DBG_871X("%s\n", __FUNCTION__); } static void update_bcn_wps_ie(_adapter *padapter) { u8 *pwps_ie=NULL, *pwps_ie_src, *premainder_ie, *pbackup_remainder_ie=NULL; uint wps_ielen=0, wps_offset, remainder_ielen; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); unsigned char *ie = pnetwork->IEs; u32 ielen = pnetwork->IELength; DBG_871X("%s\n", __FUNCTION__); pwps_ie = rtw_get_wps_ie(ie+_FIXED_IE_LENGTH_, ielen-_FIXED_IE_LENGTH_, NULL, &wps_ielen); if(pwps_ie==NULL || wps_ielen==0) return; pwps_ie_src = pmlmepriv->wps_beacon_ie; if(pwps_ie_src == NULL) return; wps_offset = (uint)(pwps_ie-ie); premainder_ie = pwps_ie + wps_ielen; remainder_ielen = ielen - wps_offset - wps_ielen; if(remainder_ielen>0) { pbackup_remainder_ie = rtw_malloc(remainder_ielen); if(pbackup_remainder_ie) _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); } wps_ielen = (uint)pwps_ie_src[1];//to get ie data len if((wps_offset+wps_ielen+2+remainder_ielen)<=MAX_IE_SZ) { _rtw_memcpy(pwps_ie, pwps_ie_src, wps_ielen+2); pwps_ie += (wps_ielen+2); if(pbackup_remainder_ie) _rtw_memcpy(pwps_ie, pbackup_remainder_ie, remainder_ielen); //update IELength pnetwork->IELength = wps_offset + (wps_ielen+2) + remainder_ielen; } if(pbackup_remainder_ie) rtw_mfree(pbackup_remainder_ie, remainder_ielen); // deal with the case without set_tx_beacon_cmd() in update_beacon() #if defined( CONFIG_INTERRUPT_BASED_TXBCN ) || defined( CONFIG_PCI_HCI ) if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { u8 sr = 0; rtw_get_wps_attr_content(pwps_ie_src, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); if( sr ) { set_fwstate(pmlmepriv, WIFI_UNDER_WPS); DBG_871X("%s, set WIFI_UNDER_WPS\n", __func__); } } #endif } static void update_bcn_p2p_ie(_adapter *padapter) { } static void update_bcn_vendor_spec_ie(_adapter *padapter, u8*oui) { DBG_871X("%s\n", __FUNCTION__); if(_rtw_memcmp(RTW_WPA_OUI, oui, 4)) { update_bcn_wpa_ie(padapter); } else if(_rtw_memcmp(WMM_OUI, oui, 4)) { update_bcn_wmm_ie(padapter); } else if(_rtw_memcmp(WPS_OUI, oui, 4)) { update_bcn_wps_ie(padapter); } else if(_rtw_memcmp(P2P_OUI, oui, 4)) { update_bcn_p2p_ie(padapter); } else { DBG_871X("unknown OUI type!\n"); } } void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, const char *tag) { _irqL irqL; struct mlme_priv *pmlmepriv; struct mlme_ext_priv *pmlmeext; //struct mlme_ext_info *pmlmeinfo; //DBG_871X("%s\n", __FUNCTION__); if(!padapter) return; pmlmepriv = &(padapter->mlmepriv); pmlmeext = &(padapter->mlmeextpriv); //pmlmeinfo = &(pmlmeext->mlmext_info); if(_FALSE == pmlmeext->bstart_bss) return; _enter_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); switch(ie_id) { case 0xFF: update_bcn_fixed_ie(padapter);//8: TimeStamp, 2: Beacon Interval 2:Capability break; case _TIM_IE_: update_BCNTIM(padapter); break; case _ERPINFO_IE_: update_bcn_erpinfo_ie(padapter); break; case _HT_CAPABILITY_IE_: update_bcn_htcap_ie(padapter); break; case _RSN_IE_2_: update_bcn_rsn_ie(padapter); break; case _HT_ADD_INFO_IE_: update_bcn_htinfo_ie(padapter); break; case _VENDOR_SPECIFIC_IE_: update_bcn_vendor_spec_ie(padapter, oui); break; default: break; } pmlmepriv->update_bcn = _TRUE; _exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); #ifndef CONFIG_INTERRUPT_BASED_TXBCN #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) if(tx) { //send_beacon(padapter);//send_beacon must execute on TSR level if (0) DBG_871X(FUNC_ADPT_FMT" ie_id:%u - %s\n", FUNC_ADPT_ARG(padapter), ie_id, tag); set_tx_beacon_cmd(padapter); } #else { //PCI will issue beacon when BCN interrupt occurs. } #endif #endif //!CONFIG_INTERRUPT_BASED_TXBCN } #ifdef CONFIG_80211N_HT /* op_mode Set to 0 (HT pure) under the followign conditions - all STAs in the BSS are 20/40 MHz HT in 20/40 MHz BSS or - all STAs in the BSS are 20 MHz HT in 20 MHz BSS Set to 1 (HT non-member protection) if there may be non-HT STAs in both the primary and the secondary channel Set to 2 if only HT STAs are associated in BSS, however and at least one 20 MHz HT STA is associated Set to 3 (HT mixed mode) when one or more non-HT STAs are associated (currently non-GF HT station is considered as non-HT STA also) */ static int rtw_ht_operation_update(_adapter *padapter) { u16 cur_op_mode, new_op_mode; int op_mode_changes = 0; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; if(pmlmepriv->htpriv.ht_option == _TRUE) return 0; //if (!iface->conf->ieee80211n || iface->conf->ht_op_mode_fixed) // return 0; DBG_871X("%s current operation mode=0x%X\n", __FUNCTION__, pmlmepriv->ht_op_mode); if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) && pmlmepriv->num_sta_ht_no_gf) { pmlmepriv->ht_op_mode |= HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT; op_mode_changes++; } else if ((pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) && pmlmepriv->num_sta_ht_no_gf == 0) { pmlmepriv->ht_op_mode &= ~HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT; op_mode_changes++; } if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) && (pmlmepriv->num_sta_no_ht || pmlmepriv->olbc_ht)) { pmlmepriv->ht_op_mode |= HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT; op_mode_changes++; } else if ((pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) && (pmlmepriv->num_sta_no_ht == 0 && !pmlmepriv->olbc_ht)) { pmlmepriv->ht_op_mode &= ~HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT; op_mode_changes++; } /* Note: currently we switch to the MIXED op mode if HT non-greenfield * station is associated. Probably it's a theoretical case, since * it looks like all known HT STAs support greenfield. */ new_op_mode = 0; if (pmlmepriv->num_sta_no_ht || (pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT)) new_op_mode = OP_MODE_MIXED; else if ((phtpriv_ap->ht_cap.cap_info & IEEE80211_HT_CAP_SUP_WIDTH) && pmlmepriv->num_sta_ht_20mhz) new_op_mode = OP_MODE_20MHZ_HT_STA_ASSOCED; else if (pmlmepriv->olbc_ht) new_op_mode = OP_MODE_MAY_BE_LEGACY_STAS; else new_op_mode = OP_MODE_PURE; cur_op_mode = pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_OP_MODE_MASK; if (cur_op_mode != new_op_mode) { pmlmepriv->ht_op_mode &= ~HT_INFO_OPERATION_MODE_OP_MODE_MASK; pmlmepriv->ht_op_mode |= new_op_mode; op_mode_changes++; } DBG_871X("%s new operation mode=0x%X changes=%d\n", __FUNCTION__, pmlmepriv->ht_op_mode, op_mode_changes); return op_mode_changes; } #endif /* CONFIG_80211N_HT */ void associated_clients_update(_adapter *padapter, u8 updated) { //update associcated stations cap. if(updated == _TRUE) { _irqL irqL; _list *phead, *plist; struct sta_info *psta=NULL; struct sta_priv *pstapriv = &padapter->stapriv; _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); phead = &pstapriv->asoc_list; plist = get_next(phead); //check asoc_queue while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); plist = get_next(plist); VCS_update(padapter, psta); } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); } } /* called > TSR LEVEL for USB or SDIO Interface*/ void bss_cap_update_on_sta_join(_adapter *padapter, struct sta_info *psta) { u8 beacon_updated = _FALSE; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); #if 0 if (!(psta->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) && !psta->no_short_preamble_set) { psta->no_short_preamble_set = 1; pmlmepriv->num_sta_no_short_preamble++; if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && (pmlmepriv->num_sta_no_short_preamble == 1)) ieee802_11_set_beacons(hapd->iface); } #endif if(!(psta->flags & WLAN_STA_SHORT_PREAMBLE)) { if(!psta->no_short_preamble_set) { psta->no_short_preamble_set = 1; pmlmepriv->num_sta_no_short_preamble++; if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && (pmlmepriv->num_sta_no_short_preamble == 1)) { beacon_updated = _TRUE; update_beacon(padapter, 0xFF, NULL, _TRUE); } } } else { if(psta->no_short_preamble_set) { psta->no_short_preamble_set = 0; pmlmepriv->num_sta_no_short_preamble--; if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && (pmlmepriv->num_sta_no_short_preamble == 0)) { beacon_updated = _TRUE; update_beacon(padapter, 0xFF, NULL, _TRUE); } } } #if 0 if (psta->flags & WLAN_STA_NONERP && !psta->nonerp_set) { psta->nonerp_set = 1; pmlmepriv->num_sta_non_erp++; if (pmlmepriv->num_sta_non_erp == 1) ieee802_11_set_beacons(hapd->iface); } #endif if(psta->flags & WLAN_STA_NONERP) { if(!psta->nonerp_set) { psta->nonerp_set = 1; pmlmepriv->num_sta_non_erp++; if (pmlmepriv->num_sta_non_erp == 1) { beacon_updated = _TRUE; update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); } } } else { if(psta->nonerp_set) { psta->nonerp_set = 0; pmlmepriv->num_sta_non_erp--; if (pmlmepriv->num_sta_non_erp == 0) { beacon_updated = _TRUE; update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); } } } #if 0 if (!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT) && !psta->no_short_slot_time_set) { psta->no_short_slot_time_set = 1; pmlmepriv->num_sta_no_short_slot_time++; if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && (pmlmepriv->num_sta_no_short_slot_time == 1)) ieee802_11_set_beacons(hapd->iface); } #endif if(!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT)) { if(!psta->no_short_slot_time_set) { psta->no_short_slot_time_set = 1; pmlmepriv->num_sta_no_short_slot_time++; if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && (pmlmepriv->num_sta_no_short_slot_time == 1)) { beacon_updated = _TRUE; update_beacon(padapter, 0xFF, NULL, _TRUE); } } } else { if(psta->no_short_slot_time_set) { psta->no_short_slot_time_set = 0; pmlmepriv->num_sta_no_short_slot_time--; if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && (pmlmepriv->num_sta_no_short_slot_time == 0)) { beacon_updated = _TRUE; update_beacon(padapter, 0xFF, NULL, _TRUE); } } } #ifdef CONFIG_80211N_HT if (psta->flags & WLAN_STA_HT) { u16 ht_capab = le16_to_cpu(psta->htpriv.ht_cap.cap_info); DBG_871X("HT: STA " MAC_FMT " HT Capabilities " "Info: 0x%04x\n", MAC_ARG(psta->hwaddr), ht_capab); if (psta->no_ht_set) { psta->no_ht_set = 0; pmlmepriv->num_sta_no_ht--; } if ((ht_capab & IEEE80211_HT_CAP_GRN_FLD) == 0) { if (!psta->no_ht_gf_set) { psta->no_ht_gf_set = 1; pmlmepriv->num_sta_ht_no_gf++; } DBG_871X("%s STA " MAC_FMT " - no " "greenfield, num of non-gf stations %d\n", __FUNCTION__, MAC_ARG(psta->hwaddr), pmlmepriv->num_sta_ht_no_gf); } if ((ht_capab & IEEE80211_HT_CAP_SUP_WIDTH) == 0) { if (!psta->ht_20mhz_set) { psta->ht_20mhz_set = 1; pmlmepriv->num_sta_ht_20mhz++; } DBG_871X("%s STA " MAC_FMT " - 20 MHz HT, " "num of 20MHz HT STAs %d\n", __FUNCTION__, MAC_ARG(psta->hwaddr), pmlmepriv->num_sta_ht_20mhz); } } else { if (!psta->no_ht_set) { psta->no_ht_set = 1; pmlmepriv->num_sta_no_ht++; } if(pmlmepriv->htpriv.ht_option == _TRUE) { DBG_871X("%s STA " MAC_FMT " - no HT, num of non-HT stations %d\n", __FUNCTION__, MAC_ARG(psta->hwaddr), pmlmepriv->num_sta_no_ht); } } if (rtw_ht_operation_update(padapter) > 0) { update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE); update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); } #endif /* CONFIG_80211N_HT */ //update associcated stations cap. associated_clients_update(padapter, beacon_updated); DBG_871X("%s, updated=%d\n", __func__, beacon_updated); } u8 bss_cap_update_on_sta_leave(_adapter *padapter, struct sta_info *psta) { u8 beacon_updated = _FALSE; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); if(!psta) return beacon_updated; if (psta->no_short_preamble_set) { psta->no_short_preamble_set = 0; pmlmepriv->num_sta_no_short_preamble--; if (pmlmeext->cur_wireless_mode > WIRELESS_11B && pmlmepriv->num_sta_no_short_preamble == 0) { beacon_updated = _TRUE; update_beacon(padapter, 0xFF, NULL, _TRUE); } } if (psta->nonerp_set) { psta->nonerp_set = 0; pmlmepriv->num_sta_non_erp--; if (pmlmepriv->num_sta_non_erp == 0) { beacon_updated = _TRUE; update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); } } if (psta->no_short_slot_time_set) { psta->no_short_slot_time_set = 0; pmlmepriv->num_sta_no_short_slot_time--; if (pmlmeext->cur_wireless_mode > WIRELESS_11B && pmlmepriv->num_sta_no_short_slot_time == 0) { beacon_updated = _TRUE; update_beacon(padapter, 0xFF, NULL, _TRUE); } } #ifdef CONFIG_80211N_HT if (psta->no_ht_gf_set) { psta->no_ht_gf_set = 0; pmlmepriv->num_sta_ht_no_gf--; } if (psta->no_ht_set) { psta->no_ht_set = 0; pmlmepriv->num_sta_no_ht--; } if (psta->ht_20mhz_set) { psta->ht_20mhz_set = 0; pmlmepriv->num_sta_ht_20mhz--; } if (rtw_ht_operation_update(padapter) > 0) { update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE); update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); } #endif /* CONFIG_80211N_HT */ //update associcated stations cap. //associated_clients_update(padapter, beacon_updated); //move it to avoid deadlock DBG_871X("%s, updated=%d\n", __func__, beacon_updated); return beacon_updated; } u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reason) { _irqL irqL; u8 beacon_updated = _FALSE; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct sta_priv *pstapriv = &padapter->stapriv; if(!psta) return beacon_updated; if (active == _TRUE) { #ifdef CONFIG_80211N_HT //tear down Rx AMPDU send_delba(padapter, 0, psta->hwaddr);// recipient //tear down TX AMPDU send_delba(padapter, 1, psta->hwaddr);// // originator #endif //CONFIG_80211N_HT issue_deauth(padapter, psta->hwaddr, reason); } #ifdef CONFIG_BEAMFORMING beamforming_wk_cmd(padapter, BEAMFORMING_CTRL_LEAVE, psta->hwaddr, ETH_ALEN, 1); #endif psta->htpriv.agg_enable_bitmap = 0x0;//reset psta->htpriv.candidate_tid_bitmap = 0x0;//reset //report_del_sta_event(padapter, psta->hwaddr, reason); //clear cam entry / key rtw_clearstakey_cmd(padapter, psta, _TRUE); _enter_critical_bh(&psta->lock, &irqL); psta->state &= ~_FW_LINKED; _exit_critical_bh(&psta->lock, &irqL); #ifdef CONFIG_IOCTL_CFG80211 if (1) { #ifdef COMPAT_KERNEL_RELEASE rtw_cfg80211_indicate_sta_disassoc(padapter, psta->hwaddr, reason); #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) rtw_cfg80211_indicate_sta_disassoc(padapter, psta->hwaddr, reason); #else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) /* will call rtw_cfg80211_indicate_sta_disassoc() in cmd_thread for old API context */ #endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) } else #endif //CONFIG_IOCTL_CFG80211 { rtw_indicate_sta_disassoc_event(padapter, psta); } report_del_sta_event(padapter, psta->hwaddr, reason); beacon_updated = bss_cap_update_on_sta_leave(padapter, psta); //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); rtw_free_stainfo(padapter, psta); //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); return beacon_updated; } int rtw_ap_inform_ch_switch(_adapter *padapter, u8 new_ch, u8 ch_offset) { _irqL irqL; _list *phead, *plist; int ret=0; struct sta_info *psta = NULL; struct sta_priv *pstapriv = &padapter->stapriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) return ret; DBG_871X(FUNC_NDEV_FMT" with ch:%u, offset:%u\n", FUNC_NDEV_ARG(padapter->pnetdev), new_ch, ch_offset); _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); phead = &pstapriv->asoc_list; plist = get_next(phead); /* for each sta in asoc_queue */ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); plist = get_next(plist); issue_action_spct_ch_switch(padapter, psta->hwaddr, new_ch, ch_offset); psta->expire_to = ((pstapriv->expire_to * 2) > 5) ? 5 : (pstapriv->expire_to * 2); } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); issue_action_spct_ch_switch(padapter, bc_addr, new_ch, ch_offset); return ret; } int rtw_sta_flush(_adapter *padapter) { _irqL irqL; _list *phead, *plist; int ret=0; struct sta_info *psta = NULL; struct sta_priv *pstapriv = &padapter->stapriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) return ret; DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(padapter->pnetdev)); _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); phead = &pstapriv->asoc_list; plist = get_next(phead); //free sta asoc_queue while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); plist = get_next(plist); rtw_list_delete(&psta->asoc_list); pstapriv->asoc_list_cnt--; //_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING); //_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); issue_deauth(padapter, bc_addr, WLAN_REASON_DEAUTH_LEAVING); associated_clients_update(padapter, _TRUE); return ret; } /* called > TSR LEVEL for USB or SDIO Interface*/ void sta_info_update(_adapter *padapter, struct sta_info *psta) { int flags = psta->flags; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); //update wmm cap. if(WLAN_STA_WME&flags) psta->qos_option = 1; else psta->qos_option = 0; if(pmlmepriv->qospriv.qos_option == 0) psta->qos_option = 0; #ifdef CONFIG_80211N_HT //update 802.11n ht cap. if(WLAN_STA_HT&flags) { psta->htpriv.ht_option = _TRUE; psta->qos_option = 1; } else { psta->htpriv.ht_option = _FALSE; } if(pmlmepriv->htpriv.ht_option == _FALSE) psta->htpriv.ht_option = _FALSE; #endif #ifdef CONFIG_80211AC_VHT //update 802.11AC vht cap. if(WLAN_STA_VHT&flags) { psta->vhtpriv.vht_option = _TRUE; } else { psta->vhtpriv.vht_option = _FALSE; } if(pmlmepriv->vhtpriv.vht_option == _FALSE) psta->vhtpriv.vht_option = _FALSE; #endif update_sta_info_apmode(padapter, psta); } /* called >= TSR LEVEL for USB or SDIO Interface*/ void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if(psta->state & _FW_LINKED) { pmlmeinfo->FW_sta_info[psta->mac_id].psta = psta; //add ratid add_RATid(padapter, psta, 0);//DM_RATR_STA_INIT } } /* restore hw setting from sw data structures */ void rtw_ap_restore_network(_adapter *padapter) { struct mlme_priv *mlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct sta_priv * pstapriv = &padapter->stapriv; struct sta_info *psta; struct security_priv* psecuritypriv=&(padapter->securitypriv); _irqL irqL; _list *phead, *plist; u8 chk_alive_num = 0; char chk_alive_list[NUM_STA]; int i; rtw_setopmode_cmd(padapter, Ndis802_11APMode,_FALSE); set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); start_bss_network(padapter, (u8*)&mlmepriv->cur_network.network); if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) { /* restore group key, WEP keys is restored in ips_leave() */ rtw_set_key(padapter, psecuritypriv, psecuritypriv->dot118021XGrpKeyid, 0,_FALSE); } _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); phead = &pstapriv->asoc_list; plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { int stainfo_offset; psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); plist = get_next(plist); stainfo_offset = rtw_stainfo_offset(pstapriv, psta); if (stainfo_offset_valid(stainfo_offset)) { chk_alive_list[chk_alive_num++] = stainfo_offset; } } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); for (i = 0; i < chk_alive_num; i++) { psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); if (psta == NULL) { DBG_871X(FUNC_ADPT_FMT" sta_info is null\n", FUNC_ADPT_ARG(padapter)); } else if (psta->state &_FW_LINKED) { rtw_sta_media_status_rpt(padapter, psta, 1); Update_RA_Entry(padapter, psta); //pairwise key /* per sta pairwise key and settings */ if( (padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) { rtw_setstakey_cmd(padapter, psta, _TRUE,_FALSE); } } } } void start_ap_mode(_adapter *padapter) { int i; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct sta_priv *pstapriv = &padapter->stapriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; pmlmepriv->update_bcn = _FALSE; //init_mlme_ap_info(padapter); pmlmeext->bstart_bss = _FALSE; pmlmepriv->num_sta_non_erp = 0; pmlmepriv->num_sta_no_short_slot_time = 0; pmlmepriv->num_sta_no_short_preamble = 0; pmlmepriv->num_sta_ht_no_gf = 0; #ifdef CONFIG_80211N_HT pmlmepriv->num_sta_no_ht = 0; #endif //CONFIG_80211N_HT pmlmepriv->num_sta_ht_20mhz = 0; pmlmepriv->olbc = _FALSE; pmlmepriv->olbc_ht = _FALSE; #ifdef CONFIG_80211N_HT pmlmepriv->ht_op_mode = 0; #endif for(i=0; ista_aid[i] = NULL; /* to avoid memory leak issue, don't set to NULL directly pmlmepriv->wps_beacon_ie = NULL; pmlmepriv->wps_probe_resp_ie = NULL; pmlmepriv->wps_assoc_resp_ie = NULL; pmlmepriv->p2p_beacon_ie = NULL; pmlmepriv->p2p_probe_resp_ie = NULL; */ //for ACL _rtw_init_listhead(&(pacl_list->acl_node_q.queue)); pacl_list->num = 0; pacl_list->mode = 0; for(i = 0; i < NUM_ACL; i++) { _rtw_init_listhead(&pacl_list->aclnode[i].list); pacl_list->aclnode[i].valid = _FALSE; } } void stop_ap_mode(_adapter *padapter) { _irqL irqL; _list *phead, *plist; struct rtw_wlan_acl_node *paclnode; struct sta_info *psta=NULL; struct sta_priv *pstapriv = &padapter->stapriv; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; _queue *pacl_node_q =&pacl_list->acl_node_q; pmlmepriv->update_bcn = _FALSE; pmlmeext->bstart_bss = _FALSE; padapter->netif_up = _FALSE; //_rtw_spinlock_free(&pmlmepriv->bcn_update_lock); //reset and init security priv , this can refine with rtw_reset_securitypriv _rtw_memset((unsigned char *)&padapter->securitypriv, 0, sizeof (struct security_priv)); padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; padapter->securitypriv.ndisencryptstatus = Ndis802_11WEPDisabled; //for ACL _enter_critical_bh(&(pacl_node_q->lock), &irqL); phead = get_list_head(pacl_node_q); plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); plist = get_next(plist); if(paclnode->valid == _TRUE) { paclnode->valid = _FALSE; rtw_list_delete(&paclnode->list); pacl_list->num--; } } _exit_critical_bh(&(pacl_node_q->lock), &irqL); DBG_871X("%s, free acl_node_queue, num=%d\n", __func__, pacl_list->num); rtw_sta_flush(padapter); //free_assoc_sta_resources rtw_free_all_stainfo(padapter); psta = rtw_get_bcmc_stainfo(padapter); //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); rtw_free_stainfo(padapter, psta); //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); rtw_init_bcmc_stainfo(padapter); rtw_free_mlme_priv_ie_data(pmlmepriv); #ifdef CONFIG_BT_COEXIST rtw_btcoex_MediaStatusNotify(padapter, 0); //disconnect #endif } #endif //CONFIG_NATIVEAP_MLME #ifdef CONFIG_CONCURRENT_MODE void concurrent_set_ap_chbw(_adapter *padapter, u8 channel, u8 channel_offset, u8 bwmode) { u8 *p; int ie_len=0; u8 cur_channel, cur_bwmode, cur_ch_offset, change_band; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct HT_info_element *pht_info=NULL; cur_channel = channel; cur_bwmode = bwmode; cur_ch_offset = channel_offset; change_band = _FALSE; p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); if( p && ie_len) { pht_info = (struct HT_info_element *)(p+2); } if(!check_buddy_fwstate(padapter, _FW_LINKED|_FW_UNDER_LINKING|_FW_UNDER_SURVEY)) { set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); } else if(check_buddy_fwstate(padapter, _FW_LINKED)==_TRUE) { _adapter *pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; //To sync cur_channel/cur_bwmode/cur_ch_offset with buddy adapter DBG_871X(ADPT_FMT" is at linked state\n", ADPT_ARG(pbuddy_adapter)); DBG_871X(ADPT_FMT": CH=%d, BW=%d, offset=%d\n", ADPT_ARG(pbuddy_adapter), pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); DBG_871X(ADPT_FMT": CH=%d, BW=%d, offset=%d\n", ADPT_ARG(padapter), cur_channel, cur_bwmode, cur_ch_offset); if((cur_channel <= 14 && pbuddy_mlmeext->cur_channel >= 36) || (cur_channel >= 36 && pbuddy_mlmeext->cur_channel <= 14)) change_band = _TRUE; cur_channel = pbuddy_mlmeext->cur_channel; #ifdef CONFIG_80211AC_VHT if(cur_bwmode == CHANNEL_WIDTH_80) { u8 *pvht_cap_ie, *pvht_op_ie; int vht_cap_ielen, vht_op_ielen; pvht_cap_ie = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_VHTCapability, &vht_cap_ielen, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); pvht_op_ie = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_VHTOperation, &vht_op_ielen, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); if(pbuddy_mlmeext->cur_channel <= 14) // downgrade to 20/40Mhz { //modify vht cap ie if( pvht_cap_ie && vht_cap_ielen) { SET_VHT_CAPABILITY_ELE_SHORT_GI80M(pvht_cap_ie+2, 0); } //modify vht op ie if( pvht_op_ie && vht_op_ielen) { SET_VHT_OPERATION_ELE_CHL_WIDTH(pvht_op_ie+2, 0); //change to 20/40Mhz SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(pvht_op_ie+2, 0); SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(pvht_op_ie+2, 0); //SET_VHT_OPERATION_ELE_BASIC_MCS_SET(p+2, 0xFFFF); cur_bwmode = CHANNEL_WIDTH_40; } } else { u8 center_freq; cur_bwmode = CHANNEL_WIDTH_80; if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40 || pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_80) { cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; } else if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_20) { cur_ch_offset = rtw_get_offset_by_ch(cur_channel); } //modify ht info ie if(pht_info) pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK; switch(cur_ch_offset) { case HAL_PRIME_CHNL_OFFSET_LOWER: if(pht_info) pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE; //cur_bwmode = CHANNEL_WIDTH_40; break; case HAL_PRIME_CHNL_OFFSET_UPPER: if(pht_info) pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW; //cur_bwmode = CHANNEL_WIDTH_40; break; case HAL_PRIME_CHNL_OFFSET_DONT_CARE: default: if(pht_info) pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK; cur_bwmode = CHANNEL_WIDTH_20; cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; break; } //modify vht op ie center_freq = rtw_get_center_ch(cur_channel, cur_bwmode, HAL_PRIME_CHNL_OFFSET_LOWER); if( pvht_op_ie && vht_op_ielen) SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(pvht_op_ie+2, center_freq); set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); } } #endif //CONFIG_80211AC_VHT if(cur_bwmode == CHANNEL_WIDTH_40) { if(pht_info) pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK; if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40 || pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_80) { cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; //to update cur_ch_offset value in beacon if(pht_info) { switch(cur_ch_offset) { case HAL_PRIME_CHNL_OFFSET_LOWER: pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE; break; case HAL_PRIME_CHNL_OFFSET_UPPER: pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW; break; case HAL_PRIME_CHNL_OFFSET_DONT_CARE: default: break; } } } else if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_20) { cur_ch_offset = rtw_get_offset_by_ch(cur_channel); switch(cur_ch_offset) { case HAL_PRIME_CHNL_OFFSET_LOWER: if(pht_info) pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE; cur_bwmode = CHANNEL_WIDTH_40; break; case HAL_PRIME_CHNL_OFFSET_UPPER: if(pht_info) pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW; cur_bwmode = CHANNEL_WIDTH_40; break; case HAL_PRIME_CHNL_OFFSET_DONT_CARE: default: if(pht_info) pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK; cur_bwmode = CHANNEL_WIDTH_20; cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; break; } } set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); } else { set_channel_bwmode(padapter, cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); } // to update channel value in beacon pnetwork->Configuration.DSConfig = cur_channel; p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _DSSET_IE_, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); if(p && ie_len>0) *(p + 2) = cur_channel; if(pht_info) pht_info->primary_channel = cur_channel; } DBG_871X(FUNC_ADPT_FMT" CH=%d, BW=%d, offset=%d\n", FUNC_ADPT_ARG(padapter), cur_channel, cur_bwmode, cur_ch_offset); pmlmeext->cur_channel = cur_channel; pmlmeext->cur_bwmode = cur_bwmode; pmlmeext->cur_ch_offset = cur_ch_offset; //buddy interface band is different from current interface, update ERP, support rate, ext support rate IE if(change_band == _TRUE) change_band_update_ie(padapter, pnetwork); } #endif //CONFIG_CONCURRENT_MODE #endif //CONFIG_AP_MODE rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_beamforming.c000066400000000000000000000677761261122257400220040ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_BEAMFORMING_C_ #include #include #ifdef CONFIG_BEAMFORMING struct beamforming_entry *beamforming_get_entry_by_addr(struct mlme_priv *pmlmepriv, u8* ra,u8* idx) { u8 i = 0; struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) { if( pBeamInfo->beamforming_entry[i].bUsed && (_rtw_memcmp(ra,pBeamInfo->beamforming_entry[i].mac_addr, ETH_ALEN))) { *idx = i; return &(pBeamInfo->beamforming_entry[i]); } } return NULL; } BEAMFORMING_CAP beamforming_get_entry_beam_cap_by_mac_id(PVOID pmlmepriv ,u8 mac_id) { u8 i = 0; struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO((struct mlme_priv *)pmlmepriv); BEAMFORMING_CAP BeamformEntryCap = BEAMFORMING_CAP_NONE; for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) { if( pBeamInfo->beamforming_entry[i].bUsed && (mac_id == pBeamInfo->beamforming_entry[i].mac_id)) { BeamformEntryCap = pBeamInfo->beamforming_entry[i].beamforming_entry_cap; i = BEAMFORMING_ENTRY_NUM; } } return BeamformEntryCap; } struct beamforming_entry *beamforming_get_free_entry(struct mlme_priv *pmlmepriv, u8* idx) { u8 i = 0; struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) { if(pBeamInfo->beamforming_entry[i].bUsed == _FALSE) { *idx = i; return &(pBeamInfo->beamforming_entry[i]); } } return NULL; } struct beamforming_entry *beamforming_add_entry(PADAPTER adapter, u8* ra, u16 aid, u16 mac_id, CHANNEL_WIDTH bw, BEAMFORMING_CAP beamfrom_cap, u8* idx) { struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); struct beamforming_entry *pEntry = beamforming_get_free_entry(pmlmepriv, idx); if(pEntry != NULL) { pEntry->bUsed = _TRUE; pEntry->aid = aid; pEntry->mac_id = mac_id; pEntry->sound_bw = bw; if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { u16 BSSID = ((adapter->eeprompriv.mac_addr[5] & 0xf0) >> 4) ^ (adapter->eeprompriv.mac_addr[5] & 0xf); // BSSID[44:47] xor BSSID[40:43] pEntry->p_aid = (aid + BSSID * 32) & 0x1ff; // (dec(A) + dec(B)*32) mod 512 } else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) { pEntry->p_aid = 0; } else { pEntry->p_aid = ra[5]; // BSSID[39:47] pEntry->p_aid = (pEntry->p_aid << 1) | (ra[4] >> 7 ); } _rtw_memcpy(pEntry->mac_addr, ra, ETH_ALEN); pEntry->bSound = _FALSE; //3 TODO SW/FW sound period pEntry->sound_period = 200; pEntry->beamforming_entry_cap = beamfrom_cap; pEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; pEntry->LogSeq = 0xff; pEntry->LogRetryCnt = 0; pEntry->LogSuccessCnt = 0; pEntry->LogStatusFailCnt = 0; return pEntry; } else return NULL; } BOOLEAN beamforming_remove_entry(struct mlme_priv *pmlmepriv, u8* ra, u8* idx) { struct beamforming_entry *pEntry = beamforming_get_entry_by_addr(pmlmepriv, ra, idx); if(pEntry != NULL) { pEntry->bUsed = _FALSE; pEntry->beamforming_entry_cap = BEAMFORMING_CAP_NONE; pEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; return _TRUE; } else return _FALSE; } /* Used for BeamformingStart_V1 */ void beamforming_dym_ndpa_rate(PADAPTER adapter) { u16 NDPARate = MGN_6M; PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); if(pHalData->dmpriv.MinUndecoratedPWDBForDM > 30) // link RSSI > 30% NDPARate = MGN_24M; else NDPARate = MGN_6M; //BW = CHANNEL_WIDTH_20; NDPARate = NDPARate << 8; rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_RATE, (u8 *)&NDPARate); } void beamforming_dym_period(PADAPTER Adapter) { u8 Idx; BOOLEAN bChangePeriod = _FALSE; u16 SoundPeriod_SW, SoundPeriod_FW; PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); struct beamforming_entry *pBeamformEntry; struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(( &Adapter->mlmepriv)); struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); //3 TODO per-client throughput caculation. if(pdvobjpriv->traffic_stat.cur_tx_tp + pdvobjpriv->traffic_stat.cur_rx_tp > 2) { SoundPeriod_SW = 32*20; SoundPeriod_FW = 2; } else { SoundPeriod_SW = 32*2000; SoundPeriod_FW = 200; } for(Idx = 0; Idx < BEAMFORMING_ENTRY_NUM; Idx++) { pBeamformEntry = pBeamInfo->beamforming_entry+Idx; if(pBeamformEntry->bDefaultCSI) { SoundPeriod_SW = 32*2000; SoundPeriod_FW = 200; } if(pBeamformEntry->beamforming_entry_cap & (BEAMFORMER_CAP_HT_EXPLICIT |BEAMFORMER_CAP_VHT_SU)) { if(pSoundInfo->sound_mode == SOUNDING_FW_VHT_TIMER || pSoundInfo->sound_mode == SOUNDING_FW_HT_TIMER) { if(pBeamformEntry->sound_period != SoundPeriod_FW) { pBeamformEntry->sound_period = SoundPeriod_FW; bChangePeriod = _TRUE; // Only FW sounding need to send H2C packet to change sound period. } } else if(pBeamformEntry->sound_period != SoundPeriod_SW) { pBeamformEntry->sound_period = SoundPeriod_SW; } } } if(bChangePeriod) rtw_hal_set_hwreg(Adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&Idx); } u32 beamforming_get_report_frame(PADAPTER Adapter, union recv_frame *precv_frame) { u32 ret = _SUCCESS; struct beamforming_entry *pBeamformEntry = NULL; struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); u8 *pframe = precv_frame->u.hdr.rx_data; u32 frame_len = precv_frame->u.hdr.len; u8 *ta; u8 idx, offset; //DBG_871X("beamforming_get_report_frame\n"); //Memory comparison to see if CSI report is the same with previous one ta = GetAddr2Ptr(pframe); pBeamformEntry = beamforming_get_entry_by_addr(pmlmepriv, ta, &idx); if(pBeamformEntry->beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) offset = 31; //24+(1+1+3)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2) else if(pBeamformEntry->beamforming_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT) offset = 34; //24+(1+1+6)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2) else return ret; //DBG_871X("%s MacId %d offset=%d\n", __FUNCTION__, pBeamformEntry->mac_id, offset); if(_rtw_memcmp(pBeamformEntry->PreCsiReport + offset, pframe+offset, frame_len-offset) == _FALSE) { pBeamformEntry->DefaultCsiCnt = 0; //DBG_871X("%s CSI report is NOT the same with previos one\n", __FUNCTION__); } else { pBeamformEntry->DefaultCsiCnt ++; //DBG_871X("%s CSI report is the SAME with previos one\n", __FUNCTION__); } _rtw_memcpy(&pBeamformEntry->PreCsiReport, pframe, frame_len); pBeamformEntry->bDefaultCSI = _FALSE; if(pBeamformEntry->DefaultCsiCnt > 20) pBeamformEntry->bDefaultCSI = _TRUE; else pBeamformEntry->bDefaultCSI = _FALSE; return ret; } void beamforming_get_ndpa_frame(PADAPTER Adapter, union recv_frame *precv_frame) { u8 *ta; u8 idx, Sequence; u8 *pframe = precv_frame->u.hdr.rx_data; struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); struct beamforming_entry *pBeamformEntry = NULL; //DBG_871X("beamforming_get_ndpa_frame\n"); if(IS_HARDWARE_TYPE_8812(Adapter) == _FALSE) return; else if(GetFrameSubType(pframe) != WIFI_NDPA) return; ta = GetAddr2Ptr(pframe); // Remove signaling TA. ta[0] = ta[0] & 0xFE; pBeamformEntry = beamforming_get_entry_by_addr(pmlmepriv, ta, &idx); if(pBeamformEntry == NULL) return; else if(!(pBeamformEntry->beamforming_entry_cap & BEAMFORMEE_CAP_VHT_SU)) return; else if(pBeamformEntry->LogSuccessCnt > 1) return; Sequence = (pframe[16]) >> 2; if(pBeamformEntry->LogSeq != Sequence) { /* Previous frame doesn't retry when meet new sequence number */ if(pBeamformEntry->LogSeq != 0xff && pBeamformEntry->LogRetryCnt == 0) pBeamformEntry->LogSuccessCnt++; pBeamformEntry->LogSeq = Sequence; pBeamformEntry->LogRetryCnt = 0; } else { if(pBeamformEntry->LogRetryCnt == 3) beamforming_wk_cmd(Adapter, BEAMFORMING_CTRL_SOUNDING_CLK, NULL, 0, 1); pBeamformEntry->LogRetryCnt++; } DBG_871X("%s LogSeq %d LogRetryCnt %d LogSuccessCnt %d\n", __FUNCTION__, pBeamformEntry->LogSeq, pBeamformEntry->LogRetryCnt, pBeamformEntry->LogSuccessCnt); } BOOLEAN issue_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; struct rtw_ieee80211_hdr *pwlanhdr; struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; u8 *pframe; u16 *fctrl; u16 duration = 0; u8 aSifsTime = 0; if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { return _FALSE; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(Adapter, pattrib); if (qidx == BCN_QUEUE_INX) pattrib->qsel = QSLT_BEACON; pattrib->rate = MGN_MCS8; pattrib->bwmode = bw; pattrib->order = 1; pattrib->subtype = WIFI_ACTION_NOACK; _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; fctrl = &pwlanhdr->frame_ctl; *(fctrl) = 0; SetOrderBit(pframe); SetFrameSubType(pframe, WIFI_ACTION_NOACK); _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(Adapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); if( pmlmeext->cur_wireless_mode == WIRELESS_11B) aSifsTime = 10; else aSifsTime = 16; duration = 2*aSifsTime + 40; if(bw == CHANNEL_WIDTH_40) duration+= 87; else duration+= 180; SetDuration(pframe, duration); //HT control field SET_HT_CTRL_CSI_STEERING(pframe+24, 3); SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe+24, 1); _rtw_memcpy(pframe+28, ActionHdr, 4); pattrib->pktlen = 32; pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(Adapter, pmgntframe); return _TRUE; } BOOLEAN beamforming_send_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx) { return issue_ht_ndpa_packet(Adapter, ra, bw, qidx); } BOOLEAN issue_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH bw, u8 qidx) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; struct rtw_ieee80211_hdr *pwlanhdr; struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); struct rtw_ndpa_sta_info sta_info; u8 *pframe; u16 *fctrl; u16 duration = 0; u8 sequence = 0, aSifsTime = 0; if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { return _FALSE; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(Adapter, pattrib); if (qidx == BCN_QUEUE_INX) pattrib->qsel = QSLT_BEACON; pattrib->rate = MGN_VHT2SS_MCS0; pattrib->bwmode = bw; pattrib->subtype = WIFI_NDPA; _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; fctrl = &pwlanhdr->frame_ctl; *(fctrl) = 0; SetFrameSubType(pframe, WIFI_NDPA); _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(Adapter->eeprompriv)), ETH_ALEN); if (IsSupported5G(pmlmeext->cur_wireless_mode) || IsSupportedHT(pmlmeext->cur_wireless_mode)) aSifsTime = 16; else aSifsTime = 10; duration = 2*aSifsTime + 44; if(bw == CHANNEL_WIDTH_80) duration += 40; else if(bw == CHANNEL_WIDTH_40) duration+= 87; else duration+= 180; SetDuration(pframe, duration); sequence = pBeamInfo->sounding_sequence<< 2; if (pBeamInfo->sounding_sequence >= 0x3f) pBeamInfo->sounding_sequence = 0; else pBeamInfo->sounding_sequence++; _rtw_memcpy(pframe+16, &sequence,1); if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) aid = 0; sta_info.aid = aid; sta_info.feedback_type = 0; sta_info.nc_index= 0; _rtw_memcpy(pframe+17, (u8 *)&sta_info, 2); pattrib->pktlen = 19; pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(Adapter, pmgntframe); return _TRUE; } BOOLEAN beamforming_send_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH bw, u8 qidx) { return issue_vht_ndpa_packet(Adapter, ra, aid, bw, qidx); } BOOLEAN beamfomring_bSounding(struct beamforming_info *pBeamInfo) { BOOLEAN bSounding = _FALSE; if(( beamforming_get_beamform_cap(pBeamInfo) & BEAMFORMER_CAP) == 0) bSounding = _FALSE; else bSounding = _TRUE; return bSounding; } u8 beamforming_sounding_idx(struct beamforming_info *pBeamInfo) { u8 idx = 0; u8 i; for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) { if (pBeamInfo->beamforming_entry[i].bUsed && (_FALSE == pBeamInfo->beamforming_entry[i].bSound)) { idx = i; break; } } return idx; } SOUNDING_MODE beamforming_sounding_mode(struct beamforming_info *pBeamInfo, u8 idx) { struct beamforming_entry BeamEntry = pBeamInfo->beamforming_entry[idx]; SOUNDING_MODE mode; if(BeamEntry.beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) { mode = SOUNDING_FW_VHT_TIMER; } else if(BeamEntry.beamforming_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT) { mode = SOUNDING_FW_HT_TIMER; } else { mode = SOUNDING_STOP_All_TIMER; } return mode; } u16 beamforming_sounding_time(struct beamforming_info *pBeamInfo, SOUNDING_MODE mode, u8 idx) { u16 sounding_time = 0xffff; struct beamforming_entry BeamEntry = pBeamInfo->beamforming_entry[idx]; sounding_time = BeamEntry.sound_period; return sounding_time; } CHANNEL_WIDTH beamforming_sounding_bw(struct beamforming_info *pBeamInfo, SOUNDING_MODE mode, u8 idx) { CHANNEL_WIDTH sounding_bw = CHANNEL_WIDTH_20; struct beamforming_entry BeamEntry = pBeamInfo->beamforming_entry[idx]; sounding_bw = BeamEntry.sound_bw; return sounding_bw; } BOOLEAN beamforming_select_beam_entry(struct beamforming_info *pBeamInfo) { struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); pSoundInfo->sound_idx = beamforming_sounding_idx(pBeamInfo); if(pSoundInfo->sound_idx < BEAMFORMING_ENTRY_NUM) pSoundInfo->sound_mode = beamforming_sounding_mode(pBeamInfo, pSoundInfo->sound_idx); else pSoundInfo->sound_mode = SOUNDING_STOP_All_TIMER; if(SOUNDING_STOP_All_TIMER == pSoundInfo->sound_mode) { return _FALSE; } else { pSoundInfo->sound_bw = beamforming_sounding_bw(pBeamInfo, pSoundInfo->sound_mode, pSoundInfo->sound_idx ); pSoundInfo->sound_period = beamforming_sounding_time(pBeamInfo, pSoundInfo->sound_mode, pSoundInfo->sound_idx ); return _TRUE; } } BOOLEAN beamforming_start_fw(PADAPTER adapter, u8 idx) { u8 *RA = NULL; struct beamforming_entry *pEntry; BOOLEAN ret = _TRUE; struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); pEntry = &(pBeamInfo->beamforming_entry[idx]); if(pEntry->bUsed == _FALSE) { DBG_871X("Skip Beamforming, no entry for Idx =%d\n", idx); return _FALSE; } pEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSING; pEntry->bSound = _TRUE; rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&idx); return _TRUE; } void beamforming_end_fw(PADAPTER adapter) { u8 idx = 0; rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&idx); DBG_871X("%s\n", __FUNCTION__); } BOOLEAN beamforming_start_period(PADAPTER adapter) { BOOLEAN ret = _TRUE; struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); beamforming_dym_ndpa_rate(adapter); beamforming_select_beam_entry(pBeamInfo); if(pSoundInfo->sound_mode == SOUNDING_FW_VHT_TIMER || pSoundInfo->sound_mode == SOUNDING_FW_HT_TIMER) { ret = beamforming_start_fw(adapter, pSoundInfo->sound_idx); } else { ret = _FALSE; } DBG_871X("%s Idx %d Mode %d BW %d Period %d\n", __FUNCTION__, pSoundInfo->sound_idx, pSoundInfo->sound_mode, pSoundInfo->sound_bw, pSoundInfo->sound_period); return ret; } void beamforming_end_period(PADAPTER adapter) { u8 idx = 0; struct beamforming_entry *pBeamformEntry; struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); struct sounding_info *pSoundInfo = &(pBeamInfo->sounding_info); if(pSoundInfo->sound_mode == SOUNDING_FW_VHT_TIMER || pSoundInfo->sound_mode == SOUNDING_FW_HT_TIMER) { beamforming_end_fw(adapter); } } void beamforming_notify(PADAPTER adapter) { BOOLEAN bSounding = _FALSE; struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(&(adapter->mlmepriv)); bSounding = beamfomring_bSounding(pBeamInfo); if(pBeamInfo->beamforming_state == BEAMFORMING_STATE_IDLE) { if(bSounding) { if(beamforming_start_period(adapter) == _TRUE) pBeamInfo->beamforming_state = BEAMFORMING_STATE_START; } } else if(pBeamInfo->beamforming_state == BEAMFORMING_STATE_START) { if(bSounding) { if(beamforming_start_period(adapter) == _FALSE) pBeamInfo->beamforming_state = BEAMFORMING_STATE_END; } else { beamforming_end_period(adapter); pBeamInfo->beamforming_state = BEAMFORMING_STATE_END; } } else if(pBeamInfo->beamforming_state == BEAMFORMING_STATE_END) { if(bSounding) { if(beamforming_start_period(adapter) == _TRUE) pBeamInfo->beamforming_state = BEAMFORMING_STATE_START; } } else { DBG_871X("%s BeamformState %d\n", __FUNCTION__, pBeamInfo->beamforming_state); } DBG_871X("%s BeamformState %d bSounding %d\n", __FUNCTION__, pBeamInfo->beamforming_state, bSounding); } BOOLEAN beamforming_init_entry(PADAPTER adapter, struct sta_info *psta, u8* idx) { struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); struct ht_priv *phtpriv = &(pmlmepriv->htpriv); #ifdef CONFIG_80211AC_VHT struct vht_priv *pvhtpriv = &(pmlmepriv->vhtpriv); #endif struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct beamforming_entry *pBeamformEntry = NULL; u8 *ra; u16 aid, mac_id; u8 wireless_mode; CHANNEL_WIDTH bw = CHANNEL_WIDTH_20; BEAMFORMING_CAP beamform_cap = BEAMFORMING_CAP_NONE; // The current setting does not support Beaforming if (0 == phtpriv->beamform_cap #ifdef CONFIG_80211AC_VHT && 0 == pvhtpriv->beamform_cap #endif ) { DBG_871X("The configuration disabled Beamforming! Skip...\n"); return _FALSE; } aid = psta->aid; ra = psta->hwaddr; mac_id = psta->mac_id; wireless_mode = psta->wireless_mode; bw = psta->bw_mode; if (IsSupportedHT(wireless_mode) || IsSupportedVHT(wireless_mode)) { //3 // HT u8 cur_beamform; cur_beamform = psta->htpriv.beamform_cap; // We are Beamformee because the STA is Beamformer if(TEST_FLAG(cur_beamform, BEAMFORMING_HT_BEAMFORMER_ENABLE)) beamform_cap =(BEAMFORMING_CAP)(beamform_cap |BEAMFORMEE_CAP_HT_EXPLICIT); // We are Beamformer because the STA is Beamformee if(TEST_FLAG(cur_beamform, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) beamform_cap =(BEAMFORMING_CAP)(beamform_cap | BEAMFORMER_CAP_HT_EXPLICIT); #ifdef CONFIG_80211AC_VHT if (IsSupportedVHT(wireless_mode)) { //3 // VHT cur_beamform = psta->vhtpriv.beamform_cap; // We are Beamformee because the STA is Beamformer if(TEST_FLAG(cur_beamform, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) beamform_cap =(BEAMFORMING_CAP)(beamform_cap |BEAMFORMEE_CAP_VHT_SU); // We are Beamformer because the STA is Beamformee if(TEST_FLAG(cur_beamform, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) beamform_cap =(BEAMFORMING_CAP)(beamform_cap |BEAMFORMER_CAP_VHT_SU); } #endif //CONFIG_80211AC_VHT if(beamform_cap == BEAMFORMING_CAP_NONE) return _FALSE; DBG_871X("Beamforming Config Capability = 0x%02X\n", beamform_cap); pBeamformEntry = beamforming_get_entry_by_addr(pmlmepriv, ra, idx); if (pBeamformEntry == NULL) { pBeamformEntry = beamforming_add_entry(adapter, ra, aid, mac_id, bw, beamform_cap, idx); if(pBeamformEntry == NULL) return _FALSE; else pBeamformEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING; } else { // Entry has been created. If entry is initialing or progressing then errors occur. if (pBeamformEntry->beamforming_entry_state != BEAMFORMING_ENTRY_STATE_INITIALIZED && pBeamformEntry->beamforming_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSED) { DBG_871X("Error State of Beamforming"); return _FALSE; } else { pBeamformEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING; } } pBeamformEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED; DBG_871X("%s Idx %d\n", __FUNCTION__, *idx); } else { return _FALSE; } return _SUCCESS; } void beamforming_deinit_entry(PADAPTER adapter, u8* ra) { u8 idx = 0; struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); if(beamforming_remove_entry(pmlmepriv, ra, &idx) == _TRUE) { rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_LEAVE, (u8 *)&idx); } DBG_871X("%s Idx %d\n", __FUNCTION__, idx); } void beamforming_reset(PADAPTER adapter) { u8 idx = 0; struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); for(idx = 0; idx < BEAMFORMING_ENTRY_NUM; idx++) { if(pBeamInfo->beamforming_entry[idx].bUsed == _TRUE) { pBeamInfo->beamforming_entry[idx].bUsed = _FALSE; pBeamInfo->beamforming_entry[idx].beamforming_entry_cap = BEAMFORMING_CAP_NONE; pBeamInfo->beamforming_entry[idx].beamforming_entry_state= BEAMFORMING_ENTRY_STATE_UNINITIALIZE; rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_LEAVE, (u8 *)&idx); } } DBG_871X("%s\n", __FUNCTION__); } void beamforming_sounding_fail(PADAPTER Adapter) { struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); struct beamforming_entry *pEntry = &(pBeamInfo->beamforming_entry[pBeamInfo->beamforming_cur_idx]); pEntry->bSound = _FALSE; rtw_hal_set_hwreg(Adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&pBeamInfo->beamforming_cur_idx); beamforming_deinit_entry(Adapter, pEntry->mac_addr); } void beamforming_check_sounding_success(PADAPTER Adapter,BOOLEAN status) { struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); struct beamforming_entry *pEntry = &(pBeamInfo->beamforming_entry[pBeamInfo->beamforming_cur_idx]); if(status == 1) { pEntry->LogStatusFailCnt = 0; } else { pEntry->LogStatusFailCnt++; DBG_871X("%s LogStatusFailCnt %d\n", __FUNCTION__, pEntry->LogStatusFailCnt); } if(pEntry->LogStatusFailCnt > 20) { DBG_871X("%s LogStatusFailCnt > 20, Stop SOUNDING\n", __FUNCTION__); //pEntry->bSound = _FALSE; //rtw_hal_set_hwreg(Adapter, HW_VAR_SOUNDING_FW_NDPA, (u8 *)&pBeamInfo->beamforming_cur_idx); //beamforming_deinit_entry(Adapter, pEntry->mac_addr); beamforming_wk_cmd(Adapter, BEAMFORMING_CTRL_SOUNDING_FAIL, NULL, 0, 1); } } void beamforming_enter(PADAPTER adapter, PVOID psta) { u8 idx = 0xff; if(beamforming_init_entry(adapter, (struct sta_info *)psta, &idx)) rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_ENTER, (u8 *)&idx); //DBG_871X("%s Idx %d\n", __FUNCTION__, idx); } void beamforming_leave(PADAPTER adapter,u8* ra) { if(ra == NULL) beamforming_reset(adapter); else beamforming_deinit_entry(adapter, ra); beamforming_notify(adapter); } BEAMFORMING_CAP beamforming_get_beamform_cap(struct beamforming_info *pBeamInfo) { u8 i; BOOLEAN bSelfBeamformer = _FALSE; BOOLEAN bSelfBeamformee = _FALSE; struct beamforming_entry beamforming_entry; BEAMFORMING_CAP beamform_cap = BEAMFORMING_CAP_NONE; for(i = 0; i < BEAMFORMING_ENTRY_NUM; i++) { beamforming_entry = pBeamInfo->beamforming_entry[i]; if(beamforming_entry.bUsed) { if( (beamforming_entry.beamforming_entry_cap & BEAMFORMEE_CAP_VHT_SU) || (beamforming_entry.beamforming_entry_cap & BEAMFORMEE_CAP_HT_EXPLICIT)) bSelfBeamformee = _TRUE; if( (beamforming_entry.beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) || (beamforming_entry.beamforming_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT)) bSelfBeamformer = _TRUE; } if(bSelfBeamformer && bSelfBeamformee) i = BEAMFORMING_ENTRY_NUM; } if(bSelfBeamformer) beamform_cap |= BEAMFORMER_CAP; if(bSelfBeamformee) beamform_cap |= BEAMFORMEE_CAP; return beamform_cap; } void beamforming_watchdog(PADAPTER Adapter) { struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(( &(Adapter->mlmepriv))); if(pBeamInfo->beamforming_state != BEAMFORMING_STATE_START) return; beamforming_dym_period(Adapter); beamforming_dym_ndpa_rate(Adapter); } void beamforming_wk_hdl(_adapter *padapter, u8 type, u8 *pbuf) { _func_enter_; switch(type) { case BEAMFORMING_CTRL_ENTER: beamforming_enter(padapter, (PVOID)pbuf); break; case BEAMFORMING_CTRL_LEAVE: beamforming_leave(padapter, pbuf); break; case BEAMFORMING_CTRL_SOUNDING_FAIL: beamforming_sounding_fail(padapter); break; case BEAMFORMING_CTRL_SOUNDING_CLK: rtw_hal_set_hwreg(padapter, HW_VAR_SOUNDING_CLK, NULL); break; default: break; } _func_exit_; } u8 beamforming_wk_cmd(_adapter*padapter, s32 type, u8 *pbuf, s32 size, u8 enqueue) { struct cmd_obj *ph2c; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; _func_enter_; if(enqueue) { u8 *wk_buf; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); if(pdrvextra_cmd_parm==NULL){ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } if (pbuf != NULL) { wk_buf = rtw_zmalloc(size); if(wk_buf==NULL){ rtw_mfree((u8 *)ph2c, sizeof(struct cmd_obj)); rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); res= _FAIL; goto exit; } _rtw_memcpy(wk_buf, pbuf, size); } else { wk_buf = NULL; size = 0; } pdrvextra_cmd_parm->ec_id = BEAMFORMING_WK_CID; pdrvextra_cmd_parm->type = type; pdrvextra_cmd_parm->size = size; pdrvextra_cmd_parm->pbuf = wk_buf; init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); res = rtw_enqueue_cmd(pcmdpriv, ph2c); } else { beamforming_wk_hdl(padapter, type, pbuf); } exit: _func_exit_; return res; } #endif //CONFIG_BEAMFORMING rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_br_ext.c000066400000000000000000001325671261122257400207700ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_BR_EXT_C_ #ifdef __KERNEL__ #include #include #include #include #include #include #endif #if 1 // rtw_wifi_driver #include #else // rtw_wifi_driver #include "./8192cd_cfg.h" #ifndef __KERNEL__ #include "./sys-support.h" #endif #include "./8192cd.h" #include "./8192cd_headers.h" #include "./8192cd_br_ext.h" #include "./8192cd_debug.h" #endif // rtw_wifi_driver #ifdef CL_IPV6_PASS #ifdef __KERNEL__ #include #include #include #include #endif #endif #ifdef CONFIG_BR_EXT //#define BR_EXT_DEBUG #define NAT25_IPV4 01 #define NAT25_IPV6 02 #define NAT25_IPX 03 #define NAT25_APPLE 04 #define NAT25_PPPOE 05 #define RTL_RELAY_TAG_LEN (ETH_ALEN) #define TAG_HDR_LEN 4 #define MAGIC_CODE 0x8186 #define MAGIC_CODE_LEN 2 #define WAIT_TIME_PPPOE 5 // waiting time for pppoe server in sec /*----------------------------------------------------------------- How database records network address: 0 1 2 3 4 5 6 7 8 9 10 |----|----|----|----|----|----|----|----|----|----|----| IPv4 |type| | IP addr | IPX |type| Net addr | Node addr | IPX |type| Net addr |Sckt addr| Apple |type| Network |node| PPPoE |type| SID | AC MAC | -----------------------------------------------------------------*/ //Find a tag in pppoe frame and return the pointer static __inline__ unsigned char *__nat25_find_pppoe_tag(struct pppoe_hdr *ph, unsigned short type) { unsigned char *cur_ptr, *start_ptr; unsigned short tagLen, tagType; start_ptr = cur_ptr = (unsigned char *)ph->tag; while((cur_ptr - start_ptr) < ntohs(ph->length)) { // prevent un-alignment access tagType = (unsigned short)((cur_ptr[0] << 8) + cur_ptr[1]); tagLen = (unsigned short)((cur_ptr[2] << 8) + cur_ptr[3]); if(tagType == type) return cur_ptr; cur_ptr = cur_ptr + TAG_HDR_LEN + tagLen; } return 0; } static __inline__ int __nat25_add_pppoe_tag(struct sk_buff *skb, struct pppoe_tag *tag) { struct pppoe_hdr *ph = (struct pppoe_hdr *)(skb->data + ETH_HLEN); int data_len; data_len = tag->tag_len + TAG_HDR_LEN; if (skb_tailroom(skb) < data_len) { _DEBUG_ERR("skb_tailroom() failed in add SID tag!\n"); return -1; } skb_put(skb, data_len); // have a room for new tag memmove(((unsigned char *)ph->tag + data_len), (unsigned char *)ph->tag, ntohs(ph->length)); ph->length = htons(ntohs(ph->length) + data_len); memcpy((unsigned char *)ph->tag, tag, data_len); return data_len; } static int skb_pull_and_merge(struct sk_buff *skb, unsigned char *src, int len) { int tail_len; unsigned long end, tail; if ((src+len) > skb_tail_pointer(skb) || skb->len < len) return -1; tail = (unsigned long)skb_tail_pointer(skb); end = (unsigned long)src+len; if (tail < end) return -1; tail_len = (int)(tail-end); if (tail_len > 0) memmove(src, src+len, tail_len); skb_trim(skb, skb->len-len); return 0; } static __inline__ unsigned long __nat25_timeout(_adapter *priv) { unsigned long timeout; timeout = jiffies - NAT25_AGEING_TIME*HZ; return timeout; } static __inline__ int __nat25_has_expired(_adapter *priv, struct nat25_network_db_entry *fdb) { if(time_before_eq(fdb->ageing_timer, __nat25_timeout(priv))) return 1; return 0; } static __inline__ void __nat25_generate_ipv4_network_addr(unsigned char *networkAddr, unsigned int *ipAddr) { memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); networkAddr[0] = NAT25_IPV4; memcpy(networkAddr+7, (unsigned char *)ipAddr, 4); } static __inline__ void __nat25_generate_ipx_network_addr_with_node(unsigned char *networkAddr, unsigned int *ipxNetAddr, unsigned char *ipxNodeAddr) { memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); networkAddr[0] = NAT25_IPX; memcpy(networkAddr+1, (unsigned char *)ipxNetAddr, 4); memcpy(networkAddr+5, ipxNodeAddr, 6); } static __inline__ void __nat25_generate_ipx_network_addr_with_socket(unsigned char *networkAddr, unsigned int *ipxNetAddr, unsigned short *ipxSocketAddr) { memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); networkAddr[0] = NAT25_IPX; memcpy(networkAddr+1, (unsigned char *)ipxNetAddr, 4); memcpy(networkAddr+5, (unsigned char *)ipxSocketAddr, 2); } static __inline__ void __nat25_generate_apple_network_addr(unsigned char *networkAddr, unsigned short *network, unsigned char *node) { memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); networkAddr[0] = NAT25_APPLE; memcpy(networkAddr+1, (unsigned char *)network, 2); networkAddr[3] = *node; } static __inline__ void __nat25_generate_pppoe_network_addr(unsigned char *networkAddr, unsigned char *ac_mac, unsigned short *sid) { memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); networkAddr[0] = NAT25_PPPOE; memcpy(networkAddr+1, (unsigned char *)sid, 2); memcpy(networkAddr+3, (unsigned char *)ac_mac, 6); } #ifdef CL_IPV6_PASS static void __nat25_generate_ipv6_network_addr(unsigned char *networkAddr, unsigned int *ipAddr) { memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); networkAddr[0] = NAT25_IPV6; memcpy(networkAddr+1, (unsigned char *)ipAddr, 16); } static unsigned char *scan_tlv(unsigned char *data, int len, unsigned char tag, unsigned char len8b) { while (len > 0) { if (*data == tag && *(data+1) == len8b && len >= len8b*8) return data+2; len -= (*(data+1))*8; data += (*(data+1))*8; } return NULL; } static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char *replace_mac) { struct icmp6hdr *icmphdr = (struct icmp6hdr *)data; unsigned char *mac; if (icmphdr->icmp6_type == NDISC_ROUTER_SOLICITATION) { if (len >= 8) { mac = scan_tlv(&data[8], len-8, 1, 1); if (mac) { DBG_871X("Router Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", mac[0],mac[1],mac[2],mac[3],mac[4],mac[5], replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]); memcpy(mac, replace_mac, 6); return 1; } } } else if (icmphdr->icmp6_type == NDISC_ROUTER_ADVERTISEMENT) { if (len >= 16) { mac = scan_tlv(&data[16], len-16, 1, 1); if (mac) { DBG_871X("Router Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", mac[0],mac[1],mac[2],mac[3],mac[4],mac[5], replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]); memcpy(mac, replace_mac, 6); return 1; } } } else if (icmphdr->icmp6_type == NDISC_NEIGHBOUR_SOLICITATION) { if (len >= 24) { mac = scan_tlv(&data[24], len-24, 1, 1); if (mac) { DBG_871X("Neighbor Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", mac[0],mac[1],mac[2],mac[3],mac[4],mac[5], replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]); memcpy(mac, replace_mac, 6); return 1; } } } else if (icmphdr->icmp6_type == NDISC_NEIGHBOUR_ADVERTISEMENT) { if (len >= 24) { mac = scan_tlv(&data[24], len-24, 2, 1); if (mac) { DBG_871X("Neighbor Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", mac[0],mac[1],mac[2],mac[3],mac[4],mac[5], replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]); memcpy(mac, replace_mac, 6); return 1; } } } else if (icmphdr->icmp6_type == NDISC_REDIRECT) { if (len >= 40) { mac = scan_tlv(&data[40], len-40, 2, 1); if (mac) { DBG_871X("Redirect, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", mac[0],mac[1],mac[2],mac[3],mac[4],mac[5], replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]); memcpy(mac, replace_mac, 6); return 1; } } } return 0; } static void convert_ipv6_mac_to_mc(struct sk_buff *skb) { struct ipv6hdr *iph = (struct ipv6hdr *)(skb->data + ETH_HLEN); unsigned char *dst_mac = skb->data; //dst_mac[0] = 0xff; //dst_mac[1] = 0xff; /*modified by qinjunjie,ipv6 multicast address ix 0x33-33-xx-xx-xx-xx*/ dst_mac[0] = 0x33; dst_mac[1] = 0x33; memcpy(&dst_mac[2], &iph->daddr.s6_addr32[3], 4); #if defined(__LINUX_2_6__) /*modified by qinjunjie,warning:should not remove next line*/ skb->pkt_type = PACKET_MULTICAST; #endif } #endif /* CL_IPV6_PASS */ static __inline__ int __nat25_network_hash(unsigned char *networkAddr) { if(networkAddr[0] == NAT25_IPV4) { unsigned long x; x = networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10]; return x & (NAT25_HASH_SIZE - 1); } else if(networkAddr[0] == NAT25_IPX) { unsigned long x; x = networkAddr[1] ^ networkAddr[2] ^ networkAddr[3] ^ networkAddr[4] ^ networkAddr[5] ^ networkAddr[6] ^ networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10]; return x & (NAT25_HASH_SIZE - 1); } else if(networkAddr[0] == NAT25_APPLE) { unsigned long x; x = networkAddr[1] ^ networkAddr[2] ^ networkAddr[3]; return x & (NAT25_HASH_SIZE - 1); } else if(networkAddr[0] == NAT25_PPPOE) { unsigned long x; x = networkAddr[0] ^ networkAddr[1] ^ networkAddr[2] ^ networkAddr[3] ^ networkAddr[4] ^ networkAddr[5] ^ networkAddr[6] ^ networkAddr[7] ^ networkAddr[8]; return x & (NAT25_HASH_SIZE - 1); } #ifdef CL_IPV6_PASS else if(networkAddr[0] == NAT25_IPV6) { unsigned long x; x = networkAddr[1] ^ networkAddr[2] ^ networkAddr[3] ^ networkAddr[4] ^ networkAddr[5] ^ networkAddr[6] ^ networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10] ^ networkAddr[11] ^ networkAddr[12] ^ networkAddr[13] ^ networkAddr[14] ^ networkAddr[15] ^ networkAddr[16]; return x & (NAT25_HASH_SIZE - 1); } #endif else { unsigned long x = 0; int i; for (i=0; ibr_ext_lock, &irqL); ent->next_hash = priv->nethash[hash]; if(ent->next_hash != NULL) ent->next_hash->pprev_hash = &ent->next_hash; priv->nethash[hash] = ent; ent->pprev_hash = &priv->nethash[hash]; //_exit_critical_bh(&priv->br_ext_lock, &irqL); } static __inline__ void __network_hash_unlink(struct nat25_network_db_entry *ent) { // Caller must _enter_critical_bh already! //_irqL irqL; //_enter_critical_bh(&priv->br_ext_lock, &irqL); *(ent->pprev_hash) = ent->next_hash; if(ent->next_hash != NULL) ent->next_hash->pprev_hash = ent->pprev_hash; ent->next_hash = NULL; ent->pprev_hash = NULL; //_exit_critical_bh(&priv->br_ext_lock, &irqL); } static int __nat25_db_network_lookup_and_replace(_adapter *priv, struct sk_buff *skb, unsigned char *networkAddr) { struct nat25_network_db_entry *db; _irqL irqL; _enter_critical_bh(&priv->br_ext_lock, &irqL); db = priv->nethash[__nat25_network_hash(networkAddr)]; while (db != NULL) { if(!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN)) { if(!__nat25_has_expired(priv, db)) { // replace the destination mac address memcpy(skb->data, db->macAddr, ETH_ALEN); atomic_inc(&db->use_count); #ifdef CL_IPV6_PASS DBG_871X("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x" "%02x%02x%02x%02x%02x%02x\n", db->macAddr[0], db->macAddr[1], db->macAddr[2], db->macAddr[3], db->macAddr[4], db->macAddr[5], db->networkAddr[0], db->networkAddr[1], db->networkAddr[2], db->networkAddr[3], db->networkAddr[4], db->networkAddr[5], db->networkAddr[6], db->networkAddr[7], db->networkAddr[8], db->networkAddr[9], db->networkAddr[10], db->networkAddr[11], db->networkAddr[12], db->networkAddr[13], db->networkAddr[14], db->networkAddr[15], db->networkAddr[16]); #else DBG_871X("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", db->macAddr[0], db->macAddr[1], db->macAddr[2], db->macAddr[3], db->macAddr[4], db->macAddr[5], db->networkAddr[0], db->networkAddr[1], db->networkAddr[2], db->networkAddr[3], db->networkAddr[4], db->networkAddr[5], db->networkAddr[6], db->networkAddr[7], db->networkAddr[8], db->networkAddr[9], db->networkAddr[10]); #endif } _exit_critical_bh(&priv->br_ext_lock, &irqL); return 1; } db = db->next_hash; } _exit_critical_bh(&priv->br_ext_lock, &irqL); return 0; } static void __nat25_db_network_insert(_adapter *priv, unsigned char *macAddr, unsigned char *networkAddr) { struct nat25_network_db_entry *db; int hash; _irqL irqL; _enter_critical_bh(&priv->br_ext_lock, &irqL); hash = __nat25_network_hash(networkAddr); db = priv->nethash[hash]; while (db != NULL) { if(!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN)) { memcpy(db->macAddr, macAddr, ETH_ALEN); db->ageing_timer = jiffies; _exit_critical_bh(&priv->br_ext_lock, &irqL); return; } db = db->next_hash; } db = (struct nat25_network_db_entry *) rtw_malloc(sizeof(*db)); if(db == NULL) { _exit_critical_bh(&priv->br_ext_lock, &irqL); return; } memcpy(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN); memcpy(db->macAddr, macAddr, ETH_ALEN); atomic_set(&db->use_count, 1); db->ageing_timer = jiffies; __network_hash_link(priv, db, hash); _exit_critical_bh(&priv->br_ext_lock, &irqL); } static void __nat25_db_print(_adapter *priv) { _irqL irqL; _enter_critical_bh(&priv->br_ext_lock, &irqL); #ifdef BR_EXT_DEBUG static int counter = 0; int i, j; struct nat25_network_db_entry *db; counter++; if((counter % 16) != 0) return; for(i=0, j=0; inethash[i]; while (db != NULL) { #ifdef CL_IPV6_PASS panic_printk("NAT25: DB(%d) H(%02d) C(%d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x" "%02x%02x%02x%02x%02x%02x\n", j, i, atomic_read(&db->use_count), db->macAddr[0], db->macAddr[1], db->macAddr[2], db->macAddr[3], db->macAddr[4], db->macAddr[5], db->networkAddr[0], db->networkAddr[1], db->networkAddr[2], db->networkAddr[3], db->networkAddr[4], db->networkAddr[5], db->networkAddr[6], db->networkAddr[7], db->networkAddr[8], db->networkAddr[9], db->networkAddr[10], db->networkAddr[11], db->networkAddr[12], db->networkAddr[13], db->networkAddr[14], db->networkAddr[15], db->networkAddr[16]); #else panic_printk("NAT25: DB(%d) H(%02d) C(%d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", j, i, atomic_read(&db->use_count), db->macAddr[0], db->macAddr[1], db->macAddr[2], db->macAddr[3], db->macAddr[4], db->macAddr[5], db->networkAddr[0], db->networkAddr[1], db->networkAddr[2], db->networkAddr[3], db->networkAddr[4], db->networkAddr[5], db->networkAddr[6], db->networkAddr[7], db->networkAddr[8], db->networkAddr[9], db->networkAddr[10]); #endif j++; db = db->next_hash; } } #endif _exit_critical_bh(&priv->br_ext_lock, &irqL); } /* * NAT2.5 interface */ void nat25_db_cleanup(_adapter *priv) { int i; _irqL irqL; _enter_critical_bh(&priv->br_ext_lock, &irqL); for(i=0; inethash[i]; while (f != NULL) { struct nat25_network_db_entry *g; g = f->next_hash; if(priv->scdb_entry == f) { memset(priv->scdb_mac, 0, ETH_ALEN); memset(priv->scdb_ip, 0, 4); priv->scdb_entry = NULL; } __network_hash_unlink(f); rtw_mfree((u8 *) f, sizeof(struct nat25_network_db_entry)); f = g; } } _exit_critical_bh(&priv->br_ext_lock, &irqL); } void nat25_db_expire(_adapter *priv) { int i; _irqL irqL; _enter_critical_bh(&priv->br_ext_lock, &irqL); //if(!priv->ethBrExtInfo.nat25_disable) { for (i=0; inethash[i]; while (f != NULL) { struct nat25_network_db_entry *g; g = f->next_hash; if(__nat25_has_expired(priv, f)) { if(atomic_dec_and_test(&f->use_count)) { #ifdef BR_EXT_DEBUG #ifdef CL_IPV6_PASS panic_printk("NAT25 Expire H(%02d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x" "%02x%02x%02x%02x%02x%02x\n", i, f->macAddr[0], f->macAddr[1], f->macAddr[2], f->macAddr[3], f->macAddr[4], f->macAddr[5], f->networkAddr[0], f->networkAddr[1], f->networkAddr[2], f->networkAddr[3], f->networkAddr[4], f->networkAddr[5], f->networkAddr[6], f->networkAddr[7], f->networkAddr[8], f->networkAddr[9], f->networkAddr[10], f->networkAddr[11], f->networkAddr[12], f->networkAddr[13], f->networkAddr[14], f->networkAddr[15], f->networkAddr[16]); #else panic_printk("NAT25 Expire H(%02d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", i, f->macAddr[0], f->macAddr[1], f->macAddr[2], f->macAddr[3], f->macAddr[4], f->macAddr[5], f->networkAddr[0], f->networkAddr[1], f->networkAddr[2], f->networkAddr[3], f->networkAddr[4], f->networkAddr[5], f->networkAddr[6], f->networkAddr[7], f->networkAddr[8], f->networkAddr[9], f->networkAddr[10]); #endif #endif if(priv->scdb_entry == f) { memset(priv->scdb_mac, 0, ETH_ALEN); memset(priv->scdb_ip, 0, 4); priv->scdb_entry = NULL; } __network_hash_unlink(f); rtw_mfree((u8 *) f, sizeof(struct nat25_network_db_entry)); } } f = g; } } } _exit_critical_bh(&priv->br_ext_lock, &irqL); } #ifdef SUPPORT_TX_MCAST2UNI static int checkIPMcAndReplace(_adapter *priv, struct sk_buff *skb, unsigned int *dst_ip) { struct stat_info *pstat; struct list_head *phead, *plist; int i; phead = &priv->asoc_list; plist = phead->next; while (plist != phead) { pstat = list_entry(plist, struct stat_info, asoc_list); plist = plist->next; if (pstat->ipmc_num == 0) continue; for (i=0; iipmc[i].used && !memcmp(&pstat->ipmc[i].mcmac[3], ((unsigned char *)dst_ip)+1, 3)) { memcpy(skb->data, pstat->ipmc[i].mcmac, ETH_ALEN); return 1; } } } return 0; } #endif int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method) { unsigned short protocol; unsigned char networkAddr[MAX_NETWORK_ADDR_LEN]; if(skb == NULL) return -1; if((method <= NAT25_MIN) || (method >= NAT25_MAX)) return -1; protocol = *((unsigned short *)(skb->data + 2 * ETH_ALEN)); /*---------------------------------------------------*/ /* Handle IP frame */ /*---------------------------------------------------*/ if(protocol == __constant_htons(ETH_P_IP)) { struct iphdr* iph = (struct iphdr *)(skb->data + ETH_HLEN); if(((unsigned char*)(iph) + (iph->ihl<<2)) >= (skb->data + ETH_HLEN + skb->len)) { DEBUG_WARN("NAT25: malformed IP packet !\n"); return -1; } switch(method) { case NAT25_CHECK: return -1; case NAT25_INSERT: { //some muticast with source IP is all zero, maybe other case is illegal //in class A, B, C, host address is all zero or all one is illegal if (iph->saddr == 0) return 0; DBG_871X("NAT25: Insert IP, SA=%08x, DA=%08x\n", iph->saddr, iph->daddr); __nat25_generate_ipv4_network_addr(networkAddr, &iph->saddr); //record source IP address and , source mac address into db __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); __nat25_db_print(priv); } return 0; case NAT25_LOOKUP: { DBG_871X("NAT25: Lookup IP, SA=%08x, DA=%08x\n", iph->saddr, iph->daddr); #ifdef SUPPORT_TX_MCAST2UNI if (priv->pshare->rf_ft_var.mc2u_disable || ((((OPMODE & (WIFI_STATION_STATE|WIFI_ASOC_STATE)) == (WIFI_STATION_STATE|WIFI_ASOC_STATE)) && !checkIPMcAndReplace(priv, skb, &iph->daddr)) || (OPMODE & WIFI_ADHOC_STATE))) #endif { __nat25_generate_ipv4_network_addr(networkAddr, &iph->daddr); if (!__nat25_db_network_lookup_and_replace(priv, skb, networkAddr)) { if (*((unsigned char *)&iph->daddr + 3) == 0xff) { // L2 is unicast but L3 is broadcast, make L2 bacome broadcast DBG_871X("NAT25: Set DA as boardcast\n"); memset(skb->data, 0xff, ETH_ALEN); } else { // forward unknow IP packet to upper TCP/IP DBG_871X("NAT25: Replace DA with BR's MAC\n"); if ( (*(u32 *)priv->br_mac) == 0 && (*(u16 *)(priv->br_mac+4)) == 0 ) { void netdev_br_init(struct net_device *netdev); printk("Re-init netdev_br_init() due to br_mac==0!\n"); netdev_br_init(priv->pnetdev); } memcpy(skb->data, priv->br_mac, ETH_ALEN); } } } } return 0; default: return -1; } } /*---------------------------------------------------*/ /* Handle ARP frame */ /*---------------------------------------------------*/ else if(protocol == __constant_htons(ETH_P_ARP)) { struct arphdr *arp = (struct arphdr *)(skb->data + ETH_HLEN); unsigned char *arp_ptr = (unsigned char *)(arp + 1); unsigned int *sender, *target; if(arp->ar_pro != __constant_htons(ETH_P_IP)) { DEBUG_WARN("NAT25: arp protocol unknown (%4x)!\n", htons(arp->ar_pro)); return -1; } switch(method) { case NAT25_CHECK: return 0; // skb_copy for all ARP frame case NAT25_INSERT: { DBG_871X("NAT25: Insert ARP, MAC=%02x%02x%02x%02x%02x%02x\n", arp_ptr[0], arp_ptr[1], arp_ptr[2], arp_ptr[3], arp_ptr[4], arp_ptr[5]); // change to ARP sender mac address to wlan STA address memcpy(arp_ptr, GET_MY_HWADDR(priv), ETH_ALEN); arp_ptr += arp->ar_hln; sender = (unsigned int *)arp_ptr; __nat25_generate_ipv4_network_addr(networkAddr, sender); __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); __nat25_db_print(priv); } return 0; case NAT25_LOOKUP: { DBG_871X("NAT25: Lookup ARP\n"); arp_ptr += arp->ar_hln; sender = (unsigned int *)arp_ptr; arp_ptr += (arp->ar_hln + arp->ar_pln); target = (unsigned int *)arp_ptr; __nat25_generate_ipv4_network_addr(networkAddr, target); __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); // change to ARP target mac address to Lookup result arp_ptr = (unsigned char *)(arp + 1); arp_ptr += (arp->ar_hln + arp->ar_pln); memcpy(arp_ptr, skb->data, ETH_ALEN); } return 0; default: return -1; } } /*---------------------------------------------------*/ /* Handle IPX and Apple Talk frame */ /*---------------------------------------------------*/ else if((protocol == __constant_htons(ETH_P_IPX)) || (protocol == __constant_htons(ETH_P_ATALK)) || (protocol == __constant_htons(ETH_P_AARP))) { unsigned char ipx_header[2] = {0xFF, 0xFF}; struct ipxhdr *ipx = NULL; struct elapaarp *ea = NULL; struct ddpehdr *ddp = NULL; unsigned char *framePtr = skb->data + ETH_HLEN; if(protocol == __constant_htons(ETH_P_IPX)) { DBG_871X("NAT25: Protocol=IPX (Ethernet II)\n"); ipx = (struct ipxhdr *)framePtr; } else //if(protocol <= __constant_htons(ETH_FRAME_LEN)) { if(!memcmp(ipx_header, framePtr, 2)) { DBG_871X("NAT25: Protocol=IPX (Ethernet 802.3)\n"); ipx = (struct ipxhdr *)framePtr; } else { unsigned char ipx_8022_type = 0xE0; unsigned char snap_8022_type = 0xAA; if(*framePtr == snap_8022_type) { unsigned char ipx_snap_id[5] = {0x0, 0x0, 0x0, 0x81, 0x37}; // IPX SNAP ID unsigned char aarp_snap_id[5] = {0x00, 0x00, 0x00, 0x80, 0xF3}; // Apple Talk AARP SNAP ID unsigned char ddp_snap_id[5] = {0x08, 0x00, 0x07, 0x80, 0x9B}; // Apple Talk DDP SNAP ID framePtr += 3; // eliminate the 802.2 header if(!memcmp(ipx_snap_id, framePtr, 5)) { framePtr += 5; // eliminate the SNAP header DBG_871X("NAT25: Protocol=IPX (Ethernet SNAP)\n"); ipx = (struct ipxhdr *)framePtr; } else if(!memcmp(aarp_snap_id, framePtr, 5)) { framePtr += 5; // eliminate the SNAP header ea = (struct elapaarp *)framePtr; } else if(!memcmp(ddp_snap_id, framePtr, 5)) { framePtr += 5; // eliminate the SNAP header ddp = (struct ddpehdr *)framePtr; } else { DEBUG_WARN("NAT25: Protocol=Ethernet SNAP %02x%02x%02x%02x%02x\n", framePtr[0], framePtr[1], framePtr[2], framePtr[3], framePtr[4]); return -1; } } else if(*framePtr == ipx_8022_type) { framePtr += 3; // eliminate the 802.2 header if(!memcmp(ipx_header, framePtr, 2)) { DBG_871X("NAT25: Protocol=IPX (Ethernet 802.2)\n"); ipx = (struct ipxhdr *)framePtr; } else return -1; } } } /* IPX */ if(ipx != NULL) { switch(method) { case NAT25_CHECK: if(!memcmp(skb->data+ETH_ALEN, ipx->ipx_source.node, ETH_ALEN)) { DBG_871X("NAT25: Check IPX skb_copy\n"); return 0; } return -1; case NAT25_INSERT: { DBG_871X("NAT25: Insert IPX, Dest=%08x,%02x%02x%02x%02x%02x%02x,%04x Source=%08x,%02x%02x%02x%02x%02x%02x,%04x\n", ipx->ipx_dest.net, ipx->ipx_dest.node[0], ipx->ipx_dest.node[1], ipx->ipx_dest.node[2], ipx->ipx_dest.node[3], ipx->ipx_dest.node[4], ipx->ipx_dest.node[5], ipx->ipx_dest.sock, ipx->ipx_source.net, ipx->ipx_source.node[0], ipx->ipx_source.node[1], ipx->ipx_source.node[2], ipx->ipx_source.node[3], ipx->ipx_source.node[4], ipx->ipx_source.node[5], ipx->ipx_source.sock); if(!memcmp(skb->data+ETH_ALEN, ipx->ipx_source.node, ETH_ALEN)) { DBG_871X("NAT25: Use IPX Net, and Socket as network addr\n"); __nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_source.net, &ipx->ipx_source.sock); // change IPX source node addr to wlan STA address memcpy(ipx->ipx_source.node, GET_MY_HWADDR(priv), ETH_ALEN); } else { __nat25_generate_ipx_network_addr_with_node(networkAddr, &ipx->ipx_source.net, ipx->ipx_source.node); } __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); __nat25_db_print(priv); } return 0; case NAT25_LOOKUP: { if(!memcmp(GET_MY_HWADDR(priv), ipx->ipx_dest.node, ETH_ALEN)) { DBG_871X("NAT25: Lookup IPX, Modify Destination IPX Node addr\n"); __nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_dest.net, &ipx->ipx_dest.sock); __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); // replace IPX destination node addr with Lookup destination MAC addr memcpy(ipx->ipx_dest.node, skb->data, ETH_ALEN); } else { __nat25_generate_ipx_network_addr_with_node(networkAddr, &ipx->ipx_dest.net, ipx->ipx_dest.node); __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); } } return 0; default: return -1; } } /* AARP */ else if(ea != NULL) { /* Sanity check fields. */ if(ea->hw_len != ETH_ALEN || ea->pa_len != AARP_PA_ALEN) { DEBUG_WARN("NAT25: Appletalk AARP Sanity check fail!\n"); return -1; } switch(method) { case NAT25_CHECK: return 0; case NAT25_INSERT: { // change to AARP source mac address to wlan STA address memcpy(ea->hw_src, GET_MY_HWADDR(priv), ETH_ALEN); DBG_871X("NAT25: Insert AARP, Source=%d,%d Destination=%d,%d\n", ea->pa_src_net, ea->pa_src_node, ea->pa_dst_net, ea->pa_dst_node); __nat25_generate_apple_network_addr(networkAddr, &ea->pa_src_net, &ea->pa_src_node); __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); __nat25_db_print(priv); } return 0; case NAT25_LOOKUP: { DBG_871X("NAT25: Lookup AARP, Source=%d,%d Destination=%d,%d\n", ea->pa_src_net, ea->pa_src_node, ea->pa_dst_net, ea->pa_dst_node); __nat25_generate_apple_network_addr(networkAddr, &ea->pa_dst_net, &ea->pa_dst_node); __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); // change to AARP destination mac address to Lookup result memcpy(ea->hw_dst, skb->data, ETH_ALEN); } return 0; default: return -1; } } /* DDP */ else if(ddp != NULL) { switch(method) { case NAT25_CHECK: return -1; case NAT25_INSERT: { DBG_871X("NAT25: Insert DDP, Source=%d,%d Destination=%d,%d\n", ddp->deh_snet, ddp->deh_snode, ddp->deh_dnet, ddp->deh_dnode); __nat25_generate_apple_network_addr(networkAddr, &ddp->deh_snet, &ddp->deh_snode); __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); __nat25_db_print(priv); } return 0; case NAT25_LOOKUP: { DBG_871X("NAT25: Lookup DDP, Source=%d,%d Destination=%d,%d\n", ddp->deh_snet, ddp->deh_snode, ddp->deh_dnet, ddp->deh_dnode); __nat25_generate_apple_network_addr(networkAddr, &ddp->deh_dnet, &ddp->deh_dnode); __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); } return 0; default: return -1; } } return -1; } /*---------------------------------------------------*/ /* Handle PPPoE frame */ /*---------------------------------------------------*/ else if((protocol == __constant_htons(ETH_P_PPP_DISC)) || (protocol == __constant_htons(ETH_P_PPP_SES))) { struct pppoe_hdr *ph = (struct pppoe_hdr *)(skb->data + ETH_HLEN); unsigned short *pMagic; switch(method) { case NAT25_CHECK: if (ph->sid == 0) return 0; return 1; case NAT25_INSERT: if(ph->sid == 0) // Discovery phase according to tag { if(ph->code == PADI_CODE || ph->code == PADR_CODE) { if (priv->ethBrExtInfo.addPPPoETag) { struct pppoe_tag *tag, *pOldTag; unsigned char tag_buf[40]; int old_tag_len=0; tag = (struct pppoe_tag *)tag_buf; pOldTag = (struct pppoe_tag *)__nat25_find_pppoe_tag(ph, ntohs(PTT_RELAY_SID)); if (pOldTag) { // if SID existed, copy old value and delete it old_tag_len = ntohs(pOldTag->tag_len); if (old_tag_len+TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN > sizeof(tag_buf)) { DEBUG_ERR("SID tag length too long!\n"); return -1; } memcpy(tag->tag_data+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN, pOldTag->tag_data, old_tag_len); if (skb_pull_and_merge(skb, (unsigned char *)pOldTag, TAG_HDR_LEN+old_tag_len) < 0) { DEBUG_ERR("call skb_pull_and_merge() failed in PADI/R packet!\n"); return -1; } ph->length = htons(ntohs(ph->length)-TAG_HDR_LEN-old_tag_len); } tag->tag_type = PTT_RELAY_SID; tag->tag_len = htons(MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN+old_tag_len); // insert the magic_code+client mac in relay tag pMagic = (unsigned short *)tag->tag_data; *pMagic = htons(MAGIC_CODE); memcpy(tag->tag_data+MAGIC_CODE_LEN, skb->data+ETH_ALEN, ETH_ALEN); //Add relay tag if(__nat25_add_pppoe_tag(skb, tag) < 0) return -1; DBG_871X("NAT25: Insert PPPoE, forward %s packet\n", (ph->code == PADI_CODE ? "PADI" : "PADR")); } else { // not add relay tag if (priv->pppoe_connection_in_progress && memcmp(skb->data+ETH_ALEN, priv->pppoe_addr, ETH_ALEN)) { DEBUG_ERR("Discard PPPoE packet due to another PPPoE connection is in progress!\n"); return -2; } if (priv->pppoe_connection_in_progress == 0) memcpy(priv->pppoe_addr, skb->data+ETH_ALEN, ETH_ALEN); priv->pppoe_connection_in_progress = WAIT_TIME_PPPOE; } } else return -1; } else // session phase { DBG_871X("NAT25: Insert PPPoE, insert session packet to %s\n", skb->dev->name); __nat25_generate_pppoe_network_addr(networkAddr, skb->data, &(ph->sid)); __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); __nat25_db_print(priv); if (!priv->ethBrExtInfo.addPPPoETag && priv->pppoe_connection_in_progress && !memcmp(skb->data+ETH_ALEN, priv->pppoe_addr, ETH_ALEN)) priv->pppoe_connection_in_progress = 0; } return 0; case NAT25_LOOKUP: if(ph->code == PADO_CODE || ph->code == PADS_CODE) { if (priv->ethBrExtInfo.addPPPoETag) { struct pppoe_tag *tag; unsigned char *ptr; unsigned short tagType, tagLen; int offset=0; if((ptr = __nat25_find_pppoe_tag(ph, ntohs(PTT_RELAY_SID))) == 0) { DEBUG_ERR("Fail to find PTT_RELAY_SID in FADO!\n"); return -1; } tag = (struct pppoe_tag *)ptr; tagType = (unsigned short)((ptr[0] << 8) + ptr[1]); tagLen = (unsigned short)((ptr[2] << 8) + ptr[3]); if((tagType != ntohs(PTT_RELAY_SID)) || (tagLen < (MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN))) { DEBUG_ERR("Invalid PTT_RELAY_SID tag length [%d]!\n", tagLen); return -1; } pMagic = (unsigned short *)tag->tag_data; if (ntohs(*pMagic) != MAGIC_CODE) { DEBUG_ERR("Can't find MAGIC_CODE in %s packet!\n", (ph->code == PADO_CODE ? "PADO" : "PADS")); return -1; } memcpy(skb->data, tag->tag_data+MAGIC_CODE_LEN, ETH_ALEN); if (tagLen > MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN) offset = TAG_HDR_LEN; if (skb_pull_and_merge(skb, ptr+offset, TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN-offset) < 0) { DEBUG_ERR("call skb_pull_and_merge() failed in PADO packet!\n"); return -1; } ph->length = htons(ntohs(ph->length)-(TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN-offset)); if (offset > 0) tag->tag_len = htons(tagLen-MAGIC_CODE_LEN-RTL_RELAY_TAG_LEN); DBG_871X("NAT25: Lookup PPPoE, forward %s Packet from %s\n", (ph->code == PADO_CODE ? "PADO" : "PADS"), skb->dev->name); } else { // not add relay tag if (!priv->pppoe_connection_in_progress) { DEBUG_ERR("Discard PPPoE packet due to no connection in progresss!\n"); return -1; } memcpy(skb->data, priv->pppoe_addr, ETH_ALEN); priv->pppoe_connection_in_progress = WAIT_TIME_PPPOE; } } else { if(ph->sid != 0) { DBG_871X("NAT25: Lookup PPPoE, lookup session packet from %s\n", skb->dev->name); __nat25_generate_pppoe_network_addr(networkAddr, skb->data+ETH_ALEN, &(ph->sid)); __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); __nat25_db_print(priv); } else return -1; } return 0; default: return -1; } } /*---------------------------------------------------*/ /* Handle EAP frame */ /*---------------------------------------------------*/ else if(protocol == __constant_htons(0x888e)) { switch(method) { case NAT25_CHECK: return -1; case NAT25_INSERT: return 0; case NAT25_LOOKUP: return 0; default: return -1; } } /*---------------------------------------------------*/ /* Handle C-Media proprietary frame */ /*---------------------------------------------------*/ else if((protocol == __constant_htons(0xe2ae)) || (protocol == __constant_htons(0xe2af))) { switch(method) { case NAT25_CHECK: return -1; case NAT25_INSERT: return 0; case NAT25_LOOKUP: return 0; default: return -1; } } /*---------------------------------------------------*/ /* Handle IPV6 frame */ /*---------------------------------------------------*/ #ifdef CL_IPV6_PASS else if(protocol == __constant_htons(ETH_P_IPV6)) { struct ipv6hdr *iph = (struct ipv6hdr *)(skb->data + ETH_HLEN); if (sizeof(*iph) >= (skb->len - ETH_HLEN)) { DEBUG_WARN("NAT25: malformed IPv6 packet !\n"); return -1; } switch(method) { case NAT25_CHECK: if (skb->data[0] & 1) return 0; return -1; case NAT25_INSERT: { DBG_871X("NAT25: Insert IP, SA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x," " DA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n", iph->saddr.s6_addr16[0],iph->saddr.s6_addr16[1],iph->saddr.s6_addr16[2],iph->saddr.s6_addr16[3], iph->saddr.s6_addr16[4],iph->saddr.s6_addr16[5],iph->saddr.s6_addr16[6],iph->saddr.s6_addr16[7], iph->daddr.s6_addr16[0],iph->daddr.s6_addr16[1],iph->daddr.s6_addr16[2],iph->daddr.s6_addr16[3], iph->daddr.s6_addr16[4],iph->daddr.s6_addr16[5],iph->daddr.s6_addr16[6],iph->daddr.s6_addr16[7]); if (memcmp(&iph->saddr, "\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0", 16)) { __nat25_generate_ipv6_network_addr(networkAddr, (unsigned int *)&iph->saddr); __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); __nat25_db_print(priv); if (iph->nexthdr == IPPROTO_ICMPV6 && skb->len > (ETH_HLEN + sizeof(*iph) + 4)) { if (update_nd_link_layer_addr(skb->data + ETH_HLEN + sizeof(*iph), skb->len - ETH_HLEN - sizeof(*iph), GET_MY_HWADDR(priv))) { struct icmp6hdr *hdr = (struct icmp6hdr *)(skb->data + ETH_HLEN + sizeof(*iph)); hdr->icmp6_cksum = 0; hdr->icmp6_cksum = csum_ipv6_magic(&iph->saddr, &iph->daddr, iph->payload_len, IPPROTO_ICMPV6, csum_partial((__u8 *)hdr, iph->payload_len, 0)); } } } } return 0; case NAT25_LOOKUP: DBG_871X("NAT25: Lookup IP, SA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x," " DA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n", iph->saddr.s6_addr16[0],iph->saddr.s6_addr16[1],iph->saddr.s6_addr16[2],iph->saddr.s6_addr16[3], iph->saddr.s6_addr16[4],iph->saddr.s6_addr16[5],iph->saddr.s6_addr16[6],iph->saddr.s6_addr16[7], iph->daddr.s6_addr16[0],iph->daddr.s6_addr16[1],iph->daddr.s6_addr16[2],iph->daddr.s6_addr16[3], iph->daddr.s6_addr16[4],iph->daddr.s6_addr16[5],iph->daddr.s6_addr16[6],iph->daddr.s6_addr16[7]); __nat25_generate_ipv6_network_addr(networkAddr, (unsigned int *)&iph->daddr); if (!__nat25_db_network_lookup_and_replace(priv, skb, networkAddr)) { #ifdef SUPPORT_RX_UNI2MCAST if (iph->daddr.s6_addr[0] == 0xff) convert_ipv6_mac_to_mc(skb); #endif } return 0; default: return -1; } } #endif // CL_IPV6_PASS return -1; } int nat25_handle_frame(_adapter *priv, struct sk_buff *skb) { #ifdef BR_EXT_DEBUG if((!priv->ethBrExtInfo.nat25_disable) && (!(skb->data[0] & 1))) { panic_printk("NAT25: Input Frame: DA=%02x%02x%02x%02x%02x%02x SA=%02x%02x%02x%02x%02x%02x\n", skb->data[0], skb->data[1], skb->data[2], skb->data[3], skb->data[4], skb->data[5], skb->data[6], skb->data[7], skb->data[8], skb->data[9], skb->data[10], skb->data[11]); } #endif if(!(skb->data[0] & 1)) { int is_vlan_tag=0, i, retval=0; unsigned short vlan_hdr=0; if (*((unsigned short *)(skb->data+ETH_ALEN*2)) == __constant_htons(ETH_P_8021Q)) { is_vlan_tag = 1; vlan_hdr = *((unsigned short *)(skb->data+ETH_ALEN*2+2)); for (i=0; i<6; i++) *((unsigned short *)(skb->data+ETH_ALEN*2+2-i*2)) = *((unsigned short *)(skb->data+ETH_ALEN*2-2-i*2)); skb_pull(skb, 4); } if (!priv->ethBrExtInfo.nat25_disable) { _irqL irqL; _enter_critical_bh(&priv->br_ext_lock, &irqL); /* * This function look up the destination network address from * the NAT2.5 database. Return value = -1 means that the * corresponding network protocol is NOT support. */ if (!priv->ethBrExtInfo.nat25sc_disable && (*((unsigned short *)(skb->data+ETH_ALEN*2)) == __constant_htons(ETH_P_IP)) && !memcmp(priv->scdb_ip, skb->data+ETH_HLEN+16, 4)) { memcpy(skb->data, priv->scdb_mac, ETH_ALEN); _exit_critical_bh(&priv->br_ext_lock, &irqL); } else { _exit_critical_bh(&priv->br_ext_lock, &irqL); retval = nat25_db_handle(priv, skb, NAT25_LOOKUP); } } else { if (((*((unsigned short *)(skb->data+ETH_ALEN*2)) == __constant_htons(ETH_P_IP)) && !memcmp(priv->br_ip, skb->data+ETH_HLEN+16, 4)) || ((*((unsigned short *)(skb->data+ETH_ALEN*2)) == __constant_htons(ETH_P_ARP)) && !memcmp(priv->br_ip, skb->data+ETH_HLEN+24, 4))) { // for traffic to upper TCP/IP retval = nat25_db_handle(priv, skb, NAT25_LOOKUP); } } if (is_vlan_tag) { skb_push(skb, 4); for (i=0; i<6; i++) *((unsigned short *)(skb->data+i*2)) = *((unsigned short *)(skb->data+4+i*2)); *((unsigned short *)(skb->data+ETH_ALEN*2)) = __constant_htons(ETH_P_8021Q); *((unsigned short *)(skb->data+ETH_ALEN*2+2)) = vlan_hdr; } if(retval == -1) { //DEBUG_ERR("NAT25: Lookup fail!\n"); return -1; } } return 0; } #if 0 void mac_clone(_adapter *priv, unsigned char *addr) { struct sockaddr sa; memcpy(sa.sa_data, addr, ETH_ALEN); DBG_871X("MAC Clone: Addr=%02x%02x%02x%02x%02x%02x\n", addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); rtl8192cd_set_hwaddr(priv->dev, &sa); } int mac_clone_handle_frame(_adapter *priv, struct sk_buff *skb) { if(priv->ethBrExtInfo.macclone_enable && !priv->macclone_completed) { if(!(skb->data[ETH_ALEN] & 1)) //// check any other particular MAC add { if(memcmp(skb->data+ETH_ALEN, GET_MY_HWADDR(priv), ETH_ALEN) && ((priv->dev->br_port) && memcmp(skb->data+ETH_ALEN, priv->br_mac, ETH_ALEN))) { mac_clone(priv, skb->data+ETH_ALEN); priv->macclone_completed = 1; } } } return 0; } #endif // 0 #define SERVER_PORT 67 #define CLIENT_PORT 68 #define DHCP_MAGIC 0x63825363 #define BROADCAST_FLAG 0x8000 struct dhcpMessage { u_int8_t op; u_int8_t htype; u_int8_t hlen; u_int8_t hops; u_int32_t xid; u_int16_t secs; u_int16_t flags; u_int32_t ciaddr; u_int32_t yiaddr; u_int32_t siaddr; u_int32_t giaddr; u_int8_t chaddr[16]; u_int8_t sname[64]; u_int8_t file[128]; u_int32_t cookie; u_int8_t options[308]; /* 312 - cookie */ }; void dhcp_flag_bcast(_adapter *priv, struct sk_buff *skb) { if(skb == NULL) return; if(!priv->ethBrExtInfo.dhcp_bcst_disable) { unsigned short protocol = *((unsigned short *)(skb->data + 2 * ETH_ALEN)); if(protocol == __constant_htons(ETH_P_IP)) // IP { struct iphdr* iph = (struct iphdr *)(skb->data + ETH_HLEN); if(iph->protocol == IPPROTO_UDP) // UDP { struct udphdr *udph = (struct udphdr *)((SIZE_PTR)iph + (iph->ihl << 2)); if((udph->source == __constant_htons(CLIENT_PORT)) && (udph->dest == __constant_htons(SERVER_PORT))) // DHCP request { struct dhcpMessage *dhcph = (struct dhcpMessage *)((SIZE_PTR)udph + sizeof(struct udphdr)); if(dhcph->cookie == __constant_htonl(DHCP_MAGIC)) // match magic word { if(!(dhcph->flags & htons(BROADCAST_FLAG))) // if not broadcast { register int sum = 0; DBG_871X("DHCP: change flag of DHCP request to broadcast.\n"); // or BROADCAST flag dhcph->flags |= htons(BROADCAST_FLAG); // recalculate checksum sum = ~(udph->check) & 0xffff; sum += dhcph->flags; while(sum >> 16) sum = (sum & 0xffff) + (sum >> 16); udph->check = ~sum; } } } } } } } void *scdb_findEntry(_adapter *priv, unsigned char *macAddr, unsigned char *ipAddr) { unsigned char networkAddr[MAX_NETWORK_ADDR_LEN]; struct nat25_network_db_entry *db; int hash; //_irqL irqL; //_enter_critical_bh(&priv->br_ext_lock, &irqL); __nat25_generate_ipv4_network_addr(networkAddr, (unsigned int *)ipAddr); hash = __nat25_network_hash(networkAddr); db = priv->nethash[hash]; while (db != NULL) { if(!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN)) { //_exit_critical_bh(&priv->br_ext_lock, &irqL); return (void *)db; } db = db->next_hash; } //_exit_critical_bh(&priv->br_ext_lock, &irqL); return NULL; } #endif // CONFIG_BR_EXT rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_bt_mp.c000066400000000000000000001512301261122257400205720ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include #include #ifdef CONFIG_RTL8723A #include #elif defined(CONFIG_RTL8723B) #include #endif #if defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8821A) void MPh2c_timeout_handle(void *FunctionContext) { PADAPTER pAdapter; PMPT_CONTEXT pMptCtx; DBG_8192C("[MPT], MPh2c_timeout_handle \n"); pAdapter = (PADAPTER)FunctionContext; pMptCtx = &pAdapter->mppriv.MptCtx; pMptCtx->bMPh2c_timeout = _TRUE; if ((_FALSE == pMptCtx->MptH2cRspEvent) || ((_TRUE == pMptCtx->MptH2cRspEvent) && (_FALSE == pMptCtx->MptBtC2hEvent))) { _rtw_up_sema(&pMptCtx->MPh2c_Sema); } } u32 WaitC2Hevent(PADAPTER pAdapter, u8 *C2H_event, u32 delay_time) { PMPT_CONTEXT pMptCtx=&(pAdapter->mppriv.MptCtx); pMptCtx->bMPh2c_timeout=_FALSE; if( pAdapter->registrypriv.mp_mode == 0 ) { DBG_8192C("[MPT], Error!! WaitC2Hevent mp_mode == 0!!\n"); return _FALSE; } _set_timer( &pMptCtx->MPh2c_timeout_timer, delay_time ); _rtw_down_sema(&pMptCtx->MPh2c_Sema); if (pMptCtx->bMPh2c_timeout == _TRUE) { *C2H_event = _FALSE; return _FALSE; } // for safty, cancel timer here again _cancel_timer_ex(&pMptCtx->MPh2c_timeout_timer); return _TRUE; } BT_CTRL_STATUS mptbt_CheckC2hFrame( PADAPTER Adapter, PBT_H2C pH2c, PBT_EXT_C2H pExtC2h ) { BT_CTRL_STATUS c2hStatus = BT_STATUS_C2H_SUCCESS; //DBG_8192C("[MPT], MPT rsp C2H hex: %x %x %x %x %x %x \n"), pExtC2h , pExtC2h+1 ,pExtC2h+2 ,pExtC2h+3 ,pExtC2h+4 ,pExtC2h+5); DBG_8192C("[MPT], statusCode = 0x%x\n", pExtC2h->statusCode); DBG_8192C("[MPT], retLen = %d\n", pExtC2h->retLen); DBG_8192C("[MPT], opCodeVer : req/rsp=%d/%d\n", pH2c->opCodeVer, pExtC2h->opCodeVer); DBG_8192C("[MPT], reqNum : req/rsp=%d/%d\n", pH2c->reqNum, pExtC2h->reqNum); if(pExtC2h->reqNum != pH2c->reqNum) { c2hStatus = BT_STATUS_C2H_REQNUM_MISMATCH; DBG_8192C("[MPT], Error!! C2H reqNum Mismatch!!\n"); } else if(pExtC2h->opCodeVer != pH2c->opCodeVer) { c2hStatus = BT_STATUS_OPCODE_L_VERSION_MISMATCH; DBG_8192C("[MPT], Error!! OPCode version L mismatch!!\n"); } return c2hStatus; } BT_CTRL_STATUS mptbt_SendH2c( PADAPTER Adapter, PBT_H2C pH2c, u2Byte h2cCmdLen ) { //KIRQL OldIrql = KeGetCurrentIrql(); BT_CTRL_STATUS h2cStatus=BT_STATUS_H2C_SUCCESS; PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); u1Byte i; DBG_8192C("[MPT], mptbt_SendH2c()=========>\n"); //PlatformResetEvent(&pMptCtx->MptH2cRspEvent); //PlatformResetEvent(&pMptCtx->MptBtC2hEvent); // if(OldIrql == PASSIVE_LEVEL) // { //RTPRINT_DATA(FMPBT, FMPBT_H2C_CONTENT, ("[MPT], MPT H2C hex: \n"), pH2c, h2cCmdLen); for(i=0; iMptH2cRspEvent = _FALSE; pMptCtx->MptBtC2hEvent = _FALSE; #if defined(CONFIG_RTL8723A) rtw_hal_fill_h2c_cmd(Adapter, 70, h2cCmdLen, (pu1Byte)pH2c); #elif defined(CONFIG_RTL8723B) rtl8723b_set_FwBtMpOper_cmd(Adapter, pH2c->opCode, pH2c->opCodeVer, pH2c->reqNum, pH2c->buf); #endif pMptCtx->h2cReqNum++; pMptCtx->h2cReqNum %= 16; if(WaitC2Hevent(Adapter, &pMptCtx->MptH2cRspEvent, 100)) { DBG_8192C("[MPT], Received WiFi MptH2cRspEvent!!!\n"); if(WaitC2Hevent(Adapter, &pMptCtx->MptBtC2hEvent, 400)) { DBG_8192C("[MPT], Received MptBtC2hEvent!!!\n"); break; } else { DBG_8192C("[MPT], Error!!BT MptBtC2hEvent timeout!!\n"); h2cStatus = BT_STATUS_H2C_BT_NO_RSP; } } else { DBG_8192C("[MPT], Error!!WiFi MptH2cRspEvent timeout!!\n"); h2cStatus = BT_STATUS_H2C_TIMTOUT; } } // } // else // { // RT_ASSERT(FALSE, ("[MPT], mptbt_SendH2c() can only run under PASSIVE_LEVEL!!\n")); // h2cStatus = BT_STATUS_WRONG_LEVEL; // } DBG_8192C("[MPT], mptbt_SendH2c()<=========\n"); return h2cStatus; } BT_CTRL_STATUS mptbt_CheckBtRspStatus( PADAPTER Adapter, PBT_EXT_C2H pExtC2h ) { BT_CTRL_STATUS retStatus=BT_OP_STATUS_SUCCESS; switch(pExtC2h->statusCode) { case BT_OP_STATUS_SUCCESS: retStatus = BT_STATUS_BT_OP_SUCCESS; DBG_8192C("[MPT], BT status : BT_STATUS_SUCCESS\n"); break; case BT_OP_STATUS_VERSION_MISMATCH: retStatus = BT_STATUS_OPCODE_L_VERSION_MISMATCH; DBG_8192C("[MPT], BT status : BT_STATUS_OPCODE_L_VERSION_MISMATCH\n"); break; case BT_OP_STATUS_UNKNOWN_OPCODE: retStatus = BT_STATUS_UNKNOWN_OPCODE_L; DBG_8192C("[MPT], BT status : BT_STATUS_UNKNOWN_OPCODE_L\n"); break; case BT_OP_STATUS_ERROR_PARAMETER: retStatus = BT_STATUS_PARAMETER_FORMAT_ERROR_L; DBG_8192C("[MPT], BT status : BT_STATUS_PARAMETER_FORMAT_ERROR_L\n"); break; default: retStatus = BT_STATUS_UNKNOWN_STATUS_L; DBG_8192C("[MPT], BT status : BT_STATUS_UNKNOWN_STATUS_L\n"); break; } return retStatus; } BT_CTRL_STATUS mptbt_BtFwOpCodeProcess( PADAPTER Adapter, u1Byte btFwOpCode, u1Byte opCodeVer, pu1Byte pH2cPar, u1Byte h2cParaLen ) { u1Byte H2C_Parameter[6] ={0}; PBT_H2C pH2c=(PBT_H2C)&H2C_Parameter[0]; PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; u2Byte paraLen=0,i; BT_CTRL_STATUS h2cStatus=BT_STATUS_H2C_SUCCESS, c2hStatus=BT_STATUS_C2H_SUCCESS; BT_CTRL_STATUS retStatus=BT_STATUS_H2C_BT_NO_RSP; if( Adapter->registrypriv.mp_mode == 0 ) { DBG_8192C("[MPT], Error!! mptbt_BtFwOpCodeProces mp_mode == 0!!\n"); return _FALSE; } pH2c->opCode = btFwOpCode; pH2c->opCodeVer = opCodeVer; pH2c->reqNum = pMptCtx->h2cReqNum; //PlatformMoveMemory(&pH2c->buf[0], pH2cPar, h2cParaLen); //_rtw_memcpy(&pH2c->buf[0], pH2cPar, h2cParaLen); _rtw_memcpy(pH2c->buf, pH2cPar, h2cParaLen); DBG_8192C("[MPT], pH2c->opCode=%d\n", pH2c->opCode); DBG_8192C("[MPT], pH2c->opCodeVer=%d\n", pH2c->opCodeVer); DBG_8192C("[MPT], pH2c->reqNum=%d\n", pH2c->reqNum); DBG_8192C("[MPT], h2c parameter length=%d\n", h2cParaLen); for (i=0; ibuf[i]); } h2cStatus = mptbt_SendH2c(Adapter, pH2c, h2cParaLen+2); if(BT_STATUS_H2C_SUCCESS == h2cStatus) { // if reach here, it means H2C get the correct c2h response, c2hStatus = mptbt_CheckC2hFrame(Adapter, pH2c, pExtC2h); if(BT_STATUS_C2H_SUCCESS == c2hStatus) { retStatus = mptbt_CheckBtRspStatus(Adapter, pExtC2h); } else { DBG_8192C("[MPT], Error!! C2H failed for pH2c->opCode=%d\n", pH2c->opCode); // check c2h status error, return error status code to upper layer. retStatus = c2hStatus; } } else { DBG_8192C("[MPT], Error!! H2C failed for pH2c->opCode=%d\n", pH2c->opCode); // check h2c status error, return error status code to upper layer. retStatus = h2cStatus; } return retStatus; } u2Byte mptbt_BtReady( PADAPTER Adapter, PBT_REQ_CMD pBtReq, PBT_RSP_CMD pBtRsp ) { u1Byte h2cParaBuf[6] ={0}; u1Byte h2cParaLen=0; u2Byte paraLen=0; u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; u1Byte btOpcode; u1Byte btOpcodeVer=0; PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; u1Byte i; u1Byte btFwVer=0, bdAddr[6]={0}; u2Byte btRealFwVer=0; pu2Byte pu2Tmp=NULL; // // check upper layer parameters // // 1. check upper layer opcode version if(pBtReq->opCodeVer != 1) { DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; return paraLen; } pBtRsp->pParamStart[0] = MP_BT_NOT_READY; paraLen = 10; // // execute lower layer opcodes // // Get BT FW version // fill h2c parameters btOpcode = BT_LO_OP_GET_BT_VERSION; // execute h2c and check respond c2h from bt fw is correct or not retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // ckeck bt return status. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } else { pu2Tmp = (pu2Byte)&pExtC2h->buf[0]; btRealFwVer = *pu2Tmp; btFwVer = pExtC2h->buf[1]; DBG_8192C("[MPT], btRealFwVer=0x%x, btFwVer=0x%x\n", btRealFwVer, btFwVer); } // Get BD Address // fill h2c parameters btOpcode = BT_LO_OP_GET_BD_ADDR_L; // execute h2c and check respond c2h from bt fw is correct or not retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // ckeck bt return status. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } else { bdAddr[5] = pExtC2h->buf[0]; bdAddr[4] = pExtC2h->buf[1]; bdAddr[3] = pExtC2h->buf[2]; } // fill h2c parameters btOpcode = BT_LO_OP_GET_BD_ADDR_H; // execute h2c and check respond c2h from bt fw is correct or not retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // ckeck bt return status. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } else { bdAddr[2] = pExtC2h->buf[0]; bdAddr[1] = pExtC2h->buf[1]; bdAddr[0] = pExtC2h->buf[2]; } DBG_8192C("[MPT], Local BDAddr:"); for(i=0; i<6; i++) { DBG_8192C(" 0x%x ", bdAddr[i]); } pBtRsp->status = BT_STATUS_SUCCESS; pBtRsp->pParamStart[0] = MP_BT_READY; pu2Tmp = (pu2Byte)&pBtRsp->pParamStart[1]; *pu2Tmp = btRealFwVer; pBtRsp->pParamStart[3] = btFwVer; for(i=0; i<6; i++) { pBtRsp->pParamStart[4+i] = bdAddr[5-i]; } return paraLen; } void mptbt_close_WiFiRF(PADAPTER Adapter) { PHY_SetBBReg(Adapter, 0x824, 0xF, 0x0); PHY_SetBBReg(Adapter, 0x824, 0x700000, 0x0); PHY_SetRFReg(Adapter, RF90_PATH_A, 0x0, 0xF0000, 0x0); } void mptbt_open_WiFiRF(PADAPTER Adapter) { PHY_SetBBReg(Adapter, 0x824, 0x700000, 0x3); PHY_SetBBReg(Adapter, 0x824, 0xF, 0x2); PHY_SetRFReg(Adapter, RF90_PATH_A, 0x0, 0xF0000, 0x3); } u4Byte mptbt_switch_RF(PADAPTER Adapter, u1Byte Enter) { u2Byte tmp_2byte = 0; //Enter test mode if (Enter) { ////1>. close WiFi RF mptbt_close_WiFiRF(Adapter); ////2>. change ant switch to BT tmp_2byte = rtw_read16(Adapter, 0x860); tmp_2byte = tmp_2byte | BIT(9); tmp_2byte = tmp_2byte & (~BIT(8)); rtw_write16(Adapter, 0x860, tmp_2byte); rtw_write16(Adapter, 0x870, 0x300); } else { ////1>. Open WiFi RF mptbt_open_WiFiRF(Adapter); ////2>. change ant switch back tmp_2byte = rtw_read16(Adapter, 0x860); tmp_2byte = tmp_2byte | BIT(8); tmp_2byte = tmp_2byte & (~BIT(9)); rtw_write16(Adapter, 0x860, tmp_2byte); rtw_write16(Adapter, 0x870, 0x300); } return 0; } u2Byte mptbt_BtSetMode( PADAPTER Adapter, PBT_REQ_CMD pBtReq, PBT_RSP_CMD pBtRsp ) { u1Byte h2cParaBuf[6] ={0}; u1Byte h2cParaLen=0; u2Byte paraLen=0; u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; u1Byte btOpcode; u1Byte btOpcodeVer=0; u1Byte btModeToSet=0; // // check upper layer parameters // // 1. check upper layer opcode version if(pBtReq->opCodeVer != 1) { DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; return paraLen; } // 2. check upper layer parameter length if(1 == pBtReq->paraLength) { btModeToSet = pBtReq->pParamStart[0]; DBG_8192C("[MPT], BtTestMode=%d \n", btModeToSet); } else { DBG_8192C("[MPT], Error!! wrong parameter length=%d (should be 1)\n", pBtReq->paraLength); pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; return paraLen; } // // execute lower layer opcodes // // 1. fill h2c parameters // check bt mode btOpcode = BT_LO_OP_SET_BT_MODE; if(btModeToSet >= MP_BT_MODE_MAX) { pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } else { mptbt_switch_RF(Adapter, 1); h2cParaBuf[0] = btModeToSet; h2cParaLen = 1; // 2. execute h2c and check respond c2h from bt fw is correct or not retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); } // 3. construct respond status code and data. if(BT_STATUS_BT_OP_SUCCESS == retStatus) { pBtRsp->status = BT_STATUS_SUCCESS; } else { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); } return paraLen; } VOID MPTBT_FwC2hBtMpCtrl( PADAPTER Adapter, pu1Byte tmpBuf, u1Byte length ) { u32 i; PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)tmpBuf; if(Adapter->bBTFWReady == _FALSE || Adapter->registrypriv.mp_mode == 0 ) { //DBG_8192C("Ignore C2H BT MP Info since not in MP mode \n"); return; } if( length > 32 || length < 3 ) { DBG_8192C("\n [MPT], pExtC2h->buf hex: length=%d > 32 || < 3\n",length); return; } //cancel_timeout for h2c handle _cancel_timer_ex(&pMptCtx->MPh2c_timeout_timer); for (i=0; iextendId=0x%x\n", pExtC2h->extendId); switch(pExtC2h->extendId) { case EXT_C2H_WIFI_FW_ACTIVE_RSP: DBG_8192C("[MPT], EXT_C2H_WIFI_FW_ACTIVE_RSP\n"); #if 0 DBG_8192C("[MPT], pExtC2h->buf hex: \n"); for (i=0; i<(length-3); i++) { DBG_8192C(" 0x%x ", pExtC2h->buf[i]); } #endif if ((_FALSE == pMptCtx->bMPh2c_timeout) && (_FALSE == pMptCtx->MptH2cRspEvent)) { pMptCtx->MptH2cRspEvent = _TRUE; _rtw_up_sema(&pMptCtx->MPh2c_Sema); } break; case EXT_C2H_TRIG_BY_BT_FW: DBG_8192C("[MPT], EXT_C2H_TRIG_BY_BT_FW\n"); _rtw_memcpy(&pMptCtx->c2hBuf[0], tmpBuf, length); DBG_8192C("[MPT], pExtC2h->statusCode=0x%x\n", pExtC2h->statusCode); DBG_8192C("[MPT], pExtC2h->retLen=0x%x\n", pExtC2h->retLen); DBG_8192C("[MPT], pExtC2h->opCodeVer=0x%x\n", pExtC2h->opCodeVer); DBG_8192C("[MPT], pExtC2h->reqNum=0x%x\n", pExtC2h->reqNum); for (i=0; i<(length-3); i++) { DBG_8192C("[MPT], pExtC2h->buf[%d]=0x%02x\n", i, pExtC2h->buf[i]); } if ((_FALSE == pMptCtx->bMPh2c_timeout) && (_TRUE == pMptCtx->MptH2cRspEvent) && (_FALSE == pMptCtx->MptBtC2hEvent)) { pMptCtx->MptBtC2hEvent = _TRUE; _rtw_up_sema(&pMptCtx->MPh2c_Sema); } break; default: DBG_8192C("[MPT], EXT_C2H Target not found,pExtC2h->extendId =%d ,pExtC2h->reqNum=%d\n",pExtC2h->extendId,pExtC2h->reqNum); break; } } u2Byte mptbt_BtGetGeneral( IN PADAPTER Adapter, IN PBT_REQ_CMD pBtReq, IN PBT_RSP_CMD pBtRsp ) { PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); PBT_EXT_C2H pExtC2h=(PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; u1Byte h2cParaBuf[6] ={0}; u1Byte h2cParaLen=0; u2Byte paraLen=0; u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; u1Byte btOpcode, bdAddr[6]={0}; u1Byte btOpcodeVer=0; u1Byte getType=0, i; u2Byte getParaLen=0, validParaLen=0; u1Byte regType=0, reportType=0; u4Byte regAddr=0, regValue=0; pu4Byte pu4Tmp; pu2Byte pu2Tmp; pu1Byte pu1Tmp; // // check upper layer parameters // // check upper layer opcode version if(pBtReq->opCodeVer != 1) { DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; return paraLen; } // check upper layer parameter length if(pBtReq->paraLength < 1) { DBG_8192C("[MPT], Error!! wrong parameter length=%d (should larger than 1)\n", pBtReq->paraLength); pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; return paraLen; } getParaLen = pBtReq->paraLength - 1; getType = pBtReq->pParamStart[0]; DBG_8192C("[MPT], getType=%d, getParaLen=%d\n", getType, getParaLen); // check parameter first switch(getType) { case BT_GGET_REG: DBG_8192C("[MPT], [BT_GGET_REG]\n"); validParaLen = 5; if(getParaLen == validParaLen) { btOpcode = BT_LO_OP_READ_REG; regType = pBtReq->pParamStart[1]; pu4Tmp = (pu4Byte)&pBtReq->pParamStart[2]; regAddr = *pu4Tmp; DBG_8192C("[MPT], BT_GGET_REG regType=0x%02x, regAddr=0x%08x!!\n", regType, regAddr); if(regType >= BT_REG_MAX) { pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } else { if( ((BT_REG_RF==regType)&&(regAddr>0x7f)) || ((BT_REG_MODEM==regType)&&(regAddr>0x1ff)) || ((BT_REG_BLUEWIZE==regType)&&(regAddr>0xfff)) || ((BT_REG_VENDOR==regType)&&(regAddr>0xfff)) || ((BT_REG_LE==regType)&&(regAddr>0xfff)) ) { pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } } } break; case BT_GGET_STATUS: DBG_8192C("[MPT], [BT_GGET_STATUS]\n"); validParaLen = 0; break; case BT_GGET_REPORT: DBG_8192C("[MPT], [BT_GGET_REPORT]\n"); validParaLen = 1; if(getParaLen == validParaLen) { reportType = pBtReq->pParamStart[1]; DBG_8192C("[MPT], BT_GGET_REPORT reportType=0x%x!!\n", reportType); if(reportType >= BT_REPORT_MAX) { pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } } break; default: { DBG_8192C("[MPT], Error!! getType=%d, out of range\n", getType); pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } break; } if(getParaLen != validParaLen) { DBG_8192C("[MPT], Error!! wrong parameter length=%d for BT_GET_GEN_CMD cmd id=0x%x, paraLen should=0x%x\n", getParaLen, getType, validParaLen); pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; return paraLen; } // // execute lower layer opcodes // if(BT_GGET_REG == getType) { // fill h2c parameters // here we should write reg value first then write the address, adviced by Austin btOpcode = BT_LO_OP_READ_REG; h2cParaBuf[0] = regType; h2cParaBuf[1] = pBtReq->pParamStart[2]; h2cParaBuf[2] = pBtReq->pParamStart[3]; h2cParaLen = 3; // execute h2c and check respond c2h from bt fw is correct or not retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // construct respond status code and data. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } pu2Tmp = (pu2Byte)&pExtC2h->buf[0]; regValue = *pu2Tmp; DBG_8192C("[MPT], read reg regType=0x%02x, regAddr=0x%08x, regValue=0x%04x\n", regType, regAddr, regValue); pu4Tmp = (pu4Byte)&pBtRsp->pParamStart[0]; *pu4Tmp = regValue; paraLen = 4; } else if(BT_GGET_STATUS == getType) { btOpcode = BT_LO_OP_GET_BT_STATUS; h2cParaLen = 0; // execute h2c and check respond c2h from bt fw is correct or not retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // construct respond status code and data. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } pBtRsp->pParamStart[0] = pExtC2h->buf[0]; pBtRsp->pParamStart[1] = pExtC2h->buf[1]; DBG_8192C("[MPT], read bt status, testMode=0x%x, testStatus=0x%x\n", pBtRsp->pParamStart[0], pBtRsp->pParamStart[1]); paraLen = 2; } else if(BT_GGET_REPORT == getType) { switch(reportType) { case BT_REPORT_RX_PACKET_CNT: { DBG_8192C("[MPT], [Rx Packet Counts]\n"); btOpcode = BT_LO_OP_GET_RX_PKT_CNT_L; h2cParaLen = 0; // execute h2c and check respond c2h from bt fw is correct or not retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // construct respond status code and data. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } pBtRsp->pParamStart[0] = pExtC2h->buf[0]; pBtRsp->pParamStart[1] = pExtC2h->buf[1]; btOpcode = BT_LO_OP_GET_RX_PKT_CNT_H; h2cParaLen = 0; // execute h2c and check respond c2h from bt fw is correct or not retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // construct respond status code and data. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } pBtRsp->pParamStart[2] = pExtC2h->buf[0]; pBtRsp->pParamStart[3] = pExtC2h->buf[1]; paraLen = 4; } break; case BT_REPORT_RX_ERROR_BITS: { DBG_8192C("[MPT], [Rx Error Bits]\n"); btOpcode = BT_LO_OP_GET_RX_ERROR_BITS_L; h2cParaLen = 0; // execute h2c and check respond c2h from bt fw is correct or not retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // construct respond status code and data. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } pBtRsp->pParamStart[0] = pExtC2h->buf[0]; pBtRsp->pParamStart[1] = pExtC2h->buf[1]; btOpcode = BT_LO_OP_GET_RX_ERROR_BITS_H; h2cParaLen = 0; // execute h2c and check respond c2h from bt fw is correct or not retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // construct respond status code and data. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } pBtRsp->pParamStart[2] = pExtC2h->buf[0]; pBtRsp->pParamStart[3] = pExtC2h->buf[1]; paraLen = 4; } break; case BT_REPORT_RSSI: { DBG_8192C("[MPT], [RSSI]\n"); btOpcode = BT_LO_OP_GET_RSSI; h2cParaLen = 0; // execute h2c and check respond c2h from bt fw is correct or not retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // construct respond status code and data. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } pBtRsp->pParamStart[0] = pExtC2h->buf[0]; pBtRsp->pParamStart[1] = pExtC2h->buf[1]; paraLen = 2; } break; case BT_REPORT_CFO_HDR_QUALITY: { DBG_8192C("[MPT], [CFO & Header Quality]\n"); btOpcode = BT_LO_OP_GET_CFO_HDR_QUALITY_L; h2cParaLen = 0; // execute h2c and check respond c2h from bt fw is correct or not retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // construct respond status code and data. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } pBtRsp->pParamStart[0] = pExtC2h->buf[0]; pBtRsp->pParamStart[1] = pExtC2h->buf[1]; btOpcode = BT_LO_OP_GET_CFO_HDR_QUALITY_H; h2cParaLen = 0; // execute h2c and check respond c2h from bt fw is correct or not retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // construct respond status code and data. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } pBtRsp->pParamStart[2] = pExtC2h->buf[0]; pBtRsp->pParamStart[3] = pExtC2h->buf[1]; paraLen = 4; } break; case BT_REPORT_CONNECT_TARGET_BD_ADDR: { DBG_8192C("[MPT], [Connected Target BD ADDR]\n"); btOpcode = BT_LO_OP_GET_TARGET_BD_ADDR_L; h2cParaLen = 0; // execute h2c and check respond c2h from bt fw is correct or not retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // construct respond status code and data. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } bdAddr[5] = pExtC2h->buf[0]; bdAddr[4] = pExtC2h->buf[1]; bdAddr[3] = pExtC2h->buf[2]; btOpcode = BT_LO_OP_GET_TARGET_BD_ADDR_H; h2cParaLen = 0; // execute h2c and check respond c2h from bt fw is correct or not retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // construct respond status code and data. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } bdAddr[2] = pExtC2h->buf[0]; bdAddr[1] = pExtC2h->buf[1]; bdAddr[0] = pExtC2h->buf[2]; DBG_8192C("[MPT], Connected Target BDAddr:%s", bdAddr); for(i=0; i<6; i++) { pBtRsp->pParamStart[i] = bdAddr[5-i]; } paraLen = 6; } break; default: pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; break; } } pBtRsp->status = BT_STATUS_SUCCESS; return paraLen; } u2Byte mptbt_BtSetGeneral( IN PADAPTER Adapter, IN PBT_REQ_CMD pBtReq, IN PBT_RSP_CMD pBtRsp ) { u1Byte h2cParaBuf[6] ={0}; u1Byte h2cParaLen=0; u2Byte paraLen=0; u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; u1Byte btOpcode; u1Byte btOpcodeVer=0; u1Byte setType=0; u2Byte setParaLen=0, validParaLen=0; u1Byte regType=0, bdAddr[6]={0}, calVal=0; u4Byte regAddr=0, regValue=0; pu4Byte pu4Tmp; pu2Byte pu2Tmp; pu1Byte pu1Tmp; // // check upper layer parameters // // check upper layer opcode version if(pBtReq->opCodeVer != 1) { DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; return paraLen; } // check upper layer parameter length if(pBtReq->paraLength < 1) { DBG_8192C("[MPT], Error!! wrong parameter length=%d (should larger than 1)\n", pBtReq->paraLength); pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; return paraLen; } setParaLen = pBtReq->paraLength - 1; setType = pBtReq->pParamStart[0]; DBG_8192C("[MPT], setType=%d, setParaLen=%d\n", setType, setParaLen); // check parameter first switch(setType) { case BT_GSET_REG: DBG_8192C ("[MPT], [BT_GSET_REG]\n"); validParaLen = 9; if(setParaLen == validParaLen) { btOpcode = BT_LO_OP_WRITE_REG_VALUE; regType = pBtReq->pParamStart[1]; pu4Tmp = (pu4Byte)&pBtReq->pParamStart[2]; regAddr = *pu4Tmp; pu4Tmp = (pu4Byte)&pBtReq->pParamStart[6]; regValue = *pu4Tmp; DBG_8192C("[MPT], BT_GSET_REG regType=0x%x, regAddr=0x%x, regValue=0x%x!!\n", regType, regAddr, regValue); if(regType >= BT_REG_MAX) { pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } else { if( ((BT_REG_RF==regType)&&(regAddr>0x7f)) || ((BT_REG_MODEM==regType)&&(regAddr>0x1ff)) || ((BT_REG_BLUEWIZE==regType)&&(regAddr>0xfff)) || ((BT_REG_VENDOR==regType)&&(regAddr>0xfff)) || ((BT_REG_LE==regType)&&(regAddr>0xfff)) ) { pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } } } break; case BT_GSET_RESET: DBG_8192C("[MPT], [BT_GSET_RESET]\n"); validParaLen = 0; break; case BT_GSET_TARGET_BD_ADDR: DBG_8192C("[MPT], [BT_GSET_TARGET_BD_ADDR]\n"); validParaLen = 6; if(setParaLen == validParaLen) { btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_H; if( (pBtReq->pParamStart[1]==0) && (pBtReq->pParamStart[2]==0) && (pBtReq->pParamStart[3]==0) && (pBtReq->pParamStart[4]==0) && (pBtReq->pParamStart[5]==0) && (pBtReq->pParamStart[6]==0) ) { DBG_8192C("[MPT], Error!! targetBDAddr=all zero\n"); pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } if( (pBtReq->pParamStart[1]==0xff) && (pBtReq->pParamStart[2]==0xff) && (pBtReq->pParamStart[3]==0xff) && (pBtReq->pParamStart[4]==0xff) && (pBtReq->pParamStart[5]==0xff) && (pBtReq->pParamStart[6]==0xff) ) { DBG_8192C("[MPT], Error!! targetBDAddr=all 0xf\n"); pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } bdAddr[0] = pBtReq->pParamStart[6]; bdAddr[1] = pBtReq->pParamStart[5]; bdAddr[2] = pBtReq->pParamStart[4]; bdAddr[3] = pBtReq->pParamStart[3]; bdAddr[4] = pBtReq->pParamStart[2]; bdAddr[5] = pBtReq->pParamStart[1]; DBG_8192C ("[MPT], target BDAddr:%x,%x,%x,%x,%x,%x\n", bdAddr[0],bdAddr[1],bdAddr[2],bdAddr[3],bdAddr[4],bdAddr[5]); } break; case BT_GSET_TX_PWR_FINETUNE: DBG_8192C("[MPT], [BT_GSET_TX_PWR_FINETUNE]\n"); validParaLen = 1; if(setParaLen == validParaLen) { btOpcode = BT_LO_OP_SET_TX_POWER_CALIBRATION; calVal = pBtReq->pParamStart[1]; if( (calVal<1) || (calVal>9) ) { pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } DBG_8192C ("[MPT], calVal=%d\n", calVal); } break; case BT_SET_TRACKING_INTERVAL: DBG_871X("[MPT], [BT_SET_TRACKING_INTERVAL] setParaLen =%d \n",setParaLen); validParaLen = 1; if(setParaLen == validParaLen) calVal = pBtReq->pParamStart[1]; break; case BT_SET_THERMAL_METER: DBG_871X("[MPT], [BT_SET_THERMAL_METER] setParaLen =%d \n",setParaLen); validParaLen = 1; if(setParaLen == validParaLen) calVal = pBtReq->pParamStart[1]; break; case BT_ENABLE_CFO_TRACKING: DBG_871X("[MPT], [BT_ENABLE_CFO_TRACKING] setParaLen =%d \n",setParaLen); validParaLen = 1; if(setParaLen == validParaLen) calVal = pBtReq->pParamStart[1]; break; case BT_GSET_UPDATE_BT_PATCH: if(IS_HARDWARE_TYPE_8723AE(Adapter) && Adapter->bFWReady) { u1Byte i; DBG_8192C ("[MPT], write regs for load patch\n"); //BTFwPatch8723A(Adapter); PlatformEFIOWrite1Byte(Adapter, 0xCC, 0x2d); rtw_msleep_os(50); PlatformEFIOWrite4Byte(Adapter, 0x68, 0xa005000c); rtw_msleep_os(50); PlatformEFIOWrite4Byte(Adapter, 0x68, 0xb005000c); rtw_msleep_os(50); PlatformEFIOWrite1Byte(Adapter, 0xCC, 0x29); for(i=0; i<12; i++) rtw_msleep_os(100); //#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) // BTFwPatch8723A(Adapter); //#endif DBG_8192C("[MPT], load BT FW Patch finished!!!\n"); } break; default: { DBG_8192C ("[MPT], Error!! setType=%d, out of range\n", setType); pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } break; } if(setParaLen != validParaLen) { DBG_8192C("[MPT], Error!! wrong parameter length=%d for BT_SET_GEN_CMD cmd id=0x%x, paraLen should=0x%x\n", setParaLen, setType, validParaLen); pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; return paraLen; } // // execute lower layer opcodes // if(BT_GSET_REG == setType) { // fill h2c parameters // here we should write reg value first then write the address, adviced by Austin btOpcode = BT_LO_OP_WRITE_REG_VALUE; h2cParaBuf[0] = pBtReq->pParamStart[6]; h2cParaBuf[1] = pBtReq->pParamStart[7]; h2cParaBuf[2] = pBtReq->pParamStart[8]; h2cParaLen = 3; // execute h2c and check respond c2h from bt fw is correct or not retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // construct respond status code and data. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } // write reg address btOpcode = BT_LO_OP_WRITE_REG_ADDR; h2cParaBuf[0] = regType; h2cParaBuf[1] = pBtReq->pParamStart[2]; h2cParaBuf[2] = pBtReq->pParamStart[3]; h2cParaLen = 3; // execute h2c and check respond c2h from bt fw is correct or not retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // construct respond status code and data. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } } else if(BT_GSET_RESET == setType) { btOpcode = BT_LO_OP_RESET; h2cParaLen = 0; // execute h2c and check respond c2h from bt fw is correct or not retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // construct respond status code and data. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } } else if(BT_GSET_TARGET_BD_ADDR == setType) { // fill h2c parameters btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_L; h2cParaBuf[0] = pBtReq->pParamStart[1]; h2cParaBuf[1] = pBtReq->pParamStart[2]; h2cParaBuf[2] = pBtReq->pParamStart[3]; h2cParaLen = 3; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // ckeck bt return status. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_H; h2cParaBuf[0] = pBtReq->pParamStart[4]; h2cParaBuf[1] = pBtReq->pParamStart[5]; h2cParaBuf[2] = pBtReq->pParamStart[6]; h2cParaLen = 3; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // ckeck bt return status. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } } else if(BT_GSET_TX_PWR_FINETUNE == setType) { // fill h2c parameters btOpcode = BT_LO_OP_SET_TX_POWER_CALIBRATION; h2cParaBuf[0] = calVal; h2cParaLen = 1; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // ckeck bt return status. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } } else if(BT_SET_TRACKING_INTERVAL == setType) { // BT_LO_OP_SET_TRACKING_INTERVAL = 0x22, // BT_LO_OP_SET_THERMAL_METER = 0x23, // BT_LO_OP_ENABLE_CFO_TRACKING = 0x24, btOpcode = BT_LO_OP_SET_TRACKING_INTERVAL; h2cParaBuf[0] = calVal; h2cParaLen = 1; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // ckeck bt return status. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } } else if(BT_SET_THERMAL_METER == setType) { btOpcode = BT_LO_OP_SET_THERMAL_METER; h2cParaBuf[0] = calVal; h2cParaLen = 1; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // ckeck bt return status. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } } else if(BT_ENABLE_CFO_TRACKING == setType) { btOpcode = BT_LO_OP_ENABLE_CFO_TRACKING; h2cParaBuf[0] = calVal; h2cParaLen = 1; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); // ckeck bt return status. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } } pBtRsp->status = BT_STATUS_SUCCESS; return paraLen; } u2Byte mptbt_BtSetTxRxPars( IN PADAPTER Adapter, IN PBT_REQ_CMD pBtReq, IN PBT_RSP_CMD pBtRsp ) { u1Byte h2cParaBuf[6] ={0}; u1Byte h2cParaLen=0; u2Byte paraLen=0; u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; u1Byte btOpcode; u1Byte btOpcodeVer=0; PBT_TXRX_PARAMETERS pTxRxPars=(PBT_TXRX_PARAMETERS)&pBtReq->pParamStart[0]; u2Byte lenTxRx=sizeof(BT_TXRX_PARAMETERS); u1Byte i; u1Byte bdAddr[6]={0}; // // check upper layer parameters // // 1. check upper layer opcode version if(pBtReq->opCodeVer != 1) { DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; return paraLen; } // 2. check upper layer parameter length if(pBtReq->paraLength == sizeof(BT_TXRX_PARAMETERS)) { DBG_8192C ("[MPT], pTxRxPars->txrxChannel=0x%x \n", pTxRxPars->txrxChannel); DBG_8192C ("[MPT], pTxRxPars->txrxTxPktCnt=0x%8x \n", pTxRxPars->txrxTxPktCnt); DBG_8192C ("[MPT], pTxRxPars->txrxTxPktInterval=0x%x \n", pTxRxPars->txrxTxPktInterval); DBG_8192C ("[MPT], pTxRxPars->txrxPayloadType=0x%x \n", pTxRxPars->txrxPayloadType); DBG_8192C ("[MPT], pTxRxPars->txrxPktType=0x%x \n", pTxRxPars->txrxPktType); DBG_8192C ("[MPT], pTxRxPars->txrxPayloadLen=0x%x \n", pTxRxPars->txrxPayloadLen); DBG_8192C ("[MPT], pTxRxPars->txrxPktHeader=0x%x \n", pTxRxPars->txrxPktHeader); DBG_8192C ("[MPT], pTxRxPars->txrxWhitenCoeff=0x%x \n", pTxRxPars->txrxWhitenCoeff); bdAddr[0] = pTxRxPars->txrxBdaddr[5]; bdAddr[1] = pTxRxPars->txrxBdaddr[4]; bdAddr[2] = pTxRxPars->txrxBdaddr[3]; bdAddr[3] = pTxRxPars->txrxBdaddr[2]; bdAddr[4] = pTxRxPars->txrxBdaddr[1]; bdAddr[5] = pTxRxPars->txrxBdaddr[0]; DBG_8192C ("[MPT], pTxRxPars->txrxBdaddr: %s", &bdAddr[0]); DBG_8192C ("[MPT], pTxRxPars->txrxTxGainIndex=0x%x \n", pTxRxPars->txrxTxGainIndex); } else { DBG_8192C ("[MPT], Error!! pBtReq->paraLength=%d, correct Len=%d\n", pBtReq->paraLength, lenTxRx); pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; return paraLen; } // // execute lower layer opcodes // // fill h2c parameters btOpcode = BT_LO_OP_SET_PKT_HEADER; if(pTxRxPars->txrxPktHeader > 0x3ffff) { DBG_8192C ("[MPT], Error!! pTxRxPars->txrxPktHeader=0x%x is out of range, (should be between 0x0~0x3ffff)\n", pTxRxPars->txrxPktHeader); pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } else { h2cParaBuf[0] = (u1Byte)(pTxRxPars->txrxPktHeader&0xff); h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxPktHeader&0xff00)>>8); h2cParaBuf[2] = (u1Byte)((pTxRxPars->txrxPktHeader&0xff0000)>>16); h2cParaLen = 3; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); } // ckeck bt return status. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } // fill h2c parameters btOpcode = BT_LO_OP_SET_PKT_TYPE_LEN; { u2Byte payloadLenLimit=0; switch(pTxRxPars->txrxPktType) { case MP_BT_PKT_DH1: payloadLenLimit = 27*8; break; case MP_BT_PKT_DH3: payloadLenLimit = 183*8; break; case MP_BT_PKT_DH5: payloadLenLimit = 339*8; break; case MP_BT_PKT_2DH1: payloadLenLimit = 54*8; break; case MP_BT_PKT_2DH3: payloadLenLimit = 367*8; break; case MP_BT_PKT_2DH5: payloadLenLimit = 679*8; break; case MP_BT_PKT_3DH1: payloadLenLimit = 83*8; break; case MP_BT_PKT_3DH3: payloadLenLimit = 552*8; break; case MP_BT_PKT_3DH5: payloadLenLimit = 1021*8; break; case MP_BT_PKT_LE: payloadLenLimit = 39*8; break; default: { DBG_8192C ("[MPT], Error!! Unknown pTxRxPars->txrxPktType=0x%x\n", pTxRxPars->txrxPktType); pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } break; } if(pTxRxPars->txrxPayloadLen > payloadLenLimit) { DBG_8192C ("[MPT], Error!! pTxRxPars->txrxPayloadLen=0x%x, (should smaller than %d)\n", pTxRxPars->txrxPayloadLen, payloadLenLimit); pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } h2cParaBuf[0] = pTxRxPars->txrxPktType; h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxPayloadLen&0xff)); h2cParaBuf[2] = (u1Byte)((pTxRxPars->txrxPayloadLen&0xff00)>>8); h2cParaLen = 3; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); } // ckeck bt return status. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } // fill h2c parameters btOpcode = BT_LO_OP_SET_PKT_CNT_L_PL_TYPE; if(pTxRxPars->txrxPayloadType > MP_BT_PAYLOAD_MAX) { DBG_8192C ("[MPT], Error!! pTxRxPars->txrxPayloadType=0x%x, (should be between 0~4)\n", pTxRxPars->txrxPayloadType); pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } else { h2cParaBuf[0] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff)); h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff00)>>8); h2cParaBuf[2] = pTxRxPars->txrxPayloadType; h2cParaLen = 3; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); } // ckeck bt return status. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } // fill h2c parameters btOpcode = BT_LO_OP_SET_PKT_CNT_H_PKT_INTV; if(pTxRxPars->txrxTxPktInterval > 15) { DBG_8192C ("[MPT], Error!! pTxRxPars->txrxTxPktInterval=0x%x, (should be between 0~15)\n", pTxRxPars->txrxTxPktInterval); pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } else { h2cParaBuf[0] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff0000)>>16); h2cParaBuf[1] = (u1Byte)((pTxRxPars->txrxTxPktCnt&0xff000000)>>24); h2cParaBuf[2] = pTxRxPars->txrxTxPktInterval; h2cParaLen = 3; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); } // ckeck bt return status. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } // fill h2c parameters btOpcode = BT_LO_OP_SET_WHITENCOEFF; { h2cParaBuf[0] = pTxRxPars->txrxWhitenCoeff; h2cParaLen = 1; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); } // ckeck bt return status. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } // fill h2c parameters btOpcode = BT_LO_OP_SET_CHNL_TX_GAIN; if( (pTxRxPars->txrxChannel > 78) || (pTxRxPars->txrxTxGainIndex > 7) ) { DBG_8192C ("[MPT], Error!! pTxRxPars->txrxChannel=0x%x, (should be between 0~78)\n", pTxRxPars->txrxChannel); DBG_8192C ("[MPT], Error!! pTxRxPars->txrxTxGainIndex=0x%x, (should be between 0~7)\n", pTxRxPars->txrxTxGainIndex); pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } else { h2cParaBuf[0] = pTxRxPars->txrxChannel; h2cParaBuf[1] = pTxRxPars->txrxTxGainIndex; h2cParaLen = 2; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); } // ckeck bt return status. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } // fill h2c parameters btOpcode = BT_LO_OP_SET_BD_ADDR_L; if( (pTxRxPars->txrxBdaddr[0]==0) && (pTxRxPars->txrxBdaddr[1]==0) && (pTxRxPars->txrxBdaddr[2]==0) && (pTxRxPars->txrxBdaddr[3]==0) && (pTxRxPars->txrxBdaddr[4]==0) && (pTxRxPars->txrxBdaddr[5]==0) ) { DBG_8192C ("[MPT], Error!! pTxRxPars->txrxBdaddr=all zero\n"); pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } if( (pTxRxPars->txrxBdaddr[0]==0xff) && (pTxRxPars->txrxBdaddr[1]==0xff) && (pTxRxPars->txrxBdaddr[2]==0xff) && (pTxRxPars->txrxBdaddr[3]==0xff) && (pTxRxPars->txrxBdaddr[4]==0xff) && (pTxRxPars->txrxBdaddr[5]==0xff) ) { DBG_8192C ("[MPT], Error!! pTxRxPars->txrxBdaddr=all 0xf\n"); pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } { h2cParaBuf[0] = pTxRxPars->txrxBdaddr[0]; h2cParaBuf[1] = pTxRxPars->txrxBdaddr[1]; h2cParaBuf[2] = pTxRxPars->txrxBdaddr[2]; h2cParaLen = 3; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); } // ckeck bt return status. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } btOpcode = BT_LO_OP_SET_BD_ADDR_H; { h2cParaBuf[0] = pTxRxPars->txrxBdaddr[3]; h2cParaBuf[1] = pTxRxPars->txrxBdaddr[4]; h2cParaBuf[2] = pTxRxPars->txrxBdaddr[5]; h2cParaLen = 3; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); } // ckeck bt return status. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } pBtRsp->status = BT_STATUS_SUCCESS; return paraLen; } u2Byte mptbt_BtTestCtrl( IN PADAPTER Adapter, IN PBT_REQ_CMD pBtReq, IN PBT_RSP_CMD pBtRsp ) { u1Byte h2cParaBuf[6] ={0}; u1Byte h2cParaLen=0; u2Byte paraLen=0; u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; u1Byte btOpcode; u1Byte btOpcodeVer=0; u1Byte testCtrl=0; // // check upper layer parameters // // 1. check upper layer opcode version if(pBtReq->opCodeVer != 1) { DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n"); pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; return paraLen; } // 2. check upper layer parameter length if(1 == pBtReq->paraLength) { testCtrl = pBtReq->pParamStart[0]; DBG_8192C("[MPT], testCtrl=%d \n", testCtrl); } else { DBG_8192C("[MPT], Error!! wrong parameter length=%d (should be 1)\n", pBtReq->paraLength); pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; return paraLen; } // // execute lower layer opcodes // // 1. fill h2c parameters // check bt mode btOpcode = BT_LO_OP_TEST_CTRL; if(testCtrl >= MP_BT_TEST_MAX) { DBG_8192C("[MPT], Error!! testCtrl=0x%x, (should be between smaller or equal to 0x%x)\n", testCtrl, MP_BT_TEST_MAX-1); pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; return paraLen; } else { h2cParaBuf[0] = testCtrl; h2cParaLen = 1; retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); } // 3. construct respond status code and data. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } pBtRsp->status = BT_STATUS_SUCCESS; return paraLen; } u2Byte mptbt_TestBT( IN PADAPTER Adapter, IN PBT_REQ_CMD pBtReq, IN PBT_RSP_CMD pBtRsp ) { u1Byte h2cParaBuf[6] ={0}; u1Byte h2cParaLen=0; u2Byte paraLen=0; u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS; u1Byte btOpcode; u1Byte btOpcodeVer=0; u1Byte testCtrl=0; // 1. fill h2c parameters btOpcode = 0x11; h2cParaBuf[0] = 0x11; h2cParaBuf[1] = 0x0; h2cParaBuf[2] = 0x0; h2cParaBuf[3] = 0x0; h2cParaBuf[4] = 0x0; h2cParaLen = 1; // retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, h2cParaBuf, h2cParaLen); // 3. construct respond status code and data. if(BT_STATUS_BT_OP_SUCCESS != retStatus) { pBtRsp->status = ((btOpcode<<8)|retStatus); DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status); return paraLen; } pBtRsp->status = BT_STATUS_SUCCESS; return paraLen; } VOID mptbt_BtControlProcess( PADAPTER Adapter, PVOID pInBuf ) { u1Byte H2C_Parameter[6] ={0}; PBT_H2C pH2c=(PBT_H2C)&H2C_Parameter[0]; PMPT_CONTEXT pMptCtx=&(Adapter->mppriv.MptCtx); PBT_REQ_CMD pBtReq=(PBT_REQ_CMD)pInBuf; PBT_RSP_CMD pBtRsp; u1Byte i; DBG_8192C("[MPT], mptbt_BtControlProcess()=========>\n"); DBG_8192C("[MPT], input opCodeVer=%d\n", pBtReq->opCodeVer); DBG_8192C("[MPT], input OpCode=%d\n", pBtReq->OpCode); DBG_8192C("[MPT], paraLength=%d \n", pBtReq->paraLength); if(pBtReq->paraLength) { //DBG_8192C("[MPT], parameters(hex):0x%x %d \n",&pBtReq->pParamStart[0], pBtReq->paraLength); } _rtw_memset((void*)pMptCtx->mptOutBuf, 0, 100); pMptCtx->mptOutLen = 4; //length of (BT_RSP_CMD.status+BT_RSP_CMD.paraLength) pBtRsp = (PBT_RSP_CMD)pMptCtx->mptOutBuf; pBtRsp->status = BT_STATUS_SUCCESS; pBtRsp->paraLength = 0x0; // The following we should maintain the User OP codes sent by upper layer switch(pBtReq->OpCode) { case BT_UP_OP_BT_READY: DBG_8192C("[MPT], OPcode : [BT_READY]\n"); pBtRsp->paraLength = mptbt_BtReady(Adapter, pBtReq, pBtRsp); break; case BT_UP_OP_BT_SET_MODE: DBG_8192C("[MPT], OPcode : [BT_SET_MODE]\n"); pBtRsp->paraLength = mptbt_BtSetMode(Adapter, pBtReq, pBtRsp); break; case BT_UP_OP_BT_SET_TX_RX_PARAMETER: DBG_8192C("[MPT], OPcode : [BT_SET_TXRX_PARAMETER]\n"); pBtRsp->paraLength = mptbt_BtSetTxRxPars(Adapter, pBtReq, pBtRsp); break; case BT_UP_OP_BT_SET_GENERAL: DBG_8192C("[MPT], OPcode : [BT_SET_GENERAL]\n"); pBtRsp->paraLength = mptbt_BtSetGeneral(Adapter, pBtReq, pBtRsp); break; case BT_UP_OP_BT_GET_GENERAL: DBG_8192C("[MPT], OPcode : [BT_GET_GENERAL]\n"); pBtRsp->paraLength = mptbt_BtGetGeneral(Adapter, pBtReq, pBtRsp); break; case BT_UP_OP_BT_TEST_CTRL: DBG_8192C("[MPT], OPcode : [BT_TEST_CTRL]\n"); pBtRsp->paraLength = mptbt_BtTestCtrl(Adapter, pBtReq, pBtRsp); break; case BT_UP_OP_TEST_BT: DBG_8192C("[MPT], OPcode : [TEST_BT]\n"); pBtRsp->paraLength = mptbt_TestBT(Adapter, pBtReq, pBtRsp); break; default: DBG_8192C("[MPT], Error!! OPcode : UNDEFINED!!!!\n"); pBtRsp->status = BT_STATUS_UNKNOWN_OPCODE_U; pBtRsp->paraLength = 0x0; break; } pMptCtx->mptOutLen += pBtRsp->paraLength; DBG_8192C("[MPT], pMptCtx->mptOutLen=%d, pBtRsp->paraLength=%d\n", pMptCtx->mptOutLen, pBtRsp->paraLength); DBG_8192C("[MPT], mptbt_BtControlProcess()<=========\n"); } #endif rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_btcoex.c000066400000000000000000000214201261122257400207520ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifdef CONFIG_BT_COEXIST #include #include void rtw_btcoex_Initialize(PADAPTER padapter) { hal_btcoex_Initialize(padapter); } void rtw_btcoex_PowerOnSetting(PADAPTER padapter) { hal_btcoex_PowerOnSetting(padapter); } void rtw_btcoex_PreLoadFirmware(PADAPTER padapter) { hal_btcoex_PreLoadFirmware(padapter); } void rtw_btcoex_HAL_Initialize(PADAPTER padapter, u8 bWifiOnly) { hal_btcoex_InitHwConfig(padapter, bWifiOnly); } void rtw_btcoex_IpsNotify(PADAPTER padapter, u8 type) { hal_btcoex_IpsNotify(padapter, type); } void rtw_btcoex_LpsNotify(PADAPTER padapter, u8 type) { hal_btcoex_LpsNotify(padapter, type); } void rtw_btcoex_ScanNotify(PADAPTER padapter, u8 type) { #ifdef CONFIG_CONCURRENT_MODE if ((_FALSE == type) && (padapter->pbuddy_adapter)) { PADAPTER pbuddy = padapter->pbuddy_adapter; if (check_fwstate(&pbuddy->mlmepriv, WIFI_SITE_MONITOR) == _TRUE) return; } #endif hal_btcoex_ScanNotify(padapter, type); } void rtw_btcoex_ConnectNotify(PADAPTER padapter, u8 action) { #ifdef DBG_CONFIG_ERROR_RESET if (_TRUE == rtw_hal_sreset_inprogress(padapter)) { DBG_8192C(FUNC_ADPT_FMT ": [BTCoex] under reset, skip notify!\n", FUNC_ADPT_ARG(padapter)); return; } #endif // DBG_CONFIG_ERROR_RESET #ifdef CONFIG_CONCURRENT_MODE if ((_FALSE == action) && (padapter->pbuddy_adapter)) { PADAPTER pbuddy = padapter->pbuddy_adapter; if (check_fwstate(&pbuddy->mlmepriv, WIFI_UNDER_LINKING) == _TRUE) return; } #endif hal_btcoex_ConnectNotify(padapter, action); } void rtw_btcoex_MediaStatusNotify(PADAPTER padapter, u8 mediaStatus) { #ifdef DBG_CONFIG_ERROR_RESET if (_TRUE == rtw_hal_sreset_inprogress(padapter)) { DBG_8192C(FUNC_ADPT_FMT ": [BTCoex] under reset, skip notify!\n", FUNC_ADPT_ARG(padapter)); return; } #endif // DBG_CONFIG_ERROR_RESET #ifdef CONFIG_CONCURRENT_MODE if ((RT_MEDIA_DISCONNECT == mediaStatus) && (padapter->pbuddy_adapter)) { PADAPTER pbuddy = padapter->pbuddy_adapter; if (check_fwstate(&pbuddy->mlmepriv, WIFI_ASOC_STATE) == _TRUE) return; } #endif // CONFIG_CONCURRENT_MODE if ((RT_MEDIA_CONNECT == mediaStatus) && (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)) { rtw_hal_set_hwreg(padapter, HW_VAR_DL_RSVD_PAGE, NULL); } hal_btcoex_MediaStatusNotify(padapter, mediaStatus); } void rtw_btcoex_SpecialPacketNotify(PADAPTER padapter, u8 pktType) { hal_btcoex_SpecialPacketNotify(padapter, pktType); } void rtw_btcoex_IQKNotify(PADAPTER padapter, u8 state) { hal_btcoex_IQKNotify(padapter, state); } void rtw_btcoex_BtInfoNotify(PADAPTER padapter, u8 length, u8 *tmpBuf) { hal_btcoex_BtInfoNotify(padapter, length, tmpBuf); } void rtw_btcoex_SuspendNotify(PADAPTER padapter, u8 state) { hal_btcoex_SuspendNotify(padapter, state); } void rtw_btcoex_HaltNotify(PADAPTER padapter) { if (_FALSE == padapter->bup) { DBG_871X(FUNC_ADPT_FMT ": bup=%d Skip!\n", FUNC_ADPT_ARG(padapter), padapter->bup); return; } if (_TRUE == padapter->bSurpriseRemoved) { DBG_871X(FUNC_ADPT_FMT ": bSurpriseRemoved=%d Skip!\n", FUNC_ADPT_ARG(padapter), padapter->bSurpriseRemoved); return; } hal_btcoex_HaltNotify(padapter); } void rtw_btcoex_SwitchBtTRxMask(PADAPTER padapter) { hal_btcoex_SwitchBtTRxMask(padapter); } void rtw_btcoex_Switch(PADAPTER padapter, u8 enable) { hal_btcoex_SetBTCoexist(padapter, enable); } u8 rtw_btcoex_IsBtDisabled(PADAPTER padapter) { return hal_btcoex_IsBtDisabled(padapter); } void rtw_btcoex_Handler(PADAPTER padapter) { #if defined(CONFIG_CONCURRENT_MODE) if (padapter->adapter_type != PRIMARY_ADAPTER) return; #endif hal_btcoex_Hanlder(padapter); } s32 rtw_btcoex_IsBTCoexCtrlAMPDUSize(PADAPTER padapter) { s32 coexctrl; coexctrl = hal_btcoex_IsBTCoexCtrlAMPDUSize(padapter); return coexctrl; } u32 rtw_btcoex_GetAMPDUSize(PADAPTER padapter) { u32 size; size = hal_btcoex_GetAMPDUSize(padapter); return size; } void rtw_btcoex_SetManualControl(PADAPTER padapter, u8 manual) { if (_TRUE == manual) { hal_btcoex_SetManualControl(padapter, _TRUE); } else { hal_btcoex_SetManualControl(padapter, _FALSE); } } u8 rtw_btcoex_1Ant(PADAPTER padapter) { return hal_btcoex_1Ant(padapter); } u8 rtw_btcoex_IsBtControlLps(PADAPTER padapter) { return hal_btcoex_IsBtControlLps(padapter); } u8 rtw_btcoex_IsLpsOn(PADAPTER padapter) { return hal_btcoex_IsLpsOn(padapter); } u8 rtw_btcoex_RpwmVal(PADAPTER padapter) { return hal_btcoex_RpwmVal(padapter); } u8 rtw_btcoex_LpsVal(PADAPTER padapter) { return hal_btcoex_LpsVal(padapter); } void rtw_btcoex_SetBTCoexist(PADAPTER padapter, u8 bBtExist) { hal_btcoex_SetBTCoexist(padapter, bBtExist); } void rtw_btcoex_SetChipType(PADAPTER padapter, u8 chipType) { hal_btcoex_SetChipType(padapter, chipType); } void rtw_btcoex_SetPGAntNum(PADAPTER padapter, u8 antNum) { hal_btcoex_SetPgAntNum(padapter, antNum); } u8 rtw_btcoex_GetPGAntNum(PADAPTER padapter) { return hal_btcoex_GetPgAntNum(padapter); } void rtw_btcoex_SetSingleAntPath(PADAPTER padapter, u8 singleAntPath) { hal_btcoex_SetSingleAntPath(padapter, singleAntPath); } u32 rtw_btcoex_GetRaMask(PADAPTER padapter) { return hal_btcoex_GetRaMask(padapter); } void rtw_btcoex_RecordPwrMode(PADAPTER padapter, u8 *pCmdBuf, u8 cmdLen) { hal_btcoex_RecordPwrMode(padapter, pCmdBuf, cmdLen); } void rtw_btcoex_DisplayBtCoexInfo(PADAPTER padapter, u8 *pbuf, u32 bufsize) { hal_btcoex_DisplayBtCoexInfo(padapter, pbuf, bufsize); } void rtw_btcoex_SetDBG(PADAPTER padapter, u32 *pDbgModule) { hal_btcoex_SetDBG(padapter, pDbgModule); } u32 rtw_btcoex_GetDBG(PADAPTER padapter, u8 *pStrBuf, u32 bufSize) { return hal_btcoex_GetDBG(padapter, pStrBuf, bufSize); } u8 rtw_btcoex_IncreaseScanDeviceNum(PADAPTER padapter) { return hal_btcoex_IncreaseScanDeviceNum(padapter); } u8 rtw_btcoex_IsBtLinkExist(PADAPTER padapter) { return hal_btcoex_IsBtLinkExist(padapter); } // ================================================== // Below Functions are called by BT-Coex // ================================================== void rtw_btcoex_RejectApAggregatedPacket(PADAPTER padapter, u8 enable) { struct mlme_ext_info *pmlmeinfo; pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; if (_TRUE == enable) { struct sta_info *psta = NULL; pmlmeinfo->bAcceptAddbaReq = _FALSE; if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) { psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv)); if (psta) send_delba(padapter, 0, psta->hwaddr); } else if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { _irqL irqL; _list *phead, *plist; u8 peer_num = 0; char peers[NUM_STA]; struct sta_priv *pstapriv = &padapter->stapriv; int i; _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); phead = &pstapriv->asoc_list; plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { int stainfo_offset; psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); plist = get_next(plist); stainfo_offset = rtw_stainfo_offset(pstapriv, psta); if (stainfo_offset_valid(stainfo_offset)) peers[peer_num++] = stainfo_offset; } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); if (peer_num) { for (i = 0; i < peer_num; i++) { psta = rtw_get_stainfo_by_offset(pstapriv, peers[i]); if (psta) send_delba(padapter, 0, psta->hwaddr); } } } } else { pmlmeinfo->bAcceptAddbaReq = _TRUE; } } void rtw_btcoex_LPS_Enter(PADAPTER padapter) { struct pwrctrl_priv *pwrpriv; u8 lpsVal; pwrpriv = adapter_to_pwrctl(padapter); pwrpriv->bpower_saving = _TRUE; lpsVal = rtw_btcoex_LpsVal(padapter); rtw_set_ps_mode(padapter, PS_MODE_MIN, 0, lpsVal, "BTCOEX"); } void rtw_btcoex_LPS_Leave(PADAPTER padapter) { struct pwrctrl_priv *pwrpriv; pwrpriv = adapter_to_pwrctl(padapter); if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) { rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "BTCOEX"); LPS_RF_ON_check(padapter, 100); pwrpriv->bpower_saving = _FALSE; } } #endif // CONFIG_BT_COEXIST rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_cmd.c000066400000000000000000003041401261122257400202340ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_CMD_C_ #include /* Caller and the rtw_cmd_thread can protect cmd_q by spin_lock. No irqsave is necessary. */ sint _rtw_init_cmd_priv (struct cmd_priv *pcmdpriv) { sint res=_SUCCESS; _func_enter_; _rtw_init_sema(&(pcmdpriv->cmd_queue_sema), 0); //_rtw_init_sema(&(pcmdpriv->cmd_done_sema), 0); _rtw_init_sema(&(pcmdpriv->terminate_cmdthread_sema), 0); _rtw_init_queue(&(pcmdpriv->cmd_queue)); //allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf pcmdpriv->cmd_seq = 1; pcmdpriv->cmd_allocated_buf = rtw_zmalloc(MAX_CMDSZ + CMDBUFF_ALIGN_SZ); if (pcmdpriv->cmd_allocated_buf == NULL){ res= _FAIL; goto exit; } pcmdpriv->cmd_buf = pcmdpriv->cmd_allocated_buf + CMDBUFF_ALIGN_SZ - ( (SIZE_PTR)(pcmdpriv->cmd_allocated_buf) & (CMDBUFF_ALIGN_SZ-1)); pcmdpriv->rsp_allocated_buf = rtw_zmalloc(MAX_RSPSZ + 4); if (pcmdpriv->rsp_allocated_buf == NULL){ res= _FAIL; goto exit; } pcmdpriv->rsp_buf = pcmdpriv->rsp_allocated_buf + 4 - ( (SIZE_PTR)(pcmdpriv->rsp_allocated_buf) & 3); pcmdpriv->cmd_issued_cnt = pcmdpriv->cmd_done_cnt = pcmdpriv->rsp_cnt = 0; _rtw_mutex_init(&pcmdpriv->sctx_mutex); exit: _func_exit_; return res; } #ifdef CONFIG_C2H_WK static void c2h_wk_callback(_workitem *work); #endif sint _rtw_init_evt_priv(struct evt_priv *pevtpriv) { sint res=_SUCCESS; _func_enter_; #ifdef CONFIG_H2CLBK _rtw_init_sema(&(pevtpriv->lbkevt_done), 0); pevtpriv->lbkevt_limit = 0; pevtpriv->lbkevt_num = 0; pevtpriv->cmdevt_parm = NULL; #endif //allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf ATOMIC_SET(&pevtpriv->event_seq, 0); pevtpriv->evt_done_cnt = 0; #ifdef CONFIG_EVENT_THREAD_MODE _rtw_init_sema(&(pevtpriv->evt_notify), 0); _rtw_init_sema(&(pevtpriv->terminate_evtthread_sema), 0); pevtpriv->evt_allocated_buf = rtw_zmalloc(MAX_EVTSZ + 4); if (pevtpriv->evt_allocated_buf == NULL){ res= _FAIL; goto exit; } pevtpriv->evt_buf = pevtpriv->evt_allocated_buf + 4 - ((unsigned int)(pevtpriv->evt_allocated_buf) & 3); #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) pevtpriv->allocated_c2h_mem = rtw_zmalloc(C2H_MEM_SZ +4); if (pevtpriv->allocated_c2h_mem == NULL){ res= _FAIL; goto exit; } pevtpriv->c2h_mem = pevtpriv->allocated_c2h_mem + 4\ - ( (u32)(pevtpriv->allocated_c2h_mem) & 3); #ifdef PLATFORM_OS_XP pevtpriv->pc2h_mdl= IoAllocateMdl((u8 *)pevtpriv->c2h_mem, C2H_MEM_SZ , FALSE, FALSE, NULL); if(pevtpriv->pc2h_mdl == NULL){ res= _FAIL; goto exit; } MmBuildMdlForNonPagedPool(pevtpriv->pc2h_mdl); #endif #endif //end of CONFIG_SDIO_HCI _rtw_init_queue(&(pevtpriv->evt_queue)); exit: #endif //end of CONFIG_EVENT_THREAD_MODE #ifdef CONFIG_C2H_WK _init_workitem(&pevtpriv->c2h_wk, c2h_wk_callback, NULL); pevtpriv->c2h_wk_alive = _FALSE; pevtpriv->c2h_queue = rtw_cbuf_alloc(C2H_QUEUE_MAX_LEN+1); #endif _func_exit_; return res; } void _rtw_free_evt_priv (struct evt_priv *pevtpriv) { _func_enter_; RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("+_rtw_free_evt_priv \n")); #ifdef CONFIG_EVENT_THREAD_MODE _rtw_free_sema(&(pevtpriv->evt_notify)); _rtw_free_sema(&(pevtpriv->terminate_evtthread_sema)); if (pevtpriv->evt_allocated_buf) rtw_mfree(pevtpriv->evt_allocated_buf, MAX_EVTSZ + 4); #endif #ifdef CONFIG_C2H_WK _cancel_workitem_sync(&pevtpriv->c2h_wk); while(pevtpriv->c2h_wk_alive) rtw_msleep_os(10); while (!rtw_cbuf_empty(pevtpriv->c2h_queue)) { void *c2h; if ((c2h = rtw_cbuf_pop(pevtpriv->c2h_queue)) != NULL && c2h != (void *)pevtpriv) { rtw_mfree(c2h, 16); } } rtw_cbuf_free(pevtpriv->c2h_queue); #endif RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("-_rtw_free_evt_priv \n")); _func_exit_; } void _rtw_free_cmd_priv (struct cmd_priv *pcmdpriv) { _func_enter_; if(pcmdpriv){ _rtw_spinlock_free(&(pcmdpriv->cmd_queue.lock)); _rtw_free_sema(&(pcmdpriv->cmd_queue_sema)); //_rtw_free_sema(&(pcmdpriv->cmd_done_sema)); _rtw_free_sema(&(pcmdpriv->terminate_cmdthread_sema)); if (pcmdpriv->cmd_allocated_buf) rtw_mfree(pcmdpriv->cmd_allocated_buf, MAX_CMDSZ + CMDBUFF_ALIGN_SZ); if (pcmdpriv->rsp_allocated_buf) rtw_mfree(pcmdpriv->rsp_allocated_buf, MAX_RSPSZ + 4); _rtw_mutex_free(&pcmdpriv->sctx_mutex); } _func_exit_; } /* Calling Context: rtw_enqueue_cmd can only be called between kernel thread, since only spin_lock is used. ISR/Call-Back functions can't call this sub-function. */ #ifdef DBG_CMD_QUEUE extern u8 dump_cmd_id; #endif sint _rtw_enqueue_cmd(_queue *queue, struct cmd_obj *obj) { _irqL irqL; _func_enter_; if (obj == NULL) goto exit; if(obj->cmdsz > MAX_CMDSZ ){ DBG_871X("%s failed due to obj->cmdsz(%d) > MAX_CMDSZ(%d) \n",__FUNCTION__, obj->cmdsz,MAX_CMDSZ); goto exit; } //_enter_critical_bh(&queue->lock, &irqL); _enter_critical(&queue->lock, &irqL); rtw_list_insert_tail(&obj->list, &queue->queue); #ifdef DBG_CMD_QUEUE if(dump_cmd_id){ printk("%s===> cmdcode:0x%02x\n",__FUNCTION__,obj->cmdcode); if(obj->cmdcode == GEN_CMD_CODE(_Set_MLME_EVT)){ if(obj->parmbuf){ struct C2HEvent_Header *pc2h_evt_hdr = (struct C2HEvent_Header *)(obj->parmbuf); printk("pc2h_evt_hdr->ID:0x%02x(%d)\n",pc2h_evt_hdr->ID,pc2h_evt_hdr->ID); } } if(obj->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra)){ if(obj->parmbuf){ struct drvextra_cmd_parm *pdrvextra_cmd_parm =(struct drvextra_cmd_parm*)(obj->parmbuf); printk("pdrvextra_cmd_parm->ec_id:0x%02x\n",pdrvextra_cmd_parm->ec_id); } } } if (queue->queue.prev->next != &queue->queue) { DBG_871X("[%d] head %p, tail %p, tail->prev->next %p[tail], tail->next %p[head]\n", __LINE__, &queue->queue, queue->queue.prev, queue->queue.prev->prev->next, queue->queue.prev->next); DBG_871X("==========%s============\n",__FUNCTION__); DBG_871X("head:%p,obj_addr:%p\n",&queue->queue,obj); DBG_871X("padapter: %p\n",obj->padapter); DBG_871X("cmdcode: 0x%02x\n",obj->cmdcode); DBG_871X("res: %d\n",obj->res); DBG_871X("parmbuf: %p\n",obj->parmbuf); DBG_871X("cmdsz: %d\n",obj->cmdsz); DBG_871X("rsp: %p\n",obj->rsp); DBG_871X("rspsz: %d\n",obj->rspsz); DBG_871X("sctx: %p\n",obj->sctx); DBG_871X("list->next: %p\n",obj->list.next); DBG_871X("list->prev: %p\n",obj->list.prev); } #endif //DBG_CMD_QUEUE //_exit_critical_bh(&queue->lock, &irqL); _exit_critical(&queue->lock, &irqL); exit: _func_exit_; return _SUCCESS; } struct cmd_obj *_rtw_dequeue_cmd(_queue *queue) { _irqL irqL; struct cmd_obj *obj; _func_enter_; //_enter_critical_bh(&(queue->lock), &irqL); _enter_critical(&queue->lock, &irqL); #ifdef DBG_CMD_QUEUE if (queue->queue.prev->next != &queue->queue) { DBG_871X("[%d] head %p, tail %p, tail->prev->next %p[tail], tail->next %p[head]\n", __LINE__, &queue->queue, queue->queue.prev, queue->queue.prev->prev->next, queue->queue.prev->next); } #endif //DBG_CMD_QUEUE if (rtw_is_list_empty(&(queue->queue))){ obj = NULL; } else { obj = LIST_CONTAINOR(get_next(&(queue->queue)), struct cmd_obj, list); #ifdef DBG_CMD_QUEUE if (queue->queue.prev->next != &queue->queue){ DBG_871X("==========%s============\n",__FUNCTION__); DBG_871X("head:%p,obj_addr:%p\n",&queue->queue,obj); DBG_871X("padapter: %p\n",obj->padapter); DBG_871X("cmdcode: 0x%02x\n",obj->cmdcode); DBG_871X("res: %d\n",obj->res); DBG_871X("parmbuf: %p\n",obj->parmbuf); DBG_871X("cmdsz: %d\n",obj->cmdsz); DBG_871X("rsp: %p\n",obj->rsp); DBG_871X("rspsz: %d\n",obj->rspsz); DBG_871X("sctx: %p\n",obj->sctx); DBG_871X("list->next: %p\n",obj->list.next); DBG_871X("list->prev: %p\n",obj->list.prev); } if(dump_cmd_id){ DBG_871X("%s===> cmdcode:0x%02x\n",__FUNCTION__,obj->cmdcode); if(obj->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra)){ if(obj->parmbuf){ struct drvextra_cmd_parm *pdrvextra_cmd_parm =(struct drvextra_cmd_parm*)(obj->parmbuf); printk("pdrvextra_cmd_parm->ec_id:0x%02x\n",pdrvextra_cmd_parm->ec_id); } } } #endif //DBG_CMD_QUEUE rtw_list_delete(&obj->list); } //_exit_critical_bh(&(queue->lock), &irqL); _exit_critical(&queue->lock, &irqL); _func_exit_; return obj; } u32 rtw_init_cmd_priv(struct cmd_priv *pcmdpriv) { u32 res; _func_enter_; res = _rtw_init_cmd_priv (pcmdpriv); _func_exit_; return res; } u32 rtw_init_evt_priv (struct evt_priv *pevtpriv) { int res; _func_enter_; res = _rtw_init_evt_priv(pevtpriv); _func_exit_; return res; } void rtw_free_evt_priv (struct evt_priv *pevtpriv) { _func_enter_; RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("rtw_free_evt_priv\n")); _rtw_free_evt_priv(pevtpriv); _func_exit_; } void rtw_free_cmd_priv (struct cmd_priv *pcmdpriv) { _func_enter_; RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("rtw_free_cmd_priv\n")); _rtw_free_cmd_priv(pcmdpriv); _func_exit_; } int rtw_cmd_filter(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj); int rtw_cmd_filter(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj) { u8 bAllow = _FALSE; //set to _TRUE to allow enqueuing cmd when hw_init_completed is _FALSE #ifdef SUPPORT_HW_RFOFF_DETECTED //To decide allow or not if( (adapter_to_pwrctl(pcmdpriv->padapter)->bHWPwrPindetect) &&(!pcmdpriv->padapter->registrypriv.usbss_enable) ) { if(cmd_obj->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra) ) { struct drvextra_cmd_parm *pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)cmd_obj->parmbuf; if(pdrvextra_cmd_parm->ec_id == POWER_SAVING_CTRL_WK_CID) { //DBG_871X("==>enqueue POWER_SAVING_CTRL_WK_CID\n"); bAllow = _TRUE; } } } #endif #ifndef CONFIG_C2H_PACKET_EN /* C2H should be always allowed */ if(cmd_obj->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra)) { struct drvextra_cmd_parm *pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)cmd_obj->parmbuf; if(pdrvextra_cmd_parm->ec_id == C2H_WK_CID) { bAllow = _TRUE; } } #endif if(cmd_obj->cmdcode == GEN_CMD_CODE(_SetChannelPlan)) bAllow = _TRUE; if( (pcmdpriv->padapter->hw_init_completed ==_FALSE && bAllow == _FALSE) || ATOMIC_READ(&(pcmdpriv->cmdthd_running)) == _FALSE //com_thread not running ) { //DBG_871X("%s:%s: drop cmdcode:%u, hw_init_completed:%u, cmdthd_running:%u\n", caller_func, __FUNCTION__, // cmd_obj->cmdcode, // pcmdpriv->padapter->hw_init_completed, // pcmdpriv->cmdthd_running //); return _FAIL; } return _SUCCESS; } u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj) { int res = _FAIL; PADAPTER padapter = pcmdpriv->padapter; _func_enter_; if (cmd_obj == NULL) { goto exit; } cmd_obj->padapter = padapter; #ifdef CONFIG_CONCURRENT_MODE //change pcmdpriv to primary's pcmdpriv if (padapter->adapter_type != PRIMARY_ADAPTER && padapter->pbuddy_adapter) pcmdpriv = &(padapter->pbuddy_adapter->cmdpriv); #endif if( _FAIL == (res=rtw_cmd_filter(pcmdpriv, cmd_obj)) ) { rtw_free_cmd_obj(cmd_obj); goto exit; } res = _rtw_enqueue_cmd(&pcmdpriv->cmd_queue, cmd_obj); if(res == _SUCCESS) _rtw_up_sema(&pcmdpriv->cmd_queue_sema); exit: _func_exit_; return res; } struct cmd_obj *rtw_dequeue_cmd(struct cmd_priv *pcmdpriv) { struct cmd_obj *cmd_obj; _func_enter_; cmd_obj = _rtw_dequeue_cmd(&pcmdpriv->cmd_queue); _func_exit_; return cmd_obj; } void rtw_cmd_clr_isr(struct cmd_priv *pcmdpriv) { _func_enter_; pcmdpriv->cmd_done_cnt++; //_rtw_up_sema(&(pcmdpriv->cmd_done_sema)); _func_exit_; } void rtw_free_cmd_obj(struct cmd_obj *pcmd) { struct drvextra_cmd_parm *extra_parm = NULL; _func_enter_; if(pcmd->parmbuf != NULL){ if((pcmd->cmdcode!=_JoinBss_CMD_) &&(pcmd->cmdcode!= _CreateBss_CMD_)) { //free parmbuf in cmd_obj rtw_mfree((unsigned char*)pcmd->parmbuf, pcmd->cmdsz); } } if(pcmd->rsp!=NULL) { if(pcmd->rspsz!= 0) { //free rsp in cmd_obj rtw_mfree((unsigned char*)pcmd->rsp, pcmd->rspsz); } } //free cmd_obj rtw_mfree((unsigned char*)pcmd, sizeof(struct cmd_obj)); _func_exit_; } void rtw_stop_cmd_thread(_adapter *adapter) { if(adapter->cmdThread && ATOMIC_READ(&(adapter->cmdpriv.cmdthd_running)) == _TRUE && adapter->cmdpriv.stop_req == 0) { adapter->cmdpriv.stop_req = 1; _rtw_up_sema(&adapter->cmdpriv.cmd_queue_sema); _rtw_down_sema(&adapter->cmdpriv.terminate_cmdthread_sema); } } thread_return rtw_cmd_thread(thread_context context) { u8 ret; struct cmd_obj *pcmd; u8 *pcmdbuf, *prspbuf; u32 cmd_start_time; u32 cmd_process_time; u8 (*cmd_hdl)(_adapter *padapter, u8* pbuf); void (*pcmd_callback)(_adapter *dev, struct cmd_obj *pcmd); PADAPTER padapter = (PADAPTER)context; struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); struct drvextra_cmd_parm *extra_parm = NULL; _irqL irqL; _func_enter_; thread_enter("RTW_CMD_THREAD"); pcmdbuf = pcmdpriv->cmd_buf; prspbuf = pcmdpriv->rsp_buf; pcmdpriv->stop_req = 0; ATOMIC_SET(&(pcmdpriv->cmdthd_running), _TRUE); _rtw_up_sema(&pcmdpriv->terminate_cmdthread_sema); RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("start r871x rtw_cmd_thread !!!!\n")); while(1) { if (_rtw_down_sema(&pcmdpriv->cmd_queue_sema) == _FAIL) { DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" _rtw_down_sema(&pcmdpriv->cmd_queue_sema) return _FAIL, break\n", FUNC_ADPT_ARG(padapter)); break; } if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved == _TRUE)) { DBG_871X_LEVEL(_drv_always_, "%s: DriverStopped(%d) SurpriseRemoved(%d) break at line %d\n", __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved, __LINE__); break; } if (pcmdpriv->stop_req) { DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" stop_req:%u, break\n", FUNC_ADPT_ARG(padapter), pcmdpriv->stop_req); break; } _enter_critical(&pcmdpriv->cmd_queue.lock, &irqL); if(rtw_is_list_empty(&(pcmdpriv->cmd_queue.queue))) { //DBG_871X("%s: cmd queue is empty!\n", __func__); _exit_critical(&pcmdpriv->cmd_queue.lock, &irqL); continue; } _exit_critical(&pcmdpriv->cmd_queue.lock, &irqL); #ifdef CONFIG_LPS_LCLK if (rtw_register_cmd_alive(padapter) != _SUCCESS) { RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("%s: wait to leave LPS_LCLK\n", __FUNCTION__)); continue; } #endif _next: if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) { DBG_871X_LEVEL(_drv_always_, "%s: DriverStopped(%d) SurpriseRemoved(%d) break at line %d\n", __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved, __LINE__); break; } if(!(pcmd = rtw_dequeue_cmd(pcmdpriv))) { #ifdef CONFIG_LPS_LCLK rtw_unregister_cmd_alive(padapter); #endif continue; } cmd_start_time = rtw_get_current_time(); if( _FAIL == rtw_cmd_filter(pcmdpriv, pcmd) ) { pcmd->res = H2C_DROPPED; if (pcmd->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra)) { extra_parm = (struct drvextra_cmd_parm *)pcmd->parmbuf; if (extra_parm && extra_parm->pbuf && extra_parm->size > 0) rtw_mfree(extra_parm->pbuf, extra_parm->size); } goto post_process; } pcmdpriv->cmd_issued_cnt++; pcmd->cmdsz = _RND4((pcmd->cmdsz));//_RND4 if(pcmd->cmdsz > MAX_CMDSZ ){ DBG_871X("%s cmdsz:%d > MAX_CMDSZ:%d\n",__FUNCTION__,pcmd->cmdsz,MAX_CMDSZ); } _rtw_memcpy(pcmdbuf, pcmd->parmbuf, pcmd->cmdsz); if(pcmd->cmdcode < (sizeof(wlancmds) /sizeof(struct cmd_hdl))) { cmd_hdl = wlancmds[pcmd->cmdcode].h2cfuns; if (cmd_hdl) { ret = cmd_hdl(pcmd->padapter, pcmdbuf); pcmd->res = ret; } pcmdpriv->cmd_seq++; } else { pcmd->res = H2C_PARAMETERS_ERROR; } cmd_hdl = NULL; post_process: _enter_critical_mutex(&(pcmd->padapter->cmdpriv.sctx_mutex), NULL); if (pcmd->sctx) { if (0) DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" pcmd->sctx\n", FUNC_ADPT_ARG(pcmd->padapter)); if (pcmd->res == H2C_SUCCESS) rtw_sctx_done(&pcmd->sctx); else rtw_sctx_done_err(&pcmd->sctx, RTW_SCTX_DONE_CMD_ERROR); } _exit_critical_mutex(&(pcmd->padapter->cmdpriv.sctx_mutex), NULL); if((cmd_process_time = rtw_get_passing_time_ms(cmd_start_time)) > 1000) { if (pcmd->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra)) { struct drvextra_cmd_parm *drvextra_parm = (struct drvextra_cmd_parm *)pcmdbuf; DBG_871X(ADPT_FMT" cmd=%d,%d,%d process_time=%d > 1 sec\n", ADPT_ARG(pcmd->padapter), pcmd->cmdcode, drvextra_parm->ec_id, drvextra_parm->type, cmd_process_time); //rtw_warn_on(1); } else if(pcmd->cmdcode == GEN_CMD_CODE(_Set_MLME_EVT)){ struct C2HEvent_Header *pc2h_evt_hdr = (struct C2HEvent_Header *)pcmdbuf; DBG_871X(ADPT_FMT" cmd=%d,%d, process_time=%d > 1 sec\n", ADPT_ARG(pcmd->padapter), pcmd->cmdcode, pc2h_evt_hdr->ID, cmd_process_time); //rtw_warn_on(1); } else { DBG_871X(ADPT_FMT" cmd=%d, process_time=%d > 1 sec\n", ADPT_ARG(pcmd->padapter), pcmd->cmdcode, cmd_process_time); //rtw_warn_on(1); } } //call callback function for post-processed if(pcmd->cmdcode < (sizeof(rtw_cmd_callback) /sizeof(struct _cmd_callback))) { pcmd_callback = rtw_cmd_callback[pcmd->cmdcode].callback; if(pcmd_callback == NULL) { RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("mlme_cmd_hdl(): pcmd_callback=0x%p, cmdcode=0x%x\n", pcmd_callback, pcmd->cmdcode)); rtw_free_cmd_obj(pcmd); } else { //todo: !!! fill rsp_buf to pcmd->rsp if (pcmd->rsp!=NULL) pcmd_callback(pcmd->padapter, pcmd);//need conider that free cmd_obj in rtw_cmd_callback } } else { RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("%s: cmdcode=0x%x callback not defined!\n", __FUNCTION__, pcmd->cmdcode)); rtw_free_cmd_obj(pcmd); } flush_signals_thread(); goto _next; } // free all cmd_obj resources do{ pcmd = rtw_dequeue_cmd(pcmdpriv); if(pcmd==NULL){ #ifdef CONFIG_LPS_LCLK rtw_unregister_cmd_alive(padapter); #endif break; } //DBG_871X("%s: leaving... drop cmdcode:%u size:%d\n", __FUNCTION__, pcmd->cmdcode, pcmd->cmdsz); if (pcmd->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra)) { extra_parm = (struct drvextra_cmd_parm *)pcmd->parmbuf; if(extra_parm->pbuf && extra_parm->size > 0) { rtw_mfree(extra_parm->pbuf, extra_parm->size); } } rtw_free_cmd_obj(pcmd); }while(1); _rtw_up_sema(&pcmdpriv->terminate_cmdthread_sema); ATOMIC_SET(&(pcmdpriv->cmdthd_running), _FALSE); _func_exit_; thread_exit(); } #ifdef CONFIG_EVENT_THREAD_MODE u32 rtw_enqueue_evt(struct evt_priv *pevtpriv, struct evt_obj *obj) { _irqL irqL; int res; _queue *queue = &pevtpriv->evt_queue; _func_enter_; res = _SUCCESS; if (obj == NULL) { res = _FAIL; goto exit; } _enter_critical_bh(&queue->lock, &irqL); rtw_list_insert_tail(&obj->list, &queue->queue); _exit_critical_bh(&queue->lock, &irqL); //rtw_evt_notify_isr(pevtpriv); exit: _func_exit_; return res; } struct evt_obj *rtw_dequeue_evt(_queue *queue) { _irqL irqL; struct evt_obj *pevtobj; _func_enter_; _enter_critical_bh(&queue->lock, &irqL); if (rtw_is_list_empty(&(queue->queue))) pevtobj = NULL; else { pevtobj = LIST_CONTAINOR(get_next(&(queue->queue)), struct evt_obj, list); rtw_list_delete(&pevtobj->list); } _exit_critical_bh(&queue->lock, &irqL); _func_exit_; return pevtobj; } void rtw_free_evt_obj(struct evt_obj *pevtobj) { _func_enter_; if(pevtobj->parmbuf) rtw_mfree((unsigned char*)pevtobj->parmbuf, pevtobj->evtsz); rtw_mfree((unsigned char*)pevtobj, sizeof(struct evt_obj)); _func_exit_; } void rtw_evt_notify_isr(struct evt_priv *pevtpriv) { _func_enter_; pevtpriv->evt_done_cnt++; _rtw_up_sema(&(pevtpriv->evt_notify)); _func_exit_; } #endif /* u8 rtw_setstandby_cmd(unsigned char *adapter) */ u8 rtw_setstandby_cmd(_adapter *padapter, uint action) { struct cmd_obj* ph2c; struct usb_suspend_parm* psetusbsuspend; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; u8 ret = _SUCCESS; _func_enter_; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if (ph2c == NULL) { ret = _FAIL; goto exit; } psetusbsuspend = (struct usb_suspend_parm*)rtw_zmalloc(sizeof(struct usb_suspend_parm)); if (psetusbsuspend == NULL) { rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ret = _FAIL; goto exit; } psetusbsuspend->action = action; init_h2fwcmd_w_parm_no_rsp(ph2c, psetusbsuspend, GEN_CMD_CODE(_SetUsbSuspend)); ret = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return ret; } /* rtw_sitesurvey_cmd(~) ### NOTE:#### (!!!!) MUST TAKE CARE THAT BEFORE CALLING THIS FUNC, YOU SHOULD HAVE LOCKED pmlmepriv->lock */ u8 rtw_sitesurvey_cmd(_adapter *padapter, NDIS_802_11_SSID *ssid, int ssid_num, struct rtw_ieee80211_channel *ch, int ch_num) { u8 res = _FAIL; struct cmd_obj *ph2c; struct sitesurvey_parm *psurveyPara; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo= &(padapter->wdinfo); #endif //CONFIG_P2P _func_enter_; #ifdef CONFIG_LPS if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE){ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SCAN, 1); } #endif #ifdef CONFIG_P2P_PS if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { p2p_ps_wk_cmd(padapter, P2P_PS_SCAN, 1); } #endif //CONFIG_P2P_PS ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if (ph2c == NULL) return _FAIL; psurveyPara = (struct sitesurvey_parm*)rtw_zmalloc(sizeof(struct sitesurvey_parm)); if (psurveyPara == NULL) { rtw_mfree((unsigned char*) ph2c, sizeof(struct cmd_obj)); return _FAIL; } rtw_free_network_queue(padapter, _FALSE); RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, ("%s: flush network queue\n", __FUNCTION__)); init_h2fwcmd_w_parm_no_rsp(ph2c, psurveyPara, GEN_CMD_CODE(_SiteSurvey)); /* psurveyPara->bsslimit = 48; */ psurveyPara->scan_mode = pmlmepriv->scan_mode; /* prepare ssid list */ if (ssid) { int i; for (i=0; issid[i], &ssid[i], sizeof(NDIS_802_11_SSID)); psurveyPara->ssid_num++; if (0) DBG_871X(FUNC_ADPT_FMT" ssid:(%s, %d)\n", FUNC_ADPT_ARG(padapter), psurveyPara->ssid[i].Ssid, psurveyPara->ssid[i].SsidLength); } } } /* prepare channel list */ if (ch) { int i; for (i=0; ich[i], &ch[i], sizeof(struct rtw_ieee80211_channel)); psurveyPara->ch_num++; if (0) DBG_871X(FUNC_ADPT_FMT" ch:%u\n", FUNC_ADPT_ARG(padapter), psurveyPara->ch[i].hw_value); } } } set_fwstate(pmlmepriv, _FW_UNDER_SURVEY); res = rtw_enqueue_cmd(pcmdpriv, ph2c); if(res == _SUCCESS) { pmlmepriv->scan_start_time = rtw_get_current_time(); #ifdef CONFIG_STA_MODE_SCAN_UNDER_AP_MODE if((padapter->pbuddy_adapter->mlmeextpriv.mlmext_info.state&0x03) == WIFI_FW_AP_STATE) _set_timer(&pmlmepriv->scan_to_timer, SURVEY_TO * ( padapter->mlmeextpriv.max_chan_nums + ( padapter->mlmeextpriv.max_chan_nums / RTW_SCAN_NUM_OF_CH ) * RTW_STAY_AP_CH_MILLISECOND ) + 1000 ); else #endif //CONFIG_STA_MODE_SCAN_UNDER_AP_MODE _set_timer(&pmlmepriv->scan_to_timer, SCANNING_TIMEOUT); rtw_led_control(padapter, LED_CTL_SITE_SURVEY); } else { _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); } _func_exit_; return res; } u8 rtw_setdatarate_cmd(_adapter *padapter, u8 *rateset) { struct cmd_obj* ph2c; struct setdatarate_parm* pbsetdataratepara; struct cmd_priv* pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; _func_enter_; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if (ph2c == NULL) { res = _FAIL; goto exit; } pbsetdataratepara = (struct setdatarate_parm*)rtw_zmalloc(sizeof(struct setdatarate_parm)); if (pbsetdataratepara == NULL) { rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); res = _FAIL; goto exit; } init_h2fwcmd_w_parm_no_rsp(ph2c, pbsetdataratepara, GEN_CMD_CODE(_SetDataRate)); #ifdef MP_FIRMWARE_OFFLOAD pbsetdataratepara->curr_rateidx = *(u32*)rateset; // _rtw_memcpy(pbsetdataratepara, rateset, sizeof(u32)); #else pbsetdataratepara->mac_id = 5; _rtw_memcpy(pbsetdataratepara->datarates, rateset, NumRates); #endif res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } u8 rtw_setbasicrate_cmd(_adapter *padapter, u8 *rateset) { struct cmd_obj* ph2c; struct setbasicrate_parm* pssetbasicratepara; struct cmd_priv* pcmdpriv=&padapter->cmdpriv; u8 res = _SUCCESS; _func_enter_; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if (ph2c == NULL) { res= _FAIL; goto exit; } pssetbasicratepara = (struct setbasicrate_parm*)rtw_zmalloc(sizeof(struct setbasicrate_parm)); if (pssetbasicratepara == NULL) { rtw_mfree((u8*) ph2c, sizeof(struct cmd_obj)); res = _FAIL; goto exit; } init_h2fwcmd_w_parm_no_rsp(ph2c, pssetbasicratepara, _SetBasicRate_CMD_); _rtw_memcpy(pssetbasicratepara->basicrates, rateset, NumRates); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } /* unsigned char rtw_setphy_cmd(unsigned char *adapter) 1. be called only after rtw_update_registrypriv_dev_network( ~) or mp testing program 2. for AdHoc/Ap mode or mp mode? */ u8 rtw_setphy_cmd(_adapter *padapter, u8 modem, u8 ch) { struct cmd_obj* ph2c; struct setphy_parm* psetphypara; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; // struct mlme_priv *pmlmepriv = &padapter->mlmepriv; // struct registry_priv* pregistry_priv = &padapter->registrypriv; u8 res=_SUCCESS; _func_enter_; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } psetphypara = (struct setphy_parm*)rtw_zmalloc(sizeof(struct setphy_parm)); if(psetphypara==NULL){ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } init_h2fwcmd_w_parm_no_rsp(ph2c, psetphypara, _SetPhy_CMD_); RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("CH=%d, modem=%d", ch, modem)); psetphypara->modem = modem; psetphypara->rfchannel = ch; res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } u8 rtw_setbbreg_cmd(_adapter*padapter, u8 offset, u8 val) { struct cmd_obj* ph2c; struct writeBB_parm* pwritebbparm; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; u8 res=_SUCCESS; _func_enter_; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } pwritebbparm = (struct writeBB_parm*)rtw_zmalloc(sizeof(struct writeBB_parm)); if(pwritebbparm==NULL){ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } init_h2fwcmd_w_parm_no_rsp(ph2c, pwritebbparm, GEN_CMD_CODE(_SetBBReg)); pwritebbparm->offset = offset; pwritebbparm->value = val; res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } u8 rtw_getbbreg_cmd(_adapter *padapter, u8 offset, u8 *pval) { struct cmd_obj* ph2c; struct readBB_parm* prdbbparm; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; u8 res=_SUCCESS; _func_enter_; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res=_FAIL; goto exit; } prdbbparm = (struct readBB_parm*)rtw_zmalloc(sizeof(struct readBB_parm)); if(prdbbparm ==NULL){ rtw_mfree((unsigned char *) ph2c, sizeof(struct cmd_obj)); return _FAIL; } _rtw_init_listhead(&ph2c->list); ph2c->cmdcode =GEN_CMD_CODE(_GetBBReg); ph2c->parmbuf = (unsigned char *)prdbbparm; ph2c->cmdsz = sizeof(struct readBB_parm); ph2c->rsp = pval; ph2c->rspsz = sizeof(struct readBB_rsp); prdbbparm ->offset = offset; res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } u8 rtw_setrfreg_cmd(_adapter *padapter, u8 offset, u32 val) { struct cmd_obj* ph2c; struct writeRF_parm* pwriterfparm; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; u8 res=_SUCCESS; _func_enter_; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } pwriterfparm = (struct writeRF_parm*)rtw_zmalloc(sizeof(struct writeRF_parm)); if(pwriterfparm==NULL){ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } init_h2fwcmd_w_parm_no_rsp(ph2c, pwriterfparm, GEN_CMD_CODE(_SetRFReg)); pwriterfparm->offset = offset; pwriterfparm->value = val; res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } u8 rtw_getrfreg_cmd(_adapter *padapter, u8 offset, u8 *pval) { struct cmd_obj* ph2c; struct readRF_parm* prdrfparm; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; u8 res=_SUCCESS; _func_enter_; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } prdrfparm = (struct readRF_parm*)rtw_zmalloc(sizeof(struct readRF_parm)); if(prdrfparm ==NULL){ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } _rtw_init_listhead(&ph2c->list); ph2c->cmdcode =GEN_CMD_CODE(_GetRFReg); ph2c->parmbuf = (unsigned char *)prdrfparm; ph2c->cmdsz = sizeof(struct readRF_parm); ph2c->rsp = pval; ph2c->rspsz = sizeof(struct readRF_rsp); prdrfparm ->offset = offset; res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } void rtw_getbbrfreg_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd) { _func_enter_; //rtw_free_cmd_obj(pcmd); rtw_mfree((unsigned char*) pcmd->parmbuf, pcmd->cmdsz); rtw_mfree((unsigned char*) pcmd, sizeof(struct cmd_obj)); #ifdef CONFIG_MP_INCLUDED if (padapter->registrypriv.mp_mode == 1) padapter->mppriv.workparam.bcompleted= _TRUE; #endif _func_exit_; } void rtw_readtssi_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd) { _func_enter_; rtw_mfree((unsigned char*) pcmd->parmbuf, pcmd->cmdsz); rtw_mfree((unsigned char*) pcmd, sizeof(struct cmd_obj)); #ifdef CONFIG_MP_INCLUDED if (padapter->registrypriv.mp_mode == 1) padapter->mppriv.workparam.bcompleted= _TRUE; #endif _func_exit_; } u8 rtw_createbss_cmd(_adapter *padapter) { struct cmd_obj* pcmd; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; WLAN_BSSID_EX *pdev_network = &padapter->registrypriv.dev_network; u8 res=_SUCCESS; _func_enter_; rtw_led_control(padapter, LED_CTL_START_TO_LINK); if (pmlmepriv->assoc_ssid.SsidLength == 0){ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,(" createbss for Any SSid:%s\n",pmlmepriv->assoc_ssid.Ssid)); } else { RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,(" createbss for SSid:%s\n", pmlmepriv->assoc_ssid.Ssid)); } pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(pcmd==NULL){ res= _FAIL; goto exit; } _rtw_init_listhead(&pcmd->list); pcmd->cmdcode = _CreateBss_CMD_; pcmd->parmbuf = (unsigned char *)pdev_network; pcmd->cmdsz = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX*)pdev_network); pcmd->rsp = NULL; pcmd->rspsz = 0; pdev_network->Length = pcmd->cmdsz; #ifdef CONFIG_RTL8712 //notes: translate IELength & Length after assign the Length to cmdsz; pdev_network->Length = cpu_to_le32(pcmd->cmdsz); pdev_network->IELength = cpu_to_le32(pdev_network->IELength); pdev_network->Ssid.SsidLength = cpu_to_le32(pdev_network->Ssid.SsidLength); #endif res = rtw_enqueue_cmd(pcmdpriv, pcmd); exit: _func_exit_; return res; } u8 rtw_createbss_cmd_ex(_adapter *padapter, unsigned char *pbss, unsigned int sz) { struct cmd_obj* pcmd; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; u8 res=_SUCCESS; _func_enter_; pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(pcmd==NULL){ res= _FAIL; goto exit; } _rtw_init_listhead(&pcmd->list); pcmd->cmdcode = GEN_CMD_CODE(_CreateBss); pcmd->parmbuf = pbss; pcmd->cmdsz = sz; pcmd->rsp = NULL; pcmd->rspsz = 0; res = rtw_enqueue_cmd(pcmdpriv, pcmd); exit: _func_exit_; return res; } u8 rtw_startbss_cmd(_adapter *padapter, int flags) { struct cmd_obj* pcmd; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; struct submit_ctx sctx; u8 res=_SUCCESS; _func_enter_; if (flags & RTW_CMDF_DIRECTLY) { /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ start_bss_network(padapter, (u8*)&(padapter->mlmepriv.cur_network.network)); } else { /* need enqueue, prepare cmd_obj and enqueue */ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if (pcmd == NULL) { res = _FAIL; goto exit; } _rtw_init_listhead(&pcmd->list); pcmd->cmdcode = GEN_CMD_CODE(_CreateBss); pcmd->parmbuf = NULL; pcmd->cmdsz = 0; pcmd->rsp = NULL; pcmd->rspsz = 0; if (flags & RTW_CMDF_WAIT_ACK) { pcmd->sctx = &sctx; rtw_sctx_init(&sctx, 2000); } res = rtw_enqueue_cmd(pcmdpriv, pcmd); if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { rtw_sctx_wait(&sctx, __func__); _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); if (sctx.status == RTW_SCTX_SUBMITTED) pcmd->sctx = NULL; _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); } } exit: _func_exit_; return res; } u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network* pnetwork) { u8 *auth, res = _SUCCESS; uint t_len = 0; WLAN_BSSID_EX *psecnetwork; struct cmd_obj *pcmd; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct qos_priv *pqospriv= &pmlmepriv->qospriv; struct security_priv *psecuritypriv=&padapter->securitypriv; struct registry_priv *pregistrypriv = &padapter->registrypriv; #ifdef CONFIG_80211N_HT struct ht_priv *phtpriv = &pmlmepriv->htpriv; #endif //CONFIG_80211N_HT #ifdef CONFIG_80211AC_VHT struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; #endif //CONFIG_80211AC_VHT NDIS_802_11_NETWORK_INFRASTRUCTURE ndis_network_mode = pnetwork->network.InfrastructureMode; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u32 tmp_len; u8 *ptmp=NULL; _func_enter_; rtw_led_control(padapter, LED_CTL_START_TO_LINK); if (pmlmepriv->assoc_ssid.SsidLength == 0){ RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, ("+Join cmd: Any SSid\n")); } else { RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+Join cmd: SSid=[%s]\n", pmlmepriv->assoc_ssid.Ssid)); } pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(pcmd==NULL){ res=_FAIL; RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("rtw_joinbss_cmd: memory allocate for cmd_obj fail!!!\n")); goto exit; } /* // for IEs is pointer t_len = sizeof (ULONG) + sizeof (NDIS_802_11_MAC_ADDRESS) + 2 + sizeof (NDIS_802_11_SSID) + sizeof (ULONG) + sizeof (NDIS_802_11_RSSI) + sizeof (NDIS_802_11_NETWORK_TYPE) + sizeof (NDIS_802_11_CONFIGURATION) + sizeof (NDIS_802_11_NETWORK_INFRASTRUCTURE) + sizeof (NDIS_802_11_RATES_EX)+ sizeof(WLAN_PHY_INFO)+ sizeof (ULONG) + MAX_IE_SZ; */ //for IEs is fix buf size t_len = sizeof(WLAN_BSSID_EX); //for hidden ap to set fw_state here if (check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) != _TRUE) { switch(ndis_network_mode) { case Ndis802_11IBSS: set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); break; case Ndis802_11Infrastructure: set_fwstate(pmlmepriv, WIFI_STATION_STATE); break; case Ndis802_11APMode: case Ndis802_11AutoUnknown: case Ndis802_11InfrastructureMax: break; } } pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pnetwork->network.IEs, pnetwork->network.IELength); psecnetwork=(WLAN_BSSID_EX *)&psecuritypriv->sec_bss; if(psecnetwork==NULL) { if(pcmd !=NULL) rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); res=_FAIL; RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("rtw_joinbss_cmd :psecnetwork==NULL!!!\n")); goto exit; } _rtw_memset(psecnetwork, 0, t_len); _rtw_memcpy(psecnetwork, &pnetwork->network, get_WLAN_BSSID_EX_sz(&pnetwork->network)); auth=&psecuritypriv->authenticator_ie[0]; psecuritypriv->authenticator_ie[0]=(unsigned char)psecnetwork->IELength; if((psecnetwork->IELength-12) < (256-1)) { _rtw_memcpy(&psecuritypriv->authenticator_ie[1], &psecnetwork->IEs[12], psecnetwork->IELength-12); } else { _rtw_memcpy(&psecuritypriv->authenticator_ie[1], &psecnetwork->IEs[12], (256-1)); } psecnetwork->IELength = 0; // Added by Albert 2009/02/18 // If the the driver wants to use the bssid to create the connection. // If not, we have to copy the connecting AP's MAC address to it so that // the driver just has the bssid information for PMKIDList searching. if ( pmlmepriv->assoc_by_bssid == _FALSE ) { _rtw_memcpy( &pmlmepriv->assoc_bssid[ 0 ], &pnetwork->network.MacAddress[ 0 ], ETH_ALEN ); } psecnetwork->IELength = rtw_restruct_sec_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0], pnetwork->network.IELength); pqospriv->qos_option = 0; if(pregistrypriv->wmm_enable) { tmp_len = rtw_restruct_wmm_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0], pnetwork->network.IELength, psecnetwork->IELength); if (psecnetwork->IELength != tmp_len) { psecnetwork->IELength = tmp_len; pqospriv->qos_option = 1; //There is WMM IE in this corresp. beacon } else { pqospriv->qos_option = 0;//There is no WMM IE in this corresp. beacon } } #ifdef CONFIG_80211N_HT phtpriv->ht_option = _FALSE; ptmp = rtw_get_ie(&pnetwork->network.IEs[12], _HT_CAPABILITY_IE_, &tmp_len, pnetwork->network.IELength-12); if(pregistrypriv->ht_enable && ptmp && tmp_len>0) { // Added by Albert 2010/06/23 // For the WEP mode, we will use the bg mode to do the connection to avoid some IOT issue. // Especially for Realtek 8192u SoftAP. if ( ( padapter->securitypriv.dot11PrivacyAlgrthm != _WEP40_ ) && ( padapter->securitypriv.dot11PrivacyAlgrthm != _WEP104_ ) && ( padapter->securitypriv.dot11PrivacyAlgrthm != _TKIP_ )) { rtw_ht_use_default_setting(padapter); rtw_build_wmm_ie_ht(padapter, &psecnetwork->IEs[0], &psecnetwork->IELength); //rtw_restructure_ht_ie rtw_restructure_ht_ie(padapter, &pnetwork->network.IEs[12], &psecnetwork->IEs[0], pnetwork->network.IELength-12, &psecnetwork->IELength, pnetwork->network.Configuration.DSConfig); } } #ifdef CONFIG_80211AC_VHT pvhtpriv->vht_option = _FALSE; if (phtpriv->ht_option && pregistrypriv->vht_enable) { rtw_restructure_vht_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0], pnetwork->network.IELength, &psecnetwork->IELength); } #endif rtw_append_exented_cap(padapter, &psecnetwork->IEs[0], &psecnetwork->IELength); #endif //CONFIG_80211N_HT #if 0 psecuritypriv->supplicant_ie[0]=(u8)psecnetwork->IELength; if(psecnetwork->IELength < (256-1)) { _rtw_memcpy(&psecuritypriv->supplicant_ie[1], &psecnetwork->IEs[0], psecnetwork->IELength); } else { _rtw_memcpy(&psecuritypriv->supplicant_ie[1], &psecnetwork->IEs[0], (256-1)); } #endif pcmd->cmdsz = get_WLAN_BSSID_EX_sz(psecnetwork);//get cmdsz before endian conversion #ifdef CONFIG_RTL8712 //wlan_network endian conversion psecnetwork->Length = cpu_to_le32(psecnetwork->Length); psecnetwork->Ssid.SsidLength= cpu_to_le32(psecnetwork->Ssid.SsidLength); psecnetwork->Privacy = cpu_to_le32(psecnetwork->Privacy); psecnetwork->Rssi = cpu_to_le32(psecnetwork->Rssi); psecnetwork->NetworkTypeInUse = cpu_to_le32(psecnetwork->NetworkTypeInUse); psecnetwork->Configuration.ATIMWindow = cpu_to_le32(psecnetwork->Configuration.ATIMWindow); psecnetwork->Configuration.BeaconPeriod = cpu_to_le32(psecnetwork->Configuration.BeaconPeriod); psecnetwork->Configuration.DSConfig = cpu_to_le32(psecnetwork->Configuration.DSConfig); psecnetwork->Configuration.FHConfig.DwellTime=cpu_to_le32(psecnetwork->Configuration.FHConfig.DwellTime); psecnetwork->Configuration.FHConfig.HopPattern=cpu_to_le32(psecnetwork->Configuration.FHConfig.HopPattern); psecnetwork->Configuration.FHConfig.HopSet=cpu_to_le32(psecnetwork->Configuration.FHConfig.HopSet); psecnetwork->Configuration.FHConfig.Length=cpu_to_le32(psecnetwork->Configuration.FHConfig.Length); psecnetwork->Configuration.Length = cpu_to_le32(psecnetwork->Configuration.Length); psecnetwork->InfrastructureMode = cpu_to_le32(psecnetwork->InfrastructureMode); psecnetwork->IELength = cpu_to_le32(psecnetwork->IELength); #endif _rtw_init_listhead(&pcmd->list); pcmd->cmdcode = _JoinBss_CMD_;//GEN_CMD_CODE(_JoinBss) pcmd->parmbuf = (unsigned char *)psecnetwork; pcmd->rsp = NULL; pcmd->rspsz = 0; res = rtw_enqueue_cmd(pcmdpriv, pcmd); exit: _func_exit_; return res; } u8 rtw_disassoc_cmd(_adapter*padapter, u32 deauth_timeout_ms, bool enqueue) /* for sta_mode */ { struct cmd_obj *cmdobj = NULL; struct disconnect_parm *param = NULL; struct cmd_priv *cmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; _func_enter_; RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_disassoc_cmd\n")); /* prepare cmd parameter */ param = (struct disconnect_parm *)rtw_zmalloc(sizeof(*param)); if (param == NULL) { res = _FAIL; goto exit; } param->deauth_timeout_ms = deauth_timeout_ms; if (enqueue) { /* need enqueue, prepare cmd_obj and enqueue */ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(*cmdobj)); if (cmdobj == NULL) { res = _FAIL; rtw_mfree((u8 *)param, sizeof(*param)); goto exit; } init_h2fwcmd_w_parm_no_rsp(cmdobj, param, _DisConnect_CMD_); res = rtw_enqueue_cmd(cmdpriv, cmdobj); } else { /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ if (H2C_SUCCESS != disconnect_hdl(padapter, (u8 *)param)) res = _FAIL; rtw_mfree((u8 *)param, sizeof(*param)); } exit: _func_exit_; return res; } u8 rtw_setopmode_cmd(_adapter *padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype, bool enqueue) { struct cmd_obj* ph2c; struct setopmode_parm* psetop; struct cmd_priv *pcmdpriv= &padapter->cmdpriv; u8 res=_SUCCESS; _func_enter_; psetop = (struct setopmode_parm*)rtw_zmalloc(sizeof(struct setopmode_parm)); if(psetop==NULL){ res=_FAIL; goto exit; } psetop->mode = (u8)networktype; if(enqueue){ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ rtw_mfree((u8 *)psetop, sizeof(*psetop)); res= _FAIL; goto exit; } init_h2fwcmd_w_parm_no_rsp(ph2c, psetop, _SetOpMode_CMD_); res = rtw_enqueue_cmd(pcmdpriv, ph2c); } else{ setopmode_hdl(padapter, (u8 *)psetop); rtw_mfree((u8 *)psetop, sizeof(*psetop)); } exit: _func_exit_; return res; } u8 rtw_setstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 unicast_key, bool enqueue) { struct cmd_obj* ph2c; struct set_stakey_parm *psetstakey_para; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; struct set_stakey_rsp *psetstakey_rsp = NULL; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; u8 res=_SUCCESS; _func_enter_; psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm)); if(psetstakey_para==NULL){ res=_FAIL; goto exit; } _rtw_memcpy(psetstakey_para->addr, sta->hwaddr,ETH_ALEN); if(check_fwstate(pmlmepriv, WIFI_STATION_STATE)){ #ifdef CONFIG_TDLS if(sta->tdls_sta_state&TDLS_LINKED_STATE) psetstakey_para->algorithm=(u8)sta->dot118021XPrivacy; else #endif //CONFIG_TDLS psetstakey_para->algorithm =(unsigned char) psecuritypriv->dot11PrivacyAlgrthm; }else{ GET_ENCRY_ALGO(psecuritypriv, sta, psetstakey_para->algorithm, _FALSE); } if (unicast_key == _TRUE) { #ifdef CONFIG_TDLS if((sta->tdls_sta_state&TDLS_LINKED_STATE)==TDLS_LINKED_STATE) _rtw_memcpy(&psetstakey_para->key, sta->tpk.tk, 16); else #endif //CONFIG_TDLS _rtw_memcpy(&psetstakey_para->key, &sta->dot118021x_UncstKey, 16); } else { _rtw_memcpy(&psetstakey_para->key, &psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey, 16); } //jeff: set this becasue at least sw key is ready padapter->securitypriv.busetkipkey=_TRUE; if(enqueue) { ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if ( ph2c == NULL){ rtw_mfree((u8 *) psetstakey_para, sizeof(struct set_stakey_parm)); res= _FAIL; goto exit; } psetstakey_rsp = (struct set_stakey_rsp*)rtw_zmalloc(sizeof(struct set_stakey_rsp)); if(psetstakey_rsp == NULL){ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); rtw_mfree((u8 *) psetstakey_para, sizeof(struct set_stakey_parm)); res=_FAIL; goto exit; } init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_); ph2c->rsp = (u8 *) psetstakey_rsp; ph2c->rspsz = sizeof(struct set_stakey_rsp); res = rtw_enqueue_cmd(pcmdpriv, ph2c); } else{ set_stakey_hdl(padapter, (u8 *)psetstakey_para); rtw_mfree((u8 *) psetstakey_para, sizeof(struct set_stakey_parm)); } exit: _func_exit_; return res; } u8 rtw_clearstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 enqueue) { struct cmd_obj* ph2c; struct set_stakey_parm *psetstakey_para; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; struct set_stakey_rsp *psetstakey_rsp = NULL; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; s16 cam_id = 0; u8 res=_SUCCESS; _func_enter_; if(!enqueue) { while((cam_id = rtw_camid_search(padapter, sta->hwaddr, -1)) >= 0) { DBG_871X_LEVEL(_drv_always_, "clear key for addr:"MAC_FMT", camid:%d\n", MAC_ARG(sta->hwaddr), cam_id); clear_cam_entry(padapter, cam_id); rtw_camid_free(padapter, cam_id); } } else { ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if ( ph2c == NULL){ res= _FAIL; goto exit; } psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm)); if(psetstakey_para==NULL){ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); res=_FAIL; goto exit; } psetstakey_rsp = (struct set_stakey_rsp*)rtw_zmalloc(sizeof(struct set_stakey_rsp)); if(psetstakey_rsp == NULL){ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); rtw_mfree((u8 *) psetstakey_para, sizeof(struct set_stakey_parm)); res=_FAIL; goto exit; } init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_); ph2c->rsp = (u8 *) psetstakey_rsp; ph2c->rspsz = sizeof(struct set_stakey_rsp); _rtw_memcpy(psetstakey_para->addr, sta->hwaddr, ETH_ALEN); psetstakey_para->algorithm = _NO_PRIVACY_; res = rtw_enqueue_cmd(pcmdpriv, ph2c); } exit: _func_exit_; return res; } u8 rtw_setrttbl_cmd(_adapter *padapter, struct setratable_parm *prate_table) { struct cmd_obj* ph2c; struct setratable_parm * psetrttblparm; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; u8 res=_SUCCESS; _func_enter_; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } psetrttblparm = (struct setratable_parm*)rtw_zmalloc(sizeof(struct setratable_parm)); if(psetrttblparm==NULL){ rtw_mfree((unsigned char *) ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } init_h2fwcmd_w_parm_no_rsp(ph2c, psetrttblparm, GEN_CMD_CODE(_SetRaTable)); _rtw_memcpy(psetrttblparm,prate_table,sizeof(struct setratable_parm)); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } u8 rtw_getrttbl_cmd(_adapter *padapter, struct getratable_rsp *pval) { struct cmd_obj* ph2c; struct getratable_parm * pgetrttblparm; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; u8 res=_SUCCESS; _func_enter_; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } pgetrttblparm = (struct getratable_parm*)rtw_zmalloc(sizeof(struct getratable_parm)); if(pgetrttblparm==NULL){ rtw_mfree((unsigned char *) ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } // init_h2fwcmd_w_parm_no_rsp(ph2c, psetrttblparm, GEN_CMD_CODE(_SetRaTable)); _rtw_init_listhead(&ph2c->list); ph2c->cmdcode =GEN_CMD_CODE(_GetRaTable); ph2c->parmbuf = (unsigned char *)pgetrttblparm; ph2c->cmdsz = sizeof(struct getratable_parm); ph2c->rsp = (u8*)pval; ph2c->rspsz = sizeof(struct getratable_rsp); pgetrttblparm ->rsvd = 0x0; res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } u8 rtw_setassocsta_cmd(_adapter *padapter, u8 *mac_addr) { struct cmd_priv *pcmdpriv = &padapter->cmdpriv; struct cmd_obj* ph2c; struct set_assocsta_parm *psetassocsta_para; struct set_stakey_rsp *psetassocsta_rsp = NULL; u8 res=_SUCCESS; _func_enter_; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } psetassocsta_para = (struct set_assocsta_parm*)rtw_zmalloc(sizeof(struct set_assocsta_parm)); if(psetassocsta_para==NULL){ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); res=_FAIL; goto exit; } psetassocsta_rsp = (struct set_stakey_rsp*)rtw_zmalloc(sizeof(struct set_assocsta_rsp)); if(psetassocsta_rsp==NULL){ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); rtw_mfree((u8 *) psetassocsta_para, sizeof(struct set_assocsta_parm)); return _FAIL; } init_h2fwcmd_w_parm_no_rsp(ph2c, psetassocsta_para, _SetAssocSta_CMD_); ph2c->rsp = (u8 *) psetassocsta_rsp; ph2c->rspsz = sizeof(struct set_assocsta_rsp); _rtw_memcpy(psetassocsta_para->addr, mac_addr,ETH_ALEN); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } u8 rtw_addbareq_cmd(_adapter*padapter, u8 tid, u8 *addr) { struct cmd_priv *pcmdpriv = &padapter->cmdpriv; struct cmd_obj* ph2c; struct addBaReq_parm *paddbareq_parm; u8 res=_SUCCESS; _func_enter_; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } paddbareq_parm = (struct addBaReq_parm*)rtw_zmalloc(sizeof(struct addBaReq_parm)); if(paddbareq_parm==NULL){ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } paddbareq_parm->tid = tid; _rtw_memcpy(paddbareq_parm->addr, addr, ETH_ALEN); init_h2fwcmd_w_parm_no_rsp(ph2c, paddbareq_parm, GEN_CMD_CODE(_AddBAReq)); //DBG_871X("rtw_addbareq_cmd, tid=%d\n", tid); //rtw_enqueue_cmd(pcmdpriv, ph2c); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } //add for CONFIG_IEEE80211W, none 11w can use it u8 rtw_reset_securitypriv_cmd(_adapter*padapter) { struct cmd_obj* ph2c; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; u8 res=_SUCCESS; _func_enter_; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); if(pdrvextra_cmd_parm==NULL){ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } pdrvextra_cmd_parm->ec_id = RESET_SECURITYPRIV; pdrvextra_cmd_parm->type = 0; pdrvextra_cmd_parm->size = 0; pdrvextra_cmd_parm->pbuf = NULL; init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); //rtw_enqueue_cmd(pcmdpriv, ph2c); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } u8 rtw_free_assoc_resources_cmd(_adapter*padapter) { struct cmd_obj* ph2c; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; u8 res=_SUCCESS; _func_enter_; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); if(pdrvextra_cmd_parm==NULL){ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } pdrvextra_cmd_parm->ec_id = FREE_ASSOC_RESOURCES; pdrvextra_cmd_parm->type = 0; pdrvextra_cmd_parm->size = 0; pdrvextra_cmd_parm->pbuf = NULL; init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); //rtw_enqueue_cmd(pcmdpriv, ph2c); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } u8 rtw_dynamic_chk_wk_cmd(_adapter*padapter) { struct cmd_obj* ph2c; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; u8 res=_SUCCESS; _func_enter_; //only primary padapter does this cmd /* #ifdef CONFIG_CONCURRENT_MODE if (padapter->adapter_type != PRIMARY_ADAPTER && padapter->pbuddy_adapter) pcmdpriv = &(padapter->pbuddy_adapter->cmdpriv); #endif */ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); if(pdrvextra_cmd_parm==NULL){ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } pdrvextra_cmd_parm->ec_id = DYNAMIC_CHK_WK_CID; pdrvextra_cmd_parm->type = 0; pdrvextra_cmd_parm->size = 0; pdrvextra_cmd_parm->pbuf = NULL; init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); //rtw_enqueue_cmd(pcmdpriv, ph2c); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } u8 rtw_set_ch_cmd(_adapter*padapter, u8 ch, u8 bw, u8 ch_offset, u8 enqueue) { struct cmd_obj *pcmdobj; struct set_ch_parm *set_ch_parm; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res=_SUCCESS; _func_enter_; DBG_871X(FUNC_NDEV_FMT" ch:%u, bw:%u, ch_offset:%u\n", FUNC_NDEV_ARG(padapter->pnetdev), ch, bw, ch_offset); /* check input parameter */ /* prepare cmd parameter */ set_ch_parm = (struct set_ch_parm *)rtw_zmalloc(sizeof(*set_ch_parm)); if (set_ch_parm == NULL) { res= _FAIL; goto exit; } set_ch_parm->ch = ch; set_ch_parm->bw = bw; set_ch_parm->ch_offset = ch_offset; if (enqueue) { /* need enqueue, prepare cmd_obj and enqueue */ pcmdobj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(pcmdobj == NULL){ rtw_mfree((u8 *)set_ch_parm, sizeof(*set_ch_parm)); res=_FAIL; goto exit; } init_h2fwcmd_w_parm_no_rsp(pcmdobj, set_ch_parm, GEN_CMD_CODE(_SetChannel)); res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); } else { /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ if( H2C_SUCCESS !=set_ch_hdl(padapter, (u8 *)set_ch_parm) ) res = _FAIL; rtw_mfree((u8 *)set_ch_parm, sizeof(*set_ch_parm)); } /* do something based on res... */ exit: DBG_871X(FUNC_NDEV_FMT" res:%u\n", FUNC_NDEV_ARG(padapter->pnetdev), res); _func_exit_; return res; } u8 rtw_set_chplan_cmd(_adapter*padapter, u8 chplan, u8 enqueue, u8 swconfig) { struct cmd_obj* pcmdobj; struct SetChannelPlan_param *setChannelPlan_param; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res=_SUCCESS; _func_enter_; RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_set_chplan_cmd\n")); // check if allow software config if (swconfig && rtw_hal_is_disable_sw_channel_plan(padapter) == _TRUE) { res = _FAIL; goto exit; } //check input parameter if(!rtw_is_channel_plan_valid(chplan)) { res = _FAIL; goto exit; } //prepare cmd parameter setChannelPlan_param = (struct SetChannelPlan_param *)rtw_zmalloc(sizeof(struct SetChannelPlan_param)); if(setChannelPlan_param == NULL) { res= _FAIL; goto exit; } setChannelPlan_param->channel_plan=chplan; if(enqueue) { //need enqueue, prepare cmd_obj and enqueue pcmdobj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(pcmdobj == NULL){ rtw_mfree((u8 *)setChannelPlan_param, sizeof(struct SetChannelPlan_param)); res=_FAIL; goto exit; } init_h2fwcmd_w_parm_no_rsp(pcmdobj, setChannelPlan_param, GEN_CMD_CODE(_SetChannelPlan)); res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); } else { //no need to enqueue, do the cmd hdl directly and free cmd parameter if( H2C_SUCCESS != set_chplan_hdl(padapter, (unsigned char *)setChannelPlan_param) ) res = _FAIL; rtw_mfree((u8 *)setChannelPlan_param, sizeof(struct SetChannelPlan_param)); } exit: _func_exit_; return res; } u8 rtw_led_blink_cmd(_adapter*padapter, PVOID pLed) { struct cmd_obj* pcmdobj; struct LedBlink_param *ledBlink_param; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res=_SUCCESS; _func_enter_; RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_led_blink_cmd\n")); pcmdobj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(pcmdobj == NULL){ res=_FAIL; goto exit; } ledBlink_param = (struct LedBlink_param *)rtw_zmalloc(sizeof(struct LedBlink_param)); if(ledBlink_param == NULL) { rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } ledBlink_param->pLed=pLed; init_h2fwcmd_w_parm_no_rsp(pcmdobj, ledBlink_param, GEN_CMD_CODE(_LedBlink)); res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); exit: _func_exit_; return res; } u8 rtw_set_csa_cmd(_adapter*padapter, u8 new_ch_no) { struct cmd_obj* pcmdobj; struct SetChannelSwitch_param*setChannelSwitch_param; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res=_SUCCESS; _func_enter_; RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_set_csa_cmd\n")); pcmdobj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(pcmdobj == NULL){ res=_FAIL; goto exit; } setChannelSwitch_param = (struct SetChannelSwitch_param *)rtw_zmalloc(sizeof(struct SetChannelSwitch_param)); if(setChannelSwitch_param == NULL) { rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } setChannelSwitch_param->new_ch_no=new_ch_no; init_h2fwcmd_w_parm_no_rsp(pcmdobj, setChannelSwitch_param, GEN_CMD_CODE(_SetChannelSwitch)); res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); exit: _func_exit_; return res; } u8 rtw_tdls_cmd(_adapter *padapter, u8 *addr, u8 option) { struct cmd_obj* pcmdobj; struct TDLSoption_param *TDLSoption; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res=_SUCCESS; _func_enter_; #ifdef CONFIG_TDLS RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_set_tdls_cmd\n")); pcmdobj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(pcmdobj == NULL){ res=_FAIL; goto exit; } TDLSoption= (struct TDLSoption_param *)rtw_zmalloc(sizeof(struct TDLSoption_param)); if(TDLSoption == NULL) { rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } _rtw_spinlock(&(padapter->tdlsinfo.cmd_lock)); _rtw_memcpy(TDLSoption->addr, addr, 6); TDLSoption->option = option; _rtw_spinunlock(&(padapter->tdlsinfo.cmd_lock)); init_h2fwcmd_w_parm_no_rsp(pcmdobj, TDLSoption, GEN_CMD_CODE(_TDLS)); res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); #endif //CONFIG_TDLS exit: _func_exit_; return res; } static void collect_traffic_statistics(_adapter *padapter) { struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); #ifdef CONFIG_CONCURRENT_MODE if (padapter->adapter_type != PRIMARY_ADAPTER) return; #endif // Tx pdvobjpriv->traffic_stat.tx_bytes = padapter->xmitpriv.tx_bytes; pdvobjpriv->traffic_stat.tx_pkts = padapter->xmitpriv.tx_pkts; pdvobjpriv->traffic_stat.tx_drop = padapter->xmitpriv.tx_drop; // Rx pdvobjpriv->traffic_stat.rx_bytes = padapter->recvpriv.rx_bytes; pdvobjpriv->traffic_stat.rx_pkts = padapter->recvpriv.rx_pkts; pdvobjpriv->traffic_stat.rx_drop = padapter->recvpriv.rx_drop; #ifdef CONFIG_CONCURRENT_MODE // Add secondary adapter statistics if(rtw_buddy_adapter_up(padapter)) { // Tx pdvobjpriv->traffic_stat.tx_bytes += padapter->pbuddy_adapter->xmitpriv.tx_bytes; pdvobjpriv->traffic_stat.tx_pkts += padapter->pbuddy_adapter->xmitpriv.tx_pkts; pdvobjpriv->traffic_stat.tx_drop += padapter->pbuddy_adapter->xmitpriv.tx_drop; // Rx pdvobjpriv->traffic_stat.rx_bytes += padapter->pbuddy_adapter->recvpriv.rx_bytes; pdvobjpriv->traffic_stat.rx_pkts += padapter->pbuddy_adapter->recvpriv.rx_pkts; pdvobjpriv->traffic_stat.rx_drop += padapter->pbuddy_adapter->recvpriv.rx_drop; } #endif // Calculate throughput in last interval pdvobjpriv->traffic_stat.cur_tx_bytes = pdvobjpriv->traffic_stat.tx_bytes - pdvobjpriv->traffic_stat.last_tx_bytes; pdvobjpriv->traffic_stat.cur_rx_bytes = pdvobjpriv->traffic_stat.rx_bytes - pdvobjpriv->traffic_stat.last_rx_bytes; pdvobjpriv->traffic_stat.last_tx_bytes = pdvobjpriv->traffic_stat.tx_bytes; pdvobjpriv->traffic_stat.last_rx_bytes = pdvobjpriv->traffic_stat.rx_bytes; pdvobjpriv->traffic_stat.cur_tx_tp = (u32)(pdvobjpriv->traffic_stat.cur_tx_bytes *8/2/1024/1024); pdvobjpriv->traffic_stat.cur_rx_tp = (u32)(pdvobjpriv->traffic_stat.cur_rx_bytes *8/2/1024/1024); } u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer) { u8 bEnterPS = _FALSE; #ifdef CONFIG_BT_COEXIST u16 BusyThresholdHigh = 25; u16 BusyThresholdLow = 10; #else u16 BusyThresholdHigh = 100; u16 BusyThresholdLow = 75; #endif u16 BusyThreshold = BusyThresholdHigh; u8 bBusyTraffic = _FALSE, bTxBusyTraffic = _FALSE, bRxBusyTraffic = _FALSE; u8 bHigherBusyTraffic = _FALSE, bHigherBusyRxTraffic = _FALSE, bHigherBusyTxTraffic = _FALSE; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); #ifdef CONFIG_TDLS struct tdls_info *ptdlsinfo = &(padapter->tdlsinfo); struct tdls_txmgmt txmgmt; u8 baddr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; #endif //CONFIG_TDLS RT_LINK_DETECT_T * link_detect = &pmlmepriv->LinkDetectInfo; collect_traffic_statistics(padapter); // // Determine if our traffic is busy now // if((check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) /*&& !MgntInitAdapterInProgress(pMgntInfo)*/) { // if we raise bBusyTraffic in last watchdog, using lower threshold. if (pmlmepriv->LinkDetectInfo.bBusyTraffic) BusyThreshold = BusyThresholdLow; if( pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > BusyThreshold || pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > BusyThreshold ) { bBusyTraffic = _TRUE; if (pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > pmlmepriv->LinkDetectInfo.NumTxOkInPeriod) bRxBusyTraffic = _TRUE; else bTxBusyTraffic = _TRUE; } // Higher Tx/Rx data. if( pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > 4000 || pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > 4000 ) { bHigherBusyTraffic = _TRUE; if (pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > pmlmepriv->LinkDetectInfo.NumTxOkInPeriod) bHigherBusyRxTraffic = _TRUE; else bHigherBusyTxTraffic = _TRUE; } #ifdef CONFIG_TRAFFIC_PROTECT #define TX_ACTIVE_TH 10 #define RX_ACTIVE_TH 20 #define TRAFFIC_PROTECT_PERIOD_MS 4500 if (link_detect->NumTxOkInPeriod > TX_ACTIVE_TH || link_detect->NumRxUnicastOkInPeriod > RX_ACTIVE_TH) { DBG_871X_LEVEL(_drv_info_, FUNC_ADPT_FMT" acqiure wake_lock for %u ms(tx:%d,rx_unicast:%d)\n", FUNC_ADPT_ARG(padapter), TRAFFIC_PROTECT_PERIOD_MS, link_detect->NumTxOkInPeriod, link_detect->NumRxUnicastOkInPeriod); rtw_lock_traffic_suspend_timeout(TRAFFIC_PROTECT_PERIOD_MS); } #endif #ifdef CONFIG_TDLS #ifdef CONFIG_TDLS_AUTOSETUP if( ( ptdlsinfo->watchdog_count % TDLS_WATCHDOG_PERIOD ) == 0 ) //10 * 2sec, periodically sending { _rtw_memcpy(txmgmt.peer, baddr, ETH_ALEN); issue_tdls_dis_req( padapter, &txmgmt ); } ptdlsinfo->watchdog_count++; #endif //CONFIG_TDLS_AUTOSETUP #endif //CONFIG_TDLS #ifdef CONFIG_LPS // check traffic for powersaving. if( ((pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod + pmlmepriv->LinkDetectInfo.NumTxOkInPeriod) > 8 ) || (pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) ) { //DBG_871X("(-)Tx = %d, Rx = %d \n",pmlmepriv->LinkDetectInfo.NumTxOkInPeriod,pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); bEnterPS= _FALSE; if(bBusyTraffic == _TRUE) { if(pmlmepriv->LinkDetectInfo.TrafficTransitionCount <= 4) pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 4; pmlmepriv->LinkDetectInfo.TrafficTransitionCount++; //DBG_871X("Set TrafficTransitionCount to %d\n", pmlmepriv->LinkDetectInfo.TrafficTransitionCount); if(pmlmepriv->LinkDetectInfo.TrafficTransitionCount > 30/*TrafficTransitionLevel*/) { pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 30; } } } else { //DBG_871X("(+)Tx = %d, Rx = %d \n",pmlmepriv->LinkDetectInfo.NumTxOkInPeriod,pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); if(pmlmepriv->LinkDetectInfo.TrafficTransitionCount>=2) pmlmepriv->LinkDetectInfo.TrafficTransitionCount -=2; else pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 0; if(pmlmepriv->LinkDetectInfo.TrafficTransitionCount == 0) bEnterPS= _TRUE; } #ifdef CONFIG_DYNAMIC_DTIM if(pmlmepriv->LinkDetectInfo.LowPowerTransitionCount == 8) bEnterPS= _FALSE; DBG_871X("LowPowerTransitionCount=%d\n", pmlmepriv->LinkDetectInfo.LowPowerTransitionCount); #endif //CONFIG_DYNAMIC_DTIM // LeisurePS only work in infra mode. if(bEnterPS) { if(!from_timer) { #ifdef CONFIG_DYNAMIC_DTIM if(pmlmepriv->LinkDetectInfo.LowPowerTransitionCount < 8) { adapter_to_pwrctl(padapter)->dtim = 1; } else { adapter_to_pwrctl(padapter)->dtim = 3; } #endif //CONFIG_DYNAMIC_DTIM LPS_Enter(padapter, "TRAFFIC_IDLE"); } else { //do this at caller //rtw_lps_ctrl_wk_cmd(adapter, LPS_CTRL_ENTER, 1); //rtw_hal_dm_watchdog_in_lps(padapter); } #ifdef CONFIG_DYNAMIC_DTIM if (adapter_to_pwrctl(padapter)->bFwCurrentInPSMode ==_TRUE ) pmlmepriv->LinkDetectInfo.LowPowerTransitionCount++; #endif //CONFIG_DYNAMIC_DTIM } else { #ifdef CONFIG_DYNAMIC_DTIM if(pmlmepriv->LinkDetectInfo.LowPowerTransitionCount != 8) pmlmepriv->LinkDetectInfo.LowPowerTransitionCount = 0; else pmlmepriv->LinkDetectInfo.LowPowerTransitionCount++; #endif //CONFIG_DYNAMIC_DTIM if(!from_timer) { LPS_Leave(padapter, "TRAFFIC_BUSY"); } else { #ifdef CONFIG_CONCURRENT_MODE if(padapter->iface_type == IFACE_PORT0) #endif rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_TRAFFIC_BUSY, 1); } } #endif // CONFIG_LPS } else { #ifdef CONFIG_LPS struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); int n_assoc_iface = 0; int i; for (i = 0; i < dvobj->iface_nums; i++) { if (check_fwstate(&(dvobj->padapters[i]->mlmepriv), WIFI_ASOC_STATE)) n_assoc_iface++; } if(!from_timer && n_assoc_iface == 0) LPS_Leave(padapter, "NON_LINKED"); #endif } pmlmepriv->LinkDetectInfo.NumRxOkInPeriod = 0; pmlmepriv->LinkDetectInfo.NumTxOkInPeriod = 0; pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod = 0; pmlmepriv->LinkDetectInfo.bBusyTraffic = bBusyTraffic; pmlmepriv->LinkDetectInfo.bTxBusyTraffic = bTxBusyTraffic; pmlmepriv->LinkDetectInfo.bRxBusyTraffic = bRxBusyTraffic; pmlmepriv->LinkDetectInfo.bHigherBusyTraffic = bHigherBusyTraffic; pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic = bHigherBusyRxTraffic; pmlmepriv->LinkDetectInfo.bHigherBusyTxTraffic = bHigherBusyTxTraffic; return bEnterPS; } void dynamic_chk_wk_hdl(_adapter *padapter) { struct mlme_priv *pmlmepriv; pmlmepriv = &(padapter->mlmepriv); #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK #ifdef CONFIG_AP_MODE if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { expire_timeout_chk(padapter); } #endif #endif //CONFIG_ACTIVE_KEEP_ALIVE_CHECK #ifdef DBG_CONFIG_ERROR_DETECT rtw_hal_sreset_xmit_status_check(padapter); rtw_hal_sreset_linked_status_check(padapter); #endif //for debug purpose _linked_info_dump(padapter); //if(check_fwstate(pmlmepriv, _FW_UNDER_LINKING|_FW_UNDER_SURVEY)==_FALSE) { linked_status_chk(padapter); traffic_status_watchdog(padapter, 0); dm_DynamicUsbTxAgg(padapter, 0); } #ifdef CONFIG_BEAMFORMING beamforming_watchdog(padapter); #endif rtw_hal_dm_watchdog(padapter); //check_hw_pbc(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->type); #ifdef CONFIG_BT_COEXIST // // BT-Coexist // rtw_btcoex_Handler(padapter); #endif #ifdef CONFIG_IPS_CHECK_IN_WD //always call rtw_ps_processor() at last one. if(is_primary_adapter(padapter)) rtw_ps_processor(padapter); #endif } #ifdef CONFIG_LPS void lps_ctrl_wk_hdl(_adapter *padapter, u8 lps_ctrl_type); void lps_ctrl_wk_hdl(_adapter *padapter, u8 lps_ctrl_type) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); u8 mstatus; _func_enter_; if((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) { return; } switch(lps_ctrl_type) { case LPS_CTRL_SCAN: //DBG_871X("LPS_CTRL_SCAN \n"); #ifdef CONFIG_BT_COEXIST rtw_btcoex_ScanNotify(padapter, _TRUE); #endif // CONFIG_BT_COEXIST if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { // connect LPS_Leave(padapter, "LPS_CTRL_SCAN"); } break; case LPS_CTRL_JOINBSS: //DBG_871X("LPS_CTRL_JOINBSS \n"); LPS_Leave(padapter, "LPS_CTRL_JOINBSS"); break; case LPS_CTRL_CONNECT: //DBG_871X("LPS_CTRL_CONNECT \n"); mstatus = 1;//connect // Reset LPS Setting pwrpriv->LpsIdleCount = 0; rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus)); #ifdef CONFIG_BT_COEXIST rtw_btcoex_MediaStatusNotify(padapter, mstatus); #endif // CONFIG_BT_COEXIST break; case LPS_CTRL_DISCONNECT: //DBG_871X("LPS_CTRL_DISCONNECT \n"); mstatus = 0;//disconnect #ifdef CONFIG_BT_COEXIST rtw_btcoex_MediaStatusNotify(padapter, mstatus); #endif // CONFIG_BT_COEXIST LPS_Leave(padapter, "LPS_CTRL_DISCONNECT"); rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus)); break; case LPS_CTRL_SPECIAL_PACKET: //DBG_871X("LPS_CTRL_SPECIAL_PACKET \n"); pwrpriv->DelayLPSLastTimeStamp = rtw_get_current_time(); #ifdef CONFIG_BT_COEXIST rtw_btcoex_SpecialPacketNotify(padapter, PACKET_DHCP); #endif // CONFIG_BT_COEXIST LPS_Leave(padapter, "LPS_CTRL_SPECIAL_PACKET"); break; case LPS_CTRL_LEAVE: //DBG_871X("LPS_CTRL_LEAVE \n"); LPS_Leave(padapter, "LPS_CTRL_LEAVE"); break; case LPS_CTRL_TRAFFIC_BUSY: LPS_Leave(padapter, "LPS_CTRL_TRAFFIC_BUSY"); default: break; } _func_exit_; } u8 rtw_lps_ctrl_wk_cmd(_adapter*padapter, u8 lps_ctrl_type, u8 enqueue) { struct cmd_obj *ph2c; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; //struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); u8 res = _SUCCESS; _func_enter_; //if(!pwrctrlpriv->bLeisurePs) // return res; if(enqueue) { ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); if(pdrvextra_cmd_parm==NULL){ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } pdrvextra_cmd_parm->ec_id = LPS_CTRL_WK_CID; pdrvextra_cmd_parm->type = lps_ctrl_type; pdrvextra_cmd_parm->size = 0; pdrvextra_cmd_parm->pbuf = NULL; init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); res = rtw_enqueue_cmd(pcmdpriv, ph2c); } else { lps_ctrl_wk_hdl(padapter, lps_ctrl_type); } exit: _func_exit_; return res; } void rtw_dm_in_lps_hdl(_adapter*padapter) { rtw_hal_set_hwreg(padapter, HW_VAR_DM_IN_LPS, NULL); } u8 rtw_dm_in_lps_wk_cmd(_adapter*padapter) { struct cmd_obj *ph2c; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); if(pdrvextra_cmd_parm==NULL){ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } pdrvextra_cmd_parm->ec_id = DM_IN_LPS_WK_CID; pdrvextra_cmd_parm->type = 0; pdrvextra_cmd_parm->size = 0; pdrvextra_cmd_parm->pbuf = NULL; init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: return res; } void rtw_lps_change_dtim_hdl(_adapter *padapter, u8 dtim) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); if(dtim <=0 || dtim > 16) return; #ifdef CONFIG_BT_COEXIST if (rtw_btcoex_IsBtControlLps(padapter) == _TRUE) return; #endif #ifdef CONFIG_LPS_LCLK _enter_pwrlock(&pwrpriv->lock); #endif if(pwrpriv->dtim!=dtim) { DBG_871X("change DTIM from %d to %d, bFwCurrentInPSMode=%d, ps_mode=%d\n", pwrpriv->dtim, dtim, pwrpriv->bFwCurrentInPSMode, pwrpriv->pwr_mode); pwrpriv->dtim = dtim; } if((pwrpriv->bFwCurrentInPSMode ==_TRUE) && (pwrpriv->pwr_mode > PS_MODE_ACTIVE)) { u8 ps_mode = pwrpriv->pwr_mode; //DBG_871X("change DTIM from %d to %d, ps_mode=%d\n", pwrpriv->dtim, dtim, ps_mode); rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode)); } #ifdef CONFIG_LPS_LCLK _exit_pwrlock(&pwrpriv->lock); #endif } #endif u8 rtw_lps_change_dtim_cmd(_adapter*padapter, u8 dtim) { struct cmd_obj *ph2c; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; /* #ifdef CONFIG_CONCURRENT_MODE if (padapter->iface_type != IFACE_PORT0) return res; #endif */ { ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); if(pdrvextra_cmd_parm==NULL){ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } pdrvextra_cmd_parm->ec_id = LPS_CHANGE_DTIM_CID; pdrvextra_cmd_parm->type = dtim; pdrvextra_cmd_parm->size = 0; pdrvextra_cmd_parm->pbuf = NULL; init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); res = rtw_enqueue_cmd(pcmdpriv, ph2c); } exit: return res; } #if (RATE_ADAPTIVE_SUPPORT==1) void rpt_timer_setting_wk_hdl(_adapter *padapter, u16 minRptTime) { rtw_hal_set_hwreg(padapter, HW_VAR_RPT_TIMER_SETTING, (u8 *)(&minRptTime)); } u8 rtw_rpt_timer_cfg_cmd(_adapter*padapter, u16 minRptTime) { struct cmd_obj *ph2c; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; _func_enter_; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); if(pdrvextra_cmd_parm==NULL){ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } pdrvextra_cmd_parm->ec_id = RTP_TIMER_CFG_WK_CID; pdrvextra_cmd_parm->type = minRptTime; pdrvextra_cmd_parm->size = 0; pdrvextra_cmd_parm->pbuf = NULL; init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } #endif #ifdef CONFIG_ANTENNA_DIVERSITY void antenna_select_wk_hdl(_adapter *padapter, u8 antenna) { rtw_hal_set_hwreg(padapter, HW_VAR_ANTENNA_DIVERSITY_SELECT, (u8 *)(&antenna)); } u8 rtw_antenna_select_cmd(_adapter*padapter, u8 antenna,u8 enqueue) { struct cmd_obj *ph2c; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 bSupportAntDiv = _FALSE; u8 res = _SUCCESS; _func_enter_; rtw_hal_get_def_var(padapter, HAL_DEF_IS_SUPPORT_ANT_DIV, &(bSupportAntDiv)); if(_FALSE == bSupportAntDiv ) return res; if(_TRUE == enqueue) { ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); if(pdrvextra_cmd_parm==NULL){ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } pdrvextra_cmd_parm->ec_id = ANT_SELECT_WK_CID; pdrvextra_cmd_parm->type = antenna; pdrvextra_cmd_parm->size = 0; pdrvextra_cmd_parm->pbuf = NULL; init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); res = rtw_enqueue_cmd(pcmdpriv, ph2c); } else{ antenna_select_wk_hdl(padapter,antenna ); } exit: _func_exit_; return res; } #endif void rtw_dm_ra_mask_hdl(_adapter *padapter, struct sta_info *psta) { if (psta) { set_sta_rate(padapter, psta); } } u8 rtw_dm_ra_mask_wk_cmd(_adapter*padapter, u8 *psta) { struct cmd_obj *ph2c; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); if(pdrvextra_cmd_parm==NULL){ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } pdrvextra_cmd_parm->ec_id = DM_RA_MSK_WK_CID; pdrvextra_cmd_parm->type = 0; pdrvextra_cmd_parm->size = 0; pdrvextra_cmd_parm->pbuf = psta; init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: return res; } void power_saving_wk_hdl(_adapter *padapter) { rtw_ps_processor(padapter); } //add for CONFIG_IEEE80211W, none 11w can use it void reset_securitypriv_hdl(_adapter *padapter) { rtw_reset_securitypriv(padapter); } void free_assoc_resources_hdl(_adapter *padapter) { rtw_free_assoc_resources(padapter, 1); } #ifdef CONFIG_P2P u8 p2p_protocol_wk_cmd(_adapter*padapter, int intCmdType ) { struct cmd_obj *ph2c; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct wifidirect_info *pwdinfo= &(padapter->wdinfo); struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; _func_enter_; if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { return res; } ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); if(pdrvextra_cmd_parm==NULL){ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } pdrvextra_cmd_parm->ec_id = P2P_PROTO_WK_CID; pdrvextra_cmd_parm->type = intCmdType; // As the command tppe. pdrvextra_cmd_parm->size = 0; pdrvextra_cmd_parm->pbuf = NULL; // Must be NULL here init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } #endif //CONFIG_P2P u8 rtw_ps_cmd(_adapter*padapter) { struct cmd_obj *ppscmd; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; _func_enter_; #ifdef CONFIG_CONCURRENT_MODE if (padapter->adapter_type != PRIMARY_ADAPTER) goto exit; #endif ppscmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ppscmd==NULL){ res= _FAIL; goto exit; } pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); if(pdrvextra_cmd_parm==NULL){ rtw_mfree((unsigned char *)ppscmd, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } pdrvextra_cmd_parm->ec_id = POWER_SAVING_CTRL_WK_CID; pdrvextra_cmd_parm->type = 0; pdrvextra_cmd_parm->size = 0; pdrvextra_cmd_parm->pbuf = NULL; init_h2fwcmd_w_parm_no_rsp(ppscmd, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); res = rtw_enqueue_cmd(pcmdpriv, ppscmd); exit: _func_exit_; return res; } #ifdef CONFIG_AP_MODE static void rtw_chk_hi_queue_hdl(_adapter *padapter) { struct sta_info *psta_bmc; struct sta_priv *pstapriv = &padapter->stapriv; u32 start = rtw_get_current_time(); u8 empty = _FALSE; psta_bmc = rtw_get_bcmc_stainfo(padapter); if(!psta_bmc) return; rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty); while(_FALSE == empty && rtw_get_passing_time_ms(start) < rtw_get_wait_hiq_empty_ms()) { rtw_msleep_os(100); rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty); } if(psta_bmc->sleepq_len==0) { if(empty == _SUCCESS) { bool update_tim = _FALSE; if (pstapriv->tim_bitmap & BIT(0)) update_tim = _TRUE; pstapriv->tim_bitmap &= ~BIT(0); pstapriv->sta_dz_bitmap &= ~BIT(0); if (update_tim == _TRUE) _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "bmc sleepq and HIQ empty"); } else //re check again { rtw_chk_hi_queue_cmd(padapter); } } } u8 rtw_chk_hi_queue_cmd(_adapter*padapter) { struct cmd_obj *ph2c; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); if(pdrvextra_cmd_parm==NULL){ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } pdrvextra_cmd_parm->ec_id = CHECK_HIQ_WK_CID; pdrvextra_cmd_parm->type = 0; pdrvextra_cmd_parm->size = 0; pdrvextra_cmd_parm->pbuf = NULL; init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: return res; } #endif #ifdef CONFIG_BT_COEXIST struct btinfo { u8 cid; u8 len; u8 bConnection:1; u8 bSCOeSCO:1; u8 bInQPage:1; u8 bACLBusy:1; u8 bSCOBusy:1; u8 bHID:1; u8 bA2DP:1; u8 bFTP:1; u8 retry_cnt:4; u8 rsvd_34:1; u8 rsvd_35:1; u8 rsvd_36:1; u8 rsvd_37:1; u8 rssi; u8 rsvd_50:1; u8 rsvd_51:1; u8 rsvd_52:1; u8 rsvd_53:1; u8 rsvd_54:1; u8 rsvd_55:1; u8 eSCO_SCO:1; u8 Master_Slave:1; u8 rsvd_6; u8 rsvd_7; }; void btinfo_evt_dump(void *sel, void *buf) { struct btinfo *info = (struct btinfo *)buf; DBG_871X_SEL_NL(sel, "cid:0x%02x, len:%u\n", info->cid, info->len); if (info->len > 2) DBG_871X_SEL_NL(sel, "byte2:%s%s%s%s%s%s%s%s\n" , info->bConnection?"bConnection ":"" , info->bSCOeSCO?"bSCOeSCO ":"" , info->bInQPage?"bInQPage ":"" , info->bACLBusy?"bACLBusy ":"" , info->bSCOBusy?"bSCOBusy ":"" , info->bHID?"bHID ":"" , info->bA2DP?"bA2DP ":"" , info->bFTP?"bFTP":"" ); if (info->len > 3) DBG_871X_SEL_NL(sel, "retry_cnt:%u\n", info->retry_cnt); if (info->len > 4) DBG_871X_SEL_NL(sel, "rssi:%u\n", info->rssi); if (info->len > 5) DBG_871X_SEL_NL(sel, "byte5:%s%s\n" , info->eSCO_SCO?"eSCO_SCO ":"" , info->Master_Slave?"Master_Slave ":"" ); } static void rtw_btinfo_hdl(_adapter *adapter, u8 *buf, u16 buf_len) { #define BTINFO_WIFI_FETCH 0x23 #define BTINFO_BT_AUTO_RPT 0x27 struct btinfo *info = (struct btinfo *)buf; u8 cmd_idx; u8 len; cmd_idx = info->cid; if (info->len > buf_len-2) { rtw_warn_on(1); len = buf_len-2; } else { len = info->len; } //#define DBG_PROC_SET_BTINFO_EVT #ifdef DBG_PROC_SET_BTINFO_EVT btinfo_evt_dump(RTW_DBGDUMP, info); #endif /* transform BT-FW btinfo to WiFI-FW C2H format and notify */ if (cmd_idx == BTINFO_WIFI_FETCH) buf[1] = 0; else if (cmd_idx == BTINFO_BT_AUTO_RPT) buf[1] = 2; rtw_btcoex_BtInfoNotify(adapter ,len+1, &buf[1]); } u8 rtw_btinfo_cmd(_adapter *adapter, u8 *buf, u16 len) { struct cmd_obj *ph2c; struct drvextra_cmd_parm *pdrvextra_cmd_parm; u8 *btinfo; struct cmd_priv *pcmdpriv = &adapter->cmdpriv; u8 res = _SUCCESS; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if (ph2c == NULL) { res = _FAIL; goto exit; } pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); if (pdrvextra_cmd_parm == NULL) { rtw_mfree((u8*)ph2c, sizeof(struct cmd_obj)); res = _FAIL; goto exit; } btinfo = rtw_zmalloc(len); if (btinfo == NULL) { rtw_mfree((u8*)ph2c, sizeof(struct cmd_obj)); rtw_mfree((u8*)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); res = _FAIL; goto exit; } pdrvextra_cmd_parm->ec_id = BTINFO_WK_CID; pdrvextra_cmd_parm->type = 0; pdrvextra_cmd_parm->size = len; pdrvextra_cmd_parm->pbuf = btinfo; _rtw_memcpy(btinfo, buf, len); init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: return res; } #endif //#ifdef CONFIG_C2H_PACKET_EN u8 rtw_c2h_packet_wk_cmd(PADAPTER padapter, u8 *pbuf, u16 length) { struct cmd_obj *ph2c; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if (ph2c == NULL) { res = _FAIL; goto exit; } pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); if (pdrvextra_cmd_parm == NULL) { rtw_mfree((u8*)ph2c, sizeof(struct cmd_obj)); res = _FAIL; goto exit; } pdrvextra_cmd_parm->ec_id = C2H_WK_CID; pdrvextra_cmd_parm->type = 0; pdrvextra_cmd_parm->size = length; pdrvextra_cmd_parm->pbuf = pbuf; init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: return res; } //#else //CONFIG_C2H_PACKET_EN /* dont call R/W in this function, beucase SDIO interrupt have claim host */ /* or deadlock will happen and cause special-systemserver-died in android */ u8 rtw_c2h_wk_cmd(PADAPTER padapter, u8 *c2h_evt) { struct cmd_obj *ph2c; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if (ph2c == NULL) { res = _FAIL; goto exit; } pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); if (pdrvextra_cmd_parm == NULL) { rtw_mfree((u8*)ph2c, sizeof(struct cmd_obj)); res = _FAIL; goto exit; } pdrvextra_cmd_parm->ec_id = C2H_WK_CID; pdrvextra_cmd_parm->type = 0; pdrvextra_cmd_parm->size = c2h_evt?16:0; pdrvextra_cmd_parm->pbuf = c2h_evt; init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: return res; } //#endif //CONFIG_C2H_PACKET_EN u8 rtw_run_in_thread_cmd(PADAPTER padapter, void (*func)(void*), void* context) { struct cmd_priv *pcmdpriv; struct cmd_obj *ph2c; struct RunInThread_param *parm; s32 res = _SUCCESS; _func_enter_; pcmdpriv = &padapter->cmdpriv; ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if (NULL == ph2c) { res = _FAIL; goto exit; } parm = (struct RunInThread_param*)rtw_zmalloc(sizeof(struct RunInThread_param)); if (NULL == parm) { rtw_mfree((u8*)ph2c, sizeof(struct cmd_obj)); res = _FAIL; goto exit; } parm->func = func; parm->context = context; init_h2fwcmd_w_parm_no_rsp(ph2c, parm, GEN_CMD_CODE(_RunInThreadCMD)); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } s32 c2h_evt_hdl(_adapter *adapter, u8 *c2h_evt, c2h_id_filter filter) { s32 ret = _FAIL; u8 buf[16]; if (!c2h_evt) { /* No c2h event in cmd_obj, read c2h event before handling*/ if (rtw_hal_c2h_evt_read(adapter, buf) == _SUCCESS) { c2h_evt = buf; if (filter && filter(c2h_evt) == _FALSE) goto exit; ret = rtw_hal_c2h_handler(adapter, c2h_evt); } } else { if (filter && filter(c2h_evt) == _FALSE) goto exit; ret = rtw_hal_c2h_handler(adapter, c2h_evt); } exit: return ret; } #ifdef CONFIG_C2H_WK static void c2h_wk_callback(_workitem *work) { struct evt_priv *evtpriv = container_of(work, struct evt_priv, c2h_wk); _adapter *adapter = container_of(evtpriv, _adapter, evtpriv); u8 *c2h_evt; c2h_id_filter ccx_id_filter = rtw_hal_c2h_id_filter_ccx(adapter); evtpriv->c2h_wk_alive = _TRUE; while (!rtw_cbuf_empty(evtpriv->c2h_queue)) { if ((c2h_evt = (u8 *)rtw_cbuf_pop(evtpriv->c2h_queue)) != NULL) { /* This C2H event is read, clear it */ c2h_evt_clear(adapter); } else if ((c2h_evt = (u8 *)rtw_malloc(16)) != NULL) { /* This C2H event is not read, read & clear now */ if (rtw_hal_c2h_evt_read(adapter, c2h_evt) != _SUCCESS) { rtw_mfree(c2h_evt, 16); continue; } } /* Special pointer to trigger c2h_evt_clear only */ if ((void *)c2h_evt == (void *)evtpriv) continue; if (!rtw_hal_c2h_valid(adapter, c2h_evt)) { rtw_mfree(c2h_evt, 16); continue; } if (ccx_id_filter(c2h_evt) == _TRUE) { /* Handle CCX report here */ rtw_hal_c2h_handler(adapter, c2h_evt); rtw_mfree(c2h_evt, 16); } else { /* Enqueue into cmd_thread for others */ rtw_c2h_wk_cmd(adapter, c2h_evt); } } evtpriv->c2h_wk_alive = _FALSE; } #endif u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf) { struct drvextra_cmd_parm *pdrvextra_cmd; if(!pbuf) return H2C_PARAMETERS_ERROR; pdrvextra_cmd = (struct drvextra_cmd_parm*)pbuf; switch(pdrvextra_cmd->ec_id) { case DYNAMIC_CHK_WK_CID://only primary padapter go to this cmd, but execute dynamic_chk_wk_hdl() for two interfaces #ifdef CONFIG_CONCURRENT_MODE if(padapter->pbuddy_adapter) { dynamic_chk_wk_hdl(padapter->pbuddy_adapter); } #endif //CONFIG_CONCURRENT_MODE dynamic_chk_wk_hdl(padapter); break; case POWER_SAVING_CTRL_WK_CID: power_saving_wk_hdl(padapter); break; #ifdef CONFIG_LPS case LPS_CTRL_WK_CID: lps_ctrl_wk_hdl(padapter, (u8)pdrvextra_cmd->type); break; case DM_IN_LPS_WK_CID: rtw_dm_in_lps_hdl(padapter); break; case LPS_CHANGE_DTIM_CID: rtw_lps_change_dtim_hdl(padapter, (u8)pdrvextra_cmd->type); break; #endif #if (RATE_ADAPTIVE_SUPPORT==1) case RTP_TIMER_CFG_WK_CID: rpt_timer_setting_wk_hdl(padapter, pdrvextra_cmd->type); break; #endif #ifdef CONFIG_ANTENNA_DIVERSITY case ANT_SELECT_WK_CID: antenna_select_wk_hdl(padapter, pdrvextra_cmd->type); break; #endif #ifdef CONFIG_P2P_PS case P2P_PS_WK_CID: p2p_ps_wk_hdl(padapter, pdrvextra_cmd->type); break; #endif //CONFIG_P2P_PS #ifdef CONFIG_P2P case P2P_PROTO_WK_CID: // Commented by Albert 2011/07/01 // I used the type_size as the type command p2p_protocol_wk_hdl( padapter, pdrvextra_cmd->type ); break; #endif //CONFIG_P2P #ifdef CONFIG_AP_MODE case CHECK_HIQ_WK_CID: rtw_chk_hi_queue_hdl(padapter); break; #endif //CONFIG_AP_MODE #ifdef CONFIG_INTEL_WIDI case INTEl_WIDI_WK_CID: intel_widi_wk_hdl(padapter, pdrvextra_cmd->type, pdrvextra_cmd->pbuf); break; #endif //CONFIG_INTEL_WIDI //add for CONFIG_IEEE80211W, none 11w can use it case RESET_SECURITYPRIV: reset_securitypriv_hdl(padapter); break; case FREE_ASSOC_RESOURCES: free_assoc_resources_hdl(padapter); break; case C2H_WK_CID: #ifdef CONFIG_C2H_PACKET_EN rtw_hal_set_hwreg_with_buf(padapter, HW_VAR_C2H_HANDLE, pdrvextra_cmd->pbuf, pdrvextra_cmd->size); #else c2h_evt_hdl(padapter, pdrvextra_cmd->pbuf, NULL); #endif break; #ifdef CONFIG_BEAMFORMING case BEAMFORMING_WK_CID: beamforming_wk_hdl(padapter, pdrvextra_cmd->type, pdrvextra_cmd->pbuf); break; #endif //CONFIG_BEAMFORMING case DM_RA_MSK_WK_CID: rtw_dm_ra_mask_hdl(padapter, (struct sta_info *)pdrvextra_cmd->pbuf); break; #ifdef CONFIG_BT_COEXIST case BTINFO_WK_CID: rtw_btinfo_hdl(padapter ,pdrvextra_cmd->pbuf, pdrvextra_cmd->size); break; #endif default: break; } if (pdrvextra_cmd->pbuf && pdrvextra_cmd->size>0) { rtw_mfree(pdrvextra_cmd->pbuf, pdrvextra_cmd->size); } return H2C_SUCCESS; } void rtw_survey_cmd_callback(_adapter* padapter , struct cmd_obj *pcmd) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _func_enter_; if(pcmd->res == H2C_DROPPED) { //TODO: cancel timer and do timeout handler directly... //need to make timeout handlerOS independent _set_timer(&pmlmepriv->scan_to_timer, 1); } else if (pcmd->res != H2C_SUCCESS) { _set_timer(&pmlmepriv->scan_to_timer, 1); RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n ********Error: MgntActrtw_set_802_11_bssid_LIST_SCAN Fail ************\n\n.")); } // free cmd rtw_free_cmd_obj(pcmd); _func_exit_; } void rtw_disassoc_cmd_callback(_adapter* padapter, struct cmd_obj *pcmd) { _irqL irqL; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _func_enter_; if (pcmd->res != H2C_SUCCESS) { _enter_critical_bh(&pmlmepriv->lock, &irqL); set_fwstate(pmlmepriv, _FW_LINKED); _exit_critical_bh(&pmlmepriv->lock, &irqL); RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n ***Error: disconnect_cmd_callback Fail ***\n.")); goto exit; } #ifdef CONFIG_BR_EXT else //clear bridge database nat25_db_cleanup(padapter); #endif //CONFIG_BR_EXT // free cmd rtw_free_cmd_obj(pcmd); exit: _func_exit_; } void rtw_joinbss_cmd_callback(_adapter* padapter, struct cmd_obj *pcmd) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _func_enter_; if(pcmd->res == H2C_DROPPED) { //TODO: cancel timer and do timeout handler directly... //need to make timeout handlerOS independent _set_timer(&pmlmepriv->assoc_timer, 1); } else if(pcmd->res != H2C_SUCCESS) { _set_timer(&pmlmepriv->assoc_timer, 1); } rtw_free_cmd_obj(pcmd); _func_exit_; } void rtw_createbss_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd) { _irqL irqL; u8 timer_cancelled; struct sta_info *psta = NULL; struct wlan_network *pwlan = NULL; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)pcmd->parmbuf; struct wlan_network *tgt_network = &(pmlmepriv->cur_network); _func_enter_; if (pcmd->parmbuf == NULL) goto exit; if((pcmd->res != H2C_SUCCESS)) { RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n ********Error: rtw_createbss_cmd_callback Fail ************\n\n.")); _set_timer(&pmlmepriv->assoc_timer, 1 ); } _cancel_timer(&pmlmepriv->assoc_timer, &timer_cancelled); #ifdef CONFIG_FW_MLMLE //endian_convert pnetwork->Length = le32_to_cpu(pnetwork->Length); pnetwork->Ssid.SsidLength = le32_to_cpu(pnetwork->Ssid.SsidLength); pnetwork->Privacy =le32_to_cpu(pnetwork->Privacy); pnetwork->Rssi = le32_to_cpu(pnetwork->Rssi); pnetwork->NetworkTypeInUse =le32_to_cpu(pnetwork->NetworkTypeInUse); pnetwork->Configuration.ATIMWindow = le32_to_cpu(pnetwork->Configuration.ATIMWindow); //pnetwork->Configuration.BeaconPeriod = le32_to_cpu(pnetwork->Configuration.BeaconPeriod); pnetwork->Configuration.DSConfig =le32_to_cpu(pnetwork->Configuration.DSConfig); pnetwork->Configuration.FHConfig.DwellTime=le32_to_cpu(pnetwork->Configuration.FHConfig.DwellTime); pnetwork->Configuration.FHConfig.HopPattern=le32_to_cpu(pnetwork->Configuration.FHConfig.HopPattern); pnetwork->Configuration.FHConfig.HopSet=le32_to_cpu(pnetwork->Configuration.FHConfig.HopSet); pnetwork->Configuration.FHConfig.Length=le32_to_cpu(pnetwork->Configuration.FHConfig.Length); pnetwork->Configuration.Length = le32_to_cpu(pnetwork->Configuration.Length); pnetwork->InfrastructureMode = le32_to_cpu(pnetwork->InfrastructureMode); pnetwork->IELength = le32_to_cpu(pnetwork->IELength); #endif _enter_critical_bh(&pmlmepriv->lock, &irqL); if(check_fwstate(pmlmepriv, WIFI_AP_STATE) ) { psta = rtw_get_stainfo(&padapter->stapriv, pnetwork->MacAddress); if(!psta) { psta = rtw_alloc_stainfo(&padapter->stapriv, pnetwork->MacAddress); if (psta == NULL) { RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nCan't alloc sta_info when createbss_cmd_callback\n")); goto createbss_cmd_fail ; } } rtw_indicate_connect( padapter); } else { _irqL irqL; pwlan = _rtw_alloc_network(pmlmepriv); _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); if ( pwlan == NULL) { pwlan = rtw_get_oldest_wlan_network(&pmlmepriv->scanned_queue); if( pwlan == NULL) { RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n Error: can't get pwlan in rtw_joinbss_event_callback \n")); _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); goto createbss_cmd_fail; } pwlan->last_scanned = rtw_get_current_time(); } else { rtw_list_insert_tail(&(pwlan->list), &pmlmepriv->scanned_queue.queue); } pnetwork->Length = get_WLAN_BSSID_EX_sz(pnetwork); _rtw_memcpy(&(pwlan->network), pnetwork, pnetwork->Length); //pwlan->fixed = _TRUE; //rtw_list_insert_tail(&(pwlan->list), &pmlmepriv->scanned_queue.queue); // copy pdev_network information to pmlmepriv->cur_network _rtw_memcpy(&tgt_network->network, pnetwork, (get_WLAN_BSSID_EX_sz(pnetwork))); // reset DSConfig //tgt_network->network.Configuration.DSConfig = (u32)rtw_ch2freq(pnetwork->Configuration.DSConfig); _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); #if 0 if((pmlmepriv->fw_state) & WIFI_AP_STATE) { psta = rtw_alloc_stainfo(&padapter->stapriv, pnetwork->MacAddress); if (psta == NULL) { // for AP Mode & Adhoc Master Mode RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nCan't alloc sta_info when createbss_cmd_callback\n")); goto createbss_cmd_fail ; } rtw_indicate_connect( padapter); } else { //rtw_indicate_disconnect(dev); } #endif _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); // we will set _FW_LINKED when there is one more sat to join us (rtw_stassoc_event_callback) } createbss_cmd_fail: _exit_critical_bh(&pmlmepriv->lock, &irqL); exit: rtw_free_cmd_obj(pcmd); _func_exit_; } void rtw_setstaKey_cmdrsp_callback(_adapter* padapter , struct cmd_obj *pcmd) { struct sta_priv * pstapriv = &padapter->stapriv; struct set_stakey_rsp* psetstakey_rsp = (struct set_stakey_rsp*) (pcmd->rsp); struct sta_info* psta = rtw_get_stainfo(pstapriv, psetstakey_rsp->addr); _func_enter_; if(psta==NULL) { RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nERROR: rtw_setstaKey_cmdrsp_callback => can't get sta_info \n\n")); goto exit; } //psta->aid = psta->mac_id = psetstakey_rsp->keyid; //CAM_ID(CAM_ENTRY) exit: rtw_free_cmd_obj(pcmd); _func_exit_; } void rtw_setassocsta_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd) { _irqL irqL; struct sta_priv * pstapriv = &padapter->stapriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct set_assocsta_parm* passocsta_parm = (struct set_assocsta_parm*)(pcmd->parmbuf); struct set_assocsta_rsp* passocsta_rsp = (struct set_assocsta_rsp*) (pcmd->rsp); struct sta_info* psta = rtw_get_stainfo(pstapriv, passocsta_parm->addr); _func_enter_; if(psta==NULL) { RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nERROR: setassocsta_cmdrsp_callbac => can't get sta_info \n\n")); goto exit; } psta->aid = psta->mac_id = passocsta_rsp->cam_id; _enter_critical_bh(&pmlmepriv->lock, &irqL); if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) && (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE)) _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); set_fwstate(pmlmepriv, _FW_LINKED); _exit_critical_bh(&pmlmepriv->lock, &irqL); exit: rtw_free_cmd_obj(pcmd); _func_exit_; } void rtw_getrttbl_cmd_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd); void rtw_getrttbl_cmd_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd) { _func_enter_; rtw_free_cmd_obj(pcmd); #ifdef CONFIG_MP_INCLUDED if (padapter->registrypriv.mp_mode == 1) padapter->mppriv.workparam.bcompleted=_TRUE; #endif _func_exit_; } rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_debug.c000066400000000000000000001551041261122257400205630ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_DEBUG_C_ #include u32 GlobalDebugLevel = _drv_err_; #ifdef CONFIG_DEBUG_RTL871X u64 GlobalDebugComponents = \ _module_rtl871x_xmit_c_ | _module_xmit_osdep_c_ | _module_rtl871x_recv_c_ | _module_recv_osdep_c_ | _module_rtl871x_mlme_c_ | _module_mlme_osdep_c_ | _module_rtl871x_sta_mgt_c_ | _module_rtl871x_cmd_c_ | _module_cmd_osdep_c_ | _module_rtl871x_io_c_ | _module_io_osdep_c_ | _module_os_intfs_c_| _module_rtl871x_security_c_| _module_rtl871x_eeprom_c_| _module_hal_init_c_| _module_hci_hal_init_c_| _module_rtl871x_ioctl_c_| _module_rtl871x_ioctl_set_c_| _module_rtl871x_ioctl_query_c_| _module_rtl871x_pwrctrl_c_| _module_hci_intfs_c_| _module_hci_ops_c_| _module_hci_ops_os_c_| _module_rtl871x_ioctl_os_c| _module_rtl8712_cmd_c_| _module_hal_xmit_c_| _module_rtl8712_recv_c_ | _module_mp_ | _module_efuse_; #endif /* CONFIG_DEBUG_RTL871X */ #include void dump_drv_version(void *sel) { DBG_871X_SEL_NL(sel, "%s %s\n", DRV_NAME, DRIVERVERSION); DBG_871X_SEL_NL(sel, "build time: %s %s\n", __DATE__, __TIME__); } void dump_log_level(void *sel) { DBG_871X_SEL_NL(sel, "log_level:%d\n", GlobalDebugLevel); } #ifdef CONFIG_SDIO_HCI void sd_f0_reg_dump(void *sel, _adapter *adapter) { int i; for(i=0x0;i<=0xff;i++) { if(i%16==0) DBG_871X_SEL_NL(sel, "0x%02x ",i); DBG_871X_SEL(sel, "%02x ", rtw_sd_f0_read8(adapter, i)); if(i%16==15) DBG_871X_SEL(sel, "\n"); else if(i%8==7) DBG_871X_SEL(sel, "\t"); } } #endif /* CONFIG_SDIO_HCI */ void mac_reg_dump(void *sel, _adapter *adapter) { int i, j = 1; DBG_871X_SEL_NL(sel, "======= MAC REG =======\n"); for(i=0x0;i<0x800;i+=4) { if(j%4==1) DBG_871X_SEL_NL(sel, "0x%03x",i); DBG_871X_SEL(sel, " 0x%08x ", rtw_read32(adapter,i)); if((j++)%4 == 0) DBG_871X_SEL(sel, "\n"); } } void bb_reg_dump(void *sel, _adapter *adapter) { int i, j = 1; DBG_871X_SEL_NL(sel, "======= BB REG =======\n"); for(i=0x800;i<0x1000;i+=4) { if(j%4==1) DBG_871X_SEL_NL(sel, "0x%03x",i); DBG_871X_SEL(sel, " 0x%08x ", rtw_read32(adapter,i)); if((j++)%4 == 0) DBG_871X_SEL(sel, "\n"); } } void rf_reg_dump(void *sel, _adapter *adapter) { int i, j = 1, path; u32 value; u8 rf_type = 0; u8 path_nums = 0; rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); if((RF_1T2R == rf_type) ||(RF_1T1R ==rf_type )) path_nums = 1; else path_nums = 2; DBG_871X_SEL_NL(sel, "======= RF REG =======\n"); for (path=0;pathrecvpriv); if( precvpriv->sink_udpport > 0) { if(*((u16*)((pkt->data)+0x24)) == cpu_to_be16(precvpriv->sink_udpport)) { precvpriv->pre_rtp_rxseq= precvpriv->cur_rtp_rxseq; precvpriv->cur_rtp_rxseq = be16_to_cpu(*((u16*)((pkt->data)+0x2C))); if( precvpriv->pre_rtp_rxseq+1 != precvpriv->cur_rtp_rxseq) DBG_871X("%s : RTP Seq num from %d to %d\n",__FUNCTION__,precvpriv->pre_rtp_rxseq,precvpriv->cur_rtp_rxseq); } } } #ifdef CONFIG_PROC_DEBUG ssize_t proc_set_write_reg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; u32 addr, val, len; if (count < 3) { DBG_871X("argument size is less than 3\n"); return -EFAULT; } if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%x %x %x", &addr, &val, &len); if (num != 3) { DBG_871X("invalid write_reg parameter!\n"); return count; } switch(len) { case 1: rtw_write8(padapter, addr, (u8)val); break; case 2: rtw_write16(padapter, addr, (u16)val); break; case 4: rtw_write32(padapter, addr, val); break; default: DBG_871X("error write length=%d", len); break; } } return count; } static u32 proc_get_read_addr=0xeeeeeeee; static u32 proc_get_read_len=0x4; int proc_get_read_reg(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); if (proc_get_read_addr==0xeeeeeeee) { DBG_871X_SEL_NL(m, "address not initialized\n"); return 0; } switch(proc_get_read_len) { case 1: DBG_871X_SEL_NL(m, "rtw_read8(0x%x)=0x%x\n", proc_get_read_addr, rtw_read8(padapter, proc_get_read_addr)); break; case 2: DBG_871X_SEL_NL(m, "rtw_read16(0x%x)=0x%x\n", proc_get_read_addr, rtw_read16(padapter, proc_get_read_addr)); break; case 4: DBG_871X_SEL_NL(m, "rtw_read32(0x%x)=0x%x\n", proc_get_read_addr, rtw_read32(padapter, proc_get_read_addr)); break; default: DBG_871X_SEL_NL(m, "error read length=%d\n", proc_get_read_len); break; } return 0; } ssize_t proc_set_read_reg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; char tmp[16]; u32 addr, len; if (count < 2) { DBG_871X("argument size is less than 2\n"); return -EFAULT; } if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%x %x", &addr, &len); if (num != 2) { DBG_871X("invalid read_reg parameter!\n"); return count; } proc_get_read_addr = addr; proc_get_read_len = len; } return count; } int proc_get_fwstate(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); DBG_871X_SEL_NL(m, "fwstate=0x%x\n", get_fwstate(pmlmepriv)); return 0; } int proc_get_sec_info(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct security_priv *sec = &padapter->securitypriv; DBG_871X_SEL_NL(m, "auth_alg=0x%x, enc_alg=0x%x, auth_type=0x%x, enc_type=0x%x\n", sec->dot11AuthAlgrthm, sec->dot11PrivacyAlgrthm, sec->ndisauthtype, sec->ndisencryptstatus); DBG_871X_SEL_NL(m, "hw_decrypted=%d\n", sec->hw_decrypted); #ifdef DBG_SW_SEC_CNT DBG_871X_SEL_NL(m, "wep_sw_enc_cnt=%llu, %llu, %llu\n" , sec->wep_sw_enc_cnt_bc , sec->wep_sw_enc_cnt_mc, sec->wep_sw_enc_cnt_uc); DBG_871X_SEL_NL(m, "wep_sw_dec_cnt=%llu, %llu, %llu\n" , sec->wep_sw_dec_cnt_bc , sec->wep_sw_dec_cnt_mc, sec->wep_sw_dec_cnt_uc); DBG_871X_SEL_NL(m, "tkip_sw_enc_cnt=%llu, %llu, %llu\n" , sec->tkip_sw_enc_cnt_bc , sec->tkip_sw_enc_cnt_mc, sec->tkip_sw_enc_cnt_uc); DBG_871X_SEL_NL(m, "tkip_sw_dec_cnt=%llu, %llu, %llu\n" , sec->tkip_sw_dec_cnt_bc , sec->tkip_sw_dec_cnt_mc, sec->tkip_sw_dec_cnt_uc); DBG_871X_SEL_NL(m, "aes_sw_enc_cnt=%llu, %llu, %llu\n" , sec->aes_sw_enc_cnt_bc , sec->aes_sw_enc_cnt_mc, sec->aes_sw_enc_cnt_uc); DBG_871X_SEL_NL(m, "aes_sw_dec_cnt=%llu, %llu, %llu\n" , sec->aes_sw_dec_cnt_bc , sec->aes_sw_dec_cnt_mc, sec->aes_sw_dec_cnt_uc); #endif /* DBG_SW_SEC_CNT */ return 0; } int proc_get_mlmext_state(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); DBG_871X_SEL_NL(m, "pmlmeinfo->state=0x%x\n", pmlmeinfo->state); return 0; } #ifdef CONFIG_LAYER2_ROAMING int proc_get_roam_flags(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); DBG_871X_SEL_NL(m, "0x%02x\n", rtw_roam_flags(adapter)); return 0; } ssize_t proc_set_roam_flags(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; u8 flags; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%hhx", &flags); if (num == 1) rtw_assign_roam_flags(adapter, flags); } return count; } int proc_get_roam_param(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *mlme = &adapter->mlmepriv; DBG_871X_SEL_NL(m, "%12s %12s %11s\n", "rssi_diff_th", "scanr_exp_ms", "scan_int_ms"); DBG_871X_SEL_NL(m, "%-12u %-12u %-11u\n" , mlme->roam_rssi_diff_th , mlme->roam_scanr_exp_ms , mlme->roam_scan_int_ms ); return 0; } ssize_t proc_set_roam_param(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *mlme = &adapter->mlmepriv; char tmp[32]; u8 rssi_diff_th; u32 scanr_exp_ms; u32 scan_int_ms; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%hhu %u %u", &rssi_diff_th, &scanr_exp_ms, &scan_int_ms); if (num >= 1) mlme->roam_rssi_diff_th = rssi_diff_th; if (num >= 2) mlme->roam_scanr_exp_ms = scanr_exp_ms; if (num >= 3) mlme->roam_scan_int_ms = scan_int_ms; } return count; } ssize_t proc_set_roam_tgt_addr(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; u8 addr[ETH_ALEN]; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", addr, addr+1, addr+2, addr+3, addr+4, addr+5); if (num == 6) _rtw_memcpy(adapter->mlmepriv.roam_tgt_addr, addr, ETH_ALEN); DBG_871X("set roam_tgt_addr to "MAC_FMT"\n", MAC_ARG(adapter->mlmepriv.roam_tgt_addr)); } return count; } #endif /* CONFIG_LAYER2_ROAMING */ int proc_get_qos_option(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); DBG_871X_SEL_NL(m, "qos_option=%d\n", pmlmepriv->qospriv.qos_option); return 0; } int proc_get_ht_option(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); #ifdef CONFIG_80211N_HT DBG_871X_SEL_NL(m, "ht_option=%d\n", pmlmepriv->htpriv.ht_option); #endif //CONFIG_80211N_HT return 0; } int proc_get_rf_info(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; DBG_871X_SEL_NL(m, "cur_ch=%d, cur_bw=%d, cur_ch_offet=%d\n", pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); DBG_871X_SEL_NL(m, "oper_ch=%d, oper_bw=%d, oper_ch_offet=%d\n", rtw_get_oper_ch(padapter), rtw_get_oper_bw(padapter), rtw_get_oper_choffset(padapter)); return 0; } int proc_get_survey_info(struct seq_file *m, void *v) { _irqL irqL; struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; _list *plist, *phead; s32 notify_signal; s16 notify_noise = 0; u16 index = 0; _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); phead = get_list_head(queue); if(!phead) return 0; plist = get_next(phead); if (!plist) return 0; DBG_871X_SEL_NL(m, "%5s %-17s %3s %-3s %-4s %-4s %5s %s\n","index", "bssid", "ch", "RSSI", "SdBm", "Noise", "age", "ssid"); while(1) { if (rtw_end_of_queue_search(phead,plist)== _TRUE) break; pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); if (!pnetwork) break; if ( check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE && is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network, 0)) { notify_signal = translate_percentage_to_dbm(padapter->recvpriv.signal_strength);//dbm } else { notify_signal = translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength);//dbm } #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) rtw_hal_get_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&(pnetwork->network.Configuration.DSConfig), &(notify_noise)); #endif DBG_871X_SEL_NL(m, "%5d "MAC_FMT" %3d %3d %4d %4d %5d %s\n", ++index, MAC_ARG(pnetwork->network.MacAddress), pnetwork->network.Configuration.DSConfig, (int)pnetwork->network.Rssi, notify_signal, notify_noise, rtw_get_passing_time_ms((u32)pnetwork->last_scanned), //translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength), pnetwork->network.Ssid.Ssid); plist = get_next(plist); } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); return 0; } int proc_get_ap_info(struct seq_file *m, void *v) { struct net_device *dev = m->private; struct sta_info *psta; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct wlan_network *cur_network = &(pmlmepriv->cur_network); struct sta_priv *pstapriv = &padapter->stapriv; psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); if(psta) { int i; struct recv_reorder_ctrl *preorder_ctrl; DBG_871X_SEL_NL(m, "SSID=%s\n", cur_network->network.Ssid.Ssid); DBG_871X_SEL_NL(m, "sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr)); DBG_871X_SEL_NL(m, "cur_channel=%d, cur_bwmode=%d, cur_ch_offset=%d\n", pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); DBG_871X_SEL_NL(m, "wireless_mode=0x%x, rtsen=%d, cts2slef=%d\n", psta->wireless_mode, psta->rtsen, psta->cts2self); DBG_871X_SEL_NL(m, "state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid); #ifdef CONFIG_80211N_HT DBG_871X_SEL_NL(m, "qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate); DBG_871X_SEL_NL(m, "bwmode=%d, ch_offset=%d, sgi_20m=%d,sgi_40m=%d\n", psta->bw_mode, psta->htpriv.ch_offset, psta->htpriv.sgi_20m, psta->htpriv.sgi_40m); DBG_871X_SEL_NL(m, "ampdu_enable = %d\n", psta->htpriv.ampdu_enable); DBG_871X_SEL_NL(m, "agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap); DBG_871X_SEL_NL(m, "ldpc_cap=0x%x, stbc_cap=0x%x, beamform_cap=0x%x\n", psta->htpriv.ldpc_cap, psta->htpriv.stbc_cap, psta->htpriv.beamform_cap); #endif //CONFIG_80211N_HT #ifdef CONFIG_80211AC_VHT DBG_871X_SEL_NL(m, "vht_en=%d, vht_sgi_80m=%d\n", psta->vhtpriv.vht_option, psta->vhtpriv.sgi_80m); DBG_871X_SEL_NL(m, "vht_ldpc_cap=0x%x, vht_stbc_cap=0x%x, vht_beamform_cap=0x%x\n", psta->vhtpriv.ldpc_cap, psta->vhtpriv.stbc_cap, psta->vhtpriv.beamform_cap); DBG_871X_SEL_NL(m, "vht_mcs_map=0x%x, vht_highest_rate=0x%x, vht_ampdu_len=%d\n", *(u16*)psta->vhtpriv.vht_mcs_map, psta->vhtpriv.vht_highest_rate, psta->vhtpriv.ampdu_len); #endif for(i=0;i<16;i++) { preorder_ctrl = &psta->recvreorder_ctrl[i]; if(preorder_ctrl->enable) { DBG_871X_SEL_NL(m, "tid=%d, indicate_seq=%d\n", i, preorder_ctrl->indicate_seq); } } } else { DBG_871X_SEL_NL(m, "can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress)); } return 0; } int proc_get_adapter_state(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); #ifdef CONFIG_CONCURRENT_MODE DBG_871X_SEL_NL(m, "name=%s, iface_type=%d, bSurpriseRemoved=%d, bDriverStopped=%d\n", dev->name, padapter->iface_type, padapter->bSurpriseRemoved, padapter->bDriverStopped); #else DBG_871X_SEL_NL(m, "name=%s, bSurpriseRemoved=%d, bDriverStopped=%d\n", dev->name, padapter->bSurpriseRemoved, padapter->bDriverStopped); #endif return 0; } int proc_get_trx_info(struct seq_file *m, void *v) { struct net_device *dev = m->private; int i; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct recv_priv *precvpriv = &padapter->recvpriv; struct hw_xmit *phwxmit; dump_os_queue(m, padapter); DBG_871X_SEL_NL(m, "free_xmitbuf_cnt=%d, free_xmitframe_cnt=%d\n" , pxmitpriv->free_xmitbuf_cnt, pxmitpriv->free_xmitframe_cnt); DBG_871X_SEL_NL(m, "free_ext_xmitbuf_cnt=%d, free_xframe_ext_cnt=%d\n" , pxmitpriv->free_xmit_extbuf_cnt, pxmitpriv->free_xframe_ext_cnt); DBG_871X_SEL_NL(m, "free_recvframe_cnt=%d\n" , precvpriv->free_recvframe_cnt); for(i = 0; i < 4; i++) { phwxmit = pxmitpriv->hwxmits + i; DBG_871X_SEL_NL(m, "%d, hwq.accnt=%d\n", i, phwxmit->accnt); } #ifdef CONFIG_USB_HCI DBG_871X_SEL_NL(m, "rx_urb_pending_cn=%d\n", ATOMIC_READ(&(precvpriv->rx_pending_cnt))); #endif return 0; } int proc_get_dis_pwt(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); u8 dis_pwt = 0; rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DIS_PWT, &(dis_pwt)); DBG_871X_SEL_NL(m, " Tx Power training mode:%s \n",(dis_pwt==_TRUE)?"Disable":"Enable"); return 0; } ssize_t proc_set_dis_pwt(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[4]={0}; u8 dis_pwt = 0; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%hhx", &dis_pwt); DBG_871X("Set Tx Power training mode:%s \n",(dis_pwt==_TRUE)?"Disable":"Enable"); if (num >= 1) rtw_hal_set_def_var(padapter, HAL_DEF_DBG_DIS_PWT, &(dis_pwt)); } return count; } int proc_get_rate_ctl(struct seq_file *m, void *v) { struct net_device *dev = m->private; int i; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); u8 data_rate = 0,sgi=0; if (adapter->fix_rate != 0xff) { data_rate = adapter->fix_rate & 0x7F; sgi = adapter->fix_rate >>7; DBG_871X_SEL_NL(m, "FIXED %s%s\n", HDATA_RATE(data_rate),sgi?" SGI":" LGI"); DBG_871X_SEL_NL(m, "0x%02x\n", adapter->fix_rate); } else { DBG_871X_SEL_NL(m, "RA\n"); } return 0; } ssize_t proc_set_rate_ctl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; u8 fix_rate; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%hhx", &fix_rate); if (num >= 1) adapter->fix_rate = fix_rate; } return count; } ssize_t proc_set_fwdl_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%hhu %hhu", &fwdl_test_chksum_fail, &fwdl_test_wintint_rdy_fail); } return count; } ssize_t proc_set_wait_hiq_empty(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%u", &g_wait_hiq_empty_ms); } return count; } int proc_get_suspend_resume_info(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct dvobj_priv *dvobj = padapter->dvobj; struct debug_priv *pdbgpriv = &dvobj->drv_dbg; DBG_871X_SEL_NL(m, "dbg_sdio_alloc_irq_cnt=%d\n", pdbgpriv->dbg_sdio_alloc_irq_cnt); DBG_871X_SEL_NL(m, "dbg_sdio_free_irq_cnt=%d\n", pdbgpriv->dbg_sdio_free_irq_cnt); DBG_871X_SEL_NL(m, "dbg_sdio_alloc_irq_error_cnt=%d\n",pdbgpriv->dbg_sdio_alloc_irq_error_cnt); DBG_871X_SEL_NL(m, "dbg_sdio_free_irq_error_cnt=%d\n", pdbgpriv->dbg_sdio_free_irq_error_cnt); DBG_871X_SEL_NL(m, "dbg_sdio_init_error_cnt=%d\n",pdbgpriv->dbg_sdio_init_error_cnt); DBG_871X_SEL_NL(m, "dbg_sdio_deinit_error_cnt=%d\n", pdbgpriv->dbg_sdio_deinit_error_cnt); DBG_871X_SEL_NL(m, "dbg_suspend_error_cnt=%d\n", pdbgpriv->dbg_suspend_error_cnt); DBG_871X_SEL_NL(m, "dbg_suspend_cnt=%d\n",pdbgpriv->dbg_suspend_cnt); DBG_871X_SEL_NL(m, "dbg_resume_cnt=%d\n", pdbgpriv->dbg_resume_cnt); DBG_871X_SEL_NL(m, "dbg_resume_error_cnt=%d\n", pdbgpriv->dbg_resume_error_cnt); DBG_871X_SEL_NL(m, "dbg_deinit_fail_cnt=%d\n",pdbgpriv->dbg_deinit_fail_cnt); DBG_871X_SEL_NL(m, "dbg_carddisable_cnt=%d\n", pdbgpriv->dbg_carddisable_cnt); DBG_871X_SEL_NL(m, "dbg_ps_insuspend_cnt=%d\n",pdbgpriv->dbg_ps_insuspend_cnt); DBG_871X_SEL_NL(m, "dbg_dev_unload_inIPS_cnt=%d\n", pdbgpriv->dbg_dev_unload_inIPS_cnt); DBG_871X_SEL_NL(m, "dbg_scan_pwr_state_cnt=%d\n", pdbgpriv->dbg_scan_pwr_state_cnt); DBG_871X_SEL_NL(m, "dbg_downloadfw_pwr_state_cnt=%d\n", pdbgpriv->dbg_downloadfw_pwr_state_cnt); DBG_871X_SEL_NL(m, "dbg_carddisable_error_cnt=%d\n", pdbgpriv->dbg_carddisable_error_cnt); DBG_871X_SEL_NL(m, "dbg_fw_read_ps_state_fail_cnt=%d\n", pdbgpriv->dbg_fw_read_ps_state_fail_cnt); DBG_871X_SEL_NL(m, "dbg_leave_ips_fail_cnt=%d\n", pdbgpriv->dbg_leave_ips_fail_cnt); DBG_871X_SEL_NL(m, "dbg_leave_lps_fail_cnt=%d\n", pdbgpriv->dbg_leave_lps_fail_cnt); DBG_871X_SEL_NL(m, "dbg_h2c_leave32k_fail_cnt=%d\n", pdbgpriv->dbg_h2c_leave32k_fail_cnt); DBG_871X_SEL_NL(m, "dbg_diswow_dload_fw_fail_cnt=%d\n", pdbgpriv->dbg_diswow_dload_fw_fail_cnt); DBG_871X_SEL_NL(m, "dbg_enwow_dload_fw_fail_cnt=%d\n", pdbgpriv->dbg_enwow_dload_fw_fail_cnt); DBG_871X_SEL_NL(m, "dbg_ips_drvopen_fail_cnt=%d\n", pdbgpriv->dbg_ips_drvopen_fail_cnt); DBG_871X_SEL_NL(m, "dbg_poll_fail_cnt=%d\n", pdbgpriv->dbg_poll_fail_cnt); DBG_871X_SEL_NL(m, "dbg_rpwm_toogle_cnt=%d\n", pdbgpriv->dbg_rpwm_toogle_cnt); DBG_871X_SEL_NL(m, "dbg_rpwm_timeout_fail_cnt=%d\n", pdbgpriv->dbg_rpwm_timeout_fail_cnt); DBG_871X_SEL_NL(m, "dbg_sreset_cnt=%d\n", pdbgpriv->dbg_sreset_cnt); return 0; } #ifdef CONFIG_DBG_COUNTER int proc_get_rx_logs(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct rx_logs *rx_logs = &padapter->rx_logs; DBG_871X_SEL_NL(m, "intf_rx=%d\n" "intf_rx_err_recvframe=%d\n" "intf_rx_err_skb=%d\n" "intf_rx_report=%d\n" "core_rx=%d\n" "core_rx_pre=%d\n" "core_rx_pre_ver_err=%d\n" "core_rx_pre_mgmt=%d\n" "core_rx_pre_mgmt_err_80211w=%d\n" "core_rx_pre_mgmt_err=%d\n" "core_rx_pre_ctrl=%d\n" "core_rx_pre_ctrl_err=%d\n" "core_rx_pre_data=%d\n" "core_rx_pre_data_wapi_seq_err=%d\n" "core_rx_pre_data_wapi_key_err=%d\n" "core_rx_pre_data_handled=%d\n" "core_rx_pre_data_err=%d\n" "core_rx_pre_data_unknown=%d\n" "core_rx_pre_unknown=%d\n" "core_rx_enqueue=%d\n" "core_rx_dequeue=%d\n" "core_rx_post=%d\n" "core_rx_post_decrypt=%d\n" "core_rx_post_decrypt_wep=%d\n" "core_rx_post_decrypt_tkip=%d\n" "core_rx_post_decrypt_aes=%d\n" "core_rx_post_decrypt_wapi=%d\n" "core_rx_post_decrypt_hw=%d\n" "core_rx_post_decrypt_unknown=%d\n" "core_rx_post_decrypt_err=%d\n" "core_rx_post_defrag_err=%d\n" "core_rx_post_portctrl_err=%d\n" "core_rx_post_indicate=%d\n" "core_rx_post_indicate_in_oder=%d\n" "core_rx_post_indicate_reoder=%d\n" "core_rx_post_indicate_err=%d\n" "os_indicate=%d\n" "os_indicate_ap_mcast=%d\n" "os_indicate_ap_forward=%d\n" "os_indicate_ap_self=%d\n" "os_indicate_err=%d\n" "os_netif_ok=%d\n" "os_netif_err=%d\n", rx_logs->intf_rx, rx_logs->intf_rx_err_recvframe, rx_logs->intf_rx_err_skb, rx_logs->intf_rx_report, rx_logs->core_rx, rx_logs->core_rx_pre, rx_logs->core_rx_pre_ver_err, rx_logs->core_rx_pre_mgmt, rx_logs->core_rx_pre_mgmt_err_80211w, rx_logs->core_rx_pre_mgmt_err, rx_logs->core_rx_pre_ctrl, rx_logs->core_rx_pre_ctrl_err, rx_logs->core_rx_pre_data, rx_logs->core_rx_pre_data_wapi_seq_err, rx_logs->core_rx_pre_data_wapi_key_err, rx_logs->core_rx_pre_data_handled, rx_logs->core_rx_pre_data_err, rx_logs->core_rx_pre_data_unknown, rx_logs->core_rx_pre_unknown, rx_logs->core_rx_enqueue, rx_logs->core_rx_dequeue, rx_logs->core_rx_post, rx_logs->core_rx_post_decrypt, rx_logs->core_rx_post_decrypt_wep, rx_logs->core_rx_post_decrypt_tkip, rx_logs->core_rx_post_decrypt_aes, rx_logs->core_rx_post_decrypt_wapi, rx_logs->core_rx_post_decrypt_hw, rx_logs->core_rx_post_decrypt_unknown, rx_logs->core_rx_post_decrypt_err, rx_logs->core_rx_post_defrag_err, rx_logs->core_rx_post_portctrl_err, rx_logs->core_rx_post_indicate, rx_logs->core_rx_post_indicate_in_oder, rx_logs->core_rx_post_indicate_reoder, rx_logs->core_rx_post_indicate_err, rx_logs->os_indicate, rx_logs->os_indicate_ap_mcast, rx_logs->os_indicate_ap_forward, rx_logs->os_indicate_ap_self, rx_logs->os_indicate_err, rx_logs->os_netif_ok, rx_logs->os_netif_err ); return 0; } int proc_get_tx_logs(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct tx_logs *tx_logs = &padapter->tx_logs; DBG_871X_SEL_NL(m, "os_tx=%d\n" "os_tx_err_up=%d\n" "os_tx_err_xmit=%d\n" "os_tx_m2u=%d\n" "os_tx_m2u_ignore_fw_linked=%d\n" "os_tx_m2u_ignore_self=%d\n" "os_tx_m2u_entry=%d\n" "os_tx_m2u_entry_err_xmit=%d\n" "os_tx_m2u_entry_err_skb=%d\n" "os_tx_m2u_stop=%d\n" "core_tx=%d\n" "core_tx_err_pxmitframe=%d\n" "core_tx_err_brtx=%d\n" "core_tx_upd_attrib=%d\n" "core_tx_upd_attrib_adhoc=%d\n" "core_tx_upd_attrib_sta=%d\n" "core_tx_upd_attrib_ap=%d\n" "core_tx_upd_attrib_unknown=%d\n" "core_tx_upd_attrib_dhcp=%d\n" "core_tx_upd_attrib_icmp=%d\n" "core_tx_upd_attrib_active=%d\n" "core_tx_upd_attrib_err_ucast_sta=%d\n" "core_tx_upd_attrib_err_ucast_ap_link=%d\n" "core_tx_upd_attrib_err_sta=%d\n" "core_tx_upd_attrib_err_link=%d\n" "core_tx_upd_attrib_err_sec=%d\n" "core_tx_ap_enqueue_warn_fwstate=%d\n" "core_tx_ap_enqueue_warn_sta=%d\n" "core_tx_ap_enqueue_warn_nosta=%d\n" "core_tx_ap_enqueue_warn_link=%d\n" "core_tx_ap_enqueue_warn_trigger=%d\n" "core_tx_ap_enqueue_mcast=%d\n" "core_tx_ap_enqueue_ucast=%d\n" "core_tx_ap_enqueue=%d\n" "intf_tx=%d\n" "intf_tx_pending_ac=%d\n" "intf_tx_pending_fw_under_survey=%d\n" "intf_tx_pending_fw_under_linking=%d\n" "intf_tx_pending_xmitbuf=%d\n" "intf_tx_enqueue=%d\n" "core_tx_enqueue=%d\n" "core_tx_enqueue_class=%d\n" "core_tx_enqueue_class_err_sta=%d\n" "core_tx_enqueue_class_err_nosta=%d\n" "core_tx_enqueue_class_err_fwlink=%d\n" "intf_tx_direct=%d\n" "intf_tx_direct_err_coalesce=%d\n" "intf_tx_dequeue=%d\n" "intf_tx_dequeue_err_coalesce=%d\n" "intf_tx_dump_xframe=%d\n" "intf_tx_dump_xframe_err_txdesc=%d\n" "intf_tx_dump_xframe_err_port=%d\n", tx_logs->os_tx, tx_logs->os_tx_err_up, tx_logs->os_tx_err_xmit, tx_logs->os_tx_m2u, tx_logs->os_tx_m2u_ignore_fw_linked, tx_logs->os_tx_m2u_ignore_self, tx_logs->os_tx_m2u_entry, tx_logs->os_tx_m2u_entry_err_xmit, tx_logs->os_tx_m2u_entry_err_skb, tx_logs->os_tx_m2u_stop, tx_logs->core_tx, tx_logs->core_tx_err_pxmitframe, tx_logs->core_tx_err_brtx, tx_logs->core_tx_upd_attrib, tx_logs->core_tx_upd_attrib_adhoc, tx_logs->core_tx_upd_attrib_sta, tx_logs->core_tx_upd_attrib_ap, tx_logs->core_tx_upd_attrib_unknown, tx_logs->core_tx_upd_attrib_dhcp, tx_logs->core_tx_upd_attrib_icmp, tx_logs->core_tx_upd_attrib_active, tx_logs->core_tx_upd_attrib_err_ucast_sta, tx_logs->core_tx_upd_attrib_err_ucast_ap_link, tx_logs->core_tx_upd_attrib_err_sta, tx_logs->core_tx_upd_attrib_err_link, tx_logs->core_tx_upd_attrib_err_sec, tx_logs->core_tx_ap_enqueue_warn_fwstate, tx_logs->core_tx_ap_enqueue_warn_sta, tx_logs->core_tx_ap_enqueue_warn_nosta, tx_logs->core_tx_ap_enqueue_warn_link, tx_logs->core_tx_ap_enqueue_warn_trigger, tx_logs->core_tx_ap_enqueue_mcast, tx_logs->core_tx_ap_enqueue_ucast, tx_logs->core_tx_ap_enqueue, tx_logs->intf_tx, tx_logs->intf_tx_pending_ac, tx_logs->intf_tx_pending_fw_under_survey, tx_logs->intf_tx_pending_fw_under_linking, tx_logs->intf_tx_pending_xmitbuf, tx_logs->intf_tx_enqueue, tx_logs->core_tx_enqueue, tx_logs->core_tx_enqueue_class, tx_logs->core_tx_enqueue_class_err_sta, tx_logs->core_tx_enqueue_class_err_nosta, tx_logs->core_tx_enqueue_class_err_fwlink, tx_logs->intf_tx_direct, tx_logs->intf_tx_direct_err_coalesce, tx_logs->intf_tx_dequeue, tx_logs->intf_tx_dequeue_err_coalesce, tx_logs->intf_tx_dump_xframe, tx_logs->intf_tx_dump_xframe_err_txdesc, tx_logs->intf_tx_dump_xframe_err_port ); return 0; } int proc_get_int_logs(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); DBG_871X_SEL_NL(m, "all=%d\n" "err=%d\n" "tbdok=%d\n" "tbder=%d\n" "bcnderr=%d\n" "bcndma=%d\n" "bcndma_e=%d\n" "rx=%d\n" "rx_rdu=%d\n" "rx_fovw=%d\n" "txfovw=%d\n" "mgntok=%d\n" "highdok=%d\n" "bkdok=%d\n" "bedok=%d\n" "vidok=%d\n" "vodok=%d\n", padapter->int_logs.all, padapter->int_logs.err, padapter->int_logs.tbdok, padapter->int_logs.tbder, padapter->int_logs.bcnderr, padapter->int_logs.bcndma, padapter->int_logs.bcndma_e, padapter->int_logs.rx, padapter->int_logs.rx_rdu, padapter->int_logs.rx_fovw, padapter->int_logs.txfovw, padapter->int_logs.mgntok, padapter->int_logs.highdok, padapter->int_logs.bkdok, padapter->int_logs.bedok, padapter->int_logs.vidok, padapter->int_logs.vodok ); return 0; } #endif // CONFIG_DBG_COUNTER int proc_get_hw_status(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct dvobj_priv *dvobj = padapter->dvobj; struct debug_priv *pdbgpriv = &dvobj->drv_dbg; DBG_871X_SEL_NL(m, "RX FIFO full count: last_time=%lld, current_time=%lld, differential=%lld\n" , pdbgpriv->dbg_rx_fifo_last_overflow, pdbgpriv->dbg_rx_fifo_curr_overflow, pdbgpriv->dbg_rx_fifo_diff_overflow); return 0; } int proc_get_rx_signal(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); DBG_871X_SEL_NL(m, "rssi:%d\n", padapter->recvpriv.rssi); //DBG_871X_SEL_NL(m, "rxpwdb:%d\n", padapter->recvpriv.rxpwdb); DBG_871X_SEL_NL(m, "signal_strength:%u\n", padapter->recvpriv.signal_strength); DBG_871X_SEL_NL(m, "signal_qual:%u\n", padapter->recvpriv.signal_qual); DBG_871X_SEL_NL(m, "noise:%d\n", padapter->recvpriv.noise); rtw_odm_get_perpkt_rssi(m,padapter); #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA rtw_get_raw_rssi_info(m,padapter); #endif return 0; } ssize_t proc_set_rx_signal(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; u32 is_signal_dbg, signal_strength; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%u %u", &is_signal_dbg, &signal_strength); is_signal_dbg = is_signal_dbg==0?0:1; if(is_signal_dbg && num!=2) return count; signal_strength = signal_strength>100?100:signal_strength; padapter->recvpriv.is_signal_dbg = is_signal_dbg; padapter->recvpriv.signal_strength_dbg=signal_strength; if(is_signal_dbg) DBG_871X("set %s %u\n", "DBG_SIGNAL_STRENGTH", signal_strength); else DBG_871X("set %s\n", "HW_SIGNAL_STRENGTH"); } return count; } #ifdef CONFIG_80211N_HT int proc_get_ht_enable(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct registry_priv *pregpriv = &padapter->registrypriv; if(pregpriv) DBG_871X_SEL_NL(m, "%d\n", pregpriv->ht_enable); return 0; } ssize_t proc_set_ht_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct registry_priv *pregpriv = &padapter->registrypriv; char tmp[32]; u32 mode; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%d ", &mode); if( pregpriv && mode < 2 ) { pregpriv->ht_enable= mode; DBG_871X("ht_enable=%d\n", pregpriv->ht_enable); } } return count; } int proc_get_bw_mode(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct registry_priv *pregpriv = &padapter->registrypriv; if(pregpriv) DBG_871X_SEL_NL(m, "0x%02x\n", pregpriv->bw_mode); return 0; } ssize_t proc_set_bw_mode(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct registry_priv *pregpriv = &padapter->registrypriv; char tmp[32]; u32 mode; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%d ", &mode); if( pregpriv && mode < 2 ) { pregpriv->bw_mode = mode; printk("bw_mode=%d\n", mode); } } return count; } int proc_get_ampdu_enable(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct registry_priv *pregpriv = &padapter->registrypriv; if(pregpriv) DBG_871X_SEL_NL(m, "%d\n", pregpriv->ampdu_enable); return 0; } ssize_t proc_set_ampdu_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct registry_priv *pregpriv = &padapter->registrypriv; char tmp[32]; u32 mode; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%d ", &mode); if( pregpriv && mode < 3 ) { pregpriv->ampdu_enable= mode; printk("ampdu_enable=%d\n", mode); } } return count; } int proc_get_rx_ampdu(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct registry_priv *pregpriv = &padapter->registrypriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if(pregpriv) DBG_871X_SEL_NL(m, "bAcceptAddbaReq = %d , 0:Reject AP's Add BA req, 1:Accept AP's Add BA req.\n", pmlmeinfo->bAcceptAddbaReq ); return 0; } ssize_t proc_set_rx_ampdu(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct registry_priv *pregpriv = &padapter->registrypriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); char tmp[32]; u32 mode; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%d ", &mode); if( pregpriv && mode < 2 ) { pmlmeinfo->bAcceptAddbaReq = mode; DBG_871X("pmlmeinfo->bAcceptAddbaReq=%d \n",pmlmeinfo->bAcceptAddbaReq); if(mode == 0) { //tear down Rx AMPDU send_delba(padapter, 0, get_my_bssid(&(pmlmeinfo->network)));// recipient } } } return count; } int proc_get_rx_ampdu_factor(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); if(padapter) { DBG_871X_SEL_NL(m,"rx ampdu factor = %x\n",padapter->driver_rx_ampdu_factor); } return 0; } ssize_t proc_set_rx_ampdu_factor(struct file *file, const char __user *buffer , size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; u32 factor; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%d ", &factor); if( padapter && (num == 1) ) { DBG_871X("padapter->driver_rx_ampdu_factor = %x\n", factor); if(factor > 0x03) padapter->driver_rx_ampdu_factor = 0xFF; else padapter->driver_rx_ampdu_factor = factor; } } return count; } int proc_get_rx_ampdu_density(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); if(padapter) { DBG_871X_SEL_NL(m,"rx ampdu densityg = %x\n",padapter->driver_rx_ampdu_spacing); } return 0; } ssize_t proc_set_rx_ampdu_density(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; u32 density; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%d ", &density); if( padapter && (num == 1) ) { DBG_871X("padapter->driver_rx_ampdu_spacing = %x\n", density); if(density > 0x07) padapter->driver_rx_ampdu_spacing = 0xFF; else padapter->driver_rx_ampdu_spacing = density; } } return count; } int proc_get_tx_ampdu_density(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); if(padapter) { DBG_871X_SEL_NL(m,"tx ampdu density = %x\n",padapter->driver_ampdu_spacing); } return 0; } ssize_t proc_set_tx_ampdu_density(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; u32 density; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%d ", &density); if( padapter && (num == 1) ) { DBG_871X("padapter->driver_ampdu_spacing = %x\n", density); if(density > 0x07) padapter->driver_ampdu_spacing = 0xFF; else padapter->driver_ampdu_spacing = density; } } return count; } #endif //CONFIG_80211N_HT int proc_get_en_fwps(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct registry_priv *pregpriv = &padapter->registrypriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if(pregpriv) DBG_871X_SEL_NL(m, "check_fw_ps = %d , 1:enable get FW PS state , 0: disable get FW PS state\n" , pregpriv->check_fw_ps); return 0; } ssize_t proc_set_en_fwps(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct registry_priv *pregpriv = &padapter->registrypriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); char tmp[32]; u32 mode; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%d ", &mode); if( pregpriv && mode < 2 ) { pregpriv->check_fw_ps = mode; DBG_871X("pregpriv->check_fw_ps=%d \n",pregpriv->check_fw_ps); } } return count; } /* int proc_get_two_path_rssi(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); if(padapter) DBG_871X_SEL_NL(m, "%d %d\n", padapter->recvpriv.RxRssi[0], padapter->recvpriv.RxRssi[1]); return 0; } */ #ifdef CONFIG_80211N_HT int proc_get_rx_stbc(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct registry_priv *pregpriv = &padapter->registrypriv; if(pregpriv) DBG_871X_SEL_NL(m, "%d\n", pregpriv->rx_stbc); return 0; } ssize_t proc_set_rx_stbc(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct registry_priv *pregpriv = &padapter->registrypriv; char tmp[32]; u32 mode; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%d ", &mode); if( pregpriv && (mode == 0 || mode == 1|| mode == 2|| mode == 3)) { pregpriv->rx_stbc= mode; printk("rx_stbc=%d\n", mode); } } return count; } #endif //CONFIG_80211N_HT /*int proc_get_rssi_disp(struct seq_file *m, void *v) { struct net_device *dev = m->private; return 0; } */ /*ssize_t proc_set_rssi_disp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; u32 enable=0; if (count < 1) { DBG_8192C("argument size is less than 1\n"); return -EFAULT; } if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%x", &enable); if (num != 1) { DBG_8192C("invalid set_rssi_disp parameter!\n"); return count; } if(enable) { DBG_8192C("Linked info Function Enable\n"); padapter->bLinkInfoDump = enable ; } else { DBG_8192C("Linked info Function Disable\n"); padapter->bLinkInfoDump = 0 ; } } return count; } */ #ifdef CONFIG_AP_MODE int proc_get_all_sta_info(struct seq_file *m, void *v) { struct net_device *dev = m->private; _irqL irqL; struct sta_info *psta; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct sta_priv *pstapriv = &padapter->stapriv; int i, j; _list *plist, *phead; struct recv_reorder_ctrl *preorder_ctrl; DBG_871X_SEL_NL(m, "sta_dz_bitmap=0x%x, tim_bitmap=0x%x\n", pstapriv->sta_dz_bitmap, pstapriv->tim_bitmap); _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); for(i=0; i< NUM_STA; i++) { phead = &(pstapriv->sta_hash[i]); plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); plist = get_next(plist); //if(extra_arg == psta->aid) { DBG_871X_SEL_NL(m, "==============================\n"); DBG_871X_SEL_NL(m, "sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr)); DBG_871X_SEL_NL(m, "rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self); DBG_871X_SEL_NL(m, "state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid); #ifdef CONFIG_80211N_HT DBG_871X_SEL_NL(m, "qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate); DBG_871X_SEL_NL(m, "bwmode=%d, ch_offset=%d, sgi_20m=%d,sgi_40m=%d\n", psta->bw_mode, psta->htpriv.ch_offset, psta->htpriv.sgi_20m, psta->htpriv.sgi_40m); DBG_871X_SEL_NL(m, "ampdu_enable = %d\n", psta->htpriv.ampdu_enable); DBG_871X_SEL_NL(m, "agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap); #endif //CONFIG_80211N_HT DBG_871X_SEL_NL(m, "sleepq_len=%d\n", psta->sleepq_len); DBG_871X_SEL_NL(m, "sta_xmitpriv.vo_q_qcnt=%d\n", psta->sta_xmitpriv.vo_q.qcnt); DBG_871X_SEL_NL(m, "sta_xmitpriv.vi_q_qcnt=%d\n", psta->sta_xmitpriv.vi_q.qcnt); DBG_871X_SEL_NL(m, "sta_xmitpriv.be_q_qcnt=%d\n", psta->sta_xmitpriv.be_q.qcnt); DBG_871X_SEL_NL(m, "sta_xmitpriv.bk_q_qcnt=%d\n", psta->sta_xmitpriv.bk_q.qcnt); DBG_871X_SEL_NL(m, "capability=0x%x\n", psta->capability); DBG_871X_SEL_NL(m, "flags=0x%x\n", psta->flags); DBG_871X_SEL_NL(m, "wpa_psk=0x%x\n", psta->wpa_psk); DBG_871X_SEL_NL(m, "wpa2_group_cipher=0x%x\n", psta->wpa2_group_cipher); DBG_871X_SEL_NL(m, "wpa2_pairwise_cipher=0x%x\n", psta->wpa2_pairwise_cipher); DBG_871X_SEL_NL(m, "qos_info=0x%x\n", psta->qos_info); DBG_871X_SEL_NL(m, "dot118021XPrivacy=0x%x\n", psta->dot118021XPrivacy); for(j=0;j<16;j++) { preorder_ctrl = &psta->recvreorder_ctrl[j]; if(preorder_ctrl->enable) { DBG_871X_SEL_NL(m, "tid=%d, indicate_seq=%d\n", j, preorder_ctrl->indicate_seq); } } #ifdef CONFIG_TDLS DBG_871X_SEL_NL(m, "tdls_sta_state=0x%08x\n", psta->tdls_sta_state); DBG_871X_SEL_NL(m, "PeerKey_Lifetime=%d\n", psta->TDLS_PeerKey_Lifetime); DBG_871X_SEL_NL(m, "rx_data_pkts=%llu\n", psta->sta_stats.rx_data_pkts); DBG_871X_SEL_NL(m, "rx_bytes=%llu\n", psta->sta_stats.rx_bytes); DBG_871X_SEL_NL(m, "tx_data_pkts=%llu\n", psta->sta_stats.tx_pkts); DBG_871X_SEL_NL(m, "tx_bytes=%llu\n", psta->sta_stats.tx_bytes); #endif //CONFIG_TDLS DBG_871X_SEL_NL(m, "==============================\n"); } } } _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); return 0; } #endif #ifdef DBG_MEMORY_LEAK #include extern atomic_t _malloc_cnt;; extern atomic_t _malloc_size;; int proc_get_malloc_cnt(struct seq_file *m, void *v) { DBG_871X_SEL_NL(m, "_malloc_cnt=%d\n", atomic_read(&_malloc_cnt)); DBG_871X_SEL_NL(m, "_malloc_size=%d\n", atomic_read(&_malloc_size)); return 0; } #endif /* DBG_MEMORY_LEAK */ #ifdef CONFIG_FIND_BEST_CHANNEL int proc_get_best_channel(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; u32 i, best_channel_24G = 1, best_channel_5G = 36, index_24G = 0, index_5G = 0; for (i=0; pmlmeext->channel_set[i].ChannelNum !=0; i++) { if ( pmlmeext->channel_set[i].ChannelNum == 1) index_24G = i; if ( pmlmeext->channel_set[i].ChannelNum == 36) index_5G = i; } for (i=0; (i < MAX_CHANNEL_NUM) && (pmlmeext->channel_set[i].ChannelNum !=0) ; i++) { // 2.4G if ( pmlmeext->channel_set[i].ChannelNum == 6 ) { if ( pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_24G].rx_count ) { index_24G = i; best_channel_24G = pmlmeext->channel_set[i].ChannelNum; } } // 5G if ( pmlmeext->channel_set[i].ChannelNum >= 36 && pmlmeext->channel_set[i].ChannelNum < 140 ) { // Find primary channel if ( (( pmlmeext->channel_set[i].ChannelNum - 36) % 8 == 0) && (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count) ) { index_5G = i; best_channel_5G = pmlmeext->channel_set[i].ChannelNum; } } if ( pmlmeext->channel_set[i].ChannelNum >= 149 && pmlmeext->channel_set[i].ChannelNum < 165) { // find primary channel if ( (( pmlmeext->channel_set[i].ChannelNum - 149) % 8 == 0) && (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count) ) { index_5G = i; best_channel_5G = pmlmeext->channel_set[i].ChannelNum; } } #if 1 // debug DBG_871X_SEL_NL(m, "The rx cnt of channel %3d = %d\n", pmlmeext->channel_set[i].ChannelNum, pmlmeext->channel_set[i].rx_count); #endif } DBG_871X_SEL_NL(m, "best_channel_5G = %d\n", best_channel_5G); DBG_871X_SEL_NL(m, "best_channel_24G = %d\n", best_channel_24G); return 0; } ssize_t proc_set_best_channel(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; char tmp[32]; if(count < 1) return -EFAULT; if(buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int i; for(i = 0; pmlmeext->channel_set[i].ChannelNum != 0; i++) { pmlmeext->channel_set[i].rx_count = 0; } DBG_871X("set %s\n", "Clean Best Channel Count"); } return count; } #endif /* CONFIG_FIND_BEST_CHANNEL */ #ifdef CONFIG_BT_COEXIST int proc_get_btcoex_dbg(struct seq_file *m, void *v) { struct net_device *dev = m->private; PADAPTER padapter; char buf[512] = {0}; padapter = (PADAPTER)rtw_netdev_priv(dev); rtw_btcoex_GetDBG(padapter, buf, 512); DBG_871X_SEL(m, "%s", buf); return 0; } ssize_t proc_set_btcoex_dbg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; PADAPTER padapter; u8 tmp[80] = {0}; u32 module[2] = {0}; u32 num; padapter = (PADAPTER)rtw_netdev_priv(dev); // DBG_871X("+" FUNC_ADPT_FMT "\n", FUNC_ADPT_ARG(padapter)); if (NULL == buffer) { DBG_871X(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); return -EFAULT; } if (count < 1) { DBG_871X(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); return -EFAULT; } num = count; if (num > (sizeof(tmp) - 1)) num = (sizeof(tmp) - 1); if (copy_from_user(tmp, buffer, num)) { DBG_871X(FUNC_ADPT_FMT ": copy buffer from user space FAIL!\n", FUNC_ADPT_ARG(padapter)); return -EFAULT; } num = sscanf(tmp, "%x %x", module, module+1); if (1 == num) { if (0 == module[0]) _rtw_memset(module, 0, sizeof(module)); else _rtw_memset(module, 0xFF, sizeof(module)); } else if (2 != num) { DBG_871X(FUNC_ADPT_FMT ": input(\"%s\") format incorrect!\n", FUNC_ADPT_ARG(padapter), tmp); if (0 == num) return -EFAULT; } DBG_871X(FUNC_ADPT_FMT ": input 0x%08X 0x%08X\n", FUNC_ADPT_ARG(padapter), module[0], module[1]); rtw_btcoex_SetDBG(padapter, module); return count; } int proc_get_btcoex_info(struct seq_file *m, void *v) { struct net_device *dev = m->private; PADAPTER padapter; const u32 bufsize = 30*100; u8 *pbuf = NULL; padapter = (PADAPTER)rtw_netdev_priv(dev); pbuf = rtw_zmalloc(bufsize); if (NULL == pbuf) { return -ENOMEM; } rtw_btcoex_DisplayBtCoexInfo(padapter, pbuf, bufsize); DBG_871X_SEL(m, "%s\n", pbuf); rtw_mfree(pbuf, bufsize); return 0; } #endif /* CONFIG_BT_COEXIST */ #if defined(DBG_CONFIG_ERROR_DETECT) int proc_get_sreset(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); return 0; } ssize_t proc_set_sreset(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; s32 trigger_point; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%d", &trigger_point); if (trigger_point == SRESET_TGP_NULL) rtw_hal_sreset_reset(padapter); else sreset_set_trigger_point(padapter, trigger_point); } return count; } #endif /* DBG_CONFIG_ERROR_DETECT */ #ifdef CONFIG_PCI_HCI int proc_get_rx_ring(struct seq_file *m, void *v) { _irqL irqL; struct net_device *dev = m->private; _adapter *padapter = (_adapter *) rtw_netdev_priv(dev); struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); struct recv_priv *precvpriv = &padapter->recvpriv; struct rtw_rx_ring *rx_ring = &precvpriv->rx_ring[RX_MPDU_QUEUE]; int i, j; DBG_871X_SEL_NL(m, "rx ring (%p)\n", rx_ring); DBG_871X_SEL_NL(m, " dma: 0x%08x\n", (int) rx_ring->dma); DBG_871X_SEL_NL(m, " idx: %d\n", rx_ring->idx); _enter_critical(&pdvobjpriv->irq_th_lock, &irqL); for (i=0; irxringcount; i++) { struct recv_stat *entry = &rx_ring->desc[i]; struct sk_buff *skb = rx_ring->rx_buf[i]; DBG_871X_SEL_NL(m, " desc[%03d]: %p, rx_buf[%03d]: 0x%08x\n", i, entry, i, cpu_to_le32(*((dma_addr_t *)skb->cb))); for (j=0; jirq_th_lock, &irqL); return 0; } int proc_get_tx_ring(struct seq_file *m, void *v) { _irqL irqL; struct net_device *dev = m->private; _adapter *padapter = (_adapter *) rtw_netdev_priv(dev); struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); struct xmit_priv *pxmitpriv = &padapter->xmitpriv; int i, j, k; _enter_critical(&pdvobjpriv->irq_th_lock, &irqL); for (i = 0; i < PCI_MAX_TX_QUEUE_COUNT; i++) { struct rtw_tx_ring *tx_ring = &pxmitpriv->tx_ring[i]; DBG_871X_SEL_NL(m, "tx ring[%d] (%p)\n", i, tx_ring); DBG_871X_SEL_NL(m, " dma: 0x%08x\n", (int) tx_ring->dma); DBG_871X_SEL_NL(m, " idx: %d\n", tx_ring->idx); DBG_871X_SEL_NL(m, " entries: %d\n", tx_ring->entries); // DBG_871X_SEL_NL(m, " queue: %d\n", tx_ring->queue); DBG_871X_SEL_NL(m, " qlen: %d\n", tx_ring->qlen); for (j=0; j < pxmitpriv->txringcount[i]; j++) { struct tx_desc *entry = &tx_ring->desc[j]; DBG_871X_SEL_NL(m, " desc[%03d]: %p\n", j, entry); for (k=0; k < sizeof(*entry)/4; k++) { if ((k % 4) == 0) DBG_871X_SEL_NL(m, " 0x%03x", k); DBG_871X_SEL_NL(m, " 0x%08x ", ((int *) entry)[k]); if ((k % 4) == 3) DBG_871X_SEL_NL(m, "\n"); } } } _exit_critical(&pdvobjpriv->irq_th_lock, &irqL); return 0; } #endif int proc_get_new_bcn_max(struct seq_file *m, void *v) { extern int new_bcn_max; DBG_871X_SEL_NL(m, "%d", new_bcn_max); return 0; } ssize_t proc_set_new_bcn_max(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { char tmp[32]; extern int new_bcn_max; if(count < 1) return -EFAULT; if(buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) sscanf(tmp, "%d ", &new_bcn_max); return count; } #endif rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_eeprom.c000066400000000000000000000237061261122257400207660ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_EEPROM_C_ #include #include #include void up_clk(_adapter* padapter, u16 *x) { _func_enter_; *x = *x | _EESK; rtw_write8(padapter, EE_9346CR, (u8)*x); rtw_udelay_os(CLOCK_RATE); _func_exit_; } void down_clk(_adapter * padapter, u16 *x ) { _func_enter_; *x = *x & ~_EESK; rtw_write8(padapter, EE_9346CR, (u8)*x); rtw_udelay_os(CLOCK_RATE); _func_exit_; } void shift_out_bits(_adapter * padapter, u16 data, u16 count) { u16 x,mask; _func_enter_; if(padapter->bSurpriseRemoved==_TRUE){ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); goto out; } mask = 0x01 << (count - 1); x = rtw_read8(padapter, EE_9346CR); x &= ~(_EEDO | _EEDI); do { x &= ~_EEDI; if(data & mask) x |= _EEDI; if(padapter->bSurpriseRemoved==_TRUE){ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); goto out; } rtw_write8(padapter, EE_9346CR, (u8)x); rtw_udelay_os(CLOCK_RATE); up_clk(padapter, &x); down_clk(padapter, &x); mask = mask >> 1; } while(mask); if(padapter->bSurpriseRemoved==_TRUE){ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); goto out; } x &= ~_EEDI; rtw_write8(padapter, EE_9346CR, (u8)x); out: _func_exit_; } u16 shift_in_bits (_adapter * padapter) { u16 x,d=0,i; _func_enter_; if(padapter->bSurpriseRemoved==_TRUE){ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); goto out; } x = rtw_read8(padapter, EE_9346CR); x &= ~( _EEDO | _EEDI); d = 0; for(i=0; i<16; i++) { d = d << 1; up_clk(padapter, &x); if(padapter->bSurpriseRemoved==_TRUE){ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); goto out; } x = rtw_read8(padapter, EE_9346CR); x &= ~(_EEDI); if(x & _EEDO) d |= 1; down_clk(padapter, &x); } out: _func_exit_; return d; } void standby(_adapter * padapter ) { u8 x; _func_enter_; x = rtw_read8(padapter, EE_9346CR); x &= ~(_EECS | _EESK); rtw_write8(padapter, EE_9346CR,x); rtw_udelay_os(CLOCK_RATE); x |= _EECS; rtw_write8(padapter, EE_9346CR, x); rtw_udelay_os(CLOCK_RATE); _func_exit_; } u16 wait_eeprom_cmd_done(_adapter* padapter) { u8 x; u16 i,res=_FALSE; _func_enter_; standby(padapter ); for (i=0; i<200; i++) { x = rtw_read8(padapter, EE_9346CR); if (x & _EEDO){ res=_TRUE; goto exit; } rtw_udelay_os(CLOCK_RATE); } exit: _func_exit_; return res; } void eeprom_clean(_adapter * padapter) { u16 x; _func_enter_; if(padapter->bSurpriseRemoved==_TRUE){ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); goto out; } x = rtw_read8(padapter, EE_9346CR); if(padapter->bSurpriseRemoved==_TRUE){ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); goto out; } x &= ~(_EECS | _EEDI); rtw_write8(padapter, EE_9346CR, (u8)x); if(padapter->bSurpriseRemoved==_TRUE){ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); goto out; } up_clk(padapter, &x); if(padapter->bSurpriseRemoved==_TRUE){ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); goto out; } down_clk(padapter, &x); out: _func_exit_; } void eeprom_write16(_adapter * padapter, u16 reg, u16 data) { u8 x; #ifdef CONFIG_RTL8712 u8 tmp8_ori,tmp8_new,tmp8_clk_ori,tmp8_clk_new; tmp8_ori=rtw_read8(padapter, 0x102502f1); tmp8_new=tmp8_ori & 0xf7; if(tmp8_ori != tmp8_new){ rtw_write8(padapter, 0x102502f1, tmp8_new); RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x102502f1=====\n")); } tmp8_clk_ori=rtw_read8(padapter,0x10250003); tmp8_clk_new=tmp8_clk_ori|0x20; if(tmp8_clk_new!=tmp8_clk_ori){ RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x10250003=====\n")); rtw_write8(padapter, 0x10250003, tmp8_clk_new); } #endif _func_enter_; x = rtw_read8(padapter, EE_9346CR); x &= ~(_EEDI | _EEDO | _EESK | _EEM0); x |= _EEM1 | _EECS; rtw_write8(padapter, EE_9346CR, x); shift_out_bits(padapter, EEPROM_EWEN_OPCODE, 5); if(padapter->EepromAddressSize==8) //CF+ and SDIO shift_out_bits(padapter, 0, 6); else //USB shift_out_bits(padapter, 0, 4); standby( padapter); // Commented out by rcnjko, 2004.0 // // Erase this particular word. Write the erase opcode and register // // number in that order. The opcode is 3bits in length; reg is 6 bits long. // shift_out_bits(Adapter, EEPROM_ERASE_OPCODE, 3); // shift_out_bits(Adapter, reg, Adapter->EepromAddressSize); // // if (wait_eeprom_cmd_done(Adapter ) == FALSE) // { // return; // } standby(padapter ); // write the new word to the EEPROM // send the write opcode the EEPORM shift_out_bits(padapter, EEPROM_WRITE_OPCODE, 3); // select which word in the EEPROM that we are writing to. shift_out_bits(padapter, reg, padapter->EepromAddressSize); // write the data to the selected EEPROM word. shift_out_bits(padapter, data, 16); if (wait_eeprom_cmd_done(padapter ) == _FALSE) { goto exit; } standby(padapter ); shift_out_bits(padapter, EEPROM_EWDS_OPCODE, 5); shift_out_bits(padapter, reg, 4); eeprom_clean(padapter ); exit: #ifdef CONFIG_RTL8712 if(tmp8_clk_new!=tmp8_clk_ori) rtw_write8(padapter, 0x10250003, tmp8_clk_ori); if(tmp8_new!=tmp8_ori) rtw_write8(padapter, 0x102502f1, tmp8_ori); #endif _func_exit_; return; } u16 eeprom_read16(_adapter * padapter, u16 reg) //ReadEEprom { u16 x; u16 data=0; #ifdef CONFIG_RTL8712 u8 tmp8_ori,tmp8_new,tmp8_clk_ori,tmp8_clk_new; tmp8_ori= rtw_read8(padapter, 0x102502f1); tmp8_new = tmp8_ori & 0xf7; if(tmp8_ori != tmp8_new){ rtw_write8(padapter, 0x102502f1, tmp8_new); RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x102502f1=====\n")); } tmp8_clk_ori=rtw_read8(padapter,0x10250003); tmp8_clk_new=tmp8_clk_ori|0x20; if(tmp8_clk_new!=tmp8_clk_ori){ RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x10250003=====\n")); rtw_write8(padapter, 0x10250003, tmp8_clk_new); } #endif _func_enter_; if(padapter->bSurpriseRemoved==_TRUE){ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); goto out; } // select EEPROM, reset bits, set _EECS x = rtw_read8(padapter, EE_9346CR); if(padapter->bSurpriseRemoved==_TRUE){ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); goto out; } x &= ~(_EEDI | _EEDO | _EESK | _EEM0); x |= _EEM1 | _EECS; rtw_write8(padapter, EE_9346CR, (unsigned char)x); // write the read opcode and register number in that order // The opcode is 3bits in length, reg is 6 bits long shift_out_bits(padapter, EEPROM_READ_OPCODE, 3); shift_out_bits(padapter, reg, padapter->EepromAddressSize); // Now read the data (16 bits) in from the selected EEPROM word data = shift_in_bits(padapter); eeprom_clean(padapter); out: #ifdef CONFIG_RTL8712 if(tmp8_clk_new!=tmp8_clk_ori) rtw_write8(padapter, 0x10250003, tmp8_clk_ori); if(tmp8_new!=tmp8_ori) rtw_write8(padapter, 0x102502f1, tmp8_ori); #endif _func_exit_; return data; } //From even offset void eeprom_read_sz(_adapter * padapter, u16 reg, u8* data, u32 sz) { u16 x, data16; u32 i; _func_enter_; if(padapter->bSurpriseRemoved==_TRUE){ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); goto out; } // select EEPROM, reset bits, set _EECS x = rtw_read8(padapter, EE_9346CR); if(padapter->bSurpriseRemoved==_TRUE){ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); goto out; } x &= ~(_EEDI | _EEDO | _EESK | _EEM0); x |= _EEM1 | _EECS; rtw_write8(padapter, EE_9346CR, (unsigned char)x); // write the read opcode and register number in that order // The opcode is 3bits in length, reg is 6 bits long shift_out_bits(padapter, EEPROM_READ_OPCODE, 3); shift_out_bits(padapter, reg, padapter->EepromAddressSize); for(i=0; i>8; } eeprom_clean(padapter); out: _func_exit_; } //addr_off : address offset of the entry in eeprom (not the tuple number of eeprom (reg); that is addr_off !=reg) u8 eeprom_read(_adapter * padapter, u32 addr_off, u8 sz, u8* rbuf) { u8 quotient, remainder, addr_2align_odd; u16 reg, stmp , i=0, idx = 0; _func_enter_; reg = (u16)(addr_off >> 1); addr_2align_odd = (u8)(addr_off & 0x1); if(addr_2align_odd) //read that start at high part: e.g 1,3,5,7,9,... { stmp = eeprom_read16(padapter, reg); rbuf[idx++] = (u8) ((stmp>>8)&0xff); //return hogh-part of the short reg++; sz--; } quotient = sz >> 1; remainder = sz & 0x1; for( i=0 ; i < quotient; i++) { stmp = eeprom_read16(padapter, reg+i); rbuf[idx++] = (u8) (stmp&0xff); rbuf[idx++] = (u8) ((stmp>>8)&0xff); } reg = reg+i; if(remainder){ //end of read at lower part of short : 0,2,4,6,... stmp = eeprom_read16(padapter, reg); rbuf[idx] = (u8)(stmp & 0xff); } _func_exit_; return _TRUE; } VOID read_eeprom_content(_adapter * padapter) { _func_enter_; _func_exit_; } rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_ieee80211.c000066400000000000000000001525471261122257400210100ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _IEEE80211_C #include u8 RTW_WPA_OUI_TYPE[] = { 0x00, 0x50, 0xf2, 1 }; u16 RTW_WPA_VERSION = 1; u8 WPA_AUTH_KEY_MGMT_NONE[] = { 0x00, 0x50, 0xf2, 0 }; u8 WPA_AUTH_KEY_MGMT_UNSPEC_802_1X[] = { 0x00, 0x50, 0xf2, 1 }; u8 WPA_AUTH_KEY_MGMT_PSK_OVER_802_1X[] = { 0x00, 0x50, 0xf2, 2 }; u8 WPA_CIPHER_SUITE_NONE[] = { 0x00, 0x50, 0xf2, 0 }; u8 WPA_CIPHER_SUITE_WEP40[] = { 0x00, 0x50, 0xf2, 1 }; u8 WPA_CIPHER_SUITE_TKIP[] = { 0x00, 0x50, 0xf2, 2 }; u8 WPA_CIPHER_SUITE_WRAP[] = { 0x00, 0x50, 0xf2, 3 }; u8 WPA_CIPHER_SUITE_CCMP[] = { 0x00, 0x50, 0xf2, 4 }; u8 WPA_CIPHER_SUITE_WEP104[] = { 0x00, 0x50, 0xf2, 5 }; u16 RSN_VERSION_BSD = 1; u8 RSN_AUTH_KEY_MGMT_UNSPEC_802_1X[] = { 0x00, 0x0f, 0xac, 1 }; u8 RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X[] = { 0x00, 0x0f, 0xac, 2 }; u8 RSN_CIPHER_SUITE_NONE[] = { 0x00, 0x0f, 0xac, 0 }; u8 RSN_CIPHER_SUITE_WEP40[] = { 0x00, 0x0f, 0xac, 1 }; u8 RSN_CIPHER_SUITE_TKIP[] = { 0x00, 0x0f, 0xac, 2 }; u8 RSN_CIPHER_SUITE_WRAP[] = { 0x00, 0x0f, 0xac, 3 }; u8 RSN_CIPHER_SUITE_CCMP[] = { 0x00, 0x0f, 0xac, 4 }; u8 RSN_CIPHER_SUITE_WEP104[] = { 0x00, 0x0f, 0xac, 5 }; //----------------------------------------------------------- // for adhoc-master to generate ie and provide supported-rate to fw //----------------------------------------------------------- static u8 WIFI_CCKRATES[] = {(IEEE80211_CCK_RATE_1MB | IEEE80211_BASIC_RATE_MASK), (IEEE80211_CCK_RATE_2MB | IEEE80211_BASIC_RATE_MASK), (IEEE80211_CCK_RATE_5MB | IEEE80211_BASIC_RATE_MASK), (IEEE80211_CCK_RATE_11MB | IEEE80211_BASIC_RATE_MASK)}; static u8 WIFI_OFDMRATES[] = {(IEEE80211_OFDM_RATE_6MB), (IEEE80211_OFDM_RATE_9MB), (IEEE80211_OFDM_RATE_12MB), (IEEE80211_OFDM_RATE_18MB), (IEEE80211_OFDM_RATE_24MB), IEEE80211_OFDM_RATE_36MB, IEEE80211_OFDM_RATE_48MB, IEEE80211_OFDM_RATE_54MB}; int rtw_get_bit_value_from_ieee_value(u8 val) { unsigned char dot11_rate_table[]={2,4,11,22,12,18,24,36,48,72,96,108,0}; // last element must be zero!! int i=0; while(dot11_rate_table[i] != 0) { if (dot11_rate_table[i] == val) return BIT(i); i++; } return 0; } uint rtw_is_cckrates_included(u8 *rate) { u32 i = 0; while(rate[i]!=0) { if ( (((rate[i]) & 0x7f) == 2) || (((rate[i]) & 0x7f) == 4) || (((rate[i]) & 0x7f) == 11) || (((rate[i]) & 0x7f) == 22) ) return _TRUE; i++; } return _FALSE; } uint rtw_is_cckratesonly_included(u8 *rate) { u32 i = 0; while(rate[i]!=0) { if ( (((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) && (((rate[i]) & 0x7f) != 11) && (((rate[i]) & 0x7f) != 22) ) return _FALSE; i++; } return _TRUE; } int rtw_check_network_type(unsigned char *rate, int ratelen, int channel) { if (channel > 14) { if ((rtw_is_cckrates_included(rate)) == _TRUE) return WIRELESS_INVALID; else return WIRELESS_11A; } else // could be pure B, pure G, or B/G { if ((rtw_is_cckratesonly_included(rate)) == _TRUE) return WIRELESS_11B; else if((rtw_is_cckrates_included(rate)) == _TRUE) return WIRELESS_11BG; else return WIRELESS_11G; } } u8 *rtw_set_fixed_ie(unsigned char *pbuf, unsigned int len, unsigned char *source, unsigned int *frlen) { _rtw_memcpy((void *)pbuf, (void *)source, len); *frlen = *frlen + len; return (pbuf + len); } // rtw_set_ie will update frame length u8 *rtw_set_ie ( u8 *pbuf, sint index, uint len, u8 *source, uint *frlen //frame length ) { *pbuf = (u8)index; *(pbuf + 1) = (u8)len; if (len > 0) _rtw_memcpy((void *)(pbuf + 2), (void *)source, len); *frlen = *frlen + (len + 2); return (pbuf + len + 2); } inline u8 *rtw_set_ie_ch_switch(u8 *buf, u32 *buf_len, u8 ch_switch_mode, u8 new_ch, u8 ch_switch_cnt) { u8 ie_data[3]; ie_data[0] = ch_switch_mode; ie_data[1] = new_ch; ie_data[2] = ch_switch_cnt; return rtw_set_ie(buf, WLAN_EID_CHANNEL_SWITCH, 3, ie_data, buf_len); } inline u8 secondary_ch_offset_to_hal_ch_offset(u8 ch_offset) { if (ch_offset == SCN) return HAL_PRIME_CHNL_OFFSET_DONT_CARE; else if(ch_offset == SCA) return HAL_PRIME_CHNL_OFFSET_UPPER; else if(ch_offset == SCB) return HAL_PRIME_CHNL_OFFSET_LOWER; return HAL_PRIME_CHNL_OFFSET_DONT_CARE; } inline u8 hal_ch_offset_to_secondary_ch_offset(u8 ch_offset) { if (ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) return SCN; else if(ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) return SCB; else if(ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) return SCA; return SCN; } inline u8 *rtw_set_ie_secondary_ch_offset(u8 *buf, u32 *buf_len, u8 secondary_ch_offset) { return rtw_set_ie(buf, WLAN_EID_SECONDARY_CHANNEL_OFFSET, 1, &secondary_ch_offset, buf_len); } inline u8 *rtw_set_ie_mesh_ch_switch_parm(u8 *buf, u32 *buf_len, u8 ttl, u8 flags, u16 reason, u16 precedence) { u8 ie_data[6]; ie_data[0] = ttl; ie_data[1] = flags; RTW_PUT_LE16((u8*)&ie_data[2], reason); RTW_PUT_LE16((u8*)&ie_data[4], precedence); return rtw_set_ie(buf, 0x118, 6, ie_data, buf_len); } /*---------------------------------------------------------------------------- index: the information element id index, limit is the limit for search -----------------------------------------------------------------------------*/ u8 *rtw_get_ie(u8 *pbuf, sint index, sint *len, sint limit) { sint tmp,i; u8 *p; _func_enter_; if (limit < 1){ _func_exit_; return NULL; } p = pbuf; i = 0; *len = 0; while(1) { if (*p == index) { *len = *(p + 1); return (p); } else { tmp = *(p + 1); p += (tmp + 2); i += (tmp + 2); } if (i >= limit) break; } _func_exit_; return NULL; } /** * rtw_get_ie_ex - Search specific IE from a series of IEs * @in_ie: Address of IEs to search * @in_len: Length limit from in_ie * @eid: Element ID to match * @oui: OUI to match * @oui_len: OUI length * @ie: If not NULL and the specific IE is found, the IE will be copied to the buf starting from the specific IE * @ielen: If not NULL and the specific IE is found, will set to the length of the entire IE * * Returns: The address of the specific IE found, or NULL */ u8 *rtw_get_ie_ex(u8 *in_ie, uint in_len, u8 eid, u8 *oui, u8 oui_len, u8 *ie, uint *ielen) { uint cnt; u8 *target_ie = NULL; if(ielen) *ielen = 0; if(!in_ie || in_len<=0) return target_ie; cnt = 0; while(cnt 12) break; i++; } _func_exit_; return i; } int rtw_generate_ie(struct registry_priv *pregistrypriv) { u8 wireless_mode; int sz = 0, rateLen; WLAN_BSSID_EX* pdev_network = &pregistrypriv->dev_network; u8* ie = pdev_network->IEs; _func_enter_; //timestamp will be inserted by hardware sz += 8; ie += sz; //beacon interval : 2bytes *(u16*)ie = cpu_to_le16((u16)pdev_network->Configuration.BeaconPeriod);//BCN_INTERVAL; sz += 2; ie += 2; //capability info *(u16*)ie = 0; *(u16*)ie |= cpu_to_le16(cap_IBSS); if(pregistrypriv->preamble == PREAMBLE_SHORT) *(u16*)ie |= cpu_to_le16(cap_ShortPremble); if (pdev_network->Privacy) *(u16*)ie |= cpu_to_le16(cap_Privacy); sz += 2; ie += 2; //SSID ie = rtw_set_ie(ie, _SSID_IE_, pdev_network->Ssid.SsidLength, pdev_network->Ssid.Ssid, &sz); //supported rates if(pregistrypriv->wireless_mode == WIRELESS_11ABGN) { if(pdev_network->Configuration.DSConfig > 14) wireless_mode = WIRELESS_11A_5N; else wireless_mode = WIRELESS_11BG_24N; } else { wireless_mode = pregistrypriv->wireless_mode; } rtw_set_supported_rate(pdev_network->SupportedRates, wireless_mode) ; rateLen = rtw_get_rateset_len(pdev_network->SupportedRates); if (rateLen > 8) { ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, 8, pdev_network->SupportedRates, &sz); //ie = rtw_set_ie(ie, _EXT_SUPPORTEDRATES_IE_, (rateLen - 8), (pdev_network->SupportedRates + 8), &sz); } else { ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, rateLen, pdev_network->SupportedRates, &sz); } //DS parameter set ie = rtw_set_ie(ie, _DSSET_IE_, 1, (u8 *)&(pdev_network->Configuration.DSConfig), &sz); //IBSS Parameter Set ie = rtw_set_ie(ie, _IBSS_PARA_IE_, 2, (u8 *)&(pdev_network->Configuration.ATIMWindow), &sz); if (rateLen > 8) { ie = rtw_set_ie(ie, _EXT_SUPPORTEDRATES_IE_, (rateLen - 8), (pdev_network->SupportedRates + 8), &sz); } #ifdef CONFIG_80211N_HT //HT Cap. if(((pregistrypriv->wireless_mode&WIRELESS_11_5N)||(pregistrypriv->wireless_mode&WIRELESS_11_24N)) && (pregistrypriv->ht_enable==_TRUE)) { //todo: } #endif //CONFIG_80211N_HT //pdev_network->IELength = sz; //update IELength _func_exit_; //return _SUCCESS; return sz; } unsigned char *rtw_get_wpa_ie(unsigned char *pie, int *wpa_ie_len, int limit) { int len; u16 val16; unsigned char wpa_oui_type[] = {0x00, 0x50, 0xf2, 0x01}; u8 *pbuf = pie; int limit_new = limit; while(1) { pbuf = rtw_get_ie(pbuf, _WPA_IE_ID_, &len, limit_new); if (pbuf) { //check if oui matches... if (_rtw_memcmp((pbuf + 2), wpa_oui_type, sizeof (wpa_oui_type)) == _FALSE) { goto check_next_ie; } //check version... _rtw_memcpy((u8 *)&val16, (pbuf + 6), sizeof(val16)); val16 = le16_to_cpu(val16); if (val16 != 0x0001) goto check_next_ie; *wpa_ie_len = *(pbuf + 1); return pbuf; } else { *wpa_ie_len = 0; return NULL; } check_next_ie: limit_new = limit - (pbuf - pie) - 2 - len; if (limit_new <= 0) break; pbuf += (2 + len); } *wpa_ie_len = 0; return NULL; } unsigned char *rtw_get_wpa2_ie(unsigned char *pie, int *rsn_ie_len, int limit) { return rtw_get_ie(pie, _WPA2_IE_ID_,rsn_ie_len, limit); } int rtw_get_wpa_cipher_suite(u8 *s) { if (_rtw_memcmp(s, WPA_CIPHER_SUITE_NONE, WPA_SELECTOR_LEN) == _TRUE) return WPA_CIPHER_NONE; if (_rtw_memcmp(s, WPA_CIPHER_SUITE_WEP40, WPA_SELECTOR_LEN) == _TRUE) return WPA_CIPHER_WEP40; if (_rtw_memcmp(s, WPA_CIPHER_SUITE_TKIP, WPA_SELECTOR_LEN) == _TRUE) return WPA_CIPHER_TKIP; if (_rtw_memcmp(s, WPA_CIPHER_SUITE_CCMP, WPA_SELECTOR_LEN) == _TRUE) return WPA_CIPHER_CCMP; if (_rtw_memcmp(s, WPA_CIPHER_SUITE_WEP104, WPA_SELECTOR_LEN) == _TRUE) return WPA_CIPHER_WEP104; return 0; } int rtw_get_wpa2_cipher_suite(u8 *s) { if (_rtw_memcmp(s, RSN_CIPHER_SUITE_NONE, RSN_SELECTOR_LEN) == _TRUE) return WPA_CIPHER_NONE; if (_rtw_memcmp(s, RSN_CIPHER_SUITE_WEP40, RSN_SELECTOR_LEN) == _TRUE) return WPA_CIPHER_WEP40; if (_rtw_memcmp(s, RSN_CIPHER_SUITE_TKIP, RSN_SELECTOR_LEN) == _TRUE) return WPA_CIPHER_TKIP; if (_rtw_memcmp(s, RSN_CIPHER_SUITE_CCMP, RSN_SELECTOR_LEN) == _TRUE) return WPA_CIPHER_CCMP; if (_rtw_memcmp(s, RSN_CIPHER_SUITE_WEP104, RSN_SELECTOR_LEN) == _TRUE) return WPA_CIPHER_WEP104; return 0; } int rtw_parse_wpa_ie(u8* wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher, int *is_8021x) { int i, ret=_SUCCESS; int left, count; u8 *pos; u8 SUITE_1X[4] = {0x00, 0x50, 0xf2, 1}; if (wpa_ie_len <= 0) { /* No WPA IE - fail silently */ return _FAIL; } if ((*wpa_ie != _WPA_IE_ID_) || (*(wpa_ie+1) != (u8)(wpa_ie_len - 2)) || (_rtw_memcmp(wpa_ie+2, RTW_WPA_OUI_TYPE, WPA_SELECTOR_LEN) != _TRUE) ) { return _FAIL; } pos = wpa_ie; pos += 8; left = wpa_ie_len - 8; //group_cipher if (left >= WPA_SELECTOR_LEN) { *group_cipher = rtw_get_wpa_cipher_suite(pos); pos += WPA_SELECTOR_LEN; left -= WPA_SELECTOR_LEN; } else if (left > 0) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie length mismatch, %u too much", __FUNCTION__, left)); return _FAIL; } //pairwise_cipher if (left >= 2) { //count = le16_to_cpu(*(u16*)pos); count = RTW_GET_LE16(pos); pos += 2; left -= 2; if (count == 0 || left < count * WPA_SELECTOR_LEN) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie count botch (pairwise), " "count %u left %u", __FUNCTION__, count, left)); return _FAIL; } for (i = 0; i < count; i++) { *pairwise_cipher |= rtw_get_wpa_cipher_suite(pos); pos += WPA_SELECTOR_LEN; left -= WPA_SELECTOR_LEN; } } else if (left == 1) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie too short (for key mgmt)", __FUNCTION__)); return _FAIL; } if (is_8021x) { if (left >= 6) { pos += 2; if (_rtw_memcmp(pos, SUITE_1X, 4) == 1) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("%s : there has 802.1x auth\n", __FUNCTION__)); *is_8021x = 1; } } } return ret; } int rtw_parse_wpa2_ie(u8* rsn_ie, int rsn_ie_len, int *group_cipher, int *pairwise_cipher, int *is_8021x) { int i, ret=_SUCCESS; int left, count; u8 *pos; u8 SUITE_1X[4] = {0x00,0x0f, 0xac, 0x01}; if (rsn_ie_len <= 0) { /* No RSN IE - fail silently */ return _FAIL; } if ((*rsn_ie!= _WPA2_IE_ID_) || (*(rsn_ie+1) != (u8)(rsn_ie_len - 2))) { return _FAIL; } pos = rsn_ie; pos += 4; left = rsn_ie_len - 4; //group_cipher if (left >= RSN_SELECTOR_LEN) { *group_cipher = rtw_get_wpa2_cipher_suite(pos); pos += RSN_SELECTOR_LEN; left -= RSN_SELECTOR_LEN; } else if (left > 0) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie length mismatch, %u too much", __FUNCTION__, left)); return _FAIL; } //pairwise_cipher if (left >= 2) { //count = le16_to_cpu(*(u16*)pos); count = RTW_GET_LE16(pos); pos += 2; left -= 2; if (count == 0 || left < count * RSN_SELECTOR_LEN) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie count botch (pairwise), " "count %u left %u", __FUNCTION__, count, left)); return _FAIL; } for (i = 0; i < count; i++) { *pairwise_cipher |= rtw_get_wpa2_cipher_suite(pos); pos += RSN_SELECTOR_LEN; left -= RSN_SELECTOR_LEN; } } else if (left == 1) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie too short (for key mgmt)", __FUNCTION__)); return _FAIL; } if (is_8021x) { if (left >= 6) { pos += 2; if (_rtw_memcmp(pos, SUITE_1X, 4) == 1) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("%s (): there has 802.1x auth\n", __FUNCTION__)); *is_8021x = 1; } } } return ret; } //#ifdef CONFIG_WAPI_SUPPORT int rtw_get_wapi_ie(u8 *in_ie,uint in_len,u8 *wapi_ie,u16 *wapi_len) { int len = 0; u8 authmode, i; uint cnt; u8 wapi_oui1[4]={0x0,0x14,0x72,0x01}; u8 wapi_oui2[4]={0x0,0x14,0x72,0x02}; _func_enter_; if(wapi_len) *wapi_len = 0; if(!in_ie || in_len<=0) return len; cnt = (_TIMESTAMP_ + _BEACON_ITERVAL_ + _CAPABILITY_); while(cnt found WPS_IE.....\n"); *wps_ielen = ie_ptr[1]+2; match=_TRUE; } return match; } u8 *rtw_get_wps_ie_from_scan_queue(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen, u8 frame_type) { u8* wps = NULL; DBG_871X( "[%s] frame_type = %d\n", __FUNCTION__, frame_type ); switch( frame_type ) { case 1: case 3: { // Beacon or Probe Response wps = rtw_get_wps_ie(in_ie + _PROBERSP_IE_OFFSET_, in_len - _PROBERSP_IE_OFFSET_, wps_ie, wps_ielen); break; } case 2: { // Probe Request wps = rtw_get_wps_ie(in_ie + _PROBEREQ_IE_OFFSET_ , in_len - _PROBEREQ_IE_OFFSET_ , wps_ie, wps_ielen); break; } } return wps; } /** * rtw_get_wps_ie - Search WPS IE from a series of IEs * @in_ie: Address of IEs to search * @in_len: Length limit from in_ie * @wps_ie: If not NULL and WPS IE is found, WPS IE will be copied to the buf starting from wps_ie * @wps_ielen: If not NULL and WPS IE is found, will set to the length of the entire WPS IE * * Returns: The address of the WPS IE found, or NULL */ u8 *rtw_get_wps_ie(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen) { uint cnt; u8 *wpsie_ptr=NULL; u8 eid, wps_oui[4]={0x0,0x50,0xf2,0x04}; if(wps_ielen) *wps_ielen = 0; if(!in_ie || in_len<=0) return wpsie_ptr; cnt = 0; while(cntwpa_ie = pos; elems->wpa_ie_len = elen; break; case WME_OUI_TYPE: /* this is a Wi-Fi WME info. element */ if (elen < 5) { DBG_871X("short WME " "information element ignored " "(len=%lu)\n", (unsigned long) elen); return -1; } switch (pos[4]) { case WME_OUI_SUBTYPE_INFORMATION_ELEMENT: case WME_OUI_SUBTYPE_PARAMETER_ELEMENT: elems->wme = pos; elems->wme_len = elen; break; case WME_OUI_SUBTYPE_TSPEC_ELEMENT: elems->wme_tspec = pos; elems->wme_tspec_len = elen; break; default: DBG_871X_LEVEL(_drv_warning_, "unknown WME " "information element ignored " "(subtype=%d len=%lu)\n", pos[4], (unsigned long) elen); return -1; } break; case 4: /* Wi-Fi Protected Setup (WPS) IE */ elems->wps_ie = pos; elems->wps_ie_len = elen; break; default: DBG_871X_LEVEL(_drv_warning_, "Unknown Microsoft " "information element ignored " "(type=%d len=%lu)\n", pos[3], (unsigned long) elen); return -1; } break; case OUI_BROADCOM: switch (pos[3]) { case VENDOR_HT_CAPAB_OUI_TYPE: elems->vendor_ht_cap = pos; elems->vendor_ht_cap_len = elen; break; default: DBG_871X_LEVEL(_drv_warning_, "Unknown Broadcom " "information element ignored " "(type=%d len=%lu)\n", pos[3], (unsigned long) elen); return -1; } break; default: DBG_871X_LEVEL(_drv_warning_, "unknown vendor specific information " "element ignored (vendor OUI %02x:%02x:%02x " "len=%lu)\n", pos[0], pos[1], pos[2], (unsigned long) elen); return -1; } return 0; } /** * ieee802_11_parse_elems - Parse information elements in management frames * @start: Pointer to the start of IEs * @len: Length of IE buffer in octets * @elems: Data structure for parsed elements * @show_errors: Whether to show parsing errors in debug log * Returns: Parsing result */ ParseRes rtw_ieee802_11_parse_elems(u8 *start, uint len, struct rtw_ieee802_11_elems *elems, int show_errors) { uint left = len; u8 *pos = start; int unknown = 0; _rtw_memset(elems, 0, sizeof(*elems)); while (left >= 2) { u8 id, elen; id = *pos++; elen = *pos++; left -= 2; if (elen > left) { if (show_errors) { DBG_871X("IEEE 802.11 element " "parse failed (id=%d elen=%d " "left=%lu)\n", id, elen, (unsigned long) left); } return ParseFailed; } switch (id) { case WLAN_EID_SSID: elems->ssid = pos; elems->ssid_len = elen; break; case WLAN_EID_SUPP_RATES: elems->supp_rates = pos; elems->supp_rates_len = elen; break; case WLAN_EID_FH_PARAMS: elems->fh_params = pos; elems->fh_params_len = elen; break; case WLAN_EID_DS_PARAMS: elems->ds_params = pos; elems->ds_params_len = elen; break; case WLAN_EID_CF_PARAMS: elems->cf_params = pos; elems->cf_params_len = elen; break; case WLAN_EID_TIM: elems->tim = pos; elems->tim_len = elen; break; case WLAN_EID_IBSS_PARAMS: elems->ibss_params = pos; elems->ibss_params_len = elen; break; case WLAN_EID_CHALLENGE: elems->challenge = pos; elems->challenge_len = elen; break; case WLAN_EID_ERP_INFO: elems->erp_info = pos; elems->erp_info_len = elen; break; case WLAN_EID_EXT_SUPP_RATES: elems->ext_supp_rates = pos; elems->ext_supp_rates_len = elen; break; case WLAN_EID_VENDOR_SPECIFIC: if (rtw_ieee802_11_parse_vendor_specific(pos, elen, elems, show_errors)) unknown++; break; case WLAN_EID_RSN: elems->rsn_ie = pos; elems->rsn_ie_len = elen; break; case WLAN_EID_PWR_CAPABILITY: elems->power_cap = pos; elems->power_cap_len = elen; break; case WLAN_EID_SUPPORTED_CHANNELS: elems->supp_channels = pos; elems->supp_channels_len = elen; break; case WLAN_EID_MOBILITY_DOMAIN: elems->mdie = pos; elems->mdie_len = elen; break; case WLAN_EID_FAST_BSS_TRANSITION: elems->ftie = pos; elems->ftie_len = elen; break; case WLAN_EID_TIMEOUT_INTERVAL: elems->timeout_int = pos; elems->timeout_int_len = elen; break; case WLAN_EID_HT_CAP: elems->ht_capabilities = pos; elems->ht_capabilities_len = elen; break; case WLAN_EID_HT_OPERATION: elems->ht_operation = pos; elems->ht_operation_len = elen; break; case WLAN_EID_VHT_CAPABILITY: elems->vht_capabilities = pos; elems->vht_capabilities_len = elen; break; case WLAN_EID_VHT_OPERATION: elems->vht_operation = pos; elems->vht_operation_len = elen; break; case WLAN_EID_VHT_OP_MODE_NOTIFY: elems->vht_op_mode_notify = pos; elems->vht_op_mode_notify_len = elen; break; default: unknown++; if (!show_errors) break; DBG_871X_LEVEL(_drv_warning_, "IEEE 802.11 element parse " "ignored unknown element (id=%d elen=%d)\n", id, elen); break; } left -= elen; pos += elen; } if (left) return ParseFailed; return unknown ? ParseUnknown : ParseOK; } static u8 key_char2num(u8 ch); static u8 key_char2num(u8 ch) { if((ch>='0')&&(ch<='9')) return ch - '0'; else if ((ch>='a')&&(ch<='f')) return ch - 'a' + 10; else if ((ch>='A')&&(ch<='F')) return ch - 'A' + 10; else return 0xff; } u8 str_2char2num(u8 hch, u8 lch); u8 str_2char2num(u8 hch, u8 lch) { return ((key_char2num(hch) * 10 ) + key_char2num(lch)); } u8 key_2char2num(u8 hch, u8 lch); u8 key_2char2num(u8 hch, u8 lch) { return ((key_char2num(hch) << 4) | key_char2num(lch)); } void macstr2num(u8 *dst, u8 *src); void macstr2num(u8 *dst, u8 *src) { int jj, kk; for (jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3) { dst[jj] = key_2char2num(src[kk], src[kk + 1]); } } u8 convert_ip_addr(u8 hch, u8 mch, u8 lch) { return ((key_char2num(hch) * 100) + (key_char2num(mch) * 10 ) + key_char2num(lch)); } extern char* rtw_initmac; void rtw_macaddr_cfg(u8 *mac_addr) { u8 mac[ETH_ALEN]; if(mac_addr == NULL) return; if ( rtw_initmac ) { // Users specify the mac address int jj,kk; for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) { mac[jj] = key_2char2num(rtw_initmac[kk], rtw_initmac[kk+ 1]); } _rtw_memcpy(mac_addr, mac, ETH_ALEN); } else { // Use the mac address stored in the Efuse _rtw_memcpy(mac, mac_addr, ETH_ALEN); } if (((mac[0]==0xff) &&(mac[1]==0xff) && (mac[2]==0xff) && (mac[3]==0xff) && (mac[4]==0xff) &&(mac[5]==0xff)) || ((mac[0]==0x0) && (mac[1]==0x0) && (mac[2]==0x0) && (mac[3]==0x0) && (mac[4]==0x0) &&(mac[5]==0x0))) { mac[0] = 0x00; mac[1] = 0xe0; mac[2] = 0x4c; mac[3] = 0x87; mac[4] = 0x00; mac[5] = 0x00; // use default mac addresss _rtw_memcpy(mac_addr, mac, ETH_ALEN); DBG_871X("MAC Address from efuse error, assign default one !!!\n"); } DBG_871X("rtw_macaddr_cfg MAC Address = "MAC_FMT"\n", MAC_ARG(mac_addr)); } #ifdef CONFIG_80211N_HT void dump_ht_cap_ie_content(void *sel, u8 *buf, u32 buf_len) { if (buf_len != 26) { DBG_871X_SEL_NL(sel, "Invalid HT capability IE len:%d != %d\n", buf_len, 26); return; } DBG_871X_SEL_NL(sel, "HT Capabilities Info:%02x%02x\n", *(buf), *(buf+1)); DBG_871X_SEL_NL(sel, "A-MPDU Parameters:"HT_AMPDU_PARA_FMT"\n" , HT_AMPDU_PARA_ARG(HT_CAP_ELE_AMPDU_PARA(buf))); DBG_871X_SEL_NL(sel, "Supported MCS Set:"HT_SUP_MCS_SET_FMT"\n" , HT_SUP_MCS_SET_ARG(HT_CAP_ELE_SUP_MCS_SET(buf))); } void dump_ht_cap_ie(void *sel, u8 *ie, u32 ie_len) { u8* pos = (u8*)ie; u16 id; u16 len; u8 *ht_cap_ie; sint ht_cap_ielen; ht_cap_ie = rtw_get_ie(ie, _HT_CAPABILITY_IE_, &ht_cap_ielen, ie_len); if(!ie || ht_cap_ie != ie) return; dump_ht_cap_ie_content(sel, ht_cap_ie+2, ht_cap_ielen); } #endif /* CONFIG_80211N_HT */ void dump_ies(void *sel, u8 *buf, u32 buf_len) { u8* pos = (u8*)buf; u8 id, len; while(pos-buf+1ElementID == _VENDOR_SPECIFIC_IE_ && _rtw_memcmp(pIE->data, OUI, 4) ) { len += pIE->Length-4; // 4 is P2P OUI length, don't count it in this loop } i += (pIE->Length + 2); } return len + 4; // Append P2P OUI length at last. } /** * rtw_p2p_merge_ies - Merge muitiple p2p ies into one * @in_ie: Pointer of the first p2p ie * @in_len: Total len of muiltiple p2p ies * @merge_ie: Pointer of merged ie * Returns: Length of merged p2p ie */ int rtw_p2p_merge_ies(u8 *in_ie, u32 in_len, u8 *merge_ie) { PNDIS_802_11_VARIABLE_IEs pIE; u8 len = 0; u8 OUI[4] = { 0x50, 0x6f, 0x9a, 0x09 }; u8 ELOUI[6] = { 0xDD, 0x00, 0x50, 0x6f, 0x9a, 0x09 }; //EID;Len;OUI, Len would copy at the end of function int i=0; if( merge_ie != NULL) { //Set first P2P OUI _rtw_memcpy(merge_ie, ELOUI, 6); merge_ie += 6; while( i < in_len) { pIE = (PNDIS_802_11_VARIABLE_IEs)(in_ie+ i); // Take out the rest of P2P OUIs if( pIE->ElementID == _VENDOR_SPECIFIC_IE_ && _rtw_memcmp(pIE->data, OUI, 4) ) { _rtw_memcpy( merge_ie, pIE->data +4, pIE->Length -4); len += pIE->Length-4; merge_ie += pIE->Length-4; } i += (pIE->Length + 2); } return len + 4; // 4 is for P2P OUI } return 0; } void dump_p2p_ie(void *sel, u8 *ie, u32 ie_len) { u8* pos = (u8*)ie; u8 id; u16 len; u8 *p2p_ie; uint p2p_ielen; p2p_ie = rtw_get_p2p_ie(ie, ie_len, NULL, &p2p_ielen); if(p2p_ie != ie || p2p_ielen == 0) return; pos+=6; while(pos-ie < ie_len){ id = *pos; len = RTW_GET_LE16(pos+1); DBG_871X_SEL_NL(sel, "%s ID:%u, LEN:%u\n", __FUNCTION__, id, len); pos+=(3+len); } } u8 *rtw_get_p2p_ie_from_scan_queue(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen, u8 frame_type) { u8* p2p = NULL; DBG_871X( "[%s] frame_type = %d\n", __FUNCTION__, frame_type ); switch( frame_type ) { case 1: case 3: { // Beacon or Probe Response p2p = rtw_get_p2p_ie(in_ie + _PROBERSP_IE_OFFSET_, in_len - _PROBERSP_IE_OFFSET_, p2p_ie, p2p_ielen); break; } case 2: { // Probe Request p2p = rtw_get_p2p_ie(in_ie + _PROBEREQ_IE_OFFSET_ , in_len - _PROBEREQ_IE_OFFSET_ , p2p_ie, p2p_ielen); break; } } return p2p; } /** * rtw_get_p2p_ie - Search P2P IE from a series of IEs * @in_ie: Address of IEs to search * @in_len: Length limit from in_ie * @p2p_ie: If not NULL and P2P IE is found, P2P IE will be copied to the buf starting from p2p_ie * @p2p_ielen: If not NULL and P2P IE is found, will set to the length of the entire P2P IE * * Returns: The address of the P2P IE found, or NULL */ u8 *rtw_get_p2p_ie(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen) { uint cnt = 0; u8 *p2p_ie_ptr; u8 eid, p2p_oui[4]={0x50,0x6F,0x9A,0x09}; if ( p2p_ielen != NULL ) *p2p_ielen = 0; while(cnt MAX_IE_SZ)) { rtw_dump_stack(); return NULL; } if( ( eid == _VENDOR_SPECIFIC_IE_ ) && ( _rtw_memcmp( &in_ie[cnt+2], p2p_oui, 4) == _TRUE ) ) { p2p_ie_ptr = in_ie + cnt; if ( p2p_ie != NULL ) { _rtw_memcpy( p2p_ie, &in_ie[ cnt ], in_ie[ cnt + 1 ] + 2 ); } if ( p2p_ielen != NULL ) { *p2p_ielen = in_ie[ cnt + 1 ] + 2; } return p2p_ie_ptr; break; } else { cnt += in_ie[ cnt + 1 ] +2; //goto next } } return NULL; } /** * rtw_get_p2p_attr - Search a specific P2P attribute from a given P2P IE * @p2p_ie: Address of P2P IE to search * @p2p_ielen: Length limit from p2p_ie * @target_attr_id: The attribute ID of P2P attribute to search * @buf_attr: If not NULL and the P2P attribute is found, P2P attribute will be copied to the buf starting from buf_attr * @len_attr: If not NULL and the P2P attribute is found, will set to the length of the entire P2P attribute * * Returns: the address of the specific WPS attribute found, or NULL */ u8 *rtw_get_p2p_attr(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id ,u8 *buf_attr, u32 *len_attr) { u8 *attr_ptr = NULL; u8 *target_attr_ptr = NULL; u8 p2p_oui[4]={0x50,0x6F,0x9A,0x09}; if(len_attr) *len_attr = 0; if ( !p2p_ie || ( p2p_ie[0] != _VENDOR_SPECIFIC_IE_ ) || ( _rtw_memcmp( p2p_ie + 2, p2p_oui , 4 ) != _TRUE ) ) { return attr_ptr; } // 6 = 1(Element ID) + 1(Length) + 3 (OUI) + 1(OUI Type) attr_ptr = p2p_ie + 6; //goto first attr while(attr_ptr - p2p_ie < p2p_ielen) { // 3 = 1(Attribute ID) + 2(Length) u8 attr_id = *attr_ptr; u16 attr_data_len = RTW_GET_LE16(attr_ptr + 1); u16 attr_len = attr_data_len + 3; //DBG_871X("%s attr_ptr:%p, id:%u, length:%u\n", __FUNCTION__, attr_ptr, attr_id, attr_data_len); if( attr_id == target_attr_id ) { target_attr_ptr = attr_ptr; if(buf_attr) _rtw_memcpy(buf_attr, attr_ptr, attr_len); if(len_attr) *len_attr = attr_len; break; } else { attr_ptr += attr_len; //goto next } } return target_attr_ptr; } /** * rtw_get_p2p_attr_content - Search a specific P2P attribute content from a given P2P IE * @p2p_ie: Address of P2P IE to search * @p2p_ielen: Length limit from p2p_ie * @target_attr_id: The attribute ID of P2P attribute to search * @buf_content: If not NULL and the P2P attribute is found, P2P attribute content will be copied to the buf starting from buf_content * @len_content: If not NULL and the P2P attribute is found, will set to the length of the P2P attribute content * * Returns: the address of the specific P2P attribute content found, or NULL */ u8 *rtw_get_p2p_attr_content(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id ,u8 *buf_content, uint *len_content) { u8 *attr_ptr; u32 attr_len; if(len_content) *len_content = 0; attr_ptr = rtw_get_p2p_attr(p2p_ie, p2p_ielen, target_attr_id, NULL, &attr_len); if(attr_ptr && attr_len) { if(buf_content) _rtw_memcpy(buf_content, attr_ptr+3, attr_len-3); if(len_content) *len_content = attr_len-3; return attr_ptr+3; } return NULL; } u32 rtw_set_p2p_attr_content(u8 *pbuf, u8 attr_id, u16 attr_len, u8 *pdata_attr) { u32 a_len; *pbuf = attr_id; //*(u16*)(pbuf + 1) = cpu_to_le16(attr_len); RTW_PUT_LE16(pbuf + 1, attr_len); if(pdata_attr) _rtw_memcpy(pbuf + 3, pdata_attr, attr_len); a_len = attr_len + 3; return a_len; } static uint rtw_p2p_attr_remove(u8 *ie, uint ielen_ori, u8 attr_id) { u8 *target_attr; u32 target_attr_len; uint ielen = ielen_ori; int index=0; while(1) { target_attr=rtw_get_p2p_attr(ie, ielen, attr_id, NULL, &target_attr_len); if(target_attr && target_attr_len) { u8 *next_attr = target_attr+target_attr_len; uint remain_len = ielen-(next_attr-ie); //dump_ies(RTW_DBGDUMP, ie, ielen); #if 0 DBG_871X("[%d] ie:%p, ielen:%u\n" "target_attr:%p, target_attr_len:%u\n" "next_attr:%p, remain_len:%u\n" , index++ , ie, ielen , target_attr, target_attr_len , next_attr, remain_len ); #endif _rtw_memset(target_attr, 0, target_attr_len); _rtw_memcpy(target_attr, next_attr, remain_len); _rtw_memset(target_attr+remain_len, 0, target_attr_len); *(ie+1) -= target_attr_len; ielen-=target_attr_len; } else { //if(index>0) // dump_ies(RTW_DBGDUMP, ie, ielen); break; } } return ielen; } void rtw_WLAN_BSSID_EX_remove_p2p_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id) { u8 *p2p_ie; uint p2p_ielen, p2p_ielen_ori; int cnt; if( (p2p_ie=rtw_get_p2p_ie(bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_, NULL, &p2p_ielen_ori)) ) { if (0) if(rtw_get_p2p_attr(p2p_ie, p2p_ielen_ori, attr_id, NULL, NULL)) { DBG_871X("rtw_get_p2p_attr: GOT P2P_ATTR:%u!!!!!!!!\n", attr_id); dump_ies(RTW_DBGDUMP, bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_); } p2p_ielen=rtw_p2p_attr_remove(p2p_ie, p2p_ielen_ori, attr_id); if(p2p_ielen != p2p_ielen_ori) { u8 *next_ie_ori = p2p_ie+p2p_ielen_ori; u8 *next_ie = p2p_ie+p2p_ielen; uint remain_len = bss_ex->IELength-(next_ie_ori-bss_ex->IEs); _rtw_memcpy(next_ie, next_ie_ori, remain_len); _rtw_memset(next_ie+remain_len, 0, p2p_ielen_ori-p2p_ielen); bss_ex->IELength -= p2p_ielen_ori-p2p_ielen; if (0) { DBG_871X("remove P2P_ATTR:%u!\n", attr_id); dump_ies(RTW_DBGDUMP, bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_); } } } } #endif //CONFIG_P2P #ifdef CONFIG_WFD void dump_wfd_ie(void *sel, u8 *ie, u32 ie_len) { u8* pos = (u8*)ie; u8 id; u16 len; u8 *wfd_ie; uint wfd_ielen; if(rtw_get_wfd_ie(ie, ie_len, NULL, &wfd_ielen) == _FALSE) return; pos+=6; while(pos-ie < ie_len){ id = *pos; len = RTW_GET_BE16(pos+1); DBG_871X_SEL_NL(sel, "%s ID:%u, LEN:%u\n", __FUNCTION__, id, len); pos+=(3+len); } } int rtw_get_wfd_ie(u8 *in_ie, int in_len, u8 *wfd_ie, uint *wfd_ielen) { int match; uint cnt = 0; u8 eid, wfd_oui[4]={0x50,0x6F,0x9A,0x0A}; match=_FALSE; if ( in_len < 0 ) { return match; } while(cnt 1 byte for attribute ID field, 2 bytes for length field if(attr_content) _rtw_memcpy( attr_content, &wfd_ie[ cnt + 3 ], attrlen ); if(attr_contentlen) *attr_contentlen = attrlen; cnt += attrlen + 3; match = _TRUE; break; } else { cnt += attrlen + 3; //goto next } } return match; } #endif // CONFIG_WFD //Baron adds to avoid FreeBSD warning int ieee80211_is_empty_essid(const char *essid, int essid_len) { /* Single white space is for Linksys APs */ if (essid_len == 1 && essid[0] == ' ') return 1; /* Otherwise, if the entire essid is 0, we assume it is hidden */ while (essid_len) { essid_len--; if (essid[essid_len] != '\0') return 0; } return 1; } int ieee80211_get_hdrlen(u16 fc) { int hdrlen = 24; switch (WLAN_FC_GET_TYPE(fc)) { case RTW_IEEE80211_FTYPE_DATA: if (fc & RTW_IEEE80211_STYPE_QOS_DATA) hdrlen += 2; if ((fc & RTW_IEEE80211_FCTL_FROMDS) && (fc & RTW_IEEE80211_FCTL_TODS)) hdrlen += 6; /* Addr4 */ break; case RTW_IEEE80211_FTYPE_CTL: switch (WLAN_FC_GET_STYPE(fc)) { case RTW_IEEE80211_STYPE_CTS: case RTW_IEEE80211_STYPE_ACK: hdrlen = 10; break; default: hdrlen = 16; break; } break; } return hdrlen; } int rtw_get_cipher_info(struct wlan_network *pnetwork) { u32 wpa_ielen; unsigned char *pbuf; int group_cipher = 0, pairwise_cipher = 0, is8021x = 0; int ret = _FAIL; pbuf = rtw_get_wpa_ie(&pnetwork->network.IEs[12], &wpa_ielen, pnetwork->network.IELength-12); if(pbuf && (wpa_ielen>0)) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_get_cipher_info: wpa_ielen: %d", wpa_ielen)); if (_SUCCESS == rtw_parse_wpa_ie(pbuf, wpa_ielen+2, &group_cipher, &pairwise_cipher, &is8021x)) { pnetwork->BcnInfo.pairwise_cipher = pairwise_cipher; pnetwork->BcnInfo.group_cipher = group_cipher; pnetwork->BcnInfo.is_8021x = is8021x; RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("%s: pnetwork->pairwise_cipher: %d, is_8021x is %d", __func__, pnetwork->BcnInfo.pairwise_cipher, pnetwork->BcnInfo.is_8021x)); ret = _SUCCESS; } } else { pbuf = rtw_get_wpa2_ie(&pnetwork->network.IEs[12], &wpa_ielen, pnetwork->network.IELength-12); if(pbuf && (wpa_ielen>0)) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("get RSN IE\n")); if (_SUCCESS == rtw_parse_wpa2_ie(pbuf, wpa_ielen+2, &group_cipher, &pairwise_cipher, &is8021x)) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("get RSN IE OK!!!\n")); pnetwork->BcnInfo.pairwise_cipher = pairwise_cipher; pnetwork->BcnInfo.group_cipher = group_cipher; pnetwork->BcnInfo.is_8021x = is8021x; RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("%s: pnetwork->pairwise_cipher: %d," "pnetwork->group_cipher is %d, is_8021x is %d", __func__, pnetwork->BcnInfo.pairwise_cipher, pnetwork->BcnInfo.group_cipher,pnetwork->BcnInfo.is_8021x)); ret = _SUCCESS; } } } return ret; } void rtw_get_bcn_info(struct wlan_network *pnetwork) { unsigned short cap = 0; u8 bencrypt = 0; //u8 wpa_ie[255],rsn_ie[255]; u16 wpa_len=0,rsn_len=0; struct HT_info_element *pht_info = NULL; struct rtw_ieee80211_ht_cap *pht_cap = NULL; unsigned int len; unsigned char *p; _rtw_memcpy((u8 *)&cap, rtw_get_capability_from_ie(pnetwork->network.IEs), 2); cap = le16_to_cpu(cap); if (cap & WLAN_CAPABILITY_PRIVACY) { bencrypt = 1; pnetwork->network.Privacy = 1; } else { pnetwork->BcnInfo.encryp_protocol = ENCRYP_PROTOCOL_OPENSYS; } rtw_get_sec_ie(pnetwork->network.IEs ,pnetwork->network.IELength,NULL,&rsn_len,NULL,&wpa_len); RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_get_bcn_info: ssid=%s\n",pnetwork->network.Ssid.Ssid)); RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_get_bcn_info: wpa_len=%d rsn_len=%d\n",wpa_len,rsn_len)); RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_get_bcn_info: ssid=%s\n",pnetwork->network.Ssid.Ssid)); RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_get_bcn_info: wpa_len=%d rsn_len=%d\n",wpa_len,rsn_len)); if (rsn_len > 0) { pnetwork->BcnInfo.encryp_protocol = ENCRYP_PROTOCOL_WPA2; } else if (wpa_len > 0) { pnetwork->BcnInfo.encryp_protocol = ENCRYP_PROTOCOL_WPA; } else { if (bencrypt) pnetwork->BcnInfo.encryp_protocol = ENCRYP_PROTOCOL_WEP; } RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_get_bcn_info: pnetwork->encryp_protocol is %x\n", pnetwork->BcnInfo.encryp_protocol)); RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_get_bcn_info: pnetwork->encryp_protocol is %x\n", pnetwork->BcnInfo.encryp_protocol)); rtw_get_cipher_info(pnetwork); /* get bwmode and ch_offset */ /* parsing HT_CAP_IE */ p = rtw_get_ie(pnetwork->network.IEs + _FIXED_IE_LENGTH_, _HT_CAPABILITY_IE_, &len, pnetwork->network.IELength - _FIXED_IE_LENGTH_); if(p && len>0) { pht_cap = (struct rtw_ieee80211_ht_cap *)(p + 2); pnetwork->BcnInfo.ht_cap_info = pht_cap->cap_info; } else { pnetwork->BcnInfo.ht_cap_info = 0; } /* parsing HT_INFO_IE */ p = rtw_get_ie(pnetwork->network.IEs + _FIXED_IE_LENGTH_, _HT_ADD_INFO_IE_, &len, pnetwork->network.IELength - _FIXED_IE_LENGTH_); if(p && len>0) { pht_info = (struct HT_info_element *)(p + 2); pnetwork->BcnInfo.ht_info_infos_0 = pht_info->infos[0]; } else { pnetwork->BcnInfo.ht_info_infos_0 = 0; } } //show MCS rate, unit: 100Kbps u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI, unsigned char * MCS_rate) { u16 max_rate = 0; if(rf_type == RF_1T1R) { if(MCS_rate[0] & BIT(7)) max_rate = (bw_40MHz) ? ((short_GI)?1500:1350):((short_GI)?722:650); else if(MCS_rate[0] & BIT(6)) max_rate = (bw_40MHz) ? ((short_GI)?1350:1215):((short_GI)?650:585); else if(MCS_rate[0] & BIT(5)) max_rate = (bw_40MHz) ? ((short_GI)?1200:1080):((short_GI)?578:520); else if(MCS_rate[0] & BIT(4)) max_rate = (bw_40MHz) ? ((short_GI)?900:810):((short_GI)?433:390); else if(MCS_rate[0] & BIT(3)) max_rate = (bw_40MHz) ? ((short_GI)?600:540):((short_GI)?289:260); else if(MCS_rate[0] & BIT(2)) max_rate = (bw_40MHz) ? ((short_GI)?450:405):((short_GI)?217:195); else if(MCS_rate[0] & BIT(1)) max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130); else if(MCS_rate[0] & BIT(0)) max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65); } else { if(MCS_rate[1]) { if(MCS_rate[1] & BIT(7)) max_rate = (bw_40MHz) ? ((short_GI)?3000:2700):((short_GI)?1444:1300); else if(MCS_rate[1] & BIT(6)) max_rate = (bw_40MHz) ? ((short_GI)?2700:2430):((short_GI)?1300:1170); else if(MCS_rate[1] & BIT(5)) max_rate = (bw_40MHz) ? ((short_GI)?2400:2160):((short_GI)?1156:1040); else if(MCS_rate[1] & BIT(4)) max_rate = (bw_40MHz) ? ((short_GI)?1800:1620):((short_GI)?867:780); else if(MCS_rate[1] & BIT(3)) max_rate = (bw_40MHz) ? ((short_GI)?1200:1080):((short_GI)?578:520); else if(MCS_rate[1] & BIT(2)) max_rate = (bw_40MHz) ? ((short_GI)?900:810):((short_GI)?433:390); else if(MCS_rate[1] & BIT(1)) max_rate = (bw_40MHz) ? ((short_GI)?600:540):((short_GI)?289:260); else if(MCS_rate[1] & BIT(0)) max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130); } else { if(MCS_rate[0] & BIT(7)) max_rate = (bw_40MHz) ? ((short_GI)?1500:1350):((short_GI)?722:650); else if(MCS_rate[0] & BIT(6)) max_rate = (bw_40MHz) ? ((short_GI)?1350:1215):((short_GI)?650:585); else if(MCS_rate[0] & BIT(5)) max_rate = (bw_40MHz) ? ((short_GI)?1200:1080):((short_GI)?578:520); else if(MCS_rate[0] & BIT(4)) max_rate = (bw_40MHz) ? ((short_GI)?900:810):((short_GI)?433:390); else if(MCS_rate[0] & BIT(3)) max_rate = (bw_40MHz) ? ((short_GI)?600:540):((short_GI)?289:260); else if(MCS_rate[0] & BIT(2)) max_rate = (bw_40MHz) ? ((short_GI)?450:405):((short_GI)?217:195); else if(MCS_rate[0] & BIT(1)) max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130); else if(MCS_rate[0] & BIT(0)) max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65); } } return max_rate; } int rtw_action_frame_parse(const u8 *frame, u32 frame_len, u8* category, u8 *action) { const u8 *frame_body = frame + sizeof(struct rtw_ieee80211_hdr_3addr); u16 fc; u8 c; u8 a = ACT_PUBLIC_MAX; fc = le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)frame)->frame_ctl); if ((fc & (RTW_IEEE80211_FCTL_FTYPE|RTW_IEEE80211_FCTL_STYPE)) != (RTW_IEEE80211_FTYPE_MGMT|RTW_IEEE80211_STYPE_ACTION) ) { return _FALSE; } c = frame_body[0]; switch(c) { case RTW_WLAN_CATEGORY_P2P: /* vendor-specific */ break; default: a = frame_body[1]; } if (category) *category = c; if (action) *action = a; return _TRUE; } static const char *_action_public_str[] = { "ACT_PUB_BSSCOEXIST", "ACT_PUB_DSE_ENABLE", "ACT_PUB_DSE_DEENABLE", "ACT_PUB_DSE_REG_LOCATION", "ACT_PUB_EXT_CHL_SWITCH", "ACT_PUB_DSE_MSR_REQ", "ACT_PUB_DSE_MSR_RPRT", "ACT_PUB_MP", "ACT_PUB_DSE_PWR_CONSTRAINT", "ACT_PUB_VENDOR", "ACT_PUB_GAS_INITIAL_REQ", "ACT_PUB_GAS_INITIAL_RSP", "ACT_PUB_GAS_COMEBACK_REQ", "ACT_PUB_GAS_COMEBACK_RSP", "ACT_PUB_TDLS_DISCOVERY_RSP", "ACT_PUB_LOCATION_TRACK", "ACT_PUB_RSVD", }; const char *action_public_str(u8 action) { action = (action >= ACT_PUBLIC_MAX) ? ACT_PUBLIC_MAX : action; return _action_public_str[action]; } rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_io.c000066400000000000000000000336271261122257400201110ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ /* The purpose of rtw_io.c a. provides the API b. provides the protocol engine c. provides the software interface between caller and the hardware interface Compiler Flag Option: 1. CONFIG_SDIO_HCI: a. USE_SYNC_IRP: Only sync operations are provided. b. USE_ASYNC_IRP:Both sync/async operations are provided. 2. CONFIG_USB_HCI: a. USE_ASYNC_IRP: Both sync/async operations are provided. 3. CONFIG_CFIO_HCI: b. USE_SYNC_IRP: Only sync operations are provided. Only sync read/rtw_write_mem operations are provided. jackson@realtek.com.tw */ #define _RTW_IO_C_ #include #if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) #error "Shall be Linux or Windows, but not both!\n" #endif #ifdef CONFIG_SDIO_HCI #define rtw_le16_to_cpu(val) val #define rtw_le32_to_cpu(val) val #define rtw_cpu_to_le16(val) val #define rtw_cpu_to_le32(val) val #else #define rtw_le16_to_cpu(val) le16_to_cpu(val) #define rtw_le32_to_cpu(val) le32_to_cpu(val) #define rtw_cpu_to_le16(val) cpu_to_le16(val) #define rtw_cpu_to_le32(val) cpu_to_le32(val) #endif u8 _rtw_read8(_adapter *adapter, u32 addr) { u8 r_val; //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; struct io_priv *pio_priv = &adapter->iopriv; struct intf_hdl *pintfhdl = &(pio_priv->intf); u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr); _func_enter_; _read8 = pintfhdl->io_ops._read8; r_val = _read8(pintfhdl, addr); _func_exit_; return r_val; } u16 _rtw_read16(_adapter *adapter, u32 addr) { u16 r_val; //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; struct io_priv *pio_priv = &adapter->iopriv; struct intf_hdl *pintfhdl = &(pio_priv->intf); u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr); _func_enter_; _read16 = pintfhdl->io_ops._read16; r_val = _read16(pintfhdl, addr); _func_exit_; return rtw_le16_to_cpu(r_val); } u32 _rtw_read32(_adapter *adapter, u32 addr) { u32 r_val; //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; struct io_priv *pio_priv = &adapter->iopriv; struct intf_hdl *pintfhdl = &(pio_priv->intf); u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr); _func_enter_; _read32 = pintfhdl->io_ops._read32; r_val = _read32(pintfhdl, addr); _func_exit_; return rtw_le32_to_cpu(r_val); } int _rtw_write8(_adapter *adapter, u32 addr, u8 val) { //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; struct io_priv *pio_priv = &adapter->iopriv; struct intf_hdl *pintfhdl = &(pio_priv->intf); int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val); int ret; _func_enter_; _write8 = pintfhdl->io_ops._write8; ret = _write8(pintfhdl, addr, val); _func_exit_; return RTW_STATUS_CODE(ret); } int _rtw_write16(_adapter *adapter, u32 addr, u16 val) { //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; struct io_priv *pio_priv = &adapter->iopriv; struct intf_hdl *pintfhdl = &(pio_priv->intf); int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val); int ret; _func_enter_; _write16 = pintfhdl->io_ops._write16; val = rtw_cpu_to_le16(val); ret = _write16(pintfhdl, addr, val); _func_exit_; return RTW_STATUS_CODE(ret); } int _rtw_write32(_adapter *adapter, u32 addr, u32 val) { //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; struct io_priv *pio_priv = &adapter->iopriv; struct intf_hdl *pintfhdl = &(pio_priv->intf); int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val); int ret; _func_enter_; _write32 = pintfhdl->io_ops._write32; val = rtw_cpu_to_le32(val); ret = _write32(pintfhdl, addr, val); _func_exit_; return RTW_STATUS_CODE(ret); } int _rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *pdata) { //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; struct io_priv *pio_priv = &adapter->iopriv; struct intf_hdl *pintfhdl = (struct intf_hdl*)(&(pio_priv->intf)); int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr,u32 length, u8 *pdata); int ret; _func_enter_; _writeN = pintfhdl->io_ops._writeN; ret = _writeN(pintfhdl, addr,length,pdata); _func_exit_; return RTW_STATUS_CODE(ret); } #ifdef CONFIG_SDIO_HCI u8 _rtw_sd_f0_read8(_adapter *adapter, u32 addr) { u8 r_val = 0x00; struct io_priv *pio_priv = &adapter->iopriv; struct intf_hdl *pintfhdl = &(pio_priv->intf); u8 (*_sd_f0_read8)(struct intf_hdl *pintfhdl, u32 addr); _func_enter_; _sd_f0_read8 = pintfhdl->io_ops._sd_f0_read8; if (_sd_f0_read8) r_val = _sd_f0_read8(pintfhdl, addr); else DBG_871X_LEVEL(_drv_warning_, FUNC_ADPT_FMT" _sd_f0_read8 callback is NULL\n", FUNC_ADPT_ARG(adapter)); _func_exit_; return r_val; } #endif /* CONFIG_SDIO_HCI */ int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val) { //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; struct io_priv *pio_priv = &adapter->iopriv; struct intf_hdl *pintfhdl = &(pio_priv->intf); int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val); int ret; _func_enter_; _write8_async = pintfhdl->io_ops._write8_async; ret = _write8_async(pintfhdl, addr, val); _func_exit_; return RTW_STATUS_CODE(ret); } int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val) { //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; struct io_priv *pio_priv = &adapter->iopriv; struct intf_hdl *pintfhdl = &(pio_priv->intf); int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val); int ret; _func_enter_; _write16_async = pintfhdl->io_ops._write16_async; val = rtw_cpu_to_le16(val); ret = _write16_async(pintfhdl, addr, val); _func_exit_; return RTW_STATUS_CODE(ret); } int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val) { //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; struct io_priv *pio_priv = &adapter->iopriv; struct intf_hdl *pintfhdl = &(pio_priv->intf); int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val); int ret; _func_enter_; _write32_async = pintfhdl->io_ops._write32_async; val = rtw_cpu_to_le32(val); ret = _write32_async(pintfhdl, addr, val); _func_exit_; return RTW_STATUS_CODE(ret); } void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) { void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; struct io_priv *pio_priv = &adapter->iopriv; struct intf_hdl *pintfhdl = &(pio_priv->intf); _func_enter_; if( (adapter->bDriverStopped ==_TRUE) || (adapter->bSurpriseRemoved == _TRUE)) { RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_mem:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved)); return; } _read_mem = pintfhdl->io_ops._read_mem; _read_mem(pintfhdl, addr, cnt, pmem); _func_exit_; } void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) { void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; struct io_priv *pio_priv = &adapter->iopriv; struct intf_hdl *pintfhdl = &(pio_priv->intf); _func_enter_; _write_mem = pintfhdl->io_ops._write_mem; _write_mem(pintfhdl, addr, cnt, pmem); _func_exit_; } void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) { u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; struct io_priv *pio_priv = &adapter->iopriv; struct intf_hdl *pintfhdl = &(pio_priv->intf); _func_enter_; if( (adapter->bDriverStopped ==_TRUE) || (adapter->bSurpriseRemoved == _TRUE)) { RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_port:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved)); return; } _read_port = pintfhdl->io_ops._read_port; _read_port(pintfhdl, addr, cnt, pmem); _func_exit_; } void _rtw_read_port_cancel(_adapter *adapter) { void (*_read_port_cancel)(struct intf_hdl *pintfhdl); struct io_priv *pio_priv = &adapter->iopriv; struct intf_hdl *pintfhdl = &(pio_priv->intf); _read_port_cancel = pintfhdl->io_ops._read_port_cancel; RTW_DISABLE_FUNC(adapter, DF_RX_BIT); if(_read_port_cancel) _read_port_cancel(pintfhdl); } u32 _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) { u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; struct io_priv *pio_priv = &adapter->iopriv; struct intf_hdl *pintfhdl = &(pio_priv->intf); u32 ret = _SUCCESS; _func_enter_; _write_port = pintfhdl->io_ops._write_port; ret = _write_port(pintfhdl, addr, cnt, pmem); _func_exit_; return ret; } u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms) { int ret = _SUCCESS; struct xmit_buf *pxmitbuf = (struct xmit_buf *)pmem; struct submit_ctx sctx; rtw_sctx_init(&sctx, timeout_ms); pxmitbuf->sctx = &sctx; ret = _rtw_write_port(adapter, addr, cnt, pmem); if (ret == _SUCCESS) ret = rtw_sctx_wait(&sctx, __func__); return ret; } void _rtw_write_port_cancel(_adapter *adapter) { void (*_write_port_cancel)(struct intf_hdl *pintfhdl); struct io_priv *pio_priv = &adapter->iopriv; struct intf_hdl *pintfhdl = &(pio_priv->intf); _write_port_cancel = pintfhdl->io_ops._write_port_cancel; RTW_DISABLE_FUNC(adapter, DF_TX_BIT); if(_write_port_cancel) _write_port_cancel(pintfhdl); } int rtw_init_io_priv(_adapter *padapter, void (*set_intf_ops)(_adapter *padapter,struct _io_ops *pops)) { struct io_priv *piopriv = &padapter->iopriv; struct intf_hdl *pintf = &piopriv->intf; if (set_intf_ops == NULL) return _FAIL; piopriv->padapter = padapter; pintf->padapter = padapter; pintf->pintf_dev = adapter_to_dvobj(padapter); set_intf_ops(padapter,&pintf->io_ops); return _SUCCESS; } /* * Increase and check if the continual_io_error of this @param dvobjprive is larger than MAX_CONTINUAL_IO_ERR * @return _TRUE: * @return _FALSE: */ int rtw_inc_and_chk_continual_io_error(struct dvobj_priv *dvobj) { int ret = _FALSE; int value; if( (value=ATOMIC_INC_RETURN(&dvobj->continual_io_error)) > MAX_CONTINUAL_IO_ERR) { DBG_871X("[dvobj:%p][ERROR] continual_io_error:%d > %d\n", dvobj, value, MAX_CONTINUAL_IO_ERR); ret = _TRUE; } else { //DBG_871X("[dvobj:%p] continual_io_error:%d\n", dvobj, value); } return ret; } /* * Set the continual_io_error of this @param dvobjprive to 0 */ void rtw_reset_continual_io_error(struct dvobj_priv *dvobj) { ATOMIC_SET(&dvobj->continual_io_error, 0); } #ifdef DBG_IO u16 read_sniff_ranges[][2] = { //{0x520, 0x523}, }; u16 write_sniff_ranges[][2] = { //{0x520, 0x523}, //{0x4c, 0x4c}, }; int read_sniff_num = sizeof(read_sniff_ranges)/sizeof(u16)/2; int write_sniff_num = sizeof(write_sniff_ranges)/sizeof(u16)/2; bool match_read_sniff_ranges(u16 addr, u16 len) { int i; for (i = 0; i read_sniff_ranges[i][0] && addr <= read_sniff_ranges[i][1]) return _TRUE; } return _FALSE; } bool match_write_sniff_ranges(u16 addr, u16 len) { int i; for (i = 0; i write_sniff_ranges[i][0] && addr <= write_sniff_ranges[i][1]) return _TRUE; } return _FALSE; } u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line) { u8 val = _rtw_read8(adapter, addr); if (match_read_sniff_ranges(addr, 1)) DBG_871X("DBG_IO %s:%d rtw_read8(0x%04x) return 0x%02x\n", caller, line, addr, val); return val; } u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line) { u16 val = _rtw_read16(adapter, addr); if (match_read_sniff_ranges(addr, 2)) DBG_871X("DBG_IO %s:%d rtw_read16(0x%04x) return 0x%04x\n", caller, line, addr, val); return val; } u32 dbg_rtw_read32(_adapter *adapter, u32 addr, const char *caller, const int line) { u32 val = _rtw_read32(adapter, addr); if (match_read_sniff_ranges(addr, 4)) DBG_871X("DBG_IO %s:%d rtw_read32(0x%04x) return 0x%08x\n", caller, line, addr, val); return val; } int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line) { if (match_write_sniff_ranges(addr, 1)) DBG_871X("DBG_IO %s:%d rtw_write8(0x%04x, 0x%02x)\n", caller, line, addr, val); return _rtw_write8(adapter, addr, val); } int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line) { if (match_write_sniff_ranges(addr, 2)) DBG_871X("DBG_IO %s:%d rtw_write16(0x%04x, 0x%04x)\n", caller, line, addr, val); return _rtw_write16(adapter, addr, val); } int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line) { if (match_write_sniff_ranges(addr, 4)) DBG_871X("DBG_IO %s:%d rtw_write32(0x%04x, 0x%08x)\n", caller, line, addr, val); return _rtw_write32(adapter, addr, val); } int dbg_rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *data, const char *caller, const int line) { if (match_write_sniff_ranges(addr, length)) DBG_871X("DBG_IO %s:%d rtw_writeN(0x%04x, %u)\n", caller, line, addr, length); return _rtw_writeN(adapter, addr, length, data); } #endif rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_ioctl_query.c000066400000000000000000000155141261122257400220340ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_IOCTL_QUERY_C_ #include #ifdef PLATFORM_WINDOWS // // Added for WPA2-PSK, by Annie, 2005-09-20. // u8 query_802_11_capability( _adapter* Adapter, u8* pucBuf, u32 * pulOutLen ) { static NDIS_802_11_AUTHENTICATION_ENCRYPTION szAuthEnc[] = { {Ndis802_11AuthModeOpen, Ndis802_11EncryptionDisabled}, {Ndis802_11AuthModeOpen, Ndis802_11Encryption1Enabled}, {Ndis802_11AuthModeShared, Ndis802_11EncryptionDisabled}, {Ndis802_11AuthModeShared, Ndis802_11Encryption1Enabled}, {Ndis802_11AuthModeWPA, Ndis802_11Encryption2Enabled}, {Ndis802_11AuthModeWPA, Ndis802_11Encryption3Enabled}, {Ndis802_11AuthModeWPAPSK, Ndis802_11Encryption2Enabled}, {Ndis802_11AuthModeWPAPSK, Ndis802_11Encryption3Enabled}, {Ndis802_11AuthModeWPANone, Ndis802_11Encryption2Enabled}, {Ndis802_11AuthModeWPANone, Ndis802_11Encryption3Enabled}, {Ndis802_11AuthModeWPA2, Ndis802_11Encryption2Enabled}, {Ndis802_11AuthModeWPA2, Ndis802_11Encryption3Enabled}, {Ndis802_11AuthModeWPA2PSK, Ndis802_11Encryption2Enabled}, {Ndis802_11AuthModeWPA2PSK, Ndis802_11Encryption3Enabled} }; static ULONG ulNumOfPairSupported = sizeof(szAuthEnc)/sizeof(NDIS_802_11_AUTHENTICATION_ENCRYPTION); NDIS_802_11_CAPABILITY * pCap = (NDIS_802_11_CAPABILITY *)pucBuf; u8* pucAuthEncryptionSupported = (u8*) pCap->AuthenticationEncryptionSupported; pCap->Length = sizeof(NDIS_802_11_CAPABILITY); if(ulNumOfPairSupported > 1 ) pCap->Length += (ulNumOfPairSupported-1) * sizeof(NDIS_802_11_AUTHENTICATION_ENCRYPTION); pCap->Version = 2; pCap->NoOfPMKIDs = NUM_PMKID_CACHE; pCap->NoOfAuthEncryptPairsSupported = ulNumOfPairSupported; if( sizeof (szAuthEnc) <= 240 ) // 240 = 256 - 4*4 // SecurityInfo.szCapability: only 256 bytes in size. { _rtw_memcpy( pucAuthEncryptionSupported, (u8*)szAuthEnc, sizeof (szAuthEnc) ); *pulOutLen = pCap->Length; return _TRUE; } else { *pulOutLen = 0; RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("_query_802_11_capability(): szAuthEnc size is too large.\n")); return _FALSE; } } u8 query_802_11_association_information( _adapter *padapter,PNDIS_802_11_ASSOCIATION_INFORMATION pAssocInfo) { struct wlan_network *tgt_network; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct security_priv *psecuritypriv=&(padapter->securitypriv); WLAN_BSSID_EX *psecnetwork=(WLAN_BSSID_EX*)&(psecuritypriv->sec_bss); u8 * pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION); unsigned char i,*auth_ie,*supp_ie; //NdisZeroMemory(pAssocInfo, sizeof(NDIS_802_11_ASSOCIATION_INFORMATION)); _rtw_memset(pAssocInfo, 0, sizeof(NDIS_802_11_ASSOCIATION_INFORMATION)); //pAssocInfo->Length = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION); //------------------------------------------------------ // Association Request related information //------------------------------------------------------ // Req_1. AvailableRequestFixedIEs if(psecnetwork!=NULL){ pAssocInfo->AvailableRequestFixedIEs |= NDIS_802_11_AI_REQFI_CAPABILITIES|NDIS_802_11_AI_REQFI_CURRENTAPADDRESS; pAssocInfo->RequestFixedIEs.Capabilities = (unsigned short)* & psecnetwork->IEs[10]; _rtw_memcpy(pAssocInfo->RequestFixedIEs.CurrentAPAddress, & psecnetwork->MacAddress, 6); pAssocInfo->OffsetRequestIEs = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION); if(check_fwstate( pmlmepriv, _FW_UNDER_LINKING|_FW_LINKED)==_TRUE) { if(psecuritypriv->ndisauthtype>=Ndis802_11AuthModeWPA2) pDest[0] =48; //RSN Information Element else pDest[0] =221; //WPA(SSN) Information Element RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n Adapter->ndisauthtype==Ndis802_11AuthModeWPA)?0xdd:0x30 [%d]",pDest[0])); supp_ie=&psecuritypriv->supplicant_ie[0]; for(i=0;inetwork.IELength=%d\n\n", i,(int)psecnetwork->IELength)); while((iRequestIELength += (2 + supp_ie[1+i]);// (2 + psecnetwork->IEs[1+i]+4); } RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n psecnetwork != NULL,fwstate==_FW_UNDER_LINKING \n")); } //------------------------------------------------------ // Association Response related information //------------------------------------------------------ if(check_fwstate( pmlmepriv, _FW_LINKED)==_TRUE) { tgt_network =&(pmlmepriv->cur_network); if(tgt_network!=NULL){ pAssocInfo->AvailableResponseFixedIEs = NDIS_802_11_AI_RESFI_CAPABILITIES |NDIS_802_11_AI_RESFI_ASSOCIATIONID ; pAssocInfo->ResponseFixedIEs.Capabilities =(unsigned short)* & tgt_network->network.IEs[10]; pAssocInfo->ResponseFixedIEs.StatusCode = 0; pAssocInfo->ResponseFixedIEs.AssociationId =(unsigned short) tgt_network->aid; pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION)+pAssocInfo->RequestIELength; auth_ie=&psecuritypriv->authenticator_ie[0]; for(i=0;i0){ _rtw_memcpy((u8 *)&pDest[0],&auth_ie[1],i); pAssocInfo->ResponseIELength =i; } pAssocInfo->OffsetResponseIEs = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION) + pAssocInfo->RequestIELength; RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n tgt_network != NULL,fwstate==_FW_LINKED \n")); } } RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n exit query_802_11_association_information \n")); _func_exit_; return _TRUE; } #endif rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_ioctl_rtl.c000066400000000000000000000734761261122257400215030ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_IOCTL_RTL_C_ #include #ifdef CONFIG_MP_INCLUDED #include #endif struct oid_obj_priv oid_rtl_seg_01_01[] = { {1, &oid_null_function}, //0x80 {1, &oid_null_function}, //0x81 {1, &oid_null_function}, //0x82 {1, &oid_null_function}, //0x83//OID_RT_SET_SNIFFER_MODE {1, &oid_rt_get_signal_quality_hdl}, //0x84 {1, &oid_rt_get_small_packet_crc_hdl}, //0x85 {1, &oid_rt_get_middle_packet_crc_hdl}, //0x86 {1, &oid_rt_get_large_packet_crc_hdl}, //0x87 {1, &oid_rt_get_tx_retry_hdl}, //0x88 {1, &oid_rt_get_rx_retry_hdl}, //0x89 {1, &oid_rt_pro_set_fw_dig_state_hdl}, //0x8A {1, &oid_rt_pro_set_fw_ra_state_hdl} , //0x8B {1, &oid_null_function}, //0x8C {1, &oid_null_function}, //0x8D {1, &oid_null_function}, //0x8E {1, &oid_null_function}, //0x8F {1, &oid_rt_get_rx_total_packet_hdl}, //0x90 {1, &oid_rt_get_tx_beacon_ok_hdl}, //0x91 {1, &oid_rt_get_tx_beacon_err_hdl}, //0x92 {1, &oid_rt_get_rx_icv_err_hdl}, //0x93 {1, &oid_rt_set_encryption_algorithm_hdl}, //0x94 {1, &oid_null_function}, //0x95 {1, &oid_rt_get_preamble_mode_hdl}, //0x96 {1, &oid_null_function}, //0x97 {1, &oid_rt_get_ap_ip_hdl}, //0x98 {1, &oid_rt_get_channelplan_hdl}, //0x99 {1, &oid_rt_set_preamble_mode_hdl}, //0x9A {1, &oid_rt_set_bcn_intvl_hdl}, //0x9B {1, &oid_null_function}, //0x9C {1, &oid_rt_dedicate_probe_hdl}, //0x9D {1, &oid_null_function}, //0x9E {1, &oid_null_function}, //0x9F {1, &oid_null_function}, //0xA0 {1, &oid_null_function}, //0xA1 {1, &oid_null_function}, //0xA2 {1, &oid_null_function}, //0xA3 {1, &oid_null_function}, //0xA4 {1, &oid_null_function}, //0xA5 {1, &oid_null_function}, //0xA6 {1, &oid_rt_get_total_tx_bytes_hdl}, //0xA7 {1, &oid_rt_get_total_rx_bytes_hdl}, //0xA8 {1, &oid_rt_current_tx_power_level_hdl}, //0xA9 {1, &oid_rt_get_enc_key_mismatch_count_hdl}, //0xAA {1, &oid_rt_get_enc_key_match_count_hdl}, //0xAB {1, &oid_rt_get_channel_hdl}, //0xAC {1, &oid_rt_set_channelplan_hdl}, //0xAD {1, &oid_rt_get_hardware_radio_off_hdl}, //0xAE {1, &oid_null_function}, //0xAF {1, &oid_null_function}, //0xB0 {1, &oid_null_function}, //0xB1 {1, &oid_null_function}, //0xB2 {1, &oid_null_function}, //0xB3 {1, &oid_rt_get_key_mismatch_hdl}, //0xB4 {1, &oid_null_function}, //0xB5 {1, &oid_null_function}, //0xB6 {1, &oid_null_function}, //0xB7 {1, &oid_null_function}, //0xB8 {1, &oid_null_function}, //0xB9 {1, &oid_null_function}, //0xBA {1, &oid_rt_supported_wireless_mode_hdl}, //0xBB {1, &oid_rt_get_channel_list_hdl}, //0xBC {1, &oid_rt_get_scan_in_progress_hdl}, //0xBD {1, &oid_null_function}, //0xBE {1, &oid_null_function}, //0xBF {1, &oid_null_function}, //0xC0 {1, &oid_rt_forced_data_rate_hdl}, //0xC1 {1, &oid_rt_wireless_mode_for_scan_list_hdl}, //0xC2 {1, &oid_rt_get_bss_wireless_mode_hdl}, //0xC3 {1, &oid_rt_scan_with_magic_packet_hdl}, //0xC4 {1, &oid_null_function}, //0xC5 {1, &oid_null_function}, //0xC6 {1, &oid_null_function}, //0xC7 {1, &oid_null_function}, //0xC8 {1, &oid_null_function}, //0xC9 {1, &oid_null_function}, //0xCA {1, &oid_null_function}, //0xCB {1, &oid_null_function}, //0xCC {1, &oid_null_function}, //0xCD {1, &oid_null_function}, //0xCE {1, &oid_null_function}, //0xCF }; struct oid_obj_priv oid_rtl_seg_01_03[] = { {1, &oid_rt_ap_get_associated_station_list_hdl}, //0x00 {1, &oid_null_function}, //0x01 {1, &oid_rt_ap_switch_into_ap_mode_hdl}, //0x02 {1, &oid_null_function}, //0x03 {1, &oid_rt_ap_supported_hdl}, //0x04 {1, &oid_rt_ap_set_passphrase_hdl}, //0x05 }; struct oid_obj_priv oid_rtl_seg_01_11[] = { {1, &oid_null_function}, //0xC0 OID_RT_PRO_RX_FILTER {1, &oid_null_function}, //0xC1 OID_CE_USB_WRITE_REGISTRY {1, &oid_null_function}, //0xC2 OID_CE_USB_READ_REGISTRY {1, &oid_null_function}, //0xC3 OID_RT_PRO_SET_INITIAL_GAIN {1, &oid_null_function}, //0xC4 OID_RT_PRO_SET_BB_RF_STANDBY_MODE {1, &oid_null_function}, //0xC5 OID_RT_PRO_SET_BB_RF_SHUTDOWN_MODE {1, &oid_null_function}, //0xC6 OID_RT_PRO_SET_TX_CHARGE_PUMP {1, &oid_null_function}, //0xC7 OID_RT_PRO_SET_RX_CHARGE_PUMP {1, &oid_rt_pro_rf_write_registry_hdl}, //0xC8 {1, &oid_rt_pro_rf_read_registry_hdl}, //0xC9 {1, &oid_null_function} //0xCA OID_RT_PRO_QUERY_RF_TYPE }; struct oid_obj_priv oid_rtl_seg_03_00[] = { {1, &oid_null_function}, //0x00 {1, &oid_rt_get_connect_state_hdl}, //0x01 {1, &oid_null_function}, //0x02 {1, &oid_null_function}, //0x03 {1, &oid_rt_set_default_key_id_hdl}, //0x04 }; //************** oid_rtl_seg_01_01 section start ************** NDIS_STATUS oid_rt_pro_set_fw_dig_state_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _irqL oldirql; _func_enter_; if(poid_par_priv->type_of_oid != SET_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } _irqlevel_changed_(&oldirql,LOWER); if(poid_par_priv->information_buf_len >= sizeof(struct setdig_parm)) { //DEBUG_ERR(("===> oid_rt_pro_set_fw_dig_state_hdl. type:0x%02x.\n",*((unsigned char*)poid_par_priv->information_buf ))); if(!rtw_setfwdig_cmd(Adapter,*((unsigned char*)poid_par_priv->information_buf ))) { status = NDIS_STATUS_NOT_ACCEPTED; } } else{ status = NDIS_STATUS_NOT_ACCEPTED; } _irqlevel_changed_(&oldirql,RAISE); _func_exit_; #endif return status; } //----------------------------------------------------------------------------- NDIS_STATUS oid_rt_pro_set_fw_ra_state_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _irqL oldirql; _func_enter_; if(poid_par_priv->type_of_oid != SET_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } _irqlevel_changed_(&oldirql,LOWER); if(poid_par_priv->information_buf_len >= sizeof(struct setra_parm)) { //DEBUG_ERR(("===> oid_rt_pro_set_fw_ra_state_hdl. type:0x%02x.\n",*((unsigned char*)poid_par_priv->information_buf ))); if(!rtw_setfwra_cmd(Adapter,*((unsigned char*)poid_par_priv->information_buf ))) { status = NDIS_STATUS_NOT_ACCEPTED; } } else{ status = NDIS_STATUS_NOT_ACCEPTED; } _irqlevel_changed_(&oldirql,RAISE); _func_exit_; #endif return status; } //----------------------------------------------------------------------------- NDIS_STATUS oid_rt_get_signal_quality_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); //DEBUG_ERR(("<**********************oid_rt_get_signal_quality_hdl \n")); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } #if 0 if(pMgntInfo->mAssoc || pMgntInfo->mIbss) { ulInfo = pAdapter->RxStats.SignalQuality; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; } else { ulInfo = 0xffffffff; // It stands for -1 in 4-byte integer. } break; #endif return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_get_small_packet_crc_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } if(poid_par_priv->information_buf_len >= sizeof(ULONG) ) { *(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_smallpacket_crcerr; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; } else { status = NDIS_STATUS_INVALID_LENGTH; } return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_get_middle_packet_crc_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } if(poid_par_priv->information_buf_len >= sizeof(ULONG) ) { *(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_middlepacket_crcerr; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; } else { status = NDIS_STATUS_INVALID_LENGTH; } return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_get_large_packet_crc_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } if(poid_par_priv->information_buf_len >= sizeof(ULONG) ) { *(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_largepacket_crcerr; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; } else { status = NDIS_STATUS_INVALID_LENGTH; } return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_get_tx_retry_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } return status; } NDIS_STATUS oid_rt_get_rx_retry_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_get_rx_total_packet_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } if(poid_par_priv->information_buf_len >= sizeof(ULONG) ) { *(u64 *)poid_par_priv->information_buf = padapter->recvpriv.rx_pkts + padapter->recvpriv.rx_drop; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; } else { status = NDIS_STATUS_INVALID_LENGTH; } return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_get_tx_beacon_ok_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } return status; } NDIS_STATUS oid_rt_get_tx_beacon_err_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_get_rx_icv_err_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } if(poid_par_priv->information_buf_len>= sizeof(u32)) { //_rtw_memcpy(*(uint *)poid_par_priv->information_buf,padapter->recvpriv.rx_icv_err,sizeof(u32)); *(uint *)poid_par_priv->information_buf = padapter->recvpriv.rx_icv_err; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; } else { status = NDIS_STATUS_INVALID_LENGTH ; } return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_set_encryption_algorithm_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != SET_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_get_preamble_mode_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ULONG preamblemode = 0 ; if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } if(poid_par_priv->information_buf_len>= sizeof(ULONG)) { if(padapter->registrypriv.preamble == PREAMBLE_LONG) preamblemode = 0; else if (padapter->registrypriv.preamble == PREAMBLE_AUTO) preamblemode = 1; else if (padapter->registrypriv.preamble == PREAMBLE_SHORT) preamblemode = 2; *(ULONG *)poid_par_priv->information_buf = preamblemode ; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; } else { status = NDIS_STATUS_INVALID_LENGTH ; } return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_get_ap_ip_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } return status; } NDIS_STATUS oid_rt_get_channelplan_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); struct eeprom_priv* peeprompriv = &padapter->eeprompriv; if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; *(u16 *)poid_par_priv->information_buf = peeprompriv->channel_plan ; return status; } NDIS_STATUS oid_rt_set_channelplan_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); struct eeprom_priv* peeprompriv = &padapter->eeprompriv; if(poid_par_priv->type_of_oid != SET_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } peeprompriv->channel_plan = *(u16 *)poid_par_priv->information_buf ; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_set_preamble_mode_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ULONG preamblemode = 0; if(poid_par_priv->type_of_oid != SET_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } if(poid_par_priv->information_buf_len>= sizeof(ULONG)) { preamblemode = *(ULONG *)poid_par_priv->information_buf ; if( preamblemode == 0) padapter->registrypriv.preamble = PREAMBLE_LONG; else if (preamblemode==1 ) padapter->registrypriv.preamble = PREAMBLE_AUTO; else if ( preamblemode==2 ) padapter->registrypriv.preamble = PREAMBLE_SHORT; *(ULONG *)poid_par_priv->information_buf = preamblemode ; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; } else { status = NDIS_STATUS_INVALID_LENGTH ; } return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_set_bcn_intvl_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != SET_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } return status; } NDIS_STATUS oid_rt_dedicate_probe_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_get_total_tx_bytes_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } if(poid_par_priv->information_buf_len>= sizeof(ULONG)) { *(u64 *)poid_par_priv->information_buf = padapter->xmitpriv.tx_bytes; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; } else { status = NDIS_STATUS_INVALID_LENGTH ; } return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_get_total_rx_bytes_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } if(poid_par_priv->information_buf_len>= sizeof(ULONG)) { //_rtw_memcpy(*(uint *)poid_par_priv->information_buf,padapter->recvpriv.rx_icv_err,sizeof(u32)); *(u64 *)poid_par_priv->information_buf = padapter->recvpriv.rx_bytes; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; } else { status = NDIS_STATUS_INVALID_LENGTH ; } return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_current_tx_power_level_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); return status; } NDIS_STATUS oid_rt_get_enc_key_mismatch_count_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } return status; } NDIS_STATUS oid_rt_get_enc_key_match_count_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } return status; } NDIS_STATUS oid_rt_get_channel_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; NDIS_802_11_CONFIGURATION *pnic_Config; ULONG channelnum; _func_enter_; if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } if ( (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) || (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) pnic_Config = &pmlmepriv->cur_network.network.Configuration; else pnic_Config = &padapter->registrypriv.dev_network.Configuration; channelnum = pnic_Config->DSConfig; *(ULONG *)poid_par_priv->information_buf = channelnum; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; _func_exit_; return status; } NDIS_STATUS oid_rt_get_hardware_radio_off_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } return status; } NDIS_STATUS oid_rt_get_key_mismatch_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } return status; } NDIS_STATUS oid_rt_supported_wireless_mode_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ULONG ulInfo = 0 ; //DEBUG_ERR(("<**********************oid_rt_supported_wireless_mode_hdl \n")); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } if(poid_par_priv->information_buf_len >= sizeof(ULONG)){ ulInfo |= 0x0100; //WIRELESS_MODE_B ulInfo |= 0x0200; //WIRELESS_MODE_G ulInfo |= 0x0400; //WIRELESS_MODE_A *(ULONG *) poid_par_priv->information_buf = ulInfo; //DEBUG_ERR(("<===oid_rt_supported_wireless_mode %x\n",ulInfo)); *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; } else{ status = NDIS_STATUS_INVALID_LENGTH; } return status; } NDIS_STATUS oid_rt_get_channel_list_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } return status; } NDIS_STATUS oid_rt_get_scan_in_progress_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } return status; } NDIS_STATUS oid_rt_forced_data_rate_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); return status; } NDIS_STATUS oid_rt_wireless_mode_for_scan_list_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); return status; } NDIS_STATUS oid_rt_get_bss_wireless_mode_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } return status; } NDIS_STATUS oid_rt_scan_with_magic_packet_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); return status; } //************** oid_rtl_seg_01_01 section end ************** //************** oid_rtl_seg_01_03 section start ************** NDIS_STATUS oid_rt_ap_get_associated_station_list_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } return status; } NDIS_STATUS oid_rt_ap_switch_into_ap_mode_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); return status; } NDIS_STATUS oid_rt_ap_supported_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); return status; } NDIS_STATUS oid_rt_ap_set_passphrase_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != SET_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } return status; } //************** oid_rtl_seg_01_03 section end ************** //**************** oid_rtl_seg_01_11 section start **************** NDIS_STATUS oid_rt_pro_rf_write_registry_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _irqL oldirql; _func_enter_; //DEBUG_ERR(("<**********************oid_rt_pro_rf_write_registry_hdl \n")); if(poid_par_priv->type_of_oid != SET_OID) //QUERY_OID { status = NDIS_STATUS_NOT_ACCEPTED; return status; } _irqlevel_changed_(&oldirql,LOWER); if(poid_par_priv->information_buf_len== (sizeof(unsigned long)*3)) { //RegOffsetValue - The offset of RF register to write. //RegDataWidth - The data width of RF register to write. //RegDataValue - The value to write. //RegOffsetValue = *((unsigned long*)InformationBuffer); //RegDataWidth = *((unsigned long*)InformationBuffer+1); //RegDataValue = *((unsigned long*)InformationBuffer+2); if(!rtw_setrfreg_cmd(Adapter, *(unsigned char*)poid_par_priv->information_buf, (unsigned long)(*((unsigned long*)poid_par_priv->information_buf+2)))) { status = NDIS_STATUS_NOT_ACCEPTED; } } else{ status = NDIS_STATUS_INVALID_LENGTH; } _irqlevel_changed_(&oldirql,RAISE); _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_rf_read_registry_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _irqL oldirql; _func_enter_; //DEBUG_ERR(("<**********************oid_rt_pro_rf_read_registry_hdl \n")); if(poid_par_priv->type_of_oid != SET_OID) //QUERY_OID { status = NDIS_STATUS_NOT_ACCEPTED; return status; } _irqlevel_changed_(&oldirql,LOWER); if(poid_par_priv->information_buf_len== (sizeof(unsigned long)*3)) { if(Adapter->mppriv.act_in_progress == _TRUE) { status = NDIS_STATUS_NOT_ACCEPTED; } else { //init workparam Adapter->mppriv.act_in_progress = _TRUE; Adapter->mppriv.workparam.bcompleted= _FALSE; Adapter->mppriv.workparam.act_type = MPT_READ_RF; Adapter->mppriv.workparam.io_offset = *(unsigned long*)poid_par_priv->information_buf; Adapter->mppriv.workparam.io_value = 0xcccccccc; //RegOffsetValue - The offset of RF register to read. //RegDataWidth - The data width of RF register to read. //RegDataValue - The value to read. //RegOffsetValue = *((unsigned long*)InformationBuffer); //RegDataWidth = *((unsigned long*)InformationBuffer+1); //RegDataValue = *((unsigned long*)InformationBuffer+2); if(!rtw_getrfreg_cmd(Adapter, *(unsigned char*)poid_par_priv->information_buf, (unsigned char*)&Adapter->mppriv.workparam.io_value)) { status = NDIS_STATUS_NOT_ACCEPTED; } } } else { status = NDIS_STATUS_INVALID_LENGTH; } _irqlevel_changed_(&oldirql,RAISE); _func_exit_; #endif return status; } //**************** oid_rtl_seg_01_11 section end**************** //************** oid_rtl_seg_03_00 section start ************** enum _CONNECT_STATE_{ CHECKINGSTATUS, ASSOCIATED, ADHOCMODE, NOTASSOCIATED }; NDIS_STATUS oid_rt_get_connect_state_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ULONG ulInfo; if(poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } // nStatus==0 CheckingStatus // nStatus==1 Associated // nStatus==2 AdHocMode // nStatus==3 NotAssociated if(check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) ulInfo = CHECKINGSTATUS; else if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ulInfo = ASSOCIATED; else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)== _TRUE) ulInfo = ADHOCMODE; else ulInfo = NOTASSOCIATED ; *(ULONG *)poid_par_priv->information_buf = ulInfo; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; #if 0 // Rearrange the order to let the UI still shows connection when scan is in progress RT_TRACE(COMP_OID_QUERY, DBG_LOUD, ("===> Query OID_RT_GET_CONNECT_STATE.\n")); if(pMgntInfo->mAssoc) ulInfo = 1; else if(pMgntInfo->mIbss) ulInfo = 2; else if(pMgntInfo->bScanInProgress) ulInfo = 0; else ulInfo = 3; ulInfoLen = sizeof(ULONG); RT_TRACE(COMP_OID_QUERY, DBG_LOUD, ("<=== Query OID_RT_GET_CONNECT_STATE: %d\n", ulInfo)); #endif return status; } NDIS_STATUS oid_rt_set_default_key_id_hdl(struct oid_par_priv* poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); if(poid_par_priv->type_of_oid != SET_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } return status; } //************** oid_rtl_seg_03_00 section end ************** rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_ioctl_set.c000066400000000000000000001302221261122257400214540ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_IOCTL_SET_C_ #include extern void indicate_wx_scan_complete_event(_adapter *padapter); #define IS_MAC_ADDRESS_BROADCAST(addr) \ ( \ ( (addr[0] == 0xff) && (addr[1] == 0xff) && \ (addr[2] == 0xff) && (addr[3] == 0xff) && \ (addr[4] == 0xff) && (addr[5] == 0xff) ) ? _TRUE : _FALSE \ ) u8 rtw_validate_bssid(u8 *bssid) { u8 ret = _TRUE; if (is_zero_mac_addr(bssid) || is_broadcast_mac_addr(bssid) || is_multicast_mac_addr(bssid) ) { ret = _FALSE; } return ret; } u8 rtw_validate_ssid(NDIS_802_11_SSID *ssid) { u8 i; u8 ret=_TRUE; _func_enter_; if (ssid->SsidLength > 32) { RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("ssid length >32\n")); ret= _FALSE; goto exit; } #ifdef CONFIG_VALIDATE_SSID for(i = 0; i < ssid->SsidLength; i++) { //wifi, printable ascii code must be supported if(!( (ssid->Ssid[i] >= 0x20) && (ssid->Ssid[i] <= 0x7e) )){ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("ssid has nonprintabl ascii\n")); ret= _FALSE; break; } } #endif /* CONFIG_VALIDATE_SSID */ exit: _func_exit_; return ret; } u8 rtw_do_join(_adapter * padapter); u8 rtw_do_join(_adapter * padapter) { _irqL irqL; _list *plist, *phead; u8* pibss = NULL; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); _queue *queue = &(pmlmepriv->scanned_queue); u8 ret=_SUCCESS; _func_enter_; _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); phead = get_list_head(queue); plist = get_next(phead); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("\n rtw_do_join: phead = %p; plist = %p \n\n\n", phead, plist)); pmlmepriv->cur_network.join_res = -2; set_fwstate(pmlmepriv, _FW_UNDER_LINKING); pmlmepriv->pscanned = plist; pmlmepriv->to_join = _TRUE; if(_rtw_queue_empty(queue)== _TRUE) { _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); //when set_ssid/set_bssid for rtw_do_join(), but scanning queue is empty //we try to issue sitesurvey firstly if (pmlmepriv->LinkDetectInfo.bBusyTraffic ==_FALSE || rtw_to_roam(padapter) > 0 ) { RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_do_join(): site survey if scanned_queue is empty\n.")); // submit site_survey_cmd if(_SUCCESS!=(ret=rtw_sitesurvey_cmd(padapter, &pmlmepriv->assoc_ssid, 1, NULL, 0)) ) { pmlmepriv->to_join = _FALSE; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_do_join(): site survey return error\n.")); } } else { pmlmepriv->to_join = _FALSE; ret = _FAIL; } goto exit; } else { int select_ret; _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); if((select_ret=rtw_select_and_join_from_scanned_queue(pmlmepriv))==_SUCCESS) { pmlmepriv->to_join = _FALSE; _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT); } else { if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)==_TRUE) { // submit createbss_cmd to change to a ADHOC_MASTER //pmlmepriv->lock has been acquired by caller... WLAN_BSSID_EX *pdev_network = &(padapter->registrypriv.dev_network); pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE; pibss = padapter->registrypriv.dev_network.MacAddress; _rtw_memset(&pdev_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); _rtw_memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID)); rtw_update_registrypriv_dev_network(padapter); rtw_generate_random_ibss(pibss); if(rtw_createbss_cmd(padapter)!=_SUCCESS) { RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("***Error=>do_goin: rtw_createbss_cmd status FAIL*** \n ")); ret = _FALSE; goto exit; } pmlmepriv->to_join = _FALSE; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("***Error=> rtw_select_and_join_from_scanned_queue FAIL under STA_Mode*** \n ")); } else { // can't associate ; reset under-linking _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); #if 0 if((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)) { if(_rtw_memcmp(pmlmepriv->cur_network.network.Ssid.Ssid, pmlmepriv->assoc_ssid.Ssid, pmlmepriv->assoc_ssid.SsidLength)) { // for funk to do roaming // funk will reconnect, but funk will not sitesurvey before reconnect RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("for funk to do roaming")); if(pmlmepriv->sitesurveyctrl.traffic_busy==_FALSE) rtw_sitesurvey_cmd(padapter, &pmlmepriv->assoc_ssid, 1, NULL, 0); } } #endif //when set_ssid/set_bssid for rtw_do_join(), but there are no desired bss in scanning queue //we try to issue sitesurvey firstly if(pmlmepriv->LinkDetectInfo.bBusyTraffic==_FALSE || rtw_to_roam(padapter) > 0 ) { //DBG_871X("rtw_do_join() when no desired bss in scanning queue \n"); if( _SUCCESS!=(ret=rtw_sitesurvey_cmd(padapter, &pmlmepriv->assoc_ssid, 1, NULL, 0)) ){ pmlmepriv->to_join = _FALSE; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("do_join(): site survey return error\n.")); } } else { ret = _FAIL; pmlmepriv->to_join = _FALSE; } } } } exit: _func_exit_; return ret; } #ifdef PLATFORM_WINDOWS u8 rtw_pnp_set_power_wakeup(_adapter* padapter) { u8 res=_SUCCESS; _func_enter_; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("==>rtw_pnp_set_power_wakeup!!!\n")); res = rtw_setstandby_cmd(padapter, 0); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("<==rtw_pnp_set_power_wakeup!!!\n")); _func_exit_; return res; } u8 rtw_pnp_set_power_sleep(_adapter* padapter) { u8 res=_SUCCESS; _func_enter_; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("==>rtw_pnp_set_power_sleep!!!\n")); //DbgPrint("+rtw_pnp_set_power_sleep\n"); res = rtw_setstandby_cmd(padapter, 1); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("<==rtw_pnp_set_power_sleep!!!\n")); _func_exit_; return res; } u8 rtw_set_802_11_reload_defaults(_adapter * padapter, NDIS_802_11_RELOAD_DEFAULTS reloadDefaults) { _func_enter_; switch( reloadDefaults) { case Ndis802_11ReloadWEPKeys: RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("SetInfo OID_802_11_RELOAD_DEFAULTS : Ndis802_11ReloadWEPKeys\n")); break; } // SecClearAllKeys(Adapter); // 8711 CAM was not for En/Decrypt only // so, we can't clear all keys. // should we disable WPAcfg (ox0088) bit 1-2, instead of clear all CAM //TO DO... _func_exit_; return _TRUE; } u8 set_802_11_test(_adapter* padapter, NDIS_802_11_TEST *test) { u8 ret=_TRUE; _func_enter_; switch(test->Type) { case 1: NdisMIndicateStatus(padapter->hndis_adapter, NDIS_STATUS_MEDIA_SPECIFIC_INDICATION, (PVOID)&test->AuthenticationEvent, test->Length - 8); NdisMIndicateStatusComplete(padapter->hndis_adapter); break; case 2: NdisMIndicateStatus(padapter->hndis_adapter, NDIS_STATUS_MEDIA_SPECIFIC_INDICATION, (PVOID)&test->RssiTrigger, sizeof(NDIS_802_11_RSSI)); NdisMIndicateStatusComplete(padapter->hndis_adapter); break; default: ret=_FALSE; break; } _func_exit_; return ret; } u8 rtw_set_802_11_pmkid(_adapter* padapter, NDIS_802_11_PMKID *pmkid) { u8 ret=_SUCCESS; return ret; } #endif u8 rtw_set_802_11_bssid(_adapter* padapter, u8 *bssid) { _irqL irqL; u8 status=_SUCCESS; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _func_enter_; DBG_871X_LEVEL(_drv_always_, "set bssid:%pM\n", bssid); if ((bssid[0]==0x00 && bssid[1]==0x00 && bssid[2]==0x00 && bssid[3]==0x00 && bssid[4]==0x00 &&bssid[5]==0x00) || (bssid[0]==0xFF && bssid[1]==0xFF && bssid[2]==0xFF && bssid[3]==0xFF && bssid[4]==0xFF &&bssid[5]==0xFF)) { status = _FAIL; goto exit; } _enter_critical_bh(&pmlmepriv->lock, &irqL); DBG_871X("Set BSSID under fw_state=0x%08x\n", get_fwstate(pmlmepriv)); if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { goto handle_tkip_countermeasure; } else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { goto release_mlme_lock; } if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE) == _TRUE) { RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("set_bssid: _FW_LINKED||WIFI_ADHOC_MASTER_STATE\n")); if (_rtw_memcmp(&pmlmepriv->cur_network.network.MacAddress, bssid, ETH_ALEN) == _TRUE) { if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _FALSE) goto release_mlme_lock;//it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again. } else { RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("Set BSSID not the same bssid\n")); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("set_bssid="MAC_FMT"\n", MAC_ARG(bssid) )); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("cur_bssid="MAC_FMT"\n", MAC_ARG(pmlmepriv->cur_network.network.MacAddress) )); rtw_disassoc_cmd(padapter, 0, _TRUE); if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) rtw_indicate_disconnect(padapter); rtw_free_assoc_resources(padapter, 1); if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); } } } handle_tkip_countermeasure: if (rtw_handle_tkip_countermeasure(padapter, __func__) == _FAIL) { status = _FAIL; goto release_mlme_lock; } _rtw_memset(&pmlmepriv->assoc_ssid, 0, sizeof(NDIS_802_11_SSID)); _rtw_memcpy(&pmlmepriv->assoc_bssid, bssid, ETH_ALEN); pmlmepriv->assoc_by_bssid=_TRUE; if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { pmlmepriv->to_join = _TRUE; } else { status = rtw_do_join(padapter); } release_mlme_lock: _exit_critical_bh(&pmlmepriv->lock, &irqL); exit: RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("rtw_set_802_11_bssid: status=%d\n", status)); _func_exit_; return status; } u8 rtw_set_802_11_ssid(_adapter* padapter, NDIS_802_11_SSID *ssid) { _irqL irqL; u8 status = _SUCCESS; u32 cur_time = 0; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wlan_network *pnetwork = &pmlmepriv->cur_network; _func_enter_; DBG_871X_LEVEL(_drv_always_, "set ssid [%s] fw_state=0x%08x\n", ssid->Ssid, get_fwstate(pmlmepriv)); if(padapter->hw_init_completed==_FALSE){ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("set_ssid: hw_init_completed==_FALSE=>exit!!!\n")); status = _FAIL; goto exit; } _enter_critical_bh(&pmlmepriv->lock, &irqL); DBG_871X("Set SSID under fw_state=0x%08x\n", get_fwstate(pmlmepriv)); if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { goto handle_tkip_countermeasure; } else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { goto release_mlme_lock; } if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE) == _TRUE) { RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("set_ssid: _FW_LINKED||WIFI_ADHOC_MASTER_STATE\n")); if ((pmlmepriv->assoc_ssid.SsidLength == ssid->SsidLength) && (_rtw_memcmp(&pmlmepriv->assoc_ssid.Ssid, ssid->Ssid, ssid->SsidLength) == _TRUE)) { if((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _FALSE)) { RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("Set SSID is the same ssid, fw_state=0x%08x\n", get_fwstate(pmlmepriv))); if(rtw_is_same_ibss(padapter, pnetwork) == _FALSE) { //if in WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE, create bss or rejoin again rtw_disassoc_cmd(padapter, 0, _TRUE); if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) rtw_indicate_disconnect(padapter); rtw_free_assoc_resources(padapter, 1); if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) { _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); } } else { goto release_mlme_lock;//it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again. } } #ifdef CONFIG_LPS else { rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_JOINBSS, 1); } #endif } else { RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("Set SSID not the same ssid\n")); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("set_ssid=[%s] len=0x%x\n", ssid->Ssid, (unsigned int)ssid->SsidLength)); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("assoc_ssid=[%s] len=0x%x\n", pmlmepriv->assoc_ssid.Ssid, (unsigned int)pmlmepriv->assoc_ssid.SsidLength)); rtw_disassoc_cmd(padapter, 0, _TRUE); if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) rtw_indicate_disconnect(padapter); rtw_free_assoc_resources(padapter, 1); if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) { _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); } } } handle_tkip_countermeasure: if (rtw_handle_tkip_countermeasure(padapter, __func__) == _FAIL) { status = _FAIL; goto release_mlme_lock; } if (rtw_validate_ssid(ssid) == _FALSE) { status = _FAIL; goto release_mlme_lock; } _rtw_memcpy(&pmlmepriv->assoc_ssid, ssid, sizeof(NDIS_802_11_SSID)); pmlmepriv->assoc_by_bssid=_FALSE; if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { pmlmepriv->to_join = _TRUE; } else { status = rtw_do_join(padapter); } release_mlme_lock: _exit_critical_bh(&pmlmepriv->lock, &irqL); exit: RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("-rtw_set_802_11_ssid: status=%d\n", status)); _func_exit_; return status; } u8 rtw_set_802_11_connect(_adapter* padapter, u8 *bssid, NDIS_802_11_SSID *ssid) { _irqL irqL; u8 status = _SUCCESS; u32 cur_time = 0; bool bssid_valid = _TRUE; bool ssid_valid = _TRUE; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _func_enter_; if (!ssid || rtw_validate_ssid(ssid) == _FALSE) ssid_valid = _FALSE; if (!bssid || rtw_validate_bssid(bssid) == _FALSE) bssid_valid = _FALSE; if (ssid_valid == _FALSE && bssid_valid == _FALSE) { DBG_871X(FUNC_ADPT_FMT" ssid:%p, ssid_valid:%d, bssid:%p, bssid_valid:%d\n", FUNC_ADPT_ARG(padapter), ssid, ssid_valid, bssid, bssid_valid); status = _FAIL; goto exit; } if(padapter->hw_init_completed==_FALSE){ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("set_ssid: hw_init_completed==_FALSE=>exit!!!\n")); status = _FAIL; goto exit; } _enter_critical_bh(&pmlmepriv->lock, &irqL); DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" fw_state=0x%08x\n", FUNC_ADPT_ARG(padapter), get_fwstate(pmlmepriv)); if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { goto handle_tkip_countermeasure; } else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { goto release_mlme_lock; } handle_tkip_countermeasure: if (rtw_handle_tkip_countermeasure(padapter, __func__) == _FAIL) { status = _FAIL; goto release_mlme_lock; } if (ssid && ssid_valid) _rtw_memcpy(&pmlmepriv->assoc_ssid, ssid, sizeof(NDIS_802_11_SSID)); else _rtw_memset(&pmlmepriv->assoc_ssid, 0, sizeof(NDIS_802_11_SSID)); if (bssid && bssid_valid) { _rtw_memcpy(&pmlmepriv->assoc_bssid, bssid, ETH_ALEN); pmlmepriv->assoc_by_bssid = _TRUE; } else { pmlmepriv->assoc_by_bssid = _FALSE; } if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { pmlmepriv->to_join = _TRUE; } else { status = rtw_do_join(padapter); } release_mlme_lock: _exit_critical_bh(&pmlmepriv->lock, &irqL); exit: _func_exit_; return status; } u8 rtw_set_802_11_infrastructure_mode(_adapter* padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype) { _irqL irqL; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wlan_network *cur_network = &pmlmepriv->cur_network; NDIS_802_11_NETWORK_INFRASTRUCTURE* pold_state = &(cur_network->network.InfrastructureMode); _func_enter_; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_notice_, ("+rtw_set_802_11_infrastructure_mode: old=%d new=%d fw_state=0x%08x\n", *pold_state, networktype, get_fwstate(pmlmepriv))); if(*pold_state != networktype) { RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,(" change mode!")); //DBG_871X("change mode, old_mode=%d, new_mode=%d, fw_state=0x%x\n", *pold_state, networktype, get_fwstate(pmlmepriv)); if(*pold_state==Ndis802_11APMode) { //change to other mode from Ndis802_11APMode cur_network->join_res = -1; #ifdef CONFIG_NATIVEAP_MLME stop_ap_mode(padapter); #endif } _enter_critical_bh(&pmlmepriv->lock, &irqL); if((check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ||(*pold_state==Ndis802_11IBSS)) rtw_disassoc_cmd(padapter, 0, _TRUE); if((check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) || (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)== _TRUE) ) rtw_free_assoc_resources(padapter, 1); if((*pold_state == Ndis802_11Infrastructure) ||(*pold_state == Ndis802_11IBSS)) { if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { rtw_indicate_disconnect(padapter); //will clr Linked_state; before this function, we must have chked whether issue dis-assoc_cmd or not } } *pold_state = networktype; _clr_fwstate_(pmlmepriv, ~WIFI_NULL_STATE); switch(networktype) { case Ndis802_11IBSS: set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); break; case Ndis802_11Infrastructure: set_fwstate(pmlmepriv, WIFI_STATION_STATE); break; case Ndis802_11APMode: set_fwstate(pmlmepriv, WIFI_AP_STATE); #ifdef CONFIG_NATIVEAP_MLME start_ap_mode(padapter); //rtw_indicate_connect(padapter); #endif break; case Ndis802_11AutoUnknown: case Ndis802_11InfrastructureMax: break; } //SecClearAllKeys(adapter); //RT_TRACE(COMP_OID_SET, DBG_LOUD, ("set_infrastructure: fw_state:%x after changing mode\n", // get_fwstate(pmlmepriv) )); _exit_critical_bh(&pmlmepriv->lock, &irqL); } _func_exit_; return _TRUE; } u8 rtw_set_802_11_disassociate(_adapter *padapter) { _irqL irqL; struct mlme_priv * pmlmepriv = &padapter->mlmepriv; _func_enter_; _enter_critical_bh(&pmlmepriv->lock, &irqL); if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("MgntActrtw_set_802_11_disassociate: rtw_indicate_disconnect\n")); rtw_disassoc_cmd(padapter, 0, _TRUE); rtw_indicate_disconnect(padapter); //modify for CONFIG_IEEE80211W, none 11w can use it rtw_free_assoc_resources_cmd(padapter); if (_FAIL == rtw_pwr_wakeup(padapter)) DBG_871X("%s(): rtw_pwr_wakeup fail !!!\n",__FUNCTION__); } _exit_critical_bh(&pmlmepriv->lock, &irqL); _func_exit_; return _TRUE; } u8 rtw_set_802_11_bssid_list_scan(_adapter* padapter, NDIS_802_11_SSID *pssid, int ssid_max_num) { _irqL irqL; struct mlme_priv *pmlmepriv= &padapter->mlmepriv; u8 res=_TRUE; _func_enter_; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("+rtw_set_802_11_bssid_list_scan(), fw_state=%x\n", get_fwstate(pmlmepriv))); if (padapter == NULL) { res=_FALSE; goto exit; } if (padapter->hw_init_completed==_FALSE){ res = _FALSE; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n===rtw_set_802_11_bssid_list_scan:hw_init_completed==_FALSE===\n")); goto exit; } if ((check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) || (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE)) { // Scan or linking is in progress, do nothing. RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_bssid_list_scan fail since fw_state = %x\n", get_fwstate(pmlmepriv))); res = _TRUE; if(check_fwstate(pmlmepriv, (_FW_UNDER_SURVEY|_FW_UNDER_LINKING))== _TRUE){ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n###_FW_UNDER_SURVEY|_FW_UNDER_LINKING\n\n")); } else { RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n###pmlmepriv->sitesurveyctrl.traffic_busy==_TRUE\n\n")); } } else { if (rtw_is_scan_deny(padapter)) { DBG_871X(FUNC_ADPT_FMT": scan deny\n", FUNC_ADPT_ARG(padapter)); indicate_wx_scan_complete_event(padapter); return _SUCCESS; } _enter_critical_bh(&pmlmepriv->lock, &irqL); res = rtw_sitesurvey_cmd(padapter, pssid, ssid_max_num, NULL, 0); _exit_critical_bh(&pmlmepriv->lock, &irqL); } exit: _func_exit_; return res; } u8 rtw_set_802_11_authentication_mode(_adapter* padapter, NDIS_802_11_AUTHENTICATION_MODE authmode) { struct security_priv *psecuritypriv = &padapter->securitypriv; int res; u8 ret; _func_enter_; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("set_802_11_auth.mode(): mode=%x\n", authmode)); psecuritypriv->ndisauthtype=authmode; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_authentication_mode:psecuritypriv->ndisauthtype=%d", psecuritypriv->ndisauthtype)); if(psecuritypriv->ndisauthtype>3) psecuritypriv->dot11AuthAlgrthm=dot11AuthAlgrthm_8021X; #ifdef CONFIG_WAPI_SUPPORT if(psecuritypriv->ndisauthtype == 6) psecuritypriv->dot11AuthAlgrthm=dot11AuthAlgrthm_WAPI; #endif res=rtw_set_auth(padapter,psecuritypriv); if(res==_SUCCESS) ret=_TRUE; else ret=_FALSE; _func_exit_; return ret; } u8 rtw_set_802_11_add_wep(_adapter* padapter, NDIS_802_11_WEP *wep){ u8 bdefaultkey; u8 btransmitkey; sint keyid,res; struct security_priv* psecuritypriv=&(padapter->securitypriv); u8 ret=_SUCCESS; _func_enter_; bdefaultkey=(wep->KeyIndex & 0x40000000) > 0 ? _FALSE : _TRUE; //for ??? btransmitkey= (wep->KeyIndex & 0x80000000) > 0 ? _TRUE : _FALSE; //for ??? keyid=wep->KeyIndex & 0x3fffffff; if(keyid>=4) { RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("MgntActrtw_set_802_11_add_wep:keyid>4=>fail\n")); ret=_FALSE; goto exit; } switch(wep->KeyLength) { case 5: psecuritypriv->dot11PrivacyAlgrthm=_WEP40_; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("MgntActrtw_set_802_11_add_wep:wep->KeyLength=5\n")); break; case 13: psecuritypriv->dot11PrivacyAlgrthm=_WEP104_; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("MgntActrtw_set_802_11_add_wep:wep->KeyLength=13\n")); break; default: psecuritypriv->dot11PrivacyAlgrthm=_NO_PRIVACY_; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("MgntActrtw_set_802_11_add_wep:wep->KeyLength!=5 or 13\n")); break; } RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_wep:befor memcpy, wep->KeyLength=0x%x wep->KeyIndex=0x%x keyid =%x\n",wep->KeyLength,wep->KeyIndex,keyid)); _rtw_memcpy(&(psecuritypriv->dot11DefKey[keyid].skey[0]),&(wep->KeyMaterial),wep->KeyLength); psecuritypriv->dot11DefKeylen[keyid]=wep->KeyLength; psecuritypriv->dot11PrivacyKeyIndex=keyid; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_wep:security key material : %x %x %x %x %x %x %x %x %x %x %x %x %x \n", psecuritypriv->dot11DefKey[keyid].skey[0],psecuritypriv->dot11DefKey[keyid].skey[1],psecuritypriv->dot11DefKey[keyid].skey[2], psecuritypriv->dot11DefKey[keyid].skey[3],psecuritypriv->dot11DefKey[keyid].skey[4],psecuritypriv->dot11DefKey[keyid].skey[5], psecuritypriv->dot11DefKey[keyid].skey[6],psecuritypriv->dot11DefKey[keyid].skey[7],psecuritypriv->dot11DefKey[keyid].skey[8], psecuritypriv->dot11DefKey[keyid].skey[9],psecuritypriv->dot11DefKey[keyid].skey[10],psecuritypriv->dot11DefKey[keyid].skey[11], psecuritypriv->dot11DefKey[keyid].skey[12])); res=rtw_set_key(padapter,psecuritypriv, keyid, 1, _TRUE); if(res==_FAIL) ret= _FALSE; exit: _func_exit_; return ret; } u8 rtw_set_802_11_remove_wep(_adapter* padapter, u32 keyindex){ u8 ret=_SUCCESS; _func_enter_; if (keyindex >= 0x80000000 || padapter == NULL){ ret=_FALSE; goto exit; } else { int res; struct security_priv* psecuritypriv=&(padapter->securitypriv); if( keyindex < 4 ){ _rtw_memset(&psecuritypriv->dot11DefKey[keyindex], 0, 16); res=rtw_set_key(padapter,psecuritypriv,keyindex, 0, _TRUE); psecuritypriv->dot11DefKeylen[keyindex]=0; if(res==_FAIL) ret=_FAIL; } else { ret=_FAIL; } } exit: _func_exit_; return ret; } u8 rtw_set_802_11_add_key(_adapter* padapter, NDIS_802_11_KEY *key){ uint encryptionalgo; u8 * pbssid; struct sta_info *stainfo; u8 bgroup = _FALSE; u8 bgrouptkey = _FALSE;//can be remove later u8 ret=_SUCCESS; _func_enter_; if (((key->KeyIndex & 0x80000000) == 0) && ((key->KeyIndex & 0x40000000) > 0)){ // It is invalid to clear bit 31 and set bit 30. If the miniport driver encounters this combination, // it must fail the request and return NDIS_STATUS_INVALID_DATA. RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_key: ((key->KeyIndex & 0x80000000) == 0)[=%d] ",(int)(key->KeyIndex & 0x80000000) == 0)); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_key:((key->KeyIndex & 0x40000000) > 0)[=%d]" , (int)(key->KeyIndex & 0x40000000) > 0)); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_key: key->KeyIndex=%d \n" ,(int)key->KeyIndex)); ret= _FAIL; goto exit; } if(key->KeyIndex & 0x40000000) { // Pairwise key RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: +++++ Pairwise key +++++\n")); pbssid=get_bssid(&padapter->mlmepriv); stainfo=rtw_get_stainfo(&padapter->stapriv, pbssid); if((stainfo!=NULL)&&(padapter->securitypriv.dot11AuthAlgrthm==dot11AuthAlgrthm_8021X)){ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY:( stainfo!=NULL)&&(Adapter->securitypriv.dot11AuthAlgrthm==dot11AuthAlgrthm_8021X)\n")); encryptionalgo=stainfo->dot118021XPrivacy; } else{ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: stainfo==NULL)||(Adapter->securitypriv.dot11AuthAlgrthm!=dot11AuthAlgrthm_8021X)\n")); encryptionalgo=padapter->securitypriv.dot11PrivacyAlgrthm; } RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_add_key: (encryptionalgo ==%d)!\n",encryptionalgo )); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_add_key: (Adapter->securitypriv.dot11PrivacyAlgrthm ==%d)!\n",padapter->securitypriv.dot11PrivacyAlgrthm)); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_add_key: (Adapter->securitypriv.dot11AuthAlgrthm ==%d)!\n",padapter->securitypriv.dot11AuthAlgrthm)); if((stainfo!=NULL)){ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_add_key: (stainfo->dot118021XPrivacy ==%d)!\n", stainfo->dot118021XPrivacy)); } if(key->KeyIndex & 0x000000FF){ // The key index is specified in the lower 8 bits by values of zero to 255. // The key index should be set to zero for a Pairwise key, and the driver should fail with // NDIS_STATUS_INVALID_DATA if the lower 8 bits is not zero RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,(" key->KeyIndex & 0x000000FF.\n")); ret= _FAIL; goto exit; } // check BSSID if (IS_MAC_ADDRESS_BROADCAST(key->BSSID) == _TRUE){ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("MacAddr_isBcst(key->BSSID)\n")); ret= _FALSE; goto exit; } // Check key length for TKIP. //if(encryptionAlgorithm == RT_ENC_TKIP_ENCRYPTION && key->KeyLength != 32) if((encryptionalgo== _TKIP_)&& (key->KeyLength != 32)){ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("TKIP KeyLength:0x%x != 32\n", key->KeyLength)); ret=_FAIL; goto exit; } // Check key length for AES. if((encryptionalgo== _AES_)&& (key->KeyLength != 16)) { // For our supplicant, EAPPkt9x.vxd, cannot differentiate TKIP and AES case. if(key->KeyLength == 32) { key->KeyLength = 16; } else { ret= _FAIL; goto exit; } } // Check key length for WEP. For NDTEST, 2005.01.27, by rcnjko. if( (encryptionalgo== _WEP40_|| encryptionalgo== _WEP104_) && (key->KeyLength != 5 || key->KeyLength != 13)) { RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("WEP KeyLength:0x%x != 5 or 13\n", key->KeyLength)); ret=_FAIL; goto exit; } bgroup = _FALSE; // Check the pairwise key. Added by Annie, 2005-07-06. RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n")); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("[Pairwise Key set]\n")); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n")); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("key index: 0x%8x(0x%8x)\n", key->KeyIndex,(key->KeyIndex&0x3))); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("key Length: %d\n", key->KeyLength)); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n")); } else { // Group key - KeyIndex(BIT30==0) RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: +++++ Group key +++++\n")); // when add wep key through add key and didn't assigned encryption type before if((padapter->securitypriv.ndisauthtype<=3)&&(padapter->securitypriv.dot118021XGrpPrivacy==0)) { RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("keylen=%d( Adapter->securitypriv.dot11PrivacyAlgrthm=%x )padapter->securitypriv.dot118021XGrpPrivacy(%x)\n", key->KeyLength,padapter->securitypriv.dot11PrivacyAlgrthm,padapter->securitypriv.dot118021XGrpPrivacy)); switch(key->KeyLength) { case 5: padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("Adapter->securitypriv.dot11PrivacyAlgrthm= %x key->KeyLength=%u\n", padapter->securitypriv.dot11PrivacyAlgrthm,key->KeyLength)); break; case 13: padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("Adapter->securitypriv.dot11PrivacyAlgrthm= %x key->KeyLength=%u\n", padapter->securitypriv.dot11PrivacyAlgrthm,key->KeyLength)); break; default: padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("Adapter->securitypriv.dot11PrivacyAlgrthm= %x key->KeyLength=%u \n", padapter->securitypriv.dot11PrivacyAlgrthm,key->KeyLength)); break; } encryptionalgo=padapter->securitypriv.dot11PrivacyAlgrthm; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,(" Adapter->securitypriv.dot11PrivacyAlgrthm=%x\n", padapter->securitypriv.dot11PrivacyAlgrthm)); } else { encryptionalgo=padapter->securitypriv.dot118021XGrpPrivacy; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("( Adapter->securitypriv.dot11PrivacyAlgrthm=%x )encryptionalgo(%x)=padapter->securitypriv.dot118021XGrpPrivacy(%x)keylen=%d\n", padapter->securitypriv.dot11PrivacyAlgrthm,encryptionalgo,padapter->securitypriv.dot118021XGrpPrivacy,key->KeyLength)); } if((check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE)==_TRUE) && (IS_MAC_ADDRESS_BROADCAST(key->BSSID) == _FALSE)) { RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,(" IBSS but BSSID is not Broadcast Address.\n")); ret= _FAIL; goto exit; } // Check key length for TKIP if((encryptionalgo== _TKIP_) && (key->KeyLength != 32)) { RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,(" TKIP GTK KeyLength:%u != 32\n", key->KeyLength)); ret= _FAIL; goto exit; } else if(encryptionalgo== _AES_ && (key->KeyLength != 16 && key->KeyLength != 32) ) { // Check key length for AES // For NDTEST, we allow keylen=32 in this case. 2005.01.27, by rcnjko. RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("<=== SetInfo, OID_802_11_ADD_KEY: AES GTK KeyLength:%u != 16 or 32\n", key->KeyLength)); ret= _FAIL; goto exit; } // Change the key length for EAPPkt9x.vxd. Added by Annie, 2005-11-03. if((encryptionalgo== _AES_) && (key->KeyLength == 32) ) { key->KeyLength = 16; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("AES key length changed: %u\n", key->KeyLength) ); } if(key->KeyIndex & 0x8000000) {//error ??? 0x8000_0000 bgrouptkey = _TRUE; } if((check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE)==_TRUE)&&(check_fwstate(&padapter->mlmepriv, _FW_LINKED)==_TRUE)) { bgrouptkey = _TRUE; } bgroup = _TRUE; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n") ); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("[Group Key set]\n") ); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n")) ; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("key index: 0x%8x(0x%8x)\n", key->KeyIndex,(key->KeyIndex&0x3))); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("key Length: %d\n", key->KeyLength)) ; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n")); } // If WEP encryption algorithm, just call rtw_set_802_11_add_wep(). if((padapter->securitypriv.dot11AuthAlgrthm !=dot11AuthAlgrthm_8021X)&&(encryptionalgo== _WEP40_ || encryptionalgo== _WEP104_)) { u8 ret; u32 keyindex; u32 len = FIELD_OFFSET(NDIS_802_11_KEY, KeyMaterial) + key->KeyLength; NDIS_802_11_WEP *wep = &padapter->securitypriv.ndiswep; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: +++++ WEP key +++++\n")); wep->Length = len; keyindex = key->KeyIndex&0x7fffffff; wep->KeyIndex = keyindex ; wep->KeyLength = key->KeyLength; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY:Before memcpy \n")); _rtw_memcpy(wep->KeyMaterial, key->KeyMaterial, key->KeyLength); _rtw_memcpy(&(padapter->securitypriv.dot11DefKey[keyindex].skey[0]), key->KeyMaterial, key->KeyLength); padapter->securitypriv.dot11DefKeylen[keyindex]=key->KeyLength; padapter->securitypriv.dot11PrivacyKeyIndex=keyindex; ret = rtw_set_802_11_add_wep(padapter, wep); goto exit; } if(key->KeyIndex & 0x20000000){ // SetRSC RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: +++++ SetRSC+++++\n")); if(bgroup == _TRUE) { NDIS_802_11_KEY_RSC keysrc=key->KeyRSC & 0x00FFFFFFFFFFFFULL; _rtw_memcpy(&padapter->securitypriv.dot11Grprxpn, &keysrc, 8); } else { NDIS_802_11_KEY_RSC keysrc=key->KeyRSC & 0x00FFFFFFFFFFFFULL; _rtw_memcpy(&padapter->securitypriv.dot11Grptxpn, &keysrc, 8); } } // Indicate this key idx is used for TX // Save the key in KeyMaterial if(bgroup == _TRUE) // Group transmit key { int res; if(bgrouptkey == _TRUE) { padapter->securitypriv.dot118021XGrpKeyid=(u8)key->KeyIndex; } if((key->KeyIndex&0x3) == 0){ ret = _FAIL; goto exit; } _rtw_memset(&padapter->securitypriv.dot118021XGrpKey[(u8)((key->KeyIndex) & 0x03)], 0, 16); _rtw_memset(&padapter->securitypriv.dot118021XGrptxmickey[(u8)((key->KeyIndex) & 0x03)], 0, 16); _rtw_memset(&padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)], 0, 16); if((key->KeyIndex & 0x10000000)) { _rtw_memcpy(&padapter->securitypriv.dot118021XGrptxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 16, 8); _rtw_memcpy(&padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 24, 8); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rx mic :0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n", padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[0],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[1], padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[2],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[3], padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[4],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[5], padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[6],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[7])); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:set Group mic key!!!!!!!!\n")); } else { _rtw_memcpy(&padapter->securitypriv.dot118021XGrptxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 24, 8); _rtw_memcpy(&padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 16, 8); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rx mic :0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n", padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[0],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[1], padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[2],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[3], padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[4],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[5], padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[6],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[7])); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:set Group mic key!!!!!!!!\n")); } //set group key by index _rtw_memcpy(&padapter->securitypriv.dot118021XGrpKey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial, key->KeyLength); key->KeyIndex=key->KeyIndex & 0x03; padapter->securitypriv.binstallGrpkey=_TRUE; padapter->securitypriv.bcheck_grpkey=_FALSE; RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("reset group key")); res=rtw_set_key(padapter,&padapter->securitypriv, key->KeyIndex, 1, _TRUE); if(res==_FAIL) ret= _FAIL; goto exit; } else // Pairwise Key { u8 res; pbssid=get_bssid(&padapter->mlmepriv); stainfo=rtw_get_stainfo(&padapter->stapriv , pbssid ); if(stainfo!=NULL) { _rtw_memset( &stainfo->dot118021x_UncstKey, 0, 16);// clear keybuffer _rtw_memcpy(&stainfo->dot118021x_UncstKey, key->KeyMaterial, 16); if(encryptionalgo== _TKIP_) { padapter->securitypriv.busetkipkey=_FALSE; //_set_timer(&padapter->securitypriv.tkip_timer, 50); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n ==========_set_timer\n")); // if TKIP, save the Receive/Transmit MIC key in KeyMaterial[128-255] if((key->KeyIndex & 0x10000000)){ _rtw_memcpy(&stainfo->dot11tkiptxmickey, key->KeyMaterial + 16, 8); _rtw_memcpy(&stainfo->dot11tkiprxmickey, key->KeyMaterial + 24, 8); } else { _rtw_memcpy(&stainfo->dot11tkiptxmickey, key->KeyMaterial + 24, 8); _rtw_memcpy(&stainfo->dot11tkiprxmickey, key->KeyMaterial + 16, 8); } } else if(encryptionalgo == _AES_) { } //Set key to CAM through H2C command if(bgrouptkey)//never go to here { res=rtw_setstakey_cmd(padapter, stainfo, _FALSE, _TRUE); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rtw_setstakey_cmd(group)\n")); } else{ res=rtw_setstakey_cmd(padapter, stainfo, _TRUE, _TRUE); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rtw_setstakey_cmd(unicast)\n")); } if(res ==_FALSE) ret= _FAIL; } } exit: _func_exit_; return ret; } u8 rtw_set_802_11_remove_key(_adapter* padapter, NDIS_802_11_REMOVE_KEY *key){ uint encryptionalgo; u8 * pbssid; struct sta_info *stainfo; u8 bgroup = (key->KeyIndex & 0x4000000) > 0 ? _FALSE: _TRUE; u8 keyIndex = (u8)key->KeyIndex & 0x03; u8 ret=_SUCCESS; _func_enter_; if ((key->KeyIndex & 0xbffffffc) > 0) { ret=_FAIL; goto exit; } if (bgroup == _TRUE) { encryptionalgo= padapter->securitypriv.dot118021XGrpPrivacy; // clear group key by index //NdisZeroMemory(Adapter->MgntInfo.SecurityInfo.KeyBuf[keyIndex], MAX_WEP_KEY_LEN); //Adapter->MgntInfo.SecurityInfo.KeyLen[keyIndex] = 0; _rtw_memset(&padapter->securitypriv.dot118021XGrpKey[keyIndex], 0, 16); //! \todo Send a H2C Command to Firmware for removing this Key in CAM Entry. } else { pbssid=get_bssid(&padapter->mlmepriv); stainfo=rtw_get_stainfo(&padapter->stapriv , pbssid ); if(stainfo !=NULL){ encryptionalgo=stainfo->dot118021XPrivacy; // clear key by BSSID _rtw_memset(&stainfo->dot118021x_UncstKey, 0, 16); //! \todo Send a H2C Command to Firmware for disable this Key in CAM Entry. } else{ ret= _FAIL; goto exit; } } exit: _func_exit_; return _TRUE; } /* * rtw_get_cur_max_rate - * @adapter: pointer to _adapter structure * * Return 0 or 100Kbps */ u16 rtw_get_cur_max_rate(_adapter *adapter) { int i = 0; u16 rate = 0, max_rate = 0; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; struct sta_info *psta = NULL; u8 short_GI=0; #ifdef CONFIG_80211N_HT u8 rf_type = 0; #endif #ifdef CONFIG_MP_INCLUDED if (adapter->registrypriv.mp_mode == 1) { if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) return 0; } #endif if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) != _TRUE)) return 0; psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv)); if (psta == NULL) return 0; short_GI = query_ra_short_GI(psta); #ifdef CONFIG_80211N_HT if (IsSupportedHT(psta->wireless_mode)) { rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); max_rate = rtw_mcs_rate( rf_type, ((psta->bw_mode == CHANNEL_WIDTH_40)?1:0), short_GI, psta->htpriv.ht_cap.supp_mcs_set ); } #ifdef CONFIG_80211AC_VHT else if (IsSupportedVHT(psta->wireless_mode)) { max_rate = ((rtw_vht_mcs_to_data_rate(psta->bw_mode, short_GI, pmlmepriv->vhtpriv.vht_highest_rate) + 1) >> 1) * 10; } #endif //CONFIG_80211AC_VHT else #endif //CONFIG_80211N_HT { while( (pcur_bss->SupportedRates[i]!=0) && (pcur_bss->SupportedRates[i]!=0xFF)) { rate = pcur_bss->SupportedRates[i]&0x7F; if(rate>max_rate) max_rate = rate; i++; } max_rate = max_rate*10/2; } return max_rate; } /* * rtw_set_scan_mode - * @adapter: pointer to _adapter structure * @scan_mode: * * Return _SUCCESS or _FAIL */ int rtw_set_scan_mode(_adapter *adapter, RT_SCAN_TYPE scan_mode) { if(scan_mode != SCAN_ACTIVE && scan_mode != SCAN_PASSIVE) return _FAIL; adapter->mlmepriv.scan_mode = scan_mode; return _SUCCESS; } /* * rtw_set_channel_plan - * @adapter: pointer to _adapter structure * @channel_plan: * * Return _SUCCESS or _FAIL */ int rtw_set_channel_plan(_adapter *adapter, u8 channel_plan) { struct registry_priv *pregistrypriv = &adapter->registrypriv; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; //handle by cmd_thread to sync with scan operation return rtw_set_chplan_cmd(adapter, channel_plan, 1, 1); } /* * rtw_set_country - * @adapter: pointer to _adapter structure * @country_code: string of country code * * Return _SUCCESS or _FAIL */ int rtw_set_country(_adapter *adapter, const char *country_code) { int channel_plan = RT_CHANNEL_DOMAIN_WORLD_WIDE_5G; DBG_871X("%s country_code:%s\n", __func__, country_code); //TODO: should have a table to match country code and RT_CHANNEL_DOMAIN //TODO: should consider 2-character and 3-character country code if(0 == strcmp(country_code, "US")) channel_plan = RT_CHANNEL_DOMAIN_FCC; else if(0 == strcmp(country_code, "EU")) channel_plan = RT_CHANNEL_DOMAIN_ETSI; else if(0 == strcmp(country_code, "JP")) channel_plan = RT_CHANNEL_DOMAIN_MKK; else if(0 == strcmp(country_code, "CN")) channel_plan = RT_CHANNEL_DOMAIN_CHINA; else if(0 == strcmp(country_code, "IN")) channel_plan = RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN; else DBG_871X("%s unknown country_code:%s\n", __FUNCTION__, country_code); return rtw_set_channel_plan(adapter, channel_plan); } /* * rtw_set_band - * @adapter: pointer to _adapter structure * @band: band to set * * Return _SUCCESS or _FAIL */ int rtw_set_band(_adapter *adapter, enum _BAND band) { if (rtw_band_valid(band)) { DBG_871X(FUNC_ADPT_FMT" band:%d\n", FUNC_ADPT_ARG(adapter), band); adapter->setband = band; return _SUCCESS; } DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" band:%d fail\n", FUNC_ADPT_ARG(adapter), band); return _FAIL; } rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_iol.c000066400000000000000000000253101261122257400202530ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include #ifdef CONFIG_IOL struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter) { struct xmit_frame *xmit_frame; struct xmit_buf *xmitbuf; struct pkt_attrib *pattrib; struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); #if 1 if ((xmit_frame = rtw_alloc_xmitframe(pxmitpriv)) == NULL) { DBG_871X("%s rtw_alloc_xmitframe return null\n", __FUNCTION__); goto exit; } if ((xmitbuf = rtw_alloc_xmitbuf(pxmitpriv)) == NULL) { DBG_871X("%s rtw_alloc_xmitbuf return null\n", __FUNCTION__); rtw_free_xmitframe(pxmitpriv, xmit_frame); xmit_frame=NULL; goto exit; } xmit_frame->frame_tag = MGNT_FRAMETAG; xmit_frame->pxmitbuf = xmitbuf; xmit_frame->buf_addr = xmitbuf->pbuf; xmitbuf->priv_data = xmit_frame; pattrib = &xmit_frame->attrib; update_mgntframe_attrib(adapter, pattrib); pattrib->qsel = QSLT_BEACON;//Beacon pattrib->subtype = WIFI_BEACON; pattrib->pktlen = pattrib->last_txcmdsz = 0; #else if ((xmit_frame = alloc_mgtxmitframe(pxmitpriv)) == NULL) { DBG_871X("%s alloc_mgtxmitframe return null\n", __FUNCTION__); } else { pattrib = &xmit_frame->attrib; update_mgntframe_attrib(adapter, pattrib); pattrib->qsel = QSLT_BEACON; pattrib->pktlen = pattrib->last_txcmdsz = 0; } #endif exit: return xmit_frame; } int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len) { struct pkt_attrib *pattrib = &xmit_frame->attrib; u16 buf_offset; u32 ori_len; buf_offset = TXDESC_OFFSET; ori_len = buf_offset+pattrib->pktlen; //check if the io_buf can accommodate new cmds if(ori_len + cmd_len + 8 > MAX_XMITBUF_SZ) { DBG_871X("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate new cmds\n", __FUNCTION__ , ori_len + cmd_len + 8, MAX_XMITBUF_SZ); return _FAIL; } _rtw_memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, IOL_cmds, cmd_len); pattrib->pktlen += cmd_len; pattrib->last_txcmdsz += cmd_len; //DBG_871X("%s ori:%u + cmd_len:%u = %u\n", __FUNCTION__, ori_len, cmd_len, buf_offset+pattrib->pktlen); return _SUCCESS; } bool rtw_IOL_applied(ADAPTER *adapter) { if(1 == adapter->registrypriv.fw_iol) return _TRUE; #ifdef CONFIG_USB_HCI if((2 == adapter->registrypriv.fw_iol) && (IS_FULL_SPEED_USB(adapter))) return _TRUE; #endif return _FALSE; } int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt) { return rtw_hal_iol_cmd(adapter, xmit_frame, max_wating_ms,bndy_cnt); } #ifdef CONFIG_IOL_NEW_GENERATION int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary) { return _SUCCESS; } int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, u8 mask) { struct ioreg_cfg cmd = {8,IOREG_CMD_WB_REG,0x0, 0x0,0x0}; //RTW_PUT_LE16((u8*)&cmd.address, addr); //RTW_PUT_LE32((u8*)&cmd.value, (u32)value); cmd.address = cpu_to_le16(addr); cmd.data = cpu_to_le32(value); if(mask!=0xFF) { cmd.length = 12; //RTW_PUT_LE32((u8*)&cmd.mask, (u32)mask); cmd.mask = cpu_to_le32(mask); } //DBG_871X("%s addr:0x%04x,value:0x%08x,mask:0x%08x\n", __FUNCTION__, addr,value,mask); return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, cmd.length); } int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, u16 mask) { struct ioreg_cfg cmd = {8,IOREG_CMD_WW_REG,0x0, 0x0,0x0}; //RTW_PUT_LE16((u8*)&cmd.address, addr); //RTW_PUT_LE32((u8*)&cmd.value, (u32)value); cmd.address = cpu_to_le16(addr); cmd.data = cpu_to_le32(value); if(mask!=0xFFFF) { cmd.length = 12; //RTW_PUT_LE32((u8*)&cmd.mask, (u32)mask); cmd.mask = cpu_to_le32(mask); } //DBG_871X("%s addr:0x%04x,value:0x%08x,mask:0x%08x\n", __FUNCTION__, addr,value,mask); return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, cmd.length); } int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, u32 mask) { struct ioreg_cfg cmd = {8,IOREG_CMD_WD_REG,0x0, 0x0,0x0}; //RTW_PUT_LE16((u8*)&cmd.address, addr); //RTW_PUT_LE32((u8*)&cmd.value, (u32)value); cmd.address = cpu_to_le16(addr); cmd.data = cpu_to_le32(value); if(mask!=0xFFFFFFFF) { cmd.length = 12; //RTW_PUT_LE32((u8*)&cmd.mask, (u32)mask); cmd.mask = cpu_to_le32(mask); } //DBG_871X("%s addr:0x%04x,value:0x%08x,mask:0x%08x\n", __FU2NCTION__, addr,value,mask); return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, cmd.length); } int _rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path, u16 addr, u32 value, u32 mask) { struct ioreg_cfg cmd = {8,IOREG_CMD_W_RF,0x0, 0x0,0x0}; //RTW_PUT_LE16((u8*)&cmd.address, addr); //RTW_PUT_LE32((u8*)&cmd.value, (u32)value); cmd.address = (rf_path<<8) |((addr) &0xFF); cmd.data = cpu_to_le32(value); if(mask!=0x000FFFFF) { cmd.length = 12; //RTW_PUT_LE32((u8*)&cmd.mask, (u32)mask); cmd.mask = cpu_to_le32(mask); } //DBG_871X("%s rf_path:0x%02x addr:0x%04x,value:0x%08x,mask:0x%08x\n", __FU2NCTION__,rf_path, addr,value,mask); return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, cmd.length); } int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us) { struct ioreg_cfg cmd = {4,IOREG_CMD_DELAY_US,0x0, 0x0,0x0}; //RTW_PUT_LE16((u8*)&cmd.address, us); cmd.address = cpu_to_le16(us); //DBG_871X("%s %u\n", __FUNCTION__, us); return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 4); } int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms) { struct ioreg_cfg cmd = {4,IOREG_CMD_DELAY_US,0x0, 0x0,0x0}; //RTW_PUT_LE16((u8*)&cmd.address, ms); cmd.address = cpu_to_le16(ms); //DBG_871X("%s %u\n", __FUNCTION__, ms); return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 4); } int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame) { struct ioreg_cfg cmd = {4,IOREG_CMD_END,0xFFFF, 0xFF,0x0}; return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 4); } u8 rtw_IOL_cmd_boundary_handle(struct xmit_frame *pxmit_frame) { u8 is_cmd_bndy = _FALSE; if(((pxmit_frame->attrib.pktlen+32)%256) + 8 >= 256){ rtw_IOL_append_END_cmd(pxmit_frame); pxmit_frame->attrib.pktlen = ((((pxmit_frame->attrib.pktlen+32)/256)+1)*256 ); //printk("==> %s, pktlen(%d)\n",__FUNCTION__,pxmit_frame->attrib.pktlen); pxmit_frame->attrib.last_txcmdsz = pxmit_frame->attrib.pktlen; is_cmd_bndy = _TRUE; } return is_cmd_bndy; } void rtw_IOL_cmd_buf_dump(ADAPTER *Adapter,int buf_len,u8 *pbuf) { int i; int j=1; printk("###### %s ######\n",__FUNCTION__); for(i=0;i< buf_len;i++){ printk("%02x-",*(pbuf+i)); if(j%32 ==0) printk("\n");j++; } printk("\n"); printk("============= ioreg_cmd len = %d =============== \n",buf_len); } #else //CONFIG_IOL_NEW_GENERATION int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary) { IOL_CMD cmd = {0x0, IOL_CMD_LLT, 0x0, 0x0}; RTW_PUT_BE32((u8*)&cmd.value, (u32)page_boundary); return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); } int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value) { IOL_CMD cmd = {0x0, IOL_CMD_WB_REG, 0x0, 0x0}; RTW_PUT_BE16((u8*)&cmd.address, (u16)addr); RTW_PUT_BE32((u8*)&cmd.value, (u32)value); return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); } int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value) { IOL_CMD cmd = {0x0, IOL_CMD_WW_REG, 0x0, 0x0}; RTW_PUT_BE16((u8*)&cmd.address, (u16)addr); RTW_PUT_BE32((u8*)&cmd.value, (u32)value); return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); } int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value) { IOL_CMD cmd = {0x0, IOL_CMD_WD_REG, 0x0, 0x0}; u8* pos = (u8 *)&cmd; RTW_PUT_BE16((u8*)&cmd.address, (u16)addr); RTW_PUT_BE32((u8*)&cmd.value, (u32)value); return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); } #ifdef DBG_IO int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line) { if (match_write_sniff_ranges(addr, 1)) DBG_871X("DBG_IO %s:%d IOL_WB(0x%04x, 0x%02x)\n", caller, line, addr, value); return _rtw_IOL_append_WB_cmd(xmit_frame, addr, value); } int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line) { if (match_write_sniff_ranges(addr, 2)) DBG_871X("DBG_IO %s:%d IOL_WW(0x%04x, 0x%04x)\n", caller, line, addr, value); return _rtw_IOL_append_WW_cmd(xmit_frame, addr, value); } int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line) { if (match_write_sniff_ranges(addr, 4)) DBG_871X("DBG_IO %s:%d IOL_WD(0x%04x, 0x%08x)\n", caller, line, addr, value); return _rtw_IOL_append_WD_cmd(xmit_frame, addr, value); } #endif int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us) { IOL_CMD cmd = {0x0, IOL_CMD_DELAY_US, 0x0, 0x0}; RTW_PUT_BE32((u8*)&cmd.value, (u32)us); //DBG_871X("%s %u\n", __FUNCTION__, us); return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); } int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms) { IOL_CMD cmd = {0x0, IOL_CMD_DELAY_MS, 0x0, 0x0}; RTW_PUT_BE32((u8*)&cmd.value, (u32)ms); //DBG_871X("%s %u\n", __FUNCTION__, ms); return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); } int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame) { IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0}; return rtw_IOL_append_cmds(xmit_frame, (u8*)&end_cmd, 8); } int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms) { struct xmit_frame *xmit_frame; if((xmit_frame=rtw_IOL_accquire_xmit_frame(adapter)) == NULL) return _FAIL; if(rtw_IOL_append_cmds(xmit_frame, IOL_cmds, cmd_num<<3) == _FAIL) return _FAIL; return rtw_IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms,0); } int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms) { IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0}; return rtw_IOL_exec_cmd_array_sync(adapter, (u8*)&end_cmd, 1, max_wating_ms); } #endif //CONFIG_IOL_NEW_GENERATION #endif //CONFIG_IOL rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_mlme.c000066400000000000000000003715361261122257400204400ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_MLME_C_ #include extern void indicate_wx_scan_complete_event(_adapter *padapter); extern u8 rtw_do_join(_adapter * padapter); sint _rtw_init_mlme_priv (_adapter* padapter) { sint i; u8 *pbuf; struct wlan_network *pnetwork; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; sint res = _SUCCESS; _func_enter_; // We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). //_rtw_memset((u8 *)pmlmepriv, 0, sizeof(struct mlme_priv)); pmlmepriv->nic_hdl = (u8 *)padapter; pmlmepriv->pscanned = NULL; pmlmepriv->fw_state = WIFI_STATION_STATE; // Must sync with rtw_wdev_alloc() // wdev->iftype = NL80211_IFTYPE_STATION pmlmepriv->cur_network.network.InfrastructureMode = Ndis802_11AutoUnknown; pmlmepriv->scan_mode=SCAN_ACTIVE;// 1: active, 0: pasive. Maybe someday we should rename this varable to "active_mode" (Jeff) _rtw_spinlock_init(&(pmlmepriv->lock)); _rtw_init_queue(&(pmlmepriv->free_bss_pool)); _rtw_init_queue(&(pmlmepriv->scanned_queue)); set_scanned_network_val(pmlmepriv, 0); _rtw_memset(&pmlmepriv->assoc_ssid,0,sizeof(NDIS_802_11_SSID)); pbuf = rtw_zvmalloc(MAX_BSS_CNT * (sizeof(struct wlan_network))); if (pbuf == NULL){ res=_FAIL; goto exit; } pmlmepriv->free_bss_buf = pbuf; pnetwork = (struct wlan_network *)pbuf; for(i = 0; i < MAX_BSS_CNT; i++) { _rtw_init_listhead(&(pnetwork->list)); rtw_list_insert_tail(&(pnetwork->list), &(pmlmepriv->free_bss_pool.queue)); pnetwork++; } //allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf rtw_clear_scan_deny(padapter); #ifdef CONFIG_LAYER2_ROAMING #define RTW_ROAM_SCAN_RESULT_EXP_MS 5*1000 #define RTW_ROAM_RSSI_DIFF_TH 10 #define RTW_ROAM_SCAN_INTERVAL_MS 10*1000 pmlmepriv->roam_flags = 0 | RTW_ROAM_ON_EXPIRED #ifdef CONFIG_LAYER2_ROAMING_RESUME | RTW_ROAM_ON_RESUME #endif #ifdef CONFIG_LAYER2_ROAMING_ACTIVE | RTW_ROAM_ACTIVE #endif ; pmlmepriv->roam_scanr_exp_ms = RTW_ROAM_SCAN_RESULT_EXP_MS; pmlmepriv->roam_rssi_diff_th = RTW_ROAM_RSSI_DIFF_TH; pmlmepriv->roam_scan_int_ms = RTW_ROAM_SCAN_INTERVAL_MS; #endif /* CONFIG_LAYER2_ROAMING */ rtw_init_mlme_timer(padapter); exit: _func_exit_; return res; } void rtw_mfree_mlme_priv_lock (struct mlme_priv *pmlmepriv); void rtw_mfree_mlme_priv_lock (struct mlme_priv *pmlmepriv) { _rtw_spinlock_free(&pmlmepriv->lock); _rtw_spinlock_free(&(pmlmepriv->free_bss_pool.lock)); _rtw_spinlock_free(&(pmlmepriv->scanned_queue.lock)); } static void rtw_free_mlme_ie_data(u8 **ppie, u32 *plen) { if(*ppie) { rtw_mfree(*ppie, *plen); *plen = 0; *ppie=NULL; } } void rtw_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv) { #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) rtw_buf_free(&pmlmepriv->assoc_req, &pmlmepriv->assoc_req_len); rtw_buf_free(&pmlmepriv->assoc_rsp, &pmlmepriv->assoc_rsp_len); rtw_free_mlme_ie_data(&pmlmepriv->wps_beacon_ie, &pmlmepriv->wps_beacon_ie_len); rtw_free_mlme_ie_data(&pmlmepriv->wps_probe_req_ie, &pmlmepriv->wps_probe_req_ie_len); rtw_free_mlme_ie_data(&pmlmepriv->wps_probe_resp_ie, &pmlmepriv->wps_probe_resp_ie_len); rtw_free_mlme_ie_data(&pmlmepriv->wps_assoc_resp_ie, &pmlmepriv->wps_assoc_resp_ie_len); rtw_free_mlme_ie_data(&pmlmepriv->p2p_beacon_ie, &pmlmepriv->p2p_beacon_ie_len); rtw_free_mlme_ie_data(&pmlmepriv->p2p_probe_req_ie, &pmlmepriv->p2p_probe_req_ie_len); rtw_free_mlme_ie_data(&pmlmepriv->p2p_probe_resp_ie, &pmlmepriv->p2p_probe_resp_ie_len); rtw_free_mlme_ie_data(&pmlmepriv->p2p_go_probe_resp_ie, &pmlmepriv->p2p_go_probe_resp_ie_len); rtw_free_mlme_ie_data(&pmlmepriv->p2p_assoc_req_ie, &pmlmepriv->p2p_assoc_req_ie_len); #endif #if defined(CONFIG_WFD) && defined(CONFIG_IOCTL_CFG80211) rtw_free_mlme_ie_data(&pmlmepriv->wfd_beacon_ie, &pmlmepriv->wfd_beacon_ie_len); rtw_free_mlme_ie_data(&pmlmepriv->wfd_probe_req_ie, &pmlmepriv->wfd_probe_req_ie_len); rtw_free_mlme_ie_data(&pmlmepriv->wfd_probe_resp_ie, &pmlmepriv->wfd_probe_resp_ie_len); rtw_free_mlme_ie_data(&pmlmepriv->wfd_go_probe_resp_ie, &pmlmepriv->wfd_go_probe_resp_ie_len); rtw_free_mlme_ie_data(&pmlmepriv->wfd_assoc_req_ie, &pmlmepriv->wfd_assoc_req_ie_len); #endif } void _rtw_free_mlme_priv (struct mlme_priv *pmlmepriv) { _func_enter_; if (NULL == pmlmepriv){ rtw_warn_on(1); goto exit; } rtw_free_mlme_priv_ie_data(pmlmepriv); if(pmlmepriv){ rtw_mfree_mlme_priv_lock (pmlmepriv); if (pmlmepriv->free_bss_buf) { rtw_vmfree(pmlmepriv->free_bss_buf, MAX_BSS_CNT * sizeof(struct wlan_network)); } } exit: _func_exit_; } sint _rtw_enqueue_network(_queue *queue, struct wlan_network *pnetwork) { _irqL irqL; _func_enter_; if (pnetwork == NULL) goto exit; _enter_critical_bh(&queue->lock, &irqL); rtw_list_insert_tail(&pnetwork->list, &queue->queue); _exit_critical_bh(&queue->lock, &irqL); exit: _func_exit_; return _SUCCESS; } /* struct wlan_network *_rtw_dequeue_network(_queue *queue) { _irqL irqL; struct wlan_network *pnetwork; _func_enter_; _enter_critical_bh(&queue->lock, &irqL); if (_rtw_queue_empty(queue) == _TRUE) pnetwork = NULL; else { pnetwork = LIST_CONTAINOR(get_next(&queue->queue), struct wlan_network, list); rtw_list_delete(&(pnetwork->list)); } _exit_critical_bh(&queue->lock, &irqL); _func_exit_; return pnetwork; } */ struct wlan_network *_rtw_alloc_network(struct mlme_priv *pmlmepriv )//(_queue *free_queue) { _irqL irqL; struct wlan_network *pnetwork; _queue *free_queue = &pmlmepriv->free_bss_pool; _list* plist = NULL; _func_enter_; _enter_critical_bh(&free_queue->lock, &irqL); if (_rtw_queue_empty(free_queue) == _TRUE) { pnetwork=NULL; goto exit; } plist = get_next(&(free_queue->queue)); pnetwork = LIST_CONTAINOR(plist , struct wlan_network, list); rtw_list_delete(&pnetwork->list); RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("_rtw_alloc_network: ptr=%p\n", plist)); pnetwork->network_type = 0; pnetwork->fixed = _FALSE; pnetwork->last_scanned = rtw_get_current_time(); pnetwork->aid=0; pnetwork->join_res=0; pmlmepriv->num_of_scanned ++; exit: _exit_critical_bh(&free_queue->lock, &irqL); _func_exit_; return pnetwork; } void _rtw_free_network(struct mlme_priv *pmlmepriv ,struct wlan_network *pnetwork, u8 isfreeall) { u32 delta_time; u32 lifetime = SCANQUEUE_LIFETIME; _irqL irqL; _queue *free_queue = &(pmlmepriv->free_bss_pool); _func_enter_; if (pnetwork == NULL) goto exit; if (pnetwork->fixed == _TRUE) goto exit; if ( (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)==_TRUE ) || (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)==_TRUE ) ) lifetime = 1; if(!isfreeall) { delta_time = (u32) rtw_get_passing_time_ms(pnetwork->last_scanned); if(delta_time < lifetime)// unit:msec goto exit; } _enter_critical_bh(&free_queue->lock, &irqL); rtw_list_delete(&(pnetwork->list)); rtw_list_insert_tail(&(pnetwork->list),&(free_queue->queue)); pmlmepriv->num_of_scanned --; //DBG_871X("_rtw_free_network:SSID=%s\n", pnetwork->network.Ssid.Ssid); _exit_critical_bh(&free_queue->lock, &irqL); exit: _func_exit_; } void _rtw_free_network_nolock(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork) { _queue *free_queue = &(pmlmepriv->free_bss_pool); _func_enter_; if (pnetwork == NULL) goto exit; if (pnetwork->fixed == _TRUE) goto exit; //_enter_critical(&free_queue->lock, &irqL); rtw_list_delete(&(pnetwork->list)); rtw_list_insert_tail(&(pnetwork->list), get_list_head(free_queue)); pmlmepriv->num_of_scanned --; //_exit_critical(&free_queue->lock, &irqL); exit: _func_exit_; } /* return the wlan_network with the matching addr Shall be calle under atomic context... to avoid possible racing condition... */ struct wlan_network *_rtw_find_network(_queue *scanned_queue, u8 *addr) { //_irqL irqL; _list *phead, *plist; struct wlan_network *pnetwork = NULL; u8 zero_addr[ETH_ALEN] = {0,0,0,0,0,0}; _func_enter_; if(_rtw_memcmp(zero_addr, addr, ETH_ALEN)){ pnetwork=NULL; goto exit; } //_enter_critical_bh(&scanned_queue->lock, &irqL); phead = get_list_head(scanned_queue); plist = get_next(phead); while (plist != phead) { pnetwork = LIST_CONTAINOR(plist, struct wlan_network ,list); if (_rtw_memcmp(addr, pnetwork->network.MacAddress, ETH_ALEN) == _TRUE) break; plist = get_next(plist); } if(plist == phead) pnetwork = NULL; //_exit_critical_bh(&scanned_queue->lock, &irqL); exit: _func_exit_; return pnetwork; } void _rtw_free_network_queue(_adapter *padapter, u8 isfreeall) { _irqL irqL; _list *phead, *plist; struct wlan_network *pnetwork; struct mlme_priv* pmlmepriv = &padapter->mlmepriv; _queue *scanned_queue = &pmlmepriv->scanned_queue; _func_enter_; _enter_critical_bh(&scanned_queue->lock, &irqL); phead = get_list_head(scanned_queue); plist = get_next(phead); while (rtw_end_of_queue_search(phead, plist) == _FALSE) { pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); plist = get_next(plist); _rtw_free_network(pmlmepriv,pnetwork, isfreeall); } _exit_critical_bh(&scanned_queue->lock, &irqL); _func_exit_; } sint rtw_if_up(_adapter *padapter) { sint res; _func_enter_; if( padapter->bDriverStopped || padapter->bSurpriseRemoved || (check_fwstate(&padapter->mlmepriv, _FW_LINKED)== _FALSE)){ RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("rtw_if_up:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); res=_FALSE; } else res= _TRUE; _func_exit_; return res; } void rtw_generate_random_ibss(u8* pibss) { u32 curtime = rtw_get_current_time(); _func_enter_; pibss[0] = 0x02; //in ad-hoc mode bit1 must set to 1 pibss[1] = 0x11; pibss[2] = 0x87; pibss[3] = (u8)(curtime & 0xff) ;//p[0]; pibss[4] = (u8)((curtime>>8) & 0xff) ;//p[1]; pibss[5] = (u8)((curtime>>16) & 0xff) ;//p[2]; _func_exit_; return; } u8 *rtw_get_capability_from_ie(u8 *ie) { return (ie + 8 + 2); } u16 rtw_get_capability(WLAN_BSSID_EX *bss) { u16 val; _func_enter_; _rtw_memcpy((u8 *)&val, rtw_get_capability_from_ie(bss->IEs), 2); _func_exit_; return le16_to_cpu(val); } u8 *rtw_get_timestampe_from_ie(u8 *ie) { return (ie + 0); } u8 *rtw_get_beacon_interval_from_ie(u8 *ie) { return (ie + 8); } int rtw_init_mlme_priv (_adapter *padapter)//(struct mlme_priv *pmlmepriv) { int res; _func_enter_; res = _rtw_init_mlme_priv(padapter);// (pmlmepriv); _func_exit_; return res; } void rtw_free_mlme_priv (struct mlme_priv *pmlmepriv) { _func_enter_; RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_free_mlme_priv\n")); _rtw_free_mlme_priv (pmlmepriv); _func_exit_; } int rtw_enqueue_network(_queue *queue, struct wlan_network *pnetwork); int rtw_enqueue_network(_queue *queue, struct wlan_network *pnetwork) { int res; _func_enter_; res = _rtw_enqueue_network(queue, pnetwork); _func_exit_; return res; } /* static struct wlan_network *rtw_dequeue_network(_queue *queue) { struct wlan_network *pnetwork; _func_enter_; pnetwork = _rtw_dequeue_network(queue); _func_exit_; return pnetwork; } */ struct wlan_network *rtw_alloc_network(struct mlme_priv *pmlmepriv ); struct wlan_network *rtw_alloc_network(struct mlme_priv *pmlmepriv )//(_queue *free_queue) { struct wlan_network *pnetwork; _func_enter_; pnetwork = _rtw_alloc_network(pmlmepriv); _func_exit_; return pnetwork; } void rtw_free_network(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork, u8 is_freeall); void rtw_free_network(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork, u8 is_freeall)//(struct wlan_network *pnetwork, _queue *free_queue) { _func_enter_; RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_free_network==> ssid = %s \n\n" , pnetwork->network.Ssid.Ssid)); _rtw_free_network(pmlmepriv, pnetwork, is_freeall); _func_exit_; } void rtw_free_network_nolock(_adapter * padapter, struct wlan_network *pnetwork ); void rtw_free_network_nolock(_adapter * padapter, struct wlan_network *pnetwork ) { _func_enter_; //RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_free_network==> ssid = %s \n\n" , pnetwork->network.Ssid.Ssid)); _rtw_free_network_nolock(&(padapter->mlmepriv), pnetwork); #ifdef CONFIG_IOCTL_CFG80211 rtw_cfg80211_unlink_bss(padapter, pnetwork); #endif //CONFIG_IOCTL_CFG80211 _func_exit_; } void rtw_free_network_queue(_adapter* dev, u8 isfreeall) { _func_enter_; _rtw_free_network_queue(dev, isfreeall); _func_exit_; } /* return the wlan_network with the matching addr Shall be calle under atomic context... to avoid possible racing condition... */ struct wlan_network *rtw_find_network(_queue *scanned_queue, u8 *addr) { struct wlan_network *pnetwork = _rtw_find_network(scanned_queue, addr); return pnetwork; } int rtw_is_same_ibss(_adapter *adapter, struct wlan_network *pnetwork) { int ret=_TRUE; struct security_priv *psecuritypriv = &adapter->securitypriv; if ( (psecuritypriv->dot11PrivacyAlgrthm != _NO_PRIVACY_ ) && ( pnetwork->network.Privacy == 0 ) ) { ret=_FALSE; } else if((psecuritypriv->dot11PrivacyAlgrthm == _NO_PRIVACY_ ) && ( pnetwork->network.Privacy == 1 ) ) { ret=_FALSE; } else { ret=_TRUE; } return ret; } inline int is_same_ess(WLAN_BSSID_EX *a, WLAN_BSSID_EX *b) { //RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("(%s,%d)(%s,%d)\n", // a->Ssid.Ssid,a->Ssid.SsidLength,b->Ssid.Ssid,b->Ssid.SsidLength)); return (a->Ssid.SsidLength == b->Ssid.SsidLength) && _rtw_memcmp(a->Ssid.Ssid, b->Ssid.Ssid, a->Ssid.SsidLength)==_TRUE; } int is_same_network(WLAN_BSSID_EX *src, WLAN_BSSID_EX *dst, u8 feature) { u16 s_cap, d_cap; _func_enter_; if(rtw_bug_check(dst, src, &s_cap, &d_cap)==_FALSE) return _FALSE; _rtw_memcpy((u8 *)&s_cap, rtw_get_capability_from_ie(src->IEs), 2); _rtw_memcpy((u8 *)&d_cap, rtw_get_capability_from_ie(dst->IEs), 2); s_cap = le16_to_cpu(s_cap); d_cap = le16_to_cpu(d_cap); _func_exit_; #ifdef CONFIG_P2P if ((feature == 1) && // 1: P2P supported (_rtw_memcmp(src->MacAddress, dst->MacAddress, ETH_ALEN) == _TRUE) ) { return _TRUE; } #endif return ((src->Ssid.SsidLength == dst->Ssid.SsidLength) && // (src->Configuration.DSConfig == dst->Configuration.DSConfig) && ( (_rtw_memcmp(src->MacAddress, dst->MacAddress, ETH_ALEN)) == _TRUE) && ( (_rtw_memcmp(src->Ssid.Ssid, dst->Ssid.Ssid, src->Ssid.SsidLength)) == _TRUE) && ((s_cap & WLAN_CAPABILITY_IBSS) == (d_cap & WLAN_CAPABILITY_IBSS)) && ((s_cap & WLAN_CAPABILITY_BSS) == (d_cap & WLAN_CAPABILITY_BSS))); } struct wlan_network *_rtw_find_same_network(_queue *scanned_queue, struct wlan_network *network) { _list *phead, *plist; struct wlan_network *found = NULL; phead = get_list_head(scanned_queue); plist = get_next(phead); while (plist != phead) { found = LIST_CONTAINOR(plist, struct wlan_network ,list); if (is_same_network(&network->network, &found->network,0)) break; plist = get_next(plist); } if(plist == phead) found = NULL; exit: return found; } struct wlan_network *rtw_find_same_network(_queue *scanned_queue, struct wlan_network *network) { _irqL irqL; struct wlan_network *found = NULL; if (scanned_queue == NULL || network == NULL) goto exit; _enter_critical_bh(&scanned_queue->lock, &irqL); found = _rtw_find_same_network(scanned_queue, network); _exit_critical_bh(&scanned_queue->lock, &irqL); exit: return found; } struct wlan_network * rtw_get_oldest_wlan_network(_queue *scanned_queue) { _list *plist, *phead; struct wlan_network *pwlan = NULL; struct wlan_network *oldest = NULL; _func_enter_; phead = get_list_head(scanned_queue); plist = get_next(phead); while(1) { if (rtw_end_of_queue_search(phead,plist)== _TRUE) break; pwlan= LIST_CONTAINOR(plist, struct wlan_network, list); if(pwlan->fixed!=_TRUE) { if (oldest == NULL ||time_after(oldest->last_scanned, pwlan->last_scanned)) oldest = pwlan; } plist = get_next(plist); } _func_exit_; return oldest; } void update_network(WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src, _adapter * padapter, bool update_ie) { u8 ss_ori = dst->PhyInfo.SignalStrength; u8 sq_ori = dst->PhyInfo.SignalQuality; long rssi_ori = dst->Rssi; u8 ss_smp = src->PhyInfo.SignalStrength; u8 sq_smp = src->PhyInfo.SignalQuality; long rssi_smp = src->Rssi; u8 ss_final; u8 sq_final; long rssi_final; _func_enter_; #ifdef CONFIG_ANTENNA_DIVERSITY rtw_hal_antdiv_rssi_compared(padapter, dst, src); //this will update src.Rssi, need consider again #endif #if defined(DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) && 1 if(strcmp(dst->Ssid.Ssid, DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) == 0) { DBG_871X(FUNC_ADPT_FMT" %s("MAC_FMT", ch%u) ss_ori:%3u, sq_ori:%3u, rssi_ori:%3ld, ss_smp:%3u, sq_smp:%3u, rssi_smp:%3ld\n" , FUNC_ADPT_ARG(padapter) , src->Ssid.Ssid, MAC_ARG(src->MacAddress), src->Configuration.DSConfig ,ss_ori, sq_ori, rssi_ori ,ss_smp, sq_smp, rssi_smp ); } #endif /* The rule below is 1/5 for sample value, 4/5 for history value */ if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) && is_same_network(&(padapter->mlmepriv.cur_network.network), src, 0)) { /* Take the recvpriv's value for the connected AP*/ ss_final = padapter->recvpriv.signal_strength; sq_final = padapter->recvpriv.signal_qual; /* the rssi value here is undecorated, and will be used for antenna diversity */ if(sq_smp != 101) /* from the right channel */ rssi_final = (src->Rssi+dst->Rssi*4)/5; else rssi_final = rssi_ori; } else { if(sq_smp != 101) { /* from the right channel */ ss_final = ((u32)(src->PhyInfo.SignalStrength)+(u32)(dst->PhyInfo.SignalStrength)*4)/5; sq_final = ((u32)(src->PhyInfo.SignalQuality)+(u32)(dst->PhyInfo.SignalQuality)*4)/5; rssi_final = (src->Rssi+dst->Rssi*4)/5; } else { /* bss info not receving from the right channel, use the original RX signal infos */ ss_final = dst->PhyInfo.SignalStrength; sq_final = dst->PhyInfo.SignalQuality; rssi_final = dst->Rssi; } } if (update_ie) { dst->Reserved[0] = src->Reserved[0]; dst->Reserved[1] = src->Reserved[1]; _rtw_memcpy((u8 *)dst, (u8 *)src, get_WLAN_BSSID_EX_sz(src)); } dst->PhyInfo.SignalStrength = ss_final; dst->PhyInfo.SignalQuality = sq_final; dst->Rssi = rssi_final; #if defined(DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) && 1 if(strcmp(dst->Ssid.Ssid, DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) == 0) { DBG_871X(FUNC_ADPT_FMT" %s("MAC_FMT"), SignalStrength:%u, SignalQuality:%u, RawRSSI:%ld\n" , FUNC_ADPT_ARG(padapter) , dst->Ssid.Ssid, MAC_ARG(dst->MacAddress), dst->PhyInfo.SignalStrength, dst->PhyInfo.SignalQuality, dst->Rssi); } #endif #if 0 // old codes, may be useful one day... // DBG_871X("update_network: rssi=0x%lx dst->Rssi=%d ,dst->Rssi=0x%lx , src->Rssi=0x%lx",(dst->Rssi+src->Rssi)/2,dst->Rssi,dst->Rssi,src->Rssi); if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) && is_same_network(&(padapter->mlmepriv.cur_network.network), src)) { //DBG_871X("b:ssid=%s update_network: src->rssi=0x%d padapter->recvpriv.ui_rssi=%d\n",src->Ssid.Ssid,src->Rssi,padapter->recvpriv.signal); if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX) { padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX; last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index]; padapter->recvpriv.signal_qual_data.total_val -= last_evm; } padapter->recvpriv.signal_qual_data.total_val += query_rx_pwr_percentage(src->Rssi); padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = query_rx_pwr_percentage(src->Rssi); if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX) padapter->recvpriv.signal_qual_data.index = 0; //DBG_871X("Total SQ=%d pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, src->Rssi); // <1> Showed on UI for user,in percentage. tmpVal = padapter->recvpriv.signal_qual_data.total_val/padapter->recvpriv.signal_qual_data.total_num; padapter->recvpriv.signal=(u8)tmpVal;//Link quality src->Rssi= translate_percentage_to_dbm(padapter->recvpriv.signal) ; } else{ // DBG_871X("ELSE:ssid=%s update_network: src->rssi=0x%d dst->rssi=%d\n",src->Ssid.Ssid,src->Rssi,dst->Rssi); src->Rssi=(src->Rssi +dst->Rssi)/2;//dBM } // DBG_871X("a:update_network: src->rssi=0x%d padapter->recvpriv.ui_rssi=%d\n",src->Rssi,padapter->recvpriv.signal); #endif _func_exit_; } static void update_current_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork) { struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); _func_enter_; rtw_bug_check(&(pmlmepriv->cur_network.network), &(pmlmepriv->cur_network.network), &(pmlmepriv->cur_network.network), &(pmlmepriv->cur_network.network)); if ( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && (is_same_network(&(pmlmepriv->cur_network.network), pnetwork, 0))) { //RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,"Same Network\n"); //if(pmlmepriv->cur_network.network.IELength<= pnetwork->IELength) { update_network(&(pmlmepriv->cur_network.network), pnetwork,adapter, _TRUE); rtw_update_protection(adapter, (pmlmepriv->cur_network.network.IEs) + sizeof (NDIS_802_11_FIXED_IEs), pmlmepriv->cur_network.network.IELength); } } _func_exit_; } /* Caller must hold pmlmepriv->lock first. */ void rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target) { _irqL irqL; _list *plist, *phead; ULONG bssid_ex_sz; struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); struct wifidirect_info *pwdinfo= &(adapter->wdinfo); _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; struct wlan_network *oldest = NULL; int target_find = 0; u8 feature = 0; _func_enter_; _enter_critical_bh(&queue->lock, &irqL); phead = get_list_head(queue); plist = get_next(phead); #ifdef CONFIG_P2P if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) feature = 1; // p2p enable #endif while(1) { if (rtw_end_of_queue_search(phead,plist)== _TRUE) break; pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); rtw_bug_check(pnetwork, pnetwork, pnetwork, pnetwork); #ifdef CONFIG_P2P if (!rtw_p2p_chk_state(&(adapter->wdinfo), P2P_STATE_NONE) && (_rtw_memcmp(pnetwork->network.MacAddress, target->MacAddress, ETH_ALEN) == _TRUE)) { target_find = 1; break; } #endif if (is_same_network(&(pnetwork->network), target, feature)) { target_find = 1; break; } if (rtw_roam_flags(adapter)) { /* TODO: don't select netowrk in the same ess as oldest if it's new enough*/ } if (oldest == NULL || time_after(oldest->last_scanned, pnetwork->last_scanned)) oldest = pnetwork; plist = get_next(plist); } /* If we didn't find a match, then get a new network slot to initialize * with this beacon's information */ //if (rtw_end_of_queue_search(phead,plist)== _TRUE) { if (!target_find) { if (_rtw_queue_empty(&(pmlmepriv->free_bss_pool)) == _TRUE) { /* If there are no more slots, expire the oldest */ //list_del_init(&oldest->list); pnetwork = oldest; if(pnetwork==NULL){ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n\n\nsomething wrong here\n\n\n")); goto exit; } #ifdef CONFIG_ANTENNA_DIVERSITY //target->PhyInfo.Optimum_antenna = pHalData->CurAntenna;//optimum_antenna=>For antenna diversity rtw_hal_get_def_var(adapter, HAL_DEF_CURRENT_ANTENNA, &(target->PhyInfo.Optimum_antenna)); #endif _rtw_memcpy(&(pnetwork->network), target, get_WLAN_BSSID_EX_sz(target)); //pnetwork->last_scanned = rtw_get_current_time(); // variable initialize pnetwork->fixed = _FALSE; pnetwork->last_scanned = rtw_get_current_time(); pnetwork->network_type = 0; pnetwork->aid=0; pnetwork->join_res=0; /* bss info not receving from the right channel */ if (pnetwork->network.PhyInfo.SignalQuality == 101) pnetwork->network.PhyInfo.SignalQuality = 0; } else { /* Otherwise just pull from the free list */ pnetwork = rtw_alloc_network(pmlmepriv); // will update scan_time if(pnetwork==NULL){ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n\n\nsomething wrong here\n\n\n")); goto exit; } bssid_ex_sz = get_WLAN_BSSID_EX_sz(target); target->Length = bssid_ex_sz; #ifdef CONFIG_ANTENNA_DIVERSITY //target->PhyInfo.Optimum_antenna = pHalData->CurAntenna; rtw_hal_get_def_var(adapter, HAL_DEF_CURRENT_ANTENNA, &(target->PhyInfo.Optimum_antenna)); #endif _rtw_memcpy(&(pnetwork->network), target, bssid_ex_sz ); pnetwork->last_scanned = rtw_get_current_time(); /* bss info not receving from the right channel */ if (pnetwork->network.PhyInfo.SignalQuality == 101) pnetwork->network.PhyInfo.SignalQuality = 0; rtw_list_insert_tail(&(pnetwork->list),&(queue->queue)); } } else { /* we have an entry and we are going to update it. But this entry may * be already expired. In this case we do the same as we found a new * net and call the new_net handler */ bool update_ie = _TRUE; pnetwork->last_scanned = rtw_get_current_time(); //target.Reserved[0]==1, means that scaned network is a bcn frame. if((pnetwork->network.IELength>target->IELength) && (target->Reserved[0]==1)) update_ie = _FALSE; // probe resp(3) > beacon(1) > probe req(2) if ((target->Reserved[0] != 2) && (target->Reserved[0] >= pnetwork->network.Reserved[0]) ) { update_ie = _TRUE; } else { update_ie = _FALSE; } update_network(&(pnetwork->network), target,adapter, update_ie); } exit: _exit_critical_bh(&queue->lock, &irqL); _func_exit_; } void rtw_add_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork); void rtw_add_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork) { _irqL irqL; struct mlme_priv *pmlmepriv = &(((_adapter *)adapter)->mlmepriv); //_queue *queue = &(pmlmepriv->scanned_queue); _func_enter_; //_enter_critical_bh(&queue->lock, &irqL); #if defined(CONFIG_P2P) && defined(CONFIG_P2P_REMOVE_GROUP_INFO) rtw_WLAN_BSSID_EX_remove_p2p_attr(pnetwork, P2P_ATTR_GROUP_INFO); #endif update_current_network(adapter, pnetwork); rtw_update_scanned_network(adapter, pnetwork); //_exit_critical_bh(&queue->lock, &irqL); _func_exit_; } //select the desired network based on the capability of the (i)bss. // check items: (1) security // (2) network_type // (3) WMM // (4) HT // (5) others int rtw_is_desired_network(_adapter *adapter, struct wlan_network *pnetwork); int rtw_is_desired_network(_adapter *adapter, struct wlan_network *pnetwork) { struct security_priv *psecuritypriv = &adapter->securitypriv; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; u32 desired_encmode; u32 privacy; //u8 wps_ie[512]; uint wps_ielen; int bselected = _TRUE; desired_encmode = psecuritypriv->ndisencryptstatus; privacy = pnetwork->network.Privacy; if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) { if(rtw_get_wps_ie(pnetwork->network.IEs+_FIXED_IE_LENGTH_, pnetwork->network.IELength-_FIXED_IE_LENGTH_, NULL, &wps_ielen)!=NULL) { return _TRUE; } else { return _FALSE; } } if (adapter->registrypriv.wifi_spec == 1) //for correct flow of 8021X to do.... { u8 *p=NULL; uint ie_len=0; if ((desired_encmode == Ndis802_11EncryptionDisabled) && (privacy != 0)) bselected = _FALSE; if ( psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK) { p = rtw_get_ie(pnetwork->network.IEs + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pnetwork->network.IELength - _BEACON_IE_OFFSET_)); if (p && ie_len>0) { bselected = _TRUE; } else { bselected = _FALSE; } } } if ((desired_encmode != Ndis802_11EncryptionDisabled) && (privacy == 0)) { DBG_871X("desired_encmode: %d, privacy: %d\n", desired_encmode, privacy); bselected = _FALSE; } if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) { if(pnetwork->network.InfrastructureMode != pmlmepriv->cur_network.network.InfrastructureMode) bselected = _FALSE; } return bselected; } /* TODO: Perry : For Power Management */ void rtw_atimdone_event_callback(_adapter *adapter , u8 *pbuf) { _func_enter_; RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("receive atimdone_evet\n")); _func_exit_; return; } void rtw_survey_event_callback(_adapter *adapter, u8 *pbuf) { _irqL irqL; u32 len; WLAN_BSSID_EX *pnetwork; struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); _func_enter_; pnetwork = (WLAN_BSSID_EX *)pbuf; RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_survey_event_callback, ssid=%s\n", pnetwork->Ssid.Ssid)); #ifdef CONFIG_RTL8712 //endian_convert pnetwork->Length = le32_to_cpu(pnetwork->Length); pnetwork->Ssid.SsidLength = le32_to_cpu(pnetwork->Ssid.SsidLength); pnetwork->Privacy =le32_to_cpu( pnetwork->Privacy); pnetwork->Rssi = le32_to_cpu(pnetwork->Rssi); pnetwork->NetworkTypeInUse =le32_to_cpu(pnetwork->NetworkTypeInUse); pnetwork->Configuration.ATIMWindow = le32_to_cpu(pnetwork->Configuration.ATIMWindow); pnetwork->Configuration.BeaconPeriod = le32_to_cpu(pnetwork->Configuration.BeaconPeriod); pnetwork->Configuration.DSConfig =le32_to_cpu(pnetwork->Configuration.DSConfig); pnetwork->Configuration.FHConfig.DwellTime=le32_to_cpu(pnetwork->Configuration.FHConfig.DwellTime); pnetwork->Configuration.FHConfig.HopPattern=le32_to_cpu(pnetwork->Configuration.FHConfig.HopPattern); pnetwork->Configuration.FHConfig.HopSet=le32_to_cpu(pnetwork->Configuration.FHConfig.HopSet); pnetwork->Configuration.FHConfig.Length=le32_to_cpu(pnetwork->Configuration.FHConfig.Length); pnetwork->Configuration.Length = le32_to_cpu(pnetwork->Configuration.Length); pnetwork->InfrastructureMode = le32_to_cpu(pnetwork->InfrastructureMode); pnetwork->IELength = le32_to_cpu(pnetwork->IELength); #endif len = get_WLAN_BSSID_EX_sz(pnetwork); if(len > (sizeof(WLAN_BSSID_EX))) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n ****rtw_survey_event_callback: return a wrong bss ***\n")); return; } _enter_critical_bh(&pmlmepriv->lock, &irqL); // update IBSS_network 's timestamp if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) == _TRUE) { //RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,"rtw_survey_event_callback : WIFI_ADHOC_MASTER_STATE \n\n"); if(_rtw_memcmp(&(pmlmepriv->cur_network.network.MacAddress), pnetwork->MacAddress, ETH_ALEN)) { struct wlan_network* ibss_wlan = NULL; _irqL irqL; _rtw_memcpy(pmlmepriv->cur_network.network.IEs, pnetwork->IEs, 8); _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ibss_wlan = rtw_find_network(&pmlmepriv->scanned_queue, pnetwork->MacAddress); if(ibss_wlan) { _rtw_memcpy(ibss_wlan->network.IEs , pnetwork->IEs, 8); _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); goto exit; } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); } } // lock pmlmepriv->lock when you accessing network_q if ((check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) == _FALSE) { if( pnetwork->Ssid.Ssid[0] == 0 ) { pnetwork->Ssid.SsidLength = 0; } rtw_add_network(adapter, pnetwork); } exit: _exit_critical_bh(&pmlmepriv->lock, &irqL); _func_exit_; return; } void rtw_surveydone_event_callback(_adapter *adapter, u8 *pbuf) { _irqL irqL; u8 timer_cancelled = _FALSE; struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); #ifdef CONFIG_MLME_EXT mlmeext_surveydone_event_callback(adapter); #endif _func_enter_; _enter_critical_bh(&pmlmepriv->lock, &irqL); if(pmlmepriv->wps_probe_req_ie) { u32 free_len = pmlmepriv->wps_probe_req_ie_len; pmlmepriv->wps_probe_req_ie_len = 0; rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); pmlmepriv->wps_probe_req_ie = NULL; } RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_surveydone_event_callback: fw_state:%x\n\n", get_fwstate(pmlmepriv))); if (check_fwstate(pmlmepriv,_FW_UNDER_SURVEY)) { //u8 timer_cancelled; timer_cancelled = _TRUE; //_cancel_timer(&pmlmepriv->scan_to_timer, &timer_cancelled); _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); } else { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("nic status =%x, survey done event comes too late!\n", get_fwstate(pmlmepriv))); } _exit_critical_bh(&pmlmepriv->lock, &irqL); if(timer_cancelled) _cancel_timer(&pmlmepriv->scan_to_timer, &timer_cancelled); _enter_critical_bh(&pmlmepriv->lock, &irqL); #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS rtw_set_signal_stat_timer(&adapter->recvpriv); #endif if(pmlmepriv->to_join == _TRUE) { if((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)==_TRUE) ) { if(check_fwstate(pmlmepriv, _FW_LINKED)==_FALSE) { set_fwstate(pmlmepriv, _FW_UNDER_LINKING); if(rtw_select_and_join_from_scanned_queue(pmlmepriv)==_SUCCESS) { _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT ); } else { WLAN_BSSID_EX *pdev_network = &(adapter->registrypriv.dev_network); u8 *pibss = adapter->registrypriv.dev_network.MacAddress; //pmlmepriv->fw_state ^= _FW_UNDER_SURVEY;//because don't set assoc_timer _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("switching to adhoc master\n")); _rtw_memset(&pdev_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); _rtw_memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID)); rtw_update_registrypriv_dev_network(adapter); rtw_generate_random_ibss(pibss); pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE; if(rtw_createbss_cmd(adapter)!=_SUCCESS) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Error=>rtw_createbss_cmd status FAIL\n")); } pmlmepriv->to_join = _FALSE; } } } else { int s_ret; set_fwstate(pmlmepriv, _FW_UNDER_LINKING); pmlmepriv->to_join = _FALSE; if(_SUCCESS == (s_ret=rtw_select_and_join_from_scanned_queue(pmlmepriv))) { _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT); } else if(s_ret == 2)//there is no need to wait for join { _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); rtw_indicate_connect(adapter); } else { DBG_871X("try_to_join, but select scanning queue fail, to_roam:%d\n", rtw_to_roam(adapter)); if (rtw_to_roam(adapter) != 0) { if(rtw_dec_to_roam(adapter) == 0 || _SUCCESS != rtw_sitesurvey_cmd(adapter, &pmlmepriv->assoc_ssid, 1, NULL, 0) ) { rtw_set_to_roam(adapter, 0); #ifdef CONFIG_INTEL_WIDI if(adapter->mlmepriv.widi_state == INTEL_WIDI_STATE_ROAMING) { _rtw_memset(pmlmepriv->sa_ext, 0x00, L2SDTA_SERVICE_VE_LEN); intel_widi_wk_cmd(adapter, INTEL_WIDI_LISTEN_WK, NULL, 0); DBG_871X("change to widi listen\n"); } #endif // CONFIG_INTEL_WIDI rtw_free_assoc_resources(adapter, 1); rtw_indicate_disconnect(adapter); } else { pmlmepriv->to_join = _TRUE; } } else { rtw_indicate_disconnect(adapter); } _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); } } } else { if (rtw_chk_roam_flags(adapter, RTW_ROAM_ACTIVE)) { if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, _FW_LINKED)) { if (rtw_select_roaming_candidate(pmlmepriv) == _SUCCESS) { receive_disconnect(adapter, pmlmepriv->cur_network.network.MacAddress , WLAN_REASON_ACTIVE_ROAM); } } } } //DBG_871X("scan complete in %dms\n",rtw_get_passing_time_ms(pmlmepriv->scan_start_time)); _exit_critical_bh(&pmlmepriv->lock, &irqL); #ifdef CONFIG_P2P_PS if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { p2p_ps_wk_cmd(adapter, P2P_PS_SCAN_DONE, 0); } #endif // CONFIG_P2P_PS rtw_os_xmit_schedule(adapter); #ifdef CONFIG_CONCURRENT_MODE rtw_os_xmit_schedule(adapter->pbuddy_adapter); #endif #ifdef CONFIG_DUALMAC_CONCURRENT dc_resume_xmit(adapter); #endif #ifdef CONFIG_DRVEXT_MODULE_WSC drvext_surveydone_callback(&adapter->drvextpriv); #endif #ifdef DBG_CONFIG_ERROR_DETECT { struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; if(pmlmeext->sitesurvey_res.bss_cnt == 0){ //rtw_hal_sreset_reset(adapter); } } #endif #ifdef CONFIG_IOCTL_CFG80211 rtw_cfg80211_surveydone_event_callback(adapter); #endif //CONFIG_IOCTL_CFG80211 rtw_indicate_scan_done(adapter, _FALSE); #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_IOCTL_CFG80211) if (adapter->pbuddy_adapter) { _adapter *buddy_adapter = adapter->pbuddy_adapter; struct mlme_priv *buddy_mlme = &(buddy_adapter->mlmepriv); struct rtw_wdev_priv *buddy_wdev_priv = adapter_wdev_data(buddy_adapter); bool indicate_buddy_scan = _FALSE; _enter_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL); if (buddy_wdev_priv->scan_request && buddy_mlme->scanning_via_buddy_intf == _TRUE) { buddy_mlme->scanning_via_buddy_intf = _FALSE; clr_fwstate(buddy_mlme, _FW_UNDER_SURVEY); indicate_buddy_scan = _TRUE; } _exit_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL); if (indicate_buddy_scan == _TRUE) { #ifdef CONFIG_IOCTL_CFG80211 rtw_cfg80211_surveydone_event_callback(buddy_adapter); #endif rtw_indicate_scan_done(buddy_adapter, _FALSE); } } #endif /* CONFIG_CONCURRENT_MODE */ _func_exit_; } void rtw_dummy_event_callback(_adapter *adapter , u8 *pbuf) { } void rtw_fwdbg_event_callback(_adapter *adapter , u8 *pbuf) { } static void free_scanqueue(struct mlme_priv *pmlmepriv) { _irqL irqL, irqL0; _queue *free_queue = &pmlmepriv->free_bss_pool; _queue *scan_queue = &pmlmepriv->scanned_queue; _list *plist, *phead, *ptemp; _func_enter_; RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+free_scanqueue\n")); _enter_critical_bh(&scan_queue->lock, &irqL0); _enter_critical_bh(&free_queue->lock, &irqL); phead = get_list_head(scan_queue); plist = get_next(phead); while (plist != phead) { ptemp = get_next(plist); rtw_list_delete(plist); rtw_list_insert_tail(plist, &free_queue->queue); plist =ptemp; pmlmepriv->num_of_scanned --; } _exit_critical_bh(&free_queue->lock, &irqL); _exit_critical_bh(&scan_queue->lock, &irqL0); _func_exit_; } void rtw_reset_rx_info(struct debug_priv *pdbgpriv){ pdbgpriv->dbg_rx_ampdu_drop_count = 0; pdbgpriv->dbg_rx_ampdu_forced_indicate_count = 0; pdbgpriv->dbg_rx_ampdu_loss_count = 0; pdbgpriv->dbg_rx_dup_mgt_frame_drop_count = 0; pdbgpriv->dbg_rx_ampdu_window_shift_cnt = 0; } /* *rtw_free_assoc_resources: the caller has to lock pmlmepriv->lock */ void rtw_free_assoc_resources(_adapter *adapter, int lock_scanned_queue) { _irqL irqL; struct wlan_network* pwlan = NULL; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; struct sta_priv *pstapriv = &adapter->stapriv; struct wlan_network *tgt_network = &pmlmepriv->cur_network; struct dvobj_priv *psdpriv = adapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; #ifdef CONFIG_TDLS struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; #endif //CONFIG_TDLS _func_enter_; RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+rtw_free_assoc_resources\n")); RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("tgt_network->network.MacAddress="MAC_FMT" ssid=%s\n", MAC_ARG(tgt_network->network.MacAddress), tgt_network->network.Ssid.Ssid)); if(check_fwstate( pmlmepriv, WIFI_STATION_STATE|WIFI_AP_STATE)) { struct sta_info* psta; psta = rtw_get_stainfo(&adapter->stapriv, tgt_network->network.MacAddress); #ifdef CONFIG_TDLS if(ptdlsinfo->link_established == _TRUE) { rtw_tdls_cmd(adapter, myid(&(adapter->eeprompriv)), TDLS_RS_RCR); rtw_reset_tdls_info(adapter); rtw_free_all_stainfo(adapter); //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); } else #endif //CONFIG_TDLS { //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); rtw_free_stainfo(adapter, psta); } //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); } if(check_fwstate( pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE)) { struct sta_info* psta; rtw_free_all_stainfo(adapter); psta = rtw_get_bcmc_stainfo(adapter); //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); rtw_free_stainfo(adapter, psta); //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); rtw_init_bcmc_stainfo(adapter); } if(lock_scanned_queue) _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); pwlan = rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress); if(pwlan) { pwlan->fixed = _FALSE; #ifdef CONFIG_P2P if(!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE)) { u32 p2p_ielen=0; u8 *p2p_ie; //u16 capability; u8 *pcap = NULL; u32 capability_len=0; //DBG_871X("free disconnecting network\n"); //rtw_free_network_nolock(pmlmepriv, pwlan); if((p2p_ie=rtw_get_p2p_ie(pwlan->network.IEs+_FIXED_IE_LENGTH_, pwlan->network.IELength-_FIXED_IE_LENGTH_, NULL, &p2p_ielen))) { pcap = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, NULL, &capability_len); if(pcap && capability_len==2) { u16 cap = *(u16*)pcap ; *(u16*)pcap = cap&0x00ff;//clear group capability when free this network } } rtw_set_scan_deny(adapter, 2000); //rtw_clear_scan_deny(adapter); } #endif //CONFIG_P2P } else { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_free_assoc_resources : pwlan== NULL \n\n")); } if((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) && (adapter->stapriv.asoc_sta_count== 1)) /*||check_fwstate(pmlmepriv, WIFI_STATION_STATE)*/) { rtw_free_network_nolock(adapter, pwlan); } if(lock_scanned_queue) _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); adapter->securitypriv.key_mask = 0; rtw_reset_rx_info(pdbgpriv); _func_exit_; } /* *rtw_indicate_connect: the caller has to lock pmlmepriv->lock */ void rtw_indicate_connect(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; _func_enter_; RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("+rtw_indicate_connect\n")); pmlmepriv->to_join = _FALSE; if(!check_fwstate(&padapter->mlmepriv, _FW_LINKED)) { #ifdef CONFIG_SW_ANTENNA_DIVERSITY rtw_hal_set_hwreg(padapter, HW_VAR_ANTENNA_DIVERSITY_LINK, 0); #endif set_fwstate(pmlmepriv, _FW_LINKED); rtw_led_control(padapter, LED_CTL_LINK); #ifdef CONFIG_DRVEXT_MODULE if(padapter->drvextpriv.enable_wpa) { indicate_l2_connect(padapter); } else #endif { rtw_os_indicate_connect(padapter); } } rtw_set_to_roam(padapter, 0); #ifdef CONFIG_INTEL_WIDI if(padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_ROAMING) { _rtw_memset(pmlmepriv->sa_ext, 0x00, L2SDTA_SERVICE_VE_LEN); intel_widi_wk_cmd(padapter, INTEL_WIDI_LISTEN_WK, NULL, 0); DBG_871X("change to widi listen\n"); } #endif // CONFIG_INTEL_WIDI rtw_set_scan_deny(padapter, 3000); RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("-rtw_indicate_connect: fw_state=0x%08x\n", get_fwstate(pmlmepriv))); _func_exit_; } /* *rtw_indicate_disconnect: the caller has to lock pmlmepriv->lock */ void rtw_indicate_disconnect( _adapter *padapter ) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); struct sta_info *psta; struct sta_priv *pstapriv = &padapter->stapriv; u8 *wps_ie=NULL; uint wpsie_len=0; _func_enter_; RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("+rtw_indicate_disconnect\n")); _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING|WIFI_UNDER_WPS); // force to clear cur_network_scanned's SELECTED REGISTRAR if (pmlmepriv->cur_network_scanned) { WLAN_BSSID_EX *current_joined_bss = &(pmlmepriv->cur_network_scanned->network); if (current_joined_bss) { wps_ie=rtw_get_wps_ie(current_joined_bss->IEs +_FIXED_IE_LENGTH_, current_joined_bss->IELength-_FIXED_IE_LENGTH_, NULL, &wpsie_len); if (wps_ie && wpsie_len>0) { u8 *attr = NULL; u32 attr_len; attr=rtw_get_wps_attr(wps_ie, wpsie_len, WPS_ATTR_SELECTED_REGISTRAR, NULL, &attr_len); if (attr) *(attr + 4) = 0; } } } //DBG_871X("clear wps when %s\n", __func__); if(rtw_to_roam(padapter) > 0) _clr_fwstate_(pmlmepriv, _FW_LINKED); #ifdef CONFIG_WAPI_SUPPORT psta = rtw_get_stainfo(pstapriv,cur_network->MacAddress); if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { rtw_wapi_return_one_sta_info(padapter, psta->hwaddr); } else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) { rtw_wapi_return_all_sta_info(padapter); } #endif if(check_fwstate(&padapter->mlmepriv, _FW_LINKED) || (rtw_to_roam(padapter) <= 0) ) { rtw_os_indicate_disconnect(padapter); //set ips_deny_time to avoid enter IPS before LPS leave rtw_set_ips_deny(padapter, 3000); _clr_fwstate_(pmlmepriv, _FW_LINKED); rtw_led_control(padapter, LED_CTL_NO_LINK); rtw_clear_scan_deny(padapter); } #ifdef CONFIG_P2P_PS p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1); #endif // CONFIG_P2P_PS #ifdef CONFIG_LPS rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_DISCONNECT, 1); #endif #ifdef CONFIG_BEAMFORMING beamforming_wk_cmd(padapter, BEAMFORMING_CTRL_LEAVE, cur_network->MacAddress, ETH_ALEN, 1); #endif _func_exit_; } inline void rtw_indicate_scan_done( _adapter *padapter, bool aborted) { DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); rtw_os_indicate_scan_done(padapter, aborted); #ifdef CONFIG_IPS if (is_primary_adapter(padapter) && (_FALSE == adapter_to_pwrctl(padapter)->bInSuspend) && (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE|WIFI_UNDER_LINKING) == _FALSE)) { struct pwrctrl_priv *pwrpriv; pwrpriv = adapter_to_pwrctl(padapter); rtw_set_ips_deny(padapter, 0); #ifdef CONFIG_IPS_CHECK_IN_WD _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 1); #else // !CONFIG_IPS_CHECK_IN_WD _rtw_set_pwr_state_check_timer(pwrpriv, 1); #endif // !CONFIG_IPS_CHECK_IN_WD } #endif // CONFIG_IPS } void rtw_scan_abort(_adapter *adapter) { u32 cnt=0; u32 start; struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); start = rtw_get_current_time(); pmlmeext->scan_abort = _TRUE; while (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) && rtw_get_passing_time_ms(start) <= 200) { if (adapter->bDriverStopped || adapter->bSurpriseRemoved) break; DBG_871X(FUNC_NDEV_FMT"fw_state=_FW_UNDER_SURVEY!\n", FUNC_NDEV_ARG(adapter->pnetdev)); rtw_msleep_os(20); } if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) { if (!adapter->bDriverStopped && !adapter->bSurpriseRemoved) DBG_871X(FUNC_NDEV_FMT"waiting for scan_abort time out!\n", FUNC_NDEV_ARG(adapter->pnetdev)); #ifdef CONFIG_PLATFORM_MSTAR //_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); set_survey_timer(pmlmeext, 0); _set_timer(&pmlmepriv->scan_to_timer, 50); #endif rtw_indicate_scan_done(adapter, _TRUE); } pmlmeext->scan_abort = _FALSE; } static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wlan_network *pnetwork) { int i; struct sta_info *bmc_sta, *psta=NULL; struct recv_reorder_ctrl *preorder_ctrl; struct sta_priv *pstapriv = &padapter->stapriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; psta = rtw_get_stainfo(pstapriv, pnetwork->network.MacAddress); if(psta==NULL) { psta = rtw_alloc_stainfo(pstapriv, pnetwork->network.MacAddress); } if(psta) //update ptarget_sta { DBG_871X("%s\n", __FUNCTION__); psta->aid = pnetwork->join_res; #if 0 //alloc macid when call rtw_alloc_stainfo(), and release macid when call rtw_free_stainfo() #ifdef CONFIG_CONCURRENT_MODE if(PRIMARY_ADAPTER == padapter->adapter_type) psta->mac_id=0; else psta->mac_id=2; #else psta->mac_id=0; #endif #endif //removed update_sta_info(padapter, psta); //update station supportRate psta->bssratelen = rtw_get_rateset_len(pnetwork->network.SupportedRates); _rtw_memcpy(psta->bssrateset, pnetwork->network.SupportedRates, psta->bssratelen); rtw_hal_update_sta_rate_mask(padapter, psta); psta->wireless_mode = pmlmeext->cur_wireless_mode; psta->raid = rtw_hal_networktype_to_raid(padapter,psta); //sta mode rtw_hal_set_odm_var(padapter,HAL_ODM_STA_INFO,psta,_TRUE); //security related if(padapter->securitypriv.dot11AuthAlgrthm== dot11AuthAlgrthm_8021X) { padapter->securitypriv.binstallGrpkey=_FALSE; padapter->securitypriv.busetkipkey=_FALSE; padapter->securitypriv.bgrpkey_handshake=_FALSE; psta->ieee8021x_blocked=_TRUE; psta->dot118021XPrivacy=padapter->securitypriv.dot11PrivacyAlgrthm; _rtw_memset((u8 *)&psta->dot118021x_UncstKey, 0, sizeof (union Keytype)); _rtw_memset((u8 *)&psta->dot11tkiprxmickey, 0, sizeof (union Keytype)); _rtw_memset((u8 *)&psta->dot11tkiptxmickey, 0, sizeof (union Keytype)); _rtw_memset((u8 *)&psta->dot11txpn, 0, sizeof (union pn48)); psta->dot11txpn.val = psta->dot11txpn.val + 1; #ifdef CONFIG_IEEE80211W _rtw_memset((u8 *)&psta->dot11wtxpn, 0, sizeof (union pn48)); #endif //CONFIG_IEEE80211W _rtw_memset((u8 *)&psta->dot11rxpn, 0, sizeof (union pn48)); } // Commented by Albert 2012/07/21 // When doing the WPS, the wps_ie_len won't equal to 0 // And the Wi-Fi driver shouldn't allow the data packet to be tramsmitted. if ( padapter->securitypriv.wps_ie_len != 0 ) { psta->ieee8021x_blocked=_TRUE; padapter->securitypriv.wps_ie_len = 0; } //for A-MPDU Rx reordering buffer control for bmc_sta & sta_info //if A-MPDU Rx is enabled, reseting rx_ordering_ctrl wstart_b(indicate_seq) to default value=0xffff //todo: check if AP can send A-MPDU packets for(i=0; i < 16 ; i++) { //preorder_ctrl = &precvpriv->recvreorder_ctrl[i]; preorder_ctrl = &psta->recvreorder_ctrl[i]; preorder_ctrl->enable = _FALSE; preorder_ctrl->indicate_seq = 0xffff; #ifdef DBG_RX_SEQ DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, preorder_ctrl->indicate_seq); #endif preorder_ctrl->wend_b= 0xffff; preorder_ctrl->wsize_b = 64;//max_ampdu_sz;//ex. 32(kbytes) -> wsize_b=32 } bmc_sta = rtw_get_bcmc_stainfo(padapter); if(bmc_sta) { for(i=0; i < 16 ; i++) { //preorder_ctrl = &precvpriv->recvreorder_ctrl[i]; preorder_ctrl = &bmc_sta->recvreorder_ctrl[i]; preorder_ctrl->enable = _FALSE; preorder_ctrl->indicate_seq = 0xffff; #ifdef DBG_RX_SEQ DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, preorder_ctrl->indicate_seq); #endif preorder_ctrl->wend_b= 0xffff; preorder_ctrl->wsize_b = 64;//max_ampdu_sz;//ex. 32(kbytes) -> wsize_b=32 } } } return psta; } //pnetwork : returns from rtw_joinbss_event_callback //ptarget_wlan: found from scanned_queue static void rtw_joinbss_update_network(_adapter *padapter, struct wlan_network *ptarget_wlan, struct wlan_network *pnetwork) { struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct wlan_network *cur_network = &(pmlmepriv->cur_network); DBG_871X("%s\n", __FUNCTION__); RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("\nfw_state:%x, BSSID:"MAC_FMT"\n" ,get_fwstate(pmlmepriv), MAC_ARG(pnetwork->network.MacAddress))); // why not use ptarget_wlan?? _rtw_memcpy(&cur_network->network, &pnetwork->network, pnetwork->network.Length); // some IEs in pnetwork is wrong, so we should use ptarget_wlan IEs cur_network->network.IELength = ptarget_wlan->network.IELength; _rtw_memcpy(&cur_network->network.IEs[0], &ptarget_wlan->network.IEs[0], MAX_IE_SZ); cur_network->aid = pnetwork->join_res; #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS rtw_set_signal_stat_timer(&padapter->recvpriv); #endif padapter->recvpriv.signal_strength = ptarget_wlan->network.PhyInfo.SignalStrength; padapter->recvpriv.signal_qual = ptarget_wlan->network.PhyInfo.SignalQuality; //the ptarget_wlan->network.Rssi is raw data, we use ptarget_wlan->network.PhyInfo.SignalStrength instead (has scaled) padapter->recvpriv.rssi = translate_percentage_to_dbm(ptarget_wlan->network.PhyInfo.SignalStrength); #if defined(DBG_RX_SIGNAL_DISPLAY_PROCESSING) && 1 DBG_871X(FUNC_ADPT_FMT" signal_strength:%3u, rssi:%3d, signal_qual:%3u" "\n" , FUNC_ADPT_ARG(padapter) , padapter->recvpriv.signal_strength , padapter->recvpriv.rssi , padapter->recvpriv.signal_qual ); #endif #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS rtw_set_signal_stat_timer(&padapter->recvpriv); #endif //update fw_state //will clr _FW_UNDER_LINKING here indirectly switch(pnetwork->network.InfrastructureMode) { case Ndis802_11Infrastructure: if(pmlmepriv->fw_state&WIFI_UNDER_WPS) pmlmepriv->fw_state = WIFI_STATION_STATE|WIFI_UNDER_WPS; else pmlmepriv->fw_state = WIFI_STATION_STATE; break; case Ndis802_11IBSS: pmlmepriv->fw_state = WIFI_ADHOC_STATE; break; default: pmlmepriv->fw_state = WIFI_NULL_STATE; RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Invalid network_mode\n")); break; } rtw_update_protection(padapter, (cur_network->network.IEs) + sizeof (NDIS_802_11_FIXED_IEs), (cur_network->network.IELength)); #ifdef CONFIG_80211N_HT rtw_update_ht_cap(padapter, cur_network->network.IEs, cur_network->network.IELength, (u8) cur_network->network.Configuration.DSConfig); #endif } //Notes: the fucntion could be > passive_level (the same context as Rx tasklet) //pnetwork : returns from rtw_joinbss_event_callback //ptarget_wlan: found from scanned_queue //if join_res > 0, for (fw_state==WIFI_STATION_STATE), we check if "ptarget_sta" & "ptarget_wlan" exist. //if join_res > 0, for (fw_state==WIFI_ADHOC_STATE), we only check if "ptarget_wlan" exist. //if join_res > 0, update "cur_network->network" from "pnetwork->network" if (ptarget_wlan !=NULL). // //#define REJOIN void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf) { _irqL irqL,irqL2; static u8 retry=0; u8 timer_cancelled; struct sta_info *ptarget_sta= NULL, *pcur_sta = NULL; struct sta_priv *pstapriv = &adapter->stapriv; struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); struct wlan_network *pnetwork = (struct wlan_network *)pbuf; struct wlan_network *cur_network = &(pmlmepriv->cur_network); struct wlan_network *pcur_wlan = NULL, *ptarget_wlan = NULL; unsigned int the_same_macaddr = _FALSE; _func_enter_; #ifdef CONFIG_RTL8712 //endian_convert pnetwork->join_res = le32_to_cpu(pnetwork->join_res); pnetwork->network_type = le32_to_cpu(pnetwork->network_type); pnetwork->network.Length = le32_to_cpu(pnetwork->network.Length); pnetwork->network.Ssid.SsidLength = le32_to_cpu(pnetwork->network.Ssid.SsidLength); pnetwork->network.Privacy =le32_to_cpu( pnetwork->network.Privacy); pnetwork->network.Rssi = le32_to_cpu(pnetwork->network.Rssi); pnetwork->network.NetworkTypeInUse =le32_to_cpu(pnetwork->network.NetworkTypeInUse) ; pnetwork->network.Configuration.ATIMWindow = le32_to_cpu(pnetwork->network.Configuration.ATIMWindow); pnetwork->network.Configuration.BeaconPeriod = le32_to_cpu(pnetwork->network.Configuration.BeaconPeriod); pnetwork->network.Configuration.DSConfig = le32_to_cpu(pnetwork->network.Configuration.DSConfig); pnetwork->network.Configuration.FHConfig.DwellTime=le32_to_cpu(pnetwork->network.Configuration.FHConfig.DwellTime); pnetwork->network.Configuration.FHConfig.HopPattern=le32_to_cpu(pnetwork->network.Configuration.FHConfig.HopPattern); pnetwork->network.Configuration.FHConfig.HopSet=le32_to_cpu(pnetwork->network.Configuration.FHConfig.HopSet); pnetwork->network.Configuration.FHConfig.Length=le32_to_cpu(pnetwork->network.Configuration.FHConfig.Length); pnetwork->network.Configuration.Length = le32_to_cpu(pnetwork->network.Configuration.Length); pnetwork->network.InfrastructureMode = le32_to_cpu(pnetwork->network.InfrastructureMode); pnetwork->network.IELength = le32_to_cpu(pnetwork->network.IELength ); #endif RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("joinbss event call back received with res=%d\n", pnetwork->join_res)); rtw_get_encrypt_decrypt_from_registrypriv(adapter); if (pmlmepriv->assoc_ssid.SsidLength == 0) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("@@@@@ joinbss event call back for Any SSid\n")); } else { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("@@@@@ rtw_joinbss_event_callback for SSid:%s\n", pmlmepriv->assoc_ssid.Ssid)); } the_same_macaddr = _rtw_memcmp(pnetwork->network.MacAddress, cur_network->network.MacAddress, ETH_ALEN); pnetwork->network.Length = get_WLAN_BSSID_EX_sz(&pnetwork->network); if(pnetwork->network.Length > sizeof(WLAN_BSSID_EX)) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n\n ***joinbss_evt_callback return a wrong bss ***\n\n")); goto ignore_joinbss_callback; } _enter_critical_bh(&pmlmepriv->lock, &irqL); pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 0; pmlmepriv->LinkDetectInfo.LowPowerTransitionCount = 0; RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("\n rtw_joinbss_event_callback !! _enter_critical \n")); if(pnetwork->join_res > 0) { _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); retry = 0; if (check_fwstate(pmlmepriv,_FW_UNDER_LINKING) ) { //s1. find ptarget_wlan if(check_fwstate(pmlmepriv, _FW_LINKED) ) { if(the_same_macaddr == _TRUE) { ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress); } else { pcur_wlan = rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress); if(pcur_wlan) pcur_wlan->fixed = _FALSE; pcur_sta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); if(pcur_sta){ //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); rtw_free_stainfo(adapter, pcur_sta); //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); } ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, pnetwork->network.MacAddress); if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE){ if(ptarget_wlan) ptarget_wlan->fixed = _TRUE; } } } else { ptarget_wlan = _rtw_find_same_network(&pmlmepriv->scanned_queue, pnetwork); if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE){ if(ptarget_wlan) ptarget_wlan->fixed = _TRUE; } } //s2. update cur_network if(ptarget_wlan) { rtw_joinbss_update_network(adapter, ptarget_wlan, pnetwork); } else { DBG_871X_LEVEL(_drv_always_, "Can't find ptarget_wlan when joinbss_event callback\n"); _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); goto ignore_joinbss_callback; } //s3. find ptarget_sta & update ptarget_sta after update cur_network only for station mode if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) { ptarget_sta = rtw_joinbss_update_stainfo(adapter, pnetwork); if(ptarget_sta==NULL) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Can't update stainfo when joinbss_event callback\n")); _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); goto ignore_joinbss_callback; } } //s4. indicate connect if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) { pmlmepriv->cur_network_scanned = ptarget_wlan; rtw_indicate_connect(adapter); } else { //adhoc mode will rtw_indicate_connect when rtw_stassoc_event_callback RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("adhoc mode, fw_state:%x", get_fwstate(pmlmepriv))); } //s5. Cancle assoc_timer _cancel_timer(&pmlmepriv->assoc_timer, &timer_cancelled); RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("Cancle assoc_timer \n")); } else { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_joinbss_event_callback err: fw_state:%x", get_fwstate(pmlmepriv))); _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); goto ignore_joinbss_callback; } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); } else if(pnetwork->join_res == -4) { rtw_reset_securitypriv(adapter); _set_timer(&pmlmepriv->assoc_timer, 1); //rtw_free_assoc_resources(adapter, 1); if((check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) == _TRUE) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("fail! clear _FW_UNDER_LINKING ^^^fw_state=%x\n", get_fwstate(pmlmepriv))); _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); } } else //if join_res < 0 (join fails), then try again { #ifdef REJOIN res = _FAIL; if(retry < 2) { res = rtw_select_and_join_from_scanned_queue(pmlmepriv); RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_select_and_join_from_scanned_queue again! res:%d\n",res)); } if(res == _SUCCESS) { //extend time of assoc_timer _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT); retry++; } else if(res == 2)//there is no need to wait for join { _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); rtw_indicate_connect(adapter); } else { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Set Assoc_Timer = 1; can't find match ssid in scanned_q \n")); #endif _set_timer(&pmlmepriv->assoc_timer, 1); //rtw_free_assoc_resources(adapter, 1); _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); #ifdef REJOIN retry = 0; } #endif } ignore_joinbss_callback: _exit_critical_bh(&pmlmepriv->lock, &irqL); _func_exit_; } void rtw_joinbss_event_callback(_adapter *adapter, u8 *pbuf) { struct wlan_network *pnetwork = (struct wlan_network *)pbuf; _func_enter_; mlmeext_joinbss_event_callback(adapter, pnetwork->join_res); rtw_os_xmit_schedule(adapter); #ifdef CONFIG_CONCURRENT_MODE rtw_os_xmit_schedule(adapter->pbuddy_adapter); #endif #ifdef CONFIG_DUALMAC_CONCURRENT dc_resume_xmit(adapter); #endif _func_exit_; } #if 0 //#if (RATE_ADAPTIVE_SUPPORT==1) //for 88E RA u8 search_max_mac_id(_adapter *padapter) { u8 mac_id, aid; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct sta_priv *pstapriv = &padapter->stapriv; #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) if(check_fwstate(pmlmepriv, WIFI_AP_STATE)){ #if 1 _irqL irqL; struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); _enter_critical_bh(&pdvobj->lock, &irqL); for(mac_id=(NUM_STA-1); mac_id>0; mac_id--) if(pdvobj->macid[mac_id] == _TRUE) break; _exit_critical_bh(&pdvobj->lock, &irqL); #else for (aid = (pstapriv->max_num_sta); aid > 0; aid--) { if (pstapriv->sta_aid[aid-1] != NULL) { psta = pstapriv->sta_aid[aid-1]; break; } } /* for (mac_id = (pstapriv->max_num_sta-1); mac_id >= 0; mac_id--) { if (pstapriv->sta_aid[mac_id] != NULL) break; } */ mac_id = aid + 1; #endif } else #endif {//adhoc id = 31~2 for (mac_id = (NUM_STA-1); mac_id >= IBSS_START_MAC_ID ; mac_id--) { if (pmlmeinfo->FW_sta_info[mac_id].status == 1) { break; } } } DBG_871X("max mac_id=%d\n", mac_id); return mac_id; } #endif //FOR STA, AP ,AD-HOC mode void rtw_sta_media_status_rpt(_adapter *adapter,struct sta_info *psta, u32 mstatus) { u16 media_status_rpt; if(psta==NULL) return; #if (RATE_ADAPTIVE_SUPPORT==1) //for 88E RA { u8 macid = rtw_search_max_mac_id(adapter); rtw_hal_set_hwreg(adapter,HW_VAR_TX_RPT_MAX_MACID, (u8*)&macid); } #endif media_status_rpt = (u16)((psta->mac_id<<8)|mstatus); // MACID|OPMODE:1 connect rtw_hal_set_hwreg(adapter,HW_VAR_H2C_MEDIA_STATUS_RPT,(u8 *)&media_status_rpt); } void rtw_stassoc_event_callback(_adapter *adapter, u8 *pbuf) { _irqL irqL; struct sta_info *psta; struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); struct stassoc_event *pstassoc = (struct stassoc_event*)pbuf; struct wlan_network *cur_network = &(pmlmepriv->cur_network); struct wlan_network *ptarget_wlan = NULL; _func_enter_; if(rtw_access_ctrl(adapter, pstassoc->macaddr) == _FALSE) return; #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { psta = rtw_get_stainfo(&adapter->stapriv, pstassoc->macaddr); if(psta) { u8 *passoc_req = NULL; u32 assoc_req_len = 0; rtw_sta_media_status_rpt(adapter, psta, 1); #ifndef CONFIG_AUTO_AP_MODE ap_sta_info_defer_update(adapter, psta); //report to upper layer DBG_871X("indicate_sta_assoc_event to upper layer - hostapd\n"); #ifdef CONFIG_IOCTL_CFG80211 _enter_critical_bh(&psta->lock, &irqL); if(psta->passoc_req && psta->assoc_req_len>0) { passoc_req = rtw_zmalloc(psta->assoc_req_len); if(passoc_req) { assoc_req_len = psta->assoc_req_len; _rtw_memcpy(passoc_req, psta->passoc_req, assoc_req_len); rtw_mfree(psta->passoc_req , psta->assoc_req_len); psta->passoc_req = NULL; psta->assoc_req_len = 0; } } _exit_critical_bh(&psta->lock, &irqL); if(passoc_req && assoc_req_len>0) { rtw_cfg80211_indicate_sta_assoc(adapter, passoc_req, assoc_req_len); rtw_mfree(passoc_req, assoc_req_len); } #else //!CONFIG_IOCTL_CFG80211 rtw_indicate_sta_assoc_event(adapter, psta); #endif //!CONFIG_IOCTL_CFG80211 #endif //!CONFIG_AUTO_AP_MODE #ifdef CONFIG_BEAMFORMING beamforming_wk_cmd(adapter, BEAMFORMING_CTRL_ENTER, (u8 *)psta, sizeof(struct sta_info), 0); #endif } goto exit; } #endif //defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) //for AD-HOC mode psta = rtw_get_stainfo(&adapter->stapriv, pstassoc->macaddr); if( psta != NULL) { //the sta have been in sta_info_queue => do nothing RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Error: rtw_stassoc_event_callback: sta has been in sta_hash_queue \n")); goto exit; //(between drv has received this event before and fw have not yet to set key to CAM_ENTRY) } psta = rtw_alloc_stainfo(&adapter->stapriv, pstassoc->macaddr); if (psta == NULL) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Can't alloc sta_info when rtw_stassoc_event_callback\n")); goto exit; } //to do : init sta_info variable psta->qos_option = 0; psta->mac_id = (uint)pstassoc->cam_id; //psta->aid = (uint)pstassoc->cam_id; DBG_871X("%s\n",__FUNCTION__); //for ad-hoc mode rtw_hal_set_odm_var(adapter,HAL_ODM_STA_INFO,psta,_TRUE); rtw_sta_media_status_rpt(adapter, psta, 1); if(adapter->securitypriv.dot11AuthAlgrthm==dot11AuthAlgrthm_8021X) psta->dot118021XPrivacy = adapter->securitypriv.dot11PrivacyAlgrthm; psta->ieee8021x_blocked = _FALSE; _enter_critical_bh(&pmlmepriv->lock, &irqL); if ( (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)==_TRUE ) || (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)==_TRUE ) ) { if(adapter->stapriv.asoc_sta_count== 2) { _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress); pmlmepriv->cur_network_scanned = ptarget_wlan; if(ptarget_wlan) ptarget_wlan->fixed = _TRUE; _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); // a sta + bc/mc_stainfo (not Ibss_stainfo) rtw_indicate_connect(adapter); } } _exit_critical_bh(&pmlmepriv->lock, &irqL); mlmeext_sta_add_event_callback(adapter, psta); #ifdef CONFIG_RTL8711 //submit SetStaKey_cmd to tell fw, fw will allocate an CAM entry for this sta rtw_setstakey_cmd(adapter, psta, _FALSE, _TRUE); #endif exit: _func_exit_; } void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf) { _irqL irqL,irqL2; int mac_id = (-1); struct sta_info *psta; struct wlan_network* pwlan = NULL; WLAN_BSSID_EX *pdev_network=NULL; u8* pibss = NULL; struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); struct stadel_event *pstadel = (struct stadel_event*)pbuf; struct sta_priv *pstapriv = &adapter->stapriv; struct wlan_network *tgt_network = &(pmlmepriv->cur_network); struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); _func_enter_; psta = rtw_get_stainfo(&adapter->stapriv, pstadel->macaddr); if(psta) mac_id = psta->mac_id; else mac_id = pstadel->mac_id; DBG_871X("%s(mac_id=%d)=" MAC_FMT "\n", __func__, mac_id, MAC_ARG(pstadel->macaddr)); if(mac_id>=0){ u16 media_status; media_status = (mac_id<<8)|0; // MACID|OPMODE:0 means disconnect //for STA,AP,ADHOC mode, report disconnect stauts to FW rtw_hal_set_hwreg(adapter, HW_VAR_H2C_MEDIA_STATUS_RPT, (u8 *)&media_status); } //if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { #ifdef CONFIG_IOCTL_CFG80211 #ifdef COMPAT_KERNEL_RELEASE #elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37)) || defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) rtw_cfg80211_indicate_sta_disassoc(adapter, pstadel->macaddr, *(u16*)pstadel->rsvd); #endif //(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37)) || defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) #endif //CONFIG_IOCTL_CFG80211 return; } mlmeext_sta_del_event_callback(adapter); _enter_critical_bh(&pmlmepriv->lock, &irqL2); if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) ) { u16 reason = *((unsigned short *)(pstadel->rsvd)); bool roam = _FALSE; struct wlan_network *roam_target = NULL; #ifdef CONFIG_LAYER2_ROAMING if(adapter->registrypriv.wifi_spec==1) { roam = _FALSE; } else if (reason == WLAN_REASON_EXPIRATION_CHK && rtw_chk_roam_flags(adapter, RTW_ROAM_ON_EXPIRED)) { roam = _TRUE; } else if (reason == WLAN_REASON_ACTIVE_ROAM && rtw_chk_roam_flags(adapter, RTW_ROAM_ACTIVE)) { roam = _TRUE; roam_target = pmlmepriv->roam_network; } #ifdef CONFIG_INTEL_WIDI else if (adapter->mlmepriv.widi_state == INTEL_WIDI_STATE_CONNECTED) { roam = _TRUE; } #endif // CONFIG_INTEL_WIDI if (roam == _TRUE) { if (rtw_to_roam(adapter) > 0) rtw_dec_to_roam(adapter); /* this stadel_event is caused by roaming, decrease to_roam */ else if (rtw_to_roam(adapter) == 0) rtw_set_to_roam(adapter, adapter->registrypriv.max_roaming_times); } else { rtw_set_to_roam(adapter, 0); } #endif /* CONFIG_LAYER2_ROAMING */ rtw_free_uc_swdec_pending_queue(adapter); rtw_free_assoc_resources(adapter, 1); rtw_indicate_disconnect(adapter); _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); // remove the network entry in scanned_queue pwlan = rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress); if (pwlan) { pwlan->fixed = _FALSE; rtw_free_network_nolock(adapter, pwlan); } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); #ifdef CONFIG_INTEL_WIDI if (!rtw_to_roam(adapter)) process_intel_widi_disconnect(adapter, 1); #endif // CONFIG_INTEL_WIDI _rtw_roaming(adapter, roam_target); } if ( check_fwstate(pmlmepriv,WIFI_ADHOC_MASTER_STATE) || check_fwstate(pmlmepriv,WIFI_ADHOC_STATE)) { //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); rtw_free_stainfo(adapter, psta); //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); if(adapter->stapriv.asoc_sta_count== 1) //a sta + bc/mc_stainfo (not Ibss_stainfo) { //rtw_indicate_disconnect(adapter);//removed@20091105 _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); //free old ibss network //pwlan = rtw_find_network(&pmlmepriv->scanned_queue, pstadel->macaddr); pwlan = rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress); if(pwlan) { pwlan->fixed = _FALSE; rtw_free_network_nolock(adapter, pwlan); } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); //re-create ibss pdev_network = &(adapter->registrypriv.dev_network); pibss = adapter->registrypriv.dev_network.MacAddress; _rtw_memcpy(pdev_network, &tgt_network->network, get_WLAN_BSSID_EX_sz(&tgt_network->network)); _rtw_memset(&pdev_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); _rtw_memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID)); rtw_update_registrypriv_dev_network(adapter); rtw_generate_random_ibss(pibss); if(check_fwstate(pmlmepriv,WIFI_ADHOC_STATE)) { set_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE); _clr_fwstate_(pmlmepriv, WIFI_ADHOC_STATE); } if(rtw_createbss_cmd(adapter)!=_SUCCESS) { RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("***Error=>stadel_event_callback: rtw_createbss_cmd status FAIL*** \n ")); } } } _exit_critical_bh(&pmlmepriv->lock, &irqL2); _func_exit_; } void rtw_cpwm_event_callback(PADAPTER padapter, u8 *pbuf) { #ifdef CONFIG_LPS_LCLK struct reportpwrstate_parm *preportpwrstate; #endif _func_enter_; RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("+rtw_cpwm_event_callback !!!\n")); #ifdef CONFIG_LPS_LCLK preportpwrstate = (struct reportpwrstate_parm*)pbuf; preportpwrstate->state |= (u8)(adapter_to_pwrctl(padapter)->cpwm_tog + 0x80); cpwm_int_hdl(padapter, preportpwrstate); #endif _func_exit_; } void rtw_wmm_event_callback(PADAPTER padapter, u8 *pbuf) { _func_enter_; WMMOnAssocRsp(padapter); _func_exit_; } /* * _rtw_join_timeout_handler - Timeout/faliure handler for CMD JoinBss * @adapter: pointer to _adapter structure */ void _rtw_join_timeout_handler (_adapter *adapter) { _irqL irqL; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; #if 0 if (adapter->bDriverStopped == _TRUE){ _rtw_up_sema(&pmlmepriv->assoc_terminate); return; } #endif _func_enter_; DBG_871X("%s, fw_state=%x\n", __FUNCTION__, get_fwstate(pmlmepriv)); if(adapter->bDriverStopped ||adapter->bSurpriseRemoved) return; _enter_critical_bh(&pmlmepriv->lock, &irqL); #ifdef CONFIG_LAYER2_ROAMING if (rtw_to_roam(adapter) > 0) { /* join timeout caused by roaming */ while(1) { rtw_dec_to_roam(adapter); if (rtw_to_roam(adapter) != 0) { /* try another */ int do_join_r; DBG_871X("%s try another roaming\n", __FUNCTION__); if( _SUCCESS!=(do_join_r=rtw_do_join(adapter)) ) { DBG_871X("%s roaming do_join return %d\n", __FUNCTION__ ,do_join_r); continue; } break; } else { #ifdef CONFIG_INTEL_WIDI if(adapter->mlmepriv.widi_state == INTEL_WIDI_STATE_ROAMING) { _rtw_memset(pmlmepriv->sa_ext, 0x00, L2SDTA_SERVICE_VE_LEN); intel_widi_wk_cmd(adapter, INTEL_WIDI_LISTEN_WK, NULL, 0); DBG_871X("change to widi listen\n"); } #endif // CONFIG_INTEL_WIDI DBG_871X("%s We've try roaming but fail\n", __FUNCTION__); rtw_indicate_disconnect(adapter); break; } } } else #endif { rtw_indicate_disconnect(adapter); free_scanqueue(pmlmepriv);//??? #ifdef CONFIG_IOCTL_CFG80211 //indicate disconnect for the case that join_timeout and check_fwstate != FW_LINKED rtw_cfg80211_indicate_disconnect(adapter); #endif //CONFIG_IOCTL_CFG80211 } _exit_critical_bh(&pmlmepriv->lock, &irqL); #ifdef CONFIG_DRVEXT_MODULE_WSC drvext_assoc_fail_indicate(&adapter->drvextpriv); #endif _func_exit_; } /* * rtw_scan_timeout_handler - Timeout/Faliure handler for CMD SiteSurvey * @adapter: pointer to _adapter structure */ void rtw_scan_timeout_handler (_adapter *adapter) { _irqL irqL; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; DBG_871X(FUNC_ADPT_FMT" fw_state=%x\n", FUNC_ADPT_ARG(adapter), get_fwstate(pmlmepriv)); _enter_critical_bh(&pmlmepriv->lock, &irqL); _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); _exit_critical_bh(&pmlmepriv->lock, &irqL); rtw_indicate_scan_done(adapter, _TRUE); #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_IOCTL_CFG80211) if (adapter->pbuddy_adapter) { _adapter *buddy_adapter = adapter->pbuddy_adapter; struct mlme_priv *buddy_mlme = &(buddy_adapter->mlmepriv); struct rtw_wdev_priv *buddy_wdev_priv = adapter_wdev_data(buddy_adapter); bool indicate_buddy_scan = _FALSE; _enter_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL); if (buddy_wdev_priv->scan_request && buddy_mlme->scanning_via_buddy_intf == _TRUE) { buddy_mlme->scanning_via_buddy_intf = _FALSE; clr_fwstate(buddy_mlme, _FW_UNDER_SURVEY); indicate_buddy_scan = _TRUE; } _exit_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL); if (indicate_buddy_scan == _TRUE) { rtw_indicate_scan_done(buddy_adapter, _TRUE); } } #endif /* CONFIG_CONCURRENT_MODE */ } void rtw_mlme_reset_auto_scan_int(_adapter *adapter) { struct mlme_priv *mlme = &adapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); #ifdef CONFIG_P2P if(!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE)) { mlme->auto_scan_int_ms = 0; /* disabled */ goto exit; } #endif if(pmlmeinfo->VHT_enable) //disable auto scan when connect to 11AC AP { mlme->auto_scan_int_ms = 0; } else if(adapter->registrypriv.wifi_spec && is_client_associated_to_ap(adapter) == _TRUE) { mlme->auto_scan_int_ms = 60*1000; #ifdef CONFIG_LAYER2_ROAMING } else if(rtw_chk_roam_flags(adapter, RTW_ROAM_ACTIVE)) { if (check_fwstate(mlme, WIFI_STATION_STATE) && check_fwstate(mlme, _FW_LINKED)) mlme->auto_scan_int_ms = mlme->roam_scan_int_ms; #endif } else { mlme->auto_scan_int_ms = 0; /* disabled */ } exit: return; } static void rtw_auto_scan_handler(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; rtw_mlme_reset_auto_scan_int(padapter); if (pmlmepriv->auto_scan_int_ms != 0 && rtw_get_passing_time_ms(pmlmepriv->scan_start_time) > pmlmepriv->auto_scan_int_ms) { if (!padapter->registrypriv.wifi_spec) { if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) { DBG_871X(FUNC_ADPT_FMT" _FW_UNDER_SURVEY|_FW_UNDER_LINKING\n", FUNC_ADPT_ARG(padapter)); goto exit; } if(pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) { DBG_871X(FUNC_ADPT_FMT" exit BusyTraffic\n", FUNC_ADPT_ARG(padapter)); goto exit; } } #ifdef CONFIG_CONCURRENT_MODE if (rtw_buddy_adapter_up(padapter)) { if ((check_buddy_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) || (padapter->pbuddy_adapter->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE)) { DBG_871X(FUNC_ADPT_FMT", but buddy_intf is under scanning or linking or BusyTraffic\n" , FUNC_ADPT_ARG(padapter)); goto exit; } } #endif DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); rtw_set_802_11_bssid_list_scan(padapter, NULL, 0); } exit: return; } void rtw_dynamic_check_timer_handlder(_adapter *adapter) { #ifdef CONFIG_AP_MODE struct mlme_priv *pmlmepriv = &adapter->mlmepriv; #endif //CONFIG_AP_MODE struct registry_priv *pregistrypriv = &adapter->registrypriv; #ifdef CONFIG_CONCURRENT_MODE PADAPTER pbuddy_adapter = adapter->pbuddy_adapter; #endif if(!adapter) return; if(adapter->hw_init_completed == _FALSE) return; if ((adapter->bDriverStopped == _TRUE)||(adapter->bSurpriseRemoved== _TRUE)) return; #ifdef CONFIG_CONCURRENT_MODE if(pbuddy_adapter) { if(adapter->net_closed == _TRUE && pbuddy_adapter->net_closed == _TRUE) { return; } } else #endif //CONFIG_CONCURRENT_MODE if(adapter->net_closed == _TRUE) { return; } #ifdef CONFIG_BT_COEXIST if(is_primary_adapter(adapter)) DBG_871X("IsBtDisabled=%d, IsBtControlLps=%d\n", rtw_btcoex_IsBtDisabled(adapter), rtw_btcoex_IsBtControlLps(adapter)); #endif #ifdef CONFIG_LPS_LCLK_WD_TIMER if ((adapter_to_pwrctl(adapter)->bFwCurrentInPSMode ==_TRUE ) #ifdef CONFIG_BT_COEXIST && (rtw_btcoex_IsBtControlLps(adapter) == _FALSE) #endif ) { u8 bEnterPS; linked_status_chk(adapter); bEnterPS = traffic_status_watchdog(adapter, 1); if(bEnterPS) { //rtw_lps_ctrl_wk_cmd(adapter, LPS_CTRL_ENTER, 1); rtw_hal_dm_watchdog_in_lps(adapter); } else { //call rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1) in traffic_status_watchdog() } } else #endif //CONFIG_LPS_LCLK_WD_TIMER { if(is_primary_adapter(adapter)) { rtw_dynamic_chk_wk_cmd(adapter); } } /* auto site survey */ rtw_auto_scan_handler(adapter); #ifndef CONFIG_ACTIVE_KEEP_ALIVE_CHECK #ifdef CONFIG_AP_MODE if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { expire_timeout_chk(adapter); } #endif #endif //!CONFIG_ACTIVE_KEEP_ALIVE_CHECK #ifdef CONFIG_BR_EXT #if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) rcu_read_lock(); #endif // (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) if( adapter->pnetdev->br_port #else // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) if( rcu_dereference(adapter->pnetdev->rx_handler_data) #endif // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) && (check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) ) { // expire NAT2.5 entry void nat25_db_expire(_adapter *priv); nat25_db_expire(adapter); if (adapter->pppoe_connection_in_progress > 0) { adapter->pppoe_connection_in_progress--; } // due to rtw_dynamic_check_timer_handlder() is called every 2 seconds if (adapter->pppoe_connection_in_progress > 0) { adapter->pppoe_connection_in_progress--; } } #if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) rcu_read_unlock(); #endif // (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) #endif // CONFIG_BR_EXT } #ifdef CONFIG_SET_SCAN_DENY_TIMER inline bool rtw_is_scan_deny(_adapter *adapter) { struct mlme_priv *mlmepriv = &adapter->mlmepriv; return (ATOMIC_READ(&mlmepriv->set_scan_deny) != 0) ? _TRUE : _FALSE; } inline void rtw_clear_scan_deny(_adapter *adapter) { struct mlme_priv *mlmepriv = &adapter->mlmepriv; ATOMIC_SET(&mlmepriv->set_scan_deny, 0); if (0) DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); } void rtw_set_scan_deny_timer_hdl(_adapter *adapter) { rtw_clear_scan_deny(adapter); } void rtw_set_scan_deny(_adapter *adapter, u32 ms) { struct mlme_priv *mlmepriv = &adapter->mlmepriv; #ifdef CONFIG_CONCURRENT_MODE struct mlme_priv *b_mlmepriv; #endif if (0) DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); ATOMIC_SET(&mlmepriv->set_scan_deny, 1); _set_timer(&mlmepriv->set_scan_deny_timer, ms); #ifdef CONFIG_CONCURRENT_MODE if (!adapter->pbuddy_adapter) return; if (0) DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter->pbuddy_adapter)); b_mlmepriv = &adapter->pbuddy_adapter->mlmepriv; ATOMIC_SET(&b_mlmepriv->set_scan_deny, 1); _set_timer(&b_mlmepriv->set_scan_deny_timer, ms); #endif } #endif #ifdef CONFIG_LAYER2_ROAMING /* * Select a new roaming candidate from the original @param candidate and @param competitor * @return _TRUE: candidate is updated * @return _FALSE: candidate is not updated */ static int rtw_check_roaming_candidate(struct mlme_priv *mlme , struct wlan_network **candidate, struct wlan_network *competitor) { int updated = _FALSE; _adapter *adapter = container_of(mlme, _adapter, mlmepriv); if(is_same_ess(&competitor->network, &mlme->cur_network.network) == _FALSE) goto exit; if(rtw_is_desired_network(adapter, competitor) == _FALSE) goto exit; DBG_871X("roam candidate:%s %s("MAC_FMT", ch%3u) rssi:%d, age:%5d\n", (competitor == mlme->cur_network_scanned)?"*":" " , competitor->network.Ssid.Ssid, MAC_ARG(competitor->network.MacAddress), competitor->network.Configuration.DSConfig, (int)competitor->network.Rssi, rtw_get_passing_time_ms(competitor->last_scanned) ); /* got specific addr to roam */ if (!is_zero_mac_addr(mlme->roam_tgt_addr)) { if(_rtw_memcmp(mlme->roam_tgt_addr, competitor->network.MacAddress, ETH_ALEN) == _TRUE) goto update; else goto exit; } #if 1 if(rtw_get_passing_time_ms((u32)competitor->last_scanned) >= mlme->roam_scanr_exp_ms) goto exit; if (competitor->network.Rssi - mlme->cur_network_scanned->network.Rssi < mlme->roam_rssi_diff_th) goto exit; if(*candidate != NULL && (*candidate)->network.Rssi>=competitor->network.Rssi) goto exit; #else goto exit; #endif update: *candidate = competitor; updated = _TRUE; exit: return updated; } int rtw_select_roaming_candidate(struct mlme_priv *mlme) { _irqL irqL; int ret = _FAIL; _list *phead; _adapter *adapter; _queue *queue = &(mlme->scanned_queue); struct wlan_network *pnetwork = NULL; struct wlan_network *candidate = NULL; u8 bSupportAntDiv = _FALSE; _func_enter_; if (mlme->cur_network_scanned == NULL) { rtw_warn_on(1); goto exit; } _enter_critical_bh(&(mlme->scanned_queue.lock), &irqL); phead = get_list_head(queue); adapter = (_adapter *)mlme->nic_hdl; mlme->pscanned = get_next(phead); while (!rtw_end_of_queue_search(phead, mlme->pscanned)) { pnetwork = LIST_CONTAINOR(mlme->pscanned, struct wlan_network, list); if(pnetwork==NULL){ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s return _FAIL:(pnetwork==NULL)\n", __FUNCTION__)); ret = _FAIL; goto exit; } mlme->pscanned = get_next(mlme->pscanned); if (0) DBG_871X("%s("MAC_FMT", ch%u) rssi:%d\n" , pnetwork->network.Ssid.Ssid , MAC_ARG(pnetwork->network.MacAddress) , pnetwork->network.Configuration.DSConfig , (int)pnetwork->network.Rssi); rtw_check_roaming_candidate(mlme, &candidate, pnetwork); } if(candidate == NULL) { DBG_871X("%s: return _FAIL(candidate == NULL)\n", __FUNCTION__); ret = _FAIL; goto exit; } else { DBG_871X("%s: candidate: %s("MAC_FMT", ch:%u)\n", __FUNCTION__, candidate->network.Ssid.Ssid, MAC_ARG(candidate->network.MacAddress), candidate->network.Configuration.DSConfig); mlme->roam_network = candidate; if (_rtw_memcmp(candidate->network.MacAddress, mlme->roam_tgt_addr, ETH_ALEN) == _TRUE) _rtw_memset(mlme->roam_tgt_addr,0, ETH_ALEN); } ret = _SUCCESS; exit: _exit_critical_bh(&(mlme->scanned_queue.lock), &irqL); return ret; } #endif /* CONFIG_LAYER2_ROAMING */ /* * Select a new join candidate from the original @param candidate and @param competitor * @return _TRUE: candidate is updated * @return _FALSE: candidate is not updated */ static int rtw_check_join_candidate(struct mlme_priv *mlme , struct wlan_network **candidate, struct wlan_network *competitor) { int updated = _FALSE; _adapter *adapter = container_of(mlme, _adapter, mlmepriv); //check bssid, if needed if(mlme->assoc_by_bssid==_TRUE) { if(_rtw_memcmp(competitor->network.MacAddress, mlme->assoc_bssid, ETH_ALEN) ==_FALSE) goto exit; } //check ssid, if needed if(mlme->assoc_ssid.Ssid[0] && mlme->assoc_ssid.SsidLength) { if( competitor->network.Ssid.SsidLength != mlme->assoc_ssid.SsidLength || _rtw_memcmp(competitor->network.Ssid.Ssid, mlme->assoc_ssid.Ssid, mlme->assoc_ssid.SsidLength) == _FALSE ) goto exit; } if(rtw_is_desired_network(adapter, competitor) == _FALSE) goto exit; #ifdef CONFIG_LAYER2_ROAMING if(rtw_to_roam(adapter) > 0) { if( rtw_get_passing_time_ms((u32)competitor->last_scanned) >= mlme->roam_scanr_exp_ms || is_same_ess(&competitor->network, &mlme->cur_network.network) == _FALSE ) goto exit; } #endif if(*candidate == NULL ||(*candidate)->network.Rssinetwork.Rssi ) { *candidate = competitor; updated = _TRUE; } if(updated){ DBG_871X("[by_bssid:%u][assoc_ssid:%s]" #ifdef CONFIG_LAYER2_ROAMING "[to_roam:%u] " #endif "new candidate: %s("MAC_FMT", ch%u) rssi:%d\n", mlme->assoc_by_bssid, mlme->assoc_ssid.Ssid, #ifdef CONFIG_LAYER2_ROAMING rtw_to_roam(adapter), #endif (*candidate)->network.Ssid.Ssid, MAC_ARG((*candidate)->network.MacAddress), (*candidate)->network.Configuration.DSConfig, (int)(*candidate)->network.Rssi ); } exit: return updated; } /* Calling context: The caller of the sub-routine will be in critical section... The caller must hold the following spinlock pmlmepriv->lock */ int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv ) { _irqL irqL; int ret; _list *phead; _adapter *adapter; _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; struct wlan_network *candidate = NULL; u8 bSupportAntDiv = _FALSE; _func_enter_; adapter = (_adapter *)pmlmepriv->nic_hdl; _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); #ifdef CONFIG_LAYER2_ROAMING if (pmlmepriv->roam_network) { candidate = pmlmepriv->roam_network; pmlmepriv->roam_network = NULL; goto candidate_exist; } #endif phead = get_list_head(queue); pmlmepriv->pscanned = get_next(phead); while (!rtw_end_of_queue_search(phead, pmlmepriv->pscanned)) { pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list); if(pnetwork==NULL){ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s return _FAIL:(pnetwork==NULL)\n", __FUNCTION__)); ret = _FAIL; goto exit; } pmlmepriv->pscanned = get_next(pmlmepriv->pscanned); if (0) DBG_871X("%s("MAC_FMT", ch%u) rssi:%d\n" , pnetwork->network.Ssid.Ssid , MAC_ARG(pnetwork->network.MacAddress) , pnetwork->network.Configuration.DSConfig , (int)pnetwork->network.Rssi); rtw_check_join_candidate(pmlmepriv, &candidate, pnetwork); } if(candidate == NULL) { DBG_871X("%s: return _FAIL(candidate == NULL)\n", __FUNCTION__); #ifdef CONFIG_WOWLAN _clr_fwstate_(pmlmepriv, _FW_LINKED|_FW_UNDER_LINKING); #endif ret = _FAIL; goto exit; } else { DBG_871X("%s: candidate: %s("MAC_FMT", ch:%u)\n", __FUNCTION__, candidate->network.Ssid.Ssid, MAC_ARG(candidate->network.MacAddress), candidate->network.Configuration.DSConfig); goto candidate_exist; } candidate_exist: // check for situation of _FW_LINKED if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { DBG_871X("%s: _FW_LINKED while ask_for_joinbss!!!\n", __FUNCTION__); #if 0 // for WPA/WPA2 authentication, wpa_supplicant will expect authentication from AP, it is needed to reconnect AP... if(is_same_network(&pmlmepriv->cur_network.network, &candidate->network)) { DBG_871X("%s: _FW_LINKED and is same network, it needn't join again\n", __FUNCTION__); rtw_indicate_connect(adapter);//rtw_indicate_connect again ret = 2; goto exit; } else #endif { rtw_disassoc_cmd(adapter, 0, _TRUE); rtw_indicate_disconnect(adapter); rtw_free_assoc_resources(adapter, 0); } } #ifdef CONFIG_ANTENNA_DIVERSITY rtw_hal_get_def_var(adapter, HAL_DEF_IS_SUPPORT_ANT_DIV, &(bSupportAntDiv)); if(_TRUE == bSupportAntDiv) { u8 CurrentAntenna; rtw_hal_get_def_var(adapter, HAL_DEF_CURRENT_ANTENNA, &(CurrentAntenna)); DBG_871X("#### Opt_Ant_(%s) , cur_Ant(%s)\n", (2==candidate->network.PhyInfo.Optimum_antenna)?"A":"B", (2==CurrentAntenna)?"A":"B" ); } #endif set_fwstate(pmlmepriv, _FW_UNDER_LINKING); ret = rtw_joinbss_cmd(adapter, candidate); exit: _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); _func_exit_; return ret; } sint rtw_set_auth(_adapter * adapter,struct security_priv *psecuritypriv) { struct cmd_obj* pcmd; struct setauth_parm *psetauthparm; struct cmd_priv *pcmdpriv=&(adapter->cmdpriv); sint res=_SUCCESS; _func_enter_; pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(pcmd==NULL){ res= _FAIL; //try again goto exit; } psetauthparm=(struct setauth_parm*)rtw_zmalloc(sizeof(struct setauth_parm)); if(psetauthparm==NULL){ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } _rtw_memset(psetauthparm, 0, sizeof(struct setauth_parm)); psetauthparm->mode=(unsigned char)psecuritypriv->dot11AuthAlgrthm; pcmd->cmdcode = _SetAuth_CMD_; pcmd->parmbuf = (unsigned char *)psetauthparm; pcmd->cmdsz = (sizeof(struct setauth_parm)); pcmd->rsp = NULL; pcmd->rspsz = 0; _rtw_init_listhead(&pcmd->list); RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("after enqueue set_auth_cmd, auth_mode=%x\n", psecuritypriv->dot11AuthAlgrthm)); res = rtw_enqueue_cmd(pcmdpriv, pcmd); exit: _func_exit_; return res; } sint rtw_set_key(_adapter * adapter,struct security_priv *psecuritypriv,sint keyid, u8 set_tx, bool enqueue) { u8 keylen; struct cmd_obj *pcmd; struct setkey_parm *psetkeyparm; struct cmd_priv *pcmdpriv = &(adapter->cmdpriv); struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); sint res=_SUCCESS; _func_enter_; psetkeyparm=(struct setkey_parm*)rtw_zmalloc(sizeof(struct setkey_parm)); if(psetkeyparm==NULL){ res= _FAIL; goto exit; } _rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm)); if(psecuritypriv->dot11AuthAlgrthm ==dot11AuthAlgrthm_8021X){ psetkeyparm->algorithm=(unsigned char)psecuritypriv->dot118021XGrpPrivacy; RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n rtw_set_key: psetkeyparm->algorithm=(unsigned char)psecuritypriv->dot118021XGrpPrivacy=%d \n", psetkeyparm->algorithm)); } else{ psetkeyparm->algorithm=(u8)psecuritypriv->dot11PrivacyAlgrthm; RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n rtw_set_key: psetkeyparm->algorithm=(u8)psecuritypriv->dot11PrivacyAlgrthm=%d \n", psetkeyparm->algorithm)); } psetkeyparm->keyid = (u8)keyid;//0~3 psetkeyparm->set_tx = set_tx; if (is_wep_enc(psetkeyparm->algorithm)) adapter->securitypriv.key_mask |= BIT(psetkeyparm->keyid); DBG_871X("==> rtw_set_key algorithm(%x),keyid(%x),key_mask(%x)\n",psetkeyparm->algorithm,psetkeyparm->keyid, adapter->securitypriv.key_mask); RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n rtw_set_key: psetkeyparm->algorithm=%d psetkeyparm->keyid=(u8)keyid=%d \n",psetkeyparm->algorithm, keyid)); switch(psetkeyparm->algorithm){ case _WEP40_: keylen=5; _rtw_memcpy(&(psetkeyparm->key[0]), &(psecuritypriv->dot11DefKey[keyid].skey[0]), keylen); break; case _WEP104_: keylen=13; _rtw_memcpy(&(psetkeyparm->key[0]), &(psecuritypriv->dot11DefKey[keyid].skey[0]), keylen); break; case _TKIP_: keylen=16; _rtw_memcpy(&psetkeyparm->key, &psecuritypriv->dot118021XGrpKey[keyid], keylen); psetkeyparm->grpkey=1; break; case _AES_: keylen=16; _rtw_memcpy(&psetkeyparm->key, &psecuritypriv->dot118021XGrpKey[keyid], keylen); psetkeyparm->grpkey=1; break; default: RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n rtw_set_key:psecuritypriv->dot11PrivacyAlgrthm = %x (must be 1 or 2 or 4 or 5)\n",psecuritypriv->dot11PrivacyAlgrthm)); res= _FAIL; rtw_mfree((unsigned char *)psetkeyparm, sizeof(struct setkey_parm)); goto exit; } if(enqueue){ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(pcmd==NULL){ rtw_mfree((unsigned char *)psetkeyparm, sizeof(struct setkey_parm)); res= _FAIL; //try again goto exit; } pcmd->cmdcode = _SetKey_CMD_; pcmd->parmbuf = (u8 *)psetkeyparm; pcmd->cmdsz = (sizeof(struct setkey_parm)); pcmd->rsp = NULL; pcmd->rspsz = 0; _rtw_init_listhead(&pcmd->list); //_rtw_init_sema(&(pcmd->cmd_sem), 0); res = rtw_enqueue_cmd(pcmdpriv, pcmd); } else{ setkey_hdl(adapter, (u8 *)psetkeyparm); rtw_mfree((u8 *) psetkeyparm, sizeof(struct setkey_parm)); } exit: _func_exit_; return res; } //adjust IEs for rtw_joinbss_cmd in WMM int rtw_restruct_wmm_ie(_adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_len, uint initial_out_len) { unsigned int ielength=0; unsigned int i, j; i = 12; //after the fixed IE while(i=0 :if there is pre-auth key, and return the entry id // // static int SecIsInPMKIDList(_adapter *Adapter, u8 *bssid) { struct security_priv *psecuritypriv=&Adapter->securitypriv; int i=0; do { if( ( psecuritypriv->PMKIDList[i].bUsed ) && ( _rtw_memcmp( psecuritypriv->PMKIDList[i].Bssid, bssid, ETH_ALEN ) == _TRUE ) ) { break; } else { i++; //continue; } }while(isecuritypriv; if (ie[13] > 20) { int i; u16 pmkid_cnt = RTW_GET_LE16(ie+14+20); if (pmkid_cnt == 1 && _rtw_memcmp(ie+14+20+2, &sec->PMKIDList[iEntry].PMKID, 16)) { DBG_871X(FUNC_ADPT_FMT" has carried the same PMKID:"KEY_FMT"\n" , FUNC_ADPT_ARG(adapter), KEY_ARG(&sec->PMKIDList[iEntry].PMKID)); goto exit; } DBG_871X(FUNC_ADPT_FMT" remove original PMKID, count:%u\n" , FUNC_ADPT_ARG(adapter), pmkid_cnt); for (i=0;iPMKIDList[iEntry].PMKID)); RTW_PUT_LE16(&ie[ie_len], 1); ie_len += 2; _rtw_memcpy(&ie[ie_len], &sec->PMKIDList[iEntry].PMKID, 16); ie_len += 16; ie[13] += 18;//PMKID length = 2+16 } exit: return (ie_len); } static int rtw_remove_pmkid(_adapter *adapter, u8 *ie, uint ie_len) { struct security_priv *sec=&adapter->securitypriv; int i; u16 pmkid_cnt = RTW_GET_LE16(ie+14+20); if (ie[13] <= 20) goto exit; DBG_871X(FUNC_ADPT_FMT" remove original PMKID, count:%u\n" , FUNC_ADPT_ARG(adapter), pmkid_cnt); for (i=0;imlmepriv; struct security_priv *psecuritypriv=&adapter->securitypriv; uint ndisauthmode=psecuritypriv->ndisauthtype; uint ndissecuritytype = psecuritypriv->ndisencryptstatus; _func_enter_; RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+rtw_restruct_sec_ie: ndisauthmode=%d ndissecuritytype=%d\n", ndisauthmode, ndissecuritytype)); //copy fixed ie only _rtw_memcpy(out_ie, in_ie,12); ielength=12; if((ndisauthmode==Ndis802_11AuthModeWPA)||(ndisauthmode==Ndis802_11AuthModeWPAPSK)) authmode=_WPA_IE_ID_; if((ndisauthmode==Ndis802_11AuthModeWPA2)||(ndisauthmode==Ndis802_11AuthModeWPA2PSK)) authmode=_WPA2_IE_ID_; if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) { _rtw_memcpy(out_ie+ielength, psecuritypriv->wps_ie, psecuritypriv->wps_ie_len); ielength += psecuritypriv->wps_ie_len; } else if((authmode==_WPA_IE_ID_)||(authmode==_WPA2_IE_ID_)) { //copy RSN or SSN _rtw_memcpy(&out_ie[ielength], &psecuritypriv->supplicant_ie[0], psecuritypriv->supplicant_ie[1]+2); /* debug for CONFIG_IEEE80211W { int jj; printk("supplicant_ie_length=%d &&&&&&&&&&&&&&&&&&&\n", psecuritypriv->supplicant_ie[1]+2); for(jj=0; jj < psecuritypriv->supplicant_ie[1]+2; jj++) printk(" %02x ", psecuritypriv->supplicant_ie[jj]); printk("\n"); }*/ ielength+=psecuritypriv->supplicant_ie[1]+2; rtw_report_sec_ie(adapter, authmode, psecuritypriv->supplicant_ie); #ifdef CONFIG_DRVEXT_MODULE drvext_report_sec_ie(&adapter->drvextpriv, authmode, sec_ie); #endif } iEntry = SecIsInPMKIDList(adapter, pmlmepriv->assoc_bssid); if(iEntry<0) { if(authmode == _WPA2_IE_ID_) ielength = rtw_remove_pmkid(adapter, out_ie, ielength); } else { if(authmode == _WPA2_IE_ID_) ielength=rtw_append_pmkid(adapter, iEntry, out_ie, ielength); } _func_exit_; return ielength; } void rtw_init_registrypriv_dev_network( _adapter* adapter) { struct registry_priv* pregistrypriv = &adapter->registrypriv; struct eeprom_priv* peepriv = &adapter->eeprompriv; WLAN_BSSID_EX *pdev_network = &pregistrypriv->dev_network; u8 *myhwaddr = myid(peepriv); _func_enter_; _rtw_memcpy(pdev_network->MacAddress, myhwaddr, ETH_ALEN); _rtw_memcpy(&pdev_network->Ssid, &pregistrypriv->ssid, sizeof(NDIS_802_11_SSID)); pdev_network->Configuration.Length=sizeof(NDIS_802_11_CONFIGURATION); pdev_network->Configuration.BeaconPeriod = 100; pdev_network->Configuration.FHConfig.Length = 0; pdev_network->Configuration.FHConfig.HopPattern = 0; pdev_network->Configuration.FHConfig.HopSet = 0; pdev_network->Configuration.FHConfig.DwellTime = 0; _func_exit_; } void rtw_update_registrypriv_dev_network(_adapter* adapter) { int sz=0; struct registry_priv* pregistrypriv = &adapter->registrypriv; WLAN_BSSID_EX *pdev_network = &pregistrypriv->dev_network; struct security_priv* psecuritypriv = &adapter->securitypriv; struct wlan_network *cur_network = &adapter->mlmepriv.cur_network; //struct xmit_priv *pxmitpriv = &adapter->xmitpriv; _func_enter_; #if 0 pxmitpriv->vcs_setting = pregistrypriv->vrtl_carrier_sense; pxmitpriv->vcs = pregistrypriv->vcs_type; pxmitpriv->vcs_type = pregistrypriv->vcs_type; //pxmitpriv->rts_thresh = pregistrypriv->rts_thresh; pxmitpriv->frag_len = pregistrypriv->frag_thresh; adapter->qospriv.qos_option = pregistrypriv->wmm_enable; #endif pdev_network->Privacy = (psecuritypriv->dot11PrivacyAlgrthm > 0 ? 1 : 0) ; // adhoc no 802.1x pdev_network->Rssi = 0; switch(pregistrypriv->wireless_mode) { case WIRELESS_11B: pdev_network->NetworkTypeInUse = (Ndis802_11DS); break; case WIRELESS_11G: case WIRELESS_11BG: case WIRELESS_11_24N: case WIRELESS_11G_24N: case WIRELESS_11BG_24N: pdev_network->NetworkTypeInUse = (Ndis802_11OFDM24); break; case WIRELESS_11A: case WIRELESS_11A_5N: pdev_network->NetworkTypeInUse = (Ndis802_11OFDM5); break; case WIRELESS_11ABGN: if(pregistrypriv->channel > 14) pdev_network->NetworkTypeInUse = (Ndis802_11OFDM5); else pdev_network->NetworkTypeInUse = (Ndis802_11OFDM24); break; default : // TODO break; } pdev_network->Configuration.DSConfig = (pregistrypriv->channel); RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("pregistrypriv->channel=%d, pdev_network->Configuration.DSConfig=0x%x\n", pregistrypriv->channel, pdev_network->Configuration.DSConfig)); if(cur_network->network.InfrastructureMode == Ndis802_11IBSS) pdev_network->Configuration.ATIMWindow = (0); pdev_network->InfrastructureMode = (cur_network->network.InfrastructureMode); // 1. Supported rates // 2. IE //rtw_set_supported_rate(pdev_network->SupportedRates, pregistrypriv->wireless_mode) ; // will be called in rtw_generate_ie sz = rtw_generate_ie(pregistrypriv); pdev_network->IELength = sz; pdev_network->Length = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX *)pdev_network); //notes: translate IELength & Length after assign the Length to cmdsz in createbss_cmd(); //pdev_network->IELength = cpu_to_le32(sz); _func_exit_; } void rtw_get_encrypt_decrypt_from_registrypriv(_adapter* adapter) { _func_enter_; _func_exit_; } //the fucntion is at passive_level void rtw_joinbss_reset(_adapter *padapter) { u8 threshold; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; //todo: if you want to do something io/reg/hw setting before join_bss, please add code here #ifdef CONFIG_80211N_HT struct ht_priv *phtpriv = &pmlmepriv->htpriv; pmlmepriv->num_FortyMHzIntolerant = 0; pmlmepriv->num_sta_no_ht = 0; phtpriv->ampdu_enable = _FALSE;//reset to disabled #if defined( CONFIG_USB_HCI) || defined (CONFIG_SDIO_HCI) // TH=1 => means that invalidate usb rx aggregation // TH=0 => means that validate usb rx aggregation, use init value. if(phtpriv->ht_option) { if(padapter->registrypriv.wifi_spec==1) threshold = 1; else threshold = 0; rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); } else { threshold = 1; rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); } #endif//#if defined( CONFIG_USB_HCI) || defined (CONFIG_SDIO_HCI) #endif//#ifdef CONFIG_80211N_HT } #ifdef CONFIG_80211N_HT void rtw_ht_use_default_setting(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct ht_priv *phtpriv = &pmlmepriv->htpriv; struct registry_priv *pregistrypriv = &padapter->registrypriv; BOOLEAN bHwLDPCSupport = _FALSE, bHwSTBCSupport = _FALSE; BOOLEAN bHwSupportBeamformer = _FALSE, bHwSupportBeamformee = _FALSE; if (pregistrypriv->wifi_spec) phtpriv->bss_coexist = 1; else phtpriv->bss_coexist = 0; phtpriv->sgi_40m = TEST_FLAG(pregistrypriv->short_gi, BIT1) ? _TRUE : _FALSE; phtpriv->sgi_20m = TEST_FLAG(pregistrypriv->short_gi, BIT0) ? _TRUE : _FALSE; // LDPC support rtw_hal_get_def_var(padapter, HAL_DEF_RX_LDPC, (u8 *)&bHwLDPCSupport); CLEAR_FLAGS(phtpriv->ldpc_cap); if(bHwLDPCSupport) { if(TEST_FLAG(pregistrypriv->ldpc_cap, BIT4)) SET_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_RX); } rtw_hal_get_def_var(padapter, HAL_DEF_TX_LDPC, (u8 *)&bHwLDPCSupport); if(bHwLDPCSupport) { if(TEST_FLAG(pregistrypriv->ldpc_cap, BIT5)) SET_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_TX); } if (phtpriv->ldpc_cap) DBG_871X("[HT] Support LDPC = 0x%02X\n", phtpriv->ldpc_cap); // STBC rtw_hal_get_def_var(padapter, HAL_DEF_TX_STBC, (u8 *)&bHwSTBCSupport); CLEAR_FLAGS(phtpriv->stbc_cap); if(bHwSTBCSupport) { if(TEST_FLAG(pregistrypriv->stbc_cap, BIT5)) SET_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX); } rtw_hal_get_def_var(padapter, HAL_DEF_RX_STBC, (u8 *)&bHwSTBCSupport); if(bHwSTBCSupport) { if(TEST_FLAG(pregistrypriv->stbc_cap, BIT4)) SET_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_RX); } if (phtpriv->stbc_cap) DBG_871X("[HT] Support STBC = 0x%02X\n", phtpriv->stbc_cap); // Beamforming setting rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMER, (u8 *)&bHwSupportBeamformer); rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMEE, (u8 *)&bHwSupportBeamformee); CLEAR_FLAGS(phtpriv->beamform_cap); if(TEST_FLAG(pregistrypriv->beamform_cap, BIT4) && bHwSupportBeamformer) { SET_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); DBG_871X("[HT] Support Beamformer\n"); } if(TEST_FLAG(pregistrypriv->beamform_cap, BIT5) && bHwSupportBeamformee) { SET_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); DBG_871X("[HT] Support Beamformee\n"); } } void rtw_build_wmm_ie_ht(_adapter *padapter, u8 *out_ie, uint *pout_len) { unsigned char WMM_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00}; int out_len; u8 *pframe; if(padapter->mlmepriv.qospriv.qos_option == 0) { out_len = *pout_len; pframe = rtw_set_ie(out_ie+out_len, _VENDOR_SPECIFIC_IE_, _WMM_IE_Length_, WMM_IE, pout_len); padapter->mlmepriv.qospriv.qos_option = 1; } } /* the fucntion is >= passive_level */ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len, u8 channel) { u32 ielen, out_len; HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor; unsigned char *p, *pframe; struct rtw_ieee80211_ht_cap ht_capie; u8 cbw40_enable = 0, stbc_rx_enable = 0, rf_type = 0, operation_bw=0; struct registry_priv *pregistrypriv = &padapter->registrypriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct ht_priv *phtpriv = &pmlmepriv->htpriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; phtpriv->ht_option = _FALSE; out_len = *pout_len; _rtw_memset(&ht_capie, 0, sizeof(struct rtw_ieee80211_ht_cap)); ht_capie.cap_info = IEEE80211_HT_CAP_DSSSCCK40; if (phtpriv->sgi_20m) ht_capie.cap_info |= IEEE80211_HT_CAP_SGI_20; /* Get HT BW */ if (in_ie == NULL) { /* TDLS: TODO 20/40 issue */ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { operation_bw = padapter->mlmeextpriv.cur_bwmode; if (operation_bw > CHANNEL_WIDTH_40) operation_bw = CHANNEL_WIDTH_40; } else /* TDLS: TODO 40? */ operation_bw = CHANNEL_WIDTH_40; } else { p = rtw_get_ie(in_ie, _HT_ADD_INFO_IE_, &ielen, in_len); if (p && (ielen == sizeof(struct ieee80211_ht_addt_info))) { struct HT_info_element *pht_info = (struct HT_info_element *)(p+2); if (pht_info->infos[0] & BIT(2)) { switch (pht_info->infos[0] & 0x3) { case 1: case 3: operation_bw = CHANNEL_WIDTH_40; break; default: operation_bw = CHANNEL_WIDTH_20; break; } } else { operation_bw = CHANNEL_WIDTH_20; } } } /* to disable 40M Hz support while gd_bw_40MHz_en = 0 */ if (channel > 14) { if ((pregistrypriv->bw_mode & 0xf0) > 0) cbw40_enable = 1; } else { if ((pregistrypriv->bw_mode & 0x0f) > 0) cbw40_enable = 1; } if ((cbw40_enable == 1) && (operation_bw == CHANNEL_WIDTH_40)) { ht_capie.cap_info |= IEEE80211_HT_CAP_SUP_WIDTH; if (phtpriv->sgi_40m) ht_capie.cap_info |= IEEE80211_HT_CAP_SGI_40; } if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX)) ht_capie.cap_info |= IEEE80211_HT_CAP_TX_STBC; /* todo: disable SM power save mode */ ht_capie.cap_info |= IEEE80211_HT_CAP_SM_PS; if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_RX)) { if((pregistrypriv->rx_stbc == 0x3) || /* enable for 2.4/5 GHz */ ((channel <= 14) && (pregistrypriv->rx_stbc == 0x1)) || /* enable for 2.4GHz */ ((channel > 14) && (pregistrypriv->rx_stbc == 0x2)) || /* enable for 5GHz */ (pregistrypriv->wifi_spec == 1)) { stbc_rx_enable = 1; DBG_871X("declare supporting RX STBC\n"); } } //fill default supported_mcs_set _rtw_memcpy(ht_capie.supp_mcs_set, pmlmeext->default_supported_mcs_set, 16); //update default supported_mcs_set rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); switch(rf_type) { case RF_1T1R: if (stbc_rx_enable) ht_capie.cap_info |= IEEE80211_HT_CAP_RX_STBC_1R;//RX STBC One spatial stream set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_1R); break; case RF_2T2R: case RF_1T2R: default: if (stbc_rx_enable) ht_capie.cap_info |= IEEE80211_HT_CAP_RX_STBC_2R;//RX STBC two spatial stream #ifdef CONFIG_DISABLE_MCS13TO15 if(((cbw40_enable == 1) && (operation_bw == CHANNEL_WIDTH_40)) && (pregistrypriv->wifi_spec!=1)) set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_2R_13TO15_OFF); else set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_2R); #else //CONFIG_DISABLE_MCS13TO15 set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_2R); #endif //CONFIG_DISABLE_MCS13TO15 break; } { u32 rx_packet_offset, max_recvbuf_sz; rtw_hal_get_def_var(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset); rtw_hal_get_def_var(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz); //if(max_recvbuf_sz-rx_packet_offset>(8191-256)) { // DBG_871X("%s IEEE80211_HT_CAP_MAX_AMSDU is set\n", __FUNCTION__); // ht_capie.cap_info = ht_capie.cap_info |IEEE80211_HT_CAP_MAX_AMSDU; //} } /* AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k AMPDU_para [4:2]:Min MPDU Start Spacing */ /* #if defined(CONFIG_RTL8188E )&& defined (CONFIG_SDIO_HCI) ht_capie.ampdu_params_info = 2; #else ht_capie.ampdu_params_info = (IEEE80211_HT_CAP_AMPDU_FACTOR&0x03); #endif */ if(padapter->driver_rx_ampdu_factor != 0xFF) max_rx_ampdu_factor = (HT_CAP_AMPDU_FACTOR)padapter->driver_rx_ampdu_factor; else rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); //rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); ht_capie.ampdu_params_info = (max_rx_ampdu_factor&0x03); if(padapter->driver_rx_ampdu_spacing != 0xFF) { ht_capie.ampdu_params_info |= (( padapter->driver_rx_ampdu_spacing&0x07) <<2); } else { if(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_ ) ht_capie.ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&(0x07<<2)); else ht_capie.ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&0x00); } #ifdef CONFIG_BEAMFORMING ht_capie.tx_BF_cap_info = 0; // HT Beamformer if(TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) { // Transmit NDP Capable SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(&ht_capie, 1); // Explicit Compressed Steering Capable SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(&ht_capie, 1); // Compressed Steering Number Antennas SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(&ht_capie, 1); } // HT Beamformee if(TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) { // Receive NDP Capable SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(&ht_capie, 1); // Explicit Compressed Beamforming Feedback Capable SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(&ht_capie, 2); } #endif pframe = rtw_set_ie(out_ie+out_len, _HT_CAPABILITY_IE_, sizeof(struct rtw_ieee80211_ht_cap), (unsigned char*)&ht_capie, pout_len); phtpriv->ht_option = _TRUE; if(in_ie!=NULL) { p = rtw_get_ie(in_ie, _HT_ADD_INFO_IE_, &ielen, in_len); if(p && (ielen==sizeof(struct ieee80211_ht_addt_info))) { out_len = *pout_len; pframe = rtw_set_ie(out_ie+out_len, _HT_ADD_INFO_IE_, ielen, p+2 , pout_len); } } return (phtpriv->ht_option); } //the fucntion is > passive_level (in critical_section) void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len, u8 channel) { u8 *p, max_ampdu_sz; int len; //struct sta_info *bmc_sta, *psta; struct rtw_ieee80211_ht_cap *pht_capie; struct ieee80211_ht_addt_info *pht_addtinfo; //struct recv_reorder_ctrl *preorder_ctrl; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct ht_priv *phtpriv = &pmlmepriv->htpriv; //struct recv_priv *precvpriv = &padapter->recvpriv; struct registry_priv *pregistrypriv = &padapter->registrypriv; //struct wlan_network *pcur_network = &(pmlmepriv->cur_network);; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 cbw40_enable=0; if(!phtpriv->ht_option) return; if ((!pmlmeinfo->HT_info_enable) || (!pmlmeinfo->HT_caps_enable)) return; DBG_871X("+rtw_update_ht_cap()\n"); //maybe needs check if ap supports rx ampdu. if((phtpriv->ampdu_enable==_FALSE) &&(pregistrypriv->ampdu_enable==1)) { if(pregistrypriv->wifi_spec==1) { //remove this part because testbed AP should disable RX AMPDU //phtpriv->ampdu_enable = _FALSE; phtpriv->ampdu_enable = _TRUE; } else { phtpriv->ampdu_enable = _TRUE; } } else if(pregistrypriv->ampdu_enable==2) { //remove this part because testbed AP should disable RX AMPDU //phtpriv->ampdu_enable = _TRUE; } //check Max Rx A-MPDU Size len = 0; p = rtw_get_ie(pie+sizeof (NDIS_802_11_FIXED_IEs), _HT_CAPABILITY_IE_, &len, ie_len-sizeof (NDIS_802_11_FIXED_IEs)); if(p && len>0) { pht_capie = (struct rtw_ieee80211_ht_cap *)(p+2); max_ampdu_sz = (pht_capie->ampdu_params_info & IEEE80211_HT_CAP_AMPDU_FACTOR); max_ampdu_sz = 1 << (max_ampdu_sz+3); // max_ampdu_sz (kbytes); //DBG_871X("rtw_update_ht_cap(): max_ampdu_sz=%d\n", max_ampdu_sz); phtpriv->rx_ampdu_maxlen = max_ampdu_sz; } len=0; p = rtw_get_ie(pie+sizeof (NDIS_802_11_FIXED_IEs), _HT_ADD_INFO_IE_, &len, ie_len-sizeof (NDIS_802_11_FIXED_IEs)); if(p && len>0) { pht_addtinfo = (struct ieee80211_ht_addt_info *)(p+2); //todo: } if (channel > 14) { if ((pregistrypriv->bw_mode & 0xf0) > 0) cbw40_enable = 1; } else { if ((pregistrypriv->bw_mode & 0x0f) > 0) cbw40_enable = 1; } //update cur_bwmode & cur_ch_offset if ((cbw40_enable) && (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & BIT(1)) && (pmlmeinfo->HT_info.infos[0] & BIT(2))) { int i; u8 rf_type; rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); //update the MCS set for (i = 0; i < 16; i++) pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= pmlmeext->default_supported_mcs_set[i]; //update the MCS rates switch(rf_type) { case RF_1T1R: case RF_1T2R: set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_1R); break; case RF_2T2R: default: #ifdef CONFIG_DISABLE_MCS13TO15 if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_40 && pregistrypriv->wifi_spec != 1 ) set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R_13TO15_OFF); else set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R); #else //CONFIG_DISABLE_MCS13TO15 set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R); #endif //CONFIG_DISABLE_MCS13TO15 } //switch to the 40M Hz mode accoring to the AP //pmlmeext->cur_bwmode = CHANNEL_WIDTH_40; switch ((pmlmeinfo->HT_info.infos[0] & 0x3)) { case EXTCHNL_OFFSET_UPPER: pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; break; case EXTCHNL_OFFSET_LOWER: pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; break; default: pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; break; } } // // Config SM Power Save setting // pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & 0x0C) >> 2; if(pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC) { /*u8 i; //update the MCS rates for (i = 0; i < 16; i++) { pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; }*/ DBG_871X("%s(): WLAN_HT_CAP_SM_PS_STATIC\n",__FUNCTION__); } // // Config current HT Protection mode. // pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; #if 0 //move to rtw_update_sta_info_client() //for A-MPDU Rx reordering buffer control for bmc_sta & sta_info //if A-MPDU Rx is enabled, reseting rx_ordering_ctrl wstart_b(indicate_seq) to default value=0xffff //todo: check if AP can send A-MPDU packets bmc_sta = rtw_get_bcmc_stainfo(padapter); if(bmc_sta) { for(i=0; i < 16 ; i++) { //preorder_ctrl = &precvpriv->recvreorder_ctrl[i]; preorder_ctrl = &bmc_sta->recvreorder_ctrl[i]; preorder_ctrl->enable = _FALSE; preorder_ctrl->indicate_seq = 0xffff; #ifdef DBG_RX_SEQ DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, preorder_ctrl->indicate_seq); #endif preorder_ctrl->wend_b= 0xffff; preorder_ctrl->wsize_b = 64;//max_ampdu_sz;//ex. 32(kbytes) -> wsize_b=32 } } psta = rtw_get_stainfo(&padapter->stapriv, pcur_network->network.MacAddress); if(psta) { for(i=0; i < 16 ; i++) { //preorder_ctrl = &precvpriv->recvreorder_ctrl[i]; preorder_ctrl = &psta->recvreorder_ctrl[i]; preorder_ctrl->enable = _FALSE; preorder_ctrl->indicate_seq = 0xffff; #ifdef DBG_RX_SEQ DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, preorder_ctrl->indicate_seq); #endif preorder_ctrl->wend_b= 0xffff; preorder_ctrl->wsize_b = 64;//max_ampdu_sz;//ex. 32(kbytes) -> wsize_b=32 } } #endif } #ifdef CONFIG_TDLS void rtw_issue_addbareq_cmd_tdls(_adapter *padapter, struct xmit_frame *pxmitframe) { struct pkt_attrib *pattrib =&pxmitframe->attrib; struct sta_info *ptdls_sta = NULL; u8 issued; int priority; struct ht_priv *phtpriv; priority = pattrib->priority; if(pattrib->direct_link == _TRUE) { ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->dst); if((ptdls_sta != NULL) && (ptdls_sta->tdls_sta_state & TDLS_ESTABLISHED)) { phtpriv = &ptdls_sta->htpriv; if((phtpriv->ht_option==_TRUE) && (phtpriv->ampdu_enable==_TRUE)) { issued = (phtpriv->agg_enable_bitmap>>priority)&0x1; issued |= (phtpriv->candidate_tid_bitmap>>priority)&0x1; if(0==issued) { DBG_871X("rtw_issue_addbareq_cmd, p=%d\n", priority); ptdls_sta->htpriv.candidate_tid_bitmap |= BIT((u8)priority); rtw_addbareq_cmd(padapter,(u8)priority, pattrib->dst); } } } } } #endif //CONFIG_TDLS void rtw_issue_addbareq_cmd(_adapter *padapter, struct xmit_frame *pxmitframe) { u8 issued; int priority; struct sta_info *psta=NULL; struct ht_priv *phtpriv; struct pkt_attrib *pattrib =&pxmitframe->attrib; s32 bmcst = IS_MCAST(pattrib->ra); //if(bmcst || (padapter->mlmepriv.LinkDetectInfo.bTxBusyTraffic == _FALSE)) if(bmcst || (padapter->mlmepriv.LinkDetectInfo.NumTxOkInPeriod<100)) return; priority = pattrib->priority; #ifdef CONFIG_TDLS rtw_issue_addbareq_cmd_tdls(padapter, pxmitframe); #endif //CONFIG_TDLS psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); if(pattrib->psta != psta) { DBG_871X("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pattrib->psta, psta); return; } if(psta==NULL) { DBG_871X("%s, psta==NUL\n", __func__); return; } if(!(psta->state &_FW_LINKED)) { DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); return; } phtpriv = &psta->htpriv; if((phtpriv->ht_option==_TRUE) && (phtpriv->ampdu_enable==_TRUE)) { issued = (phtpriv->agg_enable_bitmap>>priority)&0x1; issued |= (phtpriv->candidate_tid_bitmap>>priority)&0x1; if(0==issued) { DBG_871X("rtw_issue_addbareq_cmd, p=%d\n", priority); psta->htpriv.candidate_tid_bitmap |= BIT((u8)priority); rtw_addbareq_cmd(padapter,(u8) priority, pattrib->ra); } } } void rtw_append_exented_cap(_adapter *padapter, u8 *out_ie, uint *pout_len) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct ht_priv *phtpriv = &pmlmepriv->htpriv; #ifdef CONFIG_80211AC_VHT struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; #endif //CONFIG_80211AC_VHT u8 cap_content[8] = {0}; u8 *pframe; if (phtpriv->bss_coexist) { SET_EXT_CAPABILITY_ELE_BSS_COEXIST(cap_content, 1); } #ifdef CONFIG_80211AC_VHT if (pvhtpriv->vht_option) { SET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(cap_content, 1); } #endif //CONFIG_80211AC_VHT pframe = rtw_set_ie(out_ie+*pout_len, EID_EXTCapability, 8, cap_content , pout_len); } #endif #ifdef CONFIG_LAYER2_ROAMING inline void rtw_set_to_roam(_adapter *adapter, u8 to_roam) { if (to_roam == 0) adapter->mlmepriv.to_join = _FALSE; adapter->mlmepriv.to_roam = to_roam; } inline u8 rtw_dec_to_roam(_adapter *adapter) { adapter->mlmepriv.to_roam--; return adapter->mlmepriv.to_roam; } inline u8 rtw_to_roam(_adapter *adapter) { return adapter->mlmepriv.to_roam; } void rtw_roaming(_adapter *padapter, struct wlan_network *tgt_network) { _irqL irqL; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _enter_critical_bh(&pmlmepriv->lock, &irqL); _rtw_roaming(padapter, tgt_network); _exit_critical_bh(&pmlmepriv->lock, &irqL); } void _rtw_roaming(_adapter *padapter, struct wlan_network *tgt_network) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wlan_network *cur_network = &pmlmepriv->cur_network; int do_join_r; if(0 < rtw_to_roam(padapter)) { DBG_871X("roaming from %s("MAC_FMT"), length:%d\n", cur_network->network.Ssid.Ssid, MAC_ARG(cur_network->network.MacAddress), cur_network->network.Ssid.SsidLength); _rtw_memcpy(&pmlmepriv->assoc_ssid, &cur_network->network.Ssid, sizeof(NDIS_802_11_SSID)); pmlmepriv->assoc_by_bssid = _FALSE; #ifdef CONFIG_WAPI_SUPPORT rtw_wapi_return_all_sta_info(padapter); #endif while(1) { if( _SUCCESS==(do_join_r=rtw_do_join(padapter)) ) { break; } else { DBG_871X("roaming do_join return %d\n", do_join_r); rtw_dec_to_roam(padapter); if(rtw_to_roam(padapter) > 0) { continue; } else { DBG_871X("%s(%d) -to roaming fail, indicate_disconnect\n", __FUNCTION__,__LINE__); rtw_indicate_disconnect(padapter); break; } } } } } #endif /* CONFIG_LAYER2_ROAMING */ sint rtw_linked_check(_adapter *padapter) { if( (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) || (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE)) { if(padapter->stapriv.asoc_sta_count > 2) return _TRUE; } else { //Station mode if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)== _TRUE) return _TRUE; } return _FALSE; } #ifdef CONFIG_CONCURRENT_MODE sint rtw_buddy_adapter_up(_adapter *padapter) { sint res = _FALSE; if(padapter == NULL) return res; if(padapter->pbuddy_adapter == NULL) { res = _FALSE; } else if( (padapter->pbuddy_adapter->bDriverStopped) || (padapter->pbuddy_adapter->bSurpriseRemoved) || (padapter->pbuddy_adapter->bup == _FALSE) || (padapter->pbuddy_adapter->hw_init_completed == _FALSE)) { res = _FALSE; } else { res = _TRUE; } return res; } sint check_buddy_fwstate(_adapter *padapter, sint state) { if(padapter == NULL) return _FALSE; if(padapter->pbuddy_adapter == NULL) return _FALSE; if ((state == WIFI_FW_NULL_STATE) && (padapter->pbuddy_adapter->mlmepriv.fw_state == WIFI_FW_NULL_STATE)) return _TRUE; if (padapter->pbuddy_adapter->mlmepriv.fw_state & state) return _TRUE; return _FALSE; } u8 rtw_get_buddy_bBusyTraffic(_adapter *padapter) { if(padapter == NULL) return _FALSE; if(padapter->pbuddy_adapter == NULL) return _FALSE; return padapter->pbuddy_adapter->mlmepriv.LinkDetectInfo.bBusyTraffic; } #endif //CONFIG_CONCURRENT_MODE rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_mlme_ext.c000077500000000000000000014742551261122257400213260ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_MLME_EXT_C_ #include #ifdef CONFIG_IOCTL_CFG80211 #include #endif //CONFIG_IOCTL_CFG80211 struct mlme_handler mlme_sta_tbl[]={ {WIFI_ASSOCREQ, "OnAssocReq", &OnAssocReq}, {WIFI_ASSOCRSP, "OnAssocRsp", &OnAssocRsp}, {WIFI_REASSOCREQ, "OnReAssocReq", &OnAssocReq}, {WIFI_REASSOCRSP, "OnReAssocRsp", &OnAssocRsp}, {WIFI_PROBEREQ, "OnProbeReq", &OnProbeReq}, {WIFI_PROBERSP, "OnProbeRsp", &OnProbeRsp}, /*---------------------------------------------------------- below 2 are reserved -----------------------------------------------------------*/ {0, "DoReserved", &DoReserved}, {0, "DoReserved", &DoReserved}, {WIFI_BEACON, "OnBeacon", &OnBeacon}, {WIFI_ATIM, "OnATIM", &OnAtim}, {WIFI_DISASSOC, "OnDisassoc", &OnDisassoc}, {WIFI_AUTH, "OnAuth", &OnAuthClient}, {WIFI_DEAUTH, "OnDeAuth", &OnDeAuth}, {WIFI_ACTION, "OnAction", &OnAction}, {WIFI_ACTION_NOACK,"OnActionNoAck", &OnAction}, }; #ifdef _CONFIG_NATIVEAP_MLME_ struct mlme_handler mlme_ap_tbl[]={ {WIFI_ASSOCREQ, "OnAssocReq", &OnAssocReq}, {WIFI_ASSOCRSP, "OnAssocRsp", &OnAssocRsp}, {WIFI_REASSOCREQ, "OnReAssocReq", &OnAssocReq}, {WIFI_REASSOCRSP, "OnReAssocRsp", &OnAssocRsp}, {WIFI_PROBEREQ, "OnProbeReq", &OnProbeReq}, {WIFI_PROBERSP, "OnProbeRsp", &OnProbeRsp}, /*---------------------------------------------------------- below 2 are reserved -----------------------------------------------------------*/ {0, "DoReserved", &DoReserved}, {0, "DoReserved", &DoReserved}, {WIFI_BEACON, "OnBeacon", &OnBeacon}, {WIFI_ATIM, "OnATIM", &OnAtim}, {WIFI_DISASSOC, "OnDisassoc", &OnDisassoc}, {WIFI_AUTH, "OnAuth", &OnAuth}, {WIFI_DEAUTH, "OnDeAuth", &OnDeAuth}, {WIFI_ACTION, "OnAction", &OnAction}, {WIFI_ACTION_NOACK,"OnActionNoAck", &OnAction}, }; #endif struct action_handler OnAction_tbl[]={ {RTW_WLAN_CATEGORY_SPECTRUM_MGMT, "ACTION_SPECTRUM_MGMT", on_action_spct}, {RTW_WLAN_CATEGORY_QOS, "ACTION_QOS", &OnAction_qos}, {RTW_WLAN_CATEGORY_DLS, "ACTION_DLS", &OnAction_dls}, {RTW_WLAN_CATEGORY_BACK, "ACTION_BACK", &OnAction_back}, {RTW_WLAN_CATEGORY_PUBLIC, "ACTION_PUBLIC", on_action_public}, {RTW_WLAN_CATEGORY_RADIO_MEASUREMENT, "ACTION_RADIO_MEASUREMENT", &DoReserved}, {RTW_WLAN_CATEGORY_FT, "ACTION_FT", &DoReserved}, {RTW_WLAN_CATEGORY_HT, "ACTION_HT", &OnAction_ht}, #ifdef CONFIG_IEEE80211W {RTW_WLAN_CATEGORY_SA_QUERY, "ACTION_SA_QUERY", &OnAction_sa_query}, #else {RTW_WLAN_CATEGORY_SA_QUERY, "ACTION_SA_QUERY", &DoReserved}, #endif //CONFIG_IEEE80211W //add for CONFIG_IEEE80211W {RTW_WLAN_CATEGORY_UNPROTECTED_WNM, "ACTION_UNPROTECTED_WNM", &DoReserved}, {RTW_WLAN_CATEGORY_SELF_PROTECTED, "ACTION_SELF_PROTECTED", &DoReserved}, {RTW_WLAN_CATEGORY_WMM, "ACTION_WMM", &OnAction_wmm}, {RTW_WLAN_CATEGORY_VHT, "ACTION_VHT", &OnAction_vht}, {RTW_WLAN_CATEGORY_P2P, "ACTION_P2P", &OnAction_p2p}, }; u8 null_addr[ETH_ALEN]= {0,0,0,0,0,0}; /************************************************** OUI definitions for the vendor specific IE ***************************************************/ unsigned char RTW_WPA_OUI[] = {0x00, 0x50, 0xf2, 0x01}; unsigned char WMM_OUI[] = {0x00, 0x50, 0xf2, 0x02}; unsigned char WPS_OUI[] = {0x00, 0x50, 0xf2, 0x04}; unsigned char P2P_OUI[] = {0x50,0x6F,0x9A,0x09}; unsigned char WFD_OUI[] = {0x50,0x6F,0x9A,0x0A}; unsigned char WMM_INFO_OUI[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01}; unsigned char WMM_PARA_OUI[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; unsigned char WPA_TKIP_CIPHER[4] = {0x00, 0x50, 0xf2, 0x02}; unsigned char RSN_TKIP_CIPHER[4] = {0x00, 0x0f, 0xac, 0x02}; extern unsigned char REALTEK_96B_IE[]; /******************************************************** ChannelPlan definitions *********************************************************/ /*static RT_CHANNEL_PLAN DefaultChannelPlan[RT_CHANNEL_DOMAIN_MAX] = { {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},32}, // 0x00, RT_CHANNEL_DOMAIN_FCC {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},31}, // 0x01, RT_CHANNEL_DOMAIN_IC {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140},32}, // 0x02, RT_CHANNEL_DOMAIN_ETSI {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x03, RT_CHANNEL_DOMAIN_SPAIN {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x04, RT_CHANNEL_DOMAIN_FRANCE {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x05, RT_CHANNEL_DOMAIN_MKK {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x06, RT_CHANNEL_DOMAIN_MKK1 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, // 0x07, RT_CHANNEL_DOMAIN_ISRAEL {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // 0x08, RT_CHANNEL_DOMAIN_TELEC {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, // 0x09, RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x0A, RT_CHANNEL_DOMAIN_WORLD_WIDE_13 {{1,2,3,4,5,6,7,8,9,10,11,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},26}, // 0x0B, RT_CHANNEL_DOMAIN_TAIWAN {{1,2,3,4,5,6,7,8,9,10,11,12,13,149,153,157,161,165},18}, // 0x0C, RT_CHANNEL_DOMAIN_CHINA {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, // 0x0D, RT_CHANNEL_DOMAIN_SINGAPORE_INDIA_MEXICO {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161,165},31}, // 0x0E, RT_CHANNEL_DOMAIN_KOREA {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19}, // 0x0F, RT_CHANNEL_DOMAIN_TURKEY {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140},32}, // 0x10, RT_CHANNEL_DOMAIN_JAPAN {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,149,153,157,161,165},20}, // 0x11, RT_CHANNEL_DOMAIN_FCC_NO_DFS {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48},17}, // 0x12, RT_CHANNEL_DOMAIN_JAPAN_NO_DFS {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165},37}, // 0x13, RT_CHANNEL_DOMAIN_WORLD_WIDE_5G {{1,2,3,4,5,6,7,8,9,10,11,56,60,64,149,153,157,161,165},19}, // 0x14, RT_CHANNEL_DOMAIN_TAIWAN_NO_DFS };*/ static RT_CHANNEL_PLAN_2G RTW_ChannelPlan2G[RT_CHANNEL_DOMAIN_2G_MAX] = { {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x00, RT_CHANNEL_DOMAIN_2G_WORLD , Passive scan CH 12, 13 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x01, RT_CHANNEL_DOMAIN_2G_ETSI1 {{1,2,3,4,5,6,7,8,9,10,11},11}, // 0x02, RT_CHANNEL_DOMAIN_2G_FCC1 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, // 0x03, RT_CHANNEL_DOMAIN_2G_MIKK1 {{10,11,12,13},4}, // 0x04, RT_CHANNEL_DOMAIN_2G_ETSI2 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, // 0x05, RT_CHANNEL_DOMAIN_2G_GLOBAL , Passive scan CH 12, 13, 14 {{},0}, // 0x06, RT_CHANNEL_DOMAIN_2G_NULL }; static RT_CHANNEL_PLAN_5G RTW_ChannelPlan5G[RT_CHANNEL_DOMAIN_5G_MAX] = { {{},0}, // 0x00, RT_CHANNEL_DOMAIN_5G_NULL {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140},19}, // 0x01, RT_CHANNEL_DOMAIN_5G_ETSI1 {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165},24}, // 0x02, RT_CHANNEL_DOMAIN_5G_ETSI2 {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,149,153,157,161,165},22}, // 0x03, RT_CHANNEL_DOMAIN_5G_ETSI3 {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165},24}, // 0x04, RT_CHANNEL_DOMAIN_5G_FCC1 {{36,40,44,48,149,153,157,161,165},9}, // 0x05, RT_CHANNEL_DOMAIN_5G_FCC2 {{36,40,44,48,52,56,60,64,149,153,157,161,165},13}, // 0x06, RT_CHANNEL_DOMAIN_5G_FCC3 {{36,40,44,48,52,56,60,64,149,153,157,161},12}, // 0x07, RT_CHANNEL_DOMAIN_5G_FCC4 {{149,153,157,161,165},5}, // 0x08, RT_CHANNEL_DOMAIN_5G_FCC5 {{36,40,44,48,52,56,60,64},8}, // 0x09, RT_CHANNEL_DOMAIN_5G_FCC6 {{36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},20}, // 0x0A, RT_CHANNEL_DOMAIN_5G_FCC7_IC1 {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161,165},20}, // 0x0B, RT_CHANNEL_DOMAIN_5G_KCC1 {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140},19}, // 0x0C, RT_CHANNEL_DOMAIN_5G_MKK1 {{36,40,44,48,52,56,60,64},8}, // 0x0D, RT_CHANNEL_DOMAIN_5G_MKK2 {{100,104,108,112,116,120,124,128,132,136,140},11}, // 0x0E, RT_CHANNEL_DOMAIN_5G_MKK3 {{56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},15}, // 0x0F, RT_CHANNEL_DOMAIN_5G_NCC1 {{56,60,64,149,153,157,161,165},8}, // 0x10, RT_CHANNEL_DOMAIN_5G_NCC2 {{149,153,157,161,165},5}, // 0x11, RT_CHANNEL_DOMAIN_5G_NCC3 {{36,40,44,48},4}, // 0x12, RT_CHANNEL_DOMAIN_5G_ETSI4 {{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},21}, // 0x13, RT_CHANNEL_DOMAIN_5G_ETSI5 {{149,153,157,161},4}, // 0x14, RT_CHANNEL_DOMAIN_5G_FCC8 {{36,40,44,48,52,56,60,64},8}, // 0x15, RT_CHANNEL_DOMAIN_5G_ETSI6 {{36,40,44,48,52,56,60,64,149,153,157,161,165},13}, // 0x16, RT_CHANNEL_DOMAIN_5G_ETSI7 {{36,40,44,48,149,153,157,161,165},9}, // 0x17, RT_CHANNEL_DOMAIN_5G_ETSI8 {{100,104,108,112,116,120,124,128,132,136,140},11}, // 0x18, RT_CHANNEL_DOMAIN_5G_ETSI9 {{149,153,157,161,165},5}, // 0x19, RT_CHANNEL_DOMAIN_5G_ETSI10 {{36,40,44,48,52,56,60,64,132,136,140,149,153,157,161,165},16}, // 0x1A, RT_CHANNEL_DOMAIN_5G_ETSI11 {{52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},17}, // 0x1B, RT_CHANNEL_DOMAIN_5G_NCC4 {{149,153,157,161},4}, // 0x1C, RT_CHANNEL_DOMAIN_5G_ETSI12 {{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},21}, // 0x1D, RT_CHANNEL_DOMAIN_5G_FCC9 {{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140},16}, // 0x1E, RT_CHANNEL_DOMAIN_5G_ETSI13 {{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161},20}, // 0x1F, RT_CHANNEL_DOMAIN_5G_FCC10 {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161},19}, // 0x20, RT_CHANNEL_DOMAIN_5G_KCC2 {{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},21}, // 0x21, RT_CHANNEL_DOMAIN_5G_FCC11 {{56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},16}, // 0x22, RT_CHANNEL_DOMAIN_5G_NCC5 {{36,40,44,48},4}, // 0x23, RT_CHANNEL_DOMAIN_5G_MKK4 //===== Driver self defined for old channel plan Compatible ,Remember to modify if have new channel plan definition ===== {{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},21}, // 0x30, RT_CHANNEL_DOMAIN_5G_FCC {{36,40,44,48},4}, // 0x31, RT_CHANNEL_DOMAIN_5G_JAPAN_NO_DFS {{36,40,44,48,149,153,157,161},8}, // 0x32, RT_CHANNEL_DOMAIN_5G_FCC4_NO_DFS }; static RT_CHANNEL_PLAN_MAP RTW_ChannelPlanMap[RT_CHANNEL_DOMAIN_MAX] = { //===== 0x00 ~ 0x1F , Old Define ===== {0x02,0x20}, //0x00, RT_CHANNEL_DOMAIN_FCC {0x02,0x0A}, //0x01, RT_CHANNEL_DOMAIN_IC {0x01,0x01}, //0x02, RT_CHANNEL_DOMAIN_ETSI {0x01,0x00}, //0x03, RT_CHANNEL_DOMAIN_SPAIN {0x01,0x00}, //0x04, RT_CHANNEL_DOMAIN_FRANCE {0x03,0x00}, //0x05, RT_CHANNEL_DOMAIN_MKK {0x03,0x00}, //0x06, RT_CHANNEL_DOMAIN_MKK1 {0x01,0x09}, //0x07, RT_CHANNEL_DOMAIN_ISRAEL {0x03,0x09}, //0x08, RT_CHANNEL_DOMAIN_TELEC {0x03,0x00}, //0x09, RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN {0x00,0x00}, //0x0A, RT_CHANNEL_DOMAIN_WORLD_WIDE_13 {0x02,0x0F}, //0x0B, RT_CHANNEL_DOMAIN_TAIWAN {0x01,0x08}, //0x0C, RT_CHANNEL_DOMAIN_CHINA {0x02,0x06}, //0x0D, RT_CHANNEL_DOMAIN_SINGAPORE_INDIA_MEXICO {0x02,0x0B}, //0x0E, RT_CHANNEL_DOMAIN_KOREA {0x02,0x09}, //0x0F, RT_CHANNEL_DOMAIN_TURKEY {0x01,0x01}, //0x10, RT_CHANNEL_DOMAIN_JAPAN {0x02,0x05}, //0x11, RT_CHANNEL_DOMAIN_FCC_NO_DFS {0x01,0x21}, //0x12, RT_CHANNEL_DOMAIN_JAPAN_NO_DFS {0x00,0x04}, //0x13, RT_CHANNEL_DOMAIN_WORLD_WIDE_5G {0x02,0x10}, //0x14, RT_CHANNEL_DOMAIN_TAIWAN_NO_DFS {0x00,0x21}, //0x15, RT_CHANNEL_DOMAIN_ETSI_NO_DFS {0x00,0x22}, //0x16, RT_CHANNEL_DOMAIN_KOREA_NO_DFS {0x03,0x21}, //0x17, RT_CHANNEL_DOMAIN_JAPAN_NO_DFS {0x06,0x08}, //0x18, RT_CHANNEL_DOMAIN_PAKISTAN_NO_DFS {0x02,0x08}, //0x19, RT_CHANNEL_DOMAIN_TAIWAN2_NO_DFS {0x00,0x00}, //0x1A, {0x00,0x00}, //0x1B, {0x00,0x00}, //0x1C, {0x00,0x00}, //0x1D, {0x00,0x00}, //0x1E, {0x06,0x04}, //0x1F, RT_CHANNEL_DOMAIN_WORLD_WIDE_ONLY_5G //===== 0x20 ~ 0x7F ,New Define ===== {0x00,0x00}, //0x20, RT_CHANNEL_DOMAIN_WORLD_NULL {0x01,0x00}, //0x21, RT_CHANNEL_DOMAIN_ETSI1_NULL {0x02,0x00}, //0x22, RT_CHANNEL_DOMAIN_FCC1_NULL {0x03,0x00}, //0x23, RT_CHANNEL_DOMAIN_MKK1_NULL {0x04,0x00}, //0x24, RT_CHANNEL_DOMAIN_ETSI2_NULL {0x02,0x04}, //0x25, RT_CHANNEL_DOMAIN_FCC1_FCC1 {0x00,0x01}, //0x26, RT_CHANNEL_DOMAIN_WORLD_ETSI1 {0x03,0x0C}, //0x27, RT_CHANNEL_DOMAIN_MKK1_MKK1 {0x00,0x20}, //0x28, RT_CHANNEL_DOMAIN_5G_KCC2 {0x00,0x05}, //0x29, RT_CHANNEL_DOMAIN_WORLD_FCC2 {0x00,0x00}, //0x2A, {0x00,0x00}, //0x2B, {0x00,0x00}, //0x2C, {0x00,0x00}, //0x2D, {0x00,0x00}, //0x2E, {0x00,0x00}, //0x2F, {0x00,0x06}, //0x30, RT_CHANNEL_DOMAIN_WORLD_FCC3 {0x00,0x07}, //0x31, RT_CHANNEL_DOMAIN_WORLD_FCC4 {0x00,0x08}, //0x32, RT_CHANNEL_DOMAIN_WORLD_FCC5 {0x00,0x09}, //0x33, RT_CHANNEL_DOMAIN_WORLD_FCC6 {0x02,0x21}, //0x34, RT_CHANNEL_DOMAIN_5G_FCC11 {0x00,0x02}, //0x35, RT_CHANNEL_DOMAIN_WORLD_ETSI2 {0x00,0x03}, //0x36, RT_CHANNEL_DOMAIN_WORLD_ETSI3 {0x03,0x0D}, //0x37, RT_CHANNEL_DOMAIN_MKK1_MKK2 {0x03,0x0E}, //0x38, RT_CHANNEL_DOMAIN_MKK1_MKK3 {0x02,0x22}, //0x39, RT_CHANNEL_DOMAIN_5G_NCC5 {0x00,0x00}, //0x3A, {0x00,0x00}, //0x3B, {0x00,0x00}, //0x3C, {0x00,0x00}, //0x3D, {0x00,0x00}, //0x3E, {0x00,0x00}, //0x3F, {0x02,0x10}, //0x40, RT_CHANNEL_DOMAIN_FCC1_NCC2 {0x05,0x00}, //0x41, RT_CHANNEL_DOMAIN_GLOBAL_NULL {0x01,0x12}, //0x42, RT_CHANNEL_DOMAIN_ETSI1_ETSI4 {0x02,0x05}, //0x43, RT_CHANNEL_DOMAIN_FCC1_FCC2 {0x02,0x11}, //0x44, RT_CHANNEL_DOMAIN_FCC1_NCC3 {0x00,0x13}, //0x45, RT_CHANNEL_DOMAIN_WORLD_ETSI5 {0x02,0x14}, //0x46, RT_CHANNEL_DOMAIN_FCC1_FCC8 {0x00,0x15}, //0x47, RT_CHANNEL_DOMAIN_WORLD_ETSI6 {0x00,0x16}, //0x48, RT_CHANNEL_DOMAIN_WORLD_ETSI7 {0x00,0x17}, //0x49, RT_CHANNEL_DOMAIN_WORLD_ETSI8 {0x00,0x00}, //0x4A, {0x00,0x00}, //0x4B, {0x00,0x00}, //0x4C, {0x00,0x00}, //0x4D, {0x00,0x00}, //0x4E, {0x00,0x00}, //0x4F, {0x00,0x18}, //0x50, RT_CHANNEL_DOMAIN_WORLD_ETSI9 {0x00,0x19}, //0x51, RT_CHANNEL_DOMAIN_WORLD_ETSI10 {0x00,0x1A}, //0x52, RT_CHANNEL_DOMAIN_WORLD_ETSI11 {0x02,0x1B}, //0x53, RT_CHANNEL_DOMAIN_FCC1_NCC4 {0x00,0x1C}, //0x54, RT_CHANNEL_DOMAIN_WORLD_ETSI12 {0x02,0x1D}, //0x55, RT_CHANNEL_DOMAIN_FCC1_FCC9 {0x00,0x1E}, //0x56, RT_CHANNEL_DOMAIN_WORLD_ETSI13 {0x02,0x1F}, //0x57, RT_CHANNEL_DOMAIN_FCC1_FCC10 {0x01,0x23}, //0x58, RT_CHANNEL_DOMAIN_WORLD_MKK4 }; static RT_CHANNEL_PLAN_MAP RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE = {0x01,0x02}; //use the conbination for max channel numbers /* * Search the @param ch in given @param ch_set * @ch_set: the given channel set * @ch: the given channel number * * return the index of channel_num in channel_set, -1 if not found */ int rtw_ch_set_search_ch(RT_CHANNEL_INFO *ch_set, const u32 ch) { int i; for(i=0;ch_set[i].ChannelNum!=0;i++){ if(ch == ch_set[i].ChannelNum) break; } if(i >= ch_set[i].ChannelNum) return -1; return i; } /* * Check the @param ch is fit with setband setting of @param adapter * @adapter: the given adapter * @ch: the given channel number * * return _TRUE when check valid, _FALSE not valid */ bool rtw_mlme_band_check(_adapter *adapter, const u32 ch) { if (adapter->setband == GHZ24_50 /* 2.4G and 5G */ || (adapter->setband == GHZ_24 && ch < 35) /* 2.4G only */ || (adapter->setband == GHZ_50 && ch > 35) /* 5G only */ ) { return _TRUE; } return _FALSE; } /**************************************************************************** Following are the initialization functions for WiFi MLME *****************************************************************************/ int init_hw_mlme_ext(_adapter *padapter) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; //set_opmode_cmd(padapter, infra_client_with_mlme);//removed set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); return _SUCCESS; } void init_mlme_default_rate_set(_adapter* padapter) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; unsigned char mixed_datarate[NumRates] = {_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_,_9M_RATE_, _12M_RATE_, _18M_RATE_, _24M_RATE_, _36M_RATE_, _48M_RATE_, _54M_RATE_, 0xff}; unsigned char mixed_basicrate[NumRates] ={_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_, _12M_RATE_, _24M_RATE_, 0xff,}; unsigned char supported_mcs_set[16] = {0xff, 0xff, 0x00, 0x00, 0x00, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; _rtw_memcpy(pmlmeext->datarate, mixed_datarate, NumRates); _rtw_memcpy(pmlmeext->basicrate, mixed_basicrate, NumRates); _rtw_memcpy(pmlmeext->default_supported_mcs_set, supported_mcs_set, sizeof(pmlmeext->default_supported_mcs_set)); } static void init_mlme_ext_priv_value(_adapter* padapter) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ATOMIC_SET(&pmlmeext->event_seq, 0); pmlmeext->mgnt_seq = 0;//reset to zero when disconnect at client mode #ifdef CONFIG_IEEE80211W pmlmeext->sa_query_seq = 0; pmlmeext->mgnt_80211w_IPN=0; pmlmeext->mgnt_80211w_IPN_rx=0; #endif //CONFIG_IEEE80211W pmlmeext->cur_channel = padapter->registrypriv.channel; pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; pmlmeext->retry = 0; pmlmeext->cur_wireless_mode = padapter->registrypriv.wireless_mode; init_mlme_default_rate_set(padapter); if(pmlmeext->cur_channel > 14) pmlmeext->tx_rate = IEEE80211_OFDM_RATE_6MB; else pmlmeext->tx_rate = IEEE80211_CCK_RATE_1MB; pmlmeext->sitesurvey_res.state = SCAN_DISABLE; pmlmeext->sitesurvey_res.channel_idx = 0; pmlmeext->sitesurvey_res.bss_cnt = 0; pmlmeext->scan_abort = _FALSE; pmlmeinfo->state = WIFI_FW_NULL_STATE; pmlmeinfo->reauth_count = 0; pmlmeinfo->reassoc_count = 0; pmlmeinfo->link_count = 0; pmlmeinfo->auth_seq = 0; pmlmeinfo->auth_algo = dot11AuthAlgrthm_Open; pmlmeinfo->key_index = 0; pmlmeinfo->iv = 0; pmlmeinfo->enc_algo = _NO_PRIVACY_; pmlmeinfo->authModeToggle = 0; _rtw_memset(pmlmeinfo->chg_txt, 0, 128); pmlmeinfo->slotTime = SHORT_SLOT_TIME; pmlmeinfo->preamble_mode = PREAMBLE_AUTO; pmlmeinfo->dialogToken = 0; pmlmeext->action_public_rxseq = 0xffff; pmlmeext->action_public_dialog_token = 0xff; } static int has_channel(RT_CHANNEL_INFO *channel_set, u8 chanset_size, u8 chan) { int i; for (i = 0; i < chanset_size; i++) { if (channel_set[i].ChannelNum == chan) { return 1; } } return 0; } static void init_channel_list(_adapter *padapter, RT_CHANNEL_INFO *channel_set, u8 chanset_size, struct p2p_channels *channel_list) { struct p2p_oper_class_map op_class[] = { { IEEE80211G, 81, 1, 13, 1, BW20 }, { IEEE80211G, 82, 14, 14, 1, BW20 }, #if 0 /* Do not enable HT40 on 2 GHz */ { IEEE80211G, 83, 1, 9, 1, BW40PLUS }, { IEEE80211G, 84, 5, 13, 1, BW40MINUS }, #endif { IEEE80211A, 115, 36, 48, 4, BW20 }, { IEEE80211A, 116, 36, 44, 8, BW40PLUS }, { IEEE80211A, 117, 40, 48, 8, BW40MINUS }, { IEEE80211A, 124, 149, 161, 4, BW20 }, { IEEE80211A, 125, 149, 169, 4, BW20 }, { IEEE80211A, 126, 149, 157, 8, BW40PLUS }, { IEEE80211A, 127, 153, 161, 8, BW40MINUS }, { -1, 0, 0, 0, 0, BW20 } }; int cla, op; cla = 0; for (op = 0; op_class[op].op_class; op++) { u8 ch; struct p2p_oper_class_map *o = &op_class[op]; struct p2p_reg_class *reg = NULL; for (ch = o->min_chan; ch <= o->max_chan; ch += o->inc) { if (!has_channel(channel_set, chanset_size, ch)) { continue; } if ((0 == padapter->registrypriv.ht_enable) && (8 == o->inc)) continue; if ((0 < (padapter->registrypriv.bw_mode & 0xf0)) && ((BW40MINUS == o->bw) || (BW40PLUS == o->bw))) continue; if (reg == NULL) { reg = &channel_list->reg_class[cla]; cla++; reg->reg_class = o->op_class; reg->channels = 0; } reg->channel[reg->channels] = ch; reg->channels++; } } channel_list->reg_classes = cla; } static u8 init_channel_set(_adapter* padapter, u8 ChannelPlan, RT_CHANNEL_INFO *channel_set) { u8 index,chanset_size = 0; u8 b5GBand = _FALSE, b2_4GBand = _FALSE; u8 Index2G = 0, Index5G=0; if (!rtw_is_channel_plan_valid(ChannelPlan)) { DBG_871X("ChannelPlan ID %x error !!!!!\n",ChannelPlan); return chanset_size; } _rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO)*MAX_CHANNEL_NUM); if(IsSupported24G(padapter->registrypriv.wireless_mode)) { b2_4GBand = _TRUE; if(RT_CHANNEL_DOMAIN_REALTEK_DEFINE == ChannelPlan) Index2G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.Index2G; else Index2G = RTW_ChannelPlanMap[ChannelPlan].Index2G; } if(IsSupported5G(padapter->registrypriv.wireless_mode)) { b5GBand = _TRUE; if(RT_CHANNEL_DOMAIN_REALTEK_DEFINE == ChannelPlan) Index5G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.Index5G; else Index5G = RTW_ChannelPlanMap[ChannelPlan].Index5G; } if(b2_4GBand) { for(index=0;index= 1 && channel_set[chanset_size].ChannelNum <= 11) channel_set[chanset_size].ScanType = SCAN_ACTIVE; else if((channel_set[chanset_size].ChannelNum >= 12 && channel_set[chanset_size].ChannelNum <= 14)) channel_set[chanset_size].ScanType = SCAN_PASSIVE; } else if(RT_CHANNEL_DOMAIN_WORLD_WIDE_13 == ChannelPlan || RT_CHANNEL_DOMAIN_WORLD_WIDE_5G == ChannelPlan || RT_CHANNEL_DOMAIN_2G_WORLD == Index2G)// channel 12~13, passive scan { if(channel_set[chanset_size].ChannelNum <= 11) channel_set[chanset_size].ScanType = SCAN_ACTIVE; else channel_set[chanset_size].ScanType = SCAN_PASSIVE; } else { channel_set[chanset_size].ScanType = SCAN_ACTIVE; } chanset_size++; } } if(b5GBand) { for(index=0;index= 149 ) { if(RT_CHANNEL_DOMAIN_WORLD_WIDE_5G == ChannelPlan)//passive scan for all 5G channels channel_set[chanset_size].ScanType = SCAN_PASSIVE; else channel_set[chanset_size].ScanType = SCAN_ACTIVE; } else { channel_set[chanset_size].ScanType = SCAN_PASSIVE; } chanset_size++; #else /* CONFIG_DFS */ if ( RTW_ChannelPlan5G[Index5G].Channel[index] <= 48 || RTW_ChannelPlan5G[Index5G].Channel[index] >= 149 ) { channel_set[chanset_size].ChannelNum = RTW_ChannelPlan5G[Index5G].Channel[index]; if(RT_CHANNEL_DOMAIN_WORLD_WIDE_5G == ChannelPlan)//passive scan for all 5G channels channel_set[chanset_size].ScanType = SCAN_PASSIVE; else channel_set[chanset_size].ScanType = SCAN_ACTIVE; DBG_871X("%s(): channel_set[%d].ChannelNum = %d\n", __FUNCTION__, chanset_size, channel_set[chanset_size].ChannelNum); chanset_size++; } #endif /* CONFIG_DFS */ } } Hal_ChannelPlanToRegulation(padapter, ChannelPlan); DBG_871X("%s ChannelPlan ID %x Chan num:%d \n",__FUNCTION__,ChannelPlan,chanset_size); return chanset_size; } int init_mlme_ext_priv(_adapter* padapter) { int res = _SUCCESS; struct registry_priv* pregistrypriv = &padapter->registrypriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); // We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). //_rtw_memset((u8 *)pmlmeext, 0, sizeof(struct mlme_ext_priv)); pmlmeext->padapter = padapter; //fill_fwpriv(padapter, &(pmlmeext->fwpriv)); init_mlme_ext_priv_value(padapter); pmlmeinfo->bAcceptAddbaReq = pregistrypriv->bAcceptAddbaReq; init_mlme_ext_timer(padapter); #ifdef CONFIG_AP_MODE init_mlme_ap_info(padapter); #endif pmlmeext->max_chan_nums = init_channel_set(padapter, pmlmepriv->ChannelPlan,pmlmeext->channel_set); init_channel_list(padapter, pmlmeext->channel_set, pmlmeext->max_chan_nums, &pmlmeext->channel_list); pmlmeext->last_scan_time = 0; pmlmeext->chan_scan_time = SURVEY_TO; pmlmeext->mlmeext_init = _TRUE; #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK pmlmeext->active_keep_alive_check = _TRUE; #else pmlmeext->active_keep_alive_check = _FALSE; #endif #ifdef DBG_FIXED_CHAN pmlmeext->fixed_chan = 0xFF; #endif return res; } void free_mlme_ext_priv (struct mlme_ext_priv *pmlmeext) { _adapter *padapter = pmlmeext->padapter; if (!padapter) return; if (padapter->bDriverStopped == _TRUE) { _cancel_timer_ex(&pmlmeext->survey_timer); _cancel_timer_ex(&pmlmeext->link_timer); //_cancel_timer_ex(&pmlmeext->ADDBA_timer); } } static u8 cmp_pkt_chnl_diff(_adapter *padapter,u8* pframe,uint packet_len) { // if the channel is same, return 0. else return channel differential uint len; u8 channel; u8 *p; p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _BEACON_IE_OFFSET_, _DSSET_IE_, &len, packet_len - _BEACON_IE_OFFSET_); if (p) { channel = *(p + 2); if(padapter->mlmeextpriv.cur_channel >= channel) { return (padapter->mlmeextpriv.cur_channel - channel); } else { return (channel-padapter->mlmeextpriv.cur_channel); } } else { return 0; } } static void _mgt_dispatcher(_adapter *padapter, struct mlme_handler *ptable, union recv_frame *precv_frame) { u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; u8 *pframe = precv_frame->u.hdr.rx_data; if(ptable->func) { //receive the frames that ra(a1) is my address or ra(a1) is bc address. if (!_rtw_memcmp(GetAddr1Ptr(pframe), myid(&padapter->eeprompriv), ETH_ALEN) && !_rtw_memcmp(GetAddr1Ptr(pframe), bc_addr, ETH_ALEN)) { return; } ptable->func(padapter, precv_frame); } } void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame) { int index; struct mlme_handler *ptable; #ifdef CONFIG_AP_MODE struct mlme_priv *pmlmepriv = &padapter->mlmepriv; #endif //CONFIG_AP_MODE u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; u8 *pframe = precv_frame->u.hdr.rx_data; struct sta_info *psta = rtw_get_stainfo(&padapter->stapriv, GetAddr2Ptr(pframe)); struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("+mgt_dispatcher: type(0x%x) subtype(0x%x)\n", GetFrameType(pframe), GetFrameSubType(pframe))); #if 0 { u8 *pbuf; pbuf = GetAddr1Ptr(pframe); DBG_871X("A1-%x:%x:%x:%x:%x:%x\n", *pbuf, *(pbuf+1), *(pbuf+2), *(pbuf+3), *(pbuf+4), *(pbuf+5)); pbuf = GetAddr2Ptr(pframe); DBG_871X("A2-%x:%x:%x:%x:%x:%x\n", *pbuf, *(pbuf+1), *(pbuf+2), *(pbuf+3), *(pbuf+4), *(pbuf+5)); pbuf = GetAddr3Ptr(pframe); DBG_871X("A3-%x:%x:%x:%x:%x:%x\n", *pbuf, *(pbuf+1), *(pbuf+2), *(pbuf+3), *(pbuf+4), *(pbuf+5)); } #endif if (GetFrameType(pframe) != WIFI_MGT_TYPE) { RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("mgt_dispatcher: type(0x%x) error!\n", GetFrameType(pframe))); return; } //receive the frames that ra(a1) is my address or ra(a1) is bc address. if (!_rtw_memcmp(GetAddr1Ptr(pframe), myid(&padapter->eeprompriv), ETH_ALEN) && !_rtw_memcmp(GetAddr1Ptr(pframe), bc_addr, ETH_ALEN)) { return; } ptable = mlme_sta_tbl; index = GetFrameSubType(pframe) >> 4; #ifdef CONFIG_TDLS if((index << 4)==WIFI_ACTION){ //category==public (4), action==TDLS_DISCOVERY_RESPONSE if(*(pframe+24)==0x04 && *(pframe+25)==TDLS_DISCOVERY_RESPONSE){ DBG_871X("recv tdls discovery response frame from "MAC_FMT"\n", MAC_ARG(GetAddr2Ptr(pframe))); On_TDLS_Dis_Rsp(padapter, precv_frame); } } #endif //CONFIG_TDLS if (index >= (sizeof(mlme_sta_tbl) /sizeof(struct mlme_handler))) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Currently we do not support reserved sub-fr-type=%d\n", index)); return; } ptable += index; #if 1 if (psta != NULL) { if (GetRetry(pframe)) { if (precv_frame->u.hdr.attrib.seq_num == psta->RxMgmtFrameSeqNum) { /* drop the duplicate management frame */ pdbgpriv->dbg_rx_dup_mgt_frame_drop_count++; DBG_871X("Drop duplicate management frame with seq_num = %d.\n", precv_frame->u.hdr.attrib.seq_num); return; } } psta->RxMgmtFrameSeqNum = precv_frame->u.hdr.attrib.seq_num; } #else if(GetRetry(pframe)) { //RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("drop due to decache!\n")); //return; } #endif #ifdef CONFIG_AP_MODE switch (GetFrameSubType(pframe)) { case WIFI_AUTH: if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ptable->func = &OnAuth; else ptable->func = &OnAuthClient; //pass through case WIFI_ASSOCREQ: case WIFI_REASSOCREQ: _mgt_dispatcher(padapter, ptable, precv_frame); #ifdef CONFIG_HOSTAPD_MLME if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) rtw_hostapd_mlme_rx(padapter, precv_frame); #endif break; case WIFI_PROBEREQ: if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { #ifdef CONFIG_HOSTAPD_MLME rtw_hostapd_mlme_rx(padapter, precv_frame); #else _mgt_dispatcher(padapter, ptable, precv_frame); #endif } else _mgt_dispatcher(padapter, ptable, precv_frame); break; case WIFI_BEACON: _mgt_dispatcher(padapter, ptable, precv_frame); break; case WIFI_ACTION: //if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) _mgt_dispatcher(padapter, ptable, precv_frame); break; default: _mgt_dispatcher(padapter, ptable, precv_frame); if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) rtw_hostapd_mlme_rx(padapter, precv_frame); break; } #else _mgt_dispatcher(padapter, ptable, precv_frame); #endif } #ifdef CONFIG_P2P u32 p2p_listen_state_process(_adapter *padapter, unsigned char *da) { bool response = _TRUE; #ifdef CONFIG_IOCTL_CFG80211 if( padapter->wdinfo.driver_interface == DRIVER_CFG80211 ) { if(padapter->cfg80211_wdinfo.is_ro_ch == _FALSE || rtw_get_oper_ch(padapter) != padapter->wdinfo.listen_channel || adapter_wdev_data(padapter)->p2p_enabled == _FALSE || padapter->mlmepriv.wps_probe_resp_ie == NULL || padapter->mlmepriv.p2p_probe_resp_ie == NULL ) { #ifdef CONFIG_DEBUG_CFG80211 DBG_871X("DON'T issue_probersp_p2p: p2p_enabled:%d, wps_probe_resp_ie:%p, p2p_probe_resp_ie:%p, ", adapter_wdev_data(padapter)->p2p_enabled, padapter->mlmepriv.wps_probe_resp_ie, padapter->mlmepriv.p2p_probe_resp_ie); DBG_871X("is_ro_ch:%d, op_ch:%d, p2p_listen_channel:%d\n", padapter->cfg80211_wdinfo.is_ro_ch, rtw_get_oper_ch(padapter), padapter->wdinfo.listen_channel); #endif response = _FALSE; } } else #endif //CONFIG_IOCTL_CFG80211 if( padapter->wdinfo.driver_interface == DRIVER_WEXT ) { // do nothing if the device name is empty if ( !padapter->wdinfo.device_name_len ) { response = _FALSE; } } if (response == _TRUE) issue_probersp_p2p( padapter, da); return _SUCCESS; } #endif //CONFIG_P2P /**************************************************************************** Following are the callback functions for each subtype of the management frames *****************************************************************************/ unsigned int OnProbeReq(_adapter *padapter, union recv_frame *precv_frame) { unsigned int ielen; unsigned char *p; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *cur = &(pmlmeinfo->network); u8 *pframe = precv_frame->u.hdr.rx_data; uint len = precv_frame->u.hdr.len; u8 is_valid_p2p_probereq = _FALSE; #ifdef CONFIG_ATMEL_RC_PATCH u8 *target_ie=NULL, *wps_ie=NULL; u8 *start; uint search_len = 0, wps_ielen = 0, target_ielen = 0; struct sta_info *psta; struct sta_priv *pstapriv = &padapter->stapriv; #endif #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &(padapter->wdinfo); struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; u8 wifi_test_chk_rate = 1; if ( !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) ) { // Commented by Albert 2011/03/17 // mcs_rate = 0 -> CCK 1M rate // mcs_rate = 1 -> CCK 2M rate // mcs_rate = 2 -> CCK 5.5M rate // mcs_rate = 3 -> CCK 11M rate // In the P2P mode, the driver should not support the CCK rate // Commented by Kurt 2012/10/16 // IOT issue: Google Nexus7 use 1M rate to send p2p_probe_req after GO nego completed and Nexus7 is client if (padapter->registrypriv.wifi_spec == 1) { if ( pattrib->data_rate <= 3 ) { wifi_test_chk_rate = 0; } } if( wifi_test_chk_rate == 1 ) { if((is_valid_p2p_probereq = process_probe_req_p2p_ie(pwdinfo, pframe, len)) == _TRUE) { if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE)) { // FIXME if( padapter->wdinfo.driver_interface == DRIVER_WEXT ) report_survey_event(padapter, precv_frame); p2p_listen_state_process( padapter, get_sa(pframe)); return _SUCCESS; } if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { goto _continue; } } } } _continue: #endif //CONFIG_P2P if(check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { return _SUCCESS; } if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE && check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE)==_FALSE) { return _SUCCESS; } //DBG_871X("+OnProbeReq\n"); #ifdef CONFIG_ATMEL_RC_PATCH if ((wps_ie = rtw_get_wps_ie( pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_, NULL, &wps_ielen))) { target_ie = rtw_get_wps_attr_content( wps_ie, wps_ielen, WPS_ATTR_MANUFACTURER, NULL, &target_ielen); } if ((target_ie && (target_ielen == 4)) && (_TRUE ==_rtw_memcmp((void *)target_ie, "Ozmo",4 ))) { //psta->flag_atmel_rc = 1; unsigned char *sa_addr = get_sa(pframe); printk("%s: Find Ozmo RC -- %02x:%02x:%02x:%02x:%02x:%02x \n\n", __func__, *sa_addr, *(sa_addr+1), *(sa_addr+2), *(sa_addr+3), *(sa_addr+4), *(sa_addr+5)); _rtw_memcpy( pstapriv->atmel_rc_pattern, get_sa(pframe), ETH_ALEN); } #endif #ifdef CONFIG_AUTO_AP_MODE if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE && pmlmepriv->cur_network.join_res == _TRUE) { _irqL irqL; struct sta_info *psta; u8 *mac_addr, *peer_addr; struct sta_priv *pstapriv = &padapter->stapriv; u8 RC_OUI[4]={0x00,0xE0,0x4C,0x0A}; //EID[1] + EID_LEN[1] + RC_OUI[4] + MAC[6] + PairingID[2] + ChannelNum[2] p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _VENDOR_SPECIFIC_IE_, (int *)&ielen, len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); if(!p || ielen !=14) goto _non_rc_device; if(!_rtw_memcmp(p+2, RC_OUI, sizeof(RC_OUI))) goto _non_rc_device; if(!_rtw_memcmp(p+6, get_sa(pframe), ETH_ALEN)) { DBG_871X("%s, do rc pairing ("MAC_FMT"), but mac addr mismatch!("MAC_FMT")\n", __FUNCTION__, MAC_ARG(get_sa(pframe)), MAC_ARG(p+6)); goto _non_rc_device; } DBG_871X("%s, got the pairing device("MAC_FMT")\n", __FUNCTION__, MAC_ARG(get_sa(pframe))); //new a station psta = rtw_get_stainfo(pstapriv, get_sa(pframe)); if (psta == NULL) { // allocate a new one DBG_871X("going to alloc stainfo for rc="MAC_FMT"\n", MAC_ARG(get_sa(pframe))); psta = rtw_alloc_stainfo(pstapriv, get_sa(pframe)); if (psta == NULL) { //TODO: DBG_871X(" Exceed the upper limit of supported clients...\n"); return _SUCCESS; } _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); if (rtw_is_list_empty(&psta->asoc_list)) { psta->expire_to = pstapriv->expire_to; rtw_list_insert_tail(&psta->asoc_list, &pstapriv->asoc_list); pstapriv->asoc_list_cnt++; } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); //generate pairing ID mac_addr = myid(&(padapter->eeprompriv)); peer_addr = psta->hwaddr; psta->pid = (u16)(((mac_addr[4]<<8) + mac_addr[5]) + ((peer_addr[4]<<8) + peer_addr[5])); //update peer stainfo psta->isrc = _TRUE; //psta->aid = 0; //psta->mac_id = 2; /* get a unique AID */ if (psta->aid > 0) { DBG_871X("old AID %d\n", psta->aid); } else { for (psta->aid = 1; psta->aid <= NUM_STA; psta->aid++) if (pstapriv->sta_aid[psta->aid - 1] == NULL) break; if (psta->aid > pstapriv->max_num_sta) { psta->aid = 0; DBG_871X("no room for more AIDs\n"); return _SUCCESS; } else { pstapriv->sta_aid[psta->aid - 1] = psta; DBG_871X("allocate new AID = (%d)\n", psta->aid); } } psta->qos_option = 1; psta->bw_mode = CHANNEL_WIDTH_20; psta->ieee8021x_blocked = _FALSE; #ifdef CONFIG_80211N_HT psta->htpriv.ht_option = _TRUE; psta->htpriv.ampdu_enable = _FALSE; psta->htpriv.sgi_20m = _FALSE; psta->htpriv.sgi_40m = _FALSE; psta->htpriv.ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; psta->htpriv.agg_enable_bitmap = 0x0;//reset psta->htpriv.candidate_tid_bitmap = 0x0;//reset #endif rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, _TRUE); _rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); _enter_critical_bh(&psta->lock, &irqL); psta->state |= _FW_LINKED; _exit_critical_bh(&psta->lock, &irqL); report_add_sta_event(padapter, psta->hwaddr, psta->aid); } issue_probersp(padapter, get_sa(pframe), _FALSE); return _SUCCESS; } _non_rc_device: return _SUCCESS; #endif //CONFIG_AUTO_AP_MODE #ifdef CONFIG_CONCURRENT_MODE if(((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) && check_buddy_fwstate(padapter, _FW_UNDER_LINKING|_FW_UNDER_SURVEY)) { //don't process probe req return _SUCCESS; } #endif p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SSID_IE_, (int *)&ielen, len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); //check (wildcard) SSID if (p != NULL) { if(is_valid_p2p_probereq == _TRUE) { goto _issue_probersp; } if ( (ielen != 0 && _FALSE ==_rtw_memcmp((void *)(p+2), (void *)cur->Ssid.Ssid, cur->Ssid.SsidLength)) || (ielen == 0 && pmlmeinfo->hidden_ssid_mode) ) { return _SUCCESS; } _issue_probersp: if(((check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE && pmlmepriv->cur_network.join_res == _TRUE)) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) { //DBG_871X("+issue_probersp during ap mode\n"); issue_probersp(padapter, get_sa(pframe), is_valid_p2p_probereq); } } return _SUCCESS; } unsigned int OnProbeRsp(_adapter *padapter, union recv_frame *precv_frame) { struct sta_info *psta; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct sta_priv *pstapriv = &padapter->stapriv; u8 *pframe = precv_frame->u.hdr.rx_data; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &padapter->wdinfo; #endif #ifdef CONFIG_P2P if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ)) { if ( _TRUE == pwdinfo->tx_prov_disc_info.benable ) { if( _rtw_memcmp( pwdinfo->tx_prov_disc_info.peerIFAddr, GetAddr2Ptr(pframe), ETH_ALEN ) ) { if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT)) { pwdinfo->tx_prov_disc_info.benable = _FALSE; issue_p2p_provision_request( padapter, pwdinfo->tx_prov_disc_info.ssid.Ssid, pwdinfo->tx_prov_disc_info.ssid.SsidLength, pwdinfo->tx_prov_disc_info.peerDevAddr ); } else if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) || rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) ) { pwdinfo->tx_prov_disc_info.benable = _FALSE; issue_p2p_provision_request( padapter, NULL, 0, pwdinfo->tx_prov_disc_info.peerDevAddr ); } } } return _SUCCESS; } else if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING)) { if ( _TRUE == pwdinfo->nego_req_info.benable ) { DBG_871X( "[%s] P2P State is GONEGO ING!\n", __FUNCTION__ ); if( _rtw_memcmp( pwdinfo->nego_req_info.peerDevAddr, GetAddr2Ptr(pframe), ETH_ALEN ) ) { pwdinfo->nego_req_info.benable = _FALSE; issue_p2p_GO_request( padapter, pwdinfo->nego_req_info.peerDevAddr); } } } else if( rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_INVITE_REQ ) ) { if ( _TRUE == pwdinfo->invitereq_info.benable ) { DBG_871X( "[%s] P2P_STATE_TX_INVITE_REQ!\n", __FUNCTION__ ); if( _rtw_memcmp( pwdinfo->invitereq_info.peer_macaddr, GetAddr2Ptr(pframe), ETH_ALEN ) ) { pwdinfo->invitereq_info.benable = _FALSE; issue_p2p_invitation_request( padapter, pwdinfo->invitereq_info.peer_macaddr ); } } } #endif if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) { report_survey_event(padapter, precv_frame); #ifdef CONFIG_CONCURRENT_MODE report_survey_event(padapter->pbuddy_adapter, precv_frame); #endif #ifdef CONFIG_DUALMAC_CONCURRENT dc_report_survey_event(padapter, precv_frame); #endif return _SUCCESS; } #if 0 //move to validate_recv_mgnt_frame if (_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN)) { if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) { if ((psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe))) != NULL) { psta->sta_stats.rx_mgnt_pkts++; } } } #endif return _SUCCESS; } unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) { int cam_idx; struct sta_info *psta; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct sta_priv *pstapriv = &padapter->stapriv; u8 *pframe = precv_frame->u.hdr.rx_data; uint len = precv_frame->u.hdr.len; WLAN_BSSID_EX *pbss; int ret = _SUCCESS; u8 *p = NULL; u32 ielen = 0; #ifdef CONFIG_ATTEMPT_TO_FIX_AP_BEACON_ERROR p = rtw_get_ie(pframe + sizeof(struct rtw_ieee80211_hdr_3addr) + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ielen, precv_frame->u.hdr.len -sizeof(struct rtw_ieee80211_hdr_3addr) - _BEACON_IE_OFFSET_); if ((p != NULL) && (ielen > 0)) { if ((*(p + 1 + ielen) == 0x2D) && (*(p + 2 + ielen) != 0x2D)) { /* Invalid value 0x2D is detected in Extended Supported Rates (ESR) IE. Try to fix the IE length to avoid failed Beacon parsing. */ DBG_871X("[WIFIDBG] Error in ESR IE is detected in Beacon of BSSID:"MAC_FMT". Fix the length of ESR IE to avoid failed Beacon parsing.\n", MAC_ARG(GetAddr3Ptr(pframe))); *(p + 1) = ielen - 1; } } #endif if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) { report_survey_event(padapter, precv_frame); #ifdef CONFIG_CONCURRENT_MODE report_survey_event(padapter->pbuddy_adapter, precv_frame); #endif #ifdef CONFIG_DUALMAC_CONCURRENT dc_report_survey_event(padapter, precv_frame); #endif return _SUCCESS; } if (_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN)) { if (pmlmeinfo->state & WIFI_FW_AUTH_NULL) { //we should update current network before auth, or some IE is wrong pbss = (WLAN_BSSID_EX*)rtw_malloc(sizeof(WLAN_BSSID_EX)); if (pbss) { if (collect_bss_info(padapter, precv_frame, pbss) == _SUCCESS) { struct beacon_keys recv_beacon; update_network(&(pmlmepriv->cur_network.network), pbss, padapter, _TRUE); rtw_get_bcn_info(&(pmlmepriv->cur_network)); // update bcn keys if (rtw_get_bcn_keys(padapter, pframe, len, &recv_beacon) == _TRUE) { DBG_871X("%s: beacon keys ready\n", __func__); _rtw_memcpy(&pmlmepriv->cur_beacon_keys, &recv_beacon, sizeof(recv_beacon)); pmlmepriv->new_beacon_cnts = 0; } else { DBG_871X_LEVEL(_drv_err_, "%s: get beacon keys failed\n", __func__); _rtw_memset(&pmlmepriv->cur_beacon_keys, 0, sizeof(recv_beacon)); pmlmepriv->new_beacon_cnts = 0; } } rtw_mfree((u8*)pbss, sizeof(WLAN_BSSID_EX)); } //check the vendor of the assoc AP pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pframe+sizeof(struct rtw_ieee80211_hdr_3addr), len-sizeof(struct rtw_ieee80211_hdr_3addr)); //update TSF Value update_TSF(pmlmeext, pframe, len); //reset for adaptive_early_32k pmlmeext->adaptive_tsf_done = _FALSE; pmlmeext->DrvBcnEarly = 0xff; pmlmeext->DrvBcnTimeOut = 0xff; pmlmeext->bcn_cnt = 0; _rtw_memset(pmlmeext->bcn_delay_cnt, 0, sizeof(pmlmeext->bcn_delay_cnt)); _rtw_memset(pmlmeext->bcn_delay_ratio, 0, sizeof(pmlmeext->bcn_delay_ratio)); #ifdef CONFIG_P2P_PS process_p2p_ps_ie(padapter, (pframe + WLAN_HDR_A3_LEN), (len - WLAN_HDR_A3_LEN)); #endif //CONFIG_P2P_PS //start auth start_clnt_auth(padapter); return _SUCCESS; } if(((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) && (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) { if ((psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe))) != NULL) { #ifdef CONFIG_PATCH_JOIN_WRONG_CHANNEL //Merge from 8712 FW code if (cmp_pkt_chnl_diff(padapter,pframe,len) != 0) { // join wrong channel, deauth and reconnect issue_deauth(padapter, (&(pmlmeinfo->network))->MacAddress, WLAN_REASON_DEAUTH_LEAVING); report_del_sta_event(padapter,(&(pmlmeinfo->network))->MacAddress, WLAN_REASON_JOIN_WRONG_CHANNEL); pmlmeinfo->state &= (~WIFI_FW_ASSOC_SUCCESS); return _SUCCESS; } #endif //CONFIG_PATCH_JOIN_WRONG_CHANNEL ret = rtw_check_bcn_info(padapter, pframe, len); if (!ret) { DBG_871X_LEVEL(_drv_always_, "ap has changed, disconnect now\n "); receive_disconnect(padapter, pmlmeinfo->network.MacAddress , 0); return _SUCCESS; } //update WMM, ERP in the beacon //todo: the timer is used instead of the number of the beacon received if ((sta_rx_pkts(psta) & 0xf) == 0) { //DBG_871X("update_bcn_info\n"); update_beacon_info(padapter, pframe, len, psta); } adaptive_early_32k(pmlmeext, pframe, len); #ifdef CONFIG_DFS process_csa_ie(padapter, pframe, len); //channel switch announcement #endif //CONFIG_DFS #ifdef CONFIG_P2P_PS process_p2p_ps_ie(padapter, (pframe + WLAN_HDR_A3_LEN), (len - WLAN_HDR_A3_LEN)); #endif //CONFIG_P2P_PS #if 0 //move to validate_recv_mgnt_frame psta->sta_stats.rx_mgnt_pkts++; #endif } } else if((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) { if ((psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe))) != NULL) { //update WMM, ERP in the beacon //todo: the timer is used instead of the number of the beacon received if ((sta_rx_pkts(psta) & 0xf) == 0) { //DBG_871X("update_bcn_info\n"); update_beacon_info(padapter, pframe, len, psta); } #if 0 //move to validate_recv_mgnt_frame psta->sta_stats.rx_mgnt_pkts++; #endif } else { //allocate a new CAM entry for IBSS station if ((cam_idx = allocate_fw_sta_entry(padapter)) == NUM_STA) { goto _END_ONBEACON_; } //get supported rate if (update_sta_support_rate(padapter, (pframe + WLAN_HDR_A3_LEN + _BEACON_IE_OFFSET_), (len - WLAN_HDR_A3_LEN - _BEACON_IE_OFFSET_), cam_idx) == _FAIL) { pmlmeinfo->FW_sta_info[cam_idx].status = 0; goto _END_ONBEACON_; } //update TSF Value update_TSF(pmlmeext, pframe, len); //report sta add event report_add_sta_event(padapter, GetAddr2Ptr(pframe), cam_idx); } } } _END_ONBEACON_: return _SUCCESS; } unsigned int OnAuth(_adapter *padapter, union recv_frame *precv_frame) { #ifdef CONFIG_AP_MODE _irqL irqL; unsigned int auth_mode, seq, ie_len; unsigned char *sa, *p; u16 algorithm; int status; static struct sta_info stat; struct sta_info *pstat=NULL; struct sta_priv *pstapriv = &padapter->stapriv; struct security_priv *psecuritypriv = &padapter->securitypriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 *pframe = precv_frame->u.hdr.rx_data; uint len = precv_frame->u.hdr.len; u8 offset = 0; #ifdef CONFIG_CONCURRENT_MODE if(((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) && check_buddy_fwstate(padapter, _FW_UNDER_LINKING|_FW_UNDER_SURVEY)) { //don't process auth request; return _SUCCESS; } #endif //CONFIG_CONCURRENT_MODE if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) return _FAIL; DBG_871X("+OnAuth\n"); sa = GetAddr2Ptr(pframe); auth_mode = psecuritypriv->dot11AuthAlgrthm; if (GetPrivacy(pframe)) { u8 *iv; struct rx_pkt_attrib *prxattrib = &(precv_frame->u.hdr.attrib); prxattrib->hdrlen = WLAN_HDR_A3_LEN; prxattrib->encrypt = _WEP40_; iv = pframe+prxattrib->hdrlen; prxattrib->key_index = ((iv[3]>>6)&0x3); prxattrib->iv_len = 4; prxattrib->icv_len = 4; rtw_wep_decrypt(padapter, (u8 *)precv_frame); offset = 4; } algorithm = le16_to_cpu(*(u16*)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset)); seq = le16_to_cpu(*(u16*)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset + 2)); DBG_871X("auth alg=%x, seq=%X\n", algorithm, seq); if (auth_mode == 2 && psecuritypriv->dot11PrivacyAlgrthm != _WEP40_ && psecuritypriv->dot11PrivacyAlgrthm != _WEP104_) auth_mode = 0; if ((algorithm > 0 && auth_mode == 0) || // rx a shared-key auth but shared not enabled (algorithm == 0 && auth_mode == 1) ) // rx a open-system auth but shared-key is enabled { DBG_871X("auth rejected due to bad alg [alg=%d, auth_mib=%d] %02X%02X%02X%02X%02X%02X\n", algorithm, auth_mode, sa[0], sa[1], sa[2], sa[3], sa[4], sa[5]); status = _STATS_NO_SUPP_ALG_; goto auth_fail; } #if 0 //ACL control phead = &priv->wlan_acl_list; plist = phead->next; //check sa if (acl_mode == 1) // 1: positive check, only those on acl_list can be connected. res = FAIL; else res = SUCCESS; while(plist != phead) { paclnode = list_entry(plist, struct rtw_wlan_acl_node, list); plist = plist->next; if (!memcmp((void *)sa, paclnode->addr, 6)) { if (paclnode->mode & 2) { // deny res = FAIL; break; } else { res = SUCCESS; break; } } } if (res != SUCCESS) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,"auth abort because ACL!\n"); return FAIL; } #else if(rtw_access_ctrl(padapter, sa) == _FALSE) { status = _STATS_UNABLE_HANDLE_STA_; goto auth_fail; } #endif pstat = rtw_get_stainfo(pstapriv, sa); if (pstat == NULL) { // allocate a new one DBG_871X("going to alloc stainfo for sa="MAC_FMT"\n", MAC_ARG(sa)); pstat = rtw_alloc_stainfo(pstapriv, sa); if (pstat == NULL) { DBG_871X(" Exceed the upper limit of supported clients...\n"); status = _STATS_UNABLE_HANDLE_STA_; goto auth_fail; } pstat->state = WIFI_FW_AUTH_NULL; pstat->auth_seq = 0; //pstat->flags = 0; //pstat->capability = 0; } else { _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); if(rtw_is_list_empty(&pstat->asoc_list)==_FALSE) { rtw_list_delete(&pstat->asoc_list); pstapriv->asoc_list_cnt--; if (pstat->expire_to > 0) { //TODO: STA re_auth within expire_to } } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); if (seq==1) { //TODO: STA re_auth and auth timeout } } _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); if (rtw_is_list_empty(&pstat->auth_list)) { rtw_list_insert_tail(&pstat->auth_list, &pstapriv->auth_list); pstapriv->auth_list_cnt++; } _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); if (pstat->auth_seq == 0) pstat->expire_to = pstapriv->auth_to; if ((pstat->auth_seq + 1) != seq) { DBG_871X("(1)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n", seq, pstat->auth_seq+1); status = _STATS_OUT_OF_AUTH_SEQ_; goto auth_fail; } if (algorithm==0 && (auth_mode == 0 || auth_mode == 2 || auth_mode == 3)) { if (seq == 1) { pstat->state &= ~WIFI_FW_AUTH_NULL; pstat->state |= WIFI_FW_AUTH_SUCCESS; pstat->expire_to = pstapriv->assoc_to; pstat->authalg = algorithm; } else { DBG_871X("(2)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n", seq, pstat->auth_seq+1); status = _STATS_OUT_OF_AUTH_SEQ_; goto auth_fail; } } else // shared system or auto authentication { if (seq == 1) { //prepare for the challenging txt... //get_random_bytes((void *)pstat->chg_txt, 128);//TODO: _rtw_memset((void *)pstat->chg_txt, 78, 128); pstat->state &= ~WIFI_FW_AUTH_NULL; pstat->state |= WIFI_FW_AUTH_STATE; pstat->authalg = algorithm; pstat->auth_seq = 2; } else if (seq == 3) { //checking for challenging txt... DBG_871X("checking for challenging txt...\n"); p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + 4 + _AUTH_IE_OFFSET_ , _CHLGETXT_IE_, (int *)&ie_len, len - WLAN_HDR_A3_LEN - _AUTH_IE_OFFSET_ - 4); if((p==NULL) || (ie_len<=0)) { DBG_871X("auth rejected because challenge failure!(1)\n"); status = _STATS_CHALLENGE_FAIL_; goto auth_fail; } if (_rtw_memcmp((void *)(p + 2), pstat->chg_txt, 128)) { pstat->state &= (~WIFI_FW_AUTH_STATE); pstat->state |= WIFI_FW_AUTH_SUCCESS; // challenging txt is correct... pstat->expire_to = pstapriv->assoc_to; } else { DBG_871X("auth rejected because challenge failure!\n"); status = _STATS_CHALLENGE_FAIL_; goto auth_fail; } } else { DBG_871X("(3)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n", seq, pstat->auth_seq+1); status = _STATS_OUT_OF_AUTH_SEQ_; goto auth_fail; } } // Now, we are going to issue_auth... pstat->auth_seq = seq + 1; #ifdef CONFIG_NATIVEAP_MLME issue_auth(padapter, pstat, (unsigned short)(_STATS_SUCCESSFUL_)); #endif if (pstat->state & WIFI_FW_AUTH_SUCCESS) pstat->auth_seq = 0; return _SUCCESS; auth_fail: if(pstat) rtw_free_stainfo(padapter , pstat); pstat = &stat; _rtw_memset((char *)pstat, '\0', sizeof(stat)); pstat->auth_seq = 2; _rtw_memcpy(pstat->hwaddr, sa, 6); #ifdef CONFIG_NATIVEAP_MLME issue_auth(padapter, pstat, (unsigned short)status); #endif #endif return _FAIL; } unsigned int OnAuthClient(_adapter *padapter, union recv_frame *precv_frame) { unsigned int seq, len, status, algthm, offset; unsigned char *p; unsigned int go2asoc = 0; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 *pframe = precv_frame->u.hdr.rx_data; uint pkt_len = precv_frame->u.hdr.len; DBG_871X("%s\n", __FUNCTION__); //check A1 matches or not if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), get_da(pframe), ETH_ALEN)) return _SUCCESS; if (!(pmlmeinfo->state & WIFI_FW_AUTH_STATE)) return _SUCCESS; offset = (GetPrivacy(pframe))? 4: 0; algthm = le16_to_cpu(*(unsigned short *)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset)); seq = le16_to_cpu(*(unsigned short *)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset + 2)); status = le16_to_cpu(*(unsigned short *)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset + 4)); if (status != 0) { DBG_871X("clnt auth fail, status: %d\n", status); if(status == 13)//&& pmlmeinfo->auth_algo == dot11AuthAlgrthm_Auto) { if(pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared) pmlmeinfo->auth_algo = dot11AuthAlgrthm_Open; else pmlmeinfo->auth_algo = dot11AuthAlgrthm_Shared; //pmlmeinfo->reauth_count = 0; } set_link_timer(pmlmeext, 1); goto authclnt_fail; } if (seq == 2) { if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared) { // legendary shared system p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _AUTH_IE_OFFSET_, _CHLGETXT_IE_, (int *)&len, pkt_len - WLAN_HDR_A3_LEN - _AUTH_IE_OFFSET_); if (p == NULL) { //DBG_871X("marc: no challenge text?\n"); goto authclnt_fail; } _rtw_memcpy((void *)(pmlmeinfo->chg_txt), (void *)(p + 2), len); pmlmeinfo->auth_seq = 3; issue_auth(padapter, NULL, 0); set_link_timer(pmlmeext, REAUTH_TO); return _SUCCESS; } else { // open system go2asoc = 1; } } else if (seq == 4) { if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared) { go2asoc = 1; } else { goto authclnt_fail; } } else { // this is also illegal //DBG_871X("marc: clnt auth failed due to illegal seq=%x\n", seq); goto authclnt_fail; } if (go2asoc) { DBG_871X_LEVEL(_drv_always_, "auth success, start assoc\n"); start_clnt_assoc(padapter); return _SUCCESS; } authclnt_fail: //pmlmeinfo->state &= ~(WIFI_FW_AUTH_STATE); return _FAIL; } unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame) { #ifdef CONFIG_AP_MODE _irqL irqL; u16 capab_info, listen_interval; struct rtw_ieee802_11_elems elems; struct sta_info *pstat; unsigned char reassoc, *p, *pos, *wpa_ie; unsigned char WMM_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01}; int i, ie_len, wpa_ie_len, left; unsigned char supportRate[16]; int supportRateNum; unsigned short status = _STATS_SUCCESSFUL_; unsigned short frame_type, ie_offset=0; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *cur = &(pmlmeinfo->network); struct sta_priv *pstapriv = &padapter->stapriv; u8 *pframe = precv_frame->u.hdr.rx_data; uint pkt_len = precv_frame->u.hdr.len; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &(padapter->wdinfo); u8 p2p_status_code = P2P_STATUS_SUCCESS; u8 *p2pie; u32 p2pielen = 0; #ifdef CONFIG_WFD u8 wfd_ie[ 128 ] = { 0x00 }; u32 wfd_ielen = 0; #endif // CONFIG_WFD #endif //CONFIG_P2P #ifdef CONFIG_CONCURRENT_MODE if(((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) && check_buddy_fwstate(padapter, _FW_UNDER_LINKING|_FW_UNDER_SURVEY)) { //don't process assoc request; return _SUCCESS; } #endif //CONFIG_CONCURRENT_MODE if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) return _FAIL; frame_type = GetFrameSubType(pframe); if (frame_type == WIFI_ASSOCREQ) { reassoc = 0; ie_offset = _ASOCREQ_IE_OFFSET_; } else // WIFI_REASSOCREQ { reassoc = 1; ie_offset = _REASOCREQ_IE_OFFSET_; } if (pkt_len < IEEE80211_3ADDR_LEN + ie_offset) { DBG_871X("handle_assoc(reassoc=%d) - too short payload (len=%lu)" "\n", reassoc, (unsigned long)pkt_len); return _FAIL; } pstat = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); if (pstat == (struct sta_info *)NULL) { status = _RSON_CLS2_; goto asoc_class2_error; } capab_info = RTW_GET_LE16(pframe + WLAN_HDR_A3_LEN); //capab_info = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN)); //listen_interval = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN+2)); listen_interval = RTW_GET_LE16(pframe + WLAN_HDR_A3_LEN+2); left = pkt_len - (IEEE80211_3ADDR_LEN + ie_offset); pos = pframe + (IEEE80211_3ADDR_LEN + ie_offset); DBG_871X("%s\n", __FUNCTION__); // check if this stat has been successfully authenticated/assocated if (!((pstat->state) & WIFI_FW_AUTH_SUCCESS)) { if (!((pstat->state) & WIFI_FW_ASSOC_SUCCESS)) { status = _RSON_CLS2_; goto asoc_class2_error; } else { pstat->state &= (~WIFI_FW_ASSOC_SUCCESS); pstat->state |= WIFI_FW_ASSOC_STATE; } } else { pstat->state &= (~WIFI_FW_AUTH_SUCCESS); pstat->state |= WIFI_FW_ASSOC_STATE; } #if 0// todo:tkip_countermeasures if (hapd->tkip_countermeasures) { resp = WLAN_REASON_MICHAEL_MIC_FAILURE; goto fail; } #endif pstat->capability = capab_info; #if 0//todo: //check listen_interval if (listen_interval > hapd->conf->max_listen_interval) { hostapd_logger(hapd, mgmt->sa, HOSTAPD_MODULE_IEEE80211, HOSTAPD_LEVEL_DEBUG, "Too large Listen Interval (%d)", listen_interval); resp = WLAN_STATUS_ASSOC_DENIED_LISTEN_INT_TOO_LARGE; goto fail; } pstat->listen_interval = listen_interval; #endif //now parse all ieee802_11 ie to point to elems if (rtw_ieee802_11_parse_elems(pos, left, &elems, 1) == ParseFailed || !elems.ssid) { DBG_871X("STA " MAC_FMT " sent invalid association request\n", MAC_ARG(pstat->hwaddr)); status = _STATS_FAILURE_; goto OnAssocReqFail; } // now we should check all the fields... // checking SSID p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + ie_offset, _SSID_IE_, &ie_len, pkt_len - WLAN_HDR_A3_LEN - ie_offset); if (p == NULL) { status = _STATS_FAILURE_; } if (ie_len == 0) // broadcast ssid, however it is not allowed in assocreq status = _STATS_FAILURE_; else { // check if ssid match if (!_rtw_memcmp((void *)(p+2), cur->Ssid.Ssid, cur->Ssid.SsidLength)) status = _STATS_FAILURE_; if (ie_len != cur->Ssid.SsidLength) status = _STATS_FAILURE_; } if(_STATS_SUCCESSFUL_ != status) goto OnAssocReqFail; // check if the supported rate is ok p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + ie_offset, _SUPPORTEDRATES_IE_, &ie_len, pkt_len - WLAN_HDR_A3_LEN - ie_offset); if (p == NULL) { DBG_871X("Rx a sta assoc-req which supported rate is empty!\n"); // use our own rate set as statoin used //_rtw_memcpy(supportRate, AP_BSSRATE, AP_BSSRATE_LEN); //supportRateNum = AP_BSSRATE_LEN; status = _STATS_FAILURE_; goto OnAssocReqFail; } else { _rtw_memcpy(supportRate, p+2, ie_len); supportRateNum = ie_len; p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + ie_offset, _EXT_SUPPORTEDRATES_IE_ , &ie_len, pkt_len - WLAN_HDR_A3_LEN - ie_offset); if (p != NULL) { if(supportRateNum<=sizeof(supportRate)) { _rtw_memcpy(supportRate+supportRateNum, p+2, ie_len); supportRateNum += ie_len; } } } //todo: mask supportRate between AP & STA -> move to update raid //get_matched_rate(pmlmeext, supportRate, &supportRateNum, 0); //update station supportRate pstat->bssratelen = supportRateNum; _rtw_memcpy(pstat->bssrateset, supportRate, supportRateNum); UpdateBrateTblForSoftAP(pstat->bssrateset, pstat->bssratelen); //check RSN/WPA/WPS pstat->dot8021xalg = 0; pstat->wpa_psk = 0; pstat->wpa_group_cipher = 0; pstat->wpa2_group_cipher = 0; pstat->wpa_pairwise_cipher = 0; pstat->wpa2_pairwise_cipher = 0; _rtw_memset(pstat->wpa_ie, 0, sizeof(pstat->wpa_ie)); if((psecuritypriv->wpa_psk & BIT(1)) && elems.rsn_ie) { int group_cipher=0, pairwise_cipher=0; wpa_ie = elems.rsn_ie; wpa_ie_len = elems.rsn_ie_len; if(rtw_parse_wpa2_ie(wpa_ie-2, wpa_ie_len+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) { pstat->dot8021xalg = 1;//psk, todo:802.1x pstat->wpa_psk |= BIT(1); pstat->wpa2_group_cipher = group_cipher&psecuritypriv->wpa2_group_cipher; pstat->wpa2_pairwise_cipher = pairwise_cipher&psecuritypriv->wpa2_pairwise_cipher; if(!pstat->wpa2_group_cipher) status = WLAN_STATUS_GROUP_CIPHER_NOT_VALID; if(!pstat->wpa2_pairwise_cipher) status = WLAN_STATUS_PAIRWISE_CIPHER_NOT_VALID; } else { status = WLAN_STATUS_INVALID_IE; } } else if ((psecuritypriv->wpa_psk & BIT(0)) && elems.wpa_ie) { int group_cipher=0, pairwise_cipher=0; wpa_ie = elems.wpa_ie; wpa_ie_len = elems.wpa_ie_len; if(rtw_parse_wpa_ie(wpa_ie-2, wpa_ie_len+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) { pstat->dot8021xalg = 1;//psk, todo:802.1x pstat->wpa_psk |= BIT(0); pstat->wpa_group_cipher = group_cipher&psecuritypriv->wpa_group_cipher; pstat->wpa_pairwise_cipher = pairwise_cipher&psecuritypriv->wpa_pairwise_cipher; if(!pstat->wpa_group_cipher) status = WLAN_STATUS_GROUP_CIPHER_NOT_VALID; if(!pstat->wpa_pairwise_cipher) status = WLAN_STATUS_PAIRWISE_CIPHER_NOT_VALID; } else { status = WLAN_STATUS_INVALID_IE; } } else { wpa_ie = NULL; wpa_ie_len = 0; } if(_STATS_SUCCESSFUL_ != status) goto OnAssocReqFail; pstat->flags &= ~(WLAN_STA_WPS | WLAN_STA_MAYBE_WPS); //if (hapd->conf->wps_state && wpa_ie == NULL) { //todo: to check ap if supporting WPS if(wpa_ie == NULL) { if (elems.wps_ie) { DBG_871X("STA included WPS IE in " "(Re)Association Request - assume WPS is " "used\n"); pstat->flags |= WLAN_STA_WPS; //wpabuf_free(sta->wps_ie); //sta->wps_ie = wpabuf_alloc_copy(elems.wps_ie + 4, // elems.wps_ie_len - 4); } else { DBG_871X("STA did not include WPA/RSN IE " "in (Re)Association Request - possible WPS " "use\n"); pstat->flags |= WLAN_STA_MAYBE_WPS; } // AP support WPA/RSN, and sta is going to do WPS, but AP is not ready // that the selected registrar of AP is _FLASE if((psecuritypriv->wpa_psk >0) && (pstat->flags & (WLAN_STA_WPS|WLAN_STA_MAYBE_WPS))) { if(pmlmepriv->wps_beacon_ie) { u8 selected_registrar = 0; rtw_get_wps_attr_content(pmlmepriv->wps_beacon_ie, pmlmepriv->wps_beacon_ie_len, WPS_ATTR_SELECTED_REGISTRAR , &selected_registrar, NULL); if(!selected_registrar) { DBG_871X("selected_registrar is _FALSE , or AP is not ready to do WPS\n"); status = _STATS_UNABLE_HANDLE_STA_; goto OnAssocReqFail; } } } } else { int copy_len; if(psecuritypriv->wpa_psk == 0) { DBG_871X("STA " MAC_FMT ": WPA/RSN IE in association " "request, but AP don't support WPA/RSN\n", MAC_ARG(pstat->hwaddr)); status = WLAN_STATUS_INVALID_IE; goto OnAssocReqFail; } if (elems.wps_ie) { DBG_871X("STA included WPS IE in " "(Re)Association Request - WPS is " "used\n"); pstat->flags |= WLAN_STA_WPS; copy_len=0; } else { copy_len = ((wpa_ie_len+2) > sizeof(pstat->wpa_ie)) ? (sizeof(pstat->wpa_ie)):(wpa_ie_len+2); } if(copy_len>0) _rtw_memcpy(pstat->wpa_ie, wpa_ie-2, copy_len); } // check if there is WMM IE & support WWM-PS pstat->flags &= ~WLAN_STA_WME; pstat->qos_option = 0; pstat->qos_info = 0; pstat->has_legacy_ac = _TRUE; pstat->uapsd_vo = 0; pstat->uapsd_vi = 0; pstat->uapsd_be = 0; pstat->uapsd_bk = 0; if (pmlmepriv->qospriv.qos_option) { p = pframe + WLAN_HDR_A3_LEN + ie_offset; ie_len = 0; for (;;) { p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &ie_len, pkt_len - WLAN_HDR_A3_LEN - ie_offset); if (p != NULL) { if (_rtw_memcmp(p+2, WMM_IE, 6)) { pstat->flags |= WLAN_STA_WME; pstat->qos_option = 1; pstat->qos_info = *(p+8); pstat->max_sp_len = (pstat->qos_info>>5)&0x3; if((pstat->qos_info&0xf) !=0xf) pstat->has_legacy_ac = _TRUE; else pstat->has_legacy_ac = _FALSE; if(pstat->qos_info&0xf) { if(pstat->qos_info&BIT(0)) pstat->uapsd_vo = BIT(0)|BIT(1); else pstat->uapsd_vo = 0; if(pstat->qos_info&BIT(1)) pstat->uapsd_vi = BIT(0)|BIT(1); else pstat->uapsd_vi = 0; if(pstat->qos_info&BIT(2)) pstat->uapsd_bk = BIT(0)|BIT(1); else pstat->uapsd_bk = 0; if(pstat->qos_info&BIT(3)) pstat->uapsd_be = BIT(0)|BIT(1); else pstat->uapsd_be = 0; } break; } } else { break; } p = p + ie_len + 2; } } #ifdef CONFIG_80211N_HT /* save HT capabilities in the sta object */ _rtw_memset(&pstat->htpriv.ht_cap, 0, sizeof(struct rtw_ieee80211_ht_cap)); if (elems.ht_capabilities && elems.ht_capabilities_len >= sizeof(struct rtw_ieee80211_ht_cap)) { pstat->flags |= WLAN_STA_HT; pstat->flags |= WLAN_STA_WME; _rtw_memcpy(&pstat->htpriv.ht_cap, elems.ht_capabilities, sizeof(struct rtw_ieee80211_ht_cap)); } else pstat->flags &= ~WLAN_STA_HT; if((pmlmepriv->htpriv.ht_option == _FALSE) && (pstat->flags&WLAN_STA_HT)) { status = _STATS_FAILURE_; goto OnAssocReqFail; } if ((pstat->flags & WLAN_STA_HT) && ((pstat->wpa2_pairwise_cipher&WPA_CIPHER_TKIP) || (pstat->wpa_pairwise_cipher&WPA_CIPHER_TKIP))) { DBG_871X("HT: " MAC_FMT " tried to " "use TKIP with HT association\n", MAC_ARG(pstat->hwaddr)); //status = WLAN_STATUS_CIPHER_REJECTED_PER_POLICY; //goto OnAssocReqFail; } #endif /* CONFIG_80211N_HT */ #ifdef CONFIG_80211AC_VHT _rtw_memset(&pstat->vhtpriv, 0, sizeof(struct vht_priv)); if (elems.vht_capabilities && elems.vht_capabilities_len == 12) { pstat->flags |= WLAN_STA_VHT; _rtw_memcpy(pstat->vhtpriv.vht_cap, elems.vht_capabilities, 12); if (elems.vht_op_mode_notify && elems.vht_op_mode_notify_len == 1) { _rtw_memcpy(&pstat->vhtpriv.vht_op_mode_notify, elems.vht_op_mode_notify, 1); } else // for Frame without Operating Mode notify ie; default: 80M { pstat->vhtpriv.vht_op_mode_notify = CHANNEL_WIDTH_80; } } else { pstat->flags &= ~WLAN_STA_VHT; } if((pmlmepriv->vhtpriv.vht_option == _FALSE) && (pstat->flags&WLAN_STA_VHT)) { status = _STATS_FAILURE_; goto OnAssocReqFail; } #endif /* CONFIG_80211AC_VHT */ // //if (hapd->iface->current_mode->mode == HOSTAPD_MODE_IEEE80211G)//? pstat->flags |= WLAN_STA_NONERP; for (i = 0; i < pstat->bssratelen; i++) { if ((pstat->bssrateset[i] & 0x7f) > 22) { pstat->flags &= ~WLAN_STA_NONERP; break; } } if (pstat->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) pstat->flags |= WLAN_STA_SHORT_PREAMBLE; else pstat->flags &= ~WLAN_STA_SHORT_PREAMBLE; if (status != _STATS_SUCCESSFUL_) goto OnAssocReqFail; #ifdef CONFIG_P2P pstat->is_p2p_device = _FALSE; if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { if( (p2pie=rtw_get_p2p_ie(pframe + WLAN_HDR_A3_LEN + ie_offset , pkt_len - WLAN_HDR_A3_LEN - ie_offset , NULL, &p2pielen))) { pstat->is_p2p_device = _TRUE; if((p2p_status_code=(u8)process_assoc_req_p2p_ie(pwdinfo, pframe, pkt_len, pstat))>0) { pstat->p2p_status_code = p2p_status_code; status = _STATS_CAP_FAIL_; goto OnAssocReqFail; } } #ifdef CONFIG_WFD if(rtw_get_wfd_ie(pframe + WLAN_HDR_A3_LEN + ie_offset , pkt_len - WLAN_HDR_A3_LEN - ie_offset , wfd_ie, &wfd_ielen )) { u8 attr_content[ 10 ] = { 0x00 }; u32 attr_contentlen = 0; DBG_8192C( "[%s] WFD IE Found!!\n", __FUNCTION__ ); rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); if ( attr_contentlen ) { pwdinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info->peer_rtsp_ctrlport ); } } #endif } pstat->p2p_status_code = p2p_status_code; #endif //CONFIG_P2P //TODO: identify_proprietary_vendor_ie(); // Realtek proprietary IE // identify if this is Broadcom sta // identify if this is ralink sta // Customer proprietary IE /* get a unique AID */ if (pstat->aid > 0) { DBG_871X(" old AID %d\n", pstat->aid); } else { for (pstat->aid = 1; pstat->aid <= NUM_STA; pstat->aid++) if (pstapriv->sta_aid[pstat->aid - 1] == NULL) break; //if (pstat->aid > NUM_STA) { if (pstat->aid > pstapriv->max_num_sta) { pstat->aid = 0; DBG_871X(" no room for more AIDs\n"); status = WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA; goto OnAssocReqFail; } else { pstapriv->sta_aid[pstat->aid - 1] = pstat; DBG_871X("allocate new AID = (%d)\n", pstat->aid); } } pstat->state &= (~WIFI_FW_ASSOC_STATE); pstat->state |= WIFI_FW_ASSOC_SUCCESS; _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); if (!rtw_is_list_empty(&pstat->auth_list)) { rtw_list_delete(&pstat->auth_list); pstapriv->auth_list_cnt--; } _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); if (rtw_is_list_empty(&pstat->asoc_list)) { pstat->expire_to = pstapriv->expire_to; rtw_list_insert_tail(&pstat->asoc_list, &pstapriv->asoc_list); pstapriv->asoc_list_cnt++; } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); // now the station is qualified to join our BSS... if(pstat && (pstat->state & WIFI_FW_ASSOC_SUCCESS) && (_STATS_SUCCESSFUL_==status)) { #ifdef CONFIG_NATIVEAP_MLME //.1 bss_cap_update & sta_info_update bss_cap_update_on_sta_join(padapter, pstat); sta_info_update(padapter, pstat); //.2 issue assoc rsp before notify station join event. if (frame_type == WIFI_ASSOCREQ) issue_asocrsp(padapter, status, pstat, WIFI_ASSOCRSP); else issue_asocrsp(padapter, status, pstat, WIFI_REASSOCRSP); #ifdef CONFIG_IOCTL_CFG80211 _enter_critical_bh(&pstat->lock, &irqL); if(pstat->passoc_req) { rtw_mfree(pstat->passoc_req, pstat->assoc_req_len); pstat->passoc_req = NULL; pstat->assoc_req_len = 0; } pstat->passoc_req = rtw_zmalloc(pkt_len); if(pstat->passoc_req) { _rtw_memcpy(pstat->passoc_req, pframe, pkt_len); pstat->assoc_req_len = pkt_len; } _exit_critical_bh(&pstat->lock, &irqL); #endif //CONFIG_IOCTL_CFG80211 //.3-(1) report sta add event report_add_sta_event(padapter, pstat->hwaddr, pstat->aid); #endif //CONFIG_NATIVEAP_MLME } return _SUCCESS; asoc_class2_error: #ifdef CONFIG_NATIVEAP_MLME issue_deauth(padapter, (void *)GetAddr2Ptr(pframe), status); #endif return _FAIL; OnAssocReqFail: #ifdef CONFIG_NATIVEAP_MLME pstat->aid = 0; if (frame_type == WIFI_ASSOCREQ) issue_asocrsp(padapter, status, pstat, WIFI_ASSOCRSP); else issue_asocrsp(padapter, status, pstat, WIFI_REASSOCRSP); #endif #endif /* CONFIG_AP_MODE */ return _FAIL; } unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame) { uint i; int res; unsigned short status; PNDIS_802_11_VARIABLE_IEs pIE; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); //WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); u8 *pframe = precv_frame->u.hdr.rx_data; uint pkt_len = precv_frame->u.hdr.len; PNDIS_802_11_VARIABLE_IEs pWapiIE = NULL; DBG_871X("%s\n", __FUNCTION__); //check A1 matches or not if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), get_da(pframe), ETH_ALEN)) return _SUCCESS; if (!(pmlmeinfo->state & (WIFI_FW_AUTH_SUCCESS | WIFI_FW_ASSOC_STATE))) return _SUCCESS; if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) return _SUCCESS; _cancel_timer_ex(&pmlmeext->link_timer); //status if ((status = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN + 2))) > 0) { DBG_871X("assoc reject, status code: %d\n", status); pmlmeinfo->state = WIFI_FW_NULL_STATE; res = -4; goto report_assoc_result; } //get capabilities pmlmeinfo->capability = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN)); //set slot time pmlmeinfo->slotTime = (pmlmeinfo->capability & BIT(10))? 9: 20; //AID res = pmlmeinfo->aid = (int)(le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN + 4))&0x3fff); //following are moved to join event callback function //to handle HT, WMM, rate adaptive, update MAC reg //for not to handle the synchronous IO in the tasklet for (i = (6 + WLAN_HDR_A3_LEN); i < pkt_len;) { pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + i); switch (pIE->ElementID) { case _VENDOR_SPECIFIC_IE_: if (_rtw_memcmp(pIE->data, WMM_PARA_OUI, 6)) //WMM { WMM_param_handler(padapter, pIE); } #if defined(CONFIG_P2P) && defined(CONFIG_WFD) else if ( _rtw_memcmp(pIE->data, WFD_OUI, 4)) //WFD { DBG_871X( "[%s] Found WFD IE\n", __FUNCTION__ ); WFD_info_handler( padapter, pIE ); } #endif break; #ifdef CONFIG_WAPI_SUPPORT case _WAPI_IE_: pWapiIE = pIE; break; #endif case _HT_CAPABILITY_IE_: //HT caps HT_caps_handler(padapter, pIE); break; case _HT_EXTRA_INFO_IE_: //HT info HT_info_handler(padapter, pIE); break; #ifdef CONFIG_80211AC_VHT case EID_VHTCapability: VHT_caps_handler(padapter, pIE); break; case EID_VHTOperation: VHT_operation_handler(padapter, pIE); break; #endif case _ERPINFO_IE_: ERP_IE_handler(padapter, pIE); default: break; } i += (pIE->Length + 2); } #ifdef CONFIG_WAPI_SUPPORT rtw_wapi_on_assoc_ok(padapter, pIE); #endif pmlmeinfo->state &= (~WIFI_FW_ASSOC_STATE); pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS; //Update Basic Rate Table for spec, 2010-12-28 , by thomas UpdateBrateTbl(padapter, pmlmeinfo->network.SupportedRates); report_assoc_result: if (res > 0) { rtw_buf_update(&pmlmepriv->assoc_rsp, &pmlmepriv->assoc_rsp_len, pframe, pkt_len); } else { rtw_buf_free(&pmlmepriv->assoc_rsp, &pmlmepriv->assoc_rsp_len); } report_join_res(padapter, res); return _SUCCESS; } unsigned int OnDeAuth(_adapter *padapter, union recv_frame *precv_frame) { unsigned short reason; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 *pframe = precv_frame->u.hdr.rx_data; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo= &(padapter->wdinfo); #endif //CONFIG_P2P //check A3 if (!(_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN))) return _SUCCESS; #ifdef CONFIG_P2P if ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) { _cancel_timer_ex( &pwdinfo->reset_ch_sitesurvey ); _set_timer( &pwdinfo->reset_ch_sitesurvey, 10 ); } #endif //CONFIG_P2P reason = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN)); DBG_871X("%s Reason code(%d)\n", __FUNCTION__,reason); rtw_lock_rx_suspend_timeout(8000); #ifdef CONFIG_AP_MODE if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { _irqL irqL; struct sta_info *psta; struct sta_priv *pstapriv = &padapter->stapriv; //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); //rtw_free_stainfo(padapter, psta); //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); DBG_871X_LEVEL(_drv_always_, "ap recv deauth reason code(%d) sta:%pM\n", reason, GetAddr2Ptr(pframe)); psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); if(psta) { u8 updated = _FALSE; _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); if(rtw_is_list_empty(&psta->asoc_list)==_FALSE) { rtw_list_delete(&psta->asoc_list); pstapriv->asoc_list_cnt--; updated = ap_free_sta(padapter, psta, _FALSE, reason); } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); associated_clients_update(padapter, updated); } return _SUCCESS; } else #endif { int ignore_received_deauth = 0; // Commented by Albert 20130604 // Before sending the auth frame to start the STA/GC mode connection with AP/GO, // we will send the deauth first. // However, the Win8.1 with BRCM Wi-Fi will send the deauth with reason code 6 to us after receieving our deauth. // Added the following code to avoid this case. if ( ( pmlmeinfo->state & WIFI_FW_AUTH_STATE ) || ( pmlmeinfo->state & WIFI_FW_ASSOC_STATE ) ) { if ( reason == WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA ) { ignore_received_deauth = 1; } else if (WLAN_REASON_PREV_AUTH_NOT_VALID == reason) { // TODO: 802.11r ignore_received_deauth = 1; } } DBG_871X_LEVEL(_drv_always_, "sta recv deauth reason code(%d) sta:%pM, ignore = %d\n", reason, GetAddr3Ptr(pframe), ignore_received_deauth); if ( 0 == ignore_received_deauth ) { receive_disconnect(padapter, GetAddr3Ptr(pframe) ,reason); } } pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; return _SUCCESS; } unsigned int OnDisassoc(_adapter *padapter, union recv_frame *precv_frame) { unsigned short reason; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 *pframe = precv_frame->u.hdr.rx_data; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo= &(padapter->wdinfo); #endif //CONFIG_P2P //check A3 if (!(_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN))) return _SUCCESS; #ifdef CONFIG_P2P if ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) { _cancel_timer_ex( &pwdinfo->reset_ch_sitesurvey ); _set_timer( &pwdinfo->reset_ch_sitesurvey, 10 ); } #endif //CONFIG_P2P reason = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN)); DBG_871X("%s Reason code(%d)\n", __FUNCTION__,reason); rtw_lock_rx_suspend_timeout(8000); #ifdef CONFIG_AP_MODE if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { _irqL irqL; struct sta_info *psta; struct sta_priv *pstapriv = &padapter->stapriv; //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); //rtw_free_stainfo(padapter, psta); //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); DBG_871X_LEVEL(_drv_always_, "ap recv disassoc reason code(%d) sta:%pM\n", reason, GetAddr2Ptr(pframe)); psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); if(psta) { u8 updated = _FALSE; _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); if(rtw_is_list_empty(&psta->asoc_list)==_FALSE) { rtw_list_delete(&psta->asoc_list); pstapriv->asoc_list_cnt--; updated = ap_free_sta(padapter, psta, _FALSE, reason); } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); associated_clients_update(padapter, updated); } return _SUCCESS; } else #endif { DBG_871X_LEVEL(_drv_always_, "sta recv disassoc reason code(%d) sta:%pM\n", reason, GetAddr3Ptr(pframe)); receive_disconnect(padapter, GetAddr3Ptr(pframe), reason); } pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; return _SUCCESS; } unsigned int OnAtim(_adapter *padapter, union recv_frame *precv_frame) { DBG_871X("%s\n", __FUNCTION__); return _SUCCESS; } unsigned int on_action_spct_ch_switch(_adapter *padapter, struct sta_info *psta, u8 *ies, uint ies_len) { unsigned int ret = _FAIL; struct mlme_ext_priv *mlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(mlmeext->mlmext_info); if (!(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) { ret = _SUCCESS; goto exit; } if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) { int ch_switch_mode = -1, ch = -1, ch_switch_cnt = -1; int ch_offset = -1; u8 bwmode; struct ieee80211_info_element *ie; DBG_871X(FUNC_NDEV_FMT" from "MAC_FMT"\n", FUNC_NDEV_ARG(padapter->pnetdev), MAC_ARG(psta->hwaddr)); for_each_ie(ie, ies, ies_len) { if (ie->id == WLAN_EID_CHANNEL_SWITCH) { ch_switch_mode = ie->data[0]; ch = ie->data[1]; ch_switch_cnt = ie->data[2]; DBG_871X("ch_switch_mode:%d, ch:%d, ch_switch_cnt:%d\n", ch_switch_mode, ch, ch_switch_cnt); } else if (ie->id == WLAN_EID_SECONDARY_CHANNEL_OFFSET) { ch_offset = secondary_ch_offset_to_hal_ch_offset(ie->data[0]); DBG_871X("ch_offset:%d\n", ch_offset); } } if (ch == -1) return _SUCCESS; if (ch_offset == -1) bwmode = mlmeext->cur_bwmode; else bwmode = (ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) ? CHANNEL_WIDTH_20 : CHANNEL_WIDTH_40; ch_offset = (ch_offset == -1) ? mlmeext->cur_ch_offset : ch_offset; /* todo: * 1. the decision of channel switching * 2. things after channel switching */ ret = rtw_set_ch_cmd(padapter, ch, bwmode, ch_offset, _TRUE); } exit: return ret; } unsigned int on_action_spct(_adapter *padapter, union recv_frame *precv_frame) { unsigned int ret = _FAIL; struct sta_info *psta = NULL; struct sta_priv *pstapriv = &padapter->stapriv; u8 *pframe = precv_frame->u.hdr.rx_data; uint frame_len = precv_frame->u.hdr.len; u8 *frame_body = (u8 *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); u8 category; u8 action; DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(padapter->pnetdev)); psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); if (!psta) goto exit; category = frame_body[0]; if(category != RTW_WLAN_CATEGORY_SPECTRUM_MGMT) goto exit; action = frame_body[1]; switch (action) { case RTW_WLAN_ACTION_SPCT_MSR_REQ: case RTW_WLAN_ACTION_SPCT_MSR_RPRT: case RTW_WLAN_ACTION_SPCT_TPC_REQ: case RTW_WLAN_ACTION_SPCT_TPC_RPRT: break; case RTW_WLAN_ACTION_SPCT_CHL_SWITCH: #ifdef CONFIG_SPCT_CH_SWITCH ret = on_action_spct_ch_switch(padapter, psta, &frame_body[2], frame_len-(frame_body-pframe)-2); #endif break; default: break; } exit: return ret; } unsigned int OnAction_qos(_adapter *padapter, union recv_frame *precv_frame) { return _SUCCESS; } unsigned int OnAction_dls(_adapter *padapter, union recv_frame *precv_frame) { return _SUCCESS; } unsigned int OnAction_back(_adapter *padapter, union recv_frame *precv_frame) { u8 *addr; struct sta_info *psta=NULL; struct recv_reorder_ctrl *preorder_ctrl; unsigned char *frame_body; unsigned char category, action; unsigned short tid, status, reason_code = 0; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 *pframe = precv_frame->u.hdr.rx_data; struct sta_priv *pstapriv = &padapter->stapriv; #ifdef CONFIG_80211N_HT DBG_871X("%s\n", __FUNCTION__); //check RA matches or not if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN))//for if1, sta/ap mode return _SUCCESS; /* //check A1 matches or not if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), get_da(pframe), ETH_ALEN)) return _SUCCESS; */ if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) if (!(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) return _SUCCESS; addr = GetAddr2Ptr(pframe); psta = rtw_get_stainfo(pstapriv, addr); if(psta==NULL) return _SUCCESS; frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); category = frame_body[0]; if (category == RTW_WLAN_CATEGORY_BACK)// representing Block Ack { #ifdef CONFIG_TDLS if((psta->tdls_sta_state & TDLS_LINKED_STATE) && (psta->htpriv.ht_option==_TRUE) && (psta->htpriv.ampdu_enable==_TRUE)) { DBG_871X("Recv [%s] from direc link\n", __FUNCTION__); } else #endif //CONFIG_TDLS if (!pmlmeinfo->HT_enable) { return _SUCCESS; } action = frame_body[1]; DBG_871X("%s, action=%d\n", __FUNCTION__, action); switch (action) { case RTW_WLAN_ACTION_ADDBA_REQ: //ADDBA request _rtw_memcpy(&(pmlmeinfo->ADDBA_req), &(frame_body[2]), sizeof(struct ADDBA_request)); //process_addba_req(padapter, (u8*)&(pmlmeinfo->ADDBA_req), GetAddr3Ptr(pframe)); process_addba_req(padapter, (u8*)&(pmlmeinfo->ADDBA_req), addr); if(pmlmeinfo->bAcceptAddbaReq == _TRUE) { issue_action_BA(padapter, addr, RTW_WLAN_ACTION_ADDBA_RESP, 0); } else { issue_action_BA(padapter, addr, RTW_WLAN_ACTION_ADDBA_RESP, 37);//reject ADDBA Req } break; case RTW_WLAN_ACTION_ADDBA_RESP: //ADDBA response //status = frame_body[3] | (frame_body[4] << 8); //endian issue status = RTW_GET_LE16(&frame_body[3]); tid = ((frame_body[5] >> 2) & 0x7); if (status == 0) { //successful DBG_871X("agg_enable for TID=%d\n", tid); psta->htpriv.agg_enable_bitmap |= 1 << tid; psta->htpriv.candidate_tid_bitmap &= ~BIT(tid); } else { psta->htpriv.agg_enable_bitmap &= ~BIT(tid); } if(psta->state & WIFI_STA_ALIVE_CHK_STATE) { DBG_871X("%s alive check - rx ADDBA response\n", __func__); psta->htpriv.agg_enable_bitmap &= ~BIT(tid); psta->expire_to = pstapriv->expire_to; psta->state ^= WIFI_STA_ALIVE_CHK_STATE; } //DBG_871X("marc: ADDBA RSP: %x\n", pmlmeinfo->agg_enable_bitmap); break; case RTW_WLAN_ACTION_DELBA: //DELBA if ((frame_body[3] & BIT(3)) == 0) { psta->htpriv.agg_enable_bitmap &= ~(1 << ((frame_body[3] >> 4) & 0xf)); psta->htpriv.candidate_tid_bitmap &= ~(1 << ((frame_body[3] >> 4) & 0xf)); //reason_code = frame_body[4] | (frame_body[5] << 8); reason_code = RTW_GET_LE16(&frame_body[4]); } else if((frame_body[3] & BIT(3)) == BIT(3)) { tid = (frame_body[3] >> 4) & 0x0F; preorder_ctrl = &psta->recvreorder_ctrl[tid]; preorder_ctrl->enable = _FALSE; preorder_ctrl->indicate_seq = 0xffff; #ifdef DBG_RX_SEQ DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, preorder_ctrl->indicate_seq); #endif } DBG_871X("%s(): DELBA: %x(%x)\n", __FUNCTION__,pmlmeinfo->agg_enable_bitmap, reason_code); //todo: how to notify the host while receiving DELETE BA break; default: break; } } #endif //CONFIG_80211N_HT return _SUCCESS; } #ifdef CONFIG_P2P static int get_reg_classes_full_count(struct p2p_channels channel_list) { int cnt = 0; int i; for (i = 0; i < channel_list.reg_classes; i++) { cnt += channel_list.reg_class[i].channels; } return cnt; } static void get_channel_cnt_24g_5gl_5gh( struct mlme_ext_priv *pmlmeext, u8* p24g_cnt, u8* p5gl_cnt, u8* p5gh_cnt ) { int i = 0; *p24g_cnt = 0; *p5gl_cnt = 0; *p5gh_cnt = 0; for( i = 0; i < pmlmeext->max_chan_nums; i++ ) { if ( pmlmeext->channel_set[ i ].ChannelNum <= 14 ) { (*p24g_cnt)++; } else if ( ( pmlmeext->channel_set[ i ].ChannelNum > 14 ) && ( pmlmeext->channel_set[ i ].ChannelNum <= 48 ) ) { // Just include the channel 36, 40, 44, 48 channels for 5G low (*p5gl_cnt)++; } else if ( ( pmlmeext->channel_set[ i ].ChannelNum >= 149 ) && ( pmlmeext->channel_set[ i ].ChannelNum <= 161 ) ) { // Just include the channel 149, 153, 157, 161 channels for 5G high (*p5gh_cnt)++; } } } void issue_p2p_GO_request(_adapter *padapter, u8* raddr) { unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; u8 action = P2P_PUB_ACTION_ACTION; u32 p2poui = cpu_to_be32(P2POUI); u8 oui_subtype = P2P_GO_NEGO_REQ; u8 wpsie[ 255 ] = { 0x00 }, p2pie[ 255 ] = { 0x00 }; u8 wpsielen = 0, p2pielen = 0, i; u8 channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh = 0; u16 len_channellist_attr = 0; #ifdef CONFIG_WFD u32 wfdielen = 0; #endif //CONFIG_WFD struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct wifidirect_info *pwdinfo = &( padapter->wdinfo); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { return; } DBG_871X( "[%s] In\n", __FUNCTION__ ); //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_ACTION); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); pwdinfo->negotiation_dialog_token = 1; // Initialize the dialog value pframe = rtw_set_fixed_ie(pframe, 1, &pwdinfo->negotiation_dialog_token, &(pattrib->pktlen)); // WPS Section wpsielen = 0; // WPS OUI *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); wpsielen += 4; // WPS version // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); wpsielen += 2; // Value: wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 // Device Password ID // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_PWID ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); wpsielen += 2; // Value: if ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PEER_DISPLAY_PIN ) { *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_USER_SPEC ); } else if ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_SELF_DISPLAY_PIN ) { *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_REGISTRAR_SPEC ); } else if ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PBC ) { *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_PBC ); } wpsielen += 2; pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); // P2P IE Section. // P2P OUI p2pielen = 0; p2pie[ p2pielen++ ] = 0x50; p2pie[ p2pielen++ ] = 0x6F; p2pie[ p2pielen++ ] = 0x9A; p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 // Commented by Albert 20110306 // According to the P2P Specification, the group negoitation request frame should contain 9 P2P attributes // 1. P2P Capability // 2. Group Owner Intent // 3. Configuration Timeout // 4. Listen Channel // 5. Extended Listen Timing // 6. Intended P2P Interface Address // 7. Channel List // 8. P2P Device Info // 9. Operating Channel // P2P Capability // Type: p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); p2pielen += 2; // Value: // Device Capability Bitmap, 1 byte p2pie[ p2pielen++ ] = DMP_P2P_DEVCAP_SUPPORT; // Group Capability Bitmap, 1 byte if ( pwdinfo->persistent_supported ) { p2pie[ p2pielen++ ] = P2P_GRPCAP_CROSS_CONN | P2P_GRPCAP_PERSISTENT_GROUP; } else { p2pie[ p2pielen++ ] = P2P_GRPCAP_CROSS_CONN; } // Group Owner Intent // Type: p2pie[ p2pielen++ ] = P2P_ATTR_GO_INTENT; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 ); p2pielen += 2; // Value: // Todo the tie breaker bit. p2pie[ p2pielen++ ] = ( ( pwdinfo->intent << 1 ) & 0xFE ); // Configuration Timeout // Type: p2pie[ p2pielen++ ] = P2P_ATTR_CONF_TIMEOUT; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); p2pielen += 2; // Value: p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P GO p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P Client // Listen Channel // Type: p2pie[ p2pielen++ ] = P2P_ATTR_LISTEN_CH; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); p2pielen += 2; // Value: // Country String p2pie[ p2pielen++ ] = 'X'; p2pie[ p2pielen++ ] = 'X'; // The third byte should be set to 0x04. // Described in the "Operating Channel Attribute" section. p2pie[ p2pielen++ ] = 0x04; // Operating Class p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 // Channel Number p2pie[ p2pielen++ ] = pwdinfo->listen_channel; // listening channel number // Extended Listen Timing ATTR // Type: p2pie[ p2pielen++ ] = P2P_ATTR_EX_LISTEN_TIMING; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 ); p2pielen += 2; // Value: // Availability Period *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); p2pielen += 2; // Availability Interval *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); p2pielen += 2; // Intended P2P Interface Address // Type: p2pie[ p2pielen++ ] = P2P_ATTR_INTENTED_IF_ADDR; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN ); p2pielen += 2; // Value: _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); p2pielen += ETH_ALEN; // Channel List // Type: p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST; // Length: // Country String(3) // + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) // + number of channels in all classes len_channellist_attr = 3 + (1 + 1) * (u16)(pmlmeext->channel_list.reg_classes) + get_reg_classes_full_count(pmlmeext->channel_list); #ifdef CONFIG_CONCURRENT_MODE if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) { *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + 1 ); } else { *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr ); } #else *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr ); #endif p2pielen += 2; // Value: // Country String p2pie[ p2pielen++ ] = 'X'; p2pie[ p2pielen++ ] = 'X'; // The third byte should be set to 0x04. // Described in the "Operating Channel Attribute" section. p2pie[ p2pielen++ ] = 0x04; // Channel Entry List #ifdef CONFIG_CONCURRENT_MODE if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) { _adapter *pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; // Operating Class if ( pbuddy_mlmeext->cur_channel > 14 ) { if ( pbuddy_mlmeext->cur_channel >= 149 ) { p2pie[ p2pielen++ ] = 0x7c; } else { p2pie[ p2pielen++ ] = 0x73; } } else { p2pie[ p2pielen++ ] = 0x51; } // Number of Channels // Just support 1 channel and this channel is AP's channel p2pie[ p2pielen++ ] = 1; // Channel List p2pie[ p2pielen++ ] = pbuddy_mlmeext->cur_channel; } else { int i,j; for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) { // Operating Class p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class; // Number of Channels p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels; // Channel List for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) { p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i]; } } } #else // CONFIG_CONCURRENT_MODE { int i,j; for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) { // Operating Class p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class; // Number of Channels p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels; // Channel List for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) { p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i]; } } } #endif // CONFIG_CONCURRENT_MODE // Device Info // Type: p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; // Length: // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); p2pielen += 2; // Value: // P2P Device Address _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); p2pielen += ETH_ALEN; // Config Method // This field should be big endian. Noted by P2P specification. *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->supported_wps_cm ); p2pielen += 2; // Primary Device Type // Category ID *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); p2pielen += 2; // OUI *(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); p2pielen += 4; // Sub Category ID *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); p2pielen += 2; // Number of Secondary Device Types p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List // Device Name // Type: *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); p2pielen += 2; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); p2pielen += 2; // Value: _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name , pwdinfo->device_name_len ); p2pielen += pwdinfo->device_name_len; // Operating Channel // Type: p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); p2pielen += 2; // Value: // Country String p2pie[ p2pielen++ ] = 'X'; p2pie[ p2pielen++ ] = 'X'; // The third byte should be set to 0x04. // Described in the "Operating Channel Attribute" section. p2pie[ p2pielen++ ] = 0x04; // Operating Class if ( pwdinfo->operating_channel <= 14 ) { // Operating Class p2pie[ p2pielen++ ] = 0x51; } else if ( ( pwdinfo->operating_channel >= 36 ) && ( pwdinfo->operating_channel <= 48 ) ) { // Operating Class p2pie[ p2pielen++ ] = 0x73; } else { // Operating Class p2pie[ p2pielen++ ] = 0x7c; } // Channel Number p2pie[ p2pielen++ ] = pwdinfo->operating_channel; // operating channel number pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); #ifdef CONFIG_WFD wfdielen = build_nego_req_wfd_ie(pwdinfo, pframe); pframe += wfdielen; pattrib->pktlen += wfdielen; #endif //CONFIG_WFD pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); return; } void issue_p2p_GO_response(_adapter *padapter, u8* raddr, u8* frame_body,uint len, u8 result) { unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; u8 action = P2P_PUB_ACTION_ACTION; u32 p2poui = cpu_to_be32(P2POUI); u8 oui_subtype = P2P_GO_NEGO_RESP; u8 wpsie[ 255 ] = { 0x00 }, p2pie[ 255 ] = { 0x00 }; u8 p2pielen = 0, i; uint wpsielen = 0; u16 wps_devicepassword_id = 0x0000; uint wps_devicepassword_id_len = 0; u8 channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh; u16 len_channellist_attr = 0; struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct wifidirect_info *pwdinfo = &( padapter->wdinfo); #ifdef CONFIG_WFD u32 wfdielen = 0; #endif //CONFIG_WFD if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { return; } DBG_871X( "[%s] In, result = %d\n", __FUNCTION__, result ); //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_ACTION); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); pwdinfo->negotiation_dialog_token = frame_body[7]; // The Dialog Token of provisioning discovery request frame. pframe = rtw_set_fixed_ie(pframe, 1, &(pwdinfo->negotiation_dialog_token), &(pattrib->pktlen)); // Commented by Albert 20110328 // Try to get the device password ID from the WPS IE of group negotiation request frame // WiFi Direct test plan 5.1.15 rtw_get_wps_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wpsie, &wpsielen); rtw_get_wps_attr_content( wpsie, wpsielen, WPS_ATTR_DEVICE_PWID, (u8*) &wps_devicepassword_id, &wps_devicepassword_id_len); wps_devicepassword_id = be16_to_cpu( wps_devicepassword_id ); _rtw_memset( wpsie, 0x00, 255 ); wpsielen = 0; // WPS Section wpsielen = 0; // WPS OUI *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); wpsielen += 4; // WPS version // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); wpsielen += 2; // Value: wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 // Device Password ID // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_PWID ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); wpsielen += 2; // Value: if ( wps_devicepassword_id == WPS_DPID_USER_SPEC ) { *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_REGISTRAR_SPEC ); } else if ( wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC ) { *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_USER_SPEC ); } else { *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_PBC ); } wpsielen += 2; // Commented by Kurt 20120113 // If some device wants to do p2p handshake without sending prov_disc_req // We have to get peer_req_cm from here. if(_rtw_memcmp( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "000", 3) ) { if ( wps_devicepassword_id == WPS_DPID_USER_SPEC ) { _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "dis", 3 ); } else if ( wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC ) { _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pad", 3 ); } else { _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3 ); } } pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); // P2P IE Section. // P2P OUI p2pielen = 0; p2pie[ p2pielen++ ] = 0x50; p2pie[ p2pielen++ ] = 0x6F; p2pie[ p2pielen++ ] = 0x9A; p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 // Commented by Albert 20100908 // According to the P2P Specification, the group negoitation response frame should contain 9 P2P attributes // 1. Status // 2. P2P Capability // 3. Group Owner Intent // 4. Configuration Timeout // 5. Operating Channel // 6. Intended P2P Interface Address // 7. Channel List // 8. Device Info // 9. Group ID ( Only GO ) // ToDo: // P2P Status // Type: p2pie[ p2pielen++ ] = P2P_ATTR_STATUS; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 ); p2pielen += 2; // Value: p2pie[ p2pielen++ ] = result; // P2P Capability // Type: p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); p2pielen += 2; // Value: // Device Capability Bitmap, 1 byte if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) ) { // Commented by Albert 2011/03/08 // According to the P2P specification // if the sending device will be client, the P2P Capability should be reserved of group negotation response frame p2pie[ p2pielen++ ] = 0; } else { // Be group owner or meet the error case p2pie[ p2pielen++ ] = DMP_P2P_DEVCAP_SUPPORT; } // Group Capability Bitmap, 1 byte if ( pwdinfo->persistent_supported ) { p2pie[ p2pielen++ ] = P2P_GRPCAP_CROSS_CONN | P2P_GRPCAP_PERSISTENT_GROUP; } else { p2pie[ p2pielen++ ] = P2P_GRPCAP_CROSS_CONN; } // Group Owner Intent // Type: p2pie[ p2pielen++ ] = P2P_ATTR_GO_INTENT; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 ); p2pielen += 2; // Value: if ( pwdinfo->peer_intent & 0x01 ) { // Peer's tie breaker bit is 1, our tie breaker bit should be 0 p2pie[ p2pielen++ ] = ( pwdinfo->intent << 1 ); } else { // Peer's tie breaker bit is 0, our tie breaker bit should be 1 p2pie[ p2pielen++ ] = ( ( pwdinfo->intent << 1 ) | BIT(0) ); } // Configuration Timeout // Type: p2pie[ p2pielen++ ] = P2P_ATTR_CONF_TIMEOUT; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); p2pielen += 2; // Value: p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P GO p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P Client // Operating Channel // Type: p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); p2pielen += 2; // Value: // Country String p2pie[ p2pielen++ ] = 'X'; p2pie[ p2pielen++ ] = 'X'; // The third byte should be set to 0x04. // Described in the "Operating Channel Attribute" section. p2pie[ p2pielen++ ] = 0x04; // Operating Class if ( pwdinfo->operating_channel <= 14 ) { // Operating Class p2pie[ p2pielen++ ] = 0x51; } else if ( ( pwdinfo->operating_channel >= 36 ) && ( pwdinfo->operating_channel <= 48 ) ) { // Operating Class p2pie[ p2pielen++ ] = 0x73; } else { // Operating Class p2pie[ p2pielen++ ] = 0x7c; } // Channel Number p2pie[ p2pielen++ ] = pwdinfo->operating_channel; // operating channel number // Intended P2P Interface Address // Type: p2pie[ p2pielen++ ] = P2P_ATTR_INTENTED_IF_ADDR; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN ); p2pielen += 2; // Value: _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); p2pielen += ETH_ALEN; // Channel List // Type: p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST; // Country String(3) // + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) // + number of channels in all classes len_channellist_attr = 3 + (1 + 1) * (u16)pmlmeext->channel_list.reg_classes + get_reg_classes_full_count(pmlmeext->channel_list); #ifdef CONFIG_CONCURRENT_MODE if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) { *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + 1 ); } else { *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr ); } #else *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr ); #endif p2pielen += 2; // Value: // Country String p2pie[ p2pielen++ ] = 'X'; p2pie[ p2pielen++ ] = 'X'; // The third byte should be set to 0x04. // Described in the "Operating Channel Attribute" section. p2pie[ p2pielen++ ] = 0x04; // Channel Entry List #ifdef CONFIG_CONCURRENT_MODE if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) { _adapter *pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; // Operating Class if ( pbuddy_mlmeext->cur_channel > 14 ) { if ( pbuddy_mlmeext->cur_channel >= 149 ) { p2pie[ p2pielen++ ] = 0x7c; } else { p2pie[ p2pielen++ ] = 0x73; } } else { p2pie[ p2pielen++ ] = 0x51; } // Number of Channels // Just support 1 channel and this channel is AP's channel p2pie[ p2pielen++ ] = 1; // Channel List p2pie[ p2pielen++ ] = pbuddy_mlmeext->cur_channel; } else { int i, j; for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) { // Operating Class p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class; // Number of Channels p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels; // Channel List for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) { p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i]; } } } #else // CONFIG_CONCURRENT_MODE { int i, j; for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) { // Operating Class p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class; // Number of Channels p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels; // Channel List for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) { p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i]; } } } #endif // CONFIG_CONCURRENT_MODE // Device Info // Type: p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; // Length: // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); p2pielen += 2; // Value: // P2P Device Address _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); p2pielen += ETH_ALEN; // Config Method // This field should be big endian. Noted by P2P specification. *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->supported_wps_cm ); p2pielen += 2; // Primary Device Type // Category ID *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); p2pielen += 2; // OUI *(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); p2pielen += 4; // Sub Category ID *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); p2pielen += 2; // Number of Secondary Device Types p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List // Device Name // Type: *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); p2pielen += 2; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); p2pielen += 2; // Value: _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name , pwdinfo->device_name_len ); p2pielen += pwdinfo->device_name_len; if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) ) { // Group ID Attribute // Type: p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN + pwdinfo->nego_ssidlen ); p2pielen += 2; // Value: // p2P Device Address _rtw_memcpy( p2pie + p2pielen , pwdinfo->device_addr, ETH_ALEN ); p2pielen += ETH_ALEN; // SSID _rtw_memcpy( p2pie + p2pielen, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen ); p2pielen += pwdinfo->nego_ssidlen; } pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); #ifdef CONFIG_WFD wfdielen = build_nego_resp_wfd_ie(pwdinfo, pframe); pframe += wfdielen; pattrib->pktlen += wfdielen; #endif //CONFIG_WFD pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); return; } void issue_p2p_GO_confirm(_adapter *padapter, u8* raddr, u8 result) { unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; u8 action = P2P_PUB_ACTION_ACTION; u32 p2poui = cpu_to_be32(P2POUI); u8 oui_subtype = P2P_GO_NEGO_CONF; u8 wpsie[ 255 ] = { 0x00 }, p2pie[ 255 ] = { 0x00 }; u8 wpsielen = 0, p2pielen = 0; struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct wifidirect_info *pwdinfo = &( padapter->wdinfo); #ifdef CONFIG_WFD u32 wfdielen = 0; #endif //CONFIG_WFD if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { return; } DBG_871X( "[%s] In\n", __FUNCTION__ ); //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_ACTION); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(pwdinfo->negotiation_dialog_token), &(pattrib->pktlen)); // P2P IE Section. // P2P OUI p2pielen = 0; p2pie[ p2pielen++ ] = 0x50; p2pie[ p2pielen++ ] = 0x6F; p2pie[ p2pielen++ ] = 0x9A; p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 // Commented by Albert 20110306 // According to the P2P Specification, the group negoitation request frame should contain 5 P2P attributes // 1. Status // 2. P2P Capability // 3. Operating Channel // 4. Channel List // 5. Group ID ( if this WiFi is GO ) // P2P Status // Type: p2pie[ p2pielen++ ] = P2P_ATTR_STATUS; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 ); p2pielen += 2; // Value: p2pie[ p2pielen++ ] = result; // P2P Capability // Type: p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); p2pielen += 2; // Value: // Device Capability Bitmap, 1 byte p2pie[ p2pielen++ ] = DMP_P2P_DEVCAP_SUPPORT; // Group Capability Bitmap, 1 byte if ( pwdinfo->persistent_supported ) { p2pie[ p2pielen++ ] = P2P_GRPCAP_CROSS_CONN | P2P_GRPCAP_PERSISTENT_GROUP; } else { p2pie[ p2pielen++ ] = P2P_GRPCAP_CROSS_CONN; } // Operating Channel // Type: p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); p2pielen += 2; // Value: // Country String p2pie[ p2pielen++ ] = 'X'; p2pie[ p2pielen++ ] = 'X'; // The third byte should be set to 0x04. // Described in the "Operating Channel Attribute" section. p2pie[ p2pielen++ ] = 0x04; if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) ) { if ( pwdinfo->peer_operating_ch <= 14 ) { // Operating Class p2pie[ p2pielen++ ] = 0x51; } else if ( ( pwdinfo->peer_operating_ch >= 36 ) && ( pwdinfo->peer_operating_ch <= 48 ) ) { // Operating Class p2pie[ p2pielen++ ] = 0x73; } else { // Operating Class p2pie[ p2pielen++ ] = 0x7c; } p2pie[ p2pielen++ ] = pwdinfo->peer_operating_ch; } else { if ( pwdinfo->operating_channel <= 14 ) { // Operating Class p2pie[ p2pielen++ ] = 0x51; } else if ( ( pwdinfo->operating_channel >= 36 ) && ( pwdinfo->operating_channel <= 48 ) ) { // Operating Class p2pie[ p2pielen++ ] = 0x73; } else { // Operating Class p2pie[ p2pielen++ ] = 0x7c; } // Channel Number p2pie[ p2pielen++ ] = pwdinfo->operating_channel; // Use the listen channel as the operating channel } // Channel List // Type: p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST; *(u16*) ( p2pie + p2pielen ) = 6; p2pielen += 2; // Country String p2pie[ p2pielen++ ] = 'X'; p2pie[ p2pielen++ ] = 'X'; // The third byte should be set to 0x04. // Described in the "Operating Channel Attribute" section. p2pie[ p2pielen++ ] = 0x04; // Value: if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) ) { if ( pwdinfo->peer_operating_ch <= 14 ) { // Operating Class p2pie[ p2pielen++ ] = 0x51; } else if ( ( pwdinfo->peer_operating_ch >= 36 ) && ( pwdinfo->peer_operating_ch <= 48 ) ) { // Operating Class p2pie[ p2pielen++ ] = 0x73; } else { // Operating Class p2pie[ p2pielen++ ] = 0x7c; } p2pie[ p2pielen++ ] = 1; p2pie[ p2pielen++ ] = pwdinfo->peer_operating_ch; } else { if ( pwdinfo->operating_channel <= 14 ) { // Operating Class p2pie[ p2pielen++ ] = 0x51; } else if ( ( pwdinfo->operating_channel >= 36 ) && ( pwdinfo->operating_channel <= 48 ) ) { // Operating Class p2pie[ p2pielen++ ] = 0x73; } else { // Operating Class p2pie[ p2pielen++ ] = 0x7c; } // Channel Number p2pie[ p2pielen++ ] = 1; p2pie[ p2pielen++ ] = pwdinfo->operating_channel; // Use the listen channel as the operating channel } if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) ) { // Group ID Attribute // Type: p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN + pwdinfo->nego_ssidlen ); p2pielen += 2; // Value: // p2P Device Address _rtw_memcpy( p2pie + p2pielen , pwdinfo->device_addr, ETH_ALEN ); p2pielen += ETH_ALEN; // SSID _rtw_memcpy( p2pie + p2pielen, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen ); p2pielen += pwdinfo->nego_ssidlen; } pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); #ifdef CONFIG_WFD wfdielen = build_nego_confirm_wfd_ie(pwdinfo, pframe); pframe += wfdielen; pattrib->pktlen += wfdielen; #endif //CONFIG_WFD pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); return; } void issue_p2p_invitation_request(_adapter *padapter, u8* raddr ) { unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; u8 action = P2P_PUB_ACTION_ACTION; u32 p2poui = cpu_to_be32(P2POUI); u8 oui_subtype = P2P_INVIT_REQ; u8 p2pie[ 255 ] = { 0x00 }; u8 p2pielen = 0, i; u8 dialogToken = 3; u8 channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh = 0; u16 len_channellist_attr = 0; #ifdef CONFIG_WFD u32 wfdielen = 0; #endif //CONFIG_WFD #ifdef CONFIG_CONCURRENT_MODE _adapter *pbuddy_adapter = padapter->pbuddy_adapter; struct wifidirect_info *pbuddy_wdinfo = &pbuddy_adapter->wdinfo; struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; #endif struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct wifidirect_info *pwdinfo = &( padapter->wdinfo); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { return; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, raddr, ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_ACTION); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); // P2P IE Section. // P2P OUI p2pielen = 0; p2pie[ p2pielen++ ] = 0x50; p2pie[ p2pielen++ ] = 0x6F; p2pie[ p2pielen++ ] = 0x9A; p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 // Commented by Albert 20101011 // According to the P2P Specification, the P2P Invitation request frame should contain 7 P2P attributes // 1. Configuration Timeout // 2. Invitation Flags // 3. Operating Channel ( Only GO ) // 4. P2P Group BSSID ( Should be included if I am the GO ) // 5. Channel List // 6. P2P Group ID // 7. P2P Device Info // Configuration Timeout // Type: p2pie[ p2pielen++ ] = P2P_ATTR_CONF_TIMEOUT; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); p2pielen += 2; // Value: p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P GO p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P Client // Invitation Flags // Type: p2pie[ p2pielen++ ] = P2P_ATTR_INVITATION_FLAGS; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 ); p2pielen += 2; // Value: p2pie[ p2pielen++ ] = P2P_INVITATION_FLAGS_PERSISTENT; // Operating Channel // Type: p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); p2pielen += 2; // Value: // Country String p2pie[ p2pielen++ ] = 'X'; p2pie[ p2pielen++ ] = 'X'; // The third byte should be set to 0x04. // Described in the "Operating Channel Attribute" section. p2pie[ p2pielen++ ] = 0x04; // Operating Class if ( pwdinfo->invitereq_info.operating_ch <= 14 ) p2pie[ p2pielen++ ] = 0x51; else if ( ( pwdinfo->invitereq_info.operating_ch >= 36 ) && ( pwdinfo->invitereq_info.operating_ch <= 48 ) ) p2pie[ p2pielen++ ] = 0x73; else p2pie[ p2pielen++ ] = 0x7c; // Channel Number p2pie[ p2pielen++ ] = pwdinfo->invitereq_info.operating_ch; // operating channel number if ( _rtw_memcmp( myid( &padapter->eeprompriv ), pwdinfo->invitereq_info.go_bssid, ETH_ALEN ) ) { // P2P Group BSSID // Type: p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_BSSID; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN ); p2pielen += 2; // Value: // P2P Device Address for GO _rtw_memcpy( p2pie + p2pielen, pwdinfo->invitereq_info.go_bssid, ETH_ALEN ); p2pielen += ETH_ALEN; } // Channel List // Type: p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST; // Length: // Country String(3) // + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) // + number of channels in all classes len_channellist_attr = 3 + (1 + 1) * (u16)pmlmeext->channel_list.reg_classes + get_reg_classes_full_count(pmlmeext->channel_list); #ifdef CONFIG_CONCURRENT_MODE if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) { *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + 1 ); } else { *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr ); } #else *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr ); #endif p2pielen += 2; // Value: // Country String p2pie[ p2pielen++ ] = 'X'; p2pie[ p2pielen++ ] = 'X'; // The third byte should be set to 0x04. // Described in the "Operating Channel Attribute" section. p2pie[ p2pielen++ ] = 0x04; // Channel Entry List #ifdef CONFIG_CONCURRENT_MODE if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) { _adapter *pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; // Operating Class if ( pbuddy_mlmeext->cur_channel > 14 ) { if ( pbuddy_mlmeext->cur_channel >= 149 ) { p2pie[ p2pielen++ ] = 0x7c; } else { p2pie[ p2pielen++ ] = 0x73; } } else { p2pie[ p2pielen++ ] = 0x51; } // Number of Channels // Just support 1 channel and this channel is AP's channel p2pie[ p2pielen++ ] = 1; // Channel List p2pie[ p2pielen++ ] = pbuddy_mlmeext->cur_channel; } else { int i, j; for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) { // Operating Class p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class; // Number of Channels p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels; // Channel List for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) { p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i]; } } } #else // CONFIG_CONCURRENT_MODE { int i, j; for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) { // Operating Class p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class; // Number of Channels p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels; // Channel List for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) { p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i]; } } } #endif // CONFIG_CONCURRENT_MODE // P2P Group ID // Type: p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 6 + pwdinfo->invitereq_info.ssidlen ); p2pielen += 2; // Value: // P2P Device Address for GO _rtw_memcpy( p2pie + p2pielen, pwdinfo->invitereq_info.go_bssid, ETH_ALEN ); p2pielen += ETH_ALEN; // SSID _rtw_memcpy( p2pie + p2pielen, pwdinfo->invitereq_info.go_ssid, pwdinfo->invitereq_info.ssidlen ); p2pielen += pwdinfo->invitereq_info.ssidlen; // Device Info // Type: p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; // Length: // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); p2pielen += 2; // Value: // P2P Device Address _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); p2pielen += ETH_ALEN; // Config Method // This field should be big endian. Noted by P2P specification. *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_DISPLAY ); p2pielen += 2; // Primary Device Type // Category ID *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); p2pielen += 2; // OUI *(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); p2pielen += 4; // Sub Category ID *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); p2pielen += 2; // Number of Secondary Device Types p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List // Device Name // Type: *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); p2pielen += 2; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); p2pielen += 2; // Value: _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len ); p2pielen += pwdinfo->device_name_len; pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); #ifdef CONFIG_WFD wfdielen = build_invitation_req_wfd_ie(pwdinfo, pframe); pframe += wfdielen; pattrib->pktlen += wfdielen; #endif //CONFIG_WFD pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); return; } void issue_p2p_invitation_response(_adapter *padapter, u8* raddr, u8 dialogToken, u8 status_code) { unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; u8 action = P2P_PUB_ACTION_ACTION; u32 p2poui = cpu_to_be32(P2POUI); u8 oui_subtype = P2P_INVIT_RESP; u8 p2pie[ 255 ] = { 0x00 }; u8 p2pielen = 0, i; u8 channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh = 0; u16 len_channellist_attr = 0; #ifdef CONFIG_CONCURRENT_MODE _adapter *pbuddy_adapter = padapter->pbuddy_adapter; struct wifidirect_info *pbuddy_wdinfo = &pbuddy_adapter->wdinfo; struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; #endif #ifdef CONFIG_WFD u32 wfdielen = 0; #endif //CONFIG_WFD struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct wifidirect_info *pwdinfo = &( padapter->wdinfo); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { return; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, raddr, ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_ACTION); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); // P2P IE Section. // P2P OUI p2pielen = 0; p2pie[ p2pielen++ ] = 0x50; p2pie[ p2pielen++ ] = 0x6F; p2pie[ p2pielen++ ] = 0x9A; p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 // Commented by Albert 20101005 // According to the P2P Specification, the P2P Invitation response frame should contain 5 P2P attributes // 1. Status // 2. Configuration Timeout // 3. Operating Channel ( Only GO ) // 4. P2P Group BSSID ( Only GO ) // 5. Channel List // P2P Status // Type: p2pie[ p2pielen++ ] = P2P_ATTR_STATUS; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 ); p2pielen += 2; // Value: // When status code is P2P_STATUS_FAIL_INFO_UNAVAILABLE. // Sent the event receiving the P2P Invitation Req frame to DMP UI. // DMP had to compare the MAC address to find out the profile. // So, the WiFi driver will send the P2P_STATUS_FAIL_INFO_UNAVAILABLE to NB. // If the UI found the corresponding profile, the WiFi driver sends the P2P Invitation Req // to NB to rebuild the persistent group. p2pie[ p2pielen++ ] = status_code; // Configuration Timeout // Type: p2pie[ p2pielen++ ] = P2P_ATTR_CONF_TIMEOUT; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); p2pielen += 2; // Value: p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P GO p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P Client if( status_code == P2P_STATUS_SUCCESS ) { if( rtw_p2p_chk_role( pwdinfo, P2P_ROLE_GO ) ) { // The P2P Invitation request frame asks this Wi-Fi device to be the P2P GO // In this case, the P2P Invitation response frame should carry the two more P2P attributes. // First one is operating channel attribute. // Second one is P2P Group BSSID attribute. // Operating Channel // Type: p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); p2pielen += 2; // Value: // Country String p2pie[ p2pielen++ ] = 'X'; p2pie[ p2pielen++ ] = 'X'; // The third byte should be set to 0x04. // Described in the "Operating Channel Attribute" section. p2pie[ p2pielen++ ] = 0x04; // Operating Class p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 // Channel Number p2pie[ p2pielen++ ] = pwdinfo->operating_channel; // operating channel number // P2P Group BSSID // Type: p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_BSSID; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN ); p2pielen += 2; // Value: // P2P Device Address for GO _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); p2pielen += ETH_ALEN; } // Channel List // Type: p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST; // Length: // Country String(3) // + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) // + number of channels in all classes len_channellist_attr = 3 + (1 + 1) * (u16)pmlmeext->channel_list.reg_classes + get_reg_classes_full_count(pmlmeext->channel_list); #ifdef CONFIG_CONCURRENT_MODE if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) { *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + 1 ); } else { *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr ); } #else *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr ); #endif p2pielen += 2; // Value: // Country String p2pie[ p2pielen++ ] = 'X'; p2pie[ p2pielen++ ] = 'X'; // The third byte should be set to 0x04. // Described in the "Operating Channel Attribute" section. p2pie[ p2pielen++ ] = 0x04; // Channel Entry List #ifdef CONFIG_CONCURRENT_MODE if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) { _adapter *pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; // Operating Class if ( pbuddy_mlmeext->cur_channel > 14 ) { if ( pbuddy_mlmeext->cur_channel >= 149 ) { p2pie[ p2pielen++ ] = 0x7c; } else { p2pie[ p2pielen++ ] = 0x73; } } else { p2pie[ p2pielen++ ] = 0x51; } // Number of Channels // Just support 1 channel and this channel is AP's channel p2pie[ p2pielen++ ] = 1; // Channel List p2pie[ p2pielen++ ] = pbuddy_mlmeext->cur_channel; } else { int i, j; for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) { // Operating Class p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class; // Number of Channels p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels; // Channel List for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) { p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i]; } } } #else // CONFIG_CONCURRENT_MODE { int i, j; for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) { // Operating Class p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class; // Number of Channels p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels; // Channel List for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) { p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i]; } } } #endif // CONFIG_CONCURRENT_MODE } pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); #ifdef CONFIG_WFD wfdielen = build_invitation_resp_wfd_ie(pwdinfo, pframe); pframe += wfdielen; pattrib->pktlen += wfdielen; #endif //CONFIG_WFD pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); return; } void issue_p2p_provision_request(_adapter *padapter, u8* pssid, u8 ussidlen, u8* pdev_raddr ) { unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; u8 action = P2P_PUB_ACTION_ACTION; u8 dialogToken = 1; u32 p2poui = cpu_to_be32(P2POUI); u8 oui_subtype = P2P_PROVISION_DISC_REQ; u8 wpsie[ 100 ] = { 0x00 }; u8 wpsielen = 0; u32 p2pielen = 0; #ifdef CONFIG_WFD u32 wfdielen = 0; #endif //CONFIG_WFD struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct wifidirect_info *pwdinfo = &(padapter->wdinfo); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { return; } DBG_871X( "[%s] In\n", __FUNCTION__ ); //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, pdev_raddr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, pdev_raddr, ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_ACTION); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); p2pielen = build_prov_disc_request_p2p_ie( pwdinfo, pframe, pssid, ussidlen, pdev_raddr ); pframe += p2pielen; pattrib->pktlen += p2pielen; wpsielen = 0; // WPS OUI *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); wpsielen += 4; // WPS version // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); wpsielen += 2; // Value: wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 // Config Method // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); wpsielen += 2; // Value: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->tx_prov_disc_info.wps_config_method_request ); wpsielen += 2; pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); #ifdef CONFIG_WFD wfdielen = build_provdisc_req_wfd_ie(pwdinfo, pframe); pframe += wfdielen; pattrib->pktlen += wfdielen; #endif //CONFIG_WFD pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); return; } u8 is_matched_in_profilelist( u8* peermacaddr, struct profile_info* profileinfo ) { u8 i, match_result = 0; DBG_871X( "[%s] peermac = %.2X %.2X %.2X %.2X %.2X %.2X\n", __FUNCTION__, peermacaddr[0], peermacaddr[1],peermacaddr[2],peermacaddr[3],peermacaddr[4],peermacaddr[5]); for( i = 0; i < P2P_MAX_PERSISTENT_GROUP_NUM; i++, profileinfo++ ) { DBG_871X( "[%s] profileinfo_mac = %.2X %.2X %.2X %.2X %.2X %.2X\n", __FUNCTION__, profileinfo->peermac[0], profileinfo->peermac[1],profileinfo->peermac[2],profileinfo->peermac[3],profileinfo->peermac[4],profileinfo->peermac[5]); if ( _rtw_memcmp( peermacaddr, profileinfo->peermac, ETH_ALEN ) ) { match_result = 1; DBG_871X( "[%s] Match!\n", __FUNCTION__ ); break; } } return (match_result ); } void issue_probersp_p2p(_adapter *padapter, unsigned char *da) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; unsigned char *mac; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); //WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); u16 beacon_interval = 100; u16 capInfo = 0; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); u8 wpsie[255] = { 0x00 }; u32 wpsielen = 0, p2pielen = 0; #ifdef CONFIG_WFD u32 wfdielen = 0; #endif //CONFIG_WFD #ifdef CONFIG_INTEL_WIDI u8 zero_array_check[L2SDTA_SERVICE_VE_LEN] = { 0x00 }; #endif //CONFIG_INTEL_WIDI //DBG_871X("%s\n", __FUNCTION__); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { return; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; mac = myid(&(padapter->eeprompriv)); fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); // Use the device address for BSSID field. _rtw_memcpy(pwlanhdr->addr3, mac, ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(fctrl, WIFI_PROBERSP); pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = pattrib->hdrlen; pframe += pattrib->hdrlen; //timestamp will be inserted by hardware pframe += 8; pattrib->pktlen += 8; // beacon interval: 2 bytes _rtw_memcpy(pframe, (unsigned char *) &beacon_interval, 2); pframe += 2; pattrib->pktlen += 2; // capability info: 2 bytes // ESS and IBSS bits must be 0 (defined in the 3.1.2.1.1 of WiFi Direct Spec) capInfo |= cap_ShortPremble; capInfo |= cap_ShortSlot; _rtw_memcpy(pframe, (unsigned char *) &capInfo, 2); pframe += 2; pattrib->pktlen += 2; // SSID pframe = rtw_set_ie(pframe, _SSID_IE_, 7, pwdinfo->p2p_wildcard_ssid, &pattrib->pktlen); // supported rates... // Use the OFDM rate in the P2P probe response frame. ( 6(B), 9(B), 12, 18, 24, 36, 48, 54 ) pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pwdinfo->support_rate, &pattrib->pktlen); // DS parameter set pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&pwdinfo->listen_channel, &pattrib->pktlen); #ifdef CONFIG_IOCTL_CFG80211 if(adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211 ) { if( pmlmepriv->wps_probe_resp_ie != NULL && pmlmepriv->p2p_probe_resp_ie != NULL ) { //WPS IE _rtw_memcpy(pframe, pmlmepriv->wps_probe_resp_ie, pmlmepriv->wps_probe_resp_ie_len); pattrib->pktlen += pmlmepriv->wps_probe_resp_ie_len; pframe += pmlmepriv->wps_probe_resp_ie_len; //P2P IE _rtw_memcpy(pframe, pmlmepriv->p2p_probe_resp_ie, pmlmepriv->p2p_probe_resp_ie_len); pattrib->pktlen += pmlmepriv->p2p_probe_resp_ie_len; pframe += pmlmepriv->p2p_probe_resp_ie_len; } } else #endif //CONFIG_IOCTL_CFG80211 { // Todo: WPS IE // Noted by Albert 20100907 // According to the WPS specification, all the WPS attribute is presented by Big Endian. wpsielen = 0; // WPS OUI *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); wpsielen += 4; // WPS version // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); wpsielen += 2; // Value: wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 #ifdef CONFIG_INTEL_WIDI // Commented by Kurt // Appended WiDi info. only if we did issued_probereq_widi(), and then we saved ven. ext. in pmlmepriv->sa_ext. if( _rtw_memcmp(pmlmepriv->sa_ext, zero_array_check, L2SDTA_SERVICE_VE_LEN) == _FALSE || pmlmepriv->num_p2p_sdt != 0 ) { //Sec dev type *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_SEC_DEV_TYPE_LIST ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0008 ); wpsielen += 2; // Value: // Category ID *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_CID_DISPLAYS ); wpsielen += 2; // OUI *(u32*) ( wpsie + wpsielen ) = cpu_to_be32( INTEL_DEV_TYPE_OUI ); wpsielen += 4; *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_SCID_WIDI_CONSUMER_SINK ); wpsielen += 2; if( _rtw_memcmp(pmlmepriv->sa_ext, zero_array_check, L2SDTA_SERVICE_VE_LEN) == _FALSE ) { // Vendor Extension _rtw_memcpy( wpsie + wpsielen, pmlmepriv->sa_ext, L2SDTA_SERVICE_VE_LEN ); wpsielen += L2SDTA_SERVICE_VE_LEN; } } #endif //CONFIG_INTEL_WIDI // WiFi Simple Config State // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_SIMPLE_CONF_STATE ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); wpsielen += 2; // Value: wpsie[wpsielen++] = WPS_WSC_STATE_NOT_CONFIG; // Not Configured. // Response Type // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_RESP_TYPE ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); wpsielen += 2; // Value: wpsie[wpsielen++] = WPS_RESPONSE_TYPE_8021X; // UUID-E // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_UUID_E ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0010 ); wpsielen += 2; // Value: if (pwdinfo->external_uuid == 0) { _rtw_memset( wpsie + wpsielen, 0x0, 16 ); _rtw_memcpy( wpsie + wpsielen, myid( &padapter->eeprompriv ), ETH_ALEN ); } else { _rtw_memcpy( wpsie + wpsielen, pwdinfo->uuid, 0x10 ); } wpsielen += 0x10; // Manufacturer // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_MANUFACTURER ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0007 ); wpsielen += 2; // Value: _rtw_memcpy( wpsie + wpsielen, "Realtek", 7 ); wpsielen += 7; // Model Name // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_MODEL_NAME ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0006 ); wpsielen += 2; // Value: _rtw_memcpy( wpsie + wpsielen, "8192CU", 6 ); wpsielen += 6; // Model Number // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_MODEL_NUMBER ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); wpsielen += 2; // Value: wpsie[ wpsielen++ ] = 0x31; // character 1 // Serial Number // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_SERIAL_NUMBER ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( ETH_ALEN ); wpsielen += 2; // Value: _rtw_memcpy( wpsie + wpsielen, "123456" , ETH_ALEN ); wpsielen += ETH_ALEN; // Primary Device Type // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_PRIMARY_DEV_TYPE ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0008 ); wpsielen += 2; // Value: // Category ID *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); wpsielen += 2; // OUI *(u32*) ( wpsie + wpsielen ) = cpu_to_be32( WPSOUI ); wpsielen += 4; // Sub Category ID *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); wpsielen += 2; // Device Name // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->device_name_len ); wpsielen += 2; // Value: _rtw_memcpy( wpsie + wpsielen, pwdinfo->device_name, pwdinfo->device_name_len ); wpsielen += pwdinfo->device_name_len; // Config Method // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); wpsielen += 2; // Value: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->supported_wps_cm ); wpsielen += 2; pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); p2pielen = build_probe_resp_p2p_ie(pwdinfo, pframe); pframe += p2pielen; pattrib->pktlen += p2pielen; } #ifdef CONFIG_WFD #ifdef CONFIG_IOCTL_CFG80211 if ( _TRUE == pwdinfo->wfd_info->wfd_enable ) #endif //CONFIG_IOCTL_CFG80211 { wfdielen = build_probe_resp_wfd_ie(pwdinfo, pframe, 0); pframe += wfdielen; pattrib->pktlen += wfdielen; } #ifdef CONFIG_IOCTL_CFG80211 else if (pmlmepriv->wfd_probe_resp_ie != NULL && pmlmepriv->wfd_probe_resp_ie_len>0) { //WFD IE _rtw_memcpy(pframe, pmlmepriv->wfd_probe_resp_ie, pmlmepriv->wfd_probe_resp_ie_len); pattrib->pktlen += pmlmepriv->wfd_probe_resp_ie_len; pframe += pmlmepriv->wfd_probe_resp_ie_len; } #endif //CONFIG_IOCTL_CFG80211 #endif //CONFIG_WFD pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); return; } int _issue_probereq_p2p(_adapter *padapter, u8 *da, int wait_ack) { int ret = _FAIL; struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; unsigned char *mac; unsigned char bssrate[NumRates]; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); int bssrate_len = 0; u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; struct wifidirect_info *pwdinfo = &(padapter->wdinfo); u8 wpsie[255] = { 0x00 }, p2pie[ 255 ] = { 0x00 }; u16 wpsielen = 0, p2pielen = 0; #ifdef CONFIG_WFD u32 wfdielen = 0; #endif //CONFIG_WFD struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto exit; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; mac = myid(&(padapter->eeprompriv)); fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; if (da) { _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, da, ETH_ALEN); } else { if ( ( pwdinfo->p2p_info.scan_op_ch_only ) || ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) ) { // This two flags will be set when this is only the P2P client mode. _rtw_memcpy(pwlanhdr->addr1, pwdinfo->p2p_peer_interface_addr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, pwdinfo->p2p_peer_interface_addr, ETH_ALEN); } else { // broadcast probe request frame _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, bc_addr, ETH_ALEN); } } _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_PROBEREQ); pframe += sizeof (struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ)) { pframe = rtw_set_ie(pframe, _SSID_IE_, pwdinfo->tx_prov_disc_info.ssid.SsidLength, pwdinfo->tx_prov_disc_info.ssid.Ssid, &(pattrib->pktlen)); } else { pframe = rtw_set_ie(pframe, _SSID_IE_, P2P_WILDCARD_SSID_LEN, pwdinfo->p2p_wildcard_ssid, &(pattrib->pktlen)); } // Use the OFDM rate in the P2P probe request frame. ( 6(B), 9(B), 12(B), 24(B), 36, 48, 54 ) pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pwdinfo->support_rate, &pattrib->pktlen); #ifdef CONFIG_IOCTL_CFG80211 if(adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211 ) { if( pmlmepriv->wps_probe_req_ie != NULL && pmlmepriv->p2p_probe_req_ie != NULL ) { //WPS IE _rtw_memcpy(pframe, pmlmepriv->wps_probe_req_ie, pmlmepriv->wps_probe_req_ie_len); pattrib->pktlen += pmlmepriv->wps_probe_req_ie_len; pframe += pmlmepriv->wps_probe_req_ie_len; //P2P IE _rtw_memcpy(pframe, pmlmepriv->p2p_probe_req_ie, pmlmepriv->p2p_probe_req_ie_len); pattrib->pktlen += pmlmepriv->p2p_probe_req_ie_len; pframe += pmlmepriv->p2p_probe_req_ie_len; } } else #endif //CONFIG_IOCTL_CFG80211 { // WPS IE // Noted by Albert 20110221 // According to the WPS specification, all the WPS attribute is presented by Big Endian. wpsielen = 0; // WPS OUI *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); wpsielen += 4; // WPS version // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); wpsielen += 2; // Value: wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 if( pmlmepriv->wps_probe_req_ie == NULL ) { // UUID-E // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_UUID_E ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0010 ); wpsielen += 2; // Value: if (pwdinfo->external_uuid == 0) { _rtw_memset( wpsie + wpsielen, 0x0, 16 ); _rtw_memcpy( wpsie + wpsielen, myid( &padapter->eeprompriv ), ETH_ALEN ); } else { _rtw_memcpy( wpsie + wpsielen, pwdinfo->uuid, 0x10 ); } wpsielen += 0x10; // Config Method // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); wpsielen += 2; // Value: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->supported_wps_cm ); wpsielen += 2; } // Device Name // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->device_name_len ); wpsielen += 2; // Value: _rtw_memcpy( wpsie + wpsielen, pwdinfo->device_name, pwdinfo->device_name_len ); wpsielen += pwdinfo->device_name_len; // Primary Device Type // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_PRIMARY_DEV_TYPE ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0008 ); wpsielen += 2; // Value: // Category ID *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI ); wpsielen += 2; // OUI *(u32*) ( wpsie + wpsielen ) = cpu_to_be32( WPSOUI ); wpsielen += 4; // Sub Category ID *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP ); wpsielen += 2; // Device Password ID // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_PWID ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); wpsielen += 2; // Value: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_REGISTRAR_SPEC ); // Registrar-specified wpsielen += 2; pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); // P2P OUI p2pielen = 0; p2pie[ p2pielen++ ] = 0x50; p2pie[ p2pielen++ ] = 0x6F; p2pie[ p2pielen++ ] = 0x9A; p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 // Commented by Albert 20110221 // According to the P2P Specification, the probe request frame should contain 5 P2P attributes // 1. P2P Capability // 2. P2P Device ID if this probe request wants to find the specific P2P device // 3. Listen Channel // 4. Extended Listen Timing // 5. Operating Channel if this WiFi is working as the group owner now // P2P Capability // Type: p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); p2pielen += 2; // Value: // Device Capability Bitmap, 1 byte p2pie[ p2pielen++ ] = DMP_P2P_DEVCAP_SUPPORT; // Group Capability Bitmap, 1 byte if ( pwdinfo->persistent_supported ) p2pie[ p2pielen++ ] = P2P_GRPCAP_PERSISTENT_GROUP | DMP_P2P_GRPCAP_SUPPORT; else p2pie[ p2pielen++ ] = DMP_P2P_GRPCAP_SUPPORT; // Listen Channel // Type: p2pie[ p2pielen++ ] = P2P_ATTR_LISTEN_CH; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); p2pielen += 2; // Value: // Country String p2pie[ p2pielen++ ] = 'X'; p2pie[ p2pielen++ ] = 'X'; // The third byte should be set to 0x04. // Described in the "Operating Channel Attribute" section. p2pie[ p2pielen++ ] = 0x04; // Operating Class p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 // Channel Number p2pie[ p2pielen++ ] = pwdinfo->listen_channel; // listen channel // Extended Listen Timing // Type: p2pie[ p2pielen++ ] = P2P_ATTR_EX_LISTEN_TIMING; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 ); p2pielen += 2; // Value: // Availability Period *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); p2pielen += 2; // Availability Interval *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); p2pielen += 2; if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) ) { // Operating Channel (if this WiFi is working as the group owner now) // Type: p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); p2pielen += 2; // Value: // Country String p2pie[ p2pielen++ ] = 'X'; p2pie[ p2pielen++ ] = 'X'; // The third byte should be set to 0x04. // Described in the "Operating Channel Attribute" section. p2pie[ p2pielen++ ] = 0x04; // Operating Class p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 // Channel Number p2pie[ p2pielen++ ] = pwdinfo->operating_channel; // operating channel number } pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); } #ifdef CONFIG_WFD #ifdef CONFIG_IOCTL_CFG80211 if ( _TRUE == pwdinfo->wfd_info->wfd_enable ) #endif { wfdielen = build_probe_req_wfd_ie(pwdinfo, pframe); pframe += wfdielen; pattrib->pktlen += wfdielen; } #ifdef CONFIG_IOCTL_CFG80211 else if (pmlmepriv->wfd_probe_req_ie != NULL && pmlmepriv->wfd_probe_req_ie_len>0) { //WFD IE _rtw_memcpy(pframe, pmlmepriv->wfd_probe_req_ie, pmlmepriv->wfd_probe_req_ie_len); pattrib->pktlen += pmlmepriv->wfd_probe_req_ie_len; pframe += pmlmepriv->wfd_probe_req_ie_len; } #endif //CONFIG_IOCTL_CFG80211 #endif //CONFIG_WFD pattrib->last_txcmdsz = pattrib->pktlen; RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("issuing probe_req, tx_len=%d\n", pattrib->last_txcmdsz)); if (wait_ack) { ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); } else { dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; } exit: return ret; } inline void issue_probereq_p2p(_adapter *adapter, u8 *da) { _issue_probereq_p2p(adapter, da, _FALSE); } int issue_probereq_p2p_ex(_adapter *adapter, u8 *da, int try_cnt, int wait_ms) { int ret; int i = 0; u32 start = rtw_get_current_time(); do { ret = _issue_probereq_p2p(adapter, da, wait_ms>0?_TRUE:_FALSE); i++; if (adapter->bDriverStopped || adapter->bSurpriseRemoved) break; if(i < try_cnt && wait_ms > 0 && ret==_FAIL) rtw_msleep_os(wait_ms); }while((iu.hdr.adapter; struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv); u8 *frame = recv_frame->u.hdr.rx_data; u16 seq_ctrl = ( (recv_frame->u.hdr.attrib.seq_num&0xffff) << 4) | (recv_frame->u.hdr.attrib.frag_num & 0xf); if (GetRetry(frame)) { if (token >= 0) { if ((seq_ctrl == mlmeext->action_public_rxseq) && (token == mlmeext->action_public_dialog_token)) { DBG_871X(FUNC_ADPT_FMT" seq_ctrl=0x%x, rxseq=0x%x, token:%d\n", FUNC_ADPT_ARG(adapter), seq_ctrl, mlmeext->action_public_rxseq, token); return _FAIL; } } else { if (seq_ctrl == mlmeext->action_public_rxseq) { DBG_871X(FUNC_ADPT_FMT" seq_ctrl=0x%x, rxseq=0x%x\n", FUNC_ADPT_ARG(adapter), seq_ctrl, mlmeext->action_public_rxseq); return _FAIL; } } } mlmeext->action_public_rxseq = seq_ctrl; if (token >= 0) mlmeext->action_public_dialog_token = token; return _SUCCESS; } unsigned int on_action_public_p2p(union recv_frame *precv_frame) { _adapter *padapter = precv_frame->u.hdr.adapter; u8 *pframe = precv_frame->u.hdr.rx_data; uint len = precv_frame->u.hdr.len; u8 *frame_body; u8 dialogToken=0; #ifdef CONFIG_P2P u8 *p2p_ie; u32 p2p_ielen, wps_ielen; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); u8 result = P2P_STATUS_SUCCESS; u8 empty_addr[ETH_ALEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; u8 *merged_p2pie = NULL; u32 merged_p2p_ielen= 0; #endif //CONFIG_P2P frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); dialogToken = frame_body[7]; if (rtw_action_public_decache(precv_frame, dialogToken) == _FAIL) return _FAIL; #ifdef CONFIG_P2P _cancel_timer_ex( &pwdinfo->reset_ch_sitesurvey ); #ifdef CONFIG_IOCTL_CFG80211 if(adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211) { rtw_cfg80211_rx_p2p_action_public(padapter, pframe, len); } else #endif //CONFIG_IOCTL_CFG80211 { // Do nothing if the driver doesn't enable the P2P function. if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) return _SUCCESS; len -= sizeof(struct rtw_ieee80211_hdr_3addr); switch( frame_body[ 6 ] )//OUI Subtype { case P2P_GO_NEGO_REQ: { DBG_871X( "[%s] Got GO Nego Req Frame\n", __FUNCTION__); _rtw_memset( &pwdinfo->groupid_info, 0x00, sizeof( struct group_id_info ) ); if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_REQ)) { rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); } if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_FAIL)) { // Commented by Albert 20110526 // In this case, this means the previous nego fail doesn't be reset yet. _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); // Restore the previous p2p state rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); DBG_871X( "[%s] Restore the previous p2p state to %d\n", __FUNCTION__, rtw_p2p_state(pwdinfo) ); } #ifdef CONFIG_CONCURRENT_MODE if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) { _cancel_timer_ex( &pwdinfo->ap_p2p_switch_timer ); } #endif // CONFIG_CONCURRENT_MODE // Commented by Kurt 20110902 //Add if statement to avoid receiving duplicate prov disc req. such that pre_p2p_state would be covered. if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING)) rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); // Commented by Kurt 20120113 // Get peer_dev_addr here if peer doesn't issue prov_disc frame. if( _rtw_memcmp(pwdinfo->rx_prov_disc_info.peerDevAddr, empty_addr, ETH_ALEN) ) _rtw_memcpy(pwdinfo->rx_prov_disc_info.peerDevAddr, GetAddr2Ptr(pframe), ETH_ALEN); result = process_p2p_group_negotation_req( pwdinfo, frame_body, len ); issue_p2p_GO_response( padapter, GetAddr2Ptr(pframe), frame_body, len, result ); #ifdef CONFIG_INTEL_WIDI if (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_LISTEN) { padapter->mlmepriv.widi_state = INTEL_WIDI_STATE_WFD_CONNECTION; _cancel_timer_ex(&(padapter->mlmepriv.listen_timer)); intel_widi_wk_cmd(padapter, INTEL_WIDI_LISTEN_STOP_WK, NULL, 0); } #endif //CONFIG_INTEL_WIDI // Commented by Albert 20110718 // No matter negotiating or negotiation failure, the driver should set up the restore P2P state timer. #ifdef CONFIG_CONCURRENT_MODE // Commented by Albert 20120107 _set_timer( &pwdinfo->restore_p2p_state_timer, 3000 ); #else // CONFIG_CONCURRENT_MODE _set_timer( &pwdinfo->restore_p2p_state_timer, 5000 ); #endif // CONFIG_CONCURRENT_MODE break; } case P2P_GO_NEGO_RESP: { DBG_871X( "[%s] Got GO Nego Resp Frame\n", __FUNCTION__); if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING)) { // Commented by Albert 20110425 // The restore timer is enabled when issuing the nego request frame of rtw_p2p_connect function. _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); pwdinfo->nego_req_info.benable = _FALSE; result = process_p2p_group_negotation_resp( pwdinfo, frame_body, len); issue_p2p_GO_confirm( pwdinfo->padapter, GetAddr2Ptr(pframe), result); if ( P2P_STATUS_SUCCESS == result ) { if ( rtw_p2p_role(pwdinfo) == P2P_ROLE_CLIENT ) { pwdinfo->p2p_info.operation_ch[ 0 ] = pwdinfo->peer_operating_ch; #ifdef CONFIG_P2P_OP_CHK_SOCIAL_CH pwdinfo->p2p_info.operation_ch[ 1 ] = 1; //Check whether GO is operating in channel 1; pwdinfo->p2p_info.operation_ch[ 2 ] = 6; //Check whether GO is operating in channel 6; pwdinfo->p2p_info.operation_ch[ 3 ] = 11; //Check whether GO is operating in channel 11; #endif //CONFIG_P2P_OP_CHK_SOCIAL_CH pwdinfo->p2p_info.scan_op_ch_only = 1; _set_timer( &pwdinfo->reset_ch_sitesurvey2, P2P_RESET_SCAN_CH ); } } // Reset the dialog token for group negotiation frames. pwdinfo->negotiation_dialog_token = 1; if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_FAIL)) { _set_timer( &pwdinfo->restore_p2p_state_timer, 5000 ); } } else { DBG_871X( "[%s] Skipped GO Nego Resp Frame (p2p_state != P2P_STATE_GONEGO_ING)\n", __FUNCTION__); } break; } case P2P_GO_NEGO_CONF: { DBG_871X( "[%s] Got GO Nego Confirm Frame\n", __FUNCTION__); result = process_p2p_group_negotation_confirm( pwdinfo, frame_body, len); if ( P2P_STATUS_SUCCESS == result ) { if ( rtw_p2p_role(pwdinfo) == P2P_ROLE_CLIENT ) { pwdinfo->p2p_info.operation_ch[ 0 ] = pwdinfo->peer_operating_ch; #ifdef CONFIG_P2P_OP_CHK_SOCIAL_CH pwdinfo->p2p_info.operation_ch[ 1 ] = 1; //Check whether GO is operating in channel 1; pwdinfo->p2p_info.operation_ch[ 2 ] = 6; //Check whether GO is operating in channel 6; pwdinfo->p2p_info.operation_ch[ 3 ] = 11; //Check whether GO is operating in channel 11; #endif //CONFIG_P2P_OP_CHK_SOCIAL_CH pwdinfo->p2p_info.scan_op_ch_only = 1; _set_timer( &pwdinfo->reset_ch_sitesurvey2, P2P_RESET_SCAN_CH ); } } break; } case P2P_INVIT_REQ: { // Added by Albert 2010/10/05 // Received the P2P Invite Request frame. DBG_871X( "[%s] Got invite request frame!\n", __FUNCTION__ ); if ( (p2p_ie=rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen)) ) { // Parse the necessary information from the P2P Invitation Request frame. // For example: The MAC address of sending this P2P Invitation Request frame. u32 attr_contentlen = 0; u8 status_code = P2P_STATUS_FAIL_INFO_UNAVAILABLE; struct group_id_info group_id; u8 invitation_flag = 0; int j=0; merged_p2p_ielen = rtw_get_p2p_merged_ies_len(frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_); merged_p2pie = rtw_zmalloc(merged_p2p_ielen + 2); // 2 is for EID and Length if (merged_p2pie == NULL) { DBG_871X( "[%s] Malloc p2p ie fail\n", __FUNCTION__); goto exit; } _rtw_memset(merged_p2pie, 0x00, merged_p2p_ielen); merged_p2p_ielen = rtw_p2p_merge_ies(frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, merged_p2pie); rtw_get_p2p_attr_content( merged_p2pie, merged_p2p_ielen, P2P_ATTR_INVITATION_FLAGS, &invitation_flag, &attr_contentlen); if ( attr_contentlen ) { rtw_get_p2p_attr_content( merged_p2pie, merged_p2p_ielen, P2P_ATTR_GROUP_BSSID, pwdinfo->p2p_peer_interface_addr, &attr_contentlen); // Commented by Albert 20120510 // Copy to the pwdinfo->p2p_peer_interface_addr. // So that the WFD UI ( or Sigma ) can get the peer interface address by using the following command. // #> iwpriv wlan0 p2p_get peer_ifa // After having the peer interface address, the sigma can find the correct conf file for wpa_supplicant. if ( attr_contentlen ) { DBG_871X( "[%s] GO's BSSID = %.2X %.2X %.2X %.2X %.2X %.2X\n", __FUNCTION__, pwdinfo->p2p_peer_interface_addr[0], pwdinfo->p2p_peer_interface_addr[1], pwdinfo->p2p_peer_interface_addr[2], pwdinfo->p2p_peer_interface_addr[3], pwdinfo->p2p_peer_interface_addr[4], pwdinfo->p2p_peer_interface_addr[5] ); } if ( invitation_flag & P2P_INVITATION_FLAGS_PERSISTENT ) { // Re-invoke the persistent group. _rtw_memset( &group_id, 0x00, sizeof( struct group_id_info ) ); rtw_get_p2p_attr_content( merged_p2pie, merged_p2p_ielen, P2P_ATTR_GROUP_ID, ( u8* ) &group_id, &attr_contentlen); if ( attr_contentlen ) { if ( _rtw_memcmp( group_id.go_device_addr, myid( &padapter->eeprompriv ), ETH_ALEN ) ) { // The p2p device sending this p2p invitation request wants this Wi-Fi device to be the persistent GO. rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_GO ); rtw_p2p_set_role( pwdinfo, P2P_ROLE_GO ); status_code = P2P_STATUS_SUCCESS; } else { // The p2p device sending this p2p invitation request wants to be the persistent GO. if ( is_matched_in_profilelist( pwdinfo->p2p_peer_interface_addr, &pwdinfo->profileinfo[ 0 ] ) ) { u8 operatingch_info[5] = { 0x00 }; if ( rtw_get_p2p_attr_content(merged_p2pie, merged_p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen) ) { if( rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, (u32)operatingch_info[4] ) >= 0 ) { // The operating channel is acceptable for this device. pwdinfo->rx_invitereq_info.operation_ch[0]= operatingch_info[4]; #ifdef CONFIG_P2P_OP_CHK_SOCIAL_CH pwdinfo->rx_invitereq_info.operation_ch[1]= 1; //Check whether GO is operating in channel 1; pwdinfo->rx_invitereq_info.operation_ch[2]= 6; //Check whether GO is operating in channel 6; pwdinfo->rx_invitereq_info.operation_ch[3]= 11; //Check whether GO is operating in channel 11; #endif //CONFIG_P2P_OP_CHK_SOCIAL_CH pwdinfo->rx_invitereq_info.scan_op_ch_only = 1; _set_timer( &pwdinfo->reset_ch_sitesurvey, P2P_RESET_SCAN_CH ); rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_MATCH ); rtw_p2p_set_role( pwdinfo, P2P_ROLE_CLIENT ); status_code = P2P_STATUS_SUCCESS; } else { // The operating channel isn't supported by this device. rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_DISMATCH ); rtw_p2p_set_role( pwdinfo, P2P_ROLE_DEVICE ); status_code = P2P_STATUS_FAIL_NO_COMMON_CH; _set_timer( &pwdinfo->restore_p2p_state_timer, 3000 ); } } else { // Commented by Albert 20121130 // Intel will use the different P2P IE to store the operating channel information // Workaround for Intel WiDi 3.5 rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_MATCH ); rtw_p2p_set_role( pwdinfo, P2P_ROLE_CLIENT ); status_code = P2P_STATUS_SUCCESS; } } else { rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_DISMATCH ); #ifdef CONFIG_INTEL_WIDI _rtw_memcpy( pwdinfo->p2p_peer_device_addr, group_id.go_device_addr , ETH_ALEN ); rtw_p2p_set_role( pwdinfo, P2P_ROLE_CLIENT ); #endif //CONFIG_INTEL_WIDI status_code = P2P_STATUS_FAIL_UNKNOWN_P2PGROUP; } } } else { DBG_871X( "[%s] P2P Group ID Attribute NOT FOUND!\n", __FUNCTION__ ); status_code = P2P_STATUS_FAIL_INFO_UNAVAILABLE; } } else { // Received the invitation to join a P2P group. _rtw_memset( &group_id, 0x00, sizeof( struct group_id_info ) ); rtw_get_p2p_attr_content( merged_p2pie, merged_p2p_ielen, P2P_ATTR_GROUP_ID, ( u8* ) &group_id, &attr_contentlen); if ( attr_contentlen ) { if ( _rtw_memcmp( group_id.go_device_addr, myid( &padapter->eeprompriv ), ETH_ALEN ) ) { // In this case, the GO can't be myself. rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_DISMATCH ); status_code = P2P_STATUS_FAIL_INFO_UNAVAILABLE; } else { // The p2p device sending this p2p invitation request wants to join an existing P2P group // Commented by Albert 2012/06/28 // In this case, this Wi-Fi device should use the iwpriv command to get the peer device address. // The peer device address should be the destination address for the provisioning discovery request. // Then, this Wi-Fi device should use the iwpriv command to get the peer interface address. // The peer interface address should be the address for WPS mac address _rtw_memcpy( pwdinfo->p2p_peer_device_addr, group_id.go_device_addr , ETH_ALEN ); rtw_p2p_set_role( pwdinfo, P2P_ROLE_CLIENT ); rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_JOIN ); status_code = P2P_STATUS_SUCCESS; } } else { DBG_871X( "[%s] P2P Group ID Attribute NOT FOUND!\n", __FUNCTION__ ); status_code = P2P_STATUS_FAIL_INFO_UNAVAILABLE; } } } else { DBG_871X( "[%s] P2P Invitation Flags Attribute NOT FOUND!\n", __FUNCTION__ ); status_code = P2P_STATUS_FAIL_INFO_UNAVAILABLE; } DBG_871X( "[%s] status_code = %d\n", __FUNCTION__, status_code ); pwdinfo->inviteresp_info.token = frame_body[ 7 ]; issue_p2p_invitation_response( padapter, GetAddr2Ptr(pframe), pwdinfo->inviteresp_info.token, status_code ); _set_timer( &pwdinfo->restore_p2p_state_timer, 3000 ); } #ifdef CONFIG_INTEL_WIDI if (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_LISTEN) { padapter->mlmepriv.widi_state = INTEL_WIDI_STATE_WFD_CONNECTION; _cancel_timer_ex(&(padapter->mlmepriv.listen_timer)); intel_widi_wk_cmd(padapter, INTEL_WIDI_LISTEN_STOP_WK, NULL, 0); } #endif //CONFIG_INTEL_WIDI break; } case P2P_INVIT_RESP: { u8 attr_content = 0x00; u32 attr_contentlen = 0; DBG_871X( "[%s] Got invite response frame!\n", __FUNCTION__ ); _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); if ( (p2p_ie=rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen)) ) { rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen); if ( attr_contentlen == 1 ) { DBG_871X( "[%s] Status = %d\n", __FUNCTION__, attr_content ); pwdinfo->invitereq_info.benable = _FALSE; if ( attr_content == P2P_STATUS_SUCCESS ) { if ( _rtw_memcmp( pwdinfo->invitereq_info.go_bssid, myid( &padapter->eeprompriv ), ETH_ALEN )) { rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO ); } else { rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); } rtw_p2p_set_state( pwdinfo, P2P_STATE_RX_INVITE_RESP_OK ); } else { rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); rtw_p2p_set_state( pwdinfo, P2P_STATE_RX_INVITE_RESP_FAIL ); } } else { rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); rtw_p2p_set_state( pwdinfo, P2P_STATE_RX_INVITE_RESP_FAIL ); } } else { rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); rtw_p2p_set_state( pwdinfo, P2P_STATE_RX_INVITE_RESP_FAIL ); } if ( rtw_p2p_chk_state( pwdinfo, P2P_STATE_RX_INVITE_RESP_FAIL ) ) { _set_timer( &pwdinfo->restore_p2p_state_timer, 5000 ); } break; } case P2P_DEVDISC_REQ: process_p2p_devdisc_req(pwdinfo, pframe, len); break; case P2P_DEVDISC_RESP: process_p2p_devdisc_resp(pwdinfo, pframe, len); break; case P2P_PROVISION_DISC_REQ: DBG_871X( "[%s] Got Provisioning Discovery Request Frame\n", __FUNCTION__ ); process_p2p_provdisc_req(pwdinfo, pframe, len); _rtw_memcpy(pwdinfo->rx_prov_disc_info.peerDevAddr, GetAddr2Ptr(pframe), ETH_ALEN); //20110902 Kurt //Add the following statement to avoid receiving duplicate prov disc req. such that pre_p2p_state would be covered. if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_REQ)) rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); rtw_p2p_set_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_REQ); _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT ); #ifdef CONFIG_INTEL_WIDI if (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_LISTEN) { padapter->mlmepriv.widi_state = INTEL_WIDI_STATE_WFD_CONNECTION; _cancel_timer_ex(&(padapter->mlmepriv.listen_timer)); intel_widi_wk_cmd(padapter, INTEL_WIDI_LISTEN_STOP_WK, NULL, 0); } #endif //CONFIG_INTEL_WIDI break; case P2P_PROVISION_DISC_RESP: // Commented by Albert 20110707 // Should we check the pwdinfo->tx_prov_disc_info.bsent flag here?? DBG_871X( "[%s] Got Provisioning Discovery Response Frame\n", __FUNCTION__ ); // Commented by Albert 20110426 // The restore timer is enabled when issuing the provisioing request frame in rtw_p2p_prov_disc function. _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); rtw_p2p_set_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_RSP); process_p2p_provdisc_resp(pwdinfo, pframe); _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT ); break; } } exit: if(merged_p2pie) { rtw_mfree(merged_p2pie, merged_p2p_ielen + 2); } #endif //CONFIG_P2P return _SUCCESS; } unsigned int on_action_public_vendor(union recv_frame *precv_frame) { unsigned int ret = _FAIL; u8 *pframe = precv_frame->u.hdr.rx_data; uint frame_len = precv_frame->u.hdr.len; u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); if (_rtw_memcmp(frame_body + 2, P2P_OUI, 4) == _TRUE) { ret = on_action_public_p2p(precv_frame); } return ret; } unsigned int on_action_public_default(union recv_frame *precv_frame, u8 action) { unsigned int ret = _FAIL; u8 *pframe = precv_frame->u.hdr.rx_data; uint frame_len = precv_frame->u.hdr.len; u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); u8 token; _adapter *adapter = precv_frame->u.hdr.adapter; int cnt = 0; char msg[64]; token = frame_body[2]; if (rtw_action_public_decache(precv_frame, token) == _FAIL) goto exit; #ifdef CONFIG_IOCTL_CFG80211 cnt += sprintf((msg+cnt), "%s(token:%u)", action_public_str(action), token); rtw_cfg80211_rx_action(adapter, pframe, frame_len, msg); #endif ret = _SUCCESS; exit: return ret; } unsigned int on_action_public(_adapter *padapter, union recv_frame *precv_frame) { unsigned int ret = _FAIL; u8 *pframe = precv_frame->u.hdr.rx_data; uint frame_len = precv_frame->u.hdr.len; u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); u8 category, action; /* check RA matches or not */ if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN)) goto exit; category = frame_body[0]; if(category != RTW_WLAN_CATEGORY_PUBLIC) goto exit; action = frame_body[1]; switch (action) { case ACT_PUBLIC_VENDOR: ret = on_action_public_vendor(precv_frame); break; default: ret = on_action_public_default(precv_frame, action); break; } exit: return ret; } unsigned int OnAction_ht(_adapter *padapter, union recv_frame *precv_frame) { u8 *pframe = precv_frame->u.hdr.rx_data; uint frame_len = precv_frame->u.hdr.len; u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); u8 category, action; /* check RA matches or not */ if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN)) goto exit; category = frame_body[0]; if(category != RTW_WLAN_CATEGORY_HT) goto exit; action = frame_body[1]; switch (action) { case RTW_WLAN_ACTION_HT_COMPRESS_BEAMFORMING: #ifdef CONFIG_BEAMFORMING //DBG_871X("RTW_WLAN_ACTION_HT_COMPRESS_BEAMFORMING\n"); beamforming_get_report_frame(padapter, precv_frame); #endif //CONFIG_BEAMFORMING break; default: break; } exit: return _SUCCESS; } #ifdef CONFIG_IEEE80211W unsigned int OnAction_sa_query(_adapter *padapter, union recv_frame *precv_frame) { u8 *pframe = precv_frame->u.hdr.rx_data; struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); unsigned short tid; //Baron DBG_871X("OnAction_sa_query\n"); switch (pframe[WLAN_HDR_A3_LEN+1]) { case 0: //SA Query req _rtw_memcpy(&tid, &pframe[WLAN_HDR_A3_LEN+2], sizeof(unsigned short)); DBG_871X("OnAction_sa_query request,action=%d, tid=%04x\n", pframe[WLAN_HDR_A3_LEN+1], tid); issue_action_SA_Query(padapter, GetAddr2Ptr(pframe), 1, tid); break; case 1: //SA Query rsp _cancel_timer_ex(&pmlmeext->sa_query_timer); DBG_871X("OnAction_sa_query response,action=%d, tid=%04x, cancel timer\n", pframe[WLAN_HDR_A3_LEN+1], pframe[WLAN_HDR_A3_LEN+2]); break; default: break; } if(0) { int pp; printk("pattrib->pktlen = %d =>", pattrib->pkt_len); for(pp=0;pp< pattrib->pkt_len; pp++) printk(" %02x ", pframe[pp]); printk("\n"); } return _SUCCESS; } #endif //CONFIG_IEEE80211W unsigned int OnAction_wmm(_adapter *padapter, union recv_frame *precv_frame) { return _SUCCESS; } unsigned int OnAction_vht(_adapter *padapter, union recv_frame *precv_frame) { #ifdef CONFIG_80211AC_VHT struct rx_pkt_attrib *prxattrib = &precv_frame->u.hdr.attrib; u8 *pframe = precv_frame->u.hdr.rx_data; uint frame_len = precv_frame->u.hdr.len; u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); u8 category, action; struct sta_info *psta = NULL; /* check RA matches or not */ if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN)) goto exit; category = frame_body[0]; if(category != RTW_WLAN_CATEGORY_VHT) goto exit; action = frame_body[1]; switch (action) { case RTW_WLAN_ACTION_VHT_COMPRESSED_BEAMFORMING: #ifdef CONFIG_BEAMFORMING //DBG_871X("RTW_WLAN_ACTION_VHT_COMPRESSED_BEAMFORMING\n"); beamforming_get_report_frame(padapter, precv_frame); #endif //CONFIG_BEAMFORMING break; case RTW_WLAN_ACTION_VHT_OPMODE_NOTIFICATION: // CategoryCode(1) + ActionCode(1) + OpModeNotification(1) //DBG_871X("RTW_WLAN_ACTION_VHT_OPMODE_NOTIFICATION\n"); psta = rtw_get_stainfo(&padapter->stapriv, prxattrib->ta); if (psta) rtw_process_vht_op_mode_notify(padapter, &frame_body[2], psta); break; default: break; } exit: #endif //CONFIG_80211AC_VHT return _SUCCESS; } unsigned int OnAction_p2p(_adapter *padapter, union recv_frame *precv_frame) { #ifdef CONFIG_P2P u8 *frame_body; u8 category, OUI_Subtype, dialogToken=0; u8 *pframe = precv_frame->u.hdr.rx_data; uint len = precv_frame->u.hdr.len; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); //check RA matches or not if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN))//for if1, sta/ap mode return _SUCCESS; frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); category = frame_body[0]; if(category != RTW_WLAN_CATEGORY_P2P) return _SUCCESS; if ( cpu_to_be32( *( ( u32* ) ( frame_body + 1 ) ) ) != P2POUI ) return _SUCCESS; #ifdef CONFIG_IOCTL_CFG80211 if(adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211 ) { rtw_cfg80211_rx_action_p2p(padapter, pframe, len); return _SUCCESS; } else #endif //CONFIG_IOCTL_CFG80211 { len -= sizeof(struct rtw_ieee80211_hdr_3addr); OUI_Subtype = frame_body[5]; dialogToken = frame_body[6]; switch(OUI_Subtype) { case P2P_NOTICE_OF_ABSENCE: break; case P2P_PRESENCE_REQUEST: process_p2p_presence_req(pwdinfo, pframe, len); break; case P2P_PRESENCE_RESPONSE: break; case P2P_GO_DISC_REQUEST: break; default: break; } } #endif //CONFIG_P2P return _SUCCESS; } unsigned int OnAction(_adapter *padapter, union recv_frame *precv_frame) { int i; unsigned char category; struct action_handler *ptable; unsigned char *frame_body; u8 *pframe = precv_frame->u.hdr.rx_data; frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); category = frame_body[0]; for(i = 0; i < sizeof(OnAction_tbl)/sizeof(struct action_handler); i++) { ptable = &OnAction_tbl[i]; if(category == ptable->num) ptable->func(padapter, precv_frame); } return _SUCCESS; } unsigned int DoReserved(_adapter *padapter, union recv_frame *precv_frame) { //DBG_871X("rcvd mgt frame(%x, %x)\n", (GetFrameSubType(pframe) >> 4), *(unsigned int *)GetAddr1Ptr(pframe)); return _SUCCESS; } struct xmit_frame *_alloc_mgtxmitframe(struct xmit_priv *pxmitpriv, bool once) { struct xmit_frame *pmgntframe; struct xmit_buf *pxmitbuf; if (once) pmgntframe = rtw_alloc_xmitframe_once(pxmitpriv); else pmgntframe = rtw_alloc_xmitframe_ext(pxmitpriv); if (pmgntframe == NULL) { DBG_871X(FUNC_ADPT_FMT" alloc xmitframe fail, once:%d\n", FUNC_ADPT_ARG(pxmitpriv->adapter), once); goto exit; } if ((pxmitbuf = rtw_alloc_xmitbuf_ext(pxmitpriv)) == NULL) { DBG_871X(FUNC_ADPT_FMT" alloc xmitbuf fail\n", FUNC_ADPT_ARG(pxmitpriv->adapter)); rtw_free_xmitframe(pxmitpriv, pmgntframe); pmgntframe = NULL; goto exit; } pmgntframe->frame_tag = MGNT_FRAMETAG; pmgntframe->pxmitbuf = pxmitbuf; pmgntframe->buf_addr = pxmitbuf->pbuf; pxmitbuf->priv_data = pmgntframe; exit: return pmgntframe; } inline struct xmit_frame *alloc_mgtxmitframe(struct xmit_priv *pxmitpriv) { return _alloc_mgtxmitframe(pxmitpriv, _FALSE); } inline struct xmit_frame *alloc_mgtxmitframe_once(struct xmit_priv *pxmitpriv) { return _alloc_mgtxmitframe(pxmitpriv, _TRUE); } /**************************************************************************** Following are some TX fuctions for WiFi MLME *****************************************************************************/ void update_mgnt_tx_rate(_adapter *padapter, u8 rate) { struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); pmlmeext->tx_rate = rate; //DBG_871X("%s(): rate = %x\n",__FUNCTION__, rate); } void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib) { u8 wireless_mode; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); //_rtw_memset((u8 *)(pattrib), 0, sizeof(struct pkt_attrib)); pattrib->hdrlen = 24; pattrib->nr_frags = 1; pattrib->priority = 7; pattrib->mac_id = 0; pattrib->qsel = QSLT_MGNT; pattrib->pktlen = 0; if (pmlmeext->tx_rate == IEEE80211_CCK_RATE_1MB) wireless_mode = WIRELESS_11B; else wireless_mode = WIRELESS_11G; pattrib->raid = rtw_get_mgntframe_raid(padapter, wireless_mode); pattrib->rate = pmlmeext->tx_rate; pattrib->encrypt = _NO_PRIVACY_; pattrib->bswenc = _FALSE; pattrib->qos_en = _FALSE; pattrib->ht_en = _FALSE; pattrib->bwmode = CHANNEL_WIDTH_20; pattrib->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; pattrib->sgi = _FALSE; pattrib->seqnum = pmlmeext->mgnt_seq; pattrib->retry_ctrl = _TRUE; pattrib->mbssid = 0; } void update_mgntframe_attrib_addr(_adapter *padapter, struct xmit_frame *pmgntframe) { u8 *pframe; struct pkt_attrib *pattrib = &pmgntframe->attrib; pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; _rtw_memcpy(pattrib->ra, GetAddr1Ptr(pframe), ETH_ALEN); _rtw_memcpy(pattrib->ta, GetAddr2Ptr(pframe), ETH_ALEN); } void dump_mgntframe(_adapter *padapter, struct xmit_frame *pmgntframe) { if(padapter->bSurpriseRemoved == _TRUE || padapter->bDriverStopped == _TRUE) { rtw_free_xmitbuf(&padapter->xmitpriv, pmgntframe->pxmitbuf); rtw_free_xmitframe(&padapter->xmitpriv, pmgntframe); return; } rtw_hal_mgnt_xmit(padapter, pmgntframe); } s32 dump_mgntframe_and_wait(_adapter *padapter, struct xmit_frame *pmgntframe, int timeout_ms) { s32 ret = _FAIL; _irqL irqL; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct xmit_buf *pxmitbuf = pmgntframe->pxmitbuf; struct submit_ctx sctx; if(padapter->bSurpriseRemoved == _TRUE || padapter->bDriverStopped == _TRUE) { rtw_free_xmitbuf(&padapter->xmitpriv, pmgntframe->pxmitbuf); rtw_free_xmitframe(&padapter->xmitpriv, pmgntframe); return ret; } rtw_sctx_init(&sctx, timeout_ms); pxmitbuf->sctx = &sctx; ret = rtw_hal_mgnt_xmit(padapter, pmgntframe); if (ret == _SUCCESS) ret = rtw_sctx_wait(&sctx, __func__); _enter_critical(&pxmitpriv->lock_sctx, &irqL); pxmitbuf->sctx = NULL; _exit_critical(&pxmitpriv->lock_sctx, &irqL); return ret; } s32 dump_mgntframe_and_wait_ack(_adapter *padapter, struct xmit_frame *pmgntframe) { #ifdef CONFIG_XMIT_ACK static u8 seq_no = 0; s32 ret = _FAIL; u32 timeout_ms = 500;// 500ms struct xmit_priv *pxmitpriv = &padapter->xmitpriv; #ifdef CONFIG_CONCURRENT_MODE if (padapter->pbuddy_adapter && !padapter->isprimary) pxmitpriv = &(padapter->pbuddy_adapter->xmitpriv); #endif if(padapter->bSurpriseRemoved == _TRUE || padapter->bDriverStopped == _TRUE) { rtw_free_xmitbuf(&padapter->xmitpriv, pmgntframe->pxmitbuf); rtw_free_xmitframe(&padapter->xmitpriv, pmgntframe); return -1; } _enter_critical_mutex(&pxmitpriv->ack_tx_mutex, NULL); pxmitpriv->ack_tx = _TRUE; pxmitpriv->seq_no = seq_no++; pmgntframe->ack_report = 1; if (rtw_hal_mgnt_xmit(padapter, pmgntframe) == _SUCCESS) { ret = rtw_ack_tx_wait(pxmitpriv, timeout_ms); } pxmitpriv->ack_tx = _FALSE; _exit_critical_mutex(&pxmitpriv->ack_tx_mutex, NULL); return ret; #else //!CONFIG_XMIT_ACK dump_mgntframe(padapter, pmgntframe); rtw_msleep_os(50); return _SUCCESS; #endif //!CONFIG_XMIT_ACK } int update_hidden_ssid(u8 *ies, u32 ies_len, u8 hidden_ssid_mode) { u8 *ssid_ie; sint ssid_len_ori; int len_diff = 0; ssid_ie = rtw_get_ie(ies, WLAN_EID_SSID, &ssid_len_ori, ies_len); //DBG_871X("%s hidden_ssid_mode:%u, ssid_ie:%p, ssid_len_ori:%d\n", __FUNCTION__, hidden_ssid_mode, ssid_ie, ssid_len_ori); if(ssid_ie && ssid_len_ori>0) { switch(hidden_ssid_mode) { case 1: { u8 *next_ie = ssid_ie + 2 + ssid_len_ori; u32 remain_len = 0; remain_len = ies_len -(next_ie-ies); ssid_ie[1] = 0; _rtw_memcpy(ssid_ie+2, next_ie, remain_len); len_diff -= ssid_len_ori; break; } case 2: _rtw_memset(&ssid_ie[2], 0, ssid_len_ori); break; default: break; } } return len_diff; } void issue_beacon(_adapter *padapter, int timeout_ms) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; unsigned int rate_len; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) _irqL irqL; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); #endif //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &(padapter->wdinfo); #endif //CONFIG_P2P //DBG_871X("%s\n", __FUNCTION__); #ifdef CONFIG_BCN_ICF if ((pmgntframe = rtw_alloc_bcnxmitframe(pxmitpriv)) == NULL) #else if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) #endif { DBG_871X("%s, alloc mgnt frame fail\n", __FUNCTION__); return; } #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) _enter_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); #endif //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); pattrib->qsel = QSLT_BEACON; #ifdef CONFIG_CONCURRENT_MODE if(padapter->iface_type == IFACE_PORT1) pattrib->mbssid = 1; #endif _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); //pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_BEACON); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { //DBG_871X("ie len=%d\n", cur_network->IELength); #ifdef CONFIG_P2P // for P2P : Primary Device Type & Device Name u32 wpsielen=0, insert_len=0; u8 *wpsie=NULL; wpsie = rtw_get_wps_ie(cur_network->IEs+_FIXED_IE_LENGTH_, cur_network->IELength-_FIXED_IE_LENGTH_, NULL, &wpsielen); if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) && wpsie && wpsielen>0) { uint wps_offset, remainder_ielen; u8 *premainder_ie, *pframe_wscie; wps_offset = (uint)(wpsie - cur_network->IEs); premainder_ie = wpsie + wpsielen; remainder_ielen = cur_network->IELength - wps_offset - wpsielen; #ifdef CONFIG_IOCTL_CFG80211 if(adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211 ) { if(pmlmepriv->wps_beacon_ie && pmlmepriv->wps_beacon_ie_len>0) { _rtw_memcpy(pframe, cur_network->IEs, wps_offset); pframe += wps_offset; pattrib->pktlen += wps_offset; _rtw_memcpy(pframe, pmlmepriv->wps_beacon_ie, pmlmepriv->wps_beacon_ie_len); pframe += pmlmepriv->wps_beacon_ie_len; pattrib->pktlen += pmlmepriv->wps_beacon_ie_len; //copy remainder_ie to pframe _rtw_memcpy(pframe, premainder_ie, remainder_ielen); pframe += remainder_ielen; pattrib->pktlen += remainder_ielen; } else { _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); pframe += cur_network->IELength; pattrib->pktlen += cur_network->IELength; } } else #endif //CONFIG_IOCTL_CFG80211 { pframe_wscie = pframe + wps_offset; _rtw_memcpy(pframe, cur_network->IEs, wps_offset+wpsielen); pframe += (wps_offset + wpsielen); pattrib->pktlen += (wps_offset + wpsielen); //now pframe is end of wsc ie, insert Primary Device Type & Device Name // Primary Device Type // Type: *(u16*) ( pframe + insert_len) = cpu_to_be16( WPS_ATTR_PRIMARY_DEV_TYPE ); insert_len += 2; // Length: *(u16*) ( pframe + insert_len ) = cpu_to_be16( 0x0008 ); insert_len += 2; // Value: // Category ID *(u16*) ( pframe + insert_len ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); insert_len += 2; // OUI *(u32*) ( pframe + insert_len ) = cpu_to_be32( WPSOUI ); insert_len += 4; // Sub Category ID *(u16*) ( pframe + insert_len ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); insert_len += 2; // Device Name // Type: *(u16*) ( pframe + insert_len ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); insert_len += 2; // Length: *(u16*) ( pframe + insert_len ) = cpu_to_be16( pwdinfo->device_name_len ); insert_len += 2; // Value: _rtw_memcpy( pframe + insert_len, pwdinfo->device_name, pwdinfo->device_name_len ); insert_len += pwdinfo->device_name_len; //update wsc ie length *(pframe_wscie+1) = (wpsielen -2) + insert_len; //pframe move to end pframe+=insert_len; pattrib->pktlen += insert_len; //copy remainder_ie to pframe _rtw_memcpy(pframe, premainder_ie, remainder_ielen); pframe += remainder_ielen; pattrib->pktlen += remainder_ielen; } } else #endif //CONFIG_P2P { int len_diff; _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); len_diff = update_hidden_ssid( pframe+_BEACON_IE_OFFSET_ , cur_network->IELength-_BEACON_IE_OFFSET_ , pmlmeinfo->hidden_ssid_mode ); pframe += (cur_network->IELength+len_diff); pattrib->pktlen += (cur_network->IELength+len_diff); } { u8 *wps_ie; uint wps_ielen; u8 sr = 0; wps_ie = rtw_get_wps_ie(pmgntframe->buf_addr+TXDESC_OFFSET+sizeof (struct rtw_ieee80211_hdr_3addr)+_BEACON_IE_OFFSET_, pattrib->pktlen-sizeof (struct rtw_ieee80211_hdr_3addr)-_BEACON_IE_OFFSET_, NULL, &wps_ielen); if (wps_ie && wps_ielen>0) { rtw_get_wps_attr_content(wps_ie, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); } if (sr != 0) set_fwstate(pmlmepriv, WIFI_UNDER_WPS); else _clr_fwstate_(pmlmepriv, WIFI_UNDER_WPS); } #ifdef CONFIG_P2P if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { u32 len; #ifdef CONFIG_IOCTL_CFG80211 if(adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211 ) { len = pmlmepriv->p2p_beacon_ie_len; if(pmlmepriv->p2p_beacon_ie && len>0) _rtw_memcpy(pframe, pmlmepriv->p2p_beacon_ie, len); } else #endif //CONFIG_IOCTL_CFG80211 { len = build_beacon_p2p_ie(pwdinfo, pframe); } pframe += len; pattrib->pktlen += len; #ifdef CONFIG_WFD #ifdef CONFIG_IOCTL_CFG80211 if(_TRUE == pwdinfo->wfd_info->wfd_enable) #endif //CONFIG_IOCTL_CFG80211 { len = build_beacon_wfd_ie( pwdinfo, pframe ); } #ifdef CONFIG_IOCTL_CFG80211 else { len = 0; if(pmlmepriv->wfd_beacon_ie && pmlmepriv->wfd_beacon_ie_len>0) { len = pmlmepriv->wfd_beacon_ie_len; _rtw_memcpy(pframe, pmlmepriv->wfd_beacon_ie, len); } } #endif //CONFIG_IOCTL_CFG80211 pframe += len; pattrib->pktlen += len; #endif //CONFIG_WFD } #endif //CONFIG_P2P goto _issue_bcn; } //below for ad-hoc mode //timestamp will be inserted by hardware pframe += 8; pattrib->pktlen += 8; // beacon interval: 2 bytes _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); pframe += 2; pattrib->pktlen += 2; // capability info: 2 bytes _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); pframe += 2; pattrib->pktlen += 2; // SSID pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pattrib->pktlen); // supported rates... rate_len = rtw_get_rateset_len(cur_network->SupportedRates); pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pattrib->pktlen); // DS parameter set pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pattrib->pktlen); //if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) { u8 erpinfo=0; u32 ATIMWindow; // IBSS Parameter Set... //ATIMWindow = cur->Configuration.ATIMWindow; ATIMWindow = 0; pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pattrib->pktlen); //ERP IE pframe = rtw_set_ie(pframe, _ERPINFO_IE_, 1, &erpinfo, &pattrib->pktlen); } // EXTERNDED SUPPORTED RATE if (rate_len > 8) { pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pattrib->pktlen); } //todo:HT for adhoc _issue_bcn: #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) pmlmepriv->update_bcn = _FALSE; _exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); #endif //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) if ((pattrib->pktlen + TXDESC_SIZE) > 512) { DBG_871X("beacon frame too large\n"); return; } pattrib->last_txcmdsz = pattrib->pktlen; //DBG_871X("issue bcn_sz=%d\n", pattrib->last_txcmdsz); if(timeout_ms > 0) dump_mgntframe_and_wait(padapter, pmgntframe, timeout_ms); else dump_mgntframe(padapter, pmgntframe); } void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probereq) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; unsigned char *mac, *bssid; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) u8 *pwps_ie; uint wps_ielen; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; #endif //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); unsigned int rate_len; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &(padapter->wdinfo); #ifdef CONFIG_WFD u32 wfdielen = 0; #endif //CONFIG_WFD #endif //CONFIG_P2P //DBG_871X("%s\n", __FUNCTION__); if(da == NULL) return; if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { DBG_871X("%s, alloc mgnt frame fail\n", __FUNCTION__); return; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; mac = myid(&(padapter->eeprompriv)); bssid = cur_network->MacAddress; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(fctrl, WIFI_PROBERSP); pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = pattrib->hdrlen; pframe += pattrib->hdrlen; if(cur_network->IELength>MAX_IE_SZ) return; #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { pwps_ie = rtw_get_wps_ie(cur_network->IEs+_FIXED_IE_LENGTH_, cur_network->IELength-_FIXED_IE_LENGTH_, NULL, &wps_ielen); //inerset & update wps_probe_resp_ie if((pmlmepriv->wps_probe_resp_ie!=NULL) && pwps_ie && (wps_ielen>0)) { uint wps_offset, remainder_ielen; u8 *premainder_ie; wps_offset = (uint)(pwps_ie - cur_network->IEs); premainder_ie = pwps_ie + wps_ielen; remainder_ielen = cur_network->IELength - wps_offset - wps_ielen; _rtw_memcpy(pframe, cur_network->IEs, wps_offset); pframe += wps_offset; pattrib->pktlen += wps_offset; wps_ielen = (uint)pmlmepriv->wps_probe_resp_ie[1];//to get ie data len if((wps_offset+wps_ielen+2)<=MAX_IE_SZ) { _rtw_memcpy(pframe, pmlmepriv->wps_probe_resp_ie, wps_ielen+2); pframe += wps_ielen+2; pattrib->pktlen += wps_ielen+2; } if((wps_offset+wps_ielen+2+remainder_ielen)<=MAX_IE_SZ) { _rtw_memcpy(pframe, premainder_ie, remainder_ielen); pframe += remainder_ielen; pattrib->pktlen += remainder_ielen; } } else { _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); pframe += cur_network->IELength; pattrib->pktlen += cur_network->IELength; } /* retrieve SSID IE from cur_network->Ssid */ { u8 *ssid_ie; sint ssid_ielen; sint ssid_ielen_diff; u8 buf[MAX_IE_SZ]; u8 *ies = pmgntframe->buf_addr+TXDESC_OFFSET+sizeof(struct rtw_ieee80211_hdr_3addr); ssid_ie = rtw_get_ie(ies+_FIXED_IE_LENGTH_, _SSID_IE_, &ssid_ielen, (pframe-ies)-_FIXED_IE_LENGTH_); ssid_ielen_diff = cur_network->Ssid.SsidLength - ssid_ielen; if (ssid_ie && cur_network->Ssid.SsidLength) { uint remainder_ielen; u8 *remainder_ie; remainder_ie = ssid_ie+2; remainder_ielen = (pframe-remainder_ie); if (remainder_ielen > MAX_IE_SZ) { DBG_871X_LEVEL(_drv_warning_, FUNC_ADPT_FMT" remainder_ielen > MAX_IE_SZ\n", FUNC_ADPT_ARG(padapter)); remainder_ielen = MAX_IE_SZ; } _rtw_memcpy(buf, remainder_ie, remainder_ielen); _rtw_memcpy(remainder_ie+ssid_ielen_diff, buf, remainder_ielen); *(ssid_ie+1) = cur_network->Ssid.SsidLength; _rtw_memcpy(ssid_ie+2, cur_network->Ssid.Ssid, cur_network->Ssid.SsidLength); pframe += ssid_ielen_diff; pattrib->pktlen += ssid_ielen_diff; } } } else #endif { //timestamp will be inserted by hardware pframe += 8; pattrib->pktlen += 8; // beacon interval: 2 bytes _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); pframe += 2; pattrib->pktlen += 2; // capability info: 2 bytes _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); pframe += 2; pattrib->pktlen += 2; //below for ad-hoc mode // SSID pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pattrib->pktlen); // supported rates... rate_len = rtw_get_rateset_len(cur_network->SupportedRates); pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pattrib->pktlen); // DS parameter set pframe =rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pattrib->pktlen); if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) { u8 erpinfo=0; u32 ATIMWindow; // IBSS Parameter Set... //ATIMWindow = cur->Configuration.ATIMWindow; ATIMWindow = 0; pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pattrib->pktlen); //ERP IE pframe = rtw_set_ie(pframe, _ERPINFO_IE_, 1, &erpinfo, &pattrib->pktlen); } // EXTERNDED SUPPORTED RATE if (rate_len > 8) { pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pattrib->pktlen); } //todo:HT for adhoc } #ifdef CONFIG_P2P if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) /* IOT issue, When wifi_spec is not set, send probe_resp with P2P IE even if probe_req has no P2P IE */ && (is_valid_p2p_probereq || !padapter->registrypriv.wifi_spec)) { u32 len; #ifdef CONFIG_IOCTL_CFG80211 if(adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211 ) { //if pwdinfo->role == P2P_ROLE_DEVICE will call issue_probersp_p2p() len = pmlmepriv->p2p_go_probe_resp_ie_len; if(pmlmepriv->p2p_go_probe_resp_ie && len>0) _rtw_memcpy(pframe, pmlmepriv->p2p_go_probe_resp_ie, len); } else #endif //CONFIG_IOCTL_CFG80211 { len = build_probe_resp_p2p_ie(pwdinfo, pframe); } pframe += len; pattrib->pktlen += len; #ifdef CONFIG_WFD #ifdef CONFIG_IOCTL_CFG80211 if(_TRUE == pwdinfo->wfd_info->wfd_enable) #endif //CONFIG_IOCTL_CFG80211 { len = build_probe_resp_wfd_ie(pwdinfo, pframe, 0); } #ifdef CONFIG_IOCTL_CFG80211 else { len = 0; if(pmlmepriv->wfd_probe_resp_ie && pmlmepriv->wfd_probe_resp_ie_len>0) { len = pmlmepriv->wfd_probe_resp_ie_len; _rtw_memcpy(pframe, pmlmepriv->wfd_probe_resp_ie, len); } } #endif //CONFIG_IOCTL_CFG80211 pframe += len; pattrib->pktlen += len; #endif //CONFIG_WFD } #endif //CONFIG_P2P #ifdef CONFIG_AUTO_AP_MODE { struct sta_info *psta; struct sta_priv *pstapriv = &padapter->stapriv; DBG_871X("(%s)\n", __FUNCTION__); //check rc station psta = rtw_get_stainfo(pstapriv, da); if (psta && psta->isrc && psta->pid>0) { u8 RC_OUI[4]={0x00,0xE0,0x4C,0x0A}; u8 RC_INFO[14] = {0}; //EID[1] + EID_LEN[1] + RC_OUI[4] + MAC[6] + PairingID[2] + ChannelNum[2] u16 cu_ch = (u16)cur_network->Configuration.DSConfig; DBG_871X("%s, reply rc(pid=0x%x) device "MAC_FMT" in ch=%d\n", __FUNCTION__, psta->pid, MAC_ARG(psta->hwaddr), cu_ch); //append vendor specific ie _rtw_memcpy(RC_INFO, RC_OUI, sizeof(RC_OUI)); _rtw_memcpy(&RC_INFO[4], mac, ETH_ALEN); _rtw_memcpy(&RC_INFO[10], (u8*)&psta->pid, 2); _rtw_memcpy(&RC_INFO[12], (u8*)&cu_ch, 2); pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, sizeof(RC_INFO), RC_INFO, &pattrib->pktlen); } } #endif //CONFIG_AUTO_AP_MODE pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); return; } int _issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da, u8 ch, bool append_wps, int wait_ack) { int ret = _FAIL; struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; unsigned char *mac; unsigned char bssrate[NumRates]; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); int bssrate_len = 0; u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; RT_TRACE(_module_rtl871x_mlme_c_,_drv_notice_,("+issue_probereq\n")); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto exit; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; mac = myid(&(padapter->eeprompriv)); fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; if (da) { // unicast probe request frame _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, da, ETH_ALEN); } else { // broadcast probe request frame _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, bc_addr, ETH_ALEN); } _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_PROBEREQ); pframe += sizeof (struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); if(pssid) pframe = rtw_set_ie(pframe, _SSID_IE_, pssid->SsidLength, pssid->Ssid, &(pattrib->pktlen)); else pframe = rtw_set_ie(pframe, _SSID_IE_, 0, NULL, &(pattrib->pktlen)); get_rate_set(padapter, bssrate, &bssrate_len); if (bssrate_len > 8) { pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); } else { pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); } if (ch) pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, &ch, &pattrib->pktlen); if (append_wps) { //add wps_ie for wps2.0 if(pmlmepriv->wps_probe_req_ie_len>0 && pmlmepriv->wps_probe_req_ie) { _rtw_memcpy(pframe, pmlmepriv->wps_probe_req_ie, pmlmepriv->wps_probe_req_ie_len); pframe += pmlmepriv->wps_probe_req_ie_len; pattrib->pktlen += pmlmepriv->wps_probe_req_ie_len; //pmlmepriv->wps_probe_req_ie_len = 0 ;//reset to zero } } pattrib->last_txcmdsz = pattrib->pktlen; RT_TRACE(_module_rtl871x_mlme_c_,_drv_notice_,("issuing probe_req, tx_len=%d\n", pattrib->last_txcmdsz)); if (wait_ack) { ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); } else { dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; } exit: return ret; } inline void issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da) { _issue_probereq(padapter, pssid, da, 0, 1, _FALSE); } int issue_probereq_ex(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da, u8 ch, bool append_wps, int try_cnt, int wait_ms) { int ret; int i = 0; u32 start = rtw_get_current_time(); do { ret = _issue_probereq(padapter, pssid, da, ch, append_wps, wait_ms>0?_TRUE:_FALSE); i++; if (padapter->bDriverStopped || padapter->bSurpriseRemoved) break; if(i < try_cnt && wait_ms > 0 && ret==_FAIL) rtw_msleep_os(wait_ms); }while((ixmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { return; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_AUTH); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); if(psta)// for AP mode { #ifdef CONFIG_NATIVEAP_MLME _rtw_memcpy(pwlanhdr->addr1, psta->hwaddr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); // setting auth algo number val16 = (u16)psta->authalg; if(status != _STATS_SUCCESSFUL_) val16 = 0; if (val16) { val16 = cpu_to_le16(val16); use_shared_key = 1; } pframe = rtw_set_fixed_ie(pframe, _AUTH_ALGM_NUM_, (unsigned char *)&val16, &(pattrib->pktlen)); // setting auth seq number val16 =(u16)psta->auth_seq; val16 = cpu_to_le16(val16); pframe = rtw_set_fixed_ie(pframe, _AUTH_SEQ_NUM_, (unsigned char *)&val16, &(pattrib->pktlen)); // setting status code... val16 = status; val16 = cpu_to_le16(val16); pframe = rtw_set_fixed_ie(pframe, _STATUS_CODE_, (unsigned char *)&val16, &(pattrib->pktlen)); // added challenging text... if ((psta->auth_seq == 2) && (psta->state & WIFI_FW_AUTH_STATE) && (use_shared_key==1)) { pframe = rtw_set_ie(pframe, _CHLGETXT_IE_, 128, psta->chg_txt, &(pattrib->pktlen)); } #endif } else { _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&padapter->eeprompriv), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); // setting auth algo number val16 = (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared)? 1: 0;// 0:OPEN System, 1:Shared key if (val16) { val16 = cpu_to_le16(val16); use_shared_key = 1; } //DBG_871X("%s auth_algo= %s auth_seq=%d\n",__FUNCTION__,(pmlmeinfo->auth_algo==0)?"OPEN":"SHARED",pmlmeinfo->auth_seq); //setting IV for auth seq #3 if ((pmlmeinfo->auth_seq == 3) && (pmlmeinfo->state & WIFI_FW_AUTH_STATE) && (use_shared_key==1)) { //DBG_871X("==> iv(%d),key_index(%d)\n",pmlmeinfo->iv,pmlmeinfo->key_index); val32 = ((pmlmeinfo->iv++) | (pmlmeinfo->key_index << 30)); val32 = cpu_to_le32(val32); pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *)&val32, &(pattrib->pktlen)); pattrib->iv_len = 4; } pframe = rtw_set_fixed_ie(pframe, _AUTH_ALGM_NUM_, (unsigned char *)&val16, &(pattrib->pktlen)); // setting auth seq number val16 = pmlmeinfo->auth_seq; val16 = cpu_to_le16(val16); pframe = rtw_set_fixed_ie(pframe, _AUTH_SEQ_NUM_, (unsigned char *)&val16, &(pattrib->pktlen)); // setting status code... val16 = status; val16 = cpu_to_le16(val16); pframe = rtw_set_fixed_ie(pframe, _STATUS_CODE_, (unsigned char *)&val16, &(pattrib->pktlen)); // then checking to see if sending challenging text... if ((pmlmeinfo->auth_seq == 3) && (pmlmeinfo->state & WIFI_FW_AUTH_STATE) && (use_shared_key==1)) { pframe = rtw_set_ie(pframe, _CHLGETXT_IE_, 128, pmlmeinfo->chg_txt, &(pattrib->pktlen)); SetPrivacy(fctrl); pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->encrypt = _WEP40_; pattrib->icv_len = 4; pattrib->pktlen += pattrib->icv_len; } } pattrib->last_txcmdsz = pattrib->pktlen; rtw_wep_encrypt(padapter, (u8 *)pmgntframe); DBG_871X("%s\n", __FUNCTION__); dump_mgntframe(padapter, pmgntframe); return; } void issue_asocrsp(_adapter *padapter, unsigned short status, struct sta_info *pstat, int pkt_type) { #ifdef CONFIG_AP_MODE struct xmit_frame *pmgntframe; struct rtw_ieee80211_hdr *pwlanhdr; struct pkt_attrib *pattrib; unsigned char *pbuf, *pframe; unsigned short val; unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); u8 *ie = pnetwork->IEs; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &(padapter->wdinfo); #ifdef CONFIG_WFD u32 wfdielen = 0; #endif //CONFIG_WFD #endif //CONFIG_P2P DBG_871X("%s\n", __FUNCTION__); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { return; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy((void *)GetAddr1Ptr(pwlanhdr), pstat->hwaddr, ETH_ALEN); _rtw_memcpy((void *)GetAddr2Ptr(pwlanhdr), myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy((void *)GetAddr3Ptr(pwlanhdr), get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; if ((pkt_type == WIFI_ASSOCRSP) || (pkt_type == WIFI_REASSOCRSP)) SetFrameSubType(pwlanhdr, pkt_type); else return; pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen += pattrib->hdrlen; pframe += pattrib->hdrlen; //capability val = *(unsigned short *)rtw_get_capability_from_ie(ie); pframe = rtw_set_fixed_ie(pframe, _CAPABILITY_ , (unsigned char *)&val, &(pattrib->pktlen)); status = cpu_to_le16(status); pframe = rtw_set_fixed_ie(pframe , _STATUS_CODE_ , (unsigned char *)&status, &(pattrib->pktlen)); val = cpu_to_le16(pstat->aid | BIT(14) | BIT(15)); pframe = rtw_set_fixed_ie(pframe, _ASOC_ID_ , (unsigned char *)&val, &(pattrib->pktlen)); if (pstat->bssratelen <= 8) { pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, pstat->bssratelen, pstat->bssrateset, &(pattrib->pktlen)); } else { pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pstat->bssrateset, &(pattrib->pktlen)); pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (pstat->bssratelen-8), pstat->bssrateset+8, &(pattrib->pktlen)); } #ifdef CONFIG_80211N_HT if ((pstat->flags & WLAN_STA_HT) && (pmlmepriv->htpriv.ht_option)) { uint ie_len=0; //FILL HT CAP INFO IE //p = hostapd_eid_ht_capabilities_info(hapd, p); pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); if(pbuf && ie_len>0) { _rtw_memcpy(pframe, pbuf, ie_len+2); pframe += (ie_len+2); pattrib->pktlen +=(ie_len+2); } //FILL HT ADD INFO IE //p = hostapd_eid_ht_operation(hapd, p); pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); if(pbuf && ie_len>0) { _rtw_memcpy(pframe, pbuf, ie_len+2); pframe += (ie_len+2); pattrib->pktlen +=(ie_len+2); } } #endif #ifdef CONFIG_80211AC_VHT if ((pstat->flags & WLAN_STA_VHT) && (pmlmepriv->vhtpriv.vht_option)) { u32 ie_len=0; //FILL VHT CAP IE pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, EID_VHTCapability, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); if(pbuf && ie_len>0) { _rtw_memcpy(pframe, pbuf, ie_len+2); pframe += (ie_len+2); pattrib->pktlen +=(ie_len+2); } //FILL VHT OPERATION IE pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, EID_VHTOperation, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); if(pbuf && ie_len>0) { _rtw_memcpy(pframe, pbuf, ie_len+2); pframe += (ie_len+2); pattrib->pktlen +=(ie_len+2); } } #endif //CONFIG_80211AC_VHT //FILL WMM IE if ((pstat->flags & WLAN_STA_WME) && (pmlmepriv->qospriv.qos_option)) { uint ie_len=0; unsigned char WMM_PARA_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; for (pbuf = ie + _BEACON_IE_OFFSET_; ;pbuf+= (ie_len + 2)) { pbuf = rtw_get_ie(pbuf, _VENDOR_SPECIFIC_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); if(pbuf && _rtw_memcmp(pbuf+2, WMM_PARA_IE, 6)) { _rtw_memcpy(pframe, pbuf, ie_len+2); pframe += (ie_len+2); pattrib->pktlen +=(ie_len+2); break; } if ((pbuf == NULL) || (ie_len == 0)) { break; } } } if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_REALTEK) { pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 6 , REALTEK_96B_IE, &(pattrib->pktlen)); } //add WPS IE ie for wps 2.0 if(pmlmepriv->wps_assoc_resp_ie && pmlmepriv->wps_assoc_resp_ie_len>0) { _rtw_memcpy(pframe, pmlmepriv->wps_assoc_resp_ie, pmlmepriv->wps_assoc_resp_ie_len); pframe += pmlmepriv->wps_assoc_resp_ie_len; pattrib->pktlen += pmlmepriv->wps_assoc_resp_ie_len; } #ifdef CONFIG_P2P if( padapter->wdinfo.driver_interface == DRIVER_WEXT ) { if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) && (pstat->is_p2p_device == _TRUE)) { u32 len; len = build_assoc_resp_p2p_ie(pwdinfo, pframe, pstat->p2p_status_code); pframe += len; pattrib->pktlen += len; } } #ifdef CONFIG_WFD if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) #ifdef CONFIG_IOCTL_CFG80211 && (_TRUE == pwdinfo->wfd_info->wfd_enable) #endif //CONFIG_IOCTL_CFG80211 ) { wfdielen = build_assoc_resp_wfd_ie(pwdinfo, pframe); pframe += wfdielen; pattrib->pktlen += wfdielen; } #endif //CONFIG_WFD #endif //CONFIG_P2P pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); #endif } void issue_assocreq(_adapter *padapter) { int ret = _FAIL; struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe, *p; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; unsigned short val16; unsigned int i, j, ie_len, index=0; unsigned char rf_type, bssrate[NumRates], sta_bssrate[NumRates]; PNDIS_802_11_VARIABLE_IEs pIE; struct registry_priv *pregpriv = &padapter->registrypriv; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); int bssrate_len = 0, sta_bssrate_len = 0; u8 vs_ie_length = 0; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &(padapter->wdinfo); u8 p2pie[ 255 ] = { 0x00 }; u16 p2pielen = 0; #ifdef CONFIG_WFD u32 wfdielen = 0; #endif //CONFIG_WFD #endif //CONFIG_P2P #ifdef CONFIG_DFS u16 cap; /* Dot H */ u8 pow_cap_ele[2] = { 0x00 }; u8 sup_ch[ 30 * 2 ] = {0x00 }, sup_ch_idx = 0, idx_5g = 2; //For supported channel #endif //CONFIG_DFS if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) goto exit; //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_ASSOCREQ); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); //caps #ifdef CONFIG_DFS _rtw_memcpy(&cap, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); cap |= cap_SpecMgmt; _rtw_memcpy(pframe, &cap, 2); #else _rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); #endif //CONFIG_DFS pframe += 2; pattrib->pktlen += 2; //listen interval //todo: listen interval for power saving val16 = cpu_to_le16(3); _rtw_memcpy(pframe ,(unsigned char *)&val16, 2); pframe += 2; pattrib->pktlen += 2; //SSID pframe = rtw_set_ie(pframe, _SSID_IE_, pmlmeinfo->network.Ssid.SsidLength, pmlmeinfo->network.Ssid.Ssid, &(pattrib->pktlen)); #ifdef CONFIG_DFS /* Dot H */ if(pmlmeext->cur_channel > 14) { pow_cap_ele[0] = 13; // Minimum transmit power capability pow_cap_ele[1] = 21; // Maximum transmit power capability pframe = rtw_set_ie(pframe, EID_PowerCap, 2, pow_cap_ele, &(pattrib->pktlen)); //supported channels do{ if( pmlmeext->channel_set[sup_ch_idx].ChannelNum <= 14 ) { sup_ch[0] = 1; //First channel number sup_ch[1] = pmlmeext->channel_set[sup_ch_idx].ChannelNum; //Number of channel } else { sup_ch[idx_5g++] = pmlmeext->channel_set[sup_ch_idx].ChannelNum; sup_ch[idx_5g++] = 1; } sup_ch_idx++; } while( pmlmeext->channel_set[sup_ch_idx].ChannelNum != 0 ); pframe = rtw_set_ie(pframe, EID_SupportedChannels, idx_5g, sup_ch, &(pattrib->pktlen)); } #endif //CONFIG_DFS //supported rate & extended supported rate #if 1 // Check if the AP's supported rates are also supported by STA. get_rate_set(padapter, sta_bssrate, &sta_bssrate_len); //DBG_871X("sta_bssrate_len=%d\n", sta_bssrate_len); if(pmlmeext->cur_channel == 14)// for JAPAN, channel 14 can only uses B Mode(CCK) { sta_bssrate_len = 4; } //for (i = 0; i < sta_bssrate_len; i++) { // DBG_871X("sta_bssrate[%d]=%02X\n", i, sta_bssrate[i]); //} for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) { if (pmlmeinfo->network.SupportedRates[i] == 0) break; DBG_871X("network.SupportedRates[%d]=%02X\n", i, pmlmeinfo->network.SupportedRates[i]); } for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) { if (pmlmeinfo->network.SupportedRates[i] == 0) break; // Check if the AP's supported rates are also supported by STA. for (j=0; j < sta_bssrate_len; j++) { // Avoid the proprietary data rate (22Mbps) of Handlink WSG-4000 AP if ( (pmlmeinfo->network.SupportedRates[i]|IEEE80211_BASIC_RATE_MASK) == (sta_bssrate[j]|IEEE80211_BASIC_RATE_MASK)) { //DBG_871X("match i = %d, j=%d\n", i, j); break; } else { //DBG_871X("not match: %02X != %02X\n", (pmlmeinfo->network.SupportedRates[i]|IEEE80211_BASIC_RATE_MASK), (sta_bssrate[j]|IEEE80211_BASIC_RATE_MASK)); } } if (j == sta_bssrate_len) { // the rate is not supported by STA DBG_871X("%s(): the rate[%d]=%02X is not supported by STA!\n",__FUNCTION__, i, pmlmeinfo->network.SupportedRates[i]); } else { // the rate is supported by STA bssrate[index++] = pmlmeinfo->network.SupportedRates[i]; } } bssrate_len = index; DBG_871X("bssrate_len = %d\n", bssrate_len); #else // Check if the AP's supported rates are also supported by STA. #if 0 get_rate_set(padapter, bssrate, &bssrate_len); #else for (bssrate_len = 0; bssrate_len < NumRates; bssrate_len++) { if (pmlmeinfo->network.SupportedRates[bssrate_len] == 0) break; if (pmlmeinfo->network.SupportedRates[bssrate_len] == 0x2C) // Avoid the proprietary data rate (22Mbps) of Handlink WSG-4000 AP break; bssrate[bssrate_len] = pmlmeinfo->network.SupportedRates[bssrate_len]; } #endif #endif // Check if the AP's supported rates are also supported by STA. if (bssrate_len == 0) { rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); rtw_free_xmitframe(pxmitpriv, pmgntframe); goto exit; //don't connect to AP if no joint supported rate } if (bssrate_len > 8) { pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); } else { pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); } //vendor specific IE, such as WPA, WMM, WPS for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pmlmeinfo->network.IELength;) { pIE = (PNDIS_802_11_VARIABLE_IEs)(pmlmeinfo->network.IEs + i); switch (pIE->ElementID) { case _VENDOR_SPECIFIC_IE_: if ((_rtw_memcmp(pIE->data, RTW_WPA_OUI, 4)) || (_rtw_memcmp(pIE->data, WMM_OUI, 4)) || (_rtw_memcmp(pIE->data, WPS_OUI, 4))) { vs_ie_length = pIE->Length; if((!padapter->registrypriv.wifi_spec) && (_rtw_memcmp(pIE->data, WPS_OUI, 4))) { //Commented by Kurt 20110629 //In some older APs, WPS handshake //would be fail if we append vender extensions informations to AP vs_ie_length = 14; } pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, vs_ie_length, pIE->data, &(pattrib->pktlen)); } break; case EID_WPA2: pframe = rtw_set_ie(pframe, EID_WPA2, pIE->Length, pIE->data, &(pattrib->pktlen)); break; #ifdef CONFIG_80211N_HT case EID_HTCapability: if(padapter->mlmepriv.htpriv.ht_option==_TRUE) { if (!(is_ap_in_tkip(padapter))) { _rtw_memcpy(&(pmlmeinfo->HT_caps), pIE->data, sizeof(struct HT_caps_element)); pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info = cpu_to_le16(pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info); pframe = rtw_set_ie(pframe, EID_HTCapability, pIE->Length , (u8 *)(&(pmlmeinfo->HT_caps)), &(pattrib->pktlen)); } } break; case EID_EXTCapability: if(padapter->mlmepriv.htpriv.ht_option==_TRUE) { pframe = rtw_set_ie(pframe, EID_EXTCapability, pIE->Length, pIE->data, &(pattrib->pktlen)); } break; #endif //CONFIG_80211N_HT #ifdef CONFIG_80211AC_VHT case EID_VHTCapability: if (padapter->mlmepriv.vhtpriv.vht_option ==_TRUE) { pframe = rtw_set_ie(pframe, EID_VHTCapability, pIE->Length, pIE->data, &(pattrib->pktlen)); } break; case EID_OpModeNotification: if (padapter->mlmepriv.vhtpriv.vht_option ==_TRUE) { pframe = rtw_set_ie(pframe, EID_OpModeNotification, pIE->Length, pIE->data, &(pattrib->pktlen)); } break; #endif // CONFIG_80211AC_VHT default: break; } i += (pIE->Length + 2); } if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_REALTEK) { pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 6 , REALTEK_96B_IE, &(pattrib->pktlen)); } #ifdef CONFIG_WAPI_SUPPORT rtw_build_assoc_req_wapi_ie(padapter, pframe, pattrib); #endif #ifdef CONFIG_P2P #ifdef CONFIG_IOCTL_CFG80211 if(adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211 ) { if(pmlmepriv->p2p_assoc_req_ie && pmlmepriv->p2p_assoc_req_ie_len>0) { _rtw_memcpy(pframe, pmlmepriv->p2p_assoc_req_ie, pmlmepriv->p2p_assoc_req_ie_len); pframe += pmlmepriv->p2p_assoc_req_ie_len; pattrib->pktlen += pmlmepriv->p2p_assoc_req_ie_len; } } else #endif //CONFIG_IOCTL_CFG80211 { if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) { // Should add the P2P IE in the association request frame. // P2P OUI p2pielen = 0; p2pie[ p2pielen++ ] = 0x50; p2pie[ p2pielen++ ] = 0x6F; p2pie[ p2pielen++ ] = 0x9A; p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 // Commented by Albert 20101109 // According to the P2P Specification, the association request frame should contain 3 P2P attributes // 1. P2P Capability // 2. Extended Listen Timing // 3. Device Info // Commented by Albert 20110516 // 4. P2P Interface // P2P Capability // Type: p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); p2pielen += 2; // Value: // Device Capability Bitmap, 1 byte p2pie[ p2pielen++ ] = DMP_P2P_DEVCAP_SUPPORT; // Group Capability Bitmap, 1 byte if ( pwdinfo->persistent_supported ) p2pie[ p2pielen++ ] = P2P_GRPCAP_PERSISTENT_GROUP | DMP_P2P_GRPCAP_SUPPORT; else p2pie[ p2pielen++ ] = DMP_P2P_GRPCAP_SUPPORT; // Extended Listen Timing // Type: p2pie[ p2pielen++ ] = P2P_ATTR_EX_LISTEN_TIMING; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 ); p2pielen += 2; // Value: // Availability Period *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); p2pielen += 2; // Availability Interval *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); p2pielen += 2; // Device Info // Type: p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; // Length: // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); p2pielen += 2; // Value: // P2P Device Address _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); p2pielen += ETH_ALEN; // Config Method // This field should be big endian. Noted by P2P specification. if ( ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PEER_DISPLAY_PIN ) || ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_SELF_DISPLAY_PIN ) ) { *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_DISPLAY ); } else { *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_PBC ); } p2pielen += 2; // Primary Device Type // Category ID *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); p2pielen += 2; // OUI *(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); p2pielen += 4; // Sub Category ID *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); p2pielen += 2; // Number of Secondary Device Types p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List // Device Name // Type: *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); p2pielen += 2; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); p2pielen += 2; // Value: _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len ); p2pielen += pwdinfo->device_name_len; // P2P Interface // Type: p2pie[ p2pielen++ ] = P2P_ATTR_INTERFACE; // Length: *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x000D ); p2pielen += 2; // Value: _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN ); // P2P Device Address p2pielen += ETH_ALEN; p2pie[ p2pielen++ ] = 1; // P2P Interface Address Count _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN ); // P2P Interface Address List p2pielen += ETH_ALEN; pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); #ifdef CONFIG_WFD //wfdielen = build_assoc_req_wfd_ie(pwdinfo, pframe); //pframe += wfdielen; //pattrib->pktlen += wfdielen; #endif //CONFIG_WFD } } #endif //CONFIG_P2P #ifdef CONFIG_WFD #ifdef CONFIG_IOCTL_CFG80211 if ( _TRUE == pwdinfo->wfd_info->wfd_enable ) #endif //CONFIG_IOCTL_CFG80211 { wfdielen = build_assoc_req_wfd_ie(pwdinfo, pframe); pframe += wfdielen; pattrib->pktlen += wfdielen; } #ifdef CONFIG_IOCTL_CFG80211 else if (pmlmepriv->wfd_assoc_req_ie != NULL && pmlmepriv->wfd_assoc_req_ie_len>0) { //WFD IE _rtw_memcpy(pframe, pmlmepriv->wfd_assoc_req_ie, pmlmepriv->wfd_assoc_req_ie_len); pattrib->pktlen += pmlmepriv->wfd_assoc_req_ie_len; pframe += pmlmepriv->wfd_assoc_req_ie_len; } #endif //CONFIG_IOCTL_CFG80211 #endif //CONFIG_WFD pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; exit: if (ret == _SUCCESS) rtw_buf_update(&pmlmepriv->assoc_req, &pmlmepriv->assoc_req_len, (u8 *)pwlanhdr, pattrib->pktlen); else rtw_buf_free(&pmlmepriv->assoc_req, &pmlmepriv->assoc_req_len); return; } //when wait_ack is ture, this function shoule be called at process context static int _issue_nulldata(_adapter *padapter, unsigned char *da, unsigned int power_mode, int wait_ack) { int ret = _FAIL; struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; struct xmit_priv *pxmitpriv; struct mlme_ext_priv *pmlmeext; struct mlme_ext_info *pmlmeinfo; //DBG_871X("%s:%d\n", __FUNCTION__, power_mode); if(!padapter) goto exit; pxmitpriv = &(padapter->xmitpriv); pmlmeext = &(padapter->mlmeextpriv); pmlmeinfo = &(pmlmeext->mlmext_info); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto exit; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); pattrib->retry_ctrl = _FALSE; _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { SetFrDs(fctrl); } else if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) { SetToDs(fctrl); } if (power_mode) { SetPwrMgt(fctrl); } _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_DATA_NULL); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->last_txcmdsz = pattrib->pktlen; if(wait_ack) { ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); } else { dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; } exit: return ret; } /* * [IMPORTANT] Don't call this function in interrupt context * * When wait_ms > 0, this function shoule be called at process context * da == NULL for station mode */ int issue_nulldata(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms) { int ret; int i = 0; u32 start = rtw_get_current_time(); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct sta_info *psta; /* da == NULL, assum it's null data for sta to ap*/ if (da == NULL) da = get_my_bssid(&(pmlmeinfo->network)); psta = rtw_get_stainfo(&padapter->stapriv, da); if (psta) { if (power_mode) rtw_hal_macid_sleep(padapter, psta->mac_id); else rtw_hal_macid_wakeup(padapter, psta->mac_id); } else { DBG_871X(FUNC_ADPT_FMT ": Can't find sta info for " MAC_FMT ", skip macid %s!!\n", FUNC_ADPT_ARG(padapter), MAC_ARG(da), power_mode?"sleep":"wakeup"); rtw_warn_on(1); } do { ret = _issue_nulldata(padapter, da, power_mode, wait_ms>0?_TRUE:_FALSE); i++; if (padapter->bDriverStopped || padapter->bSurpriseRemoved) break; if(i < try_cnt && wait_ms > 0 && ret==_FAIL) rtw_msleep_os(wait_ms); }while((imlmeextpriv; pmlmeinfo = &pmlmeext->mlmext_info; /* da == NULL, assum it's null data for sta to ap*/ if (da == NULL) da = get_my_bssid(&(pmlmeinfo->network)); ret = _issue_nulldata(padapter, da, 0, _FALSE); return ret; } //when wait_ack is ture, this function shoule be called at process context static int _issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, int wait_ack) { int ret = _FAIL; struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl, *qc; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); DBG_871X("%s\n", __FUNCTION__); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto exit; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); pattrib->hdrlen +=2; pattrib->qos_en = _TRUE; pattrib->eosp = 1; pattrib->ack_policy = 0; pattrib->mdata = 0; _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { SetFrDs(fctrl); } else if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) { SetToDs(fctrl); } if(pattrib->mdata) SetMData(fctrl); qc = (unsigned short *)(pframe + pattrib->hdrlen - 2); SetPriority(qc, tid); SetEOSP(qc, pattrib->eosp); SetAckpolicy(qc, pattrib->ack_policy); _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_QOS_DATA_NULL); pframe += sizeof(struct rtw_ieee80211_hdr_3addr_qos); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos); pattrib->last_txcmdsz = pattrib->pktlen; if(wait_ack) { ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); } else { dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; } exit: return ret; } //when wait_ms >0 , this function shoule be called at process context //da == NULL for station mode int issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, int try_cnt, int wait_ms) { int ret; int i = 0; u32 start = rtw_get_current_time(); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); /* da == NULL, assum it's null data for sta to ap*/ if (da == NULL) da = get_my_bssid(&(pmlmeinfo->network)); do { ret = _issue_qos_nulldata(padapter, da, tid, wait_ms>0?_TRUE:_FALSE); i++; if (padapter->bDriverStopped || padapter->bSurpriseRemoved) break; if(i < try_cnt && wait_ms > 0 && ret==_FAIL) rtw_msleep_os(wait_ms); }while((ixmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); int ret = _FAIL; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo= &(padapter->wdinfo); #endif //CONFIG_P2P //DBG_871X("%s to "MAC_FMT"\n", __func__, MAC_ARG(da)); #ifdef CONFIG_P2P if ( !( rtw_p2p_chk_state( pwdinfo, P2P_STATE_NONE ) ) && ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) ) { _cancel_timer_ex( &pwdinfo->reset_ch_sitesurvey ); _set_timer( &pwdinfo->reset_ch_sitesurvey, 10 ); } #endif //CONFIG_P2P if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto exit; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); pattrib->retry_ctrl = _FALSE; _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_DEAUTH); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); reason = cpu_to_le16(reason); pframe = rtw_set_fixed_ie(pframe, _RSON_CODE_ , (unsigned char *)&reason, &(pattrib->pktlen)); pattrib->last_txcmdsz = pattrib->pktlen; if(wait_ack) { ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); } else { dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; } exit: return ret; } int issue_deauth(_adapter *padapter, unsigned char *da, unsigned short reason) { DBG_871X("%s to "MAC_FMT"\n", __func__, MAC_ARG(da)); return _issue_deauth(padapter, da, reason, _FALSE); } int issue_deauth_ex(_adapter *padapter, u8 *da, unsigned short reason, int try_cnt, int wait_ms) { int ret; int i = 0; u32 start = rtw_get_current_time(); do { ret = _issue_deauth(padapter, da, reason, wait_ms>0?_TRUE:_FALSE); i++; if (padapter->bDriverStopped || padapter->bSurpriseRemoved) break; if(i < try_cnt && wait_ms > 0 && ret==_FAIL) rtw_msleep_os(wait_ms); }while((ixmitpriv); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); DBG_871X(FUNC_NDEV_FMT" ra="MAC_FMT", ch:%u, offset:%u\n", FUNC_NDEV_ARG(padapter->pnetdev), MAC_ARG(ra), new_ch, ch_offset); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) return; //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); /* RA */ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); /* TA */ _rtw_memcpy(pwlanhdr->addr3, ra, ETH_ALEN); /* DA = RA */ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_ACTION); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); /* category, action */ { u8 category, action; category = RTW_WLAN_CATEGORY_SPECTRUM_MGMT; action = RTW_WLAN_ACTION_SPCT_CHL_SWITCH; pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); } pframe = rtw_set_ie_ch_switch(pframe, &(pattrib->pktlen), 0, new_ch, 0); pframe = rtw_set_ie_secondary_ch_offset(pframe, &(pattrib->pktlen), hal_ch_offset_to_secondary_ch_offset(ch_offset)); pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); } #ifdef CONFIG_IEEE80211W void issue_action_SA_Query(_adapter *padapter, unsigned char *raddr, unsigned char action, unsigned short tid) { u8 category = RTW_WLAN_CATEGORY_SA_QUERY; u16 reason_code; struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; u8 *pframe; struct rtw_ieee80211_hdr *pwlanhdr; u16 *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct sta_info *psta; struct sta_priv *pstapriv = &padapter->stapriv; struct registry_priv *pregpriv = &padapter->registrypriv; DBG_871X("%s\n", __FUNCTION__); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { DBG_871X("%s: alloc_mgtxmitframe fail\n", __FUNCTION__); return; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; if(raddr) _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); else _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_ACTION); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); pframe = rtw_set_fixed_ie(pframe, 1, &category, &pattrib->pktlen); pframe = rtw_set_fixed_ie(pframe, 1, &action, &pattrib->pktlen); switch (action) { case 0: //SA Query req pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)&pmlmeext->sa_query_seq, &pattrib->pktlen); pmlmeext->sa_query_seq++; //send sa query request to AP, AP should reply sa query response in 1 second set_sa_query_timer(pmlmeext, 1000); break; case 1: //SA Query rsp tid = cpu_to_le16(tid); pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)&tid, &pattrib->pktlen); break; default: break; } pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); } #endif //CONFIG_IEEE80211W void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char action, unsigned short status) { u8 category = RTW_WLAN_CATEGORY_BACK; u16 start_seq; u16 BA_para_set; u16 reason_code; u16 BA_timeout_value; u16 BA_starting_seqctrl; HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor; u8 ba_rxbuf_sz; struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; u8 *pframe; struct rtw_ieee80211_hdr *pwlanhdr; u16 *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct sta_info *psta; struct sta_priv *pstapriv = &padapter->stapriv; struct registry_priv *pregpriv = &padapter->registrypriv; #ifdef CONFIG_80211N_HT if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { return; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; //_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_ACTION); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); status = cpu_to_le16(status); if (category == 3) { switch (action) { case 0: //ADDBA req do { pmlmeinfo->dialogToken++; } while (pmlmeinfo->dialogToken == 0); pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->dialogToken), &(pattrib->pktlen)); #if defined(CONFIG_RTL8188E) && defined(CONFIG_SDIO_HCI) BA_para_set = (0x0802 | ((status & 0xf) << 2)); //immediate ack & 16 buffer size #else BA_para_set = (0x1002 | ((status & 0xf) << 2)); //immediate ack & 64 buffer size #endif BA_para_set = cpu_to_le16(BA_para_set); pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen)); //BA_timeout_value = 0xffff;//max: 65535 TUs(~ 65 ms) BA_timeout_value = 5000;//~ 5ms BA_timeout_value = cpu_to_le16(BA_timeout_value); pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_timeout_value)), &(pattrib->pktlen)); //if ((psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress)) != NULL) if ((psta = rtw_get_stainfo(pstapriv, raddr)) != NULL) { start_seq = (psta->sta_xmitpriv.txseq_tid[status & 0x07]&0xfff) + 1; DBG_871X("BA_starting_seqctrl = %d for TID=%d\n", start_seq, status & 0x07); psta->BA_starting_seqctrl[status & 0x07] = start_seq; BA_starting_seqctrl = start_seq << 4; } BA_starting_seqctrl = cpu_to_le16(BA_starting_seqctrl); pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_starting_seqctrl)), &(pattrib->pktlen)); DBG_871X("%s, category=%d, action=%d, status=%d\n", __FUNCTION__, category, action, status); break; case 1: //ADDBA rsp pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->ADDBA_req.dialog_token), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&status), &(pattrib->pktlen)); BA_para_set = le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set); if(padapter->driver_rx_ampdu_factor != 0xFF) max_rx_ampdu_factor = (HT_CAP_AMPDU_FACTOR)padapter->driver_rx_ampdu_factor; else rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); if(MAX_AMPDU_FACTOR_64K == max_rx_ampdu_factor) ba_rxbuf_sz = 64; else if(MAX_AMPDU_FACTOR_32K == max_rx_ampdu_factor) ba_rxbuf_sz = 32; else if(MAX_AMPDU_FACTOR_16K == max_rx_ampdu_factor) ba_rxbuf_sz = 16; else if(MAX_AMPDU_FACTOR_8K == max_rx_ampdu_factor) ba_rxbuf_sz = 8; else ba_rxbuf_sz = 64; #ifdef CONFIG_BT_COEXIST if (rtw_btcoex_IsBTCoexCtrlAMPDUSize(padapter) == _TRUE) ba_rxbuf_sz = rtw_btcoex_GetAMPDUSize(padapter); #endif if (padapter->fix_ba_rxbuf_bz != 0xFF) ba_rxbuf_sz = padapter->fix_ba_rxbuf_bz; if (ba_rxbuf_sz > 127) ba_rxbuf_sz = 127; BA_para_set &= ~RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK; BA_para_set |= (ba_rxbuf_sz << 6) & RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK; if (!padapter->registrypriv.wifi_spec) { if(pregpriv->ampdu_amsdu==0)//disabled BA_para_set &= ~BIT(0); else if(pregpriv->ampdu_amsdu==1)//enabled BA_para_set |= BIT(0); } BA_para_set = cpu_to_le16(BA_para_set); pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(pmlmeinfo->ADDBA_req.BA_timeout_value)), &(pattrib->pktlen)); DBG_871X("%s, category=%d, action=%d, status=%d, rxbuf_sz=%u\n", __FUNCTION__, category, action, status, ba_rxbuf_sz); break; case 2://DELBA BA_para_set = (status & 0x1F) << 3; BA_para_set = cpu_to_le16(BA_para_set); pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen)); reason_code = 37;//Requested from peer STA as it does not want to use the mechanism reason_code = cpu_to_le16(reason_code); pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(reason_code)), &(pattrib->pktlen)); DBG_871X("%s, category=%d, action=%d, status=%d\n", __FUNCTION__, category, action, status); break; default: break; } } pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); #endif //CONFIG_80211N_HT } static void issue_action_BSSCoexistPacket(_adapter *padapter) { _irqL irqL; _list *plist, *phead; unsigned char category, action; struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; struct wlan_network *pnetwork = NULL; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); _queue *queue = &(pmlmepriv->scanned_queue); u8 InfoContent[16] = {0}; u8 ICS[8][15]; #ifdef CONFIG_80211N_HT if((pmlmepriv->num_FortyMHzIntolerant==0) || (pmlmepriv->num_sta_no_ht==0)) return; if(_TRUE == pmlmeinfo->bwmode_updated) return; DBG_871X("%s\n", __FUNCTION__); category = RTW_WLAN_CATEGORY_PUBLIC; action = ACT_PUBLIC_BSSCOEXIST; if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { return; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_ACTION); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); // if(pmlmepriv->num_FortyMHzIntolerant>0) { u8 iedata=0; iedata |= BIT(2);//20 MHz BSS Width Request pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); } // _rtw_memset(ICS, 0, sizeof(ICS)); if(pmlmepriv->num_sta_no_ht>0) { int i; _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); phead = get_list_head(queue); plist = get_next(phead); while(1) { int len; u8 *p; WLAN_BSSID_EX *pbss_network; if (rtw_end_of_queue_search(phead,plist)== _TRUE) break; pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); plist = get_next(plist); pbss_network = (WLAN_BSSID_EX *)&pnetwork->network; p = rtw_get_ie(pbss_network->IEs + _FIXED_IE_LENGTH_, _HT_CAPABILITY_IE_, &len, pbss_network->IELength - _FIXED_IE_LENGTH_); if((p==NULL) || (len==0))//non-HT { if((pbss_network->Configuration.DSConfig<=0) || (pbss_network->Configuration.DSConfig>14)) continue; ICS[0][pbss_network->Configuration.DSConfig]=1; if(ICS[0][0] == 0) ICS[0][0] = 1; } } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); for(i= 0;i<8;i++) { if(ICS[i][0] == 1) { int j, k = 0; InfoContent[k] = i; //SET_BSS_INTOLERANT_ELE_REG_CLASS(InfoContent,i); k++; for(j=1;j<=14;j++) { if(ICS[i][j]==1) { if(k<16) { InfoContent[k] = j; //channel number //SET_BSS_INTOLERANT_ELE_CHANNEL(InfoContent+k, j); k++; } } } pframe = rtw_set_ie(pframe, EID_BSSIntolerantChlReport, k, InfoContent, &(pattrib->pktlen)); } } } pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); #endif //CONFIG_80211N_HT } // Spatial Multiplexing Powersave (SMPS) action frame int _issue_action_SM_PS(_adapter *padapter , unsigned char *raddr , u8 NewMimoPsMode , u8 wait_ack) { int ret=0; unsigned char category = RTW_WLAN_CATEGORY_HT; u8 action = RTW_WLAN_ACTION_HT_SM_PS; u8 sm_power_control=0; struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct wifidirect_info *pwdinfo = &( padapter->wdinfo); if(NewMimoPsMode==WLAN_HT_CAP_SM_PS_DISABLED) { sm_power_control = sm_power_control & ~(BIT(0)); // SM Power Save Enable = 0 SM Power Save Disable } else if(NewMimoPsMode==WLAN_HT_CAP_SM_PS_STATIC) { sm_power_control = sm_power_control | BIT(0); // SM Power Save Enable = 1 SM Power Save Enable sm_power_control = sm_power_control & ~(BIT(1)); // SM Mode = 0 Static Mode } else if(NewMimoPsMode==WLAN_HT_CAP_SM_PS_DYNAMIC) { sm_power_control = sm_power_control | BIT(0); // SM Power Save Enable = 1 SM Power Save Enable sm_power_control = sm_power_control | BIT(1); // SM Mode = 1 Dynamic Mode } else return ret; DBG_871X("%s, sm_power_control=%u, NewMimoPsMode=%u\n", __FUNCTION__ , sm_power_control , NewMimoPsMode ); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) return ret; //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); /* RA */ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); /* TA */ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); /* DA = RA */ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_ACTION); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); /* category, action */ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(sm_power_control), &(pattrib->pktlen)); pattrib->last_txcmdsz = pattrib->pktlen; if(wait_ack) { ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); } else { dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; } if (ret != _SUCCESS) DBG_8192C("%s, ack to\n", __func__); return ret; } int issue_action_SM_PS_wait_ack(_adapter *padapter, unsigned char *raddr, u8 NewMimoPsMode, int try_cnt, int wait_ms) { int ret = 0; int i = 0; u32 start = rtw_get_current_time(); do { ret = _issue_action_SM_PS(padapter, raddr, NewMimoPsMode , wait_ms>0?_TRUE:_FALSE ); i++; if (padapter->bDriverStopped || padapter->bSurpriseRemoved) break; if(i < try_cnt && wait_ms > 0 && ret==_FAIL) rtw_msleep_os(wait_ms); }while((istapriv; struct sta_info *psta = NULL; //struct recv_reorder_ctrl *preorder_ctrl; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u16 tid; if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) if (!(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) return _SUCCESS; psta = rtw_get_stainfo(pstapriv, addr); if(psta==NULL) return _SUCCESS; //DBG_871X("%s:%s\n", __FUNCTION__, (initiator==0)?"RX_DIR":"TX_DIR"); if(initiator==0) // recipient { for(tid = 0;tidrecvreorder_ctrl[tid].enable == _TRUE) { DBG_871X("rx agg disable tid(%d)\n",tid); issue_action_BA(padapter, addr, RTW_WLAN_ACTION_DELBA, (((tid <<1) |initiator)&0x1F)); psta->recvreorder_ctrl[tid].enable = _FALSE; psta->recvreorder_ctrl[tid].indicate_seq = 0xffff; #ifdef DBG_RX_SEQ DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, psta->recvreorder_ctrl[tid].indicate_seq); #endif } } } else if(initiator == 1)// originator { #ifdef CONFIG_80211N_HT //DBG_871X("tx agg_enable_bitmap(0x%08x)\n", psta->htpriv.agg_enable_bitmap); for(tid = 0;tidhtpriv.agg_enable_bitmap & BIT(tid)) { DBG_871X("tx agg disable tid(%d)\n",tid); issue_action_BA(padapter, addr, RTW_WLAN_ACTION_DELBA, (((tid <<1) |initiator)&0x1F) ); psta->htpriv.agg_enable_bitmap &= ~BIT(tid); psta->htpriv.candidate_tid_bitmap &= ~BIT(tid); } } #endif //CONFIG_80211N_HT } return _SUCCESS; } unsigned int send_beacon(_adapter *padapter) { u8 bxmitok = _FALSE; int issue=0; int poll = 0; //#ifdef CONFIG_CONCURRENT_MODE //struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); //struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); //_adapter *pbuddy_adapter = padapter->pbuddy_adapter; //struct mlme_priv *pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); //#endif #ifdef CONFIG_PCI_HCI //DBG_871X("%s\n", __FUNCTION__); issue_beacon(padapter, 0); return _SUCCESS; #endif #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) u32 start = rtw_get_current_time(); rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); rtw_hal_set_hwreg(padapter, HW_VAR_DL_BCN_SEL, NULL); do{ issue_beacon(padapter, 100); issue++; do { rtw_yield_os(); rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8 *)(&bxmitok)); poll++; }while((poll%10)!=0 && _FALSE == bxmitok && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); }while(_FALSE == bxmitok && issue<100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); if(padapter->bSurpriseRemoved || padapter->bDriverStopped) { return _FAIL; } if(_FALSE == bxmitok) { DBG_871X("%s fail! %u ms\n", __FUNCTION__, rtw_get_passing_time_ms(start)); return _FAIL; } else { u32 passing_time = rtw_get_passing_time_ms(start); if(passing_time > 100 || issue > 3) DBG_871X("%s success, issue:%d, poll:%d, %u ms\n", __FUNCTION__, issue, poll, rtw_get_passing_time_ms(start)); //else // DBG_871X("%s success, issue:%d, poll:%d, %u ms\n", __FUNCTION__, issue, poll, rtw_get_passing_time_ms(start)); return _SUCCESS; } #endif } /**************************************************************************** Following are some utitity fuctions for WiFi MLME *****************************************************************************/ BOOLEAN IsLegal5GChannel( IN PADAPTER Adapter, IN u8 channel) { int i=0; u8 Channel_5G[45] = {36,38,40,42,44,46,48,50,52,54,56,58, 60,62,64,100,102,104,106,108,110,112,114,116,118,120,122, 124,126,128,130,132,134,136,138,140,149,151,153,155,157,159, 161,163,165}; for(i=0;imlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u32 initialgain = 0; u32 channel_scan_time_ms = 0,val32 = 0; #ifdef CONFIG_P2P #ifdef CONFIG_CONCURRENT_MODE #if defined(CONFIG_STA_MODE_SCAN_UNDER_AP_MODE) || defined(CONFIG_ATMEL_RC_PATCH) u8 stay_buddy_ch = 0; #endif struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; #endif //CONFIG_CONCURRENT_MODE struct wifidirect_info *pwdinfo= &(padapter->wdinfo); static unsigned char prev_survey_channel = 0; static unsigned int p2p_scan_count = 0; if ( ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) || ( pwdinfo->p2p_info.scan_op_ch_only ) ) { if ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) { survey_channel = pwdinfo->rx_invitereq_info.operation_ch[pmlmeext->sitesurvey_res.channel_idx]; } else { survey_channel = pwdinfo->p2p_info.operation_ch[pmlmeext->sitesurvey_res.channel_idx]; } ScanType = SCAN_ACTIVE; } else if(rtw_p2p_findphase_ex_is_social(pwdinfo)) { // Commented by Albert 2011/06/03 // The driver is in the find phase, it should go through the social channel. int ch_set_idx; survey_channel = pwdinfo->social_chan[pmlmeext->sitesurvey_res.channel_idx]; ch_set_idx = rtw_ch_set_search_ch(pmlmeext->channel_set, survey_channel); if (ch_set_idx >= 0) ScanType = pmlmeext->channel_set[ch_set_idx].ScanType; else ScanType = SCAN_ACTIVE; } else #endif //CONFIG_P2P { struct rtw_ieee80211_channel *ch; if (pmlmeext->sitesurvey_res.channel_idx < pmlmeext->sitesurvey_res.ch_num) { ch = &pmlmeext->sitesurvey_res.ch[pmlmeext->sitesurvey_res.channel_idx]; survey_channel = ch->hw_value; ScanType = (ch->flags & RTW_IEEE80211_CHAN_PASSIVE_SCAN) ? SCAN_PASSIVE : SCAN_ACTIVE; } } if (0){ #ifdef CONFIG_P2P DBG_871X(FUNC_ADPT_FMT" ch:%u (cnt:%u,idx:%d) at %dms, %c%c%c\n" , FUNC_ADPT_ARG(padapter) , survey_channel , pwdinfo->find_phase_state_exchange_cnt, pmlmeext->sitesurvey_res.channel_idx , rtw_get_passing_time_ms(padapter->mlmepriv.scan_start_time) , ScanType?'A':'P', pmlmeext->sitesurvey_res.scan_mode?'A':'P' , pmlmeext->sitesurvey_res.ssid[0].SsidLength?'S':' ' ); #else DBG_871X(FUNC_ADPT_FMT" ch:%u (cnt:%u) at %dms, %c%c%c\n" , FUNC_ADPT_ARG(padapter) , survey_channel , pmlmeext->sitesurvey_res.channel_idx , rtw_get_passing_time_ms(padapter->mlmepriv.scan_start_time) , ScanType?'A':'P', pmlmeext->sitesurvey_res.scan_mode?'A':'P' , pmlmeext->sitesurvey_res.ssid[0].SsidLength?'S':' ' ); #endif // CONFIG_P2P #ifdef DBG_FIXED_CHAN DBG_871X(FUNC_ADPT_FMT" fixed_chan:%u\n", pmlmeext->fixed_chan); #endif } if(survey_channel != 0) { //PAUSE 4-AC Queue when site_survey //rtw_hal_get_hwreg(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8)); //val8 |= 0x0f; //rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8)); #if defined(CONFIG_STA_MODE_SCAN_UNDER_AP_MODE) || defined(CONFIG_ATMEL_RC_PATCH) if((padapter->pbuddy_adapter->mlmeextpriv.mlmext_info.state&0x03) == WIFI_FW_AP_STATE) { if( pmlmeinfo->scan_cnt == RTW_SCAN_NUM_OF_CH ) { pmlmeinfo->scan_cnt = 0; survey_channel = pbuddy_mlmeext->cur_channel; stay_buddy_ch = 1; } else { if( pmlmeinfo->scan_cnt == 0 ) stay_buddy_ch = 2; pmlmeinfo->scan_cnt++; } } #endif if(pmlmeext->sitesurvey_res.channel_idx == 0) { #ifdef DBG_FIXED_CHAN if(pmlmeext->fixed_chan !=0xff) set_channel_bwmode(padapter, pmlmeext->fixed_chan, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); else #endif set_channel_bwmode(padapter, survey_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); } else { #ifdef DBG_FIXED_CHAN if(pmlmeext->fixed_chan!=0xff) SelectChannel(padapter, pmlmeext->fixed_chan); else #endif SelectChannel(padapter, survey_channel); } #if defined(CONFIG_STA_MODE_SCAN_UNDER_AP_MODE) || defined(CONFIG_ATMEL_RC_PATCH) if( stay_buddy_ch == 1 ) { val8 = 0; //survey done rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); if(check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) && check_buddy_fwstate(padapter, _FW_LINKED)) { update_beacon(padapter->pbuddy_adapter, 0, NULL, _TRUE); } } else if( stay_buddy_ch == 2 ) { val8 = 1; //under site survey rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); } #endif if(ScanType == SCAN_ACTIVE) //obey the channel plan setting... { #ifdef CONFIG_P2P if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH) ) { issue_probereq_p2p(padapter, NULL); issue_probereq_p2p(padapter, NULL); issue_probereq_p2p(padapter, NULL); } else #endif //CONFIG_P2P { int i; for(i=0;isitesurvey_res.ssid[i].SsidLength) { /* IOT issue, When wifi_spec is not set, send one probe req without WPS IE. */ if (padapter->registrypriv.wifi_spec) issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL); else issue_probereq_ex(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL, 0, 0, 0, 0); issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL); } } if(pmlmeext->sitesurvey_res.scan_mode == SCAN_ACTIVE) { /* IOT issue, When wifi_spec is not set, send one probe req without WPS IE. */ if (padapter->registrypriv.wifi_spec) issue_probereq(padapter, NULL, NULL); else issue_probereq_ex(padapter, NULL, NULL, 0, 0, 0, 0); issue_probereq(padapter, NULL, NULL); } } } #if defined(CONFIG_ATMEL_RC_PATCH) // treat wlan0 & p2p0 in same way, may be changed in near feature. // assume home channel is 6, channel switch sequence will be // 1,2-6-3,4-6-5,6-6-7,8-6-9,10-6-11,12-6-13,14 //if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)==_TRUE) if( stay_buddy_ch == 1 ){ channel_scan_time_ms = pmlmeext->chan_scan_time * RTW_STAY_AP_CH_MILLISECOND; } else { if( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) channel_scan_time_ms = 20; else channel_scan_time_ms = 40 } #elif defined(CONFIG_STA_MODE_SCAN_UNDER_AP_MODE) if( stay_buddy_ch == 1 ) channel_scan_time_ms = pmlmeext->chan_scan_time * RTW_STAY_AP_CH_MILLISECOND ; else channel_scan_time_ms = pmlmeext->chan_scan_time; #else channel_scan_time_ms = pmlmeext->chan_scan_time; #endif set_survey_timer(pmlmeext, channel_scan_time_ms); #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) { struct noise_info info; info.bPauseDIG = _FALSE; info.IGIValue = 0; info.max_time = channel_scan_time_ms/2;//ms info.chan = survey_channel; rtw_hal_set_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&info, _FALSE); } #endif } else { // channel number is 0 or this channel is not valid. #ifdef CONFIG_CONCURRENT_MODE u8 cur_channel; u8 cur_bwmode; u8 cur_ch_offset; if (rtw_get_ch_setting_union(padapter, &cur_channel, &cur_bwmode, &cur_ch_offset) != 0) { if (0) DBG_871X(FUNC_ADPT_FMT" back to linked/linking union - ch:%u, bw:%u, offset:%u\n", FUNC_ADPT_ARG(padapter), cur_channel, cur_bwmode, cur_ch_offset); } #ifdef CONFIG_IOCTL_CFG80211 else if(padapter->pbuddy_adapter && pbuddy_adapter->wdinfo.driver_interface == DRIVER_CFG80211 && adapter_wdev_data(pbuddy_adapter)->p2p_enabled && rtw_p2p_chk_state(&pbuddy_adapter->wdinfo, P2P_STATE_LISTEN) ) { cur_channel = pbuddy_adapter->wdinfo.listen_channel; cur_bwmode = pbuddy_mlmeext->cur_bwmode; cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; } #endif else { cur_channel = pmlmeext->cur_channel; cur_bwmode = pmlmeext->cur_bwmode; cur_ch_offset = pmlmeext->cur_ch_offset; } #endif #ifdef CONFIG_P2P if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH)) { if( ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) || ( pwdinfo->p2p_info.scan_op_ch_only ) ) { // Set the find_phase_state_exchange_cnt to P2P_FINDPHASE_EX_CNT. // This will let the following flow to run the scanning end. rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_MAX); } #ifdef CONFIG_DBG_P2P DBG_871X( "[%s] find phase exchange cnt = %d\n", __FUNCTION__, pwdinfo->find_phase_state_exchange_cnt ); #endif } if(rtw_p2p_findphase_ex_is_needed(pwdinfo)) { // Set the P2P State to the listen state of find phase and set the current channel to the listen channel set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_LISTEN); pmlmeext->sitesurvey_res.state = SCAN_DISABLE; //turn on phy-dynamic functions Restore_DM_Func_Flag(padapter); //Switch_DM_Func(padapter, DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS, _TRUE); initialgain = 0xff; //restore RX GAIN rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); _set_timer( &pwdinfo->find_phase_timer, ( u32 ) ( ( u32 ) ( pwdinfo->listen_dwell ) * 100 ) ); } else #endif //CONFIG_P2P { #if defined(CONFIG_STA_MODE_SCAN_UNDER_AP_MODE) || defined(CONFIG_ATMEL_RC_PATCH) pmlmeinfo->scan_cnt = 0; #endif #ifdef CONFIG_ANTENNA_DIVERSITY // 20100721:Interrupt scan operation here. // For SW antenna diversity before link, it needs to switch to another antenna and scan again. // It compares the scan result and select beter one to do connection. if(rtw_hal_antdiv_before_linked(padapter)) { pmlmeext->sitesurvey_res.bss_cnt = 0; pmlmeext->sitesurvey_res.channel_idx = -1; pmlmeext->chan_scan_time = SURVEY_TO /2; set_survey_timer(pmlmeext, pmlmeext->chan_scan_time); return; } #endif #ifdef CONFIG_P2P if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH)) { #ifdef CONFIG_CONCURRENT_MODE if( pwdinfo->driver_interface == DRIVER_WEXT ) { if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) { _set_timer( &pwdinfo->ap_p2p_switch_timer, 500 ); } } rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); #else rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); #endif } rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); #endif //CONFIG_P2P pmlmeext->sitesurvey_res.state = SCAN_COMPLETE; //switch back to the original channel //SelectChannel(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset); { #ifdef CONFIG_CONCURRENT_MODE set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); #else #ifdef CONFIG_DUALMAC_CONCURRENT dc_set_channel_bwmode_survey_done(padapter); #else #ifdef CONFIG_P2P if( (pwdinfo->driver_interface == DRIVER_WEXT) && (rtw_p2p_chk_state(pwdinfo, P2P_STATE_LISTEN)) ) set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); else #endif //CONFIG_P2P set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); #endif //CONFIG_DUALMAC_CONCURRENT #endif //CONFIG_CONCURRENT_MODE } //flush 4-AC Queue after site_survey //val8 = 0; //rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8)); //config MSR Set_MSR(padapter, (pmlmeinfo->state & 0x3)); //turn on phy-dynamic functions Restore_DM_Func_Flag(padapter); //Switch_DM_Func(padapter, DYNAMIC_ALL_FUNC_ENABLE, _TRUE); initialgain = 0xff; //restore RX GAIN rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); if (is_client_associated_to_ap(padapter) == _TRUE) { issue_nulldata(padapter, NULL, 0, 3, 500); #ifdef CONFIG_CONCURRENT_MODE if(is_client_associated_to_ap(padapter->pbuddy_adapter) == _TRUE) { DBG_871X("adapter is surveydone(buddy_adapter is linked), issue nulldata(pwrbit=0)\n"); issue_nulldata(padapter->pbuddy_adapter, NULL, 0, 3, 500); } #endif } #ifdef CONFIG_CONCURRENT_MODE else if(is_client_associated_to_ap(padapter->pbuddy_adapter) == _TRUE) { issue_nulldata(padapter->pbuddy_adapter, NULL, 0, 3, 500); } #endif val8 = 0; //survey done rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); report_surveydone_event(padapter); pmlmeext->chan_scan_time = SURVEY_TO; pmlmeext->sitesurvey_res.state = SCAN_DISABLE; issue_action_BSSCoexistPacket(padapter); issue_action_BSSCoexistPacket(padapter); issue_action_BSSCoexistPacket(padapter); } #ifdef CONFIG_CONCURRENT_MODE if(check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) && check_buddy_fwstate(padapter, _FW_LINKED)) { DBG_871X("survey done, current CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); DBG_871X("restart pbuddy_adapter's beacon\n"); update_beacon(padapter->pbuddy_adapter, 0, NULL, _TRUE); } #endif } return; } //collect bss info from Beacon and Probe request/response frames. u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSID_EX *bssid) { int i; u32 len; u8 *p; u16 val16, subtype; u8 *pframe = precv_frame->u.hdr.rx_data; u32 packet_len = precv_frame->u.hdr.len; u8 ie_offset; struct registry_priv *pregistrypriv = &padapter->registrypriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); len = packet_len - sizeof(struct rtw_ieee80211_hdr_3addr); if (len > MAX_IE_SZ) { //DBG_871X("IE too long for survey event\n"); return _FAIL; } _rtw_memset(bssid, 0, sizeof(WLAN_BSSID_EX)); subtype = GetFrameSubType(pframe); if(subtype==WIFI_BEACON) { bssid->Reserved[0] = 1; ie_offset = _BEACON_IE_OFFSET_; } else { // FIXME : more type if (subtype == WIFI_PROBERSP) { ie_offset = _PROBERSP_IE_OFFSET_; bssid->Reserved[0] = 3; } else if (subtype == WIFI_PROBEREQ) { ie_offset = _PROBEREQ_IE_OFFSET_; bssid->Reserved[0] = 2; } else { bssid->Reserved[0] = 0; ie_offset = _FIXED_IE_LENGTH_; } } bssid->Length = sizeof(WLAN_BSSID_EX) - MAX_IE_SZ + len; //below is to copy the information element bssid->IELength = len; _rtw_memcpy(bssid->IEs, (pframe + sizeof(struct rtw_ieee80211_hdr_3addr)), bssid->IELength); //get the signal strength //bssid->Rssi = precv_frame->u.hdr.attrib.SignalStrength; // 0-100 index. bssid->Rssi = precv_frame->u.hdr.attrib.phy_info.RecvSignalPower; // in dBM.raw data bssid->PhyInfo.SignalQuality = precv_frame->u.hdr.attrib.phy_info.SignalQuality;//in percentage bssid->PhyInfo.SignalStrength = precv_frame->u.hdr.attrib.phy_info.SignalStrength;//in percentage #ifdef CONFIG_ANTENNA_DIVERSITY //rtw_hal_get_hwreg(padapter, HW_VAR_CURRENT_ANTENNA, (u8 *)(&bssid->PhyInfo.Optimum_antenna)); rtw_hal_get_def_var(padapter, HAL_DEF_CURRENT_ANTENNA, &bssid->PhyInfo.Optimum_antenna); #endif // checking SSID if ((p = rtw_get_ie(bssid->IEs + ie_offset, _SSID_IE_, &len, bssid->IELength - ie_offset)) == NULL) { DBG_871X("marc: cannot find SSID for survey event\n"); return _FAIL; } if (*(p + 1)) { if (len > NDIS_802_11_LENGTH_SSID) { DBG_871X("%s()-%d: IE too long (%d) for survey event\n", __FUNCTION__, __LINE__, len); return _FAIL; } _rtw_memcpy(bssid->Ssid.Ssid, (p + 2), *(p + 1)); bssid->Ssid.SsidLength = *(p + 1); } else { bssid->Ssid.SsidLength = 0; } _rtw_memset(bssid->SupportedRates, 0, NDIS_802_11_LENGTH_RATES_EX); //checking rate info... i = 0; p = rtw_get_ie(bssid->IEs + ie_offset, _SUPPORTEDRATES_IE_, &len, bssid->IELength - ie_offset); if (p != NULL) { if (len > NDIS_802_11_LENGTH_RATES_EX) { DBG_871X("%s()-%d: IE too long (%d) for survey event\n", __FUNCTION__, __LINE__, len); return _FAIL; } _rtw_memcpy(bssid->SupportedRates, (p + 2), len); i = len; } p = rtw_get_ie(bssid->IEs + ie_offset, _EXT_SUPPORTEDRATES_IE_, &len, bssid->IELength - ie_offset); if (p != NULL) { if (len > (NDIS_802_11_LENGTH_RATES_EX-i)) { DBG_871X("%s()-%d: IE too long (%d) for survey event\n", __FUNCTION__, __LINE__, len); return _FAIL; } _rtw_memcpy(bssid->SupportedRates + i, (p + 2), len); } //todo: #if 0 if (judge_network_type(bssid->SupportedRates, (len + i)) == WIRELESS_11B) { bssid->NetworkTypeInUse = Ndis802_11DS; } else #endif { bssid->NetworkTypeInUse = Ndis802_11OFDM24; } #ifdef CONFIG_P2P if (subtype == WIFI_PROBEREQ) { u8 *p2p_ie; u32 p2p_ielen; // Set Listion Channel if ((p2p_ie = rtw_get_p2p_ie(bssid->IEs, bssid->IELength, NULL, &p2p_ielen))) { u32 attr_contentlen = 0; u8 listen_ch[5] = { 0x00 }; if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_LISTEN_CH, listen_ch, &attr_contentlen) != NULL) bssid->Configuration.DSConfig = listen_ch[4]; else return _FALSE; // Intel device maybe no bring Listen Channel } else { // use current channel bssid->Configuration.DSConfig = padapter->mlmeextpriv.cur_channel; DBG_871X("%s()-%d: Cannot get p2p_ie. set DSconfig to op_ch(%d)\n", __FUNCTION__, __LINE__, bssid->Configuration.DSConfig); } // FIXME bssid->InfrastructureMode = Ndis802_11Infrastructure; _rtw_memcpy(bssid->MacAddress, GetAddr2Ptr(pframe), ETH_ALEN); bssid->Privacy = 1; return _SUCCESS; } #endif //CONFIG_P2P if (bssid->IELength < 12) return _FAIL; // Checking for DSConfig p = rtw_get_ie(bssid->IEs + ie_offset, _DSSET_IE_, &len, bssid->IELength - ie_offset); bssid->Configuration.DSConfig = 0; bssid->Configuration.Length = 0; if (p) { bssid->Configuration.DSConfig = *(p + 2); } else {// In 5G, some ap do not have DSSET IE // checking HT info for channel p = rtw_get_ie(bssid->IEs + ie_offset, _HT_ADD_INFO_IE_, &len, bssid->IELength - ie_offset); if(p) { struct HT_info_element *HT_info = (struct HT_info_element *)(p + 2); bssid->Configuration.DSConfig = HT_info->primary_channel; } else { // use current channel bssid->Configuration.DSConfig = rtw_get_oper_ch(padapter); } } _rtw_memcpy(&bssid->Configuration.BeaconPeriod, rtw_get_beacon_interval_from_ie(bssid->IEs), 2); bssid->Configuration.BeaconPeriod = le32_to_cpu(bssid->Configuration.BeaconPeriod); val16 = rtw_get_capability((WLAN_BSSID_EX *)bssid); if (val16 & BIT(0)) { bssid->InfrastructureMode = Ndis802_11Infrastructure; _rtw_memcpy(bssid->MacAddress, GetAddr2Ptr(pframe), ETH_ALEN); } else { bssid->InfrastructureMode = Ndis802_11IBSS; _rtw_memcpy(bssid->MacAddress, GetAddr3Ptr(pframe), ETH_ALEN); } if (val16 & BIT(4)) bssid->Privacy = 1; else bssid->Privacy = 0; bssid->Configuration.ATIMWindow = 0; //20/40 BSS Coexistence check if((pregistrypriv->wifi_spec==1) && (_FALSE == pmlmeinfo->bwmode_updated)) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; #ifdef CONFIG_80211N_HT p = rtw_get_ie(bssid->IEs + ie_offset, _HT_CAPABILITY_IE_, &len, bssid->IELength - ie_offset); if(p && len>0) { struct HT_caps_element *pHT_caps; pHT_caps = (struct HT_caps_element *)(p + 2); if(pHT_caps->u.HT_cap_element.HT_caps_info&BIT(14)) { pmlmepriv->num_FortyMHzIntolerant++; } } else { pmlmepriv->num_sta_no_ht++; } #endif //CONFIG_80211N_HT } #ifdef CONFIG_INTEL_WIDI //process_intel_widi_query_or_tigger(padapter, bssid); if(process_intel_widi_query_or_tigger(padapter, bssid)) { return _FAIL; } #endif // CONFIG_INTEL_WIDI #if defined(DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) & 1 if(strcmp(bssid->Ssid.Ssid, DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) == 0) { DBG_871X("Receiving %s("MAC_FMT", DSConfig:%u) from ch%u with ss:%3u, sq:%3u, RawRSSI:%3ld\n" , bssid->Ssid.Ssid, MAC_ARG(bssid->MacAddress), bssid->Configuration.DSConfig , rtw_get_oper_ch(padapter) , bssid->PhyInfo.SignalStrength, bssid->PhyInfo.SignalQuality, bssid->Rssi ); } #endif // mark bss info receving from nearby channel as SignalQuality 101 if(bssid->Configuration.DSConfig != rtw_get_oper_ch(padapter)) { bssid->PhyInfo.SignalQuality= 101; } return _SUCCESS; } void start_create_ibss(_adapter* padapter) { unsigned short caps; u8 val8; u8 join_type; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); pmlmeext->cur_channel = (u8)pnetwork->Configuration.DSConfig; pmlmeinfo->bcn_interval = get_beacon_interval(pnetwork); //update wireless mode update_wireless_mode(padapter); //udpate capability caps = rtw_get_capability((WLAN_BSSID_EX *)pnetwork); update_capinfo(padapter, caps); if(caps&cap_IBSS)//adhoc master { //set_opmode_cmd(padapter, adhoc);//removed val8 = 0xcf; rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, NULL); //switch channel //SelectChannel(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE); set_channel_bwmode(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); beacon_timing_control(padapter); //set msr to WIFI_FW_ADHOC_STATE pmlmeinfo->state = WIFI_FW_ADHOC_STATE; Set_MSR(padapter, (pmlmeinfo->state & 0x3)); //issue beacon if(send_beacon(padapter)==_FAIL) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("issuing beacon frame fail....\n")); report_join_res(padapter, -1); pmlmeinfo->state = WIFI_FW_NULL_STATE; } else { rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, padapter->registrypriv.dev_network.MacAddress); join_type = 0; rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); report_join_res(padapter, 1); pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS; rtw_indicate_connect(padapter); } } else { DBG_871X("start_create_ibss, invalid cap:%x\n", caps); return; } //update bc/mc sta_info update_bmc_sta(padapter); } void start_clnt_join(_adapter* padapter) { unsigned short caps; u8 val8; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); int beacon_timeout; u8 ASIX_ID[]= {0x00, 0x0E, 0xC6}; //update wireless mode update_wireless_mode(padapter); //udpate capability caps = rtw_get_capability((WLAN_BSSID_EX *)pnetwork); update_capinfo(padapter, caps); //check if sta is ASIX peer and fix IOT issue if it is. if (_rtw_memcmp(get_my_bssid(&pmlmeinfo->network) ,ASIX_ID ,3)) { u8 iot_flag = _TRUE; rtw_hal_set_hwreg(padapter, HW_VAR_ASIX_IOT, (u8 *)(&iot_flag)); } if (caps&cap_ESS) { Set_MSR(padapter, WIFI_FW_STATION_STATE); val8 = (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X)? 0xcc: 0xcf; #ifdef CONFIG_WAPI_SUPPORT if (padapter->wapiInfo.bWapiEnable && pmlmeinfo->auth_algo == dot11AuthAlgrthm_WAPI) { //Disable TxUseDefaultKey, RxUseDefaultKey, RxBroadcastUseDefaultKey. val8 = 0x4c; } #endif rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); #ifdef CONFIG_DEAUTH_BEFORE_CONNECT // Because of AP's not receiving deauth before // AP may: 1)not response auth or 2)deauth us after link is complete // issue deauth before issuing auth to deal with the situation // Commented by Albert 2012/07/21 // For the Win8 P2P connection, it will be hard to have a successful connection if this Wi-Fi doesn't connect to it. { #ifdef CONFIG_P2P _queue *queue = &(padapter->mlmepriv.scanned_queue); _list *head = get_list_head(queue); _list *pos = get_next(head); struct wlan_network *scanned = NULL; u8 ie_offset = 0; _irqL irqL; bool has_p2p_ie = _FALSE; _enter_critical_bh(&(padapter->mlmepriv.scanned_queue.lock), &irqL); for (pos = get_next(head);!rtw_end_of_queue_search(head, pos); pos = get_next(pos)) { scanned = LIST_CONTAINOR(pos, struct wlan_network, list); if(scanned==NULL) rtw_warn_on(1); if (_rtw_memcmp(&(scanned->network.Ssid), &(pnetwork->Ssid), sizeof(NDIS_802_11_SSID)) == _TRUE && _rtw_memcmp(scanned->network.MacAddress, pnetwork->MacAddress, sizeof(NDIS_802_11_MAC_ADDRESS)) == _TRUE ) { ie_offset = (scanned->network.Reserved[0] == 2? 0:12); if (rtw_get_p2p_ie(scanned->network.IEs+ie_offset, scanned->network.IELength-ie_offset, NULL, NULL)) has_p2p_ie = _TRUE; break; } } _exit_critical_bh(&(padapter->mlmepriv.scanned_queue.lock), &irqL); if (scanned == NULL || rtw_end_of_queue_search(head, pos) || has_p2p_ie == _FALSE) #endif /* CONFIG_P2P */ //To avoid connecting to AP fail during resume process, change retry count from 5 to 1 issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, 1, 100); } #endif /* CONFIG_DEAUTH_BEFORE_CONNECT */ //here wait for receiving the beacon to start auth //and enable a timer beacon_timeout = decide_wait_for_beacon_timeout(pmlmeinfo->bcn_interval); set_link_timer(pmlmeext, beacon_timeout); _set_timer( &padapter->mlmepriv.assoc_timer, (REAUTH_TO * REAUTH_LIMIT) + (REASSOC_TO*REASSOC_LIMIT) +beacon_timeout); pmlmeinfo->state = WIFI_FW_AUTH_NULL | WIFI_FW_STATION_STATE; } else if (caps&cap_IBSS) //adhoc client { Set_MSR(padapter, WIFI_FW_ADHOC_STATE); val8 = 0xcf; rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); beacon_timing_control(padapter); pmlmeinfo->state = WIFI_FW_ADHOC_STATE; report_join_res(padapter, 1); } else { //DBG_871X("marc: invalid cap:%x\n", caps); return; } } void start_clnt_auth(_adapter* padapter) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); _cancel_timer_ex(&pmlmeext->link_timer); pmlmeinfo->state &= (~WIFI_FW_AUTH_NULL); pmlmeinfo->state |= WIFI_FW_AUTH_STATE; pmlmeinfo->auth_seq = 1; pmlmeinfo->reauth_count = 0; pmlmeinfo->reassoc_count = 0; pmlmeinfo->link_count = 0; pmlmeext->retry = 0; DBG_871X_LEVEL(_drv_always_, "start auth\n"); issue_auth(padapter, NULL, 0); set_link_timer(pmlmeext, REAUTH_TO); } void start_clnt_assoc(_adapter* padapter) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); _cancel_timer_ex(&pmlmeext->link_timer); pmlmeinfo->state &= (~(WIFI_FW_AUTH_NULL | WIFI_FW_AUTH_STATE)); pmlmeinfo->state |= (WIFI_FW_AUTH_SUCCESS | WIFI_FW_ASSOC_STATE); issue_assocreq(padapter); set_link_timer(pmlmeext, REASSOC_TO); } unsigned int receive_disconnect(_adapter *padapter, unsigned char *MacAddr, unsigned short reason) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); //check A3 if (!(_rtw_memcmp(MacAddr, get_my_bssid(&pmlmeinfo->network), ETH_ALEN))) return _SUCCESS; DBG_871X("%s\n", __FUNCTION__); if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) { if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) { pmlmeinfo->state = WIFI_FW_NULL_STATE; report_del_sta_event(padapter, MacAddr, reason); } else if (pmlmeinfo->state & WIFI_FW_LINKING_STATE) { pmlmeinfo->state = WIFI_FW_NULL_STATE; report_join_res(padapter, -2); } } return _SUCCESS; } #ifdef CONFIG_80211D static void process_80211d(PADAPTER padapter, WLAN_BSSID_EX *bssid) { struct registry_priv *pregistrypriv; struct mlme_ext_priv *pmlmeext; RT_CHANNEL_INFO *chplan_new; u8 channel; u8 i; pregistrypriv = &padapter->registrypriv; pmlmeext = &padapter->mlmeextpriv; // Adjust channel plan by AP Country IE if (pregistrypriv->enable80211d && (!pmlmeext->update_channel_plan_by_ap_done)) { u8 *ie, *p; u32 len; RT_CHANNEL_PLAN chplan_ap; RT_CHANNEL_INFO chplan_sta[MAX_CHANNEL_NUM]; u8 country[4]; u8 fcn; // first channel number u8 noc; // number of channel u8 j, k; ie = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _COUNTRY_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); if (!ie) return; if (len < 6) return; ie += 2; p = ie; ie += len; _rtw_memset(country, 0, 4); _rtw_memcpy(country, p, 3); p += 3; RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("%s: 802.11d country=%s\n", __FUNCTION__, country)); i = 0; while ((ie - p) >= 3) { fcn = *(p++); noc = *(p++); p++; for (j = 0; j < noc; j++) { if (fcn <= 14) channel = fcn + j; // 2.4 GHz else channel = fcn + j*4; // 5 GHz chplan_ap.Channel[i++] = channel; } } chplan_ap.Len = i; #ifdef CONFIG_DEBUG_RTL871X i = 0; DBG_871X("%s: AP[%s] channel plan {", __FUNCTION__, bssid->Ssid.Ssid); while ((i < chplan_ap.Len) && (chplan_ap.Channel[i] != 0)) { DBG_8192C("%02d,", chplan_ap.Channel[i]); i++; } DBG_871X("}\n"); #endif _rtw_memcpy(chplan_sta, pmlmeext->channel_set, sizeof(chplan_sta)); #ifdef CONFIG_DEBUG_RTL871X i = 0; DBG_871X("%s: STA channel plan {", __FUNCTION__); while ((i < MAX_CHANNEL_NUM) && (chplan_sta[i].ChannelNum != 0)) { DBG_871X("%02d(%c),", chplan_sta[i].ChannelNum, chplan_sta[i].ScanType==SCAN_PASSIVE?'p':'a'); i++; } DBG_871X("}\n"); #endif _rtw_memset(pmlmeext->channel_set, 0, sizeof(pmlmeext->channel_set)); chplan_new = pmlmeext->channel_set; i = j = k = 0; if (pregistrypriv->wireless_mode & WIRELESS_11G) { do { if ((i == MAX_CHANNEL_NUM) || (chplan_sta[i].ChannelNum == 0) || (chplan_sta[i].ChannelNum > 14)) break; if ((j == chplan_ap.Len) || (chplan_ap.Channel[j] > 14)) break; if (chplan_sta[i].ChannelNum == chplan_ap.Channel[j]) { chplan_new[k].ChannelNum = chplan_ap.Channel[j]; chplan_new[k].ScanType = SCAN_ACTIVE; i++; j++; k++; } else if (chplan_sta[i].ChannelNum < chplan_ap.Channel[j]) { chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; // chplan_new[k].ScanType = chplan_sta[i].ScanType; chplan_new[k].ScanType = SCAN_PASSIVE; i++; k++; } else if (chplan_sta[i].ChannelNum > chplan_ap.Channel[j]) { chplan_new[k].ChannelNum = chplan_ap.Channel[j]; chplan_new[k].ScanType = SCAN_ACTIVE; j++; k++; } } while (1); // change AP not support channel to Passive scan while ((i < MAX_CHANNEL_NUM) && (chplan_sta[i].ChannelNum != 0) && (chplan_sta[i].ChannelNum <= 14)) { chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; // chplan_new[k].ScanType = chplan_sta[i].ScanType; chplan_new[k].ScanType = SCAN_PASSIVE; i++; k++; } // add channel AP supported while ((j < chplan_ap.Len) && (chplan_ap.Channel[j] <= 14)) { chplan_new[k].ChannelNum = chplan_ap.Channel[j]; chplan_new[k].ScanType = SCAN_ACTIVE; j++; k++; } } else { // keep original STA 2.4G channel plan while ((i < MAX_CHANNEL_NUM) && (chplan_sta[i].ChannelNum != 0) && (chplan_sta[i].ChannelNum <= 14)) { chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; chplan_new[k].ScanType = chplan_sta[i].ScanType; i++; k++; } // skip AP 2.4G channel plan while ((j < chplan_ap.Len) && (chplan_ap.Channel[j] <= 14)) { j++; } } if (pregistrypriv->wireless_mode & WIRELESS_11A) { do { if ((i == MAX_CHANNEL_NUM) || (chplan_sta[i].ChannelNum == 0)) break; if ((j == chplan_ap.Len) || (chplan_ap.Channel[j] == 0)) break; if (chplan_sta[i].ChannelNum == chplan_ap.Channel[j]) { chplan_new[k].ChannelNum = chplan_ap.Channel[j]; chplan_new[k].ScanType = SCAN_ACTIVE; i++; j++; k++; } else if (chplan_sta[i].ChannelNum < chplan_ap.Channel[j]) { chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; // chplan_new[k].ScanType = chplan_sta[i].ScanType; chplan_new[k].ScanType = SCAN_PASSIVE; i++; k++; } else if (chplan_sta[i].ChannelNum > chplan_ap.Channel[j]) { chplan_new[k].ChannelNum = chplan_ap.Channel[j]; chplan_new[k].ScanType = SCAN_ACTIVE; j++; k++; } } while (1); // change AP not support channel to Passive scan while ((i < MAX_CHANNEL_NUM) && (chplan_sta[i].ChannelNum != 0)) { chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; // chplan_new[k].ScanType = chplan_sta[i].ScanType; chplan_new[k].ScanType = SCAN_PASSIVE; i++; k++; } // add channel AP supported while ((j < chplan_ap.Len) && (chplan_ap.Channel[j] != 0)) { chplan_new[k].ChannelNum = chplan_ap.Channel[j]; chplan_new[k].ScanType = SCAN_ACTIVE; j++; k++; } } else { // keep original STA 5G channel plan while ((i < MAX_CHANNEL_NUM) && (chplan_sta[i].ChannelNum != 0)) { chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; chplan_new[k].ScanType = chplan_sta[i].ScanType; i++; k++; } } pmlmeext->update_channel_plan_by_ap_done = 1; #ifdef CONFIG_DEBUG_RTL871X k = 0; DBG_871X("%s: new STA channel plan {", __FUNCTION__); while ((k < MAX_CHANNEL_NUM) && (chplan_new[k].ChannelNum != 0)) { DBG_871X("%02d(%c),", chplan_new[k].ChannelNum, chplan_new[k].ScanType==SCAN_PASSIVE?'p':'c'); k++; } DBG_871X("}\n"); #endif #if 0 // recover the right channel index channel = chplan_sta[pmlmeext->sitesurvey_res.channel_idx].ChannelNum; k = 0; while ((k < MAX_CHANNEL_NUM) && (chplan_new[k].ChannelNum != 0)) { if (chplan_new[k].ChannelNum == channel) { RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("%s: change mlme_ext sitesurvey channel index from %d to %d\n", __FUNCTION__, pmlmeext->sitesurvey_res.channel_idx, k)); pmlmeext->sitesurvey_res.channel_idx = k; break; } k++; } #endif } // If channel is used by AP, set channel scan type to active channel = bssid->Configuration.DSConfig; chplan_new = pmlmeext->channel_set; i = 0; while ((i < MAX_CHANNEL_NUM) && (chplan_new[i].ChannelNum != 0)) { if (chplan_new[i].ChannelNum == channel) { if (chplan_new[i].ScanType == SCAN_PASSIVE) { //5G Bnad 2, 3 (DFS) doesn't change to active scan if(channel >= 52 && channel <= 144) break; chplan_new[i].ScanType = SCAN_ACTIVE; RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("%s: change channel %d scan type from passive to active\n", __FUNCTION__, channel)); } break; } i++; } } #endif /**************************************************************************** Following are the functions to report events *****************************************************************************/ void report_survey_event(_adapter *padapter, union recv_frame *precv_frame) { struct cmd_obj *pcmd_obj; u8 *pevtcmd; u32 cmdsz; struct survey_event *psurvey_evt; struct C2HEvent_Header *pc2h_evt_hdr; struct mlme_ext_priv *pmlmeext; struct cmd_priv *pcmdpriv; //u8 *pframe = precv_frame->u.hdr.rx_data; //uint len = precv_frame->u.hdr.len; if(!padapter) return; pmlmeext = &padapter->mlmeextpriv; pcmdpriv = &padapter->cmdpriv; if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) { return; } cmdsz = (sizeof(struct survey_event) + sizeof(struct C2HEvent_Header)); if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL) { rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); return; } _rtw_init_listhead(&pcmd_obj->list); pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); pcmd_obj->cmdsz = cmdsz; pcmd_obj->parmbuf = pevtcmd; pcmd_obj->rsp = NULL; pcmd_obj->rspsz = 0; pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd); pc2h_evt_hdr->len = sizeof(struct survey_event); pc2h_evt_hdr->ID = GEN_EVT_CODE(_Survey); pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); psurvey_evt = (struct survey_event*)(pevtcmd + sizeof(struct C2HEvent_Header)); if (collect_bss_info(padapter, precv_frame, (WLAN_BSSID_EX *)&psurvey_evt->bss) == _FAIL) { rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); rtw_mfree((u8 *)pevtcmd, cmdsz); return; } #ifdef CONFIG_80211D process_80211d(padapter, &psurvey_evt->bss); #endif rtw_enqueue_cmd(pcmdpriv, pcmd_obj); pmlmeext->sitesurvey_res.bss_cnt++; return; } void report_surveydone_event(_adapter *padapter) { struct cmd_obj *pcmd_obj; u8 *pevtcmd; u32 cmdsz; struct surveydone_event *psurveydone_evt; struct C2HEvent_Header *pc2h_evt_hdr; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) { return; } cmdsz = (sizeof(struct surveydone_event) + sizeof(struct C2HEvent_Header)); if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL) { rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); return; } _rtw_init_listhead(&pcmd_obj->list); pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); pcmd_obj->cmdsz = cmdsz; pcmd_obj->parmbuf = pevtcmd; pcmd_obj->rsp = NULL; pcmd_obj->rspsz = 0; pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd); pc2h_evt_hdr->len = sizeof(struct surveydone_event); pc2h_evt_hdr->ID = GEN_EVT_CODE(_SurveyDone); pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); psurveydone_evt = (struct surveydone_event*)(pevtcmd + sizeof(struct C2HEvent_Header)); psurveydone_evt->bss_cnt = pmlmeext->sitesurvey_res.bss_cnt; DBG_871X("survey done event(%x) band:%d for "ADPT_FMT"\n", psurveydone_evt->bss_cnt, padapter->setband, ADPT_ARG(padapter)); rtw_enqueue_cmd(pcmdpriv, pcmd_obj); return; } void report_join_res(_adapter *padapter, int res) { struct cmd_obj *pcmd_obj; u8 *pevtcmd; u32 cmdsz; struct joinbss_event *pjoinbss_evt; struct C2HEvent_Header *pc2h_evt_hdr; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct cmd_priv *pcmdpriv = &padapter->cmdpriv; if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) { return; } cmdsz = (sizeof(struct joinbss_event) + sizeof(struct C2HEvent_Header)); if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL) { rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); return; } _rtw_init_listhead(&pcmd_obj->list); pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); pcmd_obj->cmdsz = cmdsz; pcmd_obj->parmbuf = pevtcmd; pcmd_obj->rsp = NULL; pcmd_obj->rspsz = 0; pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd); pc2h_evt_hdr->len = sizeof(struct joinbss_event); pc2h_evt_hdr->ID = GEN_EVT_CODE(_JoinBss); pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); pjoinbss_evt = (struct joinbss_event*)(pevtcmd + sizeof(struct C2HEvent_Header)); _rtw_memcpy((unsigned char *)(&(pjoinbss_evt->network.network)), &(pmlmeinfo->network), sizeof(WLAN_BSSID_EX)); pjoinbss_evt->network.join_res = pjoinbss_evt->network.aid = res; DBG_871X("report_join_res(%d)\n", res); rtw_joinbss_event_prehandle(padapter, (u8 *)&pjoinbss_evt->network); rtw_enqueue_cmd(pcmdpriv, pcmd_obj); return; } void report_wmm_edca_update(_adapter *padapter) { struct cmd_obj *pcmd_obj; u8 *pevtcmd; u32 cmdsz; struct wmm_event *pwmm_event; struct C2HEvent_Header *pc2h_evt_hdr; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct cmd_priv *pcmdpriv = &padapter->cmdpriv; if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) { return; } cmdsz = (sizeof(struct wmm_event) + sizeof(struct C2HEvent_Header)); if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL) { rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); return; } _rtw_init_listhead(&pcmd_obj->list); pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); pcmd_obj->cmdsz = cmdsz; pcmd_obj->parmbuf = pevtcmd; pcmd_obj->rsp = NULL; pcmd_obj->rspsz = 0; pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd); pc2h_evt_hdr->len = sizeof(struct wmm_event); pc2h_evt_hdr->ID = GEN_EVT_CODE(_WMM); pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); pwmm_event = (struct wmm_event*)(pevtcmd + sizeof(struct C2HEvent_Header)); pwmm_event->wmm =0; rtw_enqueue_cmd(pcmdpriv, pcmd_obj); return; } void report_del_sta_event(_adapter *padapter, unsigned char* MacAddr, unsigned short reason) { struct cmd_obj *pcmd_obj; u8 *pevtcmd; u32 cmdsz; struct sta_info *psta; int mac_id; struct stadel_event *pdel_sta_evt; struct C2HEvent_Header *pc2h_evt_hdr; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) { return; } cmdsz = (sizeof(struct stadel_event) + sizeof(struct C2HEvent_Header)); if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL) { rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); return; } _rtw_init_listhead(&pcmd_obj->list); pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); pcmd_obj->cmdsz = cmdsz; pcmd_obj->parmbuf = pevtcmd; pcmd_obj->rsp = NULL; pcmd_obj->rspsz = 0; pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd); pc2h_evt_hdr->len = sizeof(struct stadel_event); pc2h_evt_hdr->ID = GEN_EVT_CODE(_DelSTA); pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); pdel_sta_evt = (struct stadel_event*)(pevtcmd + sizeof(struct C2HEvent_Header)); _rtw_memcpy((unsigned char *)(&(pdel_sta_evt->macaddr)), MacAddr, ETH_ALEN); _rtw_memcpy((unsigned char *)(pdel_sta_evt->rsvd),(unsigned char *)(&reason),2); psta = rtw_get_stainfo(&padapter->stapriv, MacAddr); if(psta) mac_id = (int)psta->mac_id; else mac_id = (-1); pdel_sta_evt->mac_id = mac_id; DBG_871X("report_del_sta_event: delete STA, mac_id=%d\n", mac_id); rtw_enqueue_cmd(pcmdpriv, pcmd_obj); return; } void report_add_sta_event(_adapter *padapter, unsigned char* MacAddr, int cam_idx) { struct cmd_obj *pcmd_obj; u8 *pevtcmd; u32 cmdsz; struct stassoc_event *padd_sta_evt; struct C2HEvent_Header *pc2h_evt_hdr; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) { return; } cmdsz = (sizeof(struct stassoc_event) + sizeof(struct C2HEvent_Header)); if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL) { rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); return; } _rtw_init_listhead(&pcmd_obj->list); pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); pcmd_obj->cmdsz = cmdsz; pcmd_obj->parmbuf = pevtcmd; pcmd_obj->rsp = NULL; pcmd_obj->rspsz = 0; pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd); pc2h_evt_hdr->len = sizeof(struct stassoc_event); pc2h_evt_hdr->ID = GEN_EVT_CODE(_AddSTA); pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); padd_sta_evt = (struct stassoc_event*)(pevtcmd + sizeof(struct C2HEvent_Header)); _rtw_memcpy((unsigned char *)(&(padd_sta_evt->macaddr)), MacAddr, ETH_ALEN); padd_sta_evt->cam_id = cam_idx; DBG_871X("report_add_sta_event: add STA\n"); rtw_enqueue_cmd(pcmdpriv, pcmd_obj); return; } bool rtw_port_switch_chk(_adapter *adapter) { bool switch_needed = _FALSE; #ifdef CONFIG_CONCURRENT_MODE #ifdef CONFIG_RUNTIME_PORT_SWITCH struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); struct pwrctrl_priv *pwrctl = dvobj_to_pwrctl(dvobj); _adapter *if_port0 = NULL; _adapter *if_port1 = NULL; struct mlme_ext_info *if_port0_mlmeinfo = NULL; struct mlme_ext_info *if_port1_mlmeinfo = NULL; int i; for (i = 0; i < dvobj->iface_nums; i++) { if (get_iface_type(dvobj->padapters[i]) == IFACE_PORT0) { if_port0 = dvobj->padapters[i]; if_port0_mlmeinfo = &(if_port0->mlmeextpriv.mlmext_info); } else if (get_iface_type(dvobj->padapters[i]) == IFACE_PORT1) { if_port1 = dvobj->padapters[i]; if_port1_mlmeinfo = &(if_port1->mlmeextpriv.mlmext_info); } } if (if_port0 == NULL) { rtw_warn_on(1); goto exit; } if (if_port1 == NULL) { rtw_warn_on(1); goto exit; } #ifdef DBG_RUNTIME_PORT_SWITCH DBG_871X(FUNC_ADPT_FMT" wowlan_mode:%u\n" ADPT_FMT", port0, mlmeinfo->state:0x%08x, p2p_state:%d, %d\n" ADPT_FMT", port1, mlmeinfo->state:0x%08x, p2p_state:%d, %d\n", FUNC_ADPT_ARG(adapter), pwrctl->wowlan_mode, ADPT_ARG(if_port0), if_port0_mlmeinfo->state, rtw_p2p_state(&if_port0->wdinfo), rtw_p2p_chk_state(&if_port0->wdinfo, P2P_STATE_NONE), ADPT_ARG(if_port1), if_port1_mlmeinfo->state, rtw_p2p_state(&if_port1->wdinfo), rtw_p2p_chk_state(&if_port1->wdinfo, P2P_STATE_NONE)); #endif /* DBG_RUNTIME_PORT_SWITCH */ #ifdef CONFIG_WOWLAN /* WOWLAN interface(primary, for now) should be port0 */ if (pwrctl->wowlan_mode == _TRUE) { if(!is_primary_adapter(if_port0)) { DBG_871X("%s "ADPT_FMT" enable WOWLAN\n", __func__, ADPT_ARG(if_port1)); switch_needed = _TRUE; } goto exit; } #endif /* CONFIG_WOWLAN */ /* AP should use port0 for ctl frame's ack */ if ((if_port1_mlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { DBG_871X("%s "ADPT_FMT" is AP/GO\n", __func__, ADPT_ARG(if_port1)); switch_needed = _TRUE; goto exit; } /* GC should use port0 for p2p ps */ if (((if_port1_mlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) && (if_port1_mlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && !rtw_p2p_chk_state(&if_port1->wdinfo, P2P_STATE_NONE) && !check_fwstate(&if_port1->mlmepriv, WIFI_UNDER_WPS) ) { DBG_871X("%s "ADPT_FMT" is GC\n", __func__, ADPT_ARG(if_port1)); switch_needed = _TRUE; goto exit; } /* port1 linked, but port0 not linked */ if ((if_port1_mlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && !(if_port0_mlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && ((if_port0_mlmeinfo->state & 0x03) != WIFI_FW_AP_STATE) ) { DBG_871X("%s "ADPT_FMT" is SINGLE_LINK\n", __func__, ADPT_ARG(if_port1)); switch_needed = _TRUE; goto exit; } exit: #ifdef DBG_RUNTIME_PORT_SWITCH DBG_871X(FUNC_ADPT_FMT" ret:%d\n", FUNC_ADPT_ARG(adapter), switch_needed); #endif /* DBG_RUNTIME_PORT_SWITCH */ #endif /* CONFIG_RUNTIME_PORT_SWITCH */ #endif /* CONFIG_CONCURRENT_MODE */ return switch_needed; } /**************************************************************************** Following are the event callback functions *****************************************************************************/ //for sta/adhoc mode void update_sta_info(_adapter *padapter, struct sta_info *psta) { _irqL irqL; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); //ERP VCS_update(padapter, psta); #ifdef CONFIG_80211N_HT //HT if(pmlmepriv->htpriv.ht_option) { psta->htpriv.ht_option = _TRUE; psta->htpriv.ampdu_enable = pmlmepriv->htpriv.ampdu_enable; psta->htpriv.rx_ampdu_min_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para&IEEE80211_HT_CAP_AMPDU_DENSITY)>>2; if (support_short_GI(padapter, &(pmlmeinfo->HT_caps), CHANNEL_WIDTH_20)) psta->htpriv.sgi_20m = _TRUE; if (support_short_GI(padapter, &(pmlmeinfo->HT_caps), CHANNEL_WIDTH_40)) psta->htpriv.sgi_40m = _TRUE; psta->qos_option = _TRUE; psta->htpriv.ldpc_cap = pmlmepriv->htpriv.ldpc_cap; psta->htpriv.stbc_cap = pmlmepriv->htpriv.stbc_cap; psta->htpriv.beamform_cap = pmlmepriv->htpriv.beamform_cap; _rtw_memcpy(&psta->htpriv.ht_cap, &pmlmeinfo->HT_caps, sizeof(struct rtw_ieee80211_ht_cap)); } else #endif //CONFIG_80211N_HT { #ifdef CONFIG_80211N_HT psta->htpriv.ht_option = _FALSE; psta->htpriv.ampdu_enable = _FALSE; psta->htpriv.sgi_20m = _FALSE; psta->htpriv.sgi_40m = _FALSE; #endif //CONFIG_80211N_HT psta->qos_option = _FALSE; } #ifdef CONFIG_80211N_HT psta->htpriv.ch_offset = pmlmeext->cur_ch_offset; psta->htpriv.agg_enable_bitmap = 0x0;//reset psta->htpriv.candidate_tid_bitmap = 0x0;//reset #endif //CONFIG_80211N_HT psta->bw_mode = pmlmeext->cur_bwmode; //QoS if(pmlmepriv->qospriv.qos_option) psta->qos_option = _TRUE; #ifdef CONFIG_80211AC_VHT _rtw_memcpy(&psta->vhtpriv, &pmlmepriv->vhtpriv, sizeof(struct vht_priv)); #endif //CONFIG_80211AC_VHT update_ldpc_stbc_cap(psta); _enter_critical_bh(&psta->lock, &irqL); psta->state = _FW_LINKED; _exit_critical_bh(&psta->lock, &irqL); } static void rtw_mlmeext_disconnect(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); u8 state_backup = (pmlmeinfo->state&0x03); u8 ASIX_ID[]= {0x00, 0x0E, 0xC6}; //set_opmode_cmd(padapter, infra_client_with_mlme); #if 1 /* * For safety, prevent from keeping macid sleep. * If we can sure all power mode enter/leave are paired, * this check can be removed. * Lucas@20131113 */ /* wakeup macid after disconnect. */ { struct sta_info *psta; psta = rtw_get_stainfo(&padapter->stapriv, get_my_bssid(pnetwork)); if (psta) rtw_hal_macid_wakeup(padapter, psta->mac_id); } #endif rtw_hal_set_hwreg(padapter, HW_VAR_MLME_DISCONNECT, 0); rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, null_addr); //set MSR to no link state -> infra. mode Set_MSR(padapter, _HW_STATE_STATION_); //check if sta is ASIX peer and fix IOT issue if it is. if (_rtw_memcmp(get_my_bssid(&pmlmeinfo->network) ,ASIX_ID ,3)) { u8 iot_flag = _FALSE; rtw_hal_set_hwreg(padapter, HW_VAR_ASIX_IOT, (u8 *)(&iot_flag)); } pmlmeinfo->state = WIFI_FW_NULL_STATE; if(state_backup == WIFI_FW_STATION_STATE) { if (rtw_port_switch_chk(padapter) == _TRUE) { rtw_hal_set_hwreg(padapter, HW_VAR_PORT_SWITCH, NULL); #ifdef CONFIG_LPS { _adapter *port0_iface = dvobj_get_port0_adapter(adapter_to_dvobj(padapter)); if (port0_iface) rtw_lps_ctrl_wk_cmd(port0_iface, LPS_CTRL_CONNECT, 0); } #endif } } #ifdef CONFIG_DUALMAC_CONCURRENT dc_set_channel_bwmode_disconnect(padapter); #else //!CONFIG_DUALMAC_CONCURRENT #ifdef CONFIG_CONCURRENT_MODE if((check_buddy_fwstate(padapter, _FW_LINKED)) != _TRUE) { #endif //CONFIG_CONCURRENT_MODE //switch to the 20M Hz mode after disconnect pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); #ifdef CONFIG_CONCURRENT_MODE } #endif //CONFIG_CONCURRENT_MODE #ifdef CONFIG_FCS_MODE else { PADAPTER pbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext; if(EN_FCS(padapter)) { pbuddy_adapter = padapter->pbuddy_adapter; pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; rtw_hal_set_hwreg(padapter, HW_VAR_STOP_FCS_MODE, NULL); //switch to buddy's channel setting if buddy is linked set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); } } #endif //!CONFIG_FCS_MODE #endif //!CONFIG_DUALMAC_CONCURRENT flush_all_cam_entry(padapter); _cancel_timer_ex(&pmlmeext->link_timer); //pmlmepriv->LinkDetectInfo.TrafficBusyState = _FALSE; pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 0; pmlmepriv->LinkDetectInfo.LowPowerTransitionCount = 0; } void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) { struct sta_info *psta, *psta_bmc; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); struct sta_priv *pstapriv = &padapter->stapriv; u8 join_type; if(join_res < 0) { join_type = 1; rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, null_addr); goto exit_mlmeext_joinbss_event_callback; } if((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) { //update bc/mc sta_info update_bmc_sta(padapter); } //turn on dynamic functions Switch_DM_Func(padapter, DYNAMIC_ALL_FUNC_ENABLE, _TRUE); // update IOT-releated issue update_IOT_info(padapter); rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, cur_network->SupportedRates); //BCN interval rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&pmlmeinfo->bcn_interval)); //udpate capability update_capinfo(padapter, pmlmeinfo->capability); //WMM, Update EDCA param WMMOnAssocRsp(padapter); //HT HTOnAssocRsp(padapter); #ifdef CONFIG_80211AC_VHT //VHT VHTOnAssocRsp(padapter); #endif #ifndef CONFIG_CONCURRENT_MODE // Call set_channel_bwmode when the CONFIG_CONCURRENT_MODE doesn't be defined. //Set cur_channel&cur_bwmode&cur_ch_offset set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); #endif psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress); if (psta) //only for infra. mode { pmlmeinfo->FW_sta_info[psta->mac_id].psta = psta; //DBG_871X("set_sta_rate\n"); psta->wireless_mode = pmlmeext->cur_wireless_mode; //set per sta rate after updating HT cap. set_sta_rate(padapter, psta); rtw_sta_media_status_rpt(padapter, psta, 1); /* wakeup macid after join bss successfully to ensure the subsequent data frames can be sent out normally */ rtw_hal_macid_wakeup(padapter, psta->mac_id); } if (rtw_port_switch_chk(padapter) == _TRUE) rtw_hal_set_hwreg(padapter, HW_VAR_PORT_SWITCH, NULL); join_type = 2; rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) { // correcting TSF correct_TSF(padapter, pmlmeext); //set_link_timer(pmlmeext, DISCONNECT_TO); } #ifdef CONFIG_LPS if(get_iface_type(padapter) == IFACE_PORT0) rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_CONNECT, 0); #endif #ifdef CONFIG_BEAMFORMING if (psta) beamforming_wk_cmd(padapter, BEAMFORMING_CTRL_ENTER, (u8 *)psta, sizeof(struct sta_info), 0); #endif exit_mlmeext_joinbss_event_callback: #ifdef CONFIG_DUALMAC_CONCURRENT dc_handle_join_done(padapter, join_res); #endif #ifdef CONFIG_CONCURRENT_MODE concurrent_chk_joinbss_done(padapter, join_res); #endif DBG_871X("=>%s\n", __FUNCTION__); } //currently only adhoc mode will go here void mlmeext_sta_add_event_callback(_adapter *padapter, struct sta_info *psta) { struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 join_type; DBG_871X("%s\n", __FUNCTION__); if((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) { if(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)//adhoc master or sta_count>1 { //nothing to do } else//adhoc client { //update TSF Value //update_TSF(pmlmeext, pframe, len); // correcting TSF correct_TSF(padapter, pmlmeext); //start beacon if(send_beacon(padapter)==_FAIL) { pmlmeinfo->FW_sta_info[psta->mac_id].status = 0; pmlmeinfo->state ^= WIFI_FW_ADHOC_STATE; return; } pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS; } join_type = 2; rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); } pmlmeinfo->FW_sta_info[psta->mac_id].psta = psta; psta->bssratelen = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[psta->mac_id].SupportedRates); _rtw_memcpy(psta->bssrateset, pmlmeinfo->FW_sta_info[psta->mac_id].SupportedRates, psta->bssratelen); //update adhoc sta_info update_sta_info(padapter, psta); rtw_hal_update_sta_rate_mask(padapter, psta); // ToDo: HT for Ad-hoc psta->wireless_mode = rtw_check_network_type(psta->bssrateset, psta->bssratelen, pmlmeext->cur_channel); psta->raid = rtw_hal_networktype_to_raid(padapter, psta); //rate radaptive Update_RA_Entry(padapter, psta); } void mlmeext_sta_del_event_callback(_adapter *padapter) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if (is_client_associated_to_ap(padapter) || is_IBSS_empty(padapter)) { rtw_mlmeext_disconnect(padapter); } } /**************************************************************************** Following are the functions for the timer handlers *****************************************************************************/ void _linked_info_dump(_adapter *padapter) { int i; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); int UndecoratedSmoothedPWDB; struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); if(padapter->bLinkInfoDump){ DBG_871X("\n============["ADPT_FMT"] linked status check ===================\n",ADPT_ARG(padapter)); if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) { rtw_hal_get_def_var(padapter, HAL_DEF_UNDERCORATEDSMOOTHEDPWDB, &UndecoratedSmoothedPWDB); DBG_871X("AP[" MAC_FMT "] - UndecoratedSmoothedPWDB:%d\n", MAC_ARG(padapter->mlmepriv.cur_network.network.MacAddress),UndecoratedSmoothedPWDB); } else if((pmlmeinfo->state&0x03) == _HW_STATE_AP_) { _irqL irqL; _list *phead, *plist; struct sta_info *psta=NULL; struct sta_priv *pstapriv = &padapter->stapriv; _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); phead = &pstapriv->asoc_list; plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); plist = get_next(plist); DBG_871X("STA[" MAC_FMT "]:UndecoratedSmoothedPWDB:%d\n", MAC_ARG(psta->hwaddr),psta->rssi_stat.UndecoratedSmoothedPWDB); } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); } for(i=0; inum; i++) { if(rtw_macid_is_used(macid_ctl, i) && !rtw_macid_is_bmc(macid_ctl, i) /* skip bc/mc sta */ ) { //============ tx info ============ rtw_hal_get_def_var(padapter, HW_DEF_RA_INFO_DUMP, &i); } } rtw_hal_set_def_var(padapter, HAL_DEF_DBG_RX_INFO_DUMP, NULL); } } u8 chk_ap_is_alive(_adapter *padapter, struct sta_info *psta) { u8 ret = _FALSE; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); #ifdef DBG_EXPIRATION_CHK DBG_871X(FUNC_ADPT_FMT" rx:"STA_PKTS_FMT", beacon:%llu, probersp_to_self:%llu" /*", probersp_bm:%llu, probersp_uo:%llu, probereq:%llu, BI:%u"*/ ", retry:%u\n" , FUNC_ADPT_ARG(padapter) , STA_RX_PKTS_DIFF_ARG(psta) , psta->sta_stats.rx_beacon_pkts - psta->sta_stats.last_rx_beacon_pkts , psta->sta_stats.rx_probersp_pkts - psta->sta_stats.last_rx_probersp_pkts /*, psta->sta_stats.rx_probersp_bm_pkts - psta->sta_stats.last_rx_probersp_bm_pkts , psta->sta_stats.rx_probersp_uo_pkts - psta->sta_stats.last_rx_probersp_uo_pkts , psta->sta_stats.rx_probereq_pkts - psta->sta_stats.last_rx_probereq_pkts , pmlmeinfo->bcn_interval*/ , pmlmeext->retry ); DBG_871X(FUNC_ADPT_FMT" tx_pkts:%llu, link_count:%u\n", FUNC_ADPT_ARG(padapter) , padapter->xmitpriv.tx_pkts , pmlmeinfo->link_count ); #endif if((sta_rx_data_pkts(psta) == sta_last_rx_data_pkts(psta)) && sta_rx_beacon_pkts(psta) == sta_last_rx_beacon_pkts(psta) && sta_rx_probersp_pkts(psta) == sta_last_rx_probersp_pkts(psta) ) { ret = _FALSE; } else { ret = _TRUE; } sta_update_last_rx_pkts(psta); return ret; } #ifdef CONFIG_TDLS void linked_status_chk_tdls(_adapter *padapter) { struct candidate_pool{ struct sta_info *psta; u8 addr[ETH_ALEN]; }; struct sta_priv *pstapriv = &padapter->stapriv; _irqL irqL; u8 ack_chk; struct sta_info *psta; int i, num_teardown=0, num_checkalive=0; _list *plist, *phead; struct tdls_txmgmt txmgmt; struct candidate_pool checkalive[NUM_STA]; struct candidate_pool teardown[NUM_STA]; #define ALIVE_MIN 2 #define ALIVE_MAX 5 _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); _rtw_memset(checkalive, 0x00, sizeof(checkalive)); _rtw_memset(teardown, 0x00, sizeof(teardown)); if((padapter->tdlsinfo.link_established == _TRUE)){ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); for(i=0; i< NUM_STA; i++) { phead = &(pstapriv->sta_hash[i]); plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); plist = get_next(plist); if(psta->tdls_sta_state & TDLS_LINKED_STATE) { psta->alive_count++; if(psta->alive_count >= ALIVE_MIN) { #ifdef CONFIG_XMIT_ACK if(psta->sta_stats.last_rx_data_pkts >= psta->sta_stats.rx_data_pkts) #else if((psta->sta_stats.last_rx_data_pkts >= psta->sta_stats.rx_data_pkts) && (!(psta->tdls_sta_state & TDLS_ALIVE_STATE)) ) #endif { if(psta->alive_count < ALIVE_MAX) { _rtw_memcpy(checkalive[num_checkalive].addr, psta->hwaddr, ETH_ALEN); checkalive[num_checkalive].psta = psta; num_checkalive++; } else { _rtw_memcpy(teardown[num_teardown].addr, psta->hwaddr, ETH_ALEN); teardown[num_teardown].psta = psta; num_teardown++; } } else { psta->tdls_sta_state &= (~TDLS_ALIVE_STATE); psta->alive_count = 0; } } psta->sta_stats.last_rx_data_pkts = psta->sta_stats.rx_data_pkts; } } } _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); if(num_checkalive > 0) { for(i=0; i< num_checkalive; i++) { #ifdef CONFIG_XMIT_ACK //TDLS: Should we set wait_ms to 300 for keeping alive? ack_chk = issue_nulldata_to_TDLS_peer_STA(padapter, checkalive[i].addr, 0, 3, 300); if(ack_chk == _SUCCESS) { checkalive[i].psta->alive_count = 0; } #else checkalive[i].psta->tdls_sta_state &= (~TDLS_ALIVE_STATE); _rtw_memcpy(txmgmt.peer, checkalive[i].addr, ETH_ALEN); issue_tdls_dis_req(padapter, &txmgmt); issue_tdls_dis_req(padapter, &txmgmt); issue_tdls_dis_req(padapter, &txmgmt); #endif //CONFIG_XMIT_ACK } } if(num_teardown > 0) { for(i=0; i< num_teardown; i++) { DBG_871X("[%s %d] Send teardown to "MAC_FMT" \n", __FUNCTION__, __LINE__, MAC_ARG(teardown[i].addr)); txmgmt.status_code = _RSON_TDLS_TEAR_TOOFAR_; _rtw_memcpy(txmgmt.peer, teardown[i].addr, ETH_ALEN); issue_tdls_teardown(padapter, &txmgmt, _FALSE); } } } } #endif //CONFIG_TDLS void linked_status_chk(_adapter *padapter) { u32 i; struct sta_info *psta; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct sta_priv *pstapriv = &padapter->stapriv; if (is_client_associated_to_ap(padapter)) { //linked infrastructure client mode int tx_chk = _SUCCESS, rx_chk = _SUCCESS; int rx_chk_limit; int link_count_limit; #if defined(DBG_ROAMING_TEST) rx_chk_limit = 1; #elif defined(CONFIG_ACTIVE_KEEP_ALIVE_CHECK) && !defined(CONFIG_LPS_LCLK_WD_TIMER) rx_chk_limit = 4; #else rx_chk_limit = 8; #endif #ifdef CONFIG_P2P if (!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) link_count_limit = 3; // 8 sec else #endif // CONFIG_P2P link_count_limit = 7; // 16 sec // Marked by Kurt 20130715 // For WiDi 3.5 and latered on, they don't ask WiDi sink to do roaming, so we could not check rx limit that strictly. // todo: To check why we under miracast session, rx_chk would be _FALSE //#ifdef CONFIG_INTEL_WIDI //if (padapter->mlmepriv.widi_state != INTEL_WIDI_STATE_NONE) // rx_chk_limit = 1; //#endif if ((psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress)) != NULL) { bool is_p2p_enable = _FALSE; #ifdef CONFIG_P2P is_p2p_enable = !rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE); #endif if (chk_ap_is_alive(padapter, psta) == _FALSE) rx_chk = _FAIL; if (pxmitpriv->last_tx_pkts == pxmitpriv->tx_pkts) tx_chk = _FAIL; #if defined(CONFIG_ACTIVE_KEEP_ALIVE_CHECK) && !defined(CONFIG_LPS_LCLK_WD_TIMER) if (pmlmeext->active_keep_alive_check && (rx_chk == _FAIL || tx_chk == _FAIL)) { u8 backup_oper_channel=0; /* switch to correct channel of current network before issue keep-alive frames */ if (rtw_get_oper_ch(padapter) != pmlmeext->cur_channel) { backup_oper_channel = rtw_get_oper_ch(padapter); SelectChannel(padapter, pmlmeext->cur_channel); } if (rx_chk != _SUCCESS) issue_probereq_ex(padapter, &pmlmeinfo->network.Ssid, psta->hwaddr, 0, 0, 3, 1); if ((tx_chk != _SUCCESS && pmlmeinfo->link_count++ == link_count_limit) || rx_chk != _SUCCESS) { tx_chk = issue_nulldata(padapter, psta->hwaddr, 0, 3, 1); /* if tx acked and p2p disabled, set rx_chk _SUCCESS to reset retry count */ if (tx_chk == _SUCCESS && !is_p2p_enable) rx_chk = _SUCCESS; } /* back to the original operation channel */ if(backup_oper_channel>0) SelectChannel(padapter, backup_oper_channel); } else #endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ { if (rx_chk != _SUCCESS) { if (pmlmeext->retry == 0) { #ifdef DBG_EXPIRATION_CHK DBG_871X("issue_probereq to trigger probersp, retry=%d\n", pmlmeext->retry); #endif issue_probereq_ex(padapter, &pmlmeinfo->network.Ssid, pmlmeinfo->network.MacAddress, 0, 0, 0, 0); issue_probereq_ex(padapter, &pmlmeinfo->network.Ssid, pmlmeinfo->network.MacAddress, 0, 0, 0, 0); issue_probereq_ex(padapter, &pmlmeinfo->network.Ssid, pmlmeinfo->network.MacAddress, 0, 0, 0, 0); } } if (tx_chk != _SUCCESS && pmlmeinfo->link_count++ == link_count_limit) { #ifdef DBG_EXPIRATION_CHK DBG_871X("%s issue_nulldata 0\n", __FUNCTION__); #endif tx_chk = issue_nulldata_in_interrupt(padapter, NULL); } } if (rx_chk == _FAIL) { pmlmeext->retry++; if (pmlmeext->retry > rx_chk_limit) { DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" disconnect or roaming\n", FUNC_ADPT_ARG(padapter)); receive_disconnect(padapter, pmlmeinfo->network.MacAddress , WLAN_REASON_EXPIRATION_CHK); return; } } else { pmlmeext->retry = 0; } if (tx_chk == _FAIL) { pmlmeinfo->link_count %= (link_count_limit+1); } else { pxmitpriv->last_tx_pkts = pxmitpriv->tx_pkts; pmlmeinfo->link_count = 0; } } //end of if ((psta = rtw_get_stainfo(pstapriv, passoc_res->network.MacAddress)) != NULL) #if defined (CONFIG_TDLS) && defined (CONFIG_TDLS_AUTOCHECKALIVE) linked_status_chk_tdls(padapter); #endif //CONFIG_TDLS } else if (is_client_associated_to_ibss(padapter)) { //linked IBSS mode //for each assoc list entry to check the rx pkt counter for (i = IBSS_START_MAC_ID; i < NUM_STA; i++) { if (pmlmeinfo->FW_sta_info[i].status == 1) { psta = pmlmeinfo->FW_sta_info[i].psta; if(NULL==psta) continue; if (pmlmeinfo->FW_sta_info[i].rx_pkt == sta_rx_pkts(psta)) { if(pmlmeinfo->FW_sta_info[i].retry<3) { pmlmeinfo->FW_sta_info[i].retry++; } else { pmlmeinfo->FW_sta_info[i].retry = 0; pmlmeinfo->FW_sta_info[i].status = 0; report_del_sta_event(padapter, psta->hwaddr , 65535// indicate disconnect caused by no rx ); } } else { pmlmeinfo->FW_sta_info[i].retry = 0; pmlmeinfo->FW_sta_info[i].rx_pkt = (u32)sta_rx_pkts(psta); } } } //set_link_timer(pmlmeext, DISCONNECT_TO); } } void survey_timer_hdl(_adapter *padapter) { struct cmd_obj *ph2c; struct sitesurvey_parm *psurveyPara; struct cmd_priv *pcmdpriv=&padapter->cmdpriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo= &(padapter->wdinfo); #endif //DBG_871X("marc: survey timer\n"); //issue rtw_sitesurvey_cmd if (pmlmeext->sitesurvey_res.state > SCAN_START) { if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS) { #if defined(CONFIG_STA_MODE_SCAN_UNDER_AP_MODE) || defined(CONFIG_ATMEL_RC_PATCH) if( padapter->mlmeextpriv.mlmext_info.scan_cnt != RTW_SCAN_NUM_OF_CH ) #endif pmlmeext->sitesurvey_res.channel_idx++; } if(pmlmeext->scan_abort == _TRUE) { #ifdef CONFIG_P2P if(!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) { rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_MAX); pmlmeext->sitesurvey_res.channel_idx = 3; DBG_871X("%s idx:%d, cnt:%u\n", __FUNCTION__ , pmlmeext->sitesurvey_res.channel_idx , pwdinfo->find_phase_state_exchange_cnt ); } else #endif { pmlmeext->sitesurvey_res.channel_idx = pmlmeext->sitesurvey_res.ch_num; DBG_871X("%s idx:%d\n", __FUNCTION__ , pmlmeext->sitesurvey_res.channel_idx ); } pmlmeext->scan_abort = _FALSE;//reset } if ((ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) { goto exit_survey_timer_hdl; } if ((psurveyPara = (struct sitesurvey_parm*)rtw_zmalloc(sizeof(struct sitesurvey_parm))) == NULL) { rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); goto exit_survey_timer_hdl; } init_h2fwcmd_w_parm_no_rsp(ph2c, psurveyPara, GEN_CMD_CODE(_SiteSurvey)); rtw_enqueue_cmd(pcmdpriv, ph2c); } exit_survey_timer_hdl: return; } void link_timer_hdl(_adapter *padapter) { //static unsigned int rx_pkt = 0; //static u64 tx_cnt = 0; //struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); //struct sta_priv *pstapriv = &padapter->stapriv; if (pmlmeinfo->state & WIFI_FW_AUTH_NULL) { DBG_871X("link_timer_hdl:no beacon while connecting\n"); pmlmeinfo->state = WIFI_FW_NULL_STATE; report_join_res(padapter, -3); } else if (pmlmeinfo->state & WIFI_FW_AUTH_STATE) { //re-auth timer if (++pmlmeinfo->reauth_count > REAUTH_LIMIT) { //if (pmlmeinfo->auth_algo != dot11AuthAlgrthm_Auto) //{ pmlmeinfo->state = 0; report_join_res(padapter, -1); return; //} //else //{ // pmlmeinfo->auth_algo = dot11AuthAlgrthm_Shared; // pmlmeinfo->reauth_count = 0; //} } DBG_871X("link_timer_hdl: auth timeout and try again\n"); pmlmeinfo->auth_seq = 1; issue_auth(padapter, NULL, 0); set_link_timer(pmlmeext, REAUTH_TO); } else if (pmlmeinfo->state & WIFI_FW_ASSOC_STATE) { //re-assoc timer if (++pmlmeinfo->reassoc_count > REASSOC_LIMIT) { pmlmeinfo->state = WIFI_FW_NULL_STATE; report_join_res(padapter, -2); return; } DBG_871X("link_timer_hdl: assoc timeout and try again\n"); issue_assocreq(padapter); set_link_timer(pmlmeext, REASSOC_TO); } #if 0 else if (is_client_associated_to_ap(padapter)) { //linked infrastructure client mode if ((psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress)) != NULL) { /*to monitor whether the AP is alive or not*/ if (rx_pkt == psta->sta_stats.rx_pkts) { receive_disconnect(padapter, pmlmeinfo->network.MacAddress); return; } else { rx_pkt = psta->sta_stats.rx_pkts; set_link_timer(pmlmeext, DISCONNECT_TO); } //update the EDCA paramter according to the Tx/RX mode update_EDCA_param(padapter); /*to send the AP a nulldata if no frame is xmitted in order to keep alive*/ if (pmlmeinfo->link_count++ == 0) { tx_cnt = pxmitpriv->tx_pkts; } else if ((pmlmeinfo->link_count & 0xf) == 0) { if (tx_cnt == pxmitpriv->tx_pkts) { issue_nulldata_in_interrupt(padapter, NULL); } tx_cnt = pxmitpriv->tx_pkts; } } //end of if ((psta = rtw_get_stainfo(pstapriv, passoc_res->network.MacAddress)) != NULL) } else if (is_client_associated_to_ibss(padapter)) { //linked IBSS mode //for each assoc list entry to check the rx pkt counter for (i = IBSS_START_MAC_ID; i < NUM_STA; i++) { if (pmlmeinfo->FW_sta_info[i].status == 1) { psta = pmlmeinfo->FW_sta_info[i].psta; if (pmlmeinfo->FW_sta_info[i].rx_pkt == psta->sta_stats.rx_pkts) { pmlmeinfo->FW_sta_info[i].status = 0; report_del_sta_event(padapter, psta->hwaddr); } else { pmlmeinfo->FW_sta_info[i].rx_pkt = psta->sta_stats.rx_pkts; } } } set_link_timer(pmlmeext, DISCONNECT_TO); } #endif return; } void addba_timer_hdl(struct sta_info *psta) { #ifdef CONFIG_80211N_HT struct ht_priv *phtpriv; if(!psta) return; phtpriv = &psta->htpriv; if((phtpriv->ht_option==_TRUE) && (phtpriv->ampdu_enable==_TRUE)) { if(phtpriv->candidate_tid_bitmap) phtpriv->candidate_tid_bitmap=0x0; } #endif //CONFIG_80211N_HT } #ifdef CONFIG_IEEE80211W void sa_query_timer_hdl(_adapter *padapter) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_priv * pmlmepriv = &padapter->mlmepriv; _irqL irqL; //disconnect _enter_critical_bh(&pmlmepriv->lock, &irqL); if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { rtw_disassoc_cmd(padapter, 0, _TRUE); rtw_indicate_disconnect(padapter); rtw_free_assoc_resources(padapter, 1); } _exit_critical_bh(&pmlmepriv->lock, &irqL); DBG_871X("SA query timeout disconnect\n"); } #endif //CONFIG_IEEE80211W u8 NULL_hdl(_adapter *padapter, u8 *pbuf) { return H2C_SUCCESS; } #ifdef CONFIG_AUTO_AP_MODE void rtw_start_auto_ap(_adapter *adapter) { DBG_871X("%s\n", __FUNCTION__); rtw_set_802_11_infrastructure_mode(adapter, Ndis802_11APMode); rtw_setopmode_cmd(adapter, Ndis802_11APMode,_TRUE); } static int rtw_auto_ap_start_beacon(_adapter *adapter) { int ret=0; u8 *pbuf = NULL; uint len; u8 supportRate[16]; int sz = 0, rateLen; u8 * ie; u8 wireless_mode, oper_channel; u8 ssid[3] = {0}; //hidden ssid u32 ssid_len = sizeof(ssid); struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) return -EINVAL; len = 128; pbuf = rtw_zmalloc(len); if(!pbuf) return -ENOMEM; //generate beacon ie = pbuf; //timestamp will be inserted by hardware sz += 8; ie += sz; //beacon interval : 2bytes *(u16*)ie = cpu_to_le16((u16)100);//BCN_INTERVAL=100; sz += 2; ie += 2; //capability info *(u16*)ie = 0; *(u16*)ie |= cpu_to_le16(cap_ESS); *(u16*)ie |= cpu_to_le16(cap_ShortPremble); //*(u16*)ie |= cpu_to_le16(cap_Privacy); sz += 2; ie += 2; //SSID ie = rtw_set_ie(ie, _SSID_IE_, ssid_len, ssid, &sz); //supported rates wireless_mode = WIRELESS_11BG_24N; rtw_set_supported_rate(supportRate, wireless_mode) ; rateLen = rtw_get_rateset_len(supportRate); if (rateLen > 8) { ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, 8, supportRate, &sz); } else { ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, rateLen, supportRate, &sz); } //DS parameter set if(check_buddy_fwstate(adapter, _FW_LINKED) && check_buddy_fwstate(adapter, WIFI_STATION_STATE)) { PADAPTER pbuddy_adapter = adapter->pbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; oper_channel = pbuddy_mlmeext->cur_channel; } else { oper_channel = adapter_to_dvobj(adapter)->oper_channel; } ie = rtw_set_ie(ie, _DSSET_IE_, 1, &oper_channel, &sz); //ext supported rates if (rateLen > 8) { ie = rtw_set_ie(ie, _EXT_SUPPORTEDRATES_IE_, (rateLen - 8), (supportRate + 8), &sz); } DBG_871X("%s, start auto ap beacon sz=%d\n", __FUNCTION__, sz); //lunch ap mode & start to issue beacon if(rtw_check_beacon_data(adapter, pbuf, sz) == _SUCCESS) { } else { ret = -EINVAL; } rtw_mfree(pbuf, len); return ret; } #endif//CONFIG_AUTO_AP_MODE u8 setopmode_hdl(_adapter *padapter, u8 *pbuf) { u8 type; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct setopmode_parm *psetop = (struct setopmode_parm *)pbuf; if(psetop->mode == Ndis802_11APMode) { pmlmeinfo->state = WIFI_FW_AP_STATE; type = _HW_STATE_AP_; #ifdef CONFIG_NATIVEAP_MLME //start_ap_mode(padapter); #endif } else if(psetop->mode == Ndis802_11Infrastructure) { pmlmeinfo->state &= ~(BIT(0)|BIT(1));// clear state pmlmeinfo->state |= WIFI_FW_STATION_STATE;//set to STATION_STATE type = _HW_STATE_STATION_; } else if(psetop->mode == Ndis802_11IBSS) { type = _HW_STATE_ADHOC_; } else { type = _HW_STATE_NOLINK_; } rtw_hal_set_hwreg(padapter, HW_VAR_SET_OPMODE, (u8 *)(&type)); //Set_NETYPE0_MSR(padapter, type); #ifdef CONFIG_AUTO_AP_MODE if(psetop->mode == Ndis802_11APMode) rtw_auto_ap_start_beacon(padapter); #endif if (rtw_port_switch_chk(padapter) == _TRUE) { rtw_hal_set_hwreg(padapter, HW_VAR_PORT_SWITCH, NULL); if(psetop->mode == Ndis802_11APMode) adapter_to_pwrctl(padapter)->fw_psmode_iface_id = 0xff; //ap mode won't dowload rsvd pages else if (psetop->mode == Ndis802_11Infrastructure) { #ifdef CONFIG_LPS _adapter *port0_iface = dvobj_get_port0_adapter(adapter_to_dvobj(padapter)); if (port0_iface) rtw_lps_ctrl_wk_cmd(port0_iface, LPS_CTRL_CONNECT, 0); #endif } } #ifdef CONFIG_BT_COEXIST if (psetop->mode == Ndis802_11APMode) { // Do this after port switch to // prevent from downloading rsvd page to wrong port rtw_btcoex_MediaStatusNotify(padapter, 1); //connect } #endif // CONFIG_BT_COEXIST return H2C_SUCCESS; } u8 createbss_hdl(_adapter *padapter, u8 *pbuf) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); struct joinbss_parm *pparm = (struct joinbss_parm *)pbuf; //u32 initialgain; #ifdef CONFIG_AP_MODE if (pmlmeinfo->state == WIFI_FW_AP_STATE) { WLAN_BSSID_EX *network = &padapter->mlmepriv.cur_network.network; start_bss_network(padapter, (u8*)network); return H2C_SUCCESS; } #endif //below is for ad-hoc master if(pparm->network.InfrastructureMode == Ndis802_11IBSS) { rtw_joinbss_reset(padapter); pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; pmlmeext->cur_ch_offset= HAL_PRIME_CHNL_OFFSET_DONT_CARE; pmlmeinfo->ERP_enable = 0; pmlmeinfo->WMM_enable = 0; pmlmeinfo->HT_enable = 0; pmlmeinfo->HT_caps_enable = 0; pmlmeinfo->HT_info_enable = 0; pmlmeinfo->agg_enable_bitmap = 0; pmlmeinfo->candidate_tid_bitmap = 0; //config the initial gain under linking, need to write the BB registers //initialgain = 0x1E; //rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); //disable dynamic functions, such as high power, DIG Save_DM_Func_Flag(padapter); Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); //cancel link timer _cancel_timer_ex(&pmlmeext->link_timer); //clear CAM flush_all_cam_entry(padapter); _rtw_memcpy(pnetwork, pbuf, FIELD_OFFSET(WLAN_BSSID_EX, IELength)); pnetwork->IELength = ((WLAN_BSSID_EX *)pbuf)->IELength; if(pnetwork->IELength>MAX_IE_SZ)//Check pbuf->IELength return H2C_PARAMETERS_ERROR; _rtw_memcpy(pnetwork->IEs, ((WLAN_BSSID_EX *)pbuf)->IEs, pnetwork->IELength); start_create_ibss(padapter); } return H2C_SUCCESS; } u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf) { u8 join_type; PNDIS_802_11_VARIABLE_IEs pIE; struct registry_priv *pregpriv = &padapter->registrypriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); #ifdef CONFIG_ANTENNA_DIVERSITY struct joinbss_parm *pparm = (struct joinbss_parm *)pbuf; #endif //CONFIG_ANTENNA_DIVERSITY u32 i; u8 cbw40_enable=0; //u32 initialgain; //u32 acparm; u8 ch, bw, offset; //check already connecting to AP or not if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) { if (pmlmeinfo->state & WIFI_FW_STATION_STATE) { issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, 1, 100); } pmlmeinfo->state = WIFI_FW_NULL_STATE; //clear CAM flush_all_cam_entry(padapter); _cancel_timer_ex(&pmlmeext->link_timer); //set MSR to nolink -> infra. mode //Set_MSR(padapter, _HW_STATE_NOLINK_); Set_MSR(padapter, _HW_STATE_STATION_); rtw_hal_set_hwreg(padapter, HW_VAR_MLME_DISCONNECT, 0); } #ifdef CONFIG_ANTENNA_DIVERSITY rtw_antenna_select_cmd(padapter, pparm->network.PhyInfo.Optimum_antenna, _FALSE); #endif #ifdef CONFIG_WAPI_SUPPORT rtw_wapi_clear_all_cam_entry(padapter); #endif rtw_joinbss_reset(padapter); pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; pmlmeext->cur_ch_offset= HAL_PRIME_CHNL_OFFSET_DONT_CARE; pmlmeinfo->ERP_enable = 0; pmlmeinfo->WMM_enable = 0; pmlmeinfo->HT_enable = 0; pmlmeinfo->HT_caps_enable = 0; pmlmeinfo->HT_info_enable = 0; pmlmeinfo->agg_enable_bitmap = 0; pmlmeinfo->candidate_tid_bitmap = 0; pmlmeinfo->bwmode_updated = _FALSE; //pmlmeinfo->assoc_AP_vendor = HT_IOT_PEER_MAX; pmlmeinfo->VHT_enable = 0; _rtw_memcpy(pnetwork, pbuf, FIELD_OFFSET(WLAN_BSSID_EX, IELength)); pnetwork->IELength = ((WLAN_BSSID_EX *)pbuf)->IELength; if(pnetwork->IELength>MAX_IE_SZ)//Check pbuf->IELength return H2C_PARAMETERS_ERROR; _rtw_memcpy(pnetwork->IEs, ((WLAN_BSSID_EX *)pbuf)->IEs, pnetwork->IELength); pmlmeext->cur_channel = (u8)pnetwork->Configuration.DSConfig; pmlmeinfo->bcn_interval = get_beacon_interval(pnetwork); //Check AP vendor to move rtw_joinbss_cmd() //pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pnetwork->IEs, pnetwork->IELength); //sizeof(NDIS_802_11_FIXED_IEs) for (i = _FIXED_IE_LENGTH_; i < pnetwork->IELength;) { pIE = (PNDIS_802_11_VARIABLE_IEs)(pnetwork->IEs + i); switch (pIE->ElementID) { case _VENDOR_SPECIFIC_IE_://Get WMM IE. if ( _rtw_memcmp(pIE->data, WMM_OUI, 4) ) { WMM_param_handler(padapter, pIE); } break; case _HT_CAPABILITY_IE_: //Get HT Cap IE. pmlmeinfo->HT_caps_enable = 1; break; case _HT_EXTRA_INFO_IE_: //Get HT Info IE. #ifdef CONFIG_80211N_HT pmlmeinfo->HT_info_enable = 1; //spec case only for cisco's ap because cisco's ap issue assoc rsp using mcs rate @40MHz or @20MHz //#if !defined(CONFIG_CONCURRENT_MODE) && !defined(CONFIG_DUALMAC_CONCURRENT) // if(pmlmeinfo->assoc_AP_vendor == ciscoAP) //#endif { struct HT_info_element *pht_info = (struct HT_info_element *)(pIE->data); if (pnetwork->Configuration.DSConfig > 14) { if ((pregpriv->bw_mode >> 4) > CHANNEL_WIDTH_20) cbw40_enable = 1; } else { if ((pregpriv->bw_mode & 0x0f) > CHANNEL_WIDTH_20) cbw40_enable = 1; } if ((cbw40_enable) && (pht_info->infos[0] & BIT(2))) { //switch to the 40M Hz mode according to the AP pmlmeext->cur_bwmode = CHANNEL_WIDTH_40; switch (pht_info->infos[0] & 0x3) { case 1: pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; break; case 3: pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; break; default: pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; break; } DBG_871X("set HT ch/bw before connected\n"); } } #endif //CONFIG_80211N_HT break; #ifdef CONFIG_80211AC_VHT case EID_VHTCapability://Get VHT Cap IE. pmlmeinfo->VHT_enable = 1; break; case EID_VHTOperation://Get VHT Operation IE. if((GET_VHT_OPERATION_ELE_CHL_WIDTH(pIE->data) >= 1) && ((pregpriv->bw_mode >> 4) >= CHANNEL_WIDTH_80)) { pmlmeext->cur_bwmode = CHANNEL_WIDTH_80; DBG_871X("VHT center ch = %d\n", GET_VHT_OPERATION_ELE_CENTER_FREQ1(pIE->data)); DBG_871X("set VHT ch/bw before connected\n"); } break; #endif default: break; } i += (pIE->Length + 2); } #if 0 if (padapter->registrypriv.wifi_spec) { // for WiFi test, follow WMM test plan spec acparm = 0x002F431C; // VO rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm)); acparm = 0x005E541C; // VI rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm)); acparm = 0x0000A525; // BE rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); acparm = 0x0000A549; // BK rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm)); // for WiFi test, mixed mode with intel STA under bg mode throughput issue if (padapter->mlmepriv.htpriv.ht_option == _FALSE){ acparm = 0x00004320; rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); } } else { acparm = 0x002F3217; // VO rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm)); acparm = 0x005E4317; // VI rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm)); acparm = 0x00105320; // BE rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); acparm = 0x0000A444; // BK rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm)); } #endif /* check channel, bandwidth, offset and switch */ #ifdef CONFIG_DUALMAC_CONCURRENT if(dc_handle_join_request(padapter, &ch, &bw, &offset) == _FAIL) { DBG_871X("dc_handle_join_request fail !!!\n"); return H2C_SUCCESS; } #else //NON CONFIG_DUALMAC_CONCURRENT if(rtw_chk_start_clnt_join(padapter, &ch, &bw, &offset) == _FAIL) { report_join_res(padapter, (-4)); return H2C_SUCCESS; } #endif //disable dynamic functions, such as high power, DIG //Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); //config the initial gain under linking, need to write the BB registers //initialgain = 0x1E; //rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress); join_type = 0; rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, NULL); set_channel_bwmode(padapter, ch, offset, bw); //cancel link timer _cancel_timer_ex(&pmlmeext->link_timer); start_clnt_join(padapter); return H2C_SUCCESS; } u8 disconnect_hdl(_adapter *padapter, unsigned char *pbuf) { struct disconnect_parm *param = (struct disconnect_parm *)pbuf; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); u8 val8; if (is_client_associated_to_ap(padapter)) { #ifdef CONFIG_DFS if(padapter->mlmepriv.handle_dfs == _FALSE) #endif //CONFIG_DFS #ifdef CONFIG_PLATFORM_ROCKCHIPS //To avoid connecting to AP fail during resume process, change retry count from 5 to 1 issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, 1, 100); #else issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, param->deauth_timeout_ms/100, 100); #endif //CONFIG_PLATFORM_ROCKCHIPS } #ifdef CONFIG_DFS if( padapter->mlmepriv.handle_dfs == _TRUE ) padapter->mlmepriv.handle_dfs = _FALSE; #endif //CONFIG_DFS if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) { //Stop BCN val8 = 0; rtw_hal_set_hwreg(padapter, HW_VAR_BCN_FUNC, (u8 *)(&val8)); } rtw_mlmeext_disconnect(padapter); rtw_free_uc_swdec_pending_queue(padapter); return H2C_SUCCESS; } int rtw_scan_ch_decision(_adapter *padapter, struct rtw_ieee80211_channel *out, u32 out_num, struct rtw_ieee80211_channel *in, u32 in_num) { int i, j; int scan_ch_num = 0; int set_idx; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; /* clear first */ _rtw_memset(out, 0, sizeof(struct rtw_ieee80211_channel)*out_num); /* acquire channels from in */ j = 0; for (i=0;ichannel_set, in[i].hw_value)) >=0 && rtw_mlme_band_check(padapter, in[i].hw_value) == _TRUE ) { if (j >= out_num) { DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" out_num:%u not enough\n", FUNC_ADPT_ARG(padapter), out_num); break; } _rtw_memcpy(&out[j], &in[i], sizeof(struct rtw_ieee80211_channel)); if(pmlmeext->channel_set[set_idx].ScanType == SCAN_PASSIVE) out[j].flags |= RTW_IEEE80211_CHAN_PASSIVE_SCAN; j++; } if(j>=out_num) break; } /* if out is empty, use channel_set as default */ if(j == 0) { for (i=0;imax_chan_nums;i++) { if (0) DBG_871X(FUNC_ADPT_FMT" ch:%u\n", FUNC_ADPT_ARG(padapter), pmlmeext->channel_set[i].ChannelNum); if (rtw_mlme_band_check(padapter, pmlmeext->channel_set[i].ChannelNum) == _TRUE) { if (j >= out_num) { DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" out_num:%u not enough\n", FUNC_ADPT_ARG(padapter), out_num); break; } out[j].hw_value = pmlmeext->channel_set[i].ChannelNum; if(pmlmeext->channel_set[i].ScanType == SCAN_PASSIVE) out[j].flags |= RTW_IEEE80211_CHAN_PASSIVE_SCAN; j++; } } } #ifdef CONFIG_SCAN_SPARSE //partial scan, ASUS RK3188 use the feature /* assume j>6 is normal scan */ if ((j > 6) && (padapter->registrypriv.wifi_spec != 1)) { static u8 token = 0; u32 interval; if (pmlmeext->last_scan_time == 0) pmlmeext->last_scan_time = rtw_get_current_time(); interval = rtw_get_passing_time_ms(pmlmeext->last_scan_time); if ((interval > ALLOW_SCAN_INTERVAL) #if 0 // Miracast can't do AP scan || (padapter->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE) #ifdef CONFIG_CONCURRENT_MODE || (padapter->pbuddy_adapter && (padapter->pbuddy_adapter->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE)) #endif // CONFIG_CONCURRENT_MODE #endif ) { // modify scan plan int k = 0; _rtw_memset(in, 0, sizeof(struct rtw_ieee80211_channel)*in_num); _rtw_memcpy(in, out, sizeof(struct rtw_ieee80211_channel)*j); _rtw_memset(out, 0, sizeof(struct rtw_ieee80211_channel)*j); for (i=0;i=out_num) break; } j = k; token = (token+1)%SCAN_DIVISION_NUM; } pmlmeext->last_scan_time = rtw_get_current_time(); } #endif //CONFIG_SCAN_SPARSE return j; } u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct sitesurvey_parm *pparm = (struct sitesurvey_parm *)pbuf; u8 bdelayscan = _FALSE; u8 val8; u32 initialgain; u32 i; struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; #ifdef CONFIG_P2P struct wifidirect_info* pwdinfo = &padapter->wdinfo; #endif #ifdef DBG_CHECK_FW_PS_STATE if(rtw_fw_ps_state(padapter) == _FAIL) { DBG_871X("scan without leave 32k\n"); pdbgpriv->dbg_scan_pwr_state_cnt++; } #endif //DBG_CHECK_FW_PS_STATE if (pmlmeext->sitesurvey_res.state == SCAN_DISABLE) { #ifdef CONFIG_CONCURRENT_MODE //for first time sitesurvey_cmd rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_TXBUF, 0); #endif //CONFIG_CONCURRENT_MODE pmlmeext->sitesurvey_res.state = SCAN_START; pmlmeext->sitesurvey_res.bss_cnt = 0; pmlmeext->sitesurvey_res.channel_idx = 0; for(i=0;issid[i].SsidLength) { _rtw_memcpy(pmlmeext->sitesurvey_res.ssid[i].Ssid, pparm->ssid[i].Ssid, IW_ESSID_MAX_SIZE); pmlmeext->sitesurvey_res.ssid[i].SsidLength= pparm->ssid[i].SsidLength; } else { pmlmeext->sitesurvey_res.ssid[i].SsidLength= 0; } } pmlmeext->sitesurvey_res.ch_num = rtw_scan_ch_decision(padapter , pmlmeext->sitesurvey_res.ch, RTW_CHANNEL_SCAN_AMOUNT , pparm->ch, pparm->ch_num ); pmlmeext->sitesurvey_res.scan_mode = pparm->scan_mode; #ifdef CONFIG_DUALMAC_CONCURRENT bdelayscan = dc_handle_site_survey(padapter); #endif //issue null data if associating to the AP if (is_client_associated_to_ap(padapter) == _TRUE) { pmlmeext->sitesurvey_res.state = SCAN_TXNULL; issue_nulldata(padapter, NULL, 1, 3, 500); #ifdef CONFIG_CONCURRENT_MODE if(is_client_associated_to_ap(padapter->pbuddy_adapter) == _TRUE) { DBG_871X("adapter is scanning(buddy_adapter is linked), issue nulldata(pwrbit=1)\n"); issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500); } #endif bdelayscan = _TRUE; } #ifdef CONFIG_CONCURRENT_MODE else if(is_client_associated_to_ap(padapter->pbuddy_adapter) == _TRUE) { #ifdef CONFIG_TDLS if(padapter->pbuddy_adapter->wdinfo.wfd_tdls_enable == 1) { issue_tunneled_probe_req(padapter->pbuddy_adapter); } #endif //CONFIG_TDLS pmlmeext->sitesurvey_res.state = SCAN_TXNULL; issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500); bdelayscan = _TRUE; } #endif if(bdelayscan) { //delay 50ms to protect nulldata(1). set_survey_timer(pmlmeext, 50); return H2C_SUCCESS; } } if ((pmlmeext->sitesurvey_res.state == SCAN_START) || (pmlmeext->sitesurvey_res.state == SCAN_TXNULL)) { #ifdef CONFIG_FIND_BEST_CHANNEL #if 0 for (i=0; pmlmeext->channel_set[i].ChannelNum !=0; i++) { pmlmeext->channel_set[i].rx_count = 0; } #endif #endif /* CONFIG_FIND_BEST_CHANNEL */ //config the initial gain under scaning, need to write the BB registers #ifdef CONFIG_P2P #ifdef CONFIG_IOCTL_CFG80211 if(adapter_wdev_data(padapter)->p2p_enabled == _TRUE && pwdinfo->driver_interface == DRIVER_CFG80211 ) initialgain = 0x30; else #endif //CONFIG_IOCTL_CFG80211 if ( !rtw_p2p_chk_state( pwdinfo, P2P_STATE_NONE ) ) initialgain = 0x28; else #endif //CONFIG_P2P initialgain = 0x1e; rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); //disable dynamic functions, such as high power, DIG Save_DM_Func_Flag(padapter); Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); //set MSR to no link state Set_MSR(padapter, _HW_STATE_NOLINK_); val8 = 1; //under site survey rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); pmlmeext->sitesurvey_res.state = SCAN_PROCESS; } site_survey(padapter); return H2C_SUCCESS; } u8 setauth_hdl(_adapter *padapter, unsigned char *pbuf) { struct setauth_parm *pparm = (struct setauth_parm *)pbuf; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if (pparm->mode < 4) { pmlmeinfo->auth_algo = pparm->mode; } return H2C_SUCCESS; } u8 setkey_hdl(_adapter *padapter, u8 *pbuf) { u16 ctrl = 0; s16 cam_id = 0; struct setkey_parm *pparm = (struct setkey_parm *)pbuf; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); unsigned char null_addr[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; u8 *addr; //main tx key for wep. if(pparm->set_tx) pmlmeinfo->key_index = pparm->keyid; cam_id = rtw_camid_alloc(padapter, NULL, pparm->keyid); if (cam_id < 0){ } else { if (cam_id > 3) /* not default key, searched by A2 */ addr = get_bssid(&padapter->mlmepriv); else addr = null_addr; ctrl = BIT(15) | BIT6 |((pparm->algorithm) << 2) | pparm->keyid; write_cam(padapter, cam_id, ctrl, addr, pparm->key); DBG_871X_LEVEL(_drv_always_, "set group key camid:%d, addr:"MAC_FMT", kid:%d, type:%s\n" ,cam_id, MAC_ARG(addr), pparm->keyid, security_type_str(pparm->algorithm)); } #ifdef DYNAMIC_CAMID_ALLOC if (cam_id >=0 && cam_id <=3) rtw_hal_set_hwreg(padapter, HW_VAR_SEC_DK_CFG, (u8*)_TRUE); #endif //allow multicast packets to driver padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_ON_RCR_AM, null_addr); return H2C_SUCCESS; } u8 set_stakey_hdl(_adapter *padapter, u8 *pbuf) { u16 ctrl = 0; s16 cam_id = 0; u8 ret = H2C_SUCCESS; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct set_stakey_parm *pparm = (struct set_stakey_parm *)pbuf; struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info *psta; #ifdef CONFIG_TDLS struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; #endif //CONFIG_TDLS if(pparm->algorithm == _NO_PRIVACY_) goto write_to_cam; psta = rtw_get_stainfo(pstapriv, pparm->addr); if (!psta) { DBG_871X_LEVEL(_drv_always_, "%s sta:"MAC_FMT" not found\n", __func__, MAC_ARG(pparm->addr)); ret = H2C_REJECTED; goto exit; } pmlmeinfo->enc_algo = pparm->algorithm; cam_id = rtw_camid_alloc(padapter, psta, 0); if (cam_id < 0) goto exit; write_to_cam: if(pparm->algorithm == _NO_PRIVACY_) { while((cam_id = rtw_camid_search(padapter, pparm->addr, -1)) >= 0) { DBG_871X_LEVEL(_drv_always_, "clear key for addr:"MAC_FMT", camid:%d\n", MAC_ARG(pparm->addr), cam_id); clear_cam_entry(padapter, cam_id); rtw_camid_free(padapter,cam_id); } } else { DBG_871X_LEVEL(_drv_always_, "set pairwise key camid:%d, addr:"MAC_FMT", kid:%d, type:%s\n", cam_id, MAC_ARG(pparm->addr), pparm->keyid, security_type_str(pparm->algorithm)); ctrl = BIT(15) | ((pparm->algorithm) << 2) | pparm->keyid; write_cam(padapter, cam_id, ctrl, pparm->addr, pparm->key); } ret = H2C_SUCCESS_RSP; exit: return ret; } u8 add_ba_hdl(_adapter *padapter, unsigned char *pbuf) { struct addBaReq_parm *pparm = (struct addBaReq_parm *)pbuf; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct sta_info *psta = rtw_get_stainfo(&padapter->stapriv, pparm->addr); if(!psta) return H2C_SUCCESS; #ifdef CONFIG_80211N_HT if (((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && (pmlmeinfo->HT_enable)) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) { //pmlmeinfo->ADDBA_retry_count = 0; //pmlmeinfo->candidate_tid_bitmap |= (0x1 << pparm->tid); //psta->htpriv.candidate_tid_bitmap |= BIT(pparm->tid); issue_action_BA(padapter, pparm->addr, RTW_WLAN_ACTION_ADDBA_REQ, (u16)pparm->tid); //_set_timer(&pmlmeext->ADDBA_timer, ADDBA_TO); _set_timer(&psta->addba_retry_timer, ADDBA_TO); } #ifdef CONFIG_TDLS else if((psta->tdls_sta_state & TDLS_LINKED_STATE)&& (psta->htpriv.ht_option==_TRUE) && (psta->htpriv.ampdu_enable==_TRUE) ) { issue_action_BA(padapter, pparm->addr, RTW_WLAN_ACTION_ADDBA_REQ, (u16)pparm->tid); //_set_timer(&pmlmeext->ADDBA_timer, ADDBA_TO); _set_timer(&psta->addba_retry_timer, ADDBA_TO); } #endif //CONFIG else { psta->htpriv.candidate_tid_bitmap &= ~BIT(pparm->tid); } #endif //CONFIG_80211N_HT return H2C_SUCCESS; } u8 chk_bmc_sleepq_cmd(_adapter* padapter) { struct cmd_obj *ph2c; struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); u8 res = _SUCCESS; _func_enter_; if ((ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) { res= _FAIL; goto exit; } init_h2fwcmd_w_parm_no_parm_rsp(ph2c, GEN_CMD_CODE(_ChkBMCSleepq)); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } u8 set_tx_beacon_cmd(_adapter* padapter) { struct cmd_obj *ph2c; struct Tx_Beacon_param *ptxBeacon_parm; struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 res = _SUCCESS; int len_diff = 0; _func_enter_; if ((ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) { res= _FAIL; goto exit; } if ((ptxBeacon_parm = (struct Tx_Beacon_param *)rtw_zmalloc(sizeof(struct Tx_Beacon_param))) == NULL) { rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } _rtw_memcpy(&(ptxBeacon_parm->network), &(pmlmeinfo->network), sizeof(WLAN_BSSID_EX)); len_diff = update_hidden_ssid( ptxBeacon_parm->network.IEs+_BEACON_IE_OFFSET_ , ptxBeacon_parm->network.IELength-_BEACON_IE_OFFSET_ , pmlmeinfo->hidden_ssid_mode ); ptxBeacon_parm->network.IELength += len_diff; init_h2fwcmd_w_parm_no_rsp(ph2c, ptxBeacon_parm, GEN_CMD_CODE(_TX_Beacon)); res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: _func_exit_; return res; } u8 mlme_evt_hdl(_adapter *padapter, unsigned char *pbuf) { u8 evt_code, evt_seq; u16 evt_sz; uint *peventbuf; void (*event_callback)(_adapter *dev, u8 *pbuf); struct evt_priv *pevt_priv = &(padapter->evtpriv); if (pbuf == NULL) goto _abort_event_; peventbuf = (uint*)pbuf; evt_sz = (u16)(*peventbuf&0xffff); evt_seq = (u8)((*peventbuf>>24)&0x7f); evt_code = (u8)((*peventbuf>>16)&0xff); #ifdef CHECK_EVENT_SEQ // checking event sequence... if (evt_seq != (ATOMIC_READ(&pevt_priv->event_seq) & 0x7f) ) { RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("Evetn Seq Error! %d vs %d\n", (evt_seq & 0x7f), (ATOMIC_READ(&pevt_priv->event_seq) & 0x7f))); pevt_priv->event_seq = (evt_seq+1)&0x7f; goto _abort_event_; } #endif // checking if event code is valid if (evt_code >= MAX_C2HEVT) { RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nEvent Code(%d) mismatch!\n", evt_code)); goto _abort_event_; } // checking if event size match the event parm size if ((wlanevents[evt_code].parmsize != 0) && (wlanevents[evt_code].parmsize != evt_sz)) { RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nEvent(%d) Parm Size mismatch (%d vs %d)!\n", evt_code, wlanevents[evt_code].parmsize, evt_sz)); goto _abort_event_; } ATOMIC_INC(&pevt_priv->event_seq); peventbuf += 2; if(peventbuf) { event_callback = wlanevents[evt_code].event_callback; event_callback(padapter, (u8*)peventbuf); pevt_priv->evt_done_cnt++; } _abort_event_: return H2C_SUCCESS; } u8 h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf) { if(!pbuf) return H2C_PARAMETERS_ERROR; return H2C_SUCCESS; } u8 chk_bmc_sleepq_hdl(_adapter *padapter, unsigned char *pbuf) { #ifdef CONFIG_AP_MODE _irqL irqL; struct sta_info *psta_bmc; _list *xmitframe_plist, *xmitframe_phead; struct xmit_frame *pxmitframe=NULL; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct sta_priv *pstapriv = &padapter->stapriv; //for BC/MC Frames psta_bmc = rtw_get_bcmc_stainfo(padapter); if(!psta_bmc) return H2C_SUCCESS; if((pstapriv->tim_bitmap&BIT(0)) && (psta_bmc->sleepq_len>0)) { #ifndef CONFIG_PCI_HCI rtw_msleep_os(10);// 10ms, ATIM(HIQ) Windows #endif //_enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL); _enter_critical_bh(&pxmitpriv->lock, &irqL); xmitframe_phead = get_list_head(&psta_bmc->sleep_q); xmitframe_plist = get_next(xmitframe_phead); while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); xmitframe_plist = get_next(xmitframe_plist); rtw_list_delete(&pxmitframe->list); psta_bmc->sleepq_len--; if(psta_bmc->sleepq_len>0) pxmitframe->attrib.mdata = 1; else pxmitframe->attrib.mdata = 0; pxmitframe->attrib.triggered=1; if (xmitframe_hiq_filter(pxmitframe) == _TRUE) pxmitframe->attrib.qsel = QSLT_HIGH;//HIQ #if 0 _exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); if(rtw_hal_xmit(padapter, pxmitframe) == _TRUE) { rtw_os_xmit_complete(padapter, pxmitframe); } _enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL); #endif rtw_hal_xmitframe_enqueue(padapter, pxmitframe); } //_exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); _exit_critical_bh(&pxmitpriv->lock, &irqL); if (padapter->interface_type != RTW_PCIE) { /* check hi queue and bmc_sleepq */ rtw_chk_hi_queue_cmd(padapter); } } #endif return H2C_SUCCESS; } u8 tx_beacon_hdl(_adapter *padapter, unsigned char *pbuf) { if(send_beacon(padapter)==_FAIL) { DBG_871X("issue_beacon, fail!\n"); return H2C_PARAMETERS_ERROR; } /* tx bc/mc frames after update TIM */ chk_bmc_sleepq_hdl(padapter, NULL); return H2C_SUCCESS; } void change_band_update_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork) { u8 network_type,rate_len, total_rate_len,remainder_rate_len; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 erpinfo=0x4; //DBG_871X("%s\n", __FUNCTION__); if(pmlmeext->cur_channel >= 36) { network_type = WIRELESS_11A; total_rate_len = IEEE80211_NUM_OFDM_RATESLEN; DBG_871X("%s(): change to 5G Band\n",__FUNCTION__); rtw_remove_bcn_ie(padapter, pnetwork, _ERPINFO_IE_); } else { network_type = WIRELESS_11BG; total_rate_len = IEEE80211_CCK_RATE_LEN+IEEE80211_NUM_OFDM_RATESLEN; DBG_871X("%s(): change to 2.4G Band\n",__FUNCTION__); rtw_add_bcn_ie(padapter, pnetwork, _ERPINFO_IE_, &erpinfo, 1); } rtw_set_supported_rate(pnetwork->SupportedRates, network_type); UpdateBrateTbl(padapter, pnetwork->SupportedRates); rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, pnetwork->SupportedRates); if(total_rate_len > 8) { rate_len = 8; remainder_rate_len = total_rate_len - 8; } else { rate_len = total_rate_len; remainder_rate_len = 0; } rtw_add_bcn_ie(padapter, pnetwork, _SUPPORTEDRATES_IE_, pnetwork->SupportedRates, rate_len); if(remainder_rate_len) { rtw_add_bcn_ie(padapter, pnetwork, _EXT_SUPPORTEDRATES_IE_, (pnetwork->SupportedRates+8), remainder_rate_len); } else { rtw_remove_bcn_ie(padapter, pnetwork, _EXT_SUPPORTEDRATES_IE_); } } #ifdef CONFIG_DUALMAC_CONCURRENT void dc_SelectChannel(_adapter *padapter, unsigned char channel) { PADAPTER ptarget_adapter; if( (padapter->pbuddy_adapter != NULL) && (padapter->DualMacConcurrent == _TRUE) && (padapter->adapter_type == SECONDARY_ADAPTER)) { // only mac0 could control BB&RF ptarget_adapter = padapter->pbuddy_adapter; } else { ptarget_adapter = padapter; } _enter_critical_mutex(&(adapter_to_dvobj(ptarget_adapter)->setch_mutex), NULL); rtw_hal_set_chan(ptarget_adapter, channel); _exit_critical_mutex(&(adapter_to_dvobj(ptarget_adapter)->setch_mutex), NULL); } void dc_SetBWMode(_adapter *padapter, unsigned short bwmode, unsigned char channel_offset) { PADAPTER ptarget_adapter; if( (padapter->pbuddy_adapter != NULL) && (padapter->DualMacConcurrent == _TRUE) && (padapter->adapter_type == SECONDARY_ADAPTER)) { // only mac0 could control BB&RF ptarget_adapter = padapter->pbuddy_adapter; } else { ptarget_adapter = padapter; } _enter_critical_mutex(&(adapter_to_dvobj(ptarget_adapter)->setbw_mutex), NULL); rtw_hal_set_bwmode(ptarget_adapter, (CHANNEL_WIDTH)bwmode, channel_offset); _exit_critical_mutex(&(adapter_to_dvobj(ptarget_adapter)->setbw_mutex), NULL); } void dc_set_channel_bwmode_disconnect(_adapter *padapter) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_priv *pbuddy_mlmepriv = NULL; if(pbuddy_adapter != NULL && padapter->DualMacConcurrent == _TRUE) { pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); if((check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) != _TRUE) { //switch to the 20M Hz mode after disconnect pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); } } else { //switch to the 20M Hz mode after disconnect pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); } } u8 dc_handle_join_request(_adapter *padapter, u8 *ch, u8 *bw, u8 *offset) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext = NULL; struct mlme_priv *pbuddy_mlmepriv = NULL; u8 ret = _SUCCESS; if(pbuddy_adapter != NULL && padapter->DualMacConcurrent == _TRUE) { pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); if(pmlmeext->cur_channel != pbuddy_mlmeext->cur_channel || pmlmeext->cur_bwmode != pbuddy_mlmeext->cur_bwmode || pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset) { if((check_fwstate(pbuddy_mlmepriv, WIFI_AP_STATE)) == _TRUE) { //issue deauth to all stas if if2 is at ap mode rtw_sta_flush(pbuddy_adapter); //rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_TXBUF, 0); rtw_hal_set_hwreg(pbuddy_adapter, HW_VAR_CHECK_TXBUF, 0); } else if(check_fwstate(pbuddy_mlmepriv, _FW_LINKED) == _TRUE) { if(pmlmeext->cur_channel == pbuddy_mlmeext->cur_channel) { // CHANNEL_WIDTH_40 or CHANNEL_WIDTH_20 but channel offset is different if((pmlmeext->cur_bwmode == pbuddy_mlmeext->cur_bwmode) && (pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset) ) { report_join_res(padapter, -4); ret = _FAIL; } } else { report_join_res(padapter, -4); ret = _FAIL; } } } else if (is_client_associated_to_ap(pbuddy_adapter) == _TRUE) { issue_nulldata(pbuddy_adapter, NULL, 1, 0, 0); } } if (!ch || !bw || !offset) { rtw_warn_on(1); ret = _FAIL; } if (ret == _SUCCESS) { *ch = pmlmeext->cur_channel; *bw = pmlmeext->cur_bwmode; *offset = pmlmeext->cur_ch_offset; } exit: return ret; } void dc_handle_join_done(_adapter *padapter, u8 join_res) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_priv *pbuddy_mlmepriv = NULL; struct mlme_ext_priv *pbuddy_mlmeext = NULL; struct mlme_ext_info *pbuddy_mlmeinfo = NULL; WLAN_BSSID_EX *pbuddy_network_mlmeext = NULL; u8 change_band = _FALSE; if(pbuddy_adapter != NULL && padapter->DualMacConcurrent == _TRUE) { pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; pbuddy_mlmeinfo = &(pbuddy_mlmeext->mlmext_info); pbuddy_network_mlmeext = &(pbuddy_mlmeinfo->network); if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) && check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) { //restart and update beacon DBG_871X("after join, current adapter, CH=%d, BW=%d, offset=%d\n", pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); if(join_res >= 0) { u8 *p; int ie_len; struct HT_info_element *pht_info=NULL; if((pbuddy_mlmeext->cur_channel <= 14 && pmlmeext->cur_channel >= 36) || (pbuddy_mlmeext->cur_channel >= 36 && pmlmeext->cur_channel <= 14)) { change_band = _TRUE; } //sync channel/bwmode/ch_offset with another adapter pbuddy_mlmeext->cur_channel = pmlmeext->cur_channel; if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40) { p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); if( p && ie_len) { pht_info = (struct HT_info_element *)(p+2); pht_info->infos[0] &= ~(BIT(0)|BIT(1)); //no secondary channel is present } if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_40) { pbuddy_mlmeext->cur_ch_offset = pmlmeext->cur_ch_offset; //to update cur_ch_offset value in beacon if( pht_info ) { switch(pmlmeext->cur_ch_offset) { case HAL_PRIME_CHNL_OFFSET_LOWER: pht_info->infos[0] |= 0x1; break; case HAL_PRIME_CHNL_OFFSET_UPPER: pht_info->infos[0] |= 0x3; break; case HAL_PRIME_CHNL_OFFSET_DONT_CARE: default: break; } } } else if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_20) { pbuddy_mlmeext->cur_bwmode = CHANNEL_WIDTH_20; pbuddy_mlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; if(pmlmeext->cur_channel>0 && pmlmeext->cur_channel<5) { if(pht_info) pht_info->infos[0] |= 0x1; pbuddy_mlmeext->cur_bwmode = CHANNEL_WIDTH_40; pbuddy_mlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; } if(pmlmeext->cur_channel>7 && pmlmeext->cur_channel<(14+1)) { if(pht_info) pht_info->infos[0] |= 0x3; pbuddy_mlmeext->cur_bwmode = CHANNEL_WIDTH_40; pbuddy_mlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; } set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); } } // to update channel value in beacon pbuddy_network_mlmeext->Configuration.DSConfig = pmlmeext->cur_channel; p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _DSSET_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); if(p && ie_len>0) *(p + 2) = pmlmeext->cur_channel; p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); if( p && ie_len) { pht_info = (struct HT_info_element *)(p+2); pht_info->primary_channel = pmlmeext->cur_channel; } // update mlmepriv's cur_network _rtw_memcpy(&pbuddy_mlmepriv->cur_network.network, pbuddy_network_mlmeext, pbuddy_network_mlmeext->Length); } else { // switch back to original channel/bwmode/ch_offset; set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); } DBG_871X("after join, another adapter, CH=%d, BW=%d, offset=%d\n", pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); if(change_band == _TRUE) change_band_update_ie(pbuddy_adapter, pbuddy_network_mlmeext); DBG_871X("update pbuddy_adapter's beacon\n"); update_beacon(pbuddy_adapter, 0, NULL, _TRUE); } else if (is_client_associated_to_ap(pbuddy_adapter) == _TRUE) { if((pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40) && (pmlmeext->cur_bwmode == CHANNEL_WIDTH_20)) { set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); } issue_nulldata(pbuddy_adapter, NULL, 0, 0, 0); } } } sint dc_check_fwstate(_adapter *padapter, sint fw_state) { PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_priv *pbuddy_mlmepriv = NULL; if(padapter->pbuddy_adapter != NULL && padapter->DualMacConcurrent == _TRUE) { pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); return check_fwstate(pbuddy_mlmepriv, fw_state); } return _FALSE; } u8 dc_handle_site_survey(_adapter *padapter) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; // only mac0 can do scan request, help issue nulldata(1) for mac1 if(pbuddy_adapter != NULL && padapter->DualMacConcurrent == _TRUE) { if (is_client_associated_to_ap(pbuddy_adapter) == _TRUE) { pmlmeext->sitesurvey_res.state = SCAN_TXNULL; issue_nulldata(pbuddy_adapter, NULL, 1, 2, 0); return _TRUE; } } return _FALSE; } void dc_report_survey_event(_adapter *padapter, union recv_frame *precv_frame) { if(padapter->pbuddy_adapter != NULL && padapter->DualMacConcurrent == _TRUE) { report_survey_event(padapter->pbuddy_adapter, precv_frame); } } void dc_set_channel_bwmode_survey_done(_adapter *padapter) { struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_priv *pbuddy_mlmepriv = NULL; struct mlme_ext_priv *pbuddy_mlmeext = NULL; struct mlme_ext_info *pbuddy_mlmeinfo = NULL; u8 cur_channel; u8 cur_bwmode; u8 cur_ch_offset; if(pbuddy_adapter != NULL && padapter->DualMacConcurrent == _TRUE) { pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; pbuddy_mlmeinfo = &(pbuddy_mlmeext->mlmext_info); if(check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) { if(check_fwstate(pmlmepriv, _FW_LINKED) && (pmlmeext->cur_bwmode == CHANNEL_WIDTH_40)) { cur_channel = pmlmeext->cur_channel; cur_bwmode = pmlmeext->cur_bwmode; cur_ch_offset = pmlmeext->cur_ch_offset; } else { cur_channel = pbuddy_mlmeext->cur_channel; cur_bwmode = pbuddy_mlmeext->cur_bwmode; cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; } } else { cur_channel = pmlmeext->cur_channel; cur_bwmode = pmlmeext->cur_bwmode; cur_ch_offset = pmlmeext->cur_ch_offset; } set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); if (is_client_associated_to_ap(pbuddy_adapter) == _TRUE) { //issue null data issue_nulldata(pbuddy_adapter, NULL, 0, 0, 0); } if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) && check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) { DBG_871X("survey done, current CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); DBG_871X("restart pbuddy_adapter's beacon\n"); update_beacon(pbuddy_adapter, 0, NULL, _TRUE); } } else { set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); } } void dc_set_ap_channel_bandwidth(_adapter *padapter, u8 channel, u8 channel_offset, u8 bwmode) { u8 *p; u8 val8, cur_channel, cur_bwmode, cur_ch_offset, change_band; int ie_len; struct registry_priv *pregpriv = &padapter->registrypriv; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct HT_info_element *pht_info=NULL; _adapter *pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_priv *pbuddy_mlmepriv = NULL; struct mlme_ext_priv *pbuddy_mlmeext = NULL; DBG_871X("dualmac_concurrent_ap_set_channel_bwmode ==>\n"); cur_channel = channel; cur_bwmode = bwmode; cur_ch_offset = channel_offset; change_band = _FALSE; p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); if( p && ie_len) { pht_info = (struct HT_info_element *)(p+2); } if(pbuddy_adapter != NULL && padapter->DualMacConcurrent == _TRUE) { pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; if(!check_fwstate(pbuddy_mlmepriv, _FW_LINKED|_FW_UNDER_LINKING|_FW_UNDER_SURVEY)) { set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); } else if(check_fwstate(pbuddy_mlmepriv, _FW_LINKED)==_TRUE) { //To sync cur_channel/cur_bwmode/cur_ch_offset with another adapter DBG_871X("Another iface is at linked state, sync cur_channel/cur_bwmode/cur_ch_offset\n"); DBG_871X("Another adapter, CH=%d, BW=%d, offset=%d\n", pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); DBG_871X("Current adapter, CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); cur_channel = pbuddy_mlmeext->cur_channel; if(cur_bwmode == CHANNEL_WIDTH_40) { if(pht_info) pht_info->infos[0] &= ~(BIT(0)|BIT(1)); if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40) { cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; //to update cur_ch_offset value in beacon if(pht_info) { switch(cur_ch_offset) { case HAL_PRIME_CHNL_OFFSET_LOWER: pht_info->infos[0] |= 0x1; break; case HAL_PRIME_CHNL_OFFSET_UPPER: pht_info->infos[0] |= 0x3; break; case HAL_PRIME_CHNL_OFFSET_DONT_CARE: default: break; } } } else if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_20) { cur_bwmode = CHANNEL_WIDTH_20; cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; if(cur_channel>0 && cur_channel<5) { if(pht_info) pht_info->infos[0] |= 0x1; cur_bwmode = CHANNEL_WIDTH_40; cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; } if(cur_channel>7 && cur_channel<(14+1)) { if(pht_info) pht_info->infos[0] |= 0x3; cur_bwmode = CHANNEL_WIDTH_40; cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; } set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); } } // to update channel value in beacon pnetwork->Configuration.DSConfig = cur_channel; p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _DSSET_IE_, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); if(p && ie_len>0) *(p + 2) = cur_channel; if(pht_info) pht_info->primary_channel = cur_channel; } } else { set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); } DBG_871X("CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); if((channel <= 14 && cur_channel >= 36) || (channel >= 36 && cur_channel <= 14)) { change_band = _TRUE; } pmlmeext->cur_channel = cur_channel; pmlmeext->cur_bwmode = cur_bwmode; pmlmeext->cur_ch_offset = cur_ch_offset; if(change_band == _TRUE) change_band_update_ie(padapter, pnetwork); DBG_871X("dualmac_concurrent_ap_set_channel_bwmode <==\n"); } void dc_resume_xmit(_adapter *padapter) { PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; if(pbuddy_adapter != NULL && padapter->DualMacConcurrent == _TRUE) { DBG_871X("dc_resume_xmit, resume pbuddy_adapter Tx\n"); rtw_os_xmit_schedule(pbuddy_adapter); } } u8 dc_check_xmit(_adapter *padapter) { PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_priv *pbuddy_mlmepriv = NULL; if(pbuddy_adapter != NULL && padapter->DualMacConcurrent == _TRUE) { pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); if (check_fwstate(pbuddy_mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) { DBG_871X("dc_check_xmit pbuddy_adapter is under survey or under linking\n"); return _FALSE; } } return _TRUE; } #endif #ifdef CONFIG_CONCURRENT_MODE sint check_buddy_mlmeinfo_state(_adapter *padapter, u32 state) { PADAPTER pbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext; struct mlme_ext_info *pbuddy_mlmeinfo; if(padapter == NULL) return _FALSE; pbuddy_adapter = padapter->pbuddy_adapter; if(pbuddy_adapter == NULL) return _FALSE; pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; pbuddy_mlmeinfo = &(pbuddy_mlmeext->mlmext_info); if((pbuddy_mlmeinfo->state&0x03) == state) return _TRUE; return _FALSE; } void concurrent_chk_joinbss_done(_adapter *padapter, int join_res) { struct mlme_ext_priv *pmlmeext; struct mlme_ext_info *pmlmeinfo; PADAPTER pbuddy_adapter; struct mlme_priv *pbuddy_mlmepriv; struct mlme_ext_priv *pbuddy_mlmeext; struct mlme_ext_info *pbuddy_mlmeinfo; WLAN_BSSID_EX *pbuddy_network_mlmeext; WLAN_BSSID_EX *pnetwork; pmlmeext = &padapter->mlmeextpriv; pmlmeinfo = &(pmlmeext->mlmext_info); if(!rtw_buddy_adapter_up(padapter)) { set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); return; } pbuddy_adapter = padapter->pbuddy_adapter; pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); pnetwork = (WLAN_BSSID_EX *)&pbuddy_mlmepriv->cur_network.network; pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; pbuddy_mlmeinfo = &(pbuddy_mlmeext->mlmext_info); pbuddy_network_mlmeext = &(pbuddy_mlmeinfo->network); if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) && check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) { //restart and update beacon DBG_871X("after join,primary adapter, CH=%d, BW=%d, offset=%d\n" , pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); if(join_res >= 0) { u8 *p; int ie_len; u8 change_band = _FALSE; struct HT_info_element *pht_info=NULL; if((pmlmeext->cur_channel <= 14 && pbuddy_mlmeext->cur_channel >= 36) || (pmlmeext->cur_channel >= 36 && pbuddy_mlmeext->cur_channel <= 14)) change_band = _TRUE; p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); if( p && ie_len) { pht_info = (struct HT_info_element *)(p+2); pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK; //no secondary channel is present } pbuddy_mlmeext->cur_channel = pmlmeext->cur_channel; #ifdef CONFIG_80211AC_VHT if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_80) { u8 *pvht_cap_ie, *pvht_op_ie; int vht_cap_ielen, vht_op_ielen; pvht_cap_ie = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_VHTCapability, &vht_cap_ielen, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); pvht_op_ie = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_VHTOperation, &vht_op_ielen, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); if(pmlmeext->cur_channel <= 14) // downgrade to 20/40Mhz { //modify vht cap ie if( pvht_cap_ie && vht_cap_ielen) { SET_VHT_CAPABILITY_ELE_SHORT_GI80M(pvht_cap_ie+2, 0); } //modify vht op ie if( pvht_op_ie && vht_op_ielen) { SET_VHT_OPERATION_ELE_CHL_WIDTH(pvht_op_ie+2, 0); //change to 20/40Mhz SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(pvht_op_ie+2, 0); SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(pvht_op_ie+2, 0); //SET_VHT_OPERATION_ELE_BASIC_MCS_SET(p+2, 0xFFFF); pbuddy_mlmeext->cur_bwmode = CHANNEL_WIDTH_40; } } else { u8 center_freq; pbuddy_mlmeext->cur_bwmode = CHANNEL_WIDTH_80; if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_40 || pmlmeext->cur_bwmode == CHANNEL_WIDTH_80) { pbuddy_mlmeext->cur_ch_offset = pmlmeext->cur_ch_offset; } else if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_20) { pbuddy_mlmeext->cur_ch_offset = rtw_get_offset_by_ch(pmlmeext->cur_channel); } //modify ht info ie if(pht_info) pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK; switch(pbuddy_mlmeext->cur_ch_offset) { case HAL_PRIME_CHNL_OFFSET_LOWER: if(pht_info) pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE; //cur_bwmode = CHANNEL_WIDTH_40; break; case HAL_PRIME_CHNL_OFFSET_UPPER: if(pht_info) pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW; //cur_bwmode = CHANNEL_WIDTH_40; break; case HAL_PRIME_CHNL_OFFSET_DONT_CARE: default: if(pht_info) pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK; pbuddy_mlmeext->cur_bwmode = CHANNEL_WIDTH_20; pbuddy_mlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; break; } //modify vht op ie center_freq = rtw_get_center_ch(pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, HAL_PRIME_CHNL_OFFSET_LOWER); if( pvht_op_ie && vht_op_ielen) SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(pvht_op_ie+2, center_freq); set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); } } #endif //CONFIG_80211AC_VHT if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40) { p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); if( p && ie_len) { pht_info = (struct HT_info_element *)(p+2); pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK; //no secondary channel is present } if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_40 || pmlmeext->cur_bwmode == CHANNEL_WIDTH_80) { pbuddy_mlmeext->cur_ch_offset = pmlmeext->cur_ch_offset; //to update cur_ch_offset value in beacon if( pht_info ) { switch(pmlmeext->cur_ch_offset) { case HAL_PRIME_CHNL_OFFSET_LOWER: pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE; break; case HAL_PRIME_CHNL_OFFSET_UPPER: pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW; break; case HAL_PRIME_CHNL_OFFSET_DONT_CARE: default: break; } } } else if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_20) { pbuddy_mlmeext->cur_ch_offset = rtw_get_offset_by_ch(pmlmeext->cur_channel); switch(pbuddy_mlmeext->cur_ch_offset) { case HAL_PRIME_CHNL_OFFSET_LOWER: if(pht_info) pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE; pbuddy_mlmeext->cur_bwmode = CHANNEL_WIDTH_40; break; case HAL_PRIME_CHNL_OFFSET_UPPER: if(pht_info) pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW; pbuddy_mlmeext->cur_bwmode = CHANNEL_WIDTH_40; break; case HAL_PRIME_CHNL_OFFSET_DONT_CARE: default: if(pht_info) pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK; pbuddy_mlmeext->cur_bwmode = CHANNEL_WIDTH_20; pbuddy_mlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; break; } } set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); } else { set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); } // to update channel value in beacon pbuddy_network_mlmeext->Configuration.DSConfig = pmlmeext->cur_channel; p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _DSSET_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); if(p && ie_len>0) *(p + 2) = pmlmeext->cur_channel; p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); if( p && ie_len) { pht_info = (struct HT_info_element *)(p+2); pht_info->primary_channel = pmlmeext->cur_channel; } //buddy interface band is different from current interface, update ERP, support rate, ext support rate IE if(change_band == _TRUE) change_band_update_ie(pbuddy_adapter, pbuddy_network_mlmeext); } else { // switch back to original channel/bwmode/ch_offset; set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); } DBG_871X("after join, second adapter, CH=%d, BW=%d, offset=%d\n", pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); DBG_871X("update pbuddy_adapter's beacon\n"); _rtw_memcpy(pnetwork, pbuddy_network_mlmeext, sizeof(WLAN_BSSID_EX)); //update bmc rate to avoid bb cck hang update_bmc_sta(pbuddy_adapter); update_beacon(pbuddy_adapter, 0, NULL, _TRUE); } else if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) && check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) { if(join_res >= 0) { pbuddy_mlmeext->cur_channel = pmlmeext->cur_channel; if(pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40 || pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_80) set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); else if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_40 || pmlmeext->cur_bwmode == CHANNEL_WIDTH_80) set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); else set_channel_bwmode(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); } else { // switch back to original channel/bwmode/ch_offset; set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); } } else { set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); } } #endif //CONFIG_CONCURRENT_MODE int rtw_chk_start_clnt_join(_adapter *padapter, u8 *ch, u8 *bw, u8 *offset) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; unsigned char cur_ch = pmlmeext->cur_channel; unsigned char cur_bw = pmlmeext->cur_bwmode; unsigned char cur_ch_offset = pmlmeext->cur_ch_offset; bool chbw_allow = _TRUE; bool connect_allow = _TRUE; #ifdef CONFIG_CONCURRENT_MODE PADAPTER pbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext; struct mlme_ext_info *pbuddy_pmlmeinfo; struct mlme_priv *pbuddy_mlmepriv; if (!rtw_buddy_adapter_up(padapter)) { goto exit; } pbuddy_adapter = padapter->pbuddy_adapter; pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; pbuddy_pmlmeinfo = &(pbuddy_mlmeext->mlmext_info); pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); if((pbuddy_pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)//for AP MODE { DBG_871X("start_clnt_join: "ADPT_FMT"(ch=%d, bw=%d, ch_offset=%d)" ", "ADPT_FMT" AP mode(ch=%d, bw=%d, ch_offset=%d)\n", ADPT_ARG(padapter), pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset, ADPT_ARG(pbuddy_adapter), pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); if(pmlmeext->cur_channel != pbuddy_mlmeext->cur_channel) { chbw_allow = _FALSE; } else if((pmlmeext->cur_bwmode == CHANNEL_WIDTH_40) && (pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40) && (pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset)) { chbw_allow = _FALSE; } else if((pmlmeext->cur_bwmode == CHANNEL_WIDTH_20) && ((pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40)|| (pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_80)) ) { cur_ch = pmlmeext->cur_channel; cur_bw = pbuddy_mlmeext->cur_bwmode; cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; } DBG_871X("start_clnt_join: connect_allow:%d, chbw_allow:%d\n", connect_allow, chbw_allow); if (chbw_allow == _FALSE) { #ifdef CONFIG_SPCT_CH_SWITCH if (1) { rtw_ap_inform_ch_switch(pbuddy_adapter, pmlmeext->cur_channel , pmlmeext->cur_ch_offset); } else #endif { //issue deauth to all stas if if2 is at ap mode rtw_sta_flush(pbuddy_adapter); } rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_TXBUF, 0); } } else if(check_fwstate(pbuddy_mlmepriv, _FW_LINKED) == _TRUE && check_fwstate(pbuddy_mlmepriv, WIFI_STATION_STATE) == _TRUE) //for Client Mode/p2p client { DBG_871X("start_clnt_join: "ADPT_FMT"(ch=%d, bw=%d, ch_offset=%d)" ", "ADPT_FMT" STA mode(ch=%d, bw=%d, ch_offset=%d)\n", ADPT_ARG(padapter), pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset, ADPT_ARG(pbuddy_adapter), pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); if(pmlmeext->cur_channel != pbuddy_mlmeext->cur_channel) { chbw_allow = _FALSE; } else if((pmlmeext->cur_bwmode == CHANNEL_WIDTH_20) && (pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40)) { cur_bw = CHANNEL_WIDTH_40; cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; } else if((pmlmeext->cur_bwmode == CHANNEL_WIDTH_20) && (pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_80)) { cur_bw = CHANNEL_WIDTH_80; cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; } else if((pmlmeext->cur_bwmode == CHANNEL_WIDTH_40) && (pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40) && (pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset)) { chbw_allow = _FALSE; } else if((pmlmeext->cur_bwmode == CHANNEL_WIDTH_40) && (pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_80)) { if(pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset) { chbw_allow = _FALSE; } else { cur_bw = CHANNEL_WIDTH_80; } } else if((pmlmeext->cur_bwmode == CHANNEL_WIDTH_80) && (pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_40)) { if(pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset) { chbw_allow = _FALSE; } } else if((pmlmeext->cur_bwmode == CHANNEL_WIDTH_80) && (pbuddy_mlmeext->cur_bwmode == CHANNEL_WIDTH_80)) { if(pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset) { chbw_allow = _FALSE; } } connect_allow = chbw_allow; #ifdef CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) /* wlan0-sta mode has higher priority than p2p0-p2p client */ if (!rtw_p2p_chk_state(&(pbuddy_adapter->wdinfo), P2P_STATE_NONE) && pbuddy_adapter->wdinfo.driver_interface == DRIVER_CFG80211) { connect_allow = _TRUE; } #endif /* CONFIG_P2P && CONFIG_IOCTL_CFG80211 */ #else connect_allow = _TRUE; #endif /* CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT */ DBG_871X("start_clnt_join: connect_allow:%d, chbw_allow:%d\n", connect_allow, chbw_allow); if (connect_allow == _TRUE && chbw_allow == _FALSE) { /* disconnect buddy's connection */ rtw_disassoc_cmd(pbuddy_adapter, 500, _FALSE); rtw_indicate_disconnect(pbuddy_adapter); rtw_free_assoc_resources(pbuddy_adapter, 1); } } exit: #endif /* CONFIG_CONCURRENT_MODE */ if (!ch || !bw || !offset) { rtw_warn_on(1); connect_allow = _FALSE; } if (connect_allow == _TRUE) { DBG_871X("start_join_set_ch_bw: ch=%d, bwmode=%d, ch_offset=%d\n", cur_ch, cur_bw, cur_ch_offset); *ch = cur_ch; *bw = cur_bw; *offset = cur_ch_offset; } return connect_allow == _TRUE ? _SUCCESS : _FAIL; } /* Find union about ch, bw, ch_offset of all linked/linking interfaces */ int rtw_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); _adapter *iface; struct mlme_ext_priv *mlmeext; int i; u8 ch_ret = 0; u8 bw_ret = CHANNEL_WIDTH_20; u8 offset_ret = HAL_PRIME_CHNL_OFFSET_DONT_CARE; int num = 0; if (ch) *ch = 0; if (bw) *bw = CHANNEL_WIDTH_20; if (offset) *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; for (i = 0; iiface_nums; i++) { iface = dvobj->padapters[i]; mlmeext = &iface->mlmeextpriv; if (!check_fwstate(&iface->mlmepriv, _FW_LINKED|_FW_UNDER_LINKING)) continue; if (num == 0) { ch_ret = mlmeext->cur_channel; bw_ret = mlmeext->cur_bwmode; offset_ret = mlmeext->cur_ch_offset; num++; continue; } if (ch_ret != mlmeext->cur_channel) { num = 0; break; } if (bw_ret < mlmeext->cur_bwmode) { bw_ret = mlmeext->cur_bwmode; offset_ret = mlmeext->cur_ch_offset; } else if (bw_ret == mlmeext->cur_bwmode && offset_ret != mlmeext->cur_ch_offset) { num = 0; break; } num++; } if (num) { if (ch) *ch = ch_ret; if (bw) *bw = bw_ret; if (offset) *offset = offset_ret; } return num; } u8 set_ch_hdl(_adapter *padapter, u8 *pbuf) { struct set_ch_parm *set_ch_parm; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; if(!pbuf) return H2C_PARAMETERS_ERROR; set_ch_parm = (struct set_ch_parm *)pbuf; DBG_871X(FUNC_NDEV_FMT" ch:%u, bw:%u, ch_offset:%u\n", FUNC_NDEV_ARG(padapter->pnetdev), set_ch_parm->ch, set_ch_parm->bw, set_ch_parm->ch_offset); pmlmeext->cur_channel = set_ch_parm->ch; pmlmeext->cur_ch_offset = set_ch_parm->ch_offset; pmlmeext->cur_bwmode = set_ch_parm->bw; set_channel_bwmode(padapter, set_ch_parm->ch, set_ch_parm->ch_offset, set_ch_parm->bw); return H2C_SUCCESS; } u8 set_chplan_hdl(_adapter *padapter, unsigned char *pbuf) { struct SetChannelPlan_param *setChannelPlan_param; struct mlme_priv *mlme = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; if(!pbuf) return H2C_PARAMETERS_ERROR; setChannelPlan_param = (struct SetChannelPlan_param *)pbuf; if(!rtw_is_channel_plan_valid(setChannelPlan_param->channel_plan)) { return H2C_PARAMETERS_ERROR; } mlme->ChannelPlan = setChannelPlan_param->channel_plan; pmlmeext->max_chan_nums = init_channel_set(padapter, setChannelPlan_param->channel_plan, pmlmeext->channel_set); init_channel_list(padapter, pmlmeext->channel_set, pmlmeext->max_chan_nums, &pmlmeext->channel_list); rtw_hal_set_odm_var(padapter,HAL_ODM_REGULATION,NULL,_TRUE); #ifdef CONFIG_IOCTL_CFG80211 rtw_reg_notify_by_driver(padapter); #endif //CONFIG_IOCTL_CFG80211 return H2C_SUCCESS; } u8 led_blink_hdl(_adapter *padapter, unsigned char *pbuf) { struct LedBlink_param *ledBlink_param; if(!pbuf) return H2C_PARAMETERS_ERROR; ledBlink_param = (struct LedBlink_param *)pbuf; #ifdef CONFIG_LED_HANDLED_BY_CMD_THREAD BlinkHandler((PLED_DATA)ledBlink_param->pLed); #endif return H2C_SUCCESS; } u8 set_csa_hdl(_adapter *padapter, unsigned char *pbuf) { #ifdef CONFIG_DFS struct SetChannelSwitch_param *setChannelSwitch_param; u8 new_ch_no; u8 gval8 = 0x00, sval8 = 0xff; if(!pbuf) return H2C_PARAMETERS_ERROR; setChannelSwitch_param = (struct SetChannelSwitch_param *)pbuf; new_ch_no = setChannelSwitch_param->new_ch_no; rtw_hal_get_hwreg(padapter, HW_VAR_TXPAUSE, &gval8); rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, &sval8); DBG_871X("DFS detected! Swiching channel to %d!\n", new_ch_no); SelectChannel(padapter, new_ch_no); rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, &gval8); rtw_disassoc_cmd(padapter, 0, _FALSE); rtw_indicate_disconnect(padapter); rtw_free_assoc_resources(padapter, 1); rtw_free_network_queue(padapter, _TRUE); if ( ((new_ch_no >= 52) && (new_ch_no <= 64)) ||((new_ch_no >= 100) && (new_ch_no <= 140)) ) { DBG_871X("Switched to DFS band (ch %02x) again!!\n", new_ch_no); } return H2C_SUCCESS; #else return H2C_REJECTED; #endif //CONFIG_DFS } // TDLS_ESTABLISHED : write RCR DATA BIT // TDLS_CS_OFF : go back to the channel linked with AP, terminating channel switch procedure // TDLS_INIT_CH_SEN : init channel sensing, receive all data and mgnt frame // TDLS_DONE_CH_SEN: channel sensing and report candidate channel // TDLS_OFF_CH : first time set channel to off channel // TDLS_BASE_CH : go back tp the channel linked with AP when set base channel as target channel // TDLS_P_OFF_CH : periodically go to off channel // TDLS_P_BASE_CH : periodically go back to base channel // TDLS_RS_RCR : restore RCR // TDLS_TEAR_STA : free tdls sta u8 tdls_hdl(_adapter *padapter, unsigned char *pbuf) { #ifdef CONFIG_TDLS _irqL irqL; struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; struct TDLSoption_param *TDLSoption; struct sta_info *ptdls_sta; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; u8 survey_channel, i, min, option; if(!pbuf) return H2C_PARAMETERS_ERROR; TDLSoption = (struct TDLSoption_param *)pbuf; ptdls_sta = rtw_get_stainfo( &(padapter->stapriv), TDLSoption->addr ); option = TDLSoption->option; if( ptdls_sta == NULL ) { if( option != TDLS_RS_RCR ) return H2C_REJECTED; } //_enter_critical_bh(&(ptdlsinfo->hdl_lock), &irqL); DBG_871X("[%s] option:%d\n", __FUNCTION__, option); switch(option){ case TDLS_ESTABLISHED: { u8 sta_band = 0; //leave ALL PS when TDLS is established rtw_pwr_wakeup(padapter); //As long as TDLS handshake success, we should set RCR_CBSSID_DATA bit to 0 //so we can receive all kinds of data frames. rtw_hal_set_hwreg(padapter, HW_VAR_TDLS_WRCR, 0); DBG_871X("Created Direct Link with "MAC_FMT"\n", MAC_ARG(ptdls_sta->hwaddr)); pmlmeinfo->FW_sta_info[ptdls_sta->mac_id].psta = ptdls_sta; //set TDLS sta rate. //update station supportRate rtw_hal_update_sta_rate_mask(padapter, ptdls_sta); if(padapter->mlmeextpriv.cur_channel > 14) { if (ptdls_sta->ra_mask & 0xffff000) sta_band |= WIRELESS_11_5N ; if (ptdls_sta->ra_mask & 0xff0) sta_band |= WIRELESS_11A; // 5G band #ifdef CONFIG_80211AC_VHT if (ptdls_sta->vhtpriv.vht_option) { sta_band = WIRELESS_11_5AC; } #endif } else { if (ptdls_sta->ra_mask & 0xffff000) sta_band |= WIRELESS_11_24N; if (ptdls_sta->ra_mask & 0xff0) sta_band |= WIRELESS_11G; if (ptdls_sta->ra_mask & 0x0f) sta_band |= WIRELESS_11B; } ptdls_sta->wireless_mode = sta_band; ptdls_sta->raid = rtw_hal_networktype_to_raid(padapter,ptdls_sta); set_sta_rate(padapter, ptdls_sta); //sta mode rtw_hal_set_odm_var(padapter,HAL_ODM_STA_INFO,ptdls_sta,_TRUE); break; } case TDLS_SD_PTI: ptdls_sta->tdls_sta_state |= TDLS_WAIT_PTR_STATE; issue_tdls_peer_traffic_indication(padapter, ptdls_sta); _set_timer(&ptdls_sta->pti_timer, TDLS_PTI_TIME); break; case TDLS_CS_OFF: _cancel_timer_ex(&ptdls_sta->base_ch_timer); _cancel_timer_ex(&ptdls_sta->off_ch_timer); SelectChannel(padapter, pmlmeext->cur_channel); ptdls_sta->tdls_sta_state &= ~(TDLS_CH_SWITCH_ON_STATE | TDLS_PEER_AT_OFF_STATE | TDLS_AT_OFF_CH_STATE); DBG_871X("go back to base channel\n "); issue_nulldata(padapter, NULL, 0, 0, 0); break; case TDLS_INIT_CH_SEN: rtw_hal_set_hwreg(padapter, HW_VAR_TDLS_INIT_CH_SEN, 0); pmlmeext->sitesurvey_res.channel_idx = 0; ptdls_sta->option = TDLS_DONE_CH_SEN; rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_DONE_CH_SEN); break; case TDLS_DONE_CH_SEN: survey_channel = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ChannelNum; if(survey_channel){ SelectChannel(padapter, survey_channel); ptdlsinfo->cur_channel = survey_channel; pmlmeext->sitesurvey_res.channel_idx++; _set_timer(&ptdls_sta->option_timer, SURVEY_TO); }else{ SelectChannel(padapter, pmlmeext->cur_channel); rtw_hal_set_hwreg(padapter, HW_VAR_TDLS_DONE_CH_SEN, 0); if(ptdlsinfo->ch_sensing==1){ ptdlsinfo->ch_sensing=0; ptdlsinfo->cur_channel=1; min=ptdlsinfo->collect_pkt_num[0]; for(i=1; i ptdlsinfo->collect_pkt_num[i]){ ptdlsinfo->cur_channel=i+1; min=ptdlsinfo->collect_pkt_num[i]; } ptdlsinfo->collect_pkt_num[i]=0; } ptdlsinfo->collect_pkt_num[0]=0; ptdlsinfo->candidate_ch=ptdlsinfo->cur_channel; DBG_871X("TDLS channel sensing done, candidate channel: %02x\n", ptdlsinfo->candidate_ch); ptdlsinfo->cur_channel=0; } if(ptdls_sta->tdls_sta_state & TDLS_PEER_SLEEP_STATE){ ptdls_sta->tdls_sta_state |= TDLS_APSD_CHSW_STATE; }else{ //send null data with pwrbit==1 before send ch_switching_req to peer STA. issue_nulldata(padapter, NULL, 1, 0, 0); ptdls_sta->tdls_sta_state |= TDLS_CH_SW_INITIATOR_STATE; issue_tdls_ch_switch_req(padapter, ptdls_sta->hwaddr); DBG_871X("issue tdls ch switch req\n"); } } break; case TDLS_OFF_CH: issue_nulldata(padapter, NULL, 1, 0, 0); SelectChannel(padapter, ptdls_sta->off_ch); DBG_871X("change channel to tar ch:%02x\n", ptdls_sta->off_ch); ptdls_sta->tdls_sta_state |= TDLS_AT_OFF_CH_STATE; ptdls_sta->tdls_sta_state &= ~(TDLS_PEER_AT_OFF_STATE); _set_timer(&ptdls_sta->option_timer, (u32)ptdls_sta->ch_switch_time); break; case TDLS_BASE_CH: _cancel_timer_ex(&ptdls_sta->base_ch_timer); _cancel_timer_ex(&ptdls_sta->off_ch_timer); SelectChannel(padapter, pmlmeext->cur_channel); ptdls_sta->tdls_sta_state &= ~(TDLS_CH_SWITCH_ON_STATE | TDLS_PEER_AT_OFF_STATE | TDLS_AT_OFF_CH_STATE); DBG_871X("go back to base channel\n "); issue_nulldata(padapter, NULL, 0, 0, 0); _set_timer(&ptdls_sta->option_timer, (u32)ptdls_sta->ch_switch_time); break; case TDLS_P_OFF_CH: SelectChannel(padapter, pmlmeext->cur_channel); issue_nulldata(padapter, NULL, 0, 0, 0); DBG_871X("change channel to base ch:%02x\n", pmlmeext->cur_channel); ptdls_sta->tdls_sta_state &= ~(TDLS_PEER_AT_OFF_STATE| TDLS_AT_OFF_CH_STATE); _set_timer(&ptdls_sta->off_ch_timer, TDLS_STAY_TIME); break; case TDLS_P_BASE_CH: issue_nulldata(ptdls_sta->padapter, NULL, 1, 0, 0); SelectChannel(padapter, ptdls_sta->off_ch); DBG_871X("change channel to off ch:%02x\n", ptdls_sta->off_ch); ptdls_sta->tdls_sta_state |= TDLS_AT_OFF_CH_STATE; if((ptdls_sta->tdls_sta_state & TDLS_PEER_AT_OFF_STATE) != TDLS_PEER_AT_OFF_STATE){ issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta->hwaddr, 0, 3, 300); } _set_timer(&ptdls_sta->base_ch_timer, TDLS_STAY_TIME); break; case TDLS_RS_RCR: rtw_hal_set_hwreg(padapter, HW_VAR_TDLS_RS_RCR, 0); DBG_871X("wirte REG_RCR, set bit6 on\n"); break; case TDLS_TEAR_STA: free_tdls_sta(padapter, ptdls_sta); break; } //_exit_critical_bh(&(ptdlsinfo->hdl_lock), &irqL); return H2C_SUCCESS; #else return H2C_REJECTED; #endif //CONFIG_TDLS } u8 run_in_thread_hdl(_adapter *padapter, u8 *pbuf) { struct RunInThread_param *p; if (NULL == pbuf) return H2C_PARAMETERS_ERROR; p = (struct RunInThread_param*)pbuf; if (p->func) p->func(p->context); return H2C_SUCCESS; } rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_mp.c000066400000000000000000002243731261122257400201160ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_MP_C_ #include #ifdef PLATFORM_FREEBSD #include /* for RFHIGHPID */ #endif #include "../hal/OUTSRC/phydm_precomp.h" #if defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8821A) #include #endif #ifdef CONFIG_MP_INCLUDED u32 read_macreg(_adapter *padapter, u32 addr, u32 sz) { u32 val = 0; switch(sz) { case 1: val = rtw_read8(padapter, addr); break; case 2: val = rtw_read16(padapter, addr); break; case 4: val = rtw_read32(padapter, addr); break; default: val = 0xffffffff; break; } return val; } void write_macreg(_adapter *padapter, u32 addr, u32 val, u32 sz) { switch(sz) { case 1: rtw_write8(padapter, addr, (u8)val); break; case 2: rtw_write16(padapter, addr, (u16)val); break; case 4: rtw_write32(padapter, addr, val); break; default: break; } } u32 read_bbreg(_adapter *padapter, u32 addr, u32 bitmask) { return rtw_hal_read_bbreg(padapter, addr, bitmask); } void write_bbreg(_adapter *padapter, u32 addr, u32 bitmask, u32 val) { rtw_hal_write_bbreg(padapter, addr, bitmask, val); } u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask) { return rtw_hal_read_rfreg(padapter, rfpath, addr, bitmask); } void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val) { rtw_hal_write_rfreg(padapter, rfpath, addr, bitmask, val); } u32 read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr) { return _read_rfreg(padapter, rfpath, addr, bRFRegOffsetMask); } void write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 val) { _write_rfreg(padapter, rfpath, addr, bRFRegOffsetMask, val); } static void _init_mp_priv_(struct mp_priv *pmp_priv) { WLAN_BSSID_EX *pnetwork; _rtw_memset(pmp_priv, 0, sizeof(struct mp_priv)); pmp_priv->mode = MP_OFF; pmp_priv->channel = 1; pmp_priv->bandwidth = CHANNEL_WIDTH_20; pmp_priv->prime_channel_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; pmp_priv->rateidx = MPT_RATE_1M; pmp_priv->txpoweridx = 0x2A; pmp_priv->antenna_tx = ANTENNA_A; pmp_priv->antenna_rx = ANTENNA_AB; pmp_priv->check_mp_pkt = 0; pmp_priv->tx_pktcount = 0; pmp_priv->rx_bssidpktcount=0; pmp_priv->rx_pktcount = 0; pmp_priv->rx_crcerrpktcount = 0; pmp_priv->network_macaddr[0] = 0x00; pmp_priv->network_macaddr[1] = 0xE0; pmp_priv->network_macaddr[2] = 0x4C; pmp_priv->network_macaddr[3] = 0x87; pmp_priv->network_macaddr[4] = 0x66; pmp_priv->network_macaddr[5] = 0x55; pmp_priv->bSetRxBssid = _FALSE; pnetwork = &pmp_priv->mp_network.network; _rtw_memcpy(pnetwork->MacAddress, pmp_priv->network_macaddr, ETH_ALEN); pnetwork->Ssid.SsidLength = 8; _rtw_memcpy(pnetwork->Ssid.Ssid, "mp_871x", pnetwork->Ssid.SsidLength); } #ifdef PLATFORM_WINDOWS /* void mp_wi_callback( IN NDIS_WORK_ITEM* pwk_item, IN PVOID cntx ) { _adapter* padapter =(_adapter *)cntx; struct mp_priv *pmppriv=&padapter->mppriv; struct mp_wi_cntx *pmp_wi_cntx=&pmppriv->wi_cntx; // Execute specified action. if(pmp_wi_cntx->curractfunc != NULL) { LARGE_INTEGER cur_time; ULONGLONG start_time, end_time; NdisGetCurrentSystemTime(&cur_time); // driver version start_time = cur_time.QuadPart/10; // The return value is in microsecond pmp_wi_cntx->curractfunc(padapter); NdisGetCurrentSystemTime(&cur_time); // driver version end_time = cur_time.QuadPart/10; // The return value is in microsecond RT_TRACE(_module_mp_, _drv_info_, ("WorkItemActType: %d, time spent: %I64d us\n", pmp_wi_cntx->param.act_type, (end_time-start_time))); } NdisAcquireSpinLock(&(pmp_wi_cntx->mp_wi_lock)); pmp_wi_cntx->bmp_wi_progress= _FALSE; NdisReleaseSpinLock(&(pmp_wi_cntx->mp_wi_lock)); if (pmp_wi_cntx->bmpdrv_unload) { NdisSetEvent(&(pmp_wi_cntx->mp_wi_evt)); } } */ static int init_mp_priv_by_os(struct mp_priv *pmp_priv) { struct mp_wi_cntx *pmp_wi_cntx; if (pmp_priv == NULL) return _FAIL; pmp_priv->rx_testcnt = 0; pmp_priv->rx_testcnt1 = 0; pmp_priv->rx_testcnt2 = 0; pmp_priv->tx_testcnt = 0; pmp_priv->tx_testcnt1 = 0; pmp_wi_cntx = &pmp_priv->wi_cntx pmp_wi_cntx->bmpdrv_unload = _FALSE; pmp_wi_cntx->bmp_wi_progress = _FALSE; pmp_wi_cntx->curractfunc = NULL; return _SUCCESS; } #endif #ifdef PLATFORM_LINUX static int init_mp_priv_by_os(struct mp_priv *pmp_priv) { int i, res; struct mp_xmit_frame *pmp_xmitframe; if (pmp_priv == NULL) return _FAIL; _rtw_init_queue(&pmp_priv->free_mp_xmitqueue); pmp_priv->pallocated_mp_xmitframe_buf = NULL; pmp_priv->pallocated_mp_xmitframe_buf = rtw_zmalloc(NR_MP_XMITFRAME * sizeof(struct mp_xmit_frame) + 4); if (pmp_priv->pallocated_mp_xmitframe_buf == NULL) { res = _FAIL; goto _exit_init_mp_priv; } pmp_priv->pmp_xmtframe_buf = pmp_priv->pallocated_mp_xmitframe_buf + 4 - ((SIZE_PTR) (pmp_priv->pallocated_mp_xmitframe_buf) & 3); pmp_xmitframe = (struct mp_xmit_frame*)pmp_priv->pmp_xmtframe_buf; for (i = 0; i < NR_MP_XMITFRAME; i++) { _rtw_init_listhead(&pmp_xmitframe->list); rtw_list_insert_tail(&pmp_xmitframe->list, &pmp_priv->free_mp_xmitqueue.queue); pmp_xmitframe->pkt = NULL; pmp_xmitframe->frame_tag = MP_FRAMETAG; pmp_xmitframe->padapter = pmp_priv->papdater; pmp_xmitframe++; } pmp_priv->free_mp_xmitframe_cnt = NR_MP_XMITFRAME; res = _SUCCESS; _exit_init_mp_priv: return res; } #endif static void mp_init_xmit_attrib(struct mp_tx *pmptx, PADAPTER padapter) { struct pkt_attrib *pattrib; // init xmitframe attribute pattrib = &pmptx->attrib; _rtw_memset(pattrib, 0, sizeof(struct pkt_attrib)); _rtw_memset(pmptx->desc, 0, TXDESC_SIZE); pattrib->ether_type = 0x8712; //_rtw_memcpy(pattrib->src, padapter->eeprompriv.mac_addr, ETH_ALEN); // _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); _rtw_memset(pattrib->dst, 0xFF, ETH_ALEN); // pattrib->dhcp_pkt = 0; // pattrib->pktlen = 0; pattrib->ack_policy = 0; // pattrib->pkt_hdrlen = ETH_HLEN; pattrib->hdrlen = WLAN_HDR_A3_LEN; pattrib->subtype = WIFI_DATA; pattrib->priority = 0; pattrib->qsel = pattrib->priority; // do_queue_select(padapter, pattrib); pattrib->nr_frags = 1; pattrib->encrypt = 0; pattrib->bswenc = _FALSE; pattrib->qos_en = _FALSE; } s32 init_mp_priv(PADAPTER padapter) { struct mp_priv *pmppriv = &padapter->mppriv; _init_mp_priv_(pmppriv); pmppriv->papdater = padapter; pmppriv->mp_dm =0; pmppriv->tx.stop = 1; pmppriv->bSetTxPower=0; //for manually set tx power pmppriv->bTxBufCkFail=_FALSE; pmppriv->pktInterval=0; mp_init_xmit_attrib(&pmppriv->tx, padapter); switch (padapter->registrypriv.rf_config) { case RF_1T1R: pmppriv->antenna_tx = ANTENNA_A; pmppriv->antenna_rx = ANTENNA_A; break; case RF_1T2R: default: pmppriv->antenna_tx = ANTENNA_A; pmppriv->antenna_rx = ANTENNA_AB; break; case RF_2T2R: case RF_2T2R_GREEN: pmppriv->antenna_tx = ANTENNA_AB; pmppriv->antenna_rx = ANTENNA_AB; break; case RF_2T4R: pmppriv->antenna_tx = ANTENNA_AB; pmppriv->antenna_rx = ANTENNA_ABCD; break; } return _SUCCESS; } void free_mp_priv(struct mp_priv *pmp_priv) { if (pmp_priv->pallocated_mp_xmitframe_buf) { rtw_mfree(pmp_priv->pallocated_mp_xmitframe_buf, 0); pmp_priv->pallocated_mp_xmitframe_buf = NULL; } pmp_priv->pmp_xmtframe_buf = NULL; } static VOID PHY_IQCalibrate_default( IN PADAPTER pAdapter, IN BOOLEAN bReCovery ) { DBG_871X("%s\n", __func__); } static VOID PHY_LCCalibrate_default( IN PADAPTER pAdapter ) { DBG_871X("%s\n", __func__); } static VOID PHY_SetRFPathSwitch_default( IN PADAPTER pAdapter, IN BOOLEAN bMain ) { DBG_871X("%s\n", __func__); } void mpt_InitHWConfig(PADAPTER Adapter) { if (IS_HARDWARE_TYPE_8723B(Adapter)) { // TODO: <20130114, Kordan> The following setting is only for DPDT and Fixed board type. // TODO: A better solution is configure it according EFUSE during the run-time. PHY_SetMacReg(Adapter, 0x64, BIT20, 0x0); //0x66[4]=0 PHY_SetMacReg(Adapter, 0x64, BIT24, 0x0); //0x66[8]=0 PHY_SetMacReg(Adapter, 0x40, BIT4, 0x0); //0x40[4]=0 PHY_SetMacReg(Adapter, 0x40, BIT3, 0x1); //0x40[3]=1 PHY_SetMacReg(Adapter, 0x4C, BIT24, 0x1); //0x4C[24:23]=10 PHY_SetMacReg(Adapter, 0x4C, BIT23, 0x0); //0x4C[24:23]=10 PHY_SetBBReg(Adapter, 0x944, BIT1|BIT0, 0x3); //0x944[1:0]=11 PHY_SetBBReg(Adapter, 0x930, bMaskByte0, 0x77); //0x930[7:0]=77 PHY_SetMacReg(Adapter, 0x38, BIT11, 0x1); //0x38[11]=1 // TODO: <20130206, Kordan> The default setting is wrong, hard-coded here. PHY_SetMacReg(Adapter, 0x778, 0x3, 0x3); // Turn off hardware PTA control (Asked by Scott) PHY_SetMacReg(Adapter, 0x64, bMaskDWord, 0x36000000); //Fix BT S0/S1 PHY_SetMacReg(Adapter, 0x948, bMaskDWord, 0x0); //Fix BT can't Tx // <20130522, Kordan> Turn off equalizer to improve Rx sensitivity. (Asked by EEChou) PHY_SetBBReg(Adapter, 0xA00, BIT8, 0x0); //0xA01[0] = 0 } } #if defined (CONFIG_RTL8192C) || defined (CONFIG_RTL8723A) #define PHY_IQCalibrate(a,b) rtl8192c_PHY_IQCalibrate(a,b) #define PHY_LCCalibrate(a) rtl8192c_PHY_LCCalibrate(a) //#define dm_CheckTXPowerTracking(a) rtl8192c_odm_CheckTXPowerTracking(a) #define PHY_SetRFPathSwitch(a,b) rtl8192c_PHY_SetRFPathSwitch(a,b) #endif #ifdef CONFIG_RTL8192D #define PHY_IQCalibrate(a,b) rtl8192d_PHY_IQCalibrate(a) #define PHY_LCCalibrate(a) rtl8192d_PHY_LCCalibrate(a) //#define dm_CheckTXPowerTracking(a) rtl8192d_odm_CheckTXPowerTracking(a) #define PHY_SetRFPathSwitch(a,b) rtl8192d_PHY_SetRFPathSwitch(a,b) #endif #ifdef CONFIG_RTL8188E #define PHY_IQCalibrate(a,b) PHY_IQCalibrate_8188E(a,b) #define PHY_LCCalibrate(a) PHY_LCCalibrate_8188E(&(GET_HAL_DATA(a)->odmpriv)) #define PHY_SetRFPathSwitch(a,b) PHY_SetRFPathSwitch_8188E(a,b) #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) /* #define PHY_IQCalibrate(a,b) PHY_IQCalibrate_8812A(a,b) #define PHY_LCCalibrate(a) PHY_LCCalibrate_8812A(&(GET_HAL_DATA(a)->odmpriv)) #define PHY_SetRFPathSwitch(a,b) PHY_SetRFPathSwitch_8812A(a,b) */ #ifndef CONFIG_RTL8812A #define PHY_IQCalibrate_8812A #define PHY_LCCalibrate_8812A #define PHY_SetRFPathSwitch_8812A #endif #ifndef CONFIG_RTL8821A #define PHY_IQCalibrate_8821A #define PHY_LCCalibrate_8821A #define PHY_SetRFPathSwitch_8812A #endif #define PHY_IQCalibrate(_Adapter, b) \ IS_HARDWARE_TYPE_8812(_Adapter) ? PHY_IQCalibrate_8812A(_Adapter, b) : \ IS_HARDWARE_TYPE_8821(_Adapter) ? PHY_IQCalibrate_8821A(&(GET_HAL_DATA(_Adapter)->odmpriv), b) : \ PHY_IQCalibrate_default(_Adapter, b) #define PHY_LCCalibrate(_Adapter) \ IS_HARDWARE_TYPE_8812(_Adapter) ? PHY_LCCalibrate_8812A(&(GET_HAL_DATA(_Adapter)->odmpriv)) : \ IS_HARDWARE_TYPE_8821(_Adapter) ? PHY_LCCalibrate_8821A(&(GET_HAL_DATA(_Adapter)->odmpriv)) : \ PHY_LCCalibrate_default(_Adapter) #define PHY_SetRFPathSwitch(_Adapter, b) \ (IS_HARDWARE_TYPE_JAGUAR(_Adapter)) ? PHY_SetRFPathSwitch_8812A(_Adapter, b) : \ PHY_SetRFPathSwitch_default(_Adapter, b) #endif //#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) #ifdef CONFIG_RTL8192E #define PHY_IQCalibrate(a,b) PHY_IQCalibrate_8192E(a,b) #define PHY_LCCalibrate(a) PHY_LCCalibrate_8192E(&(GET_HAL_DATA(a)->odmpriv)) #define PHY_SetRFPathSwitch(a,b) PHY_SetRFPathSwitch_8192E(a,b) #endif //CONFIG_RTL8812A_8821A #ifdef CONFIG_RTL8723B static void PHY_IQCalibrate(PADAPTER padapter, u8 bReCovery) { PHAL_DATA_TYPE pHalData; u8 b2ant; //false:1ant, true:2-ant u8 RF_Path; //0:S1, 1:S0 pHalData = GET_HAL_DATA(padapter); b2ant = pHalData->EEPROMBluetoothAntNum==Ant_x2?_TRUE:_FALSE; PHY_IQCalibrate_8723B(padapter, bReCovery, _FALSE, b2ant, pHalData->ant_path); } #define PHY_LCCalibrate(a) PHY_LCCalibrate_8723B(&(GET_HAL_DATA(a)->odmpriv)) #define PHY_SetRFPathSwitch(a,b) PHY_SetRFPathSwitch_8723B(a,b) #endif s32 MPT_InitializeAdapter( IN PADAPTER pAdapter, IN u8 Channel ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); s32 rtStatus = _SUCCESS; PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; u32 ledsetting; struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv; pMptCtx->bMptDrvUnload = _FALSE; pMptCtx->bMassProdTest = _FALSE; pMptCtx->bMptIndexEven = _TRUE; //default gain index is -6.0db pMptCtx->h2cReqNum = 0x0; //init for BT MP #if defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8821A) pMptCtx->bMPh2c_timeout = _FALSE; pMptCtx->MptH2cRspEvent = _FALSE; pMptCtx->MptBtC2hEvent = _FALSE; _rtw_init_sema(&pMptCtx->MPh2c_Sema, 0); _init_timer( &pMptCtx->MPh2c_timeout_timer, pAdapter->pnetdev, MPh2c_timeout_handle, pAdapter ); #endif #ifdef CONFIG_RTL8723A rtl8723a_InitAntenna_Selection(pAdapter); #endif //CONFIG_RTL8723A #ifdef CONFIG_RTL8723B rtl8723b_InitAntenna_Selection(pAdapter); if (IS_HARDWARE_TYPE_8723B(pAdapter)) { mpt_InitHWConfig(pAdapter); // <20130522, Kordan> Turn off equalizer to improve Rx sensitivity. (Asked by EEChou) PHY_SetBBReg(pAdapter, 0xA00, BIT8, 0x0); //0xA01[0] = 0 PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); //default use Main //<20130522, Kordan> 0x51 and 0x71 should be set immediately after path switched, or they might be overwritten. if ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90)) PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B10E); else PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E); } #endif pMptCtx->bMptWorkItemInProgress = _FALSE; pMptCtx->CurrMptAct = NULL; pMptCtx->MptRfPath = ODM_RF_PATH_A; //------------------------------------------------------------------------- #if 1 // Don't accept any packets rtw_write32(pAdapter, REG_RCR, 0); #else // Accept CRC error and destination address //pHalData->ReceiveConfig |= (RCR_ACRC32|RCR_AAP); //rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig); rtw_write32(pAdapter, REG_RCR, 0x70000101); #endif #if 0 // If EEPROM or EFUSE is empty,we assign as RF 2T2R for MP. if (pHalData->AutoloadFailFlag == TRUE) { pHalData->RF_Type = RF_2T2R; } #endif //ledsetting = rtw_read32(pAdapter, REG_LEDCFG0); //rtw_write32(pAdapter, REG_LEDCFG0, ledsetting & ~LED0DIS); if(IS_HARDWARE_TYPE_8192DU(pAdapter)) { rtw_write32(pAdapter, REG_LEDCFG0, 0x8888); } else { //rtw_write32(pAdapter, REG_LEDCFG0, 0x08080); ledsetting = rtw_read32(pAdapter, REG_LEDCFG0); #if defined (CONFIG_RTL8192C) || defined( CONFIG_RTL8192D ) rtw_write32(pAdapter, REG_LEDCFG0, ledsetting & ~BIT(7)); #endif } PHY_LCCalibrate(pAdapter); PHY_IQCalibrate(pAdapter, _FALSE); //dm_CheckTXPowerTracking(&pHalData->odmpriv); //trigger thermal meter PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); //default use Main pMptCtx->backup0xc50 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0); pMptCtx->backup0xc58 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0); pMptCtx->backup0xc30 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_RxDetector1, bMaskByte0); #ifdef CONFIG_RTL8188E pMptCtx->backup0x52_RF_A = (u1Byte)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); pMptCtx->backup0x52_RF_B = (u1Byte)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); rtw_write32(pAdapter, REG_MACID_NO_LINK_0, 0x0); rtw_write32(pAdapter, REG_MACID_NO_LINK_1, 0x0); #endif //set ant to wifi side in mp mode rtw_write16(pAdapter, 0x870, 0x300); rtw_write16(pAdapter, 0x860, 0x110); return rtStatus; } /*----------------------------------------------------------------------------- * Function: MPT_DeInitAdapter() * * Overview: Extra DeInitialization for Mass Production Test. * * Input: PADAPTER pAdapter * * Output: NONE * * Return: NONE * * Revised History: * When Who Remark * 05/08/2007 MHC Create Version 0. * 05/18/2007 MHC Add normal driver MPHalt code. * *---------------------------------------------------------------------------*/ VOID MPT_DeInitAdapter( IN PADAPTER pAdapter ) { PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; pMptCtx->bMptDrvUnload = _TRUE; #if defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B) _rtw_free_sema(&(pMptCtx->MPh2c_Sema)); _cancel_timer_ex( &pMptCtx->MPh2c_timeout_timer); #endif #if defined(CONFIG_RTL8723B) PHY_SetBBReg(pAdapter,0xA01, BIT0, 1); ///suggestion by jerry for MP Rx. #endif #if 0 // for Windows PlatformFreeWorkItem( &(pMptCtx->MptWorkItem) ); while(pMptCtx->bMptWorkItemInProgress) { if(NdisWaitEvent(&(pMptCtx->MptWorkItemEvent), 50)) { break; } } NdisFreeSpinLock( &(pMptCtx->MptWorkItemSpinLock) ); #endif } static u8 mpt_ProStartTest(PADAPTER padapter) { PMPT_CONTEXT pMptCtx = &padapter->mppriv.MptCtx; pMptCtx->bMassProdTest = _TRUE; pMptCtx->bStartContTx = _FALSE; pMptCtx->bCckContTx = _FALSE; pMptCtx->bOfdmContTx = _FALSE; pMptCtx->bSingleCarrier = _FALSE; pMptCtx->bCarrierSuppression = _FALSE; pMptCtx->bSingleTone = _FALSE; return _SUCCESS; } /* * General use */ s32 SetPowerTracking(PADAPTER padapter, u8 enable) { Hal_SetPowerTracking( padapter, enable ); return 0; } void GetPowerTracking(PADAPTER padapter, u8 *enable) { Hal_GetPowerTracking( padapter, enable ); } static void disable_dm(PADAPTER padapter) { #ifndef CONFIG_RTL8723A u8 v8; #endif HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; //3 1. disable firmware dynamic mechanism // disable Power Training, Rate Adaptive #ifdef CONFIG_RTL8723A SetBcnCtrlReg(padapter, 0, EN_BCN_FUNCTION); #else v8 = rtw_read8(padapter, REG_BCN_CTRL); v8 &= ~EN_BCN_FUNCTION; rtw_write8(padapter, REG_BCN_CTRL, v8); #endif //3 2. disable driver dynamic mechanism // disable Dynamic Initial Gain // disable High Power // disable Power Tracking Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); // enable APK, LCK and IQK but disable power tracking #if !(defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)|| defined(CONFIG_RTL8192E)) pdmpriv->TxPowerTrackControl = _FALSE; #endif Switch_DM_Func(padapter, DYNAMIC_RF_CALIBRATION, _TRUE); //#ifdef CONFIG_BT_COEXIST // rtw_btcoex_Switch(padapter, 0); //remove for BT MP Down. //#endif } void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; PDM_ODM_T pDM_Odm = &pHalData->odmpriv; if (bstart==1){ DBG_871X("in MPT_PwrCtlDM start \n"); Switch_DM_Func(padapter, DYNAMIC_RF_TX_PWR_TRACK, _TRUE); pdmpriv->InitODMFlag |= ODM_RF_TX_PWR_TRACK ; pdmpriv->InitODMFlag |= ODM_RF_CALIBRATION ; pdmpriv->TxPowerTrackControl = _TRUE; pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; padapter->mppriv.mp_dm =1; odm_TXPowerTrackingInit(pDM_Odm); ODM_ClearTxPowerTrackingState(pDM_Odm); }else{ DBG_871X("in MPT_PwrCtlDM stop \n"); disable_dm(padapter); pdmpriv->InitODMFlag = 0 ; pdmpriv->TxPowerTrackControl = _FALSE; pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _FALSE; padapter->mppriv.mp_dm = 0; { TXPWRTRACK_CFG c; u1Byte chnl =0 ; ConfigureTxpowerTrack(pDM_Odm, &c); ODM_ClearTxPowerTrackingState(pDM_Odm); (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, ODM_RF_PATH_A, chnl); (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, ODM_RF_PATH_B, chnl); } } } u32 mp_join(PADAPTER padapter,u8 mode) { WLAN_BSSID_EX bssid; struct sta_info *psta; u32 length; u8 val8; _irqL irqL; s32 res = _SUCCESS; struct mp_priv *pmppriv = &padapter->mppriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wlan_network *tgt_network = &pmlmepriv->cur_network; // 1. initialize a new WLAN_BSSID_EX _rtw_memset(&bssid, 0, sizeof(WLAN_BSSID_EX)); DBG_8192C("%s ,pmppriv->network_macaddr=%x %x %x %x %x %x \n",__func__, pmppriv->network_macaddr[0],pmppriv->network_macaddr[1],pmppriv->network_macaddr[2],pmppriv->network_macaddr[3],pmppriv->network_macaddr[4],pmppriv->network_macaddr[5]); _rtw_memcpy(bssid.MacAddress, pmppriv->network_macaddr, ETH_ALEN); if( mode==WIFI_FW_ADHOC_STATE ){ bssid.Ssid.SsidLength = strlen("mp_pseudo_adhoc"); _rtw_memcpy(bssid.Ssid.Ssid, (u8*)"mp_pseudo_adhoc", bssid.Ssid.SsidLength); bssid.InfrastructureMode = Ndis802_11IBSS; bssid.NetworkTypeInUse = Ndis802_11DS; bssid.IELength = 0; }else if(mode==WIFI_FW_STATION_STATE){ bssid.Ssid.SsidLength = strlen("mp_pseudo_STATION"); _rtw_memcpy(bssid.Ssid.Ssid, (u8*)"mp_pseudo_STATION", bssid.Ssid.SsidLength); bssid.InfrastructureMode = Ndis802_11Infrastructure; bssid.NetworkTypeInUse = Ndis802_11DS; bssid.IELength = 0; } length = get_WLAN_BSSID_EX_sz(&bssid); if (length % 4) bssid.Length = ((length >> 2) + 1) << 2; //round up to multiple of 4 bytes. else bssid.Length = length; _enter_critical_bh(&pmlmepriv->lock, &irqL); if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) goto end_of_mp_start_test; //init mp_start_test status if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { rtw_disassoc_cmd(padapter, 500, _TRUE); rtw_indicate_disconnect(padapter); rtw_free_assoc_resources(padapter, 1); } pmppriv->prev_fw_state = get_fwstate(pmlmepriv); pmlmepriv->fw_state = WIFI_MP_STATE; #if 0 if (pmppriv->mode == _LOOPBOOK_MODE_) { set_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE); //append txdesc RT_TRACE(_module_mp_, _drv_notice_, ("+start mp in Lookback mode\n")); } else { RT_TRACE(_module_mp_, _drv_notice_, ("+start mp in normal mode\n")); } #endif set_fwstate(pmlmepriv, _FW_UNDER_LINKING); //3 2. create a new psta for mp driver //clear psta in the cur_network, if any psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress); if (psta) rtw_free_stainfo(padapter, psta); psta = rtw_alloc_stainfo(&padapter->stapriv, bssid.MacAddress); if (psta == NULL) { RT_TRACE(_module_mp_, _drv_err_, ("mp_start_test: Can't alloc sta_info!\n")); pmlmepriv->fw_state = pmppriv->prev_fw_state; res = _FAIL; goto end_of_mp_start_test; } set_fwstate(pmlmepriv,WIFI_ADHOC_MASTER_STATE); //3 3. join psudo AdHoc tgt_network->join_res = 1; tgt_network->aid = psta->aid = 1; _rtw_memcpy(&tgt_network->network, &bssid, length); rtw_indicate_connect(padapter); _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); set_fwstate(pmlmepriv,_FW_LINKED); end_of_mp_start_test: _exit_critical_bh(&pmlmepriv->lock, &irqL); if(1) //(res == _SUCCESS) { // set MSR to WIFI_FW_ADHOC_STATE if( mode==WIFI_FW_ADHOC_STATE ){ val8 = rtw_read8(padapter, MSR) & 0xFC; // 0x0102 val8 |= WIFI_FW_ADHOC_STATE; rtw_write8(padapter, MSR, val8); // Link in ad hoc network } else { Set_MSR(padapter, WIFI_FW_STATION_STATE); DBG_8192C("%s , pmppriv->network_macaddr =%x %x %x %x %x %x\n",__func__, pmppriv->network_macaddr[0],pmppriv->network_macaddr[1],pmppriv->network_macaddr[2],pmppriv->network_macaddr[3],pmppriv->network_macaddr[4],pmppriv->network_macaddr[5]); rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmppriv->network_macaddr); } } return res; } //This function initializes the DUT to the MP test mode s32 mp_start_test(PADAPTER padapter) { struct mp_priv *pmppriv = &padapter->mppriv; s32 res = _SUCCESS; padapter->registrypriv.mp_mode = 1; //3 disable dynamic mechanism disable_dm(padapter); #ifdef CONFIG_RTL8812A rtl8812_InitHalDm(padapter); #endif #ifdef CONFIG_RTL8723A rtl8723a_InitHalDm(padapter); #endif #ifdef CONFIG_RTL8723B rtl8723b_InitHalDm(padapter); #endif #ifdef CONFIG_RTL8192E rtl8192e_InitHalDm(padapter); #endif //3 0. update mp_priv if (padapter->registrypriv.rf_config == RF_MAX_TYPE) { // switch (phal->rf_type) { switch (GET_RF_TYPE(padapter)) { case RF_1T1R: pmppriv->antenna_tx = ANTENNA_A; pmppriv->antenna_rx = ANTENNA_A; break; case RF_1T2R: default: pmppriv->antenna_tx = ANTENNA_A; pmppriv->antenna_rx = ANTENNA_AB; break; case RF_2T2R: case RF_2T2R_GREEN: pmppriv->antenna_tx = ANTENNA_AB; pmppriv->antenna_rx = ANTENNA_AB; break; case RF_2T4R: pmppriv->antenna_tx = ANTENNA_AB; pmppriv->antenna_rx = ANTENNA_ABCD; break; } } mpt_ProStartTest(padapter); mp_join(padapter,WIFI_FW_ADHOC_STATE); return res; } //------------------------------------------------------------------------------ //This function change the DUT from the MP test mode into normal mode void mp_stop_test(PADAPTER padapter) { struct mp_priv *pmppriv = &padapter->mppriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wlan_network *tgt_network = &pmlmepriv->cur_network; struct sta_info *psta; _irqL irqL; if(pmppriv->mode==MP_ON) { pmppriv->bSetTxPower=0; _enter_critical_bh(&pmlmepriv->lock, &irqL); if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _FALSE) goto end_of_mp_stop_test; //3 1. disconnect psudo AdHoc rtw_indicate_disconnect(padapter); //3 2. clear psta used in mp test mode. // rtw_free_assoc_resources(padapter, 1); psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress); if (psta) rtw_free_stainfo(padapter, psta); //3 3. return to normal state (default:station mode) pmlmepriv->fw_state = pmppriv->prev_fw_state; // WIFI_STATION_STATE; //flush the cur_network _rtw_memset(tgt_network, 0, sizeof(struct wlan_network)); _clr_fwstate_(pmlmepriv, WIFI_MP_STATE); end_of_mp_stop_test: _exit_critical_bh(&pmlmepriv->lock, &irqL); #ifdef CONFIG_RTL8812A rtl8812_InitHalDm(padapter); #endif #ifdef CONFIG_RTL8723A rtl8723a_InitHalDm(padapter); #endif #ifdef CONFIG_RTL8723B rtl8723b_InitHalDm(padapter); #endif #ifdef CONFIG_RTL8192E rtl8192e_InitHalDm(padapter); #endif } } /*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/ #if 0 //#ifdef CONFIG_USB_HCI static VOID mpt_AdjustRFRegByRateByChan92CU(PADAPTER pAdapter, u8 RateIdx, u8 Channel, u8 BandWidthID) { u8 eRFPath; u32 rfReg0x26; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); if (RateIdx < MPT_RATE_6M) { // CCK rate,for 88cu rfReg0x26 = 0xf400; } else if ((RateIdx >= MPT_RATE_6M) && (RateIdx <= MPT_RATE_54M)) {// OFDM rate,for 88cu if ((4 == Channel) || (8 == Channel) || (12 == Channel)) rfReg0x26 = 0xf000; else if ((5 == Channel) || (7 == Channel) || (13 == Channel) || (14 == Channel)) rfReg0x26 = 0xf400; else rfReg0x26 = 0x4f200; } else if ((RateIdx >= MPT_RATE_MCS0) && (RateIdx <= MPT_RATE_MCS15)) {// MCS 20M ,for 88cu // MCS40M rate,for 88cu if (CHANNEL_WIDTH_20 == BandWidthID) { if ((4 == Channel) || (8 == Channel)) rfReg0x26 = 0xf000; else if ((5 == Channel) || (7 == Channel) || (13 == Channel) || (14 == Channel)) rfReg0x26 = 0xf400; else rfReg0x26 = 0x4f200; } else{ if ((4 == Channel) || (8 == Channel)) rfReg0x26 = 0xf000; else if ((5 == Channel) || (7 == Channel)) rfReg0x26 = 0xf400; else rfReg0x26 = 0x4f200; } } // RT_TRACE(COMP_CMD, DBG_LOUD, ("\n mpt_AdjustRFRegByRateByChan92CU():Chan:%d Rate=%d rfReg0x26:0x%08x\n",Channel, RateIdx,rfReg0x26)); for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) { write_rfreg(pAdapter, eRFPath, RF_SYN_G2, rfReg0x26); } } #endif /*----------------------------------------------------------------------------- * Function: mpt_SwitchRfSetting * * Overview: Change RF Setting when we siwthc channel/rate/BW for MP. * * Input: IN PADAPTER pAdapter * * Output: NONE * * Return: NONE * * Revised History: * When Who Remark * 01/08/2009 MHC Suggestion from SD3 Willis for 92S series. * 01/09/2009 MHC Add CCK modification for 40MHZ. Suggestion from SD3. * *---------------------------------------------------------------------------*/ static void mpt_SwitchRfSetting(PADAPTER pAdapter) { Hal_mpt_SwitchRfSetting(pAdapter); } /*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/ /*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ static void MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14) { Hal_MPT_CCKTxPowerAdjust(Adapter,bInCH14); } static void MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven) { Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter,beven); } /*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ /* * SetChannel * Description * Use H2C command to change channel, * not only modify rf register, but also other setting need to be done. */ void SetChannel(PADAPTER pAdapter) { Hal_SetChannel(pAdapter); } /* * Notice * Switch bandwitdth may change center frequency(channel) */ void SetBandwidth(PADAPTER pAdapter) { Hal_SetBandwidth(pAdapter); } static void SetCCKTxPower(PADAPTER pAdapter, u8 *TxPower) { Hal_SetCCKTxPower(pAdapter,TxPower); } static void SetOFDMTxPower(PADAPTER pAdapter, u8 *TxPower) { Hal_SetOFDMTxPower(pAdapter,TxPower); } void SetAntenna(PADAPTER pAdapter) { Hal_SetAntenna(pAdapter); } void SetAntennaPathPower(PADAPTER pAdapter) { Hal_SetAntennaPathPower(pAdapter); } int SetTxPower(PADAPTER pAdapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); u1Byte CurrChannel; BOOLEAN bResult = _TRUE; PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); u1Byte rf, TxPower[2]; u8 u1TxPower = pAdapter->mppriv.txpoweridx; CurrChannel = pMptCtx->MptChannelToSw; if(HAL_IsLegalChannel(pAdapter, CurrChannel) == _FALSE) { DBG_871X("SetTxPower(): CurrentChannel:%d is not valid\n", CurrChannel); return _FALSE; } TxPower[ODM_RF_PATH_A] = (u1Byte)(u1TxPower&0xff); TxPower[ODM_RF_PATH_B] = (u1Byte)((u1TxPower&0xff00)>>8); DBG_871X("TxPower(A, B) = (0x%x, 0x%x)\n", TxPower[ODM_RF_PATH_A], TxPower[ODM_RF_PATH_B]); for(rf=0; rf<2; rf++) { if(TxPower[rf] > MAX_TX_PWR_INDEX_N_MODE) { DBG_871X("===> SetTxPower: The power index is too large.\n"); return _FALSE; } pMptCtx->TxPwrLevel[rf] = TxPower[rf]; } Hal_SetTxPower(pAdapter); return _TRUE; } void SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset) { u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D,tmpAGC; TxAGCOffset_B = (ulTxAGCOffset&0x000000ff); TxAGCOffset_C = ((ulTxAGCOffset&0x0000ff00)>>8); TxAGCOffset_D = ((ulTxAGCOffset&0x00ff0000)>>16); tmpAGC = (TxAGCOffset_D<<8 | TxAGCOffset_C<<4 | TxAGCOffset_B); write_bbreg(pAdapter, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC|bXDTxAGC), tmpAGC); } void SetDataRate(PADAPTER pAdapter) { Hal_SetDataRate(pAdapter); } void MP_PHY_SetRFPathSwitch(PADAPTER pAdapter ,BOOLEAN bMain) { PHY_SetRFPathSwitch(pAdapter,bMain); } s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther) { return Hal_SetThermalMeter( pAdapter, target_ther); } static void TriggerRFThermalMeter(PADAPTER pAdapter) { Hal_TriggerRFThermalMeter(pAdapter); } static u8 ReadRFThermalMeter(PADAPTER pAdapter) { return Hal_ReadRFThermalMeter(pAdapter); } void GetThermalMeter(PADAPTER pAdapter, u8 *value) { Hal_GetThermalMeter(pAdapter,value); } void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) { PhySetTxPowerLevel(pAdapter); Hal_SetSingleCarrierTx(pAdapter,bStart); } void SetSingleToneTx(PADAPTER pAdapter, u8 bStart) { PhySetTxPowerLevel(pAdapter); Hal_SetSingleToneTx(pAdapter,bStart); } void SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart) { PhySetTxPowerLevel(pAdapter); Hal_SetCarrierSuppressionTx(pAdapter, bStart); } void SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart) { PhySetTxPowerLevel(pAdapter); Hal_SetCCKContinuousTx(pAdapter,bStart); } void SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart) { PhySetTxPowerLevel(pAdapter); Hal_SetOFDMContinuousTx( pAdapter, bStart); }/* mpt_StartOfdmContTx */ void SetContinuousTx(PADAPTER pAdapter, u8 bStart) { PhySetTxPowerLevel(pAdapter); Hal_SetContinuousTx(pAdapter,bStart); } void PhySetTxPowerLevel(PADAPTER pAdapter) { struct mp_priv *pmp_priv = &pAdapter->mppriv; if (pmp_priv->bSetTxPower==0) // for NO manually set power index { #ifdef CONFIG_RTL8188E PHY_SetTxPowerLevel8188E(pAdapter,pmp_priv->channel); #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) PHY_SetTxPowerLevel8812(pAdapter,pmp_priv->channel); #endif #if defined(CONFIG_RTL8192D) PHY_SetTxPowerLevel8192D(pAdapter,pmp_priv->channel); #endif #if defined(CONFIG_RTL8192C) PHY_SetTxPowerLevel8192C(pAdapter,pmp_priv->channel); #endif #if defined(CONFIG_RTL8192E) PHY_SetTxPowerLevel8192E(pAdapter,pmp_priv->channel); #endif #if defined(CONFIG_RTL8723B) PHY_SetTxPowerLevel8723B(pAdapter,pmp_priv->channel); #endif mpt_ProQueryCalTxPower(pAdapter,pmp_priv->antenna_tx); } } //------------------------------------------------------------------------------ static void dump_mpframe(PADAPTER padapter, struct xmit_frame *pmpframe) { rtw_hal_mgnt_xmit(padapter, pmpframe); } static struct xmit_frame *alloc_mp_xmitframe(struct xmit_priv *pxmitpriv) { struct xmit_frame *pmpframe; struct xmit_buf *pxmitbuf; if ((pmpframe = rtw_alloc_xmitframe(pxmitpriv)) == NULL) { return NULL; } if ((pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv)) == NULL) { rtw_free_xmitframe(pxmitpriv, pmpframe); return NULL; } pmpframe->frame_tag = MP_FRAMETAG; pmpframe->pxmitbuf = pxmitbuf; pmpframe->buf_addr = pxmitbuf->pbuf; pxmitbuf->priv_data = pmpframe; return pmpframe; } static thread_return mp_xmit_packet_thread(thread_context context) { struct xmit_frame *pxmitframe; struct mp_tx *pmptx; struct mp_priv *pmp_priv; struct xmit_priv *pxmitpriv; PADAPTER padapter; pmp_priv = (struct mp_priv *)context; pmptx = &pmp_priv->tx; padapter = pmp_priv->papdater; pxmitpriv = &(padapter->xmitpriv); thread_enter("RTW_MP_THREAD"); DBG_871X("%s:pkTx Start\n", __func__); while (1) { pxmitframe = alloc_mp_xmitframe(pxmitpriv); if (pxmitframe == NULL) { if (pmptx->stop || padapter->bSurpriseRemoved || padapter->bDriverStopped) { goto exit; } else { rtw_usleep_os(10); continue; } } _rtw_memcpy((u8 *)(pxmitframe->buf_addr+TXDESC_OFFSET), pmptx->buf, pmptx->write_size); _rtw_memcpy(&(pxmitframe->attrib), &(pmptx->attrib), sizeof(struct pkt_attrib)); rtw_usleep_os(padapter->mppriv.pktInterval); dump_mpframe(padapter, pxmitframe); pmptx->sended++; pmp_priv->tx_pktcount++; if (pmptx->stop || padapter->bSurpriseRemoved || padapter->bDriverStopped) goto exit; if ((pmptx->count != 0) && (pmptx->count == pmptx->sended)) goto exit; flush_signals_thread(); } exit: //DBG_871X("%s:pkTx Exit\n", __func__); rtw_mfree(pmptx->pallocated_buf, pmptx->buf_size); pmptx->pallocated_buf = NULL; pmptx->stop = 1; thread_exit(); } void fill_txdesc_for_mp(PADAPTER padapter, u8 *ptxdesc) { struct mp_priv *pmp_priv = &padapter->mppriv; _rtw_memcpy(ptxdesc, pmp_priv->tx.desc, TXDESC_SIZE); } #if defined(CONFIG_RTL8192C) || defined(CONFIG_RTL8192D) void fill_tx_desc_8192cd(PADAPTER padapter) { struct mp_priv *pmp_priv = &padapter->mppriv; struct tx_desc *desc = (struct tx_desc *)&(pmp_priv->tx.desc); struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); desc->txdw1 |= cpu_to_le32(BK); // don't aggregate(AMPDU) desc->txdw1 |= cpu_to_le32((pattrib->mac_id) & 0x1F); //CAM_ID(MAC_ID) desc->txdw1 |= cpu_to_le32((pattrib->qsel << QSEL_SHT) & 0x00001F00); // Queue Select, TID desc->txdw1 |= cpu_to_le32((pattrib->raid << Rate_ID_SHT) & 0x000F0000); // Rate Adaptive ID // offset 8 // desc->txdw2 |= cpu_to_le32(AGG_BK);//AGG BK desc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0x0fff0000); desc->txdw4 |= cpu_to_le32(HW_SEQ_EN); desc->txdw4 |= cpu_to_le32(USERATE); desc->txdw4 |= cpu_to_le32(DISDATAFB); if( pmp_priv->preamble ){ if (pmp_priv->rateidx <= MPT_RATE_54M) desc->txdw4 |= cpu_to_le32(DATA_SHORT); // CCK Short Preamble } if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) desc->txdw4 |= cpu_to_le32(DATA_BW); // offset 20 desc->txdw5 |= cpu_to_le32(pmp_priv->rateidx & 0x0000001F); if( pmp_priv->preamble ){ if (pmp_priv->rateidx > MPT_RATE_54M) desc->txdw5 |= cpu_to_le32(SGI); // MCS Short Guard Interval } desc->txdw5 |= cpu_to_le32(0x0001FF00); // DATA/RTS Rate Fallback Limit } #endif #if defined(CONFIG_RTL8188E) void fill_tx_desc_8188e(PADAPTER padapter) { struct mp_priv *pmp_priv = &padapter->mppriv; struct tx_desc *desc = (struct tx_desc *)&(pmp_priv->tx.desc); struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); u32 pkt_size = pattrib->last_txcmdsz; s32 bmcast = IS_MCAST(pattrib->ra); // offset 0 #if !defined(CONFIG_RTL8188E_SDIO) && !defined(CONFIG_PCI_HCI) desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); desc->txdw0 |= cpu_to_le32(pkt_size & 0x0000FFFF); // packet size desc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00FF0000); //32 bytes for TX Desc if (bmcast) desc->txdw0 |= cpu_to_le32(BMC); // broadcast packet desc->txdw1 |= cpu_to_le32((0x01 << 26) & 0xff000000); #endif desc->txdw1 |= cpu_to_le32((pattrib->mac_id) & 0x3F); //CAM_ID(MAC_ID) desc->txdw1 |= cpu_to_le32((pattrib->qsel << QSEL_SHT) & 0x00001F00); // Queue Select, TID desc->txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000F0000); // Rate Adaptive ID // offset 8 // desc->txdw2 |= cpu_to_le32(AGG_BK);//AGG BK desc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0x0fff0000); desc->txdw4 |= cpu_to_le32(HW_SSN); desc->txdw4 |= cpu_to_le32(USERATE); desc->txdw4 |= cpu_to_le32(DISDATAFB); if( pmp_priv->preamble ){ if (pmp_priv->rateidx <= MPT_RATE_54M) desc->txdw4 |= cpu_to_le32(DATA_SHORT); // CCK Short Preamble } if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) desc->txdw4 |= cpu_to_le32(DATA_BW); // offset 20 desc->txdw5 |= cpu_to_le32(pmp_priv->rateidx & 0x0000001F); if( pmp_priv->preamble ){ if (pmp_priv->rateidx > MPT_RATE_54M) desc->txdw5 |= cpu_to_le32(SGI); // MCS Short Guard Interval } desc->txdw5 |= cpu_to_le32(RTY_LMT_EN); // retry limit enable desc->txdw5 |= cpu_to_le32(0x00180000); // DATA/RTS Rate Fallback Limit } #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) void fill_tx_desc_8812a(PADAPTER padapter) { struct mp_priv *pmp_priv = &padapter->mppriv; u8 *pDesc = (u8 *)&(pmp_priv->tx.desc); struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); u32 pkt_size = pattrib->last_txcmdsz; s32 bmcast = IS_MCAST(pattrib->ra); u8 data_rate,pwr_status,offset; SET_TX_DESC_FIRST_SEG_8812(pDesc, 1); SET_TX_DESC_LAST_SEG_8812(pDesc, 1); SET_TX_DESC_OWN_8812(pDesc, 1); SET_TX_DESC_PKT_SIZE_8812(pDesc, pkt_size); offset = TXDESC_SIZE + OFFSET_SZ; SET_TX_DESC_OFFSET_8812(pDesc, offset); SET_TX_DESC_PKT_OFFSET_8812(pDesc, 1); if (bmcast) { SET_TX_DESC_BMC_8812(pDesc, 1); } SET_TX_DESC_MACID_8812(pDesc, pattrib->mac_id); SET_TX_DESC_RATE_ID_8812(pDesc, pattrib->raid); //SET_TX_DESC_RATE_ID_8812(pDesc, RATEID_IDX_G); SET_TX_DESC_QUEUE_SEL_8812(pDesc, pattrib->qsel); //SET_TX_DESC_QUEUE_SEL_8812(pDesc, QSLT_MGNT); if (!pattrib->qos_en) { SET_TX_DESC_HWSEQ_EN_8812(pDesc, 1); // Hw set sequence number } else { SET_TX_DESC_SEQ_8812(pDesc, pattrib->seqnum); } if (pmp_priv->bandwidth <= CHANNEL_WIDTH_160) { SET_TX_DESC_DATA_BW_8812(pDesc, pmp_priv->bandwidth); } else { DBG_871X("%s:Err: unknown bandwidth %d, use 20M\n", __func__,pmp_priv->bandwidth); SET_TX_DESC_DATA_BW_8812(pDesc, CHANNEL_WIDTH_20); } SET_TX_DESC_DISABLE_FB_8812(pDesc, 1); SET_TX_DESC_USE_RATE_8812(pDesc, 1); SET_TX_DESC_TX_RATE_8812(pDesc, pmp_priv->rateidx); } #endif #if defined(CONFIG_RTL8192E) void fill_tx_desc_8192e(PADAPTER padapter) { struct mp_priv *pmp_priv = &padapter->mppriv; u8 *pDesc = (u8 *)&(pmp_priv->tx.desc); struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); u32 pkt_size = pattrib->last_txcmdsz; s32 bmcast = IS_MCAST(pattrib->ra); u8 data_rate,pwr_status,offset; SET_TX_DESC_PKT_SIZE_92E(pDesc, pkt_size); offset = TXDESC_SIZE + OFFSET_SZ; SET_TX_DESC_OFFSET_92E(pDesc, offset); #if defined(CONFIG_PCI_HCI) //8192EE SET_TX_DESC_OFFSET_92E(pDesc, offset+8); //work around SET_TX_DESC_PKT_OFFSET_92E(pDesc, 0); /* 8192EE pkt_offset is 0 */ #else //8192EU 8192ES SET_TX_DESC_OFFSET_92E(pDesc, offset); SET_TX_DESC_PKT_OFFSET_92E(pDesc, 1); #endif if (bmcast) { SET_TX_DESC_BMC_92E(pDesc, 1); } SET_TX_DESC_MACID_92E(pDesc, pattrib->mac_id); SET_TX_DESC_RATE_ID_92E(pDesc, pattrib->raid); SET_TX_DESC_QUEUE_SEL_92E(pDesc, pattrib->qsel); //SET_TX_DESC_QUEUE_SEL_8812(pDesc, QSLT_MGNT); if (!pattrib->qos_en) { SET_TX_DESC_HWSEQ_SEL_92E(pDesc, 1); // Hw set sequence number } else { SET_TX_DESC_SEQ_92E(pDesc, pattrib->seqnum); } if ((pmp_priv->bandwidth == CHANNEL_WIDTH_20) || (pmp_priv->bandwidth == CHANNEL_WIDTH_40)) { SET_TX_DESC_DATA_BW_92E(pDesc, pmp_priv->bandwidth); } else { DBG_871X("%s:Err: unknown bandwidth %d, use 20M\n", __func__,pmp_priv->bandwidth); SET_TX_DESC_DATA_BW_92E(pDesc, CHANNEL_WIDTH_20); } //SET_TX_DESC_DATA_SC_92E(pDesc, SCMapping_92E(padapter,pattrib)); SET_TX_DESC_DISABLE_FB_92E(pDesc, 1); SET_TX_DESC_USE_RATE_92E(pDesc, 1); SET_TX_DESC_TX_RATE_92E(pDesc, pmp_priv->rateidx); } #endif #if defined(CONFIG_RTL8723B) void fill_tx_desc_8723b(PADAPTER padapter) { struct mp_priv *pmp_priv = &padapter->mppriv; struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); PTXDESC_8723B ptxdesc = (PTXDESC_8723B)&(pmp_priv->tx.desc); u8 descRate; ptxdesc->bk = 1; ptxdesc->macid = pattrib->mac_id; ptxdesc->qsel = pattrib->qsel; ptxdesc->rate_id = pattrib->raid; ptxdesc->seq = pattrib->seqnum; ptxdesc->en_hwseq = 1; ptxdesc->userate = 1; ptxdesc->disdatafb = 1; if( pmp_priv->preamble ){ if (pmp_priv->rateidx <= MPT_RATE_54M) ptxdesc->data_short = 1; } if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) ptxdesc->data_bw = 1; ptxdesc->datarate = pmp_priv->rateidx; ptxdesc->data_ratefb_lmt = 0x1F; ptxdesc->rts_ratefb_lmt = 0xF; } #endif static void Rtw_MPSetMacTxEDCA(PADAPTER padapter) { rtw_write32(padapter, 0x508 , 0x00a422); //Disable EDCA BE Txop for MP pkt tx adjust Packet interval //DBG_871X("%s:write 0x508~~~~~~ 0x%x\n", __func__,rtw_read32(padapter, 0x508)); PHY_SetMacReg(padapter, 0x458 ,bMaskDWord , 0x0); //DBG_8192C("%s()!!!!! 0x460 = 0x%x\n" ,__func__,PHY_QueryBBReg(padapter, 0x460, bMaskDWord)); PHY_SetMacReg(padapter, 0x460 ,bMaskLWord , 0x0);//fast EDCA queue packet interval & time out vaule //PHY_SetMacReg(padapter, ODM_EDCA_VO_PARAM ,bMaskLWord , 0x431C); //PHY_SetMacReg(padapter, ODM_EDCA_BE_PARAM ,bMaskLWord , 0x431C); //PHY_SetMacReg(padapter, ODM_EDCA_BK_PARAM ,bMaskLWord , 0x431C); DBG_8192C("%s()!!!!! 0x460 = 0x%x\n" ,__func__,PHY_QueryBBReg(padapter, 0x460, bMaskDWord)); } void SetPacketTx(PADAPTER padapter) { u8 *ptr, *pkt_start, *pkt_end,*fctrl; u32 pkt_size,offset,startPlace,i; struct rtw_ieee80211_hdr *hdr; u8 payload; s32 bmcast; struct pkt_attrib *pattrib; struct mp_priv *pmp_priv; pmp_priv = &padapter->mppriv; if (pmp_priv->tx.stop) return; pmp_priv->tx.sended = 0; pmp_priv->tx.stop = 0; pmp_priv->tx_pktcount = 0; //3 1. update_attrib() pattrib = &pmp_priv->tx.attrib; _rtw_memcpy(pattrib->src, padapter->eeprompriv.mac_addr, ETH_ALEN); _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); bmcast = IS_MCAST(pattrib->ra); if (bmcast) { pattrib->mac_id = 1; pattrib->psta = rtw_get_bcmc_stainfo(padapter); } else { pattrib->mac_id = 0; pattrib->psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv)); } pattrib->mbssid = 0; pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->pktlen; //3 2. allocate xmit buffer pkt_size = pattrib->last_txcmdsz; if (pmp_priv->tx.pallocated_buf) rtw_mfree(pmp_priv->tx.pallocated_buf, pmp_priv->tx.buf_size); pmp_priv->tx.write_size = pkt_size; pmp_priv->tx.buf_size = pkt_size + XMITBUF_ALIGN_SZ; pmp_priv->tx.pallocated_buf = rtw_zmalloc(pmp_priv->tx.buf_size); if (pmp_priv->tx.pallocated_buf == NULL) { DBG_871X("%s: malloc(%d) fail!!\n", __func__, pmp_priv->tx.buf_size); return; } pmp_priv->tx.buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pmp_priv->tx.pallocated_buf), XMITBUF_ALIGN_SZ); ptr = pmp_priv->tx.buf; _rtw_memset(pmp_priv->tx.desc, 0, TXDESC_SIZE); pkt_start = ptr; pkt_end = pkt_start + pkt_size; //3 3. init TX descriptor #if defined(CONFIG_RTL8192C) || defined(CONFIG_RTL8192D) if(IS_HARDWARE_TYPE_8192C(padapter) ||IS_HARDWARE_TYPE_8192D(padapter)) fill_tx_desc_8192cd(padapter); #endif #if defined(CONFIG_RTL8188E) if(IS_HARDWARE_TYPE_8188E(padapter)) fill_tx_desc_8188e(padapter); #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) if(IS_HARDWARE_TYPE_8812(padapter) || IS_HARDWARE_TYPE_8821(padapter)) fill_tx_desc_8812a(padapter); #endif #if defined(CONFIG_RTL8192E) if(IS_HARDWARE_TYPE_8192E(padapter)) fill_tx_desc_8192e(padapter); #endif #if defined(CONFIG_RTL8723B) if(IS_HARDWARE_TYPE_8723B(padapter)) fill_tx_desc_8723b(padapter); #endif //3 4. make wlan header, make_wlanhdr() hdr = (struct rtw_ieee80211_hdr *)pkt_start; SetFrameSubType(&hdr->frame_ctl, pattrib->subtype); // SetFrDs(&hdr->frame_ctl); _rtw_memcpy(hdr->addr1, pattrib->dst, ETH_ALEN); // DA _rtw_memcpy(hdr->addr2, pattrib->src, ETH_ALEN); // SA _rtw_memcpy(hdr->addr3, get_bssid(&padapter->mlmepriv), ETH_ALEN); // RA, BSSID //3 5. make payload ptr = pkt_start + pattrib->hdrlen; switch (pmp_priv->tx.payload) { case 0: payload = 0x00; break; case 1: payload = 0x5a; break; case 2: payload = 0xa5; break; case 3: payload = 0xff; break; default: payload = 0x00; break; } pmp_priv->TXradomBuffer = rtw_zmalloc(4096); if(pmp_priv->TXradomBuffer == NULL) { DBG_871X("mp create random buffer fail!\n"); goto exit; } for(i=0;i<4096;i++) pmp_priv->TXradomBuffer[i] = rtw_random32() %0xFF; //startPlace = (u32)(rtw_random32() % 3450); _rtw_memcpy(ptr, pmp_priv->TXradomBuffer,pkt_end - ptr); //_rtw_memset(ptr, payload, pkt_end - ptr); rtw_mfree(pmp_priv->TXradomBuffer,4096); //3 6. start thread #ifdef PLATFORM_LINUX pmp_priv->tx.PktTxThread = kthread_run(mp_xmit_packet_thread, pmp_priv, "RTW_MP_THREAD"); if (IS_ERR(pmp_priv->tx.PktTxThread)) DBG_871X("Create PktTx Thread Fail !!!!!\n"); #endif #ifdef PLATFORM_FREEBSD { struct proc *p; struct thread *td; pmp_priv->tx.PktTxThread = kproc_kthread_add(mp_xmit_packet_thread, pmp_priv, &p, &td, RFHIGHPID, 0, "MPXmitThread", "MPXmitThread"); if (pmp_priv->tx.PktTxThread < 0) DBG_871X("Create PktTx Thread Fail !!!!!\n"); } #endif Rtw_MPSetMacTxEDCA(padapter); exit: return; } void SetPacketRx(PADAPTER pAdapter, u8 bStartRx) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); struct mp_priv *pmppriv = &pAdapter->mppriv; u8 type; type = _HW_STATE_AP_; if(bStartRx) { #ifdef CONFIG_RTL8723B PHY_SetMacReg(pAdapter, 0xe70, BIT23|BIT22, 0x3);// Power on adc (in RX_WAIT_CCA state) write_bbreg(pAdapter, 0xa01, BIT0, bDisable);// improve Rx performance by jerry #endif if( pmppriv->bSetRxBssid == _TRUE ){ //pHalData->ReceiveConfig = RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYST_RXFF; pHalData->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |RCR_AMF | RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYST_RXFF ; pHalData->ReceiveConfig |= ACRC32; DBG_8192C("%s , pmppriv->network_macaddr =%x %x %x %x %x %x\n",__func__, pmppriv->network_macaddr[0],pmppriv->network_macaddr[1],pmppriv->network_macaddr[2],pmppriv->network_macaddr[3],pmppriv->network_macaddr[4],pmppriv->network_macaddr[5]); //Set_MSR(pAdapter, WIFI_FW_AP_STATE); //rtw_hal_set_hwreg(pAdapter, HW_VAR_BSSID, pmppriv->network_macaddr); //rtw_hal_set_hwreg(pAdapter, HW_VAR_SET_OPMODE, (u8 *)(&type)); } else { pHalData->ReceiveConfig = AAP | APM | AM | AB | APP_ICV | ADF | AMF | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS; pHalData->ReceiveConfig |= ACRC32; rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig); // Accept all data frames rtw_write16(pAdapter, REG_RXFLTMAP2, 0xFFFF); // Accept CRC error and destination address } } else { #ifdef CONFIG_RTL8723B PHY_SetMacReg(pAdapter, 0xe70, BIT23|BIT22, 0x00);// Power off adc (in RX_WAIT_CCA state) write_bbreg(pAdapter, 0xa01, BIT0, bEnable);// improve Rx performance by jerry #endif rtw_write32(pAdapter, REG_RCR, 0); } } void ResetPhyRxPktCount(PADAPTER pAdapter) { u32 i, phyrx_set = 0; for (i = 0; i <= 0xF; i++) { phyrx_set = 0; phyrx_set |= _RXERR_RPT_SEL(i); //select phyrx_set |= RXERR_RPT_RST; // set counter to zero rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set); } } static u32 GetPhyRxPktCounts(PADAPTER pAdapter, u32 selbit) { //selection u32 phyrx_set = 0, count = 0; phyrx_set = _RXERR_RPT_SEL(selbit & 0xF); rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set); //Read packet count count = rtw_read32(pAdapter, REG_RXERR_RPT) & RXERR_COUNTER_MASK; return count; } u32 GetPhyRxPktReceived(PADAPTER pAdapter) { u32 OFDM_cnt = 0, CCK_cnt = 0, HT_cnt = 0; OFDM_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_OFDM_MPDU_OK); CCK_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_CCK_MPDU_OK); HT_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_HT_MPDU_OK); return OFDM_cnt + CCK_cnt + HT_cnt; } u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter) { u32 OFDM_cnt = 0, CCK_cnt = 0, HT_cnt = 0; OFDM_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_OFDM_MPDU_FAIL); CCK_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_CCK_MPDU_FAIL); HT_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_HT_MPDU_FAIL); return OFDM_cnt + CCK_cnt + HT_cnt; } //reg 0x808[9:0]: FFT data x //reg 0x808[22]: 0 --> 1 to get 1 FFT data y //reg 0x8B4[15:0]: FFT data y report static u32 rtw_GetPSDData(PADAPTER pAdapter, u32 point) { u32 psd_val=0; #if defined(CONFIG_RTL8812A)||defined(CONFIG_RTL8821A) //MP PSD for 8812A u16 psd_reg = 0x910; u16 psd_regL= 0xF44; #else u16 psd_reg = 0x808; u16 psd_regL= 0x8B4; #endif psd_val = rtw_read32(pAdapter, psd_reg); psd_val &= 0xFFBFFC00; psd_val |= point; rtw_write32(pAdapter, psd_reg, psd_val); rtw_mdelay_os(1); psd_val |= 0x00400000; rtw_write32(pAdapter, psd_reg, psd_val); rtw_mdelay_os(1); psd_val = rtw_read32(pAdapter, psd_regL); psd_val &= 0x0000FFFF; return psd_val; } /* * pts start_point_min stop_point_max * 128 64 64 + 128 = 192 * 256 128 128 + 256 = 384 * 512 256 256 + 512 = 768 * 1024 512 512 + 1024 = 1536 * */ u32 mp_query_psd(PADAPTER pAdapter, u8 *data) { u32 i, psd_pts=0, psd_start=0, psd_stop=0; u32 psd_data=0; #ifdef PLATFORM_LINUX if (!netif_running(pAdapter->pnetdev)) { RT_TRACE(_module_mp_, _drv_warning_, ("mp_query_psd: Fail! interface not opened!\n")); return 0; } #endif if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { RT_TRACE(_module_mp_, _drv_warning_, ("mp_query_psd: Fail! not in MP mode!\n")); return 0; } if (strlen(data) == 0) { //default value psd_pts = 128; psd_start = 64; psd_stop = 128; } else { sscanf(data, "pts=%d,start=%d,stop=%d", &psd_pts, &psd_start, &psd_stop); } data[0]='\0'; i = psd_start; while (i < psd_stop) { if (i >= psd_pts) { psd_data = rtw_GetPSDData(pAdapter, i-psd_pts); } else { psd_data = rtw_GetPSDData(pAdapter, i); } sprintf(data, "%s%x ", data, psd_data); i++; } #ifdef CONFIG_LONG_DELAY_ISSUE rtw_msleep_os(100); #else rtw_mdelay_os(100); #endif return strlen(data)+1; } #if 0 void _rtw_mp_xmit_priv (struct xmit_priv *pxmitpriv) { int i,res; _adapter *padapter = pxmitpriv->adapter; struct xmit_frame *pxmitframe = (struct xmit_frame*) pxmitpriv->pxmit_frame_buf; struct xmit_buf *pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmitbuf; u32 max_xmit_extbuf_size = MAX_XMIT_EXTBUF_SZ; u32 num_xmit_extbuf = NR_XMIT_EXTBUFF; if(padapter->registrypriv.mp_mode ==0) { max_xmit_extbuf_size = MAX_XMIT_EXTBUF_SZ; num_xmit_extbuf = NR_XMIT_EXTBUFF; } else { max_xmit_extbuf_size = 6000; num_xmit_extbuf = 8; } pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf; for(i=0; ipallocated_xmit_extbuf) { rtw_vmfree(pxmitpriv->pallocated_xmit_extbuf, num_xmit_extbuf * sizeof(struct xmit_buf) + 4); } if(padapter->registrypriv.mp_mode ==0) { max_xmit_extbuf_size = 6000; num_xmit_extbuf = 8; } else { max_xmit_extbuf_size = MAX_XMIT_EXTBUF_SZ; num_xmit_extbuf = NR_XMIT_EXTBUFF; } // Init xmit extension buff _rtw_init_queue(&pxmitpriv->free_xmit_extbuf_queue); pxmitpriv->pallocated_xmit_extbuf = rtw_zvmalloc(num_xmit_extbuf * sizeof(struct xmit_buf) + 4); if (pxmitpriv->pallocated_xmit_extbuf == NULL){ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("alloc xmit_extbuf fail!\n")); res= _FAIL; goto exit; } pxmitpriv->pxmit_extbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_xmit_extbuf), 4); pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf; for (i = 0; i < num_xmit_extbuf; i++) { _rtw_init_listhead(&pxmitbuf->list); pxmitbuf->priv_data = NULL; pxmitbuf->padapter = padapter; pxmitbuf->buf_tag = XMITBUF_MGNT; if((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf,max_xmit_extbuf_size + XMITBUF_ALIGN_SZ, _TRUE)) == _FAIL) { res= _FAIL; goto exit; } #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) pxmitbuf->phead = pxmitbuf->pbuf; pxmitbuf->pend = pxmitbuf->pbuf + max_xmit_extbuf_size; pxmitbuf->len = 0; pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; #endif rtw_list_insert_tail(&pxmitbuf->list, &(pxmitpriv->free_xmit_extbuf_queue.queue)); #ifdef DBG_XMIT_BUF_EXT pxmitbuf->no=i; #endif pxmitbuf++; } pxmitpriv->free_xmit_extbuf_cnt = num_xmit_extbuf; exit: ; } #endif ULONG getPowerDiffByRate8188E( IN PADAPTER pAdapter, IN u1Byte CurrChannel, IN ULONG RfPath ) { PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ULONG PwrGroup=0; ULONG TxPower=0, Limit=0; ULONG Pathmapping = (RfPath == ODM_RF_PATH_A?0:8); switch(pHalData->EEPROMRegulatory) { case 0: // driver-defined maximum power offset for longer communication range // refer to power by rate table PwrGroup = 0; Limit = 0xff; break; case 1: // Power-limit table-defined maximum power offset range // choosed by min(power by rate, power limit). { if(pHalData->pwrGroupCnt == 1) PwrGroup = 0; if(pHalData->pwrGroupCnt >= 3) { if(CurrChannel <= 3) PwrGroup = 0; else if(CurrChannel >= 4 && CurrChannel <= 9) PwrGroup = 1; else if(CurrChannel > 9) PwrGroup = 2; if(pHalData->CurrentChannelBW == CHANNEL_WIDTH_20) PwrGroup++; else PwrGroup+=4; } Limit = 0xff; } break; case 2: // not support power offset by rate. // don't increase any power diff PwrGroup = 0; Limit = 0; break; default: PwrGroup = 0; Limit = 0xff; break; } { switch(pMptCtx->MptRateIndex) { case MPT_RATE_1M: case MPT_RATE_2M: case MPT_RATE_55M: case MPT_RATE_11M: //CCK rates, don't add any tx power index. //RT_DISP(FPHY, PHY_TXPWR,("CCK rates!\n")); break; case MPT_RATE_6M: //0xe00 [31:0] = 18M,12M,09M,06M TxPower += ((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][0+Pathmapping])&0xff); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%x, OFDM 6M, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][0], TxPower)); break; case MPT_RATE_9M: TxPower += (((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][0+Pathmapping])&0xff00)>>8); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%x, OFDM 9M, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][0], TxPower)); break; case MPT_RATE_12M: TxPower += (((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][0+Pathmapping])&0xff0000)>>16); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%x, OFDM 12M, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][0], TxPower)); break; case MPT_RATE_18M: TxPower += (((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][0+Pathmapping])&0xff000000)>>24); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%x, OFDM 24M, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][0], TxPower)); break; case MPT_RATE_24M: //0xe04[31:0] = 54M,48M,36M,24M TxPower += ((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][1+Pathmapping])&0xff); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][1] = 0x%x, OFDM 24M, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][1], TxPower)); break; case MPT_RATE_36M: TxPower += (((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][1+Pathmapping])&0xff00)>>8); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][1] = 0x%x, OFDM 36M, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][1], TxPower)); break; case MPT_RATE_48M: TxPower += (((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][1+Pathmapping])&0xff0000)>>16); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][1] = 0x%x, OFDM 48M, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][1], TxPower)); break; case MPT_RATE_54M: TxPower += (((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][1+Pathmapping])&0xff000000)>>24); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][1] = 0x%x, OFDM 54M, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][1], TxPower)); break; case MPT_RATE_MCS0: //0xe10[31:0]= MCS=03,02,01,00 TxPower += ((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][2+Pathmapping])&0xff); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][2] = 0x%x, MCS0, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][2], TxPower)); break; case MPT_RATE_MCS1: TxPower += (((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][2+Pathmapping])&0xff00)>>8); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][2] = 0x%x, MCS1, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][2], TxPower)); break; case MPT_RATE_MCS2: TxPower += (((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][2+Pathmapping])&0xff0000)>>16); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][2] = 0x%x, MCS2, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][2], TxPower)); break; case MPT_RATE_MCS3: TxPower += (((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][2+Pathmapping])&0xff000000)>>24); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][2] = 0x%x, MCS3, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][2], TxPower)); break; case MPT_RATE_MCS4: //0xe14[31:0]= MCS=07,06,05,04 TxPower += ((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][3+Pathmapping])&0xff); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][3] = 0x%x, MCS4, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][3], TxPower)); break; case MPT_RATE_MCS5: TxPower += (((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][3+Pathmapping])&0xff00)>>8); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][3] = 0x%x, MCS5, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][3], TxPower)); break; case MPT_RATE_MCS6: TxPower += (((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][3+Pathmapping])&0xff0000)>>16); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][3] = 0x%x, MCS6, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][3], TxPower)); break; case MPT_RATE_MCS7: TxPower += (((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][3+Pathmapping])&0xff000000)>>24); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][3] = 0x%x, MCS7, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][3], TxPower)); break; case MPT_RATE_MCS8: //0xe18[31:0]= MCS=11,10,09,08 TxPower += ((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][4+Pathmapping])&0xff); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][4] = 0x%x, MCS8, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][4], TxPower)); break; case MPT_RATE_MCS9: TxPower += (((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][4+Pathmapping])&0xff00)>>8); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][4] = 0x%x, MCS9, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][4], TxPower)); break; case MPT_RATE_MCS10: TxPower += (((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][4+Pathmapping])&0xff0000)>>16); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][4] = 0x%x, MCS10, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][4], TxPower)); break; case MPT_RATE_MCS11: TxPower += (((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][4+Pathmapping])&0xff000000)>>24); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][4] = 0x%x, MCS11, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][4], TxPower)); break; case MPT_RATE_MCS12: //0xe1c[31:0]= MCS=15,14,13,12 TxPower += ((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][5+Pathmapping])&0xff); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][5] = 0x%x, MCS12, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][5], TxPower)); break; case MPT_RATE_MCS13: TxPower += (((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][5+Pathmapping])&0xff00)>>8); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][5] = 0x%x, MCS13, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][5], TxPower)); break; case MPT_RATE_MCS14: TxPower += (((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][5+Pathmapping])&0xff0000)>>16); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][5] = 0x%x, MCS14, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][5], TxPower)); break; case MPT_RATE_MCS15: TxPower += (((pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][5+Pathmapping])&0xff000000)>>24); //RT_DISP(FPHY, PHY_TXPWR,("MCSTxPowerLevelOriginalOffset[%d][5] = 0x%x, MCS15, TxPower = %d\n", // PwrGroup, pHalData->MCSTxPowerLevelOriginalOffset[PwrGroup][5], TxPower)); break; default: break; } } if(TxPower > Limit) TxPower = Limit; return TxPower; } static ULONG mpt_ProQueryCalTxPower_8188E( IN PADAPTER pAdapter, IN u1Byte RfPath ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); u1Byte TxCount=TX_1S, i = 0; //default set to 1S //PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); ULONG TxPower = 1, PwrGroup=0, PowerDiffByRate=0; ULONG TxPowerCCK = 1, TxPowerOFDM = 1, TxPowerBW20 = 1, TxPowerBW40 = 1 ; PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); u1Byte CurrChannel = pHalData->CurrentChannel; u1Byte index = (CurrChannel -1); u1Byte rf_path=(RfPath), rfPath; u1Byte limit = 0, rate = 0; if(HAL_IsLegalChannel(pAdapter, CurrChannel) == FALSE) { CurrChannel = 1; } if(pMptCtx->MptRateIndex <= MPT_RATE_11M ) { TxPower = pHalData->Index24G_CCK_Base[rf_path][index]; } else if(pMptCtx->MptRateIndex >= MPT_RATE_6M && pMptCtx->MptRateIndex <= MPT_RATE_54M ) { TxPower = pHalData->Index24G_BW40_Base[rf_path][index]; } else if(pMptCtx->MptRateIndex >= MPT_RATE_MCS0 && pMptCtx->MptRateIndex <= MPT_RATE_MCS7 ) { TxPower = pHalData->Index24G_BW40_Base[rf_path][index]; } //RT_DISP(FPHY, PHY_TXPWR, ("HT40 rate(%d) Tx power(RF-%c) = 0x%x\n", pMptCtx->MptRateIndex, ((rf_path==0)?'A':'B'), TxPower)); if(pMptCtx->MptRateIndex >= MPT_RATE_6M && pMptCtx->MptRateIndex <= MPT_RATE_54M ) { TxPower += pHalData->OFDM_24G_Diff[rf_path][TxCount]; ///RT_DISP(FPHY, PHY_TXPWR, ("+OFDM_PowerDiff(RF-%c) = 0x%x\n", ((rf_path==0)?'A':'B'), // pHalData->OFDM_24G_Diff[rf_path][TxCount])); } if(pMptCtx->MptRateIndex >= MPT_RATE_MCS0) { if (pHalData->CurrentChannelBW == CHANNEL_WIDTH_20) { TxPower += pHalData->BW20_24G_Diff[rf_path][TxCount]; // RT_DISP(FPHY, PHY_TXPWR, ("+HT20_PowerDiff(RF-%c) = 0x%x\n", ((rf_path==0)?'A':'B'), // pHalData->BW20_24G_Diff[rf_path][TxCount])); } } #ifdef ENABLE_POWER_BY_RATE PowerDiffByRate = getPowerDiffByRate8188E(pAdapter, CurrChannel, RfPath); #else PowerDiffByRate = 0; #endif // 2012/11/02 Awk: add power limit mechansim if( pMptCtx->MptRateIndex <= MPT_RATE_11M ) { rate = MGN_1M; } else if(pMptCtx->MptRateIndex >= MPT_RATE_6M && pMptCtx->MptRateIndex <= MPT_RATE_54M ) { rate = MGN_54M; } else if(pMptCtx->MptRateIndex >= MPT_RATE_MCS0 && pMptCtx->MptRateIndex <= MPT_RATE_MCS7 ) { rate = MGN_MCS7; } limit = (u8)PHY_GetTxPowerLimit(pAdapter, pMptCtx->RegTxPwrLimit, pHalData->CurrentBandType, pHalData->CurrentChannelBW,RfPath, rate, CurrChannel); //RT_DISP(FPHY, PHY_TXPWR, ("+PowerDiffByRate(RF-%c) = 0x%x\n", ((rf_path==0)?'A':'B'), // PowerDiffByRate)); TxPower += PowerDiffByRate; //RT_DISP(FPHY, PHY_TXPWR, ("PowerDiffByRate limit value(RF-%c) = %d\n", ((rf_path==0)?'A':'B'), // limit)); TxPower += limit > (s8) PowerDiffByRate ? PowerDiffByRate : limit; return TxPower; } u8 MptToMgntRate( IN ULONG MptRateIdx ) { // Mapped to MGN_XXX defined in MgntGen.h switch (MptRateIdx) { /* CCK rate. */ case MPT_RATE_1M: return MGN_1M; case MPT_RATE_2M: return MGN_2M; case MPT_RATE_55M: return MGN_5_5M; case MPT_RATE_11M: return MGN_11M; /* OFDM rate. */ case MPT_RATE_6M: return MGN_6M; case MPT_RATE_9M: return MGN_9M; case MPT_RATE_12M: return MGN_12M; case MPT_RATE_18M: return MGN_18M; case MPT_RATE_24M: return MGN_24M; case MPT_RATE_36M: return MGN_36M; case MPT_RATE_48M: return MGN_48M; case MPT_RATE_54M: return MGN_54M; /* HT rate. */ case MPT_RATE_MCS0: return MGN_MCS0; case MPT_RATE_MCS1: return MGN_MCS1; case MPT_RATE_MCS2: return MGN_MCS2; case MPT_RATE_MCS3: return MGN_MCS3; case MPT_RATE_MCS4: return MGN_MCS4; case MPT_RATE_MCS5: return MGN_MCS5; case MPT_RATE_MCS6: return MGN_MCS6; case MPT_RATE_MCS7: return MGN_MCS7; case MPT_RATE_MCS8: return MGN_MCS8; case MPT_RATE_MCS9: return MGN_MCS9; case MPT_RATE_MCS10: return MGN_MCS10; case MPT_RATE_MCS11: return MGN_MCS11; case MPT_RATE_MCS12: return MGN_MCS12; case MPT_RATE_MCS13: return MGN_MCS13; case MPT_RATE_MCS14: return MGN_MCS14; case MPT_RATE_MCS15: return MGN_MCS15; case MPT_RATE_MCS16: return MGN_MCS16; case MPT_RATE_MCS17: return MGN_MCS17; case MPT_RATE_MCS18: return MGN_MCS18; case MPT_RATE_MCS19: return MGN_MCS19; case MPT_RATE_MCS20: return MGN_MCS20; case MPT_RATE_MCS21: return MGN_MCS21; case MPT_RATE_MCS22: return MGN_MCS22; case MPT_RATE_MCS23: return MGN_MCS23; case MPT_RATE_MCS24: return MGN_MCS24; case MPT_RATE_MCS25: return MGN_MCS25; case MPT_RATE_MCS26: return MGN_MCS26; case MPT_RATE_MCS27: return MGN_MCS27; case MPT_RATE_MCS28: return MGN_MCS28; case MPT_RATE_MCS29: return MGN_MCS29; case MPT_RATE_MCS30: return MGN_MCS30; case MPT_RATE_MCS31: return MGN_MCS31; /* VHT rate. */ case MPT_RATE_VHT1SS_MCS0: return MGN_VHT1SS_MCS0; case MPT_RATE_VHT1SS_MCS1: return MGN_VHT1SS_MCS1; case MPT_RATE_VHT1SS_MCS2: return MGN_VHT1SS_MCS2; case MPT_RATE_VHT1SS_MCS3: return MGN_VHT1SS_MCS3; case MPT_RATE_VHT1SS_MCS4: return MGN_VHT1SS_MCS4; case MPT_RATE_VHT1SS_MCS5: return MGN_VHT1SS_MCS5; case MPT_RATE_VHT1SS_MCS6: return MGN_VHT1SS_MCS6; case MPT_RATE_VHT1SS_MCS7: return MGN_VHT1SS_MCS7; case MPT_RATE_VHT1SS_MCS8: return MGN_VHT1SS_MCS8; case MPT_RATE_VHT1SS_MCS9: return MGN_VHT1SS_MCS9; case MPT_RATE_VHT2SS_MCS0: return MGN_VHT2SS_MCS0; case MPT_RATE_VHT2SS_MCS1: return MGN_VHT2SS_MCS1; case MPT_RATE_VHT2SS_MCS2: return MGN_VHT2SS_MCS2; case MPT_RATE_VHT2SS_MCS3: return MGN_VHT2SS_MCS3; case MPT_RATE_VHT2SS_MCS4: return MGN_VHT2SS_MCS4; case MPT_RATE_VHT2SS_MCS5: return MGN_VHT2SS_MCS5; case MPT_RATE_VHT2SS_MCS6: return MGN_VHT2SS_MCS6; case MPT_RATE_VHT2SS_MCS7: return MGN_VHT2SS_MCS7; case MPT_RATE_VHT2SS_MCS8: return MGN_VHT2SS_MCS8; case MPT_RATE_VHT2SS_MCS9: return MGN_VHT2SS_MCS9; case MPT_RATE_VHT3SS_MCS0: return MGN_VHT3SS_MCS0; case MPT_RATE_VHT3SS_MCS1: return MGN_VHT3SS_MCS1; case MPT_RATE_VHT3SS_MCS2: return MGN_VHT3SS_MCS2; case MPT_RATE_VHT3SS_MCS3: return MGN_VHT3SS_MCS3; case MPT_RATE_VHT3SS_MCS4: return MGN_VHT3SS_MCS4; case MPT_RATE_VHT3SS_MCS5: return MGN_VHT3SS_MCS5; case MPT_RATE_VHT3SS_MCS6: return MGN_VHT3SS_MCS6; case MPT_RATE_VHT3SS_MCS7: return MGN_VHT3SS_MCS7; case MPT_RATE_VHT3SS_MCS8: return MGN_VHT3SS_MCS8; case MPT_RATE_VHT3SS_MCS9: return MGN_VHT3SS_MCS9; case MPT_RATE_VHT4SS_MCS0: return MGN_VHT4SS_MCS0; case MPT_RATE_VHT4SS_MCS1: return MGN_VHT4SS_MCS1; case MPT_RATE_VHT4SS_MCS2: return MGN_VHT4SS_MCS2; case MPT_RATE_VHT4SS_MCS3: return MGN_VHT4SS_MCS3; case MPT_RATE_VHT4SS_MCS4: return MGN_VHT4SS_MCS4; case MPT_RATE_VHT4SS_MCS5: return MGN_VHT4SS_MCS5; case MPT_RATE_VHT4SS_MCS6: return MGN_VHT4SS_MCS6; case MPT_RATE_VHT4SS_MCS7: return MGN_VHT4SS_MCS7; case MPT_RATE_VHT4SS_MCS8: return MGN_VHT4SS_MCS8; case MPT_RATE_VHT4SS_MCS9: return MGN_VHT4SS_MCS9; case MPT_RATE_LAST: // fully automatiMGN_VHT2SS_MCS1; default: DBG_871X("<===MptToMgntRate(), Invalid Rate: %d!!\n", MptRateIdx); return 0x0; } } u8 rtw_mpRateParseFunc(PADAPTER pAdapter, u8 *targetStr) { u16 i=0; u8* rateindex_Array[] = { "1M","2M","5.5M","11M","6M","9M","12M","18M","24M","36M","48M","54M", "HTMCS0","HTMCS1","HTMCS2","HTMCS3","HTMCS4","HTMCS5","HTMCS6","HTMCS7", "HTMCS8","HTMCS9","HTMCS10","HTMCS11","HTMCS12","HTMCS13","HTMCS14","HTMCS15", "HTMCS16","HTMCS17","HTMCS18","HTMCS19","HTMCS20","HTMCS21","HTMCS22","HTMCS23", "HTMCS24","HTMCS25","HTMCS26","HTMCS27","HTMCS28","HTMCS29","HTMCS30","HTMCS31", "VHT1MCS0","VHT1MCS1","VHT1MCS2","VHT1MCS3","VHT1MCS4","VHT1MCS5","VHT1MCS6","VHT1MCS7","VHT1MCS8","VHT1MCS9", "VHT2MCS0","VHT2MCS1","VHT2MCS2","VHT2MCS3","VHT2MCS4","VHT2MCS5","VHT2MCS6","VHT2MCS7","VHT2MCS8","VHT2MCS9", "VHT3MCS0","VHT3MCS1","VHT3MCS2","VHT3MCS3","VHT3MCS4","VHT3MCS5","VHT3MCS6","VHT3MCS7","VHT3MCS8","VHT3MCS9", "VHT4MCS0","VHT4MCS1","VHT4MCS2","VHT4MCS3","VHT4MCS4","VHT4MCS5","VHT4MCS6","VHT4MCS7","VHT4MCS8","VHT4MCS9"}; for(i=0;i<=83;i++){ if(strcmp(targetStr, rateindex_Array[i]) == 0){ DBG_871X("%s , index = %d \n",__func__ ,i); return i; } } printk("%s ,please input a Data RATE String as:",__func__); for(i=0;i<=83;i++){ printk("%s ",rateindex_Array[i]); if(i%10==0) printk("\n"); } return _FAIL; } ULONG mpt_ProQueryCalTxPower( PADAPTER pAdapter, u8 RfPath ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ULONG TxPower = 1, PwrGroup=0, PowerDiffByRate=0; u1Byte limit = 0, rate = 0; #if 0// defined(CONFIG_RTL8192D) ||defined(CONFIG_RTL8192C) if(IS_HARDWARE_TYPE_8188E_before(pAdapter)) return mpt_ProQueryCalTxPower_8192C(pAdapter, RfPath); #endif #if defined(CONFIG_RTL8188E) if (IS_HARDWARE_TYPE_8188E(pAdapter)) { //return mpt_ProQueryCalTxPower_8188E(pAdapter, RfPath); rate = MptToMgntRate(pAdapter->mppriv.rateidx); TxPower = PHY_GetTxPowerIndex_8188E(pAdapter, RfPath, rate, pHalData->CurrentChannelBW, pHalData->CurrentChannel); } #endif #if defined(CONFIG_RTL8723B) if( IS_HARDWARE_TYPE_8723B(pAdapter) ) { rate = MptToMgntRate(pAdapter->mppriv.rateidx); TxPower = PHY_GetTxPowerIndex_8723B(pAdapter, RfPath, rate, pHalData->CurrentChannelBW, pHalData->CurrentChannel); } #endif #if defined(CONFIG_RTL8192E) if( IS_HARDWARE_TYPE_8192E(pAdapter) ) { rate = MptToMgntRate(pAdapter->mppriv.rateidx); TxPower = PHY_GetTxPowerIndex_8192E(pAdapter, RfPath, rate, pHalData->CurrentChannelBW, pHalData->CurrentChannel); } #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) if( IS_HARDWARE_TYPE_JAGUAR(pAdapter) ) { rate = MptToMgntRate(pAdapter->mppriv.rateidx); TxPower = PHY_GetTxPowerIndex_8812A(pAdapter, RfPath, rate, pHalData->CurrentChannelBW, pHalData->CurrentChannel); } #endif #if defined(CONFIG_RTL8814A) if ( IS_HARDWARE_TYPE_8814A(pAdapter) ) { rate = MptToMgntRate(pAdapter->mppriv.rateidx); TxPower = PHY_GetTxPowerIndex_8814A(pAdapter, RfPath, rate, pHalData->CurrentChannelBW, pHalData->CurrentChannel); } #endif DBG_8192C("txPower=%d ,CurrentChannelBW=%d ,CurrentChannel=%d ,rate =%d\n",TxPower,pHalData->CurrentChannelBW, pHalData->CurrentChannel,rate); pAdapter->mppriv.txpoweridx = (u8)TxPower; pAdapter->mppriv.txpoweridx_b = (u8)TxPower; Hal_SetAntennaPathPower(pAdapter); return TxPower; } void Hal_ProSetCrystalCap (PADAPTER pAdapter , u32 CrystalCap) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); CrystalCap = CrystalCap & 0x3F; if(IS_HARDWARE_TYPE_8192D(pAdapter)) { PHY_SetBBReg(pAdapter, REG_AFE_XTAL_CTRL, 0xF0, CrystalCap & 0x0F); PHY_SetBBReg(pAdapter, REG_AFE_PLL_CTRL, 0xF0000000, (CrystalCap & 0xF0) >> 4); } else if(IS_HARDWARE_TYPE_8188E(pAdapter)) { // write 0x24[16:11] = 0x24[22:17] = CrystalCap PHY_SetBBReg(pAdapter, REG_AFE_XTAL_CTRL, 0x7FF800, (CrystalCap | (CrystalCap << 6))); } else if(IS_HARDWARE_TYPE_8812(pAdapter)) { // write 0x2C[30:25] = 0x2C[24:19] = CrystalCap PHY_SetBBReg(pAdapter, REG_MAC_PHY_CTRL, 0x7FF80000, (CrystalCap | (CrystalCap << 6))); } else if(IS_HARDWARE_TYPE_8821(pAdapter) || IS_HARDWARE_TYPE_8192E(pAdapter) || IS_HARDWARE_TYPE_8723B(pAdapter)) { // write 0x2C[23:18] = 0x2C[17:12] = CrystalCap PHY_SetBBReg(pAdapter, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6))); } else { PHY_SetBBReg(pAdapter, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6))); } } #endif rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_mp_ioctl.c000066400000000000000000002605541261122257400213110ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_MP_IOCTL_C_ #include #include #include "../hal/OUTSRC/phydm_precomp.h" //**************** oid_rtl_seg_81_85 section start **************** NDIS_STATUS oid_rt_wireless_mode_hdl(struct oid_par_priv *poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; if (poid_par_priv->information_buf_len < sizeof(u8)) return NDIS_STATUS_INVALID_LENGTH; if (poid_par_priv->type_of_oid == SET_OID) { Adapter->registrypriv.wireless_mode = *(u8*)poid_par_priv->information_buf; } else if (poid_par_priv->type_of_oid == QUERY_OID) { *(u8*)poid_par_priv->information_buf = Adapter->registrypriv.wireless_mode; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; RT_TRACE(_module_mp_, _drv_info_, ("-query Wireless Mode=%d\n", Adapter->registrypriv.wireless_mode)); } else { status = NDIS_STATUS_NOT_ACCEPTED; } _func_exit_; return status; } //**************** oid_rtl_seg_81_87_80 section start **************** NDIS_STATUS oid_rt_pro_write_bb_reg_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif struct bb_reg_param *pbbreg; u16 offset; u32 value; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_write_bb_reg_hdl\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len < sizeof(struct bb_reg_param)) return NDIS_STATUS_INVALID_LENGTH; pbbreg = (struct bb_reg_param *)(poid_par_priv->information_buf); offset = (u16)(pbbreg->offset) & 0xFFF; //0ffset :0x800~0xfff if (offset < BB_REG_BASE_ADDR) offset |= BB_REG_BASE_ADDR; value = pbbreg->value; RT_TRACE(_module_mp_, _drv_notice_, ("oid_rt_pro_write_bb_reg_hdl: offset=0x%03X value=0x%08X\n", offset, value)); _irqlevel_changed_(&oldirql, LOWER); write_bbreg(Adapter, offset, 0xFFFFFFFF, value); _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_read_bb_reg_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif struct bb_reg_param *pbbreg; u16 offset; u32 value; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_read_bb_reg_hdl\n")); if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len < sizeof(struct bb_reg_param)) return NDIS_STATUS_INVALID_LENGTH; pbbreg = (struct bb_reg_param *)(poid_par_priv->information_buf); offset = (u16)(pbbreg->offset) & 0xFFF; //0ffset :0x800~0xfff if (offset < BB_REG_BASE_ADDR) offset |= BB_REG_BASE_ADDR; _irqlevel_changed_(&oldirql, LOWER); value = read_bbreg(Adapter, offset, 0xFFFFFFFF); _irqlevel_changed_(&oldirql, RAISE); pbbreg->value = value; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; RT_TRACE(_module_mp_, _drv_notice_, ("-oid_rt_pro_read_bb_reg_hdl: offset=0x%03X value:0x%08X\n", offset, value)); _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_write_rf_reg_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif struct rf_reg_param *pbbreg; u8 path; u8 offset; u32 value; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_write_rf_reg_hdl\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len < sizeof(struct rf_reg_param)) return NDIS_STATUS_INVALID_LENGTH; pbbreg = (struct rf_reg_param *)(poid_par_priv->information_buf); if (pbbreg->path >= MAX_RF_PATH_NUMS) return NDIS_STATUS_NOT_ACCEPTED; if (pbbreg->offset > 0xFF) return NDIS_STATUS_NOT_ACCEPTED; if (pbbreg->value > 0xFFFFF) return NDIS_STATUS_NOT_ACCEPTED; path = (u8)pbbreg->path; offset = (u8)pbbreg->offset; value = pbbreg->value; RT_TRACE(_module_mp_, _drv_notice_, ("oid_rt_pro_write_rf_reg_hdl: path=%d offset=0x%02X value=0x%05X\n", path, offset, value)); _irqlevel_changed_(&oldirql, LOWER); write_rfreg(Adapter, path, offset, value); _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_read_rf_reg_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif struct rf_reg_param *pbbreg; u8 path; u8 offset; u32 value; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); NDIS_STATUS status = NDIS_STATUS_SUCCESS; _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_read_rf_reg_hdl\n")); if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len < sizeof(struct rf_reg_param)) return NDIS_STATUS_INVALID_LENGTH; pbbreg = (struct rf_reg_param *)(poid_par_priv->information_buf); if (pbbreg->path >= MAX_RF_PATH_NUMS) return NDIS_STATUS_NOT_ACCEPTED; if (pbbreg->offset > 0xFF) return NDIS_STATUS_NOT_ACCEPTED; path = (u8)pbbreg->path; offset = (u8)pbbreg->offset; _irqlevel_changed_(&oldirql, LOWER); value = read_rfreg(Adapter, path, offset); _irqlevel_changed_(&oldirql, RAISE); pbbreg->value = value; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; RT_TRACE(_module_mp_, _drv_notice_, ("-oid_rt_pro_read_rf_reg_hdl: path=%d offset=0x%02X value=0x%05X\n", path, offset, value)); _func_exit_; return status; } //**************** oid_rtl_seg_81_87_00 section end**************** //------------------------------------------------------------------------------ //**************** oid_rtl_seg_81_80_00 section start **************** //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_set_data_rate_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif u32 ratevalue;//4 NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_set_data_rate_hdl\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len != sizeof(u32)) return NDIS_STATUS_INVALID_LENGTH; ratevalue = *((u32*)poid_par_priv->information_buf);//4 RT_TRACE(_module_mp_, _drv_notice_, ("oid_rt_pro_set_data_rate_hdl: data rate idx=%d\n", ratevalue)); if (ratevalue >= MPT_RATE_LAST) return NDIS_STATUS_INVALID_DATA; Adapter->mppriv.rateidx = ratevalue; _irqlevel_changed_(&oldirql, LOWER); SetDataRate(Adapter); _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_start_test_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif u32 mode; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_start_test_hdl\n")); if (Adapter->registrypriv.mp_mode == 0) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; _irqlevel_changed_(&oldirql, LOWER); //IQCalibrateBcut(Adapter); mode = *((u32*)poid_par_priv->information_buf); Adapter->mppriv.mode = mode;// 1 for loopback if (mp_start_test(Adapter) == _FAIL) { status = NDIS_STATUS_NOT_ACCEPTED; goto exit; } exit: _irqlevel_changed_(&oldirql, RAISE); RT_TRACE(_module_mp_, _drv_notice_, ("-oid_rt_pro_start_test_hdl: mp_mode=%d\n", Adapter->mppriv.mode)); _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_stop_test_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+Set OID_RT_PRO_STOP_TEST\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; _irqlevel_changed_(&oldirql, LOWER); mp_stop_test(Adapter); _irqlevel_changed_(&oldirql, RAISE); RT_TRACE(_module_mp_, _drv_notice_, ("-Set OID_RT_PRO_STOP_TEST\n")); _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_set_channel_direct_call_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif u32 Channel; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_set_channel_direct_call_hdl\n")); if (poid_par_priv->information_buf_len != sizeof(u32)) return NDIS_STATUS_INVALID_LENGTH; if (poid_par_priv->type_of_oid == QUERY_OID) { *((u32*)poid_par_priv->information_buf) = Adapter->mppriv.channel; return NDIS_STATUS_SUCCESS; } if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; Channel = *((u32*)poid_par_priv->information_buf); RT_TRACE(_module_mp_, _drv_notice_, ("oid_rt_pro_set_channel_direct_call_hdl: Channel=%d\n", Channel)); if (Channel > 14) return NDIS_STATUS_NOT_ACCEPTED; Adapter->mppriv.channel = Channel; _irqlevel_changed_(&oldirql, LOWER); SetChannel(Adapter); _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_set_bandwidth_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif u16 bandwidth; u16 channel_offset; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_set_bandwidth_hdl\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len < sizeof(u32)) return NDIS_STATUS_INVALID_LENGTH; bandwidth = *((u32*)poid_par_priv->information_buf);//4 channel_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; if (bandwidth != CHANNEL_WIDTH_40) bandwidth = CHANNEL_WIDTH_20; padapter->mppriv.bandwidth = (u8)bandwidth; padapter->mppriv.prime_channel_offset = (u8)channel_offset; _irqlevel_changed_(&oldirql, LOWER); SetBandwidth(padapter); _irqlevel_changed_(&oldirql, RAISE); RT_TRACE(_module_mp_, _drv_notice_, ("-oid_rt_set_bandwidth_hdl: bandwidth=%d channel_offset=%d\n", bandwidth, channel_offset)); _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_set_antenna_bb_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif u32 antenna; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_set_antenna_bb_hdl\n")); if (poid_par_priv->information_buf_len != sizeof(u32)) return NDIS_STATUS_INVALID_LENGTH; if (poid_par_priv->type_of_oid == SET_OID) { antenna = *(u32*)poid_par_priv->information_buf; Adapter->mppriv.antenna_tx = (u16)((antenna & 0xFFFF0000) >> 16); Adapter->mppriv.antenna_rx = (u16)(antenna & 0x0000FFFF); RT_TRACE(_module_mp_, _drv_notice_, ("oid_rt_pro_set_antenna_bb_hdl: tx_ant=0x%04x rx_ant=0x%04x\n", Adapter->mppriv.antenna_tx, Adapter->mppriv.antenna_rx)); _irqlevel_changed_(&oldirql, LOWER); SetAntenna(Adapter); _irqlevel_changed_(&oldirql, RAISE); } else { antenna = (Adapter->mppriv.antenna_tx << 16)|Adapter->mppriv.antenna_rx; *(u32*)poid_par_priv->information_buf = antenna; } _func_exit_; return status; } NDIS_STATUS oid_rt_pro_set_tx_power_control_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif u32 tx_pwr_idx; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_pro_set_tx_power_control_hdl\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len != sizeof(u32)) return NDIS_STATUS_INVALID_LENGTH; tx_pwr_idx = *((u32*)poid_par_priv->information_buf); if (tx_pwr_idx > MAX_TX_PWR_INDEX_N_MODE) return NDIS_STATUS_NOT_ACCEPTED; Adapter->mppriv.txpoweridx = (u8)tx_pwr_idx; RT_TRACE(_module_mp_, _drv_notice_, ("oid_rt_pro_set_tx_power_control_hdl: idx=0x%2x\n", Adapter->mppriv.txpoweridx)); _irqlevel_changed_(&oldirql, LOWER); SetTxPower(Adapter); _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; } //------------------------------------------------------------------------------ //**************** oid_rtl_seg_81_80_20 section start **************** //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_query_tx_packet_sent_hdl(struct oid_par_priv *poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; if (poid_par_priv->type_of_oid !=QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } if (poid_par_priv->information_buf_len == sizeof(ULONG)) { *(ULONG*)poid_par_priv->information_buf = Adapter->mppriv.tx_pktcount; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; } else { status = NDIS_STATUS_INVALID_LENGTH; } _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_query_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; if (poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } RT_TRACE(_module_mp_, _drv_alert_, ("===> oid_rt_pro_query_rx_packet_received_hdl.\n")); if (poid_par_priv->information_buf_len == sizeof(ULONG)) { *(ULONG*)poid_par_priv->information_buf = Adapter->mppriv.rx_pktcount; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; RT_TRACE(_module_mp_, _drv_alert_, ("recv_ok:%d \n",Adapter->mppriv.rx_pktcount)); } else { status = NDIS_STATUS_INVALID_LENGTH; } _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_query_rx_packet_crc32_error_hdl(struct oid_par_priv *poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; if (poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } RT_TRACE(_module_mp_, _drv_alert_, ("===> oid_rt_pro_query_rx_packet_crc32_error_hdl.\n")); if (poid_par_priv->information_buf_len == sizeof(ULONG)) { *(ULONG*)poid_par_priv->information_buf = Adapter->mppriv.rx_crcerrpktcount; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; RT_TRACE(_module_mp_, _drv_alert_, ("recv_err:%d \n",Adapter->mppriv.rx_crcerrpktcount)); } else { status = NDIS_STATUS_INVALID_LENGTH; } _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_reset_tx_packet_sent_hdl(struct oid_par_priv *poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; if (poid_par_priv->type_of_oid != SET_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } RT_TRACE(_module_mp_, _drv_alert_, ("===> oid_rt_pro_reset_tx_packet_sent_hdl.\n")); Adapter->mppriv.tx_pktcount = 0; _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_reset_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; if (poid_par_priv->type_of_oid != SET_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } if (poid_par_priv->information_buf_len == sizeof(ULONG)) { Adapter->mppriv.rx_pktcount = 0; Adapter->mppriv.rx_crcerrpktcount = 0; } else { status = NDIS_STATUS_INVALID_LENGTH; } _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_reset_phy_rx_packet_count_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; if (poid_par_priv->type_of_oid != SET_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } _irqlevel_changed_(&oldirql, LOWER); ResetPhyRxPktCount(Adapter); _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_get_phy_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_get_phy_rx_packet_received_hdl\n")); if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len != sizeof(ULONG)) return NDIS_STATUS_INVALID_LENGTH; _irqlevel_changed_(&oldirql, LOWER); *(ULONG*)poid_par_priv->information_buf = GetPhyRxPktReceived(Adapter); _irqlevel_changed_(&oldirql, RAISE); *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; RT_TRACE(_module_mp_, _drv_notice_, ("-oid_rt_get_phy_rx_packet_received_hdl: recv_ok=%d\n", *(ULONG*)poid_par_priv->information_buf)); _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_get_phy_rx_packet_crc32_error_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_get_phy_rx_packet_crc32_error_hdl\n")); if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len != sizeof(ULONG)) return NDIS_STATUS_INVALID_LENGTH; _irqlevel_changed_(&oldirql, LOWER); *(ULONG*)poid_par_priv->information_buf = GetPhyRxPktCRC32Error(Adapter); _irqlevel_changed_(&oldirql, RAISE); *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_get_phy_rx_packet_crc32_error_hdl: recv_err=%d\n", *(ULONG*)poid_par_priv->information_buf)); _func_exit_; return status; } //**************** oid_rtl_seg_81_80_20 section end **************** NDIS_STATUS oid_rt_pro_set_continuous_tx_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif u32 bStartTest; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_set_continuous_tx_hdl\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; bStartTest = *((u32*)poid_par_priv->information_buf); _irqlevel_changed_(&oldirql, LOWER); SetContinuousTx(Adapter,(u8)bStartTest); if (bStartTest) { struct mp_priv *pmp_priv = &Adapter->mppriv; if (pmp_priv->tx.stop == 0) { pmp_priv->tx.stop = 1; DBG_871X("%s: pkt tx is running...\n", __func__); rtw_msleep_os(5); } pmp_priv->tx.stop = 0; pmp_priv->tx.count = 1; SetPacketTx(Adapter); } _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; } NDIS_STATUS oid_rt_pro_set_single_carrier_tx_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif u32 bStartTest; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_alert_, ("+oid_rt_pro_set_single_carrier_tx_hdl\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; bStartTest = *((u32*)poid_par_priv->information_buf); _irqlevel_changed_(&oldirql, LOWER); SetSingleCarrierTx(Adapter, (u8)bStartTest); if (bStartTest) { struct mp_priv *pmp_priv = &Adapter->mppriv; if (pmp_priv->tx.stop == 0) { pmp_priv->tx.stop = 1; DBG_871X("%s: pkt tx is running...\n", __func__); rtw_msleep_os(5); } pmp_priv->tx.stop = 0; pmp_priv->tx.count = 1; SetPacketTx(Adapter); } _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; } NDIS_STATUS oid_rt_pro_set_carrier_suppression_tx_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif u32 bStartTest; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_set_carrier_suppression_tx_hdl\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; bStartTest = *((u32*)poid_par_priv->information_buf); _irqlevel_changed_(&oldirql, LOWER); SetCarrierSuppressionTx(Adapter, (u8)bStartTest); if (bStartTest) { struct mp_priv *pmp_priv = &Adapter->mppriv; if (pmp_priv->tx.stop == 0) { pmp_priv->tx.stop = 1; DBG_871X("%s: pkt tx is running...\n", __func__); rtw_msleep_os(5); } pmp_priv->tx.stop = 0; pmp_priv->tx.count = 1; SetPacketTx(Adapter); } _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; } NDIS_STATUS oid_rt_pro_set_single_tone_tx_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif u32 bStartTest; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_alert_, ("+oid_rt_pro_set_single_tone_tx_hdl\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; bStartTest = *((u32*)poid_par_priv->information_buf); _irqlevel_changed_(&oldirql, LOWER); SetSingleToneTx(Adapter,(u8)bStartTest); _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; } NDIS_STATUS oid_rt_pro_set_modulation_hdl(struct oid_par_priv* poid_par_priv) { return 0; } NDIS_STATUS oid_rt_pro_trigger_gpio_hdl(struct oid_par_priv *poid_par_priv) { PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); #ifdef PLATFORM_OS_XP _irqL oldirql; #endif NDIS_STATUS status = NDIS_STATUS_SUCCESS; _func_enter_; if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; _irqlevel_changed_(&oldirql, LOWER); rtw_hal_set_hwreg(Adapter, HW_VAR_TRIGGER_GPIO_0, 0); _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; } //**************** oid_rtl_seg_81_80_00 section end **************** //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro8711_join_bss_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); #ifdef PLATFORM_OS_XP _irqL oldirql; #endif NDIS_STATUS status = NDIS_STATUS_SUCCESS; PNDIS_802_11_SSID pssid; _func_enter_; if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; *poid_par_priv->bytes_needed = (u32)sizeof(NDIS_802_11_SSID); *poid_par_priv->bytes_rw = 0; if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) return NDIS_STATUS_INVALID_LENGTH; pssid = (PNDIS_802_11_SSID)poid_par_priv->information_buf; _irqlevel_changed_(&oldirql, LOWER); if (mp_start_joinbss(Adapter, pssid) == _FAIL) status = NDIS_STATUS_NOT_ACCEPTED; _irqlevel_changed_(&oldirql, RAISE); *poid_par_priv->bytes_rw = sizeof(NDIS_802_11_SSID); _func_exit_; return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_read_register_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif pRW_Reg RegRWStruct; u32 offset, width; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_pro_read_register_hdl\n")); if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; RegRWStruct = (pRW_Reg)poid_par_priv->information_buf; offset = RegRWStruct->offset; width = RegRWStruct->width; if (offset > 0xFFF) return NDIS_STATUS_NOT_ACCEPTED; _irqlevel_changed_(&oldirql, LOWER); switch (width) { case 1: RegRWStruct->value = rtw_read8(Adapter, offset); break; case 2: RegRWStruct->value = rtw_read16(Adapter, offset); break; default: width = 4; RegRWStruct->value = rtw_read32(Adapter, offset); break; } RT_TRACE(_module_mp_, _drv_notice_, ("oid_rt_pro_read_register_hdl: offset:0x%04X value:0x%X\n", offset, RegRWStruct->value)); _irqlevel_changed_(&oldirql, RAISE); *poid_par_priv->bytes_rw = width; _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_write_register_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif pRW_Reg RegRWStruct; u32 offset, width, value; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_pro_write_register_hdl\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; RegRWStruct = (pRW_Reg)poid_par_priv->information_buf; offset = RegRWStruct->offset; width = RegRWStruct->width; value = RegRWStruct->value; if (offset > 0xFFF) return NDIS_STATUS_NOT_ACCEPTED; _irqlevel_changed_(&oldirql, LOWER); switch (RegRWStruct->width) { case 1: if (value > 0xFF) { status = NDIS_STATUS_NOT_ACCEPTED; break; } rtw_write8(padapter, offset, (u8)value); break; case 2: if (value > 0xFFFF) { status = NDIS_STATUS_NOT_ACCEPTED; break; } rtw_write16(padapter, offset, (u16)value); break; case 4: rtw_write32(padapter, offset, value); break; default: status = NDIS_STATUS_NOT_ACCEPTED; break; } _irqlevel_changed_(&oldirql, RAISE); RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_pro_write_register_hdl: offset=0x%08X width=%d value=0x%X\n", offset, width, value)); _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_burst_read_register_hdl(struct oid_par_priv *poid_par_priv) { #if 0 #ifdef PLATFORM_OS_XP _irqL oldirql; #endif pBurst_RW_Reg pBstRwReg; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_burst_read_register_hdl\n")); if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; pBstRwReg = (pBurst_RW_Reg)poid_par_priv->information_buf; _irqlevel_changed_(&oldirql, LOWER); rtw_read_mem(padapter, pBstRwReg->offset, (u32)pBstRwReg->len, pBstRwReg->Data); _irqlevel_changed_(&oldirql, RAISE); *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_pro_burst_read_register_hdl\n")); _func_exit_; return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_burst_write_register_hdl(struct oid_par_priv *poid_par_priv) { #if 0 #ifdef PLATFORM_OS_XP _irqL oldirql; #endif pBurst_RW_Reg pBstRwReg; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_burst_write_register_hdl\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; pBstRwReg = (pBurst_RW_Reg)poid_par_priv->information_buf; _irqlevel_changed_(&oldirql, LOWER); rtw_write_mem(padapter, pBstRwReg->offset, (u32)pBstRwReg->len, pBstRwReg->Data); _irqlevel_changed_(&oldirql, RAISE); RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_pro_burst_write_register_hdl\n")); _func_exit_; return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_write_txcmd_hdl(struct oid_par_priv *poid_par_priv) { #if 0 NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)( poid_par_priv->adapter_context); #ifdef PLATFORM_OS_XP _irqL oldirql; #endif TX_CMD_Desc *TxCmd_Info; _func_enter_; if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; RT_TRACE(_module_mp_, _drv_info_, ("+Set OID_RT_PRO_WRITE_TXCMD\n")); TxCmd_Info=(TX_CMD_Desc*)poid_par_priv->information_buf; RT_TRACE(_module_mp_, _drv_info_, ("WRITE_TXCMD:Addr=%.8X\n", TxCmd_Info->offset)); RT_TRACE(_module_mp_, _drv_info_, ("WRITE_TXCMD:1.)%.8X\n", (ULONG)TxCmd_Info->TxCMD.value[0])); RT_TRACE(_module_mp_, _drv_info_, ("WRITE_TXCMD:2.)%.8X\n", (ULONG)TxCmd_Info->TxCMD.value[1])); RT_TRACE(_module_mp_, _drv_info_, (("WRITE_TXCMD:3.)%.8X\n", (ULONG)TxCmd_Info->TxCMD.value[2])); RT_TRACE(_module_mp_, _drv_info_, ("WRITE_TXCMD:4.)%.8X\n", (ULONG)TxCmd_Info->TxCMD.value[3])); _irqlevel_changed_(&oldirql, LOWER); rtw_write32(Adapter, TxCmd_Info->offset + 0, (unsigned int)TxCmd_Info->TxCMD.value[0]); rtw_write32(Adapter, TxCmd_Info->offset + 4, (unsigned int)TxCmd_Info->TxCMD.value[1]); _irqlevel_changed_(&oldirql, RAISE); RT_TRACE(_module_mp_, _drv_notice_, ("-Set OID_RT_PRO_WRITE_TXCMD: status=0x%08X\n", status)); _func_exit_; return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_read16_eeprom_hdl(struct oid_par_priv *poid_par_priv) { #if 0 #ifdef PLATFORM_OS_XP _irqL oldirql; #endif pEEPROM_RWParam pEEPROM; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_info_, ("+Query OID_RT_PRO_READ16_EEPROM\n")); if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; pEEPROM = (pEEPROM_RWParam)poid_par_priv->information_buf; _irqlevel_changed_(&oldirql, LOWER); pEEPROM->value = eeprom_read16(padapter, (u16)(pEEPROM->offset >> 1)); _irqlevel_changed_(&oldirql, RAISE); *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; RT_TRACE(_module_mp_, _drv_notice_, ("-Query OID_RT_PRO_READ16_EEPROM: offset=0x%x value=0x%x\n", pEEPROM->offset, pEEPROM->value)); _func_exit_; return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_write16_eeprom_hdl (struct oid_par_priv *poid_par_priv) { #if 0 #ifdef PLATFORM_OS_XP _irqL oldirql; #endif pEEPROM_RWParam pEEPROM; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+Set OID_RT_PRO_WRITE16_EEPROM\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; pEEPROM = (pEEPROM_RWParam)poid_par_priv->information_buf; _irqlevel_changed_(&oldirql, LOWER); eeprom_write16(padapter, (u16)(pEEPROM->offset >> 1), pEEPROM->value); _irqlevel_changed_(&oldirql, RAISE); *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; _func_exit_; return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro8711_wi_poll_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)( poid_par_priv->adapter_context); NDIS_STATUS status = NDIS_STATUS_SUCCESS; struct mp_wiparam *pwi_param; _func_enter_; if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len < sizeof(struct mp_wiparam)) return NDIS_STATUS_INVALID_LENGTH; if (Adapter->mppriv.workparam.bcompleted == _FALSE) return NDIS_STATUS_NOT_ACCEPTED; pwi_param = (struct mp_wiparam *)poid_par_priv->information_buf; _rtw_memcpy(pwi_param, &Adapter->mppriv.workparam, sizeof(struct mp_wiparam)); Adapter->mppriv.act_in_progress = _FALSE; // RT_TRACE(_module_mp_, _drv_info_, ("rf:%x\n", pwiparam->IoValue)); *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; _func_exit_; return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro8711_pkt_loss_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)( poid_par_priv->adapter_context); NDIS_STATUS status = NDIS_STATUS_SUCCESS; _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro8711_pkt_loss_hdl\n")); if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len < sizeof(uint)*2) { RT_TRACE(_module_mp_, _drv_err_, ("-oid_rt_pro8711_pkt_loss_hdl: buf_len=%d\n", (int)poid_par_priv->information_buf_len)); return NDIS_STATUS_INVALID_LENGTH; } if (*(uint*)poid_par_priv->information_buf == 1)//init==1 Adapter->mppriv.rx_pktloss = 0; *((uint*)poid_par_priv->information_buf+1) = Adapter->mppriv.rx_pktloss; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; _func_exit_; return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_rd_attrib_mem_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)( poid_par_priv->adapter_context); struct io_queue *pio_queue = (struct io_queue *)Adapter->pio_queue; struct intf_hdl *pintfhdl = &pio_queue->intf; #ifdef PLATFORM_OS_XP _irqL oldirql; #endif NDIS_STATUS status = NDIS_STATUS_SUCCESS; #ifdef CONFIG_SDIO_HCI void (*_attrib_read)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); #endif _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+Query OID_RT_RD_ATTRIB_MEM\n")); if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; #ifdef CONFIG_SDIO_HCI _irqlevel_changed_(&oldirql, LOWER); { u32 *plmem = (u32*)poid_par_priv->information_buf+2; _attrib_read = pintfhdl->io_ops._attrib_read; _attrib_read(pintfhdl, *((u32*)poid_par_priv->information_buf), *((u32*)poid_par_priv->information_buf+1), (u8*)plmem); *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; } _irqlevel_changed_(&oldirql, RAISE); #endif _func_exit_; return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_wr_attrib_mem_hdl (struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); struct io_queue *pio_queue = (struct io_queue *)Adapter->pio_queue; struct intf_hdl *pintfhdl = &pio_queue->intf; #ifdef PLATFORM_OS_XP _irqL oldirql; #endif NDIS_STATUS status = NDIS_STATUS_SUCCESS; #ifdef CONFIG_SDIO_HCI void (*_attrib_write)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); #endif _func_enter_; if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; #ifdef CONFIG_SDIO_HCI _irqlevel_changed_(&oldirql, LOWER); { u32 *plmem = (u32*)poid_par_priv->information_buf + 2; _attrib_write = pintfhdl->io_ops._attrib_write; _attrib_write(pintfhdl, *(u32*)poid_par_priv->information_buf, *((u32*)poid_par_priv->information_buf+1), (u8*)plmem); } _irqlevel_changed_(&oldirql, RAISE); #endif _func_exit_; return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_set_rf_intfs_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); #ifdef PLATFORM_OS_XP _irqL oldirql; #endif NDIS_STATUS status = NDIS_STATUS_SUCCESS; _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+OID_RT_PRO_SET_RF_INTFS\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; _irqlevel_changed_(&oldirql, LOWER); if (rtw_setrfintfs_cmd(Adapter, *(unsigned char*)poid_par_priv->information_buf) == _FAIL) status = NDIS_STATUS_NOT_ACCEPTED; _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_poll_rx_status_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); NDIS_STATUS status = NDIS_STATUS_SUCCESS; _func_enter_; if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; _rtw_memcpy(poid_par_priv->information_buf, (unsigned char*)&Adapter->mppriv.rxstat, sizeof(struct recv_stat)); *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; _func_exit_; return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_cfg_debug_message_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); NDIS_STATUS status = NDIS_STATUS_SUCCESS; PCFG_DBG_MSG_STRUCT pdbg_msg; _func_enter_; // RT_TRACE(0xffffffffff,_drv_alert_,("===> oid_rt_pro_cfg_debug_message_hdl.\n")); #if 0//#ifdef CONFIG_DEBUG_RTL871X pdbg_msg = (PCFG_DBG_MSG_STRUCT)(poid_par_priv->information_buf); if (poid_par_priv->type_of_oid == SET_OID) { RT_TRACE(0xffffffffff, _drv_alert_, ("===>Set level :0x%08x, H32:0x%08x L32:0x%08x\n", pdbg_msg->DebugLevel, pdbg_msg->DebugComponent_H32, pdbg_msg->DebugComponent_L32)); GlobalDebugLevel = pdbg_msg->DebugLevel; GlobalDebugComponents = (pdbg_msg->DebugComponent_H32 << 32) | pdbg_msg->DebugComponent_L32; RT_TRACE(0xffffffffff, _drv_alert_, ("===> Set level :0x%08x, component:0x%016x\n", GlobalDebugLevel, (u32)GlobalDebugComponents)); } else { pdbg_msg->DebugLevel = GlobalDebugLevel; pdbg_msg->DebugComponent_H32 = (u32)(GlobalDebugComponents >> 32); pdbg_msg->DebugComponent_L32 = (u32)GlobalDebugComponents; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; RT_TRACE(0xffffffffff, _drv_alert_, ("===>Query level:0x%08x H32:0x%08x L32:0x%08x\n", (u32)pdbg_msg->DebugLevel, (u32)pdbg_msg->DebugComponent_H32, (u32)pdbg_msg->DebugComponent_L32)); } #endif _func_exit_; return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_set_data_rate_ex_hdl(struct oid_par_priv *poid_par_priv) { PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); #ifdef PLATFORM_OS_XP _irqL oldirql; #endif NDIS_STATUS status = NDIS_STATUS_SUCCESS; _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+OID_RT_PRO_SET_DATA_RATE_EX\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; _irqlevel_changed_(&oldirql, LOWER); if (rtw_setdatarate_cmd(Adapter, poid_par_priv->information_buf) !=_SUCCESS) status = NDIS_STATUS_NOT_ACCEPTED; _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; } //----------------------------------------------------------------------------- NDIS_STATUS oid_rt_get_thermal_meter_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif NDIS_STATUS status = NDIS_STATUS_SUCCESS; u8 thermal = 0; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_get_thermal_meter_hdl\n")); if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len < sizeof(u32)) return NDIS_STATUS_INVALID_LENGTH; _irqlevel_changed_(&oldirql, LOWER); GetThermalMeter(Adapter, &thermal); _irqlevel_changed_(&oldirql, RAISE); *(u32*)poid_par_priv->information_buf = (u32)thermal; *poid_par_priv->bytes_rw = sizeof(u32); _func_exit_; return status; } //----------------------------------------------------------------------------- NDIS_STATUS oid_rt_pro_read_tssi_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); #ifdef PLATFORM_OS_XP _irqL oldirql; #endif NDIS_STATUS status = NDIS_STATUS_SUCCESS; _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_read_tssi_hdl\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; if (Adapter->mppriv.act_in_progress == _TRUE) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len < sizeof(u8)) return NDIS_STATUS_INVALID_LENGTH; //init workparam Adapter->mppriv.act_in_progress = _TRUE; Adapter->mppriv.workparam.bcompleted = _FALSE; Adapter->mppriv.workparam.act_type = MPT_READ_TSSI; Adapter->mppriv.workparam.io_offset = 0; Adapter->mppriv.workparam.io_value = 0xFFFFFFFF; _irqlevel_changed_(&oldirql, LOWER); if (!rtw_gettssi_cmd(Adapter,0, (u8*)&Adapter->mppriv.workparam.io_value)) status = NDIS_STATUS_NOT_ACCEPTED; _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_set_power_tracking_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; // if (poid_par_priv->type_of_oid != SET_OID) // return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len < sizeof(u8)) return NDIS_STATUS_INVALID_LENGTH; _irqlevel_changed_(&oldirql, LOWER); if (poid_par_priv->type_of_oid == SET_OID) { u8 enable; enable = *(u8*)poid_par_priv->information_buf; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_set_power_tracking_hdl: enable=%d\n", enable)); SetPowerTracking(Adapter, enable); } else { GetPowerTracking(Adapter, (u8*)poid_par_priv->information_buf); } _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; } //----------------------------------------------------------------------------- NDIS_STATUS oid_rt_pro_set_basic_rate_hdl(struct oid_par_priv *poid_par_priv) { #if 0 #ifdef PLATFORM_OS_XP _irqL oldirql; #endif u32 ratevalue; u8 datarates[NumRates]; int i; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_info_, ("+OID_RT_PRO_SET_BASIC_RATE\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; #if 0 ratevalue = *((u32*)poid_par_priv->information_buf); for (i = 0; i < NumRates; i++) { if (ratevalue == mpdatarate[i]) datarates[i] = mpdatarate[i]; else datarates[i] = 0xff; RT_TRACE(_module_rtl871x_ioctl_c_, _drv_info_, ("basicrate_inx=%d\n", datarates[i])); } _irqlevel_changed_(&oldirql, LOWER); if (rtw_setbasicrate_cmd(padapter, datarates) != _SUCCESS) status = NDIS_STATUS_NOT_ACCEPTED; _irqlevel_changed_(&oldirql, RAISE); #endif RT_TRACE(_module_mp_, _drv_notice_, ("-OID_RT_PRO_SET_BASIC_RATE: status=0x%08X\n", status)); _func_exit_; return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_qry_pwrstate_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); NDIS_STATUS status = NDIS_STATUS_SUCCESS; _func_enter_; if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len < 8) return NDIS_STATUS_INVALID_LENGTH; *poid_par_priv->bytes_rw = 8; _rtw_memcpy(poid_par_priv->information_buf, &(adapter_to_pwrctl(Adapter)->pwr_mode), 8); *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; RT_TRACE(_module_mp_, _drv_notice_, ("-oid_rt_pro_qry_pwrstate_hdl: pwr_mode=%d smart_ps=%d\n", adapter_to_pwrctl(Adapter)->pwr_mode, adapter_to_pwrctl(Adapter)->smart_ps)); _func_exit_; return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_set_pwrstate_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); NDIS_STATUS status = NDIS_STATUS_SUCCESS; uint pwr_mode, smart_ps; _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+Set OID_RT_PRO_SET_PWRSTATE\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; *poid_par_priv->bytes_rw = 0; *poid_par_priv->bytes_needed = 8; if (poid_par_priv->information_buf_len < 8) return NDIS_STATUS_INVALID_LENGTH; pwr_mode = *(uint *)(poid_par_priv->information_buf); smart_ps = *(uint *)((int)poid_par_priv->information_buf + 4); *poid_par_priv->bytes_rw = 8; _func_exit_; return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_h2c_set_rate_table_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); #ifdef PLATFORM_OS_XP _irqL oldirql; #endif NDIS_STATUS status = NDIS_STATUS_SUCCESS; struct setratable_parm *prate_table; u8 res; _func_enter_; if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; *poid_par_priv->bytes_needed = sizeof(struct setratable_parm); if (poid_par_priv->information_buf_len < sizeof(struct setratable_parm)) return NDIS_STATUS_INVALID_LENGTH; prate_table = (struct setratable_parm*)poid_par_priv->information_buf; _irqlevel_changed_(&oldirql, LOWER); res = rtw_setrttbl_cmd(Adapter, prate_table); _irqlevel_changed_(&oldirql, RAISE); if (res == _FAIL) status = NDIS_STATUS_FAILURE; _func_exit_; return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_h2c_get_rate_table_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); NDIS_STATUS status = NDIS_STATUS_SUCCESS; _func_enter_; if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; #if 0 struct mp_wi_cntx *pmp_wi_cntx=&(Adapter->mppriv.wi_cntx); u8 res=_SUCCESS; DEBUG_INFO(("===> Set OID_RT_PRO_H2C_GET_RATE_TABLE.\n")); if(pmp_wi_cntx->bmp_wi_progress ==_TRUE){ DEBUG_ERR(("\n mp workitem is progressing, not allow to set another workitem right now!!!\n")); Status = NDIS_STATUS_NOT_ACCEPTED; break; } else{ pmp_wi_cntx->bmp_wi_progress=_TRUE; pmp_wi_cntx->param.bcompleted=_FALSE; pmp_wi_cntx->param.act_type=MPT_GET_RATE_TABLE; pmp_wi_cntx->param.io_offset=0x0; pmp_wi_cntx->param.bytes_cnt=sizeof(struct getratable_rsp); pmp_wi_cntx->param.io_value=0xffffffff; res=rtw_getrttbl_cmd(Adapter,(struct getratable_rsp *)pmp_wi_cntx->param.data); *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; if(res != _SUCCESS) { Status = NDIS_STATUS_NOT_ACCEPTED; } } DEBUG_INFO(("\n <=== Set OID_RT_PRO_H2C_GET_RATE_TABLE.\n")); #endif _func_exit_; return status; #else return 0; #endif } //**************** oid_rtl_seg_87_12_00 section start **************** NDIS_STATUS oid_rt_pro_encryption_ctrl_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); struct security_priv *psecuritypriv = &Adapter->securitypriv; NDIS_STATUS status = NDIS_STATUS_SUCCESS; ENCRY_CTRL_STATE encry_mode; *poid_par_priv->bytes_needed = sizeof(u8); if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) return NDIS_STATUS_INVALID_LENGTH; if (poid_par_priv->type_of_oid == SET_OID) { encry_mode = *((u8*)poid_par_priv->information_buf); switch (encry_mode) { case HW_CONTROL: #if 0 Adapter->registrypriv.software_decrypt=_FALSE; Adapter->registrypriv.software_encrypt=_FALSE; #else psecuritypriv->sw_decrypt = _FALSE; psecuritypriv->sw_encrypt = _FALSE; #endif break; case SW_CONTROL: #if 0 Adapter->registrypriv.software_decrypt=_TRUE; Adapter->registrypriv.software_encrypt=_TRUE; #else psecuritypriv->sw_decrypt = _TRUE; psecuritypriv->sw_encrypt = _TRUE; #endif break; case HW_ENCRY_SW_DECRY: #if 0 Adapter->registrypriv.software_decrypt=_TRUE; Adapter->registrypriv.software_encrypt=_FALSE; #else psecuritypriv->sw_decrypt = _TRUE; psecuritypriv->sw_encrypt = _FALSE; #endif break; case SW_ENCRY_HW_DECRY: #if 0 Adapter->registrypriv.software_decrypt=_FALSE; Adapter->registrypriv.software_encrypt=_TRUE; #else psecuritypriv->sw_decrypt = _FALSE; psecuritypriv->sw_encrypt = _TRUE; #endif break; } RT_TRACE(_module_rtl871x_ioctl_c_, _drv_notice_, ("-oid_rt_pro_encryption_ctrl_hdl: SET encry_mode=0x%x sw_encrypt=0x%x sw_decrypt=0x%x\n", encry_mode, psecuritypriv->sw_encrypt, psecuritypriv->sw_decrypt)); } else { #if 0 if (Adapter->registrypriv.software_encrypt == _FALSE) { if (Adapter->registrypriv.software_decrypt == _FALSE) encry_mode = HW_CONTROL; else encry_mode = HW_ENCRY_SW_DECRY; } else { if (Adapter->registrypriv.software_decrypt == _FALSE) encry_mode = SW_ENCRY_HW_DECRY; else encry_mode = SW_CONTROL; } #else if ((psecuritypriv->sw_encrypt == _FALSE) && (psecuritypriv->sw_decrypt == _FALSE)) encry_mode = HW_CONTROL; else if ((psecuritypriv->sw_encrypt == _FALSE) && (psecuritypriv->sw_decrypt == _TRUE)) encry_mode = HW_ENCRY_SW_DECRY; else if ((psecuritypriv->sw_encrypt == _TRUE) && (psecuritypriv->sw_decrypt == _FALSE)) encry_mode = SW_ENCRY_HW_DECRY; else if ((psecuritypriv->sw_encrypt == _TRUE) && (psecuritypriv->sw_decrypt == _TRUE)) encry_mode = SW_CONTROL; #endif *(u8*)poid_par_priv->information_buf = encry_mode; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; RT_TRACE(_module_mp_, _drv_notice_, ("-oid_rt_pro_encryption_ctrl_hdl: QUERY encry_mode=0x%x\n", encry_mode)); } return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_add_sta_info_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); #ifdef PLATFORM_OS_XP _irqL oldirql; #endif NDIS_STATUS status = NDIS_STATUS_SUCCESS; struct sta_info *psta = NULL; UCHAR *macaddr; if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; *poid_par_priv->bytes_needed = ETH_ALEN; if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) return NDIS_STATUS_INVALID_LENGTH; macaddr = (UCHAR *) poid_par_priv->information_buf ; RT_TRACE(_module_rtl871x_ioctl_c_,_drv_notice_, ("OID_RT_PRO_ADD_STA_INFO: addr="MAC_FMT"\n", MAC_ARG(macaddr) )); _irqlevel_changed_(&oldirql, LOWER); psta = rtw_get_stainfo(&Adapter->stapriv, macaddr); if (psta == NULL) { // the sta have been in sta_info_queue => do nothing psta = rtw_alloc_stainfo(&Adapter->stapriv, macaddr); if (psta == NULL) { RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_,("Can't alloc sta_info when OID_RT_PRO_ADD_STA_INFO\n")); status = NDIS_STATUS_FAILURE; } } else { //(between drv has received this event before and fw have not yet to set key to CAM_ENTRY) RT_TRACE(_module_rtl871x_ioctl_c_, _drv_err_, ("Error: OID_RT_PRO_ADD_STA_INFO: sta has been in sta_hash_queue \n")); } _irqlevel_changed_(&oldirql, RAISE); return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_dele_sta_info_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); #ifdef PLATFORM_OS_XP _irqL oldirql; #endif NDIS_STATUS status = NDIS_STATUS_SUCCESS; struct sta_info *psta = NULL; UCHAR *macaddr; if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; *poid_par_priv->bytes_needed = ETH_ALEN; if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) return NDIS_STATUS_INVALID_LENGTH; macaddr = (UCHAR *) poid_par_priv->information_buf ; RT_TRACE(_module_rtl871x_ioctl_c_,_drv_notice_, ("+OID_RT_PRO_ADD_STA_INFO: addr="MAC_FMT"\n", MAC_ARG(macaddr) )); psta = rtw_get_stainfo(&Adapter->stapriv, macaddr); if (psta != NULL) { //_enter_critical(&(Adapter->stapriv.sta_hash_lock), &irqL); rtw_free_stainfo(Adapter, psta); //_exit_critical(&(Adapter->stapriv.sta_hash_lock), &irqL); } return status; #else return 0; #endif } //------------------------------------------------------------------------------ #if 0 static u32 mp_query_drv_var(_adapter *padapter, u8 offset, u32 var) { #ifdef CONFIG_SDIO_HCI if (offset == 1) { u16 tmp_blk_num; tmp_blk_num = rtw_read16(padapter, SDIO_RX0_RDYBLK_NUM); RT_TRACE(_module_mp_, _drv_err_, ("Query Information, mp_query_drv_var SDIO_RX0_RDYBLK_NUM=0x%x dvobj.rxblknum=0x%x\n", tmp_blk_num, adapter_to_dvobj(padapter)->rxblknum)); if (adapter_to_dvobj(padapter)->rxblknum != tmp_blk_num) { RT_TRACE(_module_mp_,_drv_err_, ("Query Information, mp_query_drv_var call recv rx\n")); // sd_recv_rxfifo(padapter); } } #if 0 if(offset <=100){ //For setting data rate and query data rate if(offset==100){ //For query data rate RT_TRACE(_module_mp_, _drv_emerg_, ("\n mp_query_drv_var: offset(%d): query rate=0x%.2x \n",offset,padapter->registrypriv.tx_rate)); var=padapter->registrypriv.tx_rate; } else if(offset<0x1d){ //For setting data rate padapter->registrypriv.tx_rate=offset; var=padapter->registrypriv.tx_rate; padapter->registrypriv.use_rate=_TRUE; RT_TRACE(_module_mp_, _drv_emerg_, ("\n mp_query_drv_var: offset(%d): set rate=0x%.2x \n",offset,padapter->registrypriv.tx_rate)); } else{ //not use the data rate padapter->registrypriv.use_rate=_FALSE; RT_TRACE(_module_mp_, _drv_emerg_, ("\n mp_query_drv_var: offset(%d) out of rate range\n",offset)); } } else if (offset<=110){ //for setting debug level RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var: offset(%d) for set debug level\n",offset)); if(offset==110){ //For query data rate RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var: offset(%d): query dbg level=0x%.2x \n",offset,padapter->registrypriv.dbg_level)); padapter->registrypriv.dbg_level=GlobalDebugLevel; var=padapter->registrypriv.dbg_level; } else if(offset<110 && offset>100){ RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var: offset(%d): set dbg level=0x%.2x \n",offset,offset-100)); padapter->registrypriv.dbg_level=GlobalDebugLevel=offset-100; var=padapter->registrypriv.dbg_level; RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var(_drv_emerg_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); RT_TRACE(_module_mp_, _drv_alert_, (" mp_query_drv_var(_drv_alert_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); RT_TRACE(_module_mp_, _drv_crit_, (" mp_query_drv_var(_drv_crit_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); RT_TRACE(_module_mp_, _drv_err_, (" mp_query_drv_var(_drv_err_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); RT_TRACE(_module_mp_, _drv_warning_, (" mp_query_drv_var(_drv_warning_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); RT_TRACE(_module_mp_, _drv_notice_, (" mp_query_drv_var(_drv_notice_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); RT_TRACE(_module_mp_, _drv_info_, (" mp_query_drv_var(_drv_info_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); RT_TRACE(_module_mp_, _drv_debug_, (" mp_query_drv_var(_drv_debug_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); } } else if(offset >110 &&offset <116){ if(115==offset){ RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var(_drv_emerg_): offset(%d): query TRX access type: [tx_block_mode=%x,rx_block_mode=%x]\n",\ offset, adapter_to_dvobj(padapter)->tx_block_mode, adapter_to_dvobj(padapter)->rx_block_mode)); } else { switch(offset){ case 111: adapter_to_dvobj(padapter)->tx_block_mode=1; adapter_to_dvobj(padapter)->rx_block_mode=1; RT_TRACE(_module_mp_, _drv_emerg_, \ (" mp_query_drv_var(_drv_emerg_): offset(%d): SET TRX access type:(TX block/RX block) [tx_block_mode=%x,rx_block_mode=%x]\n",\ offset, adapter_to_dvobj(padapter)->tx_block_mode, adapter_to_dvobj(padapter)->rx_block_mode)); break; case 112: adapter_to_dvobj(padapter)->tx_block_mode=1; adapter_to_dvobj(padapter)->rx_block_mode=0; RT_TRACE(_module_mp_, _drv_emerg_, \ (" mp_query_drv_var(_drv_emerg_): offset(%d): SET TRX access type:(TX block/RX byte) [tx_block_mode=%x,rx_block_mode=%x]\n",\ offset, adapter_to_dvobj(padapter)->tx_block_mode, adapter_to_dvobj(padapter)->rx_block_mode)); break; case 113: adapter_to_dvobj(padapter)->tx_block_mode=0; adapter_to_dvobj(padapter)->rx_block_mode=1; RT_TRACE(_module_mp_, _drv_emerg_, \ (" mp_query_drv_var(_drv_emerg_): offset(%d): SET TRX access type:(TX byte/RX block) [tx_block_mode=%x,rx_block_mode=%x]\n",\ offset, adapter_to_dvobj(padapter)->tx_block_mode, adapter_to_dvobj(padapter)->rx_block_mode)); break; case 114: adapter_to_dvobj(padapter)->tx_block_mode=0; adapter_to_dvobj(padapter)->rx_block_mode=0; RT_TRACE(_module_mp_, _drv_emerg_, \ (" mp_query_drv_var(_drv_emerg_): offset(%d): SET TRX access type:(TX byte/RX byte) [tx_block_mode=%x,rx_block_mode=%x]\n",\ offset, adapter_to_dvobj(padapter)->tx_block_mode, adapter_to_dvobj(padapter)->rx_block_mode)); break; default : break; } } } else if(offset>=127){ u64 prnt_dbg_comp; u8 chg_idx; u64 tmp_dbg_comp; chg_idx=offset-0x80; tmp_dbg_comp=BIT(chg_idx); prnt_dbg_comp=padapter->registrypriv.dbg_component= GlobalDebugComponents; RT_TRACE(_module_mp_, _drv_emerg_, (" 1: mp_query_drv_var: offset(%d;0x%x):for dbg conpoment prnt_dbg_comp=0x%.16x GlobalDebugComponents=0x%.16x padapter->registrypriv.dbg_component=0x%.16x\n",offset,offset,prnt_dbg_comp,GlobalDebugComponents,padapter->registrypriv.dbg_component)); if(offset==127){ // prnt_dbg_comp=padapter->registrypriv.dbg_component= GlobalDebugComponents; var=(u32)(padapter->registrypriv.dbg_component); RT_TRACE(0xffffffff, _drv_emerg_, ("2: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h) \n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp)); prnt_dbg_comp=GlobalDebugComponents; RT_TRACE(0xffffffff, _drv_emerg_, ("2-1: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h)\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp)); prnt_dbg_comp=GlobalDebugComponents=padapter->registrypriv.dbg_component; RT_TRACE(0xffffffff, _drv_emerg_, ("2-2: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h)\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp)); } else{ RT_TRACE(0xffffffff, _drv_emerg_, ("3: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h) chg_idx=%d\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp,chg_idx)); prnt_dbg_comp=GlobalDebugComponents; RT_TRACE(0xffffffff, _drv_emerg_,("3-1: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h) chg_idx=%d\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp,chg_idx));// ("3-1: mp_query_drv_var: offset(%d;0x%x):before set dbg conpoment=0x%x chg_idx=%d or0x%x BIT(chg_idx[%d]=0x%x)\n",offset,offset,prnt_dbg_comp,chg_idx,chg_idx,(chg_idx),tmp_dbg_comp) prnt_dbg_comp=GlobalDebugComponents=padapter->registrypriv.dbg_component; RT_TRACE(0xffffffff, _drv_emerg_, ("3-2: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h)\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp)); if(GlobalDebugComponents&tmp_dbg_comp){ //this bit is already set, now clear it GlobalDebugComponents=GlobalDebugComponents&(~tmp_dbg_comp); } else{ //this bit is not set, now set it. GlobalDebugComponents =GlobalDebugComponents|tmp_dbg_comp; } RT_TRACE(0xffffffff, _drv_emerg_, ("4: mp_query_drv_var: offset(%d;0x%x):before set dbg conpoment tmp_dbg_comp=0x%x GlobalDebugComponents=0x%x(l) 0x%x(h)",offset,offset,tmp_dbg_comp,prnt_dbg_comp)); prnt_dbg_comp=GlobalDebugComponents; RT_TRACE(0xffffffff, _drv_emerg_, ("4-1: mp_query_drv_var: offset(%d;0x%x):before set dbg conpoment tmp_dbg_comp=0x%x GlobalDebugComponents=0x%x(l) 0x%x(h)",offset,offset,tmp_dbg_comp,prnt_dbg_comp)); RT_TRACE(_module_rtl871x_xmit_c_, _drv_emerg_, ("0: mp_query_drv_var(_module_rtl871x_xmit_c_:0): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,prnt_dbg_comp)); RT_TRACE(_module_xmit_osdep_c_, _drv_emerg_, ("1: mp_query_drv_var(_module_xmit_osdep_c_:1): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_rtl871x_recv_c_, _drv_emerg_, ("2: mp_query_drv_var(_module_rtl871x_recv_c_:2): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_recv_osdep_c_, _drv_emerg_, ("3: mp_query_drv_var(_module_recv_osdep_c_:3): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_rtl871x_mlme_c_, _drv_emerg_, ("4: mp_query_drv_var(_module_rtl871x_mlme_c_:4): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_mlme_osdep_c_, _drv_emerg_, (" 5:mp_query_drv_var(_module_mlme_osdep_c_:5): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_emerg_, ("6: mp_query_drv_var(_module_rtl871x_sta_mgt_c_:6): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_rtl871x_cmd_c_, _drv_emerg_, ("7: mp_query_drv_var(_module_rtl871x_cmd_c_:7): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_cmd_osdep_c_, _drv_emerg_, ("8: mp_query_drv_var(_module_cmd_osdep_c_:8): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_rtl871x_io_c_, _drv_emerg_, ("9: mp_query_drv_var(_module_rtl871x_io_c_:9): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_io_osdep_c_, _drv_emerg_, ("10: mp_query_drv_var(_module_io_osdep_c_:10): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_os_intfs_c_, _drv_emerg_, ("11: mp_query_drv_var(_module_os_intfs_c_:11): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_rtl871x_security_c_, _drv_emerg_, ("12: mp_query_drv_var(_module_rtl871x_security_c_:12): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_rtl871x_eeprom_c_, _drv_emerg_, ("13: mp_query_drv_var(_module_rtl871x_eeprom_c_:13): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_hal_init_c_, _drv_emerg_, ("14: mp_query_drv_var(_module_hal_init_c_:14): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_hci_hal_init_c_, _drv_emerg_, ("15: mp_query_drv_var(_module_hci_hal_init_c_:15): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_rtl871x_ioctl_c_, _drv_emerg_, ("16: mp_query_drv_var(_module_rtl871x_ioctl_c_:16): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_emerg_, ("17: mp_query_drv_var(_module_rtl871x_ioctl_set_c_:17): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_rtl871x_ioctl_query_c_, _drv_emerg_, ("18: mp_query_drv_var(_module_rtl871x_ioctl_query_c_:18): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_emerg_, ("19: mp_query_drv_var(_module_rtl871x_pwrctrl_c_:19): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_hci_intfs_c_, _drv_emerg_, ("20: mp_query_drv_var(_module_hci_intfs_c_:20): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_hci_ops_c_, _drv_emerg_, ("21: mp_query_drv_var(_module_hci_ops_c_:21): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_osdep_service_c_, _drv_emerg_, ("22: mp_query_drv_var(_module_osdep_service_c_:22): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_mp_, _drv_emerg_, ("23: mp_query_drv_var(_module_mp_:23): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); RT_TRACE(_module_hci_ops_os_c_, _drv_emerg_, ("24: mp_query_drv_var(_module_hci_ops_os_c_:24): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); var=(u32)(GlobalDebugComponents); //GlobalDebugComponents=padapter->registrypriv.dbg_component; RT_TRACE(0xffffffff, _drv_emerg_, (" ==mp_query_drv_var(_module_mp_): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); } } else{ RT_TRACE(_module_mp_, _drv_emerg_, ("\n mp_query_drv_var: offset(%d) >110\n",offset)); } #endif #endif return var; } #endif NDIS_STATUS oid_rt_pro_query_dr_variable_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); #ifdef PLATFORM_OS_XP _irqL oldirql; #endif NDIS_STATUS status = NDIS_STATUS_SUCCESS; DR_VARIABLE_STRUCT *pdrv_var; if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; *poid_par_priv->bytes_needed = sizeof(DR_VARIABLE_STRUCT); if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) return NDIS_STATUS_INVALID_LENGTH; RT_TRACE(_module_mp_, _drv_notice_, ("+Query Information, OID_RT_PRO_QUERY_DR_VARIABLE\n")); pdrv_var = (struct _DR_VARIABLE_STRUCT_ *)poid_par_priv->information_buf; _irqlevel_changed_(&oldirql, LOWER); pdrv_var->variable = mp_query_drv_var(Adapter, pdrv_var->offset, pdrv_var->variable); _irqlevel_changed_(&oldirql, RAISE); *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; RT_TRACE(_module_mp_, _drv_notice_, ("-oid_rt_pro_query_dr_variable_hdl: offset=0x%x valule=0x%x\n", pdrv_var->offset, pdrv_var->variable)); return status; #else return 0; #endif } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_rx_packet_type_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); NDIS_STATUS status = NDIS_STATUS_SUCCESS; RT_TRACE(_module_mp_, _drv_err_, ("oid_rt_pro_rx_packet_type_hdl...................\n")); if (poid_par_priv->information_buf_len < sizeof (UCHAR)) { status = NDIS_STATUS_INVALID_LENGTH; *poid_par_priv->bytes_needed = sizeof(UCHAR); return status; } if (poid_par_priv->type_of_oid == SET_OID) { Adapter->mppriv.rx_with_status = *(UCHAR *) poid_par_priv->information_buf; RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_, ("Query Information, OID_RT_PRO_RX_PACKET_TYPE:%d \n",\ Adapter->mppriv.rx_with_status)); //*(u32 *)&Adapter->eeprompriv.mac_addr[0]=rtw_read32(Adapter, 0x10250050); //*(u16 *)&Adapter->eeprompriv.mac_addr[4]=rtw_read16(Adapter, 0x10250054); RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_,("MAC addr=0x%x:0x%x:0x%x:0x%x:0x%x:0x%x \n", Adapter->eeprompriv.mac_addr[0],Adapter->eeprompriv.mac_addr[1],Adapter->eeprompriv.mac_addr[2],\ Adapter->eeprompriv.mac_addr[3],Adapter->eeprompriv.mac_addr[4],Adapter->eeprompriv.mac_addr[5])); } else { *(UCHAR *) poid_par_priv->information_buf = Adapter->mppriv.rx_with_status; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_, ("Query Information, OID_RT_PRO_RX_PACKET_TYPE:%d \n", \ Adapter->mppriv.rx_with_status)); //*(u32 *)&Adapter->eeprompriv.mac_addr[0]=rtw_read32(Adapter, 0x10250050); //*(u16 *)&Adapter->eeprompriv.mac_addr[4]=rtw_read16(Adapter, 0x10250054); RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_,("MAC addr=0x%x:0x%x:0x%x:0x%x:0x%x:0x%x \n", Adapter->eeprompriv.mac_addr[0],Adapter->eeprompriv.mac_addr[1],Adapter->eeprompriv.mac_addr[2],\ Adapter->eeprompriv.mac_addr[3],Adapter->eeprompriv.mac_addr[4],Adapter->eeprompriv.mac_addr[5])); } #endif return NDIS_STATUS_SUCCESS; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_read_efuse_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif PEFUSE_ACCESS_STRUCT pefuse; u8 *data; u16 addr = 0, cnts = 0, max_available_size = 0; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len < sizeof(EFUSE_ACCESS_STRUCT)) return NDIS_STATUS_INVALID_LENGTH; pefuse = (PEFUSE_ACCESS_STRUCT)poid_par_priv->information_buf; addr = pefuse->start_addr; cnts = pefuse->cnts; data = pefuse->data; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_read_efuse_hd: buf_len=%d addr=%d cnts=%d\n", poid_par_priv->information_buf_len, addr, cnts)); EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); if ((addr + cnts) > max_available_size) { RT_TRACE(_module_mp_, _drv_err_, ("!oid_rt_pro_read_efuse_hdl: parameter error!\n")); return NDIS_STATUS_NOT_ACCEPTED; } _irqlevel_changed_(&oldirql, LOWER); if (rtw_efuse_access(Adapter, _FALSE, addr, cnts, data) == _FAIL) { RT_TRACE(_module_mp_, _drv_err_, ("!oid_rt_pro_read_efuse_hdl: rtw_efuse_access FAIL!\n")); status = NDIS_STATUS_FAILURE; } else *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_write_efuse_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif PEFUSE_ACCESS_STRUCT pefuse; u8 *data; u16 addr = 0, cnts = 0, max_available_size = 0; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; pefuse = (PEFUSE_ACCESS_STRUCT)poid_par_priv->information_buf; addr = pefuse->start_addr; cnts = pefuse->cnts; data = pefuse->data; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_write_efuse_hdl: buf_len=%d addr=0x%04x cnts=%d\n", poid_par_priv->information_buf_len, addr, cnts)); EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); if ((addr + cnts) > max_available_size) { RT_TRACE(_module_mp_, _drv_err_, ("!oid_rt_pro_write_efuse_hdl: parameter error")); return NDIS_STATUS_NOT_ACCEPTED; } _irqlevel_changed_(&oldirql, LOWER); if (rtw_efuse_access(Adapter, _TRUE, addr, cnts, data) == _FAIL) status = NDIS_STATUS_FAILURE; _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_rw_efuse_pgpkt_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif PPGPKT_STRUCT ppgpkt; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; // RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_pro_rw_efuse_pgpkt_hdl\n")); *poid_par_priv->bytes_rw = 0; if (poid_par_priv->information_buf_len < sizeof(PGPKT_STRUCT)) return NDIS_STATUS_INVALID_LENGTH; ppgpkt = (PPGPKT_STRUCT)poid_par_priv->information_buf; _irqlevel_changed_(&oldirql, LOWER); if (poid_par_priv->type_of_oid == QUERY_OID) { RT_TRACE(_module_mp_, _drv_notice_, ("oid_rt_pro_rw_efuse_pgpkt_hdl: Read offset=0x%x\n",\ ppgpkt->offset)); Efuse_PowerSwitch(Adapter, _FALSE, _TRUE); if (Efuse_PgPacketRead(Adapter, ppgpkt->offset, ppgpkt->data, _FALSE) == _TRUE) *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; else status = NDIS_STATUS_FAILURE; Efuse_PowerSwitch(Adapter, _FALSE, _FALSE); } else { RT_TRACE(_module_mp_, _drv_notice_, ("oid_rt_pro_rw_efuse_pgpkt_hdl: Write offset=0x%x word_en=0x%x\n",\ ppgpkt->offset, ppgpkt->word_en)); Efuse_PowerSwitch(Adapter, _TRUE, _TRUE); if (Efuse_PgPacketWrite(Adapter, ppgpkt->offset, ppgpkt->word_en, ppgpkt->data, _FALSE) == _TRUE) *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; else status = NDIS_STATUS_FAILURE; Efuse_PowerSwitch(Adapter, _TRUE, _FALSE); } _irqlevel_changed_(&oldirql, RAISE); RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_pro_rw_efuse_pgpkt_hdl: status=0x%08X\n", status)); _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_get_efuse_current_size_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif u16 size; u8 ret; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len information_buf = size; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; } else status = NDIS_STATUS_FAILURE; _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_get_efuse_max_size_hdl(struct oid_par_priv *poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len < sizeof(u32)) return NDIS_STATUS_INVALID_LENGTH; *(u32*)poid_par_priv->information_buf = efuse_GetMaxSize(Adapter); *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_get_efuse_max_size_hdl: size=%d status=0x%08X\n", *(int*)poid_par_priv->information_buf, status)); _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_efuse_hdl(struct oid_par_priv *poid_par_priv) { NDIS_STATUS status; _func_enter_; RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_pro_efuse_hdl\n")); if (poid_par_priv->type_of_oid == QUERY_OID) status = oid_rt_pro_read_efuse_hdl(poid_par_priv); else status = oid_rt_pro_write_efuse_hdl(poid_par_priv); RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_pro_efuse_hdl: status=0x%08X\n", status)); _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_pro_efuse_map_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif u8 *data; NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); u16 mapLen=0; _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_efuse_map_hdl\n")); EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE); *poid_par_priv->bytes_rw = 0; if (poid_par_priv->information_buf_len < mapLen) return NDIS_STATUS_INVALID_LENGTH; data = (u8*)poid_par_priv->information_buf; _irqlevel_changed_(&oldirql, LOWER); if (poid_par_priv->type_of_oid == QUERY_OID) { RT_TRACE(_module_mp_, _drv_info_, ("oid_rt_pro_efuse_map_hdl: READ\n")); if (rtw_efuse_map_read(Adapter, 0, mapLen, data) == _SUCCESS) *poid_par_priv->bytes_rw = mapLen; else { RT_TRACE(_module_mp_, _drv_err_, ("oid_rt_pro_efuse_map_hdl: READ fail\n")); status = NDIS_STATUS_FAILURE; } } else { // SET_OID RT_TRACE(_module_mp_, _drv_info_, ("oid_rt_pro_efuse_map_hdl: WRITE\n")); if (rtw_efuse_map_write(Adapter, 0, mapLen, data) == _SUCCESS) *poid_par_priv->bytes_rw = mapLen; else { RT_TRACE(_module_mp_, _drv_err_, ("oid_rt_pro_efuse_map_hdl: WRITE fail\n")); status = NDIS_STATUS_FAILURE; } } _irqlevel_changed_(&oldirql, RAISE); RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_pro_efuse_map_hdl: status=0x%08X\n", status)); _func_exit_; return status; } NDIS_STATUS oid_rt_set_crystal_cap_hdl(struct oid_par_priv *poid_par_priv) { NDIS_STATUS status = NDIS_STATUS_SUCCESS; #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); #ifdef PLATFORM_OS_XP _irqL oldirql; #endif u32 crystal_cap = 0; _func_enter_; if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len information_buf);//4 if (crystal_cap > 0xf) return NDIS_STATUS_NOT_ACCEPTED; Adapter->mppriv.curr_crystalcap = crystal_cap; _irqlevel_changed_(&oldirql,LOWER); SetCrystalCap(Adapter); _irqlevel_changed_(&oldirql,RAISE); _func_exit_; #endif return status; } NDIS_STATUS oid_rt_set_rx_packet_type_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif u8 rx_pkt_type; // u32 rcr_val32; NDIS_STATUS status = NDIS_STATUS_SUCCESS; // PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); _func_enter_; RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_set_rx_packet_type_hdl\n")); if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len < sizeof(u8)) return NDIS_STATUS_INVALID_LENGTH; rx_pkt_type = *((u8*)poid_par_priv->information_buf);//4 RT_TRACE(_module_mp_, _drv_info_, ("rx_pkt_type: %x\n",rx_pkt_type )); #if 0 _irqlevel_changed_(&oldirql, LOWER); #if 0 rcr_val8 = rtw_read8(Adapter, 0x10250048);//RCR rcr_val8 &= ~(RCR_AB|RCR_AM|RCR_APM|RCR_AAP); if(rx_pkt_type == RX_PKT_BROADCAST){ rcr_val8 |= (RCR_AB | RCR_ACRC32 ); } else if(rx_pkt_type == RX_PKT_DEST_ADDR){ rcr_val8 |= (RCR_AAP| RCR_AM |RCR_ACRC32); } else if(rx_pkt_type == RX_PKT_PHY_MATCH){ rcr_val8 |= (RCR_APM|RCR_ACRC32); } else{ rcr_val8 &= ~(RCR_AAP|RCR_APM|RCR_AM|RCR_AB|RCR_ACRC32); } rtw_write8(padapter, 0x10250048,rcr_val8); #else rcr_val32 = rtw_read32(padapter, RCR);//RCR = 0x10250048 rcr_val32 &= ~(RCR_CBSSID|RCR_AB|RCR_AM|RCR_APM|RCR_AAP); #if 0 if(rx_pkt_type == RX_PKT_BROADCAST){ rcr_val32 |= (RCR_AB|RCR_AM|RCR_APM|RCR_AAP|RCR_ACRC32); } else if(rx_pkt_type == RX_PKT_DEST_ADDR){ //rcr_val32 |= (RCR_CBSSID|RCR_AAP|RCR_AM|RCR_ACRC32); rcr_val32 |= (RCR_CBSSID|RCR_APM|RCR_ACRC32); } else if(rx_pkt_type == RX_PKT_PHY_MATCH){ rcr_val32 |= (RCR_APM|RCR_ACRC32); //rcr_val32 |= (RCR_AAP|RCR_ACRC32); } else{ rcr_val32 &= ~(RCR_AAP|RCR_APM|RCR_AM|RCR_AB|RCR_ACRC32); } #else switch (rx_pkt_type) { case RX_PKT_BROADCAST : rcr_val32 |= (RCR_AB|RCR_AM|RCR_APM|RCR_AAP|RCR_ACRC32); break; case RX_PKT_DEST_ADDR : rcr_val32 |= (RCR_AB|RCR_AM|RCR_APM|RCR_AAP|RCR_ACRC32); break; case RX_PKT_PHY_MATCH: rcr_val32 |= (RCR_APM|RCR_ACRC32); break; default: rcr_val32 &= ~(RCR_AAP|RCR_APM|RCR_AM|RCR_AB|RCR_ACRC32); break; } if (rx_pkt_type == RX_PKT_DEST_ADDR) { padapter->mppriv.check_mp_pkt = 1; } else { padapter->mppriv.check_mp_pkt = 0; } #endif rtw_write32(padapter, RCR, rcr_val32); #endif _irqlevel_changed_(&oldirql, RAISE); #endif _func_exit_; return status; } NDIS_STATUS oid_rt_pro_set_tx_agc_offset_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); #ifdef PLATFORM_OS_XP _irqL oldirql; #endif NDIS_STATUS status = NDIS_STATUS_SUCCESS; u32 txagc; _func_enter_; if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len < sizeof(u32)) return NDIS_STATUS_INVALID_LENGTH; txagc = *(u32*)poid_par_priv->information_buf; RT_TRACE(_module_mp_, _drv_info_, ("oid_rt_pro_set_tx_agc_offset_hdl: 0x%08x\n", txagc)); _irqlevel_changed_(&oldirql, LOWER); SetTxAGCOffset(Adapter, txagc); _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; #else return 0; #endif } NDIS_STATUS oid_rt_pro_set_pkt_test_mode_hdl(struct oid_par_priv *poid_par_priv) { #if 0 PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); NDIS_STATUS status = NDIS_STATUS_SUCCESS; struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; struct mp_priv *pmppriv = &Adapter->mppriv; u32 type; _func_enter_; if (poid_par_priv->type_of_oid != SET_OID) return NDIS_STATUS_NOT_ACCEPTED; if (poid_par_priv->information_buf_len information_buf; if (_LOOPBOOK_MODE_ == type) { pmppriv->mode = type; set_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE); //append txdesc RT_TRACE(_module_mp_, _drv_info_, ("test mode change to loopback mode:0x%08x.\n", get_fwstate(pmlmepriv))); } else if (_2MAC_MODE_ == type){ pmppriv->mode = type; _clr_fwstate_(pmlmepriv, WIFI_MP_LPBK_STATE); RT_TRACE(_module_mp_, _drv_info_, ("test mode change to 2mac mode:0x%08x.\n", get_fwstate(pmlmepriv))); } else status = NDIS_STATUS_NOT_ACCEPTED; _func_exit_; return status; #else return 0; #endif } unsigned int mp_ioctl_xmit_packet_hdl(struct oid_par_priv *poid_par_priv) { PMP_XMIT_PARM pparm; PADAPTER padapter; struct mp_priv *pmp_priv; struct pkt_attrib *pattrib; RT_TRACE(_module_mp_, _drv_notice_, ("+%s\n", __func__)); pparm = (PMP_XMIT_PARM)poid_par_priv->information_buf; padapter = (PADAPTER)poid_par_priv->adapter_context; pmp_priv = &padapter->mppriv; if (poid_par_priv->type_of_oid == QUERY_OID) { pparm->enable = !pmp_priv->tx.stop; pparm->count = pmp_priv->tx.sended; } else { if (pparm->enable == 0) { pmp_priv->tx.stop = 1; } else if (pmp_priv->tx.stop == 1) { pmp_priv->tx.stop = 0; pmp_priv->tx.count = pparm->count; pmp_priv->tx.payload = pparm->payload_type; pattrib = &pmp_priv->tx.attrib; pattrib->pktlen = pparm->length; _rtw_memcpy(pattrib->dst, pparm->da, ETH_ALEN); SetPacketTx(padapter); } else return NDIS_STATUS_FAILURE; } return NDIS_STATUS_SUCCESS; } #if 0 unsigned int mp_ioctl_xmit_packet_hdl(struct oid_par_priv *poid_par_priv) { unsigned char *pframe, *pmp_pkt; struct ethhdr *pethhdr; struct pkt_attrib *pattrib; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; int llc_sz, payload_len; struct mp_xmit_frame *pxframe= NULL; struct mp_xmit_packet *pmp_xmitpkt = (struct mp_xmit_packet*)param; u8 addr3[] = {0x02, 0xE0, 0x4C, 0x87, 0x66, 0x55}; // DBG_871X("+mp_ioctl_xmit_packet_hdl\n"); pxframe = alloc_mp_xmitframe(&padapter->mppriv); if (pxframe == NULL) { DEBUG_ERR(("Can't alloc pmpframe %d:%s\n", __LINE__, __FILE__)); return -1; } //mp_xmit_pkt payload_len = pmp_xmitpkt->len - 14; pmp_pkt = (unsigned char*)pmp_xmitpkt->mem; pethhdr = (struct ethhdr *)pmp_pkt; //DBG_871X("payload_len=%d, pkt_mem=0x%x\n", pmp_xmitpkt->len, (void*)pmp_xmitpkt->mem); //DBG_871X("pxframe=0x%x\n", (void*)pxframe); //DBG_871X("pxframe->mem=0x%x\n", (void*)pxframe->mem); //update attribute pattrib = &pxframe->attrib; memset((u8 *)(pattrib), 0, sizeof (struct pkt_attrib)); pattrib->pktlen = pmp_xmitpkt->len; pattrib->ether_type = ntohs(pethhdr->h_proto); pattrib->hdrlen = 24; pattrib->nr_frags = 1; pattrib->priority = 0; #ifndef CONFIG_MP_LINUX if(IS_MCAST(pethhdr->h_dest)) pattrib->mac_id = 4; else pattrib->mac_id = 5; #else pattrib->mac_id = 5; #endif // memset(pxframe->mem, 0 , WLANHDR_OFFSET); pframe = (u8 *)(pxframe->mem) + WLANHDR_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; SetFrameSubType(pframe, WIFI_DATA); _rtw_memcpy(pwlanhdr->addr1, pethhdr->h_dest, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, pethhdr->h_source, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, addr3, ETH_ALEN); pwlanhdr->seq_ctl = 0; pframe += pattrib->hdrlen; llc_sz= rtw_put_snap(pframe, pattrib->ether_type); pframe += llc_sz; _rtw_memcpy(pframe, (void*)(pmp_pkt+14), payload_len); pattrib->last_txcmdsz = pattrib->hdrlen + llc_sz + payload_len; DEBUG_INFO(("issuing mp_xmit_frame, tx_len=%d, ether_type=0x%x\n", pattrib->last_txcmdsz, pattrib->ether_type)); xmit_mp_frame(padapter, pxframe); return _SUCCESS; } #endif //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_set_power_down_hdl(struct oid_par_priv *poid_par_priv) { #ifdef PLATFORM_OS_XP _irqL oldirql; #endif u8 bpwrup; NDIS_STATUS status = NDIS_STATUS_SUCCESS; #ifdef PLATFORM_LINUX #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); #endif #endif _func_enter_; if (poid_par_priv->type_of_oid != SET_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } RT_TRACE(_module_mp_, _drv_info_, ("\n ===> Setoid_rt_set_power_down_hdl.\n")); _irqlevel_changed_(&oldirql, LOWER); bpwrup = *(u8 *)poid_par_priv->information_buf; //CALL the power_down function #ifdef PLATFORM_LINUX #if defined(CONFIG_RTL8712) //Linux MP insmod unknown symbol dev_power_down(padapter,bpwrup); #endif #endif _irqlevel_changed_(&oldirql, RAISE); //DEBUG_ERR(("\n <=== Query OID_RT_PRO_READ_REGISTER. // Add:0x%08x Width:%d Value:0x%08x\n",RegRWStruct->offset,RegRWStruct->width,RegRWStruct->value)); _func_exit_; return status; } //------------------------------------------------------------------------------ NDIS_STATUS oid_rt_get_power_mode_hdl(struct oid_par_priv *poid_par_priv) { #if 0 NDIS_STATUS status = NDIS_STATUS_SUCCESS; PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); //#ifdef PLATFORM_OS_XP // _irqL oldirql; //#endif _func_enter_; if (poid_par_priv->type_of_oid != QUERY_OID) { status = NDIS_STATUS_NOT_ACCEPTED; return status; } if (poid_par_priv->information_buf_len < sizeof(u32)) { status = NDIS_STATUS_INVALID_LENGTH; return status; } RT_TRACE(_module_mp_, _drv_info_, ("\n ===> oid_rt_get_power_mode_hdl.\n")); // _irqlevel_changed_(&oldirql, LOWER); *(int*)poid_par_priv->information_buf = Adapter->registrypriv.low_power ? POWER_LOW : POWER_NORMAL; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; // _irqlevel_changed_(&oldirql, RAISE); _func_exit_; return status; #else return 0; #endif } rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_odm.c000066400000000000000000000222651261122257400202550ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include #include const char *odm_comp_str[] = { /* BIT0 */"ODM_COMP_DIG", /* BIT1 */"ODM_COMP_RA_MASK", /* BIT2 */"ODM_COMP_DYNAMIC_TXPWR", /* BIT3 */"ODM_COMP_FA_CNT", /* BIT4 */"ODM_COMP_RSSI_MONITOR", /* BIT5 */"ODM_COMP_CCK_PD", /* BIT6 */"ODM_COMP_ANT_DIV", /* BIT7 */"ODM_COMP_PWR_SAVE", /* BIT8 */"ODM_COMP_PWR_TRAIN", /* BIT9 */"ODM_COMP_RATE_ADAPTIVE", /* BIT10 */"ODM_COMP_PATH_DIV", /* BIT11 */"ODM_COMP_PSD", /* BIT12 */"ODM_COMP_DYNAMIC_PRICCA", /* BIT13 */"ODM_COMP_RXHP", /* BIT14 */"ODM_COMP_MP", /* BIT15 */"ODM_COMP_CFO_TRACKING", /* BIT16 */"ODM_COMP_ACS", /* BIT17 */"PHYDM_COMP_ADAPTIVITY", /* BIT18 */NULL, /* BIT19 */NULL, /* BIT20 */"ODM_COMP_EDCA_TURBO", /* BIT21 */"ODM_COMP_EARLY_MODE", /* BIT22 */NULL, /* BIT23 */NULL, /* BIT24 */"ODM_COMP_TX_PWR_TRACK", /* BIT25 */"ODM_COMP_RX_GAIN_TRACK", /* BIT26 */"ODM_COMP_CALIBRATION", /* BIT27 */NULL, /* BIT28 */NULL, /* BIT29 */NULL, /* BIT30 */"ODM_COMP_COMMON", /* BIT31 */"ODM_COMP_INIT", }; #define RTW_ODM_COMP_MAX 32 const char *odm_ability_str[] = { /* BIT0 */"ODM_BB_DIG", /* BIT1 */"ODM_BB_RA_MASK", /* BIT2 */"ODM_BB_DYNAMIC_TXPWR", /* BIT3 */"ODM_BB_FA_CNT", /* BIT4 */"ODM_BB_RSSI_MONITOR", /* BIT5 */"ODM_BB_CCK_PD", /* BIT6 */"ODM_BB_ANT_DIV", /* BIT7 */"ODM_BB_PWR_SAVE", /* BIT8 */"ODM_BB_PWR_TRAIN", /* BIT9 */"ODM_BB_RATE_ADAPTIVE", /* BIT10 */"ODM_BB_PATH_DIV", /* BIT11 */"ODM_BB_PSD", /* BIT12 */"ODM_BB_RXHP", /* BIT13 */"ODM_BB_ADAPTIVITY", /* BIT14 */"ODM_BB_CFO_TRACKING", /* BIT15 */"ODM_BB_NHM_CNT", /* BIT16 */"ODM_BB_PRIMARY_CCA", /* BIT17 */NULL, /* BIT18 */NULL, /* BIT19 */NULL, /* BIT20 */"ODM_MAC_EDCA_TURBO", /* BIT21 */"ODM_MAC_EARLY_MODE", /* BIT22 */NULL, /* BIT23 */NULL, /* BIT24 */"ODM_RF_TX_PWR_TRACK", /* BIT25 */"ODM_RF_RX_GAIN_TRACK", /* BIT26 */"ODM_RF_CALIBRATION", }; #define RTW_ODM_ABILITY_MAX 27 const char *odm_dbg_level_str[] = { NULL, "ODM_DBG_OFF", "ODM_DBG_SERIOUS", "ODM_DBG_WARNING", "ODM_DBG_LOUD", "ODM_DBG_TRACE", }; #define RTW_ODM_DBG_LEVEL_NUM 6 void rtw_odm_dbg_comp_msg(void *sel, _adapter *adapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); DM_ODM_T *odm = &pHalData->odmpriv; int cnt = 0; u64 dbg_comp; int i; rtw_hal_get_def_var(adapter, HW_DEF_ODM_DBG_FLAG, &dbg_comp); DBG_871X_SEL_NL(sel, "odm.DebugComponents = 0x%016llx \n", dbg_comp); for (i=0;iodmpriv; int cnt = 0; u32 dbg_level; int i; rtw_hal_get_def_var(adapter, HW_DEF_ODM_DBG_LEVEL, &dbg_level); DBG_871X_SEL_NL(sel, "odm.DebugLevel = %u\n", dbg_level); for (i=0;iodmpriv; int cnt = 0; u32 ability = 0; int i; rtw_hal_get_hwreg(adapter, HW_VAR_DM_FLAG, (u8*)&ability); DBG_871X_SEL_NL(sel, "odm.SupportAbility = 0x%08x\n", ability); for (i=0;iregistrypriv; struct mlme_priv *mlme = &adapter->mlmepriv; HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); DM_ODM_T *odm = &hal_data->odmpriv; DBG_871X_SEL_NL(sel, "RTW_ADAPTIVITY_EN_"); if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_DISABLE) { DBG_871X_SEL(sel, "DISABLE\n"); } else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE) { DBG_871X_SEL(sel, "ENABLE\n"); } else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_AUTO) { DBG_871X_SEL(sel, "AUTO, chplan:0x%02x, Regulation:%u,%u\n" , mlme->ChannelPlan, odm->odm_Regulation2_4G, odm->odm_Regulation5G); } else { DBG_871X_SEL(sel, "INVALID\n"); } } #define RTW_ADAPTIVITY_MODE_NORMAL 0 #define RTW_ADAPTIVITY_MODE_CARRIER_SENSE 1 void rtw_odm_adaptivity_mode_msg(void *sel, _adapter *adapter) { struct registry_priv *regsty = &adapter->registrypriv; DBG_871X_SEL_NL(sel, "RTW_ADAPTIVITY_MODE_"); if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_NORMAL) { DBG_871X_SEL(sel, "NORMAL\n"); } else if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_CARRIER_SENSE) { DBG_871X_SEL(sel, "CARRIER_SENSE\n"); } else { DBG_871X_SEL(sel, "INVALID\n"); } } #define RTW_NHM_EN_DISABLE 0 #define RTW_NHM_EN_ENABLE 1 void rtw_odm_nhm_en_msg(void *sel, _adapter *adapter) { struct registry_priv *regsty = &adapter->registrypriv; DBG_871X_SEL_NL(sel, "RTW_NHM_EN_"); if (regsty->nhm_en == RTW_NHM_EN_DISABLE) { DBG_871X_SEL(sel, "DISABLE\n"); } else if (regsty->nhm_en == RTW_NHM_EN_ENABLE) { DBG_871X_SEL(sel, "ENABLE\n"); } else { DBG_871X_SEL(sel, "INVALID\n"); } } bool rtw_odm_adaptivity_needed(_adapter *adapter) { struct registry_priv *regsty = &adapter->registrypriv; struct mlme_priv *mlme = &adapter->mlmepriv; bool ret = _FALSE; if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE || regsty->adaptivity_en == RTW_ADAPTIVITY_EN_AUTO) ret = _TRUE; if (ret == _TRUE) { rtw_odm_adaptivity_ver_msg(RTW_DBGDUMP, adapter); rtw_odm_adaptivity_en_msg(RTW_DBGDUMP, adapter); rtw_odm_adaptivity_mode_msg(RTW_DBGDUMP, adapter); rtw_odm_nhm_en_msg(RTW_DBGDUMP, adapter); } return ret; } void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); DM_ODM_T *odm = &pHalData->odmpriv; rtw_odm_adaptivity_ver_msg(sel, adapter); rtw_odm_adaptivity_en_msg(sel, adapter); rtw_odm_adaptivity_mode_msg(sel, adapter); rtw_odm_nhm_en_msg(sel, adapter); DBG_871X_SEL_NL(sel, "%10s %16s %8s %10s %11s %14s\n" , "TH_L2H_ini", "TH_EDCCA_HL_diff", "IGI_Base", "ForceEDCCA", "AdapEn_RSSI", "IGI_LowerBound"); DBG_871X_SEL_NL(sel, "0x%-8x %-16d 0x%-6x %-10d %-11u %-14u\n" , (u8)odm->TH_L2H_ini , odm->TH_EDCCA_HL_diff , odm->IGI_Base , odm->ForceEDCCA , odm->AdapEn_RSSI , odm->IGI_LowerBound ); DBG_871X_SEL_NL(sel, "%8s %9s\n", "EDCCA_ES","Adap_Flag"); DBG_871X_SEL_NL(sel, "%-8x %-9x \n" , odm->EDCCA_enable_state , odm->adaptivity_flag ); } void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 TH_L2H_ini, s8 TH_EDCCA_HL_diff, s8 IGI_Base, bool ForceEDCCA, u8 AdapEn_RSSI, u8 IGI_LowerBound) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); DM_ODM_T *odm = &pHalData->odmpriv; odm->TH_L2H_ini = TH_L2H_ini; odm->TH_EDCCA_HL_diff = TH_EDCCA_HL_diff; odm->IGI_Base = IGI_Base; odm->ForceEDCCA = ForceEDCCA; odm->AdapEn_RSSI = AdapEn_RSSI; odm->IGI_LowerBound = IGI_LowerBound; } void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter) { HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); DM_ODM_T *odm = &(hal_data->odmpriv); DBG_871X_SEL_NL(sel,"RxRate = %s, RSSI_A = %d(%%), RSSI_B = %d(%%)\n", HDATA_RATE(odm->RxRate), odm->RSSI_A, odm->RSSI_B); } void rtw_odm_acquirespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; _irqL irqL; switch(type) { case RT_IQK_SPINLOCK: _enter_critical_bh(&pdmpriv->IQKSpinLock, &irqL); default: break; } } void rtw_odm_releasespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; _irqL irqL; switch(type) { case RT_IQK_SPINLOCK: _exit_critical_bh(&pdmpriv->IQKSpinLock, &irqL); default: break; } } rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_p2p.c000066400000000000000000004544201261122257400202010ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_P2P_C_ #include #ifdef CONFIG_P2P int rtw_p2p_is_channel_list_ok( u8 desired_ch, u8* ch_list, u8 ch_cnt ) { int found = 0, i = 0; for( i = 0; i < ch_cnt; i++ ) { if ( ch_list[ i ] == desired_ch ) { found = 1; break; } } return( found ); } int is_any_client_associated(_adapter *padapter) { return padapter->stapriv.asoc_list_cnt ? _TRUE : _FALSE; } static u32 go_add_group_info_attr(struct wifidirect_info *pwdinfo, u8 *pbuf) { _irqL irqL; _list *phead, *plist; u32 len=0; u16 attr_len = 0; u8 tmplen, *pdata_attr, *pstart, *pcur; struct sta_info *psta = NULL; _adapter *padapter = pwdinfo->padapter; struct sta_priv *pstapriv = &padapter->stapriv; DBG_871X("%s\n", __FUNCTION__); pdata_attr = rtw_zmalloc(MAX_P2P_IE_LEN); if(NULL == pdata_attr){ DBG_871X("%s pdata_attr malloc failed \n", __FUNCTION__); goto _exit; } pstart = pdata_attr; pcur = pdata_attr; _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); phead = &pstapriv->asoc_list; plist = get_next(phead); //look up sta asoc_queue while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); plist = get_next(plist); if(psta->is_p2p_device) { tmplen = 0; pcur++; //P2P device address _rtw_memcpy(pcur, psta->dev_addr, ETH_ALEN); pcur += ETH_ALEN; //P2P interface address _rtw_memcpy(pcur, psta->hwaddr, ETH_ALEN); pcur += ETH_ALEN; *pcur = psta->dev_cap; pcur++; //*(u16*)(pcur) = cpu_to_be16(psta->config_methods); RTW_PUT_BE16(pcur, psta->config_methods); pcur += 2; _rtw_memcpy(pcur, psta->primary_dev_type, 8); pcur += 8; *pcur = psta->num_of_secdev_type; pcur++; _rtw_memcpy(pcur, psta->secdev_types_list, psta->num_of_secdev_type*8); pcur += psta->num_of_secdev_type*8; if(psta->dev_name_len>0) { //*(u16*)(pcur) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); RTW_PUT_BE16(pcur, WPS_ATTR_DEVICE_NAME); pcur += 2; //*(u16*)(pcur) = cpu_to_be16( psta->dev_name_len ); RTW_PUT_BE16(pcur, psta->dev_name_len); pcur += 2; _rtw_memcpy(pcur, psta->dev_name, psta->dev_name_len); pcur += psta->dev_name_len; } tmplen = (u8)(pcur-pstart); *pstart = (tmplen-1); attr_len += tmplen; //pstart += tmplen; pstart = pcur; } } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); if(attr_len>0) { len = rtw_set_p2p_attr_content(pbuf, P2P_ATTR_GROUP_INFO, attr_len, pdata_attr); } rtw_mfree(pdata_attr, MAX_P2P_IE_LEN); _exit: return len; } static void issue_group_disc_req(struct wifidirect_info *pwdinfo, u8 *da) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; _adapter *padapter = pwdinfo->padapter; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); unsigned char category = RTW_WLAN_CATEGORY_P2P;//P2P action frame u32 p2poui = cpu_to_be32(P2POUI); u8 oui_subtype = P2P_GO_DISC_REQUEST; u8 dialogToken=0; DBG_871X("[%s]\n", __FUNCTION__); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { return; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, pwdinfo->interface_addr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, pwdinfo->interface_addr, ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_ACTION); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); //Build P2P action frame header pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); //there is no IE in this P2P action frame pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); } static void issue_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 status, u8 dialogToken) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; _adapter *padapter = pwdinfo->padapter; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; u8 action = P2P_PUB_ACTION_ACTION; u32 p2poui = cpu_to_be32(P2POUI); u8 oui_subtype = P2P_DEVDISC_RESP; u8 p2pie[8] = { 0x00 }; u32 p2pielen = 0; DBG_871X("[%s]\n", __FUNCTION__); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { return; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, pwdinfo->device_addr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, pwdinfo->device_addr, ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_ACTION); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); //Build P2P public action frame header pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); //Build P2P IE // P2P OUI p2pielen = 0; p2pie[ p2pielen++ ] = 0x50; p2pie[ p2pielen++ ] = 0x6F; p2pie[ p2pielen++ ] = 0x9A; p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 // P2P_ATTR_STATUS p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status); pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, p2pie, &pattrib->pktlen); pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); } static void issue_p2p_provision_resp(struct wifidirect_info *pwdinfo, u8* raddr, u8* frame_body, u16 config_method) { _adapter *padapter = pwdinfo->padapter; unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; u8 action = P2P_PUB_ACTION_ACTION; u8 dialogToken = frame_body[7]; // The Dialog Token of provisioning discovery request frame. u32 p2poui = cpu_to_be32(P2POUI); u8 oui_subtype = P2P_PROVISION_DISC_RESP; u8 wpsie[ 100 ] = { 0x00 }; u8 wpsielen = 0; #ifdef CONFIG_WFD u32 wfdielen = 0; #endif //CONFIG_WFD struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { return; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_ACTION); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); wpsielen = 0; // WPS OUI //*(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); RTW_PUT_BE32(wpsie, WPSOUI); wpsielen += 4; #if 0 // WPS version // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); wpsielen += 2; // Value: wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 #endif // Config Method // Type: //*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); RTW_PUT_BE16(wpsie + wpsielen, WPS_ATTR_CONF_METHOD); wpsielen += 2; // Length: //*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); RTW_PUT_BE16(wpsie + wpsielen, 0x0002); wpsielen += 2; // Value: //*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( config_method ); RTW_PUT_BE16(wpsie + wpsielen, config_method); wpsielen += 2; pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); #ifdef CONFIG_WFD wfdielen = build_provdisc_resp_wfd_ie(pwdinfo, pframe); pframe += wfdielen; pattrib->pktlen += wfdielen; #endif //CONFIG_WFD pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); return; } static void issue_p2p_presence_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 status, u8 dialogToken) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; _adapter *padapter = pwdinfo->padapter; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); unsigned char category = RTW_WLAN_CATEGORY_P2P;//P2P action frame u32 p2poui = cpu_to_be32(P2POUI); u8 oui_subtype = P2P_PRESENCE_RESPONSE; u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; u8 noa_attr_content[32] = { 0x00 }; u32 p2pielen = 0; DBG_871X("[%s]\n", __FUNCTION__); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { return; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, pwdinfo->interface_addr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, pwdinfo->interface_addr, ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_ACTION); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); //Build P2P action frame header pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); //Add P2P IE header // P2P OUI p2pielen = 0; p2pie[ p2pielen++ ] = 0x50; p2pie[ p2pielen++ ] = 0x6F; p2pie[ p2pielen++ ] = 0x9A; p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 //Add Status attribute in P2P IE p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status); //Add NoA attribute in P2P IE noa_attr_content[0] = 0x1;//index noa_attr_content[1] = 0x0;//CTWindow and OppPS Parameters //todo: Notice of Absence Descriptor(s) p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_NOA, 2, noa_attr_content); pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, p2pie, &(pattrib->pktlen)); pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); } u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) { u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; u16 capability=0; u32 len=0, p2pielen = 0; // P2P OUI p2pielen = 0; p2pie[ p2pielen++ ] = 0x50; p2pie[ p2pielen++ ] = 0x6F; p2pie[ p2pielen++ ] = 0x9A; p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 // According to the P2P Specification, the beacon frame should contain 3 P2P attributes // 1. P2P Capability // 2. P2P Device ID // 3. Notice of Absence ( NOA ) // P2P Capability ATTR // Type: // Length: // Value: // Device Capability Bitmap, 1 byte // Be able to participate in additional P2P Groups and // support the P2P Invitation Procedure // Group Capability Bitmap, 1 byte capability = P2P_DEVCAP_INVITATION_PROC|P2P_DEVCAP_CLIENT_DISCOVERABILITY; capability |= ((P2P_GRPCAP_GO | P2P_GRPCAP_INTRABSS) << 8); if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) capability |= (P2P_GRPCAP_GROUP_FORMATION<<8); capability = cpu_to_le16(capability); p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_CAPABILITY, 2, (u8*)&capability); // P2P Device ID ATTR p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_DEVICE_ID, ETH_ALEN, pwdinfo->device_addr); // Notice of Absence ATTR // Type: // Length: // Value: //go_add_noa_attr(pwdinfo); pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); return len; } #ifdef CONFIG_WFD u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) { u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; u16 val16=0; u32 len=0, wfdielen = 0; _adapter *padapter = pwdinfo->padapter; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; // WFD OUI wfdielen = 0; wfdie[ wfdielen++ ] = 0x50; wfdie[ wfdielen++ ] = 0x6F; wfdie[ wfdielen++ ] = 0x9A; wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 // Commented by Albert 20110812 // According to the WFD Specification, the beacon frame should contain 4 WFD attributes // 1. WFD Device Information // 2. Associated BSSID // 3. Coupled Sink Information // WFD Device Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value1: // WFD device information if ( P2P_ROLE_GO == pwdinfo->role ) { if ( is_any_client_associated( pwdinfo->padapter ) ) { // WFD primary sink + WiFi Direct mode + WSD (WFD Service Discovery) val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_WSD; RTW_PUT_BE16(wfdie + wfdielen, val16); } else { // WFD primary sink + available for WFD session + WiFi Direct mode + WSD (WFD Service Discovery) val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD; RTW_PUT_BE16(wfdie + wfdielen, val16); } } else { // WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD; RTW_PUT_BE16(wfdie + wfdielen, val16); } wfdielen += 2; // Value2: // Session Management Control Port // Default TCP port for RTSP messages is 554 RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); wfdielen += 2; // Value3: // WFD Device Maximum Throughput // 300Mbps is the maximum throughput RTW_PUT_BE16(wfdie + wfdielen, 300); wfdielen += 2; // Associated BSSID ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value: // Associated BSSID if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) { _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); } else { _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); } wfdielen += ETH_ALEN; // Coupled Sink Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0007); wfdielen += 2; // Value: // Coupled Sink Status bitmap // Not coupled/available for Coupling wfdie[ wfdielen++ ] = 0; // MAC Addr. wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); return len; } u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) { u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; u16 val16=0; u32 len=0, wfdielen = 0; _adapter *padapter = pwdinfo->padapter; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; // WFD OUI wfdielen = 0; wfdie[ wfdielen++ ] = 0x50; wfdie[ wfdielen++ ] = 0x6F; wfdie[ wfdielen++ ] = 0x9A; wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 // Commented by Albert 20110812 // According to the WFD Specification, the probe request frame should contain 4 WFD attributes // 1. WFD Device Information // 2. Associated BSSID // 3. Coupled Sink Information // WFD Device Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value1: // WFD device information if ( 1 == pwdinfo->wfd_tdls_enable ) { // WFD primary sink + available for WFD session + WiFi TDLS mode + WSC ( WFD Service Discovery ) val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD | WFD_DEVINFO_PC_TDLS; RTW_PUT_BE16(wfdie + wfdielen, val16 ); } else { // WFD primary sink + available for WFD session + WiFi Direct mode + WSC ( WFD Service Discovery ) val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD; RTW_PUT_BE16(wfdie + wfdielen, val16 ); } wfdielen += 2; // Value2: // Session Management Control Port // Default TCP port for RTSP messages is 554 RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); wfdielen += 2; // Value3: // WFD Device Maximum Throughput // 300Mbps is the maximum throughput RTW_PUT_BE16(wfdie + wfdielen, 300); wfdielen += 2; // Associated BSSID ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value: // Associated BSSID if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) { _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); } else { _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); } wfdielen += ETH_ALEN; // Coupled Sink Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0007); wfdielen += 2; // Value: // Coupled Sink Status bitmap // Not coupled/available for Coupling wfdie[ wfdielen++ ] = 0; // MAC Addr. wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); return len; } u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 tunneled) { u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; u32 len=0, wfdielen = 0; _adapter *padapter = pwdinfo->padapter; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; // WFD OUI wfdielen = 0; wfdie[ wfdielen++ ] = 0x50; wfdie[ wfdielen++ ] = 0x6F; wfdie[ wfdielen++ ] = 0x9A; wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 // Commented by Albert 20110812 // According to the WFD Specification, the probe response frame should contain 4 WFD attributes // 1. WFD Device Information // 2. Associated BSSID // 3. Coupled Sink Information // 4. WFD Session Information // WFD Device Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value1: // WFD device information // WFD primary sink + available for WFD session + WiFi Direct mode if ( _TRUE == pwdinfo->session_available ) { if ( P2P_ROLE_GO == pwdinfo->role ) { if ( is_any_client_associated( pwdinfo->padapter ) ) { if ( pwdinfo->wfd_tdls_enable ) { // TDLS mode + WSD ( WFD Service Discovery ) RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_HDCP_SUPPORT); } else { // WiFi Direct mode + WSD ( WFD Service Discovery ) RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_HDCP_SUPPORT); } } else { if ( pwdinfo->wfd_tdls_enable ) { // available for WFD session + TDLS mode + WSD ( WFD Service Discovery ) RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD | WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_HDCP_SUPPORT); } else { // available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD | WFD_DEVINFO_HDCP_SUPPORT); } } } else { if ( pwdinfo->wfd_tdls_enable ) { // available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD | WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_HDCP_SUPPORT); } else { // available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD | WFD_DEVINFO_HDCP_SUPPORT); } } } else { if ( pwdinfo->wfd_tdls_enable ) { RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_WSD |WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_HDCP_SUPPORT); } else { RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_HDCP_SUPPORT); } } wfdielen += 2; // Value2: // Session Management Control Port // Default TCP port for RTSP messages is 554 RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); wfdielen += 2; // Value3: // WFD Device Maximum Throughput // 300Mbps is the maximum throughput RTW_PUT_BE16(wfdie + wfdielen, 300); wfdielen += 2; // Associated BSSID ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value: // Associated BSSID if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) { _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); } else { _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); } wfdielen += ETH_ALEN; // Coupled Sink Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0007); wfdielen += 2; // Value: // Coupled Sink Status bitmap // Not coupled/available for Coupling wfdie[ wfdielen++ ] = 0; // MAC Addr. wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { // WFD Session Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_SESSION_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0000); wfdielen += 2; // Todo: to add the list of WFD device info descriptor in WFD group. } #ifdef CONFIG_CONCURRENT_MODE #ifdef CONFIG_TDLS if ( ( tunneled == 0 ) && ( padapter->pbuddy_adapter->wdinfo.wfd_tdls_enable == 1 ) ) { // Alternative MAC Address ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_ALTER_MAC; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, ETH_ALEN ); wfdielen += 2; // Value: // Alternative MAC Address _rtw_memcpy( wfdie + wfdielen, &padapter->pbuddy_adapter->eeprompriv.mac_addr[ 0 ], ETH_ALEN ); // This mac address is used to make the WFD session when TDLS is enable. wfdielen += ETH_ALEN; } #endif // CONFIG_TDLS #endif // CONFIG_CONCURRENT_MODE pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); return len; } u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) { u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; u16 val16=0; u32 len=0, wfdielen = 0; _adapter *padapter = NULL; struct mlme_priv *pmlmepriv = NULL; struct wifi_display_info *pwfd_info = NULL; // WFD OUI if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) { return 0; } padapter = pwdinfo->padapter; pmlmepriv = &padapter->mlmepriv; pwfd_info = padapter->wdinfo.wfd_info; wfdielen = 0; wfdie[ wfdielen++ ] = 0x50; wfdie[ wfdielen++ ] = 0x6F; wfdie[ wfdielen++ ] = 0x9A; wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 // Commented by Albert 20110812 // According to the WFD Specification, the probe request frame should contain 4 WFD attributes // 1. WFD Device Information // 2. Associated BSSID // 3. Coupled Sink Information // WFD Device Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value1: // WFD device information // WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD; RTW_PUT_BE16(wfdie + wfdielen, val16); wfdielen += 2; // Value2: // Session Management Control Port // Default TCP port for RTSP messages is 554 RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); wfdielen += 2; // Value3: // WFD Device Maximum Throughput // 300Mbps is the maximum throughput RTW_PUT_BE16(wfdie + wfdielen, 300); wfdielen += 2; // Associated BSSID ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value: // Associated BSSID if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) { _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); } else { _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); } wfdielen += ETH_ALEN; // Coupled Sink Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0007); wfdielen += 2; // Value: // Coupled Sink Status bitmap // Not coupled/available for Coupling wfdie[ wfdielen++ ] = 0; // MAC Addr. wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); return len; } u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) { u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; u32 len=0, wfdielen = 0; u16 val16=0; _adapter *padapter = pwdinfo->padapter; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; // WFD OUI wfdielen = 0; wfdie[ wfdielen++ ] = 0x50; wfdie[ wfdielen++ ] = 0x6F; wfdie[ wfdielen++ ] = 0x9A; wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 // Commented by Albert 20110812 // According to the WFD Specification, the probe request frame should contain 4 WFD attributes // 1. WFD Device Information // 2. Associated BSSID // 3. Coupled Sink Information // WFD Device Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value1: // WFD device information // WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD; RTW_PUT_BE16(wfdie + wfdielen, val16); wfdielen += 2; // Value2: // Session Management Control Port // Default TCP port for RTSP messages is 554 RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); wfdielen += 2; // Value3: // WFD Device Maximum Throughput // 300Mbps is the maximum throughput RTW_PUT_BE16(wfdie + wfdielen, 300); wfdielen += 2; // Associated BSSID ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value: // Associated BSSID if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) { _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); } else { _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); } wfdielen += ETH_ALEN; // Coupled Sink Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0007); wfdielen += 2; // Value: // Coupled Sink Status bitmap // Not coupled/available for Coupling wfdie[ wfdielen++ ] = 0; // MAC Addr. wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); return len; } u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) { u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; u32 len=0, wfdielen = 0; u16 val16=0; _adapter *padapter = pwdinfo->padapter; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; // WFD OUI wfdielen = 0; wfdie[ wfdielen++ ] = 0x50; wfdie[ wfdielen++ ] = 0x6F; wfdie[ wfdielen++ ] = 0x9A; wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 // Commented by Albert 20110825 // According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes // 1. WFD Device Information // 2. Associated BSSID ( Optional ) // 3. Local IP Adress ( Optional ) // WFD Device Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value1: // WFD device information // WFD primary sink + WiFi Direct mode + WSD ( WFD Service Discovery ) + WFD Session Available val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_SESSION_AVAIL; RTW_PUT_BE16(wfdie + wfdielen, val16); wfdielen += 2; // Value2: // Session Management Control Port // Default TCP port for RTSP messages is 554 RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); wfdielen += 2; // Value3: // WFD Device Maximum Throughput // 300Mbps is the maximum throughput RTW_PUT_BE16(wfdie + wfdielen, 300); wfdielen += 2; // Associated BSSID ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value: // Associated BSSID if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) { _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); } else { _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); } wfdielen += ETH_ALEN; // Coupled Sink Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0007); wfdielen += 2; // Value: // Coupled Sink Status bitmap // Not coupled/available for Coupling wfdie[ wfdielen++ ] = 0; // MAC Addr. wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); return len; } u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) { u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; u32 len=0, wfdielen = 0; u16 val16=0; _adapter *padapter = pwdinfo->padapter; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; // WFD OUI wfdielen = 0; wfdie[ wfdielen++ ] = 0x50; wfdie[ wfdielen++ ] = 0x6F; wfdie[ wfdielen++ ] = 0x9A; wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 // Commented by Albert 20110825 // According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes // 1. WFD Device Information // 2. Associated BSSID ( Optional ) // 3. Local IP Adress ( Optional ) // WFD Device Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value1: // WFD device information // WFD primary sink + WiFi Direct mode + WSD ( WFD Service Discovery ) + WFD Session Available val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_SESSION_AVAIL; RTW_PUT_BE16(wfdie + wfdielen, val16); wfdielen += 2; // Value2: // Session Management Control Port // Default TCP port for RTSP messages is 554 RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); wfdielen += 2; // Value3: // WFD Device Maximum Throughput // 300Mbps is the maximum throughput RTW_PUT_BE16(wfdie + wfdielen, 300); wfdielen += 2; // Associated BSSID ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value: // Associated BSSID if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) { _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); } else { _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); } wfdielen += ETH_ALEN; // Coupled Sink Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0007); wfdielen += 2; // Value: // Coupled Sink Status bitmap // Not coupled/available for Coupling wfdie[ wfdielen++ ] = 0; // MAC Addr. wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); return len; } u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) { u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; u32 len=0, wfdielen = 0; u16 val16=0; _adapter *padapter = pwdinfo->padapter; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; // WFD OUI wfdielen = 0; wfdie[ wfdielen++ ] = 0x50; wfdie[ wfdielen++ ] = 0x6F; wfdie[ wfdielen++ ] = 0x9A; wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 // Commented by Albert 20110825 // According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes // 1. WFD Device Information // 2. Associated BSSID ( Optional ) // 3. Local IP Adress ( Optional ) // WFD Device Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value1: // WFD device information // WFD primary sink + WiFi Direct mode + WSD ( WFD Service Discovery ) + WFD Session Available val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_SESSION_AVAIL; RTW_PUT_BE16(wfdie + wfdielen, val16); wfdielen += 2; // Value2: // Session Management Control Port // Default TCP port for RTSP messages is 554 RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); wfdielen += 2; // Value3: // WFD Device Maximum Throughput // 300Mbps is the maximum throughput RTW_PUT_BE16(wfdie + wfdielen, 300); wfdielen += 2; // Associated BSSID ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value: // Associated BSSID if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) { _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); } else { _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); } wfdielen += ETH_ALEN; // Coupled Sink Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0007); wfdielen += 2; // Value: // Coupled Sink Status bitmap // Not coupled/available for Coupling wfdie[ wfdielen++ ] = 0; // MAC Addr. wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); return len; } u32 build_invitation_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) { u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; u32 len=0, wfdielen = 0; u16 val16=0; _adapter *padapter = pwdinfo->padapter; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; // WFD OUI wfdielen = 0; wfdie[ wfdielen++ ] = 0x50; wfdie[ wfdielen++ ] = 0x6F; wfdie[ wfdielen++ ] = 0x9A; wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 // Commented by Albert 20110825 // According to the WFD Specification, the provision discovery request frame should contain 3 WFD attributes // 1. WFD Device Information // 2. Associated BSSID ( Optional ) // 3. Local IP Adress ( Optional ) // WFD Device Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value1: // WFD device information // WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD; RTW_PUT_BE16(wfdie + wfdielen, val16); wfdielen += 2; // Value2: // Session Management Control Port // Default TCP port for RTSP messages is 554 RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); wfdielen += 2; // Value3: // WFD Device Maximum Throughput // 300Mbps is the maximum throughput RTW_PUT_BE16(wfdie + wfdielen, 300); wfdielen += 2; // Associated BSSID ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value: // Associated BSSID if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) { _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); } else { _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); } wfdielen += ETH_ALEN; // Coupled Sink Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0007); wfdielen += 2; // Value: // Coupled Sink Status bitmap // Not coupled/available for Coupling wfdie[ wfdielen++ ] = 0; // MAC Addr. wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; if ( P2P_ROLE_GO == pwdinfo->role ) { // WFD Session Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_SESSION_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0000); wfdielen += 2; // Todo: to add the list of WFD device info descriptor in WFD group. } rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); return len; } u32 build_invitation_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) { u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; u16 val16=0; u32 len=0, wfdielen = 0; _adapter *padapter = pwdinfo->padapter; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; // WFD OUI wfdielen = 0; wfdie[ wfdielen++ ] = 0x50; wfdie[ wfdielen++ ] = 0x6F; wfdie[ wfdielen++ ] = 0x9A; wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 // Commented by Albert 20110825 // According to the WFD Specification, the provision discovery request frame should contain 3 WFD attributes // 1. WFD Device Information // 2. Associated BSSID ( Optional ) // 3. Local IP Adress ( Optional ) // WFD Device Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value1: // WFD device information // WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD; RTW_PUT_BE16(wfdie + wfdielen, val16); wfdielen += 2; // Value2: // Session Management Control Port // Default TCP port for RTSP messages is 554 RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); wfdielen += 2; // Value3: // WFD Device Maximum Throughput // 300Mbps is the maximum throughput RTW_PUT_BE16(wfdie + wfdielen, 300); wfdielen += 2; // Associated BSSID ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value: // Associated BSSID if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) { _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); } else { _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); } wfdielen += ETH_ALEN; // Coupled Sink Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0007); wfdielen += 2; // Value: // Coupled Sink Status bitmap // Not coupled/available for Coupling wfdie[ wfdielen++ ] = 0; // MAC Addr. wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; if ( P2P_ROLE_GO == pwdinfo->role ) { // WFD Session Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_SESSION_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0000); wfdielen += 2; // Todo: to add the list of WFD device info descriptor in WFD group. } rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); return len; } u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) { u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; u32 len=0, wfdielen = 0; u16 val16=0; _adapter *padapter = pwdinfo->padapter; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; // WFD OUI wfdielen = 0; wfdie[ wfdielen++ ] = 0x50; wfdie[ wfdielen++ ] = 0x6F; wfdie[ wfdielen++ ] = 0x9A; wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 // Commented by Albert 20110825 // According to the WFD Specification, the provision discovery request frame should contain 3 WFD attributes // 1. WFD Device Information // 2. Associated BSSID ( Optional ) // 3. Local IP Adress ( Optional ) // WFD Device Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value1: // WFD device information // WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD; RTW_PUT_BE16(wfdie + wfdielen, val16); wfdielen += 2; // Value2: // Session Management Control Port // Default TCP port for RTSP messages is 554 RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); wfdielen += 2; // Value3: // WFD Device Maximum Throughput // 300Mbps is the maximum throughput RTW_PUT_BE16(wfdie + wfdielen, 300); wfdielen += 2; // Associated BSSID ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value: // Associated BSSID if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) { _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); } else { _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); } wfdielen += ETH_ALEN; // Coupled Sink Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0007); wfdielen += 2; // Value: // Coupled Sink Status bitmap // Not coupled/available for Coupling wfdie[ wfdielen++ ] = 0; // MAC Addr. wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); return len; } u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) { u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; u32 len=0, wfdielen = 0; u16 val16=0; _adapter *padapter = pwdinfo->padapter; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; // WFD OUI wfdielen = 0; wfdie[ wfdielen++ ] = 0x50; wfdie[ wfdielen++ ] = 0x6F; wfdie[ wfdielen++ ] = 0x9A; wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 // Commented by Albert 20110825 // According to the WFD Specification, the provision discovery response frame should contain 3 WFD attributes // 1. WFD Device Information // 2. Associated BSSID ( Optional ) // 3. Local IP Adress ( Optional ) // WFD Device Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value1: // WFD device information // WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD; RTW_PUT_BE16(wfdie + wfdielen, val16); wfdielen += 2; // Value2: // Session Management Control Port // Default TCP port for RTSP messages is 554 RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); wfdielen += 2; // Value3: // WFD Device Maximum Throughput // 300Mbps is the maximum throughput RTW_PUT_BE16(wfdie + wfdielen, 300); wfdielen += 2; // Associated BSSID ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value: // Associated BSSID if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) { _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); } else { _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); } wfdielen += ETH_ALEN; // Coupled Sink Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0007); wfdielen += 2; // Value: // Coupled Sink Status bitmap // Not coupled/available for Coupling wfdie[ wfdielen++ ] = 0; // MAC Addr. wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; wfdie[ wfdielen++ ] = 0; rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); return len; } #endif //CONFIG_WFD u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) { u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; u32 len=0, p2pielen = 0; #ifdef CONFIG_INTEL_WIDI struct mlme_priv *pmlmepriv = &(pwdinfo->padapter->mlmepriv); u8 zero_array_check[L2SDTA_SERVICE_VE_LEN] = { 0x00 }; u8 widi_version = 0, i = 0; if( _rtw_memcmp( pmlmepriv->sa_ext, zero_array_check, L2SDTA_SERVICE_VE_LEN ) == _FALSE ) { widi_version = 35; } else if( pmlmepriv->num_p2p_sdt != 0 ) { widi_version = 40; } #endif //CONFIG_INTEL_WIDI // P2P OUI p2pielen = 0; p2pie[ p2pielen++ ] = 0x50; p2pie[ p2pielen++ ] = 0x6F; p2pie[ p2pielen++ ] = 0x9A; p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 // Commented by Albert 20100907 // According to the P2P Specification, the probe response frame should contain 5 P2P attributes // 1. P2P Capability // 2. Extended Listen Timing // 3. Notice of Absence ( NOA ) ( Only GO needs this ) // 4. Device Info // 5. Group Info ( Only GO need this ) // P2P Capability ATTR // Type: p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; // Length: //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); RTW_PUT_LE16(p2pie + p2pielen, 0x0002); p2pielen += 2; // Value: // Device Capability Bitmap, 1 byte p2pie[ p2pielen++ ] = DMP_P2P_DEVCAP_SUPPORT; // Group Capability Bitmap, 1 byte if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { p2pie[ p2pielen ] = (P2P_GRPCAP_GO | P2P_GRPCAP_INTRABSS); if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) p2pie[ p2pielen ] |= P2P_GRPCAP_GROUP_FORMATION; p2pielen++; } else if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) ) { // Group Capability Bitmap, 1 byte if ( pwdinfo->persistent_supported ) p2pie[ p2pielen++ ] = P2P_GRPCAP_PERSISTENT_GROUP | DMP_P2P_GRPCAP_SUPPORT; else p2pie[ p2pielen++ ] = DMP_P2P_GRPCAP_SUPPORT; } // Extended Listen Timing ATTR // Type: p2pie[ p2pielen++ ] = P2P_ATTR_EX_LISTEN_TIMING; // Length: //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 ); RTW_PUT_LE16(p2pie + p2pielen, 0x0004); p2pielen += 2; // Value: // Availability Period //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); RTW_PUT_LE16(p2pie + p2pielen, 0xFFFF); p2pielen += 2; // Availability Interval //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); RTW_PUT_LE16(p2pie + p2pielen, 0xFFFF); p2pielen += 2; // Notice of Absence ATTR // Type: // Length: // Value: if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { //go_add_noa_attr(pwdinfo); } // Device Info ATTR // Type: p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; // Length: // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); #ifdef CONFIG_INTEL_WIDI if( widi_version == 35 ) { RTW_PUT_LE16(p2pie + p2pielen, 21 + 8 + pwdinfo->device_name_len); } else if( widi_version == 40 ) { RTW_PUT_LE16(p2pie + p2pielen, 21 + 8 * pmlmepriv->num_p2p_sdt + pwdinfo->device_name_len); } else #endif //CONFIG_INTEL_WIDI RTW_PUT_LE16(p2pie + p2pielen, 21 + pwdinfo->device_name_len); p2pielen += 2; // Value: // P2P Device Address _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN ); p2pielen += ETH_ALEN; // Config Method // This field should be big endian. Noted by P2P specification. //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->supported_wps_cm ); RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->supported_wps_cm); p2pielen += 2; #ifdef CONFIG_INTEL_WIDI if( widi_version == 40 ) { // Primary Device Type // Category ID //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); RTW_PUT_BE16(p2pie + p2pielen, pmlmepriv->p2p_pdt_cid ); p2pielen += 2; // OUI //*(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); RTW_PUT_BE32(p2pie + p2pielen, WPSOUI); p2pielen += 4; // Sub Category ID //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); RTW_PUT_BE16(p2pie + p2pielen, pmlmepriv->p2p_pdt_scid); p2pielen += 2; } else #endif //CONFIG_INTEL_WIDI { // Primary Device Type // Category ID //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_CID_MULIT_MEDIA); p2pielen += 2; // OUI //*(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); RTW_PUT_BE32(p2pie + p2pielen, WPSOUI); p2pielen += 4; // Sub Category ID //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_SCID_MEDIA_SERVER); p2pielen += 2; } // Number of Secondary Device Types #ifdef CONFIG_INTEL_WIDI if( widi_version == 35 ) { p2pie[ p2pielen++ ] = 0x01; RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_CID_DISPLAYS); p2pielen += 2; RTW_PUT_BE32(p2pie + p2pielen, INTEL_DEV_TYPE_OUI); p2pielen += 4; RTW_PUT_BE16(p2pie + p2pielen, P2P_SCID_WIDI_CONSUMER_SINK); p2pielen += 2; } else if( widi_version == 40 ) { p2pie[ p2pielen++ ] = pmlmepriv->num_p2p_sdt; for( ; i < pmlmepriv->num_p2p_sdt; i++ ) { RTW_PUT_BE16(p2pie + p2pielen, pmlmepriv->p2p_sdt_cid[i]); p2pielen += 2; RTW_PUT_BE32(p2pie + p2pielen, INTEL_DEV_TYPE_OUI); p2pielen += 4; RTW_PUT_BE16(p2pie + p2pielen, pmlmepriv->p2p_sdt_scid[i]); p2pielen += 2; } } else #endif //CONFIG_INTEL_WIDI p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List // Device Name // Type: //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); RTW_PUT_BE16(p2pie + p2pielen, WPS_ATTR_DEVICE_NAME); p2pielen += 2; // Length: //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->device_name_len); p2pielen += 2; // Value: _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len ); p2pielen += pwdinfo->device_name_len; // Group Info ATTR // Type: // Length: // Value: if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { p2pielen += go_add_group_info_attr(pwdinfo, p2pie + p2pielen); } pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); return len; } u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8* pssid, u8 ussidlen, u8* pdev_raddr ) { u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; u32 len=0, p2pielen = 0; // P2P OUI p2pielen = 0; p2pie[ p2pielen++ ] = 0x50; p2pie[ p2pielen++ ] = 0x6F; p2pie[ p2pielen++ ] = 0x9A; p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 // Commented by Albert 20110301 // According to the P2P Specification, the provision discovery request frame should contain 3 P2P attributes // 1. P2P Capability // 2. Device Info // 3. Group ID ( When joining an operating P2P Group ) // P2P Capability ATTR // Type: p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; // Length: //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); RTW_PUT_LE16(p2pie + p2pielen, 0x0002); p2pielen += 2; // Value: // Device Capability Bitmap, 1 byte p2pie[ p2pielen++ ] = DMP_P2P_DEVCAP_SUPPORT; // Group Capability Bitmap, 1 byte if ( pwdinfo->persistent_supported ) p2pie[ p2pielen++ ] = P2P_GRPCAP_PERSISTENT_GROUP | DMP_P2P_GRPCAP_SUPPORT; else p2pie[ p2pielen++ ] = DMP_P2P_GRPCAP_SUPPORT; // Device Info ATTR // Type: p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; // Length: // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); RTW_PUT_LE16(p2pie + p2pielen, 21 + pwdinfo->device_name_len); p2pielen += 2; // Value: // P2P Device Address _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN ); p2pielen += ETH_ALEN; // Config Method // This field should be big endian. Noted by P2P specification. if ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PBC ) { //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_PBC ); RTW_PUT_BE16(p2pie + p2pielen, WPS_CONFIG_METHOD_PBC); } else { //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_DISPLAY ); RTW_PUT_BE16(p2pie + p2pielen, WPS_CONFIG_METHOD_DISPLAY); } p2pielen += 2; // Primary Device Type // Category ID //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_CID_MULIT_MEDIA); p2pielen += 2; // OUI //*(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); RTW_PUT_BE32(p2pie + p2pielen, WPSOUI); p2pielen += 4; // Sub Category ID //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_SCID_MEDIA_SERVER); p2pielen += 2; // Number of Secondary Device Types p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List // Device Name // Type: //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); RTW_PUT_BE16(p2pie + p2pielen, WPS_ATTR_DEVICE_NAME); p2pielen += 2; // Length: //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->device_name_len); p2pielen += 2; // Value: _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len ); p2pielen += pwdinfo->device_name_len; if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) ) { // Added by Albert 2011/05/19 // In this case, the pdev_raddr is the device address of the group owner. // P2P Group ID ATTR // Type: p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID; // Length: //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN + ussidlen ); RTW_PUT_LE16(p2pie + p2pielen, ETH_ALEN + ussidlen); p2pielen += 2; // Value: _rtw_memcpy( p2pie + p2pielen, pdev_raddr, ETH_ALEN ); p2pielen += ETH_ALEN; _rtw_memcpy( p2pie + p2pielen, pssid, ussidlen ); p2pielen += ussidlen; } pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); return len; } u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status_code) { u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; u32 len=0, p2pielen = 0; // P2P OUI p2pielen = 0; p2pie[ p2pielen++ ] = 0x50; p2pie[ p2pielen++ ] = 0x6F; p2pie[ p2pielen++ ] = 0x9A; p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 // According to the P2P Specification, the Association response frame should contain 2 P2P attributes // 1. Status // 2. Extended Listen Timing (optional) // Status ATTR p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status_code); // Extended Listen Timing ATTR // Type: // Length: // Value: pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); return len; } u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) { u32 len=0; return len; } u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) { u8 *p; u32 ret=_FALSE; u8 *p2pie; u32 p2pielen = 0; int ssid_len=0, rate_cnt = 0; p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SUPPORTEDRATES_IE_, (int *)&rate_cnt, len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); if ( rate_cnt <= 4 ) { int i, g_rate =0; for( i = 0; i < rate_cnt; i++ ) { if ( ( ( *( p + 2 + i ) & 0xff ) != 0x02 ) && ( ( *( p + 2 + i ) & 0xff ) != 0x04 ) && ( ( *( p + 2 + i ) & 0xff ) != 0x0B ) && ( ( *( p + 2 + i ) & 0xff ) != 0x16 ) ) { g_rate = 1; } } if ( g_rate == 0 ) { // There is no OFDM rate included in SupportedRates IE of this probe request frame // The driver should response this probe request. return ret; } } else { // rate_cnt > 4 means the SupportRates IE contains the OFDM rate because the count of CCK rates are 4. // We should proceed the following check for this probe request. } // Added comments by Albert 20100906 // There are several items we should check here. // 1. This probe request frame must contain the P2P IE. (Done) // 2. This probe request frame must contain the wildcard SSID. (Done) // 3. Wildcard BSSID. (Todo) // 4. Destination Address. ( Done in mgt_dispatcher function ) // 5. Requested Device Type in WSC IE. (Todo) // 6. Device ID attribute in P2P IE. (Todo) p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SSID_IE_, (int *)&ssid_len, len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); ssid_len &= 0xff; // Just last 1 byte is valid for ssid len of the probe request if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) || rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { if((p2pie=rtw_get_p2p_ie( pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_ , len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_ , NULL, &p2pielen))) { if ( (p != NULL) && _rtw_memcmp( ( void * ) ( p+2 ), ( void * ) pwdinfo->p2p_wildcard_ssid , 7 )) { //todo: //Check Requested Device Type attributes in WSC IE. //Check Device ID attribute in P2P IE ret = _TRUE; } else if ( (p != NULL) && ( ssid_len == 0 ) ) { ret = _TRUE; } } else { //non -p2p device } } return ret; } u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len, struct sta_info *psta) { u8 status_code = P2P_STATUS_SUCCESS; u8 *pbuf, *pattr_content=NULL; u32 attr_contentlen = 0; u16 cap_attr=0; unsigned short frame_type, ie_offset=0; u8 * ies; u32 ies_len; u8 * p2p_ie; u32 p2p_ielen = 0; if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) return P2P_STATUS_FAIL_REQUEST_UNABLE; frame_type = GetFrameSubType(pframe); if (frame_type == WIFI_ASSOCREQ) { ie_offset = _ASOCREQ_IE_OFFSET_; } else // WIFI_REASSOCREQ { ie_offset = _REASOCREQ_IE_OFFSET_; } ies = pframe + WLAN_HDR_A3_LEN + ie_offset; ies_len = len - WLAN_HDR_A3_LEN - ie_offset; p2p_ie = rtw_get_p2p_ie(ies , ies_len , NULL, &p2p_ielen); if ( !p2p_ie ) { DBG_8192C( "[%s] P2P IE not Found!!\n", __FUNCTION__ ); status_code = P2P_STATUS_FAIL_INVALID_PARAM; } else { DBG_8192C( "[%s] P2P IE Found!!\n", __FUNCTION__ ); } while ( p2p_ie ) { //Check P2P Capability ATTR if( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*) &attr_contentlen) ) { DBG_8192C( "[%s] Got P2P Capability Attr!!\n", __FUNCTION__ ); cap_attr = le16_to_cpu(cap_attr); psta->dev_cap = cap_attr&0xff; } //Check Extended Listen Timing ATTR //Check P2P Device Info ATTR if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, NULL, (uint*)&attr_contentlen)) { DBG_8192C( "[%s] Got P2P DEVICE INFO Attr!!\n", __FUNCTION__ ); pattr_content = pbuf = rtw_zmalloc(attr_contentlen); if(pattr_content) { u8 num_of_secdev_type; u16 dev_name_len; rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO , pattr_content, (uint*)&attr_contentlen); _rtw_memcpy(psta->dev_addr, pattr_content, ETH_ALEN);//P2P Device Address pattr_content += ETH_ALEN; _rtw_memcpy(&psta->config_methods, pattr_content, 2);//Config Methods psta->config_methods = be16_to_cpu(psta->config_methods); pattr_content += 2; _rtw_memcpy(psta->primary_dev_type, pattr_content, 8); pattr_content += 8; num_of_secdev_type = *pattr_content; pattr_content += 1; if(num_of_secdev_type==0) { psta->num_of_secdev_type = 0; } else { u32 len; psta->num_of_secdev_type = num_of_secdev_type; len = (sizeof(psta->secdev_types_list)<(num_of_secdev_type*8)) ? (sizeof(psta->secdev_types_list)) : (num_of_secdev_type*8); _rtw_memcpy(psta->secdev_types_list, pattr_content, len); pattr_content += (num_of_secdev_type*8); } //dev_name_len = attr_contentlen - ETH_ALEN - 2 - 8 - 1 - (num_of_secdev_type*8); psta->dev_name_len=0; if(WPS_ATTR_DEVICE_NAME == be16_to_cpu(*(u16*)pattr_content)) { dev_name_len = be16_to_cpu(*(u16*)(pattr_content+2)); psta->dev_name_len = (sizeof(psta->dev_name)dev_name):dev_name_len; _rtw_memcpy(psta->dev_name, pattr_content+4, psta->dev_name_len); } rtw_mfree(pbuf, attr_contentlen); } } //Get the next P2P IE p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); } return status_code; } u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) { u8 *frame_body; u8 status, dialogToken; struct sta_info *psta = NULL; _adapter *padapter = pwdinfo->padapter; struct sta_priv *pstapriv = &padapter->stapriv; u8 *p2p_ie; u32 p2p_ielen = 0; frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); dialogToken = frame_body[7]; status = P2P_STATUS_FAIL_UNKNOWN_P2PGROUP; if ( (p2p_ie=rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen)) ) { u8 groupid[ 38 ] = { 0x00 }; u8 dev_addr[ETH_ALEN] = { 0x00 }; u32 attr_contentlen = 0; if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen)) { if(_rtw_memcmp(pwdinfo->device_addr, groupid, ETH_ALEN) && _rtw_memcmp(pwdinfo->p2p_group_ssid, groupid+ETH_ALEN, pwdinfo->p2p_group_ssid_len)) { attr_contentlen=0; if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_ID, dev_addr, &attr_contentlen)) { _irqL irqL; _list *phead, *plist; _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); phead = &pstapriv->asoc_list; plist = get_next(phead); //look up sta asoc_queue while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); plist = get_next(plist); if(psta->is_p2p_device && (psta->dev_cap&P2P_DEVCAP_CLIENT_DISCOVERABILITY) && _rtw_memcmp(psta->dev_addr, dev_addr, ETH_ALEN)) { //_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); //issue GO Discoverability Request issue_group_disc_req(pwdinfo, psta->hwaddr); //_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); status = P2P_STATUS_SUCCESS; break; } else { status = P2P_STATUS_FAIL_INFO_UNAVAILABLE; } } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); } else { status = P2P_STATUS_FAIL_INVALID_PARAM; } } else { status = P2P_STATUS_FAIL_INVALID_PARAM; } } } //issue Device Discoverability Response issue_p2p_devdisc_resp(pwdinfo, GetAddr2Ptr(pframe), status, dialogToken); return (status==P2P_STATUS_SUCCESS) ? _TRUE:_FALSE; } u32 process_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) { return _TRUE; } u8 process_p2p_provdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) { u8 *frame_body; u8 *wpsie; uint wps_ielen = 0, attr_contentlen = 0; u16 uconfig_method = 0; frame_body = (pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); if ( (wpsie=rtw_get_wps_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &wps_ielen)) ) { if ( rtw_get_wps_attr_content( wpsie, wps_ielen, WPS_ATTR_CONF_METHOD , ( u8* ) &uconfig_method, &attr_contentlen) ) { uconfig_method = be16_to_cpu( uconfig_method ); switch( uconfig_method ) { case WPS_CM_DISPLYA: { _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "dis", 3 ); break; } case WPS_CM_LABEL: { _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "lab", 3 ); break; } case WPS_CM_PUSH_BUTTON: { _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3 ); break; } case WPS_CM_KEYPAD: { _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pad", 3 ); break; } } issue_p2p_provision_resp( pwdinfo, GetAddr2Ptr(pframe), frame_body, uconfig_method); } } DBG_871X( "[%s] config method = %s\n", __FUNCTION__, pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req ); return _TRUE; } u8 process_p2p_provdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe) { return _TRUE; } u8 rtw_p2p_get_peer_ch_list(struct wifidirect_info *pwdinfo, u8 *ch_content, u8 ch_cnt, u8 *peer_ch_list) { u8 i = 0, j = 0; u8 temp = 0; u8 ch_no = 0; ch_content += 3; ch_cnt -= 3; while( ch_cnt > 0) { ch_content += 1; ch_cnt -= 1; temp = *ch_content; for( i = 0 ; i < temp ; i++, j++ ) { peer_ch_list[j] = *( ch_content + 1 + i ); } ch_content += (temp + 1); ch_cnt -= (temp + 1); ch_no += temp ; } return ch_no; } u8 rtw_p2p_check_peer_oper_ch(struct mlme_ext_priv *pmlmeext, u8 ch) { u8 i = 0; for( i = 0; i < pmlmeext->max_chan_nums; i++ ) { if ( pmlmeext->channel_set[ i ].ChannelNum == ch ) { return _SUCCESS; } } return _FAIL; } u8 rtw_p2p_ch_inclusion(struct mlme_ext_priv *pmlmeext, u8 *peer_ch_list, u8 peer_ch_num, u8 *ch_list_inclusioned) { int i = 0, j = 0, temp = 0; u8 ch_no = 0; for( i = 0; i < peer_ch_num; i++ ) { for( j = temp; j < pmlmeext->max_chan_nums; j++ ) { if( *( peer_ch_list + i ) == pmlmeext->channel_set[ j ].ChannelNum ) { ch_list_inclusioned[ ch_no++ ] = *( peer_ch_list + i ); temp = j; break; } } } return ch_no; } u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) { _adapter *padapter = pwdinfo->padapter; u8 result = P2P_STATUS_SUCCESS; u32 p2p_ielen = 0, wps_ielen = 0; u8 * ies; u32 ies_len; u8 *p2p_ie; u8 *wpsie; u16 wps_devicepassword_id = 0x0000; uint wps_devicepassword_id_len = 0; #ifdef CONFIG_WFD u8 wfd_ie[ 128 ] = { 0x00 }; u32 wfd_ielen = 0; #ifdef CONFIG_TDLS struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; #endif // CONFIG_TDLS #endif // CONFIG_WFD #ifdef CONFIG_CONCURRENT_MODE _adapter *pbuddy_adapter = pwdinfo->padapter->pbuddy_adapter; struct wifidirect_info *pbuddy_wdinfo = &pbuddy_adapter->wdinfo; struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; #endif if ( (wpsie=rtw_get_wps_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &wps_ielen)) ) { // Commented by Kurt 20120113 // If some device wants to do p2p handshake without sending prov_disc_req // We have to get peer_req_cm from here. if(_rtw_memcmp( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "000", 3) ) { rtw_get_wps_attr_content( wpsie, wps_ielen, WPS_ATTR_DEVICE_PWID, (u8*) &wps_devicepassword_id, &wps_devicepassword_id_len); wps_devicepassword_id = be16_to_cpu( wps_devicepassword_id ); if ( wps_devicepassword_id == WPS_DPID_USER_SPEC ) { _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "dis", 3 ); } else if ( wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC ) { _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pad", 3 ); } else { _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3 ); } } } else { DBG_871X( "[%s] WPS IE not Found!!\n", __FUNCTION__ ); result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); return( result ); } if ( pwdinfo->ui_got_wps_info == P2P_NO_WPSINFO ) { result = P2P_STATUS_FAIL_INFO_UNAVAILABLE; rtw_p2p_set_state(pwdinfo, P2P_STATE_TX_INFOR_NOREADY); return( result ); } ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); if ( !p2p_ie ) { DBG_871X( "[%s] P2P IE not Found!!\n", __FUNCTION__ ); result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); } while ( p2p_ie ) { u8 attr_content = 0x00; u32 attr_contentlen = 0; u8 ch_content[100] = { 0x00 }; uint ch_cnt = 0; u8 peer_ch_list[100] = { 0x00 }; u8 peer_ch_num = 0; u8 ch_list_inclusioned[100] = { 0x00 }; u8 ch_num_inclusioned = 0; u16 cap_attr; rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_ING); //Check P2P Capability ATTR if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*)&attr_contentlen) ) { cap_attr = le16_to_cpu(cap_attr); #if defined(CONFIG_WFD) && defined(CONFIG_TDLS) if(!(cap_attr & P2P_GRPCAP_INTRABSS) ) ptdlsinfo->ap_prohibited = _TRUE; #endif //defined(CONFIG_WFD) && defined(CONFIG_TDLS) } if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT , &attr_content, &attr_contentlen) ) { DBG_871X( "[%s] GO Intent = %d, tie = %d\n", __FUNCTION__, attr_content >> 1, attr_content & 0x01 ); pwdinfo->peer_intent = attr_content; // include both intent and tie breaker values. if ( pwdinfo->intent == ( pwdinfo->peer_intent >> 1 ) ) { // Try to match the tie breaker value if ( pwdinfo->intent == P2P_MAX_INTENT ) { rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); result = P2P_STATUS_FAIL_BOTH_GOINTENT_15; } else { if ( attr_content & 0x01 ) { rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); } else { rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); } } } else if ( pwdinfo->intent > ( pwdinfo->peer_intent >> 1 ) ) { rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); } else { rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); } if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { // Store the group id information. _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, pwdinfo->device_addr, ETH_ALEN ); _rtw_memcpy( pwdinfo->groupid_info.ssid, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen ); } } attr_contentlen = 0; if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_INTENTED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen ) ) { if ( attr_contentlen != ETH_ALEN ) { _rtw_memset( pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN ); } } if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, ch_content, &ch_cnt) ) { peer_ch_num = rtw_p2p_get_peer_ch_list(pwdinfo, ch_content, ch_cnt, peer_ch_list); ch_num_inclusioned = rtw_p2p_ch_inclusion(&padapter->mlmeextpriv, peer_ch_list, peer_ch_num, ch_list_inclusioned); if( ch_num_inclusioned == 0) { DBG_871X( "[%s] No common channel in channel list!\n", __FUNCTION__ ); result = P2P_STATUS_FAIL_NO_COMMON_CH; rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); break; } if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { if ( !rtw_p2p_is_channel_list_ok( pwdinfo->operating_channel, ch_list_inclusioned, ch_num_inclusioned) ) { #ifdef CONFIG_CONCURRENT_MODE if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) { DBG_871X( "[%s] desired channel NOT Found!\n", __FUNCTION__ ); result = P2P_STATUS_FAIL_NO_COMMON_CH; rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); break; } else #endif //CONFIG_CONCURRENT_MODE { u8 operatingch_info[5] = { 0x00 }, peer_operating_ch = 0; attr_contentlen = 0; if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen) ) { peer_operating_ch = operatingch_info[4]; } if ( rtw_p2p_is_channel_list_ok( peer_operating_ch, ch_list_inclusioned, ch_num_inclusioned) ) { /** * Change our operating channel as peer's for compatibility. */ pwdinfo->operating_channel = peer_operating_ch; DBG_871X( "[%s] Change op ch to %02x as peer's\n", __FUNCTION__, pwdinfo->operating_channel); } else { // Take first channel of ch_list_inclusioned as operating channel pwdinfo->operating_channel = ch_list_inclusioned[0]; DBG_871X( "[%s] Change op ch to %02x\n", __FUNCTION__, pwdinfo->operating_channel); } } } } } //Get the next P2P IE p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); } #ifdef CONFIG_WFD // Added by Albert 20110823 // Try to get the TCP port information when receiving the negotiation request. if ( rtw_get_wfd_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wfd_ie, &wfd_ielen ) ) { u8 attr_content[ 10 ] = { 0x00 }; u32 attr_contentlen = 0; DBG_871X( "[%s] WFD IE Found!!\n", __FUNCTION__ ); rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); if ( attr_contentlen ) { pwdinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); DBG_871X( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info->peer_rtsp_ctrlport ); } } #endif // CONFIG_WFD return( result ); } u8 process_p2p_group_negotation_resp( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) { _adapter *padapter = pwdinfo->padapter; u8 result = P2P_STATUS_SUCCESS; u32 p2p_ielen, wps_ielen; u8 * ies; u32 ies_len; u8 * p2p_ie; #ifdef CONFIG_WFD u8 wfd_ie[ 128 ] = { 0x00 }; u32 wfd_ielen = 0; #ifdef CONFIG_TDLS struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; #endif // CONFIG_TDLS #endif // CONFIG_WFD ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; // Be able to know which one is the P2P GO and which one is P2P client. if ( rtw_get_wps_ie( ies, ies_len, NULL, &wps_ielen) ) { } else { DBG_871X( "[%s] WPS IE not Found!!\n", __FUNCTION__ ); result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); } p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); if ( !p2p_ie ) { rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; } else { u8 attr_content = 0x00; u32 attr_contentlen = 0; u8 operatingch_info[5] = { 0x00 }; uint ch_cnt = 0; u8 ch_content[100] = { 0x00 }; u8 groupid[ 38 ]; u16 cap_attr; u8 peer_ch_list[100] = { 0x00 }; u8 peer_ch_num = 0; u8 ch_list_inclusioned[100] = { 0x00 }; u8 ch_num_inclusioned = 0; while ( p2p_ie ) // Found the P2P IE. { //Check P2P Capability ATTR if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*)&attr_contentlen) ) { cap_attr = le16_to_cpu(cap_attr); #ifdef CONFIG_TDLS if(!(cap_attr & P2P_GRPCAP_INTRABSS) ) ptdlsinfo->ap_prohibited = _TRUE; #endif // CONFIG_TDLS } rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen); if ( attr_contentlen == 1 ) { DBG_871X( "[%s] Status = %d\n", __FUNCTION__, attr_content ); if ( attr_content == P2P_STATUS_SUCCESS ) { // Do nothing. } else { if ( P2P_STATUS_FAIL_INFO_UNAVAILABLE == attr_content ) { rtw_p2p_set_state(pwdinfo, P2P_STATE_RX_INFOR_NOREADY); } else { rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); } rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); result = attr_content; break; } } // Try to get the peer's interface address attr_contentlen = 0; if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_INTENTED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen ) ) { if ( attr_contentlen != ETH_ALEN ) { _rtw_memset( pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN ); } } // Try to get the peer's intent and tie breaker value. attr_content = 0x00; attr_contentlen = 0; if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT , &attr_content, &attr_contentlen) ) { DBG_871X( "[%s] GO Intent = %d, tie = %d\n", __FUNCTION__, attr_content >> 1, attr_content & 0x01 ); pwdinfo->peer_intent = attr_content; // include both intent and tie breaker values. if ( pwdinfo->intent == ( pwdinfo->peer_intent >> 1 ) ) { // Try to match the tie breaker value if ( pwdinfo->intent == P2P_MAX_INTENT ) { rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); result = P2P_STATUS_FAIL_BOTH_GOINTENT_15; rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); } else { rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_GONEGO_OK); if ( attr_content & 0x01 ) { rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); } else { rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); } } } else if ( pwdinfo->intent > ( pwdinfo->peer_intent >> 1 ) ) { rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_GONEGO_OK); rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); } else { rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_GONEGO_OK); rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); } if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { // Store the group id information. _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, pwdinfo->device_addr, ETH_ALEN ); _rtw_memcpy( pwdinfo->groupid_info.ssid, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen ); } } // Try to get the operation channel information attr_contentlen = 0; if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen)) { DBG_871X( "[%s] Peer's operating channel = %d\n", __FUNCTION__, operatingch_info[4] ); pwdinfo->peer_operating_ch = operatingch_info[4]; } // Try to get the channel list information if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, pwdinfo->channel_list_attr, &pwdinfo->channel_list_attr_len ) ) { DBG_871X( "[%s] channel list attribute found, len = %d\n", __FUNCTION__, pwdinfo->channel_list_attr_len ); peer_ch_num = rtw_p2p_get_peer_ch_list(pwdinfo, pwdinfo->channel_list_attr, pwdinfo->channel_list_attr_len, peer_ch_list); ch_num_inclusioned = rtw_p2p_ch_inclusion(&padapter->mlmeextpriv, peer_ch_list, peer_ch_num, ch_list_inclusioned); if( ch_num_inclusioned == 0) { DBG_871X( "[%s] No common channel in channel list!\n", __FUNCTION__ ); result = P2P_STATUS_FAIL_NO_COMMON_CH; rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); break; } if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { if ( !rtw_p2p_is_channel_list_ok( pwdinfo->operating_channel, ch_list_inclusioned, ch_num_inclusioned) ) { #ifdef CONFIG_CONCURRENT_MODE if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) { DBG_871X( "[%s] desired channel NOT Found!\n", __FUNCTION__ ); result = P2P_STATUS_FAIL_NO_COMMON_CH; rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); break; } else #endif //CONFIG_CONCURRENT_MODE { u8 operatingch_info[5] = { 0x00 }, peer_operating_ch = 0; attr_contentlen = 0; if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen) ) { peer_operating_ch = operatingch_info[4]; } if ( rtw_p2p_is_channel_list_ok( peer_operating_ch, ch_list_inclusioned, ch_num_inclusioned) ) { /** * Change our operating channel as peer's for compatibility. */ pwdinfo->operating_channel = peer_operating_ch; DBG_871X( "[%s] Change op ch to %02x as peer's\n", __FUNCTION__, pwdinfo->operating_channel); } else { // Take first channel of ch_list_inclusioned as operating channel pwdinfo->operating_channel = ch_list_inclusioned[0]; DBG_871X( "[%s] Change op ch to %02x\n", __FUNCTION__, pwdinfo->operating_channel); } } } } } else { DBG_871X( "[%s] channel list attribute not found!\n", __FUNCTION__); } // Try to get the group id information if peer is GO attr_contentlen = 0; _rtw_memset( groupid, 0x00, 38 ); if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen) ) { _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, &groupid[0], ETH_ALEN ); _rtw_memcpy( pwdinfo->groupid_info.ssid, &groupid[6], attr_contentlen - ETH_ALEN ); } //Get the next P2P IE p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); } } #ifdef CONFIG_WFD // Added by Albert 20111122 // Try to get the TCP port information when receiving the negotiation response. if ( rtw_get_wfd_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wfd_ie, &wfd_ielen ) ) { u8 attr_content[ 10 ] = { 0x00 }; u32 attr_contentlen = 0; DBG_8192C( "[%s] WFD IE Found!!\n", __FUNCTION__ ); rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); if ( attr_contentlen ) { pwdinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info->peer_rtsp_ctrlport ); } } #endif // CONFIG_WFD return( result ); } u8 process_p2p_group_negotation_confirm( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) { u8 * ies; u32 ies_len; u8 * p2p_ie; u32 p2p_ielen = 0; u8 result = P2P_STATUS_SUCCESS; ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); while ( p2p_ie ) // Found the P2P IE. { u8 attr_content = 0x00, operatingch_info[5] = { 0x00 }; u8 groupid[ 38 ] = { 0x00 }; u32 attr_contentlen = 0; pwdinfo->negotiation_dialog_token = 1; rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen); if ( attr_contentlen == 1 ) { DBG_871X( "[%s] Status = %d\n", __FUNCTION__, attr_content ); result = attr_content; if ( attr_content == P2P_STATUS_SUCCESS ) { u8 bcancelled = 0; _cancel_timer( &pwdinfo->restore_p2p_state_timer, &bcancelled ); // Commented by Albert 20100911 // Todo: Need to handle the case which both Intents are the same. rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_GONEGO_OK); if ( ( pwdinfo->intent ) > ( pwdinfo->peer_intent >> 1 ) ) { rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); } else if ( ( pwdinfo->intent ) < ( pwdinfo->peer_intent >> 1 ) ) { rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); } else { // Have to compare the Tie Breaker if ( pwdinfo->peer_intent & 0x01 ) { rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); } else { rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); } } #ifdef CONFIG_CONCURRENT_MODE if ( check_buddy_fwstate(pwdinfo->padapter , _FW_LINKED ) ) { // Switch back to the AP channel soon. _set_timer( &pwdinfo->ap_p2p_switch_timer, 100 ); } #endif } else { rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); break; } } // Try to get the group id information attr_contentlen = 0; _rtw_memset( groupid, 0x00, 38 ); if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen) ) { DBG_871X( "[%s] Ssid = %s, ssidlen = %zu\n", __FUNCTION__, &groupid[ETH_ALEN], strlen(&groupid[ETH_ALEN]) ); _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, &groupid[0], ETH_ALEN ); _rtw_memcpy( pwdinfo->groupid_info.ssid, &groupid[6], attr_contentlen - ETH_ALEN ); } attr_contentlen = 0; if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen) ) { DBG_871X( "[%s] Peer's operating channel = %d\n", __FUNCTION__, operatingch_info[4] ); pwdinfo->peer_operating_ch = operatingch_info[4]; } //Get the next P2P IE p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); } return( result ); } u8 process_p2p_presence_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) { u8 *frame_body; u8 dialogToken=0; u8 status = P2P_STATUS_SUCCESS; frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); dialogToken = frame_body[6]; //todo: check NoA attribute issue_p2p_presence_resp(pwdinfo, GetAddr2Ptr(pframe), status, dialogToken); return _TRUE; } void find_phase_handler( _adapter* padapter ) { struct wifidirect_info *pwdinfo = &padapter->wdinfo; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; NDIS_802_11_SSID ssid; _irqL irqL; u8 _status = 0; _func_enter_; _rtw_memset((unsigned char*)&ssid, 0, sizeof(NDIS_802_11_SSID)); _rtw_memcpy(ssid.Ssid, pwdinfo->p2p_wildcard_ssid, P2P_WILDCARD_SSID_LEN ); ssid.SsidLength = P2P_WILDCARD_SSID_LEN; rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); _enter_critical_bh(&pmlmepriv->lock, &irqL); _status = rtw_sitesurvey_cmd(padapter, &ssid, 1, NULL, 0); _exit_critical_bh(&pmlmepriv->lock, &irqL); _func_exit_; } void p2p_concurrent_handler( _adapter* padapter ); void restore_p2p_state_handler( _adapter* padapter ) { struct wifidirect_info *pwdinfo = &padapter->wdinfo; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _func_enter_; if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_FAIL)) { rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); } #ifdef CONFIG_CONCURRENT_MODE if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) { _adapter *pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_RSP)) { set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); issue_nulldata(pbuddy_adapter, NULL, 0, 3, 500); } } #endif rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE)) { #ifdef CONFIG_CONCURRENT_MODE p2p_concurrent_handler( padapter ); #else // In the P2P client mode, the driver should not switch back to its listen channel // because this P2P client should stay at the operating channel of P2P GO. set_channel_bwmode( padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); #endif } _func_exit_; } void pre_tx_invitereq_handler( _adapter* padapter ) { struct wifidirect_info *pwdinfo = &padapter->wdinfo; u8 val8 = 1; _func_enter_; set_channel_bwmode(padapter, pwdinfo->invitereq_info.peer_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); issue_probereq_p2p(padapter, NULL); _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); _func_exit_; } void pre_tx_provdisc_handler( _adapter* padapter ) { struct wifidirect_info *pwdinfo = &padapter->wdinfo; u8 val8 = 1; _func_enter_; set_channel_bwmode(padapter, pwdinfo->tx_prov_disc_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); issue_probereq_p2p(padapter, NULL); _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); _func_exit_; } void pre_tx_negoreq_handler( _adapter* padapter ) { struct wifidirect_info *pwdinfo = &padapter->wdinfo; u8 val8 = 1; _func_enter_; set_channel_bwmode(padapter, pwdinfo->nego_req_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); issue_probereq_p2p(padapter, NULL); _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); _func_exit_; } #ifdef CONFIG_CONCURRENT_MODE void p2p_concurrent_handler( _adapter* padapter ) { struct wifidirect_info *pwdinfo = &padapter->wdinfo; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); //_adapter *pbuddy_adapter = padapter->pbuddy_adapter; //struct wifidirect_info *pbuddy_wdinfo = &pbuddy_adapter->wdinfo; //struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; //struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; u8 val8; _func_enter_; if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) { PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; pwdinfo->operating_channel = pbuddy_mlmeext->cur_channel; if( pwdinfo->driver_interface == DRIVER_CFG80211 ) { DBG_871X("%s, switch ch back to buddy's cur_channel=%d\n", __func__, pbuddy_mlmeext->cur_channel); set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); issue_nulldata(pbuddy_adapter, NULL, 0, 3, 500); } else if( pwdinfo->driver_interface == DRIVER_WEXT ) { if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) { // Now, the driver stays on the AP's channel. // If the pwdinfo->ext_listen_period = 0, that means the P2P listen state is not available on listen channel. if ( pwdinfo->ext_listen_period > 0 ) { DBG_8192C( "[%s] P2P_STATE_IDLE, ext_listen_period = %d\n", __FUNCTION__, pwdinfo->ext_listen_period ); if ( pbuddy_mlmeext->cur_channel != pwdinfo->listen_channel ) { // Will switch to listen channel so that need to send the NULL data with PW bit to AP. issue_nulldata(pbuddy_adapter, NULL, 1, 3, 500); set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); } rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); if(!check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) && !(pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { val8 = 1; rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); } // Todo: To check the value of pwdinfo->ext_listen_period is equal to 0 or not. _set_timer( &pwdinfo->ap_p2p_switch_timer, pwdinfo->ext_listen_period ); } } else if ( rtw_p2p_chk_state(pwdinfo, P2P_STATE_LISTEN) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_FAIL) || ( rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING) && pwdinfo->nego_req_info.benable == _FALSE ) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_REQ) ) { // Now, the driver is in the listen state of P2P mode. DBG_8192C( "[%s] P2P_STATE_IDLE, ext_listen_interval = %d\n", __FUNCTION__, pwdinfo->ext_listen_interval ); // Commented by Albert 2012/11/01 // If the AP's channel is the same as the listen channel, we should still be in the listen state // Other P2P device is still able to find this device out even this device is in the AP's channel. // So, configure this device to be able to receive the probe request frame and set it to listen state. if ( pbuddy_mlmeext->cur_channel != pwdinfo->listen_channel ) { set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); if(!check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) &&!(pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { val8 = 0; padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); } rtw_p2p_set_state(pwdinfo, P2P_STATE_IDLE); issue_nulldata(pbuddy_adapter, NULL, 0, 3, 500); } // Todo: To check the value of pwdinfo->ext_listen_interval is equal to 0 or not. _set_timer( &pwdinfo->ap_p2p_switch_timer, pwdinfo->ext_listen_interval ); } else if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_OK)) { // The driver had finished the P2P handshake successfully. val8 = 0; rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); issue_nulldata(pbuddy_adapter, NULL, 0, 3, 500); } else if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ)) { val8 = 1; set_channel_bwmode(padapter, pwdinfo->tx_prov_disc_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); issue_probereq_p2p(padapter, NULL); _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); } else if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING) && pwdinfo->nego_req_info.benable == _TRUE) { val8 = 1; set_channel_bwmode(padapter, pwdinfo->nego_req_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); issue_probereq_p2p(padapter, NULL); _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); } else if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_INVITE_REQ ) && pwdinfo->invitereq_info.benable == _TRUE) { /* val8 = 1; set_channel_bwmode(padapter, , HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); issue_probereq_p2p(padapter, NULL); _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); */ } } } else { set_channel_bwmode( padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); } _func_exit_; } #endif #ifdef CONFIG_IOCTL_CFG80211 static void ro_ch_handler(_adapter *padapter) { struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; struct wifidirect_info *pwdinfo = &padapter->wdinfo; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; u8 ch, bw, offset; _func_enter_; if (rtw_get_ch_setting_union(padapter, &ch, &bw, &offset) != 0) { if (0) DBG_871X(FUNC_ADPT_FMT" back to linked/linking union - ch:%u, bw:%u, offset:%u\n", FUNC_ADPT_ARG(padapter), ch, bw, offset); } else if (adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->listen_channel) { ch = pwdinfo->listen_channel; bw = CHANNEL_WIDTH_20; offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; if (0) DBG_871X(FUNC_ADPT_FMT" back to listen ch - ch:%u, bw:%u, offset:%u\n", FUNC_ADPT_ARG(padapter), ch, bw, offset); } else { ch = pcfg80211_wdinfo->restore_channel; bw = CHANNEL_WIDTH_20; offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; if (0) DBG_871X(FUNC_ADPT_FMT" back to restore ch - ch:%u, bw:%u, offset:%u\n", FUNC_ADPT_ARG(padapter), ch, bw, offset); } set_channel_bwmode(padapter, ch, offset, bw); rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); #ifdef CONFIG_DEBUG_CFG80211 DBG_871X("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); #endif pcfg80211_wdinfo->is_ro_ch = _FALSE; pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time(); if (pcfg80211_wdinfo->not_indic_ro_ch_exp == _TRUE) return; DBG_871X("cfg80211_remain_on_channel_expired, ch=%d, bw=%d, offset=%d\n", rtw_get_oper_ch(padapter), rtw_get_oper_bw(padapter), rtw_get_oper_choffset(padapter)); rtw_cfg80211_remain_on_channel_expired(padapter, pcfg80211_wdinfo->remain_on_ch_cookie, &pcfg80211_wdinfo->remain_on_ch_channel, pcfg80211_wdinfo->remain_on_ch_type, GFP_KERNEL); _func_exit_; } static void ro_ch_timer_process (void *FunctionContext) { _adapter *adapter = (_adapter *)FunctionContext; struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); //printk("%s \n", __FUNCTION__); #ifdef CONFIG_CONCURRENT_MODE ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); #endif p2p_protocol_wk_cmd( adapter, P2P_RO_CH_WK); } static void rtw_change_p2pie_op_ch(_adapter *padapter, const u8 *frame_body, u32 len, u8 ch) { u8 *ies, *p2p_ie; u32 ies_len, p2p_ielen; PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ies = (u8*)(frame_body + _PUBLIC_ACTION_IE_OFFSET_); ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); while ( p2p_ie ) { u32 attr_contentlen = 0; u8 *pattr = NULL; //Check P2P_ATTR_OPERATING_CH attr_contentlen = 0; pattr = NULL; if((pattr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, (uint*)&attr_contentlen))!=NULL) { *(pattr+4) = ch; } //Get the next P2P IE p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); } } static void rtw_change_p2pie_ch_list(_adapter *padapter, const u8 *frame_body, u32 len, u8 ch) { u8 *ies, *p2p_ie; u32 ies_len, p2p_ielen; PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ies = (u8*)(frame_body + _PUBLIC_ACTION_IE_OFFSET_); ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); while (p2p_ie) { u32 attr_contentlen = 0; u8 *pattr = NULL; //Check P2P_ATTR_CH_LIST if ((pattr=rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, NULL, (uint*)&attr_contentlen))!=NULL) { int i; u32 num_of_ch; u8 *pattr_temp = pattr + 3 ; attr_contentlen -= 3; while (attr_contentlen>0) { num_of_ch = *(pattr_temp+1); for(i=0; ipbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; u8 buddy_ch = pbuddy_mlmeext->cur_channel; ies = (u8*)(frame_body + _PUBLIC_ACTION_IE_OFFSET_); ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); while (p2p_ie) { u32 attr_contentlen = 0; u8 *pattr = NULL; //Check P2P_ATTR_CH_LIST if ((pattr=rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, NULL, (uint*)&attr_contentlen))!=NULL) { int i; u32 num_of_ch; u8 *pattr_temp = pattr + 3 ; attr_contentlen -= 3; while (attr_contentlen>0) { num_of_ch = *(pattr_temp+1); for(i=0; ipbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; u8 buddy_ch = pbuddy_mlmeext->cur_channel; ies = (u8*)(frame_body + _PUBLIC_ACTION_IE_OFFSET_); ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); while (p2p_ie) { u32 attr_contentlen = 0; u8 *pattr = NULL; //Check P2P_ATTR_OPERATING_CH attr_contentlen = 0; pattr = NULL; if((pattr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, (uint*)&attr_contentlen))!=NULL) { if (*(pattr+4) == buddy_ch) { DBG_871X(FUNC_ADPT_FMT" op_ch fit buddy_ch:%u\n", FUNC_ADPT_ARG(padapter), buddy_ch); fit = _TRUE; break; } } //Get the next P2P IE p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); } #endif return fit; } static void rtw_cfg80211_adjust_p2pie_channel(_adapter *padapter, const u8 *frame_body, u32 len) { #ifdef CONFIG_CONCURRENT_MODE u8 *ies, *p2p_ie; u32 ies_len, p2p_ielen; PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ies = (u8*)(frame_body + _PUBLIC_ACTION_IE_OFFSET_); ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); while ( p2p_ie ) { u32 attr_contentlen = 0; u8 *pattr = NULL; //Check P2P_ATTR_CH_LIST if((pattr=rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, NULL, (uint*)&attr_contentlen))!=NULL) { int i; u32 num_of_ch; u8 *pattr_temp = pattr + 3 ; attr_contentlen -= 3; while(attr_contentlen>0) { num_of_ch = *(pattr_temp+1); for(i=0; icur_channel;//forcing to the same channel pattr_temp += (2+num_of_ch); attr_contentlen -= (2+num_of_ch); } } //Check P2P_ATTR_OPERATING_CH attr_contentlen = 0; pattr = NULL; if((pattr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, (uint*)&attr_contentlen))!=NULL) { *(pattr+4) = pbuddy_mlmeext->cur_channel;//forcing to the same channel } //Get the next P2P IE p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); } #endif } #ifdef CONFIG_WFD void rtw_append_wfd_ie(_adapter *padapter, u8 *buf, u32* len) { unsigned char *frame_body; u8 category, action, OUI_Subtype, dialogToken=0; u32 wfdielen = 0; struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); category = frame_body[0]; if(category == RTW_WLAN_CATEGORY_PUBLIC) { action = frame_body[1]; if (action == ACT_PUBLIC_VENDOR && _rtw_memcmp(frame_body+2, P2P_OUI, 4) == _TRUE ) { OUI_Subtype = frame_body[6]; dialogToken = frame_body[7]; switch( OUI_Subtype )//OUI Subtype { case P2P_GO_NEGO_REQ: { wfdielen = build_nego_req_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); (*len) += wfdielen; break; } case P2P_GO_NEGO_RESP: { wfdielen = build_nego_resp_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); (*len) += wfdielen; break; } case P2P_GO_NEGO_CONF: { wfdielen = build_nego_confirm_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); (*len) += wfdielen; break; } case P2P_INVIT_REQ: { wfdielen = build_invitation_req_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); (*len) += wfdielen; break; } case P2P_INVIT_RESP: { wfdielen = build_invitation_resp_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); (*len) += wfdielen; break; } case P2P_DEVDISC_REQ: break; case P2P_DEVDISC_RESP: break; case P2P_PROVISION_DISC_REQ: { wfdielen = build_provdisc_req_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); (*len) += wfdielen; break; } case P2P_PROVISION_DISC_RESP: { wfdielen = build_provdisc_resp_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); (*len) += wfdielen; break; } default: break; } } } else if(category == RTW_WLAN_CATEGORY_P2P) { OUI_Subtype = frame_body[5]; dialogToken = frame_body[6]; #ifdef CONFIG_DEBUG_CFG80211 DBG_871X("ACTION_CATEGORY_P2P: OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", cpu_to_be32( *( ( u32* ) ( frame_body + 1 ) ) ), OUI_Subtype, dialogToken); #endif switch(OUI_Subtype) { case P2P_NOTICE_OF_ABSENCE: break; case P2P_PRESENCE_REQUEST: break; case P2P_PRESENCE_RESPONSE: break; case P2P_GO_DISC_REQUEST: break; default: break; } } else { DBG_871X("%s, action frame category=%d\n", __func__, category); //is_p2p_frame = (-1); } return; } #endif u8 *dump_p2p_attr_ch_list(u8 *p2p_ie, uint p2p_ielen, u8 *buf, u32 buf_len) { uint attr_contentlen = 0; u8 *pattr = NULL; int w_sz = 0; u8 ch_cnt = 0; u8 ch_list[40]; bool continuous = _FALSE; if ((pattr=rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, NULL, &attr_contentlen))!=NULL) { int i, j; u32 num_of_ch; u8 *pattr_temp = pattr + 3 ; attr_contentlen -= 3; _rtw_memset(ch_list, 0, 40); while (attr_contentlen>0) { num_of_ch = *(pattr_temp+1); for(i=0; i=ch_cnt) ch_list[ch_cnt++] = *(pattr_temp+2+i); } pattr_temp += (2+num_of_ch); attr_contentlen -= (2+num_of_ch); } for (j=0;j>1 == resp >>1) return req&0x01 ? _TRUE : _FALSE; else if (req>>1 > resp>>1) return _TRUE; else return _FALSE; } int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx) { int is_p2p_frame = (-1); unsigned char *frame_body; u8 category, action, OUI_Subtype, dialogToken=0; u8 *p2p_ie = NULL; uint p2p_ielen = 0; struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); int status = -1; u8 ch_list_buf[128] = {'\0'}; int op_ch = -1; int listen_ch = -1; u8 intent = 0; frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); category = frame_body[0]; //just for check if(category == RTW_WLAN_CATEGORY_PUBLIC) { action = frame_body[1]; if (action == ACT_PUBLIC_VENDOR && _rtw_memcmp(frame_body+2, P2P_OUI, 4) == _TRUE ) { OUI_Subtype = frame_body[6]; dialogToken = frame_body[7]; is_p2p_frame = OUI_Subtype; #ifdef CONFIG_DEBUG_CFG80211 DBG_871X("ACTION_CATEGORY_PUBLIC: ACT_PUBLIC_VENDOR, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); #endif p2p_ie = rtw_get_p2p_ie( (u8 *)buf+sizeof(struct rtw_ieee80211_hdr_3addr)+_PUBLIC_ACTION_IE_OFFSET_, len-sizeof(struct rtw_ieee80211_hdr_3addr)-_PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen); switch( OUI_Subtype )//OUI Subtype { u8 *cont; uint cont_len; case P2P_GO_NEGO_REQ: { struct rtw_wdev_nego_info* nego_info = &pwdev_priv->nego_info; if (tx) { #ifdef CONFIG_DRV_ISSUE_PROV_REQ // IOT FOR S2 if(pwdev_priv->provdisc_req_issued == _FALSE) rtw_cfg80211_issue_p2p_provision_request(padapter, buf, len); #endif //CONFIG_DRV_ISSUE_PROV_REQ //pwdev_priv->provdisc_req_issued = _FALSE; #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) if(check_buddy_fwstate(padapter, _FW_LINKED)) rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)); #endif } if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len))) op_ch = *(cont+4); if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_LISTEN_CH, NULL, &cont_len))) listen_ch = *(cont+4); if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT, NULL, &cont_len))) intent = *cont; if (nego_info->token != dialogToken) rtw_wdev_nego_info_init(nego_info); _rtw_memcpy(nego_info->peer_mac, tx ? GetAddr1Ptr(buf) : GetAddr2Ptr(buf), ETH_ALEN); nego_info->active = tx ? 1 : 0; nego_info->token = dialogToken; nego_info->req_op_ch = op_ch; nego_info->req_listen_ch = listen_ch; nego_info->req_intent = intent; nego_info->state = 0; dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128); DBG_871X("RTW_%s:P2P_GO_NEGO_REQ, dialogToken=%d, intent:%u%s, listen_ch:%d, op_ch:%d, ch_list:%s\n", (tx==_TRUE)?"Tx":"Rx", dialogToken, (intent>>1), intent&0x1 ? "+" : "-", listen_ch, op_ch, ch_list_buf); if (!tx) { #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) if(check_buddy_fwstate(padapter, _FW_LINKED) && rtw_chk_p2pie_ch_list_with_buddy(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE) { DBG_871X(FUNC_ADPT_FMT" ch_list has no intersect with buddy\n", FUNC_ADPT_ARG(padapter)); rtw_change_p2pie_ch_list(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr), 0); } #endif } break; } case P2P_GO_NEGO_RESP: { struct rtw_wdev_nego_info* nego_info = &pwdev_priv->nego_info; if (tx) { #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) if(check_buddy_fwstate(padapter, _FW_LINKED)) rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)); #endif } if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len))) op_ch = *(cont+4); if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT, NULL, &cont_len))) intent = *cont; if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, NULL, &cont_len))) status = *cont; if (nego_info->token == dialogToken && nego_info->state == 0 && _rtw_memcmp(nego_info->peer_mac, tx ? GetAddr1Ptr(buf) : GetAddr2Ptr(buf), ETH_ALEN) == _TRUE ) { nego_info->status = (status==-1) ? 0xff : status; nego_info->rsp_op_ch= op_ch; nego_info->rsp_intent = intent; nego_info->state = 1; if (status != 0) nego_info->token = 0; /* init */ } dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128); DBG_871X("RTW_%s:P2P_GO_NEGO_RESP, dialogToken=%d, intent:%u%s, status:%d, op_ch:%d, ch_list:%s\n", (tx==_TRUE)?"Tx":"Rx", dialogToken, (intent>>1), intent&0x1 ? "+" : "-", status, op_ch, ch_list_buf); if (!tx) { pwdev_priv->provdisc_req_issued = _FALSE; #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) if(check_buddy_fwstate(padapter, _FW_LINKED) && rtw_chk_p2pie_ch_list_with_buddy(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE) { DBG_871X(FUNC_ADPT_FMT" ch_list has no intersect with buddy\n", FUNC_ADPT_ARG(padapter)); rtw_change_p2pie_ch_list(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr), 0); } #endif } break; } case P2P_GO_NEGO_CONF: { struct rtw_wdev_nego_info* nego_info = &pwdev_priv->nego_info; bool is_go = _FALSE; if (tx) { #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) if(check_buddy_fwstate(padapter, _FW_LINKED)) rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)); #endif } if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len))) op_ch = *(cont+4); if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, NULL, &cont_len))) status = *cont; if (nego_info->token == dialogToken && nego_info->state == 1 && _rtw_memcmp(nego_info->peer_mac, tx ? GetAddr1Ptr(buf) : GetAddr2Ptr(buf), ETH_ALEN) == _TRUE ) { nego_info->status = (status==-1) ? 0xff : status; nego_info->conf_op_ch = (op_ch==-1) ? 0 : op_ch; nego_info->state = 2; if (status == 0) { if (rtw_p2p_nego_intent_compare(nego_info->req_intent, nego_info->rsp_intent) ^ !tx) is_go = _TRUE; } nego_info->token = 0; /* init */ } dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128); DBG_871X("RTW_%s:P2P_GO_NEGO_CONF, dialogToken=%d, status:%d, op_ch:%d, ch_list:%s\n", (tx==_TRUE)?"Tx":"Rx", dialogToken, status, op_ch, ch_list_buf); if (!tx) { } break; } case P2P_INVIT_REQ: { struct rtw_wdev_invit_info* invit_info = &pwdev_priv->invit_info; int flags = -1; if (tx) { #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) if(check_buddy_fwstate(padapter, _FW_LINKED)) rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)); #endif } if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_INVITATION_FLAGS, NULL, &cont_len))) flags = *cont; if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len))) op_ch = *(cont+4); if (invit_info->token != dialogToken) rtw_wdev_invit_info_init(invit_info); _rtw_memcpy(invit_info->peer_mac, tx ? GetAddr1Ptr(buf) : GetAddr2Ptr(buf), ETH_ALEN); invit_info->active = tx ? 1 : 0; invit_info->token = dialogToken; invit_info->flags = (flags==-1) ? 0x0 : flags; invit_info->req_op_ch= op_ch; invit_info->state = 0; dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128); DBG_871X("RTW_%s:P2P_INVIT_REQ, dialogToken=%d, flags:0x%02x, op_ch:%d, ch_list:%s\n", (tx==_TRUE)?"Tx":"Rx", dialogToken, flags, op_ch, ch_list_buf); if (!tx) { #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) if(check_buddy_fwstate(padapter, _FW_LINKED)) { if (op_ch != -1 && rtw_chk_p2pie_op_ch_with_buddy(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE) { DBG_871X(FUNC_ADPT_FMT" op_ch:%u has no intersect with buddy\n", FUNC_ADPT_ARG(padapter), op_ch); rtw_change_p2pie_ch_list(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr), 0); } else if (rtw_chk_p2pie_ch_list_with_buddy(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE) { DBG_871X(FUNC_ADPT_FMT" ch_list has no intersect with buddy\n", FUNC_ADPT_ARG(padapter)); rtw_change_p2pie_ch_list(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr), 0); } } #endif } break; } case P2P_INVIT_RESP: { struct rtw_wdev_invit_info* invit_info = &pwdev_priv->invit_info; if (tx) { #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) if(check_buddy_fwstate(padapter, _FW_LINKED)) rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)); #endif } if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, NULL, &cont_len))) { #ifdef CONFIG_P2P_INVITE_IOT if(tx && *cont==7) { DBG_871X("TX_P2P_INVITE_RESP, status is no common channel, change to unknown group\n"); *cont = 8; //unknow group status } #endif //CONFIG_P2P_INVITE_IOT status = *cont; } if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len))) op_ch = *(cont+4); if (invit_info->token == dialogToken && invit_info->state == 0 && _rtw_memcmp(invit_info->peer_mac, tx ? GetAddr1Ptr(buf) : GetAddr2Ptr(buf), ETH_ALEN) == _TRUE ) { invit_info->status = (status==-1) ? 0xff : status; invit_info->rsp_op_ch= op_ch; invit_info->state = 1; invit_info->token = 0; /* init */ } dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128); DBG_871X("RTW_%s:P2P_INVIT_RESP, dialogToken=%d, status:%d, op_ch:%d, ch_list:%s\n", (tx==_TRUE)?"Tx":"Rx", dialogToken, status, op_ch, ch_list_buf); if (!tx) { } break; } case P2P_DEVDISC_REQ: DBG_871X("RTW_%s:P2P_DEVDISC_REQ, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); break; case P2P_DEVDISC_RESP: cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, NULL, &cont_len); DBG_871X("RTW_%s:P2P_DEVDISC_RESP, dialogToken=%d, status:%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken, cont?*cont:-1); break; case P2P_PROVISION_DISC_REQ: { size_t frame_body_len = len - sizeof(struct rtw_ieee80211_hdr_3addr); u8 *p2p_ie; uint p2p_ielen = 0; uint contentlen = 0; DBG_871X("RTW_%s:P2P_PROVISION_DISC_REQ, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); //if(tx) { pwdev_priv->provdisc_req_issued = _FALSE; if( (p2p_ie=rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen))) { if(rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, NULL, &contentlen)) { pwdev_priv->provdisc_req_issued = _FALSE;//case: p2p_client join p2p GO } else { #ifdef CONFIG_DEBUG_CFG80211 DBG_871X("provdisc_req_issued is _TRUE\n"); #endif //CONFIG_DEBUG_CFG80211 pwdev_priv->provdisc_req_issued = _TRUE;//case: p2p_devices connection before Nego req. } } } } break; case P2P_PROVISION_DISC_RESP: DBG_871X("RTW_%s:P2P_PROVISION_DISC_RESP, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); break; default: DBG_871X("RTW_%s:OUI_Subtype=%d, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", OUI_Subtype, dialogToken); break; } } } else if(category == RTW_WLAN_CATEGORY_P2P) { OUI_Subtype = frame_body[5]; dialogToken = frame_body[6]; #ifdef CONFIG_DEBUG_CFG80211 DBG_871X("ACTION_CATEGORY_P2P: OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", cpu_to_be32( *( ( u32* ) ( frame_body + 1 ) ) ), OUI_Subtype, dialogToken); #endif is_p2p_frame = OUI_Subtype; switch(OUI_Subtype) { case P2P_NOTICE_OF_ABSENCE: DBG_871X("RTW_%s:P2P_NOTICE_OF_ABSENCE, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); break; case P2P_PRESENCE_REQUEST: DBG_871X("RTW_%s:P2P_PRESENCE_REQUEST, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); break; case P2P_PRESENCE_RESPONSE: DBG_871X("RTW_%s:P2P_PRESENCE_RESPONSE, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); break; case P2P_GO_DISC_REQUEST: DBG_871X("RTW_%s:P2P_GO_DISC_REQUEST, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); break; default: DBG_871X("RTW_%s:OUI_Subtype=%d, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", OUI_Subtype, dialogToken); break; } } else { DBG_871X("RTW_%s:action frame category=%d\n", (tx==_TRUE)?"TX":"RX", category); } return is_p2p_frame; } void rtw_init_cfg80211_wifidirect_info( _adapter* padapter) { struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; _rtw_memset(pcfg80211_wdinfo, 0x00, sizeof(struct cfg80211_wifidirect_info) ); _init_timer( &pcfg80211_wdinfo->remain_on_ch_timer, padapter->pnetdev, ro_ch_timer_process, padapter ); } #endif //CONFIG_IOCTL_CFG80211 void p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType) { struct wifidirect_info *pwdinfo= &(padapter->wdinfo); _func_enter_; switch(intCmdType) { case P2P_FIND_PHASE_WK: { find_phase_handler( padapter ); break; } case P2P_RESTORE_STATE_WK: { restore_p2p_state_handler( padapter ); break; } case P2P_PRE_TX_PROVDISC_PROCESS_WK: { #ifdef CONFIG_CONCURRENT_MODE if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) { p2p_concurrent_handler( padapter ); } else { pre_tx_provdisc_handler( padapter ); } #else pre_tx_provdisc_handler( padapter ); #endif break; } case P2P_PRE_TX_INVITEREQ_PROCESS_WK: { #ifdef CONFIG_CONCURRENT_MODE if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) { p2p_concurrent_handler( padapter ); } else { pre_tx_invitereq_handler( padapter ); } #else pre_tx_invitereq_handler( padapter ); #endif break; } case P2P_PRE_TX_NEGOREQ_PROCESS_WK: { #ifdef CONFIG_CONCURRENT_MODE if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) { p2p_concurrent_handler( padapter ); } else { pre_tx_negoreq_handler( padapter ); } #else pre_tx_negoreq_handler( padapter ); #endif break; } #ifdef CONFIG_P2P #ifdef CONFIG_CONCURRENT_MODE case P2P_AP_P2P_CH_SWITCH_PROCESS_WK: { p2p_concurrent_handler( padapter ); break; } #endif #endif #ifdef CONFIG_IOCTL_CFG80211 case P2P_RO_CH_WK: { ro_ch_handler( padapter ); break; } #endif //CONFIG_IOCTL_CFG80211 } _func_exit_; } #ifdef CONFIG_P2P_PS void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength) { u8 * ies; u32 ies_len; u8 * p2p_ie; u32 p2p_ielen = 0; u8 noa_attr[MAX_P2P_IE_LEN] = { 0x00 };// NoA length should be n*(13) + 2 u32 attr_contentlen = 0; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); u8 find_p2p = _FALSE, find_p2p_ps = _FALSE; u8 noa_offset, noa_num, noa_index; _func_enter_; if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { return; } #ifdef CONFIG_CONCURRENT_MODE if(padapter->iface_type != IFACE_PORT0) return; #endif if(IELength <= _BEACON_IE_OFFSET_) return; ies = IEs + _BEACON_IE_OFFSET_; ies_len = IELength - _BEACON_IE_OFFSET_; p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen); while(p2p_ie) { find_p2p = _TRUE; // Get Notice of Absence IE. if(rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_NOA, noa_attr, &attr_contentlen)) { find_p2p_ps = _TRUE; noa_index = noa_attr[0]; if( (pwdinfo->p2p_ps_mode == P2P_PS_NONE) || (noa_index != pwdinfo->noa_index) )// if index change, driver should reconfigure related setting. { pwdinfo->noa_index = noa_index; pwdinfo->opp_ps = noa_attr[1] >> 7; pwdinfo->ctwindow = noa_attr[1] & 0x7F; noa_offset = 2; noa_num = 0; // NoA length should be n*(13) + 2 if(attr_contentlen > 2) { while(noa_offset < attr_contentlen) { //_rtw_memcpy(&wifidirect_info->noa_count[noa_num], &noa_attr[noa_offset], 1); pwdinfo->noa_count[noa_num] = noa_attr[noa_offset]; noa_offset += 1; _rtw_memcpy(&pwdinfo->noa_duration[noa_num], &noa_attr[noa_offset], 4); noa_offset += 4; _rtw_memcpy(&pwdinfo->noa_interval[noa_num], &noa_attr[noa_offset], 4); noa_offset += 4; _rtw_memcpy(&pwdinfo->noa_start_time[noa_num], &noa_attr[noa_offset], 4); noa_offset += 4; noa_num++; } } pwdinfo->noa_num = noa_num; if( pwdinfo->opp_ps == 1 ) { pwdinfo->p2p_ps_mode = P2P_PS_CTWINDOW; // driver should wait LPS for entering CTWindow if(adapter_to_pwrctl(padapter)->bFwCurrentInPSMode == _TRUE) { p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 1); } } else if( pwdinfo->noa_num > 0 ) { pwdinfo->p2p_ps_mode = P2P_PS_NOA; p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 1); } else if( pwdinfo->p2p_ps_mode > P2P_PS_NONE) { p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1); } } break; // find target, just break. } //Get the next P2P IE p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); } if(find_p2p == _TRUE) { if( (pwdinfo->p2p_ps_mode > P2P_PS_NONE) && (find_p2p_ps == _FALSE) ) { p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1); } } _func_exit_; } void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct wifidirect_info *pwdinfo= &(padapter->wdinfo); _func_enter_; // Pre action for p2p state switch(p2p_ps_state) { case P2P_PS_DISABLE: pwdinfo->p2p_ps_state = p2p_ps_state; rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state)); pwdinfo->noa_index = 0; pwdinfo->ctwindow = 0; pwdinfo->opp_ps = 0; pwdinfo->noa_num = 0; pwdinfo->p2p_ps_mode = P2P_PS_NONE; if(pwrpriv->bFwCurrentInPSMode == _TRUE) { if(pwrpriv->smart_ps == 0) { pwrpriv->smart_ps = 2; rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&(pwrpriv->pwr_mode))); } } break; case P2P_PS_ENABLE: if (pwdinfo->p2p_ps_mode > P2P_PS_NONE) { pwdinfo->p2p_ps_state = p2p_ps_state; if( pwdinfo->ctwindow > 0 ) { if(pwrpriv->smart_ps != 0) { pwrpriv->smart_ps = 0; DBG_871X("%s(): Enter CTW, change SmartPS\n", __FUNCTION__); rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&(pwrpriv->pwr_mode))); } } rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state)); } break; case P2P_PS_SCAN: case P2P_PS_SCAN_DONE: case P2P_PS_ALLSTASLEEP: if (pwdinfo->p2p_ps_mode > P2P_PS_NONE) { pwdinfo->p2p_ps_state = p2p_ps_state; rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state)); } break; default: break; } _func_exit_; } u8 p2p_ps_wk_cmd(_adapter*padapter, u8 p2p_ps_state, u8 enqueue) { struct cmd_obj *ph2c; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct wifidirect_info *pwdinfo= &(padapter->wdinfo); struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; _func_enter_; if ( rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) #ifdef CONFIG_CONCURRENT_MODE || (padapter->iface_type != IFACE_PORT0) #endif ) { return res; } if(enqueue) { ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); if(ph2c==NULL){ res= _FAIL; goto exit; } pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); if(pdrvextra_cmd_parm==NULL){ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); res= _FAIL; goto exit; } pdrvextra_cmd_parm->ec_id = P2P_PS_WK_CID; pdrvextra_cmd_parm->type = p2p_ps_state; pdrvextra_cmd_parm->size = 0; pdrvextra_cmd_parm->pbuf = NULL; init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); res = rtw_enqueue_cmd(pcmdpriv, ph2c); } else { p2p_ps_wk_hdl(padapter, p2p_ps_state); } exit: _func_exit_; return res; } #endif // CONFIG_P2P_PS static void reset_ch_sitesurvey_timer_process (void *FunctionContext) { _adapter *adapter = (_adapter *)FunctionContext; struct wifidirect_info *pwdinfo = &adapter->wdinfo; if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) return; DBG_871X( "[%s] In\n", __FUNCTION__ ); // Reset the operation channel information pwdinfo->rx_invitereq_info.operation_ch[0] = 0; #ifdef CONFIG_P2P_OP_CHK_SOCIAL_CH pwdinfo->rx_invitereq_info.operation_ch[1] = 0; pwdinfo->rx_invitereq_info.operation_ch[2] = 0; pwdinfo->rx_invitereq_info.operation_ch[3] = 0; #endif //CONFIG_P2P_OP_CHK_SOCIAL_CH pwdinfo->rx_invitereq_info.scan_op_ch_only = 0; } static void reset_ch_sitesurvey_timer_process2 (void *FunctionContext) { _adapter *adapter = (_adapter *)FunctionContext; struct wifidirect_info *pwdinfo = &adapter->wdinfo; if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) return; DBG_871X( "[%s] In\n", __FUNCTION__ ); // Reset the operation channel information pwdinfo->p2p_info.operation_ch[0] = 0; #ifdef CONFIG_P2P_OP_CHK_SOCIAL_CH pwdinfo->p2p_info.operation_ch[1] = 0; pwdinfo->p2p_info.operation_ch[2] = 0; pwdinfo->p2p_info.operation_ch[3] = 0; #endif //CONFIG_P2P_OP_CHK_SOCIAL_CH pwdinfo->p2p_info.scan_op_ch_only = 0; } static void restore_p2p_state_timer_process (void *FunctionContext) { _adapter *adapter = (_adapter *)FunctionContext; struct wifidirect_info *pwdinfo = &adapter->wdinfo; if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) return; p2p_protocol_wk_cmd( adapter, P2P_RESTORE_STATE_WK ); } static void pre_tx_scan_timer_process (void *FunctionContext) { _adapter *adapter = (_adapter *) FunctionContext; struct wifidirect_info *pwdinfo = &adapter->wdinfo; _irqL irqL; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; u8 _status = 0; if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) return; _enter_critical_bh(&pmlmepriv->lock, &irqL); if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ)) { if ( _TRUE == pwdinfo->tx_prov_disc_info.benable ) // the provision discovery request frame is trigger to send or not { p2p_protocol_wk_cmd( adapter, P2P_PRE_TX_PROVDISC_PROCESS_WK ); //issue_probereq_p2p(adapter, NULL); //_set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); } } else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING)) { if ( _TRUE == pwdinfo->nego_req_info.benable ) { p2p_protocol_wk_cmd( adapter, P2P_PRE_TX_NEGOREQ_PROCESS_WK ); } } else if ( rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_INVITE_REQ ) ) { if ( _TRUE == pwdinfo->invitereq_info.benable ) { p2p_protocol_wk_cmd( adapter, P2P_PRE_TX_INVITEREQ_PROCESS_WK ); } } else { DBG_8192C( "[%s] p2p_state is %d, ignore!!\n", __FUNCTION__, rtw_p2p_state(pwdinfo) ); } _exit_critical_bh(&pmlmepriv->lock, &irqL); } static void find_phase_timer_process (void *FunctionContext) { _adapter *adapter = (_adapter *)FunctionContext; struct wifidirect_info *pwdinfo = &adapter->wdinfo; if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) return; adapter->wdinfo.find_phase_state_exchange_cnt++; p2p_protocol_wk_cmd( adapter, P2P_FIND_PHASE_WK ); } #ifdef CONFIG_CONCURRENT_MODE void ap_p2p_switch_timer_process (void *FunctionContext) { _adapter *adapter = (_adapter *)FunctionContext; struct wifidirect_info *pwdinfo = &adapter->wdinfo; #ifdef CONFIG_IOCTL_CFG80211 struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); #endif if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) return; #ifdef CONFIG_IOCTL_CFG80211 ATOMIC_SET(&pwdev_priv->switch_ch_to, 1); #endif p2p_protocol_wk_cmd( adapter, P2P_AP_P2P_CH_SWITCH_PROCESS_WK ); } #endif void reset_global_wifidirect_info( _adapter* padapter ) { struct wifidirect_info *pwdinfo; pwdinfo = &padapter->wdinfo; pwdinfo->persistent_supported = 0; pwdinfo->session_available = _TRUE; pwdinfo->wfd_tdls_enable = 0; pwdinfo->wfd_tdls_weaksec = _TRUE; } #ifdef CONFIG_WFD int rtw_init_wifi_display_info(_adapter* padapter) { int res = _SUCCESS; struct wifi_display_info *pwfd_info = &padapter->wfd_info; // Used in P2P and TDLS pwfd_info->rtsp_ctrlport = 554; pwfd_info->peer_rtsp_ctrlport = 0; // Reset to 0 pwfd_info->wfd_enable = _FALSE; pwfd_info->wfd_device_type = WFD_DEVINFO_PSINK; pwfd_info->scan_result_type = SCAN_RESULT_P2P_ONLY; // Used in P2P pwfd_info->peer_session_avail = _TRUE; pwfd_info->wfd_pc = _FALSE; // Used in TDLS _rtw_memset( pwfd_info->ip_address, 0x00, 4 ); _rtw_memset( pwfd_info->peer_ip_address, 0x00, 4 ); return res; } #endif //CONFIG_WFD void rtw_init_wifidirect_timers(_adapter* padapter) { struct wifidirect_info *pwdinfo = &padapter->wdinfo; _init_timer( &pwdinfo->find_phase_timer, padapter->pnetdev, find_phase_timer_process, padapter ); _init_timer( &pwdinfo->restore_p2p_state_timer, padapter->pnetdev, restore_p2p_state_timer_process, padapter ); _init_timer( &pwdinfo->pre_tx_scan_timer, padapter->pnetdev, pre_tx_scan_timer_process, padapter ); _init_timer( &pwdinfo->reset_ch_sitesurvey, padapter->pnetdev, reset_ch_sitesurvey_timer_process, padapter ); _init_timer( &pwdinfo->reset_ch_sitesurvey2, padapter->pnetdev, reset_ch_sitesurvey_timer_process2, padapter ); #ifdef CONFIG_CONCURRENT_MODE _init_timer( &pwdinfo->ap_p2p_switch_timer, padapter->pnetdev, ap_p2p_switch_timer_process, padapter ); #endif } void rtw_init_wifidirect_addrs(_adapter* padapter, u8 *dev_addr, u8 *iface_addr) { #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &padapter->wdinfo; /*init device&interface address */ if (dev_addr) { _rtw_memcpy(pwdinfo->device_addr, dev_addr, ETH_ALEN); } if (iface_addr) { _rtw_memcpy(pwdinfo->interface_addr, iface_addr, ETH_ALEN); } #endif } void init_wifidirect_info( _adapter* padapter, enum P2P_ROLE role) { struct wifidirect_info *pwdinfo; #ifdef CONFIG_WFD struct wifi_display_info *pwfd_info = &padapter->wfd_info; #endif #ifdef CONFIG_CONCURRENT_MODE _adapter *pbuddy_adapter = padapter->pbuddy_adapter; struct wifidirect_info *pbuddy_wdinfo = NULL; struct mlme_priv *pbuddy_mlmepriv = NULL; struct mlme_ext_priv *pbuddy_mlmeext = NULL; #endif pwdinfo = &padapter->wdinfo; pwdinfo->padapter = padapter; // 1, 6, 11 are the social channel defined in the WiFi Direct specification. pwdinfo->social_chan[0] = 1; pwdinfo->social_chan[1] = 6; pwdinfo->social_chan[2] = 11; pwdinfo->social_chan[3] = 0; // channel 0 for scanning ending in site survey function. #ifdef CONFIG_CONCURRENT_MODE if (pbuddy_adapter) { pbuddy_wdinfo = &pbuddy_adapter->wdinfo; pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; } if ( ( check_buddy_fwstate(padapter, _FW_LINKED ) == _TRUE ) && ( ( pbuddy_mlmeext->cur_channel == 1) || ( pbuddy_mlmeext->cur_channel == 6 ) || ( pbuddy_mlmeext->cur_channel == 11 ) ) ) { // Use the AP's channel as the listen channel // This will avoid the channel switch between AP's channel and listen channel. pwdinfo->listen_channel = pbuddy_mlmeext->cur_channel; } else #endif //CONFIG_CONCURRENT_MODE { // Use the channel 11 as the listen channel pwdinfo->listen_channel = 11; } if (role == P2P_ROLE_DEVICE) { rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); #ifdef CONFIG_CONCURRENT_MODE if ( check_buddy_fwstate(padapter, _FW_LINKED ) == _TRUE ) { rtw_p2p_set_state(pwdinfo, P2P_STATE_IDLE); } else #endif { rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); } pwdinfo->intent = 1; rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_LISTEN); } else if (role == P2P_ROLE_CLIENT) { rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); pwdinfo->intent = 1; rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_GONEGO_OK); } else if (role == P2P_ROLE_GO) { rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); pwdinfo->intent = 15; rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_GONEGO_OK); } // Use the OFDM rate in the P2P probe response frame. ( 6(B), 9(B), 12, 18, 24, 36, 48, 54 ) pwdinfo->support_rate[0] = 0x8c; // 6(B) pwdinfo->support_rate[1] = 0x92; // 9(B) pwdinfo->support_rate[2] = 0x18; // 12 pwdinfo->support_rate[3] = 0x24; // 18 pwdinfo->support_rate[4] = 0x30; // 24 pwdinfo->support_rate[5] = 0x48; // 36 pwdinfo->support_rate[6] = 0x60; // 48 pwdinfo->support_rate[7] = 0x6c; // 54 _rtw_memcpy( ( void* ) pwdinfo->p2p_wildcard_ssid, "DIRECT-", 7 ); _rtw_memset( pwdinfo->device_name, 0x00, WPS_MAX_DEVICE_NAME_LEN ); pwdinfo->device_name_len = 0; _rtw_memset( &pwdinfo->invitereq_info, 0x00, sizeof( struct tx_invite_req_info ) ); pwdinfo->invitereq_info.token = 3; // Token used for P2P invitation request frame. _rtw_memset( &pwdinfo->inviteresp_info, 0x00, sizeof( struct tx_invite_resp_info ) ); pwdinfo->inviteresp_info.token = 0; pwdinfo->profileindex = 0; _rtw_memset( &pwdinfo->profileinfo[ 0 ], 0x00, sizeof( struct profile_info ) * P2P_MAX_PERSISTENT_GROUP_NUM ); rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); pwdinfo->listen_dwell = ( u8 ) (( rtw_get_current_time() % 3 ) + 1); //DBG_8192C( "[%s] listen_dwell time is %d00ms\n", __FUNCTION__, pwdinfo->listen_dwell ); _rtw_memset( &pwdinfo->tx_prov_disc_info, 0x00, sizeof( struct tx_provdisc_req_info ) ); pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_NONE; _rtw_memset( &pwdinfo->nego_req_info, 0x00, sizeof( struct tx_nego_req_info ) ); pwdinfo->device_password_id_for_nego = WPS_DPID_PBC; pwdinfo->negotiation_dialog_token = 1; _rtw_memset( pwdinfo->nego_ssid, 0x00, WLAN_SSID_MAXLEN ); pwdinfo->nego_ssidlen = 0; pwdinfo->ui_got_wps_info = P2P_NO_WPSINFO; #ifdef CONFIG_WFD pwdinfo->supported_wps_cm = WPS_CONFIG_METHOD_DISPLAY | WPS_CONFIG_METHOD_PBC; pwdinfo->wfd_info = pwfd_info; #else pwdinfo->supported_wps_cm = WPS_CONFIG_METHOD_DISPLAY | WPS_CONFIG_METHOD_PBC | WPS_CONFIG_METHOD_KEYPAD; #endif //CONFIG_WFD pwdinfo->channel_list_attr_len = 0; _rtw_memset( pwdinfo->channel_list_attr, 0x00, 100 ); _rtw_memset( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, 0x00, 4 ); _rtw_memset( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, '0', 3 ); _rtw_memset( &pwdinfo->groupid_info, 0x00, sizeof( struct group_id_info ) ); #ifdef CONFIG_CONCURRENT_MODE #ifdef CONFIG_IOCTL_CFG80211 pwdinfo->ext_listen_interval = 1000; //The interval to be available with legacy AP during p2p0-find/scan pwdinfo->ext_listen_period = 3000; //The time period to be available for P2P during nego #else //!CONFIG_IOCTL_CFG80211 //pwdinfo->ext_listen_interval = 3000; //pwdinfo->ext_listen_period = 400; pwdinfo->ext_listen_interval = 1000; pwdinfo->ext_listen_period = 1000; #endif //!CONFIG_IOCTL_CFG80211 #endif // Commented by Kurt 20130319 // For WiDi purpose: Use CFG80211 interface but controled WFD/RDS frame by driver itself. #ifdef CONFIG_IOCTL_CFG80211 pwdinfo->driver_interface = DRIVER_CFG80211; #else pwdinfo->driver_interface = DRIVER_WEXT; #endif //CONFIG_IOCTL_CFG80211 pwdinfo->wfd_tdls_enable = 0; _rtw_memset( pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN ); _rtw_memset( pwdinfo->p2p_peer_device_addr, 0x00, ETH_ALEN ); pwdinfo->rx_invitereq_info.operation_ch[0] = 0; pwdinfo->rx_invitereq_info.operation_ch[1] = 0; // Used to indicate the scan end in site survey function #ifdef CONFIG_P2P_OP_CHK_SOCIAL_CH pwdinfo->rx_invitereq_info.operation_ch[2] = 0; pwdinfo->rx_invitereq_info.operation_ch[3] = 0; pwdinfo->rx_invitereq_info.operation_ch[4] = 0; #endif //CONFIG_P2P_OP_CHK_SOCIAL_CH pwdinfo->rx_invitereq_info.scan_op_ch_only = 0; pwdinfo->p2p_info.operation_ch[0] = 0; pwdinfo->p2p_info.operation_ch[1] = 0; // Used to indicate the scan end in site survey function #ifdef CONFIG_P2P_OP_CHK_SOCIAL_CH pwdinfo->p2p_info.operation_ch[2] = 0; pwdinfo->p2p_info.operation_ch[3] = 0; pwdinfo->p2p_info.operation_ch[4] = 0; #endif //CONFIG_P2P_OP_CHK_SOCIAL_CH pwdinfo->p2p_info.scan_op_ch_only = 0; } #ifdef CONFIG_DBG_P2P /** * rtw_p2p_role_txt - Get the p2p role name as a text string * @role: P2P role * Returns: The state name as a printable text string */ const char * rtw_p2p_role_txt(enum P2P_ROLE role) { switch (role) { case P2P_ROLE_DISABLE: return "P2P_ROLE_DISABLE"; case P2P_ROLE_DEVICE: return "P2P_ROLE_DEVICE"; case P2P_ROLE_CLIENT: return "P2P_ROLE_CLIENT"; case P2P_ROLE_GO: return "P2P_ROLE_GO"; default: return "UNKNOWN"; } } /** * rtw_p2p_state_txt - Get the p2p state name as a text string * @state: P2P state * Returns: The state name as a printable text string */ const char * rtw_p2p_state_txt(enum P2P_STATE state) { switch (state) { case P2P_STATE_NONE: return "P2P_STATE_NONE"; case P2P_STATE_IDLE: return "P2P_STATE_IDLE"; case P2P_STATE_LISTEN: return "P2P_STATE_LISTEN"; case P2P_STATE_SCAN: return "P2P_STATE_SCAN"; case P2P_STATE_FIND_PHASE_LISTEN: return "P2P_STATE_FIND_PHASE_LISTEN"; case P2P_STATE_FIND_PHASE_SEARCH: return "P2P_STATE_FIND_PHASE_SEARCH"; case P2P_STATE_TX_PROVISION_DIS_REQ: return "P2P_STATE_TX_PROVISION_DIS_REQ"; case P2P_STATE_RX_PROVISION_DIS_RSP: return "P2P_STATE_RX_PROVISION_DIS_RSP"; case P2P_STATE_RX_PROVISION_DIS_REQ: return "P2P_STATE_RX_PROVISION_DIS_REQ"; case P2P_STATE_GONEGO_ING: return "P2P_STATE_GONEGO_ING"; case P2P_STATE_GONEGO_OK: return "P2P_STATE_GONEGO_OK"; case P2P_STATE_GONEGO_FAIL: return "P2P_STATE_GONEGO_FAIL"; case P2P_STATE_RECV_INVITE_REQ_MATCH: return "P2P_STATE_RECV_INVITE_REQ_MATCH"; case P2P_STATE_PROVISIONING_ING: return "P2P_STATE_PROVISIONING_ING"; case P2P_STATE_PROVISIONING_DONE: return "P2P_STATE_PROVISIONING_DONE"; case P2P_STATE_TX_INVITE_REQ: return "P2P_STATE_TX_INVITE_REQ"; case P2P_STATE_RX_INVITE_RESP_OK: return "P2P_STATE_RX_INVITE_RESP_OK"; case P2P_STATE_RECV_INVITE_REQ_DISMATCH: return "P2P_STATE_RECV_INVITE_REQ_DISMATCH"; case P2P_STATE_RECV_INVITE_REQ_GO: return "P2P_STATE_RECV_INVITE_REQ_GO"; case P2P_STATE_RECV_INVITE_REQ_JOIN: return "P2P_STATE_RECV_INVITE_REQ_JOIN"; case P2P_STATE_RX_INVITE_RESP_FAIL: return "P2P_STATE_RX_INVITE_RESP_FAIL"; case P2P_STATE_RX_INFOR_NOREADY: return "P2P_STATE_RX_INFOR_NOREADY"; case P2P_STATE_TX_INFOR_NOREADY: return "P2P_STATE_TX_INFOR_NOREADY"; default: return "UNKNOWN"; } } void dbg_rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line) { if(!_rtw_p2p_chk_state(wdinfo, state)) { enum P2P_STATE old_state = _rtw_p2p_state(wdinfo); _rtw_p2p_set_state(wdinfo, state); DBG_871X("[CONFIG_DBG_P2P]%s:%d set_state from %s to %s\n", caller, line , rtw_p2p_state_txt(old_state), rtw_p2p_state_txt(_rtw_p2p_state(wdinfo)) ); } else { DBG_871X("[CONFIG_DBG_P2P]%s:%d set_state to same state %s\n", caller, line , rtw_p2p_state_txt(_rtw_p2p_state(wdinfo)) ); } } void dbg_rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line) { if(_rtw_p2p_pre_state(wdinfo) != state) { enum P2P_STATE old_state = _rtw_p2p_pre_state(wdinfo); _rtw_p2p_set_pre_state(wdinfo, state); DBG_871X("[CONFIG_DBG_P2P]%s:%d set_pre_state from %s to %s\n", caller, line , rtw_p2p_state_txt(old_state), rtw_p2p_state_txt(_rtw_p2p_pre_state(wdinfo)) ); } else { DBG_871X("[CONFIG_DBG_P2P]%s:%d set_pre_state to same state %s\n", caller, line , rtw_p2p_state_txt(_rtw_p2p_pre_state(wdinfo)) ); } } #if 0 void dbg_rtw_p2p_restore_state(struct wifidirect_info *wdinfo, const char *caller, int line) { if(wdinfo->pre_p2p_state != -1) { DBG_871X("[CONFIG_DBG_P2P]%s:%d restore from %s to %s\n", caller, line , p2p_state_str[wdinfo->p2p_state], p2p_state_str[wdinfo->pre_p2p_state] ); _rtw_p2p_restore_state(wdinfo); } else { DBG_871X("[CONFIG_DBG_P2P]%s:%d restore no pre state, cur state %s\n", caller, line , p2p_state_str[wdinfo->p2p_state] ); } } #endif void dbg_rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role, const char *caller, int line) { if(wdinfo->role != role) { enum P2P_ROLE old_role = wdinfo->role; _rtw_p2p_set_role(wdinfo, role); DBG_871X("[CONFIG_DBG_P2P]%s:%d set_role from %s to %s\n", caller, line , rtw_p2p_role_txt(old_role), rtw_p2p_role_txt(wdinfo->role) ); } else { DBG_871X("[CONFIG_DBG_P2P]%s:%d set_role to same role %s\n", caller, line , rtw_p2p_role_txt(wdinfo->role) ); } } #endif //CONFIG_DBG_P2P int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role) { int ret = _SUCCESS; struct wifidirect_info *pwdinfo= &(padapter->wdinfo); if (role == P2P_ROLE_DEVICE || role == P2P_ROLE_CLIENT|| role == P2P_ROLE_GO) { u8 channel, ch_offset; u16 bwmode; #ifdef CONFIG_CONCURRENT_MODE _adapter *pbuddy_adapter = padapter->pbuddy_adapter; struct wifidirect_info *pbuddy_wdinfo = &pbuddy_adapter->wdinfo; // Commented by Albert 2011/12/30 // The driver just supports 1 P2P group operation. // So, this function will do nothing if the buddy adapter had enabled the P2P function. if(!rtw_p2p_chk_state(pbuddy_wdinfo, P2P_STATE_NONE)) { // The buddy adapter had enabled the P2P function. return ret; } #endif //CONFIG_CONCURRENT_MODE //leave IPS/Autosuspend if (_FAIL == rtw_pwr_wakeup(padapter)) { ret = _FAIL; goto exit; } // Added by Albert 2011/03/22 // In the P2P mode, the driver should not support the b mode. // So, the Tx packet shouldn't use the CCK rate update_tx_basic_rate(padapter, WIRELESS_11AGN); //Enable P2P function init_wifidirect_info(padapter, role); rtw_hal_set_odm_var(padapter,HAL_ODM_P2P_STATE,NULL,_TRUE); #ifdef CONFIG_WFD rtw_hal_set_odm_var(padapter,HAL_ODM_WIFI_DISPLAY_STATE,NULL,_TRUE); #endif } else if (role == P2P_ROLE_DISABLE) { #ifdef CONFIG_INTEL_WIDI if( padapter->mlmepriv.p2p_reject_disable == _TRUE ) return ret; #endif //CONFIG_INTEL_WIDI #ifdef CONFIG_IOCTL_CFG80211 if( padapter->wdinfo.driver_interface == DRIVER_CFG80211 ) adapter_wdev_data(padapter)->p2p_enabled = _FALSE; #endif //CONFIG_IOCTL_CFG80211 //Disable P2P function if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { _cancel_timer_ex( &pwdinfo->find_phase_timer ); _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); _cancel_timer_ex( &pwdinfo->reset_ch_sitesurvey); _cancel_timer_ex( &pwdinfo->reset_ch_sitesurvey2); reset_ch_sitesurvey_timer_process( padapter ); reset_ch_sitesurvey_timer_process2( padapter ); #ifdef CONFIG_CONCURRENT_MODE _cancel_timer_ex( &pwdinfo->ap_p2p_switch_timer); #endif rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_NONE); rtw_p2p_set_role(pwdinfo, P2P_ROLE_DISABLE); _rtw_memset(&pwdinfo->rx_prov_disc_info, 0x00, sizeof(struct rx_provdisc_req_info)); /* Remove profiles in wifidirect_info structure. */ _rtw_memset( &pwdinfo->profileinfo[ 0 ], 0x00, sizeof( struct profile_info ) * P2P_MAX_PERSISTENT_GROUP_NUM ); pwdinfo->profileindex = 0; } rtw_hal_set_odm_var(padapter,HAL_ODM_P2P_STATE,NULL,_FALSE); #ifdef CONFIG_WFD rtw_hal_set_odm_var(padapter,HAL_ODM_WIFI_DISPLAY_STATE,NULL,_FALSE); #endif if (_FAIL == rtw_pwr_wakeup(padapter)) { ret = _FAIL; goto exit; } //Restore to initial setting. update_tx_basic_rate(padapter, padapter->registrypriv.wireless_mode); #ifdef CONFIG_INTEL_WIDI rtw_reset_widi_info(padapter); #endif //CONFIG_INTEL_WIDI //For WiDi purpose. #ifdef CONFIG_IOCTL_CFG80211 pwdinfo->driver_interface = DRIVER_CFG80211; #else pwdinfo->driver_interface = DRIVER_WEXT; #endif //CONFIG_IOCTL_CFG80211 } exit: return ret; } #endif //CONFIG_P2P rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_pwrctrl.c000066400000000000000000002012521261122257400211660ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_PWRCTRL_C_ #include #include int rtw_fw_ps_state(PADAPTER padapter) { struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; int ret=_FAIL, dont_care=0; u16 fw_ps_state=0; u32 start_time; struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct registry_priv *registry_par = &padapter->registrypriv; if(registry_par->check_fw_ps != 1) return _SUCCESS; _enter_pwrlock(&pwrpriv->check_32k_lock); if ((padapter->bSurpriseRemoved == _TRUE)) { DBG_871X("%s: bSurpriseRemoved=%d , hw_init_completed=%d, bDriverStopped=%d \n", __FUNCTION__, padapter->bSurpriseRemoved, padapter->hw_init_completed,padapter->bDriverStopped); goto exit_fw_ps_state; } rtw_hal_set_hwreg(padapter, HW_VAR_SET_REQ_FW_PS, (u8 *)&dont_care); { //4. if 0x88[7]=1, driver set cmd to leave LPS/IPS. //Else, hw will keep in active mode. //debug info: //0x88[7] = 32kpermission, //0x88[6:0] = current_ps_state //0x89[7:0] = last_rpwm rtw_hal_get_hwreg(padapter, HW_VAR_FW_PS_STATE, (u8 *)&fw_ps_state); if((fw_ps_state & 0x80) == 0) ret=_SUCCESS; else { pdbgpriv->dbg_poll_fail_cnt++; DBG_871X("%s: fw_ps_state=%04x \n", __FUNCTION__, fw_ps_state); } } exit_fw_ps_state: _exit_pwrlock(&pwrpriv->check_32k_lock); return ret; } #ifdef CONFIG_IPS void _ips_enter(_adapter * padapter) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); pwrpriv->bips_processing = _TRUE; // syn ips_mode with request pwrpriv->ips_mode = pwrpriv->ips_mode_req; pwrpriv->ips_enter_cnts++; DBG_871X("==>ips_enter cnts:%d\n",pwrpriv->ips_enter_cnts); if(rf_off == pwrpriv->change_rfpwrstate ) { pwrpriv->bpower_saving = _TRUE; DBG_871X_LEVEL(_drv_always_, "nolinked power save enter\n"); if(pwrpriv->ips_mode == IPS_LEVEL_2) pwrpriv->bkeepfwalive = _TRUE; rtw_ips_pwr_down(padapter); pwrpriv->rf_pwrstate = rf_off; } pwrpriv->bips_processing = _FALSE; } void ips_enter(_adapter * padapter) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); #ifdef CONFIG_BT_COEXIST rtw_btcoex_IpsNotify(padapter, pwrpriv->ips_mode_req); #endif // CONFIG_BT_COEXIST _enter_pwrlock(&pwrpriv->lock); _ips_enter(padapter); _exit_pwrlock(&pwrpriv->lock); } int _ips_leave(_adapter * padapter) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); int result = _SUCCESS; if((pwrpriv->rf_pwrstate == rf_off) &&(!pwrpriv->bips_processing)) { pwrpriv->bips_processing = _TRUE; pwrpriv->change_rfpwrstate = rf_on; pwrpriv->ips_leave_cnts++; DBG_871X("==>ips_leave cnts:%d\n",pwrpriv->ips_leave_cnts); if ((result = rtw_ips_pwr_up(padapter)) == _SUCCESS) { pwrpriv->rf_pwrstate = rf_on; } DBG_871X_LEVEL(_drv_always_, "nolinked power save leave\n"); DBG_871X("==> ips_leave.....LED(0x%08x)...\n",rtw_read32(padapter,0x4c)); pwrpriv->bips_processing = _FALSE; pwrpriv->bkeepfwalive = _FALSE; pwrpriv->bpower_saving = _FALSE; } return result; } int ips_leave(_adapter * padapter) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; int ret; if(!is_primary_adapter(padapter)) return _SUCCESS; _enter_pwrlock(&pwrpriv->lock); ret = _ips_leave(padapter); #ifdef DBG_CHECK_FW_PS_STATE if(rtw_fw_ps_state(padapter) == _FAIL) { DBG_871X("ips leave doesn't leave 32k\n"); pdbgpriv->dbg_leave_ips_fail_cnt++; } #endif //DBG_CHECK_FW_PS_STATE _exit_pwrlock(&pwrpriv->lock); if (_SUCCESS == ret) ODM_DMReset(&GET_HAL_DATA(padapter)->odmpriv); #ifdef CONFIG_BT_COEXIST if (_SUCCESS == ret) rtw_btcoex_IpsNotify(padapter, IPS_NONE); #endif // CONFIG_BT_COEXIST return ret; } #endif /* CONFIG_IPS */ #ifdef CONFIG_AUTOSUSPEND extern void autosuspend_enter(_adapter* padapter); extern int autoresume_enter(_adapter* padapter); #endif #ifdef SUPPORT_HW_RFOFF_DETECTED int rtw_hw_suspend(_adapter *padapter ); int rtw_hw_resume(_adapter *padapter); #endif bool rtw_pwr_unassociated_idle(_adapter *adapter) { _adapter *buddy = adapter->pbuddy_adapter; struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); struct xmit_priv *pxmit_priv = &adapter->xmitpriv; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &(adapter->wdinfo); #ifdef CONFIG_IOCTL_CFG80211 struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &adapter->cfg80211_wdinfo; #endif #endif bool ret = _FALSE; if (adapter_to_pwrctl(adapter)->bpower_saving ==_TRUE ) { //DBG_871X("%s: already in LPS or IPS mode\n", __func__); goto exit; } if (adapter_to_pwrctl(adapter)->ips_deny_time >= rtw_get_current_time()) { //DBG_871X("%s ips_deny_time\n", __func__); goto exit; } if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE|WIFI_SITE_MONITOR) || check_fwstate(pmlmepriv, WIFI_UNDER_LINKING|WIFI_UNDER_WPS) || check_fwstate(pmlmepriv, WIFI_AP_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_ADHOC_STATE) #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) && defined(CONFIG_P2P_IPS) || pcfg80211_wdinfo->is_ro_ch #elif defined(CONFIG_P2P) || !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) #endif #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) || rtw_get_passing_time_ms(pcfg80211_wdinfo->last_ro_ch_time) < 3000 #endif ) { goto exit; } /* consider buddy, if exist */ if (buddy) { struct mlme_priv *b_pmlmepriv = &(buddy->mlmepriv); #ifdef CONFIG_P2P struct wifidirect_info *b_pwdinfo = &(buddy->wdinfo); #ifdef CONFIG_IOCTL_CFG80211 struct cfg80211_wifidirect_info *b_pcfg80211_wdinfo = &buddy->cfg80211_wdinfo; #endif #endif if (check_fwstate(b_pmlmepriv, WIFI_ASOC_STATE|WIFI_SITE_MONITOR) || check_fwstate(b_pmlmepriv, WIFI_UNDER_LINKING|WIFI_UNDER_WPS) || check_fwstate(b_pmlmepriv, WIFI_AP_STATE) || check_fwstate(b_pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_ADHOC_STATE) #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) && defined(CONFIG_P2P_IPS) || b_pcfg80211_wdinfo->is_ro_ch #elif defined(CONFIG_P2P) || !rtw_p2p_chk_state(b_pwdinfo, P2P_STATE_NONE) #endif #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) || rtw_get_passing_time_ms(b_pcfg80211_wdinfo->last_ro_ch_time) < 3000 #endif ) { goto exit; } } #if (MP_DRIVER == 1) if (adapter->registrypriv.mp_mode == 1) goto exit; #endif #ifdef CONFIG_INTEL_PROXIM if(adapter->proximity.proxim_on==_TRUE){ return; } #endif if (pxmit_priv->free_xmitbuf_cnt != NR_XMITBUFF || pxmit_priv->free_xmit_extbuf_cnt != NR_XMIT_EXTBUFF) { DBG_871X_LEVEL(_drv_always_, "There are some pkts to transmit\n"); DBG_871X_LEVEL(_drv_always_, "free_xmitbuf_cnt: %d, free_xmit_extbuf_cnt: %d\n", pxmit_priv->free_xmitbuf_cnt, pxmit_priv->free_xmit_extbuf_cnt); goto exit; } ret = _TRUE; exit: return ret; } /* * ATTENTION: * rtw_ps_processor() doesn't handle LPS. */ void rtw_ps_processor(_adapter*padapter) { #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); #endif //CONFIG_P2P struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; #ifdef SUPPORT_HW_RFOFF_DETECTED rt_rf_power_state rfpwrstate; #endif //SUPPORT_HW_RFOFF_DETECTED u32 ps_deny = 0; _enter_pwrlock(&adapter_to_pwrctl(padapter)->lock); ps_deny = rtw_ps_deny_get(padapter); _exit_pwrlock(&adapter_to_pwrctl(padapter)->lock); if (ps_deny != 0) { DBG_871X(FUNC_ADPT_FMT ": ps_deny=0x%08X, skip power save!\n", FUNC_ADPT_ARG(padapter), ps_deny); goto exit; } if(pwrpriv->bInSuspend == _TRUE){//system suspend or autosuspend pdbgpriv->dbg_ps_insuspend_cnt++; DBG_871X("%s, pwrpriv->bInSuspend == _TRUE ignore this process\n",__FUNCTION__); return; } pwrpriv->ps_processing = _TRUE; #ifdef SUPPORT_HW_RFOFF_DETECTED if(pwrpriv->bips_processing == _TRUE) goto exit; //DBG_871X("==> fw report state(0x%x)\n",rtw_read8(padapter,0x1ca)); if(pwrpriv->bHWPwrPindetect) { #ifdef CONFIG_AUTOSUSPEND if(padapter->registrypriv.usbss_enable) { if(pwrpriv->rf_pwrstate == rf_on) { if(padapter->net_closed == _TRUE) pwrpriv->ps_flag = _TRUE; rfpwrstate = RfOnOffDetect(padapter); DBG_871X("@@@@- #1 %s==> rfstate:%s \n",__FUNCTION__,(rfpwrstate==rf_on)?"rf_on":"rf_off"); if(rfpwrstate!= pwrpriv->rf_pwrstate) { if(rfpwrstate == rf_off) { pwrpriv->change_rfpwrstate = rf_off; pwrpriv->bkeepfwalive = _TRUE; pwrpriv->brfoffbyhw = _TRUE; autosuspend_enter(padapter); } } } } else #endif //CONFIG_AUTOSUSPEND { rfpwrstate = RfOnOffDetect(padapter); DBG_871X("@@@@- #2 %s==> rfstate:%s \n",__FUNCTION__,(rfpwrstate==rf_on)?"rf_on":"rf_off"); if(rfpwrstate!= pwrpriv->rf_pwrstate) { if(rfpwrstate == rf_off) { pwrpriv->change_rfpwrstate = rf_off; pwrpriv->brfoffbyhw = _TRUE; padapter->bCardDisableWOHSM = _TRUE; rtw_hw_suspend(padapter ); } else { pwrpriv->change_rfpwrstate = rf_on; rtw_hw_resume(padapter ); } DBG_871X("current rf_pwrstate(%s)\n",(pwrpriv->rf_pwrstate == rf_off)?"rf_off":"rf_on"); } } pwrpriv->pwr_state_check_cnts ++; } #endif //SUPPORT_HW_RFOFF_DETECTED if (pwrpriv->ips_mode_req == IPS_NONE) goto exit; if (rtw_pwr_unassociated_idle(padapter) == _FALSE) goto exit; if((pwrpriv->rf_pwrstate == rf_on) && ((pwrpriv->pwr_state_check_cnts%4)==0)) { DBG_871X("==>%s .fw_state(%x)\n",__FUNCTION__,get_fwstate(pmlmepriv)); #if defined (CONFIG_BT_COEXIST)&& defined (CONFIG_AUTOSUSPEND) #else pwrpriv->change_rfpwrstate = rf_off; #endif #ifdef CONFIG_AUTOSUSPEND if(padapter->registrypriv.usbss_enable) { if(pwrpriv->bHWPwrPindetect) pwrpriv->bkeepfwalive = _TRUE; if(padapter->net_closed == _TRUE) pwrpriv->ps_flag = _TRUE; #if defined (CONFIG_BT_COEXIST)&& defined (CONFIG_AUTOSUSPEND) if (_TRUE==pwrpriv->bInternalAutoSuspend) { DBG_871X("<==%s .pwrpriv->bInternalAutoSuspend)(%x)\n",__FUNCTION__,pwrpriv->bInternalAutoSuspend); } else { pwrpriv->change_rfpwrstate = rf_off; padapter->bCardDisableWOHSM = _TRUE; DBG_871X("<==%s .pwrpriv->bInternalAutoSuspend)(%x) call autosuspend_enter\n",__FUNCTION__,pwrpriv->bInternalAutoSuspend); autosuspend_enter(padapter); } #else padapter->bCardDisableWOHSM = _TRUE; autosuspend_enter(padapter); #endif //if defined (CONFIG_BT_COEXIST)&& defined (CONFIG_AUTOSUSPEND) } else if(pwrpriv->bHWPwrPindetect) { } else #endif //CONFIG_AUTOSUSPEND { #if defined (CONFIG_BT_COEXIST)&& defined (CONFIG_AUTOSUSPEND) pwrpriv->change_rfpwrstate = rf_off; #endif //defined (CONFIG_BT_COEXIST)&& defined (CONFIG_AUTOSUSPEND) #ifdef CONFIG_IPS ips_enter(padapter); #endif } } exit: #ifndef CONFIG_IPS_CHECK_IN_WD rtw_set_pwr_state_check_timer(pwrpriv); #endif pwrpriv->ps_processing = _FALSE; return; } void pwr_state_check_handler(RTW_TIMER_HDL_ARGS); void pwr_state_check_handler(RTW_TIMER_HDL_ARGS) { _adapter *padapter = (_adapter *)FunctionContext; rtw_ps_cmd(padapter); } #ifdef CONFIG_LPS void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets) { #ifdef CONFIG_CHECK_LEAVE_LPS static u32 start_time = 0; static u32 xmit_cnt = 0; u8 bLeaveLPS = _FALSE; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; if(tx) //from tx { xmit_cnt += tx_packets; if (start_time== 0) start_time= rtw_get_current_time(); if (rtw_get_passing_time_ms(start_time) > 2000) // 2 sec == watch dog timer { if(xmit_cnt > 8) { if ((adapter_to_pwrctl(padapter)->bLeisurePs) && (adapter_to_pwrctl(padapter)->pwr_mode != PS_MODE_ACTIVE) #ifdef CONFIG_BT_COEXIST && (rtw_btcoex_IsBtControlLps(padapter) == _FALSE) #endif ) { DBG_871X("leave lps via Tx = %d\n", xmit_cnt); bLeaveLPS = _TRUE; } } start_time= rtw_get_current_time(); xmit_cnt = 0; } } else // from rx path { if(pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 4/*2*/) { if ((adapter_to_pwrctl(padapter)->bLeisurePs) && (adapter_to_pwrctl(padapter)->pwr_mode != PS_MODE_ACTIVE) #ifdef CONFIG_BT_COEXIST && (rtw_btcoex_IsBtControlLps(padapter) == _FALSE) #endif ) { DBG_871X("leave lps via Rx = %d\n", pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); bLeaveLPS = _TRUE; } } } if(bLeaveLPS) { //DBG_871X("leave lps via %s, Tx = %d, Rx = %d \n", tx?"Tx":"Rx", pmlmepriv->LinkDetectInfo.NumTxOkInPeriod,pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); //rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1); rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, tx?0:1); } #endif //CONFIG_CHECK_LEAVE_LPS } /* * Description: * This function MUST be called under power lock protect * * Parameters * padapter * pslv power state level, only could be PS_STATE_S0 ~ PS_STATE_S4 * */ void rtw_set_rpwm(PADAPTER padapter, u8 pslv) { u8 rpwm; struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); #ifdef CONFIG_DETECT_CPWM_BY_POLLING u8 cpwm_orig; #endif // CONFIG_DETECT_CPWM_BY_POLLING struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; _func_enter_; pslv = PS_STATE(pslv); #ifdef CONFIG_LPS_RPWM_TIMER if (pwrpriv->brpwmtimeout == _TRUE) { DBG_871X("%s: RPWM timeout, force to set RPWM(0x%02X) again!\n", __FUNCTION__, pslv); } else #endif // CONFIG_LPS_RPWM_TIMER { if ( (pwrpriv->rpwm == pslv) #ifdef CONFIG_LPS_LCLK #ifndef CONFIG_RTL8723A || ((pwrpriv->rpwm >= PS_STATE_S2)&&(pslv >= PS_STATE_S2)) #endif #endif ) { RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_, ("%s: Already set rpwm[0x%02X], new=0x%02X!\n", __FUNCTION__, pwrpriv->rpwm, pslv)); return; } } if ((padapter->bSurpriseRemoved == _TRUE) || (padapter->hw_init_completed == _FALSE)) { RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_, ("%s: SurpriseRemoved(%d) hw_init_completed(%d)\n", __FUNCTION__, padapter->bSurpriseRemoved, padapter->hw_init_completed)); pwrpriv->cpwm = PS_STATE_S4; return; } if (padapter->bDriverStopped == _TRUE) { RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_, ("%s: change power state(0x%02X) when DriverStopped\n", __FUNCTION__, pslv)); if (pslv < PS_STATE_S2) { RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_, ("%s: Reject to enter PS_STATE(0x%02X) lower than S2 when DriverStopped!!\n", __FUNCTION__, pslv)); return; } } rpwm = pslv | pwrpriv->tog; #ifdef CONFIG_LPS_LCLK // only when from PS_STATE S0/S1 to S2 and higher needs ACK if ((pwrpriv->cpwm < PS_STATE_S2) && (pslv >= PS_STATE_S2)) rpwm |= PS_ACK; #endif RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ("rtw_set_rpwm: rpwm=0x%02x cpwm=0x%02x\n", rpwm, pwrpriv->cpwm)); pwrpriv->rpwm = pslv; #ifdef CONFIG_DETECT_CPWM_BY_POLLING cpwm_orig = 0; if (rpwm & PS_ACK) { rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_orig); } #endif #if defined(CONFIG_LPS_RPWM_TIMER) && !defined(CONFIG_DETECT_CPWM_BY_POLLING) if (rpwm & PS_ACK) _set_timer(&pwrpriv->pwr_rpwm_timer, LPS_RPWM_WAIT_MS); #endif // CONFIG_LPS_RPWM_TIMER & !CONFIG_DETECT_CPWM_BY_POLLING rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm)); pwrpriv->tog += 0x80; #ifdef CONFIG_LPS_LCLK // No LPS 32K, No Ack if (rpwm & PS_ACK) { #ifdef CONFIG_DETECT_CPWM_BY_POLLING u32 start_time; u8 cpwm_now; u8 poll_cnt=0; start_time = rtw_get_current_time(); // polling cpwm do { rtw_msleep_os(1); poll_cnt++; rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_now); if ((cpwm_orig ^ cpwm_now) & 0x80) { #ifdef CONFIG_RTL8723A pwrpriv->cpwm = PS_STATE(cpwm_now); #else // !CONFIG_RTL8723A pwrpriv->cpwm = PS_STATE_S4; #endif // !CONFIG_RTL8723A pwrpriv->cpwm_tog = cpwm_now & PS_TOGGLE; #ifdef DBG_CHECK_FW_PS_STATE DBG_871X("%s: polling cpwm OK! poll_cnt=%d, cpwm_orig=%02x, cpwm_now=%02x , 0x100=0x%x\n" , __FUNCTION__,poll_cnt, cpwm_orig, cpwm_now, rtw_read8(padapter, REG_CR)); if(rtw_fw_ps_state(padapter) == _FAIL) { DBG_871X("leave 32k but fw state in 32k\n"); pdbgpriv->dbg_rpwm_toogle_cnt++; } #endif //DBG_CHECK_FW_PS_STATE break; } if (rtw_get_passing_time_ms(start_time) > LPS_RPWM_WAIT_MS) { DBG_871X("%s: polling cpwm timeout! poll_cnt=%d, cpwm_orig=%02x, cpwm_now=%02x \n", __FUNCTION__,poll_cnt, cpwm_orig, cpwm_now); #ifdef DBG_CHECK_FW_PS_STATE if(rtw_fw_ps_state(padapter) == _FAIL) { DBG_871X("rpwm timeout and fw ps state in 32k\n"); pdbgpriv->dbg_rpwm_timeout_fail_cnt++; } #endif //DBG_CHECK_FW_PS_STATE #ifdef CONFIG_LPS_RPWM_TIMER _set_timer(&pwrpriv->pwr_rpwm_timer, 1); #endif // CONFIG_LPS_RPWM_TIMER break; } } while (1); #endif // CONFIG_DETECT_CPWM_BY_POLLING } else #endif // CONFIG_LPS_LCLK { pwrpriv->cpwm = pslv; } _func_exit_; } u8 PS_RDY_CHECK(_adapter * padapter) { u32 curr_time, delta_time; struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &(padapter->wdinfo); #ifdef CONFIG_IOCTL_CFG80211 struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; #endif /* CONFIG_IOCTL_CFG80211 */ #endif /* CONFIG_P2P */ #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) if(_TRUE == pwrpriv->bInSuspend && pwrpriv->wowlan_mode) return _TRUE; else if(_TRUE == pwrpriv->bInSuspend && pwrpriv->wowlan_ap_mode) return _TRUE; else if (_TRUE == pwrpriv->bInSuspend) return _FALSE; #else if(_TRUE == pwrpriv->bInSuspend ) return _FALSE; #endif curr_time = rtw_get_current_time(); delta_time = curr_time -pwrpriv->DelayLPSLastTimeStamp; if(delta_time < LPS_DELAY_TIME) { return _FALSE; } if (check_fwstate(pmlmepriv, WIFI_SITE_MONITOR) || check_fwstate(pmlmepriv, WIFI_UNDER_LINKING|WIFI_UNDER_WPS) || check_fwstate(pmlmepriv, WIFI_AP_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_ADHOC_STATE) #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) && defined(CONFIG_P2P_IPS) || pcfg80211_wdinfo->is_ro_ch #elif defined(CONFIG_P2P) || !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) #endif || rtw_is_scan_deny(padapter) #ifdef CONFIG_TDLS // TDLS link is established. || ( padapter->tdlsinfo.link_established == _TRUE ) #endif // CONFIG_TDLS ) return _FALSE; if( (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) && (padapter->securitypriv.binstallGrpkey == _FALSE) ) { DBG_871X("Group handshake still in progress !!!\n"); return _FALSE; } #ifdef CONFIG_IOCTL_CFG80211 if (!rtw_cfg80211_pwr_mgmt(padapter)) return _FALSE; #endif return _TRUE; } void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); #endif //CONFIG_P2P #ifdef CONFIG_TDLS struct sta_priv *pstapriv = &padapter->stapriv; _irqL irqL; int i, j; _list *plist, *phead; struct sta_info *ptdls_sta; #endif //CONFIG_TDLS _func_enter_; RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ("%s: PowerMode=%d Smart_PS=%d\n", __FUNCTION__, ps_mode, smart_ps)); if(ps_mode > PM_Card_Disable) { RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("ps_mode:%d error\n", ps_mode)); return; } if (pwrpriv->pwr_mode == ps_mode) { if (PS_MODE_ACTIVE == ps_mode) return; #ifndef CONFIG_BT_COEXIST if ((pwrpriv->smart_ps == smart_ps) && (pwrpriv->bcn_ant_mode == bcn_ant_mode)) { return; } #endif // !CONFIG_BT_COEXIST } #ifdef CONFIG_LPS_LCLK _enter_pwrlock(&pwrpriv->lock); #endif //if(pwrpriv->pwr_mode == PS_MODE_ACTIVE) if(ps_mode == PS_MODE_ACTIVE) { if (1 #ifdef CONFIG_BT_COEXIST && (((rtw_btcoex_IsBtControlLps(padapter) == _FALSE) #ifdef CONFIG_P2P_PS && (pwdinfo->opp_ps == 0) #endif // CONFIG_P2P_PS ) || ((rtw_btcoex_IsBtControlLps(padapter) == _TRUE) && (rtw_btcoex_IsLpsOn(padapter) == _FALSE)) ) #else // !CONFIG_BT_COEXIST #ifdef CONFIG_P2P_PS && (pwdinfo->opp_ps == 0) #endif // CONFIG_P2P_PS #endif // !CONFIG_BT_COEXIST ) { DBG_871X(FUNC_ADPT_FMT" Leave 802.11 power save - %s\n", FUNC_ADPT_ARG(padapter), msg); #ifdef CONFIG_TDLS _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); for(i=0; i< NUM_STA; i++) { phead = &(pstapriv->sta_hash[i]); plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { ptdls_sta = LIST_CONTAINOR(plist, struct sta_info, hash_list); if( ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE ) issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta->hwaddr, 0, 0, 0); plist = get_next(plist); } } _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); #endif //CONFIG_TDLS pwrpriv->pwr_mode = ps_mode; rtw_set_rpwm(padapter, PS_STATE_S4); #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) if (pwrpriv->wowlan_mode == _TRUE || pwrpriv->wowlan_ap_mode == _TRUE) { u32 start_time, delay_ms; u8 val8; delay_ms = 20; start_time = rtw_get_current_time(); do { rtw_hal_get_hwreg(padapter, HW_VAR_SYS_CLKR, &val8); if (!(val8 & BIT(4))){ //0x08 bit4 =1 --> in 32k, bit4 = 0 --> leave 32k pwrpriv->cpwm = PS_STATE_S4; break; } if (rtw_get_passing_time_ms(start_time) > delay_ms) { DBG_871X("%s: Wait for FW 32K leave more than %u ms!!!\n", __FUNCTION__, delay_ms); pdbgpriv->dbg_wow_leave_ps_fail_cnt++; break; } rtw_usleep_os(100); } while (1); } #endif rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode)); pwrpriv->bFwCurrentInPSMode = _FALSE; #ifdef CONFIG_BT_COEXIST rtw_btcoex_LpsNotify(padapter, ps_mode); #endif // CONFIG_BT_COEXIST } } else { if ((PS_RDY_CHECK(padapter) && check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE)) #ifdef CONFIG_BT_COEXIST || ((rtw_btcoex_IsBtControlLps(padapter) == _TRUE) && (rtw_btcoex_IsLpsOn(padapter) == _TRUE)) #endif ) { u8 pslv; DBG_871X(FUNC_ADPT_FMT" Enter 802.11 power save - %s\n", FUNC_ADPT_ARG(padapter), msg); #ifdef CONFIG_TDLS _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); for(i=0; i< NUM_STA; i++) { phead = &(pstapriv->sta_hash[i]); plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { ptdls_sta = LIST_CONTAINOR(plist, struct sta_info, hash_list); if( ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE ) issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta->hwaddr, 1, 0, 0); plist = get_next(plist); } } _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); #endif //CONFIG_TDLS #ifdef CONFIG_BT_COEXIST rtw_btcoex_LpsNotify(padapter, ps_mode); #endif // CONFIG_BT_COEXIST pwrpriv->bFwCurrentInPSMode = _TRUE; pwrpriv->pwr_mode = ps_mode; pwrpriv->smart_ps = smart_ps; pwrpriv->bcn_ant_mode = bcn_ant_mode; rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode)); #ifdef CONFIG_P2P_PS // Set CTWindow after LPS if(pwdinfo->opp_ps == 1) p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 0); #endif //CONFIG_P2P_PS pslv = PS_STATE_S2; #ifdef CONFIG_LPS_LCLK if (pwrpriv->alives == 0) pslv = PS_STATE_S0; #endif // CONFIG_LPS_LCLK #ifdef CONFIG_BT_COEXIST if ((rtw_btcoex_IsBtDisabled(padapter) == _FALSE) && (rtw_btcoex_IsBtControlLps(padapter) == _TRUE)) { u8 val8; val8 = rtw_btcoex_LpsVal(padapter); if (val8 & BIT(4)) pslv = PS_STATE_S2; #ifdef CONFIG_RTL8723A val8 = rtw_btcoex_RpwmVal(padapter); switch (val8) { case 0x4: pslv = PS_STATE_S3; break; case 0xC: pslv = PS_STATE_S4; break; } #endif // CONFIG_RTL8723A } #endif // CONFIG_BT_COEXIST rtw_set_rpwm(padapter, pslv); } } #ifdef CONFIG_LPS_LCLK _exit_pwrlock(&pwrpriv->lock); #endif _func_exit_; } /* * Return: * 0: Leave OK * -1: Timeout * -2: Other error */ s32 LPS_RF_ON_check(PADAPTER padapter, u32 delay_ms) { u32 start_time; u8 bAwake = _FALSE; s32 err = 0; start_time = rtw_get_current_time(); while (1) { rtw_hal_get_hwreg(padapter, HW_VAR_FWLPS_RF_ON, &bAwake); if (_TRUE == bAwake) break; if (_TRUE == padapter->bSurpriseRemoved) { err = -2; DBG_871X("%s: device surprise removed!!\n", __FUNCTION__); break; } if (rtw_get_passing_time_ms(start_time) > delay_ms) { err = -1; DBG_871X("%s: Wait for FW LPS leave more than %u ms!!!\n", __FUNCTION__, delay_ms); break; } rtw_usleep_os(100); } return err; } // // Description: // Enter the leisure power save mode. // void LPS_Enter(PADAPTER padapter, const char *msg) { struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); _adapter *buddy = padapter->pbuddy_adapter; int n_assoc_iface = 0; int i; char buf[32] = {0}; _func_enter_; // DBG_871X("+LeisurePSEnter\n"); #ifdef CONFIG_BT_COEXIST if (rtw_btcoex_IsBtControlLps(padapter) == _TRUE) return; #endif /* Skip lps enter request if number of assocated adapters is not 1 */ for (i = 0; i < dvobj->iface_nums; i++) { if (check_fwstate(&(dvobj->padapters[i]->mlmepriv), WIFI_ASOC_STATE)) n_assoc_iface++; } if (n_assoc_iface != 1) return; /* Skip lps enter request for adapter not port0 */ if (get_iface_type(padapter) != IFACE_PORT0) return; for (i = 0; i < dvobj->iface_nums; i++) { if (PS_RDY_CHECK(dvobj->padapters[i]) == _FALSE) return; } if (pwrpriv->bLeisurePs) { // Idle for a while if we connect to AP a while ago. if (pwrpriv->LpsIdleCount >= 2) // 4 Sec { if(pwrpriv->pwr_mode == PS_MODE_ACTIVE) { sprintf(buf, "WIFI-%s", msg); pwrpriv->bpower_saving = _TRUE; rtw_set_ps_mode(padapter, pwrpriv->power_mgnt, padapter->registrypriv.smart_ps, 0, buf); } } else pwrpriv->LpsIdleCount++; } // DBG_871X("-LeisurePSEnter\n"); _func_exit_; } // // Description: // Leave the leisure power save mode. // void LPS_Leave(PADAPTER padapter, const char *msg) { #define LPS_LEAVE_TIMEOUT_MS 100 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); u32 start_time; u8 bAwake = _FALSE; char buf[32] = {0}; struct debug_priv *pdbgpriv = &dvobj->drv_dbg; _func_enter_; // DBG_871X("+LeisurePSLeave\n"); #ifdef CONFIG_BT_COEXIST if (rtw_btcoex_IsBtControlLps(padapter) == _TRUE) return; #endif if (pwrpriv->bLeisurePs) { if(pwrpriv->pwr_mode != PS_MODE_ACTIVE) { sprintf(buf, "WIFI-%s", msg); rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, buf); if(pwrpriv->pwr_mode == PS_MODE_ACTIVE) LPS_RF_ON_check(padapter, LPS_LEAVE_TIMEOUT_MS); } } pwrpriv->bpower_saving = _FALSE; #ifdef DBG_CHECK_FW_PS_STATE if(rtw_fw_ps_state(padapter) == _FAIL) { DBG_871X("leave lps, fw in 32k\n"); pdbgpriv->dbg_leave_lps_fail_cnt++; } #endif //DBG_CHECK_FW_PS_STATE // DBG_871X("-LeisurePSLeave\n"); _func_exit_; } #endif void LeaveAllPowerSaveModeDirect(PADAPTER Adapter) { PADAPTER pri_padapter = GET_PRIMARY_ADAPTER(Adapter); struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(Adapter); struct dvobj_priv *psdpriv = Adapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; #ifndef CONFIG_DETECT_CPWM_BY_POLLING u8 cpwm_orig, cpwm_now; u32 start_time; #endif // CONFIG_DETECT_CPWM_BY_POLLING _func_enter_; DBG_871X("%s.....\n",__FUNCTION__); if (_TRUE == Adapter->bSurpriseRemoved) { DBG_871X(FUNC_ADPT_FMT ": bSurpriseRemoved=%d Skip!\n", FUNC_ADPT_ARG(Adapter), Adapter->bSurpriseRemoved); return; } if ((check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) #ifdef CONFIG_CONCURRENT_MODE || (check_buddy_fwstate(Adapter,_FW_LINKED) == _TRUE) #endif ) { //connect if(pwrpriv->pwr_mode == PS_MODE_ACTIVE) { DBG_871X("%s: Driver Already Leave LPS\n",__FUNCTION__); return; } #ifdef CONFIG_LPS_LCLK _enter_pwrlock(&pwrpriv->lock); #ifndef CONFIG_DETECT_CPWM_BY_POLLING cpwm_orig = 0; rtw_hal_get_hwreg(Adapter, HW_VAR_CPWM, &cpwm_orig); #endif //CONFIG_DETECT_CPWM_BY_POLLING rtw_set_rpwm(Adapter, PS_STATE_S4); #ifndef CONFIG_DETECT_CPWM_BY_POLLING start_time = rtw_get_current_time(); // polling cpwm do { rtw_mdelay_os(1); rtw_hal_get_hwreg(Adapter, HW_VAR_CPWM, &cpwm_now); if ((cpwm_orig ^ cpwm_now) & 0x80) { #ifdef CONFIG_RTL8723A pwrpriv->cpwm = PS_STATE(cpwm_now); #else // !CONFIG_RTL8723A pwrpriv->cpwm = PS_STATE_S4; #endif // !CONFIG_RTL8723A pwrpriv->cpwm_tog = cpwm_now & PS_TOGGLE; #ifdef DBG_CHECK_FW_PS_STATE DBG_871X("%s: polling cpwm OK! cpwm_orig=%02x, cpwm_now=%02x, 0x100=0x%x \n" , __FUNCTION__, cpwm_orig, cpwm_now, rtw_read8(Adapter, REG_CR)); if(rtw_fw_ps_state(Adapter) == _FAIL) { DBG_871X("%s: leave 32k but fw state in 32k\n", __FUNCTION__); pdbgpriv->dbg_rpwm_toogle_cnt++; } #endif //DBG_CHECK_FW_PS_STATE break; } if (rtw_get_passing_time_ms(start_time) > LPS_RPWM_WAIT_MS) { DBG_871X("%s: polling cpwm timeout! cpwm_orig=%02x, cpwm_now=%02x \n", __FUNCTION__, cpwm_orig, cpwm_now); #ifdef DBG_CHECK_FW_PS_STATE if(rtw_fw_ps_state(Adapter) == _FAIL) { DBG_871X("rpwm timeout and fw ps state in 32k\n"); pdbgpriv->dbg_rpwm_timeout_fail_cnt++; } #endif //DBG_CHECK_FW_PS_STATE break; } } while (1); #endif // CONFIG_DETECT_CPWM_BY_POLLING _exit_pwrlock(&pwrpriv->lock); #endif #ifdef CONFIG_P2P_PS p2p_ps_wk_cmd(pri_padapter, P2P_PS_DISABLE, 0); #endif //CONFIG_P2P_PS #ifdef CONFIG_LPS rtw_lps_ctrl_wk_cmd(pri_padapter, LPS_CTRL_LEAVE, 0); #endif } else { if(pwrpriv->rf_pwrstate== rf_off) { #ifdef CONFIG_AUTOSUSPEND if(Adapter->registrypriv.usbss_enable) { #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) usb_disable_autosuspend(adapter_to_dvobj(Adapter)->pusbdev); #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,34)) adapter_to_dvobj(Adapter)->pusbdev->autosuspend_disabled = Adapter->bDisableAutosuspend;//autosuspend disabled by the user #endif } else #endif { #if defined(CONFIG_FWLPS_IN_IPS) || defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_RTL8188E) #ifdef CONFIG_IPS if(_FALSE == ips_leave(pri_padapter)) { DBG_871X("======> ips_leave fail.............\n"); } #endif #endif //CONFIG_SWLPS_IN_IPS || (CONFIG_PLATFORM_SPRD && CONFIG_RTL8188E) } } } _func_exit_; } // // Description: Leave all power save mode: LPS, FwLPS, IPS if needed. // Move code to function by tynli. 2010.03.26. // void LeaveAllPowerSaveMode(IN PADAPTER Adapter) { struct dvobj_priv *dvobj = adapter_to_dvobj(Adapter); struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); u8 enqueue = 0; int n_assoc_iface = 0; int i; _func_enter_; //DBG_871X("%s.....\n",__FUNCTION__); if (_FALSE == Adapter->bup) { DBG_871X(FUNC_ADPT_FMT ": bup=%d Skip!\n", FUNC_ADPT_ARG(Adapter), Adapter->bup); return; } if (_TRUE == Adapter->bSurpriseRemoved) { DBG_871X(FUNC_ADPT_FMT ": bSurpriseRemoved=%d Skip!\n", FUNC_ADPT_ARG(Adapter), Adapter->bSurpriseRemoved); return; } for (i = 0; i < dvobj->iface_nums; i++) { if (check_fwstate(&(dvobj->padapters[i]->mlmepriv), WIFI_ASOC_STATE)) n_assoc_iface++; } if (n_assoc_iface) { //connect #ifdef CONFIG_LPS_LCLK enqueue = 1; #endif #ifdef CONFIG_P2P_PS p2p_ps_wk_cmd(Adapter, P2P_PS_DISABLE, enqueue); #endif //CONFIG_P2P_PS #ifdef CONFIG_LPS rtw_lps_ctrl_wk_cmd(Adapter, LPS_CTRL_LEAVE, enqueue); #endif #ifdef CONFIG_LPS_LCLK LPS_Leave_check(Adapter); #endif } else { if(adapter_to_pwrctl(Adapter)->rf_pwrstate== rf_off) { #ifdef CONFIG_AUTOSUSPEND if(Adapter->registrypriv.usbss_enable) { #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) usb_disable_autosuspend(adapter_to_dvobj(Adapter)->pusbdev); #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,34)) adapter_to_dvobj(Adapter)->pusbdev->autosuspend_disabled = Adapter->bDisableAutosuspend;//autosuspend disabled by the user #endif } else #endif { #if defined(CONFIG_FWLPS_IN_IPS) || defined(CONFIG_SWLPS_IN_IPS) || (defined(CONFIG_PLATFORM_SPRD) && defined(CONFIG_RTL8188E)) #ifdef CONFIG_IPS if(_FALSE == ips_leave(Adapter)) { DBG_871X("======> ips_leave fail.............\n"); } #endif #endif //CONFIG_SWLPS_IN_IPS || (CONFIG_PLATFORM_SPRD && CONFIG_RTL8188E) } } } _func_exit_; } #ifdef CONFIG_LPS_LCLK void LPS_Leave_check( PADAPTER padapter) { struct pwrctrl_priv *pwrpriv; u32 start_time; u8 bReady; _func_enter_; pwrpriv = adapter_to_pwrctl(padapter); bReady = _FALSE; start_time = rtw_get_current_time(); rtw_yield_os(); while(1) { _enter_pwrlock(&pwrpriv->lock); if ((padapter->bSurpriseRemoved == _TRUE) || (padapter->hw_init_completed == _FALSE) #ifdef CONFIG_USB_HCI || (padapter->bDriverStopped== _TRUE) #endif || (pwrpriv->pwr_mode == PS_MODE_ACTIVE) ) { bReady = _TRUE; } _exit_pwrlock(&pwrpriv->lock); if(_TRUE == bReady) break; if(rtw_get_passing_time_ms(start_time)>100) { DBG_871X("Wait for cpwm event than 100 ms!!!\n"); break; } rtw_msleep_os(1); } _func_exit_; } /* * Caller:ISR handler... * * This will be called when CPWM interrupt is up. * * using to update cpwn of drv; and drv willl make a decision to up or down pwr level */ void cpwm_int_hdl( PADAPTER padapter, struct reportpwrstate_parm *preportpwrstate) { struct pwrctrl_priv *pwrpriv; _func_enter_; pwrpriv = adapter_to_pwrctl(padapter); #if 0 if (pwrpriv->cpwm_tog == (preportpwrstate->state & PS_TOGGLE)) { RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_, ("cpwm_int_hdl: tog(old)=0x%02x cpwm(new)=0x%02x toggle bit didn't change!?\n", pwrpriv->cpwm_tog, preportpwrstate->state)); goto exit; } #endif _enter_pwrlock(&pwrpriv->lock); #ifdef CONFIG_LPS_RPWM_TIMER if (pwrpriv->rpwm < PS_STATE_S2) { DBG_871X("%s: Redundant CPWM Int. RPWM=0x%02X CPWM=0x%02x\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm); _exit_pwrlock(&pwrpriv->lock); goto exit; } #endif // CONFIG_LPS_RPWM_TIMER pwrpriv->cpwm = PS_STATE(preportpwrstate->state); pwrpriv->cpwm_tog = preportpwrstate->state & PS_TOGGLE; if (pwrpriv->cpwm >= PS_STATE_S2) { if (pwrpriv->alives & CMD_ALIVE) _rtw_up_sema(&padapter->cmdpriv.cmd_queue_sema); if (pwrpriv->alives & XMIT_ALIVE) _rtw_up_sema(&padapter->xmitpriv.xmit_sema); } _exit_pwrlock(&pwrpriv->lock); exit: RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ("cpwm_int_hdl: cpwm=0x%02x\n", pwrpriv->cpwm)); _func_exit_; } static void cpwm_event_callback(struct work_struct *work) { struct pwrctrl_priv *pwrpriv = container_of(work, struct pwrctrl_priv, cpwm_event); struct dvobj_priv *dvobj = pwrctl_to_dvobj(pwrpriv); _adapter *adapter = dvobj->if1; struct reportpwrstate_parm report; //DBG_871X("%s\n",__FUNCTION__); report.state = PS_STATE_S2; cpwm_int_hdl(adapter, &report); } #ifdef CONFIG_LPS_RPWM_TIMER static void rpwmtimeout_workitem_callback(struct work_struct *work) { PADAPTER padapter; struct dvobj_priv *dvobj; struct pwrctrl_priv *pwrpriv; pwrpriv = container_of(work, struct pwrctrl_priv, rpwmtimeoutwi); dvobj = pwrctl_to_dvobj(pwrpriv); padapter = dvobj->if1; // DBG_871X("+%s: rpwm=0x%02X cpwm=0x%02X\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm); _enter_pwrlock(&pwrpriv->lock); if ((pwrpriv->rpwm == pwrpriv->cpwm) || (pwrpriv->cpwm >= PS_STATE_S2)) { DBG_871X("%s: rpwm=0x%02X cpwm=0x%02X CPWM done!\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm); goto exit; } _exit_pwrlock(&pwrpriv->lock); if (rtw_read8(padapter, 0x100) != 0xEA) { #if 1 struct reportpwrstate_parm report; report.state = PS_STATE_S2; DBG_871X("\n%s: FW already leave 32K!\n\n", __func__); cpwm_int_hdl(padapter, &report); #else DBG_871X("\n%s: FW already leave 32K!\n\n", __func__); cpwm_event_callback(&pwrpriv->cpwm_event); #endif return; } _enter_pwrlock(&pwrpriv->lock); if ((pwrpriv->rpwm == pwrpriv->cpwm) || (pwrpriv->cpwm >= PS_STATE_S2)) { DBG_871X("%s: cpwm=%d, nothing to do!\n", __func__, pwrpriv->cpwm); goto exit; } pwrpriv->brpwmtimeout = _TRUE; rtw_set_rpwm(padapter, pwrpriv->rpwm); pwrpriv->brpwmtimeout = _FALSE; exit: _exit_pwrlock(&pwrpriv->lock); } /* * This function is a timer handler, can't do any IO in it. */ static void pwr_rpwm_timeout_handler(void *FunctionContext) { PADAPTER padapter; struct pwrctrl_priv *pwrpriv; padapter = (PADAPTER)FunctionContext; pwrpriv = adapter_to_pwrctl(padapter); DBG_871X("+%s: rpwm=0x%02X cpwm=0x%02X\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm); if ((pwrpriv->rpwm == pwrpriv->cpwm) || (pwrpriv->cpwm >= PS_STATE_S2)) { DBG_871X("+%s: cpwm=%d, nothing to do!\n", __func__, pwrpriv->cpwm); return; } _set_workitem(&pwrpriv->rpwmtimeoutwi); } #endif // CONFIG_LPS_RPWM_TIMER __inline static void register_task_alive(struct pwrctrl_priv *pwrctrl, u32 tag) { pwrctrl->alives |= tag; } __inline static void unregister_task_alive(struct pwrctrl_priv *pwrctrl, u32 tag) { pwrctrl->alives &= ~tag; } /* * Description: * Check if the fw_pwrstate is okay for I/O. * If not (cpwm is less than S2), then the sub-routine * will raise the cpwm to be greater than or equal to S2. * * Calling Context: Passive * * Constraint: * 1. this function will request pwrctrl->lock * * Return Value: * _SUCCESS hardware is ready for I/O * _FAIL can't I/O right now */ s32 rtw_register_task_alive(PADAPTER padapter, u32 task) { s32 res; struct pwrctrl_priv *pwrctrl; u8 pslv; _func_enter_; res = _SUCCESS; pwrctrl = adapter_to_pwrctl(padapter); pslv = PS_STATE_S2; #if defined(CONFIG_RTL8723A) && defined(CONFIG_BT_COEXIST) if (rtw_btcoex_IsBtControlLps(padapter) == _TRUE) { u8 btcoex_rpwm; btcoex_rpwm = rtw_btcoex_RpwmVal(padapter); switch (btcoex_rpwm) { case 0x4: pslv = PS_STATE_S3; break; case 0xC: pslv = PS_STATE_S4; break; } } #endif // CONFIG_RTL8723A & CONFIG_BT_COEXIST _enter_pwrlock(&pwrctrl->lock); register_task_alive(pwrctrl, task); if (pwrctrl->bFwCurrentInPSMode == _TRUE) { RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ("%s: task=0x%x cpwm=0x%02x alives=0x%08x\n", __FUNCTION__, task, pwrctrl->cpwm, pwrctrl->alives)); if (pwrctrl->cpwm < pslv) { if (pwrctrl->cpwm < PS_STATE_S2) res = _FAIL; if (pwrctrl->rpwm < pslv) rtw_set_rpwm(padapter, pslv); } } _exit_pwrlock(&pwrctrl->lock); #ifdef CONFIG_DETECT_CPWM_BY_POLLING if (_FAIL == res) { if (pwrctrl->cpwm >= PS_STATE_S2) res = _SUCCESS; } #endif // CONFIG_DETECT_CPWM_BY_POLLING _func_exit_; return res; } /* * Description: * If task is done, call this func. to power down firmware again. * * Constraint: * 1. this function will request pwrctrl->lock * * Return Value: * none */ void rtw_unregister_task_alive(PADAPTER padapter, u32 task) { struct pwrctrl_priv *pwrctrl; u8 pslv; _func_enter_; pwrctrl = adapter_to_pwrctl(padapter); pslv = PS_STATE_S0; #ifdef CONFIG_BT_COEXIST if ((rtw_btcoex_IsBtDisabled(padapter) == _FALSE) && (rtw_btcoex_IsBtControlLps(padapter) == _TRUE)) { u8 val8; val8 = rtw_btcoex_LpsVal(padapter); if (val8 & BIT(4)) pslv = PS_STATE_S2; #ifdef CONFIG_RTL8723A val8 = rtw_btcoex_RpwmVal(padapter); switch (val8) { case 0x4: pslv = PS_STATE_S3; break; case 0xC: pslv = PS_STATE_S4; break; } #endif // CONFIG_RTL8723A } #endif // CONFIG_BT_COEXIST _enter_pwrlock(&pwrctrl->lock); unregister_task_alive(pwrctrl, task); if ((pwrctrl->pwr_mode != PS_MODE_ACTIVE) && (pwrctrl->bFwCurrentInPSMode == _TRUE)) { RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ("%s: cpwm=0x%02x alives=0x%08x\n", __FUNCTION__, pwrctrl->cpwm, pwrctrl->alives)); if (pwrctrl->cpwm > pslv) { if ((pslv >= PS_STATE_S2) || (pwrctrl->alives == 0)) rtw_set_rpwm(padapter, pslv); } } _exit_pwrlock(&pwrctrl->lock); _func_exit_; } /* * Caller: rtw_xmit_thread * * Check if the fw_pwrstate is okay for xmit. * If not (cpwm is less than S3), then the sub-routine * will raise the cpwm to be greater than or equal to S3. * * Calling Context: Passive * * Return Value: * _SUCCESS rtw_xmit_thread can write fifo/txcmd afterwards. * _FAIL rtw_xmit_thread can not do anything. */ s32 rtw_register_tx_alive(PADAPTER padapter) { s32 res; struct pwrctrl_priv *pwrctrl; u8 pslv; _func_enter_; res = _SUCCESS; pwrctrl = adapter_to_pwrctl(padapter); pslv = PS_STATE_S2; #if defined(CONFIG_RTL8723A) && defined(CONFIG_BT_COEXIST) if (rtw_btcoex_IsBtControlLps(padapter) == _TRUE) { u8 btcoex_rpwm; btcoex_rpwm = rtw_btcoex_RpwmVal(padapter); switch (btcoex_rpwm) { case 0x4: pslv = PS_STATE_S3; break; case 0xC: pslv = PS_STATE_S4; break; } } #endif // CONFIG_RTL8723A & CONFIG_BT_COEXIST _enter_pwrlock(&pwrctrl->lock); register_task_alive(pwrctrl, XMIT_ALIVE); if (pwrctrl->bFwCurrentInPSMode == _TRUE) { RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ("rtw_register_tx_alive: cpwm=0x%02x alives=0x%08x\n", pwrctrl->cpwm, pwrctrl->alives)); if (pwrctrl->cpwm < pslv) { if (pwrctrl->cpwm < PS_STATE_S2) res = _FAIL; if (pwrctrl->rpwm < pslv) rtw_set_rpwm(padapter, pslv); } } _exit_pwrlock(&pwrctrl->lock); #ifdef CONFIG_DETECT_CPWM_BY_POLLING if (_FAIL == res) { if (pwrctrl->cpwm >= PS_STATE_S2) res = _SUCCESS; } #endif // CONFIG_DETECT_CPWM_BY_POLLING _func_exit_; return res; } /* * Caller: rtw_cmd_thread * * Check if the fw_pwrstate is okay for issuing cmd. * If not (cpwm should be is less than S2), then the sub-routine * will raise the cpwm to be greater than or equal to S2. * * Calling Context: Passive * * Return Value: * _SUCCESS rtw_cmd_thread can issue cmds to firmware afterwards. * _FAIL rtw_cmd_thread can not do anything. */ s32 rtw_register_cmd_alive(PADAPTER padapter) { s32 res; struct pwrctrl_priv *pwrctrl; u8 pslv; _func_enter_; res = _SUCCESS; pwrctrl = adapter_to_pwrctl(padapter); pslv = PS_STATE_S2; #if defined(CONFIG_RTL8723A) && defined(CONFIG_BT_COEXIST) if (rtw_btcoex_IsBtControlLps(padapter) == _TRUE) { u8 btcoex_rpwm; btcoex_rpwm = rtw_btcoex_RpwmVal(padapter); switch (btcoex_rpwm) { case 0x4: pslv = PS_STATE_S3; break; case 0xC: pslv = PS_STATE_S4; break; } } #endif // CONFIG_RTL8723A & CONFIG_BT_COEXIST _enter_pwrlock(&pwrctrl->lock); register_task_alive(pwrctrl, CMD_ALIVE); if (pwrctrl->bFwCurrentInPSMode == _TRUE) { RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_info_, ("rtw_register_cmd_alive: cpwm=0x%02x alives=0x%08x\n", pwrctrl->cpwm, pwrctrl->alives)); if (pwrctrl->cpwm < pslv) { if (pwrctrl->cpwm < PS_STATE_S2) res = _FAIL; if (pwrctrl->rpwm < pslv) rtw_set_rpwm(padapter, pslv); } } _exit_pwrlock(&pwrctrl->lock); #ifdef CONFIG_DETECT_CPWM_BY_POLLING if (_FAIL == res) { if (pwrctrl->cpwm >= PS_STATE_S2) res = _SUCCESS; } #endif // CONFIG_DETECT_CPWM_BY_POLLING _func_exit_; return res; } /* * Caller: rx_isr * * Calling Context: Dispatch/ISR * * Return Value: * _SUCCESS * _FAIL */ s32 rtw_register_rx_alive(PADAPTER padapter) { struct pwrctrl_priv *pwrctrl; _func_enter_; pwrctrl = adapter_to_pwrctl(padapter); _enter_pwrlock(&pwrctrl->lock); register_task_alive(pwrctrl, RECV_ALIVE); RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ("rtw_register_rx_alive: cpwm=0x%02x alives=0x%08x\n", pwrctrl->cpwm, pwrctrl->alives)); _exit_pwrlock(&pwrctrl->lock); _func_exit_; return _SUCCESS; } /* * Caller: evt_isr or evt_thread * * Calling Context: Dispatch/ISR or Passive * * Return Value: * _SUCCESS * _FAIL */ s32 rtw_register_evt_alive(PADAPTER padapter) { struct pwrctrl_priv *pwrctrl; _func_enter_; pwrctrl = adapter_to_pwrctl(padapter); _enter_pwrlock(&pwrctrl->lock); register_task_alive(pwrctrl, EVT_ALIVE); RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ("rtw_register_evt_alive: cpwm=0x%02x alives=0x%08x\n", pwrctrl->cpwm, pwrctrl->alives)); _exit_pwrlock(&pwrctrl->lock); _func_exit_; return _SUCCESS; } /* * Caller: ISR * * If ISR's txdone, * No more pkts for TX, * Then driver shall call this fun. to power down firmware again. */ void rtw_unregister_tx_alive(PADAPTER padapter) { struct pwrctrl_priv *pwrctrl; u8 pslv; _func_enter_; pwrctrl = adapter_to_pwrctl(padapter); pslv = PS_STATE_S0; #ifdef CONFIG_BT_COEXIST if ((rtw_btcoex_IsBtDisabled(padapter) == _FALSE) && (rtw_btcoex_IsBtControlLps(padapter) == _TRUE)) { u8 val8; val8 = rtw_btcoex_LpsVal(padapter); if (val8 & BIT(4)) pslv = PS_STATE_S2; #ifdef CONFIG_RTL8723A val8 = rtw_btcoex_RpwmVal(padapter); switch (val8) { case 0x4: pslv = PS_STATE_S3; break; case 0xC: pslv = PS_STATE_S4; break; } #endif // CONFIG_RTL8723A } #endif // CONFIG_BT_COEXIST #ifdef CONFIG_P2P_PS if(padapter->wdinfo.p2p_ps_mode > P2P_PS_NONE) { pslv = PS_STATE_S2; } #ifdef CONFIG_CONCURRENT_MODE else if(rtw_buddy_adapter_up(padapter)) { if(padapter->pbuddy_adapter->wdinfo.p2p_ps_mode > P2P_PS_NONE) pslv = PS_STATE_S2; } #endif #endif _enter_pwrlock(&pwrctrl->lock); unregister_task_alive(pwrctrl, XMIT_ALIVE); if ((pwrctrl->pwr_mode != PS_MODE_ACTIVE) && (pwrctrl->bFwCurrentInPSMode == _TRUE)) { RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ("%s: cpwm=0x%02x alives=0x%08x\n", __FUNCTION__, pwrctrl->cpwm, pwrctrl->alives)); if (pwrctrl->cpwm > pslv) { if ((pslv >= PS_STATE_S2) || (pwrctrl->alives == 0)) rtw_set_rpwm(padapter, pslv); } } _exit_pwrlock(&pwrctrl->lock); _func_exit_; } /* * Caller: ISR * * If all commands have been done, * and no more command to do, * then driver shall call this fun. to power down firmware again. */ void rtw_unregister_cmd_alive(PADAPTER padapter) { struct pwrctrl_priv *pwrctrl; u8 pslv; _func_enter_; pwrctrl = adapter_to_pwrctl(padapter); pslv = PS_STATE_S0; #ifdef CONFIG_BT_COEXIST if ((rtw_btcoex_IsBtDisabled(padapter) == _FALSE) && (rtw_btcoex_IsBtControlLps(padapter) == _TRUE)) { u8 val8; val8 = rtw_btcoex_LpsVal(padapter); if (val8 & BIT(4)) pslv = PS_STATE_S2; #ifdef CONFIG_RTL8723A val8 = rtw_btcoex_RpwmVal(padapter); switch (val8) { case 0x4: pslv = PS_STATE_S3; break; case 0xC: pslv = PS_STATE_S4; break; } #endif // CONFIG_RTL8723A } #endif // CONFIG_BT_COEXIST #ifdef CONFIG_P2P_PS if(padapter->wdinfo.p2p_ps_mode > P2P_PS_NONE) { pslv = PS_STATE_S2; } #ifdef CONFIG_CONCURRENT_MODE else if(rtw_buddy_adapter_up(padapter)) { if(padapter->pbuddy_adapter->wdinfo.p2p_ps_mode > P2P_PS_NONE) pslv = PS_STATE_S2; } #endif #endif _enter_pwrlock(&pwrctrl->lock); unregister_task_alive(pwrctrl, CMD_ALIVE); if ((pwrctrl->pwr_mode != PS_MODE_ACTIVE) && (pwrctrl->bFwCurrentInPSMode == _TRUE)) { RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_info_, ("%s: cpwm=0x%02x alives=0x%08x\n", __FUNCTION__, pwrctrl->cpwm, pwrctrl->alives)); if (pwrctrl->cpwm > pslv) { if ((pslv >= PS_STATE_S2) || (pwrctrl->alives == 0)) rtw_set_rpwm(padapter, pslv); } } _exit_pwrlock(&pwrctrl->lock); _func_exit_; } /* * Caller: ISR */ void rtw_unregister_rx_alive(PADAPTER padapter) { struct pwrctrl_priv *pwrctrl; _func_enter_; pwrctrl = adapter_to_pwrctl(padapter); _enter_pwrlock(&pwrctrl->lock); unregister_task_alive(pwrctrl, RECV_ALIVE); RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ("rtw_unregister_rx_alive: cpwm=0x%02x alives=0x%08x\n", pwrctrl->cpwm, pwrctrl->alives)); _exit_pwrlock(&pwrctrl->lock); _func_exit_; } void rtw_unregister_evt_alive(PADAPTER padapter) { struct pwrctrl_priv *pwrctrl; _func_enter_; pwrctrl = adapter_to_pwrctl(padapter); unregister_task_alive(pwrctrl, EVT_ALIVE); RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ("rtw_unregister_evt_alive: cpwm=0x%02x alives=0x%08x\n", pwrctrl->cpwm, pwrctrl->alives)); _exit_pwrlock(&pwrctrl->lock); _func_exit_; } #endif /* CONFIG_LPS_LCLK */ #ifdef CONFIG_RESUME_IN_WORKQUEUE static void resume_workitem_callback(struct work_struct *work); #endif //CONFIG_RESUME_IN_WORKQUEUE void rtw_init_pwrctrl_priv(PADAPTER padapter) { struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); #if defined(CONFIG_CONCURRENT_MODE) if (padapter->adapter_type != PRIMARY_ADAPTER) return; #endif _func_enter_; #ifdef PLATFORM_WINDOWS pwrctrlpriv->pnp_current_pwr_state=NdisDeviceStateD0; #endif _init_pwrlock(&pwrctrlpriv->lock); _init_pwrlock(&pwrctrlpriv->check_32k_lock); pwrctrlpriv->rf_pwrstate = rf_on; pwrctrlpriv->ips_enter_cnts=0; pwrctrlpriv->ips_leave_cnts=0; pwrctrlpriv->bips_processing = _FALSE; pwrctrlpriv->ips_mode = padapter->registrypriv.ips_mode; pwrctrlpriv->ips_mode_req = padapter->registrypriv.ips_mode; pwrctrlpriv->pwr_state_check_interval = RTW_PWR_STATE_CHK_INTERVAL; pwrctrlpriv->pwr_state_check_cnts = 0; pwrctrlpriv->bInternalAutoSuspend = _FALSE; pwrctrlpriv->bInSuspend = _FALSE; pwrctrlpriv->bkeepfwalive = _FALSE; #ifdef CONFIG_AUTOSUSPEND #ifdef SUPPORT_HW_RFOFF_DETECTED pwrctrlpriv->pwr_state_check_interval = (pwrctrlpriv->bHWPwrPindetect) ?1000:2000; #endif #endif pwrctrlpriv->LpsIdleCount = 0; //pwrctrlpriv->FWCtrlPSMode =padapter->registrypriv.power_mgnt;// PS_MODE_MIN; if (padapter->registrypriv.mp_mode == 1) pwrctrlpriv->power_mgnt =PS_MODE_ACTIVE ; else pwrctrlpriv->power_mgnt =padapter->registrypriv.power_mgnt;// PS_MODE_MIN; pwrctrlpriv->bLeisurePs = (PS_MODE_ACTIVE != pwrctrlpriv->power_mgnt)?_TRUE:_FALSE; pwrctrlpriv->bFwCurrentInPSMode = _FALSE; pwrctrlpriv->rpwm = 0; pwrctrlpriv->cpwm = PS_STATE_S4; pwrctrlpriv->pwr_mode = PS_MODE_ACTIVE; pwrctrlpriv->smart_ps = padapter->registrypriv.smart_ps; pwrctrlpriv->bcn_ant_mode = 0; pwrctrlpriv->dtim = 0; pwrctrlpriv->tog = 0x80; #ifdef CONFIG_LPS_LCLK rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&pwrctrlpriv->rpwm)); _init_workitem(&pwrctrlpriv->cpwm_event, cpwm_event_callback, NULL); #ifdef CONFIG_LPS_RPWM_TIMER pwrctrlpriv->brpwmtimeout = _FALSE; _init_workitem(&pwrctrlpriv->rpwmtimeoutwi, rpwmtimeout_workitem_callback, NULL); _init_timer(&pwrctrlpriv->pwr_rpwm_timer, padapter->pnetdev, pwr_rpwm_timeout_handler, padapter); #endif // CONFIG_LPS_RPWM_TIMER #endif // CONFIG_LPS_LCLK rtw_init_timer(&pwrctrlpriv->pwr_state_check_timer, padapter, pwr_state_check_handler); pwrctrlpriv->wowlan_mode = _FALSE; pwrctrlpriv->wowlan_ap_mode = _FALSE; #ifdef CONFIG_RESUME_IN_WORKQUEUE _init_workitem(&pwrctrlpriv->resume_work, resume_workitem_callback, NULL); pwrctrlpriv->rtw_workqueue = create_singlethread_workqueue("rtw_workqueue"); #endif //CONFIG_RESUME_IN_WORKQUEUE #if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) pwrctrlpriv->early_suspend.suspend = NULL; rtw_register_early_suspend(pwrctrlpriv); #endif //CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER #ifdef CONFIG_WOWLAN pwrctrlpriv->wowlan_from_cmd = _FALSE; #endif #ifdef CONFIG_PNO_SUPPORT pwrctrlpriv->pno_inited = _FALSE; pwrctrlpriv->pnlo_info = NULL; pwrctrlpriv->pscan_info = NULL; pwrctrlpriv->pno_ssid_list = NULL; pwrctrlpriv->pno_in_resume = _TRUE; #endif _func_exit_; } void rtw_free_pwrctrl_priv(PADAPTER adapter) { struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(adapter); #if defined(CONFIG_CONCURRENT_MODE) if (adapter->adapter_type != PRIMARY_ADAPTER) return; #endif _func_enter_; //_rtw_memset((unsigned char *)pwrctrlpriv, 0, sizeof(struct pwrctrl_priv)); #ifdef CONFIG_RESUME_IN_WORKQUEUE if (pwrctrlpriv->rtw_workqueue) { flush_workqueue(pwrctrlpriv->rtw_workqueue); destroy_workqueue(pwrctrlpriv->rtw_workqueue); } #endif #ifdef CONFIG_PNO_SUPPORT if (pwrctrlpriv->pnlo_info != NULL) printk("****** pnlo_info memory leak********\n"); if (pwrctrlpriv->pscan_info != NULL) printk("****** pscan_info memory leak********\n"); if (pwrctrlpriv->pno_ssid_list != NULL) printk("****** pno_ssid_list memory leak********\n"); #endif #if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) rtw_unregister_early_suspend(pwrctrlpriv); #endif //CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER _free_pwrlock(&pwrctrlpriv->lock); _free_pwrlock(&pwrctrlpriv->check_32k_lock); _func_exit_; } #ifdef CONFIG_RESUME_IN_WORKQUEUE extern int rtw_resume_process(_adapter *padapter); static void resume_workitem_callback(struct work_struct *work) { struct pwrctrl_priv *pwrpriv = container_of(work, struct pwrctrl_priv, resume_work); struct dvobj_priv *dvobj = pwrctl_to_dvobj(pwrpriv); _adapter *adapter = dvobj->if1; DBG_871X("%s\n",__FUNCTION__); rtw_resume_process(adapter); rtw_resume_unlock_suspend(); } void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv) { // accquire system's suspend lock preventing from falliing asleep while resume in workqueue //rtw_lock_suspend(); rtw_resume_lock_suspend(); #if 1 queue_work(pwrpriv->rtw_workqueue, &pwrpriv->resume_work); #else _set_workitem(&pwrpriv->resume_work); #endif } #endif //CONFIG_RESUME_IN_WORKQUEUE #if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) inline bool rtw_is_earlysuspend_registered(struct pwrctrl_priv *pwrpriv) { return (pwrpriv->early_suspend.suspend) ? _TRUE : _FALSE; } inline bool rtw_is_do_late_resume(struct pwrctrl_priv *pwrpriv) { return (pwrpriv->do_late_resume) ? _TRUE : _FALSE; } inline void rtw_set_do_late_resume(struct pwrctrl_priv *pwrpriv, bool enable) { pwrpriv->do_late_resume = enable; } #endif #ifdef CONFIG_HAS_EARLYSUSPEND extern int rtw_resume_process(_adapter *padapter); static void rtw_early_suspend(struct early_suspend *h) { struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend); DBG_871X("%s\n",__FUNCTION__); rtw_set_do_late_resume(pwrpriv, _FALSE); } static void rtw_late_resume(struct early_suspend *h) { struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend); struct dvobj_priv *dvobj = pwrctl_to_dvobj(pwrpriv); _adapter *adapter = dvobj->if1; DBG_871X("%s\n",__FUNCTION__); if(pwrpriv->do_late_resume) { rtw_set_do_late_resume(pwrpriv, _FALSE); rtw_resume_process(adapter); } } void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv) { DBG_871X("%s\n", __FUNCTION__); //jeff: set the early suspend level before blank screen, so we wll do late resume after scree is lit pwrpriv->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN - 20; pwrpriv->early_suspend.suspend = rtw_early_suspend; pwrpriv->early_suspend.resume = rtw_late_resume; register_early_suspend(&pwrpriv->early_suspend); } void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv) { DBG_871X("%s\n", __FUNCTION__); rtw_set_do_late_resume(pwrpriv, _FALSE); if (pwrpriv->early_suspend.suspend) unregister_early_suspend(&pwrpriv->early_suspend); pwrpriv->early_suspend.suspend = NULL; pwrpriv->early_suspend.resume = NULL; } #endif //CONFIG_HAS_EARLYSUSPEND #ifdef CONFIG_ANDROID_POWER #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) extern int rtw_resume_process(PADAPTER padapter); #endif static void rtw_early_suspend(android_early_suspend_t *h) { struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend); DBG_871X("%s\n",__FUNCTION__); rtw_set_do_late_resume(pwrpriv, _FALSE); } static void rtw_late_resume(android_early_suspend_t *h) { struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend); struct dvobj_priv *dvobj = pwrctl_to_dvobj(pwrpriv); _adapter *adapter = dvobj->if1; DBG_871X("%s\n",__FUNCTION__); if(pwrpriv->do_late_resume) { #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) rtw_set_do_late_resume(pwrpriv, _FALSE); rtw_resume_process(adapter); #endif } } void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv) { DBG_871X("%s\n", __FUNCTION__); //jeff: set the early suspend level before blank screen, so we wll do late resume after scree is lit pwrpriv->early_suspend.level = ANDROID_EARLY_SUSPEND_LEVEL_BLANK_SCREEN - 20; pwrpriv->early_suspend.suspend = rtw_early_suspend; pwrpriv->early_suspend.resume = rtw_late_resume; android_register_early_suspend(&pwrpriv->early_suspend); } void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv) { DBG_871X("%s\n", __FUNCTION__); rtw_set_do_late_resume(pwrpriv, _FALSE); if (pwrpriv->early_suspend.suspend) android_unregister_early_suspend(&pwrpriv->early_suspend); pwrpriv->early_suspend.suspend = NULL; pwrpriv->early_suspend.resume = NULL; } #endif //CONFIG_ANDROID_POWER u8 rtw_interface_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id,u8* val) { u8 bResult = _TRUE; rtw_hal_intf_ps_func(padapter,efunc_id,val); return bResult; } inline void rtw_set_ips_deny(_adapter *padapter, u32 ms) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); pwrpriv->ips_deny_time = rtw_get_current_time() + rtw_ms_to_systime(ms); } /* * rtw_pwr_wakeup - Wake the NIC up from: 1)IPS. 2)USB autosuspend * @adapter: pointer to _adapter structure * @ips_deffer_ms: the ms wiil prevent from falling into IPS after wakeup * Return _SUCCESS or _FAIL */ int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller) { struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); struct mlme_priv *pmlmepriv; int ret = _SUCCESS; int i; u32 start = rtw_get_current_time(); /* for LPS */ LeaveAllPowerSaveMode(padapter); /* IPS still bound with primary adapter */ padapter = GET_PRIMARY_ADAPTER(padapter); pmlmepriv = &padapter->mlmepriv; if (pwrpriv->ips_deny_time < rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms)) pwrpriv->ips_deny_time = rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms); if (pwrpriv->ps_processing) { DBG_871X("%s wait ps_processing...\n", __func__); while (pwrpriv->ps_processing && rtw_get_passing_time_ms(start) <= 3000) rtw_msleep_os(10); if (pwrpriv->ps_processing) DBG_871X("%s wait ps_processing timeout\n", __func__); else DBG_871X("%s wait ps_processing done\n", __func__); } #ifdef DBG_CONFIG_ERROR_DETECT if (rtw_hal_sreset_inprogress(padapter)) { DBG_871X("%s wait sreset_inprogress...\n", __func__); while (rtw_hal_sreset_inprogress(padapter) && rtw_get_passing_time_ms(start) <= 4000) rtw_msleep_os(10); if (rtw_hal_sreset_inprogress(padapter)) DBG_871X("%s wait sreset_inprogress timeout\n", __func__); else DBG_871X("%s wait sreset_inprogress done\n", __func__); } #endif if (pwrpriv->bInternalAutoSuspend == _FALSE && pwrpriv->bInSuspend) { DBG_871X("%s wait bInSuspend...\n", __func__); while (pwrpriv->bInSuspend && ((rtw_get_passing_time_ms(start) <= 3000 && !rtw_is_do_late_resume(pwrpriv)) || (rtw_get_passing_time_ms(start) <= 500 && rtw_is_do_late_resume(pwrpriv))) ) { rtw_msleep_os(10); } if (pwrpriv->bInSuspend) DBG_871X("%s wait bInSuspend timeout\n", __func__); else DBG_871X("%s wait bInSuspend done\n", __func__); } //System suspend is not allowed to wakeup if((pwrpriv->bInternalAutoSuspend == _FALSE) && (_TRUE == pwrpriv->bInSuspend )){ ret = _FAIL; goto exit; } //block??? if((pwrpriv->bInternalAutoSuspend == _TRUE) && (padapter->net_closed == _TRUE)) { ret = _FAIL; goto exit; } //I think this should be check in IPS, LPS, autosuspend functions... if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { #if defined (CONFIG_BT_COEXIST)&& defined (CONFIG_AUTOSUSPEND) if(_TRUE==pwrpriv->bInternalAutoSuspend){ if(0==pwrpriv->autopm_cnt){ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,33)) if (usb_autopm_get_interface(adapter_to_dvobj(padapter)->pusbintf) < 0) { DBG_871X( "can't get autopm: \n"); } #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,20)) usb_autopm_disable(adapter_to_dvobj(padapter)->pusbintf); #else usb_autoresume_device(adapter_to_dvobj(padapter)->pusbdev, 1); #endif pwrpriv->autopm_cnt++; } #endif //#if defined (CONFIG_BT_COEXIST)&& defined (CONFIG_AUTOSUSPEND) ret = _SUCCESS; goto exit; #if defined (CONFIG_BT_COEXIST)&& defined (CONFIG_AUTOSUSPEND) } #endif //#if defined (CONFIG_BT_COEXIST)&& defined (CONFIG_AUTOSUSPEND) } if(rf_off == pwrpriv->rf_pwrstate ) { #ifdef CONFIG_USB_HCI #ifdef CONFIG_AUTOSUSPEND if(pwrpriv->brfoffbyhw==_TRUE) { DBG_8192C("hw still in rf_off state ...........\n"); ret = _FAIL; goto exit; } else if(padapter->registrypriv.usbss_enable) { DBG_8192C("%s call autoresume_enter....\n",__FUNCTION__); if(_FAIL == autoresume_enter(padapter)) { DBG_8192C("======> autoresume fail.............\n"); ret = _FAIL; goto exit; } } else #endif #endif { #ifdef CONFIG_IPS DBG_8192C("%s call ips_leave....\n",__FUNCTION__); if(_FAIL == ips_leave(padapter)) { DBG_8192C("======> ips_leave fail.............\n"); ret = _FAIL; goto exit; } #endif } } //TODO: the following checking need to be merged... if(padapter->bDriverStopped || !padapter->bup || !padapter->hw_init_completed ){ DBG_8192C("%s: bDriverStopped=%d, bup=%d, hw_init_completed=%u\n" , caller , padapter->bDriverStopped , padapter->bup , padapter->hw_init_completed); ret= _FALSE; goto exit; } exit: if (pwrpriv->ips_deny_time < rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms)) pwrpriv->ips_deny_time = rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms); return ret; } int rtw_pm_set_lps(_adapter *padapter, u8 mode) { int ret = 0; struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); if ( mode < PS_MODE_NUM ) { if(pwrctrlpriv->power_mgnt !=mode) { if(PS_MODE_ACTIVE == mode) { LeaveAllPowerSaveMode(padapter); } else { pwrctrlpriv->LpsIdleCount = 2; } pwrctrlpriv->power_mgnt = mode; pwrctrlpriv->bLeisurePs = (PS_MODE_ACTIVE != pwrctrlpriv->power_mgnt)?_TRUE:_FALSE; } } else { ret = -EINVAL; } return ret; } int rtw_pm_set_ips(_adapter *padapter, u8 mode) { struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); if( mode == IPS_NORMAL || mode == IPS_LEVEL_2 ) { rtw_ips_mode_req(pwrctrlpriv, mode); DBG_871X("%s %s\n", __FUNCTION__, mode == IPS_NORMAL?"IPS_NORMAL":"IPS_LEVEL_2"); return 0; } else if(mode ==IPS_NONE){ rtw_ips_mode_req(pwrctrlpriv, mode); DBG_871X("%s %s\n", __FUNCTION__, "IPS_NONE"); if((padapter->bSurpriseRemoved ==0)&&(_FAIL == rtw_pwr_wakeup(padapter)) ) return -EFAULT; } else { return -EINVAL; } return 0; } /* * ATTENTION: * This function will request pwrctrl LOCK! */ void rtw_ps_deny(PADAPTER padapter, PS_DENY_REASON reason) { struct pwrctrl_priv *pwrpriv; s32 ret; // DBG_871X("+" FUNC_ADPT_FMT ": Request PS deny for %d (0x%08X)\n", // FUNC_ADPT_ARG(padapter), reason, BIT(reason)); pwrpriv = adapter_to_pwrctl(padapter); _enter_pwrlock(&pwrpriv->lock); if (pwrpriv->ps_deny & BIT(reason)) { DBG_871X(FUNC_ADPT_FMT ": [WARNING] Reason %d had been set before!!\n", FUNC_ADPT_ARG(padapter), reason); } pwrpriv->ps_deny |= BIT(reason); _exit_pwrlock(&pwrpriv->lock); // DBG_871X("-" FUNC_ADPT_FMT ": Now PS deny for 0x%08X\n", // FUNC_ADPT_ARG(padapter), pwrpriv->ps_deny); } /* * ATTENTION: * This function will request pwrctrl LOCK! */ void rtw_ps_deny_cancel(PADAPTER padapter, PS_DENY_REASON reason) { struct pwrctrl_priv *pwrpriv; // DBG_871X("+" FUNC_ADPT_FMT ": Cancel PS deny for %d(0x%08X)\n", // FUNC_ADPT_ARG(padapter), reason, BIT(reason)); pwrpriv = adapter_to_pwrctl(padapter); _enter_pwrlock(&pwrpriv->lock); if ((pwrpriv->ps_deny & BIT(reason)) == 0) { DBG_871X(FUNC_ADPT_FMT ": [ERROR] Reason %d had been canceled before!!\n", FUNC_ADPT_ARG(padapter), reason); } pwrpriv->ps_deny &= ~BIT(reason); _exit_pwrlock(&pwrpriv->lock); // DBG_871X("-" FUNC_ADPT_FMT ": Now PS deny for 0x%08X\n", // FUNC_ADPT_ARG(padapter), pwrpriv->ps_deny); } /* * ATTENTION: * Before calling this function pwrctrl lock should be occupied already, * otherwise it may return incorrect value. */ u32 rtw_ps_deny_get(PADAPTER padapter) { u32 deny; deny = adapter_to_pwrctl(padapter)->ps_deny; return deny; } rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_recv.c000066400000000000000000003471271261122257400204440ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_RECV_C_ #include #if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) #error "Shall be Linux or Windows, but not both!\n" #endif #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS void rtw_signal_stat_timer_hdl(RTW_TIMER_HDL_ARGS); #endif //CONFIG_NEW_SIGNAL_STAT_PROCESS void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv) { _func_enter_; _rtw_memset((u8 *)psta_recvpriv, 0, sizeof (struct sta_recv_priv)); _rtw_spinlock_init(&psta_recvpriv->lock); //for(i=0; iblk_strms[i]); _rtw_init_queue(&psta_recvpriv->defrag_q); _func_exit_; } sint _rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter) { sint i; union recv_frame *precvframe; sint res=_SUCCESS; _func_enter_; // We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). //_rtw_memset((unsigned char *)precvpriv, 0, sizeof (struct recv_priv)); _rtw_spinlock_init(&precvpriv->lock); _rtw_init_queue(&precvpriv->free_recv_queue); _rtw_init_queue(&precvpriv->recv_pending_queue); _rtw_init_queue(&precvpriv->uc_swdec_pending_queue); precvpriv->adapter = padapter; precvpriv->free_recvframe_cnt = NR_RECVFRAME; precvpriv->sink_udpport = 0; precvpriv->pre_rtp_rxseq = 0; precvpriv->cur_rtp_rxseq = 0; rtw_os_recv_resource_init(precvpriv, padapter); precvpriv->pallocated_frame_buf = rtw_zvmalloc(NR_RECVFRAME * sizeof(union recv_frame) + RXFRAME_ALIGN_SZ); if(precvpriv->pallocated_frame_buf==NULL){ res= _FAIL; goto exit; } //_rtw_memset(precvpriv->pallocated_frame_buf, 0, NR_RECVFRAME * sizeof(union recv_frame) + RXFRAME_ALIGN_SZ); precvpriv->precv_frame_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_frame_buf), RXFRAME_ALIGN_SZ); //precvpriv->precv_frame_buf = precvpriv->pallocated_frame_buf + RXFRAME_ALIGN_SZ - // ((SIZE_PTR) (precvpriv->pallocated_frame_buf) &(RXFRAME_ALIGN_SZ-1)); precvframe = (union recv_frame*) precvpriv->precv_frame_buf; for(i=0; i < NR_RECVFRAME ; i++) { _rtw_init_listhead(&(precvframe->u.list)); rtw_list_insert_tail(&(precvframe->u.list), &(precvpriv->free_recv_queue.queue)); res = rtw_os_recv_resource_alloc(padapter, precvframe); precvframe->u.hdr.len = 0; precvframe->u.hdr.adapter =padapter; precvframe++; } #ifdef CONFIG_USB_HCI ATOMIC_SET(&(precvpriv->rx_pending_cnt), 1); _rtw_init_sema(&precvpriv->allrxreturnevt, 0); #endif res = rtw_hal_init_recv_priv(padapter); #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS rtw_init_timer(&precvpriv->signal_stat_timer, padapter, RTW_TIMER_HDL_NAME(signal_stat)); precvpriv->signal_stat_sampling_interval = 2000; //ms //precvpriv->signal_stat_converging_constant = 5000; //ms rtw_set_signal_stat_timer(precvpriv); #endif //CONFIG_NEW_SIGNAL_STAT_PROCESS exit: _func_exit_; return res; } void rtw_mfree_recv_priv_lock(struct recv_priv *precvpriv); void rtw_mfree_recv_priv_lock(struct recv_priv *precvpriv) { _rtw_spinlock_free(&precvpriv->lock); #ifdef CONFIG_RECV_THREAD_MODE _rtw_free_sema(&precvpriv->recv_sema); _rtw_free_sema(&precvpriv->terminate_recvthread_sema); #endif _rtw_spinlock_free(&precvpriv->free_recv_queue.lock); _rtw_spinlock_free(&precvpriv->recv_pending_queue.lock); _rtw_spinlock_free(&precvpriv->free_recv_buf_queue.lock); #ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX _rtw_spinlock_free(&precvpriv->recv_buf_pending_queue.lock); #endif // CONFIG_USE_USB_BUFFER_ALLOC_RX } void _rtw_free_recv_priv (struct recv_priv *precvpriv) { _adapter *padapter = precvpriv->adapter; _func_enter_; rtw_free_uc_swdec_pending_queue(padapter); rtw_mfree_recv_priv_lock(precvpriv); rtw_os_recv_resource_free(precvpriv); if(precvpriv->pallocated_frame_buf) { rtw_vmfree(precvpriv->pallocated_frame_buf, NR_RECVFRAME * sizeof(union recv_frame) + RXFRAME_ALIGN_SZ); } rtw_hal_free_recv_priv(padapter); _func_exit_; } union recv_frame *_rtw_alloc_recvframe (_queue *pfree_recv_queue) { union recv_frame *precvframe; _list *plist, *phead; _adapter *padapter; struct recv_priv *precvpriv; _func_enter_; if(_rtw_queue_empty(pfree_recv_queue) == _TRUE) { precvframe = NULL; } else { phead = get_list_head(pfree_recv_queue); plist = get_next(phead); precvframe = LIST_CONTAINOR(plist, union recv_frame, u); rtw_list_delete(&precvframe->u.hdr.list); padapter=precvframe->u.hdr.adapter; if(padapter !=NULL){ precvpriv=&padapter->recvpriv; if(pfree_recv_queue == &precvpriv->free_recv_queue) precvpriv->free_recvframe_cnt--; } } _func_exit_; return precvframe; } union recv_frame *rtw_alloc_recvframe (_queue *pfree_recv_queue) { _irqL irqL; union recv_frame *precvframe; _enter_critical_bh(&pfree_recv_queue->lock, &irqL); precvframe = _rtw_alloc_recvframe(pfree_recv_queue); _exit_critical_bh(&pfree_recv_queue->lock, &irqL); return precvframe; } void rtw_init_recvframe(union recv_frame *precvframe, struct recv_priv *precvpriv) { /* Perry: This can be removed */ _rtw_init_listhead(&precvframe->u.hdr.list); precvframe->u.hdr.len=0; } int rtw_free_recvframe(union recv_frame *precvframe, _queue *pfree_recv_queue) { _irqL irqL; _adapter *padapter=precvframe->u.hdr.adapter; struct recv_priv *precvpriv = &padapter->recvpriv; _func_enter_; #ifdef CONFIG_CONCURRENT_MODE if(padapter->adapter_type > PRIMARY_ADAPTER) { padapter = padapter->pbuddy_adapter;//get primary_padapter precvpriv = &padapter->recvpriv; pfree_recv_queue = &precvpriv->free_recv_queue; precvframe->u.hdr.adapter = padapter; } #endif rtw_os_free_recvframe(precvframe); _enter_critical_bh(&pfree_recv_queue->lock, &irqL); rtw_list_delete(&(precvframe->u.hdr.list)); precvframe->u.hdr.len = 0; rtw_list_insert_tail(&(precvframe->u.hdr.list), get_list_head(pfree_recv_queue)); if(padapter !=NULL){ if(pfree_recv_queue == &precvpriv->free_recv_queue) precvpriv->free_recvframe_cnt++; } _exit_critical_bh(&pfree_recv_queue->lock, &irqL); _func_exit_; return _SUCCESS; } sint _rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue) { _adapter *padapter=precvframe->u.hdr.adapter; struct recv_priv *precvpriv = &padapter->recvpriv; _func_enter_; //_rtw_init_listhead(&(precvframe->u.hdr.list)); rtw_list_delete(&(precvframe->u.hdr.list)); rtw_list_insert_tail(&(precvframe->u.hdr.list), get_list_head(queue)); if (padapter != NULL) { if (queue == &precvpriv->free_recv_queue) precvpriv->free_recvframe_cnt++; } _func_exit_; return _SUCCESS; } sint rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue) { sint ret; _irqL irqL; //_spinlock(&pfree_recv_queue->lock); _enter_critical_bh(&queue->lock, &irqL); ret = _rtw_enqueue_recvframe(precvframe, queue); //_rtw_spinunlock(&pfree_recv_queue->lock); _exit_critical_bh(&queue->lock, &irqL); return ret; } /* sint rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue) { return rtw_free_recvframe(precvframe, queue); } */ /* caller : defrag ; recvframe_chk_defrag in recv_thread (passive) pframequeue: defrag_queue : will be accessed in recv_thread (passive) using spinlock to protect */ void rtw_free_recvframe_queue(_queue *pframequeue, _queue *pfree_recv_queue) { union recv_frame *precvframe; _list *plist, *phead; _func_enter_; _rtw_spinlock(&pframequeue->lock); phead = get_list_head(pframequeue); plist = get_next(phead); while(rtw_end_of_queue_search(phead, plist) == _FALSE) { precvframe = LIST_CONTAINOR(plist, union recv_frame, u); plist = get_next(plist); //rtw_list_delete(&precvframe->u.hdr.list); // will do this in rtw_free_recvframe() rtw_free_recvframe(precvframe, pfree_recv_queue); } _rtw_spinunlock(&pframequeue->lock); _func_exit_; } u32 rtw_free_uc_swdec_pending_queue(_adapter *adapter) { u32 cnt = 0; union recv_frame *pending_frame; while((pending_frame=rtw_alloc_recvframe(&adapter->recvpriv.uc_swdec_pending_queue))) { rtw_free_recvframe(pending_frame, &adapter->recvpriv.free_recv_queue); cnt++; } if (cnt) DBG_871X(FUNC_ADPT_FMT" dequeue %d\n", FUNC_ADPT_ARG(adapter), cnt); return cnt; } sint rtw_enqueue_recvbuf_to_head(struct recv_buf *precvbuf, _queue *queue) { _irqL irqL; _enter_critical_bh(&queue->lock, &irqL); rtw_list_delete(&precvbuf->list); rtw_list_insert_head(&precvbuf->list, get_list_head(queue)); _exit_critical_bh(&queue->lock, &irqL); return _SUCCESS; } sint rtw_enqueue_recvbuf(struct recv_buf *precvbuf, _queue *queue) { _irqL irqL; #ifdef CONFIG_SDIO_HCI _enter_critical_bh(&queue->lock, &irqL); #else _enter_critical_ex(&queue->lock, &irqL); #endif/*#ifdef CONFIG_SDIO_HCI*/ rtw_list_delete(&precvbuf->list); rtw_list_insert_tail(&precvbuf->list, get_list_head(queue)); #ifdef CONFIG_SDIO_HCI _exit_critical_bh(&queue->lock, &irqL); #else _exit_critical_ex(&queue->lock, &irqL); #endif/*#ifdef CONFIG_SDIO_HCI*/ return _SUCCESS; } struct recv_buf *rtw_dequeue_recvbuf (_queue *queue) { _irqL irqL; struct recv_buf *precvbuf; _list *plist, *phead; #ifdef CONFIG_SDIO_HCI _enter_critical_bh(&queue->lock, &irqL); #else _enter_critical_ex(&queue->lock, &irqL); #endif/*#ifdef CONFIG_SDIO_HCI*/ if(_rtw_queue_empty(queue) == _TRUE) { precvbuf = NULL; } else { phead = get_list_head(queue); plist = get_next(phead); precvbuf = LIST_CONTAINOR(plist, struct recv_buf, list); rtw_list_delete(&precvbuf->list); } #ifdef CONFIG_SDIO_HCI _exit_critical_bh(&queue->lock, &irqL); #else _exit_critical_ex(&queue->lock, &irqL); #endif/*#ifdef CONFIG_SDIO_HCI*/ return precvbuf; } sint recvframe_chkmic(_adapter *adapter, union recv_frame *precvframe); sint recvframe_chkmic(_adapter *adapter, union recv_frame *precvframe){ sint i,res=_SUCCESS; u32 datalen; u8 miccode[8]; u8 bmic_err=_FALSE,brpt_micerror = _TRUE; u8 *pframe, *payload,*pframemic; u8 *mickey; //u8 *iv,rxdata_key_idx=0; struct sta_info *stainfo; struct rx_pkt_attrib *prxattrib=&precvframe->u.hdr.attrib; struct security_priv *psecuritypriv=&adapter->securitypriv; struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); _func_enter_; stainfo=rtw_get_stainfo(&adapter->stapriv ,&prxattrib->ta[0]); if(prxattrib->encrypt ==_TKIP_) { RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n recvframe_chkmic:prxattrib->encrypt ==_TKIP_\n")); RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n recvframe_chkmic:da=0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n", prxattrib->ra[0],prxattrib->ra[1],prxattrib->ra[2],prxattrib->ra[3],prxattrib->ra[4],prxattrib->ra[5])); //calculate mic code if(stainfo!= NULL) { if(IS_MCAST(prxattrib->ra)) { //mickey=&psecuritypriv->dot118021XGrprxmickey.skey[0]; //iv = precvframe->u.hdr.rx_data+prxattrib->hdrlen; //rxdata_key_idx =( ((iv[3])>>6)&0x3) ; mickey=&psecuritypriv->dot118021XGrprxmickey[prxattrib->key_index].skey[0]; RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n recvframe_chkmic: bcmc key \n")); //DBG_871X("\n recvframe_chkmic: bcmc key psecuritypriv->dot118021XGrpKeyid(%d),pmlmeinfo->key_index(%d) ,recv key_id(%d)\n", // psecuritypriv->dot118021XGrpKeyid,pmlmeinfo->key_index,rxdata_key_idx); if(psecuritypriv->binstallGrpkey==_FALSE) { res=_FAIL; RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n recvframe_chkmic:didn't install group key!!!!!!!!!!\n")); DBG_871X("\n recvframe_chkmic:didn't install group key!!!!!!!!!!\n"); goto exit; } } else{ mickey=&stainfo->dot11tkiprxmickey.skey[0]; RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n recvframe_chkmic: unicast key \n")); } datalen=precvframe->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len-prxattrib->icv_len-8;//icv_len included the mic code pframe=precvframe->u.hdr.rx_data; payload=pframe+prxattrib->hdrlen+prxattrib->iv_len; RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n prxattrib->iv_len=%d prxattrib->icv_len=%d\n",prxattrib->iv_len,prxattrib->icv_len)); //rtw_seccalctkipmic(&stainfo->dot11tkiprxmickey.skey[0],pframe,payload, datalen ,&miccode[0],(unsigned char)prxattrib->priority); //care the length of the data rtw_seccalctkipmic(mickey,pframe,payload, datalen ,&miccode[0],(unsigned char)prxattrib->priority); //care the length of the data pframemic=payload+datalen; bmic_err=_FALSE; for(i=0;i<8;i++){ if(miccode[i] != *(pframemic+i)){ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvframe_chkmic:miccode[%d](%02x) != *(pframemic+%d)(%02x) ",i,miccode[i],i,*(pframemic+i))); bmic_err=_TRUE; } } if(bmic_err==_TRUE){ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n *(pframemic-8)-*(pframemic-1)=0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n", *(pframemic-8),*(pframemic-7),*(pframemic-6),*(pframemic-5),*(pframemic-4),*(pframemic-3),*(pframemic-2),*(pframemic-1))); RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n *(pframemic-16)-*(pframemic-9)=0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n", *(pframemic-16),*(pframemic-15),*(pframemic-14),*(pframemic-13),*(pframemic-12),*(pframemic-11),*(pframemic-10),*(pframemic-9))); { uint i; RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n ======demp packet (len=%d)======\n",precvframe->u.hdr.len)); for(i=0;iu.hdr.len;i=i+8){ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x", *(precvframe->u.hdr.rx_data+i),*(precvframe->u.hdr.rx_data+i+1), *(precvframe->u.hdr.rx_data+i+2),*(precvframe->u.hdr.rx_data+i+3), *(precvframe->u.hdr.rx_data+i+4),*(precvframe->u.hdr.rx_data+i+5), *(precvframe->u.hdr.rx_data+i+6),*(precvframe->u.hdr.rx_data+i+7))); } RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n ======demp packet end [len=%d]======\n",precvframe->u.hdr.len)); RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n hrdlen=%d, \n",prxattrib->hdrlen)); } RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("ra=0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x psecuritypriv->binstallGrpkey=%d ", prxattrib->ra[0],prxattrib->ra[1],prxattrib->ra[2], prxattrib->ra[3],prxattrib->ra[4],prxattrib->ra[5],psecuritypriv->binstallGrpkey)); // double check key_index for some timing issue , // cannot compare with psecuritypriv->dot118021XGrpKeyid also cause timing issue if((IS_MCAST(prxattrib->ra)==_TRUE) && (prxattrib->key_index != pmlmeinfo->key_index )) brpt_micerror = _FALSE; if((prxattrib->bdecrypted ==_TRUE)&& (brpt_micerror == _TRUE)) { rtw_handle_tkip_mic_err(adapter,(u8)IS_MCAST(prxattrib->ra)); RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" mic error :prxattrib->bdecrypted=%d ",prxattrib->bdecrypted)); DBG_871X(" mic error :prxattrib->bdecrypted=%d\n",prxattrib->bdecrypted); } else { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" mic error :prxattrib->bdecrypted=%d ",prxattrib->bdecrypted)); DBG_871X(" mic error :prxattrib->bdecrypted=%d\n",prxattrib->bdecrypted); } res=_FAIL; } else{ //mic checked ok if((psecuritypriv->bcheck_grpkey ==_FALSE)&&(IS_MCAST(prxattrib->ra)==_TRUE)){ psecuritypriv->bcheck_grpkey =_TRUE; RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("psecuritypriv->bcheck_grpkey =_TRUE")); } } } else { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvframe_chkmic: rtw_get_stainfo==NULL!!!\n")); } recvframe_pull_tail(precvframe, 8); } exit: _func_exit_; return res; } //decrypt and set the ivlen,icvlen of the recv_frame union recv_frame * decryptor(_adapter *padapter,union recv_frame *precv_frame); union recv_frame * decryptor(_adapter *padapter,union recv_frame *precv_frame) { struct rx_pkt_attrib *prxattrib = &precv_frame->u.hdr.attrib; struct security_priv *psecuritypriv=&padapter->securitypriv; union recv_frame *return_packet=precv_frame; u32 res=_SUCCESS; _func_enter_; DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt); RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("prxstat->decrypted=%x prxattrib->encrypt = 0x%03x\n",prxattrib->bdecrypted,prxattrib->encrypt)); if(prxattrib->encrypt>0) { u8 *iv = precv_frame->u.hdr.rx_data+prxattrib->hdrlen; prxattrib->key_index = ( ((iv[3])>>6)&0x3) ; if(prxattrib->key_index > WEP_KEYS) { DBG_871X("prxattrib->key_index(%d) > WEP_KEYS \n", prxattrib->key_index); switch(prxattrib->encrypt){ case _WEP40_: case _WEP104_: prxattrib->key_index = psecuritypriv->dot11PrivacyKeyIndex; break; case _TKIP_: case _AES_: default: prxattrib->key_index = psecuritypriv->dot118021XGrpKeyid; break; } } } if((prxattrib->encrypt>0) && ((prxattrib->bdecrypted==0) ||(psecuritypriv->sw_decrypt==_TRUE))) { #ifdef CONFIG_CONCURRENT_MODE if(!IS_MCAST(prxattrib->ra))//bc/mc packets use sw decryption for concurrent mode #endif psecuritypriv->hw_decrypted=_FALSE; #ifdef DBG_RX_DECRYPTOR DBG_871X("[%s] %d:prxstat->bdecrypted:%d, prxattrib->encrypt:%d, Setting psecuritypriv->hw_decrypted = %d\n", __FUNCTION__, __LINE__, prxattrib->bdecrypted, prxattrib->encrypt, psecuritypriv->hw_decrypted); #endif switch(prxattrib->encrypt){ case _WEP40_: case _WEP104_: DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_wep); rtw_wep_decrypt(padapter, (u8 *)precv_frame); break; case _TKIP_: DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_tkip); res = rtw_tkip_decrypt(padapter, (u8 *)precv_frame); break; case _AES_: DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_aes); res = rtw_aes_decrypt(padapter, (u8 * )precv_frame); break; #ifdef CONFIG_WAPI_SUPPORT case _SMS4_: DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_wapi); rtw_sms4_decrypt(padapter, (u8 * )precv_frame); break; #endif default: break; } } else if(prxattrib->bdecrypted==1 && prxattrib->encrypt >0 && (psecuritypriv->busetkipkey==1 || prxattrib->encrypt !=_TKIP_ ) ) { #if 0 if((prxstat->icv==1)&&(prxattrib->encrypt!=_AES_)) { psecuritypriv->hw_decrypted=_FALSE; RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("psecuritypriv->hw_decrypted=_FALSE")); rtw_free_recvframe(precv_frame, &padapter->recvpriv.free_recv_queue); return_packet=NULL; } else #endif { DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_hw); psecuritypriv->hw_decrypted=_TRUE; #ifdef DBG_RX_DECRYPTOR DBG_871X("[%s] %d:prxstat->bdecrypted:%d, prxattrib->encrypt:%d, Setting psecuritypriv->hw_decrypted = %d\n", __FUNCTION__, __LINE__, prxattrib->bdecrypted, prxattrib->encrypt, psecuritypriv->hw_decrypted); #endif } } else { DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_unknown); #ifdef DBG_RX_DECRYPTOR DBG_871X("[%s] %d:prxstat->bdecrypted:%d, prxattrib->encrypt:%d, Setting psecuritypriv->hw_decrypted = %d\n", __FUNCTION__, __LINE__, prxattrib->bdecrypted, prxattrib->encrypt, psecuritypriv->hw_decrypted); #endif } if(res == _FAIL) { rtw_free_recvframe(return_packet,&padapter->recvpriv.free_recv_queue); return_packet = NULL; } else { prxattrib->bdecrypted = _TRUE; } //recvframe_chkmic(adapter, precv_frame); //move to recvframme_defrag function _func_exit_; return return_packet; } //###set the security information in the recv_frame union recv_frame * portctrl(_adapter *adapter,union recv_frame * precv_frame); union recv_frame * portctrl(_adapter *adapter,union recv_frame * precv_frame) { u8 *psta_addr = NULL; u8 *ptr; uint auth_alg; struct recv_frame_hdr *pfhdr; struct sta_info *psta; struct sta_priv *pstapriv ; union recv_frame *prtnframe; u16 ether_type=0; u16 eapol_type = 0x888e;//for Funia BD's WPA issue struct rx_pkt_attrib *pattrib; _func_enter_; pstapriv = &adapter->stapriv; auth_alg = adapter->securitypriv.dot11AuthAlgrthm; ptr = get_recvframe_data(precv_frame); pfhdr = &precv_frame->u.hdr; pattrib = &pfhdr->attrib; psta_addr = pattrib->ta; prtnframe = NULL; psta = rtw_get_stainfo(pstapriv, psta_addr); RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("########portctrl:adapter->securitypriv.dot11AuthAlgrthm=%d\n",adapter->securitypriv.dot11AuthAlgrthm)); if(auth_alg==2) { if ((psta!=NULL) && (psta->ieee8021x_blocked)) { //blocked //only accept EAPOL frame RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("########portctrl:psta->ieee8021x_blocked==1\n")); prtnframe=precv_frame; //get ether_type ptr=ptr+pfhdr->attrib.hdrlen+pfhdr->attrib.iv_len+LLC_HEADER_SIZE; _rtw_memcpy(ðer_type,ptr, 2); ether_type= ntohs((unsigned short )ether_type); if (ether_type == eapol_type) { prtnframe=precv_frame; } else { //free this frame rtw_free_recvframe(precv_frame, &adapter->recvpriv.free_recv_queue); prtnframe=NULL; } } else { //allowed //check decryption status, and decrypt the frame if needed RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("########portctrl:psta->ieee8021x_blocked==0\n")); RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("portctrl:precv_frame->hdr.attrib.privacy=%x\n",precv_frame->u.hdr.attrib.privacy)); if (pattrib->bdecrypted == 0) { RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("portctrl:prxstat->decrypted=%x\n", pattrib->bdecrypted)); } prtnframe=precv_frame; //check is the EAPOL frame or not (Rekey) //if(ether_type == eapol_type){ // RT_TRACE(_module_rtl871x_recv_c_,_drv_notice_,("########portctrl:ether_type == 0x888e\n")); //check Rekey // prtnframe=precv_frame; //} //else{ // RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("########portctrl:ether_type=0x%04x\n", ether_type)); //} } } else { prtnframe=precv_frame; } _func_exit_; return prtnframe; } sint recv_decache(union recv_frame *precv_frame, u8 bretry, struct stainfo_rxcache *prxcache); sint recv_decache(union recv_frame *precv_frame, u8 bretry, struct stainfo_rxcache *prxcache) { sint tid = precv_frame->u.hdr.attrib.priority; u16 seq_ctrl = ( (precv_frame->u.hdr.attrib.seq_num&0xffff) << 4) | (precv_frame->u.hdr.attrib.frag_num & 0xf); _func_enter_; if(tid>15) { RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("recv_decache, (tid>15)! seq_ctrl=0x%x, tid=0x%x\n", seq_ctrl, tid)); return _FAIL; } if(1)//if(bretry) { if(seq_ctrl == prxcache->tid_rxseq[tid]) { RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("recv_decache, seq_ctrl=0x%x, tid=0x%x, tid_rxseq=0x%x\n", seq_ctrl, tid, prxcache->tid_rxseq[tid])); return _FAIL; } } prxcache->tid_rxseq[tid] = seq_ctrl; _func_exit_; return _SUCCESS; } void process_pwrbit_data(_adapter *padapter, union recv_frame *precv_frame); void process_pwrbit_data(_adapter *padapter, union recv_frame *precv_frame) { #ifdef CONFIG_AP_MODE unsigned char pwrbit; u8 *ptr = precv_frame->u.hdr.rx_data; struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info *psta=NULL; psta = rtw_get_stainfo(pstapriv, pattrib->src); pwrbit = GetPwrMgt(ptr); if(psta) { if(pwrbit) { if(!(psta->state & WIFI_SLEEP_STATE)) { //psta->state |= WIFI_SLEEP_STATE; //pstapriv->sta_dz_bitmap |= BIT(psta->aid); stop_sta_xmit(padapter, psta); //DBG_871X("to sleep, sta_dz_bitmap=%x\n", pstapriv->sta_dz_bitmap); } } else { if(psta->state & WIFI_SLEEP_STATE) { //psta->state ^= WIFI_SLEEP_STATE; //pstapriv->sta_dz_bitmap &= ~BIT(psta->aid); wakeup_sta_to_xmit(padapter, psta); //DBG_871X("to wakeup, sta_dz_bitmap=%x\n", pstapriv->sta_dz_bitmap); } } } #endif } void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame); void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame) { #ifdef CONFIG_AP_MODE struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info *psta=NULL; psta = rtw_get_stainfo(pstapriv, pattrib->src); if(!psta) return; #ifdef CONFIG_TDLS if( !(psta->tdls_sta_state & TDLS_LINKED_STATE ) ) { #endif //CONFIG_TDLS if(!psta->qos_option) return; if(!(psta->qos_info&0xf)) return; #ifdef CONFIG_TDLS } #endif //CONFIG_TDLS if(psta->state&WIFI_SLEEP_STATE) { u8 wmmps_ac=0; switch(pattrib->priority) { case 1: case 2: wmmps_ac = psta->uapsd_bk&BIT(1); break; case 4: case 5: wmmps_ac = psta->uapsd_vi&BIT(1); break; case 6: case 7: wmmps_ac = psta->uapsd_vo&BIT(1); break; case 0: case 3: default: wmmps_ac = psta->uapsd_be&BIT(1); break; } if(wmmps_ac) { if(psta->sleepq_ac_len>0) { //process received triggered frame xmit_delivery_enabled_frames(padapter, psta); } else { //issue one qos null frame with More data bit = 0 and the EOSP bit set (=1) issue_qos_nulldata(padapter, psta->hwaddr, (u16)pattrib->priority, 0, 0); } } } #endif } #ifdef CONFIG_TDLS sint OnTDLS(_adapter *adapter, union recv_frame *precv_frame) { struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; sint ret = _SUCCESS; u8 *paction = get_recvframe_data(precv_frame); u8 category_field = 1; #ifdef CONFIG_WFD u8 WFA_OUI[3] = { 0x50, 0x6f, 0x9a }; #endif //CONFIG_WFD struct tdls_info *ptdlsinfo = &(adapter->tdlsinfo); //point to action field paction+=pattrib->hdrlen + pattrib->iv_len + SNAP_SIZE + ETH_TYPE_LEN + PAYLOAD_TYPE_LEN + category_field; if(ptdlsinfo->tdls_enable == _FALSE) { DBG_871X("recv tdls frame, " "but tdls haven't enabled\n"); ret = _FAIL; return ret; } switch(*paction){ case TDLS_SETUP_REQUEST: DBG_871X("recv tdls setup request frame from "MAC_FMT"\n", MAC_ARG(pattrib->src)); ret=On_TDLS_Setup_Req(adapter, precv_frame); break; case TDLS_SETUP_RESPONSE: DBG_871X("recv tdls setup response frame from "MAC_FMT"\n", MAC_ARG(pattrib->src)); ret=On_TDLS_Setup_Rsp(adapter, precv_frame); break; case TDLS_SETUP_CONFIRM: DBG_871X("recv tdls setup confirm frame from "MAC_FMT"\n", MAC_ARG(pattrib->src)); ret=On_TDLS_Setup_Cfm(adapter, precv_frame); break; case TDLS_TEARDOWN: DBG_871X("recv tdls teardown, free sta_info from "MAC_FMT"\n", MAC_ARG(pattrib->src)); ret=On_TDLS_Teardown(adapter, precv_frame); break; case TDLS_DISCOVERY_REQUEST: DBG_871X("recv tdls discovery request frame from "MAC_FMT"\n", MAC_ARG(pattrib->src)); ret=On_TDLS_Dis_Req(adapter, precv_frame); break; case TDLS_PEER_TRAFFIC_INDICATION: DBG_871X("recv tdls peer traffic indication frame\n"); ret=On_TDLS_Peer_Traffic_Indication(adapter, precv_frame); break; case TDLS_PEER_TRAFFIC_RESPONSE: DBG_871X("recv tdls peer traffic response frame\n"); ret=On_TDLS_Peer_Traffic_Rsp(adapter, precv_frame); break; case TDLS_CHANNEL_SWITCH_REQUEST: DBG_871X("recv tdls channel switch request frame\n"); ret=On_TDLS_Ch_Switch_Req(adapter, precv_frame); break; case TDLS_CHANNEL_SWITCH_RESPONSE: DBG_871X("recv tdls channel switch response frame\n"); ret=On_TDLS_Ch_Switch_Rsp(adapter, precv_frame); break; #ifdef CONFIG_WFD case 0x50: //First byte of WFA OUI if( _rtw_memcmp(WFA_OUI, (paction), 3) ) { if( *(paction + 3) == 0x04) //Probe request frame { //WFDTDLS: for sigma test, do not setup direct link automatically ptdlsinfo->dev_discovered = 1; DBG_871X("recv tunneled probe request frame\n"); issue_tunneled_probe_rsp(adapter, precv_frame); } if( *(paction + 3) == 0x05) //Probe response frame { //WFDTDLS: for sigma test, do not setup direct link automatically ptdlsinfo->dev_discovered = 1; DBG_871X("recv tunneled probe response frame\n"); } } break; #endif //CONFIG_WFD default: DBG_871X("receive TDLS frame %d but not support\n", *paction); ret=_FAIL; break; } exit: return ret; } #endif void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_info*sta); void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_info*sta) { int sz; struct sta_info *psta = NULL; struct stainfo_stats *pstats = NULL; struct rx_pkt_attrib *pattrib = & prframe->u.hdr.attrib; struct recv_priv *precvpriv = &padapter->recvpriv; sz = get_recvframe_len(prframe); precvpriv->rx_bytes += sz; padapter->mlmepriv.LinkDetectInfo.NumRxOkInPeriod++; if( (!MacAddr_isBcst(pattrib->dst)) && (!IS_MCAST(pattrib->dst))){ padapter->mlmepriv.LinkDetectInfo.NumRxUnicastOkInPeriod++; } if(sta) psta = sta; else psta = prframe->u.hdr.psta; if(psta) { pstats = &psta->sta_stats; pstats->rx_data_pkts++; pstats->rx_bytes += sz; #ifdef CONFIG_TDLS if(psta->tdls_sta_state & TDLS_LINKED_STATE) { struct sta_info *pap_sta = NULL; pap_sta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv)); if(pap_sta) { pstats = &pap_sta->sta_stats; pstats->rx_data_pkts++; pstats->rx_bytes += sz; } } #endif //CONFIG_TDLS } #ifdef CONFIG_CHECK_LEAVE_LPS traffic_check_for_leave_lps(padapter, _FALSE, 0); #endif //CONFIG_LPS } sint sta2sta_data_frame( _adapter *adapter, union recv_frame *precv_frame, struct sta_info**psta ); sint sta2sta_data_frame( _adapter *adapter, union recv_frame *precv_frame, struct sta_info**psta ) { u8 *ptr = precv_frame->u.hdr.rx_data; sint ret = _SUCCESS; struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; struct sta_priv *pstapriv = &adapter->stapriv; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; u8 *mybssid = get_bssid(pmlmepriv); u8 *myhwaddr = myid(&adapter->eeprompriv); u8 * sta_addr = NULL; sint bmcast = IS_MCAST(pattrib->dst); #ifdef CONFIG_TDLS struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; struct sta_info *ptdls_sta=NULL; u8 *psnap_type=ptr+pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE; //frame body located after [+2]: ether-type, [+1]: payload type u8 *pframe_body = psnap_type+2+1; #endif _func_enter_; //DBG_871X("[%s] %d, seqnum:%d\n", __FUNCTION__, __LINE__, pattrib->seq_num); if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) || (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { // filter packets that SA is myself or multicast or broadcast if (_rtw_memcmp(myhwaddr, pattrib->src, ETH_ALEN)){ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" SA==myself \n")); ret= _FAIL; goto exit; } if( (!_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN)) && (!bmcast) ){ ret= _FAIL; goto exit; } if( _rtw_memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || _rtw_memcmp(mybssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || (!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN)) ) { ret= _FAIL; goto exit; } sta_addr = pattrib->src; } else if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) { #ifdef CONFIG_TDLS //direct link data transfer if(ptdlsinfo->link_established == _TRUE){ ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->src); if(ptdls_sta==NULL) { ret=_FAIL; goto exit; } else if(ptdls_sta->tdls_sta_state&TDLS_LINKED_STATE) { // filter packets that SA is myself or multicast or broadcast if (_rtw_memcmp(myhwaddr, pattrib->src, ETH_ALEN)){ ret= _FAIL; goto exit; } // da should be for me if((!_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN))&& (!bmcast)) { ret= _FAIL; goto exit; } // check BSSID if( _rtw_memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || _rtw_memcmp(mybssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || (!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN)) ) { ret= _FAIL; goto exit; } //process UAPSD tdls sta process_pwrbit_data(adapter, precv_frame); // if NULL-frame, check pwrbit if ((GetFrameSubType(ptr) & WIFI_DATA_NULL) == WIFI_DATA_NULL) { //NULL-frame with pwrbit=1, buffer_STA should buffer frames for sleep_STA if(GetPwrMgt(ptr)) { DBG_871X("TDLS: recv peer null frame with pwr bit 1\n"); //ptdls_sta->tdls_sta_state|=TDLS_PEER_SLEEP_STATE; // it would be triggered when we are off channel and receiving NULL DATA // we can confirm that peer STA is at off channel } else if(ptdls_sta->tdls_sta_state&TDLS_CH_SWITCH_ON_STATE) { if((ptdls_sta->tdls_sta_state & TDLS_PEER_AT_OFF_STATE) != TDLS_PEER_AT_OFF_STATE) { issue_nulldata_to_TDLS_peer_STA(adapter, ptdls_sta->hwaddr, 0, 0, 0); ptdls_sta->tdls_sta_state |= TDLS_PEER_AT_OFF_STATE; On_TDLS_Peer_Traffic_Rsp(adapter, precv_frame); } } //[TDLS] TODO: Updated BSSID's seq. DBG_871X("drop Null Data\n"); ptdls_sta->tdls_sta_state &= ~(TDLS_WAIT_PTR_STATE); ret= _FAIL; goto exit; } //receive some of all TDLS management frames, process it at ON_TDLS if((_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_TDLS, 2))){ ret= OnTDLS(adapter, precv_frame); goto exit; } if ((GetFrameSubType(ptr) & WIFI_QOS_DATA_TYPE) == WIFI_QOS_DATA_TYPE) { process_wmmps_data(adapter, precv_frame); } ptdls_sta->tdls_sta_state &= ~(TDLS_WAIT_PTR_STATE); } sta_addr = pattrib->src; } else #endif //CONFIG_TDLS { // For Station mode, sa and bssid should always be BSSID, and DA is my mac-address if(!_rtw_memcmp(pattrib->bssid, pattrib->src, ETH_ALEN) ) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("bssid != TA under STATION_MODE; drop pkt\n")); ret= _FAIL; goto exit; } sta_addr = pattrib->bssid; } } else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { if (bmcast) { // For AP mode, if DA == MCAST, then BSSID should be also MCAST if (!IS_MCAST(pattrib->bssid)){ ret= _FAIL; goto exit; } } else // not mc-frame { // For AP mode, if DA is non-MCAST, then it must be BSSID, and bssid == BSSID if(!_rtw_memcmp(pattrib->bssid, pattrib->dst, ETH_ALEN)) { ret= _FAIL; goto exit; } sta_addr = pattrib->src; } } else if(check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) { _rtw_memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN); _rtw_memcpy(pattrib->src, GetAddr2Ptr(ptr), ETH_ALEN); _rtw_memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN); _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); sta_addr = mybssid; } else { ret = _FAIL; } if(bmcast) *psta = rtw_get_bcmc_stainfo(adapter); else *psta = rtw_get_stainfo(pstapriv, sta_addr); // get ap_info #ifdef CONFIG_TDLS if(ptdls_sta != NULL) { *psta = ptdls_sta; } #endif //CONFIG_TDLS if (*psta == NULL) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("can't get psta under sta2sta_data_frame ; drop pkt\n")); #ifdef CONFIG_MP_INCLUDED if (adapter->registrypriv.mp_mode == 1) { if(check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) adapter->mppriv.rx_pktloss++; } #endif ret= _FAIL; goto exit; } exit: _func_exit_; return ret; } sint ap2sta_data_frame( _adapter *adapter, union recv_frame *precv_frame, struct sta_info**psta ); sint ap2sta_data_frame( _adapter *adapter, union recv_frame *precv_frame, struct sta_info**psta ) { u8 *ptr = precv_frame->u.hdr.rx_data; struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; sint ret = _SUCCESS; struct sta_priv *pstapriv = &adapter->stapriv; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; u8 *mybssid = get_bssid(pmlmepriv); u8 *myhwaddr = myid(&adapter->eeprompriv); sint bmcast = IS_MCAST(pattrib->dst); _func_enter_; if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) && (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE || check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE ) ) { // filter packets that SA is myself or multicast or broadcast if (_rtw_memcmp(myhwaddr, pattrib->src, ETH_ALEN)){ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" SA==myself \n")); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s SA="MAC_FMT", myhwaddr="MAC_FMT"\n", __FUNCTION__, MAC_ARG(pattrib->src), MAC_ARG(myhwaddr)); #endif ret= _FAIL; goto exit; } // da should be for me if((!_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN))&& (!bmcast)) { RT_TRACE(_module_rtl871x_recv_c_,_drv_info_, (" ap2sta_data_frame: compare DA fail; DA="MAC_FMT"\n", MAC_ARG(pattrib->dst))); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s DA="MAC_FMT"\n", __func__, MAC_ARG(pattrib->dst)); #endif ret= _FAIL; goto exit; } // check BSSID if( _rtw_memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || _rtw_memcmp(mybssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || (!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN)) ) { RT_TRACE(_module_rtl871x_recv_c_,_drv_info_, (" ap2sta_data_frame: compare BSSID fail ; BSSID="MAC_FMT"\n", MAC_ARG(pattrib->bssid))); RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("mybssid="MAC_FMT"\n", MAC_ARG(mybssid))); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s BSSID="MAC_FMT", mybssid="MAC_FMT"\n", __FUNCTION__, MAC_ARG(pattrib->bssid), MAC_ARG(mybssid)); DBG_871X( "this adapter = %d, buddy adapter = %d\n", adapter->adapter_type, adapter->pbuddy_adapter->adapter_type ); #endif if(!bmcast) { DBG_871X("issue_deauth to the nonassociated ap=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->bssid)); issue_deauth(adapter, pattrib->bssid, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); } ret= _FAIL; goto exit; } if(bmcast) *psta = rtw_get_bcmc_stainfo(adapter); else *psta = rtw_get_stainfo(pstapriv, pattrib->bssid); // get ap_info if (*psta == NULL) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("ap2sta: can't get psta under STATION_MODE ; drop pkt\n")); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s can't get psta under STATION_MODE ; drop pkt\n", __FUNCTION__); #endif ret= _FAIL; goto exit; } if ((GetFrameSubType(ptr) & WIFI_QOS_DATA_TYPE) == WIFI_QOS_DATA_TYPE) { } if (GetFrameSubType(ptr) & BIT(6)) { /* No data, will not indicate to upper layer, temporily count it here */ count_rx_stats(adapter, precv_frame, *psta); ret = RTW_RX_HANDLED; goto exit; } } else if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) && (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ) { _rtw_memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN); _rtw_memcpy(pattrib->src, GetAddr2Ptr(ptr), ETH_ALEN); _rtw_memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN); _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); // _rtw_memcpy(pattrib->bssid, mybssid, ETH_ALEN); *psta = rtw_get_stainfo(pstapriv, pattrib->bssid); // get sta_info if (*psta == NULL) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("can't get psta under MP_MODE ; drop pkt\n")); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s can't get psta under WIFI_MP_STATE ; drop pkt\n", __FUNCTION__); #endif ret= _FAIL; goto exit; } } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { /* Special case */ ret = RTW_RX_HANDLED; goto exit; } else { if(_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN)&& (!bmcast)) { *psta = rtw_get_stainfo(pstapriv, pattrib->bssid); // get sta_info if (*psta == NULL) { //for AP multicast issue , modify by yiwei static u32 send_issue_deauth_time=0; //DBG_871X("After send deauth , %u ms has elapsed.\n", rtw_get_passing_time_ms(send_issue_deauth_time)); if(rtw_get_passing_time_ms(send_issue_deauth_time) > 10000 || send_issue_deauth_time == 0 ) { send_issue_deauth_time = rtw_get_current_time(); DBG_871X("issue_deauth to the ap=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->bssid)); issue_deauth(adapter, pattrib->bssid, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); } } } ret = _FAIL; #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s fw_state:0x%x\n", __FUNCTION__, get_fwstate(pmlmepriv)); #endif } exit: _func_exit_; return ret; } sint sta2ap_data_frame( _adapter *adapter, union recv_frame *precv_frame, struct sta_info**psta ); sint sta2ap_data_frame( _adapter *adapter, union recv_frame *precv_frame, struct sta_info**psta ) { u8 *ptr = precv_frame->u.hdr.rx_data; struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; struct sta_priv *pstapriv = &adapter->stapriv; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; unsigned char *mybssid = get_bssid(pmlmepriv); sint ret=_SUCCESS; _func_enter_; if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { //For AP mode, RA=BSSID, TX=STA(SRC_ADDR), A3=DST_ADDR if(!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN)) { ret= _FAIL; goto exit; } *psta = rtw_get_stainfo(pstapriv, pattrib->src); if (*psta == NULL) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("can't get psta under AP_MODE; drop pkt\n")); DBG_871X("issue_deauth to sta=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->src)); issue_deauth(adapter, pattrib->src, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); ret = RTW_RX_HANDLED; goto exit; } process_pwrbit_data(adapter, precv_frame); if ((GetFrameSubType(ptr) & WIFI_QOS_DATA_TYPE) == WIFI_QOS_DATA_TYPE) { process_wmmps_data(adapter, precv_frame); } if (GetFrameSubType(ptr) & BIT(6)) { /* No data, will not indicate to upper layer, temporily count it here */ count_rx_stats(adapter, precv_frame, *psta); ret = RTW_RX_HANDLED; goto exit; } } else if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) && (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ) { DBG_871X("%s ,in WIFI_MP_STATE \n",__func__); _rtw_memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN); _rtw_memcpy(pattrib->src, GetAddr2Ptr(ptr), ETH_ALEN); _rtw_memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN); _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); // _rtw_memcpy(pattrib->bssid, mybssid, ETH_ALEN); *psta = rtw_get_stainfo(pstapriv, pattrib->bssid); // get sta_info if (*psta == NULL) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("can't get psta under MP_MODE ; drop pkt\n")); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s can't get psta under WIFI_MP_STATE ; drop pkt\n", __FUNCTION__); #endif ret= _FAIL; goto exit; } } else { u8 *myhwaddr = myid(&adapter->eeprompriv); if (!_rtw_memcmp(pattrib->ra, myhwaddr, ETH_ALEN)) { ret = RTW_RX_HANDLED; goto exit; } DBG_871X("issue_deauth to sta=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->src)); issue_deauth(adapter, pattrib->src, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); ret = RTW_RX_HANDLED; goto exit; } exit: _func_exit_; return ret; } sint validate_recv_ctrl_frame(_adapter *padapter, union recv_frame *precv_frame); sint validate_recv_ctrl_frame(_adapter *padapter, union recv_frame *precv_frame) { struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; struct sta_priv *pstapriv = &padapter->stapriv; u8 *pframe = precv_frame->u.hdr.rx_data; struct sta_info *psta=NULL; //uint len = precv_frame->u.hdr.len; //DBG_871X("+validate_recv_ctrl_frame\n"); if (GetFrameType(pframe) != WIFI_CTRL_TYPE) { return _FAIL; } //receive the frames that ra(a1) is my address if (!_rtw_memcmp(GetAddr1Ptr(pframe), myid(&padapter->eeprompriv), ETH_ALEN)) { return _FAIL; } psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); if (psta==NULL) { return _FAIL; } //for rx pkt statistics psta->sta_stats.rx_ctrl_pkts++; //only handle ps-poll if(GetFrameSubType(pframe) == WIFI_PSPOLL) { #ifdef CONFIG_AP_MODE u16 aid; u8 wmmps_ac=0; aid = GetAid(pframe); if(psta->aid!=aid) { return _FAIL; } switch(pattrib->priority) { case 1: case 2: wmmps_ac = psta->uapsd_bk&BIT(0); break; case 4: case 5: wmmps_ac = psta->uapsd_vi&BIT(0); break; case 6: case 7: wmmps_ac = psta->uapsd_vo&BIT(0); break; case 0: case 3: default: wmmps_ac = psta->uapsd_be&BIT(0); break; } if(wmmps_ac) return _FAIL; if(psta->state & WIFI_STA_ALIVE_CHK_STATE) { DBG_871X("%s alive check-rx ps-poll\n", __func__); psta->expire_to = pstapriv->expire_to; psta->state ^= WIFI_STA_ALIVE_CHK_STATE; } if((psta->state&WIFI_SLEEP_STATE) && (pstapriv->sta_dz_bitmap&BIT(psta->aid))) { _irqL irqL; _list *xmitframe_plist, *xmitframe_phead; struct xmit_frame *pxmitframe=NULL; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; //_enter_critical_bh(&psta->sleep_q.lock, &irqL); _enter_critical_bh(&pxmitpriv->lock, &irqL); xmitframe_phead = get_list_head(&psta->sleep_q); xmitframe_plist = get_next(xmitframe_phead); if ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); xmitframe_plist = get_next(xmitframe_plist); rtw_list_delete(&pxmitframe->list); psta->sleepq_len--; if(psta->sleepq_len>0) pxmitframe->attrib.mdata = 1; else pxmitframe->attrib.mdata = 0; pxmitframe->attrib.triggered = 1; //DBG_871X("handling ps-poll, q_len=%d, tim=%x\n", psta->sleepq_len, pstapriv->tim_bitmap); #if 0 _exit_critical_bh(&psta->sleep_q.lock, &irqL); if(rtw_hal_xmit(padapter, pxmitframe) == _TRUE) { rtw_os_xmit_complete(padapter, pxmitframe); } _enter_critical_bh(&psta->sleep_q.lock, &irqL); #endif rtw_hal_xmitframe_enqueue(padapter, pxmitframe); if(psta->sleepq_len==0) { pstapriv->tim_bitmap &= ~BIT(psta->aid); //DBG_871X("after handling ps-poll, tim=%x\n", pstapriv->tim_bitmap); //upate BCN for TIM IE //update_BCNTIM(padapter); update_beacon(padapter, _TIM_IE_, NULL, _TRUE); } //_exit_critical_bh(&psta->sleep_q.lock, &irqL); _exit_critical_bh(&pxmitpriv->lock, &irqL); } else { //_exit_critical_bh(&psta->sleep_q.lock, &irqL); _exit_critical_bh(&pxmitpriv->lock, &irqL); //DBG_871X("no buffered packets to xmit\n"); if(pstapriv->tim_bitmap&BIT(psta->aid)) { if(psta->sleepq_len==0) { DBG_871X("no buffered packets to xmit\n"); //issue nulldata with More data bit = 0 to indicate we have no buffered packets issue_nulldata_in_interrupt(padapter, psta->hwaddr); } else { DBG_871X("error!psta->sleepq_len=%d\n", psta->sleepq_len); psta->sleepq_len=0; } pstapriv->tim_bitmap &= ~BIT(psta->aid); //upate BCN for TIM IE //update_BCNTIM(padapter); update_beacon(padapter, _TIM_IE_, NULL, _TRUE); } } } #endif //CONFIG_AP_MODE } else if(GetFrameSubType(pframe) == WIFI_NDPA) { #ifdef CONFIG_BEAMFORMING beamforming_get_ndpa_frame(padapter, precv_frame); #endif } return _FAIL; } union recv_frame* recvframe_chk_defrag(PADAPTER padapter, union recv_frame *precv_frame); sint validate_recv_mgnt_frame(PADAPTER padapter, union recv_frame *precv_frame); sint validate_recv_mgnt_frame(PADAPTER padapter, union recv_frame *precv_frame) { //struct mlme_priv *pmlmepriv = &adapter->mlmepriv; RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("+validate_recv_mgnt_frame\n")); #if 0 if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { #ifdef CONFIG_NATIVEAP_MLME mgt_dispatcher(padapter, precv_frame); #else rtw_hostapd_mlme_rx(padapter, precv_frame); #endif } else { mgt_dispatcher(padapter, precv_frame); } #endif precv_frame = recvframe_chk_defrag(padapter, precv_frame); if (precv_frame == NULL) { RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_,("%s: fragment packet\n",__FUNCTION__)); return _SUCCESS; } { //for rx pkt statistics struct sta_info *psta = rtw_get_stainfo(&padapter->stapriv, GetAddr2Ptr(precv_frame->u.hdr.rx_data)); if (psta) { psta->sta_stats.rx_mgnt_pkts++; if (GetFrameSubType(precv_frame->u.hdr.rx_data) == WIFI_BEACON) psta->sta_stats.rx_beacon_pkts++; else if (GetFrameSubType(precv_frame->u.hdr.rx_data) == WIFI_PROBEREQ) psta->sta_stats.rx_probereq_pkts++; else if (GetFrameSubType(precv_frame->u.hdr.rx_data) == WIFI_PROBERSP) { if (_rtw_memcmp(padapter->eeprompriv.mac_addr, GetAddr1Ptr(precv_frame->u.hdr.rx_data), ETH_ALEN) == _TRUE) psta->sta_stats.rx_probersp_pkts++; else if (is_broadcast_mac_addr(GetAddr1Ptr(precv_frame->u.hdr.rx_data)) || is_multicast_mac_addr(GetAddr1Ptr(precv_frame->u.hdr.rx_data))) psta->sta_stats.rx_probersp_bm_pkts++; else psta->sta_stats.rx_probersp_uo_pkts++; } } } #ifdef CONFIG_INTEL_PROXIM if(padapter->proximity.proxim_on==_TRUE) { struct rx_pkt_attrib * pattrib=&precv_frame->u.hdr.attrib; struct recv_stat* prxstat=( struct recv_stat * ) precv_frame->u.hdr.rx_head ; u8 * pda,*psa,*pbssid,*ptr; ptr=precv_frame->u.hdr.rx_data; pda = get_da(ptr); psa = get_sa(ptr); pbssid = get_hdr_bssid(ptr); _rtw_memcpy(pattrib->dst, pda, ETH_ALEN); _rtw_memcpy(pattrib->src, psa, ETH_ALEN); _rtw_memcpy(pattrib->bssid, pbssid, ETH_ALEN); switch(pattrib->to_fr_ds) { case 0: _rtw_memcpy(pattrib->ra, pda, ETH_ALEN); _rtw_memcpy(pattrib->ta, psa, ETH_ALEN); break; case 1: _rtw_memcpy(pattrib->ra, pda, ETH_ALEN); _rtw_memcpy(pattrib->ta, pbssid, ETH_ALEN); break; case 2: _rtw_memcpy(pattrib->ra, pbssid, ETH_ALEN); _rtw_memcpy(pattrib->ta, psa, ETH_ALEN); break; case 3: _rtw_memcpy(pattrib->ra, GetAddr1Ptr(ptr), ETH_ALEN); _rtw_memcpy(pattrib->ta, GetAddr2Ptr(ptr), ETH_ALEN); RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" case 3\n")); break; default: break; } pattrib->priority=0; pattrib->hdrlen = pattrib->to_fr_ds==3 ? 30 : 24; padapter->proximity.proxim_rx(padapter,precv_frame); } #endif mgt_dispatcher(padapter, precv_frame); return _SUCCESS; } sint validate_recv_data_frame(_adapter *adapter, union recv_frame *precv_frame); sint validate_recv_data_frame(_adapter *adapter, union recv_frame *precv_frame) { u8 bretry; u8 *psa, *pda, *pbssid; struct sta_info *psta = NULL; u8 *ptr = precv_frame->u.hdr.rx_data; struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; struct sta_priv *pstapriv = &adapter->stapriv; struct security_priv *psecuritypriv = &adapter->securitypriv; sint ret = _SUCCESS; _func_enter_; bretry = GetRetry(ptr); pda = get_da(ptr); psa = get_sa(ptr); pbssid = get_hdr_bssid(ptr); if(pbssid == NULL){ #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s pbssid == NULL\n", __func__); #endif ret= _FAIL; goto exit; } _rtw_memcpy(pattrib->dst, pda, ETH_ALEN); _rtw_memcpy(pattrib->src, psa, ETH_ALEN); _rtw_memcpy(pattrib->bssid, pbssid, ETH_ALEN); switch(pattrib->to_fr_ds) { case 0: _rtw_memcpy(pattrib->ra, pda, ETH_ALEN); _rtw_memcpy(pattrib->ta, psa, ETH_ALEN); ret = sta2sta_data_frame(adapter, precv_frame, &psta); break; case 1: _rtw_memcpy(pattrib->ra, pda, ETH_ALEN); _rtw_memcpy(pattrib->ta, pbssid, ETH_ALEN); ret = ap2sta_data_frame(adapter, precv_frame, &psta); break; case 2: _rtw_memcpy(pattrib->ra, pbssid, ETH_ALEN); _rtw_memcpy(pattrib->ta, psa, ETH_ALEN); ret = sta2ap_data_frame(adapter, precv_frame, &psta); break; case 3: _rtw_memcpy(pattrib->ra, GetAddr1Ptr(ptr), ETH_ALEN); _rtw_memcpy(pattrib->ta, GetAddr2Ptr(ptr), ETH_ALEN); ret =_FAIL; RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" case 3\n")); break; default: ret =_FAIL; break; } if(ret ==_FAIL){ #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s case:%d, res:%d\n", __FUNCTION__, pattrib->to_fr_ds, ret); #endif goto exit; } else if (ret == RTW_RX_HANDLED) { goto exit; } if(psta==NULL){ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" after to_fr_ds_chk; psta==NULL \n")); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s psta == NULL\n", __func__); #endif ret= _FAIL; goto exit; } //psta->rssi = prxcmd->rssi; //psta->signal_quality= prxcmd->sq; precv_frame->u.hdr.psta = psta; pattrib->amsdu=0; pattrib->ack_policy = 0; //parsing QC field if(pattrib->qos == 1) { pattrib->priority = GetPriority((ptr + 24)); pattrib->ack_policy = GetAckpolicy((ptr + 24)); pattrib->amsdu = GetAMsdu((ptr + 24)); pattrib->hdrlen = pattrib->to_fr_ds==3 ? 32 : 26; if(pattrib->priority!=0 && pattrib->priority!=3) { adapter->recvpriv.bIsAnyNonBEPkts = _TRUE; } } else { pattrib->priority=0; pattrib->hdrlen = pattrib->to_fr_ds==3 ? 30 : 24; } if(pattrib->order)//HT-CTRL 11n { pattrib->hdrlen += 4; } precv_frame->u.hdr.preorder_ctrl = &psta->recvreorder_ctrl[pattrib->priority]; // decache, drop duplicate recv packets if(recv_decache(precv_frame, bretry, &psta->sta_recvpriv.rxcache) == _FAIL) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("decache : drop pkt\n")); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s recv_decache return _FAIL\n", __func__); #endif ret= _FAIL; goto exit; } #if 0 if(psta->tdls_sta_state & TDLS_LINKED_STATE ) { if(psta->dot118021XPrivacy==_AES_) pattrib->encrypt=psta->dot118021XPrivacy; } #endif //CONFIG_TDLS if(pattrib->privacy){ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("validate_recv_data_frame:pattrib->privacy=%x\n", pattrib->privacy)); RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n ^^^^^^^^^^^IS_MCAST(pattrib->ra(0x%02x))=%d^^^^^^^^^^^^^^^6\n", pattrib->ra[0],IS_MCAST(pattrib->ra))); #ifdef CONFIG_TDLS if((psta->tdls_sta_state & TDLS_LINKED_STATE) && (psta->dot118021XPrivacy==_AES_)) { pattrib->encrypt=psta->dot118021XPrivacy; } else #endif //CONFIG_TDLS GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, IS_MCAST(pattrib->ra)); RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n pattrib->encrypt=%d\n",pattrib->encrypt)); SET_ICE_IV_LEN(pattrib->iv_len, pattrib->icv_len, pattrib->encrypt); } else { pattrib->encrypt = 0; pattrib->iv_len = pattrib->icv_len = 0; } exit: _func_exit_; return ret; } #ifdef CONFIG_IEEE80211W static sint validate_80211w_mgmt(_adapter *adapter, union recv_frame *precv_frame) { struct mlme_priv *pmlmepriv = &adapter->mlmepriv; struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; u8 *ptr = precv_frame->u.hdr.rx_data; u8 type; u8 subtype; type = GetFrameType(ptr); subtype = GetFrameSubType(ptr); //bit(7)~bit(2) //only support station mode if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, _FW_LINKED) && adapter->securitypriv.binstallBIPkey == _TRUE) { //unicast management frame decrypt if(pattrib->privacy && !(IS_MCAST(GetAddr1Ptr(ptr))) && (subtype == WIFI_DEAUTH || subtype == WIFI_DISASSOC || subtype == WIFI_ACTION)) { u8 *ppp, *mgmt_DATA; u32 data_len=0; ppp = GetAddr2Ptr(ptr); pattrib->bdecrypted = 0; pattrib->encrypt = _AES_; pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); //set iv and icv length SET_ICE_IV_LEN(pattrib->iv_len, pattrib->icv_len, pattrib->encrypt); _rtw_memcpy(pattrib->ra, GetAddr1Ptr(ptr), ETH_ALEN); _rtw_memcpy(pattrib->ta, GetAddr2Ptr(ptr), ETH_ALEN); //actual management data frame body data_len = pattrib->pkt_len - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len; mgmt_DATA = rtw_zmalloc(data_len); if(mgmt_DATA == NULL) { DBG_871X("%s mgmt allocate fail !!!!!!!!!\n", __FUNCTION__); goto validate_80211w_fail; } /* //dump the packet content before decrypt { int pp; printk("pattrib->pktlen = %d =>", pattrib->pkt_len); for(pp=0;pp< pattrib->pkt_len; pp++) printk(" %02x ", ptr[pp]); printk("\n"); }*/ precv_frame = decryptor(adapter, precv_frame); //save actual management data frame body _rtw_memcpy(mgmt_DATA, ptr+pattrib->hdrlen+pattrib->iv_len, data_len); //overwrite the iv field _rtw_memcpy(ptr+pattrib->hdrlen, mgmt_DATA, data_len); //remove the iv and icv length pattrib->pkt_len = pattrib->pkt_len - pattrib->iv_len - pattrib->icv_len; rtw_mfree(mgmt_DATA, data_len); /* //print packet content after decryption { int pp; printk("after decryption pattrib->pktlen = %d @@=>", pattrib->pkt_len); for(pp=0;pp< pattrib->pkt_len; pp++) printk(" %02x ", ptr[pp]); printk("\n"); }*/ if(!precv_frame) { DBG_871X("%s mgmt descrypt fail !!!!!!!!!\n", __FUNCTION__); goto validate_80211w_fail; } } else if(IS_MCAST(GetAddr1Ptr(ptr)) && (subtype == WIFI_DEAUTH || subtype == WIFI_DISASSOC)) { sint BIP_ret = _SUCCESS; //verify BIP MME IE of broadcast/multicast de-auth/disassoc packet BIP_ret = rtw_BIP_verify(adapter, (u8 * )precv_frame); if(BIP_ret == _FAIL) { //DBG_871X("802.11w BIP verify fail\n"); goto validate_80211w_fail; } else if(BIP_ret == RTW_RX_HANDLED) { DBG_871X("802.11w recv none protected packet\n"); //drop pkt, don't issue sa query request //issue_action_SA_Query(adapter, NULL, 0, 0); goto validate_80211w_fail; } }//802.11w protect else { if(subtype == WIFI_ACTION) { //according 802.11-2012 standard, these five types are not robust types if( ptr[WLAN_HDR_A3_LEN] != RTW_WLAN_CATEGORY_PUBLIC && ptr[WLAN_HDR_A3_LEN] != RTW_WLAN_CATEGORY_HT && ptr[WLAN_HDR_A3_LEN] != RTW_WLAN_CATEGORY_UNPROTECTED_WNM && ptr[WLAN_HDR_A3_LEN] != RTW_WLAN_CATEGORY_SELF_PROTECTED && ptr[WLAN_HDR_A3_LEN] != RTW_WLAN_CATEGORY_P2P) { DBG_871X("action frame category=%d should robust\n", ptr[WLAN_HDR_A3_LEN]); goto validate_80211w_fail; } } else if(subtype == WIFI_DEAUTH || subtype == WIFI_DISASSOC) { unsigned short reason; reason = le16_to_cpu(*(unsigned short *)(ptr + WLAN_HDR_A3_LEN)); DBG_871X("802.11w recv none protected packet, reason=%d\n", reason); if(reason == 6 || reason == 7) { //issue sa query request issue_action_SA_Query(adapter, NULL, 0, 0); } goto validate_80211w_fail; } } } return _SUCCESS; validate_80211w_fail: return _FAIL; } #endif //CONFIG_IEEE80211W static inline void dump_rx_packet(u8 *ptr) { int i; DBG_871X("############################# \n"); for(i=0; i<64;i=i+8) DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr+i), *(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); DBG_871X("############################# \n"); } sint validate_recv_frame(_adapter *adapter, union recv_frame *precv_frame); sint validate_recv_frame(_adapter *adapter, union recv_frame *precv_frame) { //shall check frame subtype, to / from ds, da, bssid //then call check if rx seq/frag. duplicated. u8 type; u8 subtype; sint retval = _SUCCESS; struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; u8 *ptr = precv_frame->u.hdr.rx_data; u8 ver =(unsigned char) (*ptr)&0x3 ; #ifdef CONFIG_FIND_BEST_CHANNEL struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; #endif #ifdef CONFIG_TDLS struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; #endif //CONFIG_TDLS #ifdef CONFIG_WAPI_SUPPORT PRT_WAPI_T pWapiInfo = &adapter->wapiInfo; struct recv_frame_hdr *phdr = &precv_frame->u.hdr; u8 wai_pkt = 0; u16 sc; u8 external_len = 0; #endif _func_enter_; #ifdef CONFIG_FIND_BEST_CHANNEL if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) { int ch_set_idx = rtw_ch_set_search_ch(pmlmeext->channel_set, rtw_get_oper_ch(adapter)); if (ch_set_idx >= 0) pmlmeext->channel_set[ch_set_idx].rx_count++; } #endif #ifdef CONFIG_TDLS if(ptdlsinfo->ch_sensing==1 && ptdlsinfo->cur_channel !=0){ ptdlsinfo->collect_pkt_num[ptdlsinfo->cur_channel-1]++; } #endif //CONFIG_TDLS #ifdef RTK_DMP_PLATFORM if ( 0 ) { DBG_871X("++\n"); { int i; for(i=0; i<64;i=i+8) DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:", *(ptr+i), *(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); } DBG_871X("--\n"); } #endif //RTK_DMP_PLATFORM //add version chk if(ver!=0){ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_data_frame fail! (ver!=0)\n")); retval= _FAIL; DBG_COUNTER(adapter->rx_logs.core_rx_pre_ver_err); goto exit; } type = GetFrameType(ptr); subtype = GetFrameSubType(ptr); //bit(7)~bit(2) pattrib->to_fr_ds = get_tofr_ds(ptr); pattrib->frag_num = GetFragNum(ptr); pattrib->seq_num = GetSequence(ptr); pattrib->pw_save = GetPwrMgt(ptr); pattrib->mfrag = GetMFrag(ptr); pattrib->mdata = GetMData(ptr); pattrib->privacy = GetPrivacy(ptr); pattrib->order = GetOrder(ptr); #ifdef CONFIG_WAPI_SUPPORT sc = (pattrib->seq_num<<4) | pattrib->frag_num; #endif #if 1 //Dump rx packets { u8 bDumpRxPkt; rtw_hal_get_def_var(adapter, HAL_DEF_DBG_DUMP_RXPKT, &(bDumpRxPkt)); if (bDumpRxPkt == 1) //dump all rx packets dump_rx_packet(ptr); else if ((bDumpRxPkt == 2) && (type == WIFI_MGT_TYPE)) dump_rx_packet(ptr); else if ((bDumpRxPkt == 3) && (type == WIFI_DATA_TYPE)) dump_rx_packet(ptr); } #endif switch (type) { case WIFI_MGT_TYPE: //mgnt DBG_COUNTER(adapter->rx_logs.core_rx_pre_mgmt); #ifdef CONFIG_IEEE80211W if(validate_80211w_mgmt(adapter, precv_frame) == _FAIL) { retval = _FAIL; DBG_COUNTER(padapter->rx_logs.core_rx_pre_mgmt_err_80211w); break; } #endif //CONFIG_IEEE80211W retval = validate_recv_mgnt_frame(adapter, precv_frame); if (retval == _FAIL) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_mgnt_frame fail\n")); DBG_COUNTER(adapter->rx_logs.core_rx_pre_mgmt_err); } retval = _FAIL; // only data frame return _SUCCESS break; case WIFI_CTRL_TYPE: //ctrl DBG_COUNTER(adapter->rx_logs.core_rx_pre_ctrl); retval = validate_recv_ctrl_frame(adapter, precv_frame); if (retval == _FAIL) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_ctrl_frame fail\n")); DBG_COUNTER(adapter->rx_logs.core_rx_pre_ctrl_err); } retval = _FAIL; // only data frame return _SUCCESS break; case WIFI_DATA_TYPE: //data DBG_COUNTER(adapter->rx_logs.core_rx_pre_data); #ifdef CONFIG_WAPI_SUPPORT if(pattrib->qos) external_len = 2; else external_len= 0; wai_pkt = rtw_wapi_is_wai_packet(adapter,ptr); phdr->bIsWaiPacket = wai_pkt; if(wai_pkt !=0){ if(sc != adapter->wapiInfo.wapiSeqnumAndFragNum) { adapter->wapiInfo.wapiSeqnumAndFragNum = sc; } else { retval = _FAIL; DBG_COUNTER(adapter->rx_logs.core_rx_pre_data_wapi_seq_err); break; } } else{ if(rtw_wapi_drop_for_key_absent(adapter,GetAddr2Ptr(ptr))){ retval=_FAIL; WAPI_TRACE(WAPI_RX,"drop for key absent for rx \n"); DBG_COUNTER(adapter->rx_logs.core_rx_pre_data_wapi_key_err); break; } } #endif pattrib->qos = (subtype & BIT(7))? 1:0; retval = validate_recv_data_frame(adapter, precv_frame); if (retval == _FAIL) { struct recv_priv *precvpriv = &adapter->recvpriv; //RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_data_frame fail\n")); precvpriv->rx_drop++; DBG_COUNTER(adapter->rx_logs.core_rx_pre_data_err); } else if (retval == _SUCCESS) { #ifdef DBG_RX_DUMP_EAP u8 bDumpRxPkt; u16 eth_type; // dump eapol rtw_hal_get_def_var(adapter, HAL_DEF_DBG_DUMP_RXPKT, &(bDumpRxPkt)); // get ether_type _rtw_memcpy(ð_type, ptr + pattrib->hdrlen + pattrib->iv_len + LLC_HEADER_SIZE, 2); eth_type = ntohs((unsigned short) eth_type); if ((bDumpRxPkt == 4) && (eth_type == 0x888e)) dump_rx_packet(ptr); #endif } else { DBG_COUNTER(adapter->rx_logs.core_rx_pre_data_handled); } break; default: DBG_COUNTER(adapter->rx_logs.core_rx_pre_unknown); RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_data_frame fail! type=0x%x\n", type)); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME validate_recv_data_frame fail! type=0x%x\n", type); #endif retval = _FAIL; break; } exit: _func_exit_; return retval; } //remove the wlanhdr and add the eth_hdr #if 1 sint wlanhdr_to_ethhdr ( union recv_frame *precvframe); sint wlanhdr_to_ethhdr ( union recv_frame *precvframe) { sint rmv_len; u16 eth_type, len; u8 bsnaphdr; u8 *psnap_type; struct ieee80211_snap_hdr *psnap; sint ret=_SUCCESS; _adapter *adapter =precvframe->u.hdr.adapter; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; u8 *ptr = get_recvframe_data(precvframe) ; // point to frame_ctrl field struct rx_pkt_attrib *pattrib = & precvframe->u.hdr.attrib; _func_enter_; if(pattrib->encrypt){ recvframe_pull_tail(precvframe, pattrib->icv_len); } psnap=(struct ieee80211_snap_hdr *)(ptr+pattrib->hdrlen + pattrib->iv_len); psnap_type=ptr+pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE; /* convert hdr + possible LLC headers into Ethernet header */ //eth_type = (psnap_type[0] << 8) | psnap_type[1]; if((_rtw_memcmp(psnap, rtw_rfc1042_header, SNAP_SIZE) && (_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_IPX, 2) == _FALSE) && (_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_APPLETALK_AARP, 2)==_FALSE) )|| //eth_type != ETH_P_AARP && eth_type != ETH_P_IPX) || _rtw_memcmp(psnap, rtw_bridge_tunnel_header, SNAP_SIZE)){ /* remove RFC1042 or Bridge-Tunnel encapsulation and replace EtherType */ bsnaphdr = _TRUE; } else { /* Leave Ethernet header part of hdr and full payload */ bsnaphdr = _FALSE; } rmv_len = pattrib->hdrlen + pattrib->iv_len +(bsnaphdr?SNAP_SIZE:0); len = precvframe->u.hdr.len - rmv_len; RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n===pattrib->hdrlen: %x, pattrib->iv_len:%x ===\n\n", pattrib->hdrlen, pattrib->iv_len)); _rtw_memcpy(ð_type, ptr+rmv_len, 2); eth_type= ntohs((unsigned short )eth_type); //pattrib->ether_type pattrib->eth_type = eth_type; #ifdef CONFIG_AUTO_AP_MODE if (0x8899 == pattrib->eth_type) { struct sta_info *psta = precvframe->u.hdr.psta; DBG_871X("wlan rx: got eth_type=0x%x\n", pattrib->eth_type); if (psta && psta->isrc && psta->pid>0) { u16 rx_pid; rx_pid = *(u16*)(ptr+rmv_len+2); DBG_871X("wlan rx(pid=0x%x): sta("MAC_FMT") pid=0x%x\n", rx_pid, MAC_ARG(psta->hwaddr), psta->pid); if(rx_pid == psta->pid) { int i; u16 len = *(u16*)(ptr+rmv_len+4); //u16 ctrl_type = *(u16*)(ptr+rmv_len+6); //DBG_871X("RC: len=0x%x, ctrl_type=0x%x\n", len, ctrl_type); DBG_871X("RC: len=0x%x\n", len); for(i=0;idst, ETH_ALEN); _rtw_memcpy(ptr+ETH_ALEN, pattrib->src, ETH_ALEN); if(!bsnaphdr) { len = htons(len); _rtw_memcpy(ptr+12, &len, 2); } _func_exit_; return ret; } #else sint wlanhdr_to_ethhdr ( union recv_frame *precvframe) { sint rmv_len; u16 eth_type; u8 bsnaphdr; u8 *psnap_type; struct ieee80211_snap_hdr *psnap; sint ret=_SUCCESS; _adapter *adapter =precvframe->u.hdr.adapter; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; u8* ptr = get_recvframe_data(precvframe) ; // point to frame_ctrl field struct rx_pkt_attrib *pattrib = & precvframe->u.hdr.attrib; struct _vlan *pvlan = NULL; _func_enter_; psnap=(struct ieee80211_snap_hdr *)(ptr+pattrib->hdrlen + pattrib->iv_len); psnap_type=ptr+pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE; if (psnap->dsap==0xaa && psnap->ssap==0xaa && psnap->ctrl==0x03) { if (_rtw_memcmp(psnap->oui, oui_rfc1042, WLAN_IEEE_OUI_LEN)) bsnaphdr=_TRUE;//wlan_pkt_format = WLAN_PKT_FORMAT_SNAP_RFC1042; else if (_rtw_memcmp(psnap->oui, SNAP_HDR_APPLETALK_DDP, WLAN_IEEE_OUI_LEN) && _rtw_memcmp(psnap_type, SNAP_ETH_TYPE_APPLETALK_DDP, 2) ) bsnaphdr=_TRUE; //wlan_pkt_format = WLAN_PKT_FORMAT_APPLETALK; else if (_rtw_memcmp( psnap->oui, oui_8021h, WLAN_IEEE_OUI_LEN)) bsnaphdr=_TRUE; //wlan_pkt_format = WLAN_PKT_FORMAT_SNAP_TUNNEL; else { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("drop pkt due to invalid frame format!\n")); ret= _FAIL; goto exit; } } else bsnaphdr=_FALSE;//wlan_pkt_format = WLAN_PKT_FORMAT_OTHERS; rmv_len = pattrib->hdrlen + pattrib->iv_len +(bsnaphdr?SNAP_SIZE:0); RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("===pattrib->hdrlen: %x, pattrib->iv_len:%x ===\n", pattrib->hdrlen, pattrib->iv_len)); if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) { ptr += rmv_len ; *ptr = 0x87; *(ptr+1) = 0x12; //back to original pointer ptr -= rmv_len; } ptr += rmv_len ; _rtw_memcpy(ð_type, ptr, 2); eth_type= ntohs((unsigned short )eth_type); //pattrib->ether_type ptr +=2; if(pattrib->encrypt){ recvframe_pull_tail(precvframe, pattrib->icv_len); } if(eth_type == 0x8100) //vlan { pvlan = (struct _vlan *) ptr; //eth_type = get_vlan_encap_proto(pvlan); //eth_type = pvlan->h_vlan_encapsulated_proto;//? rmv_len += 4; ptr+=4; } if(eth_type==0x0800)//ip { //struct iphdr* piphdr = (struct iphdr*) ptr; //__u8 tos = (unsigned char)(pattrib->priority & 0xff); //piphdr->tos = tos; //if (piphdr->protocol == 0x06) //{ // RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("@@@===recv tcp len:%d @@@===\n", precvframe->u.hdr.len)); //} } else if(eth_type==0x8712)// append rx status for mp test packets { //ptr -= 16; //_rtw_memcpy(ptr, get_rxmem(precvframe), 16); } else { #ifdef PLATFORM_OS_XP NDIS_PACKET_8021Q_INFO VlanPriInfo; UINT32 UserPriority = precvframe->u.hdr.attrib.priority; UINT32 VlanID = (pvlan!=NULL ? get_vlan_id(pvlan) : 0 ); VlanPriInfo.Value = // Get current value. NDIS_PER_PACKET_INFO_FROM_PACKET(precvframe->u.hdr.pkt, Ieee8021QInfo); VlanPriInfo.TagHeader.UserPriority = UserPriority; VlanPriInfo.TagHeader.VlanId = VlanID ; VlanPriInfo.TagHeader.CanonicalFormatId = 0; // Should be zero. VlanPriInfo.TagHeader.Reserved = 0; // Should be zero. NDIS_PER_PACKET_INFO_FROM_PACKET(precvframe->u.hdr.pkt, Ieee8021QInfo) = VlanPriInfo.Value; #endif } if(eth_type==0x8712)// append rx status for mp test packets { ptr = recvframe_pull(precvframe, (rmv_len-sizeof(struct ethhdr)+2)-24); _rtw_memcpy(ptr, get_rxmem(precvframe), 24); ptr+=24; } else ptr = recvframe_pull(precvframe, (rmv_len-sizeof(struct ethhdr)+2)); _rtw_memcpy(ptr, pattrib->dst, ETH_ALEN); _rtw_memcpy(ptr+ETH_ALEN, pattrib->src, ETH_ALEN); eth_type = htons((unsigned short)eth_type) ; _rtw_memcpy(ptr+12, ð_type, 2); exit: _func_exit_; return ret; } #endif #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) #ifdef PLATFORM_LINUX static void recvframe_expand_pkt( PADAPTER padapter, union recv_frame *prframe) { struct recv_frame_hdr *pfhdr; _pkt *ppkt; u8 shift_sz; u32 alloc_sz; pfhdr = &prframe->u.hdr; // 6 is for IP header 8 bytes alignment in QoS packet case. if (pfhdr->attrib.qos) shift_sz = 6; else shift_sz = 0; // for first fragment packet, need to allocate // (1536 + RXDESC_SIZE + drvinfo_sz) to reassemble packet // 8 is for skb->data 8 bytes alignment. // alloc_sz = _RND(1536 + RXDESC_SIZE + pfhdr->attrib.drvinfosize + shift_sz + 8, 128); alloc_sz = 1664; // round (1536 + 24 + 32 + shift_sz + 8) to 128 bytes alignment //3 1. alloc new skb // prepare extra space for 4 bytes alignment ppkt = rtw_skb_alloc(alloc_sz); if (!ppkt) return; // no way to expand //3 2. Prepare new skb to replace & release old skb // force ppkt->data at 8-byte alignment address skb_reserve(ppkt, 8 - ((SIZE_PTR)ppkt->data & 7)); // force ip_hdr at 8-byte alignment address according to shift_sz skb_reserve(ppkt, shift_sz); // copy data to new pkt _rtw_memcpy(skb_put(ppkt, pfhdr->len), pfhdr->rx_data, pfhdr->len); rtw_skb_free(pfhdr->pkt); // attach new pkt to recvframe pfhdr->pkt = ppkt; pfhdr->rx_head = ppkt->head; pfhdr->rx_data = ppkt->data; pfhdr->rx_tail = skb_tail_pointer(ppkt); pfhdr->rx_end = skb_end_pointer(ppkt); } #else #warning "recvframe_expand_pkt not implement, defrag may crash system" #endif #endif //perform defrag union recv_frame * recvframe_defrag(_adapter *adapter,_queue *defrag_q); union recv_frame * recvframe_defrag(_adapter *adapter,_queue *defrag_q) { _list *plist, *phead; u8 *data,wlanhdr_offset; u8 curfragnum; struct recv_frame_hdr *pfhdr,*pnfhdr; union recv_frame* prframe, *pnextrframe; _queue *pfree_recv_queue; _func_enter_; curfragnum=0; pfree_recv_queue=&adapter->recvpriv.free_recv_queue; phead = get_list_head(defrag_q); plist = get_next(phead); prframe = LIST_CONTAINOR(plist, union recv_frame, u); pfhdr=&prframe->u.hdr; rtw_list_delete(&(prframe->u.list)); if(curfragnum!=pfhdr->attrib.frag_num) { //the first fragment number must be 0 //free the whole queue rtw_free_recvframe(prframe, pfree_recv_queue); rtw_free_recvframe_queue(defrag_q, pfree_recv_queue); return NULL; } #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) #ifndef CONFIG_SDIO_RX_COPY recvframe_expand_pkt(adapter, prframe); #endif #endif curfragnum++; plist= get_list_head(defrag_q); plist = get_next(plist); data=get_recvframe_data(prframe); while(rtw_end_of_queue_search(phead, plist) == _FALSE) { pnextrframe = LIST_CONTAINOR(plist, union recv_frame , u); pnfhdr=&pnextrframe->u.hdr; //check the fragment sequence (2nd ~n fragment frame) if(curfragnum!=pnfhdr->attrib.frag_num) { //the fragment number must be increasing (after decache) //release the defrag_q & prframe rtw_free_recvframe(prframe, pfree_recv_queue); rtw_free_recvframe_queue(defrag_q, pfree_recv_queue); return NULL; } curfragnum++; //copy the 2nd~n fragment frame's payload to the first fragment //get the 2nd~last fragment frame's payload wlanhdr_offset = pnfhdr->attrib.hdrlen + pnfhdr->attrib.iv_len; recvframe_pull(pnextrframe, wlanhdr_offset); //append to first fragment frame's tail (if privacy frame, pull the ICV) recvframe_pull_tail(prframe, pfhdr->attrib.icv_len); //memcpy _rtw_memcpy(pfhdr->rx_tail, pnfhdr->rx_data, pnfhdr->len); recvframe_put(prframe, pnfhdr->len); pfhdr->attrib.icv_len=pnfhdr->attrib.icv_len; plist = get_next(plist); }; //free the defrag_q queue and return the prframe rtw_free_recvframe_queue(defrag_q, pfree_recv_queue); RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Performance defrag!!!!!\n")); _func_exit_; return prframe; } //check if need to defrag, if needed queue the frame to defrag_q union recv_frame* recvframe_chk_defrag(PADAPTER padapter, union recv_frame *precv_frame) { u8 ismfrag; u8 fragnum; u8 *psta_addr; struct recv_frame_hdr *pfhdr; struct sta_info *psta; struct sta_priv *pstapriv; _list *phead; union recv_frame *prtnframe = NULL; _queue *pfree_recv_queue, *pdefrag_q; _func_enter_; pstapriv = &padapter->stapriv; pfhdr = &precv_frame->u.hdr; pfree_recv_queue = &padapter->recvpriv.free_recv_queue; //need to define struct of wlan header frame ctrl ismfrag = pfhdr->attrib.mfrag; fragnum = pfhdr->attrib.frag_num; psta_addr = pfhdr->attrib.ta; psta = rtw_get_stainfo(pstapriv, psta_addr); if (psta == NULL) { u8 type = GetFrameType(pfhdr->rx_data); if (type != WIFI_DATA_TYPE) { psta = rtw_get_bcmc_stainfo(padapter); pdefrag_q = &psta->sta_recvpriv.defrag_q; } else pdefrag_q = NULL; } else pdefrag_q = &psta->sta_recvpriv.defrag_q; if ((ismfrag==0) && (fragnum==0)) { prtnframe = precv_frame;//isn't a fragment frame } if (ismfrag==1) { //0~(n-1) fragment frame //enqueue to defraf_g if(pdefrag_q != NULL) { if(fragnum==0) { //the first fragment if(_rtw_queue_empty(pdefrag_q) == _FALSE) { //free current defrag_q rtw_free_recvframe_queue(pdefrag_q, pfree_recv_queue); } } //Then enqueue the 0~(n-1) fragment into the defrag_q //_rtw_spinlock(&pdefrag_q->lock); phead = get_list_head(pdefrag_q); rtw_list_insert_tail(&pfhdr->list, phead); //_rtw_spinunlock(&pdefrag_q->lock); RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Enqueuq: ismfrag = %d, fragnum= %d\n", ismfrag,fragnum)); prtnframe=NULL; } else { //can't find this ta's defrag_queue, so free this recv_frame rtw_free_recvframe(precv_frame, pfree_recv_queue); prtnframe=NULL; RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("Free because pdefrag_q ==NULL: ismfrag = %d, fragnum= %d\n", ismfrag, fragnum)); } } if((ismfrag==0)&&(fragnum!=0)) { //the last fragment frame //enqueue the last fragment if(pdefrag_q != NULL) { //_rtw_spinlock(&pdefrag_q->lock); phead = get_list_head(pdefrag_q); rtw_list_insert_tail(&pfhdr->list,phead); //_rtw_spinunlock(&pdefrag_q->lock); //call recvframe_defrag to defrag RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("defrag: ismfrag = %d, fragnum= %d\n", ismfrag, fragnum)); precv_frame = recvframe_defrag(padapter, pdefrag_q); prtnframe=precv_frame; } else { //can't find this ta's defrag_queue, so free this recv_frame rtw_free_recvframe(precv_frame, pfree_recv_queue); prtnframe=NULL; RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("Free because pdefrag_q ==NULL: ismfrag = %d, fragnum= %d\n", ismfrag,fragnum)); } } if((prtnframe!=NULL)&&(prtnframe->u.hdr.attrib.privacy)) { //after defrag we must check tkip mic code if(recvframe_chkmic(padapter, prtnframe)==_FAIL) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvframe_chkmic(padapter, prtnframe)==_FAIL\n")); rtw_free_recvframe(prtnframe,pfree_recv_queue); prtnframe=NULL; } } _func_exit_; return prtnframe; } int amsdu_to_msdu(_adapter *padapter, union recv_frame *prframe) { int a_len, padding_len; u16 nSubframe_Length; u8 nr_subframes, i; u8 *pdata; _pkt *sub_pkt,*subframes[MAX_SUBFRAME_COUNT]; struct recv_priv *precvpriv = &padapter->recvpriv; _queue *pfree_recv_queue = &(precvpriv->free_recv_queue); int ret = _SUCCESS; nr_subframes = 0; recvframe_pull(prframe, prframe->u.hdr.attrib.hdrlen); if(prframe->u.hdr.attrib.iv_len >0) { recvframe_pull(prframe, prframe->u.hdr.attrib.iv_len); } a_len = prframe->u.hdr.len; pdata = prframe->u.hdr.rx_data; while(a_len > ETH_HLEN) { /* Offset 12 denote 2 mac address */ nSubframe_Length = RTW_GET_BE16(pdata + 12); if( a_len < (ETHERNET_HEADER_SIZE + nSubframe_Length) ) { DBG_871X("nRemain_Length is %d and nSubframe_Length is : %d\n",a_len,nSubframe_Length); break; } sub_pkt = rtw_os_alloc_msdu_pkt(prframe, nSubframe_Length, pdata); if (sub_pkt == NULL) { DBG_871X("%s(): allocate sub packet fail !!!\n",__FUNCTION__); break; } /* move the data point to data content */ pdata += ETH_HLEN; a_len -= ETH_HLEN; subframes[nr_subframes++] = sub_pkt; if(nr_subframes >= MAX_SUBFRAME_COUNT) { DBG_871X("ParseSubframe(): Too many Subframes! Packets dropped!\n"); break; } pdata += nSubframe_Length; a_len -= nSubframe_Length; if(a_len != 0) { padding_len = 4 - ((nSubframe_Length + ETH_HLEN) & (4-1)); if(padding_len == 4) { padding_len = 0; } if(a_len < padding_len) { DBG_871X("ParseSubframe(): a_len < padding_len !\n"); break; } pdata += padding_len; a_len -= padding_len; } } for(i=0; iu.hdr.attrib); } } prframe->u.hdr.len = 0; rtw_free_recvframe(prframe, pfree_recv_queue);//free this recv_frame return ret; } int check_indicate_seq(struct recv_reorder_ctrl *preorder_ctrl, u16 seq_num); int check_indicate_seq(struct recv_reorder_ctrl *preorder_ctrl, u16 seq_num) { PADAPTER padapter = preorder_ctrl->padapter; struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; u8 wsize = preorder_ctrl->wsize_b; u16 wend = (preorder_ctrl->indicate_seq + wsize -1) & 0xFFF;//% 4096; // Rx Reorder initialize condition. if (preorder_ctrl->indicate_seq == 0xFFFF) { preorder_ctrl->indicate_seq = seq_num; #ifdef DBG_RX_SEQ DBG_871X("DBG_RX_SEQ %s:%d init IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, preorder_ctrl->indicate_seq, seq_num); #endif //DbgPrint("check_indicate_seq, 1st->indicate_seq=%d\n", precvpriv->indicate_seq); } //DbgPrint("enter->check_indicate_seq(): IndicateSeq: %d, NewSeq: %d\n", precvpriv->indicate_seq, seq_num); // Drop out the packet which SeqNum is smaller than WinStart if( SN_LESS(seq_num, preorder_ctrl->indicate_seq) ) { //RT_TRACE(COMP_RX_REORDER, DBG_LOUD, ("CheckRxTsIndicateSeq(): Packet Drop! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, NewSeqNum)); //DbgPrint("CheckRxTsIndicateSeq(): Packet Drop! IndicateSeq: %d, NewSeq: %d\n", precvpriv->indicate_seq, seq_num); #ifdef DBG_RX_DROP_FRAME DBG_871X("%s IndicateSeq: %d > NewSeq: %d\n", __FUNCTION__, preorder_ctrl->indicate_seq, seq_num); #endif return _FALSE; } // // Sliding window manipulation. Conditions includes: // 1. Incoming SeqNum is equal to WinStart =>Window shift 1 // 2. Incoming SeqNum is larger than the WinEnd => Window shift N // if( SN_EQUAL(seq_num, preorder_ctrl->indicate_seq) ) { preorder_ctrl->indicate_seq = (preorder_ctrl->indicate_seq + 1) & 0xFFF; #ifdef DBG_RX_SEQ DBG_871X("DBG_RX_SEQ %s:%d SN_EQUAL IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, preorder_ctrl->indicate_seq, seq_num); #endif } else if(SN_LESS(wend, seq_num)) { //RT_TRACE(COMP_RX_REORDER, DBG_LOUD, ("CheckRxTsIndicateSeq(): Window Shift! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, NewSeqNum)); //DbgPrint("CheckRxTsIndicateSeq(): Window Shift! IndicateSeq: %d, NewSeq: %d\n", precvpriv->indicate_seq, seq_num); // boundary situation, when seq_num cross 0xFFF if(seq_num >= (wsize - 1)) preorder_ctrl->indicate_seq = seq_num + 1 -wsize; else preorder_ctrl->indicate_seq = 0xFFF - (wsize - (seq_num + 1)) + 1; pdbgpriv->dbg_rx_ampdu_window_shift_cnt++; #ifdef DBG_RX_SEQ DBG_871X("DBG_RX_SEQ %s:%d SN_LESS(wend, seq_num) IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, preorder_ctrl->indicate_seq, seq_num); #endif } //DbgPrint("exit->check_indicate_seq(): IndicateSeq: %d, NewSeq: %d\n", precvpriv->indicate_seq, seq_num); return _TRUE; } int enqueue_reorder_recvframe(struct recv_reorder_ctrl *preorder_ctrl, union recv_frame *prframe); int enqueue_reorder_recvframe(struct recv_reorder_ctrl *preorder_ctrl, union recv_frame *prframe) { struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; _queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; _list *phead, *plist; union recv_frame *pnextrframe; struct rx_pkt_attrib *pnextattrib; //DbgPrint("+enqueue_reorder_recvframe()\n"); //_enter_critical_ex(&ppending_recvframe_queue->lock, &irql); //_rtw_spinlock_ex(&ppending_recvframe_queue->lock); phead = get_list_head(ppending_recvframe_queue); plist = get_next(phead); while(rtw_end_of_queue_search(phead, plist) == _FALSE) { pnextrframe = LIST_CONTAINOR(plist, union recv_frame, u); pnextattrib = &pnextrframe->u.hdr.attrib; if(SN_LESS(pnextattrib->seq_num, pattrib->seq_num)) { plist = get_next(plist); } else if( SN_EQUAL(pnextattrib->seq_num, pattrib->seq_num)) { //Duplicate entry is found!! Do not insert current entry. //RT_TRACE(COMP_RX_REORDER, DBG_TRACE, ("InsertRxReorderList(): Duplicate packet is dropped!! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, SeqNum)); //_exit_critical_ex(&ppending_recvframe_queue->lock, &irql); return _FALSE; } else { break; } //DbgPrint("enqueue_reorder_recvframe():while\n"); } //_enter_critical_ex(&ppending_recvframe_queue->lock, &irql); //_rtw_spinlock_ex(&ppending_recvframe_queue->lock); rtw_list_delete(&(prframe->u.hdr.list)); rtw_list_insert_tail(&(prframe->u.hdr.list), plist); //_rtw_spinunlock_ex(&ppending_recvframe_queue->lock); //_exit_critical_ex(&ppending_recvframe_queue->lock, &irql); //RT_TRACE(COMP_RX_REORDER, DBG_TRACE, ("InsertRxReorderList(): Pkt insert into buffer!! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, SeqNum)); return _TRUE; } void recv_indicatepkts_pkt_loss_cnt(struct debug_priv *pdbgpriv, u64 prev_seq, u64 current_seq); void recv_indicatepkts_pkt_loss_cnt(struct debug_priv *pdbgpriv, u64 prev_seq, u64 current_seq) { if(current_seq < prev_seq) { pdbgpriv->dbg_rx_ampdu_loss_count+= (4096 + current_seq - prev_seq); } else { pdbgpriv->dbg_rx_ampdu_loss_count+= (current_seq - prev_seq); } } int recv_indicatepkts_in_order(_adapter *padapter, struct recv_reorder_ctrl *preorder_ctrl, int bforced); int recv_indicatepkts_in_order(_adapter *padapter, struct recv_reorder_ctrl *preorder_ctrl, int bforced) { //_irqL irql; //u8 bcancelled; _list *phead, *plist; union recv_frame *prframe; struct rx_pkt_attrib *pattrib; //u8 index = 0; int bPktInBuf = _FALSE; struct recv_priv *precvpriv = &padapter->recvpriv; _queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; DBG_COUNTER(padapter->rx_logs.core_rx_post_indicate_in_oder); //DbgPrint("+recv_indicatepkts_in_order\n"); //_enter_critical_ex(&ppending_recvframe_queue->lock, &irql); //_rtw_spinlock_ex(&ppending_recvframe_queue->lock); phead = get_list_head(ppending_recvframe_queue); plist = get_next(phead); #if 0 // Check if there is any other indication thread running. if(pTS->RxIndicateState == RXTS_INDICATE_PROCESSING) return; #endif // Handling some condition for forced indicate case. if(bforced==_TRUE) { pdbgpriv->dbg_rx_ampdu_forced_indicate_count++; if(rtw_is_list_empty(phead)) { // _exit_critical_ex(&ppending_recvframe_queue->lock, &irql); //_rtw_spinunlock_ex(&ppending_recvframe_queue->lock); return _TRUE; } prframe = LIST_CONTAINOR(plist, union recv_frame, u); pattrib = &prframe->u.hdr.attrib; #ifdef DBG_RX_SEQ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, preorder_ctrl->indicate_seq, pattrib->seq_num); #endif recv_indicatepkts_pkt_loss_cnt(pdbgpriv,preorder_ctrl->indicate_seq,pattrib->seq_num); preorder_ctrl->indicate_seq = pattrib->seq_num; } // Prepare indication list and indication. // Check if there is any packet need indicate. while(!rtw_is_list_empty(phead)) { prframe = LIST_CONTAINOR(plist, union recv_frame, u); pattrib = &prframe->u.hdr.attrib; if(!SN_LESS(preorder_ctrl->indicate_seq, pattrib->seq_num)) { RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("recv_indicatepkts_in_order: indicate=%d seq=%d amsdu=%d\n", preorder_ctrl->indicate_seq, pattrib->seq_num, pattrib->amsdu)); #if 0 // This protect buffer from overflow. if(index >= REORDER_WIN_SIZE) { RT_ASSERT(FALSE, ("IndicateRxReorderList(): Buffer overflow!! \n")); bPktInBuf = TRUE; break; } #endif plist = get_next(plist); rtw_list_delete(&(prframe->u.hdr.list)); if(SN_EQUAL(preorder_ctrl->indicate_seq, pattrib->seq_num)) { preorder_ctrl->indicate_seq = (preorder_ctrl->indicate_seq + 1) & 0xFFF; #ifdef DBG_RX_SEQ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, preorder_ctrl->indicate_seq, pattrib->seq_num); #endif } #if 0 index++; if(index==1) { //Cancel previous pending timer. //PlatformCancelTimer(Adapter, &pTS->RxPktPendingTimer); if(bforced!=_TRUE) { //DBG_871X("_cancel_timer(&preorder_ctrl->reordering_ctrl_timer, &bcancelled);\n"); _cancel_timer(&preorder_ctrl->reordering_ctrl_timer, &bcancelled); } } #endif //Set this as a lock to make sure that only one thread is indicating packet. //pTS->RxIndicateState = RXTS_INDICATE_PROCESSING; // Indicate packets //RT_ASSERT((index<=REORDER_WIN_SIZE), ("RxReorderIndicatePacket(): Rx Reorder buffer full!! \n")); //indicate this recv_frame //DbgPrint("recv_indicatepkts_in_order, indicate_seq=%d, seq_num=%d\n", precvpriv->indicate_seq, pattrib->seq_num); if(!pattrib->amsdu) { //DBG_871X("recv_indicatepkts_in_order, amsdu!=1, indicate_seq=%d, seq_num=%d\n", preorder_ctrl->indicate_seq, pattrib->seq_num); if ((padapter->bDriverStopped == _FALSE) && (padapter->bSurpriseRemoved == _FALSE)) { rtw_recv_indicatepkt(padapter, prframe);//indicate this recv_frame } } else if(pattrib->amsdu==1) { if(amsdu_to_msdu(padapter, prframe)!=_SUCCESS) { rtw_free_recvframe(prframe, &precvpriv->free_recv_queue); } } else { //error condition; } //Update local variables. bPktInBuf = _FALSE; } else { bPktInBuf = _TRUE; break; } //DbgPrint("recv_indicatepkts_in_order():while\n"); } //_rtw_spinunlock_ex(&ppending_recvframe_queue->lock); //_exit_critical_ex(&ppending_recvframe_queue->lock, &irql); /* //Release the indication lock and set to new indication step. if(bPktInBuf) { // Set new pending timer. //pTS->RxIndicateState = RXTS_INDICATE_REORDER; //PlatformSetTimer(Adapter, &pTS->RxPktPendingTimer, pHTInfo->RxReorderPendingTime); //DBG_871X("_set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME)\n"); _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME); } else { //pTS->RxIndicateState = RXTS_INDICATE_IDLE; } */ //_exit_critical_ex(&ppending_recvframe_queue->lock, &irql); //return _TRUE; return bPktInBuf; } int recv_indicatepkt_reorder(_adapter *padapter, union recv_frame *prframe); int recv_indicatepkt_reorder(_adapter *padapter, union recv_frame *prframe) { _irqL irql; int retval = _SUCCESS; struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; struct recv_reorder_ctrl *preorder_ctrl = prframe->u.hdr.preorder_ctrl; _queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; DBG_COUNTER(padapter->rx_logs.core_rx_post_indicate_reoder); if(!pattrib->amsdu) { //s1. wlanhdr_to_ethhdr(prframe); //if ((pattrib->qos!=1) /*|| pattrib->priority!=0 || IS_MCAST(pattrib->ra)*/ // || (pattrib->eth_type==0x0806) || (pattrib->ack_policy!=0)) if (pattrib->qos!=1) { if ((padapter->bDriverStopped == _FALSE) && (padapter->bSurpriseRemoved == _FALSE)) { RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("@@@@ recv_indicatepkt_reorder -recv_func recv_indicatepkt\n" )); rtw_recv_indicatepkt(padapter, prframe); return _SUCCESS; } #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s pattrib->qos !=1\n", __FUNCTION__); #endif return _FAIL; } if (preorder_ctrl->enable == _FALSE) { //indicate this recv_frame preorder_ctrl->indicate_seq = pattrib->seq_num; #ifdef DBG_RX_SEQ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, preorder_ctrl->indicate_seq, pattrib->seq_num); #endif rtw_recv_indicatepkt(padapter, prframe); preorder_ctrl->indicate_seq = (preorder_ctrl->indicate_seq + 1)%4096; #ifdef DBG_RX_SEQ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, preorder_ctrl->indicate_seq, pattrib->seq_num); #endif return _SUCCESS; } #ifndef CONFIG_RECV_REORDERING_CTRL //indicate this recv_frame rtw_recv_indicatepkt(padapter, prframe); return _SUCCESS; #endif } else if(pattrib->amsdu==1) //temp filter -> means didn't support A-MSDUs in a A-MPDU { if (preorder_ctrl->enable == _FALSE) { preorder_ctrl->indicate_seq = pattrib->seq_num; #ifdef DBG_RX_SEQ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, preorder_ctrl->indicate_seq, pattrib->seq_num); #endif retval = amsdu_to_msdu(padapter, prframe); preorder_ctrl->indicate_seq = (preorder_ctrl->indicate_seq + 1)%4096; #ifdef DBG_RX_SEQ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, preorder_ctrl->indicate_seq, pattrib->seq_num); #endif if(retval != _SUCCESS){ #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s amsdu_to_msdu fail\n", __FUNCTION__); #endif } return retval; } } else { } _enter_critical_bh(&ppending_recvframe_queue->lock, &irql); RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("recv_indicatepkt_reorder: indicate=%d seq=%d\n", preorder_ctrl->indicate_seq, pattrib->seq_num)); //s2. check if winstart_b(indicate_seq) needs to been updated if(!check_indicate_seq(preorder_ctrl, pattrib->seq_num)) { pdbgpriv->dbg_rx_ampdu_drop_count++; //pHTInfo->RxReorderDropCounter++; //ReturnRFDList(Adapter, pRfd); //RT_TRACE(COMP_RX_REORDER, DBG_TRACE, ("RxReorderIndicatePacket() ==> Packet Drop!!\n")); //_exit_critical_ex(&ppending_recvframe_queue->lock, &irql); //return _FAIL; #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s check_indicate_seq fail\n", __FUNCTION__); #endif #if 0 rtw_recv_indicatepkt(padapter, prframe); _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); goto _success_exit; #else goto _err_exit; #endif } //s3. Insert all packet into Reorder Queue to maintain its ordering. if(!enqueue_reorder_recvframe(preorder_ctrl, prframe)) { //DbgPrint("recv_indicatepkt_reorder, enqueue_reorder_recvframe fail!\n"); //_exit_critical_ex(&ppending_recvframe_queue->lock, &irql); //return _FAIL; #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s enqueue_reorder_recvframe fail\n", __FUNCTION__); #endif goto _err_exit; } //s4. // Indication process. // After Packet dropping and Sliding Window shifting as above, we can now just indicate the packets // with the SeqNum smaller than latest WinStart and buffer other packets. // // For Rx Reorder condition: // 1. All packets with SeqNum smaller than WinStart => Indicate // 2. All packets with SeqNum larger than or equal to WinStart => Buffer it. // //recv_indicatepkts_in_order(padapter, preorder_ctrl, _TRUE); if(recv_indicatepkts_in_order(padapter, preorder_ctrl, _FALSE)==_TRUE) { _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME); _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); } else { _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); _cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer); } _success_exit: return _SUCCESS; _err_exit: _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); return _FAIL; } void rtw_reordering_ctrl_timeout_handler(void *pcontext) { _irqL irql; struct recv_reorder_ctrl *preorder_ctrl = (struct recv_reorder_ctrl *)pcontext; _adapter *padapter = preorder_ctrl->padapter; _queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; if(padapter->bDriverStopped ||padapter->bSurpriseRemoved) { return; } //DBG_871X("+rtw_reordering_ctrl_timeout_handler()=>\n"); _enter_critical_bh(&ppending_recvframe_queue->lock, &irql); if(recv_indicatepkts_in_order(padapter, preorder_ctrl, _TRUE)==_TRUE) { _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME); } _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); } int process_recv_indicatepkts(_adapter *padapter, union recv_frame *prframe); int process_recv_indicatepkts(_adapter *padapter, union recv_frame *prframe) { int retval = _SUCCESS; //struct recv_priv *precvpriv = &padapter->recvpriv; //struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; #ifdef CONFIG_TDLS struct sta_info *psta = prframe->u.hdr.psta; #endif //CONFIG_TDLS #ifdef CONFIG_80211N_HT struct ht_priv *phtpriv = &pmlmepriv->htpriv; DBG_COUNTER(padapter->rx_logs.core_rx_post_indicate); #ifdef CONFIG_TDLS if( (phtpriv->ht_option==_TRUE) || ((psta->tdls_sta_state & TDLS_LINKED_STATE) && (psta->htpriv.ht_option==_TRUE) && (psta->htpriv.ampdu_enable==_TRUE))) //B/G/N Mode #else if(phtpriv->ht_option==_TRUE) //B/G/N Mode #endif //CONFIG_TDLS { //prframe->u.hdr.preorder_ctrl = &precvpriv->recvreorder_ctrl[pattrib->priority]; if(recv_indicatepkt_reorder(padapter, prframe)!=_SUCCESS)// including perform A-MPDU Rx Ordering Buffer Control { #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s recv_indicatepkt_reorder error!\n", __FUNCTION__); #endif if ((padapter->bDriverStopped == _FALSE) && (padapter->bSurpriseRemoved == _FALSE)) { retval = _FAIL; return retval; } } } else //B/G mode #endif { retval=wlanhdr_to_ethhdr (prframe); if(retval != _SUCCESS) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("wlanhdr_to_ethhdr: drop pkt \n")); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s wlanhdr_to_ethhdr error!\n", __FUNCTION__); #endif return retval; } if ((padapter->bDriverStopped ==_FALSE)&&( padapter->bSurpriseRemoved==_FALSE)) { //indicate this recv_frame RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("@@@@ process_recv_indicatepkts- recv_func recv_indicatepkt\n" )); rtw_recv_indicatepkt(padapter, prframe); } else { RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("@@@@ process_recv_indicatepkts- recv_func free_indicatepkt\n" )); RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("recv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); retval = _FAIL; return retval; } } return retval; } #ifdef CONFIG_MP_INCLUDED int validate_mp_recv_frame(_adapter *adapter, union recv_frame *precv_frame) { int ret = _SUCCESS; u8 *ptr = precv_frame->u.hdr.rx_data; u8 type,subtype; if(!adapter->mppriv.bmac_filter) return ret; #if 0 if (1){ u8 bDumpRxPkt; type = GetFrameType(ptr); subtype = GetFrameSubType(ptr); //bit(7)~bit(2) rtw_hal_get_def_var(adapter, HAL_DEF_DBG_DUMP_RXPKT, &(bDumpRxPkt)); if(bDumpRxPkt ==1){//dump all rx packets int i; DBG_871X("############ type:0x%02x subtype:0x%02x ################# \n",type,subtype); for(i=0; i<64;i=i+8) DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr+i), *(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); DBG_871X("############################# \n"); } } #endif if(_rtw_memcmp( GetAddr2Ptr(ptr), adapter->mppriv.mac_filter, ETH_ALEN) == _FALSE ) ret = _FAIL; return ret; } #endif static sint MPwlanhdr_to_ethhdr ( union recv_frame *precvframe) { sint rmv_len; u16 eth_type, len; u8 bsnaphdr; u8 *psnap_type; struct ieee80211_snap_hdr *psnap; sint ret=_SUCCESS; _adapter *adapter =precvframe->u.hdr.adapter; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; u8 *ptr = get_recvframe_data(precvframe) ; // point to frame_ctrl field struct rx_pkt_attrib *pattrib = & precvframe->u.hdr.attrib; _func_enter_; if(pattrib->encrypt){ recvframe_pull_tail(precvframe, pattrib->icv_len); } psnap=(struct ieee80211_snap_hdr *)(ptr+pattrib->hdrlen + pattrib->iv_len); psnap_type=ptr+pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE; /* convert hdr + possible LLC headers into Ethernet header */ //eth_type = (psnap_type[0] << 8) | psnap_type[1]; if((_rtw_memcmp(psnap, rtw_rfc1042_header, SNAP_SIZE) && (_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_IPX, 2) == _FALSE) && (_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_APPLETALK_AARP, 2)==_FALSE) )|| //eth_type != ETH_P_AARP && eth_type != ETH_P_IPX) || _rtw_memcmp(psnap, rtw_bridge_tunnel_header, SNAP_SIZE)){ /* remove RFC1042 or Bridge-Tunnel encapsulation and replace EtherType */ bsnaphdr = _TRUE; } else { /* Leave Ethernet header part of hdr and full payload */ bsnaphdr = _FALSE; } rmv_len = pattrib->hdrlen + pattrib->iv_len +(bsnaphdr?SNAP_SIZE:0); len = precvframe->u.hdr.len - rmv_len; RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n===pattrib->hdrlen: %x, pattrib->iv_len:%x ===\n\n", pattrib->hdrlen, pattrib->iv_len)); _rtw_memcpy(ð_type, ptr+rmv_len, 2); eth_type= ntohs((unsigned short )eth_type); //pattrib->ether_type pattrib->eth_type = eth_type; { ptr = recvframe_pull(precvframe, (rmv_len-sizeof(struct ethhdr)+ (bsnaphdr?2:0))); } _rtw_memcpy(ptr, pattrib->dst, ETH_ALEN); _rtw_memcpy(ptr+ETH_ALEN, pattrib->src, ETH_ALEN); if(!bsnaphdr) { len = htons(len); _rtw_memcpy(ptr+12, &len, 2); } if (adapter->registrypriv.mp_mode == 1) { len = htons(pattrib->seq_num); //DBG_871X("wlan seq = %d ,seq_num =%x\n",len,pattrib->seq_num); _rtw_memcpy(ptr+12,&len, 2); } _func_exit_; return ret; } int recv_func_prehandle(_adapter *padapter, union recv_frame *rframe) { int ret = _SUCCESS; struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib; struct recv_priv *precvpriv = &padapter->recvpriv; _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; #ifdef CONFIG_MP_INCLUDED struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mp_priv *pmppriv = &padapter->mppriv; #endif //CONFIG_MP_INCLUDED u8 type; u8 *ptr = rframe->u.hdr.rx_data; u8 *psa, *pda, *pbssid; struct sta_info *psta = NULL; DBG_COUNTER(padapter->rx_logs.core_rx_pre); #ifdef CONFIG_MP_INCLUDED if (padapter->registrypriv.mp_mode == 1) { if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) && (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) )//&&(padapter->mppriv.check_mp_pkt == 0)) { if (pattrib->crc_err == 1){ padapter->mppriv.rx_crcerrpktcount++; } else{ if(_SUCCESS == validate_mp_recv_frame(padapter, rframe)) padapter->mppriv.rx_pktcount++; else padapter->mppriv.rx_pktcount_filter_out++; } if(pmppriv->rx_bindicatePkt == _FALSE) { //if (check_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE) == _FALSE) { //RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("MP - Not in loopback mode , drop pkt \n")); ret = _FAIL; rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame goto exit; } else { type = GetFrameType(ptr); pattrib->to_fr_ds = get_tofr_ds(ptr); pattrib->frag_num = GetFragNum(ptr); pattrib->seq_num = GetSequence(ptr); pattrib->pw_save = GetPwrMgt(ptr); pattrib->mfrag = GetMFrag(ptr); pattrib->mdata = GetMData(ptr); pattrib->privacy = GetPrivacy(ptr); pattrib->order = GetOrder(ptr); if(type ==WIFI_DATA_TYPE) { pda = get_da(ptr); psa = get_sa(ptr); pbssid = get_hdr_bssid(ptr); _rtw_memcpy(pattrib->dst, pda, ETH_ALEN); _rtw_memcpy(pattrib->src, psa, ETH_ALEN); _rtw_memcpy(pattrib->bssid, pbssid, ETH_ALEN); switch(pattrib->to_fr_ds) { case 0: _rtw_memcpy(pattrib->ra, pda, ETH_ALEN); _rtw_memcpy(pattrib->ta, psa, ETH_ALEN); ret = sta2sta_data_frame(padapter, rframe, &psta); break; case 1: _rtw_memcpy(pattrib->ra, pda, ETH_ALEN); _rtw_memcpy(pattrib->ta, pbssid, ETH_ALEN); ret = ap2sta_data_frame(padapter, rframe, &psta); break; case 2: _rtw_memcpy(pattrib->ra, pbssid, ETH_ALEN); _rtw_memcpy(pattrib->ta, psa, ETH_ALEN); ret = sta2ap_data_frame(padapter, rframe, &psta); break; case 3: _rtw_memcpy(pattrib->ra, GetAddr1Ptr(ptr), ETH_ALEN); _rtw_memcpy(pattrib->ta, GetAddr2Ptr(ptr), ETH_ALEN); ret =_FAIL; RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" case 3\n")); break; default: ret =_FAIL; break; } ret = MPwlanhdr_to_ethhdr (rframe); if (ret != _SUCCESS) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("wlanhdr_to_ethhdr: drop pkt \n")); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s wlanhdr_to_ethhdr: drop pkt\n", __FUNCTION__); #endif rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame ret = _FAIL; goto exit; } if ((padapter->bDriverStopped == _FALSE) && (padapter->bSurpriseRemoved == _FALSE)) { RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_func: recv_func rtw_recv_indicatepkt\n" )); //indicate this recv_frame ret = rtw_recv_indicatepkt(padapter, rframe); if (ret != _SUCCESS) { #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s rtw_recv_indicatepkt fail!\n", __FUNCTION__); #endif rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame ret = _FAIL; goto exit; } } else { RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_func: rtw_free_recvframe\n" )); RT_TRACE(_module_rtl871x_recv_c_, _drv_debug_, ("recv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s ecv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved); #endif ret = _FAIL; rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame goto exit; } } } } RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("recv_func: validate_recv_frame fail! drop pkt\n")); rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame ret = _FAIL; goto exit; } #endif //check the frame crtl field and decache ret = validate_recv_frame(padapter, rframe); if (ret != _SUCCESS) { RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("recv_func: validate_recv_frame fail! drop pkt\n")); rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame goto exit; } exit: return ret; } int recv_func_posthandle(_adapter *padapter, union recv_frame *prframe) { int ret = _SUCCESS; union recv_frame *orig_prframe = prframe; struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; struct recv_priv *precvpriv = &padapter->recvpriv; _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; #ifdef CONFIG_TDLS u8 *psnap_type, *pcategory; #endif //CONFIG_TDLS DBG_COUNTER(padapter->rx_logs.core_rx_post); // DATA FRAME rtw_led_control(padapter, LED_CTL_RX); prframe = decryptor(padapter, prframe); if (prframe == NULL) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("decryptor: drop pkt\n")); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s decryptor: drop pkt\n", __FUNCTION__); #endif ret = _FAIL; DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_err); goto _recv_data_drop; } #if 0 if ( padapter->adapter_type == PRIMARY_ADAPTER ) { DBG_871X("+++\n"); { int i; u8 *ptr = get_recvframe_data(prframe); for(i=0; i<140;i=i+8) DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:", *(ptr+i), *(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); } DBG_871X("---\n"); } #endif #ifdef CONFIG_TDLS //check TDLS frame psnap_type = get_recvframe_data(orig_prframe) + pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE; pcategory = psnap_type + ETH_TYPE_LEN + PAYLOAD_TYPE_LEN; if((_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_TDLS, ETH_TYPE_LEN)) && ((*pcategory==RTW_WLAN_CATEGORY_TDLS) || (*pcategory==RTW_WLAN_CATEGORY_P2P))){ ret = OnTDLS(padapter, prframe); //all of functions will return _FAIL if(ret == _FAIL) goto _exit_recv_func; //goto _exit_recv_func; } #endif //CONFIG_TDLS prframe = recvframe_chk_defrag(padapter, prframe); if(prframe==NULL) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvframe_chk_defrag: drop pkt\n")); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s recvframe_chk_defrag: drop pkt\n", __FUNCTION__); #endif DBG_COUNTER(padapter->rx_logs.core_rx_post_defrag_err); goto _recv_data_drop; } prframe=portctrl(padapter, prframe); if (prframe == NULL) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("portctrl: drop pkt \n")); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s portctrl: drop pkt\n", __FUNCTION__); #endif ret = _FAIL; DBG_COUNTER(padapter->rx_logs.core_rx_post_portctrl_err); goto _recv_data_drop; } count_rx_stats(padapter, prframe, NULL); #ifdef CONFIG_WAPI_SUPPORT rtw_wapi_update_info(padapter, prframe); #endif #ifdef CONFIG_80211N_HT ret = process_recv_indicatepkts(padapter, prframe); if (ret != _SUCCESS) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recv_func: process_recv_indicatepkts fail! \n")); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s process_recv_indicatepkts fail!\n", __FUNCTION__); #endif rtw_free_recvframe(orig_prframe, pfree_recv_queue);//free this recv_frame DBG_COUNTER(padapter->rx_logs.core_rx_post_indicate_err); goto _recv_data_drop; } #else // CONFIG_80211N_HT if (!pattrib->amsdu) { ret = wlanhdr_to_ethhdr (prframe); if (ret != _SUCCESS) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("wlanhdr_to_ethhdr: drop pkt \n")); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s wlanhdr_to_ethhdr: drop pkt\n", __FUNCTION__); #endif rtw_free_recvframe(orig_prframe, pfree_recv_queue);//free this recv_frame goto _recv_data_drop; } if ((padapter->bDriverStopped == _FALSE) && (padapter->bSurpriseRemoved == _FALSE)) { RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_func: recv_func rtw_recv_indicatepkt\n" )); //indicate this recv_frame ret = rtw_recv_indicatepkt(padapter, prframe); if (ret != _SUCCESS) { #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s rtw_recv_indicatepkt fail!\n", __FUNCTION__); #endif goto _recv_data_drop; } } else { RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_func: rtw_free_recvframe\n" )); RT_TRACE(_module_rtl871x_recv_c_, _drv_debug_, ("recv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s ecv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved); #endif ret = _FAIL; rtw_free_recvframe(orig_prframe, pfree_recv_queue); //free this recv_frame } } else if(pattrib->amsdu==1) { ret = amsdu_to_msdu(padapter, prframe); if(ret != _SUCCESS) { #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s amsdu_to_msdu fail\n", __FUNCTION__); #endif rtw_free_recvframe(orig_prframe, pfree_recv_queue); goto _recv_data_drop; } } else { #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s what is this condition??\n", __FUNCTION__); #endif goto _recv_data_drop; } #endif // CONFIG_80211N_HT _exit_recv_func: return ret; _recv_data_drop: precvpriv->rx_drop++; return ret; } int recv_func(_adapter *padapter, union recv_frame *rframe); int recv_func(_adapter *padapter, union recv_frame *rframe) { int ret; struct rx_pkt_attrib *prxattrib = &rframe->u.hdr.attrib; struct recv_priv *recvpriv = &padapter->recvpriv; struct security_priv *psecuritypriv=&padapter->securitypriv; struct mlme_priv *mlmepriv = &padapter->mlmepriv; /* check if need to handle uc_swdec_pending_queue*/ if (check_fwstate(mlmepriv, WIFI_STATION_STATE) && psecuritypriv->busetkipkey) { union recv_frame *pending_frame; int cnt = 0; while((pending_frame=rtw_alloc_recvframe(&padapter->recvpriv.uc_swdec_pending_queue))) { cnt++; DBG_COUNTER(padapter->rx_logs.core_rx_dequeue); recv_func_posthandle(padapter, pending_frame); } if (cnt) DBG_871X(FUNC_ADPT_FMT" dequeue %d from uc_swdec_pending_queue\n", FUNC_ADPT_ARG(padapter), cnt); } DBG_COUNTER(padapter->rx_logs.core_rx); ret = recv_func_prehandle(padapter, rframe); if(ret == _SUCCESS) { /* check if need to enqueue into uc_swdec_pending_queue*/ if (check_fwstate(mlmepriv, WIFI_STATION_STATE) && !IS_MCAST(prxattrib->ra) && prxattrib->encrypt>0 && (prxattrib->bdecrypted == 0 ||psecuritypriv->sw_decrypt == _TRUE) && psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPAPSK && !psecuritypriv->busetkipkey) { DBG_COUNTER(padapter->rx_logs.core_rx_enqueue); rtw_enqueue_recvframe(rframe, &padapter->recvpriv.uc_swdec_pending_queue); //DBG_871X("%s: no key, enqueue uc_swdec_pending_queue\n", __func__); if (recvpriv->free_recvframe_cnt < NR_RECVFRAME/4) { /* to prevent from recvframe starvation, get recvframe from uc_swdec_pending_queue to free_recvframe_cnt */ rframe = rtw_alloc_recvframe(&padapter->recvpriv.uc_swdec_pending_queue); if (rframe) goto do_posthandle; } goto exit; } do_posthandle: ret = recv_func_posthandle(padapter, rframe); } exit: return ret; } s32 rtw_recv_entry(union recv_frame *precvframe) { _adapter *padapter; struct recv_priv *precvpriv; s32 ret=_SUCCESS; _func_enter_; // RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("+rtw_recv_entry\n")); padapter = precvframe->u.hdr.adapter; precvpriv = &padapter->recvpriv; if ((ret = recv_func(padapter, precvframe)) == _FAIL) { RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("rtw_recv_entry: recv_func return fail!!!\n")); goto _recv_entry_drop; } precvpriv->rx_pkts++; _func_exit_; return ret; _recv_entry_drop: #ifdef CONFIG_MP_INCLUDED if (padapter->registrypriv.mp_mode == 1) padapter->mppriv.rx_pktloss = precvpriv->rx_drop; #endif //RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("_recv_entry_drop\n")); _func_exit_; return ret; } #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS void rtw_signal_stat_timer_hdl(RTW_TIMER_HDL_ARGS){ _adapter *adapter = (_adapter *)FunctionContext; struct recv_priv *recvpriv = &adapter->recvpriv; u32 tmp_s, tmp_q; u8 avg_signal_strength = 0; u8 avg_signal_qual = 0; u32 num_signal_strength = 0; u32 num_signal_qual = 0; u8 _alpha = 5; // this value is based on converging_constant = 5000 and sampling_interval = 1000 if(adapter->recvpriv.is_signal_dbg) { //update the user specific value, signal_strength_dbg, to signal_strength, rssi adapter->recvpriv.signal_strength= adapter->recvpriv.signal_strength_dbg; adapter->recvpriv.rssi=(s8)translate_percentage_to_dbm((u8)adapter->recvpriv.signal_strength_dbg); } else { if(recvpriv->signal_strength_data.update_req == 0) {// update_req is clear, means we got rx avg_signal_strength = recvpriv->signal_strength_data.avg_val; num_signal_strength = recvpriv->signal_strength_data.total_num; // after avg_vals are accquired, we can re-stat the signal values recvpriv->signal_strength_data.update_req = 1; } if(recvpriv->signal_qual_data.update_req == 0) {// update_req is clear, means we got rx avg_signal_qual = recvpriv->signal_qual_data.avg_val; num_signal_qual = recvpriv->signal_qual_data.total_num; // after avg_vals are accquired, we can re-stat the signal values recvpriv->signal_qual_data.update_req = 1; } if (num_signal_strength == 0) { if (rtw_get_on_cur_ch_time(adapter) == 0 || rtw_get_passing_time_ms(rtw_get_on_cur_ch_time(adapter)) < 2 * adapter->mlmeextpriv.mlmext_info.bcn_interval ) { goto set_timer; } } if(check_fwstate(&adapter->mlmepriv, _FW_UNDER_SURVEY) == _TRUE || check_fwstate(&adapter->mlmepriv, _FW_LINKED) == _FALSE ) { goto set_timer; } #ifdef CONFIG_CONCURRENT_MODE if (check_buddy_fwstate(adapter, _FW_UNDER_SURVEY) == _TRUE) goto set_timer; #endif //update value of signal_strength, rssi, signal_qual tmp_s = (avg_signal_strength+(_alpha-1)*recvpriv->signal_strength); if(tmp_s %_alpha) tmp_s = tmp_s/_alpha + 1; else tmp_s = tmp_s/_alpha; if(tmp_s>100) tmp_s = 100; tmp_q = (avg_signal_qual+(_alpha-1)*recvpriv->signal_qual); if(tmp_q %_alpha) tmp_q = tmp_q/_alpha + 1; else tmp_q = tmp_q/_alpha; if(tmp_q>100) tmp_q = 100; recvpriv->signal_strength = tmp_s; recvpriv->rssi = (s8)translate_percentage_to_dbm(tmp_s); recvpriv->signal_qual = tmp_q; #if defined(DBG_RX_SIGNAL_DISPLAY_PROCESSING) && 1 DBG_871X(FUNC_ADPT_FMT" signal_strength:%3u, rssi:%3d, signal_qual:%3u" ", num_signal_strength:%u, num_signal_qual:%u" ", on_cur_ch_ms:%d" "\n" , FUNC_ADPT_ARG(adapter) , recvpriv->signal_strength , recvpriv->rssi , recvpriv->signal_qual , num_signal_strength, num_signal_qual , rtw_get_on_cur_ch_time(adapter) ? rtw_get_passing_time_ms(rtw_get_on_cur_ch_time(adapter)) : 0 ); #endif } set_timer: rtw_set_signal_stat_timer(recvpriv); } #endif //CONFIG_NEW_SIGNAL_STAT_PROCESS rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_rf.c000066400000000000000000000045241261122257400201030ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_RF_C_ #include struct ch_freq { u32 channel; u32 frequency; }; struct ch_freq ch_freq_map[] = { {1, 2412},{2, 2417},{3, 2422},{4, 2427},{5, 2432}, {6, 2437},{7, 2442},{8, 2447},{9, 2452},{10, 2457}, {11, 2462},{12, 2467},{13, 2472},{14, 2484}, /* UNII */ {36, 5180},{40, 5200},{44, 5220},{48, 5240},{52, 5260}, {56, 5280},{60, 5300},{64, 5320},{149, 5745},{153, 5765}, {157, 5785},{161, 5805},{165, 5825},{167, 5835},{169, 5845}, {171, 5855},{173, 5865}, /* HiperLAN2 */ {100, 5500},{104, 5520},{108, 5540},{112, 5560},{116, 5580}, {120, 5600},{124, 5620},{128, 5640},{132, 5660},{136, 5680}, {140, 5700}, /* Japan MMAC */ {34, 5170},{38, 5190},{42, 5210},{46, 5230}, /* Japan */ {184, 4920},{188, 4940},{192, 4960},{196, 4980}, {208, 5040},/* Japan, means J08 */ {212, 5060},/* Japan, means J12 */ {216, 5080},/* Japan, means J16 */ }; int ch_freq_map_num = (sizeof(ch_freq_map) / sizeof(struct ch_freq)); u32 rtw_ch2freq(u32 channel) { u8 i; u32 freq = 0; for (i = 0; i < ch_freq_map_num; i++) { if (channel == ch_freq_map[i].channel) { freq = ch_freq_map[i].frequency; break; } } if (i == ch_freq_map_num) freq = 2412; return freq; } u32 rtw_freq2ch(u32 freq) { u8 i; u32 ch = 0; for (i = 0; i < ch_freq_map_num; i++) { if (freq == ch_freq_map[i].frequency) { ch = ch_freq_map[i].channel; break; } } if (i == ch_freq_map_num) ch = 1; return ch; } rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_security.c000066400000000000000000002741331261122257400213500ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_SECURITY_C_ #include static const char *_security_type_str[] = { "N/A", "WEP40", "TKIP", "TKIP_WM", "AES", "WEP104", "SMS4", "WEP_WPA", "BIP", }; const char *security_type_str(u8 value) { #ifdef CONFIG_IEEE80211W if (value <= _BIP_) #else if (value <= _WEP_WPA_MIXED_) #endif return _security_type_str[value]; return NULL; } #ifdef DBG_SW_SEC_CNT #define WEP_SW_ENC_CNT_INC(sec, ra) \ if (is_broadcast_mac_addr(ra)) \ sec->wep_sw_enc_cnt_bc++; \ else if (is_multicast_mac_addr(ra)) \ sec->wep_sw_enc_cnt_mc++; \ else \ sec->wep_sw_enc_cnt_uc++; #define WEP_SW_DEC_CNT_INC(sec, ra) \ if (is_broadcast_mac_addr(ra)) \ sec->wep_sw_dec_cnt_bc++; \ else if (is_multicast_mac_addr(ra)) \ sec->wep_sw_dec_cnt_mc++; \ else \ sec->wep_sw_dec_cnt_uc++; #define TKIP_SW_ENC_CNT_INC(sec, ra) \ if (is_broadcast_mac_addr(ra)) \ sec->tkip_sw_enc_cnt_bc++; \ else if (is_multicast_mac_addr(ra)) \ sec->tkip_sw_enc_cnt_mc++; \ else \ sec->tkip_sw_enc_cnt_uc++; #define TKIP_SW_DEC_CNT_INC(sec, ra) \ if (is_broadcast_mac_addr(ra)) \ sec->tkip_sw_dec_cnt_bc++; \ else if (is_multicast_mac_addr(ra)) \ sec->tkip_sw_dec_cnt_mc++; \ else \ sec->tkip_sw_dec_cnt_uc++; #define AES_SW_ENC_CNT_INC(sec, ra) \ if (is_broadcast_mac_addr(ra)) \ sec->aes_sw_enc_cnt_bc++; \ else if (is_multicast_mac_addr(ra)) \ sec->aes_sw_enc_cnt_mc++; \ else \ sec->aes_sw_enc_cnt_uc++; #define AES_SW_DEC_CNT_INC(sec, ra) \ if (is_broadcast_mac_addr(ra)) \ sec->aes_sw_dec_cnt_bc++; \ else if (is_multicast_mac_addr(ra)) \ sec->aes_sw_dec_cnt_mc++; \ else \ sec->aes_sw_dec_cnt_uc++; #else #define WEP_SW_ENC_CNT_INC(sec, ra) #define WEP_SW_DEC_CNT_INC(sec, ra) #define TKIP_SW_ENC_CNT_INC(sec, ra) #define TKIP_SW_DEC_CNT_INC(sec, ra) #define AES_SW_ENC_CNT_INC(sec, ra) #define AES_SW_DEC_CNT_INC(sec, ra) #endif /* DBG_SW_SEC_CNT */ //=====WEP related===== #define CRC32_POLY 0x04c11db7 struct arc4context { u32 x; u32 y; u8 state[256]; }; static void arcfour_init(struct arc4context *parc4ctx, u8 * key,u32 key_len) { u32 t, u; u32 keyindex; u32 stateindex; u8 * state; u32 counter; _func_enter_; state = parc4ctx->state; parc4ctx->x = 0; parc4ctx->y = 0; for (counter = 0; counter < 256; counter++) state[counter] = (u8)counter; keyindex = 0; stateindex = 0; for (counter = 0; counter < 256; counter++) { t = state[counter]; stateindex = (stateindex + key[keyindex] + t) & 0xff; u = state[stateindex]; state[stateindex] = (u8)t; state[counter] = (u8)u; if (++keyindex >= key_len) keyindex = 0; } _func_exit_; } static u32 arcfour_byte( struct arc4context *parc4ctx) { u32 x; u32 y; u32 sx, sy; u8 * state; _func_enter_; state = parc4ctx->state; x = (parc4ctx->x + 1) & 0xff; sx = state[x]; y = (sx + parc4ctx->y) & 0xff; sy = state[y]; parc4ctx->x = x; parc4ctx->y = y; state[y] = (u8)sx; state[x] = (u8)sy; _func_exit_; return state[(sx + sy) & 0xff]; } static void arcfour_encrypt( struct arc4context *parc4ctx, u8 * dest, u8 * src, u32 len) { u32 i; _func_enter_; for (i = 0; i < len; i++) dest[i] = src[i] ^ (unsigned char)arcfour_byte(parc4ctx); _func_exit_; } static sint bcrc32initialized = 0; static u32 crc32_table[256]; static u8 crc32_reverseBit( u8 data) { return( (u8)((data<<7)&0x80) | ((data<<5)&0x40) | ((data<<3)&0x20) | ((data<<1)&0x10) | ((data>>1)&0x08) | ((data>>3)&0x04) | ((data>>5)&0x02) | ((data>>7)&0x01) ); } static void crc32_init(void) { _func_enter_; if (bcrc32initialized == 1) goto exit; else{ sint i, j; u32 c; u8 *p=(u8 *)&c, *p1; u8 k; c = 0x12340000; for (i = 0; i < 256; ++i) { k = crc32_reverseBit((u8)i); for (c = ((u32)k) << 24, j = 8; j > 0; --j){ c = c & 0x80000000 ? (c << 1) ^ CRC32_POLY : (c << 1); } p1 = (u8 *)&crc32_table[i]; p1[0] = crc32_reverseBit(p[3]); p1[1] = crc32_reverseBit(p[2]); p1[2] = crc32_reverseBit(p[1]); p1[3] = crc32_reverseBit(p[0]); } bcrc32initialized= 1; } exit: _func_exit_; } static u32 getcrc32(u8 *buf, sint len) { u8 *p; u32 crc; _func_enter_; if (bcrc32initialized == 0) crc32_init(); crc = 0xffffffff; /* preload shift register, per CRC-32 spec */ for (p = buf; len > 0; ++p, --len) { crc = crc32_table[ (crc ^ *p) & 0xff] ^ (crc >> 8); } _func_exit_; return ~crc; /* transmit complement, per CRC-32 spec */ } /* Need to consider the fragment situation */ void rtw_wep_encrypt(_adapter *padapter, u8 *pxmitframe) { // exclude ICV unsigned char crc[4]; struct arc4context mycontext; sint curfragnum,length; u32 keylength; u8 *pframe, *payload,*iv; //,*wepkey u8 wepkey[16]; u8 hw_hdr_offset=0; struct pkt_attrib *pattrib = &((struct xmit_frame*)pxmitframe)->attrib; struct security_priv *psecuritypriv=&padapter->securitypriv; struct xmit_priv *pxmitpriv=&padapter->xmitpriv; _func_enter_; if(((struct xmit_frame*)pxmitframe)->buf_addr==NULL) return; #ifdef CONFIG_USB_TX_AGGREGATION hw_hdr_offset = TXDESC_SIZE + (((struct xmit_frame*)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ); #else #ifdef CONFIG_TX_EARLY_MODE hw_hdr_offset = TXDESC_OFFSET+EARLY_MODE_INFO_SIZE; #else hw_hdr_offset = TXDESC_OFFSET; #endif #endif pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + hw_hdr_offset; //start to encrypt each fragment if((pattrib->encrypt==_WEP40_)||(pattrib->encrypt==_WEP104_)) { keylength=psecuritypriv->dot11DefKeylen[psecuritypriv->dot11PrivacyKeyIndex]; for(curfragnum=0;curfragnumnr_frags;curfragnum++) { iv=pframe+pattrib->hdrlen; _rtw_memcpy(&wepkey[0], iv, 3); _rtw_memcpy(&wepkey[3], &psecuritypriv->dot11DefKey[psecuritypriv->dot11PrivacyKeyIndex].skey[0],keylength); payload=pframe+pattrib->iv_len+pattrib->hdrlen; if((curfragnum+1)==pattrib->nr_frags) { //the last fragment length=pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len- pattrib->icv_len; *((u32 *)crc)=cpu_to_le32(getcrc32(payload,length)); arcfour_init(&mycontext, wepkey,3+keylength); arcfour_encrypt(&mycontext, payload, payload, length); arcfour_encrypt(&mycontext, payload+length, crc, 4); } else { length=pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len ; *((u32 *)crc)=cpu_to_le32(getcrc32(payload,length)); arcfour_init(&mycontext, wepkey,3+keylength); arcfour_encrypt(&mycontext, payload, payload, length); arcfour_encrypt(&mycontext, payload+length, crc, 4); pframe+=pxmitpriv->frag_len; pframe=(u8 *)RND4((SIZE_PTR)(pframe)); } } WEP_SW_ENC_CNT_INC(psecuritypriv, pattrib->ra); } _func_exit_; } void rtw_wep_decrypt(_adapter *padapter, u8 *precvframe) { // exclude ICV u8 crc[4]; struct arc4context mycontext; sint length; u32 keylength; u8 *pframe, *payload,*iv,wepkey[16]; u8 keyindex; struct rx_pkt_attrib *prxattrib = &(((union recv_frame*)precvframe)->u.hdr.attrib); struct security_priv *psecuritypriv=&padapter->securitypriv; _func_enter_; pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; //start to decrypt recvframe if((prxattrib->encrypt==_WEP40_)||(prxattrib->encrypt==_WEP104_)) { iv=pframe+prxattrib->hdrlen; //keyindex=(iv[3]&0x3); keyindex = prxattrib->key_index; keylength=psecuritypriv->dot11DefKeylen[keyindex]; _rtw_memcpy(&wepkey[0], iv, 3); //_rtw_memcpy(&wepkey[3], &psecuritypriv->dot11DefKey[psecuritypriv->dot11PrivacyKeyIndex].skey[0],keylength); _rtw_memcpy(&wepkey[3], &psecuritypriv->dot11DefKey[keyindex].skey[0],keylength); length= ((union recv_frame *)precvframe)->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len; payload=pframe+prxattrib->iv_len+prxattrib->hdrlen; //decrypt payload include icv arcfour_init(&mycontext, wepkey,3+keylength); arcfour_encrypt(&mycontext, payload, payload, length); //calculate icv and compare the icv *((u32 *)crc)=le32_to_cpu(getcrc32(payload,length-4)); if(crc[3]!=payload[length-1] || crc[2]!=payload[length-2] || crc[1]!=payload[length-3] || crc[0]!=payload[length-4]) { RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_wep_decrypt:icv error crc[3](%x)!=payload[length-1](%x) || crc[2](%x)!=payload[length-2](%x) || crc[1](%x)!=payload[length-3](%x) || crc[0](%x)!=payload[length-4](%x)\n", crc[3],payload[length-1],crc[2],payload[length-2],crc[1],payload[length-3],crc[0],payload[length-4])); } WEP_SW_DEC_CNT_INC(psecuritypriv, prxattrib->ra); } _func_exit_; return; } //3 =====TKIP related===== static u32 secmicgetuint32( u8 * p ) // Convert from Byte[] to Us4Byte32 in a portable way { s32 i; u32 res = 0; _func_enter_; for( i=0; i<4; i++ ) { res |= ((u32)(*p++)) << (8*i); } _func_exit_; return res; } static void secmicputuint32( u8 * p, u32 val ) // Convert from Us4Byte32 to Byte[] in a portable way { long i; _func_enter_; for( i=0; i<4; i++ ) { *p++ = (u8) (val & 0xff); val >>= 8; } _func_exit_; } static void secmicclear(struct mic_data *pmicdata) { // Reset the state to the empty message. _func_enter_; pmicdata->L = pmicdata->K0; pmicdata->R = pmicdata->K1; pmicdata->nBytesInM = 0; pmicdata->M = 0; _func_exit_; } void rtw_secmicsetkey(struct mic_data *pmicdata, u8 * key ) { // Set the key _func_enter_; pmicdata->K0 = secmicgetuint32( key ); pmicdata->K1 = secmicgetuint32( key + 4 ); // and reset the message secmicclear(pmicdata); _func_exit_; } void rtw_secmicappendbyte(struct mic_data *pmicdata, u8 b ) { _func_enter_; // Append the byte to our word-sized buffer pmicdata->M |= ((unsigned long)b) << (8*pmicdata->nBytesInM); pmicdata->nBytesInM++; // Process the word if it is full. if( pmicdata->nBytesInM >= 4 ) { pmicdata->L ^= pmicdata->M; pmicdata->R ^= ROL32( pmicdata->L, 17 ); pmicdata->L += pmicdata->R; pmicdata->R ^= ((pmicdata->L & 0xff00ff00) >> 8) | ((pmicdata->L & 0x00ff00ff) << 8); pmicdata->L += pmicdata->R; pmicdata->R ^= ROL32( pmicdata->L, 3 ); pmicdata->L += pmicdata->R; pmicdata->R ^= ROR32( pmicdata->L, 2 ); pmicdata->L += pmicdata->R; // Clear the buffer pmicdata->M = 0; pmicdata->nBytesInM = 0; } _func_exit_; } void rtw_secmicappend(struct mic_data *pmicdata, u8 * src, u32 nbytes ) { _func_enter_; // This is simple while( nbytes > 0 ) { rtw_secmicappendbyte(pmicdata, *src++ ); nbytes--; } _func_exit_; } void rtw_secgetmic(struct mic_data *pmicdata, u8 * dst ) { _func_enter_; // Append the minimum padding rtw_secmicappendbyte(pmicdata, 0x5a ); rtw_secmicappendbyte(pmicdata, 0 ); rtw_secmicappendbyte(pmicdata, 0 ); rtw_secmicappendbyte(pmicdata, 0 ); rtw_secmicappendbyte(pmicdata, 0 ); // and then zeroes until the length is a multiple of 4 while( pmicdata->nBytesInM != 0 ) { rtw_secmicappendbyte(pmicdata, 0 ); } // The appendByte function has already computed the result. secmicputuint32( dst, pmicdata->L ); secmicputuint32( dst+4, pmicdata->R ); // Reset to the empty message. secmicclear(pmicdata); _func_exit_; } void rtw_seccalctkipmic(u8 * key,u8 *header,u8 *data,u32 data_len,u8 *mic_code, u8 pri) { struct mic_data micdata; u8 priority[4]={0x0,0x0,0x0,0x0}; _func_enter_; rtw_secmicsetkey(&micdata, key); priority[0]=pri; /* Michael MIC pseudo header: DA, SA, 3 x 0, Priority */ if(header[1]&1){ //ToDS==1 rtw_secmicappend(&micdata, &header[16], 6); //DA if(header[1]&2) //From Ds==1 rtw_secmicappend(&micdata, &header[24], 6); else rtw_secmicappend(&micdata, &header[10], 6); } else{ //ToDS==0 rtw_secmicappend(&micdata, &header[4], 6); //DA if(header[1]&2) //From Ds==1 rtw_secmicappend(&micdata, &header[16], 6); else rtw_secmicappend(&micdata, &header[10], 6); } rtw_secmicappend(&micdata, &priority[0], 4); rtw_secmicappend(&micdata, data, data_len); rtw_secgetmic(&micdata,mic_code); _func_exit_; } /* macros for extraction/creation of unsigned char/unsigned short values */ #define RotR1(v16) ((((v16) >> 1) & 0x7FFF) ^ (((v16) & 1) << 15)) #define Lo8(v16) ((u8)( (v16) & 0x00FF)) #define Hi8(v16) ((u8)(((v16) >> 8) & 0x00FF)) #define Lo16(v32) ((u16)( (v32) & 0xFFFF)) #define Hi16(v32) ((u16)(((v32) >>16) & 0xFFFF)) #define Mk16(hi,lo) ((lo) ^ (((u16)(hi)) << 8)) /* select the Nth 16-bit word of the temporal key unsigned char array TK[] */ #define TK16(N) Mk16(tk[2*(N)+1],tk[2*(N)]) /* S-box lookup: 16 bits --> 16 bits */ #define _S_(v16) (Sbox1[0][Lo8(v16)] ^ Sbox1[1][Hi8(v16)]) /* fixed algorithm "parameters" */ #define PHASE1_LOOP_CNT 8 /* this needs to be "big enough" */ #define TA_SIZE 6 /* 48-bit transmitter address */ #define TK_SIZE 16 /* 128-bit temporal key */ #define P1K_SIZE 10 /* 80-bit Phase1 key */ #define RC4_KEY_SIZE 16 /* 128-bit RC4KEY (104 bits unknown) */ /* 2-unsigned char by 2-unsigned char subset of the full AES S-box table */ static const unsigned short Sbox1[2][256]= /* Sbox for hash (can be in ROM) */ { { 0xC6A5,0xF884,0xEE99,0xF68D,0xFF0D,0xD6BD,0xDEB1,0x9154, 0x6050,0x0203,0xCEA9,0x567D,0xE719,0xB562,0x4DE6,0xEC9A, 0x8F45,0x1F9D,0x8940,0xFA87,0xEF15,0xB2EB,0x8EC9,0xFB0B, 0x41EC,0xB367,0x5FFD,0x45EA,0x23BF,0x53F7,0xE496,0x9B5B, 0x75C2,0xE11C,0x3DAE,0x4C6A,0x6C5A,0x7E41,0xF502,0x834F, 0x685C,0x51F4,0xD134,0xF908,0xE293,0xAB73,0x6253,0x2A3F, 0x080C,0x9552,0x4665,0x9D5E,0x3028,0x37A1,0x0A0F,0x2FB5, 0x0E09,0x2436,0x1B9B,0xDF3D,0xCD26,0x4E69,0x7FCD,0xEA9F, 0x121B,0x1D9E,0x5874,0x342E,0x362D,0xDCB2,0xB4EE,0x5BFB, 0xA4F6,0x764D,0xB761,0x7DCE,0x527B,0xDD3E,0x5E71,0x1397, 0xA6F5,0xB968,0x0000,0xC12C,0x4060,0xE31F,0x79C8,0xB6ED, 0xD4BE,0x8D46,0x67D9,0x724B,0x94DE,0x98D4,0xB0E8,0x854A, 0xBB6B,0xC52A,0x4FE5,0xED16,0x86C5,0x9AD7,0x6655,0x1194, 0x8ACF,0xE910,0x0406,0xFE81,0xA0F0,0x7844,0x25BA,0x4BE3, 0xA2F3,0x5DFE,0x80C0,0x058A,0x3FAD,0x21BC,0x7048,0xF104, 0x63DF,0x77C1,0xAF75,0x4263,0x2030,0xE51A,0xFD0E,0xBF6D, 0x814C,0x1814,0x2635,0xC32F,0xBEE1,0x35A2,0x88CC,0x2E39, 0x9357,0x55F2,0xFC82,0x7A47,0xC8AC,0xBAE7,0x322B,0xE695, 0xC0A0,0x1998,0x9ED1,0xA37F,0x4466,0x547E,0x3BAB,0x0B83, 0x8CCA,0xC729,0x6BD3,0x283C,0xA779,0xBCE2,0x161D,0xAD76, 0xDB3B,0x6456,0x744E,0x141E,0x92DB,0x0C0A,0x486C,0xB8E4, 0x9F5D,0xBD6E,0x43EF,0xC4A6,0x39A8,0x31A4,0xD337,0xF28B, 0xD532,0x8B43,0x6E59,0xDAB7,0x018C,0xB164,0x9CD2,0x49E0, 0xD8B4,0xACFA,0xF307,0xCF25,0xCAAF,0xF48E,0x47E9,0x1018, 0x6FD5,0xF088,0x4A6F,0x5C72,0x3824,0x57F1,0x73C7,0x9751, 0xCB23,0xA17C,0xE89C,0x3E21,0x96DD,0x61DC,0x0D86,0x0F85, 0xE090,0x7C42,0x71C4,0xCCAA,0x90D8,0x0605,0xF701,0x1C12, 0xC2A3,0x6A5F,0xAEF9,0x69D0,0x1791,0x9958,0x3A27,0x27B9, 0xD938,0xEB13,0x2BB3,0x2233,0xD2BB,0xA970,0x0789,0x33A7, 0x2DB6,0x3C22,0x1592,0xC920,0x8749,0xAAFF,0x5078,0xA57A, 0x038F,0x59F8,0x0980,0x1A17,0x65DA,0xD731,0x84C6,0xD0B8, 0x82C3,0x29B0,0x5A77,0x1E11,0x7BCB,0xA8FC,0x6DD6,0x2C3A, }, { /* second half of table is unsigned char-reversed version of first! */ 0xA5C6,0x84F8,0x99EE,0x8DF6,0x0DFF,0xBDD6,0xB1DE,0x5491, 0x5060,0x0302,0xA9CE,0x7D56,0x19E7,0x62B5,0xE64D,0x9AEC, 0x458F,0x9D1F,0x4089,0x87FA,0x15EF,0xEBB2,0xC98E,0x0BFB, 0xEC41,0x67B3,0xFD5F,0xEA45,0xBF23,0xF753,0x96E4,0x5B9B, 0xC275,0x1CE1,0xAE3D,0x6A4C,0x5A6C,0x417E,0x02F5,0x4F83, 0x5C68,0xF451,0x34D1,0x08F9,0x93E2,0x73AB,0x5362,0x3F2A, 0x0C08,0x5295,0x6546,0x5E9D,0x2830,0xA137,0x0F0A,0xB52F, 0x090E,0x3624,0x9B1B,0x3DDF,0x26CD,0x694E,0xCD7F,0x9FEA, 0x1B12,0x9E1D,0x7458,0x2E34,0x2D36,0xB2DC,0xEEB4,0xFB5B, 0xF6A4,0x4D76,0x61B7,0xCE7D,0x7B52,0x3EDD,0x715E,0x9713, 0xF5A6,0x68B9,0x0000,0x2CC1,0x6040,0x1FE3,0xC879,0xEDB6, 0xBED4,0x468D,0xD967,0x4B72,0xDE94,0xD498,0xE8B0,0x4A85, 0x6BBB,0x2AC5,0xE54F,0x16ED,0xC586,0xD79A,0x5566,0x9411, 0xCF8A,0x10E9,0x0604,0x81FE,0xF0A0,0x4478,0xBA25,0xE34B, 0xF3A2,0xFE5D,0xC080,0x8A05,0xAD3F,0xBC21,0x4870,0x04F1, 0xDF63,0xC177,0x75AF,0x6342,0x3020,0x1AE5,0x0EFD,0x6DBF, 0x4C81,0x1418,0x3526,0x2FC3,0xE1BE,0xA235,0xCC88,0x392E, 0x5793,0xF255,0x82FC,0x477A,0xACC8,0xE7BA,0x2B32,0x95E6, 0xA0C0,0x9819,0xD19E,0x7FA3,0x6644,0x7E54,0xAB3B,0x830B, 0xCA8C,0x29C7,0xD36B,0x3C28,0x79A7,0xE2BC,0x1D16,0x76AD, 0x3BDB,0x5664,0x4E74,0x1E14,0xDB92,0x0A0C,0x6C48,0xE4B8, 0x5D9F,0x6EBD,0xEF43,0xA6C4,0xA839,0xA431,0x37D3,0x8BF2, 0x32D5,0x438B,0x596E,0xB7DA,0x8C01,0x64B1,0xD29C,0xE049, 0xB4D8,0xFAAC,0x07F3,0x25CF,0xAFCA,0x8EF4,0xE947,0x1810, 0xD56F,0x88F0,0x6F4A,0x725C,0x2438,0xF157,0xC773,0x5197, 0x23CB,0x7CA1,0x9CE8,0x213E,0xDD96,0xDC61,0x860D,0x850F, 0x90E0,0x427C,0xC471,0xAACC,0xD890,0x0506,0x01F7,0x121C, 0xA3C2,0x5F6A,0xF9AE,0xD069,0x9117,0x5899,0x273A,0xB927, 0x38D9,0x13EB,0xB32B,0x3322,0xBBD2,0x70A9,0x8907,0xA733, 0xB62D,0x223C,0x9215,0x20C9,0x4987,0xFFAA,0x7850,0x7AA5, 0x8F03,0xF859,0x8009,0x171A,0xDA65,0x31D7,0xC684,0xB8D0, 0xC382,0xB029,0x775A,0x111E,0xCB7B,0xFCA8,0xD66D,0x3A2C, } }; /* ********************************************************************** * Routine: Phase 1 -- generate P1K, given TA, TK, IV32 * * Inputs: * tk[] = temporal key [128 bits] * ta[] = transmitter's MAC address [ 48 bits] * iv32 = upper 32 bits of IV [ 32 bits] * Output: * p1k[] = Phase 1 key [ 80 bits] * * Note: * This function only needs to be called every 2**16 packets, * although in theory it could be called every packet. * ********************************************************************** */ static void phase1(u16 *p1k,const u8 *tk,const u8 *ta,u32 iv32) { sint i; _func_enter_; /* Initialize the 80 bits of P1K[] from IV32 and TA[0..5] */ p1k[0] = Lo16(iv32); p1k[1] = Hi16(iv32); p1k[2] = Mk16(ta[1],ta[0]); /* use TA[] as little-endian */ p1k[3] = Mk16(ta[3],ta[2]); p1k[4] = Mk16(ta[5],ta[4]); /* Now compute an unbalanced Feistel cipher with 80-bit block */ /* size on the 80-bit block P1K[], using the 128-bit key TK[] */ for (i=0; i < PHASE1_LOOP_CNT ;i++) { /* Each add operation here is mod 2**16 */ p1k[0] += _S_(p1k[4] ^ TK16((i&1)+0)); p1k[1] += _S_(p1k[0] ^ TK16((i&1)+2)); p1k[2] += _S_(p1k[1] ^ TK16((i&1)+4)); p1k[3] += _S_(p1k[2] ^ TK16((i&1)+6)); p1k[4] += _S_(p1k[3] ^ TK16((i&1)+0)); p1k[4] += (unsigned short)i; /* avoid "slide attacks" */ } _func_exit_; } /* ********************************************************************** * Routine: Phase 2 -- generate RC4KEY, given TK, P1K, IV16 * * Inputs: * tk[] = Temporal key [128 bits] * p1k[] = Phase 1 output key [ 80 bits] * iv16 = low 16 bits of IV counter [ 16 bits] * Output: * rc4key[] = the key used to encrypt the packet [128 bits] * * Note: * The value {TA,IV32,IV16} for Phase1/Phase2 must be unique * across all packets using the same key TK value. Then, for a * given value of TK[], this TKIP48 construction guarantees that * the final RC4KEY value is unique across all packets. * * Suggested implementation optimization: if PPK[] is "overlaid" * appropriately on RC4KEY[], there is no need for the final * for loop below that copies the PPK[] result into RC4KEY[]. * ********************************************************************** */ static void phase2(u8 *rc4key,const u8 *tk,const u16 *p1k,u16 iv16) { sint i; u16 PPK[6]; /* temporary key for mixing */ _func_enter_; /* Note: all adds in the PPK[] equations below are mod 2**16 */ for (i=0;i<5;i++) PPK[i]=p1k[i]; /* first, copy P1K to PPK */ PPK[5] = p1k[4] +iv16; /* next, add in IV16 */ /* Bijective non-linear mixing of the 96 bits of PPK[0..5] */ PPK[0] += _S_(PPK[5] ^ TK16(0)); /* Mix key in each "round" */ PPK[1] += _S_(PPK[0] ^ TK16(1)); PPK[2] += _S_(PPK[1] ^ TK16(2)); PPK[3] += _S_(PPK[2] ^ TK16(3)); PPK[4] += _S_(PPK[3] ^ TK16(4)); PPK[5] += _S_(PPK[4] ^ TK16(5)); /* Total # S-box lookups == 6 */ /* Final sweep: bijective, "linear". Rotates kill LSB correlations */ PPK[0] += RotR1(PPK[5] ^ TK16(6)); PPK[1] += RotR1(PPK[0] ^ TK16(7)); /* Use all of TK[] in Phase2 */ PPK[2] += RotR1(PPK[1]); PPK[3] += RotR1(PPK[2]); PPK[4] += RotR1(PPK[3]); PPK[5] += RotR1(PPK[4]); /* Note: At this point, for a given key TK[0..15], the 96-bit output */ /* value PPK[0..5] is guaranteed to be unique, as a function */ /* of the 96-bit "input" value {TA,IV32,IV16}. That is, P1K */ /* is now a keyed permutation of {TA,IV32,IV16}. */ /* Set RC4KEY[0..3], which includes "cleartext" portion of RC4 key */ rc4key[0] = Hi8(iv16); /* RC4KEY[0..2] is the WEP IV */ rc4key[1] =(Hi8(iv16) | 0x20) & 0x7F; /* Help avoid weak (FMS) keys */ rc4key[2] = Lo8(iv16); rc4key[3] = Lo8((PPK[5] ^ TK16(0)) >> 1); /* Copy 96 bits of PPK[0..5] to RC4KEY[4..15] (little-endian) */ for (i=0;i<6;i++) { rc4key[4+2*i] = Lo8(PPK[i]); rc4key[5+2*i] = Hi8(PPK[i]); } _func_exit_; } //The hlen isn't include the IV u32 rtw_tkip_encrypt(_adapter *padapter, u8 *pxmitframe) { // exclude ICV u16 pnl; u32 pnh; u8 rc4key[16]; u8 ttkey[16]; u8 crc[4]; u8 hw_hdr_offset = 0; struct arc4context mycontext; sint curfragnum,length; u32 prwskeylen; u8 *pframe, *payload,*iv,*prwskey; union pn48 dot11txpn; //struct sta_info *stainfo; struct pkt_attrib *pattrib = &((struct xmit_frame *)pxmitframe)->attrib; struct security_priv *psecuritypriv=&padapter->securitypriv; struct xmit_priv *pxmitpriv=&padapter->xmitpriv; u32 res=_SUCCESS; _func_enter_; if(((struct xmit_frame*)pxmitframe)->buf_addr==NULL) return _FAIL; #ifdef CONFIG_USB_TX_AGGREGATION hw_hdr_offset = TXDESC_SIZE + (((struct xmit_frame*)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ); #else #ifdef CONFIG_TX_EARLY_MODE hw_hdr_offset = TXDESC_OFFSET+EARLY_MODE_INFO_SIZE; #else hw_hdr_offset = TXDESC_OFFSET; #endif #endif pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + hw_hdr_offset; //4 start to encrypt each fragment if(pattrib->encrypt==_TKIP_){ /* if(pattrib->psta) { stainfo = pattrib->psta; } else { DBG_871X("%s, call rtw_get_stainfo()\n", __func__); stainfo=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0] ); } */ //if (stainfo!=NULL) { /* if(!(stainfo->state &_FW_LINKED)) { DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, stainfo->state); return _FAIL; } */ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_encrypt: stainfo!=NULL!!!\n")); if(IS_MCAST(pattrib->ra)) { prwskey=psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; } else { //prwskey=&stainfo->dot118021x_UncstKey.skey[0]; prwskey=pattrib->dot118021x_UncstKey.skey; } prwskeylen=16; for(curfragnum=0;curfragnumnr_frags;curfragnum++){ iv=pframe+pattrib->hdrlen; payload=pframe+pattrib->iv_len+pattrib->hdrlen; GET_TKIP_PN(iv, dot11txpn); pnl=(u16)(dot11txpn.val); pnh=(u32)(dot11txpn.val>>16); phase1((u16 *)&ttkey[0],prwskey,&pattrib->ta[0],pnh); phase2(&rc4key[0],prwskey,(u16 *)&ttkey[0],pnl); if((curfragnum+1)==pattrib->nr_frags){ //4 the last fragment length=pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len- pattrib->icv_len; RT_TRACE(_module_rtl871x_security_c_,_drv_info_,("pattrib->iv_len =%x, pattrib->icv_len =%x\n", pattrib->iv_len,pattrib->icv_len)); *((u32 *)crc)=cpu_to_le32(getcrc32(payload,length));/* modified by Amy*/ arcfour_init(&mycontext, rc4key,16); arcfour_encrypt(&mycontext, payload, payload, length); arcfour_encrypt(&mycontext, payload+length, crc, 4); } else{ length=pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len ; *((u32 *)crc)=cpu_to_le32(getcrc32(payload,length));/* modified by Amy*/ arcfour_init(&mycontext,rc4key,16); arcfour_encrypt(&mycontext, payload, payload, length); arcfour_encrypt(&mycontext, payload+length, crc, 4); pframe+=pxmitpriv->frag_len; pframe=(u8 *)RND4((SIZE_PTR)(pframe)); } } TKIP_SW_ENC_CNT_INC(psecuritypriv,pattrib->ra); } /* else{ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_encrypt: stainfo==NULL!!!\n")); DBG_871X("%s, psta==NUL\n", __func__); res=_FAIL; } */ } _func_exit_; return res; } //The hlen isn't include the IV u32 rtw_tkip_decrypt(_adapter *padapter, u8 *precvframe) { // exclude ICV u16 pnl; u32 pnh; u8 rc4key[16]; u8 ttkey[16]; u8 crc[4]; struct arc4context mycontext; sint length; u32 prwskeylen; u8 *pframe, *payload,*iv,*prwskey; union pn48 dot11txpn; struct sta_info *stainfo; struct rx_pkt_attrib *prxattrib = &((union recv_frame *)precvframe)->u.hdr.attrib; struct security_priv *psecuritypriv=&padapter->securitypriv; // struct recv_priv *precvpriv=&padapter->recvpriv; u32 res=_SUCCESS; _func_enter_; pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; //4 start to decrypt recvframe if(prxattrib->encrypt==_TKIP_){ stainfo=rtw_get_stainfo(&padapter->stapriv ,&prxattrib->ta[0] ); if (stainfo!=NULL){ if(IS_MCAST(prxattrib->ra)) { static u32 start = 0; static u32 no_gkey_bc_cnt = 0; static u32 no_gkey_mc_cnt = 0; if(psecuritypriv->binstallGrpkey==_FALSE) { res=_FAIL; if (start == 0) start = rtw_get_current_time(); if (is_broadcast_mac_addr(prxattrib->ra)) no_gkey_bc_cnt++; else no_gkey_mc_cnt++; if (rtw_get_passing_time_ms(start) > 1000) { if (no_gkey_bc_cnt || no_gkey_mc_cnt) { DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" no_gkey_bc_cnt:%u, no_gkey_mc_cnt:%u\n", FUNC_ADPT_ARG(padapter), no_gkey_bc_cnt, no_gkey_mc_cnt); } start = rtw_get_current_time(); no_gkey_bc_cnt = 0; no_gkey_mc_cnt = 0; } goto exit; } if (no_gkey_bc_cnt || no_gkey_mc_cnt) { DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" gkey installed. no_gkey_bc_cnt:%u, no_gkey_mc_cnt:%u\n", FUNC_ADPT_ARG(padapter), no_gkey_bc_cnt, no_gkey_mc_cnt); } start = 0; no_gkey_bc_cnt = 0; no_gkey_mc_cnt = 0; //DBG_871X("rx bc/mc packets, to perform sw rtw_tkip_decrypt\n"); //prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey; prwskeylen=16; } else { prwskey=&stainfo->dot118021x_UncstKey.skey[0]; prwskeylen=16; } iv=pframe+prxattrib->hdrlen; payload=pframe+prxattrib->iv_len+prxattrib->hdrlen; length= ((union recv_frame *)precvframe)->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len; GET_TKIP_PN(iv, dot11txpn); pnl=(u16)(dot11txpn.val); pnh=(u32)(dot11txpn.val>>16); phase1((u16 *)&ttkey[0],prwskey,&prxattrib->ta[0],pnh); phase2(&rc4key[0],prwskey,(unsigned short *)&ttkey[0],pnl); //4 decrypt payload include icv arcfour_init(&mycontext, rc4key,16); arcfour_encrypt(&mycontext, payload, payload, length); *((u32 *)crc)=le32_to_cpu(getcrc32(payload,length-4)); if(crc[3]!=payload[length-1] || crc[2]!=payload[length-2] || crc[1]!=payload[length-3] || crc[0]!=payload[length-4]) { RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_wep_decrypt:icv error crc[3](%x)!=payload[length-1](%x) || crc[2](%x)!=payload[length-2](%x) || crc[1](%x)!=payload[length-3](%x) || crc[0](%x)!=payload[length-4](%x)\n", crc[3],payload[length-1],crc[2],payload[length-2],crc[1],payload[length-3],crc[0],payload[length-4])); res=_FAIL; } TKIP_SW_DEC_CNT_INC(psecuritypriv, prxattrib->ra); } else{ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_decrypt: stainfo==NULL!!!\n")); res=_FAIL; } } _func_exit_; exit: return res; } //3 =====AES related===== #define MAX_MSG_SIZE 2048 /*****************************/ /******** SBOX Table *********/ /*****************************/ static u8 sbox_table[256] = { 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76, 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0, 0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15, 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75, 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84, 0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf, 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8, 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2, 0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73, 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb, 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79, 0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08, 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a, 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e, 0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf, 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16 }; /*****************************/ /**** Function Prototypes ****/ /*****************************/ static void bitwise_xor(u8 *ina, u8 *inb, u8 *out); static void construct_mic_iv( u8 *mic_header1, sint qc_exists, sint a4_exists, u8 *mpdu, uint payload_length, u8 * pn_vector, uint frtype);// add for CONFIG_IEEE80211W, none 11w also can use static void construct_mic_header1( u8 *mic_header1, sint header_length, u8 *mpdu, uint frtype);// add for CONFIG_IEEE80211W, none 11w also can use static void construct_mic_header2( u8 *mic_header2, u8 *mpdu, sint a4_exists, sint qc_exists); static void construct_ctr_preload( u8 *ctr_preload, sint a4_exists, sint qc_exists, u8 *mpdu, u8 *pn_vector, sint c, uint frtype);// add for CONFIG_IEEE80211W, none 11w also can use static void xor_128(u8 *a, u8 *b, u8 *out); static void xor_32(u8 *a, u8 *b, u8 *out); static u8 sbox(u8 a); static void next_key(u8 *key, sint round); static void byte_sub(u8 *in, u8 *out); static void shift_row(u8 *in, u8 *out); static void mix_column(u8 *in, u8 *out); #ifndef PLATFORM_FREEBSD static void add_round_key( u8 *shiftrow_in, u8 *mcol_in, u8 *block_in, sint round, u8 *out); #endif //PLATFORM_FREEBSD static void aes128k128d(u8 *key, u8 *data, u8 *ciphertext); /****************************************/ /* aes128k128d() */ /* Performs a 128 bit AES encrypt with */ /* 128 bit data. */ /****************************************/ static void xor_128(u8 *a, u8 *b, u8 *out) { sint i; _func_enter_; for (i=0;i<16; i++) { out[i] = a[i] ^ b[i]; } _func_exit_; } static void xor_32(u8 *a, u8 *b, u8 *out) { sint i; _func_enter_; for (i=0;i<4; i++) { out[i] = a[i] ^ b[i]; } _func_exit_; } static u8 sbox(u8 a) { return sbox_table[(sint)a]; } static void next_key(u8 *key, sint round) { u8 rcon; u8 sbox_key[4]; u8 rcon_table[12] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1b, 0x36, 0x36, 0x36 }; _func_enter_; sbox_key[0] = sbox(key[13]); sbox_key[1] = sbox(key[14]); sbox_key[2] = sbox(key[15]); sbox_key[3] = sbox(key[12]); rcon = rcon_table[round]; xor_32(&key[0], sbox_key, &key[0]); key[0] = key[0] ^ rcon; xor_32(&key[4], &key[0], &key[4]); xor_32(&key[8], &key[4], &key[8]); xor_32(&key[12], &key[8], &key[12]); _func_exit_; } static void byte_sub(u8 *in, u8 *out) { sint i; _func_enter_; for (i=0; i< 16; i++) { out[i] = sbox(in[i]); } _func_exit_; } static void shift_row(u8 *in, u8 *out) { _func_enter_; out[0] = in[0]; out[1] = in[5]; out[2] = in[10]; out[3] = in[15]; out[4] = in[4]; out[5] = in[9]; out[6] = in[14]; out[7] = in[3]; out[8] = in[8]; out[9] = in[13]; out[10] = in[2]; out[11] = in[7]; out[12] = in[12]; out[13] = in[1]; out[14] = in[6]; out[15] = in[11]; _func_exit_; } static void mix_column(u8 *in, u8 *out) { sint i; u8 add1b[4]; u8 add1bf7[4]; u8 rotl[4]; u8 swap_halfs[4]; u8 andf7[4]; u8 rotr[4]; u8 temp[4]; u8 tempb[4]; _func_enter_; for (i=0 ; i<4; i++) { if ((in[i] & 0x80)== 0x80) add1b[i] = 0x1b; else add1b[i] = 0x00; } swap_halfs[0] = in[2]; /* Swap halfs */ swap_halfs[1] = in[3]; swap_halfs[2] = in[0]; swap_halfs[3] = in[1]; rotl[0] = in[3]; /* Rotate left 8 bits */ rotl[1] = in[0]; rotl[2] = in[1]; rotl[3] = in[2]; andf7[0] = in[0] & 0x7f; andf7[1] = in[1] & 0x7f; andf7[2] = in[2] & 0x7f; andf7[3] = in[3] & 0x7f; for (i = 3; i>0; i--) /* logical shift left 1 bit */ { andf7[i] = andf7[i] << 1; if ((andf7[i-1] & 0x80) == 0x80) { andf7[i] = (andf7[i] | 0x01); } } andf7[0] = andf7[0] << 1; andf7[0] = andf7[0] & 0xfe; xor_32(add1b, andf7, add1bf7); xor_32(in, add1bf7, rotr); temp[0] = rotr[0]; /* Rotate right 8 bits */ rotr[0] = rotr[1]; rotr[1] = rotr[2]; rotr[2] = rotr[3]; rotr[3] = temp[0]; xor_32(add1bf7, rotr, temp); xor_32(swap_halfs, rotl,tempb); xor_32(temp, tempb, out); _func_exit_; } static void aes128k128d(u8 *key, u8 *data, u8 *ciphertext) { sint round; sint i; u8 intermediatea[16]; u8 intermediateb[16]; u8 round_key[16]; _func_enter_; for(i=0; i<16; i++) round_key[i] = key[i]; for (round = 0; round < 11; round++) { if (round == 0) { xor_128(round_key, data, ciphertext); next_key(round_key, round); } else if (round == 10) { byte_sub(ciphertext, intermediatea); shift_row(intermediatea, intermediateb); xor_128(intermediateb, round_key, ciphertext); } else /* 1 - 9 */ { byte_sub(ciphertext, intermediatea); shift_row(intermediatea, intermediateb); mix_column(&intermediateb[0], &intermediatea[0]); mix_column(&intermediateb[4], &intermediatea[4]); mix_column(&intermediateb[8], &intermediatea[8]); mix_column(&intermediateb[12], &intermediatea[12]); xor_128(intermediatea, round_key, ciphertext); next_key(round_key, round); } } _func_exit_; } /************************************************/ /* construct_mic_iv() */ /* Builds the MIC IV from header fields and PN */ /* Baron think the function is construct CCM */ /* nonce */ /************************************************/ static void construct_mic_iv( u8 *mic_iv, sint qc_exists, sint a4_exists, u8 *mpdu, uint payload_length, u8 *pn_vector, uint frtype// add for CONFIG_IEEE80211W, none 11w also can use ) { sint i; _func_enter_; mic_iv[0] = 0x59; if (qc_exists && a4_exists) mic_iv[1] = mpdu[30] & 0x0f; /* QoS_TC */ if (qc_exists && !a4_exists) mic_iv[1] = mpdu[24] & 0x0f; /* mute bits 7-4 */ if (!qc_exists) mic_iv[1] = 0x00; #ifdef CONFIG_IEEE80211W //802.11w management frame should set management bit(4) if(frtype == WIFI_MGT_TYPE) mic_iv[1] |= BIT(4); #endif //CONFIG_IEEE80211W for (i = 2; i < 8; i++) mic_iv[i] = mpdu[i + 8]; /* mic_iv[2:7] = A2[0:5] = mpdu[10:15] */ #ifdef CONSISTENT_PN_ORDER for (i = 8; i < 14; i++) mic_iv[i] = pn_vector[i - 8]; /* mic_iv[8:13] = PN[0:5] */ #else for (i = 8; i < 14; i++) mic_iv[i] = pn_vector[13 - i]; /* mic_iv[8:13] = PN[5:0] */ #endif mic_iv[14] = (unsigned char) (payload_length / 256); mic_iv[15] = (unsigned char) (payload_length % 256); _func_exit_; } /************************************************/ /* construct_mic_header1() */ /* Builds the first MIC header block from */ /* header fields. */ /* Build AAD SC,A1,A2 */ /************************************************/ static void construct_mic_header1( u8 *mic_header1, sint header_length, u8 *mpdu, uint frtype// add for CONFIG_IEEE80211W, none 11w also can use ) { _func_enter_; mic_header1[0] = (u8)((header_length - 2) / 256); mic_header1[1] = (u8)((header_length - 2) % 256); #ifdef CONFIG_IEEE80211W //802.11w management frame don't AND subtype bits 4,5,6 of frame control field if(frtype == WIFI_MGT_TYPE) mic_header1[2] = mpdu[0]; else #endif //CONFIG_IEEE80211W mic_header1[2] = mpdu[0] & 0xcf; /* Mute CF poll & CF ack bits */ mic_header1[3] = mpdu[1] & 0xc7; /* Mute retry, more data and pwr mgt bits */ mic_header1[4] = mpdu[4]; /* A1 */ mic_header1[5] = mpdu[5]; mic_header1[6] = mpdu[6]; mic_header1[7] = mpdu[7]; mic_header1[8] = mpdu[8]; mic_header1[9] = mpdu[9]; mic_header1[10] = mpdu[10]; /* A2 */ mic_header1[11] = mpdu[11]; mic_header1[12] = mpdu[12]; mic_header1[13] = mpdu[13]; mic_header1[14] = mpdu[14]; mic_header1[15] = mpdu[15]; _func_exit_; } /************************************************/ /* construct_mic_header2() */ /* Builds the last MIC header block from */ /* header fields. */ /************************************************/ static void construct_mic_header2( u8 *mic_header2, u8 *mpdu, sint a4_exists, sint qc_exists ) { sint i; _func_enter_; for (i = 0; i<16; i++) mic_header2[i]=0x00; mic_header2[0] = mpdu[16]; /* A3 */ mic_header2[1] = mpdu[17]; mic_header2[2] = mpdu[18]; mic_header2[3] = mpdu[19]; mic_header2[4] = mpdu[20]; mic_header2[5] = mpdu[21]; //mic_header2[6] = mpdu[22] & 0xf0; /* SC */ mic_header2[6] = 0x00; mic_header2[7] = 0x00; /* mpdu[23]; */ if (!qc_exists && a4_exists) { for (i=0;i<6;i++) mic_header2[8+i] = mpdu[24+i]; /* A4 */ } if (qc_exists && !a4_exists) { mic_header2[8] = mpdu[24] & 0x0f; /* mute bits 15 - 4 */ mic_header2[9] = mpdu[25] & 0x00; } if (qc_exists && a4_exists) { for (i=0;i<6;i++) mic_header2[8+i] = mpdu[24+i]; /* A4 */ mic_header2[14] = mpdu[30] & 0x0f; mic_header2[15] = mpdu[31] & 0x00; } _func_exit_; } /************************************************/ /* construct_mic_header2() */ /* Builds the last MIC header block from */ /* header fields. */ /* Baron think the function is construct CCM */ /* nonce */ /************************************************/ static void construct_ctr_preload( u8 *ctr_preload, sint a4_exists, sint qc_exists, u8 *mpdu, u8 *pn_vector, sint c, uint frtype // add for CONFIG_IEEE80211W, none 11w also can use ) { sint i = 0; _func_enter_; for (i=0; i<16; i++) ctr_preload[i] = 0x00; i = 0; ctr_preload[0] = 0x01; /* flag */ if (qc_exists && a4_exists) ctr_preload[1] = mpdu[30] & 0x0f; /* QoC_Control */ if (qc_exists && !a4_exists) ctr_preload[1] = mpdu[24] & 0x0f; #ifdef CONFIG_IEEE80211W //802.11w management frame should set management bit(4) if(frtype == WIFI_MGT_TYPE) ctr_preload[1] |= BIT(4); #endif //CONFIG_IEEE80211W for (i = 2; i < 8; i++) ctr_preload[i] = mpdu[i + 8]; /* ctr_preload[2:7] = A2[0:5] = mpdu[10:15] */ #ifdef CONSISTENT_PN_ORDER for (i = 8; i < 14; i++) ctr_preload[i] = pn_vector[i - 8]; /* ctr_preload[8:13] = PN[0:5] */ #else for (i = 8; i < 14; i++) ctr_preload[i] = pn_vector[13 - i]; /* ctr_preload[8:13] = PN[5:0] */ #endif ctr_preload[14] = (unsigned char) (c / 256); /* Ctr */ ctr_preload[15] = (unsigned char) (c % 256); _func_exit_; } /************************************/ /* bitwise_xor() */ /* A 128 bit, bitwise exclusive or */ /************************************/ static void bitwise_xor(u8 *ina, u8 *inb, u8 *out) { sint i; _func_enter_; for (i=0; i<16; i++) { out[i] = ina[i] ^ inb[i]; } _func_exit_; } static sint aes_cipher(u8 *key, uint hdrlen, u8 *pframe, uint plen) { // /*static*/ unsigned char message[MAX_MSG_SIZE]; uint qc_exists, a4_exists, i, j, payload_remainder, num_blocks, payload_index; u8 pn_vector[6]; u8 mic_iv[16]; u8 mic_header1[16]; u8 mic_header2[16]; u8 ctr_preload[16]; /* Intermediate Buffers */ u8 chain_buffer[16]; u8 aes_out[16]; u8 padded_buffer[16]; u8 mic[8]; // uint offset = 0; uint frtype = GetFrameType(pframe); uint frsubtype = GetFrameSubType(pframe); _func_enter_; frsubtype=frsubtype>>4; _rtw_memset((void *)mic_iv, 0, 16); _rtw_memset((void *)mic_header1, 0, 16); _rtw_memset((void *)mic_header2, 0, 16); _rtw_memset((void *)ctr_preload, 0, 16); _rtw_memset((void *)chain_buffer, 0, 16); _rtw_memset((void *)aes_out, 0, 16); _rtw_memset((void *)padded_buffer, 0, 16); if ((hdrlen == WLAN_HDR_A3_LEN )||(hdrlen == WLAN_HDR_A3_QOS_LEN)) a4_exists = 0; else a4_exists = 1; if ( ((frtype|frsubtype) == WIFI_DATA_CFACK) || ((frtype|frsubtype) == WIFI_DATA_CFPOLL)|| ((frtype|frsubtype) == WIFI_DATA_CFACKPOLL)) { qc_exists = 1; if(hdrlen != WLAN_HDR_A3_QOS_LEN){ hdrlen += 2; } } // add for CONFIG_IEEE80211W, none 11w also can use else if ((frtype == WIFI_DATA) && ((frsubtype == 0x08) || (frsubtype == 0x09)|| (frsubtype == 0x0a)|| (frsubtype == 0x0b))) { if(hdrlen != WLAN_HDR_A3_QOS_LEN){ hdrlen += 2; } qc_exists = 1; } else qc_exists = 0; pn_vector[0]=pframe[hdrlen]; pn_vector[1]=pframe[hdrlen+1]; pn_vector[2]=pframe[hdrlen+4]; pn_vector[3]=pframe[hdrlen+5]; pn_vector[4]=pframe[hdrlen+6]; pn_vector[5]=pframe[hdrlen+7]; construct_mic_iv( mic_iv, qc_exists, a4_exists, pframe, //message, plen, pn_vector, frtype // add for CONFIG_IEEE80211W, none 11w also can use ); construct_mic_header1( mic_header1, hdrlen, pframe, //message frtype // add for CONFIG_IEEE80211W, none 11w also can use ); construct_mic_header2( mic_header2, pframe, //message, a4_exists, qc_exists ); payload_remainder = plen % 16; num_blocks = plen / 16; /* Find start of payload */ payload_index = (hdrlen + 8); /* Calculate MIC */ aes128k128d(key, mic_iv, aes_out); bitwise_xor(aes_out, mic_header1, chain_buffer); aes128k128d(key, chain_buffer, aes_out); bitwise_xor(aes_out, mic_header2, chain_buffer); aes128k128d(key, chain_buffer, aes_out); for (i = 0; i < num_blocks; i++) { bitwise_xor(aes_out, &pframe[payload_index], chain_buffer);//bitwise_xor(aes_out, &message[payload_index], chain_buffer); payload_index += 16; aes128k128d(key, chain_buffer, aes_out); } /* Add on the final payload block if it needs padding */ if (payload_remainder > 0) { for (j = 0; j < 16; j++) padded_buffer[j] = 0x00; for (j = 0; j < payload_remainder; j++) { padded_buffer[j] = pframe[payload_index++];//padded_buffer[j] = message[payload_index++]; } bitwise_xor(aes_out, padded_buffer, chain_buffer); aes128k128d(key, chain_buffer, aes_out); } for (j = 0 ; j < 8; j++) mic[j] = aes_out[j]; /* Insert MIC into payload */ for (j = 0; j < 8; j++) pframe[payload_index+j] = mic[j]; //message[payload_index+j] = mic[j]; payload_index = hdrlen + 8; for (i=0; i< num_blocks; i++) { construct_ctr_preload( ctr_preload, a4_exists, qc_exists, pframe, //message, pn_vector, i+1, frtype); // add for CONFIG_IEEE80211W, none 11w also can use aes128k128d(key, ctr_preload, aes_out); bitwise_xor(aes_out, &pframe[payload_index], chain_buffer);//bitwise_xor(aes_out, &message[payload_index], chain_buffer); for (j=0; j<16;j++) pframe[payload_index++] = chain_buffer[j];//for (j=0; j<16;j++) message[payload_index++] = chain_buffer[j]; } if (payload_remainder > 0) /* If there is a short final block, then pad it,*/ { /* encrypt it and copy the unpadded part back */ construct_ctr_preload( ctr_preload, a4_exists, qc_exists, pframe, //message, pn_vector, num_blocks+1, frtype); // add for CONFIG_IEEE80211W, none 11w also can use for (j = 0; j < 16; j++) padded_buffer[j] = 0x00; for (j = 0; j < payload_remainder; j++) { padded_buffer[j] = pframe[payload_index+j];//padded_buffer[j] = message[payload_index+j]; } aes128k128d(key, ctr_preload, aes_out); bitwise_xor(aes_out, padded_buffer, chain_buffer); for (j=0; jattrib; struct security_priv *psecuritypriv=&padapter->securitypriv; struct xmit_priv *pxmitpriv=&padapter->xmitpriv; // uint offset = 0; u32 res=_SUCCESS; _func_enter_; if(((struct xmit_frame*)pxmitframe)->buf_addr==NULL) return _FAIL; #ifdef CONFIG_USB_TX_AGGREGATION hw_hdr_offset = TXDESC_SIZE + (((struct xmit_frame*)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ); #else #ifdef CONFIG_TX_EARLY_MODE hw_hdr_offset = TXDESC_OFFSET+EARLY_MODE_INFO_SIZE; #else hw_hdr_offset = TXDESC_OFFSET; #endif #endif pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + hw_hdr_offset; //4 start to encrypt each fragment if((pattrib->encrypt==_AES_)){ /* if(pattrib->psta) { stainfo = pattrib->psta; } else { DBG_871X("%s, call rtw_get_stainfo()\n", __func__); stainfo=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0] ); } */ //if (stainfo!=NULL) { /* if(!(stainfo->state &_FW_LINKED)) { DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, stainfo->state); return _FAIL; } */ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_encrypt: stainfo!=NULL!!!\n")); if(IS_MCAST(pattrib->ra)) { prwskey=psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; } else { //prwskey=&stainfo->dot118021x_UncstKey.skey[0]; prwskey=pattrib->dot118021x_UncstKey.skey; } #ifdef CONFIG_TDLS //swencryption { struct sta_info *ptdls_sta; ptdls_sta=rtw_get_stainfo(&padapter->stapriv ,&pattrib->dst[0] ); if((ptdls_sta != NULL) && (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) ) { DBG_871X("[%s] for tdls link\n", __FUNCTION__); prwskey=&ptdls_sta->tpk.tk[0]; } } #endif //CONFIG_TDLS prwskeylen=16; for(curfragnum=0;curfragnumnr_frags;curfragnum++){ if((curfragnum+1)==pattrib->nr_frags){ //4 the last fragment length=pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len- pattrib->icv_len; aes_cipher(prwskey,pattrib->hdrlen,pframe, length); } else{ length=pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len ; aes_cipher(prwskey,pattrib->hdrlen,pframe, length); pframe+=pxmitpriv->frag_len; pframe=(u8*)RND4((SIZE_PTR)(pframe)); } } AES_SW_ENC_CNT_INC(psecuritypriv, pattrib->ra); } /* else{ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_encrypt: stainfo==NULL!!!\n")); DBG_871X("%s, psta==NUL\n", __func__); res=_FAIL; } */ } _func_exit_; return res; } static sint aes_decipher(u8 *key, uint hdrlen, u8 *pframe, uint plen) { static u8 message[MAX_MSG_SIZE]; uint qc_exists, a4_exists, i, j, payload_remainder, num_blocks, payload_index; sint res = _SUCCESS; u8 pn_vector[6]; u8 mic_iv[16]; u8 mic_header1[16]; u8 mic_header2[16]; u8 ctr_preload[16]; /* Intermediate Buffers */ u8 chain_buffer[16]; u8 aes_out[16]; u8 padded_buffer[16]; u8 mic[8]; // uint offset = 0; uint frtype = GetFrameType(pframe); uint frsubtype = GetFrameSubType(pframe); _func_enter_; frsubtype=frsubtype>>4; _rtw_memset((void *)mic_iv, 0, 16); _rtw_memset((void *)mic_header1, 0, 16); _rtw_memset((void *)mic_header2, 0, 16); _rtw_memset((void *)ctr_preload, 0, 16); _rtw_memset((void *)chain_buffer, 0, 16); _rtw_memset((void *)aes_out, 0, 16); _rtw_memset((void *)padded_buffer, 0, 16); //start to decrypt the payload num_blocks = (plen-8) / 16; //(plen including LLC, payload_length and mic ) payload_remainder = (plen-8) % 16; pn_vector[0] = pframe[hdrlen]; pn_vector[1] = pframe[hdrlen+1]; pn_vector[2] = pframe[hdrlen+4]; pn_vector[3] = pframe[hdrlen+5]; pn_vector[4] = pframe[hdrlen+6]; pn_vector[5] = pframe[hdrlen+7]; if ((hdrlen == WLAN_HDR_A3_LEN )||(hdrlen == WLAN_HDR_A3_QOS_LEN)) a4_exists = 0; else a4_exists = 1; if ( ((frtype|frsubtype) == WIFI_DATA_CFACK) || ((frtype|frsubtype) == WIFI_DATA_CFPOLL)|| ((frtype|frsubtype) == WIFI_DATA_CFACKPOLL)) { qc_exists = 1; if(hdrlen != WLAN_HDR_A3_QOS_LEN){ hdrlen += 2; } }//only for data packet . add for CONFIG_IEEE80211W, none 11w also can use else if ((frtype == WIFI_DATA) && ((frsubtype == 0x08) || (frsubtype == 0x09)|| (frsubtype == 0x0a)|| (frsubtype == 0x0b))) { if(hdrlen != WLAN_HDR_A3_QOS_LEN){ hdrlen += 2; } qc_exists = 1; } else qc_exists = 0; // now, decrypt pframe with hdrlen offset and plen long payload_index = hdrlen + 8; // 8 is for extiv for (i=0; i< num_blocks; i++) { construct_ctr_preload( ctr_preload, a4_exists, qc_exists, pframe, pn_vector, i+1, frtype // add for CONFIG_IEEE80211W, none 11w also can use ); aes128k128d(key, ctr_preload, aes_out); bitwise_xor(aes_out, &pframe[payload_index], chain_buffer); for (j=0; j<16;j++) pframe[payload_index++] = chain_buffer[j]; } if (payload_remainder > 0) /* If there is a short final block, then pad it,*/ { /* encrypt it and copy the unpadded part back */ construct_ctr_preload( ctr_preload, a4_exists, qc_exists, pframe, pn_vector, num_blocks+1, frtype // add for CONFIG_IEEE80211W, none 11w also can use ); for (j = 0; j < 16; j++) padded_buffer[j] = 0x00; for (j = 0; j < payload_remainder; j++) { padded_buffer[j] = pframe[payload_index+j]; } aes128k128d(key, ctr_preload, aes_out); bitwise_xor(aes_out, padded_buffer, chain_buffer); for (j=0; j 0) { for (j = 0; j < 16; j++) padded_buffer[j] = 0x00; for (j = 0; j < payload_remainder; j++) { padded_buffer[j] = message[payload_index++]; } bitwise_xor(aes_out, padded_buffer, chain_buffer); aes128k128d(key, chain_buffer, aes_out); } for (j = 0 ; j < 8; j++) mic[j] = aes_out[j]; /* Insert MIC into payload */ for (j = 0; j < 8; j++) message[payload_index+j] = mic[j]; payload_index = hdrlen + 8; for (i=0; i< num_blocks; i++) { construct_ctr_preload( ctr_preload, a4_exists, qc_exists, message, pn_vector, i+1, frtype); // add for CONFIG_IEEE80211W, none 11w also can use aes128k128d(key, ctr_preload, aes_out); bitwise_xor(aes_out, &message[payload_index], chain_buffer); for (j=0; j<16;j++) message[payload_index++] = chain_buffer[j]; } if (payload_remainder > 0) /* If there is a short final block, then pad it,*/ { /* encrypt it and copy the unpadded part back */ construct_ctr_preload( ctr_preload, a4_exists, qc_exists, message, pn_vector, num_blocks+1, frtype); // add for CONFIG_IEEE80211W, none 11w also can use for (j = 0; j < 16; j++) padded_buffer[j] = 0x00; for (j = 0; j < payload_remainder; j++) { padded_buffer[j] = message[payload_index+j]; } aes128k128d(key, ctr_preload, aes_out); bitwise_xor(aes_out, padded_buffer, chain_buffer); for (j=0; ju.hdr.attrib; struct security_priv *psecuritypriv=&padapter->securitypriv; // struct recv_priv *precvpriv=&padapter->recvpriv; u32 res=_SUCCESS; _func_enter_; pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; //4 start to encrypt each fragment if((prxattrib->encrypt==_AES_)){ stainfo=rtw_get_stainfo(&padapter->stapriv ,&prxattrib->ta[0] ); if (stainfo!=NULL){ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_decrypt: stainfo!=NULL!!!\n")); if(IS_MCAST(prxattrib->ra)) { static u32 start = 0; static u32 no_gkey_bc_cnt = 0; static u32 no_gkey_mc_cnt = 0; //DBG_871X("rx bc/mc packets, to perform sw rtw_aes_decrypt\n"); //prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; if(psecuritypriv->binstallGrpkey==_FALSE) { res=_FAIL; if (start == 0) start = rtw_get_current_time(); if (is_broadcast_mac_addr(prxattrib->ra)) no_gkey_bc_cnt++; else no_gkey_mc_cnt++; if (rtw_get_passing_time_ms(start) > 1000) { if (no_gkey_bc_cnt || no_gkey_mc_cnt) { DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" no_gkey_bc_cnt:%u, no_gkey_mc_cnt:%u\n", FUNC_ADPT_ARG(padapter), no_gkey_bc_cnt, no_gkey_mc_cnt); } start = rtw_get_current_time(); no_gkey_bc_cnt = 0; no_gkey_mc_cnt = 0; } goto exit; } if (no_gkey_bc_cnt || no_gkey_mc_cnt) { DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" gkey installed. no_gkey_bc_cnt:%u, no_gkey_mc_cnt:%u\n", FUNC_ADPT_ARG(padapter), no_gkey_bc_cnt, no_gkey_mc_cnt); } start = 0; no_gkey_bc_cnt = 0; no_gkey_mc_cnt = 0; prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey; if(psecuritypriv->dot118021XGrpKeyid != prxattrib->key_index) { DBG_871X("not match packet_index=%d, install_index=%d \n" , prxattrib->key_index, psecuritypriv->dot118021XGrpKeyid); res=_FAIL; goto exit; } } else { prwskey=&stainfo->dot118021x_UncstKey.skey[0]; } length= ((union recv_frame *)precvframe)->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len; /*// add for CONFIG_IEEE80211W, debug if(0) printk("@@@@@@@@@@@@@@@@@@ length=%d, prxattrib->hdrlen=%d, prxattrib->pkt_len=%d \n" , length, prxattrib->hdrlen, prxattrib->pkt_len); if(0) { int no; //test print PSK printk("PSK key below:\n"); for(no=0;no<16;no++) printk(" %02x ", prwskey[no]); printk("\n"); } if(0) { int no; //test print PSK printk("frame:\n"); for(no=0;nopkt_len;no++) printk(" %02x ", pframe[no]); printk("\n"); }*/ res= aes_decipher(prwskey,prxattrib->hdrlen,pframe, length); AES_SW_DEC_CNT_INC(psecuritypriv, prxattrib->ra); } else{ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_decrypt: stainfo==NULL!!!\n")); res=_FAIL; } } _func_exit_; exit: return res; } #ifdef CONFIG_IEEE80211W u32 rtw_BIP_verify(_adapter *padapter, u8 *precvframe) { struct rx_pkt_attrib *pattrib = &((union recv_frame *)precvframe)->u.hdr.attrib; u8 *pframe; u8 *BIP_AAD, *p; u32 res=_FAIL; uint len, ori_len; struct rtw_ieee80211_hdr *pwlanhdr; u8 mic[16]; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ori_len = pattrib->pkt_len-WLAN_HDR_A3_LEN+BIP_AAD_SIZE; BIP_AAD = rtw_zmalloc(ori_len); if(BIP_AAD == NULL) { DBG_871X("BIP AAD allocate fail\n"); return _FAIL; } //PKT start pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; //mapping to wlan header pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; //save the frame body + MME _rtw_memcpy(BIP_AAD+BIP_AAD_SIZE, pframe+WLAN_HDR_A3_LEN, pattrib->pkt_len-WLAN_HDR_A3_LEN); //find MME IE pointer p = rtw_get_ie(BIP_AAD+BIP_AAD_SIZE, _MME_IE_, &len, pattrib->pkt_len-WLAN_HDR_A3_LEN); //Baron if(p) { u16 keyid=0; u64 temp_ipn=0; //save packet number _rtw_memcpy(&temp_ipn, p+4, 6); temp_ipn = le64_to_cpu(temp_ipn); //BIP packet number should bigger than previous BIP packet if(temp_ipn <= pmlmeext->mgnt_80211w_IPN_rx) { DBG_871X("replay BIP packet\n"); goto BIP_exit; } //copy key index _rtw_memcpy(&keyid, p+2, 2); keyid = le16_to_cpu(keyid); if(keyid != padapter->securitypriv.dot11wBIPKeyid) { DBG_871X("BIP key index error!\n"); goto BIP_exit; } //clear the MIC field of MME to zero _rtw_memset(p+2+len-8, 0, 8); //conscruct AAD, copy frame control field _rtw_memcpy(BIP_AAD, &pwlanhdr->frame_ctl, 2); ClearRetry(BIP_AAD); ClearPwrMgt(BIP_AAD); ClearMData(BIP_AAD); //conscruct AAD, copy address 1 to address 3 _rtw_memcpy(BIP_AAD+2, pwlanhdr->addr1, 18); if(omac1_aes_128(padapter->securitypriv.dot11wBIPKey[padapter->securitypriv.dot11wBIPKeyid].skey , BIP_AAD, ori_len, mic)) goto BIP_exit; /*//management packet content { int pp; DBG_871X("pkt: "); for(pp=0;pp< pattrib->pkt_len; pp++) printk(" %02x ", pframe[pp]); DBG_871X("\n"); //BIP AAD + management frame body + MME(MIC is zero) DBG_871X("AAD+PKT: "); for(pp=0;pp< ori_len; pp++) DBG_871X(" %02x ", BIP_AAD[pp]); DBG_871X("\n"); //show the MIC result DBG_871X("mic: "); for(pp=0;pp<16; pp++) DBG_871X(" %02x ", mic[pp]); DBG_871X("\n"); } */ //MIC field should be last 8 bytes of packet (packet without FCS) if(_rtw_memcmp(mic, pframe+pattrib->pkt_len-8, 8)) { pmlmeext->mgnt_80211w_IPN_rx = temp_ipn; res=_SUCCESS; } else DBG_871X("BIP MIC error!\n"); } else res = RTW_RX_HANDLED; BIP_exit: rtw_mfree(BIP_AAD, ori_len); return res; } #endif //CONFIG_IEEE80211W #ifndef PLATFORM_FREEBSD /* compress 512-bits */ static int sha256_compress(struct sha256_state *md, unsigned char *buf) { u32 S[8], W[64], t0, t1; u32 t; int i; /* copy state into S */ for (i = 0; i < 8; i++) { S[i] = md->state[i]; } /* copy the state into 512-bits into W[0..15] */ for (i = 0; i < 16; i++) W[i] = WPA_GET_BE32(buf + (4 * i)); /* fill W[16..63] */ for (i = 16; i < 64; i++) { W[i] = Gamma1(W[i - 2]) + W[i - 7] + Gamma0(W[i - 15]) + W[i - 16]; } /* Compress */ #define RND(a,b,c,d,e,f,g,h,i) \ t0 = h + Sigma1(e) + Ch(e, f, g) + K[i] + W[i]; \ t1 = Sigma0(a) + Maj(a, b, c); \ d += t0; \ h = t0 + t1; for (i = 0; i < 64; ++i) { RND(S[0], S[1], S[2], S[3], S[4], S[5], S[6], S[7], i); t = S[7]; S[7] = S[6]; S[6] = S[5]; S[5] = S[4]; S[4] = S[3]; S[3] = S[2]; S[2] = S[1]; S[1] = S[0]; S[0] = t; } /* feedback */ for (i = 0; i < 8; i++) { md->state[i] = md->state[i] + S[i]; } return 0; } /* Initialize the hash state */ static void sha256_init(struct sha256_state *md) { md->curlen = 0; md->length = 0; md->state[0] = 0x6A09E667UL; md->state[1] = 0xBB67AE85UL; md->state[2] = 0x3C6EF372UL; md->state[3] = 0xA54FF53AUL; md->state[4] = 0x510E527FUL; md->state[5] = 0x9B05688CUL; md->state[6] = 0x1F83D9ABUL; md->state[7] = 0x5BE0CD19UL; } /** Process a block of memory though the hash @param md The hash state @param in The data to hash @param inlen The length of the data (octets) @return CRYPT_OK if successful */ static int sha256_process(struct sha256_state *md, unsigned char *in, unsigned long inlen) { unsigned long n; #define block_size 64 if (md->curlen > sizeof(md->buf)) return -1; while (inlen > 0) { if (md->curlen == 0 && inlen >= block_size) { if (sha256_compress(md, (unsigned char *) in) < 0) return -1; md->length += block_size * 8; in += block_size; inlen -= block_size; } else { n = MIN(inlen, (block_size - md->curlen)); _rtw_memcpy(md->buf + md->curlen, in, n); md->curlen += n; in += n; inlen -= n; if (md->curlen == block_size) { if (sha256_compress(md, md->buf) < 0) return -1; md->length += 8 * block_size; md->curlen = 0; } } } return 0; } /** Terminate the hash to get the digest @param md The hash state @param out [out] The destination of the hash (32 bytes) @return CRYPT_OK if successful */ static int sha256_done(struct sha256_state *md, unsigned char *out) { int i; if (md->curlen >= sizeof(md->buf)) return -1; /* increase the length of the message */ md->length += md->curlen * 8; /* append the '1' bit */ md->buf[md->curlen++] = (unsigned char) 0x80; /* if the length is currently above 56 bytes we append zeros * then compress. Then we can fall back to padding zeros and length * encoding like normal. */ if (md->curlen > 56) { while (md->curlen < 64) { md->buf[md->curlen++] = (unsigned char) 0; } sha256_compress(md, md->buf); md->curlen = 0; } /* pad upto 56 bytes of zeroes */ while (md->curlen < 56) { md->buf[md->curlen++] = (unsigned char) 0; } /* store length */ WPA_PUT_BE64(md->buf + 56, md->length); sha256_compress(md, md->buf); /* copy output */ for (i = 0; i < 8; i++) WPA_PUT_BE32(out + (4 * i), md->state[i]); return 0; } /** * sha256_vector - SHA256 hash for data vector * @num_elem: Number of elements in the data vector * @addr: Pointers to the data areas * @len: Lengths of the data blocks * @mac: Buffer for the hash * Returns: 0 on success, -1 of failure */ static int sha256_vector(size_t num_elem, u8 *addr[], size_t *len, u8 *mac) { struct sha256_state ctx; size_t i; sha256_init(&ctx); for (i = 0; i < num_elem; i++) if (sha256_process(&ctx, addr[i], len[i])) return -1; if (sha256_done(&ctx, mac)) return -1; return 0; } static u8 os_strlen(const char *s) { const char *p = s; while (*p) p++; return p - s; } static int os_memcmp(void *s1, void *s2, u8 n) { unsigned char *p1 = s1, *p2 = s2; if (n == 0) return 0; while (*p1 == *p2) { p1++; p2++; n--; if (n == 0) return 0; } return *p1 - *p2; } /** * hmac_sha256_vector - HMAC-SHA256 over data vector (RFC 2104) * @key: Key for HMAC operations * @key_len: Length of the key in bytes * @num_elem: Number of elements in the data vector * @addr: Pointers to the data areas * @len: Lengths of the data blocks * @mac: Buffer for the hash (32 bytes) */ static void hmac_sha256_vector(u8 *key, size_t key_len, size_t num_elem, u8 *addr[], size_t *len, u8 *mac) { unsigned char k_pad[64]; /* padding - key XORd with ipad/opad */ unsigned char tk[32]; u8 *_addr[6]; size_t _len[6], i; if (num_elem > 5) { /* * Fixed limit on the number of fragments to avoid having to * allocate memory (which could fail). */ return; } /* if key is longer than 64 bytes reset it to key = SHA256(key) */ if (key_len > 64) { sha256_vector(1, &key, &key_len, tk); key = tk; key_len = 32; } /* the HMAC_SHA256 transform looks like: * * SHA256(K XOR opad, SHA256(K XOR ipad, text)) * * where K is an n byte key * ipad is the byte 0x36 repeated 64 times * opad is the byte 0x5c repeated 64 times * and text is the data being protected */ /* start out by storing key in ipad */ _rtw_memset(k_pad, 0, sizeof(k_pad)); _rtw_memcpy(k_pad, key, key_len); /* XOR key with ipad values */ for (i = 0; i < 64; i++) k_pad[i] ^= 0x36; /* perform inner SHA256 */ _addr[0] = k_pad; _len[0] = 64; for (i = 0; i < num_elem; i++) { _addr[i + 1] = addr[i]; _len[i + 1] = len[i]; } sha256_vector(1 + num_elem, _addr, _len, mac); _rtw_memset(k_pad, 0, sizeof(k_pad)); _rtw_memcpy(k_pad, key, key_len); /* XOR key with opad values */ for (i = 0; i < 64; i++) k_pad[i] ^= 0x5c; /* perform outer SHA256 */ _addr[0] = k_pad; _len[0] = 64; _addr[1] = mac; _len[1] = 32; sha256_vector(2, _addr, _len, mac); } #endif //PLATFORM_FREEBSD /** * sha256_prf - SHA256-based Pseudo-Random Function (IEEE 802.11r, 8.5.1.5.2) * @key: Key for PRF * @key_len: Length of the key in bytes * @label: A unique label for each purpose of the PRF * @data: Extra data to bind into the key * @data_len: Length of the data * @buf: Buffer for the generated pseudo-random key * @buf_len: Number of bytes of key to generate * * This function is used to derive new, cryptographically separate keys from a * given key. */ #ifndef PLATFORM_FREEBSD //Baron static void sha256_prf(u8 *key, size_t key_len, char *label, u8 *data, size_t data_len, u8 *buf, size_t buf_len) { u16 counter = 1; size_t pos, plen; u8 hash[SHA256_MAC_LEN]; u8 *addr[4]; size_t len[4]; u8 counter_le[2], length_le[2]; addr[0] = counter_le; len[0] = 2; addr[1] = (u8 *) label; len[1] = os_strlen(label); addr[2] = data; len[2] = data_len; addr[3] = length_le; len[3] = sizeof(length_le); WPA_PUT_LE16(length_le, buf_len * 8); pos = 0; while (pos < buf_len) { plen = buf_len - pos; WPA_PUT_LE16(counter_le, counter); if (plen >= SHA256_MAC_LEN) { hmac_sha256_vector(key, key_len, 4, addr, len, &buf[pos]); pos += SHA256_MAC_LEN; } else { hmac_sha256_vector(key, key_len, 4, addr, len, hash); _rtw_memcpy(&buf[pos], hash, plen); break; } counter++; } } #endif //PLATFORM_FREEBSD Baron /* AES tables*/ const u32 Te0[256] = { 0xc66363a5U, 0xf87c7c84U, 0xee777799U, 0xf67b7b8dU, 0xfff2f20dU, 0xd66b6bbdU, 0xde6f6fb1U, 0x91c5c554U, 0x60303050U, 0x02010103U, 0xce6767a9U, 0x562b2b7dU, 0xe7fefe19U, 0xb5d7d762U, 0x4dababe6U, 0xec76769aU, 0x8fcaca45U, 0x1f82829dU, 0x89c9c940U, 0xfa7d7d87U, 0xeffafa15U, 0xb25959ebU, 0x8e4747c9U, 0xfbf0f00bU, 0x41adadecU, 0xb3d4d467U, 0x5fa2a2fdU, 0x45afafeaU, 0x239c9cbfU, 0x53a4a4f7U, 0xe4727296U, 0x9bc0c05bU, 0x75b7b7c2U, 0xe1fdfd1cU, 0x3d9393aeU, 0x4c26266aU, 0x6c36365aU, 0x7e3f3f41U, 0xf5f7f702U, 0x83cccc4fU, 0x6834345cU, 0x51a5a5f4U, 0xd1e5e534U, 0xf9f1f108U, 0xe2717193U, 0xabd8d873U, 0x62313153U, 0x2a15153fU, 0x0804040cU, 0x95c7c752U, 0x46232365U, 0x9dc3c35eU, 0x30181828U, 0x379696a1U, 0x0a05050fU, 0x2f9a9ab5U, 0x0e070709U, 0x24121236U, 0x1b80809bU, 0xdfe2e23dU, 0xcdebeb26U, 0x4e272769U, 0x7fb2b2cdU, 0xea75759fU, 0x1209091bU, 0x1d83839eU, 0x582c2c74U, 0x341a1a2eU, 0x361b1b2dU, 0xdc6e6eb2U, 0xb45a5aeeU, 0x5ba0a0fbU, 0xa45252f6U, 0x763b3b4dU, 0xb7d6d661U, 0x7db3b3ceU, 0x5229297bU, 0xdde3e33eU, 0x5e2f2f71U, 0x13848497U, 0xa65353f5U, 0xb9d1d168U, 0x00000000U, 0xc1eded2cU, 0x40202060U, 0xe3fcfc1fU, 0x79b1b1c8U, 0xb65b5bedU, 0xd46a6abeU, 0x8dcbcb46U, 0x67bebed9U, 0x7239394bU, 0x944a4adeU, 0x984c4cd4U, 0xb05858e8U, 0x85cfcf4aU, 0xbbd0d06bU, 0xc5efef2aU, 0x4faaaae5U, 0xedfbfb16U, 0x864343c5U, 0x9a4d4dd7U, 0x66333355U, 0x11858594U, 0x8a4545cfU, 0xe9f9f910U, 0x04020206U, 0xfe7f7f81U, 0xa05050f0U, 0x783c3c44U, 0x259f9fbaU, 0x4ba8a8e3U, 0xa25151f3U, 0x5da3a3feU, 0x804040c0U, 0x058f8f8aU, 0x3f9292adU, 0x219d9dbcU, 0x70383848U, 0xf1f5f504U, 0x63bcbcdfU, 0x77b6b6c1U, 0xafdada75U, 0x42212163U, 0x20101030U, 0xe5ffff1aU, 0xfdf3f30eU, 0xbfd2d26dU, 0x81cdcd4cU, 0x180c0c14U, 0x26131335U, 0xc3ecec2fU, 0xbe5f5fe1U, 0x359797a2U, 0x884444ccU, 0x2e171739U, 0x93c4c457U, 0x55a7a7f2U, 0xfc7e7e82U, 0x7a3d3d47U, 0xc86464acU, 0xba5d5de7U, 0x3219192bU, 0xe6737395U, 0xc06060a0U, 0x19818198U, 0x9e4f4fd1U, 0xa3dcdc7fU, 0x44222266U, 0x542a2a7eU, 0x3b9090abU, 0x0b888883U, 0x8c4646caU, 0xc7eeee29U, 0x6bb8b8d3U, 0x2814143cU, 0xa7dede79U, 0xbc5e5ee2U, 0x160b0b1dU, 0xaddbdb76U, 0xdbe0e03bU, 0x64323256U, 0x743a3a4eU, 0x140a0a1eU, 0x924949dbU, 0x0c06060aU, 0x4824246cU, 0xb85c5ce4U, 0x9fc2c25dU, 0xbdd3d36eU, 0x43acacefU, 0xc46262a6U, 0x399191a8U, 0x319595a4U, 0xd3e4e437U, 0xf279798bU, 0xd5e7e732U, 0x8bc8c843U, 0x6e373759U, 0xda6d6db7U, 0x018d8d8cU, 0xb1d5d564U, 0x9c4e4ed2U, 0x49a9a9e0U, 0xd86c6cb4U, 0xac5656faU, 0xf3f4f407U, 0xcfeaea25U, 0xca6565afU, 0xf47a7a8eU, 0x47aeaee9U, 0x10080818U, 0x6fbabad5U, 0xf0787888U, 0x4a25256fU, 0x5c2e2e72U, 0x381c1c24U, 0x57a6a6f1U, 0x73b4b4c7U, 0x97c6c651U, 0xcbe8e823U, 0xa1dddd7cU, 0xe874749cU, 0x3e1f1f21U, 0x964b4bddU, 0x61bdbddcU, 0x0d8b8b86U, 0x0f8a8a85U, 0xe0707090U, 0x7c3e3e42U, 0x71b5b5c4U, 0xcc6666aaU, 0x904848d8U, 0x06030305U, 0xf7f6f601U, 0x1c0e0e12U, 0xc26161a3U, 0x6a35355fU, 0xae5757f9U, 0x69b9b9d0U, 0x17868691U, 0x99c1c158U, 0x3a1d1d27U, 0x279e9eb9U, 0xd9e1e138U, 0xebf8f813U, 0x2b9898b3U, 0x22111133U, 0xd26969bbU, 0xa9d9d970U, 0x078e8e89U, 0x339494a7U, 0x2d9b9bb6U, 0x3c1e1e22U, 0x15878792U, 0xc9e9e920U, 0x87cece49U, 0xaa5555ffU, 0x50282878U, 0xa5dfdf7aU, 0x038c8c8fU, 0x59a1a1f8U, 0x09898980U, 0x1a0d0d17U, 0x65bfbfdaU, 0xd7e6e631U, 0x844242c6U, 0xd06868b8U, 0x824141c3U, 0x299999b0U, 0x5a2d2d77U, 0x1e0f0f11U, 0x7bb0b0cbU, 0xa85454fcU, 0x6dbbbbd6U, 0x2c16163aU, }; const u32 Td0[256] = { 0x51f4a750U, 0x7e416553U, 0x1a17a4c3U, 0x3a275e96U, 0x3bab6bcbU, 0x1f9d45f1U, 0xacfa58abU, 0x4be30393U, 0x2030fa55U, 0xad766df6U, 0x88cc7691U, 0xf5024c25U, 0x4fe5d7fcU, 0xc52acbd7U, 0x26354480U, 0xb562a38fU, 0xdeb15a49U, 0x25ba1b67U, 0x45ea0e98U, 0x5dfec0e1U, 0xc32f7502U, 0x814cf012U, 0x8d4697a3U, 0x6bd3f9c6U, 0x038f5fe7U, 0x15929c95U, 0xbf6d7aebU, 0x955259daU, 0xd4be832dU, 0x587421d3U, 0x49e06929U, 0x8ec9c844U, 0x75c2896aU, 0xf48e7978U, 0x99583e6bU, 0x27b971ddU, 0xbee14fb6U, 0xf088ad17U, 0xc920ac66U, 0x7dce3ab4U, 0x63df4a18U, 0xe51a3182U, 0x97513360U, 0x62537f45U, 0xb16477e0U, 0xbb6bae84U, 0xfe81a01cU, 0xf9082b94U, 0x70486858U, 0x8f45fd19U, 0x94de6c87U, 0x527bf8b7U, 0xab73d323U, 0x724b02e2U, 0xe31f8f57U, 0x6655ab2aU, 0xb2eb2807U, 0x2fb5c203U, 0x86c57b9aU, 0xd33708a5U, 0x302887f2U, 0x23bfa5b2U, 0x02036abaU, 0xed16825cU, 0x8acf1c2bU, 0xa779b492U, 0xf307f2f0U, 0x4e69e2a1U, 0x65daf4cdU, 0x0605bed5U, 0xd134621fU, 0xc4a6fe8aU, 0x342e539dU, 0xa2f355a0U, 0x058ae132U, 0xa4f6eb75U, 0x0b83ec39U, 0x4060efaaU, 0x5e719f06U, 0xbd6e1051U, 0x3e218af9U, 0x96dd063dU, 0xdd3e05aeU, 0x4de6bd46U, 0x91548db5U, 0x71c45d05U, 0x0406d46fU, 0x605015ffU, 0x1998fb24U, 0xd6bde997U, 0x894043ccU, 0x67d99e77U, 0xb0e842bdU, 0x07898b88U, 0xe7195b38U, 0x79c8eedbU, 0xa17c0a47U, 0x7c420fe9U, 0xf8841ec9U, 0x00000000U, 0x09808683U, 0x322bed48U, 0x1e1170acU, 0x6c5a724eU, 0xfd0efffbU, 0x0f853856U, 0x3daed51eU, 0x362d3927U, 0x0a0fd964U, 0x685ca621U, 0x9b5b54d1U, 0x24362e3aU, 0x0c0a67b1U, 0x9357e70fU, 0xb4ee96d2U, 0x1b9b919eU, 0x80c0c54fU, 0x61dc20a2U, 0x5a774b69U, 0x1c121a16U, 0xe293ba0aU, 0xc0a02ae5U, 0x3c22e043U, 0x121b171dU, 0x0e090d0bU, 0xf28bc7adU, 0x2db6a8b9U, 0x141ea9c8U, 0x57f11985U, 0xaf75074cU, 0xee99ddbbU, 0xa37f60fdU, 0xf701269fU, 0x5c72f5bcU, 0x44663bc5U, 0x5bfb7e34U, 0x8b432976U, 0xcb23c6dcU, 0xb6edfc68U, 0xb8e4f163U, 0xd731dccaU, 0x42638510U, 0x13972240U, 0x84c61120U, 0x854a247dU, 0xd2bb3df8U, 0xaef93211U, 0xc729a16dU, 0x1d9e2f4bU, 0xdcb230f3U, 0x0d8652ecU, 0x77c1e3d0U, 0x2bb3166cU, 0xa970b999U, 0x119448faU, 0x47e96422U, 0xa8fc8cc4U, 0xa0f03f1aU, 0x567d2cd8U, 0x223390efU, 0x87494ec7U, 0xd938d1c1U, 0x8ccaa2feU, 0x98d40b36U, 0xa6f581cfU, 0xa57ade28U, 0xdab78e26U, 0x3fadbfa4U, 0x2c3a9de4U, 0x5078920dU, 0x6a5fcc9bU, 0x547e4662U, 0xf68d13c2U, 0x90d8b8e8U, 0x2e39f75eU, 0x82c3aff5U, 0x9f5d80beU, 0x69d0937cU, 0x6fd52da9U, 0xcf2512b3U, 0xc8ac993bU, 0x10187da7U, 0xe89c636eU, 0xdb3bbb7bU, 0xcd267809U, 0x6e5918f4U, 0xec9ab701U, 0x834f9aa8U, 0xe6956e65U, 0xaaffe67eU, 0x21bccf08U, 0xef15e8e6U, 0xbae79bd9U, 0x4a6f36ceU, 0xea9f09d4U, 0x29b07cd6U, 0x31a4b2afU, 0x2a3f2331U, 0xc6a59430U, 0x35a266c0U, 0x744ebc37U, 0xfc82caa6U, 0xe090d0b0U, 0x33a7d815U, 0xf104984aU, 0x41ecdaf7U, 0x7fcd500eU, 0x1791f62fU, 0x764dd68dU, 0x43efb04dU, 0xccaa4d54U, 0xe49604dfU, 0x9ed1b5e3U, 0x4c6a881bU, 0xc12c1fb8U, 0x4665517fU, 0x9d5eea04U, 0x018c355dU, 0xfa877473U, 0xfb0b412eU, 0xb3671d5aU, 0x92dbd252U, 0xe9105633U, 0x6dd64713U, 0x9ad7618cU, 0x37a10c7aU, 0x59f8148eU, 0xeb133c89U, 0xcea927eeU, 0xb761c935U, 0xe11ce5edU, 0x7a47b13cU, 0x9cd2df59U, 0x55f2733fU, 0x1814ce79U, 0x73c737bfU, 0x53f7cdeaU, 0x5ffdaa5bU, 0xdf3d6f14U, 0x7844db86U, 0xcaaff381U, 0xb968c43eU, 0x3824342cU, 0xc2a3405fU, 0x161dc372U, 0xbce2250cU, 0x283c498bU, 0xff0d9541U, 0x39a80171U, 0x080cb3deU, 0xd8b4e49cU, 0x6456c190U, 0x7bcb8461U, 0xd532b670U, 0x486c5c74U, 0xd0b85742U, }; const u8 Td4s[256] = { 0x52U, 0x09U, 0x6aU, 0xd5U, 0x30U, 0x36U, 0xa5U, 0x38U, 0xbfU, 0x40U, 0xa3U, 0x9eU, 0x81U, 0xf3U, 0xd7U, 0xfbU, 0x7cU, 0xe3U, 0x39U, 0x82U, 0x9bU, 0x2fU, 0xffU, 0x87U, 0x34U, 0x8eU, 0x43U, 0x44U, 0xc4U, 0xdeU, 0xe9U, 0xcbU, 0x54U, 0x7bU, 0x94U, 0x32U, 0xa6U, 0xc2U, 0x23U, 0x3dU, 0xeeU, 0x4cU, 0x95U, 0x0bU, 0x42U, 0xfaU, 0xc3U, 0x4eU, 0x08U, 0x2eU, 0xa1U, 0x66U, 0x28U, 0xd9U, 0x24U, 0xb2U, 0x76U, 0x5bU, 0xa2U, 0x49U, 0x6dU, 0x8bU, 0xd1U, 0x25U, 0x72U, 0xf8U, 0xf6U, 0x64U, 0x86U, 0x68U, 0x98U, 0x16U, 0xd4U, 0xa4U, 0x5cU, 0xccU, 0x5dU, 0x65U, 0xb6U, 0x92U, 0x6cU, 0x70U, 0x48U, 0x50U, 0xfdU, 0xedU, 0xb9U, 0xdaU, 0x5eU, 0x15U, 0x46U, 0x57U, 0xa7U, 0x8dU, 0x9dU, 0x84U, 0x90U, 0xd8U, 0xabU, 0x00U, 0x8cU, 0xbcU, 0xd3U, 0x0aU, 0xf7U, 0xe4U, 0x58U, 0x05U, 0xb8U, 0xb3U, 0x45U, 0x06U, 0xd0U, 0x2cU, 0x1eU, 0x8fU, 0xcaU, 0x3fU, 0x0fU, 0x02U, 0xc1U, 0xafU, 0xbdU, 0x03U, 0x01U, 0x13U, 0x8aU, 0x6bU, 0x3aU, 0x91U, 0x11U, 0x41U, 0x4fU, 0x67U, 0xdcU, 0xeaU, 0x97U, 0xf2U, 0xcfU, 0xceU, 0xf0U, 0xb4U, 0xe6U, 0x73U, 0x96U, 0xacU, 0x74U, 0x22U, 0xe7U, 0xadU, 0x35U, 0x85U, 0xe2U, 0xf9U, 0x37U, 0xe8U, 0x1cU, 0x75U, 0xdfU, 0x6eU, 0x47U, 0xf1U, 0x1aU, 0x71U, 0x1dU, 0x29U, 0xc5U, 0x89U, 0x6fU, 0xb7U, 0x62U, 0x0eU, 0xaaU, 0x18U, 0xbeU, 0x1bU, 0xfcU, 0x56U, 0x3eU, 0x4bU, 0xc6U, 0xd2U, 0x79U, 0x20U, 0x9aU, 0xdbU, 0xc0U, 0xfeU, 0x78U, 0xcdU, 0x5aU, 0xf4U, 0x1fU, 0xddU, 0xa8U, 0x33U, 0x88U, 0x07U, 0xc7U, 0x31U, 0xb1U, 0x12U, 0x10U, 0x59U, 0x27U, 0x80U, 0xecU, 0x5fU, 0x60U, 0x51U, 0x7fU, 0xa9U, 0x19U, 0xb5U, 0x4aU, 0x0dU, 0x2dU, 0xe5U, 0x7aU, 0x9fU, 0x93U, 0xc9U, 0x9cU, 0xefU, 0xa0U, 0xe0U, 0x3bU, 0x4dU, 0xaeU, 0x2aU, 0xf5U, 0xb0U, 0xc8U, 0xebU, 0xbbU, 0x3cU, 0x83U, 0x53U, 0x99U, 0x61U, 0x17U, 0x2bU, 0x04U, 0x7eU, 0xbaU, 0x77U, 0xd6U, 0x26U, 0xe1U, 0x69U, 0x14U, 0x63U, 0x55U, 0x21U, 0x0cU, 0x7dU, }; const u8 rcons[] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1B, 0x36 /* for 128-bit blocks, Rijndael never uses more than 10 rcon values */ }; /** * Expand the cipher key into the encryption key schedule. * * @return the number of rounds for the given cipher key size. */ #ifndef PLATFORM_FREEBSD //Baron static void rijndaelKeySetupEnc(u32 rk[/*44*/], const u8 cipherKey[]) { int i; u32 temp; rk[0] = GETU32(cipherKey ); rk[1] = GETU32(cipherKey + 4); rk[2] = GETU32(cipherKey + 8); rk[3] = GETU32(cipherKey + 12); for (i = 0; i < 10; i++) { temp = rk[3]; rk[4] = rk[0] ^ TE421(temp) ^ TE432(temp) ^ TE443(temp) ^ TE414(temp) ^ RCON(i); rk[5] = rk[1] ^ rk[4]; rk[6] = rk[2] ^ rk[5]; rk[7] = rk[3] ^ rk[6]; rk += 4; } } static void rijndaelEncrypt(u32 rk[/*44*/], u8 pt[16], u8 ct[16]) { u32 s0, s1, s2, s3, t0, t1, t2, t3; int Nr = 10; #ifndef FULL_UNROLL int r; #endif /* ?FULL_UNROLL */ /* * map byte array block to cipher state * and add initial round key: */ s0 = GETU32(pt ) ^ rk[0]; s1 = GETU32(pt + 4) ^ rk[1]; s2 = GETU32(pt + 8) ^ rk[2]; s3 = GETU32(pt + 12) ^ rk[3]; #define ROUND(i,d,s) \ d##0 = TE0(s##0) ^ TE1(s##1) ^ TE2(s##2) ^ TE3(s##3) ^ rk[4 * i]; \ d##1 = TE0(s##1) ^ TE1(s##2) ^ TE2(s##3) ^ TE3(s##0) ^ rk[4 * i + 1]; \ d##2 = TE0(s##2) ^ TE1(s##3) ^ TE2(s##0) ^ TE3(s##1) ^ rk[4 * i + 2]; \ d##3 = TE0(s##3) ^ TE1(s##0) ^ TE2(s##1) ^ TE3(s##2) ^ rk[4 * i + 3] #ifdef FULL_UNROLL ROUND(1,t,s); ROUND(2,s,t); ROUND(3,t,s); ROUND(4,s,t); ROUND(5,t,s); ROUND(6,s,t); ROUND(7,t,s); ROUND(8,s,t); ROUND(9,t,s); rk += Nr << 2; #else /* !FULL_UNROLL */ /* Nr - 1 full rounds: */ r = Nr >> 1; for (;;) { ROUND(1,t,s); rk += 8; if (--r == 0) break; ROUND(0,s,t); } #endif /* ?FULL_UNROLL */ #undef ROUND /* * apply last round and * map cipher state to byte array block: */ s0 = TE41(t0) ^ TE42(t1) ^ TE43(t2) ^ TE44(t3) ^ rk[0]; PUTU32(ct , s0); s1 = TE41(t1) ^ TE42(t2) ^ TE43(t3) ^ TE44(t0) ^ rk[1]; PUTU32(ct + 4, s1); s2 = TE41(t2) ^ TE42(t3) ^ TE43(t0) ^ TE44(t1) ^ rk[2]; PUTU32(ct + 8, s2); s3 = TE41(t3) ^ TE42(t0) ^ TE43(t1) ^ TE44(t2) ^ rk[3]; PUTU32(ct + 12, s3); } static void * aes_encrypt_init(u8 *key, size_t len) { u32 *rk; if (len != 16) return NULL; rk = (u32*)rtw_malloc(AES_PRIV_SIZE); if (rk == NULL) return NULL; rijndaelKeySetupEnc(rk, key); return rk; } static void aes_128_encrypt(void *ctx, u8 *plain, u8 *crypt) { rijndaelEncrypt(ctx, plain, crypt); } static void gf_mulx(u8 *pad) { int i, carry; carry = pad[0] & 0x80; for (i = 0; i < AES_BLOCK_SIZE - 1; i++) pad[i] = (pad[i] << 1) | (pad[i + 1] >> 7); pad[AES_BLOCK_SIZE - 1] <<= 1; if (carry) pad[AES_BLOCK_SIZE - 1] ^= 0x87; } static void aes_encrypt_deinit(void *ctx) { _rtw_memset(ctx, 0, AES_PRIV_SIZE); rtw_mfree(ctx, AES_PRIV_SIZE); } /** * omac1_aes_128_vector - One-Key CBC MAC (OMAC1) hash with AES-128 * @key: 128-bit key for the hash operation * @num_elem: Number of elements in the data vector * @addr: Pointers to the data areas * @len: Lengths of the data blocks * @mac: Buffer for MAC (128 bits, i.e., 16 bytes) * Returns: 0 on success, -1 on failure * * This is a mode for using block cipher (AES in this case) for authentication. * OMAC1 was standardized with the name CMAC by NIST in a Special Publication * (SP) 800-38B. */ static int omac1_aes_128_vector(u8 *key, size_t num_elem, u8 *addr[], size_t *len, u8 *mac) { void *ctx; u8 cbc[AES_BLOCK_SIZE], pad[AES_BLOCK_SIZE]; u8 *pos, *end; size_t i, e, left, total_len; ctx = aes_encrypt_init(key, 16); if (ctx == NULL) return -1; _rtw_memset(cbc, 0, AES_BLOCK_SIZE); total_len = 0; for (e = 0; e < num_elem; e++) total_len += len[e]; left = total_len; e = 0; pos = addr[0]; end = pos + len[0]; while (left >= AES_BLOCK_SIZE) { for (i = 0; i < AES_BLOCK_SIZE; i++) { cbc[i] ^= *pos++; if (pos >= end) { e++; pos = addr[e]; end = pos + len[e]; } } if (left > AES_BLOCK_SIZE) aes_128_encrypt(ctx, cbc, cbc); left -= AES_BLOCK_SIZE; } _rtw_memset(pad, 0, AES_BLOCK_SIZE); aes_128_encrypt(ctx, pad, pad); gf_mulx(pad); if (left || total_len == 0) { for (i = 0; i < left; i++) { cbc[i] ^= *pos++; if (pos >= end) { e++; pos = addr[e]; end = pos + len[e]; } } cbc[left] ^= 0x80; gf_mulx(pad); } for (i = 0; i < AES_BLOCK_SIZE; i++) pad[i] ^= cbc[i]; aes_128_encrypt(ctx, pad, mac); aes_encrypt_deinit(ctx); return 0; } /** * omac1_aes_128 - One-Key CBC MAC (OMAC1) hash with AES-128 (aka AES-CMAC) * @key: 128-bit key for the hash operation * @data: Data buffer for which a MAC is determined * @data_len: Length of data buffer in bytes * @mac: Buffer for MAC (128 bits, i.e., 16 bytes) * Returns: 0 on success, -1 on failure * * This is a mode for using block cipher (AES in this case) for authentication. * OMAC1 was standardized with the name CMAC by NIST in a Special Publication * (SP) 800-38B. */ //modify for CONFIG_IEEE80211W int omac1_aes_128(u8 *key, u8 *data, size_t data_len, u8 *mac) { return omac1_aes_128_vector(key, 1, &data, &data_len, mac); } #endif //PLATFORM_FREEBSD Baron #ifdef CONFIG_TDLS void wpa_tdls_generate_tpk(_adapter *padapter, PVOID sta) { struct sta_info *psta = (struct sta_info *)sta; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; u8 *SNonce = psta->SNonce; u8 *ANonce = psta->ANonce; u8 key_input[SHA256_MAC_LEN]; u8 *nonce[2]; size_t len[2]; u8 data[3 * ETH_ALEN]; /* IEEE Std 802.11z-2010 8.5.9.1: * TPK-Key-Input = SHA-256(min(SNonce, ANonce) || max(SNonce, ANonce)) */ len[0] = 32; len[1] = 32; if (os_memcmp(SNonce, ANonce, 32) < 0) { nonce[0] = SNonce; nonce[1] = ANonce; } else { nonce[0] = ANonce; nonce[1] = SNonce; } sha256_vector(2, nonce, len, key_input); /* * TPK-Key-Data = KDF-N_KEY(TPK-Key-Input, "TDLS PMK", * min(MAC_I, MAC_R) || max(MAC_I, MAC_R) || BSSID || N_KEY) * TODO: is N_KEY really included in KDF Context and if so, in which * presentation format (little endian 16-bit?) is it used? It gets * added by the KDF anyway.. */ if (os_memcmp(myid(&(padapter->eeprompriv)), psta->hwaddr, ETH_ALEN) < 0) { _rtw_memcpy(data, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(data + ETH_ALEN, psta->hwaddr, ETH_ALEN); } else { _rtw_memcpy(data, psta->hwaddr, ETH_ALEN); _rtw_memcpy(data + ETH_ALEN, myid(&(padapter->eeprompriv)), ETH_ALEN); } _rtw_memcpy(data + 2 * ETH_ALEN, get_bssid(pmlmepriv), ETH_ALEN); sha256_prf(key_input, SHA256_MAC_LEN, "TDLS PMK", data, sizeof(data), (u8 *) &psta->tpk, sizeof(psta->tpk)); } /** * wpa_tdls_ftie_mic - Calculate TDLS FTIE MIC * @kck: TPK-KCK * @lnkid: Pointer to the beginning of Link Identifier IE * @rsnie: Pointer to the beginning of RSN IE used for handshake * @timeoutie: Pointer to the beginning of Timeout IE used for handshake * @ftie: Pointer to the beginning of FT IE * @mic: Pointer for writing MIC * * Calculate MIC for TDLS frame. */ int wpa_tdls_ftie_mic(u8 *kck, u8 trans_seq, u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie, u8 *mic) { u8 *buf, *pos; struct wpa_tdls_ftie *_ftie; struct wpa_tdls_lnkid *_lnkid; int ret; int len = 2 * ETH_ALEN + 1 + 2 + lnkid[1] + 2 + rsnie[1] + 2 + timeoutie[1] + 2 + ftie[1]; buf = rtw_zmalloc(len); if (!buf) { DBG_871X("TDLS: No memory for MIC calculation\n"); return -1; } pos = buf; _lnkid = (struct wpa_tdls_lnkid *) lnkid; /* 1) TDLS initiator STA MAC address */ _rtw_memcpy(pos, _lnkid->init_sta, ETH_ALEN); pos += ETH_ALEN; /* 2) TDLS responder STA MAC address */ _rtw_memcpy(pos, _lnkid->resp_sta, ETH_ALEN); pos += ETH_ALEN; /* 3) Transaction Sequence number */ *pos++ = trans_seq; /* 4) Link Identifier IE */ _rtw_memcpy(pos, lnkid, 2 + lnkid[1]); pos += 2 + lnkid[1]; /* 5) RSN IE */ _rtw_memcpy(pos, rsnie, 2 + rsnie[1]); pos += 2 + rsnie[1]; /* 6) Timeout Interval IE */ _rtw_memcpy(pos, timeoutie, 2 + timeoutie[1]); pos += 2 + timeoutie[1]; /* 7) FTIE, with the MIC field of the FTIE set to 0 */ _rtw_memcpy(pos, ftie, 2 + ftie[1]); _ftie = (struct wpa_tdls_ftie *) pos; _rtw_memset(_ftie->mic, 0, TDLS_MIC_LEN); pos += 2 + ftie[1]; ret = omac1_aes_128(kck, buf, pos - buf, mic); rtw_mfree(buf, len); return ret; } int tdls_verify_mic(u8 *kck, u8 trans_seq, u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie) { u8 *buf, *pos; int len; u8 mic[16]; int ret; u8 *rx_ftie, *tmp_ftie; if (lnkid == NULL || rsnie == NULL || timeoutie == NULL || ftie == NULL){ return 0; } len = 2 * ETH_ALEN + 1 + 2 + 18 + 2 + *(rsnie+1) + 2 + *(timeoutie+1) + 2 + *(ftie+1); buf = rtw_zmalloc(len); if (buf == NULL) return 0; pos = buf; /* 1) TDLS initiator STA MAC address */ _rtw_memcpy(pos, lnkid + ETH_ALEN + 2, ETH_ALEN); pos += ETH_ALEN; /* 2) TDLS responder STA MAC address */ _rtw_memcpy(pos, lnkid + 2 * ETH_ALEN + 2, ETH_ALEN); pos += ETH_ALEN; /* 3) Transaction Sequence number */ *pos++ = trans_seq; /* 4) Link Identifier IE */ _rtw_memcpy(pos, lnkid, 2 + 18); pos += 2 + 18; /* 5) RSN IE */ _rtw_memcpy(pos, rsnie, 2 + *(rsnie+1)); pos += 2 + *(rsnie+1); /* 6) Timeout Interval IE */ _rtw_memcpy(pos, timeoutie, 2 + *(timeoutie+1)); pos += 2 + *(timeoutie+1); /* 7) FTIE, with the MIC field of the FTIE set to 0 */ _rtw_memcpy(pos, ftie, 2 + *(ftie+1)); pos += 2; tmp_ftie = (u8 *) (pos+2); _rtw_memset(tmp_ftie, 0, 16); pos += *(ftie+1); ret = omac1_aes_128(kck, buf, pos - buf, mic); rtw_mfree(buf, len); if (ret) return 0; rx_ftie = ftie+4; if (os_memcmp(mic, rx_ftie, 16) == 0) { //Valid MIC return 1; } //Invalid MIC DBG_871X( "[%s] Invalid MIC\n", __FUNCTION__); return 0; } #endif //CONFIG_TDLS void rtw_use_tkipkey_handler(RTW_TIMER_HDL_ARGS) { _adapter *padapter = (_adapter *)FunctionContext; _func_enter_; RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("^^^rtw_use_tkipkey_handler ^^^\n")); /* if(padapter->bDriverStopped ||padapter->bSurpriseRemoved){ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("^^^rtw_use_tkipkey_handler (padapter->bDriverStopped %d)(padapter->bSurpriseRemoved %d)^^^\n",padapter->bDriverStopped,padapter->bSurpriseRemoved)); return; } */ padapter->securitypriv.busetkipkey=_TRUE; RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("^^^rtw_use_tkipkey_handler padapter->securitypriv.busetkipkey=%d^^^\n",padapter->securitypriv.busetkipkey)); _func_exit_; } /* Restore HW wep key setting according to key_mask */ void rtw_sec_restore_wep_key(_adapter *adapter) { struct security_priv* securitypriv=&(adapter->securitypriv); sint keyid; if((_WEP40_ == securitypriv->dot11PrivacyAlgrthm) ||(_WEP104_ == securitypriv->dot11PrivacyAlgrthm)) { for(keyid=0;keyid<4;keyid++){ if(securitypriv->key_mask & BIT(keyid)){ if(keyid == securitypriv->dot11PrivacyKeyIndex) rtw_set_key(adapter,securitypriv, keyid, 1, _FALSE); else rtw_set_key(adapter,securitypriv, keyid, 0, _FALSE); } } } } u8 rtw_handle_tkip_countermeasure(_adapter* adapter, const char *caller) { struct security_priv* securitypriv=&(adapter->securitypriv); u8 status = _SUCCESS; if (securitypriv->btkip_countermeasure == _TRUE) { u32 passing_ms = rtw_get_passing_time_ms(securitypriv->btkip_countermeasure_time); if (passing_ms > 60*1000) { DBG_871X_LEVEL(_drv_always_, "%s("ADPT_FMT") countermeasure time:%ds > 60s \n", caller, ADPT_ARG(adapter), passing_ms/1000); securitypriv->btkip_countermeasure = _FALSE; securitypriv->btkip_countermeasure_time = 0; } else { DBG_871X_LEVEL(_drv_always_, "%s("ADPT_FMT") countermeasure time:%ds < 60s \n", caller, ADPT_ARG(adapter), passing_ms/1000); status = _FAIL; } } return status; } rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_sreset.c000066400000000000000000000250611261122257400210000ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include #include #include void sreset_init_value(_adapter *padapter) { #if defined(DBG_CONFIG_ERROR_DETECT) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct sreset_priv *psrtpriv = &pHalData->srestpriv; _rtw_mutex_init(&psrtpriv->silentreset_mutex); psrtpriv->silent_reset_inprogress = _FALSE; psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; psrtpriv->last_tx_time =0; psrtpriv->last_tx_complete_time =0; #endif } void sreset_reset_value(_adapter *padapter) { #if defined(DBG_CONFIG_ERROR_DETECT) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct sreset_priv *psrtpriv = &pHalData->srestpriv; psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; psrtpriv->last_tx_time =0; psrtpriv->last_tx_complete_time =0; #endif } u8 sreset_get_wifi_status(_adapter *padapter) { #if defined(DBG_CONFIG_ERROR_DETECT) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct sreset_priv *psrtpriv = &pHalData->srestpriv; u8 status = WIFI_STATUS_SUCCESS; u32 val32 = 0; _irqL irqL; if(psrtpriv->silent_reset_inprogress == _TRUE) { return status; } val32 =rtw_read32(padapter,REG_TXDMA_STATUS); if(val32==0xeaeaeaea){ psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST; } else if(val32!=0){ DBG_8192C("txdmastatu(%x)\n",val32); psrtpriv->Wifi_Error_Status = WIFI_MAC_TXDMA_ERROR; } if(WIFI_STATUS_SUCCESS !=psrtpriv->Wifi_Error_Status) { DBG_8192C("==>%s error_status(0x%x) \n",__FUNCTION__,psrtpriv->Wifi_Error_Status); status = (psrtpriv->Wifi_Error_Status &( ~(USB_READ_PORT_FAIL|USB_WRITE_PORT_FAIL))); } DBG_8192C("==> %s wifi_status(0x%x)\n",__FUNCTION__,status); //status restore psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; return status; #else return WIFI_STATUS_SUCCESS; #endif } void sreset_set_wifi_error_status(_adapter *padapter, u32 status) { #if defined(DBG_CONFIG_ERROR_DETECT) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); pHalData->srestpriv.Wifi_Error_Status = status; #endif } void sreset_set_trigger_point(_adapter *padapter, s32 tgp) { #if defined(DBG_CONFIG_ERROR_DETECT) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); pHalData->srestpriv.dbg_trigger_point = tgp; #endif } bool sreset_inprogress(_adapter *padapter) { #if defined(DBG_CONFIG_ERROR_RESET) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); return pHalData->srestpriv.silent_reset_inprogress; #else return _FALSE; #endif } void sreset_restore_security_station(_adapter *padapter) { u8 EntryId = 0; struct mlme_priv *mlmepriv = &padapter->mlmepriv; struct sta_priv * pstapriv = &padapter->stapriv; struct sta_info *psta; struct security_priv* psecuritypriv=&(padapter->securitypriv); struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; { u8 val8; if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X) { val8 = 0xcc; #ifdef CONFIG_WAPI_SUPPORT } else if (padapter->wapiInfo.bWapiEnable && pmlmeinfo->auth_algo == dot11AuthAlgrthm_WAPI) { //Disable TxUseDefaultKey, RxUseDefaultKey, RxBroadcastUseDefaultKey. val8 = 0x4c; #endif } else { val8 = 0xcf; } rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); } #if 0 if ( ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP40_ ) || ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_ )) { for(EntryId=0; EntryId<4; EntryId++) { if(EntryId == psecuritypriv->dot11PrivacyKeyIndex) rtw_set_key(padapter,&padapter->securitypriv, EntryId, 1,_FALSE); else rtw_set_key(padapter,&padapter->securitypriv, EntryId, 0,_FALSE); } } else #endif if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) { psta = rtw_get_stainfo(pstapriv, get_bssid(mlmepriv)); if (psta == NULL) { //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); } else { //pairwise key rtw_setstakey_cmd(padapter, psta, _TRUE,_FALSE); //group key rtw_set_key(padapter,&padapter->securitypriv,padapter->securitypriv.dot118021XGrpKeyid, 0,_FALSE); } } } void sreset_restore_network_station(_adapter *padapter) { struct mlme_priv *mlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); #if 0 { //======================================================= // reset related register of Beacon control //set MSR to nolink Set_MSR(padapter, _HW_STATE_NOLINK_); // reject all data frame rtw_write16(padapter, REG_RXFLTMAP2,0x00); //reset TSF rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1))); // disable update TSF SetBcnCtrlReg(padapter, BIT(4), 0); //======================================================= } #endif rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure,_FALSE); { u8 threshold; #ifdef CONFIG_USB_HCI // TH=1 => means that invalidate usb rx aggregation // TH=0 => means that validate usb rx aggregation, use init value. if(mlmepriv->htpriv.ht_option) { if(padapter->registrypriv.wifi_spec==1) threshold = 1; else threshold = 0; rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); } else { threshold = 1; rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); } #endif } rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, NULL); set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); //disable dynamic functions, such as high power, DIG //Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress); { u8 join_type = 0; rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); } Set_MSR(padapter, (pmlmeinfo->state & 0x3)); mlmeext_joinbss_event_callback(padapter, 1); //restore Sequence No. rtw_write8(padapter,0x4dc,padapter->xmitpriv.nqos_ssn); sreset_restore_security_station(padapter); } void sreset_restore_network_status(_adapter *padapter) { struct mlme_priv *mlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if (check_fwstate(mlmepriv, WIFI_STATION_STATE)) { DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_STATION_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); sreset_restore_network_station(padapter); } else if (check_fwstate(mlmepriv, WIFI_AP_STATE)) { DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_AP_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); rtw_ap_restore_network(padapter); } else if (check_fwstate(mlmepriv, WIFI_ADHOC_STATE)) { DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_ADHOC_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); } else { DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - ???\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); } } void sreset_stop_adapter(_adapter *padapter) { struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct xmit_priv *pxmitpriv = &padapter->xmitpriv; if (padapter == NULL) return; DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); rtw_netif_stop_queue(padapter->pnetdev); rtw_cancel_all_timer(padapter); /* TODO: OS and HCI independent */ #if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI) tasklet_kill(&pxmitpriv->xmit_tasklet); #endif if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) rtw_scan_abort(padapter); if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) { rtw_set_to_roam(padapter, 0); _rtw_join_timeout_handler(padapter); } } void sreset_start_adapter(_adapter *padapter) { struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct xmit_priv *pxmitpriv = &padapter->xmitpriv; if (padapter == NULL) return; DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); if (check_fwstate(pmlmepriv, _FW_LINKED)) { sreset_restore_network_status(padapter); } /* TODO: OS and HCI independent */ #if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI) tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); #endif if (is_primary_adapter(padapter)) _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); rtw_netif_wake_queue(padapter->pnetdev); } void sreset_reset(_adapter *padapter) { #ifdef DBG_CONFIG_ERROR_RESET HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct sreset_priv *psrtpriv = &pHalData->srestpriv; struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct xmit_priv *pxmitpriv = &padapter->xmitpriv; _irqL irqL; u32 start = rtw_get_current_time(); struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; DBG_871X("%s\n", __FUNCTION__); psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; #ifdef CONFIG_LPS rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "SRESET"); #endif//#ifdef CONFIG_LPS _enter_pwrlock(&pwrpriv->lock); psrtpriv->silent_reset_inprogress = _TRUE; pwrpriv->change_rfpwrstate = rf_off; sreset_stop_adapter(padapter); #ifdef CONFIG_CONCURRENT_MODE sreset_stop_adapter(padapter->pbuddy_adapter); #endif #ifdef CONFIG_IPS _ips_enter(padapter); _ips_leave(padapter); #endif sreset_start_adapter(padapter); #ifdef CONFIG_CONCURRENT_MODE sreset_start_adapter(padapter->pbuddy_adapter); #endif psrtpriv->silent_reset_inprogress = _FALSE; _exit_pwrlock(&pwrpriv->lock); DBG_871X("%s done in %d ms\n", __FUNCTION__, rtw_get_passing_time_ms(start)); pdbgpriv->dbg_sreset_cnt++; #endif } rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_sta_mgt.c000066400000000000000000000523501261122257400211320ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_STA_MGT_C_ #include #if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) #error "Shall be Linux or Windows, but not both!\n" #endif void _rtw_init_stainfo(struct sta_info *psta); void _rtw_init_stainfo(struct sta_info *psta) { _func_enter_; _rtw_memset((u8 *)psta, 0, sizeof (struct sta_info)); _rtw_spinlock_init(&psta->lock); _rtw_init_listhead(&psta->list); _rtw_init_listhead(&psta->hash_list); //_rtw_init_listhead(&psta->asoc_list); //_rtw_init_listhead(&psta->sleep_list); //_rtw_init_listhead(&psta->wakeup_list); _rtw_init_queue(&psta->sleep_q); psta->sleepq_len = 0; _rtw_init_sta_xmit_priv(&psta->sta_xmitpriv); _rtw_init_sta_recv_priv(&psta->sta_recvpriv); #ifdef CONFIG_AP_MODE _rtw_init_listhead(&psta->asoc_list); _rtw_init_listhead(&psta->auth_list); psta->expire_to = 0; psta->flags = 0; psta->capability = 0; psta->bpairwise_key_installed = _FALSE; #ifdef CONFIG_NATIVEAP_MLME psta->nonerp_set = 0; psta->no_short_slot_time_set = 0; psta->no_short_preamble_set = 0; psta->no_ht_gf_set = 0; psta->no_ht_set = 0; psta->ht_20mhz_set = 0; #endif #ifdef CONFIG_TX_MCAST2UNI psta->under_exist_checking = 0; #endif // CONFIG_TX_MCAST2UNI psta->keep_alive_trycnt = 0; #endif // CONFIG_AP_MODE _func_exit_; } u32 _rtw_init_sta_priv(struct sta_priv *pstapriv) { struct sta_info *psta; s32 i; _func_enter_; pstapriv->pallocated_stainfo_buf = rtw_zvmalloc (sizeof(struct sta_info) * NUM_STA+ 4); if(!pstapriv->pallocated_stainfo_buf) return _FAIL; pstapriv->pstainfo_buf = pstapriv->pallocated_stainfo_buf + 4 - ((SIZE_PTR)(pstapriv->pallocated_stainfo_buf ) & 3); _rtw_init_queue(&pstapriv->free_sta_queue); _rtw_spinlock_init(&pstapriv->sta_hash_lock); //_rtw_init_queue(&pstapriv->asoc_q); pstapriv->asoc_sta_count = 0; _rtw_init_queue(&pstapriv->sleep_q); _rtw_init_queue(&pstapriv->wakeup_q); psta = (struct sta_info *)(pstapriv->pstainfo_buf); for(i = 0; i < NUM_STA; i++) { _rtw_init_stainfo(psta); _rtw_init_listhead(&(pstapriv->sta_hash[i])); rtw_list_insert_tail(&psta->list, get_list_head(&pstapriv->free_sta_queue)); psta++; } #ifdef CONFIG_AP_MODE pstapriv->sta_dz_bitmap = 0; pstapriv->tim_bitmap = 0; _rtw_init_listhead(&pstapriv->asoc_list); _rtw_init_listhead(&pstapriv->auth_list); _rtw_spinlock_init(&pstapriv->asoc_list_lock); _rtw_spinlock_init(&pstapriv->auth_list_lock); pstapriv->asoc_list_cnt = 0; pstapriv->auth_list_cnt = 0; pstapriv->auth_to = 3; // 3*2 = 6 sec pstapriv->assoc_to = 3; //pstapriv->expire_to = 900;// 900*2 = 1800 sec = 30 min, expire after no any traffic. //pstapriv->expire_to = 30;// 30*2 = 60 sec = 1 min, expire after no any traffic. #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK pstapriv->expire_to = 3; // 3*2 = 6 sec #else pstapriv->expire_to = 60;// 60*2 = 120 sec = 2 min, expire after no any traffic. #endif #ifdef CONFIG_ATMEL_RC_PATCH _rtw_memset( pstapriv->atmel_rc_pattern, 0, ETH_ALEN); #endif pstapriv->max_num_sta = NUM_STA; #endif _func_exit_; return _SUCCESS; } inline int rtw_stainfo_offset(struct sta_priv *stapriv, struct sta_info *sta) { int offset = (((u8 *)sta) - stapriv->pstainfo_buf)/sizeof(struct sta_info); if (!stainfo_offset_valid(offset)) DBG_871X("%s invalid offset(%d), out of range!!!", __func__, offset); return offset; } inline struct sta_info *rtw_get_stainfo_by_offset(struct sta_priv *stapriv, int offset) { if (!stainfo_offset_valid(offset)) DBG_871X("%s invalid offset(%d), out of range!!!", __func__, offset); return (struct sta_info *)(stapriv->pstainfo_buf + offset * sizeof(struct sta_info)); } void _rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv); void _rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv) { _func_enter_; _rtw_spinlock_free(&psta_xmitpriv->lock); _rtw_spinlock_free(&(psta_xmitpriv->be_q.sta_pending.lock)); _rtw_spinlock_free(&(psta_xmitpriv->bk_q.sta_pending.lock)); _rtw_spinlock_free(&(psta_xmitpriv->vi_q.sta_pending.lock)); _rtw_spinlock_free(&(psta_xmitpriv->vo_q.sta_pending.lock)); _func_exit_; } static void _rtw_free_sta_recv_priv_lock(struct sta_recv_priv *psta_recvpriv) { _func_enter_; _rtw_spinlock_free(&psta_recvpriv->lock); _rtw_spinlock_free(&(psta_recvpriv->defrag_q.lock)); _func_exit_; } void rtw_mfree_stainfo(struct sta_info *psta); void rtw_mfree_stainfo(struct sta_info *psta) { _func_enter_; if(&psta->lock != NULL) _rtw_spinlock_free(&psta->lock); _rtw_free_sta_xmit_priv_lock(&psta->sta_xmitpriv); _rtw_free_sta_recv_priv_lock(&psta->sta_recvpriv); _func_exit_; } // this function is used to free the memory of lock || sema for all stainfos void rtw_mfree_all_stainfo(struct sta_priv *pstapriv ); void rtw_mfree_all_stainfo(struct sta_priv *pstapriv ) { _irqL irqL; _list *plist, *phead; struct sta_info *psta = NULL; _func_enter_; _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); phead = get_list_head(&pstapriv->free_sta_queue); plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info ,list); plist = get_next(plist); rtw_mfree_stainfo(psta); } _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); _func_exit_; } void rtw_mfree_sta_priv_lock(struct sta_priv *pstapriv); void rtw_mfree_sta_priv_lock(struct sta_priv *pstapriv) { #ifdef CONFIG_AP_MODE struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; #endif rtw_mfree_all_stainfo(pstapriv); //be done before free sta_hash_lock _rtw_spinlock_free(&pstapriv->free_sta_queue.lock); _rtw_spinlock_free(&pstapriv->sta_hash_lock); _rtw_spinlock_free(&pstapriv->wakeup_q.lock); _rtw_spinlock_free(&pstapriv->sleep_q.lock); #ifdef CONFIG_AP_MODE _rtw_spinlock_free(&pstapriv->asoc_list_lock); _rtw_spinlock_free(&pstapriv->auth_list_lock); _rtw_spinlock_free(&pacl_list->acl_node_q.lock); #endif } u32 _rtw_free_sta_priv(struct sta_priv *pstapriv) { _irqL irqL; _list *phead, *plist; struct sta_info *psta = NULL; struct recv_reorder_ctrl *preorder_ctrl; int index; _func_enter_; if(pstapriv){ /* delete all reordering_ctrl_timer */ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); for(index = 0; index < NUM_STA; index++) { phead = &(pstapriv->sta_hash[index]); plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { int i; psta = LIST_CONTAINOR(plist, struct sta_info ,hash_list); plist = get_next(plist); for(i=0; i < 16 ; i++) { preorder_ctrl = &psta->recvreorder_ctrl[i]; _cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer); } } } _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); /*===============================*/ rtw_mfree_sta_priv_lock(pstapriv); if(pstapriv->pallocated_stainfo_buf) { rtw_vmfree(pstapriv->pallocated_stainfo_buf, sizeof(struct sta_info)*NUM_STA+4); } } _func_exit_; return _SUCCESS; } //struct sta_info *rtw_alloc_stainfo(_queue *pfree_sta_queue, unsigned char *hwaddr) struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr) { _irqL irqL, irqL2; uint tmp_aid; s32 index; _list *phash_list; struct sta_info *psta; _queue *pfree_sta_queue; struct recv_reorder_ctrl *preorder_ctrl; int i = 0; u16 wRxSeqInitialValue = 0xffff; _func_enter_; pfree_sta_queue = &pstapriv->free_sta_queue; //_enter_critical_bh(&(pfree_sta_queue->lock), &irqL); _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); if (_rtw_queue_empty(pfree_sta_queue) == _TRUE) { //_exit_critical_bh(&(pfree_sta_queue->lock), &irqL); _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); psta = NULL; } else { psta = LIST_CONTAINOR(get_next(&pfree_sta_queue->queue), struct sta_info, list); rtw_list_delete(&(psta->list)); //_exit_critical_bh(&(pfree_sta_queue->lock), &irqL); tmp_aid = psta->aid; _rtw_init_stainfo(psta); psta->padapter = pstapriv->padapter; _rtw_memcpy(psta->hwaddr, hwaddr, ETH_ALEN); index = wifi_mac_hash(hwaddr); RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_info_,("rtw_alloc_stainfo: index = %x", index)); if(index >= NUM_STA){ RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("ERROR=> rtw_alloc_stainfo: index >= NUM_STA")); psta= NULL; goto exit; } phash_list = &(pstapriv->sta_hash[index]); //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); rtw_list_insert_tail(&psta->hash_list, phash_list); pstapriv->asoc_sta_count ++ ; //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); // Commented by Albert 2009/08/13 // For the SMC router, the sequence number of first packet of WPS handshake will be 0. // In this case, this packet will be dropped by recv_decache function if we use the 0x00 as the default value for tid_rxseq variable. // So, we initialize the tid_rxseq variable as the 0xffff. for( i = 0; i < 16; i++ ) { _rtw_memcpy( &psta->sta_recvpriv.rxcache.tid_rxseq[ i ], &wRxSeqInitialValue, 2 ); } RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_info_,("alloc number_%d stainfo with hwaddr = %x %x %x %x %x %x \n", pstapriv->asoc_sta_count , hwaddr[0], hwaddr[1], hwaddr[2],hwaddr[3],hwaddr[4],hwaddr[5])); init_addba_retry_timer(pstapriv->padapter, psta); #ifdef CONFIG_TDLS rtw_init_tdls_timer(pstapriv->padapter, psta); #endif //CONFIG_TDLS //for A-MPDU Rx reordering buffer control for(i=0; i < 16 ; i++) { preorder_ctrl = &psta->recvreorder_ctrl[i]; preorder_ctrl->padapter = pstapriv->padapter; preorder_ctrl->enable = _FALSE; preorder_ctrl->indicate_seq = 0xffff; #ifdef DBG_RX_SEQ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d\n", __FUNCTION__, __LINE__, preorder_ctrl->indicate_seq); #endif preorder_ctrl->wend_b= 0xffff; //preorder_ctrl->wsize_b = (NR_RECVBUFF-2); preorder_ctrl->wsize_b = 64;//64; _rtw_init_queue(&preorder_ctrl->pending_recvframe_queue); rtw_init_recv_timer(preorder_ctrl); } //init for DM psta->rssi_stat.UndecoratedSmoothedPWDB = (-1); psta->rssi_stat.UndecoratedSmoothedCCK = (-1); #ifdef CONFIG_ATMEL_RC_PATCH psta->flag_atmel_rc = 0; #endif /* init for the sequence number of received management frame */ psta->RxMgmtFrameSeqNum = 0xffff; //alloc mac id for non-bc/mc station, rtw_alloc_macid(pstapriv->padapter, psta); } exit: _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); _func_exit_; return psta; } // using pstapriv->sta_hash_lock to protect u32 rtw_free_stainfo(_adapter *padapter , struct sta_info *psta) { int i; _irqL irqL0; _queue *pfree_sta_queue; struct recv_reorder_ctrl *preorder_ctrl; struct sta_xmit_priv *pstaxmitpriv; struct xmit_priv *pxmitpriv= &padapter->xmitpriv; struct sta_priv *pstapriv = &padapter->stapriv; struct hw_xmit *phwxmit; int pending_qcnt[4]; _func_enter_; if (psta == NULL) goto exit; _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL0); rtw_list_delete(&psta->hash_list); RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("\n free number_%d stainfo with hwaddr = 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x \n",pstapriv->asoc_sta_count , psta->hwaddr[0], psta->hwaddr[1], psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5])); pstapriv->asoc_sta_count --; _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL0); _enter_critical_bh(&psta->lock, &irqL0); psta->state &= ~_FW_LINKED; _exit_critical_bh(&psta->lock, &irqL0); pfree_sta_queue = &pstapriv->free_sta_queue; pstaxmitpriv = &psta->sta_xmitpriv; //rtw_list_delete(&psta->sleep_list); //rtw_list_delete(&psta->wakeup_list); _enter_critical_bh(&pxmitpriv->lock, &irqL0); rtw_free_xmitframe_queue(pxmitpriv, &psta->sleep_q); psta->sleepq_len = 0; //vo //_enter_critical_bh(&(pxmitpriv->vo_pending.lock), &irqL0); rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->vo_q.sta_pending); rtw_list_delete(&(pstaxmitpriv->vo_q.tx_pending)); phwxmit = pxmitpriv->hwxmits; phwxmit->accnt -= pstaxmitpriv->vo_q.qcnt; pending_qcnt[0] = pstaxmitpriv->vo_q.qcnt; pstaxmitpriv->vo_q.qcnt = 0; //_exit_critical_bh(&(pxmitpriv->vo_pending.lock), &irqL0); //vi //_enter_critical_bh(&(pxmitpriv->vi_pending.lock), &irqL0); rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->vi_q.sta_pending); rtw_list_delete(&(pstaxmitpriv->vi_q.tx_pending)); phwxmit = pxmitpriv->hwxmits+1; phwxmit->accnt -= pstaxmitpriv->vi_q.qcnt; pending_qcnt[1] = pstaxmitpriv->vi_q.qcnt; pstaxmitpriv->vi_q.qcnt = 0; //_exit_critical_bh(&(pxmitpriv->vi_pending.lock), &irqL0); //be //_enter_critical_bh(&(pxmitpriv->be_pending.lock), &irqL0); rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->be_q.sta_pending); rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending)); phwxmit = pxmitpriv->hwxmits+2; phwxmit->accnt -= pstaxmitpriv->be_q.qcnt; pending_qcnt[2] = pstaxmitpriv->be_q.qcnt; pstaxmitpriv->be_q.qcnt = 0; //_exit_critical_bh(&(pxmitpriv->be_pending.lock), &irqL0); //bk //_enter_critical_bh(&(pxmitpriv->bk_pending.lock), &irqL0); rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->bk_q.sta_pending); rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending)); phwxmit = pxmitpriv->hwxmits+3; phwxmit->accnt -= pstaxmitpriv->bk_q.qcnt; pending_qcnt[3] = pstaxmitpriv->bk_q.qcnt; pstaxmitpriv->bk_q.qcnt = 0; //_exit_critical_bh(&(pxmitpriv->bk_pending.lock), &irqL0); rtw_os_wake_queue_at_free_stainfo(padapter, pending_qcnt); _exit_critical_bh(&pxmitpriv->lock, &irqL0); // re-init sta_info; 20061114 // will be init in alloc_stainfo //_rtw_init_sta_xmit_priv(&psta->sta_xmitpriv); //_rtw_init_sta_recv_priv(&psta->sta_recvpriv); _cancel_timer_ex(&psta->addba_retry_timer); #ifdef CONFIG_TDLS rtw_free_tdls_timer(psta); #endif //CONFIG_TDLS //for A-MPDU Rx reordering buffer control, cancel reordering_ctrl_timer for(i=0; i < 16 ; i++) { _irqL irqL; _list *phead, *plist; union recv_frame *prframe; _queue *ppending_recvframe_queue; _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; preorder_ctrl = &psta->recvreorder_ctrl[i]; _cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer); ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; _enter_critical_bh(&ppending_recvframe_queue->lock, &irqL); phead = get_list_head(ppending_recvframe_queue); plist = get_next(phead); while(!rtw_is_list_empty(phead)) { prframe = LIST_CONTAINOR(plist, union recv_frame, u); plist = get_next(plist); rtw_list_delete(&(prframe->u.hdr.list)); rtw_free_recvframe(prframe, pfree_recv_queue); } _exit_critical_bh(&ppending_recvframe_queue->lock, &irqL); } if (!(psta->state & WIFI_AP_STATE)) rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, _FALSE); //release mac id for non-bc/mc station, rtw_release_macid(pstapriv->padapter, psta); #ifdef CONFIG_AP_MODE /* _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL0); rtw_list_delete(&psta->asoc_list); _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL0); */ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL0); if (!rtw_is_list_empty(&psta->auth_list)) { rtw_list_delete(&psta->auth_list); pstapriv->auth_list_cnt--; } _exit_critical_bh(&pstapriv->auth_list_lock, &irqL0); psta->expire_to = 0; #ifdef CONFIG_ATMEL_RC_PATCH psta->flag_atmel_rc = 0; #endif psta->sleepq_ac_len = 0; psta->qos_info = 0; psta->max_sp_len = 0; psta->uapsd_bk = 0; psta->uapsd_be = 0; psta->uapsd_vi = 0; psta->uapsd_vo = 0; psta->has_legacy_ac = 0; #ifdef CONFIG_NATIVEAP_MLME pstapriv->sta_dz_bitmap &=~BIT(psta->aid); pstapriv->tim_bitmap &=~BIT(psta->aid); //rtw_indicate_sta_disassoc_event(padapter, psta); if ((psta->aid >0)&&(pstapriv->sta_aid[psta->aid - 1] == psta)) { pstapriv->sta_aid[psta->aid - 1] = NULL; psta->aid = 0; } #endif // CONFIG_NATIVEAP_MLME #ifdef CONFIG_TX_MCAST2UNI psta->under_exist_checking = 0; #endif // CONFIG_TX_MCAST2UNI #endif // CONFIG_AP_MODE _rtw_spinlock_free(&psta->lock); //_enter_critical_bh(&(pfree_sta_queue->lock), &irqL0); _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL0); rtw_list_insert_tail(&psta->list, get_list_head(pfree_sta_queue)); _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL0); //_exit_critical_bh(&(pfree_sta_queue->lock), &irqL0); exit: _func_exit_; return _SUCCESS; } // free all stainfo which in sta_hash[all] void rtw_free_all_stainfo(_adapter *padapter) { _irqL irqL; _list *plist, *phead; s32 index; struct sta_info *psta = NULL; struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info* pbcmc_stainfo =rtw_get_bcmc_stainfo( padapter); u8 free_sta_num = 0; char free_sta_list[NUM_STA]; int stainfo_offset; _func_enter_; if(pstapriv->asoc_sta_count==1) goto exit; _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); for(index=0; index< NUM_STA; index++) { phead = &(pstapriv->sta_hash[index]); plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info ,hash_list); plist = get_next(plist); if(pbcmc_stainfo!=psta) { rtw_list_delete(&psta->hash_list); //rtw_free_stainfo(padapter , psta); stainfo_offset = rtw_stainfo_offset(pstapriv, psta); if (stainfo_offset_valid(stainfo_offset)) { free_sta_list[free_sta_num++] = stainfo_offset; } } } } _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); for (index = 0; index < free_sta_num; index++) { psta = rtw_get_stainfo_by_offset(pstapriv, free_sta_list[index]); rtw_free_stainfo(padapter , psta); } exit: _func_exit_; } /* any station allocated can be searched by hash list */ struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr) { _irqL irqL; _list *plist, *phead; struct sta_info *psta = NULL; u32 index; u8 *addr; u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; _func_enter_; if(hwaddr==NULL) return NULL; if(IS_MCAST(hwaddr)) { addr = bc_addr; } else { addr = hwaddr; } index = wifi_mac_hash(addr); _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); phead = &(pstapriv->sta_hash[index]); plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); if ((_rtw_memcmp(psta->hwaddr, addr, ETH_ALEN))== _TRUE) { // if found the matched address break; } psta=NULL; plist = get_next(plist); } _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); _func_exit_; return psta; } u32 rtw_init_bcmc_stainfo(_adapter* padapter) { struct sta_info *psta; struct tx_servq *ptxservq; u32 res=_SUCCESS; NDIS_802_11_MAC_ADDRESS bcast_addr= {0xff,0xff,0xff,0xff,0xff,0xff}; struct sta_priv *pstapriv = &padapter->stapriv; //_queue *pstapending = &padapter->xmitpriv.bm_pending; _func_enter_; psta = rtw_alloc_stainfo(pstapriv, bcast_addr); if(psta==NULL){ res=_FAIL; RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("rtw_alloc_stainfo fail")); goto exit; } ptxservq= &(psta->sta_xmitpriv.be_q); /* _enter_critical(&pstapending->lock, &irqL0); if (rtw_is_list_empty(&ptxservq->tx_pending)) rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(pstapending)); _exit_critical(&pstapending->lock, &irqL0); */ exit: _func_exit_; return _SUCCESS; } struct sta_info* rtw_get_bcmc_stainfo(_adapter* padapter) { struct sta_info *psta; struct sta_priv *pstapriv = &padapter->stapriv; u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; _func_enter_; psta = rtw_get_stainfo(pstapriv, bc_addr); _func_exit_; return psta; } u8 rtw_access_ctrl(_adapter *padapter, u8 *mac_addr) { u8 res = _TRUE; #ifdef CONFIG_AP_MODE _irqL irqL; _list *plist, *phead; struct rtw_wlan_acl_node *paclnode; u8 match = _FALSE; struct sta_priv *pstapriv = &padapter->stapriv; struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; _queue *pacl_node_q =&pacl_list->acl_node_q; _enter_critical_bh(&(pacl_node_q->lock), &irqL); phead = get_list_head(pacl_node_q); plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); plist = get_next(plist); if(_rtw_memcmp(paclnode->addr, mac_addr, ETH_ALEN)) { if(paclnode->valid == _TRUE) { match = _TRUE; break; } } } _exit_critical_bh(&(pacl_node_q->lock), &irqL); if(pacl_list->mode == 1)//accept unless in deny list { res = (match == _TRUE) ? _FALSE:_TRUE; } else if(pacl_list->mode == 2)//deny unless in accept list { res = (match == _TRUE) ? _TRUE:_FALSE; } else { res = _TRUE; } #endif return res; } rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_tdls.c000066400000000000000000002607501261122257400204470ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_TDLS_C_ #include #ifdef CONFIG_TDLS extern void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame); void rtw_reset_tdls_info(_adapter* padapter) { struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ptdlsinfo->ap_prohibited = _FALSE; ptdlsinfo->link_established = _FALSE; ptdlsinfo->sta_cnt = 0; ptdlsinfo->sta_maximum = _FALSE; ptdlsinfo->ch_sensing = 0; ptdlsinfo->cur_channel = 0; ptdlsinfo->candidate_ch = 1; //when inplement channel switching, default candidate channel is 1 ptdlsinfo->watchdog_count = 0; ptdlsinfo->dev_discovered = 0; #ifdef CONFIG_WFD ptdlsinfo->wfd_info = &padapter->wfd_info; #endif //CONFIG_WFD } int rtw_init_tdls_info(_adapter* padapter) { int res = _SUCCESS; struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ptdlsinfo->tdls_enable = _TRUE; rtw_reset_tdls_info(padapter); _rtw_spinlock_init(&ptdlsinfo->cmd_lock); _rtw_spinlock_init(&ptdlsinfo->hdl_lock); return res; } void rtw_free_tdls_info(struct tdls_info *ptdlsinfo) { _rtw_spinlock_free(&ptdlsinfo->cmd_lock); _rtw_spinlock_free(&ptdlsinfo->hdl_lock); _rtw_memset(ptdlsinfo, 0, sizeof(struct tdls_info) ); } int _issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int wait_ack) { int ret = _FAIL; struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto exit; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); pattrib->retry_ctrl = _FALSE; _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; // SetToDs(fctrl); if (power_mode) { SetPwrMgt(fctrl); } _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_DATA_NULL); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->last_txcmdsz = pattrib->pktlen; if(wait_ack) { ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); } else { dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; } exit: return ret; } int issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms) { int ret; int i = 0; u32 start = rtw_get_current_time(); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); //[TDLS] UAPSD : merge this from issue_nulldata() and mark it first. #if 0 psta = rtw_get_stainfo(&padapter->stapriv, da); if (psta) { if (power_mode) rtw_hal_macid_sleep(padapter, psta->mac_id); else rtw_hal_macid_wakeup(padapter, psta->mac_id); } else { DBG_871X(FUNC_ADPT_FMT ": Can't find sta info for " MAC_FMT ", skip macid %s!!\n", FUNC_ADPT_ARG(padapter), MAC_ARG(da), power_mode?"sleep":"wakeup"); rtw_warn_on(1); } #endif do { ret = _issue_nulldata_to_TDLS_peer_STA(padapter, da, power_mode, wait_ms>0 ? _TRUE : _FALSE); i++; if (padapter->bDriverStopped || padapter->bSurpriseRemoved) break; if(i < try_cnt && wait_ms > 0 && ret==_FAIL) rtw_msleep_os(wait_ms); }while((itdlsinfo; struct sta_priv *pstapriv = &padapter->stapriv; _irqL irqL; //free peer sta_info _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); if(ptdlsinfo->sta_cnt != 0) ptdlsinfo->sta_cnt--; _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); if( ptdlsinfo->sta_cnt < (NUM_STA - 2 - 4) ) // -2: AP + BC/MC sta, -4: default key { ptdlsinfo->sta_maximum = _FALSE; _rtw_memset( &ptdlsinfo->ss_record, 0x00, sizeof(struct tdls_ss_record) ); } //clear cam rtw_clearstakey_cmd(padapter, ptdls_sta, _TRUE); if(ptdlsinfo->sta_cnt==0){ rtw_tdls_cmd(padapter, myid(&(padapter->eeprompriv)), TDLS_RS_RCR); ptdlsinfo->link_established = _FALSE; } else DBG_871X("Remain tdls sta:%02x\n", ptdlsinfo->sta_cnt); rtw_free_stainfo(padapter, ptdls_sta); } //TDLS encryption(if needed) will always be CCMP void rtw_tdls_set_key(_adapter *padapter, struct rx_pkt_attrib *prx_pkt_attrib, struct sta_info *ptdls_sta) { if(prx_pkt_attrib->encrypt) { ptdls_sta->dot118021XPrivacy=_AES_; rtw_setstakey_cmd(padapter, ptdls_sta, _TRUE, _TRUE); } } void rtw_tdls_process_ht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8 *data, u8 Length) { /* save HT capabilities in the sta object */ _rtw_memset(&ptdls_sta->htpriv.ht_cap, 0, sizeof(struct rtw_ieee80211_ht_cap)); if (data && Length >= sizeof(struct rtw_ieee80211_ht_cap) ) { ptdls_sta->flags |= WLAN_STA_HT; ptdls_sta->flags |= WLAN_STA_WME; _rtw_memcpy(&ptdls_sta->htpriv.ht_cap, data, sizeof(struct rtw_ieee80211_ht_cap)); } else ptdls_sta->flags &= ~WLAN_STA_HT; if(ptdls_sta->flags & WLAN_STA_HT) { if(padapter->registrypriv.ht_enable == _TRUE) { ptdls_sta->htpriv.ht_option = _TRUE; } else { ptdls_sta->htpriv.ht_option = _FALSE; ptdls_sta->stat_code = _STATS_FAILURE_; } } //HT related cap if(ptdls_sta->htpriv.ht_option) { //check if sta supports rx ampdu if(padapter->registrypriv.ampdu_enable==1) ptdls_sta->htpriv.ampdu_enable = _TRUE; //check if sta support s Short GI 20M if(ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) { ptdls_sta->htpriv.sgi_20m = _TRUE; } //check if sta support s Short GI 40M if(ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) { ptdls_sta->htpriv.sgi_40m = _TRUE; } // bwmode would still followed AP's setting if(ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH)) { if (padapter->mlmeextpriv.cur_bwmode >= CHANNEL_WIDTH_40) ptdls_sta->bw_mode = CHANNEL_WIDTH_40; ptdls_sta->htpriv.ch_offset = padapter->mlmeextpriv.cur_ch_offset; } } } int rtw_tdls_set_ht_cap(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) { int tmplen; rtw_ht_use_default_setting(padapter); tmplen = pattrib->pktlen; rtw_restructure_ht_ie(padapter, NULL, pframe, 0, &(pattrib->pktlen), padapter->mlmeextpriv.cur_channel); return (pattrib->pktlen - tmplen); } u8 *rtw_tdls_set_sup_ch(struct mlme_ext_priv *pmlmeext, u8 *pframe, struct pkt_attrib *pattrib) { u8 sup_ch[ 30 * 2 ] = { 0x00 }, ch_set_idx = 0; //For supported channel u8 ch_24g = 0, b1 = 0, b4 = 0; u8 bit_table = 0, sup_ch_idx = 0; do{ if( pmlmeext->channel_set[ch_set_idx].ChannelNum >= 1 && pmlmeext->channel_set[ch_set_idx].ChannelNum <= 14 ) { ch_24g = 1; // 2.4 G channels } else if( pmlmeext->channel_set[ch_set_idx].ChannelNum >= 36 && pmlmeext->channel_set[ch_set_idx].ChannelNum <= 48) { b1 = 1; // 5 G band1 } else if( pmlmeext->channel_set[ch_set_idx].ChannelNum >= 149 && pmlmeext->channel_set[ch_set_idx].ChannelNum <= 165) { b4 = 1; // 5 G band4 } else { ch_set_idx++; // We don't claim that we support DFS channels. continue; } sup_ch_idx = (ch_24g + b1 + b4 - 1) * 2; if( sup_ch_idx >= 0) { if(sup_ch[sup_ch_idx] == 0) sup_ch[sup_ch_idx] = pmlmeext->channel_set[ch_set_idx].ChannelNum; sup_ch[sup_ch_idx+1]++; //Number of channel } ch_set_idx++; } while( pmlmeext->channel_set[ch_set_idx].ChannelNum != 0 && ch_set_idx < MAX_CHANNEL_NUM ); return(rtw_set_ie(pframe, _SUPPORTED_CH_IE_, sup_ch_idx+2, sup_ch, &(pattrib->pktlen))); } #ifdef CONFIG_WFD void rtw_tdls_process_wfd_ie(struct tdls_info *ptdlsinfo, u8 *ptr, u8 length) { u8 wfd_ie[ 128 ] = { 0x00 }; u32 wfd_ielen = 0; u32 wfd_offset = 0; // Try to get the TCP port information when receiving the negotiation response. // wfd_offset = 0; wfd_offset = rtw_get_wfd_ie( ptr + wfd_offset, length - wfd_offset, wfd_ie, &wfd_ielen ); while( wfd_offset ) { u8 attr_content[ 10 ] = { 0x00 }; u32 attr_contentlen = 0; int i; DBG_871X( "[%s] WFD IE Found!!\n", __FUNCTION__ ); rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); if ( attr_contentlen ) { ptdlsinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); DBG_871X( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, ptdlsinfo->wfd_info->peer_rtsp_ctrlport ); } _rtw_memset( attr_content, 0x00, 10); attr_contentlen = 0; rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_LOCAL_IP_ADDR, attr_content, &attr_contentlen); if ( attr_contentlen ) { _rtw_memcpy(ptdlsinfo->wfd_info->peer_ip_address, ( attr_content + 1 ), 4); DBG_871X( "[%s] Peer IP = %02u.%02u.%02u.%02u \n", __FUNCTION__, ptdlsinfo->wfd_info->peer_ip_address[0], ptdlsinfo->wfd_info->peer_ip_address[1], ptdlsinfo->wfd_info->peer_ip_address[2], ptdlsinfo->wfd_info->peer_ip_address[3] ); } wfd_offset = rtw_get_wfd_ie( ptr + wfd_offset, length - wfd_offset, wfd_ie, &wfd_ielen ); } } int issue_tunneled_probe_req(_adapter *padapter) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); u8 baddr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; struct tdls_txmgmt txmgmt; int ret = _FAIL; DBG_871X("[%s]\n", __FUNCTION__); _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); txmgmt.action_code = TUNNELED_PROBE_REQ; if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto exit; } //update attribute pattrib = &pmgntframe->attrib; pmgntframe->frame_tag = DATA_FRAMETAG; pattrib->ether_type = 0x890d; _rtw_memcpy(pattrib->dst, baddr, ETH_ALEN); _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); update_tdls_attrib(padapter, pattrib); pattrib->qsel = pattrib->priority; if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); rtw_free_xmitframe(pxmitpriv, pmgntframe); goto exit; } dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; exit: return ret; } int issue_tunneled_probe_rsp(_adapter *padapter, union recv_frame *precv_frame) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct tdls_txmgmt txmgmt; int ret = _FAIL; DBG_871X("[%s]\n", __FUNCTION__); _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); txmgmt.action_code = TUNNELED_PROBE_RSP; if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto exit; } //update attribute pattrib = &pmgntframe->attrib; pmgntframe->frame_tag = DATA_FRAMETAG; pattrib->ether_type = 0x890d; _rtw_memcpy(pattrib->dst, precv_frame->u.hdr.attrib.src, ETH_ALEN); _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); update_tdls_attrib(padapter, pattrib); pattrib->qsel = pattrib->priority; if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); rtw_free_xmitframe(pxmitpriv, pmgntframe); goto exit; } dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; exit: return ret; } #endif //CONFIG_WFD int issue_tdls_setup_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack) { struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info *ptdls_sta= NULL; _irqL irqL; static u8 dialogtoken = 0; int ret = _FAIL; u32 timeout_interval= TPK_RESEND_COUNT * 1000; //retry timer should set at least 301 sec, using TPK_count counting 301 times. ptxmgmt->action_code = TDLS_SETUP_REQUEST; if(ptdlsinfo->ap_prohibited == _TRUE) goto exit; if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto exit; } //update attribute pattrib = &pmgntframe->attrib; pmgntframe->frame_tag = DATA_FRAMETAG; pattrib->ether_type = 0x890d; _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); update_tdls_attrib(padapter, pattrib); //init peer sta_info ptdls_sta = rtw_get_stainfo(pstapriv, ptxmgmt->peer); if(ptdls_sta==NULL) { ptdls_sta = rtw_alloc_stainfo(pstapriv, ptxmgmt->peer); if(ptdls_sta==NULL) { DBG_871X("[%s] rtw_alloc_stainfo fail\n", __FUNCTION__); rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); rtw_free_xmitframe(pxmitpriv, pmgntframe); goto exit; } } if(!(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)) ptdlsinfo->sta_cnt++; if( ptdlsinfo->sta_cnt == (NUM_STA - 2 - 4) ) // -2: AP + BC/MC sta, -4: default key { ptdlsinfo->sta_maximum = _TRUE; } ptdls_sta->tdls_sta_state |= TDLS_RESPONDER_STATE; //for tdls; ptdls_sta->aid is used to fill dialogtoken ptdls_sta->dialog = dialogtoken; dialogtoken = (dialogtoken+1)%256; ptdls_sta->TDLS_PeerKey_Lifetime = timeout_interval; _set_timer( &ptdls_sta->handshake_timer, TDLS_HANDSHAKE_TIME ); pattrib->qsel = pattrib->priority; if(rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) !=_SUCCESS ){ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); rtw_free_xmitframe(pxmitpriv, pmgntframe); goto exit; } if (wait_ack) { ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); } else { dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; } ret = _SUCCESS; exit: return ret; } int issue_tdls_teardown(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 wait_ack) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info *ptdls_sta=NULL; _irqL irqL; int ret = _FAIL; ptxmgmt->action_code = TDLS_TEARDOWN; ptdls_sta = rtw_get_stainfo(pstapriv, ptxmgmt->peer); if(ptdls_sta==NULL){ DBG_871X("Np tdls_sta for tearing down\n"); goto exit; } if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto exit; } //update attribute pattrib = &pmgntframe->attrib; pmgntframe->frame_tag = DATA_FRAMETAG; pattrib->ether_type = 0x890d; _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); update_tdls_attrib(padapter, pattrib); pattrib->qsel = pattrib->priority; if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); rtw_free_xmitframe(pxmitpriv, pmgntframe); goto exit; } if (wait_ack) { ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); } else { dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; } if(ret == _SUCCESS) { if(ptdls_sta->tdls_sta_state & TDLS_CH_SWITCH_ON_STATE){ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CS_OFF); } if( ptdls_sta->timer_flag == 1 ) { _enter_critical_bh(&(padapter->tdlsinfo.hdl_lock), &irqL); ptdls_sta->timer_flag = 2; _exit_critical_bh(&(padapter->tdlsinfo.hdl_lock), &irqL); } else rtw_tdls_cmd(padapter, ptxmgmt->peer, TDLS_TEAR_STA ); } exit: return ret; } int issue_tdls_dis_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); int ret = _FAIL; ptxmgmt->action_code = TDLS_DISCOVERY_REQUEST; if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto exit; } //update attribute pattrib = &pmgntframe->attrib; pmgntframe->frame_tag = DATA_FRAMETAG; pattrib->ether_type = 0x890d; _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); update_tdls_attrib(padapter, pattrib); pattrib->qsel = pattrib->priority; if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); rtw_free_xmitframe(pxmitpriv, pmgntframe); goto exit; } dump_mgntframe(padapter, pmgntframe); DBG_871X("issue tdls dis req\n"); ret = _SUCCESS; exit: return ret; } int issue_tdls_setup_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); int ret = _FAIL; ptxmgmt->action_code = TDLS_SETUP_RESPONSE; if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto exit; } //update attribute pattrib = &pmgntframe->attrib; pmgntframe->frame_tag = DATA_FRAMETAG; pattrib->ether_type = 0x890d; _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pattrib->ra, get_bssid(&(padapter->mlmepriv)), ETH_ALEN); _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); update_tdls_attrib(padapter, pattrib); pattrib->qsel = pattrib->priority; if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); rtw_free_xmitframe(pxmitpriv, pmgntframe); goto exit; } dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; exit: return ret; } int issue_tdls_setup_cfm(_adapter *padapter, struct tdls_txmgmt *ptxmgmt) { struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); int ret = _FAIL; ptxmgmt->action_code = TDLS_SETUP_CONFIRM; if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto exit; } //update attribute pattrib = &pmgntframe->attrib; pmgntframe->frame_tag = DATA_FRAMETAG; pattrib->ether_type = 0x890d; _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); _rtw_memcpy(pattrib->src, myid(&padapter->eeprompriv), ETH_ALEN); _rtw_memcpy(pattrib->ra, get_bssid(&padapter->mlmepriv), ETH_ALEN); _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); update_tdls_attrib(padapter, pattrib); pattrib->qsel = pattrib->priority; if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); rtw_free_xmitframe(pxmitpriv, pmgntframe); goto exit; } dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; exit: return ret; } //TDLS Discovery Response frame is a management action frame int issue_tdls_dis_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 privacy) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); int ret = _FAIL; if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto exit; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; // unicast probe request frame _rtw_memcpy(pwlanhdr->addr1, ptxmgmt->peer, ETH_ALEN); _rtw_memcpy(pattrib->dst, pwlanhdr->addr1, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&padapter->eeprompriv), ETH_ALEN); _rtw_memcpy(pattrib->src, pwlanhdr->addr2, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_bssid(&padapter->mlmepriv), ETH_ALEN); _rtw_memcpy(pattrib->ra, pwlanhdr->addr3, ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_ACTION); pframe += sizeof (struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); rtw_build_tdls_dis_rsp_ies(padapter, pmgntframe, pframe, ptxmgmt->dialog_token, privacy); pattrib->nr_frags = 1; pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; exit: return ret; } int issue_tdls_peer_traffic_rsp(_adapter *padapter, struct sta_info *ptdls_sta) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct tdls_txmgmt txmgmt; int ret = _FAIL; _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); txmgmt.action_code = TDLS_PEER_TRAFFIC_RESPONSE; if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto exit; } //update attribute pattrib = &pmgntframe->attrib; pmgntframe->frame_tag = DATA_FRAMETAG; pattrib->ether_type = 0x890d; _rtw_memcpy(pattrib->dst, ptdls_sta->hwaddr, ETH_ALEN); _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); update_tdls_attrib(padapter, pattrib); pattrib->qsel = pattrib->priority; if(rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) !=_SUCCESS ){ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); rtw_free_xmitframe(pxmitpriv, pmgntframe); goto exit; } dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; exit: return ret; } int issue_tdls_peer_traffic_indication(_adapter *padapter, struct sta_info *ptdls_sta) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct tdls_txmgmt txmgmt; int ret = _FAIL; static u8 dialogtoken=0; _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); txmgmt.action_code = TDLS_PEER_TRAFFIC_INDICATION; if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto exit; } //update attribute pattrib = &pmgntframe->attrib; pmgntframe->frame_tag = DATA_FRAMETAG; pattrib->ether_type = 0x890d; _rtw_memcpy(pattrib->dst, ptdls_sta->hwaddr, ETH_ALEN); _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); //for tdls; pattrib->nr_frags is used to fill dialogtoken ptdls_sta->dialog = dialogtoken; dialogtoken = (dialogtoken+1)%256; //PTI frame's priority should be AC_VO pattrib->priority = 7; update_tdls_attrib(padapter, pattrib); pattrib->qsel = pattrib->priority; if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); rtw_free_xmitframe(pxmitpriv, pmgntframe); goto exit; } dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; exit: return ret; } int issue_tdls_ch_switch_req(_adapter *padapter, u8 *mac_addr) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct tdls_txmgmt txmgmt; int ret = _FAIL; _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); txmgmt.action_code = TDLS_CHANNEL_SWITCH_REQUEST; if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto exit; } //update attribute pattrib = &pmgntframe->attrib; pmgntframe->frame_tag = DATA_FRAMETAG; pattrib->ether_type = 0x890d; _rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN); _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); update_tdls_attrib(padapter, pattrib); pattrib->qsel = pattrib->priority; if(rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) !=_SUCCESS ){ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); rtw_free_xmitframe(pxmitpriv, pmgntframe); goto exit; } dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; exit: return ret; } int issue_tdls_ch_switch_rsp(_adapter *padapter, u8 *mac_addr) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct tdls_txmgmt txmgmt; int ret = _FAIL; _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); txmgmt.action_code = TDLS_CHANNEL_SWITCH_RESPONSE; if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto exit; } //update attribute pattrib = &pmgntframe->attrib; pmgntframe->frame_tag = DATA_FRAMETAG; pattrib->ether_type = 0x890d; _rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN); _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); update_tdls_attrib(padapter, pattrib); pattrib->qsel = pattrib->priority; /* _enter_critical_bh(&pxmitpriv->lock, &irqL); if(xmitframe_enqueue_for_tdls_sleeping_sta(padapter, pmgntframe)==_TRUE){ _exit_critical_bh(&pxmitpriv->lock, &irqL); return _FALSE; } */ if(rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) !=_SUCCESS ){ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); rtw_free_xmitframe(pxmitpriv, pmgntframe); goto exit; } dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; exit: return ret; } int On_TDLS_Dis_Rsp(_adapter *padapter, union recv_frame *precv_frame) { struct sta_info *ptdls_sta = NULL, *psta = rtw_get_stainfo(&(padapter->stapriv), get_bssid(&(padapter->mlmepriv))); struct recv_priv *precvpriv = &(padapter->recvpriv); u8 *ptr = precv_frame->u.hdr.rx_data, *psa; struct rx_pkt_attrib *pattrib = &(precv_frame->u.hdr.attrib); struct tdls_info *ptdlsinfo = &(padapter->tdlsinfo); u8 empty_addr[ETH_ALEN] = { 0x00 }; int UndecoratedSmoothedPWDB; struct tdls_txmgmt txmgmt; int ret = _SUCCESS; _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); //WFDTDLS: for sigma test, not to setup direct link automatically ptdlsinfo->dev_discovered = 1; #ifdef CONFIG_TDLS_AUTOSETUP psa = get_sa(ptr); ptdls_sta = rtw_get_stainfo(&(padapter->stapriv), psa); if(ptdls_sta != NULL) { ptdls_sta->tdls_sta_state |= TDLS_ALIVE_STATE; //Record the tdls sta with lowest signal strength if( (ptdlsinfo->sta_maximum == _TRUE) && (ptdls_sta->alive_count >= 1) ) { if( _rtw_memcmp(ptdlsinfo->ss_record.macaddr, empty_addr, ETH_ALEN) ) { _rtw_memcpy(ptdlsinfo->ss_record.macaddr, psa, ETH_ALEN); ptdlsinfo->ss_record.RxPWDBAll = pattrib->RxPWDBAll; } else { if( ptdlsinfo->ss_record.RxPWDBAll < pattrib->RxPWDBAll ) { _rtw_memcpy(ptdlsinfo->ss_record.macaddr, psa, ETH_ALEN); ptdlsinfo->ss_record.RxPWDBAll = pattrib->RxPWDBAll; } } } } else { if( ptdlsinfo->sta_maximum == _TRUE) { if( _rtw_memcmp( ptdlsinfo->ss_record.macaddr, empty_addr, ETH_ALEN ) ) { //All traffics are busy, do not set up another direct link. ret = _FAIL; goto exit; } else { if( pattrib->RxPWDBAll > ptdlsinfo->ss_record.RxPWDBAll ) { _rtw_memcpy(txmgmt.peer, ptdlsinfo->ss_record.macaddr, ETH_ALEN); //issue_tdls_teardown(padapter, ptdlsinfo->ss_record.macaddr, _FALSE); } else { ret = _FAIL; goto exit; } } } padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_UNDERCORATEDSMOOTHEDPWDB, &UndecoratedSmoothedPWDB); if( pattrib->RxPWDBAll + TDLS_SIGNAL_THRESH >= UndecoratedSmoothedPWDB); { DBG_871X("pattrib->RxPWDBAll=%d, pdmpriv->UndecoratedSmoothedPWDB=%d\n", pattrib->RxPWDBAll, UndecoratedSmoothedPWDB); _rtw_memcpy(txmgmt.peer, psa, ETH_ALEN); issue_tdls_setup_req(padapter, &txmgmt, _FALSE); } } #endif //CONFIG_TDLS_AUTOSETUP exit: return ret; } sint On_TDLS_Setup_Req(_adapter *padapter, union recv_frame *precv_frame) { struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; u8 *psa, *pmyid; struct sta_info *ptdls_sta= NULL; struct sta_priv *pstapriv = &padapter->stapriv; u8 *ptr = precv_frame->u.hdr.rx_data; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct security_priv *psecuritypriv = &padapter->securitypriv; _irqL irqL; struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; u8 *prsnie, *ppairwise_cipher; u8 i, k; u8 ccmp_included=0, rsnie_included=0; u16 j, pairwise_count; u8 SNonce[32]; u32 *timeout_interval=NULL; sint parsing_length; //frame body length, without icv_len PNDIS_802_11_VARIABLE_IEs pIE; u8 FIXED_IE = 5; unsigned char supportRate[16]; int supportRateNum = 0; struct tdls_txmgmt txmgmt; _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); psa = get_sa(ptr); ptdls_sta = rtw_get_stainfo(pstapriv, psa); pmyid=myid(&(padapter->eeprompriv)); ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len -prx_pkt_attrib->hdrlen -prx_pkt_attrib->iv_len -prx_pkt_attrib->icv_len -LLC_HEADER_SIZE -ETH_TYPE_LEN -PAYLOAD_TYPE_LEN -FIXED_IE; if(ptdlsinfo->ap_prohibited == _TRUE) { goto exit; } if(ptdls_sta==NULL){ ptdls_sta = rtw_alloc_stainfo(pstapriv, psa); }else{ if(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE){ //If the direct link is already set up //Process as re-setup after tear down DBG_871X("re-setup a direct link\n"); } //already receiving TDLS setup request else if(ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE){ DBG_871X("receive duplicated TDLS setup request frame in handshaking\n"); goto exit; } //When receiving and sending setup_req to the same link at the same time, STA with higher MAC_addr would be initiator //following is to check out MAC_addr else if(ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE){ DBG_871X("receive setup_req after sending setup_req\n"); for (i=0;i<6;i++){ if(*(pmyid+i)==*(psa+i)){ } else if(*(pmyid+i)>*(psa+i)){ ptdls_sta->tdls_sta_state=TDLS_INITIATOR_STATE; break; }else if(*(pmyid+i)<*(psa+i)){ goto exit; } } } } if(ptdls_sta) { ptdls_sta->dialog = *(ptr+2); //copy dialog token ptdls_sta->stat_code = 0; //parsing information element for(j=FIXED_IE; jElementID) { case _SUPPORTEDRATES_IE_: _rtw_memcpy(supportRate, pIE->data, pIE->Length); supportRateNum = pIE->Length; break; case _COUNTRY_IE_: break; case _EXT_SUPPORTEDRATES_IE_: if(supportRateNum<=sizeof(supportRate)) { _rtw_memcpy(supportRate+supportRateNum, pIE->data, pIE->Length); supportRateNum += pIE->Length; } break; case _SUPPORTED_CH_IE_: break; case _RSN_IE_2_: rsnie_included=1; if(prx_pkt_attrib->encrypt){ prsnie=(u8*)pIE; //check whether initiator STA has CCMP pairwise_cipher. ppairwise_cipher=prsnie+10; _rtw_memcpy(ptdls_sta->TDLS_RSNIE, pIE->data, pIE->Length); pairwise_count = *(u16*)(ppairwise_cipher-2); for(k=0;kstat_code=72; } } break; case _EXT_CAP_IE_: break; case _VENDOR_SPECIFIC_IE_: break; case _FTIE_: if(prx_pkt_attrib->encrypt) _rtw_memcpy(SNonce, (ptr+j+52), 32); break; case _TIMEOUT_ITVL_IE_: if(prx_pkt_attrib->encrypt) timeout_interval = (u32 *)(ptr+j+3); break; case _RIC_Descriptor_IE_: break; case _HT_CAPABILITY_IE_: rtw_tdls_process_ht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); break; case EID_BSSCoexistence: break; case _LINK_ID_IE_: if(_rtw_memcmp(get_bssid(pmlmepriv), pIE->data, 6) == _FALSE) { //not in the same BSS ptdls_sta->stat_code=7; } break; default: break; } j += (pIE->Length + 2); } //check status code //if responder STA has/hasn't security on AP, but request hasn't/has RSNIE, it should reject if(ptdls_sta->stat_code == 0 ) { if(rsnie_included && (prx_pkt_attrib->encrypt==0)){ //security disabled ptdls_sta->stat_code = 5; }else if(rsnie_included==0 && (prx_pkt_attrib->encrypt)){ //request haven't RSNIE ptdls_sta->stat_code = 38; } #ifdef CONFIG_WFD //WFD test plan version 0.18.2 test item 5.1.5 //SoUT does not use TDLS if AP uses weak security if ( padapter->wdinfo.wfd_tdls_enable ) { if(rsnie_included && (prx_pkt_attrib->encrypt != _AES_)) { ptdls_sta->stat_code = 5; } } #endif //CONFIG_WFD } ptdls_sta->tdls_sta_state|= TDLS_INITIATOR_STATE; if(prx_pkt_attrib->encrypt){ _rtw_memcpy(ptdls_sta->SNonce, SNonce, 32); _rtw_memcpy(&(ptdls_sta->TDLS_PeerKey_Lifetime), timeout_interval, 4); } //update station supportRate ptdls_sta->bssratelen = supportRateNum; _rtw_memcpy(ptdls_sta->bssrateset, supportRate, supportRateNum); if(!(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)) ptdlsinfo->sta_cnt++; if( ptdlsinfo->sta_cnt == (NUM_STA - 2 - 4) ) // -2: AP + BC/MC sta, -4: default key { ptdlsinfo->sta_maximum = _TRUE; } #ifdef CONFIG_WFD rtw_tdls_process_wfd_ie(ptdlsinfo, ptr + FIXED_IE, parsing_length - FIXED_IE); #endif // CONFIG_WFD } else { goto exit; } _rtw_memcpy(txmgmt.peer, prx_pkt_attrib->src, ETH_ALEN); issue_tdls_setup_rsp(padapter, &txmgmt); if(ptdls_sta->stat_code==0) { _set_timer( &ptdls_sta->handshake_timer, TDLS_HANDSHAKE_TIME); } else //status code!=0 ; setup unsuccess { free_tdls_sta(padapter, ptdls_sta); } exit: return _SUCCESS; } int On_TDLS_Setup_Rsp(_adapter *padapter, union recv_frame *precv_frame) { struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; struct sta_info *ptdls_sta= NULL; struct sta_priv *pstapriv = &padapter->stapriv; u8 *ptr = precv_frame->u.hdr.rx_data; _irqL irqL; struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; u8 *psa; u16 stat_code; sint parsing_length; //frame body length, without icv_len PNDIS_802_11_VARIABLE_IEs pIE; u8 FIXED_IE =7; u8 ANonce[32]; u8 *pftie=NULL, *ptimeout_ie=NULL, *plinkid_ie=NULL, *prsnie=NULL, *pftie_mic=NULL, *ppairwise_cipher=NULL; u16 pairwise_count, j, k; u8 verify_ccmp=0; unsigned char supportRate[16]; int supportRateNum = 0; struct tdls_txmgmt txmgmt; int ret = _SUCCESS; _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); psa = get_sa(ptr); ptdls_sta = rtw_get_stainfo(pstapriv, psa); if ( NULL == ptdls_sta ) { ret = _FAIL; goto exit; } ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len -prx_pkt_attrib->hdrlen -prx_pkt_attrib->iv_len -prx_pkt_attrib->icv_len -LLC_HEADER_SIZE -TYPE_LENGTH_FIELD_SIZE -1 -FIXED_IE; _rtw_memcpy(&stat_code, ptr+2, 2); if(stat_code!=0) { DBG_871X( "[%s] status_code = %d, free_tdls_sta\n", __FUNCTION__, stat_code ); free_tdls_sta(padapter, ptdls_sta); ret = _FAIL; goto exit; } stat_code = 0; //parsing information element for(j=FIXED_IE; jElementID) { case _SUPPORTEDRATES_IE_: _rtw_memcpy(supportRate, pIE->data, pIE->Length); supportRateNum = pIE->Length; break; case _COUNTRY_IE_: break; case _EXT_SUPPORTEDRATES_IE_: if(supportRateNum<=sizeof(supportRate)) { _rtw_memcpy(supportRate+supportRateNum, pIE->data, pIE->Length); supportRateNum += pIE->Length; } break; case _SUPPORTED_CH_IE_: break; case _RSN_IE_2_: prsnie=(u8*)pIE; //check whether responder STA has CCMP pairwise_cipher. ppairwise_cipher=prsnie+10; _rtw_memcpy(&pairwise_count, (u16*)(ppairwise_cipher-2), 2); for(k=0;kANonce, (ptr+j+20), 32); _rtw_memcpy(ANonce, (ptr+j+20), 32); break; case _TIMEOUT_ITVL_IE_: ptimeout_ie=(u8*)pIE; break; case _RIC_Descriptor_IE_: break; case _HT_CAPABILITY_IE_: rtw_tdls_process_ht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); break; case EID_BSSCoexistence: break; case _LINK_ID_IE_: plinkid_ie=(u8*)pIE; break; default: break; } j += (pIE->Length + 2); } //update station's supportRate ptdls_sta->bssratelen = supportRateNum; _rtw_memcpy(ptdls_sta->bssrateset, supportRate, supportRateNum); _rtw_memcpy(ptdls_sta->ANonce, ANonce, 32); #ifdef CONFIG_WFD rtw_tdls_process_wfd_ie(ptdlsinfo, ptr + FIXED_IE, parsing_length - FIXED_IE); #endif // CONFIG_WFD if(stat_code != 0) { ptdls_sta->stat_code = stat_code; } else { if(prx_pkt_attrib->encrypt) { if(verify_ccmp==1) { wpa_tdls_generate_tpk(padapter, ptdls_sta); ptdls_sta->stat_code=0; if(tdls_verify_mic(ptdls_sta->tpk.kck, 2, plinkid_ie, prsnie, ptimeout_ie, pftie)==0) //0: Invalid, 1: valid { free_tdls_sta(padapter, ptdls_sta); ret = _FAIL; goto exit; } } else { ptdls_sta->stat_code=72; //invalide contents of RSNIE } }else{ ptdls_sta->stat_code=0; } } DBG_871X("issue_tdls_setup_cfm\n"); _rtw_memcpy(txmgmt.peer, prx_pkt_attrib->src, ETH_ALEN); issue_tdls_setup_cfm(padapter, &txmgmt); if(ptdls_sta->stat_code==0) { ptdlsinfo->link_established = _TRUE; if( ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE ) { ptdls_sta->tdls_sta_state |= TDLS_LINKED_STATE; _cancel_timer_ex( &ptdls_sta->handshake_timer); } rtw_tdls_set_key(padapter, prx_pkt_attrib, ptdls_sta); rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_ESTABLISHED); } exit: return ret; } int On_TDLS_Setup_Cfm(_adapter *padapter, union recv_frame *precv_frame) { struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; struct sta_info *ptdls_sta= NULL; struct sta_priv *pstapriv = &padapter->stapriv; u8 *ptr = precv_frame->u.hdr.rx_data; _irqL irqL; struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; u8 *psa; u16 stat_code; sint parsing_length; PNDIS_802_11_VARIABLE_IEs pIE; u8 FIXED_IE =5; u8 *pftie=NULL, *ptimeout_ie=NULL, *plinkid_ie=NULL, *prsnie=NULL, *pftie_mic=NULL, *ppairwise_cipher=NULL; u16 j, pairwise_count; int ret = _SUCCESS; psa = get_sa(ptr); ptdls_sta = rtw_get_stainfo(pstapriv, psa); if(ptdls_sta == NULL) { DBG_871X( "[%s] Direct Link Peer = "MAC_FMT" not found\n", __FUNCTION__, MAC_ARG(psa) ); ret = _FAIL; goto exit; } ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len -prx_pkt_attrib->hdrlen -prx_pkt_attrib->iv_len -prx_pkt_attrib->icv_len -LLC_HEADER_SIZE -ETH_TYPE_LEN -PAYLOAD_TYPE_LEN -FIXED_IE; _rtw_memcpy(&stat_code, ptr+2, 2); if(stat_code!=0){ DBG_871X( "[%s] stat_code = %d\n, free_tdls_sta", __FUNCTION__, stat_code ); free_tdls_sta(padapter, ptdls_sta); ret = _FAIL; goto exit; } if(prx_pkt_attrib->encrypt){ //parsing information element for(j=FIXED_IE; jElementID) { case _RSN_IE_2_: prsnie=(u8*)pIE; break; case _VENDOR_SPECIFIC_IE_: break; case _FTIE_: pftie=(u8*)pIE; break; case _TIMEOUT_ITVL_IE_: ptimeout_ie=(u8*)pIE; break; case _HT_EXTRA_INFO_IE_: break; case _LINK_ID_IE_: plinkid_ie=(u8*)pIE; break; default: break; } j += (pIE->Length + 2); } //verify mic in FTIE MIC field if(tdls_verify_mic(ptdls_sta->tpk.kck, 3, plinkid_ie, prsnie, ptimeout_ie, pftie)==0){ //0: Invalid, 1: Valid free_tdls_sta(padapter, ptdls_sta); ret = _FAIL; goto exit; } } ptdlsinfo->link_established = _TRUE; if( ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE ) { ptdls_sta->tdls_sta_state|=TDLS_LINKED_STATE; _cancel_timer_ex( &ptdls_sta->handshake_timer); } rtw_tdls_set_key(padapter, prx_pkt_attrib, ptdls_sta); rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_ESTABLISHED); exit: return ret; } int On_TDLS_Dis_Req(_adapter *padapter, union recv_frame *precv_frame) { struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info *psta_ap; u8 *ptr = precv_frame->u.hdr.rx_data; sint parsing_length; //frame body length, without icv_len PNDIS_802_11_VARIABLE_IEs pIE; u8 FIXED_IE = 3, *dst; u16 j; struct tdls_txmgmt txmgmt; int ret = _SUCCESS; _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len + LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE + 1; txmgmt.dialog_token = *(ptr+2); _rtw_memcpy(&txmgmt.peer, precv_frame->u.hdr.attrib.src, ETH_ALEN); txmgmt.action_code = TDLS_DISCOVERY_RESPONSE; parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len -prx_pkt_attrib->hdrlen -prx_pkt_attrib->iv_len -prx_pkt_attrib->icv_len -LLC_HEADER_SIZE -TYPE_LENGTH_FIELD_SIZE -1 -FIXED_IE; //parsing information element for(j=FIXED_IE; jElementID) { case _LINK_ID_IE_: psta_ap = rtw_get_stainfo(pstapriv, pIE->data); if(psta_ap == NULL) { goto exit; } dst = pIE->data + 12; if( (MacAddr_isBcst(dst) == _FALSE) && (_rtw_memcmp(myid(&(padapter->eeprompriv)), dst, 6) == _FALSE) ) { goto exit; } break; default: break; } j += (pIE->Length + 2); } issue_tdls_dis_rsp(padapter, &txmgmt, prx_pkt_attrib->privacy); exit: return ret; } int On_TDLS_Teardown(_adapter *padapter, union recv_frame *precv_frame) { u8 *psa; u8 *ptr = precv_frame->u.hdr.rx_data; struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info *ptdls_sta= NULL; _irqL irqL; psa = get_sa(ptr); ptdls_sta = rtw_get_stainfo(pstapriv, psa); if(ptdls_sta!=NULL){ if(ptdls_sta->tdls_sta_state & TDLS_CH_SWITCH_ON_STATE){ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CS_OFF); } free_tdls_sta(padapter, ptdls_sta); } return _SUCCESS; } u8 TDLS_check_ch_state(uint state){ if( (state & TDLS_CH_SWITCH_ON_STATE) && (state & TDLS_AT_OFF_CH_STATE) && (state & TDLS_PEER_AT_OFF_STATE) ){ if(state & TDLS_PEER_SLEEP_STATE) return 2; //U-APSD + ch. switch else return 1; //ch. switch }else return 0; } int On_TDLS_Peer_Traffic_Indication(_adapter *padapter, union recv_frame *precv_frame) { struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; struct sta_info *ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->src); u8 *ptr = precv_frame->u.hdr.rx_data; ptr +=pattrib->hdrlen + pattrib->iv_len + LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE + 1; if(ptdls_sta != NULL) { ptdls_sta->dialog = *(ptr+2); issue_tdls_peer_traffic_rsp(padapter, ptdls_sta); //issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta->hwaddr, 0, 0, 0); } else { DBG_871X("from unknown sta:"MAC_FMT"\n", MAC_ARG(pattrib->src)); return _FAIL; } return _SUCCESS; } //we process buffered data for 1. U-APSD, 2. ch. switch, 3. U-APSD + ch. switch here int On_TDLS_Peer_Traffic_Rsp(_adapter *padapter, union recv_frame *precv_frame) { struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; struct sta_priv *pstapriv = &padapter->stapriv; //get peer sta infomation struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->src); u8 wmmps_ac=0, state=TDLS_check_ch_state(ptdls_sta->tdls_sta_state); int i; ptdls_sta->sta_stats.rx_data_pkts++; ptdls_sta->tdls_sta_state &= ~(TDLS_WAIT_PTR_STATE); //receive peer traffic response frame, sleeping STA wakes up //ptdls_sta->tdls_sta_state &= ~(TDLS_PEER_SLEEP_STATE); //process_wmmps_data( padapter, precv_frame); // if noticed peer STA wakes up by receiving peer traffic response // and we want to do channel swtiching, then we will transmit channel switch request first if(ptdls_sta->tdls_sta_state & TDLS_APSD_CHSW_STATE){ issue_tdls_ch_switch_req(padapter, pattrib->src); ptdls_sta->tdls_sta_state &= ~(TDLS_APSD_CHSW_STATE); return _SUCCESS; } //check 4-AC queue bit if(ptdls_sta->uapsd_vo || ptdls_sta->uapsd_vi || ptdls_sta->uapsd_be || ptdls_sta->uapsd_bk) wmmps_ac=1; //if it's a direct link and have buffered frame if(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE){ //[TDLS] UAPSD //if(wmmps_ac && state) if(wmmps_ac && 1) { _irqL irqL; _list *xmitframe_plist, *xmitframe_phead; struct xmit_frame *pxmitframe=NULL; _enter_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); xmitframe_phead = get_list_head(&ptdls_sta->sleep_q); xmitframe_plist = get_next(xmitframe_phead); //transmit buffered frames while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); xmitframe_plist = get_next(xmitframe_plist); rtw_list_delete(&pxmitframe->list); ptdls_sta->sleepq_len--; ptdls_sta->sleepq_ac_len--; if(ptdls_sta->sleepq_len>0){ pxmitframe->attrib.mdata = 1; pxmitframe->attrib.eosp = 0; }else{ pxmitframe->attrib.mdata = 0; pxmitframe->attrib.eosp = 1; } pxmitframe->attrib.triggered = 1; rtw_hal_xmitframe_enqueue(padapter, pxmitframe); } if(ptdls_sta->sleepq_len==0) { DBG_871X("no buffered packets for tdls to xmit\n"); //on U-APSD + CH. switch state, when there is no buffered date to xmit, // we should go back to base channel if(state==2){ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CS_OFF); }else if(ptdls_sta->tdls_sta_state&TDLS_SW_OFF_STATE){ ptdls_sta->tdls_sta_state &= ~(TDLS_SW_OFF_STATE); ptdlsinfo->candidate_ch= pmlmeext->cur_channel; issue_tdls_ch_switch_req(padapter, pattrib->src); DBG_871X("issue tdls ch switch req back to base channel\n"); } } else { DBG_871X("error!psta->sleepq_len=%d\n", ptdls_sta->sleepq_len); ptdls_sta->sleepq_len=0; } _exit_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); } } return _SUCCESS; } sint On_TDLS_Ch_Switch_Req(_adapter *padapter, union recv_frame *precv_frame) { struct sta_info *ptdls_sta= NULL; struct sta_priv *pstapriv = &padapter->stapriv; u8 *ptr = precv_frame->u.hdr.rx_data; struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; u8 *psa; sint parsing_length; PNDIS_802_11_VARIABLE_IEs pIE; u8 FIXED_IE =3; u16 j; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; psa = get_sa(ptr); ptdls_sta = rtw_get_stainfo(pstapriv, psa); ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len -prx_pkt_attrib->hdrlen -prx_pkt_attrib->iv_len -prx_pkt_attrib->icv_len -LLC_HEADER_SIZE -ETH_TYPE_LEN -PAYLOAD_TYPE_LEN -FIXED_IE; ptdls_sta->off_ch = *(ptr+2); //parsing information element for(j=FIXED_IE; jElementID) { case _COUNTRY_IE_: break; case _CH_SWTICH_ANNOUNCE_: break; case _LINK_ID_IE_: break; case _CH_SWITCH_TIMING_: _rtw_memcpy(&ptdls_sta->ch_switch_time, pIE->data, 2); _rtw_memcpy(&ptdls_sta->ch_switch_timeout, pIE->data+2, 2); default: break; } j += (pIE->Length + 2); } //todo: check status ptdls_sta->stat_code=0; ptdls_sta->tdls_sta_state |= TDLS_CH_SWITCH_ON_STATE; issue_nulldata(padapter, NULL, 1, 0, 0); issue_tdls_ch_switch_rsp(padapter, psa); DBG_871X("issue tdls channel switch response\n"); if((ptdls_sta->tdls_sta_state & TDLS_CH_SWITCH_ON_STATE) && ptdls_sta->off_ch==pmlmeext->cur_channel){ DBG_871X("back to base channel %x\n", pmlmeext->cur_channel); ptdls_sta->option=TDLS_BASE_CH; rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_BASE_CH); }else{ ptdls_sta->option=TDLS_OFF_CH; rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_OFF_CH); } return _SUCCESS; } sint On_TDLS_Ch_Switch_Rsp(_adapter *padapter, union recv_frame *precv_frame) { struct sta_info *ptdls_sta= NULL; struct sta_priv *pstapriv = &padapter->stapriv; u8 *ptr = precv_frame->u.hdr.rx_data; struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; u8 *psa; sint parsing_length; PNDIS_802_11_VARIABLE_IEs pIE; u8 FIXED_IE =4; u16 stat_code, j, switch_time, switch_timeout; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; int ret = _SUCCESS; psa = get_sa(ptr); ptdls_sta = rtw_get_stainfo(pstapriv, psa); //if channel switch is running and receiving Unsolicited TDLS Channel Switch Response, //it will go back to base channel and terminate this channel switch procedure if(ptdls_sta->tdls_sta_state & TDLS_CH_SWITCH_ON_STATE ){ if(pmlmeext->cur_channel==ptdls_sta->off_ch){ DBG_871X("back to base channel %x\n", pmlmeext->cur_channel); ptdls_sta->option=TDLS_BASE_CH; rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_BASE_CH); }else{ DBG_871X("receive unsolicited channel switch response \n"); rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CS_OFF); } ret = _FAIL; goto exit; } //avoiding duplicated or unconditional ch. switch. rsp if(!(ptdls_sta->tdls_sta_state & TDLS_CH_SW_INITIATOR_STATE)) { ret = _FAIL; goto exit; } ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len -prx_pkt_attrib->hdrlen -prx_pkt_attrib->iv_len -prx_pkt_attrib->icv_len -LLC_HEADER_SIZE -ETH_TYPE_LEN -PAYLOAD_TYPE_LEN -FIXED_IE; _rtw_memcpy(&stat_code, ptr+2, 2); if(stat_code!=0){ ret = _FAIL; goto exit; } //parsing information element for(j=FIXED_IE; jElementID) { case _LINK_ID_IE_: break; case _CH_SWITCH_TIMING_: _rtw_memcpy(&switch_time, pIE->data, 2); if(switch_time > ptdls_sta->ch_switch_time) _rtw_memcpy(&ptdls_sta->ch_switch_time, &switch_time, 2); _rtw_memcpy(&switch_timeout, pIE->data+2, 2); if(switch_timeout > ptdls_sta->ch_switch_timeout) _rtw_memcpy(&ptdls_sta->ch_switch_timeout, &switch_timeout, 2); default: break; } j += (pIE->Length + 2); } ptdls_sta->tdls_sta_state &= ~(TDLS_CH_SW_INITIATOR_STATE); ptdls_sta->tdls_sta_state |=TDLS_CH_SWITCH_ON_STATE; //goto set_channel_workitem_callback() ptdls_sta->option=TDLS_OFF_CH; rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_OFF_CH); exit: return ret; } #ifdef CONFIG_WFD void wfd_ie_tdls(_adapter * padapter, u8 *pframe, u32 *pktlen ) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wifi_display_info *pwfd_info = padapter->tdlsinfo.wfd_info; u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; u32 wfdielen = 0; // WFD OUI wfdielen = 0; wfdie[ wfdielen++ ] = 0x50; wfdie[ wfdielen++ ] = 0x6F; wfdie[ wfdielen++ ] = 0x9A; wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 // Commented by Albert 20110825 // According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes // 1. WFD Device Information // 2. Associated BSSID ( Optional ) // 3. Local IP Adress ( Optional ) // WFD Device Information ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value1: // WFD device information // available for WFD session + Preferred TDLS + WSD ( WFD Service Discovery ) RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_WSD); wfdielen += 2; // Value2: // Session Management Control Port // Default TCP port for RTSP messages is 554 RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); wfdielen += 2; // Value3: // WFD Device Maximum Throughput // 300Mbps is the maximum throughput RTW_PUT_BE16(wfdie + wfdielen, 300); wfdielen += 2; // Associated BSSID ATTR // Type: wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0006); wfdielen += 2; // Value: // Associated BSSID if ( check_fwstate( pmlmepriv, _FW_LINKED) == _TRUE ) { _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); } else { _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); } // Local IP Address ATTR wfdie[ wfdielen++ ] = WFD_ATTR_LOCAL_IP_ADDR; // Length: // Note: In the WFD specification, the size of length field is 2. RTW_PUT_BE16(wfdie + wfdielen, 0x0005); wfdielen += 2; // Version: // 0x01: Version1;IPv4 wfdie[ wfdielen++ ] = 0x01; // IPv4 Address _rtw_memcpy( wfdie + wfdielen, pwfd_info->ip_address, 4 ); wfdielen += 4; pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, pktlen); } #endif //CONFIG_WFD void rtw_build_tdls_setup_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; struct pkt_attrib *pattrib = &pxmitframe->attrib; struct registry_priv *pregistrypriv = &padapter->registrypriv; struct sta_info *ptdls_sta=rtw_get_stainfo( (&padapter->stapriv) , pattrib->dst); u8 payload_type = 0x02; u8 category = RTW_WLAN_CATEGORY_TDLS; u8 action = TDLS_SETUP_REQUEST; u8 bssrate[NDIS_802_11_LENGTH_RATES_EX]; //Use NDIS_802_11_LENGTH_RATES_EX in order to call func.rtw_set_supported_rate int bssrate_len = 0, i = 0 ; u8 more_supportedrates = 0; unsigned int ie_len; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; u8 link_id_addr[18] = {0}; u8 iedata=0; u8 sup_ch[ 30 * 2 ] = {0x00 }, sup_ch_idx = 0, idx_5g = 2; //For supported channel u8 timeout_itvl[5]; //set timeout interval to maximum value u32 time; u8 *pframe_head; //SNonce if(pattrib->encrypt){ for(i=0;i<8;i++){ time=rtw_get_current_time(); _rtw_memcpy(&ptdls_sta->SNonce[4*i], (u8 *)&time, 4); } } pframe_head = pframe; // For rtw_tdls_set_ht_cap() //payload type pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); //category, action, dialog token pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(ptdls_sta->dialog), &(pattrib->pktlen)); //capability _rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); if(pattrib->encrypt) *pframe =*pframe | cap_Privacy; pframe += 2; pattrib->pktlen += 2; //supported rates if(pmlmeext->cur_channel < 14 ) { rtw_set_supported_rate(bssrate, WIRELESS_11BG_24N); bssrate_len = IEEE80211_CCK_RATE_LEN + IEEE80211_NUM_OFDM_RATESLEN; } else { rtw_set_supported_rate(bssrate, WIRELESS_11A_5N); bssrate_len = IEEE80211_NUM_OFDM_RATESLEN; } //country(optional) if (bssrate_len > 8) { pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); more_supportedrates = 1; } else { pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); } //extended supported rates if(more_supportedrates==1){ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); } //supported channels pframe = rtw_tdls_set_sup_ch(pmlmeext, pframe, pattrib); // SRC IE pframe = rtw_set_ie( pframe, _SRC_IE_, sizeof(TDLS_SRC), TDLS_SRC, &(pattrib->pktlen)); //RSNIE if(pattrib->encrypt) pframe = rtw_set_ie(pframe, _RSN_IE_2_, sizeof(TDLS_RSNIE), TDLS_RSNIE, &(pattrib->pktlen)); //extended capabilities pframe = rtw_set_ie(pframe, _EXT_CAP_IE_ , sizeof(TDLS_EXT_CAPIE), TDLS_EXT_CAPIE, &(pattrib->pktlen)); //QoS capability(WMM_IE) pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, sizeof(TDLS_WMMIE), TDLS_WMMIE, &(pattrib->pktlen)); if(pattrib->encrypt){ //FTIE _rtw_memset(pframe, 0, 84); //All fields except SNonce shall be set to 0 _rtw_memset(pframe, _FTIE_, 1); //version _rtw_memset((pframe+1), 82, 1); //length _rtw_memcpy((pframe+52), ptdls_sta->SNonce, 32); pframe += 84; pattrib->pktlen += 84; //Timeout interval timeout_itvl[0]=0x02; _rtw_memcpy(timeout_itvl+1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4); pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); } //Sup_reg_classes(optional) //HT capabilities pframe += rtw_tdls_set_ht_cap(padapter, pframe_head, pattrib); //20/40 BSS coexistence if(pmlmepriv->num_FortyMHzIntolerant>0) iedata |= BIT(2);//20 MHz BSS Width Request pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); //Link identifier _rtw_memcpy(link_id_addr, pattrib->ra, 6); _rtw_memcpy((link_id_addr+6), pattrib->src, 6); _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); #ifdef CONFIG_WFD wfd_ie_tdls( padapter, pframe, &(pattrib->pktlen) ); #endif //CONFIG_WFD } void rtw_build_tdls_setup_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) { struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct pkt_attrib *pattrib = &pxmitframe->attrib; struct sta_info *ptdls_sta; struct registry_priv *pregistrypriv = &padapter->registrypriv; u8 payload_type = 0x02; unsigned char category = RTW_WLAN_CATEGORY_TDLS; unsigned char action = TDLS_SETUP_RESPONSE; unsigned char bssrate[NDIS_802_11_LENGTH_RATES_EX]; int bssrate_len = 0; u8 more_supportedrates = 0; unsigned int ie_len; unsigned char *p; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; u8 link_id_addr[18] = {0}; u8 iedata=0; u8 timeout_itvl[5]; //setup response timeout interval will copy from request u8 ANonce[32]; //maybe it can put in ontdls_req u8 k; //for random ANonce u8 *pftie=NULL, *ptimeout_ie=NULL, *plinkid_ie=NULL, *prsnie=NULL, *pftie_mic=NULL; u32 time; u8 *pframe_head; ptdls_sta = rtw_get_stainfo( &(padapter->stapriv) , pattrib->dst); if(ptdls_sta == NULL ) { DBG_871X("[%s] %d\n", __FUNCTION__, __LINE__); return; } if(pattrib->encrypt){ for(k=0;k<8;k++){ time=rtw_get_current_time(); _rtw_memcpy(&ptdls_sta->ANonce[4*k], (u8*)&time, 4); } } pframe_head = pframe; //payload type pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); //category, action, status code pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&ptdls_sta->stat_code, &(pattrib->pktlen)); if(ptdls_sta->stat_code!=0) //invalid setup request { DBG_871X("ptdls_sta->stat_code:%04x \n", ptdls_sta->stat_code); return; } //dialog token pframe = rtw_set_fixed_ie(pframe, 1, &(ptdls_sta->dialog), &(pattrib->pktlen)); //capability _rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); if(pattrib->encrypt ) *pframe =*pframe | cap_Privacy; pframe += 2; pattrib->pktlen += 2; //supported rates //supported rates if(pmlmeext->cur_channel < 14 ) { rtw_set_supported_rate(bssrate, WIRELESS_11BG_24N); bssrate_len = IEEE80211_CCK_RATE_LEN + IEEE80211_NUM_OFDM_RATESLEN; } else { rtw_set_supported_rate(bssrate, WIRELESS_11A_5N); bssrate_len = IEEE80211_NUM_OFDM_RATESLEN; } if (bssrate_len > 8) { pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); more_supportedrates = 1; } else { pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); } //country(optional) //extended supported rates if(more_supportedrates==1){ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); } //supported channels pframe = rtw_tdls_set_sup_ch(pmlmeext, pframe, pattrib); // SRC IE pframe = rtw_set_ie(pframe, _SRC_IE_ , sizeof(TDLS_SRC), TDLS_SRC, &(pattrib->pktlen)); //RSNIE if(pattrib->encrypt){ prsnie = pframe; pframe = rtw_set_ie(pframe, _RSN_IE_2_, sizeof(ptdls_sta->TDLS_RSNIE), ptdls_sta->TDLS_RSNIE, &(pattrib->pktlen)); } //extended capabilities pframe = rtw_set_ie(pframe, _EXT_CAP_IE_ , sizeof(TDLS_EXT_CAPIE), TDLS_EXT_CAPIE, &(pattrib->pktlen)); //QoS capability(WMM_IE) pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, sizeof(TDLS_WMMIE), TDLS_WMMIE, &(pattrib->pktlen)); if(pattrib->encrypt){ wpa_tdls_generate_tpk(padapter, ptdls_sta); //FTIE pftie = pframe; pftie_mic = pframe+4; _rtw_memset(pframe, 0, 84); //All fields except SNonce shall be set to 0 _rtw_memset(pframe, _FTIE_, 1); //version _rtw_memset((pframe+1), 82, 1); //length _rtw_memcpy((pframe+20), ptdls_sta->ANonce, 32); _rtw_memcpy((pframe+52), ptdls_sta->SNonce, 32); pframe += 84; pattrib->pktlen += 84; //Timeout interval ptimeout_ie = pframe; timeout_itvl[0]=0x02; _rtw_memcpy(timeout_itvl+1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4); pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); } //Sup_reg_classes(optional) //HT capabilities pframe += rtw_tdls_set_ht_cap(padapter, pframe_head, pattrib); //20/40 BSS coexistence if(pmlmepriv->num_FortyMHzIntolerant>0) iedata |= BIT(2);//20 MHz BSS Width Request pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); //Link identifier plinkid_ie = pframe; _rtw_memcpy(link_id_addr, pattrib->ra, 6); _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); _rtw_memcpy((link_id_addr+12), pattrib->src, 6); pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); //fill FTIE mic if(pattrib->encrypt) wpa_tdls_ftie_mic(ptdls_sta->tpk.kck, 2, plinkid_ie, prsnie, ptimeout_ie, pftie, pftie_mic); #ifdef CONFIG_WFD wfd_ie_tdls( padapter, pframe, &(pattrib->pktlen) ); #endif //CONFIG_WFD } void rtw_build_tdls_setup_cfm_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) { struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct pkt_attrib *pattrib = &pxmitframe->attrib; struct sta_info *ptdls_sta=rtw_get_stainfo( (&padapter->stapriv) , pattrib->dst); u8 payload_type = 0x02; unsigned char category = RTW_WLAN_CATEGORY_TDLS; unsigned char action = TDLS_SETUP_CONFIRM; u8 more_supportedrates = 0; unsigned int ie_len; unsigned char *p; u8 timeout_itvl[5]; //set timeout interval to maximum value u8 wmm_param_ele[24] = {0}; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; u8 link_id_addr[18] = {0}; u8 *pftie=NULL, *ptimeout_ie=NULL, *plinkid_ie=NULL, *prsnie=NULL, *pftie_mic=NULL; //payload type pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); //category, action, status code, dialog token pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&ptdls_sta->stat_code, &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(ptdls_sta->dialog), &(pattrib->pktlen)); if(ptdls_sta->stat_code!=0) //invalid setup request return; //RSNIE if(pattrib->encrypt){ prsnie = pframe; pframe = rtw_set_ie(pframe, _RSN_IE_2_, sizeof(TDLS_RSNIE), TDLS_RSNIE, &(pattrib->pktlen)); } //EDCA param set; WMM param ele. if(pattrib->encrypt){ //FTIE pftie = pframe; pftie_mic = pframe+4; _rtw_memset(pframe, 0, 84); //All fields except SNonce shall be set to 0 _rtw_memset(pframe, _FTIE_, 1); //version _rtw_memset((pframe+1), 82, 1); //length _rtw_memcpy((pframe+20), ptdls_sta->ANonce, 32); _rtw_memcpy((pframe+52), ptdls_sta->SNonce, 32); pframe += 84; pattrib->pktlen += 84; //Timeout interval ptimeout_ie = pframe; timeout_itvl[0]=0x02; _rtw_memcpy(timeout_itvl+1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4); ptdls_sta->TPK_count=0; _set_timer(&ptdls_sta->TPK_timer, ptdls_sta->TDLS_PeerKey_Lifetime/TPK_RESEND_COUNT); pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); } //HT operation; todo //Link identifier plinkid_ie = pframe; _rtw_memcpy(link_id_addr, pattrib->ra, 6); _rtw_memcpy((link_id_addr+6), pattrib->src, 6); _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); //FTIE mic if(pattrib->encrypt) wpa_tdls_ftie_mic(ptdls_sta->tpk.kck, 3, plinkid_ie, prsnie, ptimeout_ie, pftie, pftie_mic); //WMM Parameter Set if(&pmlmeinfo->WMM_param) { _rtw_memcpy(wmm_param_ele, WMM_PARA_OUI, 6); _rtw_memcpy(wmm_param_ele+6, (u8 *)&pmlmeinfo->WMM_param, sizeof(pmlmeinfo->WMM_param)); pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 24, wmm_param_ele, &(pattrib->pktlen)); } } void rtw_build_tdls_teardown_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) { struct pkt_attrib *pattrib = &pxmitframe->attrib; u8 payload_type = 0x02; unsigned char category = RTW_WLAN_CATEGORY_TDLS; u8 action = ptxmgmt->action_code; u8 link_id_addr[18] = {0}; struct sta_info *ptdls_sta = rtw_get_stainfo( &(padapter->stapriv) , pattrib->dst); //payload type pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); //category, action, reason code pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&ptxmgmt->status_code, &(pattrib->pktlen)); //Link identifier if(ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE){ _rtw_memcpy(link_id_addr, pattrib->ra, 6); _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); _rtw_memcpy((link_id_addr+12), pattrib->src, 6); }else if(ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE){ _rtw_memcpy(link_id_addr, pattrib->ra, 6); _rtw_memcpy((link_id_addr+6), pattrib->src, 6); _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); } pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); } void rtw_build_tdls_dis_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) { struct pkt_attrib *pattrib = &pxmitframe->attrib; u8 payload_type = 0x02; u8 category = RTW_WLAN_CATEGORY_TDLS; u8 action = TDLS_DISCOVERY_REQUEST; u8 link_id_addr[18] = {0}; static u8 dialogtoken=0; //payload type pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); //category, action, reason code pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); if(ptxmgmt->external_support == _TRUE) { pframe = rtw_set_fixed_ie(pframe, 1, &(ptxmgmt->dialog_token), &(pattrib->pktlen)); } else { pframe = rtw_set_fixed_ie(pframe, 1, &(dialogtoken), &(pattrib->pktlen)); dialogtoken = (dialogtoken+1)%256; } //Link identifier _rtw_memcpy(link_id_addr, pattrib->ra, 6); _rtw_memcpy((link_id_addr+6), pattrib->src, 6); _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); } void rtw_build_tdls_dis_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, u8 dialog, u8 privacy) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; struct pkt_attrib *pattrib = &pxmitframe->attrib; struct registry_priv *pregistrypriv = &padapter->registrypriv; u8 category = RTW_WLAN_CATEGORY_PUBLIC; u8 action = TDLS_DISCOVERY_RESPONSE; u8 bssrate[NDIS_802_11_LENGTH_RATES_EX]; int bssrate_len = 0; u8 more_supportedrates = 0; u8 *p; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; u8 link_id_addr[18] = {0}; u8 iedata=0; u8 timeout_itvl[5]; //set timeout interval to maximum value u32 timeout_interval= TPK_RESEND_COUNT * 1000; u8 *pframe_head, pktlen_index; pktlen_index = pattrib->pktlen; // For mgmt frame, pattrib->pktlen would count frame header pframe_head = pframe; //category, action, dialog token pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(dialog), &(pattrib->pktlen)); //capability _rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); if(privacy) *pframe =*pframe | cap_Privacy; pframe += 2; pattrib->pktlen += 2; //supported rates rtw_set_supported_rate(bssrate, WIRELESS_11BG_24N); bssrate_len = IEEE80211_CCK_RATE_LEN + IEEE80211_NUM_OFDM_RATESLEN; if (bssrate_len > 8) { pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); more_supportedrates = 1; } else { pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); } //extended supported rates if(more_supportedrates==1){ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); } //supported channels pframe = rtw_tdls_set_sup_ch(pmlmeext, pframe, pattrib); //RSNIE if(privacy) pframe = rtw_set_ie(pframe, _RSN_IE_2_, sizeof(TDLS_RSNIE), TDLS_RSNIE, &(pattrib->pktlen)); //extended capability pframe = rtw_set_ie(pframe, _EXT_CAP_IE_ , sizeof(TDLS_EXT_CAPIE), TDLS_EXT_CAPIE, &(pattrib->pktlen)); if(privacy){ //FTIE _rtw_memset(pframe, 0, 84); //All fields shall be set to 0 _rtw_memset(pframe, _FTIE_, 1); //version _rtw_memset((pframe+1), 82, 1); //length pframe += 84; pattrib->pktlen += 84; //Timeout interval timeout_itvl[0]=0x02; _rtw_memcpy(timeout_itvl+1, &timeout_interval, 4); pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); } //Sup_reg_classes(optional) //HT capabilities pframe += rtw_tdls_set_ht_cap(padapter, pframe_head - pktlen_index, pattrib); //20/40 BSS coexistence if(pmlmepriv->num_FortyMHzIntolerant>0) iedata |= BIT(2);//20 MHz BSS Width Request pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); //Link identifier _rtw_memcpy(link_id_addr, pattrib->ra, 6); _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); _rtw_memcpy((link_id_addr+12), pattrib->src, 6); pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); } void rtw_build_tdls_peer_traffic_indication_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) { struct pkt_attrib *pattrib = &pxmitframe->attrib; u8 payload_type = 0x02; unsigned char category = RTW_WLAN_CATEGORY_TDLS; unsigned char action = TDLS_PEER_TRAFFIC_INDICATION; u8 link_id_addr[18] = {0}; u8 AC_queue=0; struct sta_info *ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->dst); //payload type pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); //category, action, reason code pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(ptdls_sta->dialog), &(pattrib->pktlen)); //Link identifier if(ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE){ _rtw_memcpy(link_id_addr, pattrib->ra, 6); _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); _rtw_memcpy((link_id_addr+12), pattrib->src, 6); }else if(ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE){ _rtw_memcpy(link_id_addr, pattrib->ra, 6); _rtw_memcpy((link_id_addr+6), pattrib->src, 6); _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); } pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); //PTI control //PU buffer status if(ptdls_sta->uapsd_bk&BIT(1)) AC_queue=BIT(0); if(ptdls_sta->uapsd_be&BIT(1)) AC_queue=BIT(1); if(ptdls_sta->uapsd_vi&BIT(1)) AC_queue=BIT(2); if(ptdls_sta->uapsd_vo&BIT(1)) AC_queue=BIT(3); pframe = rtw_set_ie(pframe, _PTI_BUFFER_STATUS_, 1, &AC_queue, &(pattrib->pktlen)); } void rtw_build_tdls_peer_traffic_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) { struct pkt_attrib *pattrib = &pxmitframe->attrib; u8 payload_type = 0x02; u8 category = RTW_WLAN_CATEGORY_TDLS; u8 action = TDLS_PEER_TRAFFIC_RESPONSE; u8 link_id_addr[18] = {0}; struct sta_info *ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->dst); static u8 dialogtoken=0; //payload type pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); //category, action, reason code pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &ptdls_sta->dialog, &(pattrib->pktlen)); //Link identifier if(ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE){ _rtw_memcpy(link_id_addr, pattrib->ra, 6); _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); _rtw_memcpy((link_id_addr+12), pattrib->src, 6); }else if(ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE){ _rtw_memcpy(link_id_addr, pattrib->ra, 6); _rtw_memcpy((link_id_addr+6), pattrib->src, 6); _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); } pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); } void rtw_build_tdls_ch_switch_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) { struct pkt_attrib *pattrib = &pxmitframe->attrib; struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; u8 payload_type = 0x02; unsigned char category = RTW_WLAN_CATEGORY_TDLS; unsigned char action = TDLS_CHANNEL_SWITCH_REQUEST; u8 link_id_addr[18] = {0}; struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); u8 ch_switch_timing[4] = {0}; u16 switch_time= CH_SWITCH_TIME, switch_timeout=CH_SWITCH_TIMEOUT; //payload type pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); //category, action, target_ch pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(ptdlsinfo->candidate_ch), &(pattrib->pktlen)); //Link identifier if(ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE){ _rtw_memcpy(link_id_addr, pattrib->ra, 6); _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); _rtw_memcpy((link_id_addr+12), pattrib->src, 6); }else if(ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE){ _rtw_memcpy(link_id_addr, pattrib->ra, 6); _rtw_memcpy((link_id_addr+6), pattrib->src, 6); _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); } pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); //ch switch timing _rtw_memcpy(ch_switch_timing, &switch_time, 2); _rtw_memcpy(ch_switch_timing+2, &switch_timeout, 2); pframe = rtw_set_ie(pframe, _CH_SWITCH_TIMING_, 4, ch_switch_timing, &(pattrib->pktlen)); //update ch switch attrib to sta_info ptdls_sta->off_ch=ptdlsinfo->candidate_ch; ptdls_sta->ch_switch_time=switch_time; ptdls_sta->ch_switch_timeout=switch_timeout; } void rtw_build_tdls_ch_switch_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) { struct pkt_attrib *pattrib = &pxmitframe->attrib; u8 payload_type = 0x02; unsigned char category = RTW_WLAN_CATEGORY_TDLS; unsigned char action = TDLS_CHANNEL_SWITCH_RESPONSE; u8 link_id_addr[18] = {0}; struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; u8 ch_switch_timing[4] = {0}; //payload type pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); //category, action, status_code pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&ptdls_sta->stat_code, &(pattrib->pktlen)); //Link identifier if(ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE){ _rtw_memcpy(link_id_addr, pattrib->ra, 6); _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); _rtw_memcpy((link_id_addr+12), pattrib->src, 6); }else if(ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE){ _rtw_memcpy(link_id_addr, pattrib->ra, 6); _rtw_memcpy((link_id_addr+6), pattrib->src, 6); _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); } pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); //ch switch timing _rtw_memcpy(ch_switch_timing, &ptdls_sta->ch_switch_time, 2); _rtw_memcpy(ch_switch_timing+2, &ptdls_sta->ch_switch_timeout, 2); pframe = rtw_set_ie(pframe, _CH_SWITCH_TIMING_, 4, ch_switch_timing, &(pattrib->pktlen)); } #ifdef CONFIG_WFD void rtw_build_tunneled_probe_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) { struct pkt_attrib *pattrib = &pxmitframe->attrib; struct wifidirect_info *pwdinfo = &padapter->wdinfo; struct wifidirect_info *pbuddy_wdinfo = &padapter->pbuddy_adapter->wdinfo; u8 payload_type = 0x02; u8 category = RTW_WLAN_CATEGORY_P2P; u8 WFA_OUI[3] = { 0x50, 0x6f, 0x9a}; u8 probe_req = 4; u8 wfdielen = 0; //payload type pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); //category, OUI, frame_body_type pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 3, WFA_OUI, &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(probe_req), &(pattrib->pktlen)); if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { wfdielen = build_probe_req_wfd_ie(pwdinfo, pframe); pframe += wfdielen; pattrib->pktlen += wfdielen; } else if(!rtw_p2p_chk_state(pbuddy_wdinfo, P2P_STATE_NONE)) { wfdielen = build_probe_req_wfd_ie(pbuddy_wdinfo, pframe); pframe += wfdielen; pattrib->pktlen += wfdielen; } } void rtw_build_tunneled_probe_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) { struct pkt_attrib *pattrib = &pxmitframe->attrib; struct wifidirect_info *pwdinfo = &padapter->wdinfo; struct wifidirect_info *pbuddy_wdinfo = &padapter->pbuddy_adapter->wdinfo; u8 payload_type = 0x02; u8 category = RTW_WLAN_CATEGORY_P2P; u8 WFA_OUI[3] = { 0x50, 0x6f, 0x9a}; u8 probe_rsp = 5; u8 wfdielen = 0; //payload type pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); //category, OUI, frame_body_type pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 3, WFA_OUI, &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(probe_rsp), &(pattrib->pktlen)); if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { wfdielen = build_probe_resp_wfd_ie(pwdinfo, pframe, 1); pframe += wfdielen; pattrib->pktlen += wfdielen; } else if(!rtw_p2p_chk_state(pbuddy_wdinfo, P2P_STATE_NONE)) { wfdielen = build_probe_resp_wfd_ie(pbuddy_wdinfo, pframe, 1); pframe += wfdielen; pattrib->pktlen += wfdielen; } } #endif //CONFIG_WFD void _tdls_tpk_timer_hdl(void *FunctionContext) { struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; struct tdls_txmgmt txmgmt; _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); ptdls_sta->TPK_count++; //TPK_timer set 1000 as default //retry timer should set at least 301 sec. if(ptdls_sta->TPK_count==TPK_RESEND_COUNT){ ptdls_sta->TPK_count=0; _rtw_memcpy(txmgmt.peer, ptdls_sta->hwaddr, ETH_ALEN); issue_tdls_setup_req(ptdls_sta->padapter, &txmgmt, _FALSE); } _set_timer(&ptdls_sta->TPK_timer, ptdls_sta->TDLS_PeerKey_Lifetime/TPK_RESEND_COUNT); } // TDLS_DONE_CH_SEN: channel sensing and report candidate channel // TDLS_OFF_CH: first time set channel to off channel // TDLS_BASE_CH: when go back to the channel linked with AP, send null data to peer STA as an indication void _tdls_ch_switch_timer_hdl(void *FunctionContext) { struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; _adapter *padapter = ptdls_sta->padapter; if( ptdls_sta->option == TDLS_DONE_CH_SEN ){ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_DONE_CH_SEN); }else if( ptdls_sta->option == TDLS_OFF_CH ){ issue_nulldata_to_TDLS_peer_STA(ptdls_sta->padapter, ptdls_sta->hwaddr, 0, 0, 0); _set_timer(&ptdls_sta->base_ch_timer, 500); }else if( ptdls_sta->option == TDLS_BASE_CH){ issue_nulldata_to_TDLS_peer_STA(ptdls_sta->padapter, ptdls_sta->hwaddr, 0, 0, 0); } } void _tdls_base_ch_timer_hdl(void *FunctionContext) { struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; rtw_tdls_cmd(ptdls_sta->padapter, ptdls_sta->hwaddr, TDLS_P_OFF_CH); } void _tdls_off_ch_timer_hdl(void *FunctionContext) { struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; rtw_tdls_cmd(ptdls_sta->padapter, ptdls_sta->hwaddr, TDLS_P_BASE_CH ); } void _tdls_handshake_timer_hdl(void *FunctionContext) { struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; if(ptdls_sta != NULL) { if( !(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) ) { DBG_871X("tdls handshake time out\n"); rtw_tdls_cmd(ptdls_sta->padapter, ptdls_sta->hwaddr, TDLS_TEAR_STA ); } } } void _tdls_pti_timer_hdl(void *FunctionContext) { struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; _adapter *padapter = ptdls_sta->padapter; struct tdls_txmgmt txmgmt; _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); _rtw_memcpy(txmgmt.peer, ptdls_sta->hwaddr, ETH_ALEN); txmgmt.status_code = _RSON_TDLS_TEAR_TOOFAR_; if(ptdls_sta != NULL) { if( ptdls_sta->tdls_sta_state & TDLS_WAIT_PTR_STATE ) { DBG_871X("Doesn't receive PTR from peer dev:"MAC_FMT"; Send TDLS Tear Down\n", MAC_ARG(ptdls_sta->hwaddr)); issue_tdls_teardown(padapter, &txmgmt, _FALSE); } } } void rtw_init_tdls_timer(_adapter *padapter, struct sta_info *psta) { psta->padapter=padapter; _init_timer(&psta->TPK_timer, padapter->pnetdev, _tdls_tpk_timer_hdl, psta); _init_timer(&psta->option_timer, padapter->pnetdev, _tdls_ch_switch_timer_hdl, psta); _init_timer(&psta->base_ch_timer, padapter->pnetdev, _tdls_base_ch_timer_hdl, psta); _init_timer(&psta->off_ch_timer, padapter->pnetdev, _tdls_off_ch_timer_hdl, psta); _init_timer(&psta->handshake_timer, padapter->pnetdev, _tdls_handshake_timer_hdl, psta); _init_timer(&psta->pti_timer, padapter->pnetdev, _tdls_pti_timer_hdl, psta); } void rtw_free_tdls_timer(struct sta_info *psta) { _cancel_timer_ex(&psta->TPK_timer); _cancel_timer_ex(&psta->option_timer); _cancel_timer_ex(&psta->base_ch_timer); _cancel_timer_ex(&psta->off_ch_timer); _cancel_timer_ex(&psta->handshake_timer); _cancel_timer_ex(&psta->pti_timer); } u8 update_sgi_tdls(_adapter *padapter, struct sta_info *psta) { return query_ra_short_GI(psta); } u32 update_mask_tdls(_adapter *padapter, struct sta_info *psta) { unsigned char sta_band = 0; unsigned int tx_ra_bitmap=0; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; rtw_hal_update_sta_rate_mask(padapter, psta); tx_ra_bitmap = psta->ra_mask; if ( pcur_network->Configuration.DSConfig > 14 ) { // 5G band if (tx_ra_bitmap & 0xffff000) sta_band |= WIRELESS_11_5N | WIRELESS_11A; else sta_band |= WIRELESS_11A; } else { if (tx_ra_bitmap & 0xffff000) sta_band |= WIRELESS_11_24N | WIRELESS_11G | WIRELESS_11B; else if (tx_ra_bitmap & 0xff0) sta_band |= WIRELESS_11G |WIRELESS_11B; else sta_band |= WIRELESS_11B; } psta->wireless_mode = sta_band; psta->raid = rtw_hal_networktype_to_raid(padapter,psta); tx_ra_bitmap |= ((psta->raid<<28)&0xf0000000); return tx_ra_bitmap; } #endif //CONFIG_TDLS rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_vht.c000066400000000000000000000541121261122257400202730ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_VHT_C #include #ifdef CONFIG_80211AC_VHT // 20/40/80, ShortGI, MCS Rate const u16 VHT_MCS_DATA_RATE[3][2][30] = { { {13, 26, 39, 52, 78, 104, 117, 130, 156, 156, 26, 52, 78, 104, 156, 208, 234, 260, 312, 312, 39, 78, 117, 156, 234, 312, 351, 390, 468, 520}, // Long GI, 20MHz {14, 29, 43, 58, 87, 116, 130, 144, 173, 173, 29, 58, 87, 116, 173, 231, 260, 289, 347, 347, 43, 87, 130, 173, 260, 347,390, 433, 520, 578} }, // Short GI, 20MHz { {27, 54, 81, 108, 162, 216, 243, 270, 324, 360, 54, 108, 162, 216, 324, 432, 486, 540, 648, 720, 81, 162, 243, 324, 486, 648, 729, 810, 972, 1080}, // Long GI, 40MHz {30, 60, 90, 120, 180, 240, 270, 300,360, 400, 60, 120, 180, 240, 360, 480, 540, 600, 720, 800, 90, 180, 270, 360, 540, 720, 810, 900, 1080, 1200}}, // Short GI, 40MHz { {59, 117, 176, 234, 351, 468, 527, 585, 702, 780, 117, 234, 351, 468, 702, 936, 1053, 1170, 1404, 1560, 176, 351, 527, 702, 1053, 1404, 1580, 1755, 2106, 2106}, // Long GI, 80MHz {65, 130, 195, 260, 390, 520, 585, 650, 780, 867, 130, 260, 390, 520, 780, 1040, 1170, 1300, 1560,1734, 195, 390, 585, 780, 1170, 1560, 1755, 1950, 2340, 2340} } // Short GI, 80MHz }; u8 rtw_get_vht_highest_rate(u8 *pvht_mcs_map) { u8 i, j; u8 bit_map; u8 vht_mcs_rate = 0; for(i = 0; i < 2; i++) { if(pvht_mcs_map[i] != 0xff) { for(j = 0; j < 8; j += 2) { bit_map = (pvht_mcs_map[i] >> j) & 3; if(bit_map != 3) vht_mcs_rate = MGN_VHT1SS_MCS7 + 10*j/2 + i*40 + bit_map; //VHT rate indications begin from 0x90 } } } //DBG_871X("HighestVHTMCSRate is %x\n", vht_mcs_rate); return vht_mcs_rate; } u8 rtw_vht_mcsmap_to_nss(u8 *pvht_mcs_map) { u8 i, j; u8 bit_map; u8 nss = 0; for(i = 0; i < 2; i++) { if(pvht_mcs_map[i] != 0xff) { for(j = 0; j < 8; j += 2) { bit_map = (pvht_mcs_map[i] >> j) & 3; if(bit_map != 3) nss++; } } } //DBG_871X("%s : %dSS\n", __FUNCTION__, nss); return nss; } void rtw_vht_nss_to_mcsmap(u8 nss, u8 *target_mcs_map, u8 *cur_mcs_map) { u8 i, j; u8 cur_rate, target_rate; for(i = 0; i < 2; i++) { target_mcs_map[i] = 0; for(j = 0; j < 8; j+=2) { cur_rate = (cur_mcs_map[i] >> j) & 3; if(cur_rate == 3) //0x3 indicates not supported that num of SS target_rate = 3; else if(nss <= ((j/2)+i*4)) target_rate = 3; else target_rate = cur_rate; target_mcs_map[i] |= (target_rate << j); } } //DBG_871X("%s : %dSS\n", __FUNCTION__, nss); } u16 rtw_vht_mcs_to_data_rate(u8 bw, u8 short_GI, u8 vht_mcs_rate) { if(vht_mcs_rate > MGN_VHT2SS_MCS9) vht_mcs_rate = MGN_VHT2SS_MCS9; return VHT_MCS_DATA_RATE[bw][short_GI][((vht_mcs_rate - MGN_VHT1SS_MCS0)&0x3f)]; } void rtw_vht_use_default_setting(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; struct registry_priv *pregistrypriv = &padapter->registrypriv; BOOLEAN bHwLDPCSupport = _FALSE, bHwSTBCSupport = _FALSE; BOOLEAN bHwSupportBeamformer = _FALSE, bHwSupportBeamformee = _FALSE; u8 rf_type = 0; pvhtpriv->sgi_80m = TEST_FLAG(pregistrypriv->short_gi, BIT2) ? _TRUE : _FALSE; // LDPC support rtw_hal_get_def_var(padapter, HAL_DEF_RX_LDPC, (u8 *)&bHwLDPCSupport); CLEAR_FLAGS(pvhtpriv->ldpc_cap); if(bHwLDPCSupport) { if(TEST_FLAG(pregistrypriv->ldpc_cap, BIT0)) SET_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_RX); } rtw_hal_get_def_var(padapter, HAL_DEF_TX_LDPC, (u8 *)&bHwLDPCSupport); if(bHwLDPCSupport) { if(TEST_FLAG(pregistrypriv->ldpc_cap, BIT1)) SET_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_TX); } if (pvhtpriv->ldpc_cap) DBG_871X("[VHT] Support LDPC = 0x%02X\n", pvhtpriv->ldpc_cap); // STBC rtw_hal_get_def_var(padapter, HAL_DEF_TX_STBC, (u8 *)&bHwSTBCSupport); CLEAR_FLAGS(pvhtpriv->stbc_cap); if(bHwSTBCSupport) { if(TEST_FLAG(pregistrypriv->stbc_cap, BIT1)) SET_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX); } rtw_hal_get_def_var(padapter, HAL_DEF_RX_STBC, (u8 *)&bHwSTBCSupport); if(bHwSTBCSupport) { if(TEST_FLAG(pregistrypriv->stbc_cap, BIT0)) SET_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_RX); } if (pvhtpriv->stbc_cap) DBG_871X("[VHT] Support STBC = 0x%02X\n", pvhtpriv->stbc_cap); // Beamforming setting rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMER, (u8 *)&bHwSupportBeamformer); rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMEE, (u8 *)&bHwSupportBeamformee); CLEAR_FLAGS(pvhtpriv->beamform_cap); if(TEST_FLAG(pregistrypriv->beamform_cap, BIT0) && bHwSupportBeamformer) { SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); DBG_871X("[VHT] Support Beamformer\n"); } if(TEST_FLAG(pregistrypriv->beamform_cap, BIT1) && bHwSupportBeamformee) { SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); DBG_871X("[VHT] Support Beamformee\n"); } pvhtpriv->ampdu_len = pregistrypriv->ampdu_factor; rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); if (rf_type == RF_1T1R) pvhtpriv->vht_mcs_map[0] = 0xfe; // Only support 1SS MCS 0~9; else pvhtpriv->vht_mcs_map[0] = 0xfa; //support 1SS MCS 0~9 2SS MCS 0~9 pvhtpriv->vht_mcs_map[1] = 0xff; if(pregistrypriv->vht_rate_sel == 1) { pvhtpriv->vht_mcs_map[0] = 0xfc; // support 1SS MCS 0~7 } else if(pregistrypriv->vht_rate_sel == 2) { pvhtpriv->vht_mcs_map[0] = 0xfd; // Support 1SS MCS 0~8 } else if(pregistrypriv->vht_rate_sel == 3) { pvhtpriv->vht_mcs_map[0] = 0xfe; // Support 1SS MCS 0~9 } else if(pregistrypriv->vht_rate_sel == 4) { pvhtpriv->vht_mcs_map[0] = 0xf0; // support 1SS MCS 0~7 2SS MCS 0~7 } else if(pregistrypriv->vht_rate_sel == 5) { pvhtpriv->vht_mcs_map[0] = 0xf5; // support 1SS MCS 0~8 2SS MCS 0~8 } else if(pregistrypriv->vht_rate_sel == 6) { pvhtpriv->vht_mcs_map[0] = 0xfa; // support 1SS MCS 0~9 2SS MCS 0~9 } else if(pregistrypriv->vht_rate_sel == 7) { pvhtpriv->vht_mcs_map[0] = 0xf8; // support 1SS MCS 0-7 2SS MCS 0~9 } else if(pregistrypriv->vht_rate_sel == 8) { pvhtpriv->vht_mcs_map[0] = 0xf9; // support 1SS MCS 0-8 2SS MCS 0~9 } else if(pregistrypriv->vht_rate_sel == 9) { pvhtpriv->vht_mcs_map[0] = 0xf4; // support 1SS MCS 0-7 2SS MCS 0~8 } pvhtpriv->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv->vht_mcs_map); } u32 rtw_vht_rate_to_bitmap(u8 *pVHTRate) { u8 i,j , tmpRate; u32 RateBitmap = 0; for(i = j= 0; i < 4; i+=2, j+=10) { tmpRate = (pVHTRate[0] >> i) & 3; switch(tmpRate){ case 2: RateBitmap = RateBitmap | (0x03ff << j); break; case 1: RateBitmap = RateBitmap | (0x01ff << j); break; case 0: RateBitmap = RateBitmap | (0x00ff << j); break; default: break; } } return RateBitmap; } void update_sta_vht_info_apmode(_adapter *padapter, PVOID sta) { struct sta_info *psta = (struct sta_info *)sta; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct vht_priv *pvhtpriv_ap = &pmlmepriv->vhtpriv; struct vht_priv *pvhtpriv_sta = &psta->vhtpriv; struct ht_priv *phtpriv_sta = &psta->htpriv; u8 cur_ldpc_cap=0, cur_stbc_cap=0, cur_beamform_cap=0, bw_mode = 0; u8 *pcap_mcs; if (pvhtpriv_sta->vht_option == _FALSE) { return; } bw_mode = GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(&pvhtpriv_sta->vht_op_mode_notify); //if (bw_mode > psta->bw_mode) psta->bw_mode = bw_mode; // B4 Rx LDPC if (TEST_FLAG(pvhtpriv_ap->ldpc_cap, LDPC_VHT_ENABLE_TX) && GET_VHT_CAPABILITY_ELE_RX_LDPC(pvhtpriv_sta->vht_cap)) { SET_FLAG(cur_ldpc_cap, (LDPC_VHT_ENABLE_TX | LDPC_VHT_CAP_TX)); DBG_871X("Current STA(%d) VHT LDPC = %02X\n", psta->aid, cur_ldpc_cap); } pvhtpriv_sta->ldpc_cap = cur_ldpc_cap; if (psta->bw_mode > pmlmeext->cur_bwmode) psta->bw_mode = pmlmeext->cur_bwmode; if (psta->bw_mode == CHANNEL_WIDTH_80) { // B5 Short GI for 80 MHz pvhtpriv_sta->sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI80M(pvhtpriv_sta->vht_cap) & pvhtpriv_ap->sgi_80m) ? _TRUE : _FALSE; //DBG_871X("Current STA ShortGI80MHz = %d\n", pvhtpriv_sta->sgi_80m); } else if (psta->bw_mode >= CHANNEL_WIDTH_160) { // B5 Short GI for 80 MHz pvhtpriv_sta->sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI160M(pvhtpriv_sta->vht_cap) & pvhtpriv_ap->sgi_80m) ? _TRUE : _FALSE; //DBG_871X("Current STA ShortGI160MHz = %d\n", pvhtpriv_sta->sgi_80m); } // B8 B9 B10 Rx STBC if (TEST_FLAG(pvhtpriv_ap->stbc_cap, STBC_VHT_ENABLE_TX) && GET_VHT_CAPABILITY_ELE_RX_STBC(pvhtpriv_sta->vht_cap)) { SET_FLAG(cur_stbc_cap, (STBC_VHT_ENABLE_TX | STBC_VHT_CAP_TX)); DBG_871X("Current STA(%d) VHT STBC = %02X\n", psta->aid, cur_stbc_cap); } pvhtpriv_sta->stbc_cap = cur_stbc_cap; // B11 SU Beamformer Capable, the target supports Beamformer and we are Beamformee if (TEST_FLAG(pvhtpriv_ap->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE) && GET_VHT_CAPABILITY_ELE_SU_BFEE(pvhtpriv_sta->vht_cap)) { SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); } // B12 SU Beamformee Capable, the target supports Beamformee and we are Beamformer if (TEST_FLAG(pvhtpriv_ap->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) && GET_VHT_CAPABILITY_ELE_SU_BFER(pvhtpriv_sta->vht_cap)) { SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); } pvhtpriv_sta->beamform_cap = cur_beamform_cap; if (cur_beamform_cap) { DBG_871X("Current STA(%d) VHT Beamforming Setting = %02X\n", psta->aid, cur_beamform_cap); } // B23 B24 B25 Maximum A-MPDU Length Exponent pvhtpriv_sta->ampdu_len = GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pvhtpriv_sta->vht_cap); pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pvhtpriv_sta->vht_cap); _rtw_memcpy(pvhtpriv_sta->vht_mcs_map, pcap_mcs, 2); pvhtpriv_sta->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv_sta->vht_mcs_map); } void update_hw_vht_param(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 ht_AMPDU_len; ht_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; if(pvhtpriv->ampdu_len > ht_AMPDU_len) rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&pvhtpriv->ampdu_len)); } void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 cur_ldpc_cap=0, cur_stbc_cap=0, cur_beamform_cap=0, rf_type = RF_1T1R; u8 *pcap_mcs; u8 vht_mcs[2]; if(pIE==NULL) return; if(pvhtpriv->vht_option == _FALSE) return; pmlmeinfo->VHT_enable = 1; // B4 Rx LDPC if (TEST_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_TX) && GET_VHT_CAPABILITY_ELE_RX_LDPC(pIE->data)) { SET_FLAG(cur_ldpc_cap, (LDPC_VHT_ENABLE_TX | LDPC_VHT_CAP_TX)); DBG_871X("Current VHT LDPC Setting = %02X\n", cur_ldpc_cap); } pvhtpriv->ldpc_cap = cur_ldpc_cap; // B5 Short GI for 80 MHz pvhtpriv->sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI80M(pIE->data) & pvhtpriv->sgi_80m) ? _TRUE : _FALSE; //DBG_871X("Current ShortGI80MHz = %d\n", pvhtpriv->sgi_80m); // B8 B9 B10 Rx STBC if (TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX) && GET_VHT_CAPABILITY_ELE_RX_STBC(pIE->data)) { SET_FLAG(cur_stbc_cap, (STBC_VHT_ENABLE_TX | STBC_VHT_CAP_TX)); DBG_871X("Current VHT STBC Setting = %02X\n", cur_stbc_cap); } pvhtpriv->stbc_cap = cur_stbc_cap; // B11 SU Beamformer Capable, the target supports Beamformer and we are Beamformee if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE) && GET_VHT_CAPABILITY_ELE_SU_BFEE(pIE->data)) { SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); } // B12 SU Beamformee Capable, the target supports Beamformee and we are Beamformer if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) && GET_VHT_CAPABILITY_ELE_SU_BFER(pIE->data)) { SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); } pvhtpriv->beamform_cap = cur_beamform_cap; if (cur_beamform_cap) { DBG_871X("Current VHT Beamforming Setting = %02X\n", cur_beamform_cap); } // B23 B24 B25 Maximum A-MPDU Length Exponent pvhtpriv->ampdu_len = GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pIE->data); pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pIE->data); _rtw_memcpy(vht_mcs, pcap_mcs, 2); rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); if ((rf_type == RF_1T1R) || (rf_type == RF_1T2R)) vht_mcs[0] |= 0xfc; else if (rf_type == RF_2T2R) vht_mcs[0] |= 0xf0; _rtw_memcpy(pvhtpriv->vht_mcs_map, vht_mcs, 2); pvhtpriv->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv->vht_mcs_map); } void VHT_operation_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; if(pIE==NULL) return; if(pvhtpriv->vht_option == _FALSE) return; } void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, PVOID sta) { struct sta_info *psta = (struct sta_info *)sta; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; u8 target_bw; u8 target_rxss, current_rxss; u8 update_ra = _FALSE; u8 vht_mcs_map[2] = {}; if(pvhtpriv->vht_option == _FALSE) return; target_bw = GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(pframe); target_rxss = (GET_VHT_OPERATING_MODE_FIELD_RX_NSS(pframe)+1); if (target_bw != psta->bw_mode) { if (target_bw <= (padapter->registrypriv.bw_mode >> 4)) { update_ra = _TRUE; psta->bw_mode = target_bw; } } current_rxss = rtw_vht_mcsmap_to_nss(psta->vhtpriv.vht_mcs_map); if (target_rxss != current_rxss) { update_ra = _TRUE; rtw_vht_nss_to_mcsmap(target_rxss, vht_mcs_map, psta->vhtpriv.vht_mcs_map); _rtw_memcpy(psta->vhtpriv.vht_mcs_map, vht_mcs_map, 2); rtw_hal_update_sta_rate_mask(padapter, psta); } if (update_ra) { rtw_dm_ra_mask_wk_cmd(padapter, (u8 *)psta); } } u32 rtw_build_vht_operation_ie(_adapter *padapter, u8 *pbuf, u8 channel) { struct registry_priv *pregistrypriv = &padapter->registrypriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; //struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; u8 ChnlWidth, center_freq, bw_mode; u32 len = 0; u8 operation[5]; _rtw_memset(operation, 0, 5); bw_mode = pregistrypriv->bw_mode >> 4; if (bw_mode >= CHANNEL_WIDTH_80) { center_freq = rtw_get_center_ch(channel, bw_mode, HAL_PRIME_CHNL_OFFSET_LOWER); ChnlWidth = 1; } else { center_freq = 0; ChnlWidth = 0; } SET_VHT_OPERATION_ELE_CHL_WIDTH(operation, ChnlWidth); //center frequency SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(operation, center_freq);//Todo: need to set correct center channel SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(operation,0); operation[3] = 0xff; operation[4] = 0xff; rtw_set_ie(pbuf, EID_VHTOperation, 5, operation, &len); return len; } u32 rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw) { //struct registry_priv *pregistrypriv = &padapter->registrypriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; u32 len = 0; u8 opmode = 0, rf_type = 0; u8 chnl_width, rx_nss; chnl_width = bw; rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); if(rf_type == RF_1T1R) rx_nss = 1; else rx_nss = 2; SET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(&opmode, chnl_width); SET_VHT_OPERATING_MODE_FIELD_RX_NSS(&opmode, (rx_nss-1)); SET_VHT_OPERATING_MODE_FIELD_RX_NSS_TYPE(&opmode, 0); //Todo pvhtpriv->vht_op_mode_notify = opmode; pbuf = rtw_set_ie(pbuf, EID_OpModeNotification, 1, &opmode, &len); return len; } u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf) { u8 bw, rf_type; u16 HighestRate; u8 *pcap, *pcap_mcs; u32 len = 0; struct registry_priv *pregistrypriv = &padapter->registrypriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; pcap = pvhtpriv->vht_cap; _rtw_memset(pcap, 0, 32); // B2 B3 Supported Channel Width Set SET_VHT_CAPABILITY_ELE_CHL_WIDTH(pcap, 0); //indicate we don't support neither 160M nor 80+80M bandwidth. // B4 Rx LDPC if(TEST_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_RX)) { SET_VHT_CAPABILITY_ELE_RX_LDPC(pcap, 1); } // B5 ShortGI for 80MHz SET_VHT_CAPABILITY_ELE_SHORT_GI80M(pcap, pvhtpriv->sgi_80m? 1 : 0); // We can receive Short GI of 80M // B6 ShortGI for 160MHz //SET_VHT_CAPABILITY_ELE_SHORT_GI160M(pcap, pvhtpriv->sgi_80m? 1 : 0); // B7 Tx STBC if(TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX)) { SET_VHT_CAPABILITY_ELE_TX_STBC(pcap, 1); } // B8 B9 B10 Rx STBC if(TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_RX)) { rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); if ((rf_type == RF_2T2R) || (rf_type == RF_1T2R)) { SET_VHT_CAPABILITY_ELE_RX_STBC(pcap, 2); } else if (rf_type == RF_1T1R) { SET_VHT_CAPABILITY_ELE_RX_STBC(pcap, 1); } } // B11 SU Beamformer Capable if(TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) { SET_VHT_CAPABILITY_ELE_SU_BFER(pcap, 1); // B16 17 18 Number of Sounding Dimensions SET_VHT_CAPABILITY_ELE_SOUNDING_DIMENSIONS(pcap, 1); } // B12 SU Beamformee Capable if(TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) { SET_VHT_CAPABILITY_ELE_SU_BFEE(pcap, 1); // B13 14 15 Compressed Steering Number of Beamformer Antennas Supported SET_VHT_CAPABILITY_ELE_BFER_ANT_SUPP(pcap, 1); } // B19 MU Beamformer Capable SET_VHT_CAPABILITY_ELE_MU_BFER(pcap, 0); //HW don't support mu bfee/bfer // B20 MU Beamformee Capable SET_VHT_CAPABILITY_ELE_MU_BFEE(pcap, 0); // B21 VHT TXOP PS SET_VHT_CAPABILITY_ELE_TXOP_PS(pcap, 0); // B22 +HTC-VHT Capable SET_VHT_CAPABILITY_ELE_HTC_VHT(pcap, 1); // B23 24 25 Maximum A-MPDU Length Exponent if (pregistrypriv->ampdu_factor != 0xFE) { SET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pcap, pregistrypriv->ampdu_factor); } else { SET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pcap, 7); } // B26 27 VHT Link Adaptation Capable SET_VHT_CAPABILITY_ELE_LINK_ADAPTION(pcap, 0); pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pcap); _rtw_memcpy(pcap_mcs, pvhtpriv->vht_mcs_map, 2); pcap_mcs = GET_VHT_CAPABILITY_ELE_TX_MCS(pcap); _rtw_memcpy(pcap_mcs, pvhtpriv->vht_mcs_map, 2); bw = (pregistrypriv->bw_mode >> 4); HighestRate = VHT_MCS_DATA_RATE[bw][pvhtpriv->sgi_80m][((pvhtpriv->vht_highest_rate - MGN_VHT1SS_MCS0)&0x3f)]; HighestRate = (HighestRate+1) >> 1; SET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(pcap, HighestRate); //indicate we support highest rx rate is 600Mbps. SET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(pcap, HighestRate); //indicate we support highest tx rate is 600Mbps. pbuf = rtw_set_ie(pbuf, EID_VHTCapability, 12, pcap, &len); return len; } u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len) { u32 ielen=0, out_len=0; u8 cap_len=0, notify_len=0, notify_bw=0, operation_bw=0, supported_chnl_width=0; u8 *p, *pframe; struct registry_priv *pregistrypriv = &padapter->registrypriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; rtw_vht_use_default_setting(padapter); p = rtw_get_ie(in_ie+12, EID_VHTCapability, &ielen, in_len-12); if (p && ielen>0) { supported_chnl_width = GET_VHT_CAPABILITY_ELE_CHL_WIDTH(p+2); // VHT Capabilities element cap_len = rtw_build_vht_cap_ie(padapter, out_ie+*pout_len); *pout_len += cap_len; // Get HT BW p = rtw_get_ie(in_ie+12, _HT_EXTRA_INFO_IE_, &ielen, in_len-12); if (p && ielen>0) { struct HT_info_element *pht_info = (struct HT_info_element *)(p+2); if (pht_info->infos[0] & BIT(2)) operation_bw = CHANNEL_WIDTH_40; else operation_bw = CHANNEL_WIDTH_20; } // VHT Operation element p = rtw_get_ie(in_ie+12, EID_VHTOperation, &ielen, in_len-12); if (p && ielen>0) { out_len = *pout_len; if (GET_VHT_OPERATION_ELE_CHL_WIDTH(p+2) >= 1) { if (supported_chnl_width == 2) operation_bw = CHANNEL_WIDTH_80_80; else if (supported_chnl_width == 1) operation_bw = CHANNEL_WIDTH_160; else operation_bw = CHANNEL_WIDTH_80; } pframe = rtw_set_ie(out_ie+out_len, EID_VHTOperation, ielen, p+2 , pout_len); } notify_bw = pregistrypriv->bw_mode >> 4; if (notify_bw > operation_bw) notify_bw = operation_bw; // Operating Mode Notification element notify_len = rtw_build_vht_op_mode_notify_ie(padapter, out_ie+*pout_len, notify_bw); *pout_len += notify_len; pvhtpriv->vht_option = _TRUE; } return (pvhtpriv->vht_option); } void VHTOnAssocRsp(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 ht_AMPDU_len; DBG_871X("%s\n", __FUNCTION__); if (!pmlmeinfo->HT_enable) return; if (!pmlmeinfo->VHT_enable) return; ht_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; if(pvhtpriv->ampdu_len > ht_AMPDU_len) rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&pvhtpriv->ampdu_len)); rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MAX_TIME, (u8 *)(&pvhtpriv->vht_highest_rate)); } #endif //CONFIG_80211AC_VHT rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_wlan_util.c000066400000000000000000003264621261122257400215020ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_WLAN_UTIL_C_ #include #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) #include #endif unsigned char ARTHEROS_OUI1[] = {0x00, 0x03, 0x7f}; unsigned char ARTHEROS_OUI2[] = {0x00, 0x13, 0x74}; unsigned char BROADCOM_OUI1[] = {0x00, 0x10, 0x18}; unsigned char BROADCOM_OUI2[] = {0x00, 0x0a, 0xf7}; unsigned char BROADCOM_OUI3[] = {0x00, 0x05, 0xb5}; unsigned char CISCO_OUI[] = {0x00, 0x40, 0x96}; unsigned char MARVELL_OUI[] = {0x00, 0x50, 0x43}; unsigned char RALINK_OUI[] = {0x00, 0x0c, 0x43}; unsigned char REALTEK_OUI[] = {0x00, 0xe0, 0x4c}; unsigned char AIRGOCAP_OUI[] = {0x00, 0x0a, 0xf5}; unsigned char REALTEK_96B_IE[] = {0x00, 0xe0, 0x4c, 0x02, 0x01, 0x20}; extern unsigned char RTW_WPA_OUI[]; extern unsigned char WPA_TKIP_CIPHER[4]; extern unsigned char RSN_TKIP_CIPHER[4]; #define R2T_PHY_DELAY (0) //#define WAIT_FOR_BCN_TO_MIN (3000) #define WAIT_FOR_BCN_TO_MIN (6000) #define WAIT_FOR_BCN_TO_MAX (20000) #define DISCONNECT_BY_CHK_BCN_FAIL_OBSERV_PERIOD_IN_MS 1000 #define DISCONNECT_BY_CHK_BCN_FAIL_THRESHOLD 3 static u8 rtw_basic_rate_cck[4] = { IEEE80211_CCK_RATE_1MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_2MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_5MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_11MB|IEEE80211_BASIC_RATE_MASK }; static u8 rtw_basic_rate_ofdm[3] = { IEEE80211_OFDM_RATE_6MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_OFDM_RATE_12MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_OFDM_RATE_24MB|IEEE80211_BASIC_RATE_MASK }; static u8 rtw_basic_rate_mix[7] = { IEEE80211_CCK_RATE_1MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_2MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_5MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_11MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_OFDM_RATE_6MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_OFDM_RATE_12MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_OFDM_RATE_24MB|IEEE80211_BASIC_RATE_MASK }; int new_bcn_max = 3; int cckrates_included(unsigned char *rate, int ratelen) { int i; for(i = 0; i < ratelen; i++) { if ( (((rate[i]) & 0x7f) == 2) || (((rate[i]) & 0x7f) == 4) || (((rate[i]) & 0x7f) == 11) || (((rate[i]) & 0x7f) == 22) ) return _TRUE; } return _FALSE; } int cckratesonly_included(unsigned char *rate, int ratelen) { int i; for(i = 0; i < ratelen; i++) { if ( (((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) && (((rate[i]) & 0x7f) != 11) && (((rate[i]) & 0x7f) != 22) ) return _FALSE; } return _TRUE; } u8 networktype_to_raid(_adapter *adapter,struct sta_info *psta) { unsigned char raid; switch(psta->wireless_mode) { case WIRELESS_11B: raid = RATR_INX_WIRELESS_B; break; case WIRELESS_11A: case WIRELESS_11G: raid = RATR_INX_WIRELESS_G; break; case WIRELESS_11BG: raid = RATR_INX_WIRELESS_GB; break; case WIRELESS_11_24N: case WIRELESS_11_5N: raid = RATR_INX_WIRELESS_N; break; case WIRELESS_11A_5N: case WIRELESS_11G_24N: raid = RATR_INX_WIRELESS_NG; break; case WIRELESS_11BG_24N: raid = RATR_INX_WIRELESS_NGB; break; default: raid = RATR_INX_WIRELESS_GB; break; } return raid; } u8 networktype_to_raid_ex(_adapter *adapter, struct sta_info *psta) { struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; u8 raid, cur_rf_type, rf_type= RF_1T1R; rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)(&cur_rf_type)); if(cur_rf_type == RF_1T1R) { rf_type = RF_1T1R; } else if(IsSupportedVHT(psta->wireless_mode)) { if(psta->ra_mask & 0xffc00000) rf_type = RF_2T2R; } else if(IsSupportedHT(psta->wireless_mode)) { if(psta->ra_mask & 0xfff00000) rf_type = RF_2T2R; } switch(psta->wireless_mode) { case WIRELESS_11B: raid = RATEID_IDX_B; break; case WIRELESS_11A: case WIRELESS_11G: raid = RATEID_IDX_G; break; case WIRELESS_11BG: raid = RATEID_IDX_BG; break; case WIRELESS_11_24N: case WIRELESS_11_5N: case WIRELESS_11A_5N: case WIRELESS_11G_24N: if (rf_type == RF_2T2R) raid = RATEID_IDX_GN_N2SS; else raid = RATEID_IDX_GN_N1SS; break; case WIRELESS_11B_24N: case WIRELESS_11BG_24N: if (psta->bw_mode == CHANNEL_WIDTH_20) { if (rf_type == RF_2T2R) raid = RATEID_IDX_BGN_20M_2SS_BN; else raid = RATEID_IDX_BGN_20M_1SS_BN; } else { if (rf_type == RF_2T2R) raid = RATEID_IDX_BGN_40M_2SS; else raid = RATEID_IDX_BGN_40M_1SS; } break; #ifdef CONFIG_80211AC_VHT case WIRELESS_11_5AC: if (rf_type == RF_1T1R) raid = RATEID_IDX_VHT_1SS; else raid = RATEID_IDX_VHT_2SS; break; case WIRELESS_11_24AC: if (psta->bw_mode >= CHANNEL_WIDTH_80) { if (rf_type == RF_1T1R) raid = RATEID_IDX_VHT_1SS; else raid = RATEID_IDX_VHT_2SS; } else { if (rf_type == RF_1T1R) raid = 11; else raid = 12; } break; #endif default: raid = RATEID_IDX_BGN_40M_2SS; break; } return raid; } u8 judge_network_type(_adapter *padapter, unsigned char *rate, int ratelen) { u8 network_type = 0; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if(pmlmeext->cur_channel > 14) { if (pmlmeinfo->VHT_enable) network_type = WIRELESS_11AC; else if (pmlmeinfo->HT_enable) network_type = WIRELESS_11_5N; network_type |= WIRELESS_11A; } else { if (pmlmeinfo->HT_enable) { network_type = WIRELESS_11_24N; } if ((cckratesonly_included(rate, ratelen)) == _TRUE) { network_type |= WIRELESS_11B; } else if((cckrates_included(rate, ratelen)) == _TRUE) { network_type |= WIRELESS_11BG; } else { network_type |= WIRELESS_11G; } } return network_type; } unsigned char ratetbl_val_2wifirate(unsigned char rate); unsigned char ratetbl_val_2wifirate(unsigned char rate) { unsigned char val = 0; switch (rate & 0x7f) { case 0: val = IEEE80211_CCK_RATE_1MB; break; case 1: val = IEEE80211_CCK_RATE_2MB; break; case 2: val = IEEE80211_CCK_RATE_5MB; break; case 3: val = IEEE80211_CCK_RATE_11MB; break; case 4: val = IEEE80211_OFDM_RATE_6MB; break; case 5: val = IEEE80211_OFDM_RATE_9MB; break; case 6: val = IEEE80211_OFDM_RATE_12MB; break; case 7: val = IEEE80211_OFDM_RATE_18MB; break; case 8: val = IEEE80211_OFDM_RATE_24MB; break; case 9: val = IEEE80211_OFDM_RATE_36MB; break; case 10: val = IEEE80211_OFDM_RATE_48MB; break; case 11: val = IEEE80211_OFDM_RATE_54MB; break; } return val; } int is_basicrate(_adapter *padapter, unsigned char rate); int is_basicrate(_adapter *padapter, unsigned char rate) { int i; unsigned char val; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; for(i = 0; i < NumRates; i++) { val = pmlmeext->basicrate[i]; if ((val != 0xff) && (val != 0xfe)) { if (rate == ratetbl_val_2wifirate(val)) { return _TRUE; } } } return _FALSE; } unsigned int ratetbl2rateset(_adapter *padapter, unsigned char *rateset); unsigned int ratetbl2rateset(_adapter *padapter, unsigned char *rateset) { int i; unsigned char rate; unsigned int len = 0; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; for (i = 0; i < NumRates; i++) { rate = pmlmeext->datarate[i]; switch (rate) { case 0xff: return len; case 0xfe: continue; default: rate = ratetbl_val_2wifirate(rate); if (is_basicrate(padapter, rate) == _TRUE) { rate |= IEEE80211_BASIC_RATE_MASK; } rateset[len] = rate; len++; break; } } return len; } void get_rate_set(_adapter *padapter, unsigned char *pbssrate, int *bssrate_len) { unsigned char supportedrates[NumRates]; _rtw_memset(supportedrates, 0, NumRates); *bssrate_len = ratetbl2rateset(padapter, supportedrates); _rtw_memcpy(pbssrate, supportedrates, *bssrate_len); } void set_mcs_rate_by_mask(u8 *mcs_set, u32 mask) { u8 mcs_rate_1r = (u8)(mask&0xff); u8 mcs_rate_2r = (u8)((mask>>8)&0xff); u8 mcs_rate_3r = (u8)((mask>>16)&0xff); u8 mcs_rate_4r = (u8)((mask>>24)&0xff); mcs_set[0] &= mcs_rate_1r; mcs_set[1] &= mcs_rate_2r; mcs_set[2] &= mcs_rate_3r; mcs_set[3] &= mcs_rate_4r; } void UpdateBrateTbl( IN PADAPTER Adapter, IN u8 *mBratesOS ) { u8 i; u8 rate; // 1M, 2M, 5.5M, 11M, 6M, 12M, 24M are mandatory. for(i=0;iiface_type == IFACE_PORT1) { Set_NETYPE1_MSR(padapter, type); } else #endif { Set_NETYPE0_MSR(padapter, type); } } inline u8 rtw_get_oper_ch(_adapter *adapter) { return adapter_to_dvobj(adapter)->oper_channel; } inline void rtw_set_oper_ch(_adapter *adapter, u8 ch) { #ifdef DBG_CH_SWITCH const int len = 128; char msg[128] = {0}; int cnt = 0; int i = 0; #endif /* DBG_CH_SWITCH */ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); if (dvobj->oper_channel != ch) { dvobj->on_oper_ch_time = rtw_get_current_time(); #ifdef DBG_CH_SWITCH cnt += snprintf(msg+cnt, len-cnt, "switch to ch %3u", ch); for (i = 0; i < dvobj->iface_nums; i++) { _adapter *iface = dvobj->padapters[i]; cnt += snprintf(msg+cnt, len-cnt, " ["ADPT_FMT":", ADPT_ARG(iface)); if (iface->mlmeextpriv.cur_channel == ch) cnt += snprintf(msg+cnt, len-cnt, "C"); else cnt += snprintf(msg+cnt, len-cnt, "_"); if (iface->wdinfo.listen_channel == ch && !rtw_p2p_chk_state(&iface->wdinfo, P2P_STATE_NONE)) cnt += snprintf(msg+cnt, len-cnt, "L"); else cnt += snprintf(msg+cnt, len-cnt, "_"); cnt += snprintf(msg+cnt, len-cnt, "]"); } DBG_871X(FUNC_ADPT_FMT" %s\n", FUNC_ADPT_ARG(adapter), msg); #endif /* DBG_CH_SWITCH */ } dvobj->oper_channel = ch; } inline u8 rtw_get_oper_bw(_adapter *adapter) { return adapter_to_dvobj(adapter)->oper_bwmode; } inline void rtw_set_oper_bw(_adapter *adapter, u8 bw) { adapter_to_dvobj(adapter)->oper_bwmode = bw; } inline u8 rtw_get_oper_choffset(_adapter *adapter) { return adapter_to_dvobj(adapter)->oper_ch_offset; } inline void rtw_set_oper_choffset(_adapter *adapter, u8 offset) { adapter_to_dvobj(adapter)->oper_ch_offset = offset; } u8 rtw_get_offset_by_ch(u8 channel) { u8 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; if(channel>=1 && channel<=4) { offset = HAL_PRIME_CHNL_OFFSET_LOWER; } else if(channel>=5 && channel<=14) { offset = HAL_PRIME_CHNL_OFFSET_UPPER; } else { switch(channel) { case 36: case 44: case 52: case 60: case 100: case 108: case 116: case 124: case 132: case 149: case 157: offset = HAL_PRIME_CHNL_OFFSET_LOWER; break; case 40: case 48: case 56: case 64: case 104: case 112: case 120: case 128: case 136: case 153: case 161: offset = HAL_PRIME_CHNL_OFFSET_UPPER; break; default: offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; break; } } return offset; } u8 rtw_get_center_ch(u8 channel, u8 chnl_bw, u8 chnl_offset) { u8 center_ch = channel; if(chnl_bw == CHANNEL_WIDTH_80) { if((channel == 36) || (channel == 40) || (channel == 44) || (channel == 48) ) center_ch = 42; if((channel == 52) || (channel == 56) || (channel == 60) || (channel == 64) ) center_ch = 58; if((channel == 100) || (channel == 104) || (channel == 108) || (channel == 112) ) center_ch = 106; if((channel == 116) || (channel == 120) || (channel == 124) || (channel == 128) ) center_ch = 122; if((channel == 132) || (channel == 136) || (channel == 140) || (channel == 144) ) center_ch = 138; if((channel == 149) || (channel == 153) || (channel == 157) || (channel == 161) ) center_ch = 155; else if(channel <= 14) center_ch = 7; } else if(chnl_bw == CHANNEL_WIDTH_40) { if (chnl_offset == HAL_PRIME_CHNL_OFFSET_LOWER) center_ch = channel + 2; else center_ch = channel - 2; } return center_ch; } inline u32 rtw_get_on_oper_ch_time(_adapter *adapter) { return adapter_to_dvobj(adapter)->on_oper_ch_time; } inline u32 rtw_get_on_cur_ch_time(_adapter *adapter) { if (adapter->mlmeextpriv.cur_channel == adapter_to_dvobj(adapter)->oper_channel) return adapter_to_dvobj(adapter)->on_oper_ch_time; else return 0; } void SelectChannel(_adapter *padapter, unsigned char channel) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; #ifdef CONFIG_DUALMAC_CONCURRENT //saved channel info rtw_set_oper_ch(padapter, channel); dc_SelectChannel(padapter, channel); #else //CONFIG_DUALMAC_CONCURRENT _enter_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); //saved channel info rtw_set_oper_ch(padapter, channel); rtw_hal_set_chan(padapter, channel); _exit_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); #endif // CONFIG_DUALMAC_CONCURRENT } void SetBWMode(_adapter *padapter, unsigned short bwmode, unsigned char channel_offset) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; #ifdef CONFIG_DUALMAC_CONCURRENT //saved bw info rtw_set_oper_bw(padapter, bwmode); rtw_set_oper_choffset(padapter, channel_offset); dc_SetBWMode(padapter, bwmode, channel_offset); #else //CONFIG_DUALMAC_CONCURRENT _enter_critical_mutex(&(adapter_to_dvobj(padapter)->setbw_mutex), NULL); //saved bw info rtw_set_oper_bw(padapter, bwmode); rtw_set_oper_choffset(padapter, channel_offset); rtw_hal_set_bwmode(padapter, (CHANNEL_WIDTH)bwmode, channel_offset); _exit_critical_mutex(&(adapter_to_dvobj(padapter)->setbw_mutex), NULL); #endif // CONFIG_DUALMAC_CONCURRENT } void set_channel_bwmode(_adapter *padapter, unsigned char channel, unsigned char channel_offset, unsigned short bwmode) { u8 center_ch, chnl_offset80 = HAL_PRIME_CHNL_OFFSET_DONT_CARE; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; if ( padapter->bNotifyChannelChange ) { DBG_871X( "[%s] ch = %d, offset = %d, bwmode = %d\n", __FUNCTION__, channel, channel_offset, bwmode ); } center_ch = rtw_get_center_ch(channel, bwmode, channel_offset); if(bwmode == CHANNEL_WIDTH_80) { if(center_ch > channel) chnl_offset80 = HAL_PRIME_CHNL_OFFSET_LOWER; else if(center_ch < channel) chnl_offset80 = HAL_PRIME_CHNL_OFFSET_UPPER; else chnl_offset80 = HAL_PRIME_CHNL_OFFSET_DONT_CARE; } //set Channel #ifdef CONFIG_DUALMAC_CONCURRENT //saved channel/bw info rtw_set_oper_ch(padapter, channel); rtw_set_oper_bw(padapter, bwmode); rtw_set_oper_choffset(padapter, channel_offset); SelectChannel(padapter, channel); SetBWMode(padapter, bwmode, channel_offset); #else //CONFIG_DUALMAC_CONCURRENT _enter_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); //saved channel/bw info rtw_set_oper_ch(padapter, channel); rtw_set_oper_bw(padapter, bwmode); rtw_set_oper_choffset(padapter, channel_offset); rtw_hal_set_chnl_bw(padapter, center_ch, bwmode, channel_offset, chnl_offset80); // set center channel _exit_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); #endif // CONFIG_DUALMAC_CONCURRENT } int get_bsstype(unsigned short capability) { if (capability & BIT(0)) { return WIFI_FW_AP_STATE; } else if (capability & BIT(1)) { return WIFI_FW_ADHOC_STATE; } else { return 0; } } __inline u8 *get_my_bssid(WLAN_BSSID_EX *pnetwork) { return (pnetwork->MacAddress); } u16 get_beacon_interval(WLAN_BSSID_EX *bss) { unsigned short val; _rtw_memcpy((unsigned char *)&val, rtw_get_beacon_interval_from_ie(bss->IEs), 2); return le16_to_cpu(val); } int is_client_associated_to_ap(_adapter *padapter) { struct mlme_ext_priv *pmlmeext; struct mlme_ext_info *pmlmeinfo; if(!padapter) return _FAIL; pmlmeext = &padapter->mlmeextpriv; pmlmeinfo = &(pmlmeext->mlmext_info); if ((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && ((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE)) { return _TRUE; } else { return _FAIL; } } int is_client_associated_to_ibss(_adapter *padapter) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if ((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)) { return _TRUE; } else { return _FAIL; } } int is_IBSS_empty(_adapter *padapter) { unsigned int i; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); for (i = IBSS_START_MAC_ID; i < NUM_STA; i++) { if (pmlmeinfo->FW_sta_info[i].status == 1) { return _FAIL; } } return _TRUE; } unsigned int decide_wait_for_beacon_timeout(unsigned int bcn_interval) { if ((bcn_interval << 2) < WAIT_FOR_BCN_TO_MIN) { return WAIT_FOR_BCN_TO_MIN; } else if ((bcn_interval << 2) > WAIT_FOR_BCN_TO_MAX) { return WAIT_FOR_BCN_TO_MAX; } else { return ((bcn_interval << 2)); } } void CAM_empty_entry( PADAPTER Adapter, u8 ucIndex ) { rtw_hal_set_hwreg(Adapter, HW_VAR_CAM_EMPTY_ENTRY, (u8 *)(&ucIndex)); } void invalidate_cam_all(_adapter *padapter) { struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; _irqL irqL; rtw_hal_set_hwreg(padapter, HW_VAR_CAM_INVALID_ALL, 0); _enter_critical_bh(&cam_ctl->lock, &irqL); cam_ctl->bitmap = 0; _rtw_memset(dvobj->cam_cache, 0, sizeof(struct cam_entry_cache)*TOTAL_CAM_ENTRY); _exit_critical_bh(&cam_ctl->lock, &irqL); } #if 1 static u32 _ReadCAM(_adapter *padapter ,u32 addr) { u32 count = 0, cmd; cmd = CAM_POLLINIG |addr ; rtw_write32(padapter, RWCAM, cmd); do{ if(0 == (rtw_read32(padapter,REG_CAMCMD) & CAM_POLLINIG)){ break; } }while(count++ < 100); return rtw_read32(padapter,REG_CAMREAD); } void read_cam(_adapter *padapter ,u8 entry, u8 *get_key) { u32 j,count = 0, addr, cmd; addr = entry << 3; //DBG_8192C("********* DUMP CAM Entry_#%02d***************\n",entry); for (j = 0; j < 6; j++) { cmd = _ReadCAM(padapter ,addr+j); //DBG_8192C("offset:0x%02x => 0x%08x \n",addr+j,cmd); if(j>1) //get key from cam _rtw_memcpy(get_key+(j-2)*4, &cmd, 4); } //DBG_8192C("*********************************\n"); } #endif void _write_cam(_adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key) { unsigned int i, val, addr; int j; u32 cam_val[2]; addr = entry << 3; for (j = 5; j >= 0; j--) { switch (j) { case 0: val = (ctrl | (mac[0] << 16) | (mac[1] << 24) ); break; case 1: val = (mac[2] | ( mac[3] << 8) | (mac[4] << 16) | (mac[5] << 24)); break; default: i = (j - 2) << 2; val = (key[i] | (key[i+1] << 8) | (key[i+2] << 16) | (key[i+3] << 24)); break; } cam_val[0] = val; cam_val[1] = addr + (unsigned int)j; rtw_hal_set_hwreg(padapter, HW_VAR_CAM_WRITE, (u8 *)cam_val); } } void _clear_cam_entry(_adapter *padapter, u8 entry) { unsigned char null_sta[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; unsigned char null_key[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,0x00, 0x00, 0x00, 0x00,0x00, 0x00, 0x00, 0x00}; _write_cam(padapter, entry, 0, null_sta, null_key); } inline void write_cam(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key) { #ifdef CONFIG_WRITE_CACHE_ONLY write_cam_cache(adapter, id ,ctrl, mac, key); #else _write_cam(adapter, id, ctrl, mac, key); write_cam_cache(adapter, id ,ctrl, mac, key); #endif } inline void clear_cam_entry(_adapter *adapter, u8 id) { _clear_cam_entry(adapter, id); clear_cam_cache(adapter, id); } inline void write_cam_from_cache(_adapter *adapter, u8 id) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; _irqL irqL; struct cam_entry_cache cache; _enter_critical_bh(&cam_ctl->lock, &irqL); _rtw_memcpy(&cache, &dvobj->cam_cache[id], sizeof(struct cam_entry_cache)); _exit_critical_bh(&cam_ctl->lock, &irqL); _write_cam(adapter, id, cache.ctrl, cache.mac, cache.key); } void write_cam_cache(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; _irqL irqL; _enter_critical_bh(&cam_ctl->lock, &irqL); dvobj->cam_cache[id].ctrl = ctrl; _rtw_memcpy(dvobj->cam_cache[id].mac, mac, ETH_ALEN); _rtw_memcpy(dvobj->cam_cache[id].key, key, 16); _exit_critical_bh(&cam_ctl->lock, &irqL); } void clear_cam_cache(_adapter *adapter, u8 id) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; _irqL irqL; _enter_critical_bh(&cam_ctl->lock, &irqL); _rtw_memset(&(dvobj->cam_cache[id]), 0, sizeof(struct cam_entry_cache)); _exit_critical_bh(&cam_ctl->lock, &irqL); } s16 rtw_get_camid(_adapter *adapter, struct sta_info *sta, s16 kid) { u8 macid; s16 camid; //cam_entry: //0~3 for default key //for concurrent mode (ap+sta, sta+sta): //default key is disable, using sw encrypt/decrypt //camid 0, 1, 2, 3 is default entry for default key/group key //macid = 1 is for bc/mc stainfo, no mapping to camid //macid = 0 mapping to camid 4 //for macid >=2, camid = macid+3; if (sta) { struct mlme_ext_info *mlmeinfo = &adapter->mlmeextpriv.mlmext_info; macid = sta->mac_id; if((mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { if((macid == 1) || (macid>(NUM_STA-4))){ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" failed, mac_id=%d\n", FUNC_ADPT_ARG(adapter), macid); camid = -1; goto exit; } } if(macid==0) camid = 4; else if(macid >=2) camid = macid + 3; else camid = 4; } else { /* default key is disabled */ camid = -1; } exit: return (s16)camid; } bool _rtw_camid_is_gk(_adapter *adapter, u8 cam_id) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; bool ret = _FALSE; if (cam_id >= TOTAL_CAM_ENTRY) goto exit; if (!(cam_ctl->bitmap & BIT(cam_id))) goto exit; ret = (dvobj->cam_cache[cam_id].ctrl&BIT6)?_TRUE:_FALSE; exit: return ret; } bool rtw_camid_is_gk(_adapter *adapter, u8 cam_id) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; _irqL irqL; bool ret; _enter_critical_bh(&cam_ctl->lock, &irqL); ret = _rtw_camid_is_gk(adapter, cam_id); _exit_critical_bh(&cam_ctl->lock, &irqL); return ret; } s16 _rtw_camid_search(_adapter *adapter, u8 *addr, s16 kid) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; int i; s16 cam_id = -1; for (i=0;icam_cache[i].mac, addr, ETH_ALEN) == _FALSE) continue; if (kid >= 0 && kid != (dvobj->cam_cache[i].ctrl&0x03)) continue; cam_id = i; break; } if (0) { if (addr) DBG_871X(FUNC_ADPT_FMT" addr:"MAC_FMT" kid:%d, return cam_id:%d\n" , FUNC_ADPT_ARG(adapter), MAC_ARG(addr), kid, cam_id); else DBG_871X(FUNC_ADPT_FMT" addr:%p kid:%d, return cam_id:%d\n" , FUNC_ADPT_ARG(adapter), addr, kid, cam_id); } return cam_id; } s16 rtw_camid_search(_adapter *adapter, u8 *addr, s16 kid) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; _irqL irqL; s16 cam_id = -1; _enter_critical_bh(&cam_ctl->lock, &irqL); cam_id = _rtw_camid_search(adapter, addr, kid); _exit_critical_bh(&cam_ctl->lock, &irqL); return cam_id; } s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; _irqL irqL; s16 cam_id = -1; _enter_critical_bh(&cam_ctl->lock, &irqL); #ifdef DYNAMIC_CAMID_ALLOC { struct mlme_ext_info *mlmeinfo = &adapter->mlmeextpriv.mlmext_info; if((((mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) || ((mlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)) && !sta) { /* AP/Ad-hoc mode group key: static alloction to default key by key ID */ if (kid > 3) { DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" group key with invalid key id:%u\n" , FUNC_ADPT_ARG(adapter), kid); rtw_warn_on(1); goto bitmap_handle; } cam_id = kid; } else { int i; u8 *addr = sta?sta->hwaddr:NULL; if(!sta) { if (!(mlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) { /* bypass STA mode group key setting before connected(ex:WEP) because bssid is not ready */ goto bitmap_handle; } addr = get_bssid(&adapter->mlmepriv); } if ((i = _rtw_camid_search(adapter, addr, kid)) >= 0) { /* Fix issue that pairwise and group key have same key id. Pairwise key first, group key can overwirte group only(ex: rekey) */ if (sta || _rtw_camid_is_gk(adapter, i) == _TRUE) cam_id = i; else DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" group key id:%u the same key id as pairwise key\n" , FUNC_ADPT_ARG(adapter), kid); goto bitmap_handle; } for (i=4;ibitmap & BIT(i))) break; if (i == TOTAL_CAM_ENTRY) { if (sta) DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" pairwise key with "MAC_FMT" id:%u no room\n" , FUNC_ADPT_ARG(adapter), MAC_ARG(sta->hwaddr), kid); else DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" group key id:%u no room\n" , FUNC_ADPT_ARG(adapter), kid); rtw_warn_on(1); goto bitmap_handle; } cam_id = i; } } #else cam_id = rtw_get_camid(adapter, sta, kid); #endif /* DYNAMIC_CAMID_ALLOC */ bitmap_handle: if (cam_id >= 0) cam_ctl->bitmap |= BIT(cam_id); _exit_critical_bh(&cam_ctl->lock, &irqL); return cam_id; } void rtw_camid_free(_adapter *adapter, u8 cam_id) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; _irqL irqL; _enter_critical_bh(&cam_ctl->lock, &irqL); if (cam_id < TOTAL_CAM_ENTRY) cam_ctl->bitmap &= ~(BIT(cam_id)); _exit_critical_bh(&cam_ctl->lock, &irqL); } int allocate_fw_sta_entry(_adapter *padapter) { unsigned int mac_id; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); for (mac_id = IBSS_START_MAC_ID; mac_id < NUM_STA; mac_id++) { if (pmlmeinfo->FW_sta_info[mac_id].status == 0) { pmlmeinfo->FW_sta_info[mac_id].status = 1; pmlmeinfo->FW_sta_info[mac_id].retry = 0; break; } } return mac_id; } void flush_all_cam_entry(_adapter *padapter) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); #ifdef CONFIG_CONCURRENT_MODE if(check_buddy_fwstate(padapter, _FW_LINKED) == _TRUE) { if(check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info *psta; psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress); if(psta) { if(psta->state & WIFI_AP_STATE) {} //clear cam when ap free per sta_info else { rtw_clearstakey_cmd(padapter, psta, _FALSE); } } } else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { /* clear default key */ int i, cam_id; u8 null_addr[ETH_ALEN]= {0,0,0,0,0,0}; for (i=0;i<4;i++) { cam_id = rtw_camid_search(padapter, null_addr, i); if (cam_id >= 0) { clear_cam_entry(padapter, cam_id); rtw_camid_free(padapter, cam_id); } } /* clear default key related key search setting */ #ifdef DYNAMIC_CAMID_ALLOC rtw_hal_set_hwreg(padapter, HW_VAR_SEC_DK_CFG, (u8*)_FALSE); #endif /* leave pairwise key when ap free per sta_info */ } } else #endif //CONFIG_CONCURRENT_MODE { invalidate_cam_all(padapter); /* clear default key related key search setting */ #ifdef DYNAMIC_CAMID_ALLOC rtw_hal_set_hwreg(padapter, HW_VAR_SEC_DK_CFG, (u8*)_FALSE); #endif } _rtw_memset((u8 *)(pmlmeinfo->FW_sta_info), 0, sizeof(pmlmeinfo->FW_sta_info)); } #if defined(CONFIG_P2P) && defined(CONFIG_WFD) int WFD_info_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) { struct registry_priv *pregpriv = &padapter->registrypriv; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct wifidirect_info *pwdinfo; u8 wfd_ie[ 128 ] = { 0x00 }; u32 wfd_ielen = 0; pwdinfo = &padapter->wdinfo; if ( rtw_get_wfd_ie( ( u8* ) pIE, pIE->Length, wfd_ie, &wfd_ielen ) ) { u8 attr_content[ 10 ] = { 0x00 }; u32 attr_contentlen = 0; DBG_871X( "[%s] Found WFD IE\n", __FUNCTION__ ); rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); if ( attr_contentlen ) { pwdinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info->peer_rtsp_ctrlport ); return( _TRUE ); } } else { DBG_871X( "[%s] NO WFD IE\n", __FUNCTION__ ); } return( _FAIL ); } #endif int WMM_param_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) { //struct registry_priv *pregpriv = &padapter->registrypriv; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if(pmlmepriv->qospriv.qos_option==0) { pmlmeinfo->WMM_enable = 0; return _FALSE; } if(_rtw_memcmp(&(pmlmeinfo->WMM_param), (pIE->data + 6), sizeof(struct WMM_para_element))) { return _FALSE; } else { _rtw_memcpy(&(pmlmeinfo->WMM_param), (pIE->data + 6), sizeof(struct WMM_para_element)); } pmlmeinfo->WMM_enable = 1; return _TRUE; /*if (pregpriv->wifi_spec == 1) { if (pmlmeinfo->WMM_enable == 1) { //todo: compare the parameter set count & decide wheher to update or not return _FAIL; } else { pmlmeinfo->WMM_enable = 1; _rtw_rtw_memcpy(&(pmlmeinfo->WMM_param), (pIE->data + 6), sizeof(struct WMM_para_element)); return _TRUE; } } else { pmlmeinfo->WMM_enable = 0; return _FAIL; }*/ } void WMMOnAssocRsp(_adapter *padapter) { u8 ACI, ACM, AIFS, ECWMin, ECWMax, aSifsTime; u8 acm_mask; u16 TXOP; u32 acParm, i; u32 edca[4], inx[4]; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct registry_priv *pregpriv = &padapter->registrypriv; acm_mask = 0; if (IsSupported5G(pmlmeext->cur_wireless_mode) || (pmlmeext->cur_wireless_mode & WIRELESS_11_24N) ) aSifsTime = 16; else aSifsTime = 10; if (pmlmeinfo->WMM_enable == 0) { padapter->mlmepriv.acm_mask = 0; AIFS = aSifsTime + (2 * pmlmeinfo->slotTime); if (pmlmeext->cur_wireless_mode & (WIRELESS_11G |WIRELESS_11A)) { ECWMin = 4; ECWMax = 10; } else if (pmlmeext->cur_wireless_mode & WIRELESS_11B) { ECWMin = 5; ECWMax = 10; } else { ECWMin = 4; ECWMax = 10; } TXOP = 0; acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm)); rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm)); rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm)); ECWMin = 2; ECWMax = 3; TXOP = 0x2f; acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm)); } else { edca[0] = edca[1] = edca[2] = edca[3] = 0; for (i = 0; i < 4; i++) { ACI = (pmlmeinfo->WMM_param.ac_param[i].ACI_AIFSN >> 5) & 0x03; ACM = (pmlmeinfo->WMM_param.ac_param[i].ACI_AIFSN >> 4) & 0x01; //AIFS = AIFSN * slot time + SIFS - r2t phy delay AIFS = (pmlmeinfo->WMM_param.ac_param[i].ACI_AIFSN & 0x0f) * pmlmeinfo->slotTime + aSifsTime; ECWMin = (pmlmeinfo->WMM_param.ac_param[i].CW & 0x0f); ECWMax = (pmlmeinfo->WMM_param.ac_param[i].CW & 0xf0) >> 4; TXOP = le16_to_cpu(pmlmeinfo->WMM_param.ac_param[i].TXOP_limit); acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); switch (ACI) { case 0x0: rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm)); acm_mask |= (ACM? BIT(1):0); edca[XMIT_BE_QUEUE] = acParm; break; case 0x1: rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm)); //acm_mask |= (ACM? BIT(0):0); edca[XMIT_BK_QUEUE] = acParm; break; case 0x2: rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm)); acm_mask |= (ACM? BIT(2):0); edca[XMIT_VI_QUEUE] = acParm; break; case 0x3: rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm)); acm_mask |= (ACM? BIT(3):0); edca[XMIT_VO_QUEUE] = acParm; break; } DBG_871X("WMM(%x): %x, %x\n", ACI, ACM, acParm); } if(padapter->registrypriv.acm_method == 1) rtw_hal_set_hwreg(padapter, HW_VAR_ACM_CTRL, (u8 *)(&acm_mask)); else padapter->mlmepriv.acm_mask = acm_mask; inx[0] = 0; inx[1] = 1; inx[2] = 2; inx[3] = 3; if(pregpriv->wifi_spec==1) { u32 j, tmp, change_inx=_FALSE; //entry indx: 0->vo, 1->vi, 2->be, 3->bk. for(i=0; i<4; i++) { for(j=i+1; j<4; j++) { //compare CW and AIFS if((edca[j] & 0xFFFF) < (edca[i] & 0xFFFF)) { change_inx = _TRUE; } else if((edca[j] & 0xFFFF) == (edca[i] & 0xFFFF)) { //compare TXOP if((edca[j] >> 16) > (edca[i] >> 16)) change_inx = _TRUE; } if(change_inx) { tmp = edca[i]; edca[i] = edca[j]; edca[j] = tmp; tmp = inx[i]; inx[i] = inx[j]; inx[j] = tmp; change_inx = _FALSE; } } } } for(i=0; i<4; i++) { pxmitpriv->wmm_para_seq[i] = inx[i]; DBG_871X("wmm_para_seq(%d): %d\n", i, pxmitpriv->wmm_para_seq[i]); } } } static void bwmode_update_check(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) { #ifdef CONFIG_80211N_HT unsigned char new_bwmode; unsigned char new_ch_offset; struct HT_info_element *pHT_info; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct registry_priv *pregistrypriv = &padapter->registrypriv; struct ht_priv *phtpriv = &pmlmepriv->htpriv; u8 cbw40_enable=0; if(!pIE) return; if(phtpriv->ht_option == _FALSE) return; if(pmlmeext->cur_bwmode >= CHANNEL_WIDTH_80) return; if(pIE->Length > sizeof(struct HT_info_element)) return; pHT_info = (struct HT_info_element *)pIE->data; if (pmlmeext->cur_channel > 14) { if ((pregistrypriv->bw_mode & 0xf0) > 0) cbw40_enable = 1; } else { if ((pregistrypriv->bw_mode & 0x0f) > 0) cbw40_enable = 1; } if((pHT_info->infos[0] & BIT(2)) && cbw40_enable) { new_bwmode = CHANNEL_WIDTH_40; switch (pHT_info->infos[0] & 0x3) { case 1: new_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; break; case 3: new_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; break; default: new_bwmode = CHANNEL_WIDTH_20; new_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; break; } } else { new_bwmode = CHANNEL_WIDTH_20; new_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; } if((new_bwmode!= pmlmeext->cur_bwmode) || (new_ch_offset!=pmlmeext->cur_ch_offset)) { pmlmeinfo->bwmode_updated = _TRUE; pmlmeext->cur_bwmode = new_bwmode; pmlmeext->cur_ch_offset = new_ch_offset; //update HT info also HT_info_handler(padapter, pIE); } else { pmlmeinfo->bwmode_updated = _FALSE; } if(_TRUE == pmlmeinfo->bwmode_updated) { struct sta_info *psta; WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); struct sta_priv *pstapriv = &padapter->stapriv; //set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); //update ap's stainfo psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress); if(psta) { struct ht_priv *phtpriv_sta = &psta->htpriv; if(phtpriv_sta->ht_option) { // bwmode psta->bw_mode = pmlmeext->cur_bwmode; phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset; } else { psta->bw_mode = CHANNEL_WIDTH_20; phtpriv_sta->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; } rtw_dm_ra_mask_wk_cmd(padapter, (u8 *)psta); } //pmlmeinfo->bwmode_updated = _FALSE;//bwmode_updated done, reset it! } #endif //CONFIG_80211N_HT } void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) { #ifdef CONFIG_80211N_HT unsigned int i; u8 rf_type; u8 max_AMPDU_len, min_MPDU_spacing; u8 cur_ldpc_cap=0, cur_stbc_cap=0, cur_beamform_cap=0; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct ht_priv *phtpriv = &pmlmepriv->htpriv; struct registry_priv *pregistrypriv = &padapter->registrypriv; if(pIE==NULL) return; if(phtpriv->ht_option == _FALSE) return; pmlmeinfo->HT_caps_enable = 1; for (i = 0; i < (pIE->Length); i++) { if (i != 2) { // Commented by Albert 2010/07/12 // Got the endian issue here. pmlmeinfo->HT_caps.u.HT_cap[i] &= (pIE->data[i]); } else { /* AMPDU Parameters field */ /* Get MIN of MAX AMPDU Length Exp */ if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3) > (pIE->data[i] & 0x3)) { max_AMPDU_len = (pIE->data[i] & 0x3); } else { max_AMPDU_len = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3); } /* Get MAX of MIN MPDU Start Spacing */ if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) > (pIE->data[i] & 0x1c)) { min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c); } else { min_MPDU_spacing = (pIE->data[i] & 0x1c); } pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para = max_AMPDU_len | min_MPDU_spacing; } } // Commented by Albert 2010/07/12 // Have to handle the endian issue after copying. // HT_ext_caps didn't be used yet. pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info = le16_to_cpu( pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info ); pmlmeinfo->HT_caps.u.HT_cap_element.HT_ext_caps = le16_to_cpu( pmlmeinfo->HT_caps.u.HT_cap_element.HT_ext_caps ); rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); //update the MCS set for (i = 0; i < 16; i++) pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= pmlmeext->default_supported_mcs_set[i]; //update the MCS rates switch(rf_type) { case RF_1T1R: case RF_1T2R: set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_1R); break; case RF_2T2R: default: #ifdef CONFIG_DISABLE_MCS13TO15 if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_40 && pregistrypriv->wifi_spec != 1 ) set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R_13TO15_OFF); else set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R); #else //CONFIG_DISABLE_MCS13TO15 set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R); #endif //CONFIG_DISABLE_MCS13TO15 } if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { // Config STBC setting if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX) && GET_HT_CAP_ELE_TX_STBC(pIE->data)) { SET_FLAG(cur_stbc_cap, STBC_HT_ENABLE_TX); DBG_871X("Enable HT Tx STBC !\n"); } phtpriv->stbc_cap = cur_stbc_cap; #ifdef CONFIG_BEAMFORMING // Config Tx beamforming setting if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE) && GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(pIE->data)) { SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); } if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE) && GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(pIE->data)) { SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); } phtpriv->beamform_cap = cur_beamform_cap; if (cur_beamform_cap) { DBG_871X("AP HT Beamforming Cap = 0x%02X\n", cur_beamform_cap); } #endif //CONFIG_BEAMFORMING } else { // Config LDPC Coding Capability if (TEST_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_TX) && GET_HT_CAP_ELE_LDPC_CAP(pIE->data)) { SET_FLAG(cur_ldpc_cap, (LDPC_HT_ENABLE_TX | LDPC_HT_CAP_TX)); DBG_871X("Enable HT Tx LDPC!\n"); } phtpriv->ldpc_cap = cur_ldpc_cap; // Config STBC setting if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX) && GET_HT_CAP_ELE_RX_STBC(pIE->data)) { SET_FLAG(cur_stbc_cap, (STBC_HT_ENABLE_TX | STBC_HT_CAP_TX) ); DBG_871X("Enable HT Tx STBC!\n"); } phtpriv->stbc_cap = cur_stbc_cap; #ifdef CONFIG_BEAMFORMING // Config Tx beamforming setting if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE) && GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(pIE->data)) { SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); } if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE) && GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(pIE->data)) { SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); } phtpriv->beamform_cap = cur_beamform_cap; if (cur_beamform_cap) { DBG_871X("Client HT Beamforming Cap = 0x%02X\n", cur_beamform_cap); } #endif //CONFIG_BEAMFORMING } #endif //CONFIG_80211N_HT } void HT_info_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) { #ifdef CONFIG_80211N_HT struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct ht_priv *phtpriv = &pmlmepriv->htpriv; if(pIE==NULL) return; if(phtpriv->ht_option == _FALSE) return; if(pIE->Length > sizeof(struct HT_info_element)) return; pmlmeinfo->HT_info_enable = 1; _rtw_memcpy(&(pmlmeinfo->HT_info), pIE->data, pIE->Length); #endif //CONFIG_80211N_HT return; } void HTOnAssocRsp(_adapter *padapter) { unsigned char max_AMPDU_len; unsigned char min_MPDU_spacing; //struct registry_priv *pregpriv = &padapter->registrypriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); DBG_871X("%s\n", __FUNCTION__); if ((pmlmeinfo->HT_info_enable) && (pmlmeinfo->HT_caps_enable)) { pmlmeinfo->HT_enable = 1; } else { pmlmeinfo->HT_enable = 0; //set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); return; } //handle A-MPDU parameter field /* AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k AMPDU_para [4:2]:Min MPDU Start Spacing */ max_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) >> 2; rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing)); rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len)); #if 0 //move to rtw_update_ht_cap() if ((pregpriv->bw_mode > 0) && (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & BIT(1)) && (pmlmeinfo->HT_info.infos[0] & BIT(2))) { //switch to the 40M Hz mode accoring to the AP pmlmeext->cur_bwmode = CHANNEL_WIDTH_40; switch ((pmlmeinfo->HT_info.infos[0] & 0x3)) { case EXTCHNL_OFFSET_UPPER: pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; break; case EXTCHNL_OFFSET_LOWER: pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; break; default: pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; break; } //SelectChannel(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset); } #endif //set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); #if 0 //move to rtw_update_ht_cap() // // Config SM Power Save setting // pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & 0x0C) >> 2; if(pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC) { /*u8 i; //update the MCS rates for (i = 0; i < 16; i++) { pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; }*/ DBG_871X("%s(): WLAN_HT_CAP_SM_PS_STATIC\n",__FUNCTION__); } // // Config current HT Protection mode. // pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; #endif } void ERP_IE_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if(pIE->Length>1) return; pmlmeinfo->ERP_enable = 1; _rtw_memcpy(&(pmlmeinfo->ERP_IE), pIE->data, pIE->Length); } void VCS_update(_adapter *padapter, struct sta_info *psta) { struct registry_priv *pregpriv = &padapter->registrypriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); switch (pregpriv->vrtl_carrier_sense)/* 0:off 1:on 2:auto */ { case 0: //off psta->rtsen = 0; psta->cts2self = 0; break; case 1: //on if (pregpriv->vcs_type == 1) /* 1:RTS/CTS 2:CTS to self */ { psta->rtsen = 1; psta->cts2self = 0; } else { psta->rtsen = 0; psta->cts2self = 1; } break; case 2: //auto default: if ((pmlmeinfo->ERP_enable) && (pmlmeinfo->ERP_IE & BIT(1))) { if (pregpriv->vcs_type == 1) { psta->rtsen = 1; psta->cts2self = 0; } else { psta->rtsen = 0; psta->cts2self = 1; } } else { psta->rtsen = 0; psta->cts2self = 0; } break; } } void update_ldpc_stbc_cap(struct sta_info *psta) { #ifdef CONFIG_80211N_HT #ifdef CONFIG_80211AC_VHT if (psta->vhtpriv.vht_option) { if(TEST_FLAG(psta->vhtpriv.ldpc_cap, LDPC_VHT_ENABLE_TX)) psta->ldpc = 1; if(TEST_FLAG(psta->vhtpriv.stbc_cap, STBC_VHT_ENABLE_TX)) psta->stbc = 1; } else #endif //CONFIG_80211AC_VHT if (psta->htpriv.ht_option) { if(TEST_FLAG(psta->htpriv.ldpc_cap, LDPC_HT_ENABLE_TX)) psta->ldpc = 1; if(TEST_FLAG(psta->htpriv.stbc_cap, STBC_HT_ENABLE_TX)) psta->stbc = 1; } else { psta->ldpc = 0; psta->stbc = 0; } #endif //CONFIG_80211N_HT } #ifdef CONFIG_TDLS int check_ap_tdls_prohibited(u8 *pframe, u8 pkt_len) { u8 tdls_prohibited_bit = 0x40; //bit(38); TDLS_prohibited if(pkt_len < 5) { return _FALSE; } pframe += 4; if( (*pframe) & tdls_prohibited_bit ) return _TRUE; return _FALSE; } #endif //CONFIG_TDLS /* * rtw_get_bcn_keys: get beacon keys from recv frame * * TODO: * WLAN_EID_COUNTRY * WLAN_EID_ERP_INFO * WLAN_EID_CHANNEL_SWITCH * WLAN_EID_PWR_CONSTRAINT */ int rtw_get_bcn_keys(ADAPTER *Adapter, u8 *pframe, u32 packet_len, struct beacon_keys *recv_beacon) { int left; u16 capability; unsigned char *pos; struct rtw_ieee802_11_elems elems; struct rtw_ieee80211_ht_cap *pht_cap = NULL; struct HT_info_element *pht_info = NULL; _rtw_memset(recv_beacon, 0, sizeof(*recv_beacon)); /* checking capabilities */ capability = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN + 10)); /* checking IEs */ left = packet_len - sizeof(struct rtw_ieee80211_hdr_3addr) - _BEACON_IE_OFFSET_; pos = pframe + sizeof(struct rtw_ieee80211_hdr_3addr) + _BEACON_IE_OFFSET_; if (rtw_ieee802_11_parse_elems(pos, left, &elems, 1) == ParseFailed) return _FALSE; /* check bw and channel offset */ if (elems.ht_capabilities) { if (elems.ht_capabilities_len != sizeof(*pht_cap)) return _FALSE; pht_cap = (struct rtw_ieee80211_ht_cap *) elems.ht_capabilities; recv_beacon->ht_cap_info = pht_cap->cap_info; } if (elems.ht_operation) { if (elems.ht_operation_len != sizeof(*pht_info)) return _FALSE; pht_info = (struct HT_info_element *) elems.ht_operation; recv_beacon->ht_info_infos_0_sco = pht_info->infos[0] & 0x03; } /* Checking for channel */ if (elems.ds_params && elems.ds_params_len == sizeof(recv_beacon->bcn_channel)) _rtw_memcpy(&recv_beacon->bcn_channel, elems.ds_params, sizeof(recv_beacon->bcn_channel)); else if (pht_info) /* In 5G, some ap do not have DSSET IE checking HT info for channel */ recv_beacon->bcn_channel = pht_info->primary_channel; else { /* we don't find channel IE, so don't check it */ //DBG_871X("Oops: %s we don't find channel IE, so don't check it \n", __func__); recv_beacon->bcn_channel = Adapter->mlmeextpriv.cur_channel; } /* checking SSID */ if (elems.ssid) { if (elems.ssid_len > sizeof(recv_beacon->ssid)) return _FALSE; _rtw_memcpy(recv_beacon->ssid, elems.ssid, elems.ssid_len); recv_beacon->ssid_len = elems.ssid_len; } else; // means hidden ssid /* checking RSN first */ if (elems.rsn_ie && elems.rsn_ie_len) { recv_beacon->encryp_protocol = ENCRYP_PROTOCOL_WPA2; rtw_parse_wpa2_ie(elems.rsn_ie - 2, elems.rsn_ie_len + 2, &recv_beacon->group_cipher, &recv_beacon->pairwise_cipher, &recv_beacon->is_8021x); } /* checking WPA secon */ else if (elems.wpa_ie && elems.wpa_ie_len) { recv_beacon->encryp_protocol = ENCRYP_PROTOCOL_WPA; rtw_parse_wpa_ie(elems.wpa_ie - 2, elems.wpa_ie_len + 2, &recv_beacon->group_cipher, &recv_beacon->pairwise_cipher, &recv_beacon->is_8021x); } else if (capability & BIT(4)) { recv_beacon->encryp_protocol = ENCRYP_PROTOCOL_WEP; } return _TRUE; } void rtw_dump_bcn_keys(struct beacon_keys *recv_beacon) { int i; char *p; u8 ssid[IW_ESSID_MAX_SIZE + 1]; _rtw_memcpy(ssid, recv_beacon->ssid, recv_beacon->ssid_len); ssid[recv_beacon->ssid_len] = '\0'; DBG_871X("%s: ssid = %s\n", __func__, ssid); DBG_871X("%s: channel = %x\n", __func__, recv_beacon->bcn_channel); DBG_871X("%s: ht_cap = %x\n", __func__, recv_beacon->ht_cap_info); DBG_871X("%s: ht_info_infos_0_sco = %x\n", __func__, recv_beacon->ht_info_infos_0_sco); DBG_871X("%s: sec=%d, group = %x, pair = %x, 8021X = %x\n", __func__, recv_beacon->encryp_protocol, recv_beacon->group_cipher, recv_beacon->pairwise_cipher, recv_beacon->is_8021x); } int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len) { #if 0 unsigned int len; unsigned char *p; unsigned short val16, subtype; struct wlan_network *cur_network = &(Adapter->mlmepriv.cur_network); //u8 wpa_ie[255],rsn_ie[255]; u16 wpa_len=0,rsn_len=0; u8 encryp_protocol = 0; WLAN_BSSID_EX *bssid; int group_cipher = 0, pairwise_cipher = 0, is_8021x = 0; unsigned char *pbuf; u32 wpa_ielen = 0; u8 *pbssid = GetAddr3Ptr(pframe); u32 hidden_ssid = 0; u8 cur_network_type, network_type=0; struct HT_info_element *pht_info = NULL; struct rtw_ieee80211_ht_cap *pht_cap = NULL; u32 bcn_channel; unsigned short ht_cap_info; unsigned char ht_info_infos_0; #endif unsigned int len; u8 *pbssid = GetAddr3Ptr(pframe); struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; struct wlan_network *cur_network = &(Adapter->mlmepriv.cur_network); struct beacon_keys recv_beacon; if (is_client_associated_to_ap(Adapter) == _FALSE) return _TRUE; len = packet_len - sizeof(struct rtw_ieee80211_hdr_3addr); if (len > MAX_IE_SZ) { DBG_871X("%s IE too long for survey event\n", __func__); return _FAIL; } if (_rtw_memcmp(cur_network->network.MacAddress, pbssid, 6) == _FALSE) { DBG_871X("Oops: rtw_check_network_encrypt linked but recv other bssid bcn\n" MAC_FMT MAC_FMT, MAC_ARG(pbssid), MAC_ARG(cur_network->network.MacAddress)); return _TRUE; } if (rtw_get_bcn_keys(Adapter, pframe, packet_len, &recv_beacon) == _FALSE) return _TRUE; // parsing failed => broken IE // don't care hidden ssid, use current beacon ssid directly if (recv_beacon.ssid_len == 0) { _rtw_memcpy(recv_beacon.ssid, pmlmepriv->cur_beacon_keys.ssid, pmlmepriv->cur_beacon_keys.ssid_len); recv_beacon.ssid_len = pmlmepriv->cur_beacon_keys.ssid_len; } if (_rtw_memcmp(&recv_beacon, &pmlmepriv->cur_beacon_keys, sizeof(recv_beacon)) == _TRUE) { pmlmepriv->new_beacon_cnts = 0; } else if ((pmlmepriv->new_beacon_cnts == 0) || _rtw_memcmp(&recv_beacon, &pmlmepriv->new_beacon_keys, sizeof(recv_beacon)) == _FALSE) { DBG_871X_LEVEL(_drv_err_, "%s: start new beacon (seq=%d)\n", __func__, GetSequence(pframe)); if (pmlmepriv->new_beacon_cnts == 0) { DBG_871X_LEVEL(_drv_err_, "%s: cur beacon key\n", __func__); DBG_871X_EXP(_drv_err_, rtw_dump_bcn_keys(&pmlmepriv->cur_beacon_keys)); } DBG_871X_LEVEL(_drv_err_, "%s: new beacon key\n", __func__); DBG_871X_EXP(_drv_err_, rtw_dump_bcn_keys(&recv_beacon)); memcpy(&pmlmepriv->new_beacon_keys, &recv_beacon, sizeof(recv_beacon)); pmlmepriv->new_beacon_cnts = 1; } else { DBG_871X_LEVEL(_drv_err_, "%s: new beacon again (seq=%d)\n", __func__, GetSequence(pframe)); pmlmepriv->new_beacon_cnts++; } // if counter >= max, it means beacon is changed really if (pmlmepriv->new_beacon_cnts >= new_bcn_max) { DBG_871X_LEVEL(_drv_err_, "%s: new beacon occur!!\n", __func__); // check bw mode change only? pmlmepriv->cur_beacon_keys.ht_cap_info = recv_beacon.ht_cap_info; pmlmepriv->cur_beacon_keys.ht_info_infos_0_sco = recv_beacon.ht_info_infos_0_sco; if (_rtw_memcmp(&recv_beacon, &pmlmepriv->cur_beacon_keys, sizeof(recv_beacon)) == _FALSE) { // beacon is changed, have to do disconnect/connect return _FAIL; } DBG_871X("%s bw mode change\n", __func__); DBG_871X("%s bcn now: ht_cap_info:%x ht_info_infos_0:%x\n", __func__, cur_network->BcnInfo.ht_cap_info, cur_network->BcnInfo.ht_info_infos_0); cur_network->BcnInfo.ht_cap_info = recv_beacon.ht_cap_info; cur_network->BcnInfo.ht_info_infos_0 = (cur_network->BcnInfo.ht_info_infos_0 & (~0x03)) | recv_beacon.ht_info_infos_0_sco; DBG_871X("%s bcn link: ht_cap_info:%x ht_info_infos_0:%x\n", __func__, cur_network->BcnInfo.ht_cap_info, cur_network->BcnInfo.ht_info_infos_0); memcpy(&pmlmepriv->cur_beacon_keys, &recv_beacon, sizeof(recv_beacon)); pmlmepriv->new_beacon_cnts = 0; } return _SUCCESS; #if 0 bssid = (WLAN_BSSID_EX *)rtw_zmalloc(sizeof(WLAN_BSSID_EX)); if (bssid == NULL) { DBG_871X("%s rtw_zmalloc fail !!!\n", __func__); return _TRUE; } if ((pmlmepriv->timeBcnInfoChkStart != 0) && (rtw_get_passing_time_ms(pmlmepriv->timeBcnInfoChkStart) > DISCONNECT_BY_CHK_BCN_FAIL_OBSERV_PERIOD_IN_MS)) { pmlmepriv->timeBcnInfoChkStart = 0; pmlmepriv->NumOfBcnInfoChkFail = 0; } subtype = GetFrameSubType(pframe) >> 4; if(subtype==WIFI_BEACON) bssid->Reserved[0] = 1; bssid->Length = sizeof(WLAN_BSSID_EX) - MAX_IE_SZ + len; /* below is to copy the information element */ bssid->IELength = len; _rtw_memcpy(bssid->IEs, (pframe + sizeof(struct rtw_ieee80211_hdr_3addr)), bssid->IELength); /* check bw and channel offset */ /* parsing HT_CAP_IE */ p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _HT_CAPABILITY_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); if(p && len>0) { pht_cap = (struct rtw_ieee80211_ht_cap *)(p + 2); ht_cap_info = pht_cap->cap_info; } else { ht_cap_info = 0; } /* parsing HT_INFO_IE */ p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _HT_ADD_INFO_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); if(p && len>0) { pht_info = (struct HT_info_element *)(p + 2); ht_info_infos_0 = pht_info->infos[0]; } else { ht_info_infos_0 = 0; } if (ht_cap_info != cur_network->BcnInfo.ht_cap_info || ((ht_info_infos_0&0x03) != (cur_network->BcnInfo.ht_info_infos_0&0x03))) { DBG_871X("%s bcn now: ht_cap_info:%x ht_info_infos_0:%x\n", __func__, ht_cap_info, ht_info_infos_0); DBG_871X("%s bcn link: ht_cap_info:%x ht_info_infos_0:%x\n", __func__, cur_network->BcnInfo.ht_cap_info, cur_network->BcnInfo.ht_info_infos_0); DBG_871X("%s bw mode change\n", __func__); { //bcn_info_update cur_network->BcnInfo.ht_cap_info = ht_cap_info; cur_network->BcnInfo.ht_info_infos_0 = ht_info_infos_0; //to do : need to check that whether modify related register of BB or not } //goto _mismatch; } /* Checking for channel */ p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _DSSET_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); if (p) { bcn_channel = *(p + 2); } else {/* In 5G, some ap do not have DSSET IE checking HT info for channel */ rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _HT_ADD_INFO_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); if(pht_info) { bcn_channel = pht_info->primary_channel; } else { /* we don't find channel IE, so don't check it */ //DBG_871X("Oops: %s we don't find channel IE, so don't check it \n", __func__); bcn_channel = Adapter->mlmeextpriv.cur_channel; } } if (bcn_channel != Adapter->mlmeextpriv.cur_channel) { DBG_871X("%s beacon channel:%d cur channel:%d disconnect\n", __func__, bcn_channel, Adapter->mlmeextpriv.cur_channel); goto _mismatch; } /* checking SSID */ if ((p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _SSID_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_)) == NULL) { DBG_871X("%s marc: cannot find SSID for survey event\n", __func__); hidden_ssid = _TRUE; } else { hidden_ssid = _FALSE; } if((NULL != p) && (_FALSE == hidden_ssid && (*(p + 1)))) { _rtw_memcpy(bssid->Ssid.Ssid, (p + 2), *(p + 1)); bssid->Ssid.SsidLength = *(p + 1); } else { bssid->Ssid.SsidLength = 0; bssid->Ssid.Ssid[0] = '\0'; } RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("%s bssid.Ssid.Ssid:%s bssid.Ssid.SsidLength:%d " "cur_network->network.Ssid.Ssid:%s len:%d\n", __func__, bssid->Ssid.Ssid, bssid->Ssid.SsidLength, cur_network->network.Ssid.Ssid, cur_network->network.Ssid.SsidLength)); if (_rtw_memcmp(bssid->Ssid.Ssid, cur_network->network.Ssid.Ssid, 32) == _FALSE || bssid->Ssid.SsidLength != cur_network->network.Ssid.SsidLength) { if (bssid->Ssid.Ssid[0] != '\0' && bssid->Ssid.SsidLength != 0) { /* not hidden ssid */ DBG_871X("%s(), SSID is not match\n", __func__); goto _mismatch; } } /* check encryption info */ val16 = rtw_get_capability((WLAN_BSSID_EX *)bssid); if (val16 & BIT(4)) bssid->Privacy = 1; else bssid->Privacy = 0; RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_, ("%s(): cur_network->network.Privacy is %d, bssid.Privacy is %d\n", __func__, cur_network->network.Privacy,bssid->Privacy)); if (cur_network->network.Privacy != bssid->Privacy) { DBG_871X("%s(), privacy is not match\n",__func__); goto _mismatch; } rtw_get_sec_ie(bssid->IEs, bssid->IELength, NULL,&rsn_len,NULL,&wpa_len); if (rsn_len > 0) { encryp_protocol = ENCRYP_PROTOCOL_WPA2; } else if (wpa_len > 0) { encryp_protocol = ENCRYP_PROTOCOL_WPA; } else { if (bssid->Privacy) encryp_protocol = ENCRYP_PROTOCOL_WEP; } if (cur_network->BcnInfo.encryp_protocol != encryp_protocol) { DBG_871X("%s(): enctyp is not match\n",__func__); goto _mismatch; } if (encryp_protocol == ENCRYP_PROTOCOL_WPA || encryp_protocol == ENCRYP_PROTOCOL_WPA2) { pbuf = rtw_get_wpa_ie(&bssid->IEs[12], &wpa_ielen, bssid->IELength-12); if(pbuf && (wpa_ielen>0)) { if (_SUCCESS == rtw_parse_wpa_ie(pbuf, wpa_ielen+2, &group_cipher, &pairwise_cipher, &is_8021x)) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_, ("%s pnetwork->pairwise_cipher: %d, group_cipher is %d, is_8021x is %d\n", __func__, pairwise_cipher, group_cipher, is_8021x)); } } else { pbuf = rtw_get_wpa2_ie(&bssid->IEs[12], &wpa_ielen, bssid->IELength-12); if(pbuf && (wpa_ielen>0)) { if (_SUCCESS == rtw_parse_wpa2_ie(pbuf, wpa_ielen+2, &group_cipher, &pairwise_cipher, &is_8021x)) { RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_, ("%s pnetwork->pairwise_cipher: %d, pnetwork->group_cipher is %d, is_802x is %d\n", __func__, pairwise_cipher, group_cipher, is_8021x)); } } } RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_, ("%s cur_network->group_cipher is %d: %d\n",__func__, cur_network->BcnInfo.group_cipher, group_cipher)); if (pairwise_cipher != cur_network->BcnInfo.pairwise_cipher || group_cipher != cur_network->BcnInfo.group_cipher) { DBG_871X("%s pairwise_cipher(%x:%x) or group_cipher(%x:%x) is not match\n",__func__, pairwise_cipher, cur_network->BcnInfo.pairwise_cipher, group_cipher, cur_network->BcnInfo.group_cipher); goto _mismatch; } if (is_8021x != cur_network->BcnInfo.is_8021x) { DBG_871X("%s authentication is not match\n", __func__); goto _mismatch; } } rtw_mfree((u8 *)bssid, sizeof(WLAN_BSSID_EX)); return _SUCCESS; _mismatch: rtw_mfree((u8 *)bssid, sizeof(WLAN_BSSID_EX)); if (pmlmepriv->NumOfBcnInfoChkFail == 0) { pmlmepriv->timeBcnInfoChkStart = rtw_get_current_time(); } pmlmepriv->NumOfBcnInfoChkFail++; DBG_871X("%s by "ADPT_FMT" - NumOfChkFail = %d (SeqNum of this Beacon frame = %d).\n", __func__, ADPT_ARG(Adapter), pmlmepriv->NumOfBcnInfoChkFail, GetSequence(pframe)); if ((pmlmepriv->timeBcnInfoChkStart != 0) && (rtw_get_passing_time_ms(pmlmepriv->timeBcnInfoChkStart) <= DISCONNECT_BY_CHK_BCN_FAIL_OBSERV_PERIOD_IN_MS) && (pmlmepriv->NumOfBcnInfoChkFail >= DISCONNECT_BY_CHK_BCN_FAIL_THRESHOLD)) { DBG_871X("%s by "ADPT_FMT" - NumOfChkFail = %d >= threshold : %d (in %d ms), return FAIL.\n", __func__, ADPT_ARG(Adapter), pmlmepriv->NumOfBcnInfoChkFail, DISCONNECT_BY_CHK_BCN_FAIL_THRESHOLD, rtw_get_passing_time_ms(pmlmepriv->timeBcnInfoChkStart)); pmlmepriv->timeBcnInfoChkStart = 0; pmlmepriv->NumOfBcnInfoChkFail = 0; return _FAIL; } return _SUCCESS; #endif } void update_beacon_info(_adapter *padapter, u8 *pframe, uint pkt_len, struct sta_info *psta) { unsigned int i; unsigned int len; PNDIS_802_11_VARIABLE_IEs pIE; #ifdef CONFIG_TDLS struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; u8 tdls_prohibited[] = { 0x00, 0x00, 0x00, 0x00, 0x10 }; //bit(38): TDLS_prohibited #endif //CONFIG_TDLS len = pkt_len - (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN); for (i = 0; i < len;) { pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN) + i); switch (pIE->ElementID) { case _VENDOR_SPECIFIC_IE_: //to update WMM paramter set while receiving beacon if (_rtw_memcmp(pIE->data, WMM_PARA_OUI, 6) && pIE->Length == WLAN_WMM_LEN) //WMM { (WMM_param_handler(padapter, pIE))? report_wmm_edca_update(padapter): 0; } break; case _HT_EXTRA_INFO_IE_: //HT info //HT_info_handler(padapter, pIE); bwmode_update_check(padapter, pIE); break; #ifdef CONFIG_80211AC_VHT case EID_OpModeNotification: rtw_process_vht_op_mode_notify(padapter, pIE->data, psta); break; #endif //CONFIG_80211AC_VHT case _ERPINFO_IE_: ERP_IE_handler(padapter, pIE); VCS_update(padapter, psta); break; #ifdef CONFIG_TDLS case _EXT_CAP_IE_: if( check_ap_tdls_prohibited(pIE->data, pIE->Length) == _TRUE ) ptdlsinfo->ap_prohibited = _TRUE; break; #endif //CONFIG_TDLS default: break; } i += (pIE->Length + 2); } } #ifdef CONFIG_DFS void process_csa_ie(_adapter *padapter, u8 *pframe, uint pkt_len) { unsigned int i; unsigned int len; PNDIS_802_11_VARIABLE_IEs pIE; u8 new_ch_no = 0; if(padapter->mlmepriv.handle_dfs == _TRUE ) return; len = pkt_len - (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN); for (i = 0; i < len;) { pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN) + i); switch (pIE->ElementID) { case _CH_SWTICH_ANNOUNCE_: padapter->mlmepriv.handle_dfs = _TRUE; _rtw_memcpy(&new_ch_no, pIE->data+1, 1); rtw_set_csa_cmd(padapter, new_ch_no); break; default: break; } i += (pIE->Length + 2); } } #endif //CONFIG_DFS unsigned int is_ap_in_tkip(_adapter *padapter) { u32 i; PNDIS_802_11_VARIABLE_IEs pIE; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); if (rtw_get_capability((WLAN_BSSID_EX *)cur_network) & WLAN_CAPABILITY_PRIVACY) { for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pmlmeinfo->network.IELength;) { pIE = (PNDIS_802_11_VARIABLE_IEs)(pmlmeinfo->network.IEs + i); switch (pIE->ElementID) { case _VENDOR_SPECIFIC_IE_: if ((_rtw_memcmp(pIE->data, RTW_WPA_OUI, 4)) && (_rtw_memcmp((pIE->data + 12), WPA_TKIP_CIPHER, 4))) { return _TRUE; } break; case _RSN_IE_2_: if (_rtw_memcmp((pIE->data + 8), RSN_TKIP_CIPHER, 4)) { return _TRUE; } default: break; } i += (pIE->Length + 2); } return _FALSE; } else { return _FALSE; } } unsigned int should_forbid_n_rate(_adapter * padapter) { u32 i; PNDIS_802_11_VARIABLE_IEs pIE; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; WLAN_BSSID_EX *cur_network = &pmlmepriv->cur_network.network; if (rtw_get_capability((WLAN_BSSID_EX *)cur_network) & WLAN_CAPABILITY_PRIVACY) { for (i = sizeof(NDIS_802_11_FIXED_IEs); i < cur_network->IELength;) { pIE = (PNDIS_802_11_VARIABLE_IEs)(cur_network->IEs + i); switch (pIE->ElementID) { case _VENDOR_SPECIFIC_IE_: if (_rtw_memcmp(pIE->data, RTW_WPA_OUI, 4) && ((_rtw_memcmp((pIE->data + 12), WPA_CIPHER_SUITE_CCMP, 4)) || (_rtw_memcmp((pIE->data + 16), WPA_CIPHER_SUITE_CCMP, 4)))) return _FALSE; break; case _RSN_IE_2_: if ((_rtw_memcmp((pIE->data + 8), RSN_CIPHER_SUITE_CCMP, 4)) || (_rtw_memcmp((pIE->data + 12), RSN_CIPHER_SUITE_CCMP, 4))) return _FALSE; default: break; } i += (pIE->Length + 2); } return _TRUE; } else { return _FALSE; } } unsigned int is_ap_in_wep(_adapter *padapter) { u32 i; PNDIS_802_11_VARIABLE_IEs pIE; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); if (rtw_get_capability((WLAN_BSSID_EX *)cur_network) & WLAN_CAPABILITY_PRIVACY) { for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pmlmeinfo->network.IELength;) { pIE = (PNDIS_802_11_VARIABLE_IEs)(pmlmeinfo->network.IEs + i); switch (pIE->ElementID) { case _VENDOR_SPECIFIC_IE_: if (_rtw_memcmp(pIE->data, RTW_WPA_OUI, 4)) return _FALSE; break; case _RSN_IE_2_: return _FALSE; default: break; } i += (pIE->Length + 2); } return _TRUE; } else { return _FALSE; } } int wifirate2_ratetbl_inx(unsigned char rate); int wifirate2_ratetbl_inx(unsigned char rate) { int inx = 0; rate = rate & 0x7f; switch (rate) { case 54*2: inx = 11; break; case 48*2: inx = 10; break; case 36*2: inx = 9; break; case 24*2: inx = 8; break; case 18*2: inx = 7; break; case 12*2: inx = 6; break; case 9*2: inx = 5; break; case 6*2: inx = 4; break; case 11*2: inx = 3; break; case 11: inx = 2; break; case 2*2: inx = 1; break; case 1*2: inx = 0; break; } return inx; } unsigned int update_basic_rate(unsigned char *ptn, unsigned int ptn_sz) { unsigned int i, num_of_rate; unsigned int mask = 0; num_of_rate = (ptn_sz > NumRates)? NumRates: ptn_sz; for (i = 0; i < num_of_rate; i++) { if ((*(ptn + i)) & 0x80) { mask |= 0x1 << wifirate2_ratetbl_inx(*(ptn + i)); } } return mask; } unsigned int update_supported_rate(unsigned char *ptn, unsigned int ptn_sz) { unsigned int i, num_of_rate; unsigned int mask = 0; num_of_rate = (ptn_sz > NumRates)? NumRates: ptn_sz; for (i = 0; i < num_of_rate; i++) { mask |= 0x1 << wifirate2_ratetbl_inx(*(ptn + i)); } return mask; } unsigned int update_MCS_rate(struct HT_caps_element *pHT_caps) { unsigned int mask = 0; mask = ((pHT_caps->u.HT_cap_element.MCS_rate[0] << 12) | (pHT_caps->u.HT_cap_element.MCS_rate[1] << 20)); return mask; } int support_short_GI(_adapter *padapter, struct HT_caps_element *pHT_caps, u8 bwmode) { unsigned char bit_offset; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if (!(pmlmeinfo->HT_enable)) return _FAIL; bit_offset = (bwmode & CHANNEL_WIDTH_40)? 6: 5; if (pHT_caps->u.HT_cap_element.HT_caps_info & (0x1 << bit_offset)) { return _SUCCESS; } else { return _FAIL; } } unsigned char get_highest_rate_idx(u32 mask) { int i; unsigned char rate_idx=0; for(i=31; i>=0; i--) { if(mask & BIT(i)) { rate_idx = i; break; } } return rate_idx; } unsigned char get_highest_mcs_rate(struct HT_caps_element *pHT_caps); unsigned char get_highest_mcs_rate(struct HT_caps_element *pHT_caps) { int i, mcs_rate; mcs_rate = (pHT_caps->u.HT_cap_element.MCS_rate[0] | (pHT_caps->u.HT_cap_element.MCS_rate[1] << 8)); for (i = 15; i >= 0; i--) { if (mcs_rate & (0x1 << i)) { break; } } return i; } void Update_RA_Entry(_adapter *padapter, struct sta_info *psta) { rtw_hal_update_ra_mask(psta, 0); } void enable_rate_adaptive(_adapter *padapter, struct sta_info *psta); void enable_rate_adaptive(_adapter *padapter, struct sta_info *psta) { Update_RA_Entry(padapter, psta); } void set_sta_rate(_adapter *padapter, struct sta_info *psta) { //rate adaptive enable_rate_adaptive(padapter, psta); } // Update RRSR and Rate for USERATE void update_tx_basic_rate(_adapter *padapter, u8 wirelessmode) { NDIS_802_11_RATES_EX supported_rates; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; #ifdef CONFIG_P2P struct wifidirect_info* pwdinfo = &padapter->wdinfo; // Added by Albert 2011/03/22 // In the P2P mode, the driver should not support the b mode. // So, the Tx packet shouldn't use the CCK rate if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) return; #endif //CONFIG_P2P #ifdef CONFIG_INTEL_WIDI if (padapter->mlmepriv.widi_state != INTEL_WIDI_STATE_NONE) return; #endif //CONFIG_INTEL_WIDI _rtw_memset(supported_rates, 0, NDIS_802_11_LENGTH_RATES_EX); //clear B mod if current channel is in 5G band, avoid tx cck rate in 5G band. if(pmlmeext->cur_channel > 14) wirelessmode &= ~(WIRELESS_11B); if ((wirelessmode & WIRELESS_11B) && (wirelessmode == WIRELESS_11B)) { _rtw_memcpy(supported_rates, rtw_basic_rate_cck, 4); } else if (wirelessmode & WIRELESS_11B) { _rtw_memcpy(supported_rates, rtw_basic_rate_mix, 7); } else { _rtw_memcpy(supported_rates, rtw_basic_rate_ofdm, 3); } if (wirelessmode & WIRELESS_11B) update_mgnt_tx_rate(padapter, IEEE80211_CCK_RATE_1MB); else update_mgnt_tx_rate(padapter, IEEE80211_OFDM_RATE_6MB); rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, supported_rates); } unsigned char check_assoc_AP(u8 *pframe, uint len) { unsigned int i; PNDIS_802_11_VARIABLE_IEs pIE; for (i = sizeof(NDIS_802_11_FIXED_IEs); i < len;) { pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + i); switch (pIE->ElementID) { case _VENDOR_SPECIFIC_IE_: if ((_rtw_memcmp(pIE->data, ARTHEROS_OUI1, 3)) || (_rtw_memcmp(pIE->data, ARTHEROS_OUI2, 3))) { DBG_871X("link to Artheros AP\n"); return HT_IOT_PEER_ATHEROS; } else if ((_rtw_memcmp(pIE->data, BROADCOM_OUI1, 3)) || (_rtw_memcmp(pIE->data, BROADCOM_OUI2, 3)) || (_rtw_memcmp(pIE->data, BROADCOM_OUI2, 3))) { DBG_871X("link to Broadcom AP\n"); return HT_IOT_PEER_BROADCOM; } else if (_rtw_memcmp(pIE->data, MARVELL_OUI, 3)) { DBG_871X("link to Marvell AP\n"); return HT_IOT_PEER_MARVELL; } else if (_rtw_memcmp(pIE->data, RALINK_OUI, 3)) { DBG_871X("link to Ralink AP\n"); return HT_IOT_PEER_RALINK; } else if (_rtw_memcmp(pIE->data, CISCO_OUI, 3)) { DBG_871X("link to Cisco AP\n"); return HT_IOT_PEER_CISCO; } else if (_rtw_memcmp(pIE->data, REALTEK_OUI, 3)) { u32 Vender = HT_IOT_PEER_REALTEK; if(pIE->Length >= 5) { if(pIE->data[4]==1) { //if(pIE->data[5] & RT_HT_CAP_USE_LONG_PREAMBLE) // bssDesc->BssHT.RT2RT_HT_Mode |= RT_HT_CAP_USE_LONG_PREAMBLE; if(pIE->data[5] & RT_HT_CAP_USE_92SE) { //bssDesc->BssHT.RT2RT_HT_Mode |= RT_HT_CAP_USE_92SE; Vender = HT_IOT_PEER_REALTEK_92SE; } } if(pIE->data[5] & RT_HT_CAP_USE_SOFTAP) Vender = HT_IOT_PEER_REALTEK_SOFTAP; if(pIE->data[4] == 2) { if(pIE->data[6] & RT_HT_CAP_USE_JAGUAR_BCUT) { Vender = HT_IOT_PEER_REALTEK_JAGUAR_BCUTAP; DBG_871X("link to Realtek JAGUAR_BCUTAP\n"); } if(pIE->data[6] & RT_HT_CAP_USE_JAGUAR_CCUT) { Vender = HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP; DBG_871X("link to Realtek JAGUAR_CCUTAP\n"); } } } DBG_871X("link to Realtek AP\n"); return Vender; } else if (_rtw_memcmp(pIE->data, AIRGOCAP_OUI,3)) { DBG_871X("link to Airgo Cap\n"); return HT_IOT_PEER_AIRGO; } else { break; } default: break; } i += (pIE->Length + 2); } DBG_871X("link to new AP\n"); return HT_IOT_PEER_UNKNOWN; } void update_IOT_info(_adapter *padapter) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); switch (pmlmeinfo->assoc_AP_vendor) { case HT_IOT_PEER_MARVELL: pmlmeinfo->turboMode_cts2self = 1; pmlmeinfo->turboMode_rtsen = 0; break; case HT_IOT_PEER_RALINK: pmlmeinfo->turboMode_cts2self = 0; pmlmeinfo->turboMode_rtsen = 1; //disable high power Switch_DM_Func(padapter, (~DYNAMIC_BB_DYNAMIC_TXPWR), _FALSE); break; case HT_IOT_PEER_REALTEK: //rtw_write16(padapter, 0x4cc, 0xffff); //rtw_write16(padapter, 0x546, 0x01c0); //disable high power Switch_DM_Func(padapter, (~DYNAMIC_BB_DYNAMIC_TXPWR), _FALSE); break; default: pmlmeinfo->turboMode_cts2self = 0; pmlmeinfo->turboMode_rtsen = 1; break; } } void update_capinfo(PADAPTER Adapter, u16 updateCap) { struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); BOOLEAN ShortPreamble; // Check preamble mode, 2005.01.06, by rcnjko. // Mark to update preamble value forever, 2008.03.18 by lanhsin //if( pMgntInfo->RegPreambleMode == PREAMBLE_AUTO ) { if(updateCap & cShortPreamble) { // Short Preamble if(pmlmeinfo->preamble_mode != PREAMBLE_SHORT) // PREAMBLE_LONG or PREAMBLE_AUTO { ShortPreamble = _TRUE; pmlmeinfo->preamble_mode = PREAMBLE_SHORT; rtw_hal_set_hwreg( Adapter, HW_VAR_ACK_PREAMBLE, (u8 *)&ShortPreamble ); } } else { // Long Preamble if(pmlmeinfo->preamble_mode != PREAMBLE_LONG) // PREAMBLE_SHORT or PREAMBLE_AUTO { ShortPreamble = _FALSE; pmlmeinfo->preamble_mode = PREAMBLE_LONG; rtw_hal_set_hwreg( Adapter, HW_VAR_ACK_PREAMBLE, (u8 *)&ShortPreamble ); } } } if ( updateCap & cIBSS ) { //Filen: See 802.11-2007 p.91 pmlmeinfo->slotTime = NON_SHORT_SLOT_TIME; } else { //Filen: See 802.11-2007 p.90 if( pmlmeext->cur_wireless_mode & (WIRELESS_11_24N | WIRELESS_11A | WIRELESS_11_5N | WIRELESS_11AC)) { pmlmeinfo->slotTime = SHORT_SLOT_TIME; } else if( pmlmeext->cur_wireless_mode & (WIRELESS_11G)) { if( (updateCap & cShortSlotTime) /* && (!(pMgntInfo->pHTInfo->RT2RT_HT_Mode & RT_HT_CAP_USE_LONG_PREAMBLE)) */) { // Short Slot Time pmlmeinfo->slotTime = SHORT_SLOT_TIME; } else { // Long Slot Time pmlmeinfo->slotTime = NON_SHORT_SLOT_TIME; } } else { //B Mode pmlmeinfo->slotTime = NON_SHORT_SLOT_TIME; } } rtw_hal_set_hwreg( Adapter, HW_VAR_SLOT_TIME, &pmlmeinfo->slotTime ); } void update_wireless_mode(_adapter *padapter) { int ratelen, network_type = 0; u32 SIFS_Timer; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); unsigned char *rate = cur_network->SupportedRates; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo= &(padapter->wdinfo); #endif //CONFIG_P2P ratelen = rtw_get_rateset_len(cur_network->SupportedRates); if ((pmlmeinfo->HT_info_enable) && (pmlmeinfo->HT_caps_enable)) { pmlmeinfo->HT_enable = 1; } if(pmlmeext->cur_channel > 14) { if (pmlmeinfo->VHT_enable) network_type = WIRELESS_11AC; else if (pmlmeinfo->HT_enable) network_type = WIRELESS_11_5N; network_type |= WIRELESS_11A; } else { if (pmlmeinfo->VHT_enable) network_type = WIRELESS_11AC; else if (pmlmeinfo->HT_enable) network_type = WIRELESS_11_24N; if ((cckratesonly_included(rate, ratelen)) == _TRUE) { network_type |= WIRELESS_11B; } else if((cckrates_included(rate, ratelen)) == _TRUE) { network_type |= WIRELESS_11BG; } else { network_type |= WIRELESS_11G; } } pmlmeext->cur_wireless_mode = network_type & padapter->registrypriv.wireless_mode; /* if((pmlmeext->cur_wireless_mode==WIRELESS_11G) || (pmlmeext->cur_wireless_mode==WIRELESS_11BG))//WIRELESS_MODE_G) SIFS_Timer = 0x0a0a;//CCK else SIFS_Timer = 0x0e0e;//pHalData->SifsTime; //OFDM */ SIFS_Timer = 0x0a0a0808; //0x0808 -> for CCK, 0x0a0a -> for OFDM //change this value if having IOT issues. padapter->HalFunc.SetHwRegHandler( padapter, HW_VAR_RESP_SIFS, (u8 *)&SIFS_Timer); padapter->HalFunc.SetHwRegHandler( padapter, HW_VAR_WIRELESS_MODE, (u8 *)&(pmlmeext->cur_wireless_mode)); #ifdef CONFIG_P2P // Added by Thomas 20130822 // In P2P enable, do not set tx rate. // workaround for Actiontec GO case. // The Actiontec will use 1M to tx the beacon in 1.1.0 firmware. if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) return; #endif //CONFIG_P2P if (pmlmeext->cur_wireless_mode & WIRELESS_11B) update_mgnt_tx_rate(padapter, IEEE80211_CCK_RATE_1MB); else update_mgnt_tx_rate(padapter, IEEE80211_OFDM_RATE_6MB); } void fire_write_MAC_cmd(_adapter *padapter, unsigned int addr, unsigned int value); void fire_write_MAC_cmd(_adapter *padapter, unsigned int addr, unsigned int value) { #if 0 struct cmd_obj *ph2c; struct reg_rw_parm *pwriteMacPara; struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); if ((ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) { return; } if ((pwriteMacPara = (struct reg_rw_parm*)rtw_malloc(sizeof(struct reg_rw_parm))) == NULL) { rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); return; } pwriteMacPara->rw = 1; pwriteMacPara->addr = addr; pwriteMacPara->value = value; init_h2fwcmd_w_parm_no_rsp(ph2c, pwriteMacPara, GEN_CMD_CODE(_Write_MACREG)); rtw_enqueue_cmd(pcmdpriv, ph2c); #endif } void update_sta_basic_rate(struct sta_info *psta, u8 wireless_mode) { if(IsSupportedTxCCK(wireless_mode)) { // Only B, B/G, and B/G/N AP could use CCK rate _rtw_memcpy(psta->bssrateset, rtw_basic_rate_cck, 4); psta->bssratelen = 4; } else { _rtw_memcpy(psta->bssrateset, rtw_basic_rate_ofdm, 3); psta->bssratelen = 3; } } int update_sta_support_rate(_adapter *padapter, u8* pvar_ie, uint var_ie_len, int cam_idx) { unsigned int ie_len; PNDIS_802_11_VARIABLE_IEs pIE; int supportRateNum = 0; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); pIE = (PNDIS_802_11_VARIABLE_IEs)rtw_get_ie(pvar_ie, _SUPPORTEDRATES_IE_, &ie_len, var_ie_len); if (pIE == NULL) { return _FAIL; } _rtw_memcpy(pmlmeinfo->FW_sta_info[cam_idx].SupportedRates, pIE->data, ie_len); supportRateNum = ie_len; pIE = (PNDIS_802_11_VARIABLE_IEs)rtw_get_ie(pvar_ie, _EXT_SUPPORTEDRATES_IE_, &ie_len, var_ie_len); if (pIE) { _rtw_memcpy((pmlmeinfo->FW_sta_info[cam_idx].SupportedRates + supportRateNum), pIE->data, ie_len); } return _SUCCESS; } void process_addba_req(_adapter *padapter, u8 *paddba_req, u8 *addr) { struct sta_info *psta; u16 tid, start_seq, param; struct recv_reorder_ctrl *preorder_ctrl; struct sta_priv *pstapriv = &padapter->stapriv; struct ADDBA_request *preq = (struct ADDBA_request*)paddba_req; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); psta = rtw_get_stainfo(pstapriv, addr); if(psta) { start_seq = le16_to_cpu(preq->BA_starting_seqctrl) >> 4; param = le16_to_cpu(preq->BA_para_set); tid = (param>>2)&0x0f; preorder_ctrl = &psta->recvreorder_ctrl[tid]; #ifdef CONFIG_UPDATE_INDICATE_SEQ_WHILE_PROCESS_ADDBA_REQ preorder_ctrl->indicate_seq = start_seq; #ifdef DBG_RX_SEQ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, start_seq: %d\n", __FUNCTION__, __LINE__, preorder_ctrl->indicate_seq, start_seq); #endif #else preorder_ctrl->indicate_seq = 0xffff; #endif preorder_ctrl->enable =(pmlmeinfo->bAcceptAddbaReq == _TRUE)? _TRUE :_FALSE; } } void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len) { u8* pIE; u32 *pbuf; pIE = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); pbuf = (u32*)pIE; pmlmeext->TSFValue = le32_to_cpu(*(pbuf+1)); pmlmeext->TSFValue = pmlmeext->TSFValue << 32; pmlmeext->TSFValue |= le32_to_cpu(*pbuf); } void correct_TSF(_adapter *padapter, struct mlme_ext_priv *pmlmeext) { rtw_hal_set_hwreg(padapter, HW_VAR_CORRECT_TSF, 0); } void adaptive_early_32k(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len) { int i; u8* pIE; u32 *pbuf; u64 tsf=0; u32 delay_ms; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); pmlmeext->bcn_cnt++; pIE = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); pbuf = (u32*)pIE; tsf = le32_to_cpu(*(pbuf+1)); tsf = tsf << 32; tsf |= le32_to_cpu(*pbuf); //DBG_871X("%s(): tsf_upper= 0x%08x, tsf_lower=0x%08x\n", __func__, (u32)(tsf>>32), (u32)tsf); //delay = (timestamp mod 1024*100)/1000 (unit: ms) //delay_ms = do_div(tsf, (pmlmeinfo->bcn_interval*1024))/1000; delay_ms = rtw_modular64(tsf, (pmlmeinfo->bcn_interval*1024)); delay_ms = delay_ms/1000; if(delay_ms >= 8) { pmlmeext->bcn_delay_cnt[8]++; //pmlmeext->bcn_delay_ratio[8] = (pmlmeext->bcn_delay_cnt[8] * 100) /pmlmeext->bcn_cnt; } else { pmlmeext->bcn_delay_cnt[delay_ms]++; //pmlmeext->bcn_delay_ratio[delay_ms] = (pmlmeext->bcn_delay_cnt[delay_ms] * 100) /pmlmeext->bcn_cnt; } /* DBG_871X("%s(): (a)bcn_cnt = %d\n", __func__, pmlmeext->bcn_cnt); for(i=0; i<9; i++) { DBG_871X("%s():bcn_delay_cnt[%d]=%d, bcn_delay_ratio[%d]=%d\n", __func__, i, pmlmeext->bcn_delay_cnt[i] , i, pmlmeext->bcn_delay_ratio[i]); } */ //dump for adaptive_early_32k if(pmlmeext->bcn_cnt > 100 && (pmlmeext->adaptive_tsf_done==_TRUE)) { u8 ratio_20_delay, ratio_80_delay; u8 DrvBcnEarly, DrvBcnTimeOut; ratio_20_delay = 0; ratio_80_delay = 0; DrvBcnEarly = 0xff; DrvBcnTimeOut = 0xff; DBG_871X("%s(): bcn_cnt = %d\n", __func__, pmlmeext->bcn_cnt); for(i=0; i<9; i++) { pmlmeext->bcn_delay_ratio[i] = (pmlmeext->bcn_delay_cnt[i] * 100) /pmlmeext->bcn_cnt; DBG_871X("%s():bcn_delay_cnt[%d]=%d, bcn_delay_ratio[%d]=%d\n", __func__, i, pmlmeext->bcn_delay_cnt[i] , i, pmlmeext->bcn_delay_ratio[i]); ratio_20_delay += pmlmeext->bcn_delay_ratio[i]; ratio_80_delay += pmlmeext->bcn_delay_ratio[i]; if(ratio_20_delay > 20 && DrvBcnEarly == 0xff) { DrvBcnEarly = i; DBG_871X("%s(): DrvBcnEarly = %d\n", __func__, DrvBcnEarly); } if(ratio_80_delay > 80 && DrvBcnTimeOut == 0xff) { DrvBcnTimeOut = i; DBG_871X("%s(): DrvBcnTimeOut = %d\n", __func__, DrvBcnTimeOut); } //reset adaptive_early_32k cnt pmlmeext->bcn_delay_cnt[i] = 0; pmlmeext->bcn_delay_ratio[i] = 0; } pmlmeext->DrvBcnEarly = DrvBcnEarly; pmlmeext->DrvBcnTimeOut = DrvBcnTimeOut; pmlmeext->bcn_cnt = 0; } } void beacon_timing_control(_adapter *padapter) { rtw_hal_bcn_related_reg_setting(padapter); } #define CONFIG_SHARED_BMC_MACID void dump_macid_map(void *sel, struct macid_bmp *map, u8 max_num) { DBG_871X_SEL_NL(sel, "0x%08x\n", map->m0); #if (MACID_NUM_SW_LIMIT > 32) if (max_num && max_num > 32) DBG_871X_SEL_NL(sel, "0x%08x\n", map->m1); #endif #if (MACID_NUM_SW_LIMIT > 64) if (max_num && max_num > 64) DBG_871X_SEL_NL(sel, "0x%08x\n", map->m2); #endif #if (MACID_NUM_SW_LIMIT > 96) if (max_num && max_num > 96) DBG_871X_SEL_NL(sel, "0x%08x\n", map->m3); #endif } inline bool rtw_macid_is_set(struct macid_bmp *map, u8 id) { if (id < 32) return (map->m0 & BIT(id)); #if (MACID_NUM_SW_LIMIT > 32) else if (id < 64) return (map->m1 & BIT(id-32)); #endif #if (MACID_NUM_SW_LIMIT > 64) else if (id < 96) return (map->m2 & BIT(id-64)); #endif #if (MACID_NUM_SW_LIMIT > 96) else if (id < 128) return (map->m3 & BIT(id-96)); #endif else rtw_warn_on(1); return 0; } inline void rtw_macid_map_set(struct macid_bmp *map, u8 id) { if (id < 32) map->m0 |= BIT(id); #if (MACID_NUM_SW_LIMIT > 32) else if (id < 64) map->m1 |= BIT(id-32); #endif #if (MACID_NUM_SW_LIMIT > 64) else if (id < 96) map->m2 |= BIT(id-64); #endif #if (MACID_NUM_SW_LIMIT > 96) else if (id < 128) map->m3 |= BIT(id-96); #endif else rtw_warn_on(1); } inline void rtw_macid_map_clr(struct macid_bmp *map, u8 id) { if (id < 32) map->m0 &= ~BIT(id); #if (MACID_NUM_SW_LIMIT > 32) else if (id < 64) map->m1 &= ~BIT(id-32); #endif #if (MACID_NUM_SW_LIMIT > 64) else if (id < 96) map->m2 &= ~BIT(id-64); #endif #if (MACID_NUM_SW_LIMIT > 96) else if (id < 128) map->m3 &= ~BIT(id-96); #endif else rtw_warn_on(1); } inline bool rtw_macid_is_used(struct macid_ctl_t *macid_ctl, u8 id) { return rtw_macid_is_set(&macid_ctl->used, id); } inline bool rtw_macid_is_bmc(struct macid_ctl_t *macid_ctl, u8 id) { return rtw_macid_is_set(&macid_ctl->bmc, id); } inline s8 rtw_macid_get_if_g(struct macid_ctl_t *macid_ctl, u8 id) { int i; #ifdef CONFIG_SHARED_BMC_MACID if (rtw_macid_is_bmc(macid_ctl,id)) return -1; #endif for (i=0;iif_g[i], id)) return i; } return -1; } inline s8 rtw_macid_get_ch_g(struct macid_ctl_t *macid_ctl, u8 id) { int i; for (i=0;i<2;i++) { if (rtw_macid_is_set(&macid_ctl->ch_g[i], id)) return i; } return -1; } void rtw_alloc_macid(_adapter *padapter, struct sta_info *psta) { int i; _irqL irqL; u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); struct macid_bmp *used_map = &macid_ctl->used; //static u8 last_id = 0; /* for testing */ u8 last_id = 0; if (_rtw_memcmp(psta->hwaddr, myid(&padapter->eeprompriv), ETH_ALEN)) { psta->mac_id = macid_ctl->num; return; } #ifdef CONFIG_SHARED_BMC_MACID if(_rtw_memcmp(psta->hwaddr, bc_addr, ETH_ALEN)) { /* use shared broadcast & multicast macid 1 */ _enter_critical_bh(&macid_ctl->lock, &irqL); rtw_macid_map_set(used_map, 1); rtw_macid_map_set(&macid_ctl->bmc, 1); for (i=0;iif_g[padapter->iface_id], 1); /* TODO ch_g? */ _exit_critical_bh(&macid_ctl->lock, &irqL); i = 1; goto assigned; } #endif _enter_critical_bh(&macid_ctl->lock, &irqL); for (i=last_id;inum;i++) { #ifdef CONFIG_SHARED_BMC_MACID if (i == 1) continue; #endif if (!rtw_macid_is_used(macid_ctl, i)) break; } if (i < macid_ctl->num) { rtw_macid_map_set(used_map, i); if(_rtw_memcmp(psta->hwaddr, bc_addr, ETH_ALEN)) rtw_macid_map_set(&macid_ctl->bmc, i); rtw_macid_map_set(&macid_ctl->if_g[padapter->iface_id], i); /* TODO ch_g? */ last_id++; last_id %= macid_ctl->num; } _exit_critical_bh(&macid_ctl->lock, &irqL); if (i >= macid_ctl->num) { psta->mac_id = macid_ctl->num; DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" if%u, hwaddr:"MAC_FMT" no available macid\n" , FUNC_ADPT_ARG(padapter), padapter->iface_id+1, MAC_ARG(psta->hwaddr)); rtw_warn_on(1); goto exit; } else { goto assigned; } assigned: psta->mac_id = i; DBG_871X(FUNC_ADPT_FMT" if%u, hwaddr:"MAC_FMT" macid:%u\n" , FUNC_ADPT_ARG(padapter), padapter->iface_id+1, MAC_ARG(psta->hwaddr), psta->mac_id); exit: return; } void rtw_release_macid(_adapter *padapter, struct sta_info *psta) { _irqL irqL; u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); if(_rtw_memcmp(psta->hwaddr, myid(&padapter->eeprompriv), ETH_ALEN)) return; #ifdef CONFIG_SHARED_BMC_MACID if(_rtw_memcmp(psta->hwaddr, bc_addr, ETH_ALEN)) return; if (psta->mac_id == 1) { DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" if%u, hwaddr:"MAC_FMT" with macid:%u\n" , FUNC_ADPT_ARG(padapter), padapter->iface_id+1, MAC_ARG(psta->hwaddr), psta->mac_id); rtw_warn_on(1); return; } #endif _enter_critical_bh(&macid_ctl->lock, &irqL); if (psta->mac_id < macid_ctl->num) { int i; if (!rtw_macid_is_used(macid_ctl, psta->mac_id)) { DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" if%u, hwaddr:"MAC_FMT" macid:%u not used\n" , FUNC_ADPT_ARG(padapter), padapter->iface_id+1, MAC_ARG(psta->hwaddr), psta->mac_id); rtw_warn_on(1); } rtw_macid_map_clr(&macid_ctl->used, psta->mac_id); rtw_macid_map_clr(&macid_ctl->bmc, psta->mac_id); for (i=0;iif_g[i], psta->mac_id); for (i=0;i<2;i++) rtw_macid_map_clr(&macid_ctl->ch_g[i], psta->mac_id); } _exit_critical_bh(&macid_ctl->lock, &irqL); psta->mac_id = macid_ctl->num; } //For 8188E RA u8 rtw_search_max_mac_id(_adapter *padapter) { u8 max_mac_id=0; struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); int i; _irqL irqL; _enter_critical_bh(&macid_ctl->lock, &irqL); for(i=(macid_ctl->num-1); i>0 ; i--) { if (!rtw_macid_is_used(macid_ctl, i)) break; } _exit_critical_bh(&macid_ctl->lock, &irqL); max_mac_id = i; return max_mac_id; } inline void rtw_macid_ctl_init(struct macid_ctl_t *macid_ctl) { _rtw_spinlock_init(&macid_ctl->lock); } inline void rtw_macid_ctl_deinit(struct macid_ctl_t *macid_ctl) { _rtw_spinlock_free(&macid_ctl->lock); } #if 0 unsigned int setup_beacon_frame(_adapter *padapter, unsigned char *beacon_frame) { unsigned short ATIMWindow; unsigned char *pframe; struct tx_desc *ptxdesc; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; unsigned int rate_len, len = 0; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; _rtw_memset(beacon_frame, 0, 256); pframe = beacon_frame + TXDESC_SIZE; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); SetFrameSubType(pframe, WIFI_BEACON); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); len = sizeof(struct rtw_ieee80211_hdr_3addr); //timestamp will be inserted by hardware pframe += 8; len += 8; // beacon interval: 2 bytes _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); pframe += 2; len += 2; // capability info: 2 bytes _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); pframe += 2; len += 2; // SSID pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &len); // supported rates... rate_len = rtw_get_rateset_len(cur_network->SupportedRates); pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &len); // DS parameter set pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &len); // IBSS Parameter Set... //ATIMWindow = cur->Configuration.ATIMWindow; ATIMWindow = 0; pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &len); //todo: ERP IE // EXTERNDED SUPPORTED RATE if (rate_len > 8) { pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &len); } if ((len + TXDESC_SIZE) > 256) { //DBG_871X("marc: beacon frame too large\n"); return 0; } //fill the tx descriptor ptxdesc = (struct tx_desc *)beacon_frame; //offset 0 ptxdesc->txdw0 |= cpu_to_le32(len & 0x0000ffff); ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00ff0000); //default = 32 bytes for TX Desc //offset 4 ptxdesc->txdw1 |= cpu_to_le32((0x10 << QSEL_SHT) & 0x00001f00); //offset 8 ptxdesc->txdw2 |= cpu_to_le32(BMC); ptxdesc->txdw2 |= cpu_to_le32(BK); //offset 16 ptxdesc->txdw4 = 0x80000000; //offset 20 ptxdesc->txdw5 = 0x00000000; //1M return (len + TXDESC_SIZE); } #endif static _adapter *pbuddy_padapter = NULL; int rtw_handle_dualmac(_adapter *adapter, bool init) { int status = _SUCCESS; struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); if(adapter->chip_type != RTL8192D) goto exit; if (init) { #if 0 /* For SMSP on 92DU-VC, driver do not probe another Interface. */ if(dvobj->NumInterfaces == 2 && dvobj->InterfaceNumber != 0 && adapter->registrypriv.mac_phy_mode == 1) { DBG_871X("%s(): Do not init another USB Interface because SMSP\n",__FUNCTION__); status = _FAIL; goto exit; } #endif if (pbuddy_padapter == NULL) { pbuddy_padapter = adapter; DBG_871X("%s(): pbuddy_padapter == NULL, Set pbuddy_padapter\n",__FUNCTION__); } else { adapter->pbuddy_adapter = pbuddy_padapter; pbuddy_padapter->pbuddy_adapter = adapter; // clear global value pbuddy_padapter = NULL; DBG_871X("%s(): pbuddy_padapter exist, Exchange Information\n",__FUNCTION__); } #ifdef CONFIG_DUALMAC_CONCURRENT if (dvobj->InterfaceNumber == 0) { //set adapter_type/iface type adapter->isprimary = _TRUE; adapter->adapter_type = PRIMARY_ADAPTER; adapter->iface_type = IFACE_PORT0; DBG_871X("%s(): PRIMARY_ADAPTER\n",__FUNCTION__); } else { //set adapter_type/iface type adapter->isprimary = _FALSE; adapter->adapter_type = SECONDARY_ADAPTER; adapter->iface_type = IFACE_PORT1; DBG_871X("%s(): SECONDARY_ADAPTER\n",__FUNCTION__); } #endif }else { pbuddy_padapter = NULL; } exit: return status; } _adapter *dvobj_get_port0_adapter(struct dvobj_priv *dvobj) { _adapter *port0_iface = NULL; int i; for (i=0;iiface_nums;i++) { if (get_iface_type(dvobj->padapters[i]) == IFACE_PORT0) break; } if (i<0 || i>=dvobj->iface_nums) rtw_warn_on(1); else port0_iface = dvobj->padapters[i]; return port0_iface; } /* * Description: * rtw_check_invalid_mac_address: * This is only used for checking mac address valid or not. * * Input: * adapter: mac_address pointer. * * Output: * _TRUE: The mac address is invalid. * _FALSE: The mac address is valid. * * Auther: Isaac.Li */ u8 rtw_check_invalid_mac_address(u8 *mac_addr) { u8 null_mac_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; u8 multi_mac_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; u8 res = _FALSE; if (_rtw_memcmp(mac_addr, null_mac_addr, ETH_ALEN)) { res = _TRUE; goto func_exit; } if (_rtw_memcmp(mac_addr, multi_mac_addr, ETH_ALEN)) { res = _TRUE; goto func_exit; } if (mac_addr[0] & BIT0) { res = _TRUE; goto func_exit; } if (mac_addr[0] & BIT1) { res = _TRUE; goto func_exit; } func_exit: return res; } #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) void rtw_get_current_ip_address(PADAPTER padapter, u8 *pcurrentip) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct in_device *my_ip_ptr = padapter->pnetdev->ip_ptr; u8 ipaddress[4]; if ( (pmlmeinfo->state & WIFI_FW_LINKING_STATE) || pmlmeinfo->state & WIFI_FW_AP_STATE) { if ( my_ip_ptr != NULL ) { struct in_ifaddr *my_ifa_list = my_ip_ptr->ifa_list ; if ( my_ifa_list != NULL ) { ipaddress[0] = my_ifa_list->ifa_address & 0xFF; ipaddress[1] = (my_ifa_list->ifa_address >> 8) & 0xFF; ipaddress[2] = (my_ifa_list->ifa_address >> 16) & 0xFF; ipaddress[3] = my_ifa_list->ifa_address >> 24; DBG_871X("%s: %d.%d.%d.%d ==========\n", __func__, ipaddress[0], ipaddress[1], ipaddress[2], ipaddress[3]); _rtw_memcpy(pcurrentip, ipaddress, 4); } } } } #endif #ifdef CONFIG_WOWLAN void rtw_get_sec_iv(PADAPTER padapter, u8*pcur_dot11txpn, u8 *StaAddr) { struct sta_info *psta; struct security_priv *psecpriv = &padapter->securitypriv; _rtw_memset(pcur_dot11txpn, 0, 8); if(NULL == StaAddr) return; psta = rtw_get_stainfo(&padapter->stapriv, StaAddr); DBG_871X("%s(): StaAddr: %02x %02x %02x %02x %02x %02x\n", __func__, StaAddr[0], StaAddr[1], StaAddr[2], StaAddr[3], StaAddr[4], StaAddr[5]); if(psta) { if (psecpriv->dot11PrivacyAlgrthm != _NO_PRIVACY_ && psta->dot11txpn.val > 0) psta->dot11txpn.val--; AES_IV(pcur_dot11txpn, psta->dot11txpn, 0); DBG_871X("%s(): CurrentIV: %02x %02x %02x %02x %02x %02x %02x %02x \n" , __func__, pcur_dot11txpn[0],pcur_dot11txpn[1], pcur_dot11txpn[2],pcur_dot11txpn[3], pcur_dot11txpn[4], pcur_dot11txpn[5],pcur_dot11txpn[6],pcur_dot11txpn[7]); } } void rtw_set_sec_pn(PADAPTER padapter) { struct sta_info *psta; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct security_priv *psecpriv = &padapter->securitypriv; psta = rtw_get_stainfo(&padapter->stapriv, get_my_bssid(&pmlmeinfo->network)); if(psta) { if (pwrpriv->wowlan_fw_iv > psta->dot11txpn.val) { if (psecpriv->dot11PrivacyAlgrthm != _NO_PRIVACY_) psta->dot11txpn.val = pwrpriv->wowlan_fw_iv + 2; } else { DBG_871X("%s(): FW IV is smaller than driver\n", __func__); psta->dot11txpn.val += 2; } DBG_871X("%s: dot11txpn: 0x%016llx\n", __func__ ,psta->dot11txpn.val); } } #endif //CONFIG_WOWLAN #ifdef CONFIG_PNO_SUPPORT #define CSCAN_TLV_TYPE_SSID_IE 'S' #define CIPHER_IE "key_mgmt=" #define CIPHER_NONE "NONE" #define CIPHER_WPA_PSK "WPA-PSK" #define CIPHER_WPA_EAP "WPA-EAP IEEE8021X" /* * SSIDs list parsing from cscan tlv list */ int rtw_parse_ssid_list_tlv(char** list_str, pno_ssid_t* ssid, int max, int *bytes_left) { char* str; int idx = 0; if ((list_str == NULL) || (*list_str == NULL) || (*bytes_left < 0)) { DBG_871X("%s error paramters\n", __func__); return -1; } str = *list_str; while (*bytes_left > 0) { if (str[0] != CSCAN_TLV_TYPE_SSID_IE) { *list_str = str; DBG_871X("nssid=%d left_parse=%d %d\n", idx, *bytes_left, str[0]); return idx; } /* Get proper CSCAN_TLV_TYPE_SSID_IE */ *bytes_left -= 1; str += 1; if (str[0] == 0) { /* Broadcast SSID */ ssid[idx].SSID_len = 0; memset((char*)ssid[idx].SSID, 0x0, WLAN_SSID_MAXLEN); *bytes_left -= 1; str += 1; DBG_871X("BROADCAST SCAN left=%d\n", *bytes_left); } else if (str[0] <= WLAN_SSID_MAXLEN) { /* Get proper SSID size */ ssid[idx].SSID_len = str[0]; *bytes_left -= 1; str += 1; /* Get SSID */ if (ssid[idx].SSID_len > *bytes_left) { DBG_871X("%s out of memory range len=%d but left=%d\n", __func__, ssid[idx].SSID_len, *bytes_left); return -1; } memcpy((char*)ssid[idx].SSID, str, ssid[idx].SSID_len); *bytes_left -= ssid[idx].SSID_len; str += ssid[idx].SSID_len; DBG_871X("%s :size=%d left=%d\n", (char*)ssid[idx].SSID, ssid[idx].SSID_len, *bytes_left); } else { DBG_871X("### SSID size more that %d\n", str[0]); return -1; } if (idx++ > max) { DBG_871X("%s number of SSIDs more that %d\n", __func__, idx); return -1; } } *list_str = str; return idx; } int rtw_parse_cipher_list(struct pno_nlo_info *nlo_info, char* list_str) { char *pch, *pnext, *pend; u8 key_len = 0, index = 0; pch = list_str; if (nlo_info == NULL || list_str == NULL) { DBG_871X("%s error paramters\n", __func__); return -1; } while (strlen(pch) != 0) { pnext = strstr(pch, "key_mgmt="); if (pnext != NULL) { pch = pnext + strlen(CIPHER_IE); pend = strstr(pch, "}"); if (strncmp(pch, CIPHER_NONE, strlen(CIPHER_NONE)) == 0) { nlo_info->ssid_cipher_info[index] = 0x00; } else if (strncmp(pch, CIPHER_WPA_PSK, strlen(CIPHER_WPA_PSK)) == 0) { nlo_info->ssid_cipher_info[index] = 0x66; } else if (strncmp(pch, CIPHER_WPA_EAP, strlen(CIPHER_WPA_EAP)) == 0) { nlo_info->ssid_cipher_info[index] = 0x01; } index ++; pch = pend + 1; } else { break; } } return 0; } int rtw_dev_nlo_info_set(struct pno_nlo_info *nlo_info, pno_ssid_t* ssid, int num, int pno_time, int pno_repeat, int pno_freq_expo_max) { int i = 0; struct file *fp; mm_segment_t fs; loff_t pos = 0; u8 *source = NULL; long len = 0; DBG_871X("+%s+\n", __func__); nlo_info->fast_scan_period = pno_time; nlo_info->ssid_num = num & BIT_LEN_MASK_32(8); nlo_info->hidden_ssid_num = num & BIT_LEN_MASK_32(8); nlo_info->slow_scan_period = (pno_time * 2); nlo_info->fast_scan_iterations = 5; if (nlo_info->hidden_ssid_num > 8) nlo_info->hidden_ssid_num = 8; //TODO: channel list and probe index is all empty. for (i = 0 ; i < num ; i++) { nlo_info->ssid_length[i] = ssid[i].SSID_len; } /* cipher array */ fp = filp_open("/data/misc/wifi/wpa_supplicant.conf", O_RDONLY, 0644); if (IS_ERR(fp)) { DBG_871X("Error, wpa_supplicant.conf doesn't exist.\n"); DBG_871X("Error, cipher array using default value.\n"); return 0; } len = i_size_read(fp->f_path.dentry->d_inode); if (len < 0 || len > 2048) { DBG_871X("Error, file size is bigger than 2048.\n"); DBG_871X("Error, cipher array using default value.\n"); return 0; } fs = get_fs(); set_fs(KERNEL_DS); source = rtw_zmalloc(2048); if (source != NULL) { len = vfs_read(fp, source, len, &pos); rtw_parse_cipher_list(nlo_info, source); rtw_mfree(source, 2048); } set_fs(fs); filp_close(fp, NULL); DBG_871X("-%s-\n", __func__); return 0; } int rtw_dev_ssid_list_set(struct pno_ssid_list *pno_ssid_list, pno_ssid_t* ssid, u8 num) { int i = 0; if(num > MAX_PNO_LIST_COUNT) num = MAX_PNO_LIST_COUNT; for (i = 0 ; i < num ; i++) { _rtw_memcpy(&pno_ssid_list->node[i].SSID, ssid[i].SSID, ssid[i].SSID_len); pno_ssid_list->node[i].SSID_len = ssid[i].SSID_len; } return 0; } int rtw_dev_scan_info_set(_adapter *padapter, pno_ssid_t* ssid, unsigned char ch, unsigned char ch_offset, unsigned short bw_mode) { struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); struct pno_scan_info *scan_info = pwrctl->pscan_info; int i; scan_info->channel_num = MAX_SCAN_LIST_COUNT; scan_info->orig_ch = ch; scan_info->orig_bw = bw_mode; scan_info->orig_40_offset = ch_offset; for(i = 0 ; i < scan_info->channel_num ; i++) { if (i < 11) scan_info->ssid_channel_info[i].active = 1; else scan_info->ssid_channel_info[i].active = 0; scan_info->ssid_channel_info[i].timeout = 100; scan_info->ssid_channel_info[i].tx_power = PHY_GetTxPowerIndex(padapter, 0, 0x02, bw_mode, i+1); scan_info->ssid_channel_info[i].channel = i+1; } DBG_871X("%s, channel_num: %d, orig_ch: %d, orig_bw: %d orig_40_offset: %d\n", __func__, scan_info->channel_num, scan_info->orig_ch, scan_info->orig_bw, scan_info->orig_40_offset); return 0; } int rtw_dev_pno_set(struct net_device *net, pno_ssid_t* ssid, int num, int pno_time, int pno_repeat, int pno_freq_expo_max) { _adapter *padapter = (_adapter *)rtw_netdev_priv(net); struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; int ret = -1; if (num == 0) { DBG_871X("%s, nssid is zero, no need to setup pno ssid list\n", __func__); return 0; } if (pwrctl == NULL) { DBG_871X("%s, ERROR: pwrctl is NULL\n", __func__); return -1; } else { pwrctl->pnlo_info = (pno_nlo_info_t*)rtw_zmalloc(sizeof(pno_nlo_info_t)); pwrctl->pno_ssid_list = (pno_ssid_list_t*)rtw_zmalloc(sizeof(pno_ssid_list_t)); pwrctl->pscan_info = (pno_scan_info_t*)rtw_zmalloc(sizeof(pno_scan_info_t)); } if (pwrctl->pnlo_info == NULL || pwrctl->pscan_info == NULL || pwrctl->pno_ssid_list == NULL){ DBG_871X("%s, ERROR: alloc nlo_info, ssid_list, scan_info fail\n", __func__); goto failing; } pwrctl->pno_in_resume = _FALSE; pwrctl->pno_inited = _TRUE; /* NLO Info */ ret = rtw_dev_nlo_info_set(pwrctl->pnlo_info, ssid, num, pno_time, pno_repeat, pno_freq_expo_max); /* SSID Info */ ret = rtw_dev_ssid_list_set(pwrctl->pno_ssid_list, ssid, num); /* SCAN Info */ ret = rtw_dev_scan_info_set(padapter, ssid, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); DBG_871X("+%s num: %d, pno_time: %d, pno_repeat:%d, pno_freq_expo_max:%d+\n", __func__, num, pno_time, pno_repeat, pno_freq_expo_max); return 0; failing: if (pwrctl->pnlo_info) { rtw_mfree((u8 *)pwrctl->pnlo_info, sizeof(pno_nlo_info_t)); pwrctl->pnlo_info = NULL; } if (pwrctl->pno_ssid_list) { rtw_mfree((u8 *)pwrctl->pno_ssid_list, sizeof(pno_ssid_list_t)); pwrctl->pno_ssid_list = NULL; } if (pwrctl->pscan_info) { rtw_mfree((u8 *)pwrctl->pscan_info, sizeof(pno_scan_info_t)); pwrctl->pscan_info = NULL; } return -1; } #ifdef CONFIG_PNO_SET_DEBUG void rtw_dev_pno_debug(struct net_device *net) { _adapter *padapter = (_adapter *)rtw_netdev_priv(net); struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); int i = 0, j = 0; DBG_871X("*******NLO_INFO********\n"); DBG_871X("ssid_num: %d\n", pwrctl->pnlo_info->ssid_num); DBG_871X("fast_scan_iterations: %d\n", pwrctl->pnlo_info->fast_scan_iterations); DBG_871X("fast_scan_period: %d\n", pwrctl->pnlo_info->fast_scan_period); DBG_871X("slow_scan_period: %d\n", pwrctl->pnlo_info->slow_scan_period); DBG_871X("ssid_length: "); for (i = 0 ; i < MAX_PNO_LIST_COUNT ; i++) { printk("%d, ", pwrctl->pnlo_info->ssid_length[i]); } DBG_871X("\n"); DBG_871X("cipher_info: "); for (i = 0 ; i < MAX_PNO_LIST_COUNT ; i++) { DBG_871X("%d, ", pwrctl->pnlo_info->ssid_cipher_info[i]); } DBG_871X("\n"); DBG_871X("channel_info: "); for (i = 0 ; i < MAX_PNO_LIST_COUNT ; i++) { DBG_871X("%d, ", pwrctl->pnlo_info->ssid_channel_info[i]); } DBG_871X("\n"); DBG_871X("******SSID_LISD******\n"); for (i = 0 ; i < MAX_PNO_LIST_COUNT ; i++) { DBG_871X("[%d]SSID: %s \n", i, pwrctl->pno_ssid_list->node[i].SSID); } DBG_871X("******SCAN_INFO******\n"); DBG_871X("ch_num: %d\n", pwrctl->pscan_info->channel_num); DBG_871X("orig_ch: %d\n", pwrctl->pscan_info->orig_ch); DBG_871X("orig bw: %d\n", pwrctl->pscan_info->orig_bw); DBG_871X("orig 40 offset: %d\n", pwrctl->pscan_info->orig_40_offset); for(i = 0 ; i < MAX_SCAN_LIST_COUNT ; i++) { DBG_871X("[%02d] avtive:%d, timeout:%d, tx_power:%d, ch:%02d\n", i, pwrctl->pscan_info->ssid_channel_info[i].active, pwrctl->pscan_info->ssid_channel_info[i].timeout, pwrctl->pscan_info->ssid_channel_info[i].tx_power, pwrctl->pscan_info->ssid_channel_info[i].channel); } DBG_871X("*****************\n"); } #endif //CONFIG_PNO_SET_DEBUG #endif //CONFIG_PNO_SUPPORT rtl8812au-4.3.8.12175.20140902+dfsg/core/rtw_xmit.c000077500000000000000000003575311261122257400204710ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTW_XMIT_C_ #include #if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) #error "Shall be Linux or Windows, but not both!\n" #endif static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 }; static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 }; static void _init_txservq(struct tx_servq *ptxservq) { _func_enter_; _rtw_init_listhead(&ptxservq->tx_pending); _rtw_init_queue(&ptxservq->sta_pending); ptxservq->qcnt = 0; _func_exit_; } void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv) { _func_enter_; _rtw_memset((unsigned char *)psta_xmitpriv, 0, sizeof (struct sta_xmit_priv)); _rtw_spinlock_init(&psta_xmitpriv->lock); //for(i = 0 ; i < MAX_NUMBLKS; i++) // _init_txservq(&(psta_xmitpriv->blk_q[i])); _init_txservq(&psta_xmitpriv->be_q); _init_txservq(&psta_xmitpriv->bk_q); _init_txservq(&psta_xmitpriv->vi_q); _init_txservq(&psta_xmitpriv->vo_q); _rtw_init_listhead(&psta_xmitpriv->legacy_dz); _rtw_init_listhead(&psta_xmitpriv->apsd); _func_exit_; } s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter) { int i; struct xmit_buf *pxmitbuf; struct xmit_frame *pxframe; sint res=_SUCCESS; _func_enter_; // We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). //_rtw_memset((unsigned char *)pxmitpriv, 0, sizeof(struct xmit_priv)); _rtw_spinlock_init(&pxmitpriv->lock); _rtw_spinlock_init(&pxmitpriv->lock_sctx); _rtw_init_sema(&pxmitpriv->xmit_sema, 0); _rtw_init_sema(&pxmitpriv->terminate_xmitthread_sema, 0); /* Please insert all the queue initializaiton using _rtw_init_queue below */ pxmitpriv->adapter = padapter; //for(i = 0 ; i < MAX_NUMBLKS; i++) // _rtw_init_queue(&pxmitpriv->blk_strms[i]); _rtw_init_queue(&pxmitpriv->be_pending); _rtw_init_queue(&pxmitpriv->bk_pending); _rtw_init_queue(&pxmitpriv->vi_pending); _rtw_init_queue(&pxmitpriv->vo_pending); _rtw_init_queue(&pxmitpriv->bm_pending); //_rtw_init_queue(&pxmitpriv->legacy_dz_queue); //_rtw_init_queue(&pxmitpriv->apsd_queue); _rtw_init_queue(&pxmitpriv->free_xmit_queue); /* Please allocate memory with the sz = (struct xmit_frame) * NR_XMITFRAME, and initialize free_xmit_frame below. Please also apply free_txobj to link_up all the xmit_frames... */ pxmitpriv->pallocated_frame_buf = rtw_zvmalloc(NR_XMITFRAME * sizeof(struct xmit_frame) + 4); if (pxmitpriv->pallocated_frame_buf == NULL){ pxmitpriv->pxmit_frame_buf =NULL; RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("alloc xmit_frame fail!\n")); res= _FAIL; goto exit; } pxmitpriv->pxmit_frame_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_frame_buf), 4); //pxmitpriv->pxmit_frame_buf = pxmitpriv->pallocated_frame_buf + 4 - // ((SIZE_PTR) (pxmitpriv->pallocated_frame_buf) &3); pxframe = (struct xmit_frame*) pxmitpriv->pxmit_frame_buf; for (i = 0; i < NR_XMITFRAME; i++) { _rtw_init_listhead(&(pxframe->list)); pxframe->padapter = padapter; pxframe->frame_tag = NULL_FRAMETAG; pxframe->pkt = NULL; pxframe->buf_addr = NULL; pxframe->pxmitbuf = NULL; rtw_list_insert_tail(&(pxframe->list), &(pxmitpriv->free_xmit_queue.queue)); pxframe++; } pxmitpriv->free_xmitframe_cnt = NR_XMITFRAME; pxmitpriv->frag_len = MAX_FRAG_THRESHOLD; //init xmit_buf _rtw_init_queue(&pxmitpriv->free_xmitbuf_queue); _rtw_init_queue(&pxmitpriv->pending_xmitbuf_queue); pxmitpriv->pallocated_xmitbuf = rtw_zvmalloc(NR_XMITBUFF * sizeof(struct xmit_buf) + 4); if (pxmitpriv->pallocated_xmitbuf == NULL){ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("alloc xmit_buf fail!\n")); res= _FAIL; goto exit; } pxmitpriv->pxmitbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_xmitbuf), 4); //pxmitpriv->pxmitbuf = pxmitpriv->pallocated_xmitbuf + 4 - // ((SIZE_PTR) (pxmitpriv->pallocated_xmitbuf) &3); pxmitbuf = (struct xmit_buf*)pxmitpriv->pxmitbuf; for (i = 0; i < NR_XMITBUFF; i++) { _rtw_init_listhead(&pxmitbuf->list); pxmitbuf->priv_data = NULL; pxmitbuf->padapter = padapter; pxmitbuf->buf_tag = XMITBUF_DATA; /* Tx buf allocation may fail sometimes, so sleep and retry. */ if((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf,(MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ), _TRUE)) == _FAIL) { rtw_msleep_os(10); res = rtw_os_xmit_resource_alloc(padapter, pxmitbuf,(MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ), _TRUE); if (res == _FAIL) { goto exit; } } #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) pxmitbuf->phead = pxmitbuf->pbuf; pxmitbuf->pend = pxmitbuf->pbuf + MAX_XMITBUF_SZ; pxmitbuf->len = 0; pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; #endif pxmitbuf->flags = XMIT_VO_QUEUE; rtw_list_insert_tail(&pxmitbuf->list, &(pxmitpriv->free_xmitbuf_queue.queue)); #ifdef DBG_XMIT_BUF pxmitbuf->no=i; #endif pxmitbuf++; } pxmitpriv->free_xmitbuf_cnt = NR_XMITBUFF; /* init xframe_ext queue, the same count as extbuf */ _rtw_init_queue(&pxmitpriv->free_xframe_ext_queue); pxmitpriv->xframe_ext_alloc_addr = rtw_zvmalloc(NR_XMIT_EXTBUFF * sizeof(struct xmit_frame) + 4); if (pxmitpriv->xframe_ext_alloc_addr == NULL){ pxmitpriv->xframe_ext = NULL; RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("alloc xframe_ext fail!\n")); res= _FAIL; goto exit; } pxmitpriv->xframe_ext = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->xframe_ext_alloc_addr), 4); pxframe = (struct xmit_frame*)pxmitpriv->xframe_ext; for (i = 0; i < NR_XMIT_EXTBUFF; i++) { _rtw_init_listhead(&(pxframe->list)); pxframe->padapter = padapter; pxframe->frame_tag = NULL_FRAMETAG; pxframe->pkt = NULL; pxframe->buf_addr = NULL; pxframe->pxmitbuf = NULL; pxframe->ext_tag = 1; rtw_list_insert_tail(&(pxframe->list), &(pxmitpriv->free_xframe_ext_queue.queue)); pxframe++; } pxmitpriv->free_xframe_ext_cnt = NR_XMIT_EXTBUFF; // Init xmit extension buff _rtw_init_queue(&pxmitpriv->free_xmit_extbuf_queue); pxmitpriv->pallocated_xmit_extbuf = rtw_zvmalloc(NR_XMIT_EXTBUFF * sizeof(struct xmit_buf) + 4); if (pxmitpriv->pallocated_xmit_extbuf == NULL){ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("alloc xmit_extbuf fail!\n")); res= _FAIL; goto exit; } pxmitpriv->pxmit_extbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_xmit_extbuf), 4); pxmitbuf = (struct xmit_buf*)pxmitpriv->pxmit_extbuf; for (i = 0; i < NR_XMIT_EXTBUFF; i++) { _rtw_init_listhead(&pxmitbuf->list); pxmitbuf->priv_data = NULL; pxmitbuf->padapter = padapter; pxmitbuf->buf_tag = XMITBUF_MGNT; if((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf,MAX_XMIT_EXTBUF_SZ + XMITBUF_ALIGN_SZ, _TRUE)) == _FAIL) { res= _FAIL; goto exit; } #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) pxmitbuf->phead = pxmitbuf->pbuf; pxmitbuf->pend = pxmitbuf->pbuf + MAX_XMIT_EXTBUF_SZ; pxmitbuf->len = 0; pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; #endif rtw_list_insert_tail(&pxmitbuf->list, &(pxmitpriv->free_xmit_extbuf_queue.queue)); #ifdef DBG_XMIT_BUF_EXT pxmitbuf->no=i; #endif pxmitbuf++; } pxmitpriv->free_xmit_extbuf_cnt = NR_XMIT_EXTBUFF; for (i = 0; ipcmd_xmitbuf[i]; if (pxmitbuf) { _rtw_init_listhead(&pxmitbuf->list); pxmitbuf->priv_data = NULL; pxmitbuf->padapter = padapter; pxmitbuf->buf_tag = XMITBUF_CMD; if((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf, MAX_CMDBUF_SZ+XMITBUF_ALIGN_SZ, _TRUE)) == _FAIL) { res= _FAIL; goto exit; } #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) pxmitbuf->phead = pxmitbuf->pbuf; pxmitbuf->pend = pxmitbuf->pbuf + MAX_CMDBUF_SZ; pxmitbuf->len = 0; pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; #endif pxmitbuf->alloc_sz = MAX_CMDBUF_SZ+XMITBUF_ALIGN_SZ; } } rtw_alloc_hwxmits(padapter); rtw_init_hwxmits(pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); for (i = 0; i < 4; i ++) { pxmitpriv->wmm_para_seq[i] = i; } #ifdef CONFIG_USB_HCI pxmitpriv->txirp_cnt=1; _rtw_init_sema(&(pxmitpriv->tx_retevt), 0); //per AC pending irp pxmitpriv->beq_cnt = 0; pxmitpriv->bkq_cnt = 0; pxmitpriv->viq_cnt = 0; pxmitpriv->voq_cnt = 0; #endif #ifdef CONFIG_XMIT_ACK pxmitpriv->ack_tx = _FALSE; _rtw_mutex_init(&pxmitpriv->ack_tx_mutex); rtw_sctx_init(&pxmitpriv->ack_tx_ops, 0); #endif rtw_hal_init_xmit_priv(padapter); exit: _func_exit_; return res; } void rtw_mfree_xmit_priv_lock (struct xmit_priv *pxmitpriv); void rtw_mfree_xmit_priv_lock (struct xmit_priv *pxmitpriv) { _rtw_spinlock_free(&pxmitpriv->lock); _rtw_free_sema(&pxmitpriv->xmit_sema); _rtw_free_sema(&pxmitpriv->terminate_xmitthread_sema); _rtw_spinlock_free(&pxmitpriv->be_pending.lock); _rtw_spinlock_free(&pxmitpriv->bk_pending.lock); _rtw_spinlock_free(&pxmitpriv->vi_pending.lock); _rtw_spinlock_free(&pxmitpriv->vo_pending.lock); _rtw_spinlock_free(&pxmitpriv->bm_pending.lock); //_rtw_spinlock_free(&pxmitpriv->legacy_dz_queue.lock); //_rtw_spinlock_free(&pxmitpriv->apsd_queue.lock); _rtw_spinlock_free(&pxmitpriv->free_xmit_queue.lock); _rtw_spinlock_free(&pxmitpriv->free_xmitbuf_queue.lock); _rtw_spinlock_free(&pxmitpriv->pending_xmitbuf_queue.lock); } void _rtw_free_xmit_priv (struct xmit_priv *pxmitpriv) { int i; _adapter *padapter = pxmitpriv->adapter; struct xmit_frame *pxmitframe = (struct xmit_frame*) pxmitpriv->pxmit_frame_buf; struct xmit_buf *pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmitbuf; _func_enter_; rtw_hal_free_xmit_priv(padapter); rtw_mfree_xmit_priv_lock(pxmitpriv); if(pxmitpriv->pxmit_frame_buf==NULL) goto out; for(i=0; ipallocated_frame_buf) { rtw_vmfree(pxmitpriv->pallocated_frame_buf, NR_XMITFRAME * sizeof(struct xmit_frame) + 4); } if(pxmitpriv->pallocated_xmitbuf) { rtw_vmfree(pxmitpriv->pallocated_xmitbuf, NR_XMITBUFF * sizeof(struct xmit_buf) + 4); } /* free xframe_ext queue, the same count as extbuf */ if ((pxmitframe = (struct xmit_frame*)pxmitpriv->xframe_ext)) { for (i=0; ixframe_ext_alloc_addr) rtw_vmfree(pxmitpriv->xframe_ext_alloc_addr, NR_XMIT_EXTBUFF * sizeof(struct xmit_frame) + 4); _rtw_spinlock_free(&pxmitpriv->free_xframe_ext_queue.lock); // free xmit extension buff _rtw_spinlock_free(&pxmitpriv->free_xmit_extbuf_queue.lock); pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf; for(i=0; ipallocated_xmit_extbuf) { rtw_vmfree(pxmitpriv->pallocated_xmit_extbuf, NR_XMIT_EXTBUFF * sizeof(struct xmit_buf) + 4); } for (i=0; ipcmd_xmitbuf[i]; if(pxmitbuf!=NULL) rtw_os_xmit_resource_free(padapter, pxmitbuf, MAX_CMDBUF_SZ+XMITBUF_ALIGN_SZ , _TRUE); } rtw_free_hwxmits(padapter); #ifdef CONFIG_XMIT_ACK _rtw_mutex_free(&pxmitpriv->ack_tx_mutex); #endif out: _func_exit_; } u8 query_ra_short_GI(struct sta_info *psta) { u8 sgi = _FALSE, sgi_20m = _FALSE, sgi_40m = _FALSE, sgi_80m = _FALSE; #ifdef CONFIG_80211N_HT #ifdef CONFIG_80211AC_VHT if (psta->vhtpriv.vht_option) { sgi_80m= psta->vhtpriv.sgi_80m; } #endif //CONFIG_80211AC_VHT { sgi_20m = psta->htpriv.sgi_20m; sgi_40m = psta->htpriv.sgi_40m; } #endif switch(psta->bw_mode){ case CHANNEL_WIDTH_80: sgi = sgi_80m; break; case CHANNEL_WIDTH_40: sgi = sgi_40m; break; case CHANNEL_WIDTH_20: default: sgi = sgi_20m; break; } return sgi; } static void update_attrib_vcs_info(_adapter *padapter, struct xmit_frame *pxmitframe) { u32 sz; struct pkt_attrib *pattrib = &pxmitframe->attrib; //struct sta_info *psta = pattrib->psta; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); /* if(pattrib->psta) { psta = pattrib->psta; } else { DBG_871X("%s, call rtw_get_stainfo()\n", __func__); psta=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0] ); } if(psta==NULL) { DBG_871X("%s, psta==NUL\n", __func__); return; } if(!(psta->state &_FW_LINKED)) { DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); return; } */ if (pattrib->nr_frags != 1) { sz = padapter->xmitpriv.frag_len; } else //no frag { sz = pattrib->last_txcmdsz; } // (1) RTS_Threshold is compared to the MPDU, not MSDU. // (2) If there are more than one frag in this MSDU, only the first frag uses protection frame. // Other fragments are protected by previous fragment. // So we only need to check the length of first fragment. if(pmlmeext->cur_wireless_mode < WIRELESS_11_24N || padapter->registrypriv.wifi_spec) { if(sz > padapter->registrypriv.rts_thresh) { pattrib->vcs_mode = RTS_CTS; } else { if(pattrib->rtsen) pattrib->vcs_mode = RTS_CTS; else if(pattrib->cts2self) pattrib->vcs_mode = CTS_TO_SELF; else pattrib->vcs_mode = NONE_VCS; } } else { while (_TRUE) { #if 0 //Todo //check IOT action if(pHTInfo->IOTAction & HT_IOT_ACT_FORCED_CTS2SELF) { pattrib->vcs_mode = CTS_TO_SELF; pattrib->rts_rate = MGN_24M; break; } else if(pHTInfo->IOTAction & (HT_IOT_ACT_FORCED_RTS|HT_IOT_ACT_PURE_N_MODE)) { pattrib->vcs_mode = RTS_CTS; pattrib->rts_rate = MGN_24M; break; } #endif //IOT action if((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_ATHEROS) && (pattrib->ampdu_en==_TRUE) && (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_ )) { pattrib->vcs_mode = CTS_TO_SELF; break; } //check ERP protection if(pattrib->rtsen || pattrib->cts2self) { if(pattrib->rtsen) pattrib->vcs_mode = RTS_CTS; else if(pattrib->cts2self) pattrib->vcs_mode = CTS_TO_SELF; break; } //check HT op mode if(pattrib->ht_en) { u8 HTOpMode = pmlmeinfo->HT_protection; if((pmlmeext->cur_bwmode && (HTOpMode == 2 || HTOpMode == 3)) || (!pmlmeext->cur_bwmode && HTOpMode == 3) ) { pattrib->vcs_mode = RTS_CTS; break; } } //check rts if(sz > padapter->registrypriv.rts_thresh) { pattrib->vcs_mode = RTS_CTS; break; } //to do list: check MIMO power save condition. //check AMPDU aggregation for TXOP if((pattrib->ampdu_en==_TRUE) && (!IS_HARDWARE_TYPE_8812(padapter))) { pattrib->vcs_mode = RTS_CTS; break; } pattrib->vcs_mode = NONE_VCS; break; } } //for debug : force driver control vrtl_carrier_sense. if(padapter->driver_vcs_en==1) { //u8 driver_vcs_en; //Enable=1, Disable=0 driver control vrtl_carrier_sense. //u8 driver_vcs_type;//force 0:disable VCS, 1:RTS-CTS, 2:CTS-to-self when vcs_en=1. pattrib->vcs_mode = padapter->driver_vcs_type; } } static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta) { struct mlme_ext_priv *mlmeext = &padapter->mlmeextpriv; pattrib->rtsen = psta->rtsen; pattrib->cts2self = psta->cts2self; pattrib->mdata = 0; pattrib->eosp = 0; pattrib->triggered=0; pattrib->ampdu_spacing = 0; //qos_en, ht_en, init rate, ,bw, ch_offset, sgi pattrib->qos_en = psta->qos_option; pattrib->raid = psta->raid; if (mlmeext->cur_bwmode < psta->bw_mode) pattrib->bwmode = mlmeext->cur_bwmode; else pattrib->bwmode = psta->bw_mode; pattrib->sgi = query_ra_short_GI(psta); pattrib->ldpc = psta->ldpc; pattrib->stbc = psta->stbc; #ifdef CONFIG_80211N_HT pattrib->ht_en = psta->htpriv.ht_option; pattrib->ch_offset = psta->htpriv.ch_offset; pattrib->ampdu_en = _FALSE; if(padapter->driver_ampdu_spacing != 0xFF) //driver control AMPDU Density for peer sta's rx pattrib->ampdu_spacing = padapter->driver_ampdu_spacing; else pattrib->ampdu_spacing = psta->htpriv.rx_ampdu_min_spacing; #endif //CONFIG_80211N_HT //if(pattrib->ht_en && psta->htpriv.ampdu_enable) //{ // if(psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority)) // pattrib->ampdu_en = _TRUE; //} pattrib->retry_ctrl = _FALSE; #ifdef CONFIG_AUTO_AP_MODE if(psta->isrc && psta->pid>0) pattrib->pctrl = _TRUE; #endif } static s32 update_attrib_sec_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta) { sint res = _SUCCESS; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; sint bmcast = IS_MCAST(pattrib->ra); _rtw_memset(pattrib->dot118021x_UncstKey.skey, 0, 16); _rtw_memset(pattrib->dot11tkiptxmickey.skey, 0, 16); pattrib->mac_id = psta->mac_id; if (psta->ieee8021x_blocked == _TRUE) { RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("\n psta->ieee8021x_blocked == _TRUE \n")); pattrib->encrypt = 0; if((pattrib->ether_type != 0x888e) && (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _FALSE)) { RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("\npsta->ieee8021x_blocked == _TRUE, pattrib->ether_type(%.4x) != 0x888e\n",pattrib->ether_type)); #ifdef DBG_TX_DROP_FRAME DBG_871X("DBG_TX_DROP_FRAME %s psta->ieee8021x_blocked == _TRUE, pattrib->ether_type(%04x) != 0x888e\n", __FUNCTION__,pattrib->ether_type); #endif res = _FAIL; goto exit; } } else { GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, bmcast); #ifdef CONFIG_WAPI_SUPPORT if(pattrib->ether_type == 0x88B4) pattrib->encrypt=_NO_PRIVACY_; #endif switch(psecuritypriv->dot11AuthAlgrthm) { case dot11AuthAlgrthm_Open: case dot11AuthAlgrthm_Shared: case dot11AuthAlgrthm_Auto: pattrib->key_idx = (u8)psecuritypriv->dot11PrivacyKeyIndex; break; case dot11AuthAlgrthm_8021X: if(bmcast) pattrib->key_idx = (u8)psecuritypriv->dot118021XGrpKeyid; else pattrib->key_idx = 0; break; default: pattrib->key_idx = 0; break; } //For WPS 1.0 WEP, driver should not encrypt EAPOL Packet for WPS handshake. if (((pattrib->encrypt ==_WEP40_)||(pattrib->encrypt ==_WEP104_)) && (pattrib->ether_type == 0x888e)) pattrib->encrypt=_NO_PRIVACY_; } switch (pattrib->encrypt) { case _WEP40_: case _WEP104_: pattrib->iv_len = 4; pattrib->icv_len = 4; WEP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); break; case _TKIP_: pattrib->iv_len = 8; pattrib->icv_len = 4; if(psecuritypriv->busetkipkey==_FAIL) { #ifdef DBG_TX_DROP_FRAME DBG_871X("DBG_TX_DROP_FRAME %s psecuritypriv->busetkipkey(%d)==_FAIL drop packet\n", __FUNCTION__, psecuritypriv->busetkipkey); #endif res =_FAIL; goto exit; } if(bmcast) TKIP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); else TKIP_IV(pattrib->iv, psta->dot11txpn, 0); _rtw_memcpy(pattrib->dot11tkiptxmickey.skey, psta->dot11tkiptxmickey.skey, 16); break; case _AES_: pattrib->iv_len = 8; pattrib->icv_len = 8; if(bmcast) AES_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); else AES_IV(pattrib->iv, psta->dot11txpn, 0); break; #ifdef CONFIG_WAPI_SUPPORT case _SMS4_: pattrib->iv_len = 18; pattrib->icv_len = 16; rtw_wapi_get_iv(padapter,pattrib->ra,pattrib->iv); break; #endif default: pattrib->iv_len = 0; pattrib->icv_len = 0; break; } if(pattrib->encrypt>0) _rtw_memcpy(pattrib->dot118021x_UncstKey.skey, psta->dot118021x_UncstKey.skey, 16); RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("update_attrib: encrypt=%d securitypriv.sw_encrypt=%d\n", pattrib->encrypt, padapter->securitypriv.sw_encrypt)); if (pattrib->encrypt && ((padapter->securitypriv.sw_encrypt == _TRUE) || (psecuritypriv->hw_decrypted == _FALSE))) { pattrib->bswenc = _TRUE; RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_, ("update_attrib: encrypt=%d securitypriv.hw_decrypted=%d bswenc=_TRUE\n", pattrib->encrypt, padapter->securitypriv.sw_encrypt)); } else { pattrib->bswenc = _FALSE; RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("update_attrib: bswenc=_FALSE\n")); } #if defined(CONFIG_CONCURRENT_MODE) && !defined(DYNAMIC_CAMID_ALLOC) if((pattrib->encrypt && bmcast) || (pattrib->encrypt ==_WEP40_) || (pattrib->encrypt ==_WEP104_)) { pattrib->bswenc = _TRUE;//force using sw enc. } #endif #ifdef CONFIG_WAPI_SUPPORT if(pattrib->encrypt == _SMS4_) pattrib->bswenc = _FALSE; #endif #ifdef CONFIG_TDLS if(pattrib->direct_link == _TRUE) { pattrib->mac_id = pattrib->ptdls_sta->mac_id; if(pattrib->encrypt>0) { pattrib->encrypt= _AES_; pattrib->iv_len=8; pattrib->icv_len=8; pattrib->bswenc = _FALSE; } } #endif //CONFIG_TDLS exit: return res; } u8 qos_acm(u8 acm_mask, u8 priority) { u8 change_priority = priority; switch (priority) { case 0: case 3: if(acm_mask & BIT(1)) change_priority = 1; break; case 1: case 2: break; case 4: case 5: if(acm_mask & BIT(2)) change_priority = 0; break; case 6: case 7: if(acm_mask & BIT(3)) change_priority = 5; break; default: DBG_871X("qos_acm(): invalid pattrib->priority: %d!!!\n", priority); break; } return change_priority; } static void set_qos(struct pkt_file *ppktfile, struct pkt_attrib *pattrib) { struct ethhdr etherhdr; struct iphdr ip_hdr; s32 UserPriority = 0; _rtw_open_pktfile(ppktfile->pkt, ppktfile); _rtw_pktfile_read(ppktfile, (unsigned char*)ðerhdr, ETH_HLEN); // get UserPriority from IP hdr if (pattrib->ether_type == 0x0800) { _rtw_pktfile_read(ppktfile, (u8*)&ip_hdr, sizeof(ip_hdr)); // UserPriority = (ntohs(ip_hdr.tos) >> 5) & 0x3; UserPriority = ip_hdr.tos >> 5; } /* else if (pattrib->ether_type == 0x888e) { // "When priority processing of data frames is supported, // a STA's SME should send EAPOL-Key frames at the highest priority." UserPriority = 7; } */ pattrib->priority = UserPriority; pattrib->hdrlen = WLAN_HDR_A3_QOS_LEN; pattrib->subtype = WIFI_QOS_DATA_TYPE; } #ifdef CONFIG_TDLS void rtw_check_tdls_established(_adapter *padapter, struct pkt_attrib *pattrib) { pattrib->ptdls_sta = NULL; pattrib->direct_link = _FALSE; if((padapter->tdlsinfo.link_established == _TRUE)){ pattrib->ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->dst); if((pattrib->ptdls_sta!=NULL)&& (pattrib->ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)&& (pattrib->ether_type!=0x0806)){ pattrib->direct_link = _TRUE; //DBG_871X("send ptk to "MAC_FMT" using direct link\n", MAC_ARG(pattrib->dst)); } } } s32 update_tdls_attrib(_adapter *padapter, struct pkt_attrib *pattrib) { struct sta_info *psta = NULL; struct sta_priv *pstapriv = &padapter->stapriv; struct security_priv *psecuritypriv = &padapter->securitypriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct qos_priv *pqospriv= &pmlmepriv->qospriv; s32 res=_SUCCESS; psta = rtw_get_stainfo(pstapriv, pattrib->ra); if (psta == NULL) { res =_FAIL; goto exit; } pattrib->mac_id = psta->mac_id; pattrib->psta = psta; pattrib->ack_policy = 0; // get ether_hdr_len pattrib->pkt_hdrlen = ETH_HLEN;//(pattrib->ether_type == 0x8100) ? (14 + 4 ): 14; //vlan tag // [TDLS] TODO: setup req/rsp should be AC_BK if (pqospriv->qos_option && psta->qos_option) { pattrib->priority = 4; //tdls management frame should be AC_VI pattrib->hdrlen = WLAN_HDR_A3_QOS_LEN; pattrib->subtype = WIFI_QOS_DATA_TYPE; } else { pattrib->priority = 0; pattrib->hdrlen = WLAN_HDR_A3_LEN; pattrib->subtype = WIFI_DATA_TYPE; } //TODO:_lock if(update_attrib_sec_info(padapter, pattrib, psta) == _FAIL) { res = _FAIL; goto exit; } update_attrib_phy_info(padapter, pattrib, psta); exit: return res; } #endif //CONFIG_TDLS static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattrib) { uint i; struct pkt_file pktfile; struct sta_info *psta = NULL; struct ethhdr etherhdr; sint bmcast; struct sta_priv *pstapriv = &padapter->stapriv; struct security_priv *psecuritypriv = &padapter->securitypriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct qos_priv *pqospriv= &pmlmepriv->qospriv; sint res = _SUCCESS; _func_enter_; DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib); _rtw_open_pktfile(pkt, &pktfile); i = _rtw_pktfile_read(&pktfile, (u8*)ðerhdr, ETH_HLEN); pattrib->ether_type = ntohs(etherhdr.h_proto); _rtw_memcpy(pattrib->dst, ðerhdr.h_dest, ETH_ALEN); _rtw_memcpy(pattrib->src, ðerhdr.h_source, ETH_ALEN); if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) || (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); _rtw_memcpy(pattrib->ta, myid(&padapter->eeprompriv), ETH_ALEN); DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_adhoc); } else if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); _rtw_memcpy(pattrib->ta, myid(&padapter->eeprompriv), ETH_ALEN); DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_sta); } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); _rtw_memcpy(pattrib->ta, get_bssid(pmlmepriv), ETH_ALEN); DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_ap); } else DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_unknown); #ifdef CONFIG_TDLS rtw_check_tdls_established(padapter, pattrib); #endif //CONFIG_TDLS pattrib->pktlen = pktfile.pkt_len; if (ETH_P_IP == pattrib->ether_type) { // The following is for DHCP and ARP packet, we use cck1M to tx these packets and let LPS awake some time // to prevent DHCP protocol fail u8 tmp[24]; _rtw_pktfile_read(&pktfile, &tmp[0], 24); pattrib->dhcp_pkt = 0; if (pktfile.pkt_len > 282) {//MINIMUM_DHCP_PACKET_SIZE) { if (ETH_P_IP == pattrib->ether_type) {// IP header if (((tmp[21] == 68) && (tmp[23] == 67)) || ((tmp[21] == 67) && (tmp[23] == 68))) { // 68 : UDP BOOTP client // 67 : UDP BOOTP server RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("======================update_attrib: get DHCP Packet \n")); // Use low rate to send DHCP packet. //if(pMgntInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom) //{ // tcb_desc->DataRate = MgntQuery_TxRateExcludeCCKRates(ieee);//0xc;//ofdm 6m // tcb_desc->bTxDisableRateFallBack = false; //} //else // pTcb->DataRate = Adapter->MgntInfo.LowestBasicRate; //RTPRINT(FDM, WA_IOT, ("DHCP TranslateHeader(), pTcb->DataRate = 0x%x\n", pTcb->DataRate)); pattrib->dhcp_pkt = 1; DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_dhcp); } } } //for parsing ICMP pakcets { struct iphdr *piphdr = (struct iphdr *)tmp; pattrib->icmp_pkt = 0; if(piphdr->protocol == 0x1) // protocol type in ip header 0x1 is ICMP { pattrib->icmp_pkt = 1; DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_icmp); } } } else if (0x888e == pattrib->ether_type) { DBG_871X_LEVEL(_drv_always_, "send eapol packet\n"); } if ( (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1) ) { rtw_set_scan_deny(padapter, 3000); } #ifdef CONFIG_LPS // If EAPOL , ARP , OR DHCP packet, driver must be in active mode. #ifdef CONFIG_WAPI_SUPPORT if ( (pattrib->ether_type == 0x88B4) || (pattrib->ether_type == 0x0806) || (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1) ) #else //!CONFIG_WAPI_SUPPORT #if 0 if ( (pattrib->ether_type == 0x0806) || (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1) ) #else // only ICMP/DHCP packets is as SPECIAL_PACKET, and leave LPS when tx IMCP/DHCP packets. //if ((pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1) ) if (pattrib->icmp_pkt==1) { rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1); } else if(pattrib->dhcp_pkt==1) #endif #endif { DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_active); rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SPECIAL_PACKET, 1); } #endif //CONFIG_LPS bmcast = IS_MCAST(pattrib->ra); // get sta_info if (bmcast) { psta = rtw_get_bcmc_stainfo(padapter); } else { psta = rtw_get_stainfo(pstapriv, pattrib->ra); if (psta == NULL) { // if we cannot get psta => drop the pkt DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_ucast_sta); RT_TRACE(_module_rtl871x_xmit_c_, _drv_alert_, ("\nupdate_attrib => get sta_info fail, ra:" MAC_FMT"\n", MAC_ARG(pattrib->ra))); #ifdef DBG_TX_DROP_FRAME DBG_871X("DBG_TX_DROP_FRAME %s get sta_info fail, ra:" MAC_FMT"\n", __FUNCTION__, MAC_ARG(pattrib->ra)); #endif res =_FAIL; goto exit; } else if((check_fwstate(pmlmepriv, WIFI_AP_STATE)==_TRUE)&&(!(psta->state & _FW_LINKED))) { DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_ucast_ap_link); res =_FAIL; goto exit; } } if(psta == NULL) { // if we cannot get psta => drop the pkt DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_sta); RT_TRACE(_module_rtl871x_xmit_c_, _drv_alert_, ("\nupdate_attrib => get sta_info fail, ra:" MAC_FMT "\n", MAC_ARG(pattrib->ra))); #ifdef DBG_TX_DROP_FRAME DBG_871X("DBG_TX_DROP_FRAME %s get sta_info fail, ra:" MAC_FMT"\n", __FUNCTION__, MAC_ARG(pattrib->ra)); #endif res = _FAIL; goto exit; } if(!(psta->state &_FW_LINKED)) { DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_link); DBG_871X("%s, psta("MAC_FMT")->state(0x%x) != _FW_LINKED\n", __func__, MAC_ARG(psta->hwaddr), psta->state); return _FAIL; } //TODO:_lock if(update_attrib_sec_info(padapter, pattrib, psta) == _FAIL) { DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_sec); res = _FAIL; goto exit; } update_attrib_phy_info(padapter, pattrib, psta); //DBG_8192C("%s ==> mac_id(%d)\n",__FUNCTION__,pattrib->mac_id ); pattrib->psta = psta; //TODO:_unlock pattrib->pctrl = 0; pattrib->ack_policy = 0; // get ether_hdr_len pattrib->pkt_hdrlen = ETH_HLEN;//(pattrib->ether_type == 0x8100) ? (14 + 4 ): 14; //vlan tag pattrib->hdrlen = WLAN_HDR_A3_LEN; pattrib->subtype = WIFI_DATA_TYPE; pattrib->priority = 0; if (check_fwstate(pmlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) { if(pattrib->qos_en) set_qos(&pktfile, pattrib); } else { if(pqospriv->qos_option) { set_qos(&pktfile, pattrib); if(pmlmepriv->acm_mask != 0) { pattrib->priority = qos_acm(pmlmepriv->acm_mask, pattrib->priority); } } } //pattrib->priority = 5; //force to used VI queue, for testing rtw_set_tx_chksum_offload(pkt, pattrib); exit: _func_exit_; return res; } static s32 xmitframe_addmic(_adapter *padapter, struct xmit_frame *pxmitframe){ sint curfragnum,length; u8 *pframe, *payload,mic[8]; struct mic_data micdata; //struct sta_info *stainfo; struct qos_priv *pqospriv= &(padapter->mlmepriv.qospriv); struct pkt_attrib *pattrib = &pxmitframe->attrib; struct security_priv *psecuritypriv=&padapter->securitypriv; struct xmit_priv *pxmitpriv=&padapter->xmitpriv; u8 priority[4]={0x0,0x0,0x0,0x0}; u8 hw_hdr_offset = 0; sint bmcst = IS_MCAST(pattrib->ra); /* if(pattrib->psta) { stainfo = pattrib->psta; } else { DBG_871X("%s, call rtw_get_stainfo()\n", __func__); stainfo=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0]); } if(stainfo==NULL) { DBG_871X("%s, psta==NUL\n", __func__); return _FAIL; } if(!(stainfo->state &_FW_LINKED)) { DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, stainfo->state); return _FAIL; } */ _func_enter_; #ifdef CONFIG_USB_TX_AGGREGATION hw_hdr_offset = TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ);; #else #ifdef CONFIG_TX_EARLY_MODE hw_hdr_offset = TXDESC_OFFSET+ EARLY_MODE_INFO_SIZE; #else hw_hdr_offset = TXDESC_OFFSET; #endif #endif if(pattrib->encrypt ==_TKIP_)//if(psecuritypriv->dot11PrivacyAlgrthm==_TKIP_PRIVACY_) { //encode mic code //if(stainfo!= NULL) { u8 null_key[16]={0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}; pframe = pxmitframe->buf_addr + hw_hdr_offset; if(bmcst) { if(_rtw_memcmp(psecuritypriv->dot118021XGrptxmickey[psecuritypriv->dot118021XGrpKeyid].skey, null_key, 16)==_TRUE){ //DbgPrint("\nxmitframe_addmic:stainfo->dot11tkiptxmickey==0\n"); //rtw_msleep_os(10); return _FAIL; } //start to calculate the mic code rtw_secmicsetkey(&micdata, psecuritypriv->dot118021XGrptxmickey[psecuritypriv->dot118021XGrpKeyid].skey); } else { if(_rtw_memcmp(&pattrib->dot11tkiptxmickey.skey[0],null_key, 16)==_TRUE){ //DbgPrint("\nxmitframe_addmic:stainfo->dot11tkiptxmickey==0\n"); //rtw_msleep_os(10); return _FAIL; } //start to calculate the mic code rtw_secmicsetkey(&micdata, &pattrib->dot11tkiptxmickey.skey[0]); } if(pframe[1]&1){ //ToDS==1 rtw_secmicappend(&micdata, &pframe[16], 6); //DA if(pframe[1]&2) //From Ds==1 rtw_secmicappend(&micdata, &pframe[24], 6); else rtw_secmicappend(&micdata, &pframe[10], 6); } else{ //ToDS==0 rtw_secmicappend(&micdata, &pframe[4], 6); //DA if(pframe[1]&2) //From Ds==1 rtw_secmicappend(&micdata, &pframe[16], 6); else rtw_secmicappend(&micdata, &pframe[10], 6); } //if(pqospriv->qos_option==1) if(pattrib->qos_en) priority[0]=(u8)pxmitframe->attrib.priority; rtw_secmicappend(&micdata, &priority[0], 4); payload=pframe; for(curfragnum=0;curfragnumnr_frags;curfragnum++){ payload=(u8 *)RND4((SIZE_PTR)(payload)); RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("===curfragnum=%d, pframe= 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x,!!!\n", curfragnum,*payload, *(payload+1),*(payload+2),*(payload+3),*(payload+4),*(payload+5),*(payload+6),*(payload+7))); payload=payload+pattrib->hdrlen+pattrib->iv_len; RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("curfragnum=%d pattrib->hdrlen=%d pattrib->iv_len=%d",curfragnum,pattrib->hdrlen,pattrib->iv_len)); if((curfragnum+1)==pattrib->nr_frags){ length=pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len-( (pattrib->bswenc) ? pattrib->icv_len : 0); rtw_secmicappend(&micdata, payload,length); payload=payload+length; } else{ length=pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-( (pattrib->bswenc) ? pattrib->icv_len : 0); rtw_secmicappend(&micdata, payload, length); payload=payload+length+pattrib->icv_len; RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("curfragnum=%d length=%d pattrib->icv_len=%d",curfragnum,length,pattrib->icv_len)); } } rtw_secgetmic(&micdata,&(mic[0])); RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("xmitframe_addmic: before add mic code!!!\n")); RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("xmitframe_addmic: pattrib->last_txcmdsz=%d!!!\n",pattrib->last_txcmdsz)); RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("xmitframe_addmic: mic[0]=0x%.2x ,mic[1]=0x%.2x ,mic[2]=0x%.2x ,mic[3]=0x%.2x \n\ mic[4]=0x%.2x ,mic[5]=0x%.2x ,mic[6]=0x%.2x ,mic[7]=0x%.2x !!!!\n", mic[0],mic[1],mic[2],mic[3],mic[4],mic[5],mic[6],mic[7])); //add mic code and add the mic code length in last_txcmdsz _rtw_memcpy(payload, &(mic[0]),8); pattrib->last_txcmdsz+=8; RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("\n ========last pkt========\n")); payload=payload-pattrib->last_txcmdsz+8; for(curfragnum=0;curfragnumlast_txcmdsz;curfragnum=curfragnum+8) RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,(" %.2x, %.2x, %.2x, %.2x, %.2x, %.2x, %.2x, %.2x ", *(payload+curfragnum), *(payload+curfragnum+1), *(payload+curfragnum+2),*(payload+curfragnum+3), *(payload+curfragnum+4),*(payload+curfragnum+5),*(payload+curfragnum+6),*(payload+curfragnum+7))); } /* else{ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("xmitframe_addmic: rtw_get_stainfo==NULL!!!\n")); } */ } _func_exit_; return _SUCCESS; } static s32 xmitframe_swencrypt(_adapter *padapter, struct xmit_frame *pxmitframe){ struct pkt_attrib *pattrib = &pxmitframe->attrib; //struct security_priv *psecuritypriv=&padapter->securitypriv; _func_enter_; //if((psecuritypriv->sw_encrypt)||(pattrib->bswenc)) if(pattrib->bswenc) { //DBG_871X("start xmitframe_swencrypt\n"); RT_TRACE(_module_rtl871x_xmit_c_,_drv_alert_,("### xmitframe_swencrypt\n")); switch(pattrib->encrypt){ case _WEP40_: case _WEP104_: rtw_wep_encrypt(padapter, (u8 *)pxmitframe); break; case _TKIP_: rtw_tkip_encrypt(padapter, (u8 *)pxmitframe); break; case _AES_: rtw_aes_encrypt(padapter, (u8 * )pxmitframe); break; #ifdef CONFIG_WAPI_SUPPORT case _SMS4_: rtw_sms4_encrypt(padapter, (u8 * )pxmitframe); #endif default: break; } } else { RT_TRACE(_module_rtl871x_xmit_c_,_drv_notice_,("### xmitframe_hwencrypt\n")); } _func_exit_; return _SUCCESS; } s32 rtw_make_wlanhdr (_adapter *padapter , u8 *hdr, struct pkt_attrib *pattrib) { u16 *qc; struct rtw_ieee80211_hdr *pwlanhdr = (struct rtw_ieee80211_hdr *)hdr; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct qos_priv *pqospriv = &pmlmepriv->qospriv; u8 qos_option = _FALSE; #ifdef CONFIG_TDLS struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; struct sta_priv *pstapriv = &padapter->stapriv; #endif //CONFIG_TDLS sint res = _SUCCESS; u16 *fctrl = &pwlanhdr->frame_ctl; //struct sta_info *psta; //sint bmcst = IS_MCAST(pattrib->ra); _func_enter_; /* psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); if(pattrib->psta != psta) { DBG_871X("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pattrib->psta, psta); return; } if(psta==NULL) { DBG_871X("%s, psta==NUL\n", __func__); return _FAIL; } if(!(psta->state &_FW_LINKED)) { DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); return _FAIL; } */ _rtw_memset(hdr, 0, WLANHDR_OFFSET); SetFrameSubType(fctrl, pattrib->subtype); if (pattrib->subtype & WIFI_DATA_TYPE) { if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)) { #ifdef CONFIG_TDLS if(pattrib->direct_link == _TRUE){ //TDLS data transfer, ToDS=0, FrDs=0 _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); } else #endif //CONFIG_TDLS { //to_ds = 1, fr_ds = 0; // 1.Data transfer to AP // 2.Arp pkt will relayed by AP SetToDs(fctrl); _rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, pattrib->ta, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); } if (pqospriv->qos_option) qos_option = _TRUE; } else if ((check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ) { //to_ds = 0, fr_ds = 1; SetFrDs(fctrl); _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, get_bssid(pmlmepriv), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, pattrib->src, ETH_ALEN); if(pattrib->qos_en) qos_option = _TRUE; } else if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) || (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, pattrib->ta, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); if(pattrib->qos_en) qos_option = _TRUE; } else { RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("fw_state:%x is not allowed to xmit frame\n", get_fwstate(pmlmepriv))); res = _FAIL; goto exit; } if(pattrib->mdata) SetMData(fctrl); if (pattrib->encrypt) SetPrivacy(fctrl); if (qos_option) { qc = (unsigned short *)(hdr + pattrib->hdrlen - 2); if (pattrib->priority) SetPriority(qc, pattrib->priority); SetEOSP(qc, pattrib->eosp); SetAckpolicy(qc, pattrib->ack_policy); } //TODO: fill HT Control Field //Update Seq Num will be handled by f/w { struct sta_info *psta; psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); if(pattrib->psta != psta) { DBG_871X("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pattrib->psta, psta); return _FAIL; } if(psta==NULL) { DBG_871X("%s, psta==NUL\n", __func__); return _FAIL; } if(!(psta->state &_FW_LINKED)) { DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); return _FAIL; } if(psta) { #ifdef CONFIG_TDLS if(pattrib->direct_link==_TRUE) { psta = pattrib->ptdls_sta; //qos_en, ht_en, init rate, ,bw, ch_offset, sgi //pattrib->qos_en = ptdls_sta->qos_option; pattrib->raid = psta->raid; #ifdef CONFIG_80211N_HT pattrib->bwmode = psta->bw_mode; pattrib->ht_en = psta->htpriv.ht_option; pattrib->ch_offset = psta->htpriv.ch_offset; pattrib->sgi= query_ra_short_GI(psta); #endif //CONFIG_80211N_HT } #endif //CONFIG_TDLS psta->sta_xmitpriv.txseq_tid[pattrib->priority]++; psta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF; pattrib->seqnum = psta->sta_xmitpriv.txseq_tid[pattrib->priority]; SetSeqNum(hdr, pattrib->seqnum); #ifdef CONFIG_80211N_HT //check if enable ampdu if(pattrib->ht_en && psta->htpriv.ampdu_enable) { if(psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority)) pattrib->ampdu_en = _TRUE; } //re-check if enable ampdu by BA_starting_seqctrl if(pattrib->ampdu_en == _TRUE) { u16 tx_seq; tx_seq = psta->BA_starting_seqctrl[pattrib->priority & 0x0f]; //check BA_starting_seqctrl if(SN_LESS(pattrib->seqnum, tx_seq)) { //DBG_871X("tx ampdu seqnum(%d) < tx_seq(%d)\n", pattrib->seqnum, tx_seq); pattrib->ampdu_en = _FALSE;//AGG BK } else if(SN_EQUAL(pattrib->seqnum, tx_seq)) { psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (tx_seq+1)&0xfff; pattrib->ampdu_en = _TRUE;//AGG EN } else { //DBG_871X("tx ampdu over run\n"); psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (pattrib->seqnum+1)&0xfff; pattrib->ampdu_en = _TRUE;//AGG EN } } #endif //CONFIG_80211N_HT } } } else { } exit: _func_exit_; return res; } s32 rtw_txframes_pending(_adapter *padapter) { struct xmit_priv *pxmitpriv = &padapter->xmitpriv; return ((_rtw_queue_empty(&pxmitpriv->be_pending) == _FALSE) || (_rtw_queue_empty(&pxmitpriv->bk_pending) == _FALSE) || (_rtw_queue_empty(&pxmitpriv->vi_pending) == _FALSE) || (_rtw_queue_empty(&pxmitpriv->vo_pending) == _FALSE)); } s32 rtw_txframes_sta_ac_pending(_adapter *padapter, struct pkt_attrib *pattrib) { struct sta_info *psta; struct tx_servq *ptxservq; int priority = pattrib->priority; /* if(pattrib->psta) { psta = pattrib->psta; } else { DBG_871X("%s, call rtw_get_stainfo()\n", __func__); psta=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0]); } */ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); if(pattrib->psta != psta) { DBG_871X("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pattrib->psta, psta); return 0; } if(psta==NULL) { DBG_871X("%s, psta==NUL\n", __func__); return 0; } if(!(psta->state &_FW_LINKED)) { DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); return 0; } switch(priority) { case 1: case 2: ptxservq = &(psta->sta_xmitpriv.bk_q); break; case 4: case 5: ptxservq = &(psta->sta_xmitpriv.vi_q); break; case 6: case 7: ptxservq = &(psta->sta_xmitpriv.vo_q); break; case 0: case 3: default: ptxservq = &(psta->sta_xmitpriv.be_q); break; } return ptxservq->qcnt; } #ifdef CONFIG_TDLS int rtw_build_tdls_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) { int res=_SUCCESS; switch(ptxmgmt->action_code){ case TDLS_SETUP_REQUEST: rtw_build_tdls_setup_req_ies(padapter, pxmitframe, pframe, ptxmgmt); break; case TDLS_SETUP_RESPONSE: rtw_build_tdls_setup_rsp_ies(padapter, pxmitframe, pframe, ptxmgmt); break; case TDLS_SETUP_CONFIRM: rtw_build_tdls_setup_cfm_ies(padapter, pxmitframe, pframe, ptxmgmt); break; case TDLS_TEARDOWN: rtw_build_tdls_teardown_ies(padapter, pxmitframe, pframe, ptxmgmt); break; case TDLS_DISCOVERY_REQUEST: rtw_build_tdls_dis_req_ies(padapter, pxmitframe, pframe, ptxmgmt); break; case TDLS_PEER_TRAFFIC_INDICATION: rtw_build_tdls_peer_traffic_indication_ies(padapter, pxmitframe, pframe); break; case TDLS_CHANNEL_SWITCH_REQUEST: rtw_build_tdls_ch_switch_req_ies(padapter, pxmitframe, pframe); break; case TDLS_CHANNEL_SWITCH_RESPONSE: rtw_build_tdls_ch_switch_rsp_ies(padapter, pxmitframe, pframe); break; case TDLS_PEER_TRAFFIC_RESPONSE: rtw_build_tdls_peer_traffic_rsp_ies(padapter, pxmitframe, pframe); break; #ifdef CONFIG_WFD case TUNNELED_PROBE_REQ: rtw_build_tunneled_probe_req_ies(padapter, pxmitframe, pframe); break; case TUNNELED_PROBE_RSP: rtw_build_tunneled_probe_rsp_ies(padapter, pxmitframe, pframe); break; #endif //CONFIG_WFD default: res=_FAIL; break; } return res; } s32 rtw_make_tdls_wlanhdr (_adapter *padapter , u8 *hdr, struct pkt_attrib *pattrib, struct tdls_txmgmt *ptxmgmt) { u16 *qc; struct rtw_ieee80211_hdr *pwlanhdr = (struct rtw_ieee80211_hdr *)hdr; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct qos_priv *pqospriv = &pmlmepriv->qospriv; struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info *psta=NULL, *ptdls_sta=NULL; u8 tdls_seq=0, baddr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; sint res = _SUCCESS; u16 *fctrl = &pwlanhdr->frame_ctl; _func_enter_; _rtw_memset(hdr, 0, WLANHDR_OFFSET); SetFrameSubType(fctrl, pattrib->subtype); switch(ptxmgmt->action_code){ case TDLS_SETUP_REQUEST: case TDLS_SETUP_RESPONSE: case TDLS_SETUP_CONFIRM: case TDLS_PEER_TRAFFIC_INDICATION: case TDLS_PEER_PSM_REQUEST: //directly to peer STA or via AP case TUNNELED_PROBE_REQ: case TUNNELED_PROBE_RSP: case TDLS_DISCOVERY_REQUEST: SetToDs(fctrl); _rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); break; case TDLS_CHANNEL_SWITCH_REQUEST: case TDLS_CHANNEL_SWITCH_RESPONSE: case TDLS_PEER_PSM_RESPONSE: case TDLS_PEER_TRAFFIC_RESPONSE: _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); tdls_seq=1; break; case TDLS_TEARDOWN: if(ptxmgmt->status_code == _RSON_TDLS_TEAR_UN_RSN_) { _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); tdls_seq=1; } else { SetToDs(fctrl); _rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); } break; } if (pattrib->encrypt) SetPrivacy(fctrl); if(ptxmgmt->action_code == TDLS_PEER_TRAFFIC_RESPONSE) { SetPwrMgt(fctrl); } if (pqospriv->qos_option) { qc = (unsigned short *)(hdr + pattrib->hdrlen - 2); if (pattrib->priority) SetPriority(qc, pattrib->priority); SetAckpolicy(qc, pattrib->ack_policy); } psta = pattrib->psta; // 1. update seq_num per link by sta_info // 2. rewrite encrypt to _AES_, also rewrite iv_len, icv_len if(tdls_seq==1){ ptdls_sta=rtw_get_stainfo(pstapriv, pattrib->dst); if(ptdls_sta){ ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority]++; ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF; pattrib->seqnum = ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority]; SetSeqNum(hdr, pattrib->seqnum); if (pattrib->encrypt){ pattrib->encrypt= _AES_; pattrib->iv_len=8; pattrib->icv_len=8; pattrib->bswenc = _FALSE; } pattrib->mac_id = ptdls_sta->mac_id; }else{ res=_FAIL; goto exit; } }else if(psta){ psta->sta_xmitpriv.txseq_tid[pattrib->priority]++; psta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF; pattrib->seqnum = psta->sta_xmitpriv.txseq_tid[pattrib->priority]; SetSeqNum(hdr, pattrib->seqnum); } exit: _func_exit_; return res; } s32 rtw_xmit_tdls_coalesce(_adapter * padapter, struct xmit_frame * pxmitframe, struct tdls_txmgmt *ptxmgmt) { s32 llc_sz; u8 *pframe, *mem_start; struct sta_info *psta; struct sta_priv *pstapriv = &padapter->stapriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct pkt_attrib *pattrib = &pxmitframe->attrib; u8 *pbuf_start; s32 bmcst = IS_MCAST(pattrib->ra); s32 res = _SUCCESS; _func_enter_; if (pattrib->psta) { psta = pattrib->psta; } else { if(bmcst) { psta = rtw_get_bcmc_stainfo(padapter); } else { psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); } } if(psta==NULL) return _FAIL; if (pxmitframe->buf_addr == NULL) return _FAIL; pbuf_start = pxmitframe->buf_addr; mem_start = pbuf_start + TXDESC_OFFSET; if (rtw_make_tdls_wlanhdr(padapter, mem_start, pattrib, ptxmgmt) == _FAIL) { res = _FAIL; goto exit; } pframe = mem_start; pframe += pattrib->hdrlen; //adding icv, if necessary... if (pattrib->iv_len) { if (psta != NULL) { switch(pattrib->encrypt) { case _WEP40_: case _WEP104_: WEP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); break; case _TKIP_: if(bmcst) TKIP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); else TKIP_IV(pattrib->iv, psta->dot11txpn, 0); break; case _AES_: if(bmcst) AES_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); else AES_IV(pattrib->iv, psta->dot11txpn, 0); break; } } _rtw_memcpy(pframe, pattrib->iv, pattrib->iv_len); pframe += pattrib->iv_len; } llc_sz = rtw_put_snap(pframe, pattrib->ether_type); pframe += llc_sz; //pattrib->pktlen will be counted in rtw_build_tdls_ies pattrib->pktlen = 0; rtw_build_tdls_ies(padapter, pxmitframe, pframe, ptxmgmt); if ((pattrib->icv_len >0 )&& (pattrib->bswenc)) { pframe += pattrib->pktlen; _rtw_memcpy(pframe, pattrib->icv, pattrib->icv_len); pframe += pattrib->icv_len; } pattrib->nr_frags = 1; pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->iv_len + llc_sz + ((pattrib->bswenc) ? pattrib->icv_len : 0) + pattrib->pktlen; if (xmitframe_addmic(padapter, pxmitframe) == _FAIL) { goto exit; } xmitframe_swencrypt(padapter, pxmitframe); update_attrib_vcs_info(padapter, pxmitframe); exit: _func_exit_; return res; } #endif //CONFIG_TDLS /* * Calculate wlan 802.11 packet MAX size from pkt_attrib * This function doesn't consider fragment case */ u32 rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib) { u32 len = 0; len = pattrib->hdrlen + pattrib->iv_len; // WLAN Header and IV len += SNAP_SIZE + sizeof(u16); // LLC len += pattrib->pktlen; if (pattrib->encrypt == _TKIP_) len += 8; // MIC len += ((pattrib->bswenc) ? pattrib->icv_len : 0); // ICV return len; } /* This sub-routine will perform all the following: 1. remove 802.3 header. 2. create wlan_header, based on the info in pxmitframe 3. append sta's iv/ext-iv 4. append LLC 5. move frag chunk from pframe to pxmitframe->mem 6. apply sw-encrypt, if necessary. */ s32 rtw_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe) { struct pkt_file pktfile; s32 frg_inx, frg_len, mpdu_len, llc_sz, mem_sz; SIZE_PTR addr; u8 *pframe, *mem_start; u8 hw_hdr_offset; //struct sta_info *psta; //struct sta_priv *pstapriv = &padapter->stapriv; //struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct pkt_attrib *pattrib = &pxmitframe->attrib; u8 *pbuf_start; s32 bmcst = IS_MCAST(pattrib->ra); s32 res = _SUCCESS; _func_enter_; /* if (pattrib->psta) { psta = pattrib->psta; } else { DBG_871X("%s, call rtw_get_stainfo()\n", __func__); psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); } if(psta==NULL) { DBG_871X("%s, psta==NUL\n", __func__); return _FAIL; } if(!(psta->state &_FW_LINKED)) { DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); return _FAIL; } */ if (pxmitframe->buf_addr == NULL){ DBG_8192C("==> %s buf_addr==NULL \n",__FUNCTION__); return _FAIL; } pbuf_start = pxmitframe->buf_addr; #ifdef CONFIG_USB_TX_AGGREGATION hw_hdr_offset = TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ); #else #ifdef CONFIG_TX_EARLY_MODE //for SDIO && Tx Agg hw_hdr_offset = TXDESC_OFFSET + EARLY_MODE_INFO_SIZE; #else hw_hdr_offset = TXDESC_OFFSET; #endif #endif mem_start = pbuf_start + hw_hdr_offset; if (rtw_make_wlanhdr(padapter, mem_start, pattrib) == _FAIL) { RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("rtw_xmitframe_coalesce: rtw_make_wlanhdr fail; drop pkt\n")); DBG_8192C("rtw_xmitframe_coalesce: rtw_make_wlanhdr fail; drop pkt\n"); res = _FAIL; goto exit; } _rtw_open_pktfile(pkt, &pktfile); _rtw_pktfile_read(&pktfile, NULL, pattrib->pkt_hdrlen); frg_inx = 0; frg_len = pxmitpriv->frag_len - 4;//2346-4 = 2342 while (1) { llc_sz = 0; mpdu_len = frg_len; pframe = mem_start; SetMFrag(mem_start); pframe += pattrib->hdrlen; mpdu_len -= pattrib->hdrlen; //adding icv, if necessary... if (pattrib->iv_len) { /* //if (check_fwstate(pmlmepriv, WIFI_MP_STATE)) // psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); //else // psta = rtw_get_stainfo(pstapriv, pattrib->ra); if (psta != NULL) { switch(pattrib->encrypt) { case _WEP40_: case _WEP104_: WEP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); break; case _TKIP_: if(bmcst) TKIP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); else TKIP_IV(pattrib->iv, psta->dot11txpn, 0); break; case _AES_: if(bmcst) AES_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); else AES_IV(pattrib->iv, psta->dot11txpn, 0); break; #ifdef CONFIG_WAPI_SUPPORT case _SMS4_: rtw_wapi_get_iv(padapter,pattrib->ra,pattrib->iv); break; #endif } } */ _rtw_memcpy(pframe, pattrib->iv, pattrib->iv_len); RT_TRACE(_module_rtl871x_xmit_c_, _drv_notice_, ("rtw_xmitframe_coalesce: keyid=%d pattrib->iv[3]=%.2x pframe=%.2x %.2x %.2x %.2x\n", padapter->securitypriv.dot11PrivacyKeyIndex, pattrib->iv[3], *pframe, *(pframe+1), *(pframe+2), *(pframe+3))); pframe += pattrib->iv_len; mpdu_len -= pattrib->iv_len; } if (frg_inx == 0) { llc_sz = rtw_put_snap(pframe, pattrib->ether_type); pframe += llc_sz; mpdu_len -= llc_sz; } if ((pattrib->icv_len >0) && (pattrib->bswenc)) { mpdu_len -= pattrib->icv_len; } if (bmcst) { // don't do fragment to broadcat/multicast packets mem_sz = _rtw_pktfile_read(&pktfile, pframe, pattrib->pktlen); } else { mem_sz = _rtw_pktfile_read(&pktfile, pframe, mpdu_len); } pframe += mem_sz; if ((pattrib->icv_len >0 )&& (pattrib->bswenc)) { _rtw_memcpy(pframe, pattrib->icv, pattrib->icv_len); pframe += pattrib->icv_len; } frg_inx++; if (bmcst || (rtw_endofpktfile(&pktfile) == _TRUE)) { pattrib->nr_frags = frg_inx; pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->iv_len + ((pattrib->nr_frags==1)? llc_sz:0) + ((pattrib->bswenc) ? pattrib->icv_len : 0) + mem_sz; ClearMFrag(mem_start); break; } else { RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("%s: There're still something in packet!\n", __FUNCTION__)); } addr = (SIZE_PTR)(pframe); mem_start = (unsigned char *)RND4(addr) + hw_hdr_offset; _rtw_memcpy(mem_start, pbuf_start + hw_hdr_offset, pattrib->hdrlen); } if (xmitframe_addmic(padapter, pxmitframe) == _FAIL) { RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("xmitframe_addmic(padapter, pxmitframe)==_FAIL\n")); DBG_8192C("xmitframe_addmic(padapter, pxmitframe)==_FAIL\n"); res = _FAIL; goto exit; } xmitframe_swencrypt(padapter, pxmitframe); if(bmcst == _FALSE) update_attrib_vcs_info(padapter, pxmitframe); else pattrib->vcs_mode = NONE_VCS; exit: _func_exit_; return res; } #ifdef CONFIG_IEEE80211W //broadcast or multicast management pkt use BIP, unicast management pkt use CCMP encryption s32 rtw_mgmt_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe) { struct pkt_file pktfile; s32 frg_inx, frg_len, mpdu_len, llc_sz, mem_sz; SIZE_PTR addr; u8 *pframe, *mem_start = NULL, *tmp_buf=NULL; u8 hw_hdr_offset, subtype ; struct sta_info *psta = NULL; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct pkt_attrib *pattrib = &pxmitframe->attrib; u8 *pbuf_start; s32 bmcst = IS_MCAST(pattrib->ra); s32 res = _FAIL; u8 *BIP_AAD=NULL; u8 *MGMT_body=NULL; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct rtw_ieee80211_hdr *pwlanhdr; u8 MME[_MME_IE_LENGTH_]; _irqL irqL; u32 ori_len; mem_start = pframe = (u8 *)(pxmitframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; _func_enter_; ori_len = BIP_AAD_SIZE+pattrib->pktlen; tmp_buf = BIP_AAD = rtw_zmalloc(ori_len); subtype = GetFrameSubType(pframe); //bit(7)~bit(2) if(BIP_AAD == NULL) return _FAIL; _enter_critical_bh(&padapter->security_key_mutex, &irqL); //only support station mode if(!check_fwstate(pmlmepriv, WIFI_STATION_STATE) || !check_fwstate(pmlmepriv, _FW_LINKED)) goto xmitframe_coalesce_success; //IGTK key is not install, it may not support 802.11w if(padapter->securitypriv.binstallBIPkey != _TRUE) { DBG_871X("no instll BIP key\n"); goto xmitframe_coalesce_success; } //station mode doesn't need TX BIP, just ready the code if(bmcst) { int frame_body_len; u8 mic[16]; _rtw_memset(MME, 0, _MME_IE_LENGTH_); //other types doesn't need the BIP if(GetFrameSubType(pframe) != WIFI_DEAUTH && GetFrameSubType(pframe) != WIFI_DISASSOC) goto xmitframe_coalesce_fail; MGMT_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); pframe += pattrib->pktlen; //octent 0 and 1 is key index ,BIP keyid is 4 or 5, LSB only need octent 0 MME[0]=padapter->securitypriv.dot11wBIPKeyid; //copy packet number _rtw_memcpy(&MME[2], &pmlmeext->mgnt_80211w_IPN, 6); //increase the packet number pmlmeext->mgnt_80211w_IPN++; //add MME IE with MIC all zero, MME string doesn't include element id and length pframe = rtw_set_ie(pframe, _MME_IE_ , 16 , MME, &(pattrib->pktlen)); pattrib->last_txcmdsz = pattrib->pktlen; // total frame length - header length frame_body_len = pattrib->pktlen - sizeof(struct rtw_ieee80211_hdr_3addr); //conscruct AAD, copy frame control field _rtw_memcpy(BIP_AAD, &pwlanhdr->frame_ctl, 2); ClearRetry(BIP_AAD); ClearPwrMgt(BIP_AAD); ClearMData(BIP_AAD); //conscruct AAD, copy address 1 to address 3 _rtw_memcpy(BIP_AAD+2, pwlanhdr->addr1, 18); //copy management fram body _rtw_memcpy(BIP_AAD+BIP_AAD_SIZE, MGMT_body, frame_body_len); /*//dump total packet include MME with zero MIC { int i; printk("Total packet: "); for(i=0; i < BIP_AAD_SIZE+frame_body_len; i++) printk(" %02x ", BIP_AAD[i]); printk("\n"); }*/ //calculate mic if(omac1_aes_128(padapter->securitypriv.dot11wBIPKey[padapter->securitypriv.dot11wBIPKeyid].skey , BIP_AAD, BIP_AAD_SIZE+frame_body_len, mic)) goto xmitframe_coalesce_fail; /*//dump calculated mic result { int i; printk("Calculated mic result: "); for(i=0; i<16; i++) printk(" %02x ", mic[i]); printk("\n"); }*/ //copy right BIP mic value, total is 128bits, we use the 0~63 bits _rtw_memcpy(pframe-8, mic, 8); /*/dump all packet after mic ok { int pp; printk("pattrib->pktlen = %d \n", pattrib->pktlen); for(pp=0;pp< pattrib->pktlen; pp++) printk(" %02x ", mem_start[pp]); printk("\n"); }*/ } else //unicast mgmt frame TX { //start to encrypt mgmt frame if(subtype == WIFI_DEAUTH || subtype == WIFI_DISASSOC || subtype == WIFI_REASSOCREQ || subtype == WIFI_ACTION) { if (pattrib->psta) psta = pattrib->psta; else { psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); } if(psta==NULL) { DBG_871X("%s, psta==NUL\n", __func__); goto xmitframe_coalesce_fail; } if(!(psta->state & _FW_LINKED) || pxmitframe->buf_addr==NULL) { DBG_871X("%s, not _FW_LINKED or addr null\n", __func__); goto xmitframe_coalesce_fail; } //DBG_871X("%s, action frame category=%d \n", __func__, pframe[WLAN_HDR_A3_LEN]); //according 802.11-2012 standard, these five types are not robust types if(subtype == WIFI_ACTION && (pframe[WLAN_HDR_A3_LEN] == RTW_WLAN_CATEGORY_PUBLIC || pframe[WLAN_HDR_A3_LEN] == RTW_WLAN_CATEGORY_HT || pframe[WLAN_HDR_A3_LEN] == RTW_WLAN_CATEGORY_UNPROTECTED_WNM || pframe[WLAN_HDR_A3_LEN] == RTW_WLAN_CATEGORY_SELF_PROTECTED || pframe[WLAN_HDR_A3_LEN] == RTW_WLAN_CATEGORY_P2P)) goto xmitframe_coalesce_fail; //before encrypt dump the management packet content /*{ int i; printk("Management pkt: "); for(i=0; ipktlen; i++) printk(" %02x ", pframe[i]); printk("=======\n"); }*/ if(pattrib->encrypt>0) _rtw_memcpy(pattrib->dot118021x_UncstKey.skey, psta->dot118021x_UncstKey.skey, 16); //bakeup original management packet _rtw_memcpy(tmp_buf, pframe, pattrib->pktlen); //move to data portion pframe += pattrib->hdrlen; //802.11w unicast management packet must be _AES_ pattrib->iv_len = 8; //it's MIC of AES pattrib->icv_len = 8; switch(pattrib->encrypt) { case _AES_: //set AES IV header AES_IV(pattrib->iv, psta->dot11wtxpn, 0); break; default: goto xmitframe_coalesce_fail; } //insert iv header into management frame _rtw_memcpy(pframe, pattrib->iv, pattrib->iv_len); pframe += pattrib->iv_len; //copy mgmt data portion after CCMP header _rtw_memcpy(pframe, tmp_buf+pattrib->hdrlen, pattrib->pktlen-pattrib->hdrlen); //move pframe to end of mgmt pkt pframe += pattrib->pktlen-pattrib->hdrlen; //add 8 bytes CCMP IV header to length pattrib->pktlen += pattrib->iv_len; /*//dump management packet include AES IV header { int i; printk("Management pkt + IV: "); //for(i=0; ipktlen; i++) //printk(" %02x ", mem_start[i]); printk("@@@@@@@@@@@@@\n"); }*/ if ((pattrib->icv_len >0 )&& (pattrib->bswenc)) { _rtw_memcpy(pframe, pattrib->icv, pattrib->icv_len); pframe += pattrib->icv_len; } //add 8 bytes MIC pattrib->pktlen += pattrib->icv_len; //set final tx command size pattrib->last_txcmdsz = pattrib->pktlen; //set protected bit must be beofre SW encrypt SetPrivacy(mem_start); /*//dump management packet include AES header { int i; printk("prepare to enc Management pkt + IV: "); for(i=0; ipktlen; i++) printk(" %02x ", mem_start[i]); printk("@@@@@@@@@@@@@\n"); }*/ //software encrypt xmitframe_swencrypt(padapter, pxmitframe); } } xmitframe_coalesce_success: _exit_critical_bh(&padapter->security_key_mutex, &irqL); rtw_mfree(BIP_AAD, ori_len); _func_exit_; return _SUCCESS; xmitframe_coalesce_fail: _exit_critical_bh(&padapter->security_key_mutex, &irqL); rtw_mfree(BIP_AAD, ori_len); _func_exit_; return _FAIL; } #endif //CONFIG_IEEE80211W /* Logical Link Control(LLC) SubNetwork Attachment Point(SNAP) header * IEEE LLC/SNAP header contains 8 octets * First 3 octets comprise the LLC portion * SNAP portion, 5 octets, is divided into two fields: * Organizationally Unique Identifier(OUI), 3 octets, * type, defined by that organization, 2 octets. */ s32 rtw_put_snap(u8 *data, u16 h_proto) { struct ieee80211_snap_hdr *snap; u8 *oui; _func_enter_; snap = (struct ieee80211_snap_hdr *)data; snap->dsap = 0xaa; snap->ssap = 0xaa; snap->ctrl = 0x03; if (h_proto == 0x8137 || h_proto == 0x80f3) oui = P802_1H_OUI; else oui = RFC1042_OUI; snap->oui[0] = oui[0]; snap->oui[1] = oui[1]; snap->oui[2] = oui[2]; *(u16 *)(data + SNAP_SIZE) = htons(h_proto); _func_exit_; return SNAP_SIZE + sizeof(u16); } void rtw_update_protection(_adapter *padapter, u8 *ie, uint ie_len) { uint protection; u8 *perp; sint erp_len; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct registry_priv *pregistrypriv = &padapter->registrypriv; _func_enter_; switch(pxmitpriv->vcs_setting) { case DISABLE_VCS: pxmitpriv->vcs = NONE_VCS; break; case ENABLE_VCS: break; case AUTO_VCS: default: perp = rtw_get_ie(ie, _ERPINFO_IE_, &erp_len, ie_len); if(perp == NULL) { pxmitpriv->vcs = NONE_VCS; } else { protection = (*(perp + 2)) & BIT(1); if (protection) { if(pregistrypriv->vcs_type == RTS_CTS) pxmitpriv->vcs = RTS_CTS; else pxmitpriv->vcs = CTS_TO_SELF; } else pxmitpriv->vcs = NONE_VCS; } break; } _func_exit_; } void rtw_count_tx_stats(PADAPTER padapter, struct xmit_frame *pxmitframe, int sz) { struct sta_info *psta = NULL; struct stainfo_stats *pstats = NULL; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; u8 pkt_num = 1; if ((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG) { #if defined(CONFIG_USB_TX_AGGREGATION) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) pkt_num = pxmitframe->agg_num; #endif pmlmepriv->LinkDetectInfo.NumTxOkInPeriod += pkt_num; pxmitpriv->tx_pkts += pkt_num; pxmitpriv->tx_bytes += sz; psta = pxmitframe->attrib.psta; if (psta) { pstats = &psta->sta_stats; pstats->tx_pkts += pkt_num; pstats->tx_bytes += sz; #ifdef CONFIG_TDLS if(pxmitframe->attrib.ptdls_sta != NULL) { pstats = &(pxmitframe->attrib.ptdls_sta->sta_stats); pstats->tx_pkts += pkt_num; pstats->tx_bytes += sz; } #endif //CONFIG_TDLS } #ifdef CONFIG_CHECK_LEAVE_LPS //traffic_check_for_leave_lps(padapter, _TRUE); #endif //CONFIG_LPS } } static struct xmit_buf *__rtw_alloc_cmd_xmitbuf(struct xmit_priv *pxmitpriv, enum cmdbuf_type buf_type) { struct xmit_buf *pxmitbuf = NULL; _func_enter_; pxmitbuf = &pxmitpriv->pcmd_xmitbuf[buf_type]; if (pxmitbuf != NULL) { pxmitbuf->priv_data = NULL; #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) pxmitbuf->len = 0; pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; pxmitbuf->agg_num = 0; pxmitbuf->pg_num = 0; #endif #ifdef CONFIG_PCI_HCI pxmitbuf->len = 0; pxmitbuf->desc = NULL; #endif if (pxmitbuf->sctx) { DBG_871X("%s pxmitbuf->sctx is not NULL\n", __func__); rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_ALLOC); } } else { DBG_871X("%s fail, no xmitbuf available !!!\n", __func__); } exit: _func_exit_; return pxmitbuf; } struct xmit_frame *__rtw_alloc_cmdxmitframe(struct xmit_priv *pxmitpriv, enum cmdbuf_type buf_type) { struct xmit_frame *pcmdframe; struct xmit_buf *pxmitbuf; if ((pcmdframe = rtw_alloc_xmitframe(pxmitpriv)) == NULL) { DBG_871X("%s, alloc xmitframe fail\n", __FUNCTION__); return NULL; } if ((pxmitbuf = __rtw_alloc_cmd_xmitbuf(pxmitpriv, buf_type)) == NULL) { DBG_871X("%s, alloc xmitbuf fail\n", __FUNCTION__); rtw_free_xmitframe(pxmitpriv, pcmdframe); return NULL; } pcmdframe->frame_tag = MGNT_FRAMETAG; pcmdframe->pxmitbuf = pxmitbuf; pcmdframe->buf_addr = pxmitbuf->pbuf; pxmitbuf->priv_data = pcmdframe; return pcmdframe; } struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv) { _irqL irqL; struct xmit_buf *pxmitbuf = NULL; _list *plist, *phead; _queue *pfree_queue = &pxmitpriv->free_xmit_extbuf_queue; _func_enter_; _enter_critical(&pfree_queue->lock, &irqL); if(_rtw_queue_empty(pfree_queue) == _TRUE) { pxmitbuf = NULL; } else { phead = get_list_head(pfree_queue); plist = get_next(phead); pxmitbuf = LIST_CONTAINOR(plist, struct xmit_buf, list); rtw_list_delete(&(pxmitbuf->list)); } if (pxmitbuf != NULL) { pxmitpriv->free_xmit_extbuf_cnt--; #ifdef DBG_XMIT_BUF_EXT DBG_871X("DBG_XMIT_BUF_EXT ALLOC no=%d, free_xmit_extbuf_cnt=%d\n",pxmitbuf->no, pxmitpriv->free_xmit_extbuf_cnt); #endif pxmitbuf->priv_data = NULL; #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) pxmitbuf->len = 0; pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; pxmitbuf->agg_num = 1; #endif #ifdef CONFIG_PCI_HCI pxmitbuf->len = 0; pxmitbuf->desc = NULL; #endif if (pxmitbuf->sctx) { DBG_871X("%s pxmitbuf->sctx is not NULL\n", __func__); rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_ALLOC); } } _exit_critical(&pfree_queue->lock, &irqL); _func_exit_; return pxmitbuf; } s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) { _irqL irqL; _queue *pfree_queue = &pxmitpriv->free_xmit_extbuf_queue; _func_enter_; if(pxmitbuf==NULL) { return _FAIL; } _enter_critical(&pfree_queue->lock, &irqL); rtw_list_delete(&pxmitbuf->list); rtw_list_insert_tail(&(pxmitbuf->list), get_list_head(pfree_queue)); pxmitpriv->free_xmit_extbuf_cnt++; #ifdef DBG_XMIT_BUF_EXT DBG_871X("DBG_XMIT_BUF_EXT FREE no=%d, free_xmit_extbuf_cnt=%d\n",pxmitbuf->no ,pxmitpriv->free_xmit_extbuf_cnt); #endif _exit_critical(&pfree_queue->lock, &irqL); _func_exit_; return _SUCCESS; } struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv) { _irqL irqL; struct xmit_buf *pxmitbuf = NULL; _list *plist, *phead; _queue *pfree_xmitbuf_queue = &pxmitpriv->free_xmitbuf_queue; _func_enter_; //DBG_871X("+rtw_alloc_xmitbuf\n"); _enter_critical(&pfree_xmitbuf_queue->lock, &irqL); if(_rtw_queue_empty(pfree_xmitbuf_queue) == _TRUE) { pxmitbuf = NULL; } else { phead = get_list_head(pfree_xmitbuf_queue); plist = get_next(phead); pxmitbuf = LIST_CONTAINOR(plist, struct xmit_buf, list); rtw_list_delete(&(pxmitbuf->list)); } if (pxmitbuf != NULL) { pxmitpriv->free_xmitbuf_cnt--; #ifdef DBG_XMIT_BUF DBG_871X("DBG_XMIT_BUF ALLOC no=%d, free_xmitbuf_cnt=%d\n",pxmitbuf->no, pxmitpriv->free_xmitbuf_cnt); #endif //DBG_871X("alloc, free_xmitbuf_cnt=%d\n", pxmitpriv->free_xmitbuf_cnt); pxmitbuf->priv_data = NULL; #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) pxmitbuf->len = 0; pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; pxmitbuf->agg_num = 0; pxmitbuf->pg_num = 0; #endif #ifdef CONFIG_PCI_HCI pxmitbuf->len = 0; pxmitbuf->desc = NULL; #endif if (pxmitbuf->sctx) { DBG_871X("%s pxmitbuf->sctx is not NULL\n", __func__); rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_ALLOC); } } #ifdef DBG_XMIT_BUF else { DBG_871X("DBG_XMIT_BUF rtw_alloc_xmitbuf return NULL\n"); } #endif _exit_critical(&pfree_xmitbuf_queue->lock, &irqL); _func_exit_; return pxmitbuf; } s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) { _irqL irqL; _queue *pfree_xmitbuf_queue = &pxmitpriv->free_xmitbuf_queue; _func_enter_; //DBG_871X("+rtw_free_xmitbuf\n"); if(pxmitbuf==NULL) { return _FAIL; } if (pxmitbuf->sctx) { DBG_871X("%s pxmitbuf->sctx is not NULL\n", __func__); rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_FREE); } if(pxmitbuf->buf_tag == XMITBUF_CMD) { } else if(pxmitbuf->buf_tag == XMITBUF_MGNT) { rtw_free_xmitbuf_ext(pxmitpriv, pxmitbuf); } else { _enter_critical(&pfree_xmitbuf_queue->lock, &irqL); rtw_list_delete(&pxmitbuf->list); rtw_list_insert_tail(&(pxmitbuf->list), get_list_head(pfree_xmitbuf_queue)); pxmitpriv->free_xmitbuf_cnt++; //DBG_871X("FREE, free_xmitbuf_cnt=%d\n", pxmitpriv->free_xmitbuf_cnt); #ifdef DBG_XMIT_BUF DBG_871X("DBG_XMIT_BUF FREE no=%d, free_xmitbuf_cnt=%d\n",pxmitbuf->no ,pxmitpriv->free_xmitbuf_cnt); #endif _exit_critical(&pfree_xmitbuf_queue->lock, &irqL); } _func_exit_; return _SUCCESS; } void rtw_init_xmitframe(struct xmit_frame *pxframe) { if (pxframe != NULL)//default value setting { pxframe->buf_addr = NULL; pxframe->pxmitbuf = NULL; _rtw_memset(&pxframe->attrib, 0, sizeof(struct pkt_attrib)); //pxframe->attrib.psta = NULL; pxframe->frame_tag = DATA_FRAMETAG; #ifdef CONFIG_USB_HCI pxframe->pkt = NULL; #ifdef USB_PACKET_OFFSET_SZ pxframe->pkt_offset = (PACKET_OFFSET_SZ/8); #else pxframe->pkt_offset = 1;//default use pkt_offset to fill tx desc #endif #ifdef CONFIG_USB_TX_AGGREGATION pxframe->agg_num = 1; #endif #endif //#ifdef CONFIG_USB_HCI #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) pxframe->pg_num = 1; pxframe->agg_num = 1; #endif #ifdef CONFIG_XMIT_ACK pxframe->ack_report = 0; #endif } } /* Calling context: 1. OS_TXENTRY 2. RXENTRY (rx_thread or RX_ISR/RX_CallBack) If we turn on USE_RXTHREAD, then, no need for critical section. Otherwise, we must use _enter/_exit critical to protect free_xmit_queue... Must be very very cautious... */ struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv)//(_queue *pfree_xmit_queue) { /* Please remember to use all the osdep_service api, and lock/unlock or _enter/_exit critical to protect pfree_xmit_queue */ _irqL irqL; struct xmit_frame *pxframe = NULL; _list *plist, *phead; _queue *pfree_xmit_queue = &pxmitpriv->free_xmit_queue; _func_enter_; _enter_critical_bh(&pfree_xmit_queue->lock, &irqL); if (_rtw_queue_empty(pfree_xmit_queue) == _TRUE) { RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_alloc_xmitframe:%d\n", pxmitpriv->free_xmitframe_cnt)); pxframe = NULL; } else { phead = get_list_head(pfree_xmit_queue); plist = get_next(phead); pxframe = LIST_CONTAINOR(plist, struct xmit_frame, list); rtw_list_delete(&(pxframe->list)); pxmitpriv->free_xmitframe_cnt--; RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_alloc_xmitframe():free_xmitframe_cnt=%d\n", pxmitpriv->free_xmitframe_cnt)); } _exit_critical_bh(&pfree_xmit_queue->lock, &irqL); rtw_init_xmitframe(pxframe); _func_exit_; return pxframe; } struct xmit_frame *rtw_alloc_xmitframe_ext(struct xmit_priv *pxmitpriv) { _irqL irqL; struct xmit_frame *pxframe = NULL; _list *plist, *phead; _queue *queue = &pxmitpriv->free_xframe_ext_queue; _func_enter_; _enter_critical_bh(&queue->lock, &irqL); if (_rtw_queue_empty(queue) == _TRUE) { RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_alloc_xmitframe_ext:%d\n", pxmitpriv->free_xframe_ext_cnt)); pxframe = NULL; } else { phead = get_list_head(queue); plist = get_next(phead); pxframe = LIST_CONTAINOR(plist, struct xmit_frame, list); rtw_list_delete(&(pxframe->list)); pxmitpriv->free_xframe_ext_cnt--; RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_alloc_xmitframe_ext():free_xmitframe_cnt=%d\n", pxmitpriv->free_xframe_ext_cnt)); } _exit_critical_bh(&queue->lock, &irqL); rtw_init_xmitframe(pxframe); _func_exit_; return pxframe; } struct xmit_frame *rtw_alloc_xmitframe_once(struct xmit_priv *pxmitpriv) { struct xmit_frame *pxframe = NULL; u8 *alloc_addr; alloc_addr = rtw_zmalloc(sizeof(struct xmit_frame) + 4); if (alloc_addr == NULL) goto exit; pxframe = (struct xmit_frame *)N_BYTE_ALIGMENT((SIZE_PTR)(alloc_addr), 4); pxframe->alloc_addr = alloc_addr; pxframe->padapter = pxmitpriv->adapter; pxframe->frame_tag = NULL_FRAMETAG; pxframe->pkt = NULL; pxframe->buf_addr = NULL; pxframe->pxmitbuf = NULL; rtw_init_xmitframe(pxframe); DBG_871X("################## %s ##################\n", __func__); exit: return pxframe; } s32 rtw_free_xmitframe(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe) { _irqL irqL; _queue *queue = NULL; _adapter *padapter = pxmitpriv->adapter; _pkt *pndis_pkt = NULL; _func_enter_; if (pxmitframe == NULL) { RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("======rtw_free_xmitframe():pxmitframe==NULL!!!!!!!!!!\n")); goto exit; } if (pxmitframe->pkt){ pndis_pkt = pxmitframe->pkt; pxmitframe->pkt = NULL; } if (pxmitframe->alloc_addr) { DBG_871X("################## %s with alloc_addr ##################\n", __func__); rtw_mfree(pxmitframe->alloc_addr, sizeof(struct xmit_frame) + 4); goto check_pkt_complete; } if (pxmitframe->ext_tag == 0) queue = &pxmitpriv->free_xmit_queue; else if(pxmitframe->ext_tag == 1) queue = &pxmitpriv->free_xframe_ext_queue; else rtw_warn_on(1); _enter_critical_bh(&queue->lock, &irqL); rtw_list_delete(&pxmitframe->list); rtw_list_insert_tail(&pxmitframe->list, get_list_head(queue)); if (pxmitframe->ext_tag == 0) { pxmitpriv->free_xmitframe_cnt++; RT_TRACE(_module_rtl871x_xmit_c_, _drv_debug_, ("rtw_free_xmitframe():free_xmitframe_cnt=%d\n", pxmitpriv->free_xmitframe_cnt)); } else if(pxmitframe->ext_tag == 1) { pxmitpriv->free_xframe_ext_cnt++; RT_TRACE(_module_rtl871x_xmit_c_, _drv_debug_, ("rtw_free_xmitframe():free_xframe_ext_cnt=%d\n", pxmitpriv->free_xframe_ext_cnt)); } else { } _exit_critical_bh(&queue->lock, &irqL); check_pkt_complete: if(pndis_pkt) rtw_os_pkt_complete(padapter, pndis_pkt); exit: _func_exit_; return _SUCCESS; } void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, _queue *pframequeue) { _irqL irqL; _list *plist, *phead; struct xmit_frame *pxmitframe; _func_enter_; _enter_critical_bh(&(pframequeue->lock), &irqL); phead = get_list_head(pframequeue); plist = get_next(phead); while (rtw_end_of_queue_search(phead, plist) == _FALSE) { pxmitframe = LIST_CONTAINOR(plist, struct xmit_frame, list); plist = get_next(plist); rtw_free_xmitframe(pxmitpriv,pxmitframe); } _exit_critical_bh(&(pframequeue->lock), &irqL); _func_exit_; } s32 rtw_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) { DBG_COUNTER(padapter->tx_logs.core_tx_enqueue); if (rtw_xmit_classifier(padapter, pxmitframe) == _FAIL) { RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("rtw_xmitframe_enqueue: drop xmit pkt for classifier fail\n")); // pxmitframe->pkt = NULL; return _FAIL; } return _SUCCESS; } static struct xmit_frame *dequeue_one_xmitframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit, struct tx_servq *ptxservq, _queue *pframe_queue) { _list *xmitframe_plist, *xmitframe_phead; struct xmit_frame *pxmitframe=NULL; xmitframe_phead = get_list_head(pframe_queue); xmitframe_plist = get_next(xmitframe_phead); while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); xmitframe_plist = get_next(xmitframe_plist); /*#ifdef RTK_DMP_PLATFORM #ifdef CONFIG_USB_TX_AGGREGATION if((ptxservq->qcnt>0) && (ptxservq->qcnt<=2)) { pxmitframe = NULL; tasklet_schedule(&pxmitpriv->xmit_tasklet); break; } #endif #endif*/ rtw_list_delete(&pxmitframe->list); ptxservq->qcnt--; //rtw_list_insert_tail(&pxmitframe->list, &phwxmit->pending); //ptxservq->qcnt--; break; //pxmitframe = NULL; } return pxmitframe; } struct xmit_frame* rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit_i, sint entry) { _irqL irqL0; _list *sta_plist, *sta_phead; struct hw_xmit *phwxmit; struct tx_servq *ptxservq = NULL; _queue *pframe_queue = NULL; struct xmit_frame *pxmitframe = NULL; _adapter *padapter = pxmitpriv->adapter; struct registry_priv *pregpriv = &padapter->registrypriv; int i, inx[4]; #ifdef CONFIG_USB_HCI // int j, tmp, acirp_cnt[4]; #endif _func_enter_; inx[0] = 0; inx[1] = 1; inx[2] = 2; inx[3] = 3; if(pregpriv->wifi_spec==1) { int j, tmp, acirp_cnt[4]; #if 0 if(flagswmm_para_seq[j]; #endif } _enter_critical_bh(&pxmitpriv->lock, &irqL0); for(i = 0; i < entry; i++) { phwxmit = phwxmit_i + inx[i]; //_enter_critical_ex(&phwxmit->sta_queue->lock, &irqL0); sta_phead = get_list_head(phwxmit->sta_queue); sta_plist = get_next(sta_phead); while ((rtw_end_of_queue_search(sta_phead, sta_plist)) == _FALSE) { ptxservq= LIST_CONTAINOR(sta_plist, struct tx_servq, tx_pending); pframe_queue = &ptxservq->sta_pending; pxmitframe = dequeue_one_xmitframe(pxmitpriv, phwxmit, ptxservq, pframe_queue); if(pxmitframe) { phwxmit->accnt--; //Remove sta node when there is no pending packets. if(_rtw_queue_empty(pframe_queue)) //must be done after get_next and before break rtw_list_delete(&ptxservq->tx_pending); //_exit_critical_ex(&phwxmit->sta_queue->lock, &irqL0); goto exit; } sta_plist = get_next(sta_plist); } //_exit_critical_ex(&phwxmit->sta_queue->lock, &irqL0); } exit: _exit_critical_bh(&pxmitpriv->lock, &irqL0); _func_exit_; return pxmitframe; } #if 1 struct tx_servq *rtw_get_sta_pending(_adapter *padapter, struct sta_info *psta, sint up, u8 *ac) { struct tx_servq *ptxservq=NULL; _func_enter_; switch (up) { case 1: case 2: ptxservq = &(psta->sta_xmitpriv.bk_q); *(ac) = 3; RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : BK \n")); break; case 4: case 5: ptxservq = &(psta->sta_xmitpriv.vi_q); *(ac) = 1; RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : VI\n")); break; case 6: case 7: ptxservq = &(psta->sta_xmitpriv.vo_q); *(ac) = 0; RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : VO \n")); break; case 0: case 3: default: ptxservq = &(psta->sta_xmitpriv.be_q); *(ac) = 2; RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : BE \n")); break; } _func_exit_; return ptxservq; } #else __inline static struct tx_servq *rtw_get_sta_pending (_adapter *padapter, _queue **ppstapending, struct sta_info *psta, sint up) { struct tx_servq *ptxservq; struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits; _func_enter_; #ifdef CONFIG_RTL8711 if(IS_MCAST(psta->hwaddr)) { ptxservq = &(psta->sta_xmitpriv.be_q); // we will use be_q to queue bc/mc frames in BCMC_stainfo *ppstapending = &padapter->xmitpriv.bm_pending; } else #endif { switch (up) { case 1: case 2: ptxservq = &(psta->sta_xmitpriv.bk_q); *ppstapending = &padapter->xmitpriv.bk_pending; (phwxmits+3)->accnt++; RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : BK \n")); break; case 4: case 5: ptxservq = &(psta->sta_xmitpriv.vi_q); *ppstapending = &padapter->xmitpriv.vi_pending; (phwxmits+1)->accnt++; RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : VI\n")); break; case 6: case 7: ptxservq = &(psta->sta_xmitpriv.vo_q); *ppstapending = &padapter->xmitpriv.vo_pending; (phwxmits+0)->accnt++; RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : VO \n")); break; case 0: case 3: default: ptxservq = &(psta->sta_xmitpriv.be_q); *ppstapending = &padapter->xmitpriv.be_pending; (phwxmits+2)->accnt++; RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : BE \n")); break; } } _func_exit_; return ptxservq; } #endif /* * Will enqueue pxmitframe to the proper queue, * and indicate it to xx_pending list..... */ s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe) { //_irqL irqL0; u8 ac_index; struct sta_info *psta; struct tx_servq *ptxservq; struct pkt_attrib *pattrib = &pxmitframe->attrib; struct sta_priv *pstapriv = &padapter->stapriv; struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits; sint res = _SUCCESS; _func_enter_; DBG_COUNTER(padapter->tx_logs.core_tx_enqueue_class); /* if (pattrib->psta) { psta = pattrib->psta; } else { DBG_871X("%s, call rtw_get_stainfo()\n", __func__); psta = rtw_get_stainfo(pstapriv, pattrib->ra); } */ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); if(pattrib->psta != psta) { DBG_COUNTER(padapter->tx_logs.core_tx_enqueue_class_err_sta); DBG_871X("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pattrib->psta, psta); return _FAIL; } if (psta == NULL) { DBG_COUNTER(padapter->tx_logs.core_tx_enqueue_class_err_nosta); res = _FAIL; DBG_8192C("rtw_xmit_classifier: psta == NULL\n"); RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("rtw_xmit_classifier: psta == NULL\n")); goto exit; } if(!(psta->state &_FW_LINKED)) { DBG_COUNTER(padapter->tx_logs.core_tx_enqueue_class_err_fwlink); DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); return _FAIL; } ptxservq = rtw_get_sta_pending(padapter, psta, pattrib->priority, (u8 *)(&ac_index)); //_enter_critical(&pstapending->lock, &irqL0); if (rtw_is_list_empty(&ptxservq->tx_pending)) { rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(phwxmits[ac_index].sta_queue)); } //_enter_critical(&ptxservq->sta_pending.lock, &irqL1); rtw_list_insert_tail(&pxmitframe->list, get_list_head(&ptxservq->sta_pending)); ptxservq->qcnt++; phwxmits[ac_index].accnt++; //_exit_critical(&ptxservq->sta_pending.lock, &irqL1); //_exit_critical(&pstapending->lock, &irqL0); exit: _func_exit_; return res; } void rtw_alloc_hwxmits(_adapter *padapter) { struct hw_xmit *hwxmits; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; pxmitpriv->hwxmit_entry = HWXMIT_ENTRY; pxmitpriv->hwxmits = NULL; pxmitpriv->hwxmits = (struct hw_xmit *)rtw_zmalloc(sizeof (struct hw_xmit) * pxmitpriv->hwxmit_entry); if(pxmitpriv->hwxmits == NULL) { DBG_871X("alloc hwxmits fail!...\n"); return; } hwxmits = pxmitpriv->hwxmits; if(pxmitpriv->hwxmit_entry == 5) { //pxmitpriv->bmc_txqueue.head = 0; //hwxmits[0] .phwtxqueue = &pxmitpriv->bmc_txqueue; hwxmits[0] .sta_queue = &pxmitpriv->bm_pending; //pxmitpriv->vo_txqueue.head = 0; //hwxmits[1] .phwtxqueue = &pxmitpriv->vo_txqueue; hwxmits[1] .sta_queue = &pxmitpriv->vo_pending; //pxmitpriv->vi_txqueue.head = 0; //hwxmits[2] .phwtxqueue = &pxmitpriv->vi_txqueue; hwxmits[2] .sta_queue = &pxmitpriv->vi_pending; //pxmitpriv->bk_txqueue.head = 0; //hwxmits[3] .phwtxqueue = &pxmitpriv->bk_txqueue; hwxmits[3] .sta_queue = &pxmitpriv->bk_pending; //pxmitpriv->be_txqueue.head = 0; //hwxmits[4] .phwtxqueue = &pxmitpriv->be_txqueue; hwxmits[4] .sta_queue = &pxmitpriv->be_pending; } else if(pxmitpriv->hwxmit_entry == 4) { //pxmitpriv->vo_txqueue.head = 0; //hwxmits[0] .phwtxqueue = &pxmitpriv->vo_txqueue; hwxmits[0] .sta_queue = &pxmitpriv->vo_pending; //pxmitpriv->vi_txqueue.head = 0; //hwxmits[1] .phwtxqueue = &pxmitpriv->vi_txqueue; hwxmits[1] .sta_queue = &pxmitpriv->vi_pending; //pxmitpriv->be_txqueue.head = 0; //hwxmits[2] .phwtxqueue = &pxmitpriv->be_txqueue; hwxmits[2] .sta_queue = &pxmitpriv->be_pending; //pxmitpriv->bk_txqueue.head = 0; //hwxmits[3] .phwtxqueue = &pxmitpriv->bk_txqueue; hwxmits[3] .sta_queue = &pxmitpriv->bk_pending; } else { } } void rtw_free_hwxmits(_adapter *padapter) { struct hw_xmit *hwxmits; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; hwxmits = pxmitpriv->hwxmits; if(hwxmits) rtw_mfree((u8 *)hwxmits, (sizeof (struct hw_xmit) * pxmitpriv->hwxmit_entry)); } void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry) { sint i; _func_enter_; for(i = 0; i < entry; i++, phwxmit++) { //_rtw_spinlock_init(&phwxmit->xmit_lock); //_rtw_init_listhead(&phwxmit->pending); //phwxmit->txcmdcnt = 0; phwxmit->accnt = 0; } _func_exit_; } #ifdef CONFIG_BR_EXT int rtw_br_client_tx(_adapter *padapter, struct sk_buff **pskb) { struct sk_buff *skb = *pskb; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; _irqL irqL; //if(check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) { void dhcp_flag_bcast(_adapter *priv, struct sk_buff *skb); int res, is_vlan_tag=0, i, do_nat25=1; unsigned short vlan_hdr=0; void *br_port = NULL; //mac_clone_handle_frame(priv, skb); #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) br_port = padapter->pnetdev->br_port; #else // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) rcu_read_lock(); br_port = rcu_dereference(padapter->pnetdev->rx_handler_data); rcu_read_unlock(); #endif // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) _enter_critical_bh(&padapter->br_ext_lock, &irqL); if ( !(skb->data[0] & 1) && br_port && memcmp(skb->data+MACADDRLEN, padapter->br_mac, MACADDRLEN) && *((unsigned short *)(skb->data+MACADDRLEN*2)) != __constant_htons(ETH_P_8021Q) && *((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_IP) && !memcmp(padapter->scdb_mac, skb->data+MACADDRLEN, MACADDRLEN) && padapter->scdb_entry) { memcpy(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN); padapter->scdb_entry->ageing_timer = jiffies; _exit_critical_bh(&padapter->br_ext_lock, &irqL); } else //if (!priv->pmib->ethBrExtInfo.nat25_disable) { // if (priv->dev->br_port && // !memcmp(skb->data+MACADDRLEN, priv->br_mac, MACADDRLEN)) { #if 1 if (*((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_8021Q)) { is_vlan_tag = 1; vlan_hdr = *((unsigned short *)(skb->data+MACADDRLEN*2+2)); for (i=0; i<6; i++) *((unsigned short *)(skb->data+MACADDRLEN*2+2-i*2)) = *((unsigned short *)(skb->data+MACADDRLEN*2-2-i*2)); skb_pull(skb, 4); } //if SA == br_mac && skb== IP => copy SIP to br_ip ?? why if (!memcmp(skb->data+MACADDRLEN, padapter->br_mac, MACADDRLEN) && (*((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_IP))) memcpy(padapter->br_ip, skb->data+WLAN_ETHHDR_LEN+12, 4); if (*((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_IP)) { if (memcmp(padapter->scdb_mac, skb->data+MACADDRLEN, MACADDRLEN)) { void *scdb_findEntry(_adapter *priv, unsigned char *macAddr, unsigned char *ipAddr); if ((padapter->scdb_entry = (struct nat25_network_db_entry *)scdb_findEntry(padapter, skb->data+MACADDRLEN, skb->data+WLAN_ETHHDR_LEN+12)) != NULL) { memcpy(padapter->scdb_mac, skb->data+MACADDRLEN, MACADDRLEN); memcpy(padapter->scdb_ip, skb->data+WLAN_ETHHDR_LEN+12, 4); padapter->scdb_entry->ageing_timer = jiffies; do_nat25 = 0; } } else { if (padapter->scdb_entry) { padapter->scdb_entry->ageing_timer = jiffies; do_nat25 = 0; } else { memset(padapter->scdb_mac, 0, MACADDRLEN); memset(padapter->scdb_ip, 0, 4); } } } _exit_critical_bh(&padapter->br_ext_lock, &irqL); #endif // 1 if (do_nat25) { int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method); if (nat25_db_handle(padapter, skb, NAT25_CHECK) == 0) { struct sk_buff *newskb; if (is_vlan_tag) { skb_push(skb, 4); for (i=0; i<6; i++) *((unsigned short *)(skb->data+i*2)) = *((unsigned short *)(skb->data+4+i*2)); *((unsigned short *)(skb->data+MACADDRLEN*2)) = __constant_htons(ETH_P_8021Q); *((unsigned short *)(skb->data+MACADDRLEN*2+2)) = vlan_hdr; } newskb = rtw_skb_copy(skb); if (newskb == NULL) { //priv->ext_stats.tx_drops++; DEBUG_ERR("TX DROP: rtw_skb_copy fail!\n"); //goto stop_proc; return -1; } rtw_skb_free(skb); *pskb = skb = newskb; if (is_vlan_tag) { vlan_hdr = *((unsigned short *)(skb->data+MACADDRLEN*2+2)); for (i=0; i<6; i++) *((unsigned short *)(skb->data+MACADDRLEN*2+2-i*2)) = *((unsigned short *)(skb->data+MACADDRLEN*2-2-i*2)); skb_pull(skb, 4); } } if (skb_is_nonlinear(skb)) DEBUG_ERR("%s(): skb_is_nonlinear!!\n", __FUNCTION__); #if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) res = skb_linearize(skb, GFP_ATOMIC); #else // (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) res = skb_linearize(skb); #endif // (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) if (res < 0) { DEBUG_ERR("TX DROP: skb_linearize fail!\n"); //goto free_and_stop; return -1; } res = nat25_db_handle(padapter, skb, NAT25_INSERT); if (res < 0) { if (res == -2) { //priv->ext_stats.tx_drops++; DEBUG_ERR("TX DROP: nat25_db_handle fail!\n"); //goto free_and_stop; return -1; } // we just print warning message and let it go //DEBUG_WARN("%s()-%d: nat25_db_handle INSERT Warning!\n", __FUNCTION__, __LINE__); //return -1; // return -1 will cause system crash on 2011/08/30! return 0; } } memcpy(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN); dhcp_flag_bcast(padapter, skb); if (is_vlan_tag) { skb_push(skb, 4); for (i=0; i<6; i++) *((unsigned short *)(skb->data+i*2)) = *((unsigned short *)(skb->data+4+i*2)); *((unsigned short *)(skb->data+MACADDRLEN*2)) = __constant_htons(ETH_P_8021Q); *((unsigned short *)(skb->data+MACADDRLEN*2+2)) = vlan_hdr; } } #if 0 else{ if (*((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_8021Q)) { is_vlan_tag = 1; } if(is_vlan_tag){ if(ICMPV6_MCAST_MAC(skb->data) && ICMPV6_PROTO1A_VALN(skb->data)){ memcpy(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN); } }else { if(ICMPV6_MCAST_MAC(skb->data) && ICMPV6_PROTO1A(skb->data)){ memcpy(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN); } } } #endif // 0 // check if SA is equal to our MAC if (memcmp(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN)) { //priv->ext_stats.tx_drops++; DEBUG_ERR("TX DROP: untransformed frame SA:%02X%02X%02X%02X%02X%02X!\n", skb->data[6],skb->data[7],skb->data[8],skb->data[9],skb->data[10],skb->data[11]); //goto free_and_stop; return -1; } } return 0; } #endif // CONFIG_BR_EXT u32 rtw_get_ff_hwaddr(struct xmit_frame *pxmitframe) { u32 addr; struct pkt_attrib *pattrib = &pxmitframe->attrib; switch(pattrib->qsel) { case 0: case 3: addr = BE_QUEUE_INX; break; case 1: case 2: addr = BK_QUEUE_INX; break; case 4: case 5: addr = VI_QUEUE_INX; break; case 6: case 7: addr = VO_QUEUE_INX; break; case 0x10: addr = BCN_QUEUE_INX; break; case 0x11://BC/MC in PS (HIQ) addr = HIGH_QUEUE_INX; break; case 0x12: default: addr = MGT_QUEUE_INX; break; } return addr; } static void do_queue_select(_adapter *padapter, struct pkt_attrib *pattrib) { u8 qsel; qsel = pattrib->priority; RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("### do_queue_select priority=%d ,qsel = %d\n",pattrib->priority ,qsel)); #ifdef CONFIG_CONCURRENT_MODE // if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) // qsel = 7;// #endif pattrib->qsel = qsel; } /* * The main transmit(tx) entry * * Return * 1 enqueue * 0 success, hardware will handle this xmit frame(packet) * <0 fail */ s32 rtw_xmit(_adapter *padapter, _pkt **ppkt) { static u32 start = 0; static u32 drop_cnt = 0; #ifdef CONFIG_AP_MODE _irqL irqL0; #endif struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct xmit_frame *pxmitframe = NULL; #ifdef CONFIG_BR_EXT struct mlme_priv *pmlmepriv = &padapter->mlmepriv; void *br_port = NULL; #endif // CONFIG_BR_EXT s32 res; DBG_COUNTER(padapter->tx_logs.core_tx); if (start == 0) start = rtw_get_current_time(); pxmitframe = rtw_alloc_xmitframe(pxmitpriv); if (rtw_get_passing_time_ms(start) > 2000) { if (drop_cnt) DBG_871X("DBG_TX_DROP_FRAME %s no more pxmitframe, drop_cnt:%u\n", __FUNCTION__, drop_cnt); start = rtw_get_current_time(); drop_cnt = 0; } if (pxmitframe == NULL) { drop_cnt ++; RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("rtw_xmit: no more pxmitframe\n")); DBG_COUNTER(padapter->tx_logs.core_tx_err_pxmitframe); return -1; } #ifdef CONFIG_BR_EXT #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) br_port = padapter->pnetdev->br_port; #else // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) rcu_read_lock(); br_port = rcu_dereference(padapter->pnetdev->rx_handler_data); rcu_read_unlock(); #endif // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) if( br_port && check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) { res = rtw_br_client_tx(padapter, ppkt); if (res == -1) { rtw_free_xmitframe(pxmitpriv, pxmitframe); DBG_COUNTER(padapter->tx_logs.core_tx_err_brtx); return -1; } } #endif // CONFIG_BR_EXT res = update_attrib(padapter, *ppkt, &pxmitframe->attrib); #ifdef CONFIG_WAPI_SUPPORT if(pxmitframe->attrib.ether_type != 0x88B4) { if(rtw_wapi_drop_for_key_absent(padapter, pxmitframe->attrib.ra)) { WAPI_TRACE(WAPI_RX,"drop for key absend when tx \n"); res = _FAIL; } } #endif if (res == _FAIL) { RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("rtw_xmit: update attrib fail\n")); #ifdef DBG_TX_DROP_FRAME DBG_871X("DBG_TX_DROP_FRAME %s update attrib fail\n", __FUNCTION__); #endif rtw_free_xmitframe(pxmitpriv, pxmitframe); return -1; } pxmitframe->pkt = *ppkt; rtw_led_control(padapter, LED_CTL_TX); do_queue_select(padapter, &pxmitframe->attrib); #ifdef CONFIG_AP_MODE _enter_critical_bh(&pxmitpriv->lock, &irqL0); if(xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe) == _TRUE) { _exit_critical_bh(&pxmitpriv->lock, &irqL0); DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue); return 1; } _exit_critical_bh(&pxmitpriv->lock, &irqL0); #endif //pre_xmitframe if (rtw_hal_xmit(padapter, pxmitframe) == _FALSE) return 1; return 0; } #ifdef CONFIG_TDLS sint xmitframe_enqueue_for_tdls_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe) { sint ret=_FALSE; _irqL irqL; struct sta_info *ptdls_sta=NULL; struct sta_priv *pstapriv = &padapter->stapriv; struct pkt_attrib *pattrib = &pxmitframe->attrib; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); int i; ptdls_sta=rtw_get_stainfo(pstapriv, pattrib->dst); if(ptdls_sta==NULL){ return ret; }else if(ptdls_sta->tdls_sta_state&TDLS_LINKED_STATE){ if(pattrib->triggered==1) { ret = _TRUE; return ret; } _enter_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); if(ptdls_sta->state&WIFI_SLEEP_STATE) { rtw_list_delete(&pxmitframe->list); //_enter_critical_bh(&psta->sleep_q.lock, &irqL); rtw_list_insert_tail(&pxmitframe->list, get_list_head(&ptdls_sta->sleep_q)); ptdls_sta->sleepq_len++; ptdls_sta->sleepq_ac_len++; //indicate 4-AC queue bit in TDLS peer traffic indication switch(pattrib->priority) { case 1: case 2: ptdls_sta->uapsd_bk |= BIT(1); break; case 4: case 5: ptdls_sta->uapsd_vi |= BIT(1); break; case 6: case 7: ptdls_sta->uapsd_vo |= BIT(1); break; case 0: case 3: default: ptdls_sta->uapsd_be |= BIT(1); break; } if(ptdls_sta->sleepq_len==1) { //transmit TDLS PTI via AP rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_SD_PTI); } ret = _TRUE; } _exit_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); } return ret; } #endif //CONFIG_TDLS #define RTW_HIQ_FILTER_ALLOW_ALL 0 #define RTW_HIQ_FILTER_ALLOW_SPECIAL 1 #define RTW_HIQ_FILTER_DENY_ALL 2 inline bool xmitframe_hiq_filter(struct xmit_frame *xmitframe) { bool allow = _FALSE; _adapter *adapter = xmitframe->padapter; struct registry_priv *registry = &adapter->registrypriv; if (adapter->interface_type != RTW_PCIE) { if (registry->hiq_filter == RTW_HIQ_FILTER_ALLOW_SPECIAL) { struct pkt_attrib *attrib = &xmitframe->attrib; if (attrib->ether_type == 0x0806 || attrib->ether_type == 0x888e #ifdef CONFIG_WAPI_SUPPORT || attrib->ether_type == 0x88B4 #endif || attrib->dhcp_pkt ) { if (0) DBG_871X(FUNC_ADPT_FMT" ether_type:0x%04x%s\n", FUNC_ADPT_ARG(xmitframe->padapter) , attrib->ether_type, attrib->dhcp_pkt?" DHCP":""); allow = _TRUE; } } else if (registry->hiq_filter == RTW_HIQ_FILTER_ALLOW_ALL) { allow = _TRUE; } else if (registry->hiq_filter == RTW_HIQ_FILTER_DENY_ALL) { } else { rtw_warn_on(1); } } return allow; } #if defined(CONFIG_AP_MODE) || defined(CONFIG_TDLS) sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe) { _irqL irqL; sint ret=_FALSE; struct sta_info *psta=NULL; struct sta_priv *pstapriv = &padapter->stapriv; struct pkt_attrib *pattrib = &pxmitframe->attrib; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; sint bmcst = IS_MCAST(pattrib->ra); bool update_tim = _FALSE; #ifdef CONFIG_TDLS if( padapter->tdlsinfo.link_established == _TRUE ) { ret = xmitframe_enqueue_for_tdls_sleeping_sta(padapter, pxmitframe); } #endif //CONFIG_TDLS if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _FALSE) { DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_warn_fwstate); return ret; } /* if(pattrib->psta) { psta = pattrib->psta; } else { DBG_871X("%s, call rtw_get_stainfo()\n", __func__); psta=rtw_get_stainfo(pstapriv, pattrib->ra); } */ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); if(pattrib->psta != psta) { DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_warn_sta); DBG_871X("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pattrib->psta, psta); return _FALSE; } if(psta==NULL) { DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_warn_nosta); DBG_871X("%s, psta==NUL\n", __func__); return _FALSE; } if(!(psta->state &_FW_LINKED)) { DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_warn_link); DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); return _FALSE; } if(pattrib->triggered==1) { DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_warn_trigger); //DBG_871X("directly xmit pspoll_triggered packet\n"); //pattrib->triggered=0; if (bmcst && xmitframe_hiq_filter(pxmitframe) == _TRUE) pattrib->qsel = QSLT_HIGH;//HIQ return ret; } if(bmcst) { _enter_critical_bh(&psta->sleep_q.lock, &irqL); if(pstapriv->sta_dz_bitmap)//if anyone sta is in ps mode { //pattrib->qsel = QSLT_HIGH;//HIQ rtw_list_delete(&pxmitframe->list); //_enter_critical_bh(&psta->sleep_q.lock, &irqL); rtw_list_insert_tail(&pxmitframe->list, get_list_head(&psta->sleep_q)); psta->sleepq_len++; if (!(pstapriv->tim_bitmap & BIT(0))) update_tim = _TRUE; pstapriv->tim_bitmap |= BIT(0);// pstapriv->sta_dz_bitmap |= BIT(0); //DBG_871X("enqueue, sq_len=%d, tim=%x\n", psta->sleepq_len, pstapriv->tim_bitmap); if (update_tim == _TRUE) { if (is_broadcast_mac_addr(pattrib->ra)) _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "buffer BC"); else _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "buffer MC"); } else { chk_bmc_sleepq_cmd(padapter); } //_exit_critical_bh(&psta->sleep_q.lock, &irqL); ret = _TRUE; DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_mcast); } _exit_critical_bh(&psta->sleep_q.lock, &irqL); return ret; } _enter_critical_bh(&psta->sleep_q.lock, &irqL); if(psta->state&WIFI_SLEEP_STATE) { u8 wmmps_ac=0; if(pstapriv->sta_dz_bitmap&BIT(psta->aid)) { rtw_list_delete(&pxmitframe->list); //_enter_critical_bh(&psta->sleep_q.lock, &irqL); rtw_list_insert_tail(&pxmitframe->list, get_list_head(&psta->sleep_q)); psta->sleepq_len++; switch(pattrib->priority) { case 1: case 2: wmmps_ac = psta->uapsd_bk&BIT(0); break; case 4: case 5: wmmps_ac = psta->uapsd_vi&BIT(0); break; case 6: case 7: wmmps_ac = psta->uapsd_vo&BIT(0); break; case 0: case 3: default: wmmps_ac = psta->uapsd_be&BIT(0); break; } if(wmmps_ac) psta->sleepq_ac_len++; if(((psta->has_legacy_ac) && (!wmmps_ac)) ||((!psta->has_legacy_ac)&&(wmmps_ac))) { if (!(pstapriv->tim_bitmap & BIT(psta->aid))) update_tim = _TRUE; pstapriv->tim_bitmap |= BIT(psta->aid); //DBG_871X("enqueue, sq_len=%d, tim=%x\n", psta->sleepq_len, pstapriv->tim_bitmap); if(update_tim == _TRUE) { //DBG_871X("sleepq_len==1, update BCNTIM\n"); //upate BCN for TIM IE _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "buffer UC"); } } //_exit_critical_bh(&psta->sleep_q.lock, &irqL); //if(psta->sleepq_len > (NR_XMITFRAME>>3)) //{ // wakeup_sta_to_xmit(padapter, psta); //} ret = _TRUE; DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_ucast); } } _exit_critical_bh(&psta->sleep_q.lock, &irqL); return ret; } static void dequeue_xmitframes_to_sleeping_queue(_adapter *padapter, struct sta_info *psta, _queue *pframequeue) { sint ret; _list *plist, *phead; u8 ac_index; struct tx_servq *ptxservq; struct pkt_attrib *pattrib; struct xmit_frame *pxmitframe; struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits; phead = get_list_head(pframequeue); plist = get_next(phead); while (rtw_end_of_queue_search(phead, plist) == _FALSE) { pxmitframe = LIST_CONTAINOR(plist, struct xmit_frame, list); plist = get_next(plist); pattrib = &pxmitframe->attrib; pattrib->triggered = 0; ret = xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe); if(_TRUE == ret) { ptxservq = rtw_get_sta_pending(padapter, psta, pattrib->priority, (u8 *)(&ac_index)); ptxservq->qcnt--; phwxmits[ac_index].accnt--; } else { //DBG_871X("xmitframe_enqueue_for_sleeping_sta return _FALSE\n"); } } } void stop_sta_xmit(_adapter *padapter, struct sta_info *psta) { _irqL irqL0; struct sta_info *psta_bmc; struct sta_xmit_priv *pstaxmitpriv; struct sta_priv *pstapriv = &padapter->stapriv; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; pstaxmitpriv = &psta->sta_xmitpriv; //for BC/MC Frames psta_bmc = rtw_get_bcmc_stainfo(padapter); _enter_critical_bh(&pxmitpriv->lock, &irqL0); psta->state |= WIFI_SLEEP_STATE; #ifdef CONFIG_TDLS if( !(psta->tdls_sta_state & TDLS_LINKED_STATE) ) #endif //CONFIG_TDLS pstapriv->sta_dz_bitmap |= BIT(psta->aid); dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->vo_q.sta_pending); rtw_list_delete(&(pstaxmitpriv->vo_q.tx_pending)); dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->vi_q.sta_pending); rtw_list_delete(&(pstaxmitpriv->vi_q.tx_pending)); dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->be_q.sta_pending); rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending)); dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->bk_q.sta_pending); rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending)); #ifdef CONFIG_TDLS if( !(psta->tdls_sta_state & TDLS_LINKED_STATE) ) { if( psta_bmc != NULL ) { #endif //CONFIG_TDLS //for BC/MC Frames pstaxmitpriv = &psta_bmc->sta_xmitpriv; dequeue_xmitframes_to_sleeping_queue(padapter, psta_bmc, &pstaxmitpriv->be_q.sta_pending); rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending)); #ifdef CONFIG_TDLS } } #endif //CONFIG_TDLS _exit_critical_bh(&pxmitpriv->lock, &irqL0); } void wakeup_sta_to_xmit(_adapter *padapter, struct sta_info *psta) { _irqL irqL; u8 update_mask=0, wmmps_ac=0; struct sta_info *psta_bmc; _list *xmitframe_plist, *xmitframe_phead; struct xmit_frame *pxmitframe=NULL; struct sta_priv *pstapriv = &padapter->stapriv; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; psta_bmc = rtw_get_bcmc_stainfo(padapter); //_enter_critical_bh(&psta->sleep_q.lock, &irqL); _enter_critical_bh(&pxmitpriv->lock, &irqL); xmitframe_phead = get_list_head(&psta->sleep_q); xmitframe_plist = get_next(xmitframe_phead); while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); xmitframe_plist = get_next(xmitframe_plist); rtw_list_delete(&pxmitframe->list); switch(pxmitframe->attrib.priority) { case 1: case 2: wmmps_ac = psta->uapsd_bk&BIT(1); break; case 4: case 5: wmmps_ac = psta->uapsd_vi&BIT(1); break; case 6: case 7: wmmps_ac = psta->uapsd_vo&BIT(1); break; case 0: case 3: default: wmmps_ac = psta->uapsd_be&BIT(1); break; } psta->sleepq_len--; if(psta->sleepq_len>0) pxmitframe->attrib.mdata = 1; else pxmitframe->attrib.mdata = 0; if(wmmps_ac) { psta->sleepq_ac_len--; if(psta->sleepq_ac_len>0) { pxmitframe->attrib.mdata = 1; pxmitframe->attrib.eosp = 0; } else { pxmitframe->attrib.mdata = 0; pxmitframe->attrib.eosp = 1; } } pxmitframe->attrib.triggered = 1; /* _exit_critical_bh(&psta->sleep_q.lock, &irqL); if(rtw_hal_xmit(padapter, pxmitframe) == _TRUE) { rtw_os_xmit_complete(padapter, pxmitframe); } _enter_critical_bh(&psta->sleep_q.lock, &irqL); */ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); } if(psta->sleepq_len==0) { #ifdef CONFIG_TDLS if( psta->tdls_sta_state & TDLS_LINKED_STATE ) { if(psta->state&WIFI_SLEEP_STATE) psta->state ^= WIFI_SLEEP_STATE; _exit_critical_bh(&pxmitpriv->lock, &irqL); return; } #endif //CONFIG_TDLS if (pstapriv->tim_bitmap & BIT(psta->aid)) { //DBG_871X("wakeup to xmit, qlen==0, update_BCNTIM, tim=%x\n", pstapriv->tim_bitmap); //upate BCN for TIM IE //update_BCNTIM(padapter); update_mask = BIT(0); } pstapriv->tim_bitmap &= ~BIT(psta->aid); if(psta->state&WIFI_SLEEP_STATE) psta->state ^= WIFI_SLEEP_STATE; if(psta->state & WIFI_STA_ALIVE_CHK_STATE) { DBG_871X("%s alive check\n", __func__); psta->expire_to = pstapriv->expire_to; psta->state ^= WIFI_STA_ALIVE_CHK_STATE; } pstapriv->sta_dz_bitmap &= ~BIT(psta->aid); } //for BC/MC Frames if(!psta_bmc) goto _exit; if((pstapriv->sta_dz_bitmap&0xfffe) == 0x0)//no any sta in ps mode { xmitframe_phead = get_list_head(&psta_bmc->sleep_q); xmitframe_plist = get_next(xmitframe_phead); while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); xmitframe_plist = get_next(xmitframe_plist); rtw_list_delete(&pxmitframe->list); psta_bmc->sleepq_len--; if(psta_bmc->sleepq_len>0) pxmitframe->attrib.mdata = 1; else pxmitframe->attrib.mdata = 0; pxmitframe->attrib.triggered = 1; /* _exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); if(rtw_hal_xmit(padapter, pxmitframe) == _TRUE) { rtw_os_xmit_complete(padapter, pxmitframe); } _enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL); */ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); } if(psta_bmc->sleepq_len==0) { if (pstapriv->tim_bitmap & BIT(0)) { //DBG_871X("wakeup to xmit, qlen==0, update_BCNTIM, tim=%x\n", pstapriv->tim_bitmap); //upate BCN for TIM IE //update_BCNTIM(padapter); update_mask |= BIT(1); } pstapriv->tim_bitmap &= ~BIT(0); pstapriv->sta_dz_bitmap &= ~BIT(0); } } _exit: //_exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); _exit_critical_bh(&pxmitpriv->lock, &irqL); if(update_mask) { //update_BCNTIM(padapter); if ((update_mask & (BIT(0)|BIT(1))) == (BIT(0)|BIT(1))) _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "clear UC&BMC"); else if ((update_mask & BIT(1)) == BIT(1)) _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "clear BMC"); else _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "clear UC"); } } void xmit_delivery_enabled_frames(_adapter *padapter, struct sta_info *psta) { _irqL irqL; u8 wmmps_ac=0; _list *xmitframe_plist, *xmitframe_phead; struct xmit_frame *pxmitframe=NULL; struct sta_priv *pstapriv = &padapter->stapriv; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; //_enter_critical_bh(&psta->sleep_q.lock, &irqL); _enter_critical_bh(&pxmitpriv->lock, &irqL); xmitframe_phead = get_list_head(&psta->sleep_q); xmitframe_plist = get_next(xmitframe_phead); while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); xmitframe_plist = get_next(xmitframe_plist); switch(pxmitframe->attrib.priority) { case 1: case 2: wmmps_ac = psta->uapsd_bk&BIT(1); break; case 4: case 5: wmmps_ac = psta->uapsd_vi&BIT(1); break; case 6: case 7: wmmps_ac = psta->uapsd_vo&BIT(1); break; case 0: case 3: default: wmmps_ac = psta->uapsd_be&BIT(1); break; } if(!wmmps_ac) continue; rtw_list_delete(&pxmitframe->list); psta->sleepq_len--; psta->sleepq_ac_len--; if(psta->sleepq_ac_len>0) { pxmitframe->attrib.mdata = 1; pxmitframe->attrib.eosp = 0; } else { pxmitframe->attrib.mdata = 0; pxmitframe->attrib.eosp = 1; } pxmitframe->attrib.triggered = 1; rtw_hal_xmitframe_enqueue(padapter, pxmitframe); if((psta->sleepq_ac_len==0) && (!psta->has_legacy_ac) && (wmmps_ac)) { #ifdef CONFIG_TDLS if(psta->tdls_sta_state & TDLS_LINKED_STATE ) { //_exit_critical_bh(&psta->sleep_q.lock, &irqL); goto exit; } #endif //CONFIG_TDLS pstapriv->tim_bitmap &= ~BIT(psta->aid); //DBG_871X("wakeup to xmit, qlen==0, update_BCNTIM, tim=%x\n", pstapriv->tim_bitmap); //upate BCN for TIM IE //update_BCNTIM(padapter); update_beacon(padapter, _TIM_IE_, NULL, _TRUE); //update_mask = BIT(0); } } exit: //_exit_critical_bh(&psta->sleep_q.lock, &irqL); _exit_critical_bh(&pxmitpriv->lock, &irqL); return; } #endif #ifdef CONFIG_XMIT_THREAD_MODE void enqueue_pending_xmitbuf( struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) { _irqL irql; _queue *pqueue; _adapter *pri_adapter = pxmitpriv->adapter; pqueue = &pxmitpriv->pending_xmitbuf_queue; _enter_critical_bh(&pqueue->lock, &irql); rtw_list_delete(&pxmitbuf->list); rtw_list_insert_tail(&pxmitbuf->list, get_list_head(pqueue)); _exit_critical_bh(&pqueue->lock, &irql); #if defined(CONFIG_SDIO_HCI) && defined(CONFIG_CONCURRENT_MODE) if (pri_adapter->adapter_type > PRIMARY_ADAPTER) pri_adapter = pri_adapter->pbuddy_adapter; #endif //SDIO_HCI + CONCURRENT _rtw_up_sema(&(pri_adapter->xmitpriv.xmit_sema)); } void enqueue_pending_xmitbuf_to_head( struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) { _irqL irql; _queue *pqueue; _adapter *pri_adapter = pxmitpriv->adapter; pqueue = &pxmitpriv->pending_xmitbuf_queue; _enter_critical_bh(&pqueue->lock, &irql); rtw_list_delete(&pxmitbuf->list); rtw_list_insert_head(&pxmitbuf->list, get_list_head(pqueue)); _exit_critical_bh(&pqueue->lock, &irql); } struct xmit_buf* dequeue_pending_xmitbuf( struct xmit_priv *pxmitpriv) { _irqL irql; struct xmit_buf *pxmitbuf; _queue *pqueue; pxmitbuf = NULL; pqueue = &pxmitpriv->pending_xmitbuf_queue; _enter_critical_bh(&pqueue->lock, &irql); if (_rtw_queue_empty(pqueue) == _FALSE) { _list *plist, *phead; phead = get_list_head(pqueue); plist = get_next(phead); pxmitbuf = LIST_CONTAINOR(plist, struct xmit_buf, list); rtw_list_delete(&pxmitbuf->list); } _exit_critical_bh(&pqueue->lock, &irql); return pxmitbuf; } struct xmit_buf* dequeue_pending_xmitbuf_under_survey( struct xmit_priv *pxmitpriv) { _irqL irql; struct xmit_buf *pxmitbuf; #ifdef CONFIG_USB_HCI struct xmit_frame *pxmitframe; #endif _queue *pqueue; pxmitbuf = NULL; pqueue = &pxmitpriv->pending_xmitbuf_queue; _enter_critical_bh(&pqueue->lock, &irql); if (_rtw_queue_empty(pqueue) == _FALSE) { _list *plist, *phead; u8 type; phead = get_list_head(pqueue); plist = phead; do { plist = get_next(plist); if (plist == phead) break; pxmitbuf = LIST_CONTAINOR(plist, struct xmit_buf, list); #ifdef CONFIG_USB_HCI pxmitframe = (struct xmit_frame*)pxmitbuf->priv_data; if(pxmitframe) { type = GetFrameSubType(pxmitbuf->pbuf + TXDESC_SIZE + pxmitframe->pkt_offset * PACKET_OFFSET_SZ); } else { DBG_871X("%s, !!!ERROR!!! For USB, TODO ITEM \n", __FUNCTION__); } #else type = GetFrameSubType(pxmitbuf->pbuf + TXDESC_OFFSET); #endif if ((type == WIFI_PROBEREQ) || (type == WIFI_DATA_NULL) || (type == WIFI_QOS_DATA_NULL)) { rtw_list_delete(&pxmitbuf->list); break; } pxmitbuf = NULL; } while (1); } _exit_critical_bh(&pqueue->lock, &irql); return pxmitbuf; } sint check_pending_xmitbuf( struct xmit_priv *pxmitpriv) { _irqL irql; _queue *pqueue; sint ret = _FALSE; pqueue = &pxmitpriv->pending_xmitbuf_queue; _enter_critical_bh(&pqueue->lock, &irql); if(_rtw_queue_empty(pqueue) == _FALSE) ret = _TRUE; _exit_critical_bh(&pqueue->lock, &irql); return ret; } thread_return rtw_xmit_thread(thread_context context) { s32 err; PADAPTER padapter; err = _SUCCESS; padapter = (PADAPTER)context; thread_enter("RTW_XMIT_THREAD"); do { err = rtw_hal_xmit_thread_handler(padapter); flush_signals_thread(); } while (_SUCCESS == err); _rtw_up_sema(&padapter->xmitpriv.terminate_xmitthread_sema); thread_exit(); } #endif void rtw_sctx_init(struct submit_ctx *sctx, int timeout_ms) { sctx->timeout_ms = timeout_ms; sctx->submit_time= rtw_get_current_time(); #ifdef PLATFORM_LINUX /* TODO: add condition wating interface for other os */ init_completion(&sctx->done); #endif sctx->status = RTW_SCTX_SUBMITTED; } int rtw_sctx_wait(struct submit_ctx *sctx, const char *msg) { int ret = _FAIL; unsigned long expire; int status = 0; #ifdef PLATFORM_LINUX expire= sctx->timeout_ms ? msecs_to_jiffies(sctx->timeout_ms) : MAX_SCHEDULE_TIMEOUT; if (!wait_for_completion_timeout(&sctx->done, expire)) { /* timeout, do something?? */ status = RTW_SCTX_DONE_TIMEOUT; DBG_871X("%s timeout: %s\n", __func__, msg); } else { status = sctx->status; } #endif if (status == RTW_SCTX_DONE_SUCCESS) { ret = _SUCCESS; } return ret; } bool rtw_sctx_chk_waring_status(int status) { switch(status) { case RTW_SCTX_DONE_UNKNOWN: case RTW_SCTX_DONE_BUF_ALLOC: case RTW_SCTX_DONE_BUF_FREE: case RTW_SCTX_DONE_DRV_STOP: case RTW_SCTX_DONE_DEV_REMOVE: return _TRUE; default: return _FALSE; } } void rtw_sctx_done_err(struct submit_ctx **sctx, int status) { if (*sctx) { if (rtw_sctx_chk_waring_status(status)) DBG_871X("%s status:%d\n", __func__, status); (*sctx)->status = status; #ifdef PLATFORM_LINUX complete(&((*sctx)->done)); #endif *sctx = NULL; } } void rtw_sctx_done(struct submit_ctx **sctx) { rtw_sctx_done_err(sctx, RTW_SCTX_DONE_SUCCESS); } #ifdef CONFIG_XMIT_ACK #ifdef CONFIG_XMIT_ACK_POLLING s32 c2h_evt_hdl(_adapter *adapter, u8 *c2h_evt, c2h_id_filter filter); /** * rtw_ack_tx_polling - * @pxmitpriv: xmit_priv to address ack_tx_ops * @timeout_ms: timeout msec * * Init ack_tx_ops and then do c2h_evt_hdl() and polling ack_tx_ops repeatedly * till tx report or timeout * Returns: _SUCCESS if TX report ok, _FAIL for others */ int rtw_ack_tx_polling(struct xmit_priv *pxmitpriv, u32 timeout_ms) { int ret = _FAIL; struct submit_ctx *pack_tx_ops = &pxmitpriv->ack_tx_ops; _adapter *adapter = container_of(pxmitpriv, _adapter, xmitpriv); pack_tx_ops->submit_time = rtw_get_current_time(); pack_tx_ops->timeout_ms = timeout_ms; pack_tx_ops->status = RTW_SCTX_SUBMITTED; do { c2h_evt_hdl(adapter, NULL, rtw_hal_c2h_id_filter_ccx(adapter)); if (pack_tx_ops->status != RTW_SCTX_SUBMITTED) break; if (adapter->bDriverStopped) { pack_tx_ops->status = RTW_SCTX_DONE_DRV_STOP; break; } if (adapter->bSurpriseRemoved) { pack_tx_ops->status = RTW_SCTX_DONE_DEV_REMOVE; break; } rtw_msleep_os(10); } while (rtw_get_passing_time_ms(pack_tx_ops->submit_time) < timeout_ms); if (pack_tx_ops->status == RTW_SCTX_SUBMITTED) { pack_tx_ops->status = RTW_SCTX_DONE_TIMEOUT; DBG_871X("%s timeout\n", __func__); } if (pack_tx_ops->status == RTW_SCTX_DONE_SUCCESS) ret = _SUCCESS; return ret; } #endif int rtw_ack_tx_wait(struct xmit_priv *pxmitpriv, u32 timeout_ms) { #ifdef CONFIG_XMIT_ACK_POLLING return rtw_ack_tx_polling(pxmitpriv, timeout_ms); #else struct submit_ctx *pack_tx_ops = &pxmitpriv->ack_tx_ops; pack_tx_ops->submit_time = rtw_get_current_time(); pack_tx_ops->timeout_ms = timeout_ms; pack_tx_ops->status = RTW_SCTX_SUBMITTED; return rtw_sctx_wait(pack_tx_ops, __func__); #endif } void rtw_ack_tx_done(struct xmit_priv *pxmitpriv, int status) { struct submit_ctx *pack_tx_ops = &pxmitpriv->ack_tx_ops; if (pxmitpriv->ack_tx) { rtw_sctx_done_err(&pack_tx_ops, status); } else { DBG_871X("%s ack_tx not set\n", __func__); } } #endif //CONFIG_XMIT_ACK rtl8812au-4.3.8.12175.20140902+dfsg/hal/000077500000000000000000000000001261122257400162435ustar00rootroot00000000000000rtl8812au-4.3.8.12175.20140902+dfsg/hal/HalPwrSeqCmd.c000066400000000000000000000133671261122257400207130ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ /*++ Copyright (c) Realtek Semiconductor Corp. All rights reserved. Module Name: HalPwrSeqCmd.c Abstract: Implement HW Power sequence configuration CMD handling routine for Realtek devices. Major Change History: When Who What ---------- --------------- ------------------------------- 2011-10-26 Lucas Modify to be compatible with SD4-CE driver. 2011-07-07 Roger Create. --*/ #include // // Description: // This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC. // // Assumption: // We should follow specific format which was released from HW SD. // // 2011.07.07, added by Roger. // u8 HalPwrSeqCmdParsing( PADAPTER padapter, u8 CutVersion, u8 FabVersion, u8 InterfaceType, WLAN_PWR_CFG PwrSeqCmd[]) { WLAN_PWR_CFG PwrCfgCmd = {0}; u8 bPollingBit = _FALSE; u32 AryIdx = 0; u8 value = 0; u32 offset = 0; u32 pollingCount = 0; // polling autoload done. u32 maxPollingCnt = 5000; do { PwrCfgCmd = PwrSeqCmd[AryIdx]; RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: offset(%#x) cut_msk(%#x) fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) msk(%#x) value(%#x)\n", GET_PWR_CFG_OFFSET(PwrCfgCmd), GET_PWR_CFG_CUT_MASK(PwrCfgCmd), GET_PWR_CFG_FAB_MASK(PwrCfgCmd), GET_PWR_CFG_INTF_MASK(PwrCfgCmd), GET_PWR_CFG_BASE(PwrCfgCmd), GET_PWR_CFG_CMD(PwrCfgCmd), GET_PWR_CFG_MASK(PwrCfgCmd), GET_PWR_CFG_VALUE(PwrCfgCmd))); //2 Only Handle the command whose FAB, CUT, and Interface are matched if ((GET_PWR_CFG_FAB_MASK(PwrCfgCmd) & FabVersion) && (GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) && (GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType)) { switch (GET_PWR_CFG_CMD(PwrCfgCmd)) { case PWR_CMD_READ: RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_READ\n")); break; case PWR_CMD_WRITE: RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_WRITE\n")); offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); #ifdef CONFIG_SDIO_HCI // // We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface // 2011.07.07. // if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) { // Read Back SDIO Local value value = SdioLocalCmd52Read1Byte(padapter, offset); value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd)); value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)); // Write Back SDIO Local value SdioLocalCmd52Write1Byte(padapter, offset, value); } else #endif { #ifdef CONFIG_GSPI_HCI if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) offset = SPI_LOCAL_OFFSET | offset; #endif // Read the value from system register value = rtw_read8(padapter, offset); value=value&(~(GET_PWR_CFG_MASK(PwrCfgCmd))); value=value|(GET_PWR_CFG_VALUE(PwrCfgCmd)&GET_PWR_CFG_MASK(PwrCfgCmd)); // Write the value back to sytem register rtw_write8(padapter, offset, value); } break; case PWR_CMD_POLLING: RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_POLLING\n")); bPollingBit = _FALSE; offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); #ifdef CONFIG_GSPI_HCI if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) offset = SPI_LOCAL_OFFSET | offset; #endif do { #ifdef CONFIG_SDIO_HCI if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) value = SdioLocalCmd52Read1Byte(padapter, offset); else #endif value = rtw_read8(padapter, offset); value=value&GET_PWR_CFG_MASK(PwrCfgCmd); if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd))) bPollingBit = _TRUE; else rtw_udelay_os(10); if (pollingCount++ > maxPollingCnt) { DBG_871X_LEVEL(_drv_always_, "HalPwrSeqCmdParsing: Fail to polling Offset[%#x]=%02x\n", offset, value); return _FALSE; } } while (!bPollingBit); break; case PWR_CMD_DELAY: RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_DELAY\n")); if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US) rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)); else rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)*1000); break; case PWR_CMD_END: // When this command is parsed, end the process RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_END\n")); return _TRUE; break; default: RT_TRACE(_module_hal_init_c_ , _drv_err_, ("HalPwrSeqCmdParsing: Unknown CMD!!\n")); break; } } AryIdx++;//Add Array Index }while(1); return _TRUE; } rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC-BTCoexist/000077500000000000000000000000001261122257400211245ustar00rootroot00000000000000rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC-BTCoexist/Mp_Precomp.h000066400000000000000000000032121261122257400233340ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __MP_PRECOMP_H__ #define __MP_PRECOMP_H__ #include #include #define BT_TMP_BUF_SIZE 100 #ifdef PLATFORM_LINUX #define rsprintf snprintf #elif defined(PLATFORM_WINDOWS) #define rsprintf sprintf_s #endif #define DCMD_Printf DBG_BT_INFO #define delay_ms(ms) rtw_mdelay_os(ms) #ifdef bEnable #undef bEnable #endif #include "HalBtcOutSrc.h" #include "HalBtc8188c2Ant.h" #include "HalBtc8192d2Ant.h" #include "HalBtc8192e1Ant.h" #include "HalBtc8192e2Ant.h" #include "HalBtc8723a1Ant.h" #include "HalBtc8723a2Ant.h" #include "HalBtc8723b1Ant.h" #include "HalBtc8723b2Ant.h" #include "HalBtc8812a1Ant.h" #include "HalBtc8812a2Ant.h" #include "HalBtc8821a1Ant.h" #include "HalBtc8821a2Ant.h" #include "HalBtc8821aCsr2Ant.h" #endif // __MP_PRECOMP_H__ rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/000077500000000000000000000000001261122257400172625ustar00rootroot00000000000000rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/HalPhyRf.c000066400000000000000000000554771261122257400211250ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include "Mp_Precomp.h" #include "phydm_precomp.h" #define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _deltaThermal) \ do {\ for(_offset = 0; _offset < _size; _offset++)\ {\ if(_deltaThermal < thermalThreshold[_direction][_offset])\ {\ if(_offset != 0)\ _offset--;\ break;\ }\ } \ if(_offset >= _size)\ _offset = _size-1;\ } while(0) void ConfigureTxpowerTrack( IN PDM_ODM_T pDM_Odm, OUT PTXPWRTRACK_CFG pConfig ) { #if RTL8192E_SUPPORT if(pDM_Odm->SupportICType==ODM_RTL8192E) ConfigureTxpowerTrack_8192E(pConfig); #endif #if RTL8821A_SUPPORT if(pDM_Odm->SupportICType==ODM_RTL8821) ConfigureTxpowerTrack_8821A(pConfig); #endif #if RTL8812A_SUPPORT if(pDM_Odm->SupportICType==ODM_RTL8812) ConfigureTxpowerTrack_8812A(pConfig); #endif #if RTL8188E_SUPPORT if(pDM_Odm->SupportICType==ODM_RTL8188E) ConfigureTxpowerTrack_8188E(pConfig); #endif #if RTL8723B_SUPPORT if(pDM_Odm->SupportICType==ODM_RTL8723B) ConfigureTxpowerTrack_8723B(pConfig); #endif } //====================================================================== // <20121113, Kordan> This function should be called when TxAGC changed. // Otherwise the previous compensation is gone, because we record the // delta of temperature between two TxPowerTracking watch dogs. // // NOTE: If Tx BB swing or Tx scaling is varified during run-time, still // need to call this function. //====================================================================== VOID ODM_ClearTxPowerTrackingState( IN PDM_ODM_T pDM_Odm ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pDM_Odm->Adapter); u1Byte p = 0; pDM_Odm->BbSwingIdxCckBase = pDM_Odm->DefaultCckIndex; pDM_Odm->BbSwingIdxCck = pDM_Odm->DefaultCckIndex; pDM_Odm->RFCalibrateInfo.CCK_index = 0; for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p) { pDM_Odm->BbSwingIdxOfdmBase[p] = pDM_Odm->DefaultOfdmIndex; pDM_Odm->BbSwingIdxOfdm[p] = pDM_Odm->DefaultOfdmIndex; pDM_Odm->RFCalibrateInfo.OFDM_index[p] = pDM_Odm->DefaultOfdmIndex; pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = 0; pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = 0; pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p] = 0; pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = 0; pDM_Odm->Absolute_OFDMSwingIdx[p] = 0; // Initial Mix mode power tracking pDM_Odm->Remnant_OFDMSwingIdx[p] = 0; } pDM_Odm->Modify_TxAGC_Flag_PathA= FALSE; //Initial at Modify Tx Scaling Mode pDM_Odm->Modify_TxAGC_Flag_PathB= FALSE; //Initial at Modify Tx Scaling Mode pDM_Odm->Remnant_CCKSwingIdx= 0; pDM_Odm->RFCalibrateInfo.ThermalValue = pHalData->EEPROMThermalMeter; pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = pHalData->EEPROMThermalMeter; pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = pHalData->EEPROMThermalMeter; } VOID ODM_TXPowerTrackingCallback_ThermalMeter( #if (DM_ODM_SUPPORT_TYPE & ODM_AP) IN PDM_ODM_T pDM_Odm #else IN PADAPTER Adapter #endif ) { #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; #endif #endif u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0; u1Byte ThermalValue_AVG_count = 0; u4Byte ThermalValue_AVG = 0; u1Byte OFDM_min_index = 0; // OFDM BB Swing should be less than +3.0dB, which is required by Arthur u1Byte Indexforchannel = 0; // GetRightChnlPlaceforIQK(pHalData->CurrentChannel) TXPWRTRACK_CFG c; //4 1. The following TWO tables decide the final index of OFDM/CCK swing table. pu1Byte deltaSwingTableIdx_TUP_A; pu1Byte deltaSwingTableIdx_TDOWN_A; pu1Byte deltaSwingTableIdx_TUP_B; pu1Byte deltaSwingTableIdx_TDOWN_B; //4 2. Initilization ( 7 steps in total ) ConfigureTxpowerTrack(pDM_Odm, &c); (*c.GetDeltaSwingTable)(pDM_Odm, (pu1Byte*)&deltaSwingTableIdx_TUP_A, (pu1Byte*)&deltaSwingTableIdx_TDOWN_A, (pu1Byte*)&deltaSwingTableIdx_TUP_B, (pu1Byte*)&deltaSwingTableIdx_TDOWN_B); pDM_Odm->RFCalibrateInfo.TXPowerTrackingCallbackCnt++; //cosa add for debug pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = TRUE; #if (MP_DRIVER == 1) #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = pHalData->TxPowerTrackControl; // We should keep updating the control variable according to HalData. #endif #if (DM_ODM_SUPPORT_TYPE == ODM_CE) if (pDM_Odm->mp_mode == TRUE) #endif // RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. pDM_Odm->RFCalibrateInfo.RegA24 = 0x090e1317; #endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("===>ODM_TXPowerTrackingCallback_ThermalMeter, \ \n pDM_Odm->BbSwingIdxCckBase: %d, pDM_Odm->BbSwingIdxOfdmBase[A]: %d, pDM_Odm->DefaultOfdmIndex: %d\n", pDM_Odm->BbSwingIdxCckBase, pDM_Odm->BbSwingIdxOfdmBase[ODM_RF_PATH_A], pDM_Odm->DefaultOfdmIndex)); ThermalValue = (u1Byte)ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, c.ThermalRegAddr, 0xfc00); //0x42: RF Reg[15:10] 88E if( ! pDM_Odm->RFCalibrateInfo.TxPowerTrackControl || pHalData->EEPROMThermalMeter == 0 || pHalData->EEPROMThermalMeter == 0xFF) return; //4 3. Initialize ThermalValues of RFCalibrateInfo if(pDM_Odm->RFCalibrateInfo.bReloadtxpowerindex) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("reload ofdm index for band switch\n")); } //4 4. Calculate average thermal meter pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index] = ThermalValue; pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index++; if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index == c.AverageThermalNum) //Average times = c.AverageThermalNum pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index = 0; for(i = 0; i < c.AverageThermalNum; i++) { if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]) { ThermalValue_AVG += pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]; ThermalValue_AVG_count++; } } if(ThermalValue_AVG_count) //Calculate Average ThermalValue after average enough times { ThermalValue = (u1Byte)(ThermalValue_AVG / ThermalValue_AVG_count); ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("AVG Thermal Meter = 0x%X, EFUSE Thermal Base = 0x%X\n", ThermalValue, pHalData->EEPROMThermalMeter)); } //4 5. Calculate delta, delta_LCK, delta_IQK. //"delta" here is used to determine whether thermal value changes or not. delta = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue):(pDM_Odm->RFCalibrateInfo.ThermalValue - ThermalValue); delta_LCK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_LCK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_LCK):(pDM_Odm->RFCalibrateInfo.ThermalValue_LCK - ThermalValue); delta_IQK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_IQK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_IQK):(pDM_Odm->RFCalibrateInfo.ThermalValue_IQK - ThermalValue); ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK)); //4 6. If necessary, do LCK. if ((delta_LCK >= c.Threshold_IQK)) // Delta temperature is equal to or larger than 20 centigrade. { ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= Threshold_IQK(%d)\n", delta_LCK, c.Threshold_IQK)); pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; if(c.PHY_LCCalibrate) (*c.PHY_LCCalibrate)(pDM_Odm); } //3 7. If necessary, move the index of swing table to adjust Tx power. if (delta > 0 && pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) { //"delta" here is used to record the absolute value of differrence. #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); #else delta = (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)?(ThermalValue - pDM_Odm->priv->pmib->dot11RFEntry.ther):(pDM_Odm->priv->pmib->dot11RFEntry.ther - ThermalValue); #endif if (delta >= TXPWR_TRACK_TABLE_SIZE) delta = TXPWR_TRACK_TABLE_SIZE - 1; //4 7.1 The Final Power Index = BaseIndex + PowerIndexOffset #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) if(ThermalValue > pHalData->EEPROMThermalMeter) { #else if(ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) { #endif ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("deltaSwingTableIdx_TUP_A[%d] = %d\n", delta, deltaSwingTableIdx_TUP_A[delta])); pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[ODM_RF_PATH_A] = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_A]; pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_A] = deltaSwingTableIdx_TUP_A[delta]; pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = deltaSwingTableIdx_TUP_A[delta]; // Record delta swing for mix mode power tracking ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A])); if(c.RfPathCount > 1) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("deltaSwingTableIdx_TUP_B[%d] = %d\n", delta, deltaSwingTableIdx_TUP_B[delta])); pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[ODM_RF_PATH_B] = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_B]; pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_B] = deltaSwingTableIdx_TUP_B[delta]; pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = deltaSwingTableIdx_TUP_B[delta]; // Record delta swing for mix mode power tracking ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B])); } } else { ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("deltaSwingTableIdx_TDOWN_A[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_A[delta])); pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[ODM_RF_PATH_A] = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_A]; pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_A] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; // Record delta swing for mix mode power tracking ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A])); if(c.RfPathCount > 1) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("deltaSwingTableIdx_TDOWN_B[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_B[delta])); pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[ODM_RF_PATH_B] = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_B]; pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_B] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; // Record delta swing for mix mode power tracking ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B])); } } for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n\n================================ [Path-%c] Calculating PowerIndexOffset ================================\n", (p == ODM_RF_PATH_A ? 'A' : 'B'))); if (pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] == pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p]) // If Thermal value changes but lookup table value still the same pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = 0; else pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] - pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p]; // Power Index Diff between 2 times Power Tracking ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("[Path-%c] PowerIndexOffset(%d) = DeltaPowerIndex(%d) - DeltaPowerIndexLast(%d)\n", (p == ODM_RF_PATH_A ? 'A' : 'B'), pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p], pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p], pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p])); pDM_Odm->RFCalibrateInfo.OFDM_index[p] = pDM_Odm->BbSwingIdxOfdmBase[p] + pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p]; pDM_Odm->RFCalibrateInfo.CCK_index = pDM_Odm->BbSwingIdxCckBase + pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p]; pDM_Odm->BbSwingIdxCck = pDM_Odm->RFCalibrateInfo.CCK_index; pDM_Odm->BbSwingIdxOfdm[p] = pDM_Odm->RFCalibrateInfo.OFDM_index[p]; // *************Print BB Swing Base and Index Offset************* ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("The 'CCK' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pDM_Odm->BbSwingIdxCck, pDM_Odm->BbSwingIdxCckBase, pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p])); ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("The 'OFDM' final index(%d) = BaseIndex[%c](%d) + PowerIndexOffset(%d)\n", pDM_Odm->BbSwingIdxOfdm[p], (p == ODM_RF_PATH_A ? 'A' : 'B'), pDM_Odm->BbSwingIdxOfdmBase[p], pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p])); //4 7.1 Handle boundary conditions of index. if(pDM_Odm->RFCalibrateInfo.OFDM_index[p] > c.SwingTableSize_OFDM-1) { pDM_Odm->RFCalibrateInfo.OFDM_index[p] = c.SwingTableSize_OFDM-1; } else if (pDM_Odm->RFCalibrateInfo.OFDM_index[p] < OFDM_min_index) { pDM_Odm->RFCalibrateInfo.OFDM_index[p] = OFDM_min_index; } } ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n\n========================================================================================================\n")); if(pDM_Odm->RFCalibrateInfo.CCK_index > c.SwingTableSize_CCK-1) pDM_Odm->RFCalibrateInfo.CCK_index = c.SwingTableSize_CCK-1; //else if (pDM_Odm->RFCalibrateInfo.CCK_index < 0) //pDM_Odm->RFCalibrateInfo.CCK_index = 0; } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("The thermal meter is unchanged or TxPowerTracking OFF(%d): ThermalValue: %d , pDM_Odm->RFCalibrateInfo.ThermalValue: %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl, ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue)); for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = 0; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("TxPowerTracking: [CCK] Swing Current Index: %d, Swing Base Index: %d\n", pDM_Odm->RFCalibrateInfo.CCK_index, pDM_Odm->BbSwingIdxCckBase)); //Print Swing base & current for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("TxPowerTracking: [OFDM] Swing Current Index: %d, Swing Base Index[%c]: %d\n", pDM_Odm->RFCalibrateInfo.OFDM_index[p], (p == ODM_RF_PATH_A ? 'A' : 'B'), pDM_Odm->BbSwingIdxOfdmBase[p])); } if ((pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_A] != 0 || pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_B] != 0 ) && pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) { //4 7.2 Configure the Swing Table to adjust Tx Power. pDM_Odm->RFCalibrateInfo.bTxPowerChanged = TRUE; // Always TRUE after Tx Power is adjusted by power tracking. // // 2012/04/23 MH According to Luke's suggestion, we can not write BB digital // to increase TX power. Otherwise, EVM will be bad. // // 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. if (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Temperature Increasing(A): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_A], delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); if(c.RfPathCount > 1) ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Temperature Increasing(B): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_B], delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); } else if (ThermalValue < pDM_Odm->RFCalibrateInfo.ThermalValue)// Low temperature { ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Temperature Decreasing(A): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_A], delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); if(c.RfPathCount > 1) ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Temperature Decreasing(B): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_B], delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); } #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) if (ThermalValue > pHalData->EEPROMThermalMeter) #else if (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) #endif { ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Temperature(%d) higher than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter)); if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8821 || pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter POWER Tracking MIX_MODE**********\n")); for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0); } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter POWER Tracking BBSWING_MODE**********\n")); for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, p, Indexforchannel); } } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Temperature(%d) lower than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter)); if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8821 || pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter POWER Tracking MIX_MODE**********\n")); for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, Indexforchannel); } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("**********Enter POWER Tracking BBSWING_MODE**********\n")); for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, p, Indexforchannel); } } pDM_Odm->BbSwingIdxCckBase = pDM_Odm->BbSwingIdxCck; // Record last time Power Tracking result as base. for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) pDM_Odm->BbSwingIdxOfdmBase[p] = pDM_Odm->BbSwingIdxOfdm[p]; ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("pDM_Odm->RFCalibrateInfo.ThermalValue = %d ThermalValue= %d\n", pDM_Odm->RFCalibrateInfo.ThermalValue, ThermalValue)); pDM_Odm->RFCalibrateInfo.ThermalValue = ThermalValue; //Record last Power Tracking Thermal Value } #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) #if (RTL8723B_SUPPORT == 0) // Delta temperature is equal to or larger than 20 centigrade (When threshold is 8). if ((delta_IQK >= c.Threshold_IQK)) { if ( ! pDM_Odm->RFCalibrateInfo.bIQKInProgress) (*c.DoIQK)(pDM_Odm, delta_IQK, ThermalValue, 8); } #endif #endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("<===ODM_TXPowerTrackingCallback_ThermalMeter\n")); pDM_Odm->RFCalibrateInfo.TXPowercount = 0; } //3============================================================ //3 IQ Calibration //3============================================================ VOID ODM_ResetIQKResult( IN PDM_ODM_T pDM_Odm ) { u1Byte i; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN || DM_ODM_SUPPORT_TYPE == ODM_CE) PADAPTER Adapter = pDM_Odm->Adapter; if (!IS_HARDWARE_TYPE_8192D(Adapter)) return; #endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD,("PHY_ResetIQKResult:: settings regs %d default regs %d\n", (u4Byte)(sizeof(pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting)/sizeof(IQK_MATRIX_REGS_SETTING)), IQK_Matrix_Settings_NUM)); //0xe94, 0xe9c, 0xea4, 0xeac, 0xeb4, 0xebc, 0xec4, 0xecc for(i = 0; i < IQK_Matrix_Settings_NUM; i++) { { pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][0] = pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][2] = pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][4] = pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][6] = 0x100; pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][1] = pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][3] = pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][5] = pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][7] = 0x0; pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].bIQKDone = FALSE; } } } #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl) { u1Byte channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = {1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165}; u1Byte place = chnl; if(chnl > 14) { for(place = 14; place //#include "phydm_precomp.h" //#include "../phydm_precomp.h" rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/PhyDM_Adaptivity.c000066400000000000000000000677131261122257400226230ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // include files //============================================================ #include "Mp_Precomp.h" #include "phydm_precomp.h" VOID Phydm_CheckAdaptivity( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; if(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY) { if(pDM_Odm->bAdaOn == TRUE) { if(pDM_Odm->DynamicLinkAdaptivity == TRUE) { if(pDM_Odm->bLinked && pDM_Odm->bCheck == FALSE) { Phydm_NHMCounterStatistics(pDM_Odm); Phydm_CheckEnvironment(pDM_Odm); } else if(!pDM_Odm->bLinked) { pDM_Odm->bCheck = FALSE; } } else { Phydm_MACEDCCAState(pDM_Odm, PhyDM_DONT_IGNORE_EDCCA); pDM_Odm->adaptivity_flag = TRUE; } } else { Phydm_MACEDCCAState(pDM_Odm, PhyDM_IGNORE_EDCCA); pDM_Odm->adaptivity_flag = FALSE; } } } VOID Phydm_NHMCounterStatisticsInit( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { //PHY parameters initialize for ac series ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC+2, 0xC350); //0x990[31:16]=0xC350 Time duration for NHM unit: us, 0xc350=200ms ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC+2, 0xffff); //0x994[31:16]=0xffff th_9, th_10 //ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0xffffff5c); //0x998=0xffffff5c th_3, th_2, th_1, th_0 ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0xffffff50); //0x998=0xffffff52 th_3, th_2, th_1, th_0 ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffffff); //0x99c=0xffffffff th_7, th_6, th_5, th_4 ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH8_11AC, bMaskByte0, 0xff); //0x9a0[7:0]=0xff th_8 //ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT8|BIT9|BIT10, 0x7); //0x994[9:8]=3 enable CCX ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT8|BIT9|BIT10, 0x1); //0x994[10:8]=1 ignoreCCA ignore PHYTXON enable CCX ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_9E8_11AC, BIT0, 0x1); //0x9e8[7]=1 max power among all RX ants } else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { //PHY parameters initialize for n series ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N+2, 0xC350); //0x894[31:16]=0x0xC350 Time duration for NHM unit: us, 0xc350=200ms //ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N+2, 0x4e20); //0x894[31:16]=0x4e20 Time duration for NHM unit: 4us, 0x4e20=80ms ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N+2, 0xffff); //0x890[31:16]=0xffff th_9, th_10 //ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0xffffff5c); //0x898=0xffffff5c th_3, th_2, th_1, th_0 ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0xffffff50); //0x898=0xffffff52 th_3, th_2, th_1, th_0 ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffffff); //0x89c=0xffffffff th_7, th_6, th_5, th_4 ODM_SetBBReg(pDM_Odm, ODM_REG_FPGA0_IQK_11N, bMaskByte0, 0xff); //0xe28[7:0]=0xff th_8 //ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, 0x7); //0x890[9:8]=3 enable CCX ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, 0x1); //0x890[10:8]=1 ignoreCCA ignore PHYTXON enable CCX ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT7, 0x1); //0xc0c[7]=1 max power among all RX ants } } VOID Phydm_NHMCounterStatistics( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)) return; // Get NHM report Phydm_GetNHMCounterStatistics(pDM_Odm); // Reset NHM counter Phydm_NHMCounterStatisticsReset(pDM_Odm); } VOID Phydm_GetNHMCounterStatistics( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; u4Byte value32 = 0; if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_CNT_11AC, bMaskDWord); else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_CNT_11N, bMaskDWord); pDM_Odm->NHM_cnt_0 = (u1Byte)(value32 & bMaskByte0); pDM_Odm->NHM_cnt_1 = (u1Byte)((value32 & bMaskByte1)>>8); } VOID Phydm_NHMCounterStatisticsReset( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT1, 0); ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT1, 1); } else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT1, 0); ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT1, 1); } } VOID Phydm_NHMBBInit( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pDM_Odm->adaptivity_flag = FALSE; pDM_Odm->tolerance_cnt = 3; pDM_Odm->NHMLastTxOkcnt = 0; pDM_Odm->NHMLastRxOkcnt = 0; pDM_Odm->NHMCurTxOkcnt = 0; pDM_Odm->NHMCurRxOkcnt = 0; } VOID Phydm_SetEDCCAThreshold( IN PVOID pDM_VOID, IN s1Byte H2L, IN s1Byte L2H ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte0, (u1Byte)L2H); ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte2, (u1Byte)H2L); } else if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, bMaskByte0, (u1Byte)L2H); ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, bMaskByte1, (u1Byte)H2L); } } VOID Phydm_SetTRxMux( IN PVOID pDM_VOID, IN PhyDM_Trx_MUX_Type txMode, IN PhyDM_Trx_MUX_Type rxMode ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N, BIT3|BIT2|BIT1, txMode); // set TXmod to standby mode to remove outside noise affect ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N, BIT22|BIT21|BIT20, rxMode); // set RXmod to standby mode to remove outside noise affect if(pDM_Odm->RFType > ODM_1T1R) { ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT3|BIT2|BIT1, txMode); // set TXmod to standby mode to remove outside noise affect ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT22|BIT21|BIT20, rxMode); // set RXmod to standby mode to remove outside noise affect } } else if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC, BIT11|BIT10|BIT9|BIT8, txMode); // set TXmod to standby mode to remove outside noise affect ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC, BIT7|BIT6|BIT5|BIT4, rxMode); // set RXmod to standby mode to remove outside noise affect if(pDM_Odm->RFType > ODM_1T1R) { ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC_B, BIT11|BIT10|BIT9|BIT8, txMode); // set TXmod to standby mode to remove outside noise affect ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC_B, BIT7|BIT6|BIT5|BIT4, rxMode); // set RXmod to standby mode to remove outside noise affect } } } VOID Phydm_MACEDCCAState( IN PVOID pDM_VOID, IN PhyDM_MACEDCCA_Type State ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; if(State == PhyDM_IGNORE_EDCCA) { ODM_SetMACReg(pDM_Odm, REG_TX_PTCL_CTRL, BIT15, 1); //ignore EDCCA reg520[15]=1 ODM_SetMACReg(pDM_Odm, REG_RD_CTRL, BIT11, 0); //reg524[11]=0 } else // don't set MAC ignore EDCCA signal { ODM_SetMACReg(pDM_Odm, REG_TX_PTCL_CTRL, BIT15, 0); //don't ignore EDCCA reg520[15]=0 ODM_SetMACReg(pDM_Odm, REG_RD_CTRL, BIT11, 1); //reg524[11]=1 } pDM_Odm->EDCCA_enable_state = State; ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("EDCCA enable State = %d \n", State)); } BOOLEAN Phydm_CalNHMcnt( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; u2Byte Base = 0; Base = pDM_Odm->NHM_cnt_0 + pDM_Odm->NHM_cnt_1; if(Base != 0) { pDM_Odm->NHM_cnt_0 = ((pDM_Odm->NHM_cnt_0) << 8) / Base; pDM_Odm->NHM_cnt_1 = ((pDM_Odm->NHM_cnt_1) << 8) / Base; } if((pDM_Odm->NHM_cnt_0 - pDM_Odm->NHM_cnt_1) >= 100) return TRUE; // clean environment else return FALSE; //noisy environment } VOID Phydm_CheckEnvironment( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; BOOLEAN isCleanEnvironment = FALSE; u1Byte i, clean = 0; if(pDM_Odm->bFirstLink == TRUE) { pDM_Odm->adaptivity_flag = TRUE; pDM_Odm->bFirstLink = FALSE; return; } else { if(pDM_Odm->NHMWait < 3) // Start enter NHM after 4 NHMWait { pDM_Odm->NHMWait ++; Phydm_NHMCounterStatistics(pDM_Odm); return; } else { Phydm_NHMCounterStatistics(pDM_Odm); isCleanEnvironment = Phydm_CalNHMcnt(pDM_Odm); if(isCleanEnvironment == TRUE) { Phydm_MACEDCCAState(pDM_Odm, PhyDM_DONT_IGNORE_EDCCA); #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_backup; //mode 1 pDM_Odm->TH_EDCCA_HL_diff= pDM_Odm->TH_EDCCA_HL_diff_backup; #endif pDM_Odm->adaptivity_flag = TRUE; } else { #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) Phydm_MACEDCCAState(pDM_Odm, PhyDM_IGNORE_EDCCA); #else Phydm_MACEDCCAState(pDM_Odm, PhyDM_DONT_IGNORE_EDCCA); pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_mode2; // for AP mode 2 pDM_Odm->TH_EDCCA_HL_diff= pDM_Odm->TH_EDCCA_HL_diff_mode2; #endif pDM_Odm->adaptivity_flag = FALSE; } pDM_Odm->bFirstLink = TRUE; pDM_Odm->bCheck = TRUE; } } } VOID Phydm_NHMBB( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; BOOLEAN bCleanEnvironment; bCleanEnvironment = Phydm_CalNHMcnt(pDM_Odm); pDM_Odm->NHMCurTxOkcnt = *(pDM_Odm->pNumTxBytesUnicast) - pDM_Odm->NHMLastTxOkcnt; pDM_Odm->NHMCurRxOkcnt = *(pDM_Odm->pNumRxBytesUnicast) - pDM_Odm->NHMLastRxOkcnt; pDM_Odm->NHMLastTxOkcnt = *(pDM_Odm->pNumTxBytesUnicast); pDM_Odm->NHMLastRxOkcnt = *(pDM_Odm->pNumRxBytesUnicast); ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("cnt_0=%d, cnt_1=%d, bCleanEnvironment = %d, NHMCurTxOkcnt = %llu, NHMCurRxOkcnt = %llu\n", pDM_Odm->NHM_cnt_0, pDM_Odm->NHM_cnt_1, bCleanEnvironment, pDM_Odm->NHMCurTxOkcnt, pDM_Odm->NHMCurRxOkcnt)); if(pDM_Odm->NHMWait < 4) // Start enter NHM after 4 NHMWait { pDM_Odm->NHMWait ++; Phydm_MACEDCCAState(pDM_Odm, PhyDM_IGNORE_EDCCA); } else if ( ((pDM_Odm->NHMCurTxOkcnt>>10) > 2) && ((pDM_Odm->NHMCurTxOkcnt) + 1 > (u8Byte)(pDM_Odm->NHMCurRxOkcnt<<2) + 1)) //Tx > 4*Rx and Tx > 2Mb possible for adaptivity test { if(bCleanEnvironment == TRUE || pDM_Odm->adaptivity_flag == TRUE) { //Enable EDCCA since it is possible running Adaptivity testing pDM_Odm->adaptivity_flag = TRUE; Phydm_MACEDCCAState(pDM_Odm, PhyDM_DONT_IGNORE_EDCCA); pDM_Odm->tolerance_cnt = 0; #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_backup; pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_backup ; #endif } else { if(pDM_Odm->tolerance_cnt < 3) pDM_Odm->tolerance_cnt ++; else { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_mode2; pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_mode2 ; #else Phydm_MACEDCCAState(pDM_Odm, PhyDM_IGNORE_EDCCA); #endif pDM_Odm->adaptivity_flag = FALSE; } } } else // TXadaptivity_flag == TRUE && bCleanEnvironment == FALSE) { Phydm_MACEDCCAState(pDM_Odm, PhyDM_DONT_IGNORE_EDCCA); pDM_Odm->tolerance_cnt = 0; #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_backup; pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_backup ; #endif } #if(DM_ODM_SUPPORT_TYPE & ODM_AP) // for repeater mode add by YuChen 2014.06.23 #ifdef UNIVERSAL_REPEATER else if((bCleanEnvironment == TRUE) && (pDM_Odm->VXD_bLinked) && ((pDM_Odm->NHMCurTxOkcnt>>10) > 1)) // clean environment and VXD linked and Tx TP>1Mb { pDM_Odm->adaptivity_flag = TRUE; Phydm_MACEDCCAState(pDM_Odm, PhyDM_DONT_IGNORE_EDCCA); pDM_Odm->tolerance_cnt = 0; pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_backup; pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_backup ; } #endif #endif // for repeater mode add by YuChen 2014.06.23 else { if(pDM_Odm->tolerance_cnt < 3) pDM_Odm->tolerance_cnt ++; else { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_mode2; pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_mode2 ; #else Phydm_MACEDCCAState(pDM_Odm, PhyDM_IGNORE_EDCCA); #endif pDM_Odm->adaptivity_flag = FALSE; } } } ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("adaptivity_flag = %d\n ", pDM_Odm->adaptivity_flag)); } VOID Phydm_SearchPwdBLowerBound( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; u4Byte value32 =0; u1Byte cnt, IGI_Pause = 0x7f, IGI_Resume = 0x20, IGI = 0x50; //IGI = 0x50 for cal EDCCA lower bound u1Byte txEdcca1 = 0, txEdcca0 = 0; BOOLEAN bAdjust=TRUE; s1Byte TH_L2H_dmc, TH_H2L_dmc, IGI_target = 0x32; s1Byte Diff; Phydm_SetTRxMux(pDM_Odm, PhyDM_STANDBY_MODE, PhyDM_STANDBY_MODE); ODM_Write_DIG(pDM_Odm, IGI_Pause); Diff = IGI_target -(s1Byte)IGI; TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff; if(TH_L2H_dmc > 10) TH_L2H_dmc = 10; TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; Phydm_SetEDCCAThreshold(pDM_Odm, TH_H2L_dmc, TH_L2H_dmc); ODM_delay_ms(5); while(bAdjust) { for(cnt=0; cnt<20; cnt ++) { if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) value32 = ODM_GetBBReg(pDM_Odm,ODM_REG_RPT_11N, bMaskDWord); else if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) value32 = ODM_GetBBReg(pDM_Odm,ODM_REG_RPT_11AC, bMaskDWord); if (value32 & BIT30 && (pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8723B|ODM_RTL8188E))) txEdcca1 = txEdcca1 + 1; else if(value32 & BIT29) txEdcca1 = txEdcca1 + 1; else txEdcca0 = txEdcca0 + 1; } if(txEdcca1 > 9 ) { IGI = IGI -1; TH_L2H_dmc = TH_L2H_dmc + 1; if(TH_L2H_dmc > 10) TH_L2H_dmc = 10; TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; Phydm_SetEDCCAThreshold(pDM_Odm, TH_H2L_dmc, TH_L2H_dmc); txEdcca1 = 0; txEdcca0 = 0; if(TH_L2H_dmc == 10) { bAdjust = FALSE; pDM_Odm->H2L_lb = TH_H2L_dmc; pDM_Odm->L2H_lb = TH_L2H_dmc; pDM_Odm->Adaptivity_IGI_upper = IGI; } } else { bAdjust = FALSE; pDM_Odm->H2L_lb = TH_H2L_dmc; pDM_Odm->L2H_lb = TH_L2H_dmc; pDM_Odm->Adaptivity_IGI_upper = IGI; } } Phydm_SetTRxMux(pDM_Odm, PhyDM_TX_MODE, PhyDM_RX_MODE); ODM_Write_DIG(pDM_Odm, IGI_Resume); Phydm_SetEDCCAThreshold(pDM_Odm, 0x7f, 0x7f); // resume to no link state } VOID Phydm_AdaptivityInit( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; #if(DM_ODM_SUPPORT_TYPE == ODM_WIN) PADAPTER pAdapter = pDM_Odm->Adapter; PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); pDM_Odm->Carrier_Sense_enable = (BOOLEAN)pMgntInfo->RegEnableCarrierSense; pDM_Odm->NHM_enable = (BOOLEAN)pMgntInfo->RegNHMEnable; pDM_Odm->DynamicLinkAdaptivity = (BOOLEAN)pMgntInfo->RegDmLinkAdaptivity; #elif(DM_ODM_SUPPORT_TYPE == ODM_CE) pDM_Odm->Carrier_Sense_enable = (pDM_Odm->Adapter->registrypriv.adaptivity_mode!=0)?TRUE:FALSE; pDM_Odm->NHM_enable = (BOOLEAN)pDM_Odm->Adapter->registrypriv.nhm_en; pDM_Odm->DynamicLinkAdaptivity = FALSE; // Jeff please add this #endif #if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) if(pDM_Odm->Carrier_Sense_enable == FALSE) { #if(DM_ODM_SUPPORT_TYPE == ODM_WIN) if( pMgntInfo->RegL2HForAdaptivity != 0 ) pDM_Odm->TH_L2H_ini = pMgntInfo->RegL2HForAdaptivity; else #endif pDM_Odm->TH_L2H_ini = 0xf5; // -7 } else { #if(DM_ODM_SUPPORT_TYPE == ODM_WIN) if( pMgntInfo->RegL2HForAdaptivity != 0 ) pDM_Odm->TH_L2H_ini = pMgntInfo->RegL2HForAdaptivity; else #endif pDM_Odm->TH_L2H_ini = 0xa; } pDM_Odm->AdapEn_RSSI = 20; #if(DM_ODM_SUPPORT_TYPE == ODM_WIN) if( pMgntInfo->RegHLDiffForAdaptivity != 0 ) pDM_Odm->TH_EDCCA_HL_diff = pMgntInfo->RegHLDiffForAdaptivity; else #endif pDM_Odm->TH_EDCCA_HL_diff = 7; ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("TH_L2H_ini = 0x%x, TH_EDCCA_HL_diff = 0x%x\n", pDM_Odm->TH_L2H_ini, pDM_Odm->TH_EDCCA_HL_diff)); #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) prtl8192cd_priv priv = pDM_Odm->priv; if(pDM_Odm->Carrier_Sense_enable){ pDM_Odm->TH_L2H_ini = 10; pDM_Odm->TH_EDCCA_HL_diff = 7; pDM_Odm->AdapEn_RSSI = 30; } else { pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_backup; //set by mib pDM_Odm->TH_EDCCA_HL_diff = 7; pDM_Odm->AdapEn_RSSI = 20; } pDM_Odm->TH_L2H_ini_mode2 = 20; pDM_Odm->TH_EDCCA_HL_diff_mode2 = 8; //pDM_Odm->TH_L2H_ini_backup = pDM_Odm->TH_L2H_ini; pDM_Odm->TH_EDCCA_HL_diff_backup = pDM_Odm->TH_EDCCA_HL_diff ; if(priv->pshare->rf_ft_var.adaptivity_enable == 2) pDM_Odm->DynamicLinkAdaptivity = TRUE; else pDM_Odm->DynamicLinkAdaptivity = FALSE; // pDM_Odm->NHM_enable = FALSE; #endif pDM_Odm->IGI_Base = 0x32; pDM_Odm->IGI_target = 0x1c; pDM_Odm->ForceEDCCA = 0; pDM_Odm->H2L_lb= 0; pDM_Odm->L2H_lb= 0; pDM_Odm->Adaptivity_IGI_upper = 0; pDM_Odm->NHMWait = 0; Phydm_NHMBBInit(pDM_Odm); pDM_Odm->bCheck = FALSE; pDM_Odm->bFirstLink = TRUE; pDM_Odm->bAdaOn = TRUE; ODM_SetBBReg(pDM_Odm, REG_RD_CTRL, BIT11, 1); // stop counting if EDCCA is asserted //Search pwdB lower bound { if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ODM_SetBBReg(pDM_Odm,ODM_REG_DBG_RPT_11N, bMaskDWord, 0x208); else if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ODM_SetBBReg(pDM_Odm,ODM_REG_DBG_RPT_11AC, bMaskDWord, 0x209); Phydm_SearchPwdBLowerBound(pDM_Odm); } Phydm_MACEDCCAState(pDM_Odm, PhyDM_IGNORE_EDCCA); } BOOLEAN Phydm_Adaptivity( IN PVOID pDM_VOID, IN u1Byte IGI ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; s1Byte TH_L2H_dmc, TH_H2L_dmc, L2H_nolink_Band4 = 0x7f, H2L_nolink_Band4 = 0x7f; s1Byte Diff, IGI_target; BOOLEAN EDCCA_State = FALSE; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PADAPTER pAdapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); BOOLEAN bFwCurrentInPSMode=FALSE; PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_FW_PSMODE_STATUS, (pu1Byte)(&bFwCurrentInPSMode)); // Disable EDCCA mode while under LPS mode, added by Roger, 2012.09.14. if(bFwCurrentInPSMode) return FALSE; #endif if(!(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)) { ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Go to odm_DynamicEDCCA() \n")); // Add by Neil Chen to enable edcca to MP Platform #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) // Adjust EDCCA. if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) Phydm_DynamicEDCCA(pDM_Odm); #endif return FALSE; } #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) if(pMgntInfo->RegEnableAdaptivity== 2) #else if (pDM_Odm->Adapter->registrypriv.adaptivity_en == 2) #endif { if(pDM_Odm->Carrier_Sense_enable == FALSE) // check domain Code for Adaptivity or CarrierSense { if ((*pDM_Odm->pBandType == ODM_BAND_5G) && !(pDM_Odm->odm_Regulation5G == REGULATION_ETSI || pDM_Odm->odm_Regulation5G == REGULATION_WW)) { ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Adaptivity skip 5G domain code : %d \n", pDM_Odm->odm_Regulation5G)); return FALSE; } else if((*pDM_Odm->pBandType == ODM_BAND_2_4G) && !(pDM_Odm->odm_Regulation2_4G == REGULATION_ETSI || pDM_Odm->odm_Regulation2_4G == REGULATION_WW)) { ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Adaptivity skip 2.4G domain code : %d \n", pDM_Odm->odm_Regulation2_4G)); return FALSE; } else if ((*pDM_Odm->pBandType != ODM_BAND_2_4G) && (*pDM_Odm->pBandType != ODM_BAND_5G)) { ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Adaptivity neither 2G nor 5G band, return\n")); return FALSE; } } else { if ((*pDM_Odm->pBandType == ODM_BAND_5G) && !(pDM_Odm->odm_Regulation5G == REGULATION_ETSI || pDM_Odm->odm_Regulation5G == REGULATION_WW)) { ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("CarrierSense skip 5G domain code : %d\n", pDM_Odm->odm_Regulation5G)); return FALSE; } else if((*pDM_Odm->pBandType == ODM_BAND_2_4G) && !(pDM_Odm->odm_Regulation2_4G == REGULATION_ETSI || pDM_Odm->odm_Regulation2_4G == REGULATION_WW)) { ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("CarrierSense skip 2.4G domain code : %d\n", pDM_Odm->odm_Regulation2_4G)); return FALSE; } else if ((*pDM_Odm->pBandType != ODM_BAND_2_4G) && (*pDM_Odm->pBandType != ODM_BAND_5G)) { ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("CarrierSense neither 2G nor 5G band, return\n")); return FALSE; } } } #endif ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("odm_Adaptivity() =====> \n")); ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("ForceEDCCA=%d, IGI_Base=0x%x, TH_L2H_ini = %d, TH_EDCCA_HL_diff = %d, AdapEn_RSSI = %d\n", pDM_Odm->ForceEDCCA, pDM_Odm->IGI_Base, pDM_Odm->TH_L2H_ini, pDM_Odm->TH_EDCCA_HL_diff, pDM_Odm->AdapEn_RSSI)); if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ODM_SetBBReg(pDM_Odm, 0x800, BIT10, 0); //ADC_mask enable if(*pDM_Odm->pBandWidth == ODM_BW20M) //CHANNEL_WIDTH_20 IGI_target = pDM_Odm->IGI_Base; else if(*pDM_Odm->pBandWidth == ODM_BW40M) IGI_target = pDM_Odm->IGI_Base + 2; else if(*pDM_Odm->pBandWidth == ODM_BW80M) IGI_target = pDM_Odm->IGI_Base + 2; else IGI_target = pDM_Odm->IGI_Base; pDM_Odm->IGI_target = (u1Byte) IGI_target; if(*pDM_Odm->pChannel >= 149) // Band4 -> for AP : mode2, for sd4 and sd7 : turnoff adaptivity { #if (DM_ODM_SUPPORT_TYPE & ODM_AP) if(pDM_Odm->bLinked) { Diff = IGI_target -(s1Byte)IGI; L2H_nolink_Band4 = pDM_Odm->TH_L2H_ini_mode2 + Diff; if(L2H_nolink_Band4 > 10) L2H_nolink_Band4 = 10; H2L_nolink_Band4 = L2H_nolink_Band4 - pDM_Odm->TH_EDCCA_HL_diff_mode2; } #endif Phydm_SetEDCCAThreshold(pDM_Odm, H2L_nolink_Band4, L2H_nolink_Band4); return FALSE; } if(!pDM_Odm->ForceEDCCA) { if(pDM_Odm->RSSI_Min > pDM_Odm->AdapEn_RSSI) EDCCA_State = 1; else if(pDM_Odm->RSSI_Min < (pDM_Odm->AdapEn_RSSI - 5)) EDCCA_State = 0; } else EDCCA_State = 1; if(pDM_Odm->Carrier_Sense_enable == FALSE && pDM_Odm->NHM_enable == TRUE) Phydm_NHMBB(pDM_Odm); ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("BandWidth=%s, IGI_target=0x%x, EDCCA_State=%d, EDCCA_enable_state = %d\n", (*pDM_Odm->pBandWidth==ODM_BW80M)?"80M":((*pDM_Odm->pBandWidth==ODM_BW40M)?"40M":"20M"), IGI_target, EDCCA_State, pDM_Odm->EDCCA_enable_state)); ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("RSSI_min = %d, AdapIGIUpper= 0x %x\n", pDM_Odm->RSSI_Min, pDM_Odm->Adaptivity_IGI_upper)); if(EDCCA_State == 1) { Diff = IGI_target -(s1Byte)IGI; TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff; if(TH_L2H_dmc > 10) TH_L2H_dmc = 10; TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; //replace lower bound to prevent EDCCA always equal 1 if(TH_H2L_dmc < pDM_Odm->H2L_lb) TH_H2L_dmc = pDM_Odm->H2L_lb; if(TH_L2H_dmc < pDM_Odm->L2H_lb) TH_L2H_dmc = pDM_Odm->L2H_lb; } else { TH_L2H_dmc = 0x7f; TH_H2L_dmc = 0x7f; } ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("IGI=0x%x, TH_L2H_dmc = %d, TH_H2L_dmc = %d, adaptivity_flg = %d, bAdaOn = %d, DynamicLinkAdaptivity = %d, NHM_enable = %d\n", IGI, TH_L2H_dmc, TH_H2L_dmc, pDM_Odm->adaptivity_flag, pDM_Odm->bAdaOn, pDM_Odm->DynamicLinkAdaptivity, pDM_Odm->NHM_enable)); Phydm_SetEDCCAThreshold(pDM_Odm, TH_H2L_dmc, TH_L2H_dmc); return TRUE; } #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) VOID Phydm_EnableEDCCA( IN PVOID pDM_VOID ) { // This should be moved out of OUTSRC PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PADAPTER pAdapter = pDM_Odm->Adapter; // Enable EDCCA. The value is suggested by SD3 Wilson. // // Revised for ASUS 11b/g performance issues, suggested by BB Neil, 2012.04.13. // if((pDM_Odm->SupportICType == ODM_RTL8723A)&&(IS_WIRELESS_MODE_G(pAdapter))) { //PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold, 0x00); ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold,0x00); ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold+2,0xFD); } else { //PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold, 0x03); ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold,0x03); ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold+2,0x00); } //PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold+2, 0x00); } VOID Phydm_DisableEDCCA( IN PVOID pDM_VOID ) { // Disable EDCCA.. PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ODM_Write1Byte(pDM_Odm, rOFDM0_ECCAThreshold, 0x7f); ODM_Write1Byte(pDM_Odm, rOFDM0_ECCAThreshold+2, 0x7f); } // // Description: According to initial gain value to determine to enable or disable EDCCA. // // Suggested by SD3 Wilson. Added by tynli. 2011.11.25. // VOID Phydm_DynamicEDCCA( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PADAPTER pAdapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); u1Byte RegC50, RegC58; BOOLEAN bEDCCAenable = FALSE; #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) BOOLEAN bFwCurrentInPSMode=FALSE; pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_FW_PSMODE_STATUS, (pu1Byte)(&bFwCurrentInPSMode)); // Disable EDCCA mode while under LPS mode, added by Roger, 2012.09.14. if(bFwCurrentInPSMode) return; #endif // // 2013/11/14 Ken According to BB team Jame's suggestion, we need to disable soft AP mode EDCCA. // 2014/01/08 MH For Miracst AP mode test. We need to disable EDCCA. Otherwise, we may stop // to send beacon in noisy environment or platform. // if(ACTING_AS_AP(pAdapter) || ACTING_AS_AP(GetFirstAPAdapter(pAdapter))) //if(ACTING_AS_AP(pAdapter)) { ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("At least One Port as AP disable EDCCA\n")); Phydm_DisableEDCCA(pDM_Odm); if(pHalData->bPreEdccaEnable) Phydm_DisableEDCCA(pDM_Odm); pHalData->bPreEdccaEnable = FALSE; return; } RegC50 = (u1Byte)ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0); RegC58 = (u1Byte)ODM_GetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0); if((RegC50 > 0x28 && RegC58 > 0x28) || ((pDM_Odm->SupportICType == ODM_RTL8723A && IS_WIRELESS_MODE_G(pAdapter) && RegC50>0x26)) || (pDM_Odm->SupportICType == ODM_RTL8188E && RegC50 > 0x28)) { if(!pHalData->bPreEdccaEnable) { Phydm_EnableEDCCA(pDM_Odm); pHalData->bPreEdccaEnable = TRUE; } } else if((RegC50 < 0x25 && RegC58 < 0x25) || (pDM_Odm->SupportICType == ODM_RTL8188E && RegC50 < 0x25)) { if(pHalData->bPreEdccaEnable) { Phydm_DisableEDCCA(pDM_Odm); pHalData->bPreEdccaEnable = FALSE; } } } #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/PhyDM_Adaptivity.h000066400000000000000000000054261261122257400226210ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __PHYDMADAPTIVITY_H__ #define __PHYDMADAPTIVITY_H__ #define ADAPTIVITY_VERSION "7.1" #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) typedef enum _tag_PhyDM_REGULATION_Type { REGULATION_FCC = 0, REGULATION_MKK = 1, REGULATION_ETSI = 2, REGULATION_WW = 3, MAX_REGULATION_NUM = 4 } PhyDM_REGULATION_TYPE; #endif typedef enum tag_PhyDM_TRx_MUX_Type { PhyDM_SHUTDOWN = 0, PhyDM_STANDBY_MODE = 1, PhyDM_TX_MODE = 2, PhyDM_RX_MODE = 3 }PhyDM_Trx_MUX_Type; typedef enum tag_PhyDM_MACEDCCA_Type { PhyDM_IGNORE_EDCCA = 0, PhyDM_DONT_IGNORE_EDCCA = 1 }PhyDM_MACEDCCA_Type; VOID Phydm_CheckAdaptivity( IN PVOID pDM_VOID ); VOID Phydm_CheckEnvironment( IN PVOID pDM_VOID ); VOID Phydm_NHMCounterStatisticsInit( IN PVOID pDM_VOID ); VOID Phydm_NHMCounterStatistics( IN PVOID pDM_VOID ); VOID Phydm_NHMBBInit( IN PVOID pDM_VOID ); VOID Phydm_NHMBB( IN PVOID pDM_VOID ); VOID Phydm_NHMCounterStatisticsReset( IN PVOID pDM_VOID ); VOID Phydm_GetNHMCounterStatistics( IN PVOID pDM_VOID ); VOID Phydm_MACEDCCAState( IN PVOID pDM_VOID, IN PhyDM_MACEDCCA_Type State ); VOID Phydm_SetEDCCAThreshold( IN PVOID pDM_VOID, IN s1Byte H2L, IN s1Byte L2H ); VOID Phydm_SetTRxMux( IN PVOID pDM_VOID, IN PhyDM_Trx_MUX_Type txMode, IN PhyDM_Trx_MUX_Type rxMode ); BOOLEAN Phydm_CalNHMcnt( IN PVOID pDM_VOID ); VOID Phydm_SearchPwdBLowerBound( IN PVOID pDM_VOID ); VOID Phydm_AdaptivityInit( IN PVOID pDM_VOID ); BOOLEAN Phydm_Adaptivity( IN PVOID pDM_VOID, IN u1Byte IGI ); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) VOID Phydm_DisableEDCCA( IN PVOID pDM_VOID ); VOID Phydm_DynamicEDCCA( IN PVOID pDM_VOID ); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm.c000066400000000000000000001655271261122257400205670ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // include files //============================================================ #include "Mp_Precomp.h" #include "phydm_precomp.h" const u2Byte dB_Invert_Table[8][12] = { { 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4}, { 4, 5, 6, 6, 7, 8, 9, 10, 11, 13, 14, 16}, { 18, 20, 22, 25, 28, 32, 35, 40, 45, 50, 56, 63}, { 71, 79, 89, 100, 112, 126, 141, 158, 178, 200, 224, 251}, { 282, 316, 355, 398, 447, 501, 562, 631, 708, 794, 891, 1000}, { 1122, 1259, 1413, 1585, 1778, 1995, 2239, 2512, 2818, 3162, 3548, 3981}, { 4467, 5012, 5623, 6310, 7079, 7943, 8913, 10000, 11220, 12589, 14125, 15849}, { 17783, 19953, 22387, 25119, 28184, 31623, 35481, 39811, 44668, 50119, 56234, 65535}}; //============================================================ // Local Function predefine. //============================================================ VOID odm_SwAntDetectInit( IN PDM_ODM_T pDM_Odm ); VOID odm_AntennaDiversityInit( IN PDM_ODM_T pDM_Odm ); VOID odm_AntennaDiversity( IN PDM_ODM_T pDM_Odm ); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) VOID ODM_UpdateInitRateWorkItemCallback( IN PVOID pContext ); #endif VOID odm_GlobalAdapterCheck( IN VOID ); //Remove RAMask by RS_James VOID odm_IQCalibrate( IN PDM_ODM_T pDM_Odm ); //remove PT by Yuchen //Remove Edca by Yu Chen VOID odm_UpdatePowerTrainingState( IN PDM_ODM_T pDM_Odm ); VOID ODM_AsocEntry_Init( IN PDM_ODM_T pDM_Odm ); //============================================================ //3 Export Interface //============================================================ VOID ODM_InitMpDriverStatus( IN PDM_ODM_T pDM_Odm ) { #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) // Decide when compile time #if(MP_DRIVER == 1) pDM_Odm->mp_mode = TRUE; #else pDM_Odm->mp_mode = FALSE; #endif #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) PADAPTER Adapter = pDM_Odm->Adapter; // Update information every period pDM_Odm->mp_mode = (BOOLEAN)Adapter->registrypriv.mp_mode; #else // MP mode is always false at AP side pDM_Odm->mp_mode = FALSE; #endif } VOID ODM_UpdateMpDriverStatus( IN PDM_ODM_T pDM_Odm ) { #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) // Do nothing. #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) PADAPTER Adapter = pDM_Odm->Adapter; // Update information erery period pDM_Odm->mp_mode = (BOOLEAN)Adapter->registrypriv.mp_mode; #else // Do nothing. #endif } VOID odm_CommonInfoSelfInit( IN PDM_ODM_T pDM_Odm ) { pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; pDM_Odm->bCckHighPower = (BOOLEAN) ODM_GetBBReg(pDM_Odm, ODM_REG(CCK_RPT_FORMAT,pDM_Odm), ODM_BIT(CCK_RPT_FORMAT,pDM_Odm)); pDM_Odm->RFPathRxEnable = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(BB_RX_PATH,pDM_Odm), ODM_BIT(BB_RX_PATH,pDM_Odm)); #if (DM_ODM_SUPPORT_TYPE != ODM_CE) pDM_Odm->pbNet_closed = &pDM_Odm->BOOLEAN_temp; #endif PHYDM_InitDebugSetting(pDM_Odm); ODM_InitMpDriverStatus(pDM_Odm); pDM_Odm->TxRate = 0xFF; } VOID odm_CommonInfoSelfUpdate( IN PDM_ODM_T pDM_Odm ) { u1Byte EntryCnt=0; u1Byte i; PSTA_INFO_T pEntry; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; pEntry = pDM_Odm->pODM_StaInfo[0]; if(pMgntInfo->mAssoc) { pEntry->bUsed=TRUE; for (i=0; i<6; i++) pEntry->MacAddr[i] = pMgntInfo->Bssid[i]; } else { pEntry->bUsed=FALSE; for (i=0; i<6; i++) pEntry->MacAddr[i] = 0; } //STA mode is linked to AP if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[0]) && !ACTING_AS_AP(Adapter)) pDM_Odm->bsta_state = TRUE; else pDM_Odm->bsta_state = FALSE; #endif if(*(pDM_Odm->pBandWidth) == ODM_BW40M) { if(*(pDM_Odm->pSecChOffset) == 1) pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) -2; else if(*(pDM_Odm->pSecChOffset) == 2) pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) +2; } else pDM_Odm->ControlChannel = *(pDM_Odm->pChannel); for (i=0; ipODM_StaInfo[i]; if(IS_STA_VALID(pEntry)) EntryCnt++; } if(EntryCnt == 1) pDM_Odm->bOneEntryOnly = TRUE; else pDM_Odm->bOneEntryOnly = FALSE; // Update MP driver status ODM_UpdateMpDriverStatus(pDM_Odm); } VOID odm_CommonInfoSelfReset( IN PDM_ODM_T pDM_Odm ) { #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) pDM_Odm->PhyDbgInfo.NumQryBeaconPkt = 0; #endif } PVOID PhyDM_Get_Structure( IN PDM_ODM_T pDM_Odm, IN u1Byte Structure_Type ) { PVOID pStruct = NULL; #if RTL8195A_SUPPORT switch (Structure_Type){ case PhyDM_FalseAlmCnt: pStruct = &FalseAlmCnt; break; case PhyDM_CfoTrack: pStruct = &DM_CfoTrack; break; default: break; } #else switch (Structure_Type){ case PhyDM_FalseAlmCnt: pStruct = &(pDM_Odm->FalseAlmCnt); break; case PhyDM_CfoTrack: pStruct = &(pDM_Odm->DM_CfoTrack); break; default: break; } #endif return pStruct; } VOID odm_HWSetting( IN PDM_ODM_T pDM_Odm ) { #if (RTL8821A_SUPPORT == 1) if(pDM_Odm->SupportICType & ODM_RTL8821) odm_HWSetting_8821A(pDM_Odm); #endif } // // 2011/09/21 MH Add to describe different team necessary resource allocate?? // VOID ODM_DMInit( IN PDM_ODM_T pDM_Odm ) { odm_CommonInfoSelfInit(pDM_Odm); odm_DIGInit(pDM_Odm); Phydm_NHMCounterStatisticsInit(pDM_Odm); Phydm_AdaptivityInit(pDM_Odm); odm_RateAdaptiveMaskInit(pDM_Odm); ODM_CfoTrackingInit(pDM_Odm); ODM_EdcaTurboInit(pDM_Odm); odm_RSSIMonitorInit(pDM_Odm); odm_TXPowerTrackingInit(pDM_Odm); odm_AntennaDiversityInit(pDM_Odm); odm_AutoChannelSelectInit(pDM_Odm); #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ODM_ClearTxPowerTrackingState(pDM_Odm); odm_PathDiversityInit(pDM_Odm); #endif if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { odm_DynamicBBPowerSavingInit(pDM_Odm); odm_DynamicTxPowerInit(pDM_Odm); #if (RTL8188E_SUPPORT == 1) if(pDM_Odm->SupportICType==ODM_RTL8188E) { odm_PrimaryCCA_Init(pDM_Odm); ODM_RAInfo_Init_all(pDM_Odm); } #endif #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) #if (RTL8723B_SUPPORT == 1) if(pDM_Odm->SupportICType == ODM_RTL8723B) odm_SwAntDetectInit(pDM_Odm); #endif #if (RTL8192E_SUPPORT == 1) if(pDM_Odm->SupportICType==ODM_RTL8192E) odm_PrimaryCCA_Check_Init(pDM_Odm); #endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #if (RTL8723A_SUPPORT == 1) if(pDM_Odm->SupportICType == ODM_RTL8723A) odm_PSDMonitorInit(pDM_Odm); #endif #if (RTL8192D_SUPPORT == 1) if(pDM_Odm->SupportICType==ODM_RTL8192D) odm_PathDivInit_92D(pDM_Odm); #endif #if ((RTL8192C_SUPPORT == 1) || (RTL8192D_SUPPORT == 1)) if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D)) odm_RXHPInit(pDM_Odm); #endif #endif #endif } } VOID ODM_DMReset( IN PDM_ODM_T pDM_Odm ) { #if (defined(CONFIG_HW_ANTENNA_DIVERSITY)) ODM_AntDivReset(pDM_Odm); #endif } // // 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. // You can not add any dummy function here, be care, you can only use DM structure // to perform any new ODM_DM. // VOID ODM_DMWatchdog( IN PDM_ODM_T pDM_Odm ) { ODM_AsocEntry_Init(pDM_Odm); odm_CommonInfoSelfUpdate(pDM_Odm); phydm_BasicDbgMessage(pDM_Odm); odm_HWSetting(pDM_Odm); odm_FalseAlarmCounterStatistics(pDM_Odm); odm_RSSIMonitorCheck(pDM_Odm); if(*(pDM_Odm->pbPowerSaving) == TRUE) { odm_DIGbyRSSI_LPS(pDM_Odm); ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("DMWatchdog in power saving mode\n")); return; } Phydm_CheckAdaptivity(pDM_Odm); odm_UpdatePowerTrainingState(pDM_Odm); odm_DIG(pDM_Odm); { pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; pDM_Odm->bAdaOn = Phydm_Adaptivity(pDM_Odm, pDM_DigTable->CurIGValue); } odm_CCKPacketDetectionThresh(pDM_Odm); odm_RefreshRateAdaptiveMask(pDM_Odm); odm_RefreshBasicRateMask(pDM_Odm); odm_DynamicBBPowerSaving(pDM_Odm); odm_EdcaTurboCheck(pDM_Odm); odm_PathDiversity(pDM_Odm); ODM_CfoTracking(pDM_Odm); odm_DynamicTxPower(pDM_Odm); odm_AntennaDiversity(pDM_Odm); #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) ODM_TXPowerTrackingCheck(pDM_Odm); if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) odm_IQCalibrate(pDM_Odm); else #endif if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { #if (RTL8192D_SUPPORT == 1) if(pDM_Odm->SupportICType==ODM_RTL8192D) ODM_DynamicEarlyMode(pDM_Odm); #endif #if (RTL8188E_SUPPORT == 1) if(pDM_Odm->SupportICType==ODM_RTL8188E) odm_DynamicPrimaryCCA(pDM_Odm); #endif #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) #if (RTL8192E_SUPPORT == 1) if(pDM_Odm->SupportICType==ODM_RTL8192E) odm_DynamicPrimaryCCA_Check(pDM_Odm); #endif #if( DM_ODM_SUPPORT_TYPE == ODM_WIN) #if ((RTL8192C_SUPPORT == 1) || (RTL8192D_SUPPORT == 1)) if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D)) odm_RXHP(pDM_Odm); #endif #endif #endif } #if (DM_ODM_SUPPORT_TYPE == ODM_CE) odm_dtc(pDM_Odm); #endif odm_CommonInfoSelfReset(pDM_Odm); } // // Init /.. Fixed HW value. Only init time. // VOID ODM_CmnInfoInit( IN PDM_ODM_T pDM_Odm, IN ODM_CMNINFO_E CmnInfo, IN u4Byte Value ) { // // This section is used for init value // switch (CmnInfo) { // // Fixed ODM value. // case ODM_CMNINFO_ABILITY: pDM_Odm->SupportAbility = (u4Byte)Value; break; case ODM_CMNINFO_RF_TYPE: pDM_Odm->RFType = (u1Byte)Value; break; case ODM_CMNINFO_PLATFORM: pDM_Odm->SupportPlatform = (u1Byte)Value; break; case ODM_CMNINFO_INTERFACE: pDM_Odm->SupportInterface = (u1Byte)Value; break; case ODM_CMNINFO_MP_TEST_CHIP: pDM_Odm->bIsMPChip= (u1Byte)Value; break; case ODM_CMNINFO_IC_TYPE: pDM_Odm->SupportICType = Value; break; case ODM_CMNINFO_CUT_VER: pDM_Odm->CutVersion = (u1Byte)Value; break; case ODM_CMNINFO_FAB_VER: pDM_Odm->FabVersion = (u1Byte)Value; break; case ODM_CMNINFO_RFE_TYPE: pDM_Odm->RFEType = (u1Byte)Value; break; case ODM_CMNINFO_RF_ANTENNA_TYPE: pDM_Odm->AntDivType= (u1Byte)Value; break; case ODM_CMNINFO_BOARD_TYPE: pDM_Odm->BoardType = (u1Byte)Value; break; case ODM_CMNINFO_PACKAGE_TYPE: pDM_Odm->PackageType = (u1Byte)Value; break; case ODM_CMNINFO_EXT_LNA: pDM_Odm->ExtLNA = (u1Byte)Value; break; case ODM_CMNINFO_5G_EXT_LNA: pDM_Odm->ExtLNA5G = (u1Byte)Value; break; case ODM_CMNINFO_EXT_PA: pDM_Odm->ExtPA = (u1Byte)Value; break; case ODM_CMNINFO_5G_EXT_PA: pDM_Odm->ExtPA5G = (u1Byte)Value; break; case ODM_CMNINFO_GPA: pDM_Odm->TypeGPA= (ODM_TYPE_GPA_E)Value; break; case ODM_CMNINFO_APA: pDM_Odm->TypeAPA= (ODM_TYPE_APA_E)Value; break; case ODM_CMNINFO_GLNA: pDM_Odm->TypeGLNA= (ODM_TYPE_GLNA_E)Value; break; case ODM_CMNINFO_ALNA: pDM_Odm->TypeALNA= (ODM_TYPE_ALNA_E)Value; break; case ODM_CMNINFO_EXT_TRSW: pDM_Odm->ExtTRSW = (u1Byte)Value; break; case ODM_CMNINFO_PATCH_ID: pDM_Odm->PatchID = (u1Byte)Value; break; case ODM_CMNINFO_BINHCT_TEST: pDM_Odm->bInHctTest = (BOOLEAN)Value; break; case ODM_CMNINFO_BWIFI_TEST: pDM_Odm->bWIFITest = (BOOLEAN)Value; break; case ODM_CMNINFO_SMART_CONCURRENT: pDM_Odm->bDualMacSmartConcurrent = (BOOLEAN )Value; break; case ODM_CMNINFO_DOMAIN_CODE_2G: pDM_Odm->odm_Regulation2_4G = (u1Byte)Value; break; case ODM_CMNINFO_DOMAIN_CODE_5G: pDM_Odm->odm_Regulation5G = (u1Byte)Value; break; case ODM_CMNINFO_IQKFWOFFLOAD: pDM_Odm->IQKFWOffload = (u1Byte)Value; break; //To remove the compiler warning, must add an empty default statement to handle the other values. default: //do nothing break; } } VOID ODM_CmnInfoHook( IN PDM_ODM_T pDM_Odm, IN ODM_CMNINFO_E CmnInfo, IN PVOID pValue ) { // // Hook call by reference pointer. // switch (CmnInfo) { // // Dynamic call by reference pointer. // case ODM_CMNINFO_MAC_PHY_MODE: pDM_Odm->pMacPhyMode = (u1Byte *)pValue; break; case ODM_CMNINFO_TX_UNI: pDM_Odm->pNumTxBytesUnicast = (u8Byte *)pValue; break; case ODM_CMNINFO_RX_UNI: pDM_Odm->pNumRxBytesUnicast = (u8Byte *)pValue; break; case ODM_CMNINFO_WM_MODE: pDM_Odm->pWirelessMode = (u1Byte *)pValue; break; case ODM_CMNINFO_BAND: pDM_Odm->pBandType = (u1Byte *)pValue; break; case ODM_CMNINFO_SEC_CHNL_OFFSET: pDM_Odm->pSecChOffset = (u1Byte *)pValue; break; case ODM_CMNINFO_SEC_MODE: pDM_Odm->pSecurity = (u1Byte *)pValue; break; case ODM_CMNINFO_BW: pDM_Odm->pBandWidth = (u1Byte *)pValue; break; case ODM_CMNINFO_CHNL: pDM_Odm->pChannel = (u1Byte *)pValue; break; case ODM_CMNINFO_DMSP_GET_VALUE: pDM_Odm->pbGetValueFromOtherMac = (BOOLEAN *)pValue; break; case ODM_CMNINFO_BUDDY_ADAPTOR: pDM_Odm->pBuddyAdapter = (PADAPTER *)pValue; break; case ODM_CMNINFO_DMSP_IS_MASTER: pDM_Odm->pbMasterOfDMSP = (BOOLEAN *)pValue; break; case ODM_CMNINFO_SCAN: pDM_Odm->pbScanInProcess = (BOOLEAN *)pValue; break; case ODM_CMNINFO_POWER_SAVING: pDM_Odm->pbPowerSaving = (BOOLEAN *)pValue; break; case ODM_CMNINFO_ONE_PATH_CCA: pDM_Odm->pOnePathCCA = (u1Byte *)pValue; break; case ODM_CMNINFO_DRV_STOP: pDM_Odm->pbDriverStopped = (BOOLEAN *)pValue; break; case ODM_CMNINFO_PNP_IN: pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep = (BOOLEAN *)pValue; break; case ODM_CMNINFO_INIT_ON: pDM_Odm->pinit_adpt_in_progress = (BOOLEAN *)pValue; break; case ODM_CMNINFO_ANT_TEST: pDM_Odm->pAntennaTest = (u1Byte *)pValue; break; case ODM_CMNINFO_NET_CLOSED: pDM_Odm->pbNet_closed = (BOOLEAN *)pValue; break; case ODM_CMNINFO_FORCED_RATE: pDM_Odm->pForcedDataRate = (pu2Byte)pValue; break; case ODM_CMNINFO_FORCED_IGI_LB: pDM_Odm->pu1ForcedIgiLb = (u1Byte *)pValue; break; case ODM_CMNINFO_P2P_LINK: pDM_Odm->DM_DigTable.pbP2pLinkInProgress = (u1Byte *)pValue; break; case ODM_CMNINFO_FCS_MODE: pDM_Odm->pIsFcsModeEnable = (BOOLEAN *)pValue; break; //sd7 only //case ODM_CMNINFO_RTSTA_AID: // pDM_Odm->pAidMap = (u1Byte *)pValue; // break; //case ODM_CMNINFO_BT_COEXIST: // pDM_Odm->BTCoexist = (BOOLEAN *)pValue; //case ODM_CMNINFO_STA_STATUS: //pDM_Odm->pODM_StaInfo[] = (PSTA_INFO_T)pValue; //break; //case ODM_CMNINFO_PHY_STATUS: // pDM_Odm->pPhyInfo = (ODM_PHY_INFO *)pValue; // break; //case ODM_CMNINFO_MAC_STATUS: // pDM_Odm->pMacInfo = (ODM_MAC_INFO *)pValue; // break; //To remove the compiler warning, must add an empty default statement to handle the other values. default: //do nothing break; } } VOID ODM_CmnInfoPtrArrayHook( IN PDM_ODM_T pDM_Odm, IN ODM_CMNINFO_E CmnInfo, IN u2Byte Index, IN PVOID pValue ) { // // Hook call by reference pointer. // switch (CmnInfo) { // // Dynamic call by reference pointer. // case ODM_CMNINFO_STA_STATUS: pDM_Odm->pODM_StaInfo[Index] = (PSTA_INFO_T)pValue; break; //To remove the compiler warning, must add an empty default statement to handle the other values. default: //do nothing break; } } // // Update Band/CHannel/.. The values are dynamic but non-per-packet. // VOID ODM_CmnInfoUpdate( IN PDM_ODM_T pDM_Odm, IN u4Byte CmnInfo, IN u8Byte Value ) { // // This init variable may be changed in run time. // switch (CmnInfo) { case ODM_CMNINFO_LINK_IN_PROGRESS: pDM_Odm->bLinkInProcess = (BOOLEAN)Value; break; case ODM_CMNINFO_ABILITY: pDM_Odm->SupportAbility = (u4Byte)Value; break; case ODM_CMNINFO_RF_TYPE: pDM_Odm->RFType = (u1Byte)Value; break; case ODM_CMNINFO_WIFI_DIRECT: pDM_Odm->bWIFI_Direct = (BOOLEAN)Value; break; case ODM_CMNINFO_WIFI_DISPLAY: pDM_Odm->bWIFI_Display = (BOOLEAN)Value; break; case ODM_CMNINFO_LINK: pDM_Odm->bLinked = (BOOLEAN)Value; break; case ODM_CMNINFO_STATION_STATE: pDM_Odm->bsta_state = (BOOLEAN)Value; break; case ODM_CMNINFO_RSSI_MIN: pDM_Odm->RSSI_Min= (u1Byte)Value; break; case ODM_CMNINFO_DBG_COMP: pDM_Odm->DebugComponents = Value; break; case ODM_CMNINFO_DBG_LEVEL: pDM_Odm->DebugLevel = (u4Byte)Value; break; case ODM_CMNINFO_RA_THRESHOLD_HIGH: pDM_Odm->RateAdaptive.HighRSSIThresh = (u1Byte)Value; break; case ODM_CMNINFO_RA_THRESHOLD_LOW: pDM_Odm->RateAdaptive.LowRSSIThresh = (u1Byte)Value; break; // The following is for BT HS mode and BT coexist mechanism. case ODM_CMNINFO_BT_ENABLED: pDM_Odm->bBtEnabled = (BOOLEAN)Value; break; case ODM_CMNINFO_BT_HS_CONNECT_PROCESS: pDM_Odm->bBtConnectProcess = (BOOLEAN)Value; break; case ODM_CMNINFO_BT_HS_RSSI: pDM_Odm->btHsRssi = (u1Byte)Value; break; case ODM_CMNINFO_BT_OPERATION: pDM_Odm->bBtHsOperation = (BOOLEAN)Value; break; case ODM_CMNINFO_BT_LIMITED_DIG: pDM_Odm->bBtLimitedDig = (BOOLEAN)Value; break; case ODM_CMNINFO_BT_DISABLE_EDCA: pDM_Odm->bBtDisableEdcaTurbo = (BOOLEAN)Value; break; #if(DM_ODM_SUPPORT_TYPE & ODM_AP) // for repeater mode add by YuChen 2014.06.23 #ifdef UNIVERSAL_REPEATER case ODM_CMNINFO_VXD_LINK: pDM_Odm->VXD_bLinked= (BOOLEAN)Value; break; #endif #endif /* case ODM_CMNINFO_OP_MODE: pDM_Odm->OPMode = (u1Byte)Value; break; case ODM_CMNINFO_WM_MODE: pDM_Odm->WirelessMode = (u1Byte)Value; break; case ODM_CMNINFO_BAND: pDM_Odm->BandType = (u1Byte)Value; break; case ODM_CMNINFO_SEC_CHNL_OFFSET: pDM_Odm->SecChOffset = (u1Byte)Value; break; case ODM_CMNINFO_SEC_MODE: pDM_Odm->Security = (u1Byte)Value; break; case ODM_CMNINFO_BW: pDM_Odm->BandWidth = (u1Byte)Value; break; case ODM_CMNINFO_CHNL: pDM_Odm->Channel = (u1Byte)Value; break; */ default: //do nothing break; } } #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) VOID ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm ) { #if USE_WORKITEM PADAPTER pAdapter = pDM_Odm->Adapter; ODM_InitializeWorkItem( pDM_Odm, &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem_8723B, (RT_WORKITEM_CALL_BACK)ODM_SW_AntDiv_WorkitemCallback, (PVOID)pAdapter, "AntennaSwitchWorkitem"); ODM_InitializeWorkItem( pDM_Odm, &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem, (RT_WORKITEM_CALL_BACK)odm_SwAntDivChkAntSwitchWorkitemCallback, (PVOID)pAdapter, "AntennaSwitchWorkitem"); ODM_InitializeWorkItem( pDM_Odm, &(pDM_Odm->PathDivSwitchWorkitem), (RT_WORKITEM_CALL_BACK)odm_PathDivChkAntSwitchWorkitemCallback, (PVOID)pAdapter, "SWAS_WorkItem"); ODM_InitializeWorkItem( pDM_Odm, &(pDM_Odm->CCKPathDiversityWorkitem), (RT_WORKITEM_CALL_BACK)odm_CCKTXPathDiversityWorkItemCallback, (PVOID)pAdapter, "CCKTXPathDiversityWorkItem"); ODM_InitializeWorkItem( pDM_Odm, &(pDM_Odm->MPT_DIGWorkitem), (RT_WORKITEM_CALL_BACK)odm_MPT_DIGWorkItemCallback, (PVOID)pAdapter, "MPT_DIGWorkitem"); ODM_InitializeWorkItem( pDM_Odm, &(pDM_Odm->RaRptWorkitem), (RT_WORKITEM_CALL_BACK)ODM_UpdateInitRateWorkItemCallback, (PVOID)pAdapter, "RaRptWorkitem"); #if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) #if (RTL8188E_SUPPORT == 1) ODM_InitializeWorkItem( pDM_Odm, &(pDM_Odm->FastAntTrainingWorkitem), (RT_WORKITEM_CALL_BACK)odm_FastAntTrainingWorkItemCallback, (PVOID)pAdapter, "FastAntTrainingWorkitem"); #endif #endif ODM_InitializeWorkItem( pDM_Odm, &(pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem), (RT_WORKITEM_CALL_BACK)odm_PSD_RXHPWorkitemCallback, (PVOID)pAdapter, "PSDRXHP_WorkItem"); #endif } VOID ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm ) { #if USE_WORKITEM ODM_FreeWorkItem( &(pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem_8723B)); ODM_FreeWorkItem( &(pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem)); ODM_FreeWorkItem(&(pDM_Odm->PathDivSwitchWorkitem)); ODM_FreeWorkItem(&(pDM_Odm->CCKPathDiversityWorkitem)); ODM_FreeWorkItem(&(pDM_Odm->FastAntTrainingWorkitem)); ODM_FreeWorkItem(&(pDM_Odm->MPT_DIGWorkitem)); ODM_FreeWorkItem(&(pDM_Odm->RaRptWorkitem)); ODM_FreeWorkItem((&pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem)); #endif } #endif /* VOID odm_FindMinimumRSSI( IN PDM_ODM_T pDM_Odm ) { u4Byte i; u1Byte RSSI_Min = 0xFF; for(i=0; ipODM_StaInfo[i] != NULL) if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) ) { if(pDM_Odm->pODM_StaInfo[i]->RSSI_Ave < RSSI_Min) { RSSI_Min = pDM_Odm->pODM_StaInfo[i]->RSSI_Ave; } } } pDM_Odm->RSSI_Min = RSSI_Min; } VOID odm_IsLinked( IN PDM_ODM_T pDM_Odm ) { u4Byte i; BOOLEAN Linked = FALSE; for(i=0; ipODM_StaInfo[i]) ) { Linked = TRUE; break; } } pDM_Odm->bLinked = Linked; } */ //3============================================================ //3 DIG //3============================================================ /*----------------------------------------------------------------------------- * Function: odm_DIGInit() * * Overview: Set DIG scheme init value. * * Input: NONE * * Output: NONE * * Return: NONE * * Revised History: * When Who Remark * *---------------------------------------------------------------------------*/ //Remove DIG by yuchen //Remove DIG and FA check by Yu Chen //3============================================================ //3 BB Power Save //3============================================================ //Remove BB power saving by Yuchen //3============================================================ //3 RATR MASK //3============================================================ //3============================================================ //3 Rate Adaptive //3============================================================ //Remove RAMask by RS_James //3============================================================ //3 Dynamic Tx Power //3============================================================ //Remove BY YuChen //Remove Rssimonitorcheck related function to odm_rssimonitorcheck.c VOID ODM_InitAllTimers( IN PDM_ODM_T pDM_Odm ) { #if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) ODM_AntDivTimers(pDM_Odm,INIT_ANTDIV_TIMMER); #elif(defined(CONFIG_SW_ANTENNA_DIVERSITY)) ODM_InitializeTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer, (RT_TIMER_CALL_BACK)odm_SwAntDivChkAntSwitchCallback, NULL, "SwAntennaSwitchTimer"); #endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PSDTimer, (RT_TIMER_CALL_BACK)dm_PSDMonitorCallback, NULL, "PSDTimer"); // //Path Diversity //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch. // ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer, (RT_TIMER_CALL_BACK)odm_PathDivChkAntSwitchCallback, NULL, "PathDivTimer"); ODM_InitializeTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, (RT_TIMER_CALL_BACK)odm_CCKTXPathDiversityCallback, NULL, "CCKPathDiversityTimer"); ODM_InitializeTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer, (RT_TIMER_CALL_BACK)odm_MPT_DIGCallback, NULL, "MPT_DIGTimer"); ODM_InitializeTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer, (RT_TIMER_CALL_BACK)odm_PSD_RXHPCallback, NULL, "PSDRXHPTimer"); #endif } VOID ODM_CancelAllTimers( IN PDM_ODM_T pDM_Odm ) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) // // 2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in // win7 platform. // HAL_ADAPTER_STS_CHK(pDM_Odm) #endif #if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) ODM_AntDivTimers(pDM_Odm,CANCEL_ANTDIV_TIMMER); #elif(defined(CONFIG_SW_ANTENNA_DIVERSITY)) ODM_CancelTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer); #endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer); // //Path Diversity //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch. // ODM_CancelTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer); ODM_CancelTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer); ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); ODM_CancelTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer); #endif } VOID ODM_ReleaseAllTimers( IN PDM_ODM_T pDM_Odm ) { #if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) ODM_AntDivTimers(pDM_Odm,RELEASE_ANTDIV_TIMMER); #elif(defined(CONFIG_SW_ANTENNA_DIVERSITY)) ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer); #endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PSDTimer); // //Path Diversity //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch. // ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer); ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer); ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer); #endif } //3============================================================ //3 Tx Power Tracking //3============================================================ VOID odm_IQCalibrate( IN PDM_ODM_T pDM_Odm ) { PADAPTER Adapter = pDM_Odm->Adapter; #if( DM_ODM_SUPPORT_TYPE == ODM_WIN) if(*pDM_Odm->pIsFcsModeEnable) return; #endif if(!IS_HARDWARE_TYPE_JAGUAR(Adapter)) return; else if(IS_HARDWARE_TYPE_8812AU(Adapter)) return; #if (RTL8821A_SUPPORT == 1) if(pDM_Odm->bLinked) { if((*pDM_Odm->pChannel != pDM_Odm->preChannel) && (!*pDM_Odm->pbScanInProcess)) { pDM_Odm->preChannel = *pDM_Odm->pChannel; pDM_Odm->LinkedInterval = 0; } if(pDM_Odm->LinkedInterval < 3) pDM_Odm->LinkedInterval++; if(pDM_Odm->LinkedInterval == 2) { // Mark out IQK flow to prevent tx stuck. by Maddest 20130306 // Open it verified by James 20130715 PHY_IQCalibrate_8821A(pDM_Odm, FALSE); } } else pDM_Odm->LinkedInterval = 0; #endif } //antenna mapping info // 1: right-side antenna // 2/0: left-side antenna //PDM_SWAT_Table->CCK_Ant1_Cnt /OFDM_Ant1_Cnt: for right-side antenna: Ant:1 RxDefaultAnt1 //PDM_SWAT_Table->CCK_Ant2_Cnt /OFDM_Ant2_Cnt: for left-side antenna: Ant:0 RxDefaultAnt2 // We select left antenna as default antenna in initial process, modify it as needed // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) // Only for 8723A SW ANT DIV INIT--2012--07--17 VOID odm_SwAntDivInit_NIC_8723A( IN PDM_ODM_T pDM_Odm) { pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; PADAPTER Adapter = pDM_Odm->Adapter; u1Byte btAntNum=BT_GetPgAntNum(Adapter); if(IS_HARDWARE_TYPE_8723A(Adapter)) { pDM_SWAT_Table->ANTA_ON =TRUE; // Set default antenna B status by PG if(btAntNum == 2) pDM_SWAT_Table->ANTB_ON = TRUE; else if(btAntNum == 1) pDM_SWAT_Table->ANTB_ON = FALSE; else pDM_SWAT_Table->ANTB_ON = TRUE; } } #endif //end #ifMP //3============================================================ //3 SW Antenna Diversity //3============================================================ VOID odm_AntennaDiversityInit( IN PDM_ODM_T pDM_Odm ) { if(pDM_Odm->mp_mode == TRUE) return; if(pDM_Odm->SupportICType & (ODM_OLD_IC_ANTDIV_SUPPORT)) { #if (RTL8192C_SUPPORT==1) ODM_OldIC_AntDiv_Init(pDM_Odm); #endif } else { #if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) ODM_AntDiv_Config(pDM_Odm); ODM_AntDivInit(pDM_Odm); #endif } } VOID odm_AntennaDiversity( IN PDM_ODM_T pDM_Odm ) { if(pDM_Odm->mp_mode == TRUE) return; if(pDM_Odm->SupportICType & (ODM_OLD_IC_ANTDIV_SUPPORT)) { #if (RTL8192C_SUPPORT==1) ODM_OldIC_AntDiv(pDM_Odm); #endif } else { #if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) ODM_AntDiv(pDM_Odm); #endif } } void odm_SwAntDetectInit( IN PDM_ODM_T pDM_Odm ) { pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; #if (RTL8723B_SUPPORT == 1) pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c = ODM_Read4Byte(pDM_Odm, rDPDT_control); #endif pDM_SWAT_Table->PreAntenna = MAIN_ANT; pDM_SWAT_Table->CurAntenna = MAIN_ANT; pDM_SWAT_Table->SWAS_NoLink_State = 0; } //============================================================ //EDCA Turbo //============================================================ //Remove Edca by Yuchen #if( DM_ODM_SUPPORT_TYPE == ODM_WIN) // // 2011/07/26 MH Add an API for testing IQK fail case. // BOOLEAN ODM_CheckPowerStatus( IN PADAPTER Adapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; RT_RF_POWER_STATE rtState; PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. if (pMgntInfo->init_adpt_in_progress == TRUE) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); return TRUE; } // // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. // Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); return FALSE; } return TRUE; } #endif // need to ODM CE Platform //move to here for ANT detection mechanism using #if ((DM_ODM_SUPPORT_TYPE == ODM_WIN)||(DM_ODM_SUPPORT_TYPE == ODM_CE)) u4Byte GetPSDData( IN PDM_ODM_T pDM_Odm, unsigned int point, u1Byte initial_gain_psd) { //unsigned int val, rfval; //int psd_report; u4Byte psd_report; //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); //Debug Message //val = PHY_QueryBBReg(Adapter,0x908, bMaskDWord); //DbgPrint("Reg908 = 0x%x\n",val); //val = PHY_QueryBBReg(Adapter,0xDF4, bMaskDWord); //rfval = PHY_QueryRFReg(Adapter, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask); //DbgPrint("RegDF4 = 0x%x, RFReg00 = 0x%x\n",val, rfval); //DbgPrint("PHYTXON = %x, OFDMCCA_PP = %x, CCKCCA_PP = %x, RFReg00 = %x\n", //(val&BIT25)>>25, (val&BIT14)>>14, (val&BIT15)>>15, rfval); //Set DCO frequency index, offset=(40MHz/SamplePts)*point ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point); //Start PSD calculation, Reg808[22]=0->1 ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1); //Need to wait for HW PSD report ODM_StallExecution(1000); ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0); //Read PSD report, Reg8B4[15:0] psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF; #if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE) && ( (RT_PLATFORM == PLATFORM_LINUX) || (RT_PLATFORM == PLATFORM_MACOSX)) psd_report = (u4Byte) (ConvertTo_dB(psd_report))+(u4Byte)(initial_gain_psd-0x1c); #else psd_report = (int) (20*log10((double)psd_report))+(int)(initial_gain_psd-0x1c); #endif return psd_report; } u4Byte ConvertTo_dB( u4Byte Value) { u1Byte i; u1Byte j; u4Byte dB; Value = Value & 0xFFFF; for (i=0;i<8;i++) { if (Value <= dB_Invert_Table[i][11]) { break; } } if (i >= 8) { return (96); // maximum 96 dB } for (j=0;j<12;j++) { if (Value <= dB_Invert_Table[i][j]) { break; } } dB = i*12 + j + 1; return (dB); } #endif #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE)) VOID odm_PHY_SaveAFERegisters( IN PDM_ODM_T pDM_Odm, IN pu4Byte AFEReg, IN pu4Byte AFEBackup, IN u4Byte RegisterNum ) { u4Byte i; //RT_DISP(FINIT, INIT_IQK, ("Save ADDA parameters.\n")); for( i = 0 ; i < RegisterNum ; i++){ AFEBackup[i] = ODM_GetBBReg(pDM_Odm, AFEReg[i], bMaskDWord); } } VOID odm_PHY_ReloadAFERegisters( IN PDM_ODM_T pDM_Odm, IN pu4Byte AFEReg, IN pu4Byte AFEBackup, IN u4Byte RegiesterNum ) { u4Byte i; //RT_DISP(FINIT, INIT_IQK, ("Reload ADDA power saving parameters !\n")); for(i = 0 ; i < RegiesterNum; i++) { ODM_SetBBReg(pDM_Odm, AFEReg[i], bMaskDWord, AFEBackup[i]); } } // // Description: // Set Single/Dual Antenna default setting for products that do not do detection in advance. // // Added by Joseph, 2012.03.22 // VOID ODM_SingleDualAntennaDefaultSetting( IN PDM_ODM_T pDM_Odm ) { pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; PADAPTER pAdapter = pDM_Odm->Adapter; u1Byte btAntNum = 2; #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) btAntNum=BT_GetPgAntNum(pAdapter); #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) #ifdef CONFIG_BT_COEXIST btAntNum = hal_btcoex_GetPgAntNum(pAdapter); #endif #endif // Set default antenna A and B status if(btAntNum == 2) { pDM_SWAT_Table->ANTA_ON=TRUE; pDM_SWAT_Table->ANTB_ON=TRUE; //RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("Dual antenna\n")); } #ifdef CONFIG_BT_COEXIST else if(btAntNum == 1) {// Set antenna A as default pDM_SWAT_Table->ANTA_ON=TRUE; pDM_SWAT_Table->ANTB_ON=FALSE; //RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("Single antenna\n")); } else { //RT_ASSERT(FALSE, ("Incorrect antenna number!!\n")); } #endif } //2 8723A ANT DETECT // // Description: // Implement IQK single tone for RF DPK loopback and BB PSD scanning. // This function is cooperated with BB team Neil. // // Added by Roger, 2011.12.15 // BOOLEAN ODM_SingleDualAntennaDetection( IN PDM_ODM_T pDM_Odm, IN u1Byte mode ) { PADAPTER pAdapter = pDM_Odm->Adapter; pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; u4Byte CurrentChannel,RfLoopReg; u1Byte n; u4Byte Reg88c, Regc08, Reg874, Regc50, Reg948=0, Regb2c=0, Reg92c=0, AFE_rRx_Wait_CCA=0; u1Byte initial_gain = 0x5a; u4Byte PSD_report_tmp; u4Byte AntA_report = 0x0, AntB_report = 0x0,AntO_report=0x0; BOOLEAN bResult = TRUE; u4Byte AFE_Backup[16]; u4Byte AFE_REG_8723A[16] = { rRx_Wait_CCA, rTx_CCK_RFON, rTx_CCK_BBON, rTx_OFDM_RFON, rTx_OFDM_BBON, rTx_To_Rx, rTx_To_Tx, rRx_CCK, rRx_OFDM, rRx_Wait_RIFS, rRx_TO_Rx, rStandby, rSleep, rPMPD_ANAEN, rFPGA0_XCD_SwitchControl, rBlue_Tooth}; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection()============> \n")); if(!(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C|ODM_RTL8723B))) return bResult; // Retrieve antenna detection registry info, added by Roger, 2012.11.27. if(!IS_ANT_DETECT_SUPPORT_SINGLE_TONE(pAdapter)) return bResult; if(pDM_Odm->SupportICType == ODM_RTL8192C) { //Which path in ADC/DAC is turnned on for PSD: both I/Q ODM_SetBBReg(pDM_Odm, 0x808, BIT10|BIT11, 0x3); //Ageraged number: 8 ODM_SetBBReg(pDM_Odm, 0x808, BIT12|BIT13, 0x1); //pts = 128; ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); } //1 Backup Current RF/BB Settings CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask); RfLoopReg = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask); if(!(pDM_Odm->SupportICType == ODM_RTL8723B)) ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A); // change to Antenna A #if (RTL8723B_SUPPORT == 1) else { Reg92c = ODM_GetBBReg(pDM_Odm, 0x92c, bMaskDWord); Reg948 = ODM_GetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord); Regb2c = ODM_GetBBReg(pDM_Odm, AGC_table_select, bMaskDWord); ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x1); ODM_SetBBReg(pDM_Odm, rfe_ctrl_anta_src, 0xff, 0x77); ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0x3ff, 0x000); ODM_SetBBReg(pDM_Odm, AGC_table_select, BIT31, 0x0); } #endif ODM_StallExecution(10); //Store A Path Register 88c, c08, 874, c50 Reg88c = ODM_GetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord); Regc08 = ODM_GetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord); Reg874 = ODM_GetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord); Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord); // Store AFE Registers if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C)) odm_PHY_SaveAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16); else if(pDM_Odm->SupportICType == ODM_RTL8723B) AFE_rRx_Wait_CCA = ODM_GetBBReg(pDM_Odm, rRx_Wait_CCA,bMaskDWord); //Set PSD 128 pts ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT14|BIT15, 0x0); //128 pts // To SET CH1 to do ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x7401); //Channel 1 // AFE all on step if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C)) { ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rTx_CCK_RFON, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rTx_CCK_BBON, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rTx_OFDM_RFON, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rTx_OFDM_BBON, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rTx_To_Rx, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rTx_To_Tx, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rRx_CCK, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rRx_OFDM, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rRx_Wait_RIFS, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rRx_TO_Rx, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rStandby, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rSleep, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rPMPD_ANAEN, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_SwitchControl, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rBlue_Tooth, bMaskDWord, 0x6FDB25A4); } else if(pDM_Odm->SupportICType == ODM_RTL8723B) { ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x01c00016); } // 3 wire Disable ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, 0xCCF000C0); //BB IQK Setting ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800E4); ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000); //IQK setting tone@ 4.34Mhz ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008C1C); ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); //Page B init ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00080000); ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000); ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f); ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82150008); ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28150008); ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x001028d0); //RF loop Setting if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C)) ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x0, 0xFFFFF, 0x50008); //IQK Single tone start ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ODM_StallExecution(10000); // PSD report of antenna A PSD_report_tmp=0x0; for (n=0;n<2;n++) { PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); if(PSD_report_tmp >AntA_report) AntA_report=PSD_report_tmp; } // change to Antenna B if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C)) ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_B); #if (RTL8723B_SUPPORT == 1) else if(pDM_Odm->SupportICType == ODM_RTL8723B) ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x2); #endif ODM_StallExecution(10); // PSD report of antenna B PSD_report_tmp=0x0; for (n=0;n<2;n++) { PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); if(PSD_report_tmp > AntB_report) AntB_report=PSD_report_tmp; } // change to open case if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C)) ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, 0); // change to Antenna A #if (RTL8723B_SUPPORT == 1) else if(pDM_Odm->SupportICType == ODM_RTL8723B) ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x0); #endif ODM_StallExecution(10); // PSD report of open case PSD_report_tmp=0x0; for (n=0;n<2;n++) { PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); if(PSD_report_tmp > AntO_report) AntO_report=PSD_report_tmp; } //Close IQK Single Tone function ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); //1 Return to antanna A if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C)) ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A); // change to Antenna A #if (RTL8723B_SUPPORT == 1) else if(pDM_Odm->SupportICType == ODM_RTL8723B) { // external DPDT ODM_SetBBReg(pDM_Odm, rDPDT_control, bMaskDWord, Reg92c); //internal S0/S1 ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord, Reg948); ODM_SetBBReg(pDM_Odm, AGC_table_select, bMaskDWord, Regb2c); } #endif ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, Reg88c); ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, Regc08); ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, Reg874); ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7F, 0x40); ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord, Regc50); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,CurrentChannel); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask,RfLoopReg); //Reload AFE Registers if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C)) odm_PHY_ReloadAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16); else if(pDM_Odm->SupportICType == ODM_RTL8723B) ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, AFE_rRx_Wait_CCA); if(pDM_Odm->SupportICType == ODM_RTL8723A) { //2 Test Ant B based on Ant A is ON if(mode==ANTTESTB) { if(AntA_report >= 100) { if(AntB_report > (AntA_report+1)) { pDM_SWAT_Table->ANTB_ON=FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n")); } else { pDM_SWAT_Table->ANTB_ON=TRUE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna is A and B\n")); } } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default bResult = FALSE; } } //2 Test Ant A and B based on DPDT Open else if(mode==ANTTESTALL) { if((AntO_report >=100) && (AntO_report <=118)) { if(AntA_report > (AntO_report+1)) { pDM_SWAT_Table->ANTA_ON=FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant A is OFF\n")); } else { pDM_SWAT_Table->ANTA_ON=TRUE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant A is ON\n")); } if(AntB_report > (AntO_report+2)) { pDM_SWAT_Table->ANTB_ON=FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant B is OFF\n")); } else { pDM_SWAT_Table->ANTB_ON=TRUE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant B is ON\n")); } ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d \n", 2416, AntA_report)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d \n", 2416, AntB_report)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_O[%d]= %d \n", 2416, AntO_report)); pDM_Odm->AntDetectedInfo.bAntDetected= TRUE; pDM_Odm->AntDetectedInfo.dBForAntA = AntA_report; pDM_Odm->AntDetectedInfo.dBForAntB = AntB_report; pDM_Odm->AntDetectedInfo.dBForAntO = AntO_report; } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("return FALSE!!\n")); bResult = FALSE; } } } else if(pDM_Odm->SupportICType == ODM_RTL8192C) { if(AntA_report >= 100) { if(AntB_report > (AntA_report+2)) { pDM_SWAT_Table->ANTA_ON=FALSE; pDM_SWAT_Table->ANTB_ON=TRUE; ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna B\n")); } else if(AntA_report > (AntB_report+2)) { pDM_SWAT_Table->ANTA_ON=TRUE; pDM_SWAT_Table->ANTB_ON=FALSE; ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n")); } else { pDM_SWAT_Table->ANTA_ON=TRUE; pDM_SWAT_Table->ANTB_ON=TRUE; RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna \n")); } } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); pDM_SWAT_Table->ANTA_ON=TRUE; // Set Antenna A on as default pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default bResult = FALSE; } } else if(pDM_Odm->SupportICType == ODM_RTL8723B) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d \n", 2416, AntA_report)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d \n", 2416, AntB_report)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_O[%d]= %d \n", 2416, AntO_report)); //2 Test Ant B based on Ant A is ON if(mode==ANTTESTB) { if(AntA_report >=100 && AntA_report <= 116) { if(AntB_report >= (AntA_report+4) && AntB_report > 116) { pDM_SWAT_Table->ANTB_ON=FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n")); } else if(AntB_report >=100 && AntB_report <= 116) { pDM_SWAT_Table->ANTB_ON=TRUE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna is A and B\n")); } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default bResult = FALSE; } } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default bResult = FALSE; } } //2 Test Ant A and B based on DPDT Open else if(mode==ANTTESTALL) { if((AntA_report >= 100) && (AntB_report >= 100) && (AntA_report <= 120) && (AntB_report <= 120)) { if((AntA_report - AntB_report < 2) || (AntB_report - AntA_report < 2)) { pDM_SWAT_Table->ANTA_ON=TRUE; pDM_SWAT_Table->ANTB_ON=TRUE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SingleDualAntennaDetection(): Dual Antenna\n")); } else if(((AntA_report - AntB_report >= 2) && (AntA_report - AntB_report <= 4)) || ((AntB_report - AntA_report >= 2) && (AntB_report - AntA_report <= 4))) { pDM_SWAT_Table->ANTA_ON=FALSE; pDM_SWAT_Table->ANTB_ON=FALSE; bResult = FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); } else { pDM_SWAT_Table->ANTA_ON = TRUE; pDM_SWAT_Table->ANTB_ON=FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SingleDualAntennaDetection(): Single Antenna A\n")); } pDM_Odm->AntDetectedInfo.bAntDetected= TRUE; pDM_Odm->AntDetectedInfo.dBForAntA = AntA_report; pDM_Odm->AntDetectedInfo.dBForAntB = AntB_report; pDM_Odm->AntDetectedInfo.dBForAntO = AntO_report; } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("return FALSE!!\n")); bResult = FALSE; } } } return bResult; } #endif // end odm_CE #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE)) VOID odm_Set_RA_DM_ARFB_by_Noisy( IN PDM_ODM_T pDM_Odm ) { //DbgPrint("DM_ARFB ====> \n"); if (pDM_Odm->bNoisyState){ ODM_Write4Byte(pDM_Odm,0x430,0x00000000); ODM_Write4Byte(pDM_Odm,0x434,0x05040200); //DbgPrint("DM_ARFB ====> Noisy State\n"); } else{ ODM_Write4Byte(pDM_Odm,0x430,0x02010000); ODM_Write4Byte(pDM_Odm,0x434,0x07050403); //DbgPrint("DM_ARFB ====> Clean State\n"); } } VOID ODM_UpdateNoisyState( IN PDM_ODM_T pDM_Odm, IN BOOLEAN bNoisyStateFromC2H ) { //DbgPrint("Get C2H Command! NoisyState=0x%x\n ", bNoisyStateFromC2H); if(pDM_Odm->SupportICType == ODM_RTL8821 || pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188E) { pDM_Odm->bNoisyState = bNoisyStateFromC2H; } odm_Set_RA_DM_ARFB_by_Noisy(pDM_Odm); }; u4Byte Set_RA_DM_Ratrbitmap_by_Noisy( IN PDM_ODM_T pDM_Odm, IN WIRELESS_MODE WirelessMode, IN u4Byte ratr_bitmap, IN u1Byte rssi_level ) { u4Byte ret_bitmap = ratr_bitmap; switch (WirelessMode) { case WIRELESS_MODE_AC_24G : case WIRELESS_MODE_AC_5G : case WIRELESS_MODE_AC_ONLY: if (pDM_Odm->bNoisyState){ // in Noisy State if (rssi_level==1) ret_bitmap&=0xfe3f0e08; else if (rssi_level==2) ret_bitmap&=0xff3f8f8c; else if (rssi_level==3) ret_bitmap&=0xffffffcc ; else ret_bitmap&=0xffffffff ; } else{ // in SNR State if (rssi_level==1){ ret_bitmap&=0xfc3e0c08; } else if (rssi_level==2){ ret_bitmap&=0xfe3f0e08; } else if (rssi_level==3){ ret_bitmap&=0xffbfefcc; } else{ ret_bitmap&=0x0fffffff; } } break; case WIRELESS_MODE_B: case WIRELESS_MODE_A: case WIRELESS_MODE_G: case WIRELESS_MODE_N_24G: case WIRELESS_MODE_N_5G: if (pDM_Odm->bNoisyState){ if (rssi_level==1) ret_bitmap&=0x0f0e0c08; else if (rssi_level==2) ret_bitmap&=0x0f8f0e0c; else if (rssi_level==3) ret_bitmap&=0x0fefefcc ; else ret_bitmap&=0xffffffff ; } else{ if (rssi_level==1){ ret_bitmap&=0x0f8f0e08; } else if (rssi_level==2){ ret_bitmap&=0x0fcf8f8c; } else if (rssi_level==3){ ret_bitmap&=0x0fffffcc; } else{ ret_bitmap&=0x0fffffff; } } break; default: break; } //DbgPrint("DM_RAMask ====> rssi_LV = %d, BITMAP = %x \n", rssi_level, ret_bitmap); return ret_bitmap; } VOID ODM_UpdateInitRate( IN PDM_ODM_T pDM_Odm, IN u1Byte Rate ) { u1Byte p = 0; ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Get C2H Command! Rate=0x%x\n", Rate)); if(pDM_Odm->SupportICType == ODM_RTL8821 || pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188E) { pDM_Odm->TxRate = Rate; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #if DEV_BUS_TYPE==RT_PCI_INTERFACE #if USE_WORKITEM PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem); #else if(pDM_Odm->SupportICType == ODM_RTL8821) { ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); } else if(pDM_Odm->SupportICType == ODM_RTL8812) { for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) { ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0); } } else if(pDM_Odm->SupportICType == ODM_RTL8723B) { ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); } else if(pDM_Odm->SupportICType == ODM_RTL8192E) { for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) { ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0); } } else if(pDM_Odm->SupportICType == ODM_RTL8188E) { ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); } #endif #else PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem); #endif #endif } else return; } #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) VOID ODM_UpdateInitRateWorkItemCallback( IN PVOID pContext ) { PADAPTER Adapter = (PADAPTER)pContext; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; u1Byte p = 0; if(pDM_Odm->SupportICType == ODM_RTL8821) { ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); } else if(pDM_Odm->SupportICType == ODM_RTL8812) { for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) //DOn't know how to include &c { ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0); } } else if(pDM_Odm->SupportICType == ODM_RTL8723B) { ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); } else if(pDM_Odm->SupportICType == ODM_RTL8192E) { for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) //DOn't know how to include &c { ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0); } } else if(pDM_Odm->SupportICType == ODM_RTL8188E) { ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0); } } #endif #endif // // ODM multi-port consideration, added by Roger, 2013.10.01. // VOID ODM_AsocEntry_Init( IN PDM_ODM_T pDM_Odm ) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PADAPTER pLoopAdapter = GetDefaultAdapter(pDM_Odm->Adapter); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pLoopAdapter); PDM_ODM_T pDM_OutSrc = &pHalData->DM_OutSrc; u1Byte TotalAssocEntryNum = 0; u1Byte index = 0; ODM_CmnInfoPtrArrayHook(pDM_OutSrc, ODM_CMNINFO_STA_STATUS, 0, &pLoopAdapter->MgntInfo.DefaultPort[0]); pLoopAdapter->MgntInfo.DefaultPort[0].MultiPortStationIdx = TotalAssocEntryNum; pLoopAdapter = GetNextExtAdapter(pLoopAdapter); TotalAssocEntryNum +=1; while(pLoopAdapter) { for (index = 0; index MgntInfo.AsocEntry[index]); pLoopAdapter->MgntInfo.AsocEntry[index].MultiPortStationIdx = TotalAssocEntryNum+index; } TotalAssocEntryNum+= index; if(IS_HARDWARE_TYPE_8188E((pDM_Odm->Adapter))) pLoopAdapter->RASupport = TRUE; pLoopAdapter = GetNextExtAdapter(pLoopAdapter); } #endif } #if (DM_ODM_SUPPORT_TYPE == ODM_CE) /* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */ void odm_dtc(PDM_ODM_T pDM_Odm) { #ifdef CONFIG_DM_RESP_TXAGC #define DTC_BASE 35 /* RSSI higher than this value, start to decade TX power */ #define DTC_DWN_BASE (DTC_BASE-5) /* RSSI lower than this value, start to increase TX power */ /* RSSI vs TX power step mapping: decade TX power */ static const u8 dtc_table_down[]={ DTC_BASE, (DTC_BASE+5), (DTC_BASE+10), (DTC_BASE+15), (DTC_BASE+20), (DTC_BASE+25) }; /* RSSI vs TX power step mapping: increase TX power */ static const u8 dtc_table_up[]={ DTC_DWN_BASE, (DTC_DWN_BASE-5), (DTC_DWN_BASE-10), (DTC_DWN_BASE-15), (DTC_DWN_BASE-15), (DTC_DWN_BASE-20), (DTC_DWN_BASE-20), (DTC_DWN_BASE-25), (DTC_DWN_BASE-25), (DTC_DWN_BASE-30), (DTC_DWN_BASE-35) }; u8 i; u8 dtc_steps=0; u8 sign; u8 resp_txagc=0; #if 0 /* As DIG is disabled, DTC is also disable */ if(!(pDM_Odm->SupportAbility & ODM_XXXXXX)) return; #endif if (DTC_BASE < pDM_Odm->RSSI_Min) { /* need to decade the CTS TX power */ sign = 1; for (i=0;i= pDM_Odm->RSSI_Min) || (dtc_steps >= 6)) break; else dtc_steps++; } } #if 0 else if (DTC_DWN_BASE > pDM_Odm->RSSI_Min) { /* needs to increase the CTS TX power */ sign = 0; dtc_steps = 1; for (i=0;iRSSI_Min) || (dtc_steps>=10)) break; else dtc_steps++; } } #endif else { sign = 0; dtc_steps = 0; } resp_txagc = dtc_steps | (sign << 4); resp_txagc = resp_txagc | (resp_txagc << 5); ODM_Write1Byte(pDM_Odm, 0x06d9, resp_txagc); DBG_871X("%s RSSI_Min:%u, set RESP_TXAGC to %s %u\n", __func__, pDM_Odm->RSSI_Min, sign?"minus":"plus", dtc_steps); #endif /* CONFIG_RESP_TXAGC_ADJUST */ } #endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */ VOID odm_UpdatePowerTrainingState( IN PDM_ODM_T pDM_Odm ) { #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PhyDM_FalseAlmCnt); pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; u4Byte score = 0; if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_TRAIN)) return; ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState()============>\n")); pDM_Odm->bChangeState = FALSE; // Debug command if(pDM_Odm->ForcePowerTrainingState) { if(pDM_Odm->ForcePowerTrainingState == 1 && !pDM_Odm->bDisablePowerTraining) { pDM_Odm->bChangeState = TRUE; pDM_Odm->bDisablePowerTraining = TRUE; } else if(pDM_Odm->ForcePowerTrainingState == 2 && pDM_Odm->bDisablePowerTraining) { pDM_Odm->bChangeState = TRUE; pDM_Odm->bDisablePowerTraining = FALSE; } pDM_Odm->PT_score = 0; pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0; pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0; ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): ForcePowerTrainingState = %d\n", pDM_Odm->ForcePowerTrainingState)); return; } if(!pDM_Odm->bLinked) return; // First connect if((pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE)) { pDM_Odm->PT_score = 0; pDM_Odm->bChangeState = TRUE; pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0; pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0; ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): First Connect\n")); return; } // Compute score if(pDM_Odm->NHM_cnt_0 >= 215) score = 2; else if(pDM_Odm->NHM_cnt_0 >= 190) score = 1; // unknow state else { u4Byte RX_Pkt_Cnt; RX_Pkt_Cnt = (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM) + (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK); if((FalseAlmCnt->Cnt_CCA_all > 31 && RX_Pkt_Cnt > 31) && (FalseAlmCnt->Cnt_CCA_all >= RX_Pkt_Cnt)) { if((RX_Pkt_Cnt + (RX_Pkt_Cnt >> 1)) <= FalseAlmCnt->Cnt_CCA_all) score = 0; else if((RX_Pkt_Cnt + (RX_Pkt_Cnt >> 2)) <= FalseAlmCnt->Cnt_CCA_all) score = 1; else score = 2; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): RX_Pkt_Cnt = %d, Cnt_CCA_all = %d\n", RX_Pkt_Cnt, FalseAlmCnt->Cnt_CCA_all)); } ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): NumQryPhyStatusOFDM = %d, NumQryPhyStatusCCK = %d\n", (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM), (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK))); ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): NHM_cnt_0 = %d, score = %d\n", pDM_Odm->NHM_cnt_0, score)); // smoothing pDM_Odm->PT_score = (score << 4) + (pDM_Odm->PT_score>>1) + (pDM_Odm->PT_score>>2); score = (pDM_Odm->PT_score + 32) >> 6; ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): PT_score = %d, score after smoothing = %d\n", pDM_Odm->PT_score, score)); // Mode decision if(score == 2) { if(pDM_Odm->bDisablePowerTraining) { pDM_Odm->bChangeState = TRUE; pDM_Odm->bDisablePowerTraining = FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Change state\n")); } ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Enable Power Training\n")); } else if(score == 0) { if(!pDM_Odm->bDisablePowerTraining) { pDM_Odm->bChangeState = TRUE; pDM_Odm->bDisablePowerTraining = TRUE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Change state\n")); } ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Disable Power Training\n")); } pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0; pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0; #endif } rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm.h000066400000000000000000001430561261122257400205650ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HALDMOUTSRC_H__ #define __HALDMOUTSRC_H__ //============================================================ // include files //============================================================ #include "phydm_DIG.h" #include "phydm_EdcaTurboCheck.h" #include "phydm_PathDiv.h" #include "phydm_DynamicBBPowerSaving.h" #include "phydm_RaInfo.h" #include "phydm_DynamicTxPower.h" #include "phydm_CfoTracking.h" #include "phydm_ACS.h" #include "phydm_PowerTracking.h" #include "PhyDM_Adaptivity.h" #include "phydm_NoiseMonitor.h" #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) #include "phydm_RXHP.h" #endif //============================================================ // Definition //============================================================ // // 2011/09/22 MH Define all team supprt ability. // // // 2011/09/22 MH Define for all teams. Please Define the constan in your precomp header. // //#define DM_ODM_SUPPORT_AP 0 //#define DM_ODM_SUPPORT_ADSL 0 //#define DM_ODM_SUPPORT_CE 0 //#define DM_ODM_SUPPORT_MP 1 // // 2011/09/28 MH Define ODM SW team support flag. // // // Antenna Switch Relative Definition. // // // 20100503 Joseph: // Add new function SwAntDivCheck8192C(). // This is the main function of Antenna diversity function before link. // Mainly, it just retains last scan result and scan again. // After that, it compares the scan result to see which one gets better RSSI. // It selects antenna with better receiving power and returns better scan result. // #define TP_MODE 0 #define RSSI_MODE 1 #define TRAFFIC_LOW 0 #define TRAFFIC_HIGH 1 #define NONE 0 //============================================================ //3 Tx Power Tracking //3============================================================ //============================================================ //3 PSD Handler //3============================================================ #define AFH_PSD 1 //0:normal PSD scan, 1: only do 20 pts PSD #define MODE_40M 0 //0:20M, 1:40M #define PSD_TH2 3 #define PSD_CHMIN 20 // Minimum channel number for BT AFH #define SIR_STEP_SIZE 3 #define Smooth_Size_1 5 #define Smooth_TH_1 3 #define Smooth_Size_2 10 #define Smooth_TH_2 4 #define Smooth_Size_3 20 #define Smooth_TH_3 4 #define Smooth_Step_Size 5 #define Adaptive_SIR 1 #if(RTL8723_FPGA_VERIFICATION == 1) #define PSD_RESCAN 1 #else #define PSD_RESCAN 4 #endif #define PSD_SCAN_INTERVAL 700 //ms //8723A High Power IGI Setting #define DM_DIG_HIGH_PWR_IGI_LOWER_BOUND 0x22 #define DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND 0x28 #define DM_DIG_HIGH_PWR_THRESHOLD 0x3a #define DM_DIG_LOW_PWR_THRESHOLD 0x14 //ANT Test #define ANTTESTALL 0x00 //Ant A or B will be Testing #define ANTTESTA 0x01 //Ant A will be Testing #define ANTTESTB 0x02 //Ant B will be testing //for 8723A Ant Definition--2012--06--07 due to different IC may be different ANT define #define MAIN_ANT 1 //Ant A or Ant Main #define AUX_ANT 2 //AntB or Ant Aux #define MAX_ANT 3 // 3 for AP using //Antenna Diversity Type #define SW_ANTDIV 0 #define HW_ANTDIV 1 //============================================================ // structure and define //============================================================ // // 2011/09/20 MH Add for AP/ADSLpseudo DM structuer requirement. // We need to remove to other position??? // #if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) typedef struct rtl8192cd_priv { u1Byte temp; }rtl8192cd_priv, *prtl8192cd_priv; #endif #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) typedef struct _ADAPTER{ u1Byte temp; #ifdef AP_BUILD_WORKAROUND HAL_DATA_TYPE* temp2; prtl8192cd_priv priv; #endif }ADAPTER, *PADAPTER; #endif #if (DM_ODM_SUPPORT_TYPE == ODM_AP) typedef struct _WLAN_STA{ u1Byte temp; } WLAN_STA, *PRT_WLAN_STA; #endif //Remove DIG by Yuchen //Remoce BB power saving by Yuchn //Remove DIG by yuchen typedef struct _Dynamic_Primary_CCA{ u1Byte PriCCA_flag; u1Byte intf_flag; u1Byte intf_type; u1Byte DupRTS_flag; u1Byte Monitor_flag; u1Byte CH_offset; u1Byte MF_state; }Pri_CCA_T, *pPri_CCA_T; //Remove RA_T,*pRA_T by RS_James typedef struct _RX_High_Power_ { u1Byte RXHP_flag; u1Byte PSD_func_trigger; u1Byte PSD_bitmap_RXHP[80]; u1Byte Pre_IGI; u1Byte Cur_IGI; u1Byte Pre_pw_th; u1Byte Cur_pw_th; BOOLEAN First_time_enter; BOOLEAN RXHP_enable; u1Byte TP_Mode; RT_TIMER PSDTimer; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #if USE_WORKITEM RT_WORK_ITEM PSDTimeWorkitem; #endif #endif }RXHP_T, *pRXHP_T; #if(DM_ODM_SUPPORT_TYPE & (ODM_CE)) #define ASSOCIATE_ENTRY_NUM 32 // Max size of AsocEntry[]. #define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM #elif(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #define ASSOCIATE_ENTRY_NUM NUM_STAT #define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM+1 #else // // 2012/01/12 MH Revise for compatiable with other SW team. // 0 is for STA 1-n is for AP clients. // #define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM+1// Default port only one #endif //#ifdef CONFIG_ANTENNA_DIVERSITY // This indicates two different the steps. // In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air. // In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK // with original RSSI to determine if it is necessary to switch antenna. #define SWAW_STEP_PEAK 0 #define SWAW_STEP_DETERMINE 1 #define TP_MODE 0 #define RSSI_MODE 1 #define TRAFFIC_LOW 0 #define TRAFFIC_HIGH 1 #define TRAFFIC_UltraLOW 2 typedef struct _SW_Antenna_Switch_ { u1Byte Double_chk_flag; u1Byte try_flag; s4Byte PreRSSI; u1Byte CurAntenna; u1Byte PreAntenna; u1Byte RSSI_Trying; u1Byte TestMode; u1Byte bTriggerAntennaSwitch; u1Byte SelectAntennaMap; u1Byte RSSI_target; u1Byte reset_idx; u2Byte Single_Ant_Counter; u2Byte Dual_Ant_Counter; u2Byte Aux_FailDetec_Counter; u2Byte Retry_Counter; // Before link Antenna Switch check u1Byte SWAS_NoLink_State; u4Byte SWAS_NoLink_BK_Reg860; u4Byte SWAS_NoLink_BK_Reg92c; u4Byte SWAS_NoLink_BK_Reg948; BOOLEAN ANTA_ON; //To indicate Ant A is or not BOOLEAN ANTB_ON; //To indicate Ant B is on or not BOOLEAN Pre_Aux_FailDetec; BOOLEAN RSSI_AntDect_bResult; u1Byte Ant5G; u1Byte Ant2G; s4Byte RSSI_sum_A; s4Byte RSSI_sum_B; s4Byte RSSI_cnt_A; s4Byte RSSI_cnt_B; u8Byte lastTxOkCnt; u8Byte lastRxOkCnt; u8Byte TXByteCnt_A; u8Byte TXByteCnt_B; u8Byte RXByteCnt_A; u8Byte RXByteCnt_B; u1Byte TrafficLoad; u1Byte Train_time; u1Byte Train_time_flag; RT_TIMER SwAntennaSwitchTimer; #if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1) RT_TIMER SwAntennaSwitchTimer_8723B; u4Byte PktCnt_SWAntDivByCtrlFrame; BOOLEAN bSWAntDivByCtrlFrame; #endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #if USE_WORKITEM RT_WORK_ITEM SwAntennaSwitchWorkitem; #if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1) RT_WORK_ITEM SwAntennaSwitchWorkitem_8723B; #endif #endif #endif /* CE Platform use #ifdef CONFIG_SW_ANTENNA_DIVERSITY _timer SwAntennaSwitchTimer; u8Byte lastTxOkCnt; u8Byte lastRxOkCnt; u8Byte TXByteCnt_A; u8Byte TXByteCnt_B; u8Byte RXByteCnt_A; u8Byte RXByteCnt_B; u1Byte DoubleComfirm; u1Byte TrafficLoad; //SW Antenna Switch #endif */ #ifdef CONFIG_HW_ANTENNA_DIVERSITY //Hybrid Antenna Diversity u4Byte CCK_Ant1_Cnt[ASSOCIATE_ENTRY_NUM+1]; u4Byte CCK_Ant2_Cnt[ASSOCIATE_ENTRY_NUM+1]; u4Byte OFDM_Ant1_Cnt[ASSOCIATE_ENTRY_NUM+1]; u4Byte OFDM_Ant2_Cnt[ASSOCIATE_ENTRY_NUM+1]; u4Byte RSSI_Ant1_Sum[ASSOCIATE_ENTRY_NUM+1]; u4Byte RSSI_Ant2_Sum[ASSOCIATE_ENTRY_NUM+1]; u1Byte TxAnt[ASSOCIATE_ENTRY_NUM+1]; u1Byte TargetSTA; u1Byte antsel; u1Byte RxIdleAnt; #endif }SWAT_T, *pSWAT_T; //#endif // Edca Remove by YuChen //ODM_RATE_ADAPTIVE Remove by RS_James #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #ifdef ADSL_AP_BUILD_WORKAROUND #define MAX_TOLERANCE 5 #define IQK_DELAY_TIME 1 //ms #endif // // Indicate different AP vendor for IOT issue. // typedef enum _HT_IOT_PEER { HT_IOT_PEER_UNKNOWN = 0, HT_IOT_PEER_REALTEK = 1, HT_IOT_PEER_REALTEK_92SE = 2, HT_IOT_PEER_BROADCOM = 3, HT_IOT_PEER_RALINK = 4, HT_IOT_PEER_ATHEROS = 5, HT_IOT_PEER_CISCO = 6, HT_IOT_PEER_MERU = 7, HT_IOT_PEER_MARVELL = 8, HT_IOT_PEER_REALTEK_SOFTAP = 9,// peer is RealTek SOFT_AP, by Bohn, 2009.12.17 HT_IOT_PEER_SELF_SOFTAP = 10, // Self is SoftAP HT_IOT_PEER_AIRGO = 11, HT_IOT_PEER_INTEL = 12, HT_IOT_PEER_RTK_APCLIENT = 13, HT_IOT_PEER_REALTEK_81XX = 14, HT_IOT_PEER_REALTEK_WOW = 15, HT_IOT_PEER_MAX = 16 }HT_IOT_PEER_E, *PHTIOT_PEER_E; #endif//#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #define DM_Type_ByFW 0 #define DM_Type_ByDriver 1 // // Declare for common info // #define MAX_PATH_NUM_92CS 2 #define MAX_PATH_NUM_8188E 1 #define MAX_PATH_NUM_8192E 2 #define MAX_PATH_NUM_8723B 1 #define MAX_PATH_NUM_8812A 2 #define MAX_PATH_NUM_8821A 1 #define MAX_PATH_NUM_8814A 4 #define MAX_PATH_NUM_8822B 2 #define IQK_THRESHOLD 8 #define DPK_THRESHOLD 4 typedef struct _ODM_Phy_Status_Info_ { // // Be care, if you want to add any element please insert between // RxPWDBAll & SignalStrength. // #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) u4Byte RxPWDBAll; #else u1Byte RxPWDBAll; #endif u1Byte SignalQuality; // in 0-100 index. s1Byte RxMIMOSignalQuality[4]; //per-path's EVM u1Byte RxMIMOEVMdbm[4]; //per-path's EVM dbm u1Byte RxMIMOSignalStrength[4];// in 0~100 index u2Byte Cfo_short[4]; // per-path's Cfo_short u2Byte Cfo_tail[4]; // per-path's Cfo_tail #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) s1Byte RxPower; // in dBm Translate from PWdB s1Byte RecvSignalPower; // Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures. u1Byte BTRxRSSIPercentage; u1Byte SignalStrength; // in 0-100 index. s1Byte RxPwr[4]; //per-path's pwdb #endif u1Byte RxSNR[4]; //per-path's SNR u1Byte BandWidth; u1Byte btCoexPwrAdjust; }ODM_PHY_INFO_T,*PODM_PHY_INFO_T; typedef struct _ODM_Per_Pkt_Info_ { //u1Byte Rate; u1Byte DataRate; u1Byte StationID; BOOLEAN bPacketMatchBSSID; BOOLEAN bPacketToSelf; BOOLEAN bPacketBeacon; BOOLEAN bToSelf; }ODM_PACKET_INFO_T,*PODM_PACKET_INFO_T; typedef struct _ODM_Phy_Dbg_Info_ { //ODM Write,debug info s1Byte RxSNRdB[4]; u4Byte NumQryPhyStatus; u4Byte NumQryPhyStatusCCK; u4Byte NumQryPhyStatusOFDM; u1Byte NumQryBeaconPkt; //Others s4Byte RxEVM[4]; }ODM_PHY_DBG_INFO_T; typedef struct _ODM_Mac_Status_Info_ { u1Byte test; }ODM_MAC_INFO; typedef enum tag_Dynamic_ODM_Support_Ability_Type { // BB Team ODM_DIG = 0x00000001, ODM_HIGH_POWER = 0x00000002, ODM_CCK_CCA_TH = 0x00000004, ODM_FA_STATISTICS = 0x00000008, ODM_RAMASK = 0x00000010, ODM_RSSI_MONITOR = 0x00000020, ODM_SW_ANTDIV = 0x00000040, ODM_HW_ANTDIV = 0x00000080, ODM_BB_PWRSV = 0x00000100, ODM_2TPATHDIV = 0x00000200, ODM_1TPATHDIV = 0x00000400, ODM_PSD2AFH = 0x00000800 }ODM_Ability_E; // // 2011/20/20 MH For MP driver RT_WLAN_STA = STA_INFO_T // Please declare below ODM relative info in your STA info structure. // #if 1 typedef struct _ODM_STA_INFO{ // Driver Write BOOLEAN bUsed; // record the sta status link or not? //u1Byte WirelessMode; // u1Byte IOTPeer; // Enum value. HT_IOT_PEER_E // ODM Write //1 PHY_STATUS_INFO u1Byte RSSI_Path[4]; // u1Byte RSSI_Ave; u1Byte RXEVM[4]; u1Byte RXSNR[4]; // ODM Write //1 TX_INFO (may changed by IC) //TX_INFO_T pTxInfo; // Define in IC folder. Move lower layer. #if 0 u1Byte ANTSEL_A; //in Jagar: 4bit; others: 2bit u1Byte ANTSEL_B; //in Jagar: 4bit; others: 2bit u1Byte ANTSEL_C; //only in Jagar: 4bit u1Byte ANTSEL_D; //only in Jagar: 4bit u1Byte TX_ANTL; //not in Jagar: 2bit u1Byte TX_ANT_HT; //not in Jagar: 2bit u1Byte TX_ANT_CCK; //not in Jagar: 2bit u1Byte TXAGC_A; //not in Jagar: 4bit u1Byte TXAGC_B; //not in Jagar: 4bit u1Byte TXPWR_OFFSET; //only in Jagar: 3bit u1Byte TX_ANT; //only in Jagar: 4bit for TX_ANTL/TX_ANTHT/TX_ANT_CCK #endif // // Please use compile flag to disabe the strcutrue for other IC except 88E. // Move To lower layer. // // ODM Write Wilson will handle this part(said by Luke.Lee) //TX_RPT_T pTxRpt; // Define in IC folder. Move lower layer. #if 0 //1 For 88E RA (don't redefine the naming) u1Byte rate_id; u1Byte rate_SGI; u1Byte rssi_sta_ra; u1Byte SGI_enable; u1Byte Decision_rate; u1Byte Pre_rate; u1Byte Active; // Driver write Wilson handle. //1 TX_RPT (don't redefine the naming) u2Byte RTY[4]; // ??? u2Byte TOTAL; // ??? u2Byte DROP; // ??? // // Please use compile flag to disabe the strcutrue for other IC except 88E. // #endif }ODM_STA_INFO_T, *PODM_STA_INFO_T; #endif // // 2011/10/20 MH Define Common info enum for all team. // typedef enum _ODM_Common_Info_Definition { //-------------REMOVED CASE-----------// //ODM_CMNINFO_CCK_HP, //ODM_CMNINFO_RFPATH_ENABLE, // Define as ODM write??? //ODM_CMNINFO_BT_COEXIST, // ODM_BT_COEXIST_E //ODM_CMNINFO_OP_MODE, // ODM_OPERATION_MODE_E //-------------REMOVED CASE-----------// // // Fixed value: // //-----------HOOK BEFORE REG INIT-----------// ODM_CMNINFO_PLATFORM = 0, ODM_CMNINFO_ABILITY, // ODM_ABILITY_E ODM_CMNINFO_INTERFACE, // ODM_INTERFACE_E ODM_CMNINFO_MP_TEST_CHIP, ODM_CMNINFO_IC_TYPE, // ODM_IC_TYPE_E ODM_CMNINFO_CUT_VER, // ODM_CUT_VERSION_E ODM_CMNINFO_FAB_VER, // ODM_FAB_E ODM_CMNINFO_RF_TYPE, // ODM_RF_PATH_E or ODM_RF_TYPE_E? ODM_CMNINFO_RFE_TYPE, ODM_CMNINFO_BOARD_TYPE, // ODM_BOARD_TYPE_E ODM_CMNINFO_PACKAGE_TYPE, ODM_CMNINFO_EXT_LNA, // TRUE ODM_CMNINFO_5G_EXT_LNA, ODM_CMNINFO_EXT_PA, ODM_CMNINFO_5G_EXT_PA, ODM_CMNINFO_GPA, ODM_CMNINFO_APA, ODM_CMNINFO_GLNA, ODM_CMNINFO_ALNA, ODM_CMNINFO_EXT_TRSW, ODM_CMNINFO_PATCH_ID, //CUSTOMER ID ODM_CMNINFO_BINHCT_TEST, ODM_CMNINFO_BWIFI_TEST, ODM_CMNINFO_SMART_CONCURRENT, ODM_CMNINFO_DOMAIN_CODE_2G, ODM_CMNINFO_DOMAIN_CODE_5G, ODM_CMNINFO_IQKFWOFFLOAD, //-----------HOOK BEFORE REG INIT-----------// // // Dynamic value: // //--------- POINTER REFERENCE-----------// ODM_CMNINFO_MAC_PHY_MODE, // ODM_MAC_PHY_MODE_E ODM_CMNINFO_TX_UNI, ODM_CMNINFO_RX_UNI, ODM_CMNINFO_WM_MODE, // ODM_WIRELESS_MODE_E ODM_CMNINFO_BAND, // ODM_BAND_TYPE_E ODM_CMNINFO_SEC_CHNL_OFFSET, // ODM_SEC_CHNL_OFFSET_E ODM_CMNINFO_SEC_MODE, // ODM_SECURITY_E ODM_CMNINFO_BW, // ODM_BW_E ODM_CMNINFO_CHNL, ODM_CMNINFO_FORCED_RATE, ODM_CMNINFO_DMSP_GET_VALUE, ODM_CMNINFO_BUDDY_ADAPTOR, ODM_CMNINFO_DMSP_IS_MASTER, ODM_CMNINFO_SCAN, ODM_CMNINFO_POWER_SAVING, ODM_CMNINFO_ONE_PATH_CCA, // ODM_CCA_PATH_E ODM_CMNINFO_DRV_STOP, ODM_CMNINFO_PNP_IN, ODM_CMNINFO_INIT_ON, ODM_CMNINFO_ANT_TEST, ODM_CMNINFO_NET_CLOSED, //ODM_CMNINFO_RTSTA_AID, // For win driver only? ODM_CMNINFO_FORCED_IGI_LB, ODM_CMNINFO_P2P_LINK, ODM_CMNINFO_FCS_MODE, ODM_CMNINFO_IS1ANTENNA, ODM_CMNINFO_RFDEFAULTPATH, //--------- POINTER REFERENCE-----------// //------------CALL BY VALUE-------------// ODM_CMNINFO_WIFI_DIRECT, ODM_CMNINFO_WIFI_DISPLAY, ODM_CMNINFO_LINK_IN_PROGRESS, ODM_CMNINFO_LINK, ODM_CMNINFO_STATION_STATE, ODM_CMNINFO_RSSI_MIN, ODM_CMNINFO_DBG_COMP, // u8Byte ODM_CMNINFO_DBG_LEVEL, // u4Byte ODM_CMNINFO_RA_THRESHOLD_HIGH, // u1Byte ODM_CMNINFO_RA_THRESHOLD_LOW, // u1Byte ODM_CMNINFO_RF_ANTENNA_TYPE, // u1Byte ODM_CMNINFO_BT_ENABLED, ODM_CMNINFO_BT_HS_CONNECT_PROCESS, ODM_CMNINFO_BT_HS_RSSI, ODM_CMNINFO_BT_OPERATION, ODM_CMNINFO_BT_LIMITED_DIG, //Need to Limited Dig or not ODM_CMNINFO_BT_DISABLE_EDCA, #if(DM_ODM_SUPPORT_TYPE & ODM_AP) // for repeater mode add by YuChen 2014.06. #ifdef UNIVERSAL_REPEATER ODM_CMNINFO_VXD_LINK, #endif #endif //------------CALL BY VALUE-------------// // // Dynamic ptr array hook itms. // ODM_CMNINFO_STA_STATUS, ODM_CMNINFO_PHY_STATUS, ODM_CMNINFO_MAC_STATUS, ODM_CMNINFO_MAX, }ODM_CMNINFO_E; // // 2011/10/20 MH Define ODM support ability. ODM_CMNINFO_ABILITY // typedef enum _ODM_Support_Ability_Definition { // // BB ODM section BIT 0-19 // ODM_BB_DIG = BIT0, ODM_BB_RA_MASK = BIT1, ODM_BB_DYNAMIC_TXPWR = BIT2, ODM_BB_FA_CNT = BIT3, ODM_BB_RSSI_MONITOR = BIT4, ODM_BB_CCK_PD = BIT5, ODM_BB_ANT_DIV = BIT6, ODM_BB_PWR_SAVE = BIT7, ODM_BB_PWR_TRAIN = BIT8, ODM_BB_RATE_ADAPTIVE = BIT9, ODM_BB_PATH_DIV = BIT10, ODM_BB_PSD = BIT11, ODM_BB_RXHP = BIT12, ODM_BB_ADAPTIVITY = BIT13, ODM_BB_CFO_TRACKING = BIT14, ODM_BB_NHM_CNT = BIT15, ODM_BB_PRIMARY_CCA = BIT16, // // MAC DM section BIT 20-23 // ODM_MAC_EDCA_TURBO = BIT20, ODM_MAC_EARLY_MODE = BIT21, // // RF ODM section BIT 24-31 // ODM_RF_TX_PWR_TRACK = BIT24, ODM_RF_RX_GAIN_TRACK = BIT25, ODM_RF_CALIBRATION = BIT26, }ODM_ABILITY_E; // ODM_CMNINFO_INTERFACE typedef enum tag_ODM_Support_Interface_Definition { ODM_ITRF_PCIE = 0x1, ODM_ITRF_USB = 0x2, ODM_ITRF_SDIO = 0x4, ODM_ITRF_ALL = 0x7, }ODM_INTERFACE_E; // ODM_CMNINFO_IC_TYPE typedef enum tag_ODM_Support_IC_Type_Definition { ODM_RTL8192S = BIT0, ODM_RTL8192C = BIT1, ODM_RTL8192D = BIT2, ODM_RTL8723A = BIT3, ODM_RTL8188E = BIT4, ODM_RTL8812 = BIT5, ODM_RTL8821 = BIT6, ODM_RTL8192E = BIT7, ODM_RTL8723B = BIT8, ODM_RTL8814A = BIT9, ODM_RTL8881A = BIT10, ODM_RTL8821B = BIT11, ODM_RTL8822B = BIT12, ODM_RTL8703B = BIT13 }ODM_IC_TYPE_E; #define ODM_IC_11N_SERIES (ODM_RTL8192S|ODM_RTL8192C|ODM_RTL8192D|ODM_RTL8723A|ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8703B) #define ODM_IC_11AC_SERIES (ODM_RTL8812|ODM_RTL8821|ODM_RTL8814A|ODM_RTL8881A|ODM_RTL8821B|ODM_RTL8822B) #if (DM_ODM_SUPPORT_TYPE == ODM_AP) #ifdef RTK_AC_SUPPORT #define ODM_IC_11AC_SERIES_SUPPORT 1 #else #define ODM_IC_11AC_SERIES_SUPPORT 0 #endif #else #define ODM_IC_11AC_SERIES_SUPPORT 1 #endif //ODM_CMNINFO_CUT_VER typedef enum tag_ODM_Cut_Version_Definition { ODM_CUT_A = 0, ODM_CUT_B = 1, ODM_CUT_C = 2, ODM_CUT_D = 3, ODM_CUT_E = 4, ODM_CUT_F = 5, ODM_CUT_I = 8, ODM_CUT_J = 9, ODM_CUT_K = 10, ODM_CUT_TEST = 15, }ODM_CUT_VERSION_E; // ODM_CMNINFO_FAB_VER typedef enum tag_ODM_Fab_Version_Definition { ODM_TSMC = 0, ODM_UMC = 1, }ODM_FAB_E; // ODM_CMNINFO_RF_TYPE // // For example 1T2R (A+AB = BIT0|BIT4|BIT5) // typedef enum tag_ODM_RF_Path_Bit_Definition { ODM_RF_TX_A = BIT0, ODM_RF_TX_B = BIT1, ODM_RF_TX_C = BIT2, ODM_RF_TX_D = BIT3, ODM_RF_RX_A = BIT4, ODM_RF_RX_B = BIT5, ODM_RF_RX_C = BIT6, ODM_RF_RX_D = BIT7, }ODM_RF_PATH_E; typedef enum tag_ODM_RF_Type_Definition { ODM_1T1R = 0, ODM_1T2R = 1, ODM_2T2R = 2, ODM_2T3R = 3, ODM_2T4R = 4, ODM_3T3R = 5, ODM_3T4R = 6, ODM_4T4R = 7, }ODM_RF_TYPE_E; // // ODM Dynamic common info value definition // //typedef enum _MACPHY_MODE_8192D{ // SINGLEMAC_SINGLEPHY, // DUALMAC_DUALPHY, // DUALMAC_SINGLEPHY, //}MACPHY_MODE_8192D,*PMACPHY_MODE_8192D; // Above is the original define in MP driver. Please use the same define. THX. typedef enum tag_ODM_MAC_PHY_Mode_Definition { ODM_SMSP = 0, ODM_DMSP = 1, ODM_DMDP = 2, }ODM_MAC_PHY_MODE_E; typedef enum tag_BT_Coexist_Definition { ODM_BT_BUSY = 1, ODM_BT_ON = 2, ODM_BT_OFF = 3, ODM_BT_NONE = 4, }ODM_BT_COEXIST_E; // ODM_CMNINFO_OP_MODE typedef enum tag_Operation_Mode_Definition { ODM_NO_LINK = BIT0, ODM_LINK = BIT1, ODM_SCAN = BIT2, ODM_POWERSAVE = BIT3, ODM_AP_MODE = BIT4, ODM_CLIENT_MODE = BIT5, ODM_AD_HOC = BIT6, ODM_WIFI_DIRECT = BIT7, ODM_WIFI_DISPLAY = BIT8, }ODM_OPERATION_MODE_E; // ODM_CMNINFO_WM_MODE #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_CE)) typedef enum tag_Wireless_Mode_Definition { ODM_WM_UNKNOW = 0x0, ODM_WM_B = BIT0, ODM_WM_G = BIT1, ODM_WM_A = BIT2, ODM_WM_N24G = BIT3, ODM_WM_N5G = BIT4, ODM_WM_AUTO = BIT5, ODM_WM_AC = BIT6, }ODM_WIRELESS_MODE_E; #else typedef enum tag_Wireless_Mode_Definition { ODM_WM_UNKNOWN = 0x00, ODM_WM_A = BIT0, ODM_WM_B = BIT1, ODM_WM_G = BIT2, ODM_WM_AUTO = BIT3, ODM_WM_N24G = BIT4, ODM_WM_N5G = BIT5, ODM_WM_AC_5G = BIT6, ODM_WM_AC_24G = BIT7, ODM_WM_AC_ONLY = BIT8, ODM_WM_MAX = BIT9 }ODM_WIRELESS_MODE_E; #endif // ODM_CMNINFO_BAND typedef enum tag_Band_Type_Definition { ODM_BAND_2_4G = 0, ODM_BAND_5G, ODM_BAND_ON_BOTH, ODM_BANDMAX }ODM_BAND_TYPE_E; // ODM_CMNINFO_SEC_CHNL_OFFSET typedef enum tag_Secondary_Channel_Offset_Definition { ODM_DONT_CARE = 0, ODM_BELOW = 1, ODM_ABOVE = 2 }ODM_SEC_CHNL_OFFSET_E; // ODM_CMNINFO_SEC_MODE typedef enum tag_Security_Definition { ODM_SEC_OPEN = 0, ODM_SEC_WEP40 = 1, ODM_SEC_TKIP = 2, ODM_SEC_RESERVE = 3, ODM_SEC_AESCCMP = 4, ODM_SEC_WEP104 = 5, ODM_WEP_WPA_MIXED = 6, // WEP + WPA ODM_SEC_SMS4 = 7, }ODM_SECURITY_E; // ODM_CMNINFO_BW typedef enum tag_Bandwidth_Definition { ODM_BW20M = 0, ODM_BW40M = 1, ODM_BW80M = 2, ODM_BW160M = 3, ODM_BW10M = 4, }ODM_BW_E; // ODM_CMNINFO_BOARD_TYPE // For non-AC-series IC , ODM_BOARD_5G_EXT_PA and ODM_BOARD_5G_EXT_LNA are ignored // For AC-series IC, external PA & LNA can be indivisuallly added on 2.4G and/or 5G typedef enum tag_Board_Definition { ODM_BOARD_DEFAULT = 0, // The DEFAULT case. ODM_BOARD_MINICARD = BIT(0), // 0 = non-mini card, 1= mini card. ODM_BOARD_SLIM = BIT(1), // 0 = non-slim card, 1 = slim card ODM_BOARD_BT = BIT(2), // 0 = without BT card, 1 = with BT ODM_BOARD_EXT_PA = BIT(3), // 0 = no 2G ext-PA, 1 = existing 2G ext-PA ODM_BOARD_EXT_LNA = BIT(4), // 0 = no 2G ext-LNA, 1 = existing 2G ext-LNA ODM_BOARD_EXT_TRSW = BIT(5), // 0 = no ext-TRSW, 1 = existing ext-TRSW ODM_BOARD_EXT_PA_5G = BIT(6), // 0 = no 5G ext-PA, 1 = existing 5G ext-PA ODM_BOARD_EXT_LNA_5G= BIT(7), // 0 = no 5G ext-LNA, 1 = existing 5G ext-LNA }ODM_BOARD_TYPE_E; typedef enum tag_ODM_Package_Definition { ODM_PACKAGE_DEFAULT = 0, ODM_PACKAGE_QFN68 = BIT(0), ODM_PACKAGE_TFBGA90 = BIT(1), ODM_PACKAGE_TFBGA79 = BIT(2), }ODM_Package_TYPE_E; typedef enum tag_ODM_TYPE_GPA_Definition { TYPE_GPA0 = 0, TYPE_GPA1 = BIT(1)|BIT(0) }ODM_TYPE_GPA_E; typedef enum tag_ODM_TYPE_APA_Definition { TYPE_APA0 = 0, TYPE_APA1 = BIT(1)|BIT(0) }ODM_TYPE_APA_E; typedef enum tag_ODM_TYPE_GLNA_Definition { TYPE_GLNA0 = 0, TYPE_GLNA1 = BIT(2)|BIT(0), TYPE_GLNA2 = BIT(3)|BIT(1), TYPE_GLNA3 = BIT(3)|BIT(2)|BIT(1)|BIT(0) }ODM_TYPE_GLNA_E; typedef enum tag_ODM_TYPE_ALNA_Definition { TYPE_ALNA0 = 0, TYPE_ALNA1 = BIT(2)|BIT(0), TYPE_ALNA2 = BIT(3)|BIT(1), TYPE_ALNA3 = BIT(3)|BIT(2)|BIT(1)|BIT(0) }ODM_TYPE_ALNA_E; // ODM_CMNINFO_ONE_PATH_CCA typedef enum tag_CCA_Path { ODM_CCA_2R = 0, ODM_CCA_1R_A = 1, ODM_CCA_1R_B = 2, }ODM_CCA_PATH_E; typedef struct _ODM_RA_Info_ { u1Byte RateID; u4Byte RateMask; u4Byte RAUseRate; u1Byte RateSGI; u1Byte RssiStaRA; u1Byte PreRssiStaRA; u1Byte SGIEnable; u1Byte DecisionRate; u1Byte PreRate; u1Byte HighestRate; u1Byte LowestRate; u4Byte NscUp; u4Byte NscDown; u2Byte RTY[5]; u4Byte TOTAL; u2Byte DROP; u1Byte Active; u2Byte RptTime; u1Byte RAWaitingCounter; u1Byte RAPendingCounter; #if 1 //POWER_TRAINING_ACTIVE == 1 // For compile pass only~! u1Byte PTActive; // on or off u1Byte PTTryState; // 0 trying state, 1 for decision state u1Byte PTStage; // 0~6 u1Byte PTStopCount; //Stop PT counter u1Byte PTPreRate; // if rate change do PT u1Byte PTPreRssi; // if RSSI change 5% do PT u1Byte PTModeSS; // decide whitch rate should do PT u1Byte RAstage; // StageRA, decide how many times RA will be done between PT u1Byte PTSmoothFactor; #endif } ODM_RA_INFO_T,*PODM_RA_INFO_T; //Remove struct PATHDIV_PARA to odm_PathDiv.h //move to PowerTracking.h by YuChen // // ODM Dynamic common info value definition // typedef struct _FAST_ANTENNA_TRAINNING_ { u1Byte Bssid[6]; u1Byte antsel_rx_keep_0; u1Byte antsel_rx_keep_1; u1Byte antsel_rx_keep_2; u1Byte antsel_rx_keep_3; u4Byte antSumRSSI[7]; u4Byte antRSSIcnt[7]; u4Byte antAveRSSI[7]; u1Byte FAT_State; u4Byte TrainIdx; u1Byte antsel_a[ODM_ASSOCIATE_ENTRY_NUM]; u1Byte antsel_b[ODM_ASSOCIATE_ENTRY_NUM]; u1Byte antsel_c[ODM_ASSOCIATE_ENTRY_NUM]; u4Byte MainAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM]; u4Byte AuxAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM]; u4Byte MainAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; u4Byte AuxAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; u1Byte RxIdleAnt; BOOLEAN bBecomeLinked; u4Byte MinMaxRSSI; u1Byte idx_AntDiv_counter_2G; u1Byte idx_AntDiv_counter_5G; u4Byte AntDiv_2G_5G; u4Byte CCK_counter_main; u4Byte CCK_counter_aux; u4Byte OFDM_counter_main; u4Byte OFDM_counter_aux; u4Byte CCK_CtrlFrame_Cnt_main; u4Byte CCK_CtrlFrame_Cnt_aux; u4Byte OFDM_CtrlFrame_Cnt_main; u4Byte OFDM_CtrlFrame_Cnt_aux; u4Byte MainAnt_CtrlFrame_Sum; u4Byte AuxAnt_CtrlFrame_Sum; u4Byte MainAnt_CtrlFrame_Cnt; u4Byte AuxAnt_CtrlFrame_Cnt; }FAT_T,*pFAT_T; typedef enum _FAT_STATE { FAT_NORMAL_STATE = 0, FAT_TRAINING_STATE = 1, }FAT_STATE_E, *PFAT_STATE_E; typedef enum _ANT_DIV_TYPE { NO_ANTDIV = 0xFF, CG_TRX_HW_ANTDIV = 0x01, CGCS_RX_HW_ANTDIV = 0x02, FIXED_HW_ANTDIV = 0x03, CG_TRX_SMART_ANTDIV = 0x04, CGCS_RX_SW_ANTDIV = 0x05, S0S1_SW_ANTDIV = 0x06 //8723B intrnal switch S0 S1 }ANT_DIV_TYPE_E, *PANT_DIV_TYPE_E; typedef struct _ODM_PATH_DIVERSITY_ { u1Byte RespTxPath; u1Byte PathSel[ODM_ASSOCIATE_ENTRY_NUM]; u4Byte PathA_Sum[ODM_ASSOCIATE_ENTRY_NUM]; u4Byte PathB_Sum[ODM_ASSOCIATE_ENTRY_NUM]; u4Byte PathA_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; u4Byte PathB_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; }PATHDIV_T, *pPATHDIV_T; typedef enum _BASEBAND_CONFIG_PHY_REG_PG_VALUE_TYPE{ PHY_REG_PG_RELATIVE_VALUE = 0, PHY_REG_PG_EXACT_VALUE = 1 } PHY_REG_PG_TYPE; // // Antenna detection information from single tone mechanism, added by Roger, 2012.11.27. // typedef struct _ANT_DETECTED_INFO{ BOOLEAN bAntDetected; u4Byte dBForAntA; u4Byte dBForAntB; u4Byte dBForAntO; }ANT_DETECTED_INFO, *PANT_DETECTED_INFO; // // 2011/09/22 MH Copy from SD4 defined structure. We use to support PHY DM integration. // #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) #if (RT_PLATFORM != PLATFORM_LINUX) typedef #endif struct DM_Out_Source_Dynamic_Mechanism_Structure #else// for AP,ADSL,CE Team typedef struct DM_Out_Source_Dynamic_Mechanism_Structure #endif { //RT_TIMER FastAntTrainingTimer; // // Add for different team use temporarily // PADAPTER Adapter; // For CE/NIC team prtl8192cd_priv priv; // For AP/ADSL team // WHen you use Adapter or priv pointer, you must make sure the pointer is ready. BOOLEAN odm_ready; #if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) rtl8192cd_priv fake_priv; #endif #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) // ADSL_AP_BUILD_WORKAROUND ADAPTER fake_adapter; #endif PHY_REG_PG_TYPE PhyRegPgValueType; u1Byte PhyRegPgVersion; u8Byte DebugComponents; u4Byte DebugLevel; u4Byte NumQryPhyStatusAll; //CCK + OFDM u4Byte LastNumQryPhyStatusAll; u4Byte RxPWDBAve; BOOLEAN MPDIG_2G; //off MPDIG u1Byte Times_2G; //------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------// BOOLEAN bCckHighPower; u1Byte RFPathRxEnable; // ODM_CMNINFO_RFPATH_ENABLE u1Byte ControlChannel; //------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------// //--------REMOVED COMMON INFO----------// //u1Byte PseudoMacPhyMode; //BOOLEAN *BTCoexist; //BOOLEAN PseudoBtCoexist; //u1Byte OPMode; //BOOLEAN bAPMode; //BOOLEAN bClientMode; //BOOLEAN bAdHocMode; //BOOLEAN bSlaveOfDMSP; //--------REMOVED COMMON INFO----------// //1 COMMON INFORMATION // // Init Value // //-----------HOOK BEFORE REG INIT-----------// // ODM Platform info AP/ADSL/CE/MP = 1/2/3/4 u1Byte SupportPlatform; // ODM Support Ability DIG/RATR/TX_PWR_TRACK/ ¡K¡K = 1/2/3/¡K u4Byte SupportAbility; // ODM PCIE/USB/SDIO = 1/2/3 u1Byte SupportInterface; // ODM composite or independent. Bit oriented/ 92C+92D+ .... or any other type = 1/2/3/... u4Byte SupportICType; // Cut Version TestChip/A-cut/B-cut... = 0/1/2/3/... u1Byte CutVersion; // Fab Version TSMC/UMC = 0/1 u1Byte FabVersion; // RF Type 4T4R/3T3R/2T2R/1T2R/1T1R/... u1Byte RFType; u1Byte RFEType; // Board Type Normal/HighPower/MiniCard/SLIM/Combo/... = 0/1/2/3/4/... u1Byte BoardType; u1Byte PackageType; u1Byte TypeGLNA; u1Byte TypeGPA; u1Byte TypeALNA; u1Byte TypeAPA; // with external LNA NO/Yes = 0/1 u1Byte ExtLNA; u1Byte ExtLNA5G; // with external PA NO/Yes = 0/1 u1Byte ExtPA; u1Byte ExtPA5G; // with external TRSW NO/Yes = 0/1 u1Byte ExtTRSW; u1Byte PatchID; //Customer ID BOOLEAN bInHctTest; BOOLEAN bWIFITest; BOOLEAN bDualMacSmartConcurrent; u4Byte BK_SupportAbility; u1Byte AntDivType; u1Byte odm_Regulation2_4G; u1Byte odm_Regulation5G; u1Byte IQKFWOffload; //-----------HOOK BEFORE REG INIT-----------// // // Dynamic Value // //--------- POINTER REFERENCE-----------// u1Byte u1Byte_temp; BOOLEAN BOOLEAN_temp; PADAPTER PADAPTER_temp; // MAC PHY Mode SMSP/DMSP/DMDP = 0/1/2 u1Byte *pMacPhyMode; //TX Unicast byte count u8Byte *pNumTxBytesUnicast; //RX Unicast byte count u8Byte *pNumRxBytesUnicast; // Wireless mode B/G/A/N = BIT0/BIT1/BIT2/BIT3 u1Byte *pWirelessMode; //ODM_WIRELESS_MODE_E // Frequence band 2.4G/5G = 0/1 u1Byte *pBandType; // Secondary channel offset don't_care/below/above = 0/1/2 u1Byte *pSecChOffset; // Security mode Open/WEP/AES/TKIP = 0/1/2/3 u1Byte *pSecurity; // BW info 20M/40M/80M = 0/1/2 u1Byte *pBandWidth; // Central channel location Ch1/Ch2/.... u1Byte *pChannel; //central channel number BOOLEAN DPK_Done; // Common info for 92D DMSP BOOLEAN *pbGetValueFromOtherMac; PADAPTER *pBuddyAdapter; BOOLEAN *pbMasterOfDMSP; //MAC0: master, MAC1: slave // Common info for Status BOOLEAN *pbScanInProcess; BOOLEAN *pbPowerSaving; // CCA Path 2-path/path-A/path-B = 0/1/2; using ODM_CCA_PATH_E. u1Byte *pOnePathCCA; //pMgntInfo->AntennaTest u1Byte *pAntennaTest; BOOLEAN *pbNet_closed; //u1Byte *pAidMap; u1Byte *pu1ForcedIgiLb; BOOLEAN *pIsFcsModeEnable; //--------- For 8723B IQK-----------// BOOLEAN *pIs1Antenna; u1Byte *pRFDefaultPath; // 0:S1, 1:S0 //--------- POINTER REFERENCE-----------// pu2Byte pForcedDataRate; //------------CALL BY VALUE-------------// BOOLEAN bLinkInProcess; BOOLEAN bWIFI_Direct; BOOLEAN bWIFI_Display; BOOLEAN bLinked; BOOLEAN bsta_state; u1Byte RSSI_Min; u1Byte InterfaceIndex; // Add for 92D dual MAC: 0--Mac0 1--Mac1 BOOLEAN bIsMPChip; BOOLEAN bOneEntryOnly; BOOLEAN mp_mode; // Common info for BTDM BOOLEAN bBtEnabled; // BT is enabled BOOLEAN bBtConnectProcess; // BT HS is under connection progress. u1Byte btHsRssi; // BT HS mode wifi rssi value. BOOLEAN bBtHsOperation; // BT HS mode is under progress BOOLEAN bBtDisableEdcaTurbo; // Under some condition, don't enable the EDCA Turbo BOOLEAN bBtLimitedDig; // BT is busy. //------------CALL BY VALUE-------------// u1Byte RSSI_A; u1Byte RSSI_B; u1Byte RSSI_C; u1Byte RSSI_D; u8Byte RSSI_TRSW; u8Byte RSSI_TRSW_H; u8Byte RSSI_TRSW_L; u8Byte RSSI_TRSW_iso; u1Byte RxRate; BOOLEAN bNoisyState; u1Byte TxRate; u1Byte LinkedInterval; u1Byte preChannel; u4Byte TxagcOffsetValueA; BOOLEAN IsTxagcOffsetPositiveA; u4Byte TxagcOffsetValueB; BOOLEAN IsTxagcOffsetPositiveB; u8Byte lastTxOkCnt; u8Byte lastRxOkCnt; u4Byte BbSwingOffsetA; BOOLEAN IsBbSwingOffsetPositiveA; u4Byte BbSwingOffsetB; BOOLEAN IsBbSwingOffsetPositiveB; s1Byte TH_L2H_ini; s1Byte TH_EDCCA_HL_diff; s1Byte IGI_Base; u1Byte IGI_target; BOOLEAN ForceEDCCA; u1Byte AdapEn_RSSI; s1Byte Force_TH_H; s1Byte Force_TH_L; u1Byte IGI_LowerBound; u1Byte antdiv_rssi; u1Byte AntType; u1Byte pre_AntType; u1Byte antdiv_period; u1Byte antdiv_select; u1Byte NdpaPeriod; BOOLEAN H2C_RARpt_connect; // add by Yu Cehn for adaptivtiy BOOLEAN adaptivity_flag; u1Byte tolerance_cnt; u8Byte NHMCurTxOkcnt; u8Byte NHMCurRxOkcnt; u8Byte NHMLastTxOkcnt; u8Byte NHMLastRxOkcnt; u1Byte NHMWait; s1Byte H2L_lb; s1Byte L2H_lb; u1Byte Adaptivity_IGI_upper; u2Byte NHM_cnt_0; u2Byte NHM_cnt_1; BOOLEAN Carrier_Sense_enable; BOOLEAN bFirstLink; BOOLEAN bCheck; BOOLEAN EDCCA_enable_state; BOOLEAN NHM_enable; BOOLEAN DynamicLinkAdaptivity; BOOLEAN bAdaOn; ODM_NOISE_MONITOR noise_level;//[ODM_MAX_CHANNEL_NUM]; // //2 Define STA info. // _ODM_STA_INFO // 2012/01/12 MH For MP, we need to reduce one array pointer for default port.?? PSTA_INFO_T pODM_StaInfo[ODM_ASSOCIATE_ENTRY_NUM]; #if (RATE_ADAPTIVE_SUPPORT == 1) u2Byte CurrminRptTime; ODM_RA_INFO_T RAInfo[ODM_ASSOCIATE_ENTRY_NUM]; //See HalMacID support #endif // // 2012/02/14 MH Add to share 88E ra with other SW team. // We need to colelct all support abilit to a proper area. // BOOLEAN RaSupport88E; // Define ........... // Latest packet phy info (ODM write) ODM_PHY_DBG_INFO_T PhyDbgInfo; //PHY_INFO_88E PhyInfo; // Latest packet phy info (ODM write) ODM_MAC_INFO *pMacInfo; //MAC_INFO_88E MacInfo; // Different Team independt structure?? // //TX_RTP_CMN TX_retrpo; //TX_RTP_88E TX_retrpo; //TX_RTP_8195 TX_retrpo; // //ODM Structure // FAT_T DM_FatTable; DIG_T DM_DigTable; PS_T DM_PSTable; Pri_CCA_T DM_PriCCA; #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) RXHP_T DM_RXHP_Table; #endif RA_T DM_RA_Table; FALSE_ALARM_STATISTICS FalseAlmCnt; FALSE_ALARM_STATISTICS FlaseAlmCntBuddyAdapter; //#ifdef CONFIG_ANTENNA_DIVERSITY SWAT_T DM_SWAT_Table; BOOLEAN RSSI_test; CFO_TRACKING DM_CfoTrack; ACS DM_ACS; //#endif #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) //Path Div Struct PATHDIV_PARA pathIQK; #endif EDCA_T DM_EDCA_Table; u4Byte WMMEDCA_BE; PATHDIV_T DM_PathDiv; // Copy from SD4 structure // // ================================================== // //common //u1Byte DM_Type; //u1Byte PSD_Report_RXHP[80]; // Add By Gary //u1Byte PSD_func_flag; // Add By Gary //for DIG //u1Byte bDMInitialGainEnable; //u1Byte binitialized; // for dm_initial_gain_Multi_STA use. //for Antenna diversity //u8 AntDivCfg;// 0:OFF , 1:ON, 2:by efuse //PSTA_INFO_T RSSI_target; BOOLEAN *pbDriverStopped; BOOLEAN *pbDriverIsGoingToPnpSetPowerSleep; BOOLEAN *pinit_adpt_in_progress; //PSD BOOLEAN bUserAssignLevel; RT_TIMER PSDTimer; u1Byte RSSI_BT; //come from BT BOOLEAN bPSDinProcess; BOOLEAN bPSDactive; BOOLEAN bDMInitialGainEnable; //MPT DIG RT_TIMER MPT_DIGTimer; //for rate adaptive, in fact, 88c/92c fw will handle this u1Byte bUseRAMask; ODM_RATE_ADAPTIVE RateAdaptive; ANT_DETECTED_INFO AntDetectedInfo; // Antenna detected information for RSSI tool ODM_RF_CAL_T RFCalibrateInfo; // // TX power tracking // u1Byte BbSwingIdxOfdm[MAX_RF_PATH]; u1Byte BbSwingIdxOfdmCurrent; u1Byte BbSwingIdxOfdmBase[MAX_RF_PATH]; BOOLEAN BbSwingFlagOfdm; u1Byte BbSwingIdxCck; u1Byte BbSwingIdxCckCurrent; u1Byte BbSwingIdxCckBase; u1Byte DefaultOfdmIndex; u1Byte DefaultCckIndex; BOOLEAN BbSwingFlagCck; s1Byte Absolute_OFDMSwingIdx[MAX_RF_PATH]; s1Byte Remnant_OFDMSwingIdx[MAX_RF_PATH]; s1Byte Remnant_CCKSwingIdx; s1Byte Modify_TxAGC_Value; //Remnat compensate value at TxAGC BOOLEAN Modify_TxAGC_Flag_PathA; BOOLEAN Modify_TxAGC_Flag_PathB; BOOLEAN Modify_TxAGC_Flag_PathC; BOOLEAN Modify_TxAGC_Flag_PathD; BOOLEAN Modify_TxAGC_Flag_PathA_CCK; s1Byte KfreeOffset[MAX_RF_PATH]; // // Dynamic ATC switch // #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) // // Power Training // BOOLEAN bDisablePowerTraining; u1Byte ForcePowerTrainingState; BOOLEAN bChangeState; u4Byte PT_score; u8Byte OFDM_RX_Cnt; u8Byte CCK_RX_Cnt; #endif // // ODM system resource. // // ODM relative time. RT_TIMER PathDivSwitchTimer; //2011.09.27 add for Path Diversity RT_TIMER CCKPathDiversityTimer; RT_TIMER FastAntTrainingTimer; // ODM relative workitem. #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #if USE_WORKITEM RT_WORK_ITEM PathDivSwitchWorkitem; RT_WORK_ITEM CCKPathDiversityWorkitem; RT_WORK_ITEM FastAntTrainingWorkitem; RT_WORK_ITEM MPT_DIGWorkitem; RT_WORK_ITEM RaRptWorkitem; #endif #endif #if (BEAMFORMING_SUPPORT == 1) RT_BEAMFORMING_INFO BeamformingInfo; #endif #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) #if (RT_PLATFORM != PLATFORM_LINUX) } DM_ODM_T, *PDM_ODM_T; // DM_Dynamic_Mechanism_Structure #else }; #endif #else// for AP,ADSL,CE Team } DM_ODM_T, *PDM_ODM_T; // DM_Dynamic_Mechanism_Structure #endif #if 1 //92c-series #define ODM_RF_PATH_MAX 2 #else //jaguar - series #define ODM_RF_PATH_MAX 4 #endif typedef enum _PhyDM_Structure_Type{ PhyDM_FalseAlmCnt, PhyDM_CfoTrack, PhyDM_ROMInfo, }PhyDM_Structure_Type; typedef enum _ODM_RF_RADIO_PATH { ODM_RF_PATH_A = 0, //Radio Path A ODM_RF_PATH_B = 1, //Radio Path B ODM_RF_PATH_C = 2, //Radio Path C ODM_RF_PATH_D = 3, //Radio Path D ODM_RF_PATH_AB, ODM_RF_PATH_AC, ODM_RF_PATH_AD, ODM_RF_PATH_BC, ODM_RF_PATH_BD, ODM_RF_PATH_CD, ODM_RF_PATH_ABC, ODM_RF_PATH_ACD, ODM_RF_PATH_BCD, ODM_RF_PATH_ABCD, // ODM_RF_PATH_MAX, //Max RF number 90 support } ODM_RF_RADIO_PATH_E, *PODM_RF_RADIO_PATH_E; typedef enum _ODM_RF_CONTENT{ odm_radioa_txt = 0x1000, odm_radiob_txt = 0x1001, odm_radioc_txt = 0x1002, odm_radiod_txt = 0x1003 } ODM_RF_CONTENT; typedef enum _ODM_BB_Config_Type{ CONFIG_BB_PHY_REG, CONFIG_BB_AGC_TAB, CONFIG_BB_AGC_TAB_2G, CONFIG_BB_AGC_TAB_5G, CONFIG_BB_PHY_REG_PG, CONFIG_BB_PHY_REG_MP, CONFIG_BB_AGC_TAB_DIFF, } ODM_BB_Config_Type, *PODM_BB_Config_Type; typedef enum _ODM_RF_Config_Type{ CONFIG_RF_RADIO, CONFIG_RF_TXPWR_LMT, } ODM_RF_Config_Type, *PODM_RF_Config_Type; typedef enum _ODM_FW_Config_Type{ CONFIG_FW_NIC, CONFIG_FW_NIC_2, CONFIG_FW_AP, CONFIG_FW_MP, CONFIG_FW_WoWLAN, CONFIG_FW_WoWLAN_2, CONFIG_FW_AP_WoWLAN, CONFIG_FW_BT, } ODM_FW_Config_Type; // Status code #if (DM_ODM_SUPPORT_TYPE != ODM_WIN) typedef enum _RT_STATUS{ RT_STATUS_SUCCESS, RT_STATUS_FAILURE, RT_STATUS_PENDING, RT_STATUS_RESOURCE, RT_STATUS_INVALID_CONTEXT, RT_STATUS_INVALID_PARAMETER, RT_STATUS_NOT_SUPPORT, RT_STATUS_OS_API_FAILED, }RT_STATUS,*PRT_STATUS; #endif // end of RT_STATUS definition #ifdef REMOVE_PACK #pragma pack() #endif //#include "odm_function.h" //3=========================================================== //3 DIG //3=========================================================== //Remove DIG by Yuchen //3=========================================================== //3 AGC RX High Power Mode //3=========================================================== #define LNA_Low_Gain_1 0x64 #define LNA_Low_Gain_2 0x5A #define LNA_Low_Gain_3 0x58 #define FA_RXHP_TH1 5000 #define FA_RXHP_TH2 1500 #define FA_RXHP_TH3 800 #define FA_RXHP_TH4 600 #define FA_RXHP_TH5 500 //3=========================================================== //3 EDCA //3=========================================================== //3=========================================================== //3 Dynamic Tx Power //3=========================================================== //Dynamic Tx Power Control Threshold //Remove By YuChen //3=========================================================== //3 Tx Power Tracking //3=========================================================== #if 0 //mask this, since these have been defined in typdef.h, vivi #define OFDM_TABLE_SIZE 43 #define CCK_TABLE_SIZE 33 #endif //3=========================================================== //3 Rate Adaptive //3=========================================================== //Remove to odm_RaInfo.h by RS_James //3=========================================================== //3 BB Power Save //3=========================================================== typedef enum tag_1R_CCA_Type_Definition { CCA_1R =0, CCA_2R = 1, CCA_MAX = 2, }DM_1R_CCA_E; typedef enum tag_RF_Type_Definition { RF_Save =0, RF_Normal = 1, RF_MAX = 2, }DM_RF_E; //3=========================================================== //3 Antenna Diversity //3=========================================================== typedef enum tag_SW_Antenna_Switch_Definition { Antenna_A = 1, Antenna_B = 2, Antenna_MAX = 3, }DM_SWAS_E; // Maximal number of antenna detection mechanism needs to perform, added by Roger, 2011.12.28. #define MAX_ANTENNA_DETECTION_CNT 10 // // Extern Global Variables. // //remove PT by YuChen // // check Sta pointer valid or not // #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #define IS_STA_VALID(pSta) (pSta && pSta->expire_to) #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) #define IS_STA_VALID(pSta) (pSta && pSta->bUsed) #else #define IS_STA_VALID(pSta) (pSta) #endif // 20100514 Joseph: Add definition for antenna switching test after link. // This indicates two different the steps. // In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air. // In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK // with original RSSI to determine if it is necessary to switch antenna. #define SWAW_STEP_PEAK 0 #define SWAW_STEP_DETERMINE 1 //Remove DIG by yuchen //Remove BB power saving by Yuchen //ODM_RAStateCheck() Remove by RS_James #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_AP|ODM_ADSL)) //============================================================ // function prototype //============================================================ //#define DM_ChangeDynamicInitGainThresh ODM_ChangeDynamicInitGainThresh //void ODM_ChangeDynamicInitGainThresh(IN PADAPTER pAdapter, // IN INT32 DM_Type, // IN INT32 DM_Value); //Remove DIG by yuchen BOOLEAN ODM_CheckPowerStatus( IN PADAPTER Adapter ); //Remove ODM_RateAdaptiveStateApInit() by RS_James //Remove Edca by YuChen #endif #if((DM_ODM_SUPPORT_TYPE==ODM_WIN)||(DM_ODM_SUPPORT_TYPE==ODM_CE)) u4Byte ConvertTo_dB(u4Byte Value); u4Byte GetPSDData( PDM_ODM_T pDM_Odm, unsigned int point, u1Byte initial_gain_psd); #endif //Remove ODM_Get_Rate_Bitmap() by RS_James #if (BEAMFORMING_SUPPORT == 1) BEAMFORMING_CAP Beamforming_GetEntryBeamCapByMacId( IN PMGNT_INFO pMgntInfo, IN u1Byte MacId ); #endif VOID ODM_DMInit( IN PDM_ODM_T pDM_Odm ); VOID ODM_DMReset( IN PDM_ODM_T pDM_Odm ); VOID ODM_DMWatchdog( IN PDM_ODM_T pDM_Odm // For common use in the future ); VOID ODM_CmnInfoInit( IN PDM_ODM_T pDM_Odm, IN ODM_CMNINFO_E CmnInfo, IN u4Byte Value ); VOID ODM_CmnInfoHook( IN PDM_ODM_T pDM_Odm, IN ODM_CMNINFO_E CmnInfo, IN PVOID pValue ); VOID ODM_CmnInfoPtrArrayHook( IN PDM_ODM_T pDM_Odm, IN ODM_CMNINFO_E CmnInfo, IN u2Byte Index, IN PVOID pValue ); VOID ODM_CmnInfoUpdate( IN PDM_ODM_T pDM_Odm, IN u4Byte CmnInfo, IN u8Byte Value ); VOID ODM_InitAllTimers( IN PDM_ODM_T pDM_Odm ); VOID ODM_CancelAllTimers( IN PDM_ODM_T pDM_Odm ); VOID ODM_ReleaseAllTimers( IN PDM_ODM_T pDM_Odm ); VOID ODM_ResetIQKResult( IN PDM_ODM_T pDM_Odm ); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) VOID ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm ); VOID ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm ); //===========================================// // Neil Chen----2011--06--15-- //3 Path Diversity //=========================================================== #define TP_MODE 0 #define RSSI_MODE 1 #define TRAFFIC_LOW 0 #define TRAFFIC_HIGH 1 //#define PATHDIV_ENABLE 1 //#define dm_PathDiv_RSSI_Check ODM_PathDivChkPerPktRssi u8Byte PlatformDivision64( IN u8Byte x, IN u8Byte y ); // 20100514 Joseph: Add definition for antenna switching test after link. // This indicates two different the steps. // In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air. // In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK // with original RSSI to determine if it is necessary to switch antenna. #define SWAW_STEP_PEAK 0 #define SWAW_STEP_DETERMINE 1 //==================================================== //3 PathDiV End //==================================================== //#define PathDivCheckBeforeLink8192C ODM_PathDiversityBeforeLink92C #define DM_ChangeDynamicInitGainThresh ODM_ChangeDynamicInitGainThresh //void ODM_ChangeDynamicInitGainThresh(IN PADAPTER pAdapter, // IN INT32 DM_Type, // IN INT32 DM_Value); // typedef enum tag_DIG_Connect_Definition { DIG_STA_DISCONNECT = 0, DIG_STA_CONNECT = 1, DIG_STA_BEFORE_CONNECT = 2, DIG_MultiSTA_DISCONNECT = 3, DIG_MultiSTA_CONNECT = 4, DIG_CONNECT_MAX }DM_DIG_CONNECT_E; // // 2012/01/12 MH Check afapter status. Temp fix BSOD. // #define HAL_ADAPTER_STS_CHK(pDM_Odm)\ if (pDM_Odm->Adapter == NULL)\ {\ return;\ }\ // // For new definition in MP temporarily fro power tracking, // #define odm_TXPowerTrackingDirectCall(_Adapter) \ IS_HARDWARE_TYPE_8192D(_Adapter) ? odm_TXPowerTrackingCallback_ThermalMeter_92D(_Adapter) : \ IS_HARDWARE_TYPE_8192C(_Adapter) ? odm_TXPowerTrackingCallback_ThermalMeter_92C(_Adapter) : \ IS_HARDWARE_TYPE_8723A(_Adapter) ? odm_TXPowerTrackingCallback_ThermalMeter_8723A(_Adapter) :\ ODM_TXPowerTrackingCallback_ThermalMeter(_Adapter) #endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE)) VOID ODM_SingleDualAntennaDefaultSetting( IN PDM_ODM_T pDM_Odm ); BOOLEAN ODM_SingleDualAntennaDetection( IN PDM_ODM_T pDM_Odm, IN u1Byte mode ); #endif // #if((DM_ODM_SUPPORT_TYPE==ODM_WIN)||(DM_ODM_SUPPORT_TYPE==ODM_CE)) VOID ODM_UpdateNoisyState( IN PDM_ODM_T pDM_Odm, IN BOOLEAN bNoisyStateFromC2H ); u4Byte Set_RA_DM_Ratrbitmap_by_Noisy( IN PDM_ODM_T pDM_Odm, IN WIRELESS_MODE WirelessMode, IN u4Byte ratr_bitmap, IN u1Byte rssi_level ); VOID ODM_UpdateInitRate( IN PDM_ODM_T pDM_Odm, IN u1Byte Rate ); VOID ODM_InitializeTimer( IN PDM_ODM_T pDM_Odm, IN PRT_TIMER pTimer, IN RT_TIMER_CALL_BACK CallBackFunc, IN PVOID pContext, IN const char* szID ); VOID ODM_CancelAllTimers( IN PDM_ODM_T pDM_Odm ); VOID ODM_ReleaseAllTimers( IN PDM_ODM_T pDM_Odm ); //Remove ODM_DynamicARFBSelect() by RS_James PVOID PhyDM_Get_Structure( IN PDM_ODM_T pDM_Odm, IN u1Byte Structure_Type ); #if (DM_ODM_SUPPORT_TYPE == ODM_CE) void odm_dtc(PDM_ODM_T pDM_Odm); #endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */ #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_ACS.c000066400000000000000000000147371261122257400212510ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // include files //============================================================ #include "Mp_Precomp.h" #include "phydm_precomp.h" u1Byte ODM_GetAutoChannelSelectResult( IN PVOID pDM_VOID, IN u1Byte Band ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PACS pACS = &pDM_Odm->DM_ACS; #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) if(Band == ODM_BAND_2_4G) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[ACS] ODM_GetAutoChannelSelectResult(): CleanChannel_2G(%d)\n", pACS->CleanChannel_2G)); return (u1Byte)pACS->CleanChannel_2G; } else { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[ACS] ODM_GetAutoChannelSelectResult(): CleanChannel_5G(%d)\n", pACS->CleanChannel_5G)); return (u1Byte)pACS->CleanChannel_5G; } #else return (u1Byte)pACS->CleanChannel_2G; #endif } VOID odm_AutoChannelSelectSetting( IN PVOID pDM_VOID, IN BOOLEAN IsEnable ) { #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; u2Byte period = 0x2710;// 40ms in default u2Byte NHMType = 0x7; ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectSetting()=========> \n")); if(IsEnable) {//20 ms period = 0x1388; NHMType = 0x1; } if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { //PHY parameters initialize for ac series ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC+2, period); //0x990[31:16]=0x2710 Time duration for NHM unit: 4us, 0x2710=40ms //ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT8|BIT9|BIT10, NHMType); //0x994[9:8]=3 enable CCX } else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { //PHY parameters initialize for n series ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N+2, period); //0x894[31:16]=0x2710 Time duration for NHM unit: 4us, 0x2710=40ms //ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, NHMType); //0x890[9:8]=3 enable CCX } #endif } VOID odm_AutoChannelSelectInit( IN PVOID pDM_VOID ) { #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PACS pACS = &pDM_Odm->DM_ACS; u1Byte i; if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)) return; if(pACS->bForceACSResult) return; ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectInit()=========> \n")); pACS->CleanChannel_2G = 1; pACS->CleanChannel_5G = 36; for (i = 0; i < ODM_MAX_CHANNEL_2G; ++i) { pACS->Channel_Info_2G[0][i] = 0; pACS->Channel_Info_2G[1][i] = 0; } if(pDM_Odm->SupportICType & (ODM_IC_11AC_SERIES|ODM_RTL8192D)) { for (i = 0; i < ODM_MAX_CHANNEL_5G; ++i) { pACS->Channel_Info_5G[0][i] = 0; pACS->Channel_Info_5G[1][i] = 0; } } #endif } VOID odm_AutoChannelSelectReset( IN PVOID pDM_VOID ) { #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PACS pACS = &pDM_Odm->DM_ACS; if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)) return; if(pACS->bForceACSResult) return; ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectReset()=========> \n")); odm_AutoChannelSelectSetting(pDM_Odm,TRUE);// for 20ms measurement Phydm_NHMCounterStatisticsReset(pDM_Odm); #endif } VOID odm_AutoChannelSelect( IN PVOID pDM_VOID, IN u1Byte Channel ) { #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PACS pACS = &pDM_Odm->DM_ACS; u1Byte ChannelIDX = 0, SearchIDX = 0; u2Byte MaxScore=0; if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Return: SupportAbility ODM_BB_NHM_CNT is disabled\n")); return; } if(pACS->bForceACSResult) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Force 2G clean channel = %d, 5G clean channel = %d\n", pACS->CleanChannel_2G, pACS->CleanChannel_5G)); return; } ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Channel = %d=========> \n", Channel)); Phydm_GetNHMCounterStatistics(pDM_Odm); odm_AutoChannelSelectSetting(pDM_Odm,FALSE); if(Channel >=1 && Channel <=14) { ChannelIDX = Channel - 1; pACS->Channel_Info_2G[1][ChannelIDX]++; if(pACS->Channel_Info_2G[1][ChannelIDX] >= 2) pACS->Channel_Info_2G[0][ChannelIDX] = (pACS->Channel_Info_2G[0][ChannelIDX] >> 1) + (pACS->Channel_Info_2G[0][ChannelIDX] >> 2) + (pDM_Odm->NHM_cnt_0>>2); else pACS->Channel_Info_2G[0][ChannelIDX] = pDM_Odm->NHM_cnt_0; ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): NHM_cnt_0 = %d \n", pDM_Odm->NHM_cnt_0)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Channel_Info[0][%d] = %d, Channel_Info[1][%d] = %d\n", ChannelIDX, pACS->Channel_Info_2G[0][ChannelIDX], ChannelIDX, pACS->Channel_Info_2G[1][ChannelIDX])); for(SearchIDX = 0; SearchIDX < ODM_MAX_CHANNEL_2G; SearchIDX++) { if(pACS->Channel_Info_2G[1][SearchIDX] != 0) { if(pACS->Channel_Info_2G[0][SearchIDX] >= MaxScore) { MaxScore = pACS->Channel_Info_2G[0][SearchIDX]; pACS->CleanChannel_2G = SearchIDX+1; } } } ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("(1)odm_AutoChannelSelect(): 2G: CleanChannel_2G = %d, MaxScore = %d \n", pACS->CleanChannel_2G, MaxScore)); } else if(Channel >= 36) { // Need to do pACS->CleanChannel_5G = Channel; } #endif } rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_ACS.h000066400000000000000000000032531261122257400212450ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __PHYDMACS_H__ #define __PHYDMACS_H__ #define ACS_VERSION "1.0" #define ODM_MAX_CHANNEL_2G 14 #define ODM_MAX_CHANNEL_5G 24 typedef struct _ACS_ { BOOLEAN bForceACSResult; u1Byte CleanChannel_2G; u1Byte CleanChannel_5G; u2Byte Channel_Info_2G[2][ODM_MAX_CHANNEL_2G]; //Channel_Info[1]: Channel Score, Channel_Info[2]:Channel_Scan_Times u2Byte Channel_Info_5G[2][ODM_MAX_CHANNEL_5G]; }ACS, *PACS; VOID odm_AutoChannelSelectInit( IN PVOID pDM_VOID ); VOID odm_AutoChannelSelectReset( IN PVOID pDM_VOID ); VOID odm_AutoChannelSelect( IN PVOID pDM_VOID, IN u1Byte Channel ); u1Byte ODM_GetAutoChannelSelectResult( IN PVOID pDM_VOID, IN u1Byte Band ); #endifrtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_AntDect.c000066400000000000000000001320631261122257400221560ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // include files //============================================================ #include "Mp_Precomp.h" #include "phydm_precomp.h" #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE)) //IS_ANT_DETECT_SUPPORT_SINGLE_TONE(Adapter) //IS_ANT_DETECT_SUPPORT_RSSI(Adapter) //IS_ANT_DETECT_SUPPORT_PSD(Adapter) //1 [1. Single Tone Method] =================================================== VOID odm_PHY_SaveAFERegisters( IN PDM_ODM_T pDM_Odm, IN pu4Byte AFEReg, IN pu4Byte AFEBackup, IN u4Byte RegisterNum ) { u4Byte i; //RT_DISP(FINIT, INIT_IQK, ("Save ADDA parameters.\n")); for( i = 0 ; i < RegisterNum ; i++){ AFEBackup[i] = ODM_GetBBReg(pDM_Odm, AFEReg[i], bMaskDWord); } } VOID odm_PHY_ReloadAFERegisters( IN PDM_ODM_T pDM_Odm, IN pu4Byte AFEReg, IN pu4Byte AFEBackup, IN u4Byte RegiesterNum ) { u4Byte i; //RT_DISP(FINIT, INIT_IQK, ("Reload ADDA power saving parameters !\n")); for(i = 0 ; i < RegiesterNum; i++) { ODM_SetBBReg(pDM_Odm, AFEReg[i], bMaskDWord, AFEBackup[i]); } } // // Description: // Set Single/Dual Antenna default setting for products that do not do detection in advance. // // Added by Joseph, 2012.03.22 // VOID ODM_SingleDualAntennaDefaultSetting( IN PDM_ODM_T pDM_Odm ) { pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; PADAPTER pAdapter = pDM_Odm->Adapter; u1Byte btAntNum=BT_GetPgAntNum(pAdapter); // Set default antenna A and B status if(btAntNum == 2) { pDM_SWAT_Table->ANTA_ON=TRUE; pDM_SWAT_Table->ANTB_ON=TRUE; } else if(btAntNum == 1) {// Set antenna A as default pDM_SWAT_Table->ANTA_ON=TRUE; pDM_SWAT_Table->ANTB_ON=FALSE; } else { RT_ASSERT(FALSE, ("Incorrect antenna number!!\n")); } } //2 8723A ANT DETECT // // Description: // Implement IQK single tone for RF DPK loopback and BB PSD scanning. // This function is cooperated with BB team Neil. // // Added by Roger, 2011.12.15 // BOOLEAN ODM_SingleDualAntennaDetection( IN PDM_ODM_T pDM_Odm, IN u1Byte mode ) { PADAPTER pAdapter = pDM_Odm->Adapter; pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; u4Byte CurrentChannel,RfLoopReg; u1Byte n; u4Byte Reg88c, Regc08, Reg874, Regc50, Reg948, Regb2c, Reg92c, Reg930, Reg064, AFE_rRx_Wait_CCA; u1Byte initial_gain = 0x5a; u4Byte PSD_report_tmp; u4Byte AntA_report = 0x0, AntB_report = 0x0,AntO_report=0x0,temp; BOOLEAN bResult = TRUE; u4Byte AFE_Backup[16]; u4Byte AFE_REG_8723A[16] = { rRx_Wait_CCA, rTx_CCK_RFON, rTx_CCK_BBON, rTx_OFDM_RFON, rTx_OFDM_BBON, rTx_To_Rx, rTx_To_Tx, rRx_CCK, rRx_OFDM, rRx_Wait_RIFS, rRx_TO_Rx, rStandby, rSleep, rPMPD_ANAEN, rFPGA0_XCD_SwitchControl, rBlue_Tooth}; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection()============> \n")); if(!(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C|ODM_RTL8723B))) return bResult; // Retrieve antenna detection registry info, added by Roger, 2012.11.27. if(!IS_ANT_DETECT_SUPPORT_SINGLE_TONE(pAdapter)) return bResult; if(pDM_Odm->SupportICType == ODM_RTL8192C) { //Which path in ADC/DAC is turnned on for PSD: both I/Q ODM_SetBBReg(pDM_Odm, 0x808, BIT10|BIT11, 0x3); //Ageraged number: 8 ODM_SetBBReg(pDM_Odm, 0x808, BIT12|BIT13, 0x1); //pts = 128; ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); } //1 Backup Current RF/BB Settings CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask); RfLoopReg = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask); if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C)) ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A); // change to Antenna A else if(pDM_Odm->SupportICType == ODM_RTL8723B) { Reg92c = ODM_GetBBReg(pDM_Odm, rDPDT_control, bMaskDWord); Reg930 = ODM_GetBBReg(pDM_Odm, rfe_ctrl_anta_src, bMaskDWord); Reg948 = ODM_GetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord); Regb2c = ODM_GetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord); Reg064 = ODM_GetMACReg(pDM_Odm, rSYM_WLBT_PAPE_SEL, BIT29); ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x1); ODM_SetBBReg(pDM_Odm, rfe_ctrl_anta_src, 0xff, 0x77); ODM_SetMACReg(pDM_Odm, rSYM_WLBT_PAPE_SEL, BIT29, 0x1); //dbg 7 ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0x3c0, 0x0);//dbg 8 ODM_SetBBReg(pDM_Odm, rAGC_table_select, BIT31, 0x0); } ODM_StallExecution(10); //Store A Path Register 88c, c08, 874, c50 Reg88c = ODM_GetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord); Regc08 = ODM_GetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord); Reg874 = ODM_GetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord); Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord); // Store AFE Registers if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C)) odm_PHY_SaveAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16); else if(pDM_Odm->SupportICType == ODM_RTL8723B) AFE_rRx_Wait_CCA = ODM_GetBBReg(pDM_Odm, rRx_Wait_CCA,bMaskDWord); //Set PSD 128 pts ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT14|BIT15, 0x0); //128 pts // To SET CH1 to do ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x7401); //Channel 1 // AFE all on step if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C)) { ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rTx_CCK_RFON, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rTx_CCK_BBON, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rTx_OFDM_RFON, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rTx_OFDM_BBON, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rTx_To_Rx, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rTx_To_Tx, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rRx_CCK, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rRx_OFDM, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rRx_Wait_RIFS, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rRx_TO_Rx, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rStandby, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rSleep, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rPMPD_ANAEN, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_SwitchControl, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rBlue_Tooth, bMaskDWord, 0x6FDB25A4); } else if(pDM_Odm->SupportICType == ODM_RTL8723B) { ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x01c00016); } // 3 wire Disable ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, 0xCCF000C0); //BB IQK Setting ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800E4); ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000); //IQK setting tone@ 4.34Mhz ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008C1C); ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); //Page B init ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00080000); ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000); ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f); if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C)) { ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82150008); ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28150008); } else if(pDM_Odm->SupportICType == ODM_RTL8723B) { ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82150016); ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28150016); } ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x001028d0); ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7f, initial_gain); //RF loop Setting if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C)) ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x0, 0xFFFFF, 0x50008); //IQK Single tone start ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000); ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ODM_StallExecution(10000); // PSD report of antenna A PSD_report_tmp=0x0; for (n=0;n<2;n++) { PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); if(PSD_report_tmp >AntA_report) AntA_report=PSD_report_tmp; } // change to Antenna B if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C)) ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_B); else if(pDM_Odm->SupportICType == ODM_RTL8723B) { //ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x2); ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0xfff, 0x280); ODM_SetBBReg(pDM_Odm, rAGC_table_select, BIT31, 0x1); } ODM_StallExecution(10); // PSD report of antenna B PSD_report_tmp=0x0; for (n=0;n<2;n++) { PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); if(PSD_report_tmp > AntB_report) AntB_report=PSD_report_tmp; } // change to open case if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C)) { ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, 0); // change to Antenna A ODM_StallExecution(10); // PSD report of open case PSD_report_tmp=0x0; for (n=0;n<2;n++) { PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); if(PSD_report_tmp > AntO_report) AntO_report=PSD_report_tmp; } } //Close IQK Single Tone function ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); //1 Return to antanna A if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C)) ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A); // change to Antenna A else if(pDM_Odm->SupportICType == ODM_RTL8723B) { // external DPDT ODM_SetBBReg(pDM_Odm, rDPDT_control, bMaskDWord, Reg92c); //internal S0/S1 ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord, Reg948); ODM_SetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord, Regb2c); ODM_SetBBReg(pDM_Odm, rfe_ctrl_anta_src, bMaskDWord, Reg930); ODM_SetMACReg(pDM_Odm, rSYM_WLBT_PAPE_SEL, BIT29, Reg064); } ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, Reg88c); ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, Regc08); ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, Reg874); ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7F, 0x40); ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord, Regc50); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,CurrentChannel); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask,RfLoopReg); //Reload AFE Registers if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C)) odm_PHY_ReloadAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16); else if(pDM_Odm->SupportICType == ODM_RTL8723B) ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, AFE_rRx_Wait_CCA); if(pDM_Odm->SupportICType == ODM_RTL8723A) { //2 Test Ant B based on Ant A is ON if(mode==ANTTESTB) { if(AntA_report >= 100) { if(AntB_report > (AntA_report+1)) { pDM_SWAT_Table->ANTB_ON=FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n")); } else { pDM_SWAT_Table->ANTB_ON=TRUE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna is A and B\n")); } } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default bResult = FALSE; } } //2 Test Ant A and B based on DPDT Open else if(mode==ANTTESTALL) { if((AntO_report >=100) && (AntO_report <=118)) { if(AntA_report > (AntO_report+1)) { pDM_SWAT_Table->ANTA_ON=FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant A is OFF\n")); } else { pDM_SWAT_Table->ANTA_ON=TRUE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant A is ON\n")); } if(AntB_report > (AntO_report+2)) { pDM_SWAT_Table->ANTB_ON=FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant B is OFF\n")); } else { pDM_SWAT_Table->ANTB_ON=TRUE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant B is ON\n")); } ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d \n", 2416, AntA_report)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d \n", 2416, AntB_report)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_O[%d]= %d \n", 2416, AntO_report)); pDM_Odm->AntDetectedInfo.bAntDetected= TRUE; pDM_Odm->AntDetectedInfo.dBForAntA = AntA_report; pDM_Odm->AntDetectedInfo.dBForAntB = AntB_report; pDM_Odm->AntDetectedInfo.dBForAntO = AntO_report; } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("return FALSE!!\n")); bResult = FALSE; } } } else if(pDM_Odm->SupportICType == ODM_RTL8192C) { if(AntA_report >= 100) { if(AntB_report > (AntA_report+2)) { pDM_SWAT_Table->ANTA_ON=FALSE; pDM_SWAT_Table->ANTB_ON=TRUE; ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna B\n")); } else if(AntA_report > (AntB_report+2)) { pDM_SWAT_Table->ANTA_ON=TRUE; pDM_SWAT_Table->ANTB_ON=FALSE; ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n")); } else { pDM_SWAT_Table->ANTA_ON=TRUE; pDM_SWAT_Table->ANTB_ON=TRUE; } } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); pDM_SWAT_Table->ANTA_ON=TRUE; // Set Antenna A on as default pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default bResult = FALSE; } } else if(pDM_Odm->SupportICType == ODM_RTL8723B) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d \n", 2416, AntA_report)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d \n", 2416, AntB_report)); //2 Test Ant B based on Ant A is ON if((AntA_report >= 100) && (AntB_report >= 100) && (AntA_report <= 135) && (AntB_report <= 135)) { u1Byte TH1=2, TH2=6; if((AntA_report - AntB_report < TH1) || (AntB_report - AntA_report < TH1)) { pDM_SWAT_Table->ANTA_ON=TRUE; pDM_SWAT_Table->ANTB_ON=TRUE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SingleDualAntennaDetection(): Dual Antenna\n")); } else if(((AntA_report - AntB_report >= TH1) && (AntA_report - AntB_report <= TH2)) || ((AntB_report - AntA_report >= TH1) && (AntB_report - AntA_report <= TH2))) { pDM_SWAT_Table->ANTA_ON=FALSE; pDM_SWAT_Table->ANTB_ON=FALSE; bResult = FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); } else { pDM_SWAT_Table->ANTA_ON = TRUE; pDM_SWAT_Table->ANTB_ON=FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SingleDualAntennaDetection(): Single Antenna\n")); } pDM_Odm->AntDetectedInfo.bAntDetected= TRUE; pDM_Odm->AntDetectedInfo.dBForAntA = AntA_report; pDM_Odm->AntDetectedInfo.dBForAntB = AntB_report; pDM_Odm->AntDetectedInfo.dBForAntO = AntO_report; } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("return FALSE!!\n")); bResult = FALSE; } } return bResult; } //1 [2. Scan AP RSSI Method] ================================================== void odm_SwAntDetectInit( IN PDM_ODM_T pDM_Odm ) { pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; //pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c = ODM_Read4Byte(pDM_Odm, rDPDT_control); //pDM_SWAT_Table->PreAntenna = MAIN_ANT; //pDM_SWAT_Table->CurAntenna = MAIN_ANT; pDM_SWAT_Table->SWAS_NoLink_State = 0; pDM_SWAT_Table->Pre_Aux_FailDetec = FALSE; pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 = 0xff; } BOOLEAN ODM_SwAntDivCheckBeforeLink( IN PDM_ODM_T pDM_Odm ) { #if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter); PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; s1Byte Score = 0; PRT_WLAN_BSS pTmpBssDesc, pTestBssDesc; u1Byte power_target = 10, power_target_L = 9, power_target_H = 16; u1Byte tmp_power_diff = 0,power_diff = 0,avg_power_diff = 0,max_power_diff = 0,min_power_diff = 0xff; u2Byte index, counter = 0; static u1Byte ScanChannel; u8Byte tStamp_diff = 0; u4Byte tmp_SWAS_NoLink_BK_Reg948; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ANTA_ON = (( %d )) , ANTB_ON = (( %d )) \n",pDM_Odm->DM_SWAT_Table.ANTA_ON ,pDM_Odm->DM_SWAT_Table.ANTB_ON )); //if(HP id) { if(pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult==TRUE && pDM_Odm->SupportICType == ODM_RTL8723B) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("8723B RSSI-based Antenna Detection is done\n")); return FALSE; } if(pDM_Odm->SupportICType == ODM_RTL8723B) { if(pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 == 0xff) pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 = ODM_Read4Byte(pDM_Odm, rS0S1_PathSwitch ); } } if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413 { // The ODM structure is not initialized. return FALSE; } // Retrieve antenna detection registry info, added by Roger, 2012.11.27. if(!IS_ANT_DETECT_SUPPORT_RSSI(Adapter)) { return FALSE; } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Antenna Detection: RSSI Method\n")); } // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK); if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) { PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): RFChangeInProgress(%x), eRFPowerState(%x)\n", pMgntInfo->RFChangeInProgress, pHalData->eRFPowerState)); pDM_SWAT_Table->SWAS_NoLink_State = 0; return FALSE; } else { PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); } ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("pDM_SWAT_Table->SWAS_NoLink_State = %d\n", pDM_SWAT_Table->SWAS_NoLink_State)); //1 Run AntDiv mechanism "Before Link" part. if(pDM_SWAT_Table->SWAS_NoLink_State == 0) { //1 Prepare to do Scan again to check current antenna state. // Set check state to next step. pDM_SWAT_Table->SWAS_NoLink_State = 1; // Copy Current Scan list. pMgntInfo->tmpNumBssDesc = pMgntInfo->NumBssDesc; PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC); // Go back to scan function again. ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Scan one more time\n")); pMgntInfo->ScanStep=0; pMgntInfo->bScanAntDetect = TRUE; ScanChannel = odm_SwAntDivSelectScanChnl(Adapter); if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8821)) { if(pDM_FatTable->RxIdleAnt == MAIN_ANT) ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); else ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); if(ScanChannel == 0) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): No AP List Avaiable, Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT")); if(IS_5G_WIRELESS_MODE(pMgntInfo->dot11CurrentWirelessMode)) { pDM_SWAT_Table->Ant5G = pDM_FatTable->RxIdleAnt; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant5G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); } else { pDM_SWAT_Table->Ant2G = pDM_FatTable->RxIdleAnt; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant2G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); } return FALSE; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Change to %s for testing.\n", ((pDM_FatTable->RxIdleAnt == MAIN_ANT)?"MAIN_ANT":"AUX_ANT"))); } else if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8723B)) { if(pDM_Odm->SupportICType == ODM_RTL8192C) { // Switch Antenna to another one. pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?AUX_ANT:MAIN_ANT; pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); } else if(pDM_Odm->SupportICType == ODM_RTL8723B) { // Switch Antenna to another one. tmp_SWAS_NoLink_BK_Reg948 = ODM_Read4Byte(pDM_Odm, rS0S1_PathSwitch ); if( (pDM_SWAT_Table->CurAntenna = MAIN_ANT) && (tmp_SWAS_NoLink_BK_Reg948==0x200)) { ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0xfff, 0x280); ODM_SetBBReg(pDM_Odm, rAGC_table_select, BIT31, 0x1); pDM_SWAT_Table->CurAntenna = AUX_ANT; } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Reg[948]= (( %x )) was in wrong state\n", tmp_SWAS_NoLink_BK_Reg948 )); return FALSE; } ODM_StallExecution(10); } ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Change to (( %s-ant)) for testing.\n", (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?"MAIN":"AUX")); } odm_SwAntDivConstructScanChnl(Adapter, ScanChannel); PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); return TRUE; } else //pDM_SWAT_Table->SWAS_NoLink_State == 1 { //1 ScanComple() is called after antenna swiched. //1 Check scan result and determine which antenna is going //1 to be used. ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,(" tmpNumBssDesc= (( %d )) \n",pMgntInfo->tmpNumBssDesc));// debug for Dino for(index = 0; index < pMgntInfo->tmpNumBssDesc; index++) { pTmpBssDesc = &(pMgntInfo->tmpbssDesc[index]); // Antenna 1 pTestBssDesc = &(pMgntInfo->bssDesc[index]); // Antenna 2 if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): ERROR!! This shall not happen.\n")); continue; } if(pDM_Odm->SupportICType != ODM_RTL8723B) { if(pTmpBssDesc->ChannelNumber == ScanChannel) { if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Compare scan entry: Score++\n")); RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); Score++; PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); } else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Compare scan entry: Score--\n")); RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); Score--; } else { if(pTestBssDesc->bdTstamp - pTmpBssDesc->bdTstamp < 5000) { RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("The 2nd Antenna didn't get this AP\n\n")); } } } } else // 8723B { if(pTmpBssDesc->ChannelNumber == ScanChannel) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ChannelNumber == ScanChannel -> (( %d )) \n", pTmpBssDesc->ChannelNumber )); if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) // Pow(Ant1) > Pow(Ant2) { counter++; tmp_power_diff=(u1Byte)(pTmpBssDesc->RecvSignalPower - pTestBssDesc->RecvSignalPower); power_diff = power_diff + tmp_power_diff; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf); ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf); //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("tmp_power_diff: (( %d)),max_power_diff: (( %d)),min_power_diff: (( %d)) \n", tmp_power_diff,max_power_diff,min_power_diff)); if(tmp_power_diff > max_power_diff) max_power_diff=tmp_power_diff; if(tmp_power_diff < min_power_diff) min_power_diff=tmp_power_diff; //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("max_power_diff: (( %d)),min_power_diff: (( %d)) \n",max_power_diff,min_power_diff)); PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); } else if(pTestBssDesc->RecvSignalPower > pTmpBssDesc->RecvSignalPower) // Pow(Ant1) < Pow(Ant2) { counter++; tmp_power_diff=(u1Byte)(pTestBssDesc->RecvSignalPower - pTmpBssDesc->RecvSignalPower); power_diff = power_diff + tmp_power_diff; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf); ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf); if(tmp_power_diff > max_power_diff) max_power_diff=tmp_power_diff; if(tmp_power_diff < min_power_diff) min_power_diff=tmp_power_diff; } else // Pow(Ant1) = Pow(Ant2) { if(pTestBssDesc->bdTstamp > pTmpBssDesc->bdTstamp) // Stamp(Ant1) < Stamp(Ant2) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("time_diff: %lld\n", (pTestBssDesc->bdTstamp-pTmpBssDesc->bdTstamp)/1000)); if(pTestBssDesc->bdTstamp - pTmpBssDesc->bdTstamp > 5000) { counter++; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf); ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf); min_power_diff = 0; } } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Error !!!]: Time_diff: %lld\n", (pTestBssDesc->bdTstamp-pTmpBssDesc->bdTstamp)/1000)); } } } } } if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8821)) { if(pMgntInfo->NumBssDesc!=0 && Score<0) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Remain Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT")); if(pDM_FatTable->RxIdleAnt == MAIN_ANT) ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); else ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); } if(IS_5G_WIRELESS_MODE(pMgntInfo->dot11CurrentWirelessMode)) { pDM_SWAT_Table->Ant5G = pDM_FatTable->RxIdleAnt; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant5G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); } else { pDM_SWAT_Table->Ant2G = pDM_FatTable->RxIdleAnt; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant2G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); } } else if(pDM_Odm->SupportICType == ODM_RTL8723B) { if(counter == 0) { if(pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec == FALSE) { pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec = TRUE; pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Counter=(( 0 )) , [[ Cannot find any AP with Aux-ant ]] -> Scan Target-channel again \n")); //3 [ Scan again ] odm_SwAntDivConstructScanChnl(Adapter, ScanChannel); PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); return TRUE; } else// Pre_Aux_FailDetec == TRUE { //2 [ Single Antenna ] pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec = FALSE; pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Counter=(( 0 )) , [[ Still cannot find any AP ]] \n")); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n")); } pDM_Odm->DM_SWAT_Table.Aux_FailDetec_Counter++; } else { pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec = FALSE; if(counter==3) { avg_power_diff = ((power_diff-max_power_diff - min_power_diff)>>1)+ ((max_power_diff + min_power_diff)>>2); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("counter: (( %d )) , power_diff: (( %d )) \n", counter, power_diff)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ counter==3 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) , min_power_diff: (( %d )) \n", avg_power_diff,max_power_diff, min_power_diff)); } else if(counter>=4) { avg_power_diff=(power_diff-max_power_diff - min_power_diff) / (counter - 2); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("counter: (( %d )) , power_diff: (( %d )) \n", counter, power_diff)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ counter>=4 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) , min_power_diff: (( %d )) \n", avg_power_diff,max_power_diff, min_power_diff)); } else//counter==1,2 { avg_power_diff=power_diff/counter; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("avg_power_diff: (( %d )) , counter: (( %d )) , power_diff: (( %d )) \n", avg_power_diff,counter, power_diff)); } //2 [ Retry ] if( (avg_power_diff >=power_target_L) && (avg_power_diff <=power_target_H) ) { pDM_Odm->DM_SWAT_Table.Retry_Counter++; if(pDM_Odm->DM_SWAT_Table.Retry_Counter<=3) { pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[[ Low confidence result ]] avg_power_diff= (( %d )) -> Scan Target-channel again ]] \n", avg_power_diff)); //3 [ Scan again ] odm_SwAntDivConstructScanChnl(Adapter, ScanChannel); PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); return TRUE; } else { pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[[ Still Low confidence result ]] (( Retry_Counter > 3 )) \n")); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n")); } } //2 [ Dual Antenna ] else if( (pMgntInfo->NumBssDesc != 0) && (avg_power_diff < power_target_L) ) { pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE; if(pDM_Odm->DM_SWAT_Table.ANTB_ON == FALSE) { pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; pDM_Odm->DM_SWAT_Table.ANTB_ON = TRUE; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SwAntDivCheckBeforeLink(): Dual antenna\n")); pDM_Odm->DM_SWAT_Table.Dual_Ant_Counter++; // set bt coexDM from 1ant coexDM to 2ant coexDM BT_SetBtCoexAntNum(Adapter, BT_COEX_ANT_TYPE_DETECTED, 2); //3 [ Init antenna diversity ] pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; ODM_AntDivInit(pDM_Odm); } //2 [ Single Antenna ] else if(avg_power_diff > power_target_H) { pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE; if(pDM_Odm->DM_SWAT_Table.ANTB_ON == TRUE) { pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; pDM_Odm->DM_SWAT_Table.ANTB_ON = FALSE; //BT_SetBtCoexAntNum(Adapter, BT_COEX_ANT_TYPE_DETECTED, 1); } ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n")); pDM_Odm->DM_SWAT_Table.Single_Ant_Counter++; } } //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("bResult=(( %d ))\n",pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Dual_Ant_Counter = (( %d )), Single_Ant_Counter = (( %d )) , Retry_Counter = (( %d )) , Aux_FailDetec_Counter = (( %d ))\n\n\n", pDM_Odm->DM_SWAT_Table.Dual_Ant_Counter,pDM_Odm->DM_SWAT_Table.Single_Ant_Counter,pDM_Odm->DM_SWAT_Table.Retry_Counter,pDM_Odm->DM_SWAT_Table.Aux_FailDetec_Counter)); //2 recover the antenna setting if(pDM_Odm->DM_SWAT_Table.ANTB_ON == FALSE) ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0xfff, (pDM_SWAT_Table->SWAS_NoLink_BK_Reg948)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("bResult=(( %d )), Recover Reg[948]= (( %x )) \n\n",pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult, pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 )); } else if(pDM_Odm->SupportICType == ODM_RTL8192C) { if(pMgntInfo->NumBssDesc!=0 && Score<=0) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Using Ant(%s)\n", (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?"MAIN":"AUX")); pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Remain Ant(%s)\n", (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?"AUX":"MAIN")); pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna; //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); } } // Check state reset to default and wait for next time. pDM_SWAT_Table->SWAS_NoLink_State = 0; pMgntInfo->bScanAntDetect = FALSE; return FALSE; } #else return FALSE; #endif return FALSE; } //1 [3. PSD Method] ========================================================== u4Byte odm_GetPSDData( IN PDM_ODM_T pDM_Odm, IN u2Byte point, IN u1Byte initial_gain) { u4Byte psd_report; ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point); ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1); //Start PSD calculation, Reg808[22]=0->1 ODM_StallExecution(150);//Wait for HW PSD report ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0);//Stop PSD calculation, Reg808[22]=1->0 psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF;//Read PSD report, Reg8B4[15:0] psd_report = (u4Byte) (ConvertTo_dB(psd_report));//+(u4Byte)(initial_gain); return psd_report; } VOID ODM_SingleDualAntennaDetection_PSD( IN PDM_ODM_T pDM_Odm ) { PADAPTER pAdapter = pDM_Odm->Adapter; pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; u4Byte Channel_ori; u1Byte initial_gain = 0x36; u1Byte tone_idx; u1Byte Tone_lenth_1=7, Tone_lenth_2=4; u2Byte Tone_idx_1[7]={88, 104, 120, 8, 24, 40, 56}; u2Byte Tone_idx_2[4]={8, 24, 40, 56}; u4Byte PSD_report_Main[11]={0}, PSD_report_Aux[11]={0}; //u1Byte Tone_lenth_1=4, Tone_lenth_2=2; //u2Byte Tone_idx_1[4]={88, 120, 24, 56}; //u2Byte Tone_idx_2[2]={ 24, 56}; //u4Byte PSD_report_Main[6]={0}, PSD_report_Aux[6]={0}; u4Byte PSD_report_temp,MAX_PSD_report_Main=0,MAX_PSD_report_Aux=0; u4Byte PSD_power_threshold; u4Byte Main_psd_result=0, Aux_psd_result=0; u4Byte Regc50, Reg948, Regb2c,Regc14,Reg908; u4Byte i=0,test_num=8; if(pDM_Odm->SupportICType != ODM_RTL8723B) return; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection_PSD()============> \n")); //2 [ Backup Current RF/BB Settings ] Channel_ori = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask); Reg948 = ODM_GetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord); Regb2c = ODM_GetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord); Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord); Regc14 = ODM_GetBBReg(pDM_Odm, 0xc14, bMaskDWord); Reg908 = ODM_GetBBReg(pDM_Odm, 0x908, bMaskDWord); //2 [ Setting for doing PSD function (CH4)] ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); //disable whole CCK block ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); // Turn off TX -> Pause TX Queue ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); // [ Set IQK Matrix = 0 ] equivalent to [ Turn off CCA] // PHYTXON while loop ODM_SetBBReg(pDM_Odm, 0x908, bMaskDWord, 0x803); while (ODM_GetBBReg(pDM_Odm, 0xdf4, BIT6)) { i++; if (i > 1000000) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Wait in %s() more than %d times!\n", __FUNCTION__, i)); break; } } ODM_SetBBReg(pDM_Odm, 0xc50, 0x7f, initial_gain); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); // Set RF to CH4 & 40M ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0xf); // 3 wire Disable 88c[23:20]=0xf ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT14|BIT15, 0x0); //128 pt //Set PSD 128 ptss ODM_StallExecution(3000); //2 [ Doing PSD Function in (CH4)] //Antenna A ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Main-ant (CH4)\n")); ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x200); ODM_StallExecution(10); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dbg\n")); for (i=0;iPSD_report_Main[tone_idx] ) PSD_report_Main[tone_idx]+=PSD_report_temp; } } //Antenna B ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Aux-ant (CH4)\n")); ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x280); ODM_StallExecution(10); for (i=0;iPSD_report_Aux[tone_idx] ) PSD_report_Aux[tone_idx]+=PSD_report_temp; } } //2 [ Doing PSD Function in (CH8)] ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0x0); // 3 wire enable 88c[23:20]=0x0 ODM_StallExecution(3000); ODM_SetBBReg(pDM_Odm, 0xc50, 0x7f, initial_gain); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); // Set RF to CH8 & 40M ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0xf); // 3 wire Disable 88c[23:20]=0xf ODM_StallExecution(3000); //Antenna A ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Main-ant (CH8)\n")); ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x200); ODM_StallExecution(10); for (i=0;iPSD_report_Main[tone_idx] ) PSD_report_Main[Tone_lenth_1+tone_idx]+=PSD_report_temp; } } //Antenna B ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Aux-ant (CH8)\n")); ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x280); ODM_StallExecution(10); for (i=0;iPSD_report_Aux[tone_idx] ) PSD_report_Aux[Tone_lenth_1+tone_idx]+=PSD_report_temp; } } //2 [ Calculate Result ] ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\nMain PSD Result: (ALL) \n")); for (tone_idx=0;tone_idx<(Tone_lenth_1+Tone_lenth_2);tone_idx++) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Tone-%d]: %d, \n",(tone_idx+1), PSD_report_Main[tone_idx] )); Main_psd_result+= PSD_report_Main[tone_idx]; if(PSD_report_Main[tone_idx]>MAX_PSD_report_Main) MAX_PSD_report_Main=PSD_report_Main[tone_idx]; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("--------------------------- \nTotal_Main= (( %d ))\n", Main_psd_result)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MAX_Main = (( %d ))\n", MAX_PSD_report_Main)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\nAux PSD Result: (ALL) \n")); for (tone_idx=0;tone_idx<(Tone_lenth_1+Tone_lenth_2);tone_idx++) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Tone-%d]: %d, \n",(tone_idx+1), PSD_report_Aux[tone_idx] )); Aux_psd_result+= PSD_report_Aux[tone_idx]; if(PSD_report_Aux[tone_idx]>MAX_PSD_report_Aux) MAX_PSD_report_Aux=PSD_report_Aux[tone_idx]; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("--------------------------- \nTotal_Aux= (( %d ))\n", Aux_psd_result)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MAX_Aux = (( %d ))\n\n", MAX_PSD_report_Aux)); //Main_psd_result=Main_psd_result-MAX_PSD_report_Main; //Aux_psd_result=Aux_psd_result-MAX_PSD_report_Aux; PSD_power_threshold=(Main_psd_result*7)>>3; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Main_result , Aux_result ] = [ %d , %d ], PSD_power_threshold=(( %d ))\n", Main_psd_result, Aux_psd_result,PSD_power_threshold)); //3 [ Dual Antenna ] if(Aux_psd_result >= PSD_power_threshold ) { if(pDM_Odm->DM_SWAT_Table.ANTB_ON == FALSE) { pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; pDM_Odm->DM_SWAT_Table.ANTB_ON = TRUE; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SwAntDivCheckBeforeLink(): Dual antenna\n")); // set bt coexDM from 1ant coexDM to 2ant coexDM //BT_SetBtCoexAntNum(pAdapter, BT_COEX_ANT_TYPE_DETECTED, 2); // Init antenna diversity pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; ODM_AntDivInit(pDM_Odm); } //3 [ Single Antenna ] else { if(pDM_Odm->DM_SWAT_Table.ANTB_ON == TRUE) { pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; pDM_Odm->DM_SWAT_Table.ANTB_ON = FALSE; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n")); } //2 [ Recover all parameters ] ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,Channel_ori); ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0x0); // 3 wire enable 88c[23:20]=0x0 ODM_SetBBReg(pDM_Odm, 0xc50, 0x7f, Regc50); ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord, Reg948); ODM_SetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord, Regb2c); ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); //enable whole CCK block ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x0); //Turn on TX // Resume TX Queue ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, Regc14); // [ Set IQK Matrix = 0 ] equivalent to [ Turn on CCA] ODM_SetBBReg(pDM_Odm, 0x908, bMaskDWord, Reg908); return; } #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_AntDect.h000066400000000000000000000034421261122257400221610ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __PHYDMANTDECT_H__ #define __PHYDMANTDECT_H__ #define ANTDECT_VERSION "1.0" #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE)) //1 [1. Single Tone Method] =================================================== VOID ODM_SingleDualAntennaDefaultSetting( IN PDM_ODM_T pDM_Odm ); BOOLEAN ODM_SingleDualAntennaDetection( IN PDM_ODM_T pDM_Odm, IN u1Byte mode ); //1 [2. Scan AP RSSI Method] ================================================== VOID odm_SwAntDetectInit( IN PDM_ODM_T pDM_Odm ); #define SwAntDivCheckBeforeLink ODM_SwAntDivCheckBeforeLink BOOLEAN ODM_SwAntDivCheckBeforeLink( IN PDM_ODM_T pDM_Odm ); //1 [3. PSD Method] ========================================================== VOID ODM_SingleDualAntennaDetection_PSD( IN PDM_ODM_T pDM_Odm ); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_AntDiv.c000066400000000000000000003012061261122257400220160ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // include files //============================================================ #include "Mp_Precomp.h" #include "phydm_precomp.h" //====================================================== // when antenna test utility is on or some testing need to disable antenna diversity // call this function to disable all ODM related mechanisms which will switch antenna. //====================================================== VOID ODM_StopAntennaSwitchDm( IN PDM_ODM_T pDM_Odm ) { // disable ODM antenna diversity pDM_Odm->SupportAbility &= ~ODM_BB_ANT_DIV; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("STOP Antenna Diversity \n")); } VOID ODM_SetAntConfig( IN PDM_ODM_T pDM_Odm, IN u1Byte antSetting // 0=A, 1=B, 2=C, .... ) { if(pDM_Odm->SupportICType == ODM_RTL8723B) { if(antSetting == 0) // ant A ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000000); else if(antSetting == 1) ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); } } //====================================================== VOID ODM_SwAntDivRestAfterLink( IN PDM_ODM_T pDM_Odm ) { pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; u4Byte i; if(pDM_Odm->SupportICType == ODM_RTL8723A) { pDM_SWAT_Table->RSSI_cnt_A = 0; pDM_SWAT_Table->RSSI_cnt_B = 0; pDM_Odm->RSSI_test = FALSE; pDM_SWAT_Table->try_flag = 0xff; pDM_SWAT_Table->RSSI_Trying = 0; pDM_SWAT_Table->SelectAntennaMap=0xAA; } else if(pDM_Odm->SupportICType & (ODM_RTL8723B|ODM_RTL8821)) { pDM_Odm->RSSI_test = FALSE; pDM_SWAT_Table->try_flag = 0xff; pDM_SWAT_Table->RSSI_Trying = 0; pDM_SWAT_Table->Double_chk_flag= 0; pDM_FatTable->RxIdleAnt=MAIN_ANT; for (i=0; iMainAnt_Sum[i] = 0; pDM_FatTable->AuxAnt_Sum[i] = 0; pDM_FatTable->MainAnt_Cnt[i] = 0; pDM_FatTable->AuxAnt_Cnt[i] = 0; } } } #if (defined(CONFIG_HW_ANTENNA_DIVERSITY)) VOID odm_AntDiv_on_off( IN PDM_ODM_T pDM_Odm ,IN u1Byte swch) { if(pDM_Odm->AntDivType==S0S1_SW_ANTDIV || pDM_Odm->AntDivType==CGCS_RX_SW_ANTDIV) return; if(pDM_Odm->SupportICType & ODM_N_ANTDIV_SUPPORT) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("(( Turn %s )) N-Series HW-AntDiv block\n",(swch==ANTDIV_ON)?"ON" : "OFF")); ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, swch); //OFDM AntDiv function block enable if( pDM_Odm->AntDivType != S0S1_SW_ANTDIV) ODM_SetBBReg(pDM_Odm, 0xa00 , BIT15, swch); //CCK AntDiv function block enable } else if(pDM_Odm->SupportICType & ODM_AC_ANTDIV_SUPPORT) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("(( Turn %s )) AC-Series HW-AntDiv block\n",(swch==ANTDIV_ON)?"ON" : "OFF")); if(pDM_Odm->SupportICType == ODM_RTL8812) { ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, swch); //OFDM AntDiv function block enable //ODM_SetBBReg(pDM_Odm, 0xa00 , BIT15, swch); //CCK AntDiv function block enable } else { ODM_SetBBReg(pDM_Odm, 0x8D4 , BIT24, swch); //OFDM AntDiv function block enable if( (pDM_Odm->CutVersion >= ODM_CUT_C) && (pDM_Odm->SupportICType == ODM_RTL8821) && ( pDM_Odm->AntDivType != S0S1_SW_ANTDIV)) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("(( Turn %s )) CCK HW-AntDiv block\n",(swch==ANTDIV_ON)?"ON" : "OFF")); ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, swch); ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, swch); //CCK AntDiv function block enable } } } } VOID ODM_UpdateRxIdleAnt(IN PDM_ODM_T pDM_Odm, IN u1Byte Ant) { pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; u4Byte DefaultAnt, OptionalAnt,value32; //#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) //PADAPTER pAdapter = pDM_Odm->Adapter; //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); //#endif if(pDM_FatTable->RxIdleAnt != Ant) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] RxIdleAnt =%s\n",(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); if(!(pDM_Odm->SupportICType & ODM_RTL8723B)) pDM_FatTable->RxIdleAnt = Ant; if(Ant == MAIN_ANT) { DefaultAnt = ANT1_2G; OptionalAnt = ANT2_2G; } else { DefaultAnt = ANT2_2G; OptionalAnt = ANT1_2G; } if(pDM_Odm->SupportICType & ODM_N_ANTDIV_SUPPORT) { if(pDM_Odm->SupportICType==ODM_RTL8192E) { ODM_SetBBReg(pDM_Odm, 0xB38 , BIT5|BIT4|BIT3, DefaultAnt); //Default RX ODM_SetBBReg(pDM_Odm, 0xB38 , BIT8|BIT7|BIT6, OptionalAnt);//Optional RX ODM_SetBBReg(pDM_Odm, 0x860, BIT14|BIT13|BIT12, DefaultAnt);//Default TX } else if(pDM_Odm->SupportICType==ODM_RTL8723B) { value32 = ODM_GetBBReg(pDM_Odm, 0x948, 0xFFF); if (value32 !=0x280) ODM_UpdateRxIdleAnt_8723B(pDM_Odm, Ant, DefaultAnt, OptionalAnt); else ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Fail to set RX antenna due to 0x948 = 0x280\n")); } else { ODM_SetBBReg(pDM_Odm, 0x864 , BIT5|BIT4|BIT3, DefaultAnt); //Default RX ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, OptionalAnt); //Optional RX ODM_SetBBReg(pDM_Odm, 0x860, BIT14|BIT13|BIT12, DefaultAnt); //Default TX } } else if(pDM_Odm->SupportICType & ODM_AC_ANTDIV_SUPPORT) { u2Byte value16 = ODM_Read2Byte(pDM_Odm, ODM_REG_TRMUX_11AC+2); // // 2014/01/14 MH/Luke.Lee Add direct write for register 0xc0a to prevnt // incorrect 0xc08 bit0-15 .We still not know why it is changed. // value16 &= ~(BIT11|BIT10|BIT9|BIT8|BIT7|BIT6|BIT5|BIT4|BIT3); value16 |= ((u2Byte)DefaultAnt <<3); value16 |= ((u2Byte)OptionalAnt <<6); value16 |= ((u2Byte)DefaultAnt <<9); ODM_Write2Byte(pDM_Odm, ODM_REG_TRMUX_11AC+2, value16); /* ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC , BIT21|BIT20|BIT19, DefaultAnt); //Default RX ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC , BIT24|BIT23|BIT22, OptionalAnt);//Optional RX ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC , BIT27|BIT26|BIT25, DefaultAnt); //Default TX */ } if(pDM_Odm->SupportICType==ODM_RTL8188E) { ODM_SetMACReg(pDM_Odm, 0x6D8 , BIT7|BIT6, DefaultAnt); //PathA Resp Tx } else { ODM_SetMACReg(pDM_Odm, 0x6D8 , BIT10|BIT9|BIT8, DefaultAnt); //PathA Resp Tx } } else// pDM_FatTable->RxIdleAnt == Ant { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Stay in Ori-Ant ] RxIdleAnt =%s\n",(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); pDM_FatTable->RxIdleAnt = Ant; } } VOID odm_UpdateTxAnt(IN PDM_ODM_T pDM_Odm, IN u1Byte Ant, IN u4Byte MacId) { pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; u1Byte TxAnt; if(Ant == MAIN_ANT) TxAnt = ANT1_2G; else TxAnt = ANT2_2G; pDM_FatTable->antsel_a[MacId] = TxAnt&BIT0; pDM_FatTable->antsel_b[MacId] = (TxAnt&BIT1)>>1; pDM_FatTable->antsel_c[MacId] = (TxAnt&BIT2)>>2; #if (DM_ODM_SUPPORT_TYPE == ODM_AP) if (pDM_Odm->antdiv_rssi) { //panic_printk("[Tx from TxInfo]: MacID:(( %d )), TxAnt = (( %s ))\n",MacId,(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT"); //panic_printk("antsel_tr_mux=(( 3'b%d%d%d ))\n", pDM_FatTable->antsel_c[MacId] , pDM_FatTable->antsel_b[MacId] , pDM_FatTable->antsel_a[MacId] ); } #endif //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Tx from TxInfo]: MacID:(( %d )), TxAnt = (( %s ))\n", // MacId,(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("antsel_tr_mux=(( 3'b%d%d%d ))\n", //pDM_FatTable->antsel_c[MacId] , pDM_FatTable->antsel_b[MacId] , pDM_FatTable->antsel_a[MacId] )); } #if (RTL8188E_SUPPORT == 1) VOID odm_RX_HWAntDiv_Init_88E( IN PDM_ODM_T pDM_Odm ) { u4Byte value32; pDM_Odm->AntType = ODM_AUTO_ANT; if(pDM_Odm->mp_mode == TRUE) { pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); // disable HW AntDiv ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); // 1:CG, 0:CS return; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188E AntDiv_Init => AntDivType=[CGCS_RX_HW_ANTDIV]\n")); //MAC Setting value32 = ODM_GetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); ODM_SetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); //Reg4C[25]=1, Reg4C[23]=1 for pin output //Pin Settings ODM_SetBBReg(pDM_Odm, ODM_REG_PIN_CTRL_11N , BIT9|BIT8, 0);//Reg870[8]=1'b0, Reg870[9]=1'b0 //antsel antselb by HW ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT10, 0); //Reg864[10]=1'b0 //antsel2 by HW ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT22, 1); //Regb2c[22]=1'b0 //disable CS/CG switch ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); //Regb2c[31]=1'b1 //output at CG only //OFDM Settings ODM_SetBBReg(pDM_Odm, ODM_REG_ANTDIV_PARA1_11N , bMaskDWord, 0x000000a0); //CCK Settings ODM_SetBBReg(pDM_Odm, ODM_REG_BB_PWR_SAV4_11N , BIT7, 1); //Fix CCK PHY status report issue ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA2_11N , BIT4, 1); //CCK complete HW AntDiv within 64 samples ODM_SetBBReg(pDM_Odm, ODM_REG_ANT_MAPPING1_11N , 0xFFFF, 0x0001); //antenna mapping table } VOID odm_TRX_HWAntDiv_Init_88E( IN PDM_ODM_T pDM_Odm ) { u4Byte value32; if(pDM_Odm->mp_mode == TRUE) { pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); // disable HW AntDiv ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT5|BIT4|BIT3, 0); //Default RX (0/1) return; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188E AntDiv_Init => AntDivType=[CG_TRX_HW_ANTDIV (SPDT)]\n")); //MAC Setting value32 = ODM_GetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); ODM_SetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); //Reg4C[25]=1, Reg4C[23]=1 for pin output //Pin Settings ODM_SetBBReg(pDM_Odm, ODM_REG_PIN_CTRL_11N , BIT9|BIT8, 0);//Reg870[8]=1'b0, Reg870[9]=1'b0 //antsel antselb by HW ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT10, 0); //Reg864[10]=1'b0 //antsel2 by HW ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT22, 0); //Regb2c[22]=1'b0 //disable CS/CG switch ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); //Regb2c[31]=1'b1 //output at CG only //OFDM Settings ODM_SetBBReg(pDM_Odm, ODM_REG_ANTDIV_PARA1_11N , bMaskDWord, 0x000000a0); //CCK Settings ODM_SetBBReg(pDM_Odm, ODM_REG_BB_PWR_SAV4_11N , BIT7, 1); //Fix CCK PHY status report issue ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA2_11N , BIT4, 1); //CCK complete HW AntDiv within 64 samples //antenna mapping table if(!pDM_Odm->bIsMPChip) //testchip { ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N , BIT10|BIT9|BIT8, 1); //Reg858[10:8]=3'b001 ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N , BIT13|BIT12|BIT11, 2); //Reg858[13:11]=3'b010 } else //MPchip ODM_SetBBReg(pDM_Odm, ODM_REG_ANT_MAPPING1_11N , bMaskDWord, 0x0001); //Reg914=3'b010, Reg915=3'b001 } VOID odm_Smart_HWAntDiv_Init_88E( IN PDM_ODM_T pDM_Odm ) { u4Byte value32, i; pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; u4Byte AntCombination = 2; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188E AntDiv_Init => AntDivType=[CG_TRX_SMART_ANTDIV]\n")); if(pDM_Odm->mp_mode == TRUE) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("pDM_Odm->AntDivType: %d\n", pDM_Odm->AntDivType)); return; } for(i=0; i<6; i++) { pDM_FatTable->Bssid[i] = 0; pDM_FatTable->antSumRSSI[i] = 0; pDM_FatTable->antRSSIcnt[i] = 0; pDM_FatTable->antAveRSSI[i] = 0; } pDM_FatTable->TrainIdx = 0; pDM_FatTable->FAT_State = FAT_NORMAL_STATE; //MAC Setting value32 = ODM_GetMACReg(pDM_Odm, 0x4c, bMaskDWord); ODM_SetMACReg(pDM_Odm, 0x4c, bMaskDWord, value32|(BIT23|BIT25)); //Reg4C[25]=1, Reg4C[23]=1 for pin output value32 = ODM_GetMACReg(pDM_Odm, 0x7B4, bMaskDWord); ODM_SetMACReg(pDM_Odm, 0x7b4, bMaskDWord, value32|(BIT16|BIT17)); //Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match //value32 = PlatformEFIORead4Byte(Adapter, 0x7B4); //PlatformEFIOWrite4Byte(Adapter, 0x7b4, value32|BIT18); //append MACID in reponse packet //Match MAC ADDR ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, 0); ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, 0); ODM_SetBBReg(pDM_Odm, 0x870 , BIT9|BIT8, 0);//Reg870[8]=1'b0, Reg870[9]=1'b0 //antsel antselb by HW ODM_SetBBReg(pDM_Odm, 0x864 , BIT10, 0); //Reg864[10]=1'b0 //antsel2 by HW ODM_SetBBReg(pDM_Odm, 0xb2c , BIT22, 0); //Regb2c[22]=1'b0 //disable CS/CG switch ODM_SetBBReg(pDM_Odm, 0xb2c , BIT31, 1); //Regb2c[31]=1'b1 //output at CG only ODM_SetBBReg(pDM_Odm, 0xca4 , bMaskDWord, 0x000000a0); //antenna mapping table if(AntCombination == 2) { if(!pDM_Odm->bIsMPChip) //testchip { ODM_SetBBReg(pDM_Odm, 0x858 , BIT10|BIT9|BIT8, 1); //Reg858[10:8]=3'b001 ODM_SetBBReg(pDM_Odm, 0x858 , BIT13|BIT12|BIT11, 2); //Reg858[13:11]=3'b010 } else //MPchip { ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 1); ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 2); } } else if(AntCombination == 7) { if(!pDM_Odm->bIsMPChip) //testchip { ODM_SetBBReg(pDM_Odm, 0x858 , BIT10|BIT9|BIT8, 0); //Reg858[10:8]=3'b000 ODM_SetBBReg(pDM_Odm, 0x858 , BIT13|BIT12|BIT11, 1); //Reg858[13:11]=3'b001 ODM_SetBBReg(pDM_Odm, 0x878 , BIT16, 0); ODM_SetBBReg(pDM_Odm, 0x858 , BIT15|BIT14, 2); //(Reg878[0],Reg858[14:15])=3'b010 ODM_SetBBReg(pDM_Odm, 0x878 , BIT19|BIT18|BIT17, 3);//Reg878[3:1]=3b'011 ODM_SetBBReg(pDM_Odm, 0x878 , BIT22|BIT21|BIT20, 4);//Reg878[6:4]=3b'100 ODM_SetBBReg(pDM_Odm, 0x878 , BIT25|BIT24|BIT23, 5);//Reg878[9:7]=3b'101 ODM_SetBBReg(pDM_Odm, 0x878 , BIT28|BIT27|BIT26, 6);//Reg878[12:10]=3b'110 ODM_SetBBReg(pDM_Odm, 0x878 , BIT31|BIT30|BIT29, 7);//Reg878[15:13]=3b'111 } else //MPchip { ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 0); ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 1); ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte2, 2); ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte3, 3); ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte0, 4); ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte1, 5); ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte2, 6); ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte3, 7); } } //Default Ant Setting when no fast training ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, 1); //Reg80c[21]=1'b1 //from TX Info ODM_SetBBReg(pDM_Odm, 0x864 , BIT5|BIT4|BIT3, 0); //Default RX ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, 1); //Optional RX //ODM_SetBBReg(pDM_Odm, 0x860 , BIT14|BIT13|BIT12, 1); //Default TX //Enter Traing state ODM_SetBBReg(pDM_Odm, 0x864 , BIT2|BIT1|BIT0, (AntCombination-1)); //Reg864[2:0]=3'd6 //ant combination=reg864[2:0]+1 //ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 0); //RegC50[7]=1'b0 //disable HW AntDiv //ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 0); //RegE08[16]=1'b0 //disable fast training //ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 1); //RegE08[16]=1'b1 //enable fast training ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 1); //RegC50[7]=1'b1 //enable HW AntDiv //SW Control //PHY_SetBBReg(Adapter, 0x864 , BIT10, 1); //PHY_SetBBReg(Adapter, 0x870 , BIT9, 1); //PHY_SetBBReg(Adapter, 0x870 , BIT8, 1); //PHY_SetBBReg(Adapter, 0x864 , BIT11, 1); //PHY_SetBBReg(Adapter, 0x860 , BIT9, 0); //PHY_SetBBReg(Adapter, 0x860 , BIT8, 0); } #endif //#if (RTL8188E_SUPPORT == 1) #if (RTL8192E_SUPPORT == 1) VOID odm_RX_HWAntDiv_Init_92E( IN PDM_ODM_T pDM_Odm ) { if(pDM_Odm->mp_mode == TRUE) { //pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ODM_SetBBReg(pDM_Odm, 0xc50 , BIT8, 0); //r_rxdiv_enable_anta Regc50[8]=1'b0 0: control by c50[9] ODM_SetBBReg(pDM_Odm, 0xc50 , BIT9, 1); // 1:CG, 0:CS return; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8192E AntDiv_Init => AntDivType=[CGCS_RX_HW_ANTDIV]\n")); //Pin Settings ODM_SetBBReg(pDM_Odm, 0x870 , BIT8, 0);//Reg870[8]=1'b0, // "antsel" is controled by HWs ODM_SetBBReg(pDM_Odm, 0xc50 , BIT8, 1); //Regc50[8]=1'b1 //" CS/CG switching" is controled by HWs //Mapping table ODM_SetBBReg(pDM_Odm, 0x914 , 0xFFFF, 0x0100); //antenna mapping table //OFDM Settings ODM_SetBBReg(pDM_Odm, 0xca4 , 0x7FF, 0xA0); //thershold ODM_SetBBReg(pDM_Odm, 0xca4 , 0x7FF000, 0x0); //bias //CCK Settings ODM_SetBBReg(pDM_Odm, 0xa04 , 0xF000000, 0); //Select which path to receive for CCK_1 & CCK_2 ODM_SetBBReg(pDM_Odm, 0xb34 , BIT30, 1); //(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 ODM_SetBBReg(pDM_Odm, 0xa74 , BIT7, 1); //Fix CCK PHY status report issue ODM_SetBBReg(pDM_Odm, 0xa0c , BIT4, 1); //CCK complete HW AntDiv within 64 samples } VOID odm_TRX_HWAntDiv_Init_92E( IN PDM_ODM_T pDM_Odm ) { if(pDM_Odm->mp_mode == TRUE) { //pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ODM_SetBBReg(pDM_Odm, 0xc50 , BIT8, 0); //r_rxdiv_enable_anta Regc50[8]=1'b0 0: control by c50[9] ODM_SetBBReg(pDM_Odm, 0xc50 , BIT9, 1); // 1:CG, 0:CS return; } #if (DM_ODM_SUPPORT_TYPE & ODM_AP) pDM_Odm->antdiv_rssi=0; #endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8192E AntDiv_Init => AntDivType=[CG_TRX_HW_ANTDIV]\n")); //3 --RFE pin setting--------- //[MAC] ODM_SetMACReg(pDM_Odm, 0x38, BIT11, 1); //DBG PAD Driving control (GPIO 8) ODM_SetMACReg(pDM_Odm, 0x4c, BIT23, 0); //path-A , RFE_CTRL_3 & RFE_CTRL_4 //[BB] ODM_SetBBReg(pDM_Odm, 0x944 , BIT4|BIT3, 0x3); //RFE_buffer ODM_SetBBReg(pDM_Odm, 0x940 , BIT7|BIT6, 0x0); // r_rfe_path_sel_ (RFE_CTRL_3) ODM_SetBBReg(pDM_Odm, 0x940 , BIT9|BIT8, 0x0); // r_rfe_path_sel_ (RFE_CTRL_4) ODM_SetBBReg(pDM_Odm, 0x944 , BIT31, 0); //RFE_buffer ODM_SetBBReg(pDM_Odm, 0x92C , BIT3, 0); //rfe_inv (RFE_CTRL_3) ODM_SetBBReg(pDM_Odm, 0x92C , BIT4, 1); //rfe_inv (RFE_CTRL_4) ODM_SetBBReg(pDM_Odm, 0x930 , 0xFF000, 0x88); //path-A , RFE_CTRL_3 & 4=> ANTSEL[0] //3 ------------------------- //Pin Settings ODM_SetBBReg(pDM_Odm, 0xC50 , BIT8, 0); //path-A //disable CS/CG switch ODM_SetBBReg(pDM_Odm, 0xC50 , BIT9, 1); //path-A //output at CG only ODM_SetBBReg(pDM_Odm, 0x870 , BIT9|BIT8, 0); //path-A //antsel antselb by HW ODM_SetBBReg(pDM_Odm, 0xB38 , BIT10, 0); //path-A //antsel2 by HW //Mapping table ODM_SetBBReg(pDM_Odm, 0x914 , 0xFFFF, 0x0100); //antenna mapping table //OFDM Settings ODM_SetBBReg(pDM_Odm, 0xca4 , 0x7FF, 0xA0); //thershold ODM_SetBBReg(pDM_Odm, 0xca4 , 0x7FF000, 0x0); //bias //CCK Settings ODM_SetBBReg(pDM_Odm, 0xa04 , 0xF000000, 0); //Select which path to receive for CCK_1 & CCK_2 ODM_SetBBReg(pDM_Odm, 0xb34 , BIT30, 1); //(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 ODM_SetBBReg(pDM_Odm, 0xa74 , BIT7, 1); //Fix CCK PHY status report issue ODM_SetBBReg(pDM_Odm, 0xa0c , BIT4, 1); //CCK complete HW AntDiv within 64 samples //Timming issue ODM_SetBBReg(pDM_Odm, 0xE20 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) } VOID odm_Smart_HWAntDiv_Init_92E( IN PDM_ODM_T pDM_Odm ) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188E AntDiv_Init => AntDivType=[CG_TRX_SMART_ANTDIV]\n")); } #endif //#if (RTL8192E_SUPPORT == 1) #if (RTL8723B_SUPPORT == 1) VOID odm_TRX_HWAntDiv_Init_8723B( IN PDM_ODM_T pDM_Odm ) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8723B AntDiv_Init => AntDivType=[CG_TRX_HW_ANTDIV(DPDT)]\n")); //Mapping Table ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 0); ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 1); //OFDM HW AntDiv Parameters ODM_SetBBReg(pDM_Odm, 0xCA4 , 0x7FF, 0xa0); //thershold ODM_SetBBReg(pDM_Odm, 0xCA4 , 0x7FF000, 0x00); //bias //CCK HW AntDiv Parameters ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples //BT Coexistence ODM_SetBBReg(pDM_Odm, 0x864, BIT12, 0); //keep antsel_map when GNT_BT = 1 ODM_SetBBReg(pDM_Odm, 0x874 , BIT23, 0); //Disable hw antsw & fast_train.antsw when GNT_BT=1 //Output Pin Settings ODM_SetBBReg(pDM_Odm, 0x870 , BIT8, 0); // ODM_SetBBReg(pDM_Odm, 0x948 , BIT6, 0); //WL_BB_SEL_BTG_TRXG_anta, (1: HW CTRL 0: SW CTRL) ODM_SetBBReg(pDM_Odm, 0x948 , BIT7, 0); ODM_SetMACReg(pDM_Odm, 0x40 , BIT3, 1); ODM_SetMACReg(pDM_Odm, 0x38 , BIT11, 1); ODM_SetMACReg(pDM_Odm, 0x4C , BIT24|BIT23, 2); //select DPDT_P and DPDT_N as output pin ODM_SetBBReg(pDM_Odm, 0x944 , BIT0|BIT1, 3); //in/out ODM_SetBBReg(pDM_Odm, 0x944 , BIT31, 0); // ODM_SetBBReg(pDM_Odm, 0x92C , BIT1, 0); //DPDT_P non-inverse ODM_SetBBReg(pDM_Odm, 0x92C , BIT0, 1); //DPDT_N inverse ODM_SetBBReg(pDM_Odm, 0x930 , 0xF0, 8); // DPDT_P = ANTSEL[0] ODM_SetBBReg(pDM_Odm, 0x930 , 0xF, 8); // DPDT_N = ANTSEL[0] //Timming issue ODM_SetBBReg(pDM_Odm, 0xE20 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) //2 [--For HW Bug Setting] if(pDM_Odm->AntType == ODM_AUTO_ANT) ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, 0); //CCK AntDiv function block enable //ODM_SetBBReg(pDM_Odm, 0x80C , BIT21, 0); //TX Ant by Reg } VOID odm_S0S1_SWAntDiv_Init_8723B( IN PDM_ODM_T pDM_Odm ) { pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8723B AntDiv_Init => AntDivType=[ S0S1_SW_AntDiv] \n")); //Mapping Table ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 0); ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 1); //Output Pin Settings //ODM_SetBBReg(pDM_Odm, 0x948 , BIT6, 0x1); ODM_SetBBReg(pDM_Odm, 0x870 , BIT9|BIT8, 0); pDM_FatTable->bBecomeLinked =FALSE; pDM_SWAT_Table->try_flag = 0xff; pDM_SWAT_Table->Double_chk_flag = 0; pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW; //Timming issue ODM_SetBBReg(pDM_Odm, 0xE20 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) //2 [--For HW Bug Setting] ODM_SetBBReg(pDM_Odm, 0x80C , BIT21, 0); //TX Ant by Reg } VOID odm_S0S1_SWAntDiv_Reset_8723B( IN PDM_ODM_T pDM_Odm ) { pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; pDM_FatTable->bBecomeLinked =FALSE; pDM_SWAT_Table->try_flag = 0xff; pDM_SWAT_Table->Double_chk_flag = 0; pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_S0S1_SWAntDiv_Reset_8723B(): pDM_FatTable->bBecomeLinked = %d\n", pDM_FatTable->bBecomeLinked)); } VOID ODM_UpdateRxIdleAnt_8723B( IN PDM_ODM_T pDM_Odm, IN u1Byte Ant, IN u4Byte DefaultAnt, IN u4Byte OptionalAnt ) { pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; PADAPTER pAdapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); u1Byte count=0; u1Byte u1Temp; u1Byte H2C_Parameter; u4Byte value32; if(!pDM_Odm->bLinked) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Fail to set RX antenna due to no link\n")); return; } // Send H2C command to FW // Enable wifi calibration H2C_Parameter = TRUE; ODM_FillH2CCmd(pDM_Odm, ODM_H2C_WIFI_CALIBRATION, 1, &H2C_Parameter); // Check if H2C command sucess or not (0x1e6) u1Temp = ODM_Read1Byte(pDM_Odm, 0x1e6); while((u1Temp != 0x1) && (count < 100)) { ODM_delay_us(10); u1Temp = ODM_Read1Byte(pDM_Odm, 0x1e6); count++; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: H2C command status = %d, count = %d\n", u1Temp, count)); if(u1Temp == 0x1) { // Check if BT is doing IQK (0x1e7) count = 0; u1Temp = ODM_Read1Byte(pDM_Odm, 0x1e7); while((!(u1Temp & BIT0)) && (count < 100)) { ODM_delay_us(50); u1Temp = ODM_Read1Byte(pDM_Odm, 0x1e7); count++; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: BT IQK status = %d, count = %d\n", u1Temp, count)); if(u1Temp & BIT0) { ODM_SetBBReg(pDM_Odm, 0x948 , BIT6, 0x1); ODM_SetBBReg(pDM_Odm, 0x948 , BIT9, DefaultAnt); ODM_SetBBReg(pDM_Odm, 0x864 , BIT5|BIT4|BIT3, DefaultAnt); //Default RX ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, OptionalAnt); //Optional RX ODM_SetBBReg(pDM_Odm, 0x860, BIT14|BIT13|BIT12, DefaultAnt); //Default TX pDM_FatTable->RxIdleAnt = Ant; // Set TX AGC by S0/S1 // Need to consider Linux driver #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) pAdapter->HalFunc.SetTxPowerLevelHandler(pAdapter, pHalData->CurrentChannel); #elif(DM_ODM_SUPPORT_TYPE == ODM_CE) rtw_hal_set_tx_power_level(pAdapter, pHalData->CurrentChannel); #endif // Set IQC by S0/S1 ODM_SetIQCbyRFpath(pDM_Odm,DefaultAnt); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Sucess to set RX antenna\n")); } else ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Fail to set RX antenna due to BT IQK\n")); } else ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Ant ] 8723B: Fail to set RX antenna due to H2C command fail\n")); // Send H2C command to FW // Disable wifi calibration H2C_Parameter = FALSE; ODM_FillH2CCmd(pDM_Odm, ODM_H2C_WIFI_CALIBRATION, 1, &H2C_Parameter); } #endif //#if (RTL8723B_SUPPORT == 1) #if (RTL8821A_SUPPORT == 1) VOID odm_TRX_HWAntDiv_Init_8821A( IN PDM_ODM_T pDM_Odm ) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PADAPTER pAdapter = pDM_Odm->Adapter; pAdapter->HalFunc.GetHalDefVarHandler(pAdapter, HAL_DEF_5G_ANT_SELECT, (pu1Byte)(&pDM_Odm->AntType)); #else pDM_Odm->AntType = ODM_AUTO_ANT; #endif pAdapter->HalFunc.GetHalDefVarHandler(pAdapter, HAL_DEF_5G_ANT_SELECT, (pu1Byte)(&pDM_Odm->AntType)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8821A AntDiv_Init => AntDivType=[ CG_TRX_HW_ANTDIV (DPDT)] \n")); //Output Pin Settings ODM_SetMACReg(pDM_Odm, 0x4C , BIT25, 0); ODM_SetMACReg(pDM_Odm, 0x64 , BIT29, 1); //PAPE by WLAN control ODM_SetMACReg(pDM_Odm, 0x64 , BIT28, 1); //LNAON by WLAN control ODM_SetBBReg(pDM_Odm, 0xCB0 , bMaskDWord, 0x77775745); ODM_SetBBReg(pDM_Odm, 0xCB8 , BIT16, 0); ODM_SetMACReg(pDM_Odm, 0x4C , BIT23, 0); //select DPDT_P and DPDT_N as output pin ODM_SetMACReg(pDM_Odm, 0x4C , BIT24, 1); //by WLAN control ODM_SetBBReg(pDM_Odm, 0xCB4 , 0xF, 8); // DPDT_P = ANTSEL[0] ODM_SetBBReg(pDM_Odm, 0xCB4 , 0xF0, 8); // DPDT_N = ANTSEL[0] ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT29, 0); //DPDT_P non-inverse ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT28, 1); //DPDT_N inverse //Mapping Table ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte0, 0); ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte1, 1); //Set ANT1_8821A as MAIN_ANT if((pDM_Odm->AntType == ODM_FIX_MAIN_ANT) || (pDM_Odm->AntType == ODM_AUTO_ANT)) ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); else ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); //OFDM HW AntDiv Parameters ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF, 0xA0); //thershold ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF000, 0x10); //bias //CCK HW AntDiv Parameters ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, 0); //ANTSEL_CCK sent to the smart_antenna circuit ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, 0); //CCK AntDiv function block enable //BT Coexistence ODM_SetBBReg(pDM_Odm, 0xCAC , BIT9, 1); //keep antsel_map when GNT_BT = 1 ODM_SetBBReg(pDM_Odm, 0x804 , BIT4, 1); //Disable hw antsw & fast_train.antsw when GNT_BT=1 //Timming issue ODM_SetBBReg(pDM_Odm, 0x818 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) ODM_SetBBReg(pDM_Odm, 0x8CC , BIT20|BIT19|BIT18, 3); //settling time of antdiv by RF LNA = 100ns //response TX ant by RX ant ODM_SetMACReg(pDM_Odm, 0x668 , BIT3, 1); } VOID odm_S0S1_SWAntDiv_Init_8821A( IN PDM_ODM_T pDM_Odm ) { pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PADAPTER pAdapter = pDM_Odm->Adapter; pAdapter->HalFunc.GetHalDefVarHandler(pAdapter, HAL_DEF_5G_ANT_SELECT, (pu1Byte)(&pDM_Odm->AntType)); #else pDM_Odm->AntType = ODM_AUTO_ANT; #endif ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8821A AntDiv_Init => AntDivType=[ S0S1_SW_AntDiv] \n")); //Output Pin Settings ODM_SetMACReg(pDM_Odm, 0x4C , BIT25, 0); ODM_SetMACReg(pDM_Odm, 0x64 , BIT29, 1); //PAPE by WLAN control ODM_SetMACReg(pDM_Odm, 0x64 , BIT28, 1); //LNAON by WLAN control ODM_SetBBReg(pDM_Odm, 0xCB0 , bMaskDWord, 0x77775745); ODM_SetBBReg(pDM_Odm, 0xCB8 , BIT16, 0); ODM_SetMACReg(pDM_Odm, 0x4C , BIT23, 0); //select DPDT_P and DPDT_N as output pin ODM_SetMACReg(pDM_Odm, 0x4C , BIT24, 1); //by WLAN control ODM_SetBBReg(pDM_Odm, 0xCB4 , 0xF, 8); // DPDT_P = ANTSEL[0] ODM_SetBBReg(pDM_Odm, 0xCB4 , 0xF0, 8); // DPDT_N = ANTSEL[0] ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT29, 0); //DPDT_P non-inverse ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT28, 1); //DPDT_N inverse //Mapping Table ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte0, 0); ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte1, 1); //Set ANT1_8821A as MAIN_ANT if((pDM_Odm->AntType == ODM_FIX_MAIN_ANT) || (pDM_Odm->AntType == ODM_AUTO_ANT)) ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); else ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); //OFDM HW AntDiv Parameters ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF, 0xA0); //thershold ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF000, 0x10); //bias //CCK HW AntDiv Parameters ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, 0); //ANTSEL_CCK sent to the smart_antenna circuit ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, 0); //CCK AntDiv function block enable //BT Coexistence ODM_SetBBReg(pDM_Odm, 0xCAC , BIT9, 1); //keep antsel_map when GNT_BT = 1 ODM_SetBBReg(pDM_Odm, 0x804 , BIT4, 1); //Disable hw antsw & fast_train.antsw when GNT_BT=1 //Timming issue ODM_SetBBReg(pDM_Odm, 0x818 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) ODM_SetBBReg(pDM_Odm, 0x8CC , BIT20|BIT19|BIT18, 3); //settling time of antdiv by RF LNA = 100ns //response TX ant by RX ant ODM_SetMACReg(pDM_Odm, 0x668 , BIT3, 1); ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, 0); pDM_SWAT_Table->try_flag = 0xff; pDM_SWAT_Table->Double_chk_flag = 0; pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW; pDM_SWAT_Table->CurAntenna = MAIN_ANT; pDM_SWAT_Table->PreAntenna = MAIN_ANT; pDM_SWAT_Table->SWAS_NoLink_State = 0; } #endif //#if (RTL8821A_SUPPORT == 1) #if (RTL8881A_SUPPORT == 1) VOID odm_RX_HWAntDiv_Init_8881A( IN PDM_ODM_T pDM_Odm ) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8881A AntDiv_Init => AntDivType=[ CGCS_RX_HW_ANTDIV] \n")); } VOID odm_TRX_HWAntDiv_Init_8881A( IN PDM_ODM_T pDM_Odm ) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8881A AntDiv_Init => AntDivType=[ CG_TRX_HW_ANTDIV (SPDT)] \n")); //Output Pin Settings // [SPDT related] ODM_SetMACReg(pDM_Odm, 0x4C , BIT25, 0); ODM_SetMACReg(pDM_Odm, 0x4C , BIT26, 0); ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT31, 0); //delay buffer ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT22, 0); ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT24, 1); ODM_SetBBReg(pDM_Odm, 0xCB0 , 0xF00, 8); // DPDT_P = ANTSEL[0] ODM_SetBBReg(pDM_Odm, 0xCB0 , 0xF0000, 8); // DPDT_N = ANTSEL[0] //Mapping Table ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte0, 0); ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte1, 1); //OFDM HW AntDiv Parameters ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF, 0xA0); //thershold ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF000, 0x0); //bias ODM_SetBBReg(pDM_Odm, 0x8CC , BIT20|BIT19|BIT18, 3); //settling time of antdiv by RF LNA = 100ns //CCK HW AntDiv Parameters ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples //Timming issue ODM_SetBBReg(pDM_Odm, 0x818 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) //2 [--For HW Bug Setting] ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, 0); //TX Ant by Reg // A-cut bug } #endif //#if (RTL8881A_SUPPORT == 1) #if (RTL8812A_SUPPORT == 1) VOID odm_TRX_HWAntDiv_Init_8812A( IN PDM_ODM_T pDM_Odm ) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8812A AntDiv_Init => AntDivType=[ CG_TRX_HW_ANTDIV (SPDT)] \n")); //3 //3 --RFE pin setting--------- //[BB] ODM_SetBBReg(pDM_Odm, 0x900 , BIT10|BIT9|BIT8, 0x0); //disable SW switch ODM_SetBBReg(pDM_Odm, 0x900 , BIT17|BIT16, 0x0); ODM_SetBBReg(pDM_Odm, 0x974 , BIT7|BIT6, 0x3); // in/out ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT31, 0); //delay buffer ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT26, 0); ODM_SetBBReg(pDM_Odm, 0xCB4 , BIT27, 1); ODM_SetBBReg(pDM_Odm, 0xCB0 , 0xF000000, 8); // DPDT_P = ANTSEL[0] ODM_SetBBReg(pDM_Odm, 0xCB0 , 0xF0000000, 8); // DPDT_N = ANTSEL[0] //3 ------------------------- //Mapping Table ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte0, 0); ODM_SetBBReg(pDM_Odm, 0xCA4 , bMaskByte1, 1); //OFDM HW AntDiv Parameters ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF, 0xA0); //thershold ODM_SetBBReg(pDM_Odm, 0x8D4 , 0x7FF000, 0x0); //bias ODM_SetBBReg(pDM_Odm, 0x8CC , BIT20|BIT19|BIT18, 3); //settling time of antdiv by RF LNA = 100ns //CCK HW AntDiv Parameters ODM_SetBBReg(pDM_Odm, 0xA74 , BIT7, 1); //patch for clk from 88M to 80M ODM_SetBBReg(pDM_Odm, 0xA0C , BIT4, 1); //do 64 samples //Timming issue ODM_SetBBReg(pDM_Odm, 0x818 , BIT23|BIT22|BIT21|BIT20, 8); //keep antidx after tx for ACK ( unit x 32 mu sec) //2 [--For HW Bug Setting] ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, 0); //TX Ant by Reg // A-cut bug } #endif //#if (RTL8812A_SUPPORT == 1) VOID odm_HW_AntDiv( IN PDM_ODM_T pDM_Odm ) { u4Byte i,MinMaxRSSI=0xFF, AntDivMaxRSSI=0, MaxRSSI=0, LocalMaxRSSI; u4Byte Main_RSSI, Aux_RSSI, pkt_ratio_m=0, pkt_ratio_a=0,pkt_threshold=10; u1Byte RxIdleAnt=0, TargetAnt=7; pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; PSTA_INFO_T pEntry; if(!pDM_Odm->bLinked) //bLinked==False { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[No Link!!!]\n")); #if(DM_ODM_SUPPORT_TYPE == ODM_AP) if (pDM_Odm->antdiv_rssi) panic_printk("[No Link!!!]\n"); #endif if(pDM_FatTable->bBecomeLinked == TRUE) { odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; } return; } else { if(pDM_FatTable->bBecomeLinked ==FALSE) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Linked !!!]\n")); odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); //if(pDM_Odm->SupportICType == ODM_RTL8821 ) //ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, 0); //CCK AntDiv function disable //#if(DM_ODM_SUPPORT_TYPE == ODM_AP) //else if(pDM_Odm->SupportICType == ODM_RTL8881 ) // ODM_SetBBReg(pDM_Odm, 0x800 , BIT25, 0); //CCK AntDiv function disable //#endif //else if(pDM_Odm->SupportICType == ODM_RTL8723B ||pDM_Odm->SupportICType == ODM_RTL8812) //ODM_SetBBReg(pDM_Odm, 0xA00 , BIT15, 0); //CCK AntDiv function disable pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; if(pDM_Odm->SupportICType==ODM_RTL8723B && pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) { ODM_SetBBReg(pDM_Odm, 0x930 , 0xF0, 8); // DPDT_P = ANTSEL[0] // for 8723B AntDiv function patch. BB Dino 130412 ODM_SetBBReg(pDM_Odm, 0x930 , 0xF, 8); // DPDT_N = ANTSEL[0] } } } ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n[HW AntDiv] Start =>\n")); for (i=0; ipODM_StaInfo[i]; if(IS_STA_VALID(pEntry)) { //2 Caculate RSSI per Antenna Main_RSSI = (pDM_FatTable->MainAnt_Cnt[i]!=0)?(pDM_FatTable->MainAnt_Sum[i]/pDM_FatTable->MainAnt_Cnt[i]):0; Aux_RSSI = (pDM_FatTable->AuxAnt_Cnt[i]!=0)?(pDM_FatTable->AuxAnt_Sum[i]/pDM_FatTable->AuxAnt_Cnt[i]):0; TargetAnt = (Main_RSSI==Aux_RSSI)?pDM_FatTable->RxIdleAnt:((Main_RSSI>=Aux_RSSI)?MAIN_ANT:AUX_ANT); /* if( pDM_FatTable->MainAnt_Cnt[i]!=0 && pDM_FatTable->AuxAnt_Cnt[i]!=0 ) { pkt_ratio_m=( pDM_FatTable->MainAnt_Cnt[i] / pDM_FatTable->AuxAnt_Cnt[i] ); pkt_ratio_a=( pDM_FatTable->AuxAnt_Cnt[i] / pDM_FatTable->MainAnt_Cnt[i] ); if (pkt_ratio_m >= pkt_threshold) TargetAnt=MAIN_ANT; else if(pkt_ratio_a >= pkt_threshold) TargetAnt=AUX_ANT; } */ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("*** SupportICType=[%lu] \n",pDM_Odm->SupportICType)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Main_Cnt = (( %d )) , Main_RSSI= (( %d )) \n", pDM_FatTable->MainAnt_Cnt[i], Main_RSSI)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Aux_Cnt = (( %d )) , Aux_RSSI = (( %d )) \n", pDM_FatTable->AuxAnt_Cnt[i] , Aux_RSSI )); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** MAC ID:[ %d ] , TargetAnt = (( %s )) \n", i ,( TargetAnt ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("*** Phy_AntSel_A=[ %d, %d, %d] \n",((pDM_Odm->DM_FatTable.antsel_rx_keep_0)&BIT2)>>2, ((pDM_Odm->DM_FatTable.antsel_rx_keep_0)&BIT1) >>1, ((pDM_Odm->DM_FatTable.antsel_rx_keep_0)&BIT0))); #if(DM_ODM_SUPPORT_TYPE == ODM_AP) if (pDM_Odm->antdiv_rssi) { panic_printk("*** SupportICType=[%lu] \n",pDM_Odm->SupportICType); //panic_printk("*** Phy_AntSel_A=[ %d, %d, %d] \n",((pDM_Odm->DM_FatTable.antsel_rx_keep_0)&BIT2)>>2, // ((pDM_Odm->DM_FatTable.antsel_rx_keep_0)&BIT1) >>1, ((pDM_Odm->DM_FatTable.antsel_rx_keep_0)&BIT0)); //panic_printk("*** Phy_AntSel_B=[ %d, %d, %d] \n",((pDM_Odm->DM_FatTable.antsel_rx_keep_1)&BIT2)>>2, // ((pDM_Odm->DM_FatTable.antsel_rx_keep_1)&BIT1) >>1, ((pDM_Odm->DM_FatTable.antsel_rx_keep_1)&BIT0)) panic_printk("*** Client[ %lu ] , Main_Cnt = (( %lu )) , Main_RSSI= (( %lu )) \n",i, pDM_FatTable->MainAnt_Cnt[i], Main_RSSI); panic_printk("*** Client[ %lu ] , Aux_Cnt = (( %lu )) , Aux_RSSI = (( %lu )) \n" ,i, pDM_FatTable->AuxAnt_Cnt[i] , Aux_RSSI); } #endif LocalMaxRSSI = (Main_RSSI>Aux_RSSI)?Main_RSSI:Aux_RSSI; //2 Select MaxRSSI for DIG if((LocalMaxRSSI > AntDivMaxRSSI) && (LocalMaxRSSI < 40)) AntDivMaxRSSI = LocalMaxRSSI; if(LocalMaxRSSI > MaxRSSI) MaxRSSI = LocalMaxRSSI; //2 Select RX Idle Antenna if ( (LocalMaxRSSI != 0) && (LocalMaxRSSI < MinMaxRSSI) ) { RxIdleAnt = TargetAnt; MinMaxRSSI = LocalMaxRSSI; } /* if((pDM_FatTable->RxIdleAnt == MAIN_ANT) && (Main_RSSI == 0)) Main_RSSI = Aux_RSSI; else if((pDM_FatTable->RxIdleAnt == AUX_ANT) && (Aux_RSSI == 0)) Aux_RSSI = Main_RSSI; LocalMinRSSI = (Main_RSSI>Aux_RSSI)?Aux_RSSI:Main_RSSI; if(LocalMinRSSI < MinRSSI) { MinRSSI = LocalMinRSSI; RxIdleAnt = TargetAnt; } */ //2 Select TX Antenna #if TX_BY_REG #else if(pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV) odm_UpdateTxAnt(pDM_Odm, TargetAnt, i); #endif } pDM_FatTable->MainAnt_Sum[i] = 0; pDM_FatTable->AuxAnt_Sum[i] = 0; pDM_FatTable->MainAnt_Cnt[i] = 0; pDM_FatTable->AuxAnt_Cnt[i] = 0; } //2 Set RX Idle Antenna ODM_UpdateRxIdleAnt(pDM_Odm, RxIdleAnt); #if(DM_ODM_SUPPORT_TYPE == ODM_AP) if (pDM_Odm->antdiv_rssi) panic_printk("*** RxIdleAnt = (( %s )) \n \n", ( RxIdleAnt ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT"); #endif if(AntDivMaxRSSI == 0) pDM_DigTable->AntDiv_RSSI_max = pDM_Odm->RSSI_Min; else pDM_DigTable->AntDiv_RSSI_max = AntDivMaxRSSI; pDM_DigTable->RSSI_max = MaxRSSI; } #if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1) VOID odm_S0S1_SwAntDiv( IN PDM_ODM_T pDM_Odm, IN u1Byte Step ) { u4Byte i,MinMaxRSSI=0xFF, LocalMaxRSSI,LocalMinRSSI; u4Byte Main_RSSI, Aux_RSSI; u1Byte reset_period=10, SWAntDiv_threshold=35; u1Byte HighTraffic_TrainTime_U=0x32,HighTraffic_TrainTime_L=0,Train_time_temp; u1Byte LowTraffic_TrainTime_U=200,LowTraffic_TrainTime_L=0; pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; u1Byte RxIdleAnt = pDM_SWAT_Table->PreAntenna, TargetAnt, nextAnt=0; PSTA_INFO_T pEntry=NULL; //static u1Byte reset_idx; u4Byte value32; PADAPTER Adapter = pDM_Odm->Adapter; u8Byte curTxOkCnt=0, curRxOkCnt=0,TxCntOffset, RxCntOffset; if(!pDM_Odm->bLinked) //bLinked==False { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[No Link!!!]\n")); if(pDM_FatTable->bBecomeLinked == TRUE) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Set REG 948[9:6]=0x0 \n")); if(pDM_Odm->SupportICType == ODM_RTL8723B) ODM_SetBBReg(pDM_Odm, 0x948 , BIT9|BIT8|BIT7|BIT6, 0x0); pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; } return; } else { if(pDM_FatTable->bBecomeLinked ==FALSE) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Linked !!!]\n")); if(pDM_Odm->SupportICType == ODM_RTL8723B) { value32 = ODM_GetBBReg(pDM_Odm, 0x864, BIT5|BIT4|BIT3); if (value32==0x0) ODM_UpdateRxIdleAnt_8723B(pDM_Odm, MAIN_ANT, ANT1_2G, ANT2_2G); else if (value32==0x1) ODM_UpdateRxIdleAnt_8723B(pDM_Odm, AUX_ANT, ANT2_2G, ANT1_2G); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("8723B: First link! Force antenna to %s\n",(value32 == 0x0?"MAIN":"AUX") )); } pDM_SWAT_Table->lastTxOkCnt = 0; pDM_SWAT_Table->lastRxOkCnt =0; TxCntOffset = *(pDM_Odm->pNumTxBytesUnicast); RxCntOffset = *(pDM_Odm->pNumRxBytesUnicast); pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; } else { TxCntOffset = 0; RxCntOffset = 0; } } ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[%d] { try_flag=(( %d )), Step=(( %d )), Double_chk_flag = (( %d )) }\n", __LINE__,pDM_SWAT_Table->try_flag,Step,pDM_SWAT_Table->Double_chk_flag)); // Handling step mismatch condition. // Peak step is not finished at last time. Recover the variable and check again. if( Step != pDM_SWAT_Table->try_flag ) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Step != try_flag] Need to Reset After Link\n")); ODM_SwAntDivRestAfterLink(pDM_Odm); } if(pDM_SWAT_Table->try_flag == 0xff) { pDM_SWAT_Table->try_flag = 0; pDM_SWAT_Table->Train_time_flag=0; ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("[set try_flag = 0] Prepare for peak!\n\n")); return; } else//if( try_flag != 0xff ) { //1 Normal State (Begin Trying) if(pDM_SWAT_Table->try_flag == 0) { //---trafic decision--- curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - pDM_SWAT_Table->lastTxOkCnt - TxCntOffset; curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - pDM_SWAT_Table->lastRxOkCnt - RxCntOffset; pDM_SWAT_Table->lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); pDM_SWAT_Table->lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); if (curTxOkCnt > 1875000 || curRxOkCnt > 1875000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) ( 1.875M * 8bit ) / 2= 7.5M bits /sec ) { pDM_SWAT_Table->TrafficLoad = TRAFFIC_HIGH; Train_time_temp=pDM_SWAT_Table->Train_time ; if(pDM_SWAT_Table->Train_time_flag==3) { HighTraffic_TrainTime_L=0xa; if(Train_time_temp<=16) Train_time_temp=HighTraffic_TrainTime_L; else Train_time_temp-=16; } else if(pDM_SWAT_Table->Train_time_flag==2) { Train_time_temp-=8; HighTraffic_TrainTime_L=0xf; } else if(pDM_SWAT_Table->Train_time_flag==1) { Train_time_temp-=4; HighTraffic_TrainTime_L=0x1e; } else if(pDM_SWAT_Table->Train_time_flag==0) { Train_time_temp+=8; HighTraffic_TrainTime_L=0x28; } //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Train_time_temp = ((%d))\n",Train_time_temp)); //-- if(Train_time_temp > HighTraffic_TrainTime_U) Train_time_temp=HighTraffic_TrainTime_U; else if(Train_time_temp < HighTraffic_TrainTime_L) Train_time_temp=HighTraffic_TrainTime_L; pDM_SWAT_Table->Train_time = Train_time_temp; //50ms~10ms ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,(" Train_time_flag=((%d)) , Train_time=((%d)) \n",pDM_SWAT_Table->Train_time_flag, pDM_SWAT_Table->Train_time)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [HIGH Traffic] \n" )); } else if (curTxOkCnt > 125000 || curRxOkCnt > 125000) // ( 0.125M * 8bit ) / 2 = 0.5M bits /sec ) { pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW; Train_time_temp=pDM_SWAT_Table->Train_time ; if(pDM_SWAT_Table->Train_time_flag==3) { LowTraffic_TrainTime_L=10; if(Train_time_temp<50) Train_time_temp=LowTraffic_TrainTime_L; else Train_time_temp-=50; } else if(pDM_SWAT_Table->Train_time_flag==2) { Train_time_temp-=30; LowTraffic_TrainTime_L=36; } else if(pDM_SWAT_Table->Train_time_flag==1) { Train_time_temp-=10; LowTraffic_TrainTime_L=40; } else Train_time_temp+=10; //-- if(Train_time_temp >= LowTraffic_TrainTime_U) Train_time_temp=LowTraffic_TrainTime_U; else if(Train_time_temp <= LowTraffic_TrainTime_L) Train_time_temp=LowTraffic_TrainTime_L; pDM_SWAT_Table->Train_time = Train_time_temp; //50ms~20ms ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,(" Train_time_flag=((%d)) , Train_time=((%d)) \n",pDM_SWAT_Table->Train_time_flag, pDM_SWAT_Table->Train_time)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [Low Traffic] \n" )); } else { pDM_SWAT_Table->TrafficLoad = TRAFFIC_UltraLOW; pDM_SWAT_Table->Train_time = 0xc8; //200ms ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [Ultra-Low Traffic] \n" )); } ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TxOkCnt=(( %llu )), RxOkCnt=(( %llu )) \n", curTxOkCnt ,curRxOkCnt )); //----------------- ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,(" Current MinMaxRSSI is ((%d)) \n",pDM_FatTable->MinMaxRSSI)); //---reset index--- if(pDM_SWAT_Table->reset_idx>=reset_period) { pDM_FatTable->MinMaxRSSI=0; // pDM_SWAT_Table->reset_idx=0; } ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reset_idx = (( %d )) \n",pDM_SWAT_Table->reset_idx )); //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("reset_idx=%d\n",pDM_SWAT_Table->reset_idx)); pDM_SWAT_Table->reset_idx++; //---double check flag--- if(pDM_FatTable->MinMaxRSSI > SWAntDiv_threshold && pDM_SWAT_Table->Double_chk_flag== 0) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,(" MinMaxRSSI is ((%d)), and > %d \n", pDM_FatTable->MinMaxRSSI,SWAntDiv_threshold)); pDM_SWAT_Table->Double_chk_flag =1; pDM_SWAT_Table->try_flag = 1; pDM_SWAT_Table->RSSI_Trying = 0; ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" Test the current Ant for (( %d )) ms again \n", pDM_SWAT_Table->Train_time)); ODM_UpdateRxIdleAnt(pDM_Odm, pDM_FatTable->RxIdleAnt); ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer_8723B, pDM_SWAT_Table->Train_time ); //ms return; } nextAnt = (pDM_FatTable->RxIdleAnt == MAIN_ANT)? AUX_ANT : MAIN_ANT; pDM_SWAT_Table->try_flag = 1; if(pDM_SWAT_Table->reset_idx<=1) pDM_SWAT_Table->RSSI_Trying = 2; else pDM_SWAT_Table->RSSI_Trying = 1; odm_S0S1_SwAntDivByCtrlFrame(pDM_Odm, SWAW_STEP_PEAK); ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("[set try_flag=1] Normal State: Begin Trying!! \n")); } else if(pDM_SWAT_Table->try_flag == 1 && pDM_SWAT_Table->Double_chk_flag== 0) { nextAnt = (pDM_FatTable->RxIdleAnt == MAIN_ANT)? AUX_ANT : MAIN_ANT; pDM_SWAT_Table->RSSI_Trying--; } //1 Decision State if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0) ) { BOOLEAN bByCtrlFrame = FALSE; u8Byte pkt_cnt_total = 0; for (i=0; ipODM_StaInfo[i]; if(IS_STA_VALID(pEntry)) { //2 Caculate RSSI per Antenna Main_RSSI = (pDM_FatTable->MainAnt_Cnt[i]!=0)?(pDM_FatTable->MainAnt_Sum[i]/pDM_FatTable->MainAnt_Cnt[i]):0; Aux_RSSI = (pDM_FatTable->AuxAnt_Cnt[i]!=0)?(pDM_FatTable->AuxAnt_Sum[i]/pDM_FatTable->AuxAnt_Cnt[i]):0; if(pDM_FatTable->MainAnt_Cnt[i]<=1 && pDM_FatTable->CCK_counter_main>=1) Main_RSSI=0; if(pDM_FatTable->AuxAnt_Cnt[i]<=1 && pDM_FatTable->CCK_counter_aux>=1) Aux_RSSI=0; TargetAnt = (Main_RSSI==Aux_RSSI)?pDM_SWAT_Table->PreAntenna:((Main_RSSI>=Aux_RSSI)?MAIN_ANT:AUX_ANT); LocalMaxRSSI = (Main_RSSI>=Aux_RSSI) ? Main_RSSI : Aux_RSSI; LocalMinRSSI = (Main_RSSI>=Aux_RSSI) ? Aux_RSSI : Main_RSSI; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** CCK_counter_main = (( %d )) , CCK_counter_aux= (( %d )) \n", pDM_FatTable->CCK_counter_main, pDM_FatTable->CCK_counter_aux)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** OFDM_counter_main = (( %d )) , OFDM_counter_aux= (( %d )) \n", pDM_FatTable->OFDM_counter_main, pDM_FatTable->OFDM_counter_aux)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Main_Cnt = (( %d )) , Main_RSSI= (( %d )) \n", pDM_FatTable->MainAnt_Cnt[i], Main_RSSI)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Aux_Cnt = (( %d )) , Aux_RSSI = (( %d )) \n", pDM_FatTable->AuxAnt_Cnt[i] , Aux_RSSI )); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** MAC ID:[ %d ] , TargetAnt = (( %s )) \n", i ,( TargetAnt ==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); //2 Select RX Idle Antenna if (LocalMaxRSSI != 0 && LocalMaxRSSI < MinMaxRSSI) { RxIdleAnt = TargetAnt; MinMaxRSSI = LocalMaxRSSI; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** LocalMaxRSSI-LocalMinRSSI = ((%d))\n",(LocalMaxRSSI-LocalMinRSSI))); if((LocalMaxRSSI-LocalMinRSSI)>8) { if(LocalMinRSSI != 0) pDM_SWAT_Table->Train_time_flag=3; else { if(MinMaxRSSI > SWAntDiv_threshold) pDM_SWAT_Table->Train_time_flag=0; else pDM_SWAT_Table->Train_time_flag=3; } } else if((LocalMaxRSSI-LocalMinRSSI)>5) pDM_SWAT_Table->Train_time_flag=2; else if((LocalMaxRSSI-LocalMinRSSI)>2) pDM_SWAT_Table->Train_time_flag=1; else pDM_SWAT_Table->Train_time_flag=0; } //2 Select TX Antenna if(TargetAnt == MAIN_ANT) pDM_FatTable->antsel_a[i] = ANT1_2G; else pDM_FatTable->antsel_a[i] = ANT2_2G; } pDM_FatTable->MainAnt_Sum[i] = 0; pDM_FatTable->AuxAnt_Sum[i] = 0; pDM_FatTable->MainAnt_Cnt[i] = 0; pDM_FatTable->AuxAnt_Cnt[i] = 0; } if(pDM_SWAT_Table->bSWAntDivByCtrlFrame) { odm_S0S1_SwAntDivByCtrlFrame(pDM_Odm, SWAW_STEP_DETERMINE); bByCtrlFrame = TRUE; } pkt_cnt_total = pDM_FatTable->CCK_counter_main + pDM_FatTable->CCK_counter_aux + pDM_FatTable->OFDM_counter_main + pDM_FatTable->OFDM_counter_aux; pDM_FatTable->CCK_counter_main=0; pDM_FatTable->CCK_counter_aux=0; pDM_FatTable->OFDM_counter_main=0; pDM_FatTable->OFDM_counter_aux=0; ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Control frame packet counter = %d, Data frame packet counter = %llu\n", pDM_SWAT_Table->PktCnt_SWAntDivByCtrlFrame, pkt_cnt_total)); if(MinMaxRSSI == 0xff || ((pkt_cnt_total < (pDM_SWAT_Table->PktCnt_SWAntDivByCtrlFrame >> 1)) && pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 2)) { MinMaxRSSI = 0; ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Check RSSI of control frame because MinMaxRSSI == 0xff\n")); ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("bByCtrlFrame = %d\n", bByCtrlFrame)); if(bByCtrlFrame) { Main_RSSI = (pDM_FatTable->MainAnt_CtrlFrame_Cnt!=0)?(pDM_FatTable->MainAnt_CtrlFrame_Sum/pDM_FatTable->MainAnt_CtrlFrame_Cnt):0; Aux_RSSI = (pDM_FatTable->AuxAnt_CtrlFrame_Cnt!=0)?(pDM_FatTable->AuxAnt_CtrlFrame_Sum/pDM_FatTable->AuxAnt_CtrlFrame_Cnt):0; if(pDM_FatTable->MainAnt_CtrlFrame_Cnt<=1 && pDM_FatTable->CCK_CtrlFrame_Cnt_main>=1) Main_RSSI=0; if(pDM_FatTable->AuxAnt_CtrlFrame_Cnt<=1 && pDM_FatTable->CCK_CtrlFrame_Cnt_aux>=1) Aux_RSSI=0; if (Main_RSSI != 0 || Aux_RSSI != 0) { RxIdleAnt = (Main_RSSI==Aux_RSSI)?pDM_SWAT_Table->PreAntenna:((Main_RSSI>=Aux_RSSI)?MAIN_ANT:AUX_ANT); LocalMaxRSSI = (Main_RSSI>=Aux_RSSI) ? Main_RSSI : Aux_RSSI; LocalMinRSSI = (Main_RSSI>=Aux_RSSI) ? Aux_RSSI : Main_RSSI; if((LocalMaxRSSI-LocalMinRSSI)>8) pDM_SWAT_Table->Train_time_flag=3; else if((LocalMaxRSSI-LocalMinRSSI)>5) pDM_SWAT_Table->Train_time_flag=2; else if((LocalMaxRSSI-LocalMinRSSI)>2) pDM_SWAT_Table->Train_time_flag=1; else pDM_SWAT_Table->Train_time_flag=0; ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Control frame: Main_RSSI = %d, Aux_RSSI = %d\n", Main_RSSI, Aux_RSSI)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("RxIdleAnt decided by control frame = %s\n", (RxIdleAnt == MAIN_ANT?"MAIN":"AUX"))); } } } pDM_FatTable->MinMaxRSSI=MinMaxRSSI; pDM_SWAT_Table->try_flag = 0; if( pDM_SWAT_Table->Double_chk_flag==1) { pDM_SWAT_Table->Double_chk_flag=0; if(pDM_FatTable->MinMaxRSSI > SWAntDiv_threshold) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,(" [Double check] MinMaxRSSI ((%d)) > %d again!! \n", pDM_FatTable->MinMaxRSSI,SWAntDiv_threshold)); ODM_UpdateRxIdleAnt(pDM_Odm, RxIdleAnt); ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("[reset try_flag = 0] Training accomplished !!!] \n\n\n")); return; } else { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,(" [Double check] MinMaxRSSI ((%d)) <= %d !! \n", pDM_FatTable->MinMaxRSSI,SWAntDiv_threshold)); nextAnt = (pDM_FatTable->RxIdleAnt == MAIN_ANT)? AUX_ANT : MAIN_ANT; pDM_SWAT_Table->try_flag = 0; pDM_SWAT_Table->reset_idx=reset_period; ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("[set try_flag=0] Normal State: Need to tryg again!! \n\n\n")); return; } } else { if(pDM_FatTable->MinMaxRSSI < SWAntDiv_threshold) pDM_SWAT_Table->reset_idx=reset_period; pDM_SWAT_Table->PreAntenna =RxIdleAnt; ODM_UpdateRxIdleAnt(pDM_Odm, RxIdleAnt ); ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("[reset try_flag = 0] Training accomplished !!!] \n\n\n")); return; } } } //1 4.Change TRX antenna ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RSSI_Trying = (( %d )), Ant: (( %s )) >>> (( %s )) \n", pDM_SWAT_Table->RSSI_Trying, (pDM_FatTable->RxIdleAnt == MAIN_ANT?"MAIN":"AUX"),(nextAnt == MAIN_ANT?"MAIN":"AUX"))); ODM_UpdateRxIdleAnt(pDM_Odm, nextAnt); //1 5.Reset Statistics pDM_FatTable->RxIdleAnt = nextAnt; //1 6.Set next timer (Trying State) ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" Test ((%s)) Ant for (( %d )) ms \n", (nextAnt == MAIN_ANT?"MAIN":"AUX"), pDM_SWAT_Table->Train_time)); ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer_8723B, pDM_SWAT_Table->Train_time ); //ms } #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) VOID ODM_SW_AntDiv_Callback( PRT_TIMER pTimer ) { PADAPTER Adapter = (PADAPTER)pTimer->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); pSWAT_T pDM_SWAT_Table = &pHalData->DM_OutSrc.DM_SWAT_Table; #if DEV_BUS_TYPE==RT_PCI_INTERFACE #if USE_WORKITEM ODM_ScheduleWorkItem(&pDM_SWAT_Table->SwAntennaSwitchWorkitem_8723B); #else { //DbgPrint("SW_antdiv_Callback"); odm_S0S1_SwAntDiv(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE); } #endif #else ODM_ScheduleWorkItem(&pDM_SWAT_Table->SwAntennaSwitchWorkitem_8723B); #endif } VOID ODM_SW_AntDiv_WorkitemCallback( IN PVOID pContext ) { PADAPTER pAdapter = (PADAPTER)pContext; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); //DbgPrint("SW_antdiv_Workitem_Callback"); odm_S0S1_SwAntDiv(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE); } #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) VOID ODM_SW_AntDiv_WorkitemCallback( IN PVOID pContext ) { PADAPTER pAdapter = (PADAPTER)pContext; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); //DbgPrint("SW_antdiv_Workitem_Callback"); odm_S0S1_SwAntDiv(&pHalData->odmpriv, SWAW_STEP_DETERMINE); } VOID ODM_SW_AntDiv_Callback(void *FunctionContext) { PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext; PADAPTER padapter = pDM_Odm->Adapter; if(padapter->net_closed == _TRUE) return; #if 0 // Can't do I/O in timer callback odm_S0S1_SwAntDiv(pDM_Odm, SWAW_STEP_DETERMINE); #else rtw_run_in_thread_cmd(padapter, ODM_SW_AntDiv_WorkitemCallback, padapter); #endif } #endif #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) VOID odm_S0S1_SwAntDivByCtrlFrame( IN PDM_ODM_T pDM_Odm, IN u1Byte Step ) { pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; switch(Step) { case SWAW_STEP_PEAK: pDM_SWAT_Table->PktCnt_SWAntDivByCtrlFrame = 0; pDM_SWAT_Table->bSWAntDivByCtrlFrame = TRUE; pDM_FatTable->MainAnt_CtrlFrame_Cnt = 0; pDM_FatTable->AuxAnt_CtrlFrame_Cnt = 0; pDM_FatTable->MainAnt_CtrlFrame_Sum = 0; pDM_FatTable->AuxAnt_CtrlFrame_Sum = 0; pDM_FatTable->CCK_CtrlFrame_Cnt_main = 0; pDM_FatTable->CCK_CtrlFrame_Cnt_aux = 0; pDM_FatTable->OFDM_CtrlFrame_Cnt_main = 0; pDM_FatTable->OFDM_CtrlFrame_Cnt_aux = 0; ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("odm_S0S1_SwAntDivForAPMode(): Start peak and reset counter\n")); break; case SWAW_STEP_DETERMINE: pDM_SWAT_Table->bSWAntDivByCtrlFrame = FALSE; ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("odm_S0S1_SwAntDivForAPMode(): Stop peak\n")); break; default: pDM_SWAT_Table->bSWAntDivByCtrlFrame = FALSE; break; } } VOID odm_AntselStatisticsOfCtrlFrame( IN PDM_ODM_T pDM_Odm, IN u1Byte antsel_tr_mux, IN u4Byte RxPWDBAll ) { pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; if(antsel_tr_mux == ANT1_2G) { pDM_FatTable->MainAnt_CtrlFrame_Sum+=RxPWDBAll; pDM_FatTable->MainAnt_CtrlFrame_Cnt++; } else { pDM_FatTable->AuxAnt_CtrlFrame_Sum+=RxPWDBAll; pDM_FatTable->AuxAnt_CtrlFrame_Cnt++; } } VOID odm_S0S1_SwAntDivByCtrlFrame_ProcessRSSI( IN PDM_ODM_T pDM_Odm, IN PODM_PHY_INFO_T pPhyInfo, IN PODM_PACKET_INFO_T pPktinfo ) { pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; BOOLEAN isCCKrate; if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) return; if(pDM_Odm->AntDivType != S0S1_SW_ANTDIV) return; // In try state if(!pDM_SWAT_Table->bSWAntDivByCtrlFrame) return; // No HW error and match receiver address if(!pPktinfo->bToSelf) return; pDM_SWAT_Table->PktCnt_SWAntDivByCtrlFrame++; isCCKrate = ((pPktinfo->DataRate >= DESC_RATE1M ) && (pPktinfo->DataRate <= DESC_RATE11M ))?TRUE :FALSE; if(isCCKrate) { pDM_FatTable->antsel_rx_keep_0 = (pDM_FatTable->RxIdleAnt == MAIN_ANT) ? ANT1_2G : ANT2_2G; if(pDM_FatTable->antsel_rx_keep_0==ANT1_2G) pDM_FatTable->CCK_CtrlFrame_Cnt_main++; else pDM_FatTable->CCK_CtrlFrame_Cnt_aux++; odm_AntselStatisticsOfCtrlFrame(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]); } else { if(pDM_FatTable->antsel_rx_keep_0==ANT1_2G) pDM_FatTable->OFDM_CtrlFrame_Cnt_main++; else pDM_FatTable->OFDM_CtrlFrame_Cnt_aux++; odm_AntselStatisticsOfCtrlFrame(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPhyInfo->RxPWDBAll); } } #endif //#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #endif //#if (RTL8723B_SUPPORT == 1) #if(RTL8188E_SUPPORT == 1 || RTL8192E_SUPPORT == 1) #if (!(DM_ODM_SUPPORT_TYPE == ODM_CE)) VOID odm_SetNextMACAddrTarget( IN PDM_ODM_T pDM_Odm ) { pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; PSTA_INFO_T pEntry; //u1Byte Bssid[6]; u4Byte value32, i; // //2012.03.26 LukeLee: The MAC address is changed according to MACID in turn // ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SetNextMACAddrTarget() ==>\n")); if(pDM_Odm->bLinked) { for (i=0; iTrainIdx+1) == ODM_ASSOCIATE_ENTRY_NUM) pDM_FatTable->TrainIdx = 0; else pDM_FatTable->TrainIdx++; pEntry = pDM_Odm->pODM_StaInfo[pDM_FatTable->TrainIdx]; if(IS_STA_VALID(pEntry)) { //Match MAC ADDR #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) value32 = (pEntry->hwaddr[5]<<8)|pEntry->hwaddr[4]; #else value32 = (pEntry->MacAddr[5]<<8)|pEntry->MacAddr[4]; #endif ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, value32); #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) value32 = (pEntry->hwaddr[3]<<24)|(pEntry->hwaddr[2]<<16) |(pEntry->hwaddr[1]<<8) |pEntry->hwaddr[0]; #else value32 = (pEntry->MacAddr[3]<<24)|(pEntry->MacAddr[2]<<16) |(pEntry->MacAddr[1]<<8) |pEntry->MacAddr[0]; #endif ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, value32); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_FatTable->TrainIdx=%lu\n",pDM_FatTable->TrainIdx)); #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training MAC Addr = %x:%x:%x:%x:%x:%x\n", pEntry->hwaddr[5],pEntry->hwaddr[4],pEntry->hwaddr[3],pEntry->hwaddr[2],pEntry->hwaddr[1],pEntry->hwaddr[0])); #else ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training MAC Addr = %x:%x:%x:%x:%x:%x\n", pEntry->MacAddr[5],pEntry->MacAddr[4],pEntry->MacAddr[3],pEntry->MacAddr[2],pEntry->MacAddr[1],pEntry->MacAddr[0])); #endif break; } } } #if 0 // //2012.03.26 LukeLee: This should be removed later, the MAC address is changed according to MACID in turn // #if( DM_ODM_SUPPORT_TYPE & ODM_WIN) { PADAPTER Adapter = pDM_Odm->Adapter; PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; for (i=0; i<6; i++) { Bssid[i] = pMgntInfo->Bssid[i]; //DbgPrint("Bssid[%d]=%x\n", i, Bssid[i]); } } #endif //odm_SetNextMACAddrTarget(pDM_Odm); //1 Select MAC Address Filter for (i=0; i<6; i++) { if(Bssid[i] != pDM_FatTable->Bssid[i]) { bMatchBSSID = FALSE; break; } } if(bMatchBSSID == FALSE) { //Match MAC ADDR value32 = (Bssid[5]<<8)|Bssid[4]; ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, value32); value32 = (Bssid[3]<<24)|(Bssid[2]<<16) |(Bssid[1]<<8) |Bssid[0]; ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, value32); } return bMatchBSSID; #endif } VOID odm_FastAntTraining( IN PDM_ODM_T pDM_Odm ) { u4Byte i, MaxRSSI=0; u1Byte TargetAnt=2; pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; BOOLEAN bPktFilterMacth = FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("==>odm_FastAntTraining()\n")); //1 TRAINING STATE if(pDM_FatTable->FAT_State == FAT_TRAINING_STATE) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Enter FAT_TRAINING_STATE\n")); //2 Caculate RSSI per Antenna for (i=0; i<7; i++) { if(pDM_FatTable->antRSSIcnt[i] == 0) pDM_FatTable->antAveRSSI[i] = 0; else { pDM_FatTable->antAveRSSI[i] = pDM_FatTable->antSumRSSI[i] /pDM_FatTable->antRSSIcnt[i]; bPktFilterMacth = TRUE; } if(pDM_FatTable->antAveRSSI[i] > MaxRSSI) { MaxRSSI = pDM_FatTable->antAveRSSI[i]; TargetAnt = (u1Byte) i; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_FatTable->antAveRSSI[%lu] = %lu, pDM_FatTable->antRSSIcnt[%lu] = %lu\n", i, pDM_FatTable->antAveRSSI[i], i, pDM_FatTable->antRSSIcnt[i])); } //2 Select TRX Antenna if(bPktFilterMacth == FALSE) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("None Packet is matched\n")); ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 0); //RegE08[16]=1'b0 //disable fast training ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 0); //RegC50[7]=1'b0 //disable HW AntDiv } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TargetAnt=%d, MaxRSSI=%lu\n",TargetAnt,MaxRSSI)); ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 0); //RegE08[16]=1'b0 //disable fast training //ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 0); //RegC50[7]=1'b0 //disable HW AntDiv ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, TargetAnt); //Default RX is Omni, Optional RX is the best decision by FAT //ODM_SetBBReg(pDM_Odm, 0x860 , BIT14|BIT13|BIT12, TargetAnt); //Default TX ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, 1); //Reg80c[21]=1'b1 //from TX Info #if 0 pEntry = pDM_Odm->pODM_StaInfo[pDM_FatTable->TrainIdx]; if(IS_STA_VALID(pEntry)) { pEntry->antsel_a = TargetAnt&BIT0; pEntry->antsel_b = (TargetAnt&BIT1)>>1; pEntry->antsel_c = (TargetAnt&BIT2)>>2; } #else pDM_FatTable->antsel_a[pDM_FatTable->TrainIdx] = TargetAnt&BIT0; pDM_FatTable->antsel_b[pDM_FatTable->TrainIdx] = (TargetAnt&BIT1)>>1; pDM_FatTable->antsel_c[pDM_FatTable->TrainIdx] = (TargetAnt&BIT2)>>2; #endif if(TargetAnt == 0) ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 0); //RegC50[7]=1'b0 //disable HW AntDiv } //2 Reset Counter for(i=0; i<7; i++) { pDM_FatTable->antSumRSSI[i] = 0; pDM_FatTable->antRSSIcnt[i] = 0; } pDM_FatTable->FAT_State = FAT_NORMAL_STATE; return; } //1 NORMAL STATE if(pDM_FatTable->FAT_State == FAT_NORMAL_STATE) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Enter FAT_NORMAL_STATE\n")); odm_SetNextMACAddrTarget(pDM_Odm); #if 0 pEntry = pDM_Odm->pODM_StaInfo[pDM_FatTable->TrainIdx]; if(IS_STA_VALID(pEntry)) { pEntry->antsel_a = TargetAnt&BIT0; pEntry->antsel_b = (TargetAnt&BIT1)>>1; pEntry->antsel_c = (TargetAnt&BIT2)>>2; } #endif //2 Prepare Training pDM_FatTable->FAT_State = FAT_TRAINING_STATE; ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 1); //RegE08[16]=1'b1 //enable fast training ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 1); //RegC50[7]=1'b1 //enable HW AntDiv ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Start FAT_TRAINING_STATE\n")); ODM_SetTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer, 500 ); //ms } } VOID odm_FastAntTrainingCallback( IN PDM_ODM_T pDM_Odm ) { #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PADAPTER padapter = pDM_Odm->Adapter; if(padapter->net_closed == _TRUE) return; //if(*pDM_Odm->pbNet_closed == TRUE) // return; #endif #if USE_WORKITEM ODM_ScheduleWorkItem(&pDM_Odm->FastAntTrainingWorkitem); #else odm_FastAntTraining(pDM_Odm); #endif } VOID odm_FastAntTrainingWorkItemCallback( IN PDM_ODM_T pDM_Odm ) { odm_FastAntTraining(pDM_Odm); } #endif #endif VOID ODM_AntDivReset( IN PDM_ODM_T pDM_Odm ) { //2 [--8723B---] #if (RTL8723B_SUPPORT == 1) if(pDM_Odm->SupportICType == ODM_RTL8723B) odm_S0S1_SWAntDiv_Reset_8723B(pDM_Odm); #endif } VOID ODM_AntDivInit( IN PDM_ODM_T pDM_Odm ) { pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] Not Support Antenna Diversity Function\n")); return; } //--- #if (DM_ODM_SUPPORT_TYPE == ODM_AP) if(pDM_FatTable->AntDiv_2G_5G == ODM_ANTDIV_2G) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[2G AntDiv Init]: Only Support 2G Antenna Diversity Function\n")); if(!(pDM_Odm->SupportICType & ODM_ANTDIV_2G_SUPPORT_IC)) return; } else if(pDM_FatTable->AntDiv_2G_5G == ODM_ANTDIV_5G) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[5G AntDiv Init]: Only Support 5G Antenna Diversity Function\n")); if(!(pDM_Odm->SupportICType & ODM_ANTDIV_5G_SUPPORT_IC)) return; } else if(pDM_FatTable->AntDiv_2G_5G == (ODM_ANTDIV_2G|ODM_ANTDIV_5G)) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[2G & 5G AntDiv Init]:Support Both 2G & 5G Antenna Diversity Function\n")); } pDM_Odm->antdiv_rssi=0; #endif //--- //2 [--General---] pDM_Odm->antdiv_period=0; pDM_Odm->antdiv_select=0; pDM_SWAT_Table->Ant5G = MAIN_ANT; pDM_SWAT_Table->Ant2G = MAIN_ANT; pDM_FatTable->CCK_counter_main=0; pDM_FatTable->CCK_counter_aux=0; pDM_FatTable->OFDM_counter_main=0; pDM_FatTable->OFDM_counter_aux=0; //3 [Set MAIN_ANT as default antenna if Auto-Ant enable] if (pDM_Odm->antdiv_select==1) pDM_Odm->AntType = ODM_FIX_MAIN_ANT; else if (pDM_Odm->antdiv_select==2) pDM_Odm->AntType = ODM_FIX_AUX_ANT; else if(pDM_Odm->antdiv_select==0) pDM_Odm->AntType = ODM_AUTO_ANT; if(pDM_Odm->AntType == ODM_AUTO_ANT) { odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); } else { odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); if(pDM_Odm->AntType == ODM_FIX_MAIN_ANT) { ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); return; } else if(pDM_Odm->AntType == ODM_FIX_AUX_ANT) { ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); return; } } //--- if(pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV) { if(pDM_Odm->SupportICType & ODM_N_ANTDIV_SUPPORT) { #if TX_BY_REG ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, 0); //Reg80c[21]=1'b0 //from Reg #else ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, 1); #endif } else if(pDM_Odm->SupportICType & ODM_AC_ANTDIV_SUPPORT) { #if TX_BY_REG ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, 0); #else ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, 1); #endif } } //2 [--88E---] if(pDM_Odm->SupportICType == ODM_RTL8188E) { #if (RTL8188E_SUPPORT == 1) //pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; //pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; if( (pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV) && (pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) && (pDM_Odm->AntDivType != CG_TRX_SMART_ANTDIV)) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 88E Not Supprrt This AntDiv Type\n")); pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); return; } if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) odm_RX_HWAntDiv_Init_88E(pDM_Odm); else if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) odm_TRX_HWAntDiv_Init_88E(pDM_Odm); else if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) odm_Smart_HWAntDiv_Init_88E(pDM_Odm); #endif } //2 [--92E---] #if (RTL8192E_SUPPORT == 1) else if(pDM_Odm->SupportICType == ODM_RTL8192E) { //pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; //pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; if( (pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV) && (pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) && (pDM_Odm->AntDivType != CG_TRX_SMART_ANTDIV)) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 8192E Not Supprrt This AntDiv Type\n")); pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); return; } if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) odm_RX_HWAntDiv_Init_92E(pDM_Odm); else if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) odm_TRX_HWAntDiv_Init_92E(pDM_Odm); else if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) odm_Smart_HWAntDiv_Init_92E(pDM_Odm); } #endif //2 [--8723B---] #if (RTL8723B_SUPPORT == 1) else if(pDM_Odm->SupportICType == ODM_RTL8723B) { //pDM_Odm->AntDivType = S0S1_SW_ANTDIV; //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; if(pDM_Odm->AntDivType != S0S1_SW_ANTDIV && pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 8723B Not Supprrt This AntDiv Type\n")); pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); return; } if( pDM_Odm->AntDivType==S0S1_SW_ANTDIV) odm_S0S1_SWAntDiv_Init_8723B(pDM_Odm); else if(pDM_Odm->AntDivType==CG_TRX_HW_ANTDIV) odm_TRX_HWAntDiv_Init_8723B(pDM_Odm); } #endif //2 [--8811A 8821A---] #if (RTL8821A_SUPPORT == 1) else if(pDM_Odm->SupportICType == ODM_RTL8821) { //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; pDM_Odm->AntDivType = S0S1_SW_ANTDIV; if( pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV && pDM_Odm->AntDivType != S0S1_SW_ANTDIV) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 8821A & 8811A Not Supprrt This AntDiv Type\n")); pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); return; } if(pDM_Odm->AntDivType==CG_TRX_HW_ANTDIV) odm_TRX_HWAntDiv_Init_8821A(pDM_Odm); else if( pDM_Odm->AntDivType==S0S1_SW_ANTDIV) odm_S0S1_SWAntDiv_Init_8821A(pDM_Odm); } #endif //2 [--8881A---] #if (RTL8881A_SUPPORT == 1) else if(pDM_Odm->SupportICType == ODM_RTL8881A) { //pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; if(pDM_Odm->AntDivType != CGCS_RX_HW_ANTDIV && pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 8881A Not Supprrt This AntDiv Type\n")); pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); return; } if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) odm_RX_HWAntDiv_Init_8881A(pDM_Odm); else if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) odm_TRX_HWAntDiv_Init_8881A(pDM_Odm); } #endif //2 [--8812---] #if (RTL8812A_SUPPORT == 1) else if(pDM_Odm->SupportICType == ODM_RTL8812) { //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; if( pDM_Odm->AntDivType != CG_TRX_HW_ANTDIV) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] 8812A Not Supprrt This AntDiv Type\n")); pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); return; } odm_TRX_HWAntDiv_Init_8812A(pDM_Odm); } #endif //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("*** SupportICType=[%lu] \n",pDM_Odm->SupportICType)); //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("*** AntDiv SupportAbility=[%lu] \n",(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)>>6)); //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("*** AntDiv Type=[%d] \n",pDM_Odm->AntDivType)); } VOID ODM_AntDiv( IN PDM_ODM_T pDM_Odm ) { PADAPTER pAdapter = pDM_Odm->Adapter; pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; //#if (DM_ODM_SUPPORT_TYPE == ODM_AP) if(*pDM_Odm->pBandType == ODM_BAND_5G ) { if(pDM_FatTable->idx_AntDiv_counter_5G < pDM_Odm->antdiv_period ) { pDM_FatTable->idx_AntDiv_counter_5G++; return; } else pDM_FatTable->idx_AntDiv_counter_5G=0; } else if(*pDM_Odm->pBandType == ODM_BAND_2_4G ) { if(pDM_FatTable->idx_AntDiv_counter_2G < pDM_Odm->antdiv_period ) { pDM_FatTable->idx_AntDiv_counter_2G++; return; } else pDM_FatTable->idx_AntDiv_counter_2G=0; } //#endif //---------- if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[Return!!!] Not Support Antenna Diversity Function\n")); return; } //---------- #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) if(pAdapter->MgntInfo.AntennaTest) return; { #if (BEAMFORMING_SUPPORT == 1) BEAMFORMING_CAP BeamformCap = (pDM_Odm->BeamformingInfo.BeamformCap); if( BeamformCap & BEAMFORMEE_CAP ) // BFmee On && Div On -> Div Off { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[ AntDiv : OFF ] BFmee ==1 \n")); if(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) { odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); return; } } else // BFmee Off && Div Off -> Div On #endif { if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) && pDM_Odm->bLinked) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[ AntDiv : ON ] BFmee ==0 \n")); if((pDM_Odm->AntDivType!=S0S1_SW_ANTDIV) ) odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); pDM_Odm->SupportAbility |= (ODM_BB_ANT_DIV); } } } #endif //---------- #if (DM_ODM_SUPPORT_TYPE == ODM_AP) if(pDM_FatTable->AntDiv_2G_5G == ODM_ANTDIV_2G) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[ 2G AntDiv Running ]\n")); if(!(pDM_Odm->SupportICType & ODM_ANTDIV_2G_SUPPORT_IC)) return; } else if(pDM_FatTable->AntDiv_2G_5G == ODM_ANTDIV_5G) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[ 5G AntDiv Running ]\n")); if(!(pDM_Odm->SupportICType & ODM_ANTDIV_5G_SUPPORT_IC)) return; } else if(pDM_FatTable->AntDiv_2G_5G == (ODM_ANTDIV_2G|ODM_ANTDIV_5G)) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("[ 2G & 5G AntDiv Running ]\n")); } #endif //---------- if (pDM_Odm->antdiv_select==1) pDM_Odm->AntType = ODM_FIX_MAIN_ANT; else if (pDM_Odm->antdiv_select==2) pDM_Odm->AntType = ODM_FIX_AUX_ANT; else if (pDM_Odm->antdiv_select==0) pDM_Odm->AntType = ODM_AUTO_ANT; //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("AntType= (( %d )) , pre_AntType= (( %d )) \n",pDM_Odm->AntType,pDM_Odm->pre_AntType)); if(pDM_Odm->AntType != ODM_AUTO_ANT) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Fix Antenna at (( %s ))\n",(pDM_Odm->AntType == ODM_FIX_MAIN_ANT)?"MAIN":"AUX")); if(pDM_Odm->AntType != pDM_Odm->pre_AntType) { odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); if(pDM_Odm->SupportICType & ODM_N_ANTDIV_SUPPORT) ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, 0); else if(pDM_Odm->SupportICType & ODM_AC_ANTDIV_SUPPORT) ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, 0); if(pDM_Odm->AntType == ODM_FIX_MAIN_ANT) ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); else if(pDM_Odm->AntType == ODM_FIX_AUX_ANT) ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); } pDM_Odm->pre_AntType=pDM_Odm->AntType; return; } else { if(pDM_Odm->AntType != pDM_Odm->pre_AntType) { odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); if(pDM_Odm->SupportICType & ODM_N_ANTDIV_SUPPORT) ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, 1); else if(pDM_Odm->SupportICType & ODM_AC_ANTDIV_SUPPORT) ODM_SetBBReg(pDM_Odm, 0x900 , BIT18, 1); } pDM_Odm->pre_AntType=pDM_Odm->AntType; } //3 ----------------------------------------------------------------------------------------------------------- //2 [--88E---] if(pDM_Odm->SupportICType == ODM_RTL8188E) { #if (RTL8188E_SUPPORT == 1) if(pDM_Odm->AntDivType==CG_TRX_HW_ANTDIV ||pDM_Odm->AntDivType==CGCS_RX_HW_ANTDIV) odm_HW_AntDiv(pDM_Odm); #if (!(DM_ODM_SUPPORT_TYPE == ODM_CE)) else if (pDM_Odm->AntDivType==CG_TRX_SMART_ANTDIV) odm_FastAntTraining(pDM_Odm); #endif #endif } //2 [--92E---] #if (RTL8192E_SUPPORT == 1) else if(pDM_Odm->SupportICType == ODM_RTL8192E) { if(pDM_Odm->AntDivType==CGCS_RX_HW_ANTDIV) odm_HW_AntDiv(pDM_Odm); #if (!(DM_ODM_SUPPORT_TYPE == ODM_CE)) else if (pDM_Odm->AntDivType==CG_TRX_SMART_ANTDIV) odm_FastAntTraining(pDM_Odm); #endif } #endif #if (RTL8723B_SUPPORT == 1) //2 [--8723B---] else if(pDM_Odm->SupportICType == ODM_RTL8723B) { if (pDM_Odm->AntDivType==S0S1_SW_ANTDIV) odm_S0S1_SwAntDiv(pDM_Odm, SWAW_STEP_PEAK); else if (pDM_Odm->AntDivType==CG_TRX_HW_ANTDIV) odm_HW_AntDiv(pDM_Odm); } #endif //2 [--8821A---] #if (RTL8821A_SUPPORT == 1) else if(pDM_Odm->SupportICType == ODM_RTL8821) { if(!pDM_Odm->bBtEnabled) //BT disabled { if(pDM_Odm->AntDivType == S0S1_SW_ANTDIV) { pDM_Odm->AntDivType=CG_TRX_HW_ANTDIV; ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,(" [S0S1_SW_ANTDIV] -> [CG_TRX_HW_ANTDIV]\n")); //ODM_SetBBReg(pDM_Odm, 0x8D4 , BIT24, 1); if(pDM_FatTable->bBecomeLinked ==TRUE) odm_AntDiv_on_off(pDM_Odm, ANTDIV_ON); } } else //BT enabled { if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) { pDM_Odm->AntDivType=S0S1_SW_ANTDIV; ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,(" [CG_TRX_HW_ANTDIV] -> [S0S1_SW_ANTDIV]\n")); //ODM_SetBBReg(pDM_Odm, 0x8D4 , BIT24, 0); odm_AntDiv_on_off(pDM_Odm, ANTDIV_OFF); } } if (pDM_Odm->AntDivType==S0S1_SW_ANTDIV) odm_S0S1_SwAntDiv(pDM_Odm, SWAW_STEP_PEAK); else if (pDM_Odm->AntDivType==CG_TRX_HW_ANTDIV) odm_HW_AntDiv(pDM_Odm); } #endif //2 [--8881A---] #if (RTL8881A_SUPPORT == 1) else if(pDM_Odm->SupportICType == ODM_RTL8881A) odm_HW_AntDiv(pDM_Odm); #endif //2 [--8812A---] #if (RTL8812A_SUPPORT == 1) else if(pDM_Odm->SupportICType == ODM_RTL8812) odm_HW_AntDiv(pDM_Odm); #endif } VOID odm_AntselStatistics( IN PDM_ODM_T pDM_Odm, IN u1Byte antsel_tr_mux, IN u4Byte MacId, IN u4Byte RxPWDBAll ) { pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; if(antsel_tr_mux == ANT1_2G) { pDM_FatTable->MainAnt_Sum[MacId]+=RxPWDBAll; pDM_FatTable->MainAnt_Cnt[MacId]++; } else { pDM_FatTable->AuxAnt_Sum[MacId]+=RxPWDBAll; pDM_FatTable->AuxAnt_Cnt[MacId]++; } } VOID ODM_Process_RSSIForAntDiv( IN OUT PDM_ODM_T pDM_Odm, IN PODM_PHY_INFO_T pPhyInfo, IN PODM_PACKET_INFO_T pPktinfo ) { u1Byte isCCKrate=0,CCKMaxRate=DESC_RATE11M; pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) u4Byte RxPower_Ant0, RxPower_Ant1; #else u1Byte RxPower_Ant0, RxPower_Ant1; #endif if(pDM_Odm->SupportICType & ODM_N_ANTDIV_SUPPORT) CCKMaxRate=DESC_RATE11M; else if(pDM_Odm->SupportICType & ODM_AC_ANTDIV_SUPPORT) CCKMaxRate=DESC_RATE11M; isCCKrate = (pPktinfo->DataRate <= CCKMaxRate)?TRUE:FALSE; #if ((RTL8192C_SUPPORT == 1) ||(RTL8192D_SUPPORT == 1)) if(pDM_Odm->SupportICType & ODM_RTL8192C|ODM_RTL8192D) { if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) { //if(pPktinfo->bPacketBeacon) //{ // DbgPrint("This is beacon, isCCKrate=%d\n", isCCKrate); //} ODM_AntselStatistics_88C(pDM_Odm, pPktinfo->StationID, pPhyInfo->RxPWDBAll, isCCKrate); } } #endif if( (pDM_Odm->SupportICType == ODM_RTL8192E||pDM_Odm->SupportICType == ODM_RTL8812) && (pPktinfo->DataRate > CCKMaxRate) ) { RxPower_Ant0 = pPhyInfo->RxMIMOSignalStrength[0]; RxPower_Ant1= pPhyInfo->RxMIMOSignalStrength[1]; } else RxPower_Ant0=pPhyInfo->RxPWDBAll; if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) { if( (pDM_Odm->SupportICType & ODM_SMART_ANT_SUPPORT) && pPktinfo->bPacketToSelf && pDM_FatTable->FAT_State == FAT_TRAINING_STATE )//(pPktinfo->bPacketMatchBSSID && (!pPktinfo->bPacketBeacon)) { u1Byte antsel_tr_mux; antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |(pDM_FatTable->antsel_rx_keep_1 <<1) |pDM_FatTable->antsel_rx_keep_0; pDM_FatTable->antSumRSSI[antsel_tr_mux] += RxPower_Ant0; pDM_FatTable->antRSSIcnt[antsel_tr_mux]++; } } else //AntDivType != CG_TRX_SMART_ANTDIV { if( ( pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT ) && (pPktinfo->bPacketToSelf || pPktinfo->bPacketMatchBSSID) ) { if(pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E) odm_AntselStatistics(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPktinfo->StationID,RxPower_Ant0); else// SupportICType == ODM_RTL8821 and ODM_RTL8723B and ODM_RTL8812) { if(isCCKrate && (pDM_Odm->AntDivType == S0S1_SW_ANTDIV)) { pDM_FatTable->antsel_rx_keep_0 = (pDM_FatTable->RxIdleAnt == MAIN_ANT) ? ANT1_2G : ANT2_2G; if(pDM_FatTable->antsel_rx_keep_0==ANT1_2G) pDM_FatTable->CCK_counter_main++; else// if(pDM_FatTable->antsel_rx_keep_0==ANT2_2G) pDM_FatTable->CCK_counter_aux++; odm_AntselStatistics(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPktinfo->StationID, RxPower_Ant0); } else { if(pDM_FatTable->antsel_rx_keep_0==ANT1_2G) pDM_FatTable->OFDM_counter_main++; else// if(pDM_FatTable->antsel_rx_keep_0==ANT2_2G) pDM_FatTable->OFDM_counter_aux++; odm_AntselStatistics(pDM_Odm, pDM_FatTable->antsel_rx_keep_0, pPktinfo->StationID, RxPower_Ant0); } } } } //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("isCCKrate=%d, PWDB_ALL=%d\n",isCCKrate, pPhyInfo->RxPWDBAll)); //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("antsel_tr_mux=3'b%d%d%d\n",pDM_FatTable->antsel_rx_keep_2, pDM_FatTable->antsel_rx_keep_1, pDM_FatTable->antsel_rx_keep_0)); } #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) VOID ODM_SetTxAntByTxInfo( IN PDM_ODM_T pDM_Odm, IN pu1Byte pDesc, IN u1Byte macId ) { pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) return; if(pDM_Odm->AntDivType==CGCS_RX_HW_ANTDIV) return; if(pDM_Odm->SupportICType == ODM_RTL8723B) { #if (RTL8723B_SUPPORT == 1) SET_TX_DESC_ANTSEL_A_8723B(pDesc, pDM_FatTable->antsel_a[macId]); //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[8723B] SetTxAntByTxInfo_WIN: MacID=%d, antsel_tr_mux=3'b%d%d%d\n", //macId, pDM_FatTable->antsel_c[macId], pDM_FatTable->antsel_b[macId], pDM_FatTable->antsel_a[macId])); #endif } else if(pDM_Odm->SupportICType == ODM_RTL8821) { #if (RTL8821A_SUPPORT == 1) SET_TX_DESC_ANTSEL_A_8812(pDesc, pDM_FatTable->antsel_a[macId]); //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[8821A] SetTxAntByTxInfo_WIN: MacID=%d, antsel_tr_mux=3'b%d%d%d\n", //macId, pDM_FatTable->antsel_c[macId], pDM_FatTable->antsel_b[macId], pDM_FatTable->antsel_a[macId])); #endif } else if(pDM_Odm->SupportICType == ODM_RTL8188E) { #if (RTL8188E_SUPPORT == 1) SET_TX_DESC_ANTSEL_A_88E(pDesc, pDM_FatTable->antsel_a[macId]); SET_TX_DESC_ANTSEL_B_88E(pDesc, pDM_FatTable->antsel_b[macId]); SET_TX_DESC_ANTSEL_C_88E(pDesc, pDM_FatTable->antsel_c[macId]); //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[8188E] SetTxAntByTxInfo_WIN: MacID=%d, antsel_tr_mux=3'b%d%d%d\n", //macId, pDM_FatTable->antsel_c[macId], pDM_FatTable->antsel_b[macId], pDM_FatTable->antsel_a[macId])); #endif } else if(pDM_Odm->SupportICType == ODM_RTL8192E) { } } #else// (DM_ODM_SUPPORT_TYPE == ODM_AP) VOID ODM_SetTxAntByTxInfo( //IN PDM_ODM_T pDM_Odm, struct rtl8192cd_priv *priv, struct tx_desc *pdesc, struct tx_insn *txcfg, unsigned short aid ) { pFAT_T pDM_FatTable = &priv->pshare->_dmODM.DM_FatTable; u4Byte SupportICType=priv->pshare->_dmODM.SupportICType; if(SupportICType == ODM_RTL8881A) { //panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8881E****** \n",__FUNCTION__,__LINE__); pdesc->Dword6 &= set_desc(~ (BIT(18)|BIT(17)|BIT(16))); pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_a[aid]<<16); } else if(SupportICType == ODM_RTL8192E) { //panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8192E****** \n",__FUNCTION__,__LINE__); pdesc->Dword6 &= set_desc(~ (BIT(18)|BIT(17)|BIT(16))); pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_a[aid]<<16); } else if(SupportICType == ODM_RTL8812) { //3 [path-A] //panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8881E****** \n",__FUNCTION__,__LINE__); pdesc->Dword6 &= set_desc(~ BIT(16)); pdesc->Dword6 &= set_desc(~ BIT(17)); pdesc->Dword6 &= set_desc(~ BIT(18)); if(txcfg->pstat) { pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_a[aid]<<16); pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_b[aid]<<17); pdesc->Dword6 |= set_desc(pDM_FatTable->antsel_c[aid]<<18); } } } #endif VOID ODM_AntDiv_Config( IN PDM_ODM_T pDM_Odm ) { pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("WIN Config Antenna Diversity\n")); if(pDM_Odm->SupportICType==ODM_RTL8723B) { if((!pDM_Odm->DM_SWAT_Table.ANTA_ON || !pDM_Odm->DM_SWAT_Table.ANTB_ON)) pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); } #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("CE Config Antenna Diversity\n")); //if(pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT) //{ //pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; //} if(pDM_Odm->SupportICType==ODM_RTL8723B) { pDM_Odm->AntDivType = S0S1_SW_ANTDIV; } #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("AP Config Antenna Diversity\n")); //2 [ NOT_SUPPORT_ANTDIV ] #if(defined(CONFIG_NOT_SUPPORT_ANTDIV)) pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Disable AntDiv function] : Not Support 2.4G & 5G Antenna Diversity\n")); //2 [ 2G&5G_SUPPORT_ANTDIV ] #elif(defined(CONFIG_2G5G_SUPPORT_ANTDIV)) ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Enable AntDiv function] : 2.4G & 5G Support Antenna Diversity Simultaneously \n")); pDM_FatTable->AntDiv_2G_5G = (ODM_ANTDIV_2G|ODM_ANTDIV_5G); if(pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT) pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; if(*pDM_Odm->pBandType == ODM_BAND_5G ) { #if ( defined(CONFIG_5G_CGCS_RX_DIVERSITY) ) pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n")); panic_printk("[ 5G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n"); #elif( defined(CONFIG_5G_CG_TRX_DIVERSITY) ) pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_TRX_HW_ANTDIV\n")); panic_printk("[ 5G] : AntDiv Type = CG_TRX_HW_ANTDIV\n"); #elif( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_SMART_ANTDIV\n")); #elif( defined(CONFIG_5G_S0S1_SW_ANT_DIVERSITY) ) pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = S0S1_SW_ANTDIV\n")); #endif } else if(*pDM_Odm->pBandType == ODM_BAND_2_4G ) { #if ( defined(CONFIG_2G_CGCS_RX_DIVERSITY) ) pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n")); #elif( defined(CONFIG_2G_CG_TRX_DIVERSITY) ) pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_TRX_HW_ANTDIV\n")); #elif( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_SMART_ANTDIV\n")); #elif( defined(CONFIG_2G_S0S1_SW_ANT_DIVERSITY) ) pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = S0S1_SW_ANTDIV\n")); #endif } //2 [ 5G_SUPPORT_ANTDIV ] #elif(defined(CONFIG_5G_SUPPORT_ANTDIV)) ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Enable AntDiv function] : Only 5G Support Antenna Diversity\n")); panic_printk("[ Enable AntDiv function] : Only 5G Support Antenna Diversity\n"); pDM_FatTable->AntDiv_2G_5G = (ODM_ANTDIV_5G); if(*pDM_Odm->pBandType == ODM_BAND_5G ) { if(pDM_Odm->SupportICType & ODM_ANTDIV_5G_SUPPORT_IC) pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; #if ( defined(CONFIG_5G_CGCS_RX_DIVERSITY) ) pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n")); panic_printk("[ 5G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n"); #elif( defined(CONFIG_5G_CG_TRX_DIVERSITY) ) pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; panic_printk("[ 5G] : AntDiv Type = CG_TRX_HW_ANTDIV\n"); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_TRX_HW_ANTDIV\n")); #elif( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_SMART_ANTDIV\n")); #elif( defined(CONFIG_5G_S0S1_SW_ANT_DIVERSITY) ) pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = S0S1_SW_ANTDIV\n")); #endif } else if(*pDM_Odm->pBandType == ODM_BAND_2_4G ) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Not Support 2G AntDivType\n")); pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); } //2 [ 2G_SUPPORT_ANTDIV ] #elif(defined(CONFIG_2G_SUPPORT_ANTDIV)) ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Enable AntDiv function] : Only 2.4G Support Antenna Diversity\n")); pDM_FatTable->AntDiv_2G_5G = (ODM_ANTDIV_2G); if(*pDM_Odm->pBandType == ODM_BAND_2_4G ) { if(pDM_Odm->SupportICType & ODM_ANTDIV_2G_SUPPORT_IC) pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV; #if ( defined(CONFIG_2G_CGCS_RX_DIVERSITY) ) pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n")); #elif( defined(CONFIG_2G_CG_TRX_DIVERSITY) ) pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_TRX_HW_ANTDIV\n")); #elif( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) ) pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_SMART_ANTDIV\n")); #elif( defined(CONFIG_2G_S0S1_SW_ANT_DIVERSITY) ) pDM_Odm->AntDivType = S0S1_SW_ANTDIV; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = S0S1_SW_ANTDIV\n")); #endif } else if(*pDM_Odm->pBandType == ODM_BAND_5G ) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Not Support 5G AntDivType\n")); pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV); } #endif #endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SupportAbility = (( %x ))\n", pDM_Odm->SupportAbility )); } VOID ODM_AntDivTimers( IN PDM_ODM_T pDM_Odm, IN u1Byte state ) { if(state==INIT_ANTDIV_TIMMER) { #if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1) ODM_InitializeTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer_8723B, (RT_TIMER_CALL_BACK)ODM_SW_AntDiv_Callback, NULL, "SwAntennaSwitchTimer_8723B"); #elif (RTL8188E_SUPPORT == 1) #if (DM_ODM_SUPPORT_TYPE == ODM_AP) ODM_InitializeTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer, (RT_TIMER_CALL_BACK)odm_FastAntTrainingCallback, NULL, "FastAntTrainingTimer"); #endif #endif } else if(state==CANCEL_ANTDIV_TIMMER) { #if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1) ODM_CancelTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer_8723B); #elif (RTL8188E_SUPPORT == 1) #if (DM_ODM_SUPPORT_TYPE == ODM_AP) ODM_CancelTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer); #endif #endif } else if(state==RELEASE_ANTDIV_TIMMER) { #if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1) ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer_8723B); #elif (RTL8188E_SUPPORT == 1) #if (DM_ODM_SUPPORT_TYPE == ODM_AP) ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer); #endif #endif } } #endif //#if (defined(CONFIG_HW_ANTENNA_DIVERSITY)) rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_AntDiv.h000066400000000000000000000113701261122257400220230ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __PHYDMANTDIV_H__ #define __PHYDMANTDIV_H__ #define ANTDIV_VERSION "1.0" #define ANT1_2G 0 // = ANT2_5G #define ANT2_2G 1 // = ANT1_5G //Antenna Diversty Control Type #define ODM_AUTO_ANT 0 #define ODM_FIX_MAIN_ANT 1 #define ODM_FIX_AUX_ANT 2 #define TX_BY_REG 0 #if (DM_ODM_SUPPORT_TYPE != ODM_AP) #define ODM_RTL8881A 0 //Just for windows driver to jointly use ODM-driver #endif #define ODM_ANTDIV_SUPPORT (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8821|ODM_RTL8881A|ODM_RTL8812) #define ODM_N_ANTDIV_SUPPORT (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B) #define ODM_AC_ANTDIV_SUPPORT (ODM_RTL8821|ODM_RTL8881A|ODM_RTL8812) #define ODM_SMART_ANT_SUPPORT (ODM_RTL8188E|ODM_RTL8192E) #define ODM_OLD_IC_ANTDIV_SUPPORT (ODM_RTL8723A|ODM_RTL8192C|ODM_RTL8192D) #define ODM_ANTDIV_2G_SUPPORT_IC (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8881A) #define ODM_ANTDIV_5G_SUPPORT_IC (ODM_RTL8821|ODM_RTL8881A|ODM_RTL8812) #define ODM_ANTDIV_2G BIT0 #define ODM_ANTDIV_5G BIT1 #define ANTDIV_ON 1 #define ANTDIV_OFF 0 #define INIT_ANTDIV_TIMMER 0 #define CANCEL_ANTDIV_TIMMER 1 #define RELEASE_ANTDIV_TIMMER 2 VOID ODM_StopAntennaSwitchDm( IN PDM_ODM_T pDM_Odm ); VOID ODM_SetAntConfig( IN PDM_ODM_T pDM_Odm, IN u1Byte antSetting // 0=A, 1=B, 2=C, .... ); #define SwAntDivRestAfterLink ODM_SwAntDivRestAfterLink VOID ODM_SwAntDivRestAfterLink( IN PDM_ODM_T pDM_Odm); #if (defined(CONFIG_HW_ANTENNA_DIVERSITY)) VOID ODM_UpdateRxIdleAnt( IN PDM_ODM_T pDM_Odm, IN u1Byte Ant ); VOID odm_AntselStatistics( IN PDM_ODM_T pDM_Odm, IN u1Byte antsel_tr_mux, IN u4Byte MacId, IN u4Byte RxPWDBAll ); #if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1) #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) VOID ODM_SW_AntDiv_Callback( IN PRT_TIMER pTimer ); VOID ODM_SW_AntDiv_WorkitemCallback( IN PVOID pContext ); #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) VOID ODM_SW_AntDiv_Callback(void *FunctionContext); #endif #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) VOID odm_S0S1_SwAntDivByCtrlFrame( IN PDM_ODM_T pDM_Odm, IN u1Byte Step ); VOID odm_AntselStatisticsOfCtrlFrame( IN PDM_ODM_T pDM_Odm, IN u1Byte antsel_tr_mux, IN u4Byte RxPWDBAll ); VOID odm_S0S1_SwAntDivByCtrlFrame_ProcessRSSI( IN PDM_ODM_T pDM_Odm, IN PODM_PHY_INFO_T pPhyInfo, IN PODM_PACKET_INFO_T pPktinfo ); #endif //#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #endif #if(RTL8188E_SUPPORT == 1 || RTL8192E_SUPPORT == 1) #if ( !(DM_ODM_SUPPORT_TYPE == ODM_CE)) VOID odm_FastAntTraining( IN PDM_ODM_T pDM_Odm ); VOID odm_FastAntTrainingCallback( IN PDM_ODM_T pDM_Odm ); VOID odm_FastAntTrainingWorkItemCallback( IN PDM_ODM_T pDM_Odm ); #endif #endif VOID ODM_AntDivInit( IN PDM_ODM_T pDM_Odm ); VOID ODM_AntDivReset( IN PDM_ODM_T pDM_Odm ); VOID ODM_AntDiv( IN PDM_ODM_T pDM_Odm ); VOID ODM_Process_RSSIForAntDiv( IN OUT PDM_ODM_T pDM_Odm, IN PODM_PHY_INFO_T pPhyInfo, IN PODM_PACKET_INFO_T pPktinfo ); #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) VOID ODM_SetTxAntByTxInfo( IN PDM_ODM_T pDM_Odm, IN pu1Byte pDesc, IN u1Byte macId ); #else// (DM_ODM_SUPPORT_TYPE == ODM_AP) VOID ODM_SetTxAntByTxInfo( //IN PDM_ODM_T pDM_Odm, struct rtl8192cd_priv *priv, struct tx_desc *pdesc, struct tx_insn *txcfg, unsigned short aid ); #endif VOID ODM_AntDiv_Config( IN PDM_ODM_T pDM_Odm ); VOID ODM_UpdateRxIdleAnt_8723B( IN PDM_ODM_T pDM_Odm, IN u1Byte Ant, IN u4Byte DefaultAnt, IN u4Byte OptionalAnt ); VOID ODM_AntDivTimers( IN PDM_ODM_T pDM_Odm, IN u1Byte state ); #endif //#if (defined(CONFIG_HW_ANTENNA_DIVERSITY)) #endif //#ifndef __ODMANTDIV_H__ rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_CfoTracking.c000066400000000000000000000255651261122257400230360ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include "Mp_Precomp.h" #include "phydm_precomp.h" VOID odm_SetCrystalCap( IN PVOID pDM_VOID, IN u1Byte CrystalCap ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PhyDM_CfoTrack); BOOLEAN bEEPROMCheck; #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); bEEPROMCheck = (pHalData->EEPROMVersion >= 0x01)?TRUE:FALSE; #else bEEPROMCheck = TRUE; #endif if(pCfoTrack->CrystalCap == CrystalCap) return; pCfoTrack->CrystalCap = CrystalCap; if(pDM_Odm->SupportICType & ODM_RTL8192D) { ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x000000F0, CrystalCap & 0x0F); ODM_SetBBReg(pDM_Odm, REG_AFE_PLL_CTRL, 0xF0000000, ((CrystalCap & 0xF0) >> 4)); } else if(pDM_Odm->SupportICType & ODM_RTL8188E) { // write 0x24[22:17] = 0x24[16:11] = CrystalCap CrystalCap = CrystalCap & 0x3F; ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x007ff800, (CrystalCap | (CrystalCap << 6))); } else if(pDM_Odm->SupportICType & ODM_RTL8812) { // write 0x2C[30:25] = 0x2C[24:19] = CrystalCap CrystalCap = CrystalCap & 0x3F; ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x7FF80000, (CrystalCap | (CrystalCap << 6))); } else if (((pDM_Odm->SupportICType & ODM_RTL8723A) && bEEPROMCheck) || (pDM_Odm->SupportICType & ODM_RTL8723B) ||(pDM_Odm->SupportICType & ODM_RTL8192E) || (pDM_Odm->SupportICType & ODM_RTL8821)) { // 0x2C[23:18] = 0x2C[17:12] = CrystalCap CrystalCap = CrystalCap & 0x3F; ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x00FFF000, (CrystalCap | (CrystalCap << 6))); } else if(pDM_Odm->SupportICType & ODM_RTL8821B) { // write 0x28[6:1] = 0x24[30:25] = CrystalCap CrystalCap = CrystalCap & 0x3F; ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x7E000000, CrystalCap); ODM_SetBBReg(pDM_Odm, REG_AFE_PLL_CTRL, 0x7E, CrystalCap); } else if(pDM_Odm->SupportICType & ODM_RTL8814A) { // write 0x2C[26:21] = 0x2C[20:15] = CrystalCap CrystalCap = CrystalCap & 0x3F; ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x07FF8000, (CrystalCap | (CrystalCap << 6))); } else { ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_SetCrystalCap(): Use default setting.\n")); ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6))); } ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_SetCrystalCap(): CrystalCap = 0x%x\n", CrystalCap)); } u1Byte odm_GetDefaultCrytaltalCap( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; u1Byte CrystalCap = 0x20; #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); CrystalCap = pHalData->CrystalCap; #else prtl8192cd_priv priv = pDM_Odm->priv; if(priv->pmib->dot11RFEntry.xcap > 0) CrystalCap = priv->pmib->dot11RFEntry.xcap; #endif CrystalCap = CrystalCap & 0x3f; return CrystalCap; } VOID odm_SetATCStatus( IN PVOID pDM_VOID, IN BOOLEAN ATCStatus ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PhyDM_CfoTrack); if(pCfoTrack->bATCStatus == ATCStatus) return; ODM_SetBBReg(pDM_Odm, ODM_REG(BB_ATC,pDM_Odm), ODM_BIT(BB_ATC,pDM_Odm), ATCStatus); pCfoTrack->bATCStatus = ATCStatus; } BOOLEAN odm_GetATCStatus( IN PVOID pDM_VOID ) { BOOLEAN ATCStatus; PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ATCStatus = (BOOLEAN)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_ATC,pDM_Odm), ODM_BIT(BB_ATC,pDM_Odm)); return ATCStatus; } VOID ODM_CfoTrackingReset( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PhyDM_CfoTrack); u1Byte CrystalCap; pCfoTrack->DefXCap = odm_GetDefaultCrytaltalCap(pDM_Odm); pCfoTrack->bAdjust = TRUE; #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) odm_SetCrystalCap(pDM_Odm, pCfoTrack->DefXCap); odm_SetATCStatus(pDM_Odm, TRUE); #else if(pCfoTrack->CrystalCap > pCfoTrack->DefXCap) { for(CrystalCap = pCfoTrack->CrystalCap; CrystalCap >= pCfoTrack->DefXCap; CrystalCap--) odm_SetCrystalCap(pDM_Odm, CrystalCap); } else { for(CrystalCap = pCfoTrack->CrystalCap; CrystalCap <= pCfoTrack->DefXCap; CrystalCap++) odm_SetCrystalCap(pDM_Odm, CrystalCap); } #endif } VOID ODM_CfoTrackingInit( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PhyDM_CfoTrack); pCfoTrack->DefXCap = pCfoTrack->CrystalCap = odm_GetDefaultCrytaltalCap(pDM_Odm); pCfoTrack->bATCStatus = odm_GetATCStatus(pDM_Odm); pCfoTrack->bAdjust = TRUE; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking_init()=========> \n")); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking_init(): bATCStatus = %d, CrystalCap = 0x%x \n",pCfoTrack->bATCStatus, pCfoTrack->DefXCap)); } VOID ODM_CfoTracking( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PhyDM_CfoTrack); int CFO_kHz_A, CFO_kHz_B, CFO_ave = 0; int CFO_ave_diff; int CrystalCap = (int)pCfoTrack->CrystalCap; u1Byte Adjust_Xtal = 1; //4 Support ability if(!(pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING)) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Return: SupportAbility ODM_BB_CFO_TRACKING is disabled\n")); return; } ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking()=========> \n")); if(!pDM_Odm->bLinked || !pDM_Odm->bOneEntryOnly) { //4 No link or more than one entry ODM_CfoTrackingReset(pDM_Odm); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Reset: bLinked = %d, bOneEntryOnly = %d\n", pDM_Odm->bLinked, pDM_Odm->bOneEntryOnly)); } else { //3 1. CFO Tracking //4 1.1 No new packet if(pCfoTrack->packetCount == pCfoTrack->packetCount_pre) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): packet counter doesn't change\n")); return; } pCfoTrack->packetCount_pre = pCfoTrack->packetCount; //4 1.2 Calculate CFO CFO_kHz_A = (int)(pCfoTrack->CFO_tail[0] * 3125) / 1280; CFO_kHz_B = (int)(pCfoTrack->CFO_tail[1] * 3125) / 1280; if(pDM_Odm->RFType < ODM_2T2R) CFO_ave = CFO_kHz_A; else CFO_ave = (int)(CFO_kHz_A + CFO_kHz_B) >> 1; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): CFO_kHz_A = %dkHz, CFO_kHz_B = %dkHz, CFO_ave = %dkHz\n", CFO_kHz_A, CFO_kHz_B, CFO_ave)); //4 1.3 Avoid abnormal large CFO CFO_ave_diff = (pCfoTrack->CFO_ave_pre >= CFO_ave)?(pCfoTrack->CFO_ave_pre - CFO_ave):(CFO_ave - pCfoTrack->CFO_ave_pre); if(CFO_ave_diff > 20 && pCfoTrack->largeCFOHit == 0 && !pCfoTrack->bAdjust) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): first large CFO hit\n")); pCfoTrack->largeCFOHit = 1; return; } else pCfoTrack->largeCFOHit = 0; pCfoTrack->CFO_ave_pre = CFO_ave; //4 1.4 Dynamic Xtal threshold if(pCfoTrack->bAdjust == FALSE) { if(CFO_ave > CFO_TH_XTAL_HIGH || CFO_ave < (-CFO_TH_XTAL_HIGH)) pCfoTrack->bAdjust = TRUE; } else { if(CFO_ave < CFO_TH_XTAL_LOW && CFO_ave > (-CFO_TH_XTAL_LOW)) pCfoTrack->bAdjust = FALSE; } #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) //4 1.5 BT case: Disable CFO tracking if(pDM_Odm->bBtEnabled) { pCfoTrack->bAdjust = FALSE; odm_SetCrystalCap(pDM_Odm, pCfoTrack->DefXCap); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Disable CFO tracking for BT!!\n")); } //4 1.6 Big jump if(pCfoTrack->bAdjust) { if(CFO_ave > CFO_TH_XTAL_LOW) Adjust_Xtal = Adjust_Xtal + ((CFO_ave - CFO_TH_XTAL_LOW) >> 2); else if(CFO_ave < (-CFO_TH_XTAL_LOW)) Adjust_Xtal = Adjust_Xtal + ((CFO_TH_XTAL_LOW - CFO_ave) >> 2); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Crystal cap offset = %d\n", Adjust_Xtal)); } #endif //4 1.7 Adjust Crystal Cap. if(pCfoTrack->bAdjust) { if(CFO_ave > CFO_TH_XTAL_LOW) CrystalCap = CrystalCap + Adjust_Xtal; else if(CFO_ave < (-CFO_TH_XTAL_LOW)) CrystalCap = CrystalCap - Adjust_Xtal; if(CrystalCap > 0x3f) CrystalCap = 0x3f; else if (CrystalCap < 0) CrystalCap = 0; odm_SetCrystalCap(pDM_Odm, (u1Byte)CrystalCap); } ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Crystal cap = 0x%x, Default Crystal cap = 0x%x\n", pCfoTrack->CrystalCap, pCfoTrack->DefXCap)); #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) return; //3 2. Dynamic ATC switch if(CFO_ave < CFO_TH_ATC && CFO_ave > -CFO_TH_ATC) { odm_SetATCStatus(pDM_Odm, FALSE); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Disable ATC!!\n")); } else { odm_SetATCStatus(pDM_Odm, TRUE); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Enable ATC!!\n")); } #endif } } VOID ODM_ParsingCFO( IN PVOID pDM_VOID, IN PVOID pPktinfo_VOID, IN s1Byte* pcfotail ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PODM_PACKET_INFO_T pPktinfo = (PODM_PACKET_INFO_T)pPktinfo_VOID; PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PhyDM_CfoTrack); u1Byte i; if(!(pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING)) return; #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) if(pPktinfo->bPacketMatchBSSID) #else if(pPktinfo->StationID != 0) #endif { //3 Update CFO report for path-A & path-B // Only paht-A and path-B have CFO tail and short CFO for(i = ODM_RF_PATH_A; i <= ODM_RF_PATH_B; i++) { pCfoTrack->CFO_tail[i] = (int)pcfotail[i]; } //3 Update packet counter if(pCfoTrack->packetCount == 0xffffffff) pCfoTrack->packetCount = 0; else pCfoTrack->packetCount++; } } rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_CfoTracking.h000066400000000000000000000033031261122257400230250ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __PHYDMCFOTRACK_H__ #define __PHYDMCFOTRACK_H__ #define CFO_TRACKING_VERSION "1.0" #define CFO_TH_XTAL_HIGH 20 // kHz #define CFO_TH_XTAL_LOW 10 // kHz #define CFO_TH_ATC 80 // kHz typedef struct _CFO_TRACKING_ { BOOLEAN bATCStatus; BOOLEAN largeCFOHit; BOOLEAN bAdjust; u1Byte CrystalCap; u1Byte DefXCap; int CFO_tail[2]; int CFO_ave_pre; u4Byte packetCount; u4Byte packetCount_pre; BOOLEAN bForceXtalCap; BOOLEAN bReset; }CFO_TRACKING, *PCFO_TRACKING; VOID ODM_CfoTrackingReset( IN PVOID pDM_VOID ); VOID ODM_CfoTrackingInit( IN PVOID pDM_VOID ); VOID ODM_CfoTracking( IN PVOID pDM_VOID ); VOID ODM_ParsingCFO( IN PVOID pDM_VOID, IN PVOID pPktinfo_VOID, IN s1Byte* pcfotail ); #endifrtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_DIG.c000066400000000000000000001651251261122257400212440ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // include files //============================================================ #include "Mp_Precomp.h" #include "phydm_precomp.h" VOID ODM_ChangeDynamicInitGainThresh( IN PVOID pDM_VOID, IN u4Byte DM_Type, IN u4Byte DM_Value ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; if (DM_Type == DIG_TYPE_THRESH_HIGH) { pDM_DigTable->RssiHighThresh = DM_Value; } else if (DM_Type == DIG_TYPE_THRESH_LOW) { pDM_DigTable->RssiLowThresh = DM_Value; } else if (DM_Type == DIG_TYPE_ENABLE) { pDM_DigTable->Dig_Enable_Flag = TRUE; } else if (DM_Type == DIG_TYPE_DISABLE) { pDM_DigTable->Dig_Enable_Flag = FALSE; } else if (DM_Type == DIG_TYPE_BACKOFF) { if(DM_Value > 30) DM_Value = 30; pDM_DigTable->BackoffVal = (u1Byte)DM_Value; } else if(DM_Type == DIG_TYPE_RX_GAIN_MIN) { if(DM_Value == 0) DM_Value = 0x1; pDM_DigTable->rx_gain_range_min = (u1Byte)DM_Value; } else if(DM_Type == DIG_TYPE_RX_GAIN_MAX) { if(DM_Value > 0x50) DM_Value = 0x50; pDM_DigTable->rx_gain_range_max = (u1Byte)DM_Value; } } // DM_ChangeDynamicInitGainThresh // int getIGIForDiff(int value_IGI) { #define ONERCCA_LOW_TH 0x30 #define ONERCCA_LOW_DIFF 8 if (value_IGI < ONERCCA_LOW_TH) { if ((ONERCCA_LOW_TH - value_IGI) < ONERCCA_LOW_DIFF) return ONERCCA_LOW_TH; else return value_IGI + ONERCCA_LOW_DIFF; } else { return value_IGI; } } VOID ODM_Write_DIG( IN PVOID pDM_VOID, IN u1Byte CurrentIGI ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; if(pDM_DigTable->bStopDIG) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Stop Writing IGI\n")); return; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_TRACE, ("ODM_REG(IGI_A,pDM_Odm)=0x%x, ODM_BIT(IGI,pDM_Odm)=0x%x \n", ODM_REG(IGI_A,pDM_Odm),ODM_BIT(IGI,pDM_Odm))); if(pDM_DigTable->CurIGValue != CurrentIGI) { //1 Check initial gain by upper bound if(!pDM_DigTable->bPSDInProgress) { if(CurrentIGI > pDM_DigTable->rx_gain_range_max) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_TRACE, ("CurrentIGI(0x%02x) is larger than upper bound !!\n",CurrentIGI)); CurrentIGI = pDM_DigTable->rx_gain_range_max; } } //1 Set IGI value if(pDM_Odm->SupportPlatform & (ODM_WIN|ODM_CE)) { ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); if(pDM_Odm->RFType > ODM_1T1R) ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (pDM_Odm->RFType > ODM_2T2R)) { ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_C,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_D,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); } } else if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) { switch(*(pDM_Odm->pOnePathCCA)) { case ODM_CCA_2R: ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); if(pDM_Odm->RFType > ODM_1T1R) ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (pDM_Odm->RFType > ODM_2T2R)) { ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_C,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_D,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); } break; case ODM_CCA_1R_A: ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); if(pDM_Odm->RFType != ODM_1T1R) ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI)); break; case ODM_CCA_1R_B: ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI)); if(pDM_Odm->RFType != ODM_1T1R) ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); break; } } pDM_DigTable->CurIGValue = CurrentIGI; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_TRACE, ("CurrentIGI(0x%02x). \n",CurrentIGI)); } VOID odm_PauseDIG( IN PVOID pDM_VOID, IN ODM_Pause_DIG_TYPE PauseType, IN u1Byte IGIValue ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG()=========>\n")); #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) if(*pDM_DigTable->pbP2pLinkInProgress) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): P2P in progress !!\n")); return; } #endif if(!pDM_DigTable->bPauseDIG && (!(pDM_Odm->SupportAbility & ODM_BB_DIG) || !(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n")); return; } switch(PauseType) { //1 Pause DIG case ODM_PAUSE_DIG: //2 Disable DIG ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility & (~ODM_BB_DIG)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Pause DIG !!\n")); //2 Backup IGI value if(!pDM_DigTable->bPauseDIG) { pDM_DigTable->IGIBackup = pDM_DigTable->CurIGValue; pDM_DigTable->bPauseDIG = TRUE; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Backup IGI = 0x%x\n", pDM_DigTable->IGIBackup)); //2 Write new IGI value ODM_Write_DIG(pDM_Odm, IGIValue); ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Write new IGI = 0x%x\n", IGIValue)); break; //1 Resume DIG case ODM_RESUME_DIG: if(pDM_DigTable->bPauseDIG) { //2 Write backup IGI value ODM_Write_DIG(pDM_Odm, pDM_DigTable->IGIBackup); pDM_DigTable->bPauseDIG = FALSE; pDM_DigTable->bIgnoreDIG = TRUE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Write original IGI = 0x%x\n", pDM_DigTable->IGIBackup)); //2 Enable DIG ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility | ODM_BB_DIG); ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Resume DIG !!\n")); } break; default: ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Wrong type !!\n")); break; } } BOOLEAN odm_DigAbort( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) prtl8192cd_priv priv = pDM_Odm->priv; #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PADAPTER pAdapter = pDM_Odm->Adapter; pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; #endif //SupportAbility if(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: SupportAbility ODM_BB_FA_CNT is disabled\n")); return TRUE; } //SupportAbility if(!(pDM_Odm->SupportAbility & ODM_BB_DIG)) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: SupportAbility ODM_BB_DIG is disabled\n")); return TRUE; } //ScanInProcess if(*(pDM_Odm->pbScanInProcess)) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: In Scan Progress \n")); return TRUE; } if(pDM_DigTable->bIgnoreDIG) { pDM_DigTable->bIgnoreDIG = FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: Ignore DIG \n")); return TRUE; } //add by Neil Chen to avoid PSD is processing if(pDM_Odm->bDMInitialGainEnable == FALSE) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: PSD is Processing \n")); return TRUE; } #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #if OS_WIN_FROM_WIN7(OS_VERSION) if(IsAPModeExist( pAdapter) && pAdapter->bInHctTest) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: Is AP mode or In HCT Test \n")); return TRUE; } #endif if(pDM_Odm->bBtHsOperation) { odm_DigForBtHsMode(pDM_Odm); } if(!(pDM_Odm->SupportICType &(ODM_RTL8723A|ODM_RTL8188E))) { if(pRX_HP_Table->RXHP_flag == 1) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: In RXHP Operation \n")); return TRUE; } } #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV if((pDM_Odm->bLinked) && (pDM_Odm->Adapter->registrypriv.force_igi !=0)) { printk("pDM_Odm->RSSI_Min=%d \n",pDM_Odm->RSSI_Min); ODM_Write_DIG(pDM_Odm,pDM_Odm->Adapter->registrypriv.force_igi); return TRUE; } #endif #else if (!(priv->up_time > 5)) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: Not In DIG Operation Period \n")); return TRUE; } #endif return FALSE; } VOID odm_DIGInit( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PhyDM_FalseAlmCnt); #endif pDM_DigTable->bStopDIG = FALSE; pDM_DigTable->bPauseDIG = FALSE; pDM_DigTable->bIgnoreDIG = FALSE; pDM_DigTable->bPSDInProgress = FALSE; pDM_DigTable->CurIGValue = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm)); pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; pDM_DigTable->FALowThresh = DM_FALSEALARM_THRESH_LOW; pDM_DigTable->FAHighThresh = DM_FALSEALARM_THRESH_HIGH; pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; pDM_DigTable->PreCCK_CCAThres = 0xFF; pDM_DigTable->CurCCK_CCAThres = 0x83; pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC; pDM_DigTable->LargeFAHit = 0; pDM_DigTable->Recover_cnt = 0; pDM_DigTable->bMediaConnect_0 = FALSE; pDM_DigTable->bMediaConnect_1 = FALSE; //To Initialize pDM_Odm->bDMInitialGainEnable == FALSE to avoid DIG error pDM_Odm->bDMInitialGainEnable = TRUE; #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) pDM_DigTable->DIG_Dynamic_MIN_0 = 0x25; pDM_DigTable->DIG_Dynamic_MIN_1 = 0x25; // For AP\ ADSL modified DIG pDM_DigTable->bTpTarget = FALSE; pDM_DigTable->bNoiseEst = TRUE; pDM_DigTable->IGIOffset_A = 0; pDM_DigTable->IGIOffset_B = 0; pDM_DigTable->TpTrainTH_min = 0; // For RTL8881A FalseAlmCnt->Cnt_Ofdm_fail_pre = 0; //Dyanmic EDCCA if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { ODM_SetBBReg(pDM_Odm, 0xC50, 0xFFFF0000, 0xfafd); } #else pDM_DigTable->DIG_Dynamic_MIN_0 = DM_DIG_MIN_NIC; pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC; //To Initi BT30 IGI pDM_DigTable->BT30_CurIGI=0x32; #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) *pDM_DigTable->pbP2pLinkInProgress= FALSE; #endif #endif if(pDM_Odm->BoardType & (ODM_BOARD_EXT_PA|ODM_BOARD_EXT_LNA)) { pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; } else { pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; } } VOID odm_DIG( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) PADAPTER pAdapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) prtl8192cd_priv priv = pDM_Odm->priv; PSTA_INFO_T pEntry; #endif // Common parameters pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PhyDM_FalseAlmCnt); BOOLEAN FirstConnect,FirstDisConnect; u1Byte DIG_MaxOfMin, DIG_Dynamic_MIN; u1Byte dm_dig_max, dm_dig_min; u1Byte CurrentIGI = pDM_DigTable->CurIGValue; u1Byte offset; u4Byte dm_FA_thres[3]; u1Byte Adap_IGI_Upper = 0; u4Byte TxTp = 0, RxTp = 0; BOOLEAN bDFSBand = FALSE; BOOLEAN bPerformance = TRUE, bFirstTpTarget = FALSE, bFirstCoverage = FALSE; #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) u4Byte TpTrainTH_MIN = DM_DIG_TP_Target_TH0; static u1Byte TimeCnt = 0; u1Byte i; #endif if(odm_DigAbort(pDM_Odm) == TRUE) return; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()===========================>\n\n")); if(pDM_Odm->adaptivity_flag == TRUE) Adap_IGI_Upper = pDM_Odm->Adaptivity_IGI_upper; //1 Update status if(pDM_Odm->SupportICType == ODM_RTL8192D) { if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) { if(*(pDM_Odm->pbMasterOfDMSP)) { DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); } else { DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); } } else { if(*(pDM_Odm->pBandType) == ODM_BAND_5G) { DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); } else { DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); } } } else { DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); } #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) //1 Noise Floor Estimate //pDM_DigTable->bNoiseEst = (FirstConnect)?TRUE:pDM_DigTable->bNoiseEst; //odm_InbandNoiseCalculate (pDM_Odm); //1 Mode decision if(pDM_Odm->bLinked) { //2 Calculate total TP for (i=0; ipODM_StaInfo[i]; if(IS_STA_VALID(pEntry)) { RxTp += (u4Byte)(pEntry->rx_byte_cnt_LowMAW>>7); TxTp += (u4Byte)(pEntry->tx_byte_cnt_LowMAW>>7); //Kbps } } ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TX TP = %dkbps, RX TP = %dkbps\n", TxTp, RxTp)); } switch(pDM_Odm->priv->pshare->rf_ft_var.dig_cov_enable) { case 0: { bPerformance = TRUE; break; } case 1: { bPerformance = FALSE; break; } case 2: { if(pDM_Odm->bLinked) { if(pDM_DigTable->TpTrainTH_min > DM_DIG_TP_Target_TH0) TpTrainTH_MIN = pDM_DigTable->TpTrainTH_min; if(pDM_DigTable->TpTrainTH_min > DM_DIG_TP_Target_TH1) TpTrainTH_MIN = DM_DIG_TP_Target_TH1; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TP training mode lower bound = %dkbps\n", TpTrainTH_MIN)); //2 Decide DIG mode by total TP if((TxTp + RxTp) > DM_DIG_TP_Target_TH1) // change to performance mode { bFirstTpTarget = (!pDM_DigTable->bTpTarget)?TRUE:FALSE; pDM_DigTable->bTpTarget = TRUE; bPerformance = TRUE; } else if((TxTp + RxTp) < TpTrainTH_MIN) // change to coverage mode { bFirstCoverage = (pDM_DigTable->bTpTarget)?TRUE:FALSE; if(TimeCnt < DM_DIG_TP_Training_Period) { pDM_DigTable->bTpTarget = FALSE; bPerformance = FALSE; TimeCnt++; } else { pDM_DigTable->bTpTarget = TRUE; bPerformance = TRUE; bFirstTpTarget = TRUE; TimeCnt = 0; } } else // remain previous mode { bPerformance = pDM_DigTable->bTpTarget; if(!bPerformance) { if(TimeCnt < DM_DIG_TP_Training_Period) TimeCnt++; else { pDM_DigTable->bTpTarget = TRUE; bPerformance = TRUE; bFirstTpTarget = TRUE; TimeCnt = 0; } } } if(!bPerformance) pDM_DigTable->TpTrainTH_min = RxTp + TxTp; } else { bPerformance = FALSE; pDM_DigTable->TpTrainTH_min = 0; } break; } default: bPerformance = TRUE; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("====== DIG mode = %d ======\n", pDM_Odm->priv->pshare->rf_ft_var.dig_cov_enable)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("====== bPerformance = %d ======\n", bPerformance)); #endif //1 Boundary Decision if((pDM_Odm->SupportICType & ODM_RTL8192C) && (pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))) { //2 High power case if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) { dm_dig_max = DM_DIG_MAX_AP_HP; dm_dig_min = DM_DIG_MIN_AP_HP; } else { dm_dig_max = DM_DIG_MAX_NIC_HP; dm_dig_min = DM_DIG_MIN_NIC_HP; } DIG_MaxOfMin = DM_DIG_MAX_AP_HP; } else { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) //2 For AP\ADSL if(!bPerformance) { dm_dig_max = DM_DIG_MAX_AP_COVERAGR; dm_dig_min = DM_DIG_MIN_AP_COVERAGE; DIG_MaxOfMin = DM_DIG_MAX_OF_MIN_COVERAGE; } else { dm_dig_max = DM_DIG_MAX_AP; dm_dig_min = DM_DIG_MIN_AP; DIG_MaxOfMin = DM_DIG_MAX_OF_MIN; } //4 DFS band if (((*pDM_Odm->pChannel>= 52) &&(*pDM_Odm->pChannel <= 64)) || ((*pDM_Odm->pChannel >= 100) && (*pDM_Odm->pChannel <= 140))) { bDFSBand = TRUE; dm_dig_min = DM_DIG_MIN_AP_DFS; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): ====== In DFS band ======\n")); } //4 TX2path if (priv->pmib->dot11RFEntry.tx2path && !bDFSBand && (*(pDM_Odm->pWirelessMode) == ODM_WM_B)) dm_dig_max = 0x2A; #if RTL8192E_SUPPORT #ifdef HIGH_POWER_EXT_LNA if ((pDM_Odm->SupportICType & (ODM_RTL8192E)) && (pDM_Odm->ExtLNA)) dm_dig_max = 0x42; #endif #endif #else //2 For WIN\CE if(pDM_Odm->SupportICType >= ODM_RTL8188E) dm_dig_max = 0x5A; else dm_dig_max = DM_DIG_MAX_NIC; if(pDM_Odm->SupportICType != ODM_RTL8821) dm_dig_min = DM_DIG_MIN_NIC; else dm_dig_min = 0x1C; DIG_MaxOfMin = DM_DIG_MAX_AP; #endif } ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Absolutly upper bound = 0x%x, lower bound = 0x%x\n",dm_dig_max, dm_dig_min)); #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) // for P2P case if(0 < *pDM_Odm->pu1ForcedIgiLb) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): P2P case: Force IGI lb to: %u !!!!!!\n", *pDM_Odm->pu1ForcedIgiLb)); dm_dig_min = *pDM_Odm->pu1ForcedIgiLb; dm_dig_max = (dm_dig_min <= dm_dig_max) ? (dm_dig_max) : (dm_dig_min + 1); } #endif //1 Adjust boundary by RSSI if(pDM_Odm->bLinked && bPerformance) { //2 Modify DIG upper bound #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) offset = 15; #else //4 Modify DIG upper bound for 92E, 8723A\B, 8821 & 8812 BT if((pDM_Odm->SupportICType & (ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8812|ODM_RTL8821|ODM_RTL8723A)) && (pDM_Odm->bBtLimitedDig==1)) { offset = 10; ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Coex. case: Force upper bound to RSSI + %d !!!!!!\n", offset)); } else offset = 15; #endif if((pDM_Odm->RSSI_Min + offset) > dm_dig_max ) pDM_DigTable->rx_gain_range_max = dm_dig_max; else if((pDM_Odm->RSSI_Min + offset) < dm_dig_min ) pDM_DigTable->rx_gain_range_max = dm_dig_min; else pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + offset; #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) //2 Modify DIG lower bound //if(pDM_Odm->bOneEntryOnly) { if(pDM_Odm->RSSI_Min < dm_dig_min) DIG_Dynamic_MIN = dm_dig_min; else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) DIG_Dynamic_MIN = DIG_MaxOfMin; else DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; } #else { //4 For AP #ifdef __ECOS HAL_REORDER_BARRIER(); #else rmb(); #endif if (bDFSBand) { DIG_Dynamic_MIN = dm_dig_min; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: Force lower bound to 0x%x after link !!!!!!\n", dm_dig_min)); } else { if(pDM_Odm->RSSI_Min < dm_dig_min) DIG_Dynamic_MIN = dm_dig_min; else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) DIG_Dynamic_MIN = DIG_MaxOfMin; else DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; } } #endif } else { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) if(bPerformance && bDFSBand) { pDM_DigTable->rx_gain_range_max = 0x28; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: Force upper bound to 0x%x before link !!!!!!\n", pDM_DigTable->rx_gain_range_max)); } else #endif { pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_OF_MIN; } DIG_Dynamic_MIN = dm_dig_min; } //1 Force Lower Bound for AntDiv if(pDM_Odm->bLinked && !pDM_Odm->bOneEntryOnly) { if((pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT) && (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) { if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV || pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV ||pDM_Odm->AntDivType == S0S1_SW_ANTDIV) { if(pDM_DigTable->AntDiv_RSSI_max > DIG_MaxOfMin) DIG_Dynamic_MIN = DIG_MaxOfMin; else DIG_Dynamic_MIN = (u1Byte) pDM_DigTable->AntDiv_RSSI_max; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_DIG(): Antenna diversity case: Force lower bound to 0x%x !!!!!!\n", DIG_Dynamic_MIN)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_DIG(): Antenna diversity case: RSSI_max = 0x%x !!!!!!\n", pDM_DigTable->AntDiv_RSSI_max)); } } } ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust boundary by RSSI Upper bound = 0x%x, Lower bound = 0x%x\n", pDM_DigTable->rx_gain_range_max, DIG_Dynamic_MIN)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Link status: bLinked = %d, RSSI = %d, bFirstConnect = %d, bFirsrDisConnect = %d\n\n", pDM_Odm->bLinked, pDM_Odm->RSSI_Min, FirstConnect, FirstDisConnect)); //1 Modify DIG lower bound, deal with abnormal case //2 Abnormal false alarm case #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) if(bDFSBand) { pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; } else #endif { if(!pDM_Odm->bLinked) { pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; if(FirstDisConnect) pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; } else pDM_DigTable->rx_gain_range_min = odm_ForbiddenIGICheck(pDM_Odm, DIG_Dynamic_MIN, CurrentIGI); } //2 Abnormal # beacon case #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) if(pDM_Odm->bLinked && !FirstConnect) { if((pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 5) && (pDM_Odm->bsta_state)) { pDM_DigTable->rx_gain_range_min = dm_dig_min; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnrormal #beacon (%d) case in STA mode: Force lower bound to 0x%x !!!!!!\n\n", pDM_Odm->PhyDbgInfo.NumQryBeaconPkt, pDM_DigTable->rx_gain_range_min)); } } #endif //2 Abnormal lower bound case if(pDM_DigTable->rx_gain_range_min > pDM_DigTable->rx_gain_range_max) { pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnrormal lower bound case: Force lower bound to 0x%x !!!!!!\n\n",pDM_DigTable->rx_gain_range_min)); } //1 False alarm threshold decision odm_FAThresholdCheck(pDM_Odm, bDFSBand, bPerformance, RxTp, TxTp, dm_FA_thres); ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): False alarm threshold = %d, %d, %d \n\n", dm_FA_thres[0], dm_FA_thres[1], dm_FA_thres[2])); //1 Adjust initial gain by false alarm if(pDM_Odm->bLinked && bPerformance) { //2 After link ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust IGI after link\n")); if(bFirstTpTarget || (FirstConnect && bPerformance)) { pDM_DigTable->LargeFAHit = 0; #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) if(bDFSBand) { if(pDM_Odm->RSSI_Min > 0x28) CurrentIGI = 0x28; else CurrentIGI = pDM_Odm->RSSI_Min; ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: One-shot to 0x28 upmost!!!!!!\n")); } else #endif { if(pDM_Odm->RSSI_Min < DIG_MaxOfMin) { if(CurrentIGI < pDM_Odm->RSSI_Min) CurrentIGI = pDM_Odm->RSSI_Min; } else { if(CurrentIGI < DIG_MaxOfMin) CurrentIGI = DIG_MaxOfMin; } #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) if(pDM_Odm->SupportICType == ODM_RTL8812) ODM_ConfigBBWithHeaderFile(pDM_Odm, CONFIG_BB_AGC_TAB_DIFF); #endif } ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First connect case: IGI does on-shot to 0x%x\n", CurrentIGI)); } else { if(pFalseAlmCnt->Cnt_all > dm_FA_thres[2]) CurrentIGI = CurrentIGI + 4; else if (pFalseAlmCnt->Cnt_all > dm_FA_thres[1]) CurrentIGI = CurrentIGI + 2; else if(pFalseAlmCnt->Cnt_all < dm_FA_thres[0]) CurrentIGI = CurrentIGI - 2; //4 Abnormal # beacon case #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) if((pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 5) && (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH1) && (pDM_Odm->bsta_state)) { CurrentIGI = pDM_DigTable->rx_gain_range_min; ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormal #beacon (%d) case: IGI does one-shot to 0x%x\n", pDM_Odm->PhyDbgInfo.NumQryBeaconPkt, CurrentIGI)); } #endif } } else { //2 Before link ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust IGI before link\n")); if(FirstDisConnect || bFirstCoverage) { CurrentIGI = dm_dig_min; ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First disconnect case: IGI does on-shot to lower bound\n")); } else { if(pFalseAlmCnt->Cnt_all > dm_FA_thres[2]) CurrentIGI = CurrentIGI + 4; else if (pFalseAlmCnt->Cnt_all > dm_FA_thres[1]) CurrentIGI = CurrentIGI + 2; else if(pFalseAlmCnt->Cnt_all < dm_FA_thres[0]) CurrentIGI = CurrentIGI - 2; } } //1 Check initial gain by upper/lower bound if(CurrentIGI < pDM_DigTable->rx_gain_range_min) CurrentIGI = pDM_DigTable->rx_gain_range_min; if(CurrentIGI > pDM_DigTable->rx_gain_range_max) CurrentIGI = pDM_DigTable->rx_gain_range_max; ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x, TotalFA = %d\n\n", CurrentIGI, pFalseAlmCnt->Cnt_all)); //1 Force upper bound and lower bound for adaptivity if(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY && pDM_Odm->adaptivity_flag == TRUE) { if(CurrentIGI > Adap_IGI_Upper) CurrentIGI = Adap_IGI_Upper; if(pDM_Odm->IGI_LowerBound != 0) { if(CurrentIGI < pDM_Odm->IGI_LowerBound) CurrentIGI = pDM_Odm->IGI_LowerBound; } ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adaptivity case: Force upper bound to 0x%x !!!!!!\n", Adap_IGI_Upper)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adaptivity case: Force lower bound to 0x%x !!!!!!\n\n", pDM_Odm->IGI_LowerBound)); } //1 High power RSSI threshold #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) if((pDM_Odm->SupportICType == ODM_RTL8723A)&& (pHalData->UndecoratedSmoothedPWDB > DM_DIG_HIGH_PWR_THRESHOLD)) { // High power IGI lower bound ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): UndecoratedSmoothedPWDB(%#x)\n", pHalData->UndecoratedSmoothedPWDB)); if(CurrentIGI < DM_DIG_HIGH_PWR_IGI_LOWER_BOUND) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue(%#x)\n", pDM_DigTable->CurIGValue)); //pDM_DigTable->CurIGValue = DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; CurrentIGI=DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; } } if((pDM_Odm->SupportICType & ODM_RTL8723A) && IS_WIRELESS_MODE_G(pAdapter)) { if(pHalData->UndecoratedSmoothedPWDB > 0x28) { if(CurrentIGI < DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND) { //pDM_DigTable->CurIGValue = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; CurrentIGI = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; } } } #endif //1 Update status #if (RTL8192D_SUPPORT==1) if(pDM_Odm->SupportICType == ODM_RTL8192D) { //sherry delete DualMacSmartConncurrent 20110517 if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) { ODM_Write_DIG_DMSP(pDM_Odm, CurrentIGI);//ODM_Write_DIG_DMSP(pDM_Odm, pDM_DigTable->CurIGValue); if(*(pDM_Odm->pbMasterOfDMSP)) { pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; } else { pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; } } else { ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); if(*(pDM_Odm->pBandType) == ODM_BAND_5G) { pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; } else { pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; } } } else #endif { #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) if(pDM_Odm->bBtHsOperation) { if(pDM_Odm->bLinked) { if(pDM_DigTable->BT30_CurIGI > (CurrentIGI)) ODM_Write_DIG(pDM_Odm, CurrentIGI); else ODM_Write_DIG(pDM_Odm, pDM_DigTable->BT30_CurIGI); pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; } else { if(pDM_Odm->bLinkInProcess) ODM_Write_DIG(pDM_Odm, 0x1c); else if(pDM_Odm->bBtConnectProcess) ODM_Write_DIG(pDM_Odm, 0x28); else ODM_Write_DIG(pDM_Odm, pDM_DigTable->BT30_CurIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); } } else // BT is not using #endif { ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; } } } VOID odm_DIGbyRSSI_LPS( IN PVOID pDM_VOID ) { #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PhyDM_FalseAlmCnt); #if (DM_ODM_SUPPORT_TYPE & ODM_CE) #if 0 //and 2.3.5 coding rule struct mlme_priv *pmlmepriv = &(pAdapter->mlmepriv); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; #endif #endif u1Byte RSSI_Lower=DM_DIG_MIN_NIC; //0x1E or 0x1C u1Byte CurrentIGI=pDM_Odm->RSSI_Min; CurrentIGI=CurrentIGI+RSSI_OFFSET_DIG; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS()==>\n")); // Using FW PS mode to make IGI //Adjust by FA in LPS MODE if(pFalseAlmCnt->Cnt_all> DM_DIG_FA_TH2_LPS) CurrentIGI = CurrentIGI+4; else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1_LPS) CurrentIGI = CurrentIGI+2; else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_LPS) CurrentIGI = CurrentIGI-2; //Lower bound checking //RSSI Lower bound check if((pDM_Odm->RSSI_Min-10) > DM_DIG_MIN_NIC) RSSI_Lower =(pDM_Odm->RSSI_Min-10); else RSSI_Lower =DM_DIG_MIN_NIC; //Upper and Lower Bound checking if(CurrentIGI > DM_DIG_MAX_NIC) CurrentIGI=DM_DIG_MAX_NIC; else if(CurrentIGI < RSSI_Lower) CurrentIGI =RSSI_Lower; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS(): pFalseAlmCnt->Cnt_all = %d\n",pFalseAlmCnt->Cnt_all)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS(): pDM_Odm->RSSI_Min = %d\n",pDM_Odm->RSSI_Min)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS(): CurrentIGI = 0x%x\n",CurrentIGI)); ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); #endif } VOID odm_DigForBtHsMode( IN PVOID pDM_VOID ) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pDIG_T pDM_DigTable=&pDM_Odm->DM_DigTable; u1Byte digForBtHs=0; u1Byte digUpBound=0x5a; if(pDM_Odm->bBtConnectProcess) { if(pDM_Odm->SupportICType&(ODM_RTL8723A)) digForBtHs = 0x28; else digForBtHs = 0x22; } else { // // Decide DIG value by BT HS RSSI. // digForBtHs = pDM_Odm->btHsRssi+4; //DIG Bound if(pDM_Odm->SupportICType&(ODM_RTL8723A)) digUpBound = 0x3e; if(digForBtHs > digUpBound) digForBtHs = digUpBound; if(digForBtHs < 0x1c) digForBtHs = 0x1c; // update Current IGI pDM_DigTable->BT30_CurIGI = digForBtHs; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DigForBtHsMode() : set DigValue=0x%x\n", digForBtHs)); #endif } //3============================================================ //3 FASLE ALARM CHECK //3============================================================ VOID odm_FalseAlarmCounterStatistics( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PhyDM_FalseAlmCnt); u4Byte ret_value; #if (DM_ODM_SUPPORT_TYPE == ODM_AP) //Mark there, and check this in odm_DMWatchDog #if 0 //(DM_ODM_SUPPORT_TYPE == ODM_AP) prtl8192cd_priv priv = pDM_Odm->priv; if( (priv->auto_channel != 0) && (priv->auto_channel != 2) ) return; #endif #endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) if((pDM_Odm->SupportICType == ODM_RTL8192D) && (*(pDM_Odm->pMacPhyMode)==ODM_DMSP)&& ////modify by Guo.Mingzhi 2011-12-29 (!(*(pDM_Odm->pbMasterOfDMSP)))) { odm_FalseAlarmCounterStatistics_ForSlaveOfDMSP(pDM_Odm); return; } #endif if(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) return; if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { //hold ofdm counter ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1); //hold page C counter ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1); //hold page D counter ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff); FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; #if (RTL8188E_SUPPORT==1) if(pDM_Odm->SupportICType == ODM_RTL8188E) { ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_SC_CNT_11N, bMaskDWord); FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff); FalseAlmCnt->Cnt_BW_USC = ((ret_value&0xffff0000)>>16); } #endif #if (RTL8192D_SUPPORT==1) if(pDM_Odm->SupportICType == ODM_RTL8192D) { odm_GetCCKFalseAlarm_92D(pDM_Odm); } else #endif { //hold cck counter ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT12, 1); ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT14, 1); ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); FalseAlmCnt->Cnt_Cck_fail = ret_value; ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); FalseAlmCnt->Cnt_Cck_fail += (ret_value& 0xff)<<8; ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) |((ret_value&0xFF00)>>8); } FalseAlmCnt->Cnt_all = ( FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail + FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + FalseAlmCnt->Cnt_Cck_fail); FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; #if (RTL8192C_SUPPORT==1) if(pDM_Odm->SupportICType == ODM_RTL8192C) odm_ResetFACounter_92C(pDM_Odm); #endif #if (RTL8192D_SUPPORT==1) if(pDM_Odm->SupportICType == ODM_RTL8192D) odm_ResetFACounter_92D(pDM_Odm); #endif if(pDM_Odm->SupportICType >=ODM_RTL8723A) { //reset false alarm counter registers ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 1); ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 0); ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 1); ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 0); //update ofdm counter ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 0); //update page C counter ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 0); //update page D counter //reset CCK CCA counter ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 0); ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 2); //reset CCK FA counter ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 0); ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 2); } ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Enter odm_FalseAlarmCounterStatistics\n")); ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Fast_Fsync=%d, Cnt_SB_Search_fail=%d\n", FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Parity_Fail=%d, Cnt_Rate_Illegal=%d\n", FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Crc8_fail=%d, Cnt_Mcs_fail=%d\n", FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail)); } else if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { u4Byte CCKenable; u4Byte Cnt_Ofdm_fail_temp = 0; //read OFDM FA counter FalseAlmCnt->Cnt_Ofdm_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_11AC, bMaskLWord); FalseAlmCnt->Cnt_Cck_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_11AC, bMaskLWord); //read CCK/OFDM CCA counter ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11AC, bMaskDWord); FalseAlmCnt->Cnt_OFDM_CCA = (ret_value & 0xffff0000) >> 16; FalseAlmCnt->Cnt_CCK_CCA = ret_value & 0xffff; // For 8881A if(pDM_Odm->SupportICType == ODM_RTL8881A) { if(FalseAlmCnt->Cnt_Ofdm_fail >= FalseAlmCnt->Cnt_Ofdm_fail_pre) { Cnt_Ofdm_fail_temp = FalseAlmCnt->Cnt_Ofdm_fail_pre; FalseAlmCnt->Cnt_Ofdm_fail_pre = FalseAlmCnt->Cnt_Ofdm_fail; FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Ofdm_fail - Cnt_Ofdm_fail_temp; } else FalseAlmCnt->Cnt_Ofdm_fail_pre = FalseAlmCnt->Cnt_Ofdm_fail; ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail_pre)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail_pre=%d\n", Cnt_Ofdm_fail_temp)); // Reset FA counter by enable/disable OFDM if(FalseAlmCnt->Cnt_Ofdm_fail_pre >= 0x7fff) { // reset OFDM ODM_SetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT29,0); ODM_SetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT29,1); FalseAlmCnt->Cnt_Ofdm_fail_pre = 0; ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Reset false alarm counter\n")); } } // reset OFDM FA coutner ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 1); ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 0); // reset CCK FA counter ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 0); ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 1); // reset CCA counter ODM_SetBBReg(pDM_Odm, ODM_REG_RST_RPT_11AC, BIT0, 1); ODM_SetBBReg(pDM_Odm, ODM_REG_RST_RPT_11AC, BIT0, 0); CCKenable = ODM_GetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT28); if(CCKenable)//if(*pDM_Odm->pBandType == ODM_BAND_2_4G) { FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail + FalseAlmCnt->Cnt_Cck_fail; FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_CCK_CCA + FalseAlmCnt->Cnt_OFDM_CCA; } else { FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail; FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA; } } ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_OFDM_CCA=%d\n", FalseAlmCnt->Cnt_OFDM_CCA)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_CCK_CCA=%d\n", FalseAlmCnt->Cnt_CCK_CCA)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_CCA_all=%d\n", FalseAlmCnt->Cnt_CCA_all)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Cck_fail=%d\n", FalseAlmCnt->Cnt_Cck_fail)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Total False Alarm=%d\n", FalseAlmCnt->Cnt_all)); } VOID odm_FAThresholdCheck( IN PVOID pDM_VOID, IN BOOLEAN bDFSBand, IN BOOLEAN bPerformance, IN u4Byte RxTp, IN u4Byte TxTp, OUT u4Byte* dm_FA_thres ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; if(pDM_Odm->bLinked && (bPerformance||bDFSBand)) { if(pDM_Odm->SupportICType == ODM_RTL8192D) { // 8192D special case dm_FA_thres[0] = DM_DIG_FA_TH0_92D; dm_FA_thres[1] = DM_DIG_FA_TH1_92D; dm_FA_thres[2] = DM_DIG_FA_TH2_92D; } #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) else if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) { // For AP if((RxTp>>2) > TxTp && RxTp < 10000 && RxTp > 500) // 10Mbps & 0.5Mbps { dm_FA_thres[0] = 0x080; dm_FA_thres[1] = 0x100; dm_FA_thres[2] = 0x200; } else { dm_FA_thres[0] = 0x100; dm_FA_thres[1] = 0x200; dm_FA_thres[2] = 0x300; } } #else else if(pDM_Odm->SupportICType == ODM_RTL8723A && pDM_Odm->bBtLimitedDig) { // 8723A BT special case dm_FA_thres[0] = DM_DIG_FA_TH0; dm_FA_thres[1] = 0x250; dm_FA_thres[2] = 0x300; } #endif else { // For NIC dm_FA_thres[0] = DM_DIG_FA_TH0; dm_FA_thres[1] = DM_DIG_FA_TH1; dm_FA_thres[2] = DM_DIG_FA_TH2; } } else { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) if(bDFSBand) { // For DFS band and no link dm_FA_thres[0] = 250; dm_FA_thres[1] = 1000; dm_FA_thres[2] = 2000; } else #endif { dm_FA_thres[0] = 2000; dm_FA_thres[1] = 4000; dm_FA_thres[2] = 5000; } } return; } u1Byte odm_ForbiddenIGICheck( IN PVOID pDM_VOID, IN u1Byte DIG_Dynamic_MIN, IN u1Byte CurrentIGI ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PhyDM_FalseAlmCnt); u1Byte rx_gain_range_min = pDM_DigTable->rx_gain_range_min; if(pFalseAlmCnt->Cnt_all > 10000) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormally false alarm case. \n")); if(pDM_DigTable->LargeFAHit != 3) pDM_DigTable->LargeFAHit++; if(pDM_DigTable->ForbiddenIGI < CurrentIGI)//if(pDM_DigTable->ForbiddenIGI < pDM_DigTable->CurIGValue) { pDM_DigTable->ForbiddenIGI = CurrentIGI;//pDM_DigTable->ForbiddenIGI = pDM_DigTable->CurIGValue; pDM_DigTable->LargeFAHit = 1; } if(pDM_DigTable->LargeFAHit >= 3) { if((pDM_DigTable->ForbiddenIGI + 2) > pDM_DigTable->rx_gain_range_max) rx_gain_range_min = pDM_DigTable->rx_gain_range_max; else rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 2); pDM_DigTable->Recover_cnt = 1800; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormally false alarm case: Recover_cnt = %d \n", pDM_DigTable->Recover_cnt)); } } else { if(pDM_DigTable->Recover_cnt != 0) { pDM_DigTable->Recover_cnt --; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Recover_cnt = %d \n", pDM_DigTable->Recover_cnt)); } else { if(pDM_DigTable->LargeFAHit < 3) { if((pDM_DigTable->ForbiddenIGI - 2) < DIG_Dynamic_MIN) //DM_DIG_MIN) { pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; //DM_DIG_MIN; rx_gain_range_min = DIG_Dynamic_MIN; //DM_DIG_MIN; ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: At Lower Bound\n")); } else { pDM_DigTable->ForbiddenIGI -= 2; rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 2); ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Approach Lower Bound\n")); } } else { pDM_DigTable->LargeFAHit = 0; } } } return rx_gain_range_min; } VOID odm_InbandNoiseCalculate ( IN PVOID pDM_VOID ) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; u1Byte IGIBackup, TimeCnt = 0, ValidCnt = 0; BOOLEAN bTimeout = TRUE; s1Byte sNoise_A, sNoise_B; s4Byte NoiseRpt_A = 0,NoiseRpt_B = 0; u4Byte tmp = 0; static u1Byte failCnt = 0; if(!(pDM_Odm->SupportICType & (ODM_RTL8192E))) return; if(pDM_Odm->RFType == ODM_1T1R || *(pDM_Odm->pOnePathCCA) != ODM_CCA_2R) return; if(!pDM_DigTable->bNoiseEst) return; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_InbandNoiseEstimate()========>\n")); //1 Set initial gain. IGIBackup = pDM_DigTable->CurIGValue; pDM_DigTable->IGIOffset_A = 0; pDM_DigTable->IGIOffset_B = 0; ODM_Write_DIG(pDM_Odm, 0x24); //1 Update idle time power report if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N, BIT25, 0x0); delay_ms(2); //1 Get noise power level while(1) { //2 Read Noise Floor Report if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) tmp = ODM_GetBBReg(pDM_Odm, 0x8f8, bMaskLWord); sNoise_A = (s1Byte)(tmp & 0xff); sNoise_B = (s1Byte)((tmp & 0xff00)>>8); //ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("sNoise_A = %d, sNoise_B = %d\n",sNoise_A, sNoise_B)); if((sNoise_A < 20 && sNoise_A >= -70) && (sNoise_B < 20 && sNoise_B >= -70)) { ValidCnt++; NoiseRpt_A += sNoise_A; NoiseRpt_B += sNoise_B; //ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("sNoise_A = %d, sNoise_B = %d\n",sNoise_A, sNoise_B)); } TimeCnt++; bTimeout = (TimeCnt >= 150)?TRUE:FALSE; if(ValidCnt == 20 || bTimeout) break; delay_ms(2); } //1 Keep idle time power report if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N, BIT25, 0x1); //1 Recover IGI ODM_Write_DIG(pDM_Odm, IGIBackup); //1 Calculate Noise Floor if(ValidCnt != 0) { NoiseRpt_A /= (ValidCnt<<1); NoiseRpt_B /= (ValidCnt<<1); } if(bTimeout) { NoiseRpt_A = 0; NoiseRpt_B = 0; failCnt ++; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Noise estimate fail time = %d\n", failCnt)); if(failCnt == 3) { failCnt = 0; pDM_DigTable->bNoiseEst = FALSE; } } else { NoiseRpt_A = -110 + 0x24 + NoiseRpt_A -6; NoiseRpt_B = -110 + 0x24 + NoiseRpt_B -6; pDM_DigTable->bNoiseEst = FALSE; failCnt = 0; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("NoiseRpt_A = %d, NoiseRpt_B = %d\n", NoiseRpt_A, NoiseRpt_B)); } //1 Calculate IGI Offset if(NoiseRpt_A > NoiseRpt_B) { pDM_DigTable->IGIOffset_A = NoiseRpt_A - NoiseRpt_B; pDM_DigTable->IGIOffset_B = 0; } else { pDM_DigTable->IGIOffset_A = 0; pDM_DigTable->IGIOffset_B = NoiseRpt_B - NoiseRpt_A; } #endif return; } //3============================================================ //3 CCK Packet Detect Threshold //3============================================================ VOID odm_PauseCCKPacketDetection( IN PVOID pDM_VOID, IN ODM_Pause_CCKPD_TYPE PauseType, IN u1Byte CCKPDThreshold ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; static BOOLEAN bPaused = FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection()=========>\n")); #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) if(*pDM_DigTable->pbP2pLinkInProgress) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("P2P in progress !!\n")); return; } #endif if(!bPaused && (!(pDM_Odm->SupportAbility & ODM_BB_CCK_PD) || !(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("Return: SupportAbility ODM_BB_CCK_PD or ODM_BB_FA_CNT is disabled\n")); return; } switch(PauseType) { //1 Pause CCK Packet Detection Threshold case ODM_PAUSE_CCKPD: //2 Disable DIG ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility & (~ODM_BB_CCK_PD)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("Pause CCK packet detection threshold !!\n")); //2 Backup CCK Packet Detection Threshold value if(!bPaused) { pDM_DigTable->CCKPDBackup = pDM_DigTable->CurCCK_CCAThres; bPaused = TRUE; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("Backup CCK packet detection tgreshold = %d\n", pDM_DigTable->CCKPDBackup)); //2 Write new CCK Packet Detection Threshold value ODM_Write_CCK_CCA_Thres(pDM_Odm, CCKPDThreshold); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("Write new CCK packet detection tgreshold = %d\n", CCKPDThreshold)); break; //1 Resume CCK Packet Detection Threshold case ODM_RESUME_CCKPD: if(bPaused) { //2 Write backup CCK Packet Detection Threshold value ODM_Write_CCK_CCA_Thres(pDM_Odm, pDM_DigTable->CCKPDBackup); bPaused = FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("Write original CCK packet detection tgreshold = %d\n", pDM_DigTable->CCKPDBackup)); //2 Enable CCK Packet Detection Threshold ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility | ODM_BB_CCK_PD); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("Resume CCK packet detection threshold !!\n")); } break; default: ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("Wrong type !!\n")); break; } return; } VOID odm_CCKPacketDetectionThresh( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PhyDM_FalseAlmCnt); u1Byte CurCCK_CCAThres; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) //modify by Guo.Mingzhi 2011-12-29 if (pDM_Odm->bDualMacSmartConcurrent == TRUE) // if (pDM_Odm->bDualMacSmartConcurrent == FALSE) return; if(pDM_Odm->bBtHsOperation) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() write 0xcd for BT HS mode!!\n")); ODM_Write_CCK_CCA_Thres(pDM_Odm, 0xcd); return; } #endif if((!(pDM_Odm->SupportAbility & ODM_BB_CCK_PD)) ||(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() return==========\n")); return; } #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) if(pDM_Odm->ExtLNA) return; #endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() ==========>\n")); if(pDM_Odm->bLinked) { if(pDM_Odm->RSSI_Min > 25) CurCCK_CCAThres = 0xcd; else if((pDM_Odm->RSSI_Min <= 25) && (pDM_Odm->RSSI_Min > 10)) CurCCK_CCAThres = 0x83; else { if(FalseAlmCnt->Cnt_Cck_fail > 1000) CurCCK_CCAThres = 0x83; else CurCCK_CCAThres = 0x40; } } else { if(FalseAlmCnt->Cnt_Cck_fail > 1000) CurCCK_CCAThres = 0x83; else CurCCK_CCAThres = 0x40; } #if (RTL8192D_SUPPORT==1) if((pDM_Odm->SupportICType == ODM_RTL8192D) && (*pDM_Odm->pBandType == ODM_BAND_2_4G)) ODM_Write_CCK_CCA_Thres_92D(pDM_Odm, CurCCK_CCAThres); else #endif ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() CurCCK_CCAThres = 0x%x\n",CurCCK_CCAThres)); } VOID ODM_Write_CCK_CCA_Thres( IN PVOID pDM_VOID, IN u1Byte CurCCK_CCAThres ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; if(pDM_DigTable->CurCCK_CCAThres!=CurCCK_CCAThres) //modify by Guo.Mingzhi 2012-01-03 { ODM_Write1Byte(pDM_Odm, ODM_REG(CCK_CCA,pDM_Odm), CurCCK_CCAThres); } pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres; pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres; } #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) // <20130108, Kordan> E.g., With LNA used, we make the Rx power smaller to have a better EVM. (Asked by Willis) VOID odm_RFEControl( IN PDM_ODM_T pDM_Odm, IN u8Byte RSSIVal ) { PADAPTER Adapter = (PADAPTER)pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); static u1Byte TRSW_HighPwr = 0; ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("===> odm_RFEControl, RSSI = %d, TRSW_HighPwr = 0x%X, pHalData->RFEType = %d\n", RSSIVal, TRSW_HighPwr, pHalData->RFEType )); if (pHalData->RFEType == 3) { pDM_Odm->RSSI_TRSW = RSSIVal; if (pDM_Odm->RSSI_TRSW >= pDM_Odm->RSSI_TRSW_H) { TRSW_HighPwr = 1; // Switch to PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT1|BIT0, 0x1); // Set ANTSW=1/ANTSWB=0 for SW control PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT9|BIT8, 0x3); // Set ANTSW=1/ANTSWB=0 for SW control } else if (pDM_Odm->RSSI_TRSW <= pDM_Odm->RSSI_TRSW_L) { TRSW_HighPwr = 0; // Switched back PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT1|BIT0, 0x1); // Set ANTSW=1/ANTSWB=0 for SW control PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT9|BIT8, 0x0); // Set ANTSW=1/ANTSWB=0 for SW control } } ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("(pDM_Odm->RSSI_TRSW_H, pDM_Odm->RSSI_TRSW_L) = (%d, %d)\n", pDM_Odm->RSSI_TRSW_H, pDM_Odm->RSSI_TRSW_L)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("(RSSIVal, RSSIVal, pDM_Odm->RSSI_TRSW_iso) = (%d, %d, %d)\n", RSSIVal, pDM_Odm->RSSI_TRSW_iso, pDM_Odm->RSSI_TRSW)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("<=== odm_RFEControl, RSSI = %d, TRSW_HighPwr = 0x%X\n", RSSIVal, TRSW_HighPwr)); } VOID odm_MPT_DIGWorkItemCallback( IN PVOID pContext ) { PADAPTER Adapter = (PADAPTER)pContext; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ODM_MPT_DIG(pDM_Odm); } VOID odm_MPT_DIGCallback( PRT_TIMER pTimer ) { PADAPTER Adapter = (PADAPTER)pTimer->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; #if DEV_BUS_TYPE==RT_PCI_INTERFACE #if USE_WORKITEM PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem); #else ODM_MPT_DIG(pDM_Odm); #endif #else PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem); #endif } #endif #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) VOID odm_MPT_DIGCallback( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; #if USE_WORKITEM PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem); #else ODM_MPT_DIG(pDM_Odm); #endif } #endif #if (DM_ODM_SUPPORT_TYPE != ODM_CE) VOID odm_MPT_Write_DIG( IN PVOID pDM_VOID, IN u1Byte CurIGValue ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_A,pDM_Odm), CurIGValue); if(pDM_Odm->RFType > ODM_1T1R) ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_B,pDM_Odm), CurIGValue); if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (pDM_Odm->RFType > ODM_2T2R)) { ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_C,pDM_Odm), CurIGValue); ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_D,pDM_Odm), CurIGValue); } pDM_DigTable->CurIGValue = CurIGValue; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("CurIGValue = 0x%x\n", CurIGValue)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("pDM_Odm->RFType = 0x%x\n", pDM_Odm->RFType)); } VOID ODM_MPT_DIG( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; PFALSE_ALARM_STATISTICS pFalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PhyDM_FalseAlmCnt); u1Byte CurrentIGI = pDM_DigTable->CurIGValue; u1Byte DIG_Upper = 0x40, DIG_Lower = 0x20; u4Byte RXOK_cal; u4Byte RxPWDBAve_final; u1Byte IGI_A = 0x20, IGI_B = 0x20; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #if ODM_FIX_2G_DIG IGI_A = 0x22; IGI_B = 0x24; #endif #else if (!(pDM_Odm->priv->pshare->rf_ft_var.mp_specific && pDM_Odm->priv->pshare->mp_dig_on)) return; if (*pDM_Odm->pBandType == ODM_BAND_5G) DIG_Lower = 0x22; #endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("===> ODM_MPT_DIG, pBandType = %d\n", *pDM_Odm->pBandType)); #if (ODM_FIX_2G_DIG || (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))) if (*pDM_Odm->pBandType == ODM_BAND_5G || (pDM_Odm->SupportICType & ODM_RTL8814A)) // for 5G or 8814 #else if (1) // for both 2G/5G #endif { odm_FalseAlarmCounterStatistics(pDM_Odm); RXOK_cal = pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK + pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM; RxPWDBAve_final = (RXOK_cal != 0)?pDM_Odm->RxPWDBAve/RXOK_cal:0; pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0; pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0; pDM_Odm->RxPWDBAve = 0; pDM_Odm->MPDIG_2G = FALSE; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) pDM_Odm->Times_2G = 0; #endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("RX OK = %d\n", RXOK_cal)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("RSSI = %d\n", RxPWDBAve_final)); if (RXOK_cal >= 70 && RxPWDBAve_final <= 40) { if (CurrentIGI > 0x24) odm_MPT_Write_DIG(pDM_Odm, 0x24); } else { if(pFalseAlmCnt->Cnt_all > 1000){ CurrentIGI = CurrentIGI + 8; } else if(pFalseAlmCnt->Cnt_all > 200){ CurrentIGI = CurrentIGI + 4; } else if (pFalseAlmCnt->Cnt_all > 50){ CurrentIGI = CurrentIGI + 2; } else if (pFalseAlmCnt->Cnt_all < 2){ CurrentIGI = CurrentIGI - 2; } if (CurrentIGI < DIG_Lower ){ CurrentIGI = DIG_Lower; } if(CurrentIGI > DIG_Upper){ CurrentIGI = DIG_Upper; } odm_MPT_Write_DIG(pDM_Odm, CurrentIGI); ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG = 0x%x, Cnt_all = %d, Cnt_Ofdm_fail = %d, Cnt_Cck_fail = %d\n", CurrentIGI, pFalseAlmCnt->Cnt_all, pFalseAlmCnt->Cnt_Ofdm_fail, pFalseAlmCnt->Cnt_Cck_fail)); } } else { if(pDM_Odm->MPDIG_2G == FALSE) { if((pDM_Odm->SupportPlatform & ODM_WIN) && !(pDM_Odm->SupportICType & ODM_RTL8814A)) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("===> Fix IGI\n")); ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_A,pDM_Odm), IGI_A); ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_B,pDM_Odm), IGI_B); pDM_DigTable->CurIGValue = IGI_B; } else odm_MPT_Write_DIG(pDM_Odm, IGI_A); } #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) pDM_Odm->Times_2G++; if (pDM_Odm->Times_2G == 3) #endif { pDM_Odm->MPDIG_2G = TRUE; } } #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) if (pDM_Odm->SupportICType == ODM_RTL8812) odm_RFEControl(pDM_Odm, RxPWDBAve_final); #endif ODM_SetTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer, 700); } #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_DIG.h000066400000000000000000000170701261122257400212440ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __PHYDMDIG_H__ #define __PHYDMDIG_H__ #define DIG_VERSION "1.0" typedef struct _Dynamic_Initial_Gain_Threshold_ { BOOLEAN bStopDIG; // for debug BOOLEAN bPauseDIG; BOOLEAN bIgnoreDIG; BOOLEAN bPSDInProgress; u1Byte Dig_Enable_Flag; u1Byte Dig_Ext_Port_Stage; int RssiLowThresh; int RssiHighThresh; u4Byte FALowThresh; u4Byte FAHighThresh; u1Byte CurSTAConnectState; u1Byte PreSTAConnectState; u1Byte CurMultiSTAConnectState; u1Byte PreIGValue; u1Byte CurIGValue; u1Byte BackupIGValue; //MP DIG u1Byte BT30_CurIGI; u1Byte IGIBackup; s1Byte BackoffVal; s1Byte BackoffVal_range_max; s1Byte BackoffVal_range_min; u1Byte rx_gain_range_max; u1Byte rx_gain_range_min; u1Byte Rssi_val_min; u1Byte PreCCK_CCAThres; u1Byte CurCCK_CCAThres; u1Byte PreCCKPDState; u1Byte CurCCKPDState; u1Byte CCKPDBackup; u1Byte LargeFAHit; u1Byte ForbiddenIGI; u4Byte Recover_cnt; u1Byte DIG_Dynamic_MIN_0; u1Byte DIG_Dynamic_MIN_1; BOOLEAN bMediaConnect_0; BOOLEAN bMediaConnect_1; u4Byte AntDiv_RSSI_max; u4Byte RSSI_max; u1Byte *pbP2pLinkInProgress; #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) BOOLEAN bTpTarget; BOOLEAN bNoiseEst; u4Byte TpTrainTH_min; u1Byte IGIOffset_A; u1Byte IGIOffset_B; #endif }DIG_T,*pDIG_T; typedef struct _FALSE_ALARM_STATISTICS{ u4Byte Cnt_Parity_Fail; u4Byte Cnt_Rate_Illegal; u4Byte Cnt_Crc8_fail; u4Byte Cnt_Mcs_fail; u4Byte Cnt_Ofdm_fail; u4Byte Cnt_Ofdm_fail_pre; //For RTL8881A u4Byte Cnt_Cck_fail; u4Byte Cnt_all; u4Byte Cnt_Fast_Fsync; u4Byte Cnt_SB_Search_fail; u4Byte Cnt_OFDM_CCA; u4Byte Cnt_CCK_CCA; u4Byte Cnt_CCA_all; u4Byte Cnt_BW_USC; //Gary u4Byte Cnt_BW_LSC; //Gary }FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS; typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition { DIG_TYPE_THRESH_HIGH = 0, DIG_TYPE_THRESH_LOW = 1, DIG_TYPE_BACKOFF = 2, DIG_TYPE_RX_GAIN_MIN = 3, DIG_TYPE_RX_GAIN_MAX = 4, DIG_TYPE_ENABLE = 5, DIG_TYPE_DISABLE = 6, DIG_OP_TYPE_MAX }DM_DIG_OP_E; typedef enum tag_ODM_PauseDIG_Type { ODM_PAUSE_DIG = BIT0, ODM_RESUME_DIG = BIT1 } ODM_Pause_DIG_TYPE; typedef enum tag_ODM_PauseCCKPD_Type { ODM_PAUSE_CCKPD = BIT0, ODM_RESUME_CCKPD = BIT1 } ODM_Pause_CCKPD_TYPE; /* typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition { CCK_PD_STAGE_LowRssi = 0, CCK_PD_STAGE_HighRssi = 1, CCK_PD_STAGE_MAX = 3, }DM_CCK_PDTH_E; typedef enum tag_DIG_EXT_PORT_ALGO_Definition { DIG_EXT_PORT_STAGE_0 = 0, DIG_EXT_PORT_STAGE_1 = 1, DIG_EXT_PORT_STAGE_2 = 2, DIG_EXT_PORT_STAGE_3 = 3, DIG_EXT_PORT_STAGE_MAX = 4, }DM_DIG_EXT_PORT_ALG_E; typedef enum tag_DIG_Connect_Definition { DIG_STA_DISCONNECT = 0, DIG_STA_CONNECT = 1, DIG_STA_BEFORE_CONNECT = 2, DIG_MultiSTA_DISCONNECT = 3, DIG_MultiSTA_CONNECT = 4, DIG_CONNECT_MAX }DM_DIG_CONNECT_E; #define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;} #define DM_MultiSTA_InitGainChangeNotify_CONNECT(_ADAPTER) \ DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_CONNECT) #define DM_MultiSTA_InitGainChangeNotify_DISCONNECT(_ADAPTER) \ DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_DISCONNECT) */ #define DM_DIG_THRESH_HIGH 40 #define DM_DIG_THRESH_LOW 35 #define DM_FALSEALARM_THRESH_LOW 400 #define DM_FALSEALARM_THRESH_HIGH 1000 #define DM_DIG_MAX_NIC 0x3e #define DM_DIG_MIN_NIC 0x1e //0x22//0x1c #define DM_DIG_MAX_OF_MIN_NIC 0x3e #define DM_DIG_MAX_AP 0x3e #define DM_DIG_MIN_AP 0x1c #define DM_DIG_MAX_OF_MIN 0x2A //0x32 #define DM_DIG_MIN_AP_DFS 0x20 #define DM_DIG_MAX_NIC_HP 0x46 #define DM_DIG_MIN_NIC_HP 0x2e #define DM_DIG_MAX_AP_HP 0x42 #define DM_DIG_MIN_AP_HP 0x30 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #define DM_DIG_MAX_AP_COVERAGR 0x26 #define DM_DIG_MIN_AP_COVERAGE 0x1c #define DM_DIG_MAX_OF_MIN_COVERAGE 0x22 #define DM_DIG_TP_Target_TH0 500 #define DM_DIG_TP_Target_TH1 1000 #define DM_DIG_TP_Training_Period 10 #endif //vivi 92c&92d has different definition, 20110504 //this is for 92c #if (DM_ODM_SUPPORT_TYPE & ODM_CE) #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV #define DM_DIG_FA_TH0 0x80//0x20 #else #define DM_DIG_FA_TH0 0x200//0x20 #endif #else #define DM_DIG_FA_TH0 0x200//0x20 #endif #define DM_DIG_FA_TH1 0x300 #define DM_DIG_FA_TH2 0x400 //this is for 92d #define DM_DIG_FA_TH0_92D 0x100 #define DM_DIG_FA_TH1_92D 0x400 #define DM_DIG_FA_TH2_92D 0x600 #define DM_DIG_BACKOFF_MAX 12 #define DM_DIG_BACKOFF_MIN -4 #define DM_DIG_BACKOFF_DEFAULT 10 #define DM_DIG_FA_TH0_LPS 4 //-> 4 in lps #define DM_DIG_FA_TH1_LPS 15 //-> 15 lps #define DM_DIG_FA_TH2_LPS 30 //-> 30 lps #define RSSI_OFFSET_DIG 0x05 VOID ODM_ChangeDynamicInitGainThresh( IN PVOID pDM_VOID, IN u4Byte DM_Type, IN u4Byte DM_Value ); VOID ODM_Write_DIG( IN PVOID pDM_VOID, IN u1Byte CurrentIGI ); VOID odm_PauseDIG( IN PVOID pDM_VOID, IN ODM_Pause_DIG_TYPE PauseType, IN u1Byte IGIValue ); VOID odm_DIGInit( IN PVOID pDM_VOID ); VOID odm_DIG( IN PVOID pDM_VOID ); VOID odm_DIGbyRSSI_LPS( IN PVOID pDM_VOID ); VOID odm_DigForBtHsMode( IN PVOID pDM_VOID ); VOID odm_FalseAlarmCounterStatistics( IN PVOID pDM_VOID ); VOID odm_FAThresholdCheck( IN PVOID pDM_VOID, IN BOOLEAN bDFSBand, IN BOOLEAN bPerformance, IN u4Byte RxTp, IN u4Byte TxTp, OUT u4Byte* dm_FA_thres ); u1Byte odm_ForbiddenIGICheck( IN PVOID pDM_VOID, IN u1Byte DIG_Dynamic_MIN, IN u1Byte CurrentIGI ); VOID odm_InbandNoiseCalculate ( IN PVOID pDM_VOID ); BOOLEAN odm_DigAbort( IN PVOID pDM_VOID ); VOID odm_PauseCCKPacketDetection( IN PVOID pDM_VOID, IN ODM_Pause_CCKPD_TYPE PauseType, IN u1Byte CCKPDThreshold ); VOID odm_CCKPacketDetectionThresh( IN PVOID pDM_VOID ); VOID ODM_Write_CCK_CCA_Thres( IN PVOID pDM_VOID, IN u1Byte CurCCK_CCAThres ); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) VOID odm_MPT_DIGCallback( PRT_TIMER pTimer ); VOID odm_MPT_DIGWorkItemCallback( IN PVOID pContext ); #endif #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) VOID odm_MPT_DIGCallback( IN PVOID pDM_VOID ); #endif #if (DM_ODM_SUPPORT_TYPE != ODM_CE) VOID ODM_MPT_DIG( IN PVOID pDM_VOID ); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_DynamicBBPowerSaving.c000066400000000000000000000137631261122257400246160ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // include files //============================================================ #include "Mp_Precomp.h" #include "phydm_precomp.h" VOID odm_DynamicBBPowerSavingInit( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; pDM_PSTable->PreCCAState = CCA_MAX; pDM_PSTable->CurCCAState = CCA_MAX; pDM_PSTable->PreRFState = RF_MAX; pDM_PSTable->CurRFState = RF_MAX; pDM_PSTable->Rssi_val_min = 0; pDM_PSTable->initialize = 0; } VOID odm_DynamicBBPowerSaving( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) if (pDM_Odm->SupportICType != ODM_RTL8723A) return; if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE)) return; if(!(pDM_Odm->SupportPlatform & (ODM_WIN|ODM_CE))) return; //1 2.Power Saving for 92C if((pDM_Odm->SupportICType == ODM_RTL8192C) &&(pDM_Odm->RFType == ODM_2T2R)) { odm_1R_CCA(pDM_Odm); } // 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable. // 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns ot 600ns. //1 3.Power Saving for 88C else { ODM_RF_Saving(pDM_Odm, FALSE); } #endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) } VOID odm_1R_CCA( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; if(pDM_Odm->RSSI_Min!= 0xFF) { if(pDM_PSTable->PreCCAState == CCA_2R) { if(pDM_Odm->RSSI_Min >= 35) pDM_PSTable->CurCCAState = CCA_1R; else pDM_PSTable->CurCCAState = CCA_2R; } else{ if(pDM_Odm->RSSI_Min <= 30) pDM_PSTable->CurCCAState = CCA_2R; else pDM_PSTable->CurCCAState = CCA_1R; } } else{ pDM_PSTable->CurCCAState=CCA_MAX; } if(pDM_PSTable->PreCCAState != pDM_PSTable->CurCCAState) { if(pDM_PSTable->CurCCAState == CCA_1R) { if( pDM_Odm->RFType ==ODM_2T2R ) { ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x13); //PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20); } else { ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x23); //PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100 } } else { ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x33); //PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63); } pDM_PSTable->PreCCAState = pDM_PSTable->CurCCAState; } } void ODM_RF_Saving( IN PVOID pDM_VOID, IN u1Byte bForceInNormal ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; #if (DM_ODM_SUPPORT_TYPE != ODM_AP) pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; u1Byte Rssi_Up_bound = 30 ; u1Byte Rssi_Low_bound = 25; #if (DM_ODM_SUPPORT_TYPE == ODM_CE) if(pDM_Odm->PatchID == 40 ) //RT_CID_819x_FUNAI_TV { Rssi_Up_bound = 50 ; Rssi_Low_bound = 45; } #endif if(pDM_PSTable->initialize == 0){ pDM_PSTable->Reg874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord)&0x1CC000)>>14; pDM_PSTable->RegC70 = (ODM_GetBBReg(pDM_Odm, 0xc70, bMaskDWord)&BIT3)>>3; pDM_PSTable->Reg85C = (ODM_GetBBReg(pDM_Odm, 0x85c, bMaskDWord)&0xFF000000)>>24; pDM_PSTable->RegA74 = (ODM_GetBBReg(pDM_Odm, 0xa74, bMaskDWord)&0xF000)>>12; //Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord); pDM_PSTable->initialize = 1; } if(!bForceInNormal) { if(pDM_Odm->RSSI_Min != 0xFF) { if(pDM_PSTable->PreRFState == RF_Normal) { if(pDM_Odm->RSSI_Min >= Rssi_Up_bound) pDM_PSTable->CurRFState = RF_Save; else pDM_PSTable->CurRFState = RF_Normal; } else{ if(pDM_Odm->RSSI_Min <= Rssi_Low_bound) pDM_PSTable->CurRFState = RF_Normal; else pDM_PSTable->CurRFState = RF_Save; } } else pDM_PSTable->CurRFState=RF_MAX; } else { pDM_PSTable->CurRFState = RF_Normal; } if(pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) { if(pDM_PSTable->CurRFState == RF_Save) { // 8723 RSSI report will be wrong. Set 0x874[5]=1 when enter BB power saving mode. // Suggested by SD3 Yu-Nan. 2011.01.20. if(pDM_Odm->SupportICType == ODM_RTL8723A) { ODM_SetBBReg(pDM_Odm, 0x874 , BIT5, 0x1); //Reg874[5]=1b'1 } ODM_SetBBReg(pDM_Odm, 0x874 , 0x1C0000, 0x2); //Reg874[20:18]=3'b010 ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, 0); //RegC70[3]=1'b0 ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, 0x63); //Reg85C[31:24]=0x63 ODM_SetBBReg(pDM_Odm, 0x874, 0xC000, 0x2); //Reg874[15:14]=2'b10 ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, 0x3); //RegA75[7:4]=0x3 ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); //Reg818[28]=1'b0 ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x1); //Reg818[28]=1'b1 } else { ODM_SetBBReg(pDM_Odm, 0x874 , 0x1CC000, pDM_PSTable->Reg874); ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, pDM_PSTable->RegC70); ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, pDM_PSTable->RegA74); ODM_SetBBReg(pDM_Odm,0x818, BIT28, 0x0); if(pDM_Odm->SupportICType == ODM_RTL8723A) { ODM_SetBBReg(pDM_Odm,0x874 , BIT5, 0x0); //Reg874[5]=1b'0 } } pDM_PSTable->PreRFState =pDM_PSTable->CurRFState; } #endif }rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_DynamicBBPowerSaving.h000066400000000000000000000031401261122257400246070ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __PHYDMDYNAMICBBPOWERSAVING_H__ #define __PHYDMDYNAMICBBPOWERSAVING_H__ #define DYNAMIC_BBPWRSAV_VERSION "1.0" typedef struct _Dynamic_Power_Saving_ { u1Byte PreCCAState; u1Byte CurCCAState; u1Byte PreRFState; u1Byte CurRFState; int Rssi_val_min; u1Byte initialize; u4Byte Reg874,RegC70,Reg85C,RegA74; }PS_T,*pPS_T; #define dm_RF_Saving ODM_RF_Saving void ODM_RF_Saving( IN PVOID pDM_VOID, IN u1Byte bForceInNormal ); VOID odm_DynamicBBPowerSavingInit( IN PVOID pDM_VOID ); VOID odm_DynamicBBPowerSaving( IN PVOID pDM_VOID ); VOID odm_1R_CCA( IN PVOID pDM_VOID ); #endifrtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_DynamicTxPower.c000066400000000000000000000715271261122257400235600ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // include files //============================================================ #include "Mp_Precomp.h" #include "phydm_precomp.h" VOID odm_DynamicTxPowerInit( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); #if DEV_BUS_TYPE==RT_USB_INTERFACE if(RT_GetInterfaceSelection(Adapter) == INTF_SEL1_USB_High_Power) { odm_DynamicTxPowerSavePowerIndex(pDM_Odm); pMgntInfo->bDynamicTxPowerEnable = TRUE; } else #else //so 92c pci do not need dynamic tx power? vivi check it later if(IS_HARDWARE_TYPE_8192D(Adapter)) pMgntInfo->bDynamicTxPowerEnable = TRUE; else pMgntInfo->bDynamicTxPowerEnable = FALSE; #endif pHalData->LastDTPLvl = TxHighPwrLevel_Normal; pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; pdmpriv->bDynamicTxPowerEnable = _FALSE; #if (RTL8192C_SUPPORT==1) #ifdef CONFIG_USB_HCI #ifdef CONFIG_INTEL_PROXIM if((pHalData->BoardType == BOARD_USB_High_PA)||(Adapter->proximity.proxim_support==_TRUE)) #else if(pHalData->BoardType == BOARD_USB_High_PA) #endif { //odm_SavePowerIndex(Adapter); odm_DynamicTxPowerSavePowerIndex(pDM_Odm); pdmpriv->bDynamicTxPowerEnable = _TRUE; } else #else pdmpriv->bDynamicTxPowerEnable = _FALSE; #endif #endif pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal; pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; #endif } VOID odm_DynamicTxPowerSavePowerIndex( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; #if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) u1Byte index; u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); for(index = 0; index< 6; index++) pHalData->PowerIndex_backup[index] = PlatformEFIORead1Byte(Adapter, Power_Index_REG[index]); #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; for(index = 0; index< 6; index++) pdmpriv->PowerIndex_backup[index] = rtw_read8(Adapter, Power_Index_REG[index]); #endif #endif } VOID odm_DynamicTxPowerRestorePowerIndex( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; #if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) u1Byte index; PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) for(index = 0; index< 6; index++) PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], pHalData->PowerIndex_backup[index]); #elif(DM_ODM_SUPPORT_TYPE == ODM_CE) struct dm_priv *pdmpriv = &pHalData->dmpriv; for(index = 0; index< 6; index++) rtw_write8(Adapter, Power_Index_REG[index], pdmpriv->PowerIndex_backup[index]); #endif #endif } VOID odm_DynamicTxPowerWritePowerIndex( IN PVOID pDM_VOID, IN u1Byte Value) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; u1Byte index; u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; for(index = 0; index< 6; index++) //PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], Value); ODM_Write1Byte(pDM_Odm, Power_Index_REG[index], Value); } VOID odm_DynamicTxPower( IN PVOID pDM_VOID ) { // // For AP/ADSL use prtl8192cd_priv // For CE/NIC use PADAPTER // //PADAPTER pAdapter = pDM_Odm->Adapter; // prtl8192cd_priv priv = pDM_Odm->priv; PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) return; // // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate // at the same time. In the stage2/3, we need to prive universal interface and merge all // HW dynamic mechanism. // switch (pDM_Odm->SupportPlatform) { case ODM_WIN: case ODM_CE: odm_DynamicTxPowerNIC(pDM_Odm); break; case ODM_AP: odm_DynamicTxPowerAP(pDM_Odm); break; case ODM_ADSL: //odm_DIGAP(pDM_Odm); break; } } VOID odm_DynamicTxPowerNIC( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) return; #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) if(pDM_Odm->SupportICType == ODM_RTL8192C) { odm_DynamicTxPower_92C(pDM_Odm); } else if(pDM_Odm->SupportICType == ODM_RTL8192D) { odm_DynamicTxPower_92D(pDM_Odm); } else if (pDM_Odm->SupportICType == ODM_RTL8821) { #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) PADAPTER Adapter = pDM_Odm->Adapter; PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(Adapter); if (pMgntInfo->RegRspPwr == 1) { if(pDM_Odm->RSSI_Min > 60) { ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 1); // Resp TXAGC offset = -3dB } else if(pDM_Odm->RSSI_Min < 55) { ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 0); // Resp TXAGC offset = 0dB } } #endif } #endif } VOID odm_DynamicTxPowerAP( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; #if (DM_ODM_SUPPORT_TYPE == ODM_AP) //#if ((RTL8192C_SUPPORT==1) || (RTL8192D_SUPPORT==1) || (RTL8188E_SUPPORT==1) || (RTL8812E_SUPPORT==1)) prtl8192cd_priv priv = pDM_Odm->priv; s4Byte i; s2Byte pwr_thd = TX_POWER_NEAR_FIELD_THRESH_AP; if(!priv->pshare->rf_ft_var.tx_pwr_ctrl) return; #if ((RTL8812E_SUPPORT==1) || (RTL8881A_SUPPORT==1)) if (pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8881A)) pwr_thd = TX_POWER_NEAR_FIELD_THRESH_8812; #endif #if defined(CONFIG_RTL_92D_SUPPORT) || defined(CONFIG_RTL_92C_SUPPORT) if(CHIP_VER_92X_SERIES(priv)) { #ifdef HIGH_POWER_EXT_PA if(pDM_Odm->ExtPA) tx_power_control(priv); #endif } #endif /* * Check if station is near by to use lower tx power */ if ((priv->up_time % 3) == 0 ) { int disable_pwr_ctrl = ((pDM_Odm->FalseAlmCnt.Cnt_all > 1000 ) || ((pDM_Odm->FalseAlmCnt.Cnt_all > 300 ) && ((RTL_R8(0xc50) & 0x7f) >= 0x32))) ? 1 : 0; for(i=0; ipODM_StaInfo[i]; if(IS_STA_VALID(pstat) ) { if(disable_pwr_ctrl) pstat->hp_level = 0; else if ((pstat->hp_level == 0) && (pstat->rssi > pwr_thd)) pstat->hp_level = 1; else if ((pstat->hp_level == 1) && (pstat->rssi < (pwr_thd-8))) pstat->hp_level = 0; } } #if defined(CONFIG_WLAN_HAL_8192EE) if (GET_CHIP_VER(priv) == VERSION_8192E) { if( !disable_pwr_ctrl && (pDM_Odm->RSSI_Min != 0xff) ) { if(pDM_Odm->RSSI_Min > pwr_thd) RRSR_power_control_11n(priv, 1 ); else if(pDM_Odm->RSSI_Min < (pwr_thd-8)) RRSR_power_control_11n(priv, 0 ); } else { RRSR_power_control_11n(priv, 0 ); } } #endif } //#endif #endif } VOID odm_DynamicTxPower_92C( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); s4Byte UndecoratedSmoothedPWDB; // 2012/01/12 MH According to Luke's suggestion, only high power will support the feature. if (pDM_Odm->ExtPA == FALSE) return; // STA not connected and AP not connected if((!pMgntInfo->bMediaConnect) && (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("Not connected to any \n")); pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; //the LastDTPlvl should reset when disconnect, //otherwise the tx power level wouldn't change when disconnect and connect again. // Maddest 20091220. pHalData->LastDTPLvl=TxHighPwrLevel_Normal; return; } #if (INTEL_PROXIMITY_SUPPORT == 1) // Intel set fixed tx power if(pMgntInfo->IntelProximityModeInfo.PowerOutput > 0) { switch(pMgntInfo->IntelProximityModeInfo.PowerOutput){ case 1: pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_100\n")); break; case 2: pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_70; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_70\n")); break; case 3: pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_50; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_50\n")); break; case 4: pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_35; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_35\n")); break; case 5: pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_15; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_15\n")); break; default: pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_100\n")); break; } } else #endif { if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) || pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) { pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; } else { if(pMgntInfo->bMediaConnect) // Default port { if(ACTING_AS_AP(Adapter) || ACTING_AS_IBSS(Adapter)) { UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); } else { UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); } } else // associated entry pwdb { UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); } if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) { pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); } else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) { pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); } else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) { pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); } } } if( pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl ) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192C() Channel = %d \n" , pHalData->CurrentChannel)); PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); if( (pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) && (pHalData->LastDTPLvl == TxHighPwrLevel_Level1 || pHalData->LastDTPLvl == TxHighPwrLevel_Level2)) //TxHighPwrLevel_Normal odm_DynamicTxPowerRestorePowerIndex(pDM_Odm); else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x14); else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x10); } pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl; #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #if (RTL8192C_SUPPORT==1) PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; int UndecoratedSmoothedPWDB; if(!pdmpriv->bDynamicTxPowerEnable) return; #ifdef CONFIG_INTEL_PROXIM if(Adapter->proximity.proxim_on== _TRUE){ struct proximity_priv *prox_priv=Adapter->proximity.proximity_priv; // Intel set fixed tx power printk("\n %s Adapter->proximity.proxim_on=%d prox_priv->proxim_modeinfo->power_output=%d \n",__FUNCTION__,Adapter->proximity.proxim_on,prox_priv->proxim_modeinfo->power_output); if(prox_priv!=NULL){ if(prox_priv->proxim_modeinfo->power_output> 0) { switch(prox_priv->proxim_modeinfo->power_output) { case 1: pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_100; printk("TxHighPwrLevel_100\n"); break; case 2: pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_70; printk("TxHighPwrLevel_70\n"); break; case 3: pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_50; printk("TxHighPwrLevel_50\n"); break; case 4: pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_35; printk("TxHighPwrLevel_35\n"); break; case 5: pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_15; printk("TxHighPwrLevel_15\n"); break; default: pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_100; printk("TxHighPwrLevel_100\n"); break; } } } } else #endif { // STA not connected and AP not connected if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) { //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; //the LastDTPlvl should reset when disconnect, //otherwise the tx power level wouldn't change when disconnect and connect again. // Maddest 20091220. pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal; return; } if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port { #if 0 //todo: AP Mode if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) { UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); } else { UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB; //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); } #else UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; #endif } else // associated entry pwdb { UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); } if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) { pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); } else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) { pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); } else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) { pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); } } if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) ) { PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) // HP1 -> Normal or HP2 -> Normal odm_DynamicTxPowerRestorePowerIndex(pDM_Odm); else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x14); else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x10); } pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl; #endif #endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) } VOID odm_DynamicTxPower_92D( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); s4Byte UndecoratedSmoothedPWDB; PADAPTER BuddyAdapter = Adapter->BuddyAdapter; BOOLEAN bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(Adapter); u1Byte HighPowerLvlBackForMac0 = TxHighPwrLevel_Level1; // 2012/01/12 MH According to Luke's suggestion, only high power will support the feature. if (pDM_Odm->ExtPA == FALSE) return; // If dynamic high power is disabled. if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) || pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) { pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; return; } // STA not connected and AP not connected if((!pMgntInfo->bMediaConnect) && (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("Not connected to any \n")); pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; //the LastDTPlvl should reset when disconnect, //otherwise the tx power level wouldn't change when disconnect and connect again. // Maddest 20091220. pHalData->LastDTPLvl=TxHighPwrLevel_Normal; return; } if(pMgntInfo->bMediaConnect) // Default port { if(ACTING_AS_AP(Adapter) || pMgntInfo->mIbss) { UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); } else { UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); } } else // associated entry pwdb { UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); } if(IS_HARDWARE_TYPE_8192D(Adapter) && GET_HAL_DATA(Adapter)->CurrentBandType == 1){ if(UndecoratedSmoothedPWDB >= 0x33) { pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n")); } else if((UndecoratedSmoothedPWDB <0x33) && (UndecoratedSmoothedPWDB >= 0x2b) ) { pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); } else if(UndecoratedSmoothedPWDB < 0x2b) { pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Normal\n")); } } else { if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) { pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); } else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) { pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); } else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) { pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); } } //sherry delete flag 20110517 if(bGetValueFromBuddyAdapter) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 1 \n")); if(Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() change value \n")); HighPowerLvlBackForMac0 = pHalData->DynamicTxHighPowerLvl; pHalData->DynamicTxHighPowerLvl = Adapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP; PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); pHalData->DynamicTxHighPowerLvl = HighPowerLvlBackForMac0; Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = FALSE; } } if( (pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl) ) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192S() Channel = %d \n" , pHalData->CurrentChannel)); if(Adapter->DualMacSmartConcurrent == TRUE) { if(BuddyAdapter == NULL) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter == NULL case \n")); if(!Adapter->bSlaveOfDMSP) { PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); } } else { if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMSP \n")); if(Adapter->bSlaveOfDMSP) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() bslave case \n")); BuddyAdapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = TRUE; BuddyAdapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP = pHalData->DynamicTxHighPowerLvl; } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() master case \n")); if(!bGetValueFromBuddyAdapter) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 0 \n")); PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); } } } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMDP\n")); PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); } } } else { PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); } } pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl; #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #if (RTL8192D_SUPPORT==1) PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); struct dm_priv *pdmpriv = &pHalData->dmpriv; DM_ODM_T *podmpriv = &pHalData->odmpriv; int UndecoratedSmoothedPWDB; #if (RTL8192D_EASY_SMART_CONCURRENT == 1) PADAPTER BuddyAdapter = Adapter->BuddyAdapter; BOOLEAN bGetValueFromBuddyAdapter = DualMacGetParameterFromBuddyAdapter(Adapter); u8 HighPowerLvlBackForMac0 = TxHighPwrLevel_Level1; #endif // If dynamic high power is disabled. if( (pdmpriv->bDynamicTxPowerEnable != _TRUE) || (!(podmpriv->SupportAbility& ODM_BB_DYNAMIC_TXPWR)) ) { pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; return; } // STA not connected and AP not connected if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) { //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; //the LastDTPlvl should reset when disconnect, //otherwise the tx power level wouldn't change when disconnect and connect again. // Maddest 20091220. pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal; return; } if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port { #if 0 //todo: AP Mode if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) { UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); } else { UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB; //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); } #else UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; #endif } else // associated entry pwdb { UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); } #if TX_POWER_FOR_5G_BAND == 1 if(pHalData->CurrentBandType92D == BAND_ON_5G){ if(UndecoratedSmoothedPWDB >= 0x33) { pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n")); } else if((UndecoratedSmoothedPWDB <0x33) && (UndecoratedSmoothedPWDB >= 0x2b) ) { pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); } else if(UndecoratedSmoothedPWDB < 0x2b) { pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Normal\n")); } } else #endif { if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) { pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); } else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) { pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); } else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) { pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); } } #if (RTL8192D_EASY_SMART_CONCURRENT == 1) if(bGetValueFromBuddyAdapter) { //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 1 \n")); if(Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP) { //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() change value \n")); HighPowerLvlBackForMac0 = pHalData->DynamicTxHighPowerLvl; pHalData->DynamicTxHighPowerLvl = Adapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP; PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); pHalData->DynamicTxHighPowerLvl = HighPowerLvlBackForMac0; Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = _FALSE; } } #endif if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) ) { //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192S() Channel = %d \n" , pHalData->CurrentChannel)); #if (RTL8192D_EASY_SMART_CONCURRENT == 1) if(BuddyAdapter == NULL) { //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter == NULL case \n")); if(!Adapter->bSlaveOfDMSP) { PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); } } else { if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) { //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMSP \n")); if(Adapter->bSlaveOfDMSP) { //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() bslave case \n")); BuddyAdapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = _TRUE; BuddyAdapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP = pHalData->DynamicTxHighPowerLvl; } else { //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() master case \n")); if(!bGetValueFromBuddyAdapter) { //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 0 \n")); PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); } } } else { //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMDP\n")); PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); } } #else PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); #endif } pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl; #endif #endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) } rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_DynamicTxPower.h000066400000000000000000000042671261122257400235620ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __PHYDMDYNAMICTXPOWER_H__ #define __PHYDMDYNAMICTXPOWER_H__ #define DYNAMIC_TXPWR_VERSION "1.0" #define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 #define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 #define TX_POWER_NEAR_FIELD_THRESH_AP 0x3F #define TX_POWER_NEAR_FIELD_THRESH_8812 60 #define TxHighPwrLevel_Normal 0 #define TxHighPwrLevel_Level1 1 #define TxHighPwrLevel_Level2 2 #define TxHighPwrLevel_BT1 3 #define TxHighPwrLevel_BT2 4 #define TxHighPwrLevel_15 5 #define TxHighPwrLevel_35 6 #define TxHighPwrLevel_50 7 #define TxHighPwrLevel_70 8 #define TxHighPwrLevel_100 9 VOID odm_DynamicTxPowerInit( IN PVOID pDM_VOID ); VOID odm_DynamicTxPowerRestorePowerIndex( IN PVOID pDM_VOID ); VOID odm_DynamicTxPowerNIC( IN PVOID pDM_VOID ); #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) VOID odm_DynamicTxPowerSavePowerIndex( IN PVOID pDM_VOID ); VOID odm_DynamicTxPowerWritePowerIndex( IN PVOID pDM_VOID, IN u1Byte Value); VOID odm_DynamicTxPower_92C( IN PVOID pDM_VOID ); VOID odm_DynamicTxPower_92D( IN PVOID pDM_VOID ); #endif VOID odm_DynamicTxPower( IN PVOID pDM_VOID ); VOID odm_DynamicTxPowerAP( IN PVOID pDM_VOID ); #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_EdcaTurboCheck.c000066400000000000000000001677501261122257400234550ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // include files //============================================================ #include "Mp_Precomp.h" #include "phydm_precomp.h" VOID ODM_EdcaTurboInit( IN PVOID pDM_VOID) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; #if ((DM_ODM_SUPPORT_TYPE == ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) odm_EdcaParaInit(pDM_Odm); #elif (DM_ODM_SUPPORT_TYPE==ODM_WIN) PADAPTER Adapter = NULL; HAL_DATA_TYPE *pHalData = NULL; if(pDM_Odm->Adapter==NULL) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EdcaTurboInit fail!!!\n")); return; } Adapter=pDM_Odm->Adapter; pHalData=GET_HAL_DATA(Adapter); pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE; pHalData->bIsAnyNonBEPkts = FALSE; #elif(DM_ODM_SUPPORT_TYPE==ODM_CE) PADAPTER Adapter = pDM_Odm->Adapter; pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE; Adapter->recvpriv.bIsAnyNonBEPkts =FALSE; #endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VO PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VO_PARAM))); ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VI PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VI_PARAM))); ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM))); ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BK PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BK_PARAM))); } // ODM_InitEdcaTurbo VOID odm_EdcaTurboCheck( IN PVOID pDM_VOID ) { // // For AP/ADSL use prtl8192cd_priv // For CE/NIC use PADAPTER // // // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate // at the same time. In the stage2/3, we need to prive universal interface and merge all // HW dynamic mechanism. // PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheck========================>\n")); if(!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO )) return; switch (pDM_Odm->SupportPlatform) { case ODM_WIN: #if(DM_ODM_SUPPORT_TYPE==ODM_WIN) odm_EdcaTurboCheckMP(pDM_Odm); #endif break; case ODM_CE: #if(DM_ODM_SUPPORT_TYPE==ODM_CE) odm_EdcaTurboCheckCE(pDM_Odm); #endif break; case ODM_AP: case ODM_ADSL: #if ((DM_ODM_SUPPORT_TYPE == ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) odm_IotEngine(pDM_Odm); #endif break; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("<========================odm_EdcaTurboCheck\n")); } // odm_CheckEdcaTurbo #if(DM_ODM_SUPPORT_TYPE==ODM_CE) VOID odm_EdcaTurboCheckCE( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PADAPTER Adapter = pDM_Odm->Adapter; u32 EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer]; u32 EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer]; u32 ICType=pDM_Odm->SupportICType; u32 IOTPeer=0; u8 WirelessMode=0xFF; //invalid value u32 trafficIndex; u32 edca_param; u64 cur_tx_bytes = 0; u64 cur_rx_bytes = 0; u8 bbtchange = _FALSE; u8 bBiasOnRx = _FALSE; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); struct recv_priv *precvpriv = &(Adapter->recvpriv); struct registry_priv *pregpriv = &Adapter->registrypriv; struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if(pDM_Odm->bLinked != _TRUE) { precvpriv->bIsAnyNonBEPkts = _FALSE; return; } if ((pregpriv->wifi_spec == 1) )//|| (pmlmeinfo->HT_enable == 0)) { precvpriv->bIsAnyNonBEPkts = _FALSE; return; } if(pDM_Odm->pWirelessMode!=NULL) WirelessMode=*(pDM_Odm->pWirelessMode); IOTPeer = pmlmeinfo->assoc_AP_vendor; if (IOTPeer >= HT_IOT_PEER_MAX) { precvpriv->bIsAnyNonBEPkts = _FALSE; return; } if( (pDM_Odm->SupportICType == ODM_RTL8192C) || (pDM_Odm->SupportICType == ODM_RTL8723A) || (pDM_Odm->SupportICType == ODM_RTL8188E)) { if((IOTPeer == HT_IOT_PEER_RALINK)||(IOTPeer == HT_IOT_PEER_ATHEROS)) bBiasOnRx = _TRUE; } // Check if the status needs to be changed. if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) ) { cur_tx_bytes = pdvobjpriv->traffic_stat.cur_tx_bytes; cur_rx_bytes = pdvobjpriv->traffic_stat.cur_rx_bytes; //traffic, TX or RX if(bBiasOnRx) { if (cur_tx_bytes > (cur_rx_bytes << 2)) { // Uplink TP is present. trafficIndex = UP_LINK; } else { // Balance TP is present. trafficIndex = DOWN_LINK; } } else { if (cur_rx_bytes > (cur_tx_bytes << 2)) { // Downlink TP is present. trafficIndex = DOWN_LINK; } else { // Balance TP is present. trafficIndex = UP_LINK; } } //if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) { if(ICType==ODM_RTL8192D) { // Single PHY if(pDM_Odm->RFType==ODM_2T2R) { EDCA_BE_UL = 0x60a42b; //0x5ea42b; EDCA_BE_DL = 0x60a42b; //0x5ea42b; } else { EDCA_BE_UL = 0x6ea42b; EDCA_BE_DL = 0x6ea42b; } } else { if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE) { if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) { EDCA_BE_UL = 0x60a42b; EDCA_BE_DL = 0x60a42b; } else { EDCA_BE_UL = 0x6ea42b; EDCA_BE_DL = 0x6ea42b; } } } //92D txop can't be set to 0x3e for cisco1250 if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) { EDCA_BE_DL = edca_setting_DL[IOTPeer]; EDCA_BE_UL = edca_setting_UL[IOTPeer]; } //merge from 92s_92c_merge temp brunch v2445 20120215 else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B))) { EDCA_BE_DL = edca_setting_DL_GMode[IOTPeer]; } else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A))) { EDCA_BE_DL = 0xa630; } else if(IOTPeer == HT_IOT_PEER_MARVELL) { EDCA_BE_DL = edca_setting_DL[IOTPeer]; EDCA_BE_UL = edca_setting_UL[IOTPeer]; } else if(IOTPeer == HT_IOT_PEER_ATHEROS) { // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. EDCA_BE_DL = edca_setting_DL[IOTPeer]; } if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8821)||(ICType==ODM_RTL8192E)) //add 8812AU/8812AE { EDCA_BE_UL = 0x5ea42b; EDCA_BE_DL = 0x5ea42b; ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%x EDCA_BE_DL =0x%x",EDCA_BE_UL,EDCA_BE_DL)); } if (trafficIndex == DOWN_LINK) edca_param = EDCA_BE_DL; else edca_param = EDCA_BE_UL; rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param); pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex; } pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _TRUE; } else { // // Turn Off EDCA turbo here. // Restore original EDCA according to the declaration of AP. // if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) { rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE); pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _FALSE; } } } #elif(DM_ODM_SUPPORT_TYPE==ODM_WIN) VOID odm_EdcaTurboCheckMP( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter); PADAPTER pExtAdapter = GetFirstExtAdapter(Adapter);//NULL; PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; PSTA_QOS pStaQos = Adapter->MgntInfo.pStaQos; //[Win7 Count Tx/Rx statistic for Extension Port] odm_CheckEdcaTurbo's Adapter is always Default. 2009.08.20, by Bohn u8Byte Ext_curTxOkCnt = 0; u8Byte Ext_curRxOkCnt = 0; //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE; // Keep past Tx/Rx packet count for RT-to-RT EDCA turbo. u8Byte curTxOkCnt = 0; u8Byte curRxOkCnt = 0; u4Byte EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer]; u4Byte EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer]; u4Byte EDCA_BE = 0x5ea42b; u1Byte IOTPeer=0; BOOLEAN *pbIsCurRDLState=NULL; BOOLEAN bLastIsCurRDLState=FALSE; BOOLEAN bBiasOnRx=FALSE; BOOLEAN bEdcaTurboOn=FALSE; u1Byte TxRate = 0xFF; u8Byte value64; ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheckMP========================>")); ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM))); ////=============================== ////list paramter for different platform ////=============================== bLastIsCurRDLState=pDM_Odm->DM_EDCA_Table.bIsCurRDLState; pbIsCurRDLState=&(pDM_Odm->DM_EDCA_Table.bIsCurRDLState); //2012/09/14 MH Add if (pMgntInfo->NumNonBePkt > pMgntInfo->RegEdcaThresh && !Adapter->MgntInfo.bWiFiConfg) pHalData->bIsAnyNonBEPkts = TRUE; pMgntInfo->NumNonBePkt = 0; // Caculate TX/RX TP: //curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt; //curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt; curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pDM_Odm->lastTxOkCnt; curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pDM_Odm->lastRxOkCnt; pDM_Odm->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; pDM_Odm->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; if(pExtAdapter == NULL) pExtAdapter = pDefaultAdapter; Ext_curTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->Ext_lastTxOkCnt; Ext_curRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->Ext_lastRxOkCnt; GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus); //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY) { curTxOkCnt = Ext_curTxOkCnt ; curRxOkCnt = Ext_curRxOkCnt ; } // IOTPeer=pMgntInfo->IOTPeer; bBiasOnRx=(pMgntInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX)?TRUE:FALSE; bEdcaTurboOn=((!pHalData->bIsAnyNonBEPkts))?TRUE:FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bIsAnyNonBEPkts : 0x%lx \n",pHalData->bIsAnyNonBEPkts)); ////=============================== ////check if edca turbo is disabled ////=============================== if(odm_IsEdcaTurboDisable(pDM_Odm)) { pHalData->bIsAnyNonBEPkts = FALSE; pMgntInfo->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; pMgntInfo->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; pMgntInfo->Ext_lastTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast; pMgntInfo->Ext_lastRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast; } ////=============================== ////remove iot case out ////=============================== ODM_EdcaParaSelByIot(pDM_Odm, &EDCA_BE_UL, &EDCA_BE_DL); ////=============================== ////Check if the status needs to be changed. ////=============================== if(bEdcaTurboOn) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bEdcaTurboOn : 0x%x bBiasOnRx : 0x%x\n",bEdcaTurboOn,bBiasOnRx)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curTxOkCnt : 0x%lx \n",curTxOkCnt)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curRxOkCnt : 0x%lx \n",curRxOkCnt)); if(bBiasOnRx) odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, TRUE, pbIsCurRDLState); else odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, FALSE, pbIsCurRDLState); //modify by Guo.Mingzhi 2011-12-29 EDCA_BE=((*pbIsCurRDLState)==TRUE)?EDCA_BE_DL:EDCA_BE_UL; if(IS_HARDWARE_TYPE_8821U(Adapter)) { if(pMgntInfo->RegTxDutyEnable) { //2013.01.23 LukeLee: debug for 8811AU thermal issue (reduce Tx duty cycle) if(!pMgntInfo->ForcedDataRate) //auto rate { if(pDM_Odm->TxRate != 0xFF) TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); } else //force rate { TxRate = (u1Byte) pMgntInfo->ForcedDataRate; } value64 = (curRxOkCnt<<2); if(curTxOkCnt < value64) //Downlink ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); else //Uplink { //DbgPrint("pDM_Odm->RFCalibrateInfo.ThermalValue = 0x%X\n", pDM_Odm->RFCalibrateInfo.ThermalValue); //if(pDM_Odm->RFCalibrateInfo.ThermalValue < pHalData->EEPROMThermalMeter) if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G)) ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); else { switch (TxRate) { case MGN_VHT1SS_MCS6: case MGN_VHT1SS_MCS5: case MGN_MCS6: case MGN_MCS5: case MGN_48M: case MGN_54M: ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea42b); break; case MGN_VHT1SS_MCS4: case MGN_MCS4: case MGN_36M: ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa42b); break; case MGN_VHT1SS_MCS3: case MGN_MCS3: case MGN_24M: ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa47f); break; case MGN_VHT1SS_MCS2: case MGN_MCS2: case MGN_18M: ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa57f); break; case MGN_VHT1SS_MCS1: case MGN_MCS1: case MGN_9M: case MGN_12M: ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa77f); break; case MGN_VHT1SS_MCS0: case MGN_MCS0: case MGN_6M: ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f); break; default: ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); break; } } } } else { ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); } } else if (IS_HARDWARE_TYPE_8812AU(Adapter)){ if(pMgntInfo->RegTxDutyEnable) { //2013.07.26 Wilson: debug for 8812AU thermal issue (reduce Tx duty cycle) // it;s the same issue as 8811AU if(!pMgntInfo->ForcedDataRate) //auto rate { if(pDM_Odm->TxRate != 0xFF) TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); } else //force rate { TxRate = (u1Byte) pMgntInfo->ForcedDataRate; } value64 = (curRxOkCnt<<2); if(curTxOkCnt < value64) //Downlink ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); else //Uplink { //DbgPrint("pDM_Odm->RFCalibrateInfo.ThermalValue = 0x%X\n", pDM_Odm->RFCalibrateInfo.ThermalValue); //if(pDM_Odm->RFCalibrateInfo.ThermalValue < pHalData->EEPROMThermalMeter) if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G)) ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); else { switch (TxRate) { case MGN_VHT2SS_MCS9: case MGN_VHT1SS_MCS9: case MGN_VHT1SS_MCS8: case MGN_MCS15: case MGN_MCS7: ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea44f); case MGN_VHT2SS_MCS8: case MGN_VHT1SS_MCS7: case MGN_MCS14: case MGN_MCS6: case MGN_54M: ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa44f); case MGN_VHT2SS_MCS7: case MGN_VHT2SS_MCS6: case MGN_VHT1SS_MCS6: case MGN_VHT1SS_MCS5: case MGN_MCS13: case MGN_MCS5: case MGN_48M: ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa630); break; case MGN_VHT2SS_MCS5: case MGN_VHT2SS_MCS4: case MGN_VHT1SS_MCS4: case MGN_VHT1SS_MCS3: case MGN_MCS12: case MGN_MCS4: case MGN_MCS3: case MGN_36M: case MGN_24M: ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa730); break; case MGN_VHT2SS_MCS3: case MGN_VHT2SS_MCS2: case MGN_VHT2SS_MCS1: case MGN_VHT1SS_MCS2: case MGN_VHT1SS_MCS1: case MGN_MCS11: case MGN_MCS10: case MGN_MCS9: case MGN_MCS2: case MGN_MCS1: case MGN_18M: case MGN_12M: ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa830); break; case MGN_VHT2SS_MCS0: case MGN_VHT1SS_MCS0: case MGN_MCS0: case MGN_MCS8: case MGN_9M: case MGN_6M: ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f); break; default: ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); break; } } } } else { ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); } } else ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA Turbo on: EDCA_BE:0x%lx\n",EDCA_BE)); pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = TRUE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA_BE_DL : 0x%lx EDCA_BE_UL : 0x%lx EDCA_BE : 0x%lx \n",EDCA_BE_DL,EDCA_BE_UL,EDCA_BE)); } else { // Turn Off EDCA turbo here. // Restore original EDCA according to the declaration of AP. if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) { Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, GET_WMM_PARAM_ELE_SINGLE_AC_PARAM(pStaQos->WMMParamEle, AC0_BE) ); pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Restore EDCA BE: 0x%lx \n",pDM_Odm->WMMEDCA_BE)); } } } //check if edca turbo is disabled BOOLEAN odm_IsEdcaTurboDisable( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PADAPTER Adapter = pDM_Odm->Adapter; PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; u4Byte IOTPeer=pMgntInfo->IOTPeer; if(pDM_Odm->bBtDisableEdcaTurbo) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable for BT!!\n")); return TRUE; } if((!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO ))|| (pDM_Odm->bWIFITest)|| (IOTPeer>= HT_IOT_PEER_MAX)) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable\n")); return TRUE; } // 1. We do not turn on EDCA turbo mode for some AP that has IOT issue // 2. User may disable EDCA Turbo mode with OID settings. if(pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO){ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("IOTAction:EdcaTurboDisable\n")); return TRUE; } return FALSE; } //add iot case here: for MP/CE VOID ODM_EdcaParaSelByIot( IN PVOID pDM_VOID, OUT u4Byte *EDCA_BE_UL, OUT u4Byte *EDCA_BE_DL ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u4Byte IOTPeer=0; u4Byte ICType=pDM_Odm->SupportICType; u1Byte WirelessMode=0xFF; //invalid value u4Byte RFType=pDM_Odm->RFType; u4Byte IOTPeerSubType=0; PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE; if(pDM_Odm->pWirelessMode!=NULL) WirelessMode=*(pDM_Odm->pWirelessMode); /////////////////////////////////////////////////////////// ////list paramter for different platform IOTPeer=pMgntInfo->IOTPeer; IOTPeerSubType=pMgntInfo->IOTPeerSubtype; GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus); if(ICType==ODM_RTL8192D) { // Single PHY if(pDM_Odm->RFType==ODM_2T2R) { (*EDCA_BE_UL) = 0x60a42b; //0x5ea42b; (*EDCA_BE_DL) = 0x60a42b; //0x5ea42b; } else { (*EDCA_BE_UL) = 0x6ea42b; (*EDCA_BE_DL) = 0x6ea42b; } } ////============================ /// IOT case for MP ////============================ else { if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE){ if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) { (*EDCA_BE_UL) = 0x60a42b; (*EDCA_BE_DL) = 0x60a42b; } else { (*EDCA_BE_UL) = 0x6ea42b; (*EDCA_BE_DL) = 0x6ea42b; } } } if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY) { (*EDCA_BE_UL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[ExtAdapter->MgntInfo.IOTPeer]; (*EDCA_BE_DL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[ExtAdapter->MgntInfo.IOTPeer]; } #if (INTEL_PROXIMITY_SUPPORT == 1) if(pMgntInfo->IntelClassModeInfo.bEnableCA == TRUE) { (*EDCA_BE_UL) = (*EDCA_BE_DL) = 0xa44f; } else #endif { if((pMgntInfo->IOTAction & (HT_IOT_ACT_FORCED_ENABLE_BE_TXOP|HT_IOT_ACT_AMSDU_ENABLE))) {// To check whether we shall force turn on TXOP configuration. if(!((*EDCA_BE_UL) & 0xffff0000)) (*EDCA_BE_UL) |= 0x005e0000; // Force TxOP limit to 0x005e for UL. if(!((*EDCA_BE_DL) & 0xffff0000)) (*EDCA_BE_DL) |= 0x005e0000; // Force TxOP limit to 0x005e for DL. } //92D txop can't be set to 0x3e for cisco1250 if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) { (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; (*EDCA_BE_UL) = edca_setting_UL[IOTPeer]; } //merge from 92s_92c_merge temp brunch v2445 20120215 else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B))) { (*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer]; } else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A))) { (*EDCA_BE_DL) = 0xa630; } else if(IOTPeer == HT_IOT_PEER_MARVELL) { (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; (*EDCA_BE_UL) = edca_setting_UL[IOTPeer]; } else if(IOTPeer == HT_IOT_PEER_ATHEROS) { // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. if(WirelessMode==ODM_WM_G) (*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer]; else (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; if(ICType == ODM_RTL8821) (*EDCA_BE_DL) = 0x5ea630; } } if((ICType == ODM_RTL8192D)&&(IOTPeerSubType == HT_IOT_PEER_LINKSYS_E4200_V1)&&((WirelessMode==ODM_WM_N5G))) { (*EDCA_BE_DL) = 0x432b; (*EDCA_BE_UL) = 0x432b; } if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8192E)) //add 8812AU/8812AE { (*EDCA_BE_UL) = 0x5ea42b; (*EDCA_BE_DL) = 0x5ea42b; ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx",(*EDCA_BE_UL),(*EDCA_BE_DL))); } // Revised for Atheros DIR-655 IOT issue to improve down link TP, added by Roger, 2013.03.22. if((ICType == ODM_RTL8723A) && (IOTPeerSubType== HT_IOT_PEER_ATHEROS_DIR655) && (pMgntInfo->dot11CurrentChannelNumber == 6)) { (*EDCA_BE_DL) = 0xa92b; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Special: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx",(*EDCA_BE_UL),(*EDCA_BE_DL))); } VOID odm_EdcaChooseTrafficIdx( IN PVOID pDM_VOID, IN u8Byte cur_tx_bytes, IN u8Byte cur_rx_bytes, IN BOOLEAN bBiasOnRx, OUT BOOLEAN *pbIsCurRDLState ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; if(bBiasOnRx) { if(cur_tx_bytes>(cur_rx_bytes*4)) { *pbIsCurRDLState=FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Uplink Traffic\n ")); } else { *pbIsCurRDLState=TRUE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n")); } } else { if(cur_rx_bytes>(cur_tx_bytes*4)) { *pbIsCurRDLState=TRUE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Downlink Traffic\n")); } else { *pbIsCurRDLState=FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n")); } } return ; } #endif #if((DM_ODM_SUPPORT_TYPE==ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) void odm_EdcaParaInit( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; prtl8192cd_priv priv = pDM_Odm->priv; int mode=priv->pmib->dot11BssType.net_work_type; static unsigned int slot_time, sifs_time; struct ParaRecord EDCA[4]; memset(EDCA, 0, 4*sizeof(struct ParaRecord)); sifs_time = 10; slot_time = 20; if (mode & (ODM_WM_N24G|ODM_WM_N5G)) sifs_time = 16; if (mode & (ODM_WM_N24G|ODM_WM_N5G| ODM_WM_G|ODM_WM_A)) slot_time = 9; #ifdef RTK_AC_SUPPORT //for 11ac logo, edit aifs time for cca test cases if(AC_SIGMA_MODE != AC_SIGMA_NONE) sifs_time = 10; #endif #if((defined(RTL_MANUAL_EDCA))&&(DM_ODM_SUPPORT_TYPE==ODM_AP)) if( priv->pmib->dot11QosEntry.ManualEDCA ) { if( OPMODE & WIFI_AP_STATE ) memcpy(EDCA, priv->pmib->dot11QosEntry.AP_manualEDCA, 4*sizeof(struct ParaRecord)); else memcpy(EDCA, priv->pmib->dot11QosEntry.STA_manualEDCA, 4*sizeof(struct ParaRecord)); #ifdef WIFI_WMM if (QOS_ENABLE) ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[VI].TXOPlimit<< 16) | (EDCA[VI].ECWmax<< 12) | (EDCA[VI].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); else #endif ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BE].TXOPlimit<< 16) | (EDCA[BE].ECWmax<< 12) | (EDCA[BE].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); }else #endif //RTL_MANUAL_EDCA { if(OPMODE & WIFI_AP_STATE) { memcpy(EDCA, rtl_ap_EDCA, 2*sizeof(struct ParaRecord)); if(mode & (ODM_WM_A|ODM_WM_G|ODM_WM_N24G|ODM_WM_N5G)) memcpy(&EDCA[VI], &rtl_ap_EDCA[VI_AG], 2*sizeof(struct ParaRecord)); else memcpy(&EDCA[VI], &rtl_ap_EDCA[VI], 2*sizeof(struct ParaRecord)); } else { memcpy(EDCA, rtl_sta_EDCA, 2*sizeof(struct ParaRecord)); if(mode & (ODM_WM_A|ODM_WM_G|ODM_WM_N24G|ODM_WM_N5G)) memcpy(&EDCA[VI], &rtl_sta_EDCA[VI_AG], 2*sizeof(struct ParaRecord)); else memcpy(&EDCA[VI], &rtl_sta_EDCA[VI], 2*sizeof(struct ParaRecord)); } #ifdef WIFI_WMM if (QOS_ENABLE) ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[VI].TXOPlimit<< 16) | (EDCA[VI].ECWmax<< 12) | (EDCA[VI].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); else #endif #if (DM_ODM_SUPPORT_TYPE==ODM_AP) ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); #elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL) ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + 2* slot_time)); #endif } ODM_Write4Byte(pDM_Odm, ODM_EDCA_VO_PARAM, (EDCA[VO].TXOPlimit<< 16) | (EDCA[VO].ECWmax<< 12) | (EDCA[VO].ECWmin<< 8) | (sifs_time + EDCA[VO].AIFSN* slot_time)); ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (EDCA[BE].TXOPlimit<< 16) | (EDCA[BE].ECWmax<< 12) | (EDCA[BE].ECWmin<< 8) | (sifs_time + EDCA[BE].AIFSN* slot_time)); ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, (EDCA[BK].TXOPlimit<< 16) | (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + EDCA[BK].AIFSN* slot_time)); #if defined(RTK_AC_SUPPORT) && defined(RTL_MANUAL_EDCA) //for 11ac logo, make BK worse to seperate with BE. if((AC_SIGMA_MODE != AC_SIGMA_NONE) && (priv->pmib->dot11QosEntry.ManualEDCA)) { ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, (EDCA[BK].TXOPlimit<< 16) | (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | 0xa4 ); } #endif // ODM_Write1Byte(pDM_Odm,ACMHWCTRL, 0x00); priv->pshare->iot_mode_enable = 0; #if(DM_ODM_SUPPORT_TYPE==ODM_AP) if (priv->pshare->rf_ft_var.wifi_beq_iot) priv->pshare->iot_mode_VI_exist = 0; #ifdef WMM_VIBE_PRI priv->pshare->iot_mode_BE_exist = 0; #endif #ifdef WMM_BEBK_PRI priv->pshare->iot_mode_BK_exist = 0; #endif #ifdef LOW_TP_TXOP priv->pshare->BE_cwmax_enhance = 0; #endif #elif (DM_ODM_SUPPORT_TYPE==ODM_ADSL) priv->pshare->iot_mode_BE_exist = 0; #endif priv->pshare->iot_mode_VO_exist = 0; } BOOLEAN ODM_ChooseIotMainSTA( IN PVOID pDM_VOID, IN PSTA_INFO_T pstat ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; prtl8192cd_priv priv = pDM_Odm->priv; BOOLEAN bhighTP_found_pstat=FALSE; if ((GET_ROOT(priv)->up_time % 2) == 0) { unsigned int tx_2s_avg = 0; unsigned int rx_2s_avg = 0; int i=0, aggReady=0; unsigned long total_sum = (priv->pshare->current_tx_bytes+priv->pshare->current_rx_bytes); int assoc_num = GET_ROOT(priv)->assoc_num; #ifdef MBSSID if (GET_ROOT(priv)->pmib->miscEntry.vap_enable){ for (i=0; ipvap_priv[i]-> assoc_num; } #endif #ifdef UNIVERSAL_REPEATER if (IS_DRV_OPEN(GET_VXD_PRIV(GET_ROOT(priv)))) assoc_num += GET_VXD_PRIV(GET_ROOT(priv))-> assoc_num; #endif #ifdef WDS if(GET_ROOT(priv)->pmib->dot11WdsInfo.wdsEnabled) assoc_num ++; #endif pstat->current_tx_bytes += pstat->tx_byte_cnt; pstat->current_rx_bytes += pstat->rx_byte_cnt; if (total_sum != 0) { if (total_sum <= 1000000) { tx_2s_avg = (unsigned int)((pstat->current_tx_bytes*100) / total_sum); rx_2s_avg = (unsigned int)((pstat->current_rx_bytes*100) / total_sum); } else { tx_2s_avg = (unsigned int)(pstat->current_tx_bytes / (total_sum / 100)); rx_2s_avg = (unsigned int)(pstat->current_rx_bytes / (total_sum / 100)); } } #if(DM_ODM_SUPPORT_TYPE==ODM_ADSL) if (pstat->ht_cap_len) { if ((tx_2s_avg + rx_2s_avg) >=25 ) {//50// priv->pshare->highTP_found_pstat = pstat; bhighTP_found_pstat=TRUE; } } #elif(DM_ODM_SUPPORT_TYPE==ODM_AP) for(i=0; i<8; i++) aggReady += (pstat->ADDBA_ready[i]); if ((pstat->ht_cap_len && ( #ifdef SUPPORT_TX_AMSDU AMSDU_ENABLE || #endif aggReady)) || (pstat->IOTPeer==HT_IOT_PEER_INTEL)) { if ((assoc_num==1) || (tx_2s_avg + rx_2s_avg >= 25)) { priv->pshare->highTP_found_pstat = pstat; } #ifdef CLIENT_MODE if (OPMODE & WIFI_STATION_STATE) { if ((tx_2s_avg + rx_2s_avg) >= 20) priv->pshare->highTP_found_pstat = pstat; } #endif } #endif } else { pstat->current_tx_bytes = pstat->tx_byte_cnt; pstat->current_rx_bytes = pstat->rx_byte_cnt; } return bhighTP_found_pstat; } #ifdef WIFI_WMM VOID ODM_IotEdcaSwitch( IN PVOID pDM_VOID, IN unsigned char enable ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; prtl8192cd_priv priv = pDM_Odm->priv; int mode=priv->pmib->dot11BssType.net_work_type; unsigned int slot_time = 20, sifs_time = 10, BE_TXOP = 47, VI_TXOP = 94; unsigned int vi_cw_max = 4, vi_cw_min = 3, vi_aifs; #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) u32 be_edca, vi_edca; u16 disable_cfe; #endif #if (DM_ODM_SUPPORT_TYPE==ODM_AP) if (!(!priv->pmib->dot11OperationEntry.wifi_specific || ((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific)) #ifdef CLIENT_MODE || ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific)) #endif )) return; #endif #ifdef RTK_AC_SUPPORT //for 11ac logo, do not dynamic switch edca if(AC_SIGMA_MODE != AC_SIGMA_NONE) return; #endif if ((mode & (ODM_WM_N24G|ODM_WM_N5G)) && (priv->pshare->ht_sta_num #ifdef WDS || ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11WdsInfo.wdsEnabled && priv->pmib->dot11WdsInfo.wdsNum) #endif )) sifs_time = 16; if (mode & (ODM_WM_N24G|ODM_WM_N5G|ODM_WM_G|ODM_WM_A)) { slot_time = 9; } else { BE_TXOP = 94; VI_TXOP = 188; } #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) vi_edca = -1; disable_cfe = -1; #endif #if (DM_ODM_SUPPORT_TYPE==ODM_ADSL) if (priv->pshare->iot_mode_VO_exist) { // to separate AC_VI and AC_BE to avoid using the same EDCA settings if (priv->pshare->iot_mode_BE_exist) { vi_cw_max = 5; vi_cw_min = 3; } else { vi_cw_max = 6; vi_cw_min = 4; } } vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time); #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) vi_edca = ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16)| (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs; #else ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16)| (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs); #endif #elif (DM_ODM_SUPPORT_TYPE==ODM_AP) if ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11OperationEntry.wifi_specific) { if (priv->pshare->iot_mode_VO_exist) { #ifdef WMM_VIBE_PRI if (priv->pshare->iot_mode_BE_exist) { vi_cw_max = 5; vi_cw_min = 3; vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time); } else #endif { vi_cw_max = 6; vi_cw_min = 4; vi_aifs = 0x2b; } } else { vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time); } #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) vi_edca = ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16) | (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs; #else ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16) | (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs); #endif #ifdef WMM_BEBK_PRI #ifdef CONFIG_RTL_88E_SUPPORT if ((GET_CHIP_VER(priv) == VERSION_8188E) && priv->pshare->iot_mode_BK_exist) { #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) be_edca = (10 << 12) | (6 << 8) | 0x4f; #else ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, (10 << 12) | (6 << 8) | 0x4f); #endif } #endif #endif #if defined(CONFIG_WLAN_HAL_8881A) if (GET_CHIP_VER(priv) == VERSION_8881A) ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, 0xa64f); #endif } #endif #if (DM_ODM_SUPPORT_TYPE==ODM_AP) if (priv->pshare->rf_ft_var.wifi_beq_iot && priv->pshare->iot_mode_VI_exist) { #if defined(CONFIG_RTL_88E_SUPPORT) || defined(CONFIG_RTL_8812_SUPPORT) if (GET_CHIP_VER(priv) == VERSION_8188E || GET_CHIP_VER(priv) == VERSION_8812E) { #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) be_edca = (10 << 12) | (6 << 8) | 0x4f; #else ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (10 << 12) | (6 << 8) | 0x4f); #endif } else #endif { #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) be_edca = (10 << 12) | (4 << 8) | 0x4f; #else ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (10 << 12) | (4 << 8) | 0x4f); #endif } } else if(!enable) #elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL) if(!enable) //if iot is disable ,maintain original BEQ PARAM #endif { #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) be_edca = (((OPMODE & WIFI_AP_STATE)?6:10) << 12) | (4 << 8) | (sifs_time + 3 * slot_time); disable_cfe = 1; #else ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (((OPMODE & WIFI_AP_STATE)?6:10) << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); #endif #ifdef CONFIG_PCI_HCI // ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) | (DIS_TXOP_CFE)); #endif } else { int txop; unsigned int cw_max; #ifdef LOW_TP_TXOP unsigned int txop_close; #endif #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP)) cw_max = ((priv->pshare->BE_cwmax_enhance) ? 10 : 6); txop_close = ((priv->pshare->rf_ft_var.low_tp_txop && priv->pshare->rf_ft_var.low_tp_txop_close) ? 1 : 0); if(priv->pshare->txop_enlarge == 0xe) //if intel case txop = (txop_close ? 0 : (BE_TXOP*2)); else //if other case txop = (txop_close ? 0: (BE_TXOP*priv->pshare->txop_enlarge)); #else cw_max=6; if((priv->pshare->txop_enlarge==0xe)||(priv->pshare->txop_enlarge==0xd)) txop=BE_TXOP*2; else txop=BE_TXOP*priv->pshare->txop_enlarge; #endif if (priv->pshare->ht_sta_num #ifdef WDS || ((OPMODE & WIFI_AP_STATE) && (mode & (ODM_WM_N24G|ODM_WM_N5G)) && priv->pmib->dot11WdsInfo.wdsEnabled && priv->pmib->dot11WdsInfo.wdsNum) #endif ) { if (priv->pshare->txop_enlarge == 0xe) { // is intel client, use a different edca value //ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop<< 16) | (cw_max<< 12) | (4 << 8) | 0x1f); if (pDM_Odm->RFType==ODM_1T1R) { #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) be_edca = (txop << 16) | (5 << 12) | (3 << 8) | 0x1f; #else ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (5 << 12) | (3 << 8) | 0x1f); #endif } else { #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) be_edca = (txop << 16) | (8 << 12) | (5 << 8) | 0x1f; #else ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (8 << 12) | (5 << 8) | 0x1f); #endif } #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) disable_cfe = 0; #endif #ifdef CONFIG_PCI_HCI // ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) & ~(DIS_TXOP_CFE)); #endif priv->pshare->txop_enlarge = 2; } #if(DM_ODM_SUPPORT_TYPE==ODM_AP) #ifndef LOW_TP_TXOP else if (priv->pshare->txop_enlarge == 0xd) { // is intel ralink, use a different edca value #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) be_edca = (txop << 16) | (6 << 12) | (5 << 8) | 0x2b; #else ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (6 << 12) | (5 << 8) | 0x2b); #endif priv->pshare->txop_enlarge = 2; } #endif #endif else { // if (txop == 0) { //#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) // disable_cfe = 1; //#endif //#ifdef CONFIG_PCI_HCI // ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) | (DIS_TXOP_CFE)); //#endif // } if (pDM_Odm->RFType==ODM_2T2R) { #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) be_edca = (txop << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time); #else ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); #endif } else #if(DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP) { #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) be_edca = (txop << 16) | (((priv->pshare->BE_cwmax_enhance) ? 10 : 5) << 12) | (3 << 8) | (sifs_time + 2 * slot_time); #else ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (((priv->pshare->BE_cwmax_enhance) ? 10 : 5) << 12) | (3 << 8) | (sifs_time + 2 * slot_time)); #endif } #else { PSTA_INFO_T pstat = priv->pshare->highTP_found_pstat; if ((GET_CHIP_VER(priv)==VERSION_8881A) && pstat && (pstat->IOTPeer == HT_IOT_PEER_HTC)) ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, 0x642b); else { #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) be_edca = (txop << 16) | (5 << 12) | (3 << 8) | (sifs_time + 2 * slot_time); #else ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (5 << 12) | (3 << 8) | (sifs_time + 2 * slot_time)); #endif } } #endif } } else { #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP)) #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) be_edca = (BE_TXOP << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time); #else ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); #endif #else #if defined(CONFIG_RTL_8196D) || defined(CONFIG_RTL_8197DL) || defined(CONFIG_RTL_8196E) || (defined(CONFIG_RTL_8197D) && !defined(CONFIG_PORT0_EXT_GIGA)) #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) be_edca = (BE_TXOP*2 << 16) | (cw_max << 12) | (5 << 8) | (sifs_time + 3 * slot_time); #else ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP*2 << 16) | (cw_max << 12) | (5 << 8) | (sifs_time + 3 * slot_time)); #endif #else #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) be_edca = (BE_TXOP*2 << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time); #else ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP*2 << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); #endif #endif /* if (priv->pshare->txop_enlarge == 0xe) { #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) disable_cfe = 0; #endif #ifdef CONFIG_PCI_HCI ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) & ~(DIS_TXOP_CFE)); #endif } else { #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) disable_cfe = 1; #endif #ifdef CONFIG_PCI_HCI ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) | (DIS_TXOP_CFE)); #endif } */ #endif } } #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) notify_IOT_EDCA_switch(priv, be_edca, vi_edca, disable_cfe); #endif } #endif VOID odm_IotEngine( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; struct rtl8192cd_priv *priv=pDM_Odm->priv; PSTA_INFO_T pstat = NULL; u4Byte i; #ifdef WIFI_WMM unsigned int switch_turbo = 0, avg_tp; #endif //////////////////////////////////////////////////////// // if EDCA Turbo function is not supported or Manual EDCA Setting // then return //////////////////////////////////////////////////////// if(!(pDM_Odm->SupportAbility&ODM_MAC_EDCA_TURBO)){ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO NOT SUPPORTED\n")); return; } #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&& defined(RTL_MANUAL_EDCA) && defined(WIFI_WMM)) if(priv->pmib->dot11QosEntry.ManualEDCA){ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO OFF: MANUAL SETTING\n")); return ; } #endif #if !(DM_ODM_SUPPORT_TYPE &ODM_AP) ////////////////////////////////////////////////////// //find high TP STA every 2s ////////////////////////////////////////////////////// if ((GET_ROOT(priv)->up_time % 2) == 0) priv->pshare->highTP_found_pstat==NULL; #if 0 phead = &priv->asoc_list; plist = phead->next; while(plist != phead) { pstat = list_entry(plist, struct stat_info, asoc_list); if(ODM_ChooseIotMainSTA(pDM_Odm, pstat)); //find the correct station break; if (plist == plist->next) //the last plist break; plist = plist->next; }; #endif //find highTP STA for(i=0; ipODM_StaInfo[i]; if(IS_STA_VALID(pstat) && (ODM_ChooseIotMainSTA(pDM_Odm, pstat))) //find the correct station break; } ////////////////////////////////////////////////////// //if highTP STA is not found, then return ////////////////////////////////////////////////////// if(priv->pshare->highTP_found_pstat==NULL) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO OFF: NO HT STA FOUND\n")); return; } #endif pstat=priv->pshare->highTP_found_pstat; if(pstat) { if((pstat->tx_avarage + pstat->rx_avarage) < (1<<17)) // 1M bps pstat = NULL; } #ifdef WIFI_WMM if (QOS_ENABLE) { if (!priv->pmib->dot11OperationEntry.wifi_specific #if(DM_ODM_SUPPORT_TYPE==ODM_AP) ||((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific)) #elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL) || (priv->pmib->dot11OperationEntry.wifi_specific == 2) #endif ) { if (priv->pshare->iot_mode_enable && ((priv->pshare->phw->VO_pkt_count > 50) || (priv->pshare->phw->VI_pkt_count > 50) || (priv->pshare->phw->BK_pkt_count > 50))) { priv->pshare->iot_mode_enable = 0; switch_turbo++; #ifdef CONFIG_WLAN_HAL_8881A if (GET_CHIP_VER(priv) == VERSION_8881A) { RTL_W32(0x460, 0x03086666); } #endif //CONFIG_WLAN_HAL_8881A } else if ((!priv->pshare->iot_mode_enable) && ((priv->pshare->phw->VO_pkt_count < 50) && (priv->pshare->phw->VI_pkt_count < 50) && (priv->pshare->phw->BK_pkt_count < 50))) { priv->pshare->iot_mode_enable++; switch_turbo++; //#ifdef CONFIG_WLAN_HAL_8881A #if 0 if (GET_CHIP_VER(priv) == VERSION_8881A) { if (get_bonding_type_8881A()==BOND_8881AB) { RTL_W32(0x460, 0x03086666); } else { RTL_W32(0x460, 0x0320ffff); } } #endif //CONFIG_WLAN_HAL_8881A } } #if(DM_ODM_SUPPORT_TYPE==ODM_AP) if ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11OperationEntry.wifi_specific) #elif (DM_ODM_SUPPORT_TYPE==ODM_ADSL) if (priv->pmib->dot11OperationEntry.wifi_specific) #endif { if (!priv->pshare->iot_mode_VO_exist && (priv->pshare->phw->VO_pkt_count > 50)) { priv->pshare->iot_mode_VO_exist++; switch_turbo++; } else if (priv->pshare->iot_mode_VO_exist && (priv->pshare->phw->VO_pkt_count < 50)) { priv->pshare->iot_mode_VO_exist = 0; switch_turbo++; } #if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_VIBE_PRI))) if (priv->pshare->iot_mode_VO_exist) { //printk("[%s %d] BE_pkt_count=%d\n", __FUNCTION__, __LINE__, priv->pshare->phw->BE_pkt_count); if (!priv->pshare->iot_mode_BE_exist && (priv->pshare->phw->BE_pkt_count > 250)) { priv->pshare->iot_mode_BE_exist++; switch_turbo++; } else if (priv->pshare->iot_mode_BE_exist && (priv->pshare->phw->BE_pkt_count < 250)) { priv->pshare->iot_mode_BE_exist = 0; switch_turbo++; } } #endif #if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_BEBK_PRI))) if (priv->pshare->phw->BE_pkt_count) { //printk("[%s %d] BK_pkt_count=%d\n", __FUNCTION__, __LINE__, priv->pshare->phw->BK_pkt_count); if (!priv->pshare->iot_mode_BK_exist && (priv->pshare->phw->BK_pkt_count > 250)) { priv->pshare->iot_mode_BK_exist++; switch_turbo++; } else if (priv->pshare->iot_mode_BK_exist && (priv->pshare->phw->BK_pkt_count < 250)) { priv->pshare->iot_mode_BK_exist = 0; switch_turbo++; } } #endif #if (DM_ODM_SUPPORT_TYPE==ODM_AP) if (priv->pshare->rf_ft_var.wifi_beq_iot) { if (!priv->pshare->iot_mode_VI_exist && (priv->pshare->phw->VI_rx_pkt_count > 50)) { priv->pshare->iot_mode_VI_exist++; switch_turbo++; } else if (priv->pshare->iot_mode_VI_exist && (priv->pshare->phw->VI_rx_pkt_count < 50)) { priv->pshare->iot_mode_VI_exist = 0; switch_turbo++; } } #endif } else if (!pstat || pstat->rssi < priv->pshare->rf_ft_var.txop_enlarge_lower) { if (priv->pshare->txop_enlarge) { priv->pshare->txop_enlarge = 0; if (priv->pshare->iot_mode_enable) switch_turbo++; } } #if(defined(CLIENT_MODE) && (DM_ODM_SUPPORT_TYPE==ODM_AP)) if ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific)) { if (priv->pshare->iot_mode_enable && (((priv->pshare->phw->VO_pkt_count > 50) || (priv->pshare->phw->VI_pkt_count > 50) || (priv->pshare->phw->BK_pkt_count > 50)) || (pstat && (!pstat->ADDBA_ready[0]) & (!pstat->ADDBA_ready[3])))) { priv->pshare->iot_mode_enable = 0; switch_turbo++; } else if ((!priv->pshare->iot_mode_enable) && (((priv->pshare->phw->VO_pkt_count < 50) && (priv->pshare->phw->VI_pkt_count < 50) && (priv->pshare->phw->BK_pkt_count < 50)) && (pstat && (pstat->ADDBA_ready[0] | pstat->ADDBA_ready[3])))) { priv->pshare->iot_mode_enable++; switch_turbo++; } } #endif priv->pshare->phw->VO_pkt_count = 0; priv->pshare->phw->VI_pkt_count = 0; priv->pshare->phw->BK_pkt_count = 0; #if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_VIBE_PRI))) priv->pshare->phw->BE_pkt_count = 0; #endif #if(DM_ODM_SUPPORT_TYPE==ODM_AP) if (priv->pshare->rf_ft_var.wifi_beq_iot) priv->pshare->phw->VI_rx_pkt_count = 0; #endif } #endif if ((priv->up_time % 2) == 0) { /* * decide EDCA content for different chip vendor */ #ifdef WIFI_WMM #if(DM_ODM_SUPPORT_TYPE==ODM_ADSL) if (QOS_ENABLE && (!priv->pmib->dot11OperationEntry.wifi_specific || (priv->pmib->dot11OperationEntry.wifi_specific == 2) #elif(DM_ODM_SUPPORT_TYPE==ODM_AP) if (QOS_ENABLE && (!priv->pmib->dot11OperationEntry.wifi_specific || ((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) #ifdef CLIENT_MODE || ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) #endif #endif )) { if (pstat && pstat->rssi >= priv->pshare->rf_ft_var.txop_enlarge_upper) { #ifdef LOW_TP_TXOP if (pstat->IOTPeer==HT_IOT_PEER_INTEL) { if (priv->pshare->txop_enlarge != 0xe) { priv->pshare->txop_enlarge = 0xe; if (priv->pshare->iot_mode_enable) switch_turbo++; } } else if (priv->pshare->txop_enlarge != 2) { priv->pshare->txop_enlarge = 2; if (priv->pshare->iot_mode_enable) switch_turbo++; } #else if (priv->pshare->txop_enlarge != 2) { if (pstat->IOTPeer==HT_IOT_PEER_INTEL) priv->pshare->txop_enlarge = 0xe; else if (pstat->IOTPeer==HT_IOT_PEER_RALINK) priv->pshare->txop_enlarge = 0xd; else if (pstat->IOTPeer==HT_IOT_PEER_HTC) priv->pshare->txop_enlarge = 0; else priv->pshare->txop_enlarge = 2; if (priv->pshare->iot_mode_enable) switch_turbo++; } #endif } else if (!pstat || pstat->rssi < priv->pshare->rf_ft_var.txop_enlarge_lower) { if (priv->pshare->txop_enlarge) { priv->pshare->txop_enlarge = 0; if (priv->pshare->iot_mode_enable) switch_turbo++; } } #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&( defined LOW_TP_TXOP)) // for Intel IOT, need to enlarge CW MAX from 6 to 10 if (pstat && pstat->IOTPeer==HT_IOT_PEER_INTEL && (((pstat->tx_avarage+pstat->rx_avarage)>>10) < priv->pshare->rf_ft_var.cwmax_enhance_thd)) { if (!priv->pshare->BE_cwmax_enhance && priv->pshare->iot_mode_enable) { priv->pshare->BE_cwmax_enhance = 1; switch_turbo++; } } else { if (priv->pshare->BE_cwmax_enhance) { priv->pshare->BE_cwmax_enhance = 0; switch_turbo++; } } #endif } #endif priv->pshare->current_tx_bytes = 0; priv->pshare->current_rx_bytes = 0; }else { if ((GET_CHIP_VER(priv) == VERSION_8881A)||(GET_CHIP_VER(priv) == VERSION_8192E)|| (GET_CHIP_VER(priv) == VERSION_8188E) ){ unsigned int uldl_tp = (priv->pshare->current_tx_bytes+priv->pshare->current_rx_bytes)>>17; if((uldl_tp > 40) && (priv->pshare->agg_to!= 1)) { RTL_W8(0x462, 0x08); priv->pshare->agg_to = 1; } else if((uldl_tp < 35) && (priv->pshare->agg_to !=0)) { RTL_W8(0x462, 0x02); priv->pshare->agg_to = 0; } } } #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&& defined( SW_TX_QUEUE)) if(AMPDU_ENABLE) { #ifdef TX_EARLY_MODE if (GET_TX_EARLY_MODE) { if (!GET_EM_SWQ_ENABLE && ((priv->assoc_num > 1) || (pstat && pstat->IOTPeer != HT_IOT_PEER_UNKNOWN))) { if ((priv->pshare->em_tx_byte_cnt >> 17) > EM_TP_UP_BOUND) priv->pshare->reach_tx_limit_cnt++; else priv->pshare->reach_tx_limit_cnt = 0; if (priv->pshare->txop_enlarge && priv->pshare->reach_tx_limit_cnt) { //>= WAIT_TP_TIME// GET_EM_SWQ_ENABLE = 1; priv->pshare->reach_tx_limit_cnt = 0; if (pstat->IOTPeer == HT_IOT_PEER_INTEL) MAX_EM_QUE_NUM = 12; else if (pstat->IOTPeer == HT_IOT_PEER_RALINK) MAX_EM_QUE_NUM = 10; enable_em(priv); } } else if (GET_EM_SWQ_ENABLE) { if ((priv->pshare->em_tx_byte_cnt >> 17) < EM_TP_LOW_BOUND) priv->pshare->reach_tx_limit_cnt++; else priv->pshare->reach_tx_limit_cnt = 0; if (!priv->pshare->txop_enlarge || priv->pshare->reach_tx_limit_cnt >= WAIT_TP_TIME) { GET_EM_SWQ_ENABLE = 0; priv->pshare->reach_tx_limit_cnt = 0; disable_em(priv); } } } #endif #if defined(CONFIG_WLAN_HAL_8881A) || defined(CONFIG_WLAN_HAL_8192EE) || defined(CONFIG_RTL_8812_SUPPORT) || defined(CONFIG_WLAN_HAL_8814AE) if (pDM_Odm->SupportICType == ODM_RTL8881A || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8814A) { if (priv->assoc_num > 9) { if (priv->swq_txmac_chg >= priv->pshare->rf_ft_var.swq_en_highthd){ if ((priv->swq_decision == 0)){ switch_turbo++; if (priv->pshare->txop_enlarge == 0) priv->pshare->txop_enlarge = 2; priv->swq_decision = 1; } else { if ((switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0)) { priv->pshare->txop_enlarge = 2; switch_turbo--; } } } else if(priv->swq_txmac_chg <= priv->pshare->rf_ft_var.swq_dis_lowthd){ priv->swq_decision = 0; } else if ((priv->swq_decision == 1) && (switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0)) { priv->pshare->txop_enlarge = 2; switch_turbo--; } } else { priv->swq_decision = 0; } } else if(CONFIG_WLAN_NOT_HAL_EXIST) #endif { if (priv->assoc_num > 1) { if (priv->swq_txmac_chg >= priv->pshare->rf_ft_var.swq_en_highthd){ if ((priv->swq_decision == 0)){ switch_turbo++; if (priv->pshare->txop_enlarge == 0) priv->pshare->txop_enlarge = 2; priv->swq_decision = 1; } else { if ((switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0)) { priv->pshare->txop_enlarge = 2; switch_turbo--; } } } else if(priv->swq_txmac_chg <= priv->pshare->rf_ft_var.swq_dis_lowthd){ priv->swq_decision = 0; } else if ((priv->swq_decision == 1) && (switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0)) { priv->pshare->txop_enlarge = 2; switch_turbo--; } } //#if (defined CONFIG_RTL_819XD)) else if (priv->assoc_num == 1 && (priv->up_time % 2 == 0) #if (DM_ODM_SUPPORT_TYPE==ODM_AP) && defined(TX_EARLY_MODE) && (!GET_TX_EARLY_MODE || !GET_EM_SWQ_ENABLE) #endif ) { if ((pstat) && (pstat->ADDBA_ready[0] | pstat->ADDBA_ready[3])) { //int en_thd = 14417920>>(priv->up_time % 2); avg_tp = (pstat->current_tx_bytes >> 17); //if ((priv->swq_decision == 0) && (pstat->current_tx_bytes > en_thd) && (pstat->current_rx_bytes > en_thd) ) { //50Mbps if ((priv->swq_decision == 0) && (avg_tp > TP_HIGH_WATER_MARK)) { //55Mbps //printk("[%s:%d] swq_decision=1 current_tp: %d Mbps\n", __FUNCTION__, __LINE__, avg_tp); priv->swq_decision = 1; } //else if ((priv->swq_decision == 1) && ((pstat->tx_avarage < 4587520) || (pstat->rx_avarage < 4587520))) { //35Mbps else if ((priv->swq_decision == 1) && (avg_tp < TP_LOW_WATER_MARK)) { //35Mbps //printk("[%s:%d] swq_decision=0 current_tp: %d Mbps\n", __FUNCTION__, __LINE__, avg_tp); priv->swq_decision = 0; } } else { priv->swq_decision = 0; } } } if( (priv->swq_decision == 1) #if (DM_ODM_SUPPORT_TYPE==ODM_AP) && defined(TX_EARLY_MODE) || (GET_EM_SWQ_ENABLE == 1) #endif ) { priv->swq_en = 1; priv->swqen_keeptime = priv->up_time; } else { priv->swq_en = 0; priv->swqen_keeptime = 0; } } #endif #ifdef WIFI_WMM #ifdef LOW_TP_TXOP if ((!priv->pmib->dot11OperationEntry.wifi_specific || (priv->pmib->dot11OperationEntry.wifi_specific == 2)) && QOS_ENABLE) { if (switch_turbo || priv->pshare->rf_ft_var.low_tp_txop) { unsigned int thd_tp; unsigned char under_thd; unsigned int curr_tp; if (priv->pmib->dot11BssType.net_work_type & (ODM_WM_N24G|ODM_WM_N5G| ODM_WM_G)) { // Determine the upper bound throughput threshold. if (priv->pmib->dot11BssType.net_work_type & (ODM_WM_N24G|ODM_WM_N5G)) { if (priv->assoc_num && priv->assoc_num != priv->pshare->ht_sta_num) thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_g; else thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_n; } else thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_g; // Determine to close txop. #if defined(UNIVERSAL_REPEATER) || defined(MBSSID) if(IS_STA_VALID(pstat)) { struct rtl8192cd_priv *tmppriv; struct aid_obj *aidarray; aidarray = container_of(pstat, struct aid_obj, station); tmppriv = aidarray->priv; curr_tp = (unsigned int)(tmppriv->ext_stats.tx_avarage>>17) + (unsigned int)(tmppriv->ext_stats.rx_avarage>>17); } else #endif curr_tp = (unsigned int)(priv->ext_stats.tx_avarage>>17) + (unsigned int)(priv->ext_stats.rx_avarage>>17); if (curr_tp <= thd_tp && curr_tp >= priv->pshare->rf_ft_var.low_tp_txop_thd_low) under_thd = 1; else under_thd = 0; } else { under_thd = 0; } if (switch_turbo) { priv->pshare->rf_ft_var.low_tp_txop_close = under_thd; priv->pshare->rf_ft_var.low_tp_txop_count = 0; } else if (priv->pshare->iot_mode_enable && (priv->pshare->rf_ft_var.low_tp_txop_close != under_thd)) { priv->pshare->rf_ft_var.low_tp_txop_count++; if (priv->pshare->rf_ft_var.low_tp_txop_close) { priv->pshare->rf_ft_var.low_tp_txop_count = priv->pshare->rf_ft_var.low_tp_txop_delay; } if (priv->pshare->rf_ft_var.low_tp_txop_count ==priv->pshare->rf_ft_var.low_tp_txop_delay) { priv->pshare->rf_ft_var.low_tp_txop_count = 0; priv->pshare->rf_ft_var.low_tp_txop_close = under_thd; switch_turbo++; } } else { priv->pshare->rf_ft_var.low_tp_txop_count = 0; } } } #endif #ifdef WMM_DSCP_C42 if (switch_turbo) { if (!priv->pshare->iot_mode_enable && !priv->pshare->aggrmax_change) { RTL_W16(0x4ca, 0x0404); priv->pshare->aggrmax_change = 1; } else if (priv->pshare->iot_mode_enable && priv->pshare->aggrmax_change) { RTL_W16(0x4ca, priv->pshare->aggrmax_bak); priv->pshare->aggrmax_change = 0; } } #endif #ifdef TX_EARLY_MODE unsigned int em_tp = ((priv->ext_stats.tx_avarage>>17) + (priv->ext_stats.rx_avarage>>17)); if (em_tp > 80) ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (0x5e << 16) | (4 << 12) | (3 << 8) | 0x19); else //if (em_tp < 75) ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (0x5e << 16) | (6 << 12) | (5 << 8) | 0x2b); #endif if (switch_turbo) ODM_IotEdcaSwitch( pDM_Odm, priv->pshare->iot_mode_enable ); #endif } #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_EdcaTurboCheck.h000066400000000000000000000104741261122257400234500ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __PHYDMEDCATURBOCHECK_H__ #define __PHYDMEDCATURBOCHECK_H__ #define EDCATURBO_VERSION "1.0" typedef struct _EDCA_TURBO_ { BOOLEAN bCurrentTurboEDCA; BOOLEAN bIsCurRDLState; #if(DM_ODM_SUPPORT_TYPE == ODM_CE ) u4Byte prv_traffic_idx; // edca turbo #endif }EDCA_T,*pEDCA_T; #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) static u4Byte edca_setting_UL[HT_IOT_PEER_MAX] = // UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU MARVELL 92U_AP SELF_AP(DownLink/Tx) { 0x5e4322, 0xa44f, 0x5e4322, 0x5ea32b, 0x5ea422, 0x5ea322, 0x3ea430, 0x5ea42b, 0x5ea44f, 0x5e4322, 0x5e4322}; static u4Byte edca_setting_DL[HT_IOT_PEER_MAX] = // UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP(UpLink/Rx) { 0xa44f, 0x5ea44f, 0x5e4322, 0x5ea42b, 0xa44f, 0xa630, 0x5ea630, 0x5ea42b, 0xa44f, 0xa42b, 0xa42b}; static u4Byte edca_setting_DL_GMode[HT_IOT_PEER_MAX] = // UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP { 0x4322, 0xa44f, 0x5e4322, 0xa42b, 0x5e4322, 0x4322, 0xa42b, 0x5ea42b, 0xa44f, 0x5e4322, 0x5ea42b}; //============================================================ // EDCA Paramter for AP/ADSL by Mingzhi 2011-11-22 //============================================================ #elif (DM_ODM_SUPPORT_TYPE &ODM_ADSL) enum qos_prio { BK, BE, VI, VO, VI_AG, VO_AG }; static const struct ParaRecord rtl_ap_EDCA[] = { //ACM,AIFSN, ECWmin, ECWmax, TXOplimit {0, 7, 4, 10, 0}, //BK {0, 3, 4, 6, 0}, //BE {0, 1, 3, 4, 188}, //VI {0, 1, 2, 3, 102}, //VO {0, 1, 3, 4, 94}, //VI_AG {0, 1, 2, 3, 47}, //VO_AG }; static const struct ParaRecord rtl_sta_EDCA[] = { //ACM,AIFSN, ECWmin, ECWmax, TXOplimit {0, 7, 4, 10, 0}, {0, 3, 4, 10, 0}, {0, 2, 3, 4, 188}, {0, 2, 2, 3, 102}, {0, 2, 3, 4, 94}, {0, 2, 2, 3, 47}, }; #endif #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #ifdef WIFI_WMM VOID ODM_IotEdcaSwitch( IN PVOID pDM_VOID, IN unsigned char enable ); #endif BOOLEAN ODM_ChooseIotMainSTA( IN PVOID pDM_VOID, IN PSTA_INFO_T pstat ); #endif VOID odm_EdcaTurboCheck( IN PVOID pDM_VOID ); VOID ODM_EdcaTurboInit( IN PVOID pDM_VOID ); #if(DM_ODM_SUPPORT_TYPE==ODM_WIN) VOID odm_EdcaTurboCheckMP( IN PVOID pDM_VOID ); //check if edca turbo is disabled BOOLEAN odm_IsEdcaTurboDisable( IN PVOID pDM_VOID ); //choose edca paramter for special IOT case VOID ODM_EdcaParaSelByIot( IN PVOID pDM_VOID, OUT u4Byte *EDCA_BE_UL, OUT u4Byte *EDCA_BE_DL ); //check if it is UL or DL VOID odm_EdcaChooseTrafficIdx( IN PVOID pDM_VOID, IN u8Byte cur_tx_bytes, IN u8Byte cur_rx_bytes, IN BOOLEAN bBiasOnRx, OUT BOOLEAN *pbIsCurRDLState ); #elif (DM_ODM_SUPPORT_TYPE==ODM_CE) VOID odm_EdcaTurboCheckCE( IN PVOID pDM_VOID ); #else VOID odm_IotEngine( IN PVOID pDM_VOID ); VOID odm_EdcaParaInit( IN PVOID pDM_VOID ); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_HWConfig.c000066400000000000000000001702671261122257400223100ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // include files //============================================================ #include "Mp_Precomp.h" #include "phydm_precomp.h" #define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig_MP_##ic##txt(pDM_Odm)) #define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC_##ic##txt(pDM_Odm)) #if (TESTCHIP_SUPPORT == 1) #define READ_AND_CONFIG(ic, txt) do {\ if (pDM_Odm->bIsMPChip)\ READ_AND_CONFIG_MP(ic,txt);\ else\ READ_AND_CONFIG_TC(ic,txt);\ } while(0) #else #define READ_AND_CONFIG READ_AND_CONFIG_MP #endif #define READ_FIRMWARE_MP(ic, txt) (ODM_ReadFirmware_MP_##ic##txt(pDM_Odm, pFirmware, pSize)) #define READ_FIRMWARE_TC(ic, txt) (ODM_ReadFirmware_TC_##ic##txt(pDM_Odm, pFirmware, pSize)) #if (TESTCHIP_SUPPORT == 1) #define READ_FIRMWARE(ic, txt) do {\ if (pDM_Odm->bIsMPChip)\ READ_FIRMWARE_MP(ic,txt);\ else\ READ_FIRMWARE_TC(ic,txt);\ } while(0) #else #define READ_FIRMWARE READ_FIRMWARE_MP #endif #define GET_VERSION_MP(ic, txt) (ODM_GetVersion_MP_##ic##txt()) #define GET_VERSION_TC(ic, txt) (ODM_GetVersion_TC_##ic##txt()) #define GET_VERSION(ic, txt) (pDM_Odm->bIsMPChip?GET_VERSION_MP(ic,txt):GET_VERSION_TC(ic,txt)) u1Byte odm_QueryRxPwrPercentage( IN s1Byte AntPower ) { if ((AntPower <= -100) || (AntPower >= 20)) { return 0; } else if (AntPower >= 0) { return 100; } else { return (100+AntPower); } } #if (DM_ODM_SUPPORT_TYPE != ODM_WIN) // // 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. // IF other SW team do not support the feature, remove this section.?? // s4Byte odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo( IN OUT PDM_ODM_T pDM_Odm, s4Byte CurrSig ) { s4Byte RetSig = 0; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) //if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE) { // Step 1. Scale mapping. // 20100611 Joseph: Re-tunning RSSI presentation for Lenovo. // 20100426 Joseph: Modify Signal strength mapping. // This modification makes the RSSI indication similar to Intel solution. // 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE. if(CurrSig >= 54 && CurrSig <= 100) { RetSig = 100; } else if(CurrSig>=42 && CurrSig <= 53 ) { RetSig = 95; } else if(CurrSig>=36 && CurrSig <= 41 ) { RetSig = 74 + ((CurrSig - 36) *20)/6; } else if(CurrSig>=33 && CurrSig <= 35 ) { RetSig = 65 + ((CurrSig - 33) *8)/2; } else if(CurrSig>=18 && CurrSig <= 32 ) { RetSig = 62 + ((CurrSig - 18) *2)/15; } else if(CurrSig>=15 && CurrSig <= 17 ) { RetSig = 33 + ((CurrSig - 15) *28)/2; } else if(CurrSig>=10 && CurrSig <= 14 ) { RetSig = 39; } else if(CurrSig>=8 && CurrSig <= 9 ) { RetSig = 33; } else if(CurrSig <= 8 ) { RetSig = 19; } } #endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN) return RetSig; } s4Byte odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore( IN OUT PDM_ODM_T pDM_Odm, s4Byte CurrSig ) { s4Byte RetSig = 0; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) //if(pDM_Odm->SupportInterface == ODM_ITRF_USB) { // Netcore request this modification because 2009.04.13 SU driver use it. if(CurrSig >= 31 && CurrSig <= 100) { RetSig = 100; } else if(CurrSig >= 21 && CurrSig <= 30) { RetSig = 90 + ((CurrSig - 20) / 1); } else if(CurrSig >= 11 && CurrSig <= 20) { RetSig = 80 + ((CurrSig - 10) / 1); } else if(CurrSig >= 7 && CurrSig <= 10) { RetSig = 69 + (CurrSig - 7); } else if(CurrSig == 6) { RetSig = 54; } else if(CurrSig == 5) { RetSig = 45; } else if(CurrSig == 4) { RetSig = 36; } else if(CurrSig == 3) { RetSig = 27; } else if(CurrSig == 2) { RetSig = 18; } else if(CurrSig == 1) { RetSig = 9; } else { RetSig = CurrSig; } } #endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN) return RetSig; } s4Byte odm_SignalScaleMapping_92CSeries( IN OUT PDM_ODM_T pDM_Odm, IN s4Byte CurrSig ) { s4Byte RetSig = 0; #if (DEV_BUS_TYPE == RT_PCI_INTERFACE) if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE) { // Step 1. Scale mapping. if(CurrSig >= 61 && CurrSig <= 100) { RetSig = 90 + ((CurrSig - 60) / 4); } else if(CurrSig >= 41 && CurrSig <= 60) { RetSig = 78 + ((CurrSig - 40) / 2); } else if(CurrSig >= 31 && CurrSig <= 40) { RetSig = 66 + (CurrSig - 30); } else if(CurrSig >= 21 && CurrSig <= 30) { RetSig = 54 + (CurrSig - 20); } else if(CurrSig >= 5 && CurrSig <= 20) { RetSig = 42 + (((CurrSig - 5) * 2) / 3); } else if(CurrSig == 4) { RetSig = 36; } else if(CurrSig == 3) { RetSig = 27; } else if(CurrSig == 2) { RetSig = 18; } else if(CurrSig == 1) { RetSig = 9; } else { RetSig = CurrSig; } } #endif #if ((DEV_BUS_TYPE == RT_USB_INTERFACE) ||(DEV_BUS_TYPE == RT_SDIO_INTERFACE)) if((pDM_Odm->SupportInterface == ODM_ITRF_USB) || (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)) { if(CurrSig >= 51 && CurrSig <= 100) { RetSig = 100; } else if(CurrSig >= 41 && CurrSig <= 50) { RetSig = 80 + ((CurrSig - 40)*2); } else if(CurrSig >= 31 && CurrSig <= 40) { RetSig = 66 + (CurrSig - 30); } else if(CurrSig >= 21 && CurrSig <= 30) { RetSig = 54 + (CurrSig - 20); } else if(CurrSig >= 10 && CurrSig <= 20) { RetSig = 42 + (((CurrSig - 10) * 2) / 3); } else if(CurrSig >= 5 && CurrSig <= 9) { RetSig = 22 + (((CurrSig - 5) * 3) / 2); } else if(CurrSig >= 1 && CurrSig <= 4) { RetSig = 6 + (((CurrSig - 1) * 3) / 2); } else { RetSig = CurrSig; } } #endif return RetSig; } s4Byte odm_SignalScaleMapping( IN OUT PDM_ODM_T pDM_Odm, IN s4Byte CurrSig ) { if( (pDM_Odm->SupportPlatform == ODM_WIN) && (pDM_Odm->SupportInterface != ODM_ITRF_PCIE) && //USB & SDIO (pDM_Odm->PatchID==10))//pMgntInfo->CustomerID == RT_CID_819x_Netcore { return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(pDM_Odm,CurrSig); } else if( (pDM_Odm->SupportPlatform == ODM_WIN) && (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) && (pDM_Odm->PatchID==19))//pMgntInfo->CustomerID == RT_CID_819x_Lenovo) { return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(pDM_Odm, CurrSig); } else{ return odm_SignalScaleMapping_92CSeries(pDM_Odm,CurrSig); } } #endif static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo( IN PDM_ODM_T pDM_Odm, IN u1Byte isCCKrate, IN u1Byte PWDB_ALL, IN u1Byte path, IN u1Byte RSSI ) { u1Byte SQ = 0; #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) if(isCCKrate){ if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter)) { // // Expected signal strength and bars indication at Lenovo lab. 2013.04.11 // 802.11n, 802.11b, 802.11g only at channel 6 // // Attenuation (dB) OS Signal Bars RSSI by Xirrus (dBm) // 50 5 -52 // 55 5 -54 // 60 5 -55 // 65 5 -59 // 70 5 -63 // 75 5 -66 // 80 4 -72 // 85 3 -75 // 90 3 -80 // 95 2 -85 // 100 1 -89 // 102 1 -90 // 104 1 -91 // RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_CID_819x_Lenovo\n")); #if OS_WIN_FROM_WIN8(OS_VERSION) if(PWDB_ALL >= 50) SQ = 100; else if(PWDB_ALL >= 23 && PWDB_ALL < 50) SQ = 80; else if(PWDB_ALL >= 18 && PWDB_ALL < 23) SQ = 60; else if(PWDB_ALL >= 8 && PWDB_ALL < 18) SQ = 40; else SQ = 10; #else if(PWDB_ALL >= 34) SQ = 100; else if(PWDB_ALL >= 23 && PWDB_ALL < 34) SQ = 80; else if(PWDB_ALL >= 18 && PWDB_ALL < 23) SQ = 60; else if(PWDB_ALL >= 8 && PWDB_ALL < 18) SQ = 40; else SQ = 10; if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7 SQ = 20; #endif } else if(IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter)){ // // Expected signal strength and bars indication at Lenovo lab. 2013.04.11 // 802.11n, 802.11b, 802.11g only at channel 6 // // Attenuation (dB) OS Signal Bars RSSI by Xirrus (dBm) // 50 5 -49 // 55 5 -49 // 60 5 -50 // 65 5 -51 // 70 5 -52 // 75 5 -54 // 80 5 -55 // 85 4 -60 // 90 3 -63 // 95 3 -65 // 100 2 -67 // 102 2 -67 // 104 1 -70 // if(PWDB_ALL >= 50) SQ = 100; else if(PWDB_ALL >= 35 && PWDB_ALL < 50) SQ = 80; else if(PWDB_ALL >= 31 && PWDB_ALL < 35) SQ = 60; else if(PWDB_ALL >= 22 && PWDB_ALL < 31) SQ = 40; else if(PWDB_ALL >= 18 && PWDB_ALL < 22) SQ = 20; else SQ = 10; } else { if(PWDB_ALL >= 50) SQ = 100; else if(PWDB_ALL >= 35 && PWDB_ALL < 50) SQ = 80; else if(PWDB_ALL >= 22 && PWDB_ALL < 35) SQ = 60; else if(PWDB_ALL >= 18 && PWDB_ALL < 22) SQ = 40; else SQ = 10; } } else {//OFDM rate if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) || IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter)) { if(RSSI >= 45) SQ = 100; else if(RSSI >= 22 && RSSI < 45) SQ = 80; else if(RSSI >= 18 && RSSI < 22) SQ = 40; else SQ = 20; } else { if(RSSI >= 45) SQ = 100; else if(RSSI >= 22 && RSSI < 45) SQ = 80; else if(RSSI >= 18 && RSSI < 22) SQ = 40; else SQ = 20; } } RT_TRACE(COMP_DBG, DBG_TRACE, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ)); #endif return SQ; } static u1Byte odm_SQ_process_patch_RT_CID_819x_Acer( IN PDM_ODM_T pDM_Odm, IN u1Byte isCCKrate, IN u1Byte PWDB_ALL, IN u1Byte path, IN u1Byte RSSI ) { u1Byte SQ = 0; #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) if(isCCKrate){ RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_Acer\n")); #if OS_WIN_FROM_WIN8(OS_VERSION) if(PWDB_ALL >= 50) SQ = 100; else if(PWDB_ALL >= 35 && PWDB_ALL < 50) SQ = 80; else if(PWDB_ALL >= 30 && PWDB_ALL < 35) SQ = 60; else if(PWDB_ALL >= 25 && PWDB_ALL < 30) SQ = 40; else if(PWDB_ALL >= 20 && PWDB_ALL < 25) SQ = 20; else SQ = 10; #else if(PWDB_ALL >= 50) SQ = 100; else if(PWDB_ALL >= 35 && PWDB_ALL < 50) SQ = 80; else if(PWDB_ALL >= 30 && PWDB_ALL < 35) SQ = 60; else if(PWDB_ALL >= 25 && PWDB_ALL < 30) SQ = 40; else if(PWDB_ALL >= 20 && PWDB_ALL < 25) SQ = 20; else SQ = 10; if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7 SQ = 20; #endif } else {//OFDM rate if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) || IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter)) { if(RSSI >= 45) SQ = 100; else if(RSSI >= 22 && RSSI < 45) SQ = 80; else if(RSSI >= 18 && RSSI < 22) SQ = 40; else SQ = 20; } else { if(RSSI >= 35) SQ = 100; else if(RSSI >= 30 && RSSI < 35) SQ = 80; else if(RSSI >= 25 && RSSI < 30) SQ = 40; else SQ = 20; } } RT_TRACE(COMP_DBG, DBG_LOUD, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ)); #endif return SQ; } static u1Byte odm_EVMdbToPercentage( IN s1Byte Value ) { // // -33dB~0dB to 0%~99% // s1Byte ret_val; ret_val = Value; ret_val /= 2; //DbgPrint("Value=%d\n", Value); //ODM_RT_DISP(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C Value=%d / %x \n", ret_val, ret_val)); if(ret_val >= 0) ret_val = 0; if(ret_val <= -33) ret_val = -33; ret_val = 0 - ret_val; ret_val*=3; if(ret_val == 99) ret_val = 100; return(ret_val); } static u1Byte odm_EVMdbm_JaguarSeries( IN s1Byte Value ) { s1Byte ret_val = Value; // -33dB~0dB to 33dB ~ 0dB if(ret_val == -128) ret_val = 127; else if (ret_val < 0) ret_val = 0 - ret_val; ret_val = ret_val >> 1; return ret_val; } static u2Byte odm_Cfo( IN s1Byte Value ) { s2Byte ret_val; if (Value < 0) { ret_val = 0 - Value; ret_val = (ret_val << 1) + (ret_val >> 1) ; // *2.5~=312.5/2^7 ret_val = ret_val | BIT12; // set bit12 as 1 for negative cfo } else { ret_val = Value; ret_val = (ret_val << 1) + (ret_val>>1) ; // *2.5~=312.5/2^7 } return ret_val; } VOID odm_RxPhyStatus92CSeries_Parsing( IN OUT PDM_ODM_T pDM_Odm, OUT PODM_PHY_INFO_T pPhyInfo, IN pu1Byte pPhyStatus, IN PODM_PACKET_INFO_T pPktinfo ) { SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; u1Byte i, Max_spatial_stream; s1Byte rx_pwr[4], rx_pwr_all=0; u1Byte EVM, PWDB_ALL = 0, PWDB_ALL_BT; u1Byte RSSI, total_rssi=0; BOOLEAN isCCKrate=FALSE; u1Byte rf_rx_num = 0; u1Byte cck_highpwr = 0; u1Byte LNA_idx, VGA_idx; PPHY_STATUS_RPT_8192CD_T pPhyStaRpt = (PPHY_STATUS_RPT_8192CD_T)pPhyStatus; isCCKrate = (pPktinfo->DataRate <= DESC_RATE11M)?TRUE :FALSE; pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1; pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; if(isCCKrate) { u1Byte report; u1Byte cck_agc_rpt; pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++; // // (1)Hardware does not provide RSSI for CCK // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) // //if(pHalData->eRFPowerState == eRfOn) cck_highpwr = pDM_Odm->bCckHighPower; //else // cck_highpwr = FALSE; cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ; //2011.11.28 LukeLee: 88E use different LNA & VGA gain table //The RSSI formula should be modified according to the gain table //In 88E, cck_highpwr is always set to 1 if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B)) { LNA_idx = ((cck_agc_rpt & 0xE0) >>5); VGA_idx = (cck_agc_rpt & 0x1F); if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8192E)) { switch(LNA_idx) { case 7: if(VGA_idx <= 27) rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2 else rx_pwr_all = -100; break; case 6: rx_pwr_all = -48 + 2*(2-VGA_idx); //VGA_idx = 2~0 break; case 5: rx_pwr_all = -42 + 2*(7-VGA_idx); //VGA_idx = 7~5 break; case 4: rx_pwr_all = -36 + 2*(7-VGA_idx); //VGA_idx = 7~4 break; case 3: //rx_pwr_all = -28 + 2*(7-VGA_idx); //VGA_idx = 7~0 rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0 break; case 2: if(cck_highpwr) rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0 else rx_pwr_all = -6+ 2*(5-VGA_idx); break; case 1: rx_pwr_all = 8-2*VGA_idx; break; case 0: rx_pwr_all = 14-2*VGA_idx; break; default: //DbgPrint("CCK Exception default\n"); break; } rx_pwr_all += 6; //2012.10.08 LukeLee: Modify for 92E CCK RSSI if(pDM_Odm->SupportICType == ODM_RTL8192E) rx_pwr_all += 10; PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); if(cck_highpwr == FALSE) { if(PWDB_ALL >= 80) PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80; else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20)) PWDB_ALL += 3; if(PWDB_ALL>100) PWDB_ALL = 100; } } else if(pDM_Odm->SupportICType & (ODM_RTL8723B)) { #if (RTL8723B_SUPPORT == 1) rx_pwr_all = odm_CCKRSSI_8723B(LNA_idx,VGA_idx); PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); if(PWDB_ALL>100) PWDB_ALL = 100; #endif } } else { if(!cck_highpwr) { report =( cck_agc_rpt & 0xc0 )>>6; switch(report) { // 03312009 modified by cosa // Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion // Note: different RF with the different RNA gain. case 0x3: rx_pwr_all = -46 - (cck_agc_rpt & 0x3e); break; case 0x2: rx_pwr_all = -26 - (cck_agc_rpt & 0x3e); break; case 0x1: rx_pwr_all = -12 - (cck_agc_rpt & 0x3e); break; case 0x0: rx_pwr_all = 16 - (cck_agc_rpt & 0x3e); break; } } else { //report = pDrvInfo->cfosho[0] & 0x60; //report = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a& 0x60; report = (cck_agc_rpt & 0x60)>>5; switch(report) { case 0x3: rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f)<<1) ; break; case 0x2: rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f)<<1); break; case 0x1: rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f)<<1) ; break; case 0x0: rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f)<<1) ; break; } } PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); //Modification for ext-LNA board if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA)) { if((cck_agc_rpt>>7) == 0){ PWDB_ALL = (PWDB_ALL>94)?100:(PWDB_ALL +6); } else { if(PWDB_ALL > 38) PWDB_ALL -= 16; else PWDB_ALL = (PWDB_ALL<=16)?(PWDB_ALL>>2):(PWDB_ALL -12); } //CCK modification if(PWDB_ALL > 25 && PWDB_ALL <= 60) PWDB_ALL += 6; //else if (PWDB_ALL <= 25) // PWDB_ALL += 8; } else//Modification for int-LNA board { if(PWDB_ALL > 99) PWDB_ALL -= 8; else if(PWDB_ALL > 50 && PWDB_ALL <= 68) PWDB_ALL += 4; } } pPhyInfo->RxPWDBAll = PWDB_ALL; #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) pPhyInfo->BTRxRSSIPercentage = PWDB_ALL; pPhyInfo->RecvSignalPower = rx_pwr_all; #endif // // (3) Get Signal Quality (EVM) // //if(pPktinfo->bPacketMatchBSSID) { u1Byte SQ,SQ_rpt; if((pDM_Odm->SupportPlatform == ODM_WIN) && (pDM_Odm->PatchID==RT_CID_819x_Lenovo)){ SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0); } else if((pDM_Odm->SupportPlatform == ODM_WIN) && (pDM_Odm->PatchID==RT_CID_819x_Acer)) { SQ = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,0); } else if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){ SQ = 100; } else{ SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all; if(SQ_rpt > 64) SQ = 0; else if (SQ_rpt < 20) SQ = 100; else SQ = ((64-SQ_rpt) * 100) / 44; } //DbgPrint("cck SQ = %d\n", SQ); pPhyInfo->SignalQuality = SQ; pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ; pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; } } else //is OFDM rate { pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++; // // (1)Get RSSI for HT rate // for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) { // 2008/01/30 MH we will judge RF RX path now. if (pDM_Odm->RFPathRxEnable & BIT(i)) rf_rx_num++; //else //continue; rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain& 0x3F)*2) - 110; #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) pPhyInfo->RxPwr[i] = rx_pwr[i]; #endif /* Translate DBM to percentage. */ RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]); total_rssi += RSSI; //RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI)); //Modification for ext-LNA board if(pDM_Odm->SupportICType&ODM_RTL8192C) { if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA)) { if((pPhyStaRpt->path_agc[i].trsw) == 1) RSSI = (RSSI>94)?100:(RSSI +6); else RSSI = (RSSI<=16)?(RSSI>>3):(RSSI -16); if((RSSI <= 34) && (RSSI >=4)) RSSI -= 4; } } pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI; #if (DM_ODM_SUPPORT_TYPE & (/*ODM_WIN|*/ODM_CE|ODM_AP|ODM_ADSL)) //Get Rx snr value in DB pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2); #endif /* Record Signal Strength for next packet */ //if(pPktinfo->bPacketMatchBSSID) { if((pDM_Odm->SupportPlatform == ODM_WIN) && (pDM_Odm->PatchID==RT_CID_819x_Lenovo)) { if(i==ODM_RF_PATH_A) pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,i,RSSI); } else if((pDM_Odm->SupportPlatform == ODM_WIN) && (pDM_Odm->PatchID==RT_CID_819x_Acer)) { pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,RSSI); } } } // // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) // rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1 )& 0x7f) -110; PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); //RT_DISP(FRX, RX_PHY_SS, ("PWDB_ALL=%d\n",PWDB_ALL)); pPhyInfo->RxPWDBAll = PWDB_ALL; //ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll)); #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT; pPhyInfo->RxPower = rx_pwr_all; pPhyInfo->RecvSignalPower = rx_pwr_all; #endif if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==19)){ //do nothing }else if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==25)){ //do nothing } else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo // // (3)EVM of HT rate // if(pPktinfo->DataRate >=DESC_RATEMCS8 && pPktinfo->DataRate <=DESC_RATEMCS15) Max_spatial_stream = 2; //both spatial stream make sense else Max_spatial_stream = 1; //only spatial stream 1 makes sense for(i=0; i>= 1" because the compilor of free build environment // fill most significant bit to "zero" when doing shifting operation which may change a negative // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. EVM = odm_EVMdbToPercentage( (pPhyStaRpt->stream_rxevm[i] )); //dbm //RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n", //GET_RX_STATUS_DESC_RX_MCS(pDesc), pDrvInfo->rxevm[i], "%", EVM)); //if(pPktinfo->bPacketMatchBSSID) { if(i==ODM_RF_PATH_A) // Fill value in RFD, Get the first spatial stream only { pPhyInfo->SignalQuality = (u1Byte)(EVM & 0xff); } pPhyInfo->RxMIMOSignalQuality[i] = (u1Byte)(EVM & 0xff); } } } ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->path_cfotail); } #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) //UI BSS List signal strength(in percentage), make it good looking, from 0~100. //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). if(isCCKrate) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, PWDB_ALL));//PWDB_ALL; #else #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING pPhyInfo->SignalStrength = (u1Byte)PWDB_ALL; #else pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));//PWDB_ALL; #endif #endif } else { if (rf_rx_num != 0) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, total_rssi/=rf_rx_num));//PWDB_ALL; #else #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING total_rssi/=rf_rx_num; pPhyInfo->SignalStrength = (u1Byte)total_rssi; #else pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi/=rf_rx_num)); #endif #endif } } #endif //DbgPrint("isCCKrate = %d, pPhyInfo->RxPWDBAll = %d, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a = 0x%x\n", //isCCKrate, pPhyInfo->RxPWDBAll, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a); //For 92C/92D HW (Hybrid) Antenna Diversity #if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel; //For 88E HW Antenna Diversity pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel; pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b; pDM_Odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2; #endif } #if ODM_IC_11AC_SERIES_SUPPORT VOID odm_RxPhyStatusJaguarSeries_Parsing( IN OUT PDM_ODM_T pDM_Odm, OUT PODM_PHY_INFO_T pPhyInfo, IN pu1Byte pPhyStatus, IN PODM_PACKET_INFO_T pPktinfo ) { u1Byte i, Max_spatial_stream; s1Byte rx_pwr[4], rx_pwr_all=0; u1Byte EVM = 0, EVMdbm, PWDB_ALL = 0, PWDB_ALL_BT; u1Byte RSSI, total_rssi=0; u1Byte isCCKrate=0; u1Byte rf_rx_num = 0; u1Byte cck_highpwr = 0; u1Byte LNA_idx, VGA_idx; PPHY_STATUS_RPT_8812_T pPhyStaRpt = (PPHY_STATUS_RPT_8812_T)pPhyStatus; if(pPktinfo->DataRate <= DESC_RATE54M) { switch(pPhyStaRpt->r_RFMOD){ case 1: if(pPhyStaRpt->sub_chnl == 0) pPhyInfo->BandWidth = 1; else pPhyInfo->BandWidth = 0; break; case 2: if(pPhyStaRpt->sub_chnl == 0) pPhyInfo->BandWidth = 2; else if(pPhyStaRpt->sub_chnl == 9 || pPhyStaRpt->sub_chnl == 10) pPhyInfo->BandWidth = 1; else pPhyInfo->BandWidth = 0; break; default: case 0: pPhyInfo->BandWidth = 0; break; } } if(pPktinfo->DataRate <= DESC_RATE11M) isCCKrate = TRUE; else isCCKrate = FALSE; pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1; pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; if(isCCKrate) { u1Byte cck_agc_rpt; pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++; // // (1)Hardware does not provide RSSI for CCK // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) // //if(pHalData->eRFPowerState == eRfOn) cck_highpwr = pDM_Odm->bCckHighPower; //else // cck_highpwr = FALSE; cck_agc_rpt = pPhyStaRpt->cfosho[0] ; LNA_idx = ((cck_agc_rpt & 0xE0) >>5); VGA_idx = (cck_agc_rpt & 0x1F); if(pDM_Odm->SupportICType == ODM_RTL8812) { switch(LNA_idx) { case 7: if(VGA_idx <= 27) rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2 else rx_pwr_all = -100; break; case 6: rx_pwr_all = -48 + 2*(2-VGA_idx); //VGA_idx = 2~0 break; case 5: rx_pwr_all = -42 + 2*(7-VGA_idx); //VGA_idx = 7~5 break; case 4: rx_pwr_all = -36 + 2*(7-VGA_idx); //VGA_idx = 7~4 break; case 3: //rx_pwr_all = -28 + 2*(7-VGA_idx); //VGA_idx = 7~0 rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0 break; case 2: if(cck_highpwr) rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0 else rx_pwr_all = -6+ 2*(5-VGA_idx); break; case 1: rx_pwr_all = 8-2*VGA_idx; break; case 0: rx_pwr_all = 14-2*VGA_idx; break; default: //DbgPrint("CCK Exception default\n"); break; } rx_pwr_all += 6; PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); if(cck_highpwr == FALSE) { if(PWDB_ALL >= 80) PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80; else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20)) PWDB_ALL += 3; if(PWDB_ALL>100) PWDB_ALL = 100; } } else if(pDM_Odm->SupportICType == ODM_RTL8821) { s1Byte Pout = -6; switch(LNA_idx) { case 5: rx_pwr_all = Pout -32 -(2*VGA_idx); break; case 4: rx_pwr_all = Pout -24 -(2*VGA_idx); break; case 2: rx_pwr_all = Pout -11 -(2*VGA_idx); break; case 1: rx_pwr_all = Pout + 5 -(2*VGA_idx); break; case 0: rx_pwr_all = Pout + 21 -(2*VGA_idx); break; } PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); } pPhyInfo->RxPWDBAll = PWDB_ALL; //if(pPktinfo->StationID == 0) //{ // DbgPrint("CCK: LNA_idx = %d, VGA_idx = %d, pPhyInfo->RxPWDBAll = %d\n", // LNA_idx, VGA_idx, pPhyInfo->RxPWDBAll); //} #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) pPhyInfo->BTRxRSSIPercentage = PWDB_ALL; pPhyInfo->RecvSignalPower = rx_pwr_all; #endif // // (3) Get Signal Quality (EVM) // //if(pPktinfo->bPacketMatchBSSID) { u1Byte SQ,SQ_rpt; if((pDM_Odm->SupportPlatform == ODM_WIN) && (pDM_Odm->PatchID==RT_CID_819x_Lenovo)) { SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0); } else if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest) { SQ = 100; } else { SQ_rpt = pPhyStaRpt->pwdb_all; if(SQ_rpt > 64) SQ = 0; else if (SQ_rpt < 20) SQ = 100; else SQ = ((64-SQ_rpt) * 100) / 44; } //DbgPrint("cck SQ = %d\n", SQ); pPhyInfo->SignalQuality = SQ; pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ; pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; } } else //is OFDM rate { pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++; // // (1)Get RSSI for OFDM rate // for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) { // 2008/01/30 MH we will judge RF RX path now. //DbgPrint("pDM_Odm->RFPathRxEnable = %x\n", pDM_Odm->RFPathRxEnable); if (pDM_Odm->RFPathRxEnable & BIT(i)) { rf_rx_num++; } //else //continue; //2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip //if((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) && (!pDM_Odm->bIsMPChip)) rx_pwr[i] = (pPhyStaRpt->gain_trsw[i]&0x7F) - 110; //else // rx_pwr[i] = ((pPhyStaRpt->gain_trsw[i]& 0x3F)*2) - 110; //OLD FORMULA #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) pPhyInfo->RxPwr[i] = rx_pwr[i]; #endif /* Translate DBM to percentage. */ RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]); total_rssi += RSSI; //RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI)); pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI; #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE|ODM_AP|ODM_ADSL)) //Get Rx snr value in DB pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = pPhyStaRpt->rxsnr[i]/2; #endif // // (2) CFO_short & CFO_tail // pPhyInfo->Cfo_short[i] = odm_Cfo( (pPhyStaRpt->cfosho[i]) ); pPhyInfo->Cfo_tail[i] = odm_Cfo( (pPhyStaRpt->cfotail[i]) ); /* Record Signal Strength for next packet */ //if(pPktinfo->bPacketMatchBSSID) { if((pDM_Odm->SupportPlatform == ODM_WIN) && (pDM_Odm->PatchID==RT_CID_819x_Lenovo)) { if(i==ODM_RF_PATH_A) pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,i,RSSI); } } } // // (3)PWDB, Average PWDB cacluated by hardware (for rate adaptive) // //2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip if((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) && (!pDM_Odm->bIsMPChip)) rx_pwr_all = (pPhyStaRpt->pwdb_all& 0x7f) -110; else rx_pwr_all = (((pPhyStaRpt->pwdb_all) >> 1 )& 0x7f) -110; //OLD FORMULA PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); pPhyInfo->RxPWDBAll = PWDB_ALL; //ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll)); #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT; pPhyInfo->RxPower = rx_pwr_all; pPhyInfo->RecvSignalPower = rx_pwr_all; #endif //DbgPrint("OFDM: pPhyInfo->RxPWDBAll = %d, pPhyInfo->RxMIMOSignalStrength[0] = %d, pPhyInfo->RxMIMOSignalStrength[1] = %d\n", // pPhyInfo->RxPWDBAll, pPhyInfo->RxMIMOSignalStrength[0], pPhyInfo->RxMIMOSignalStrength[1]); if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==19)) { //do nothing } else { //pMgntInfo->CustomerID != RT_CID_819x_Lenovo // // (4)EVM of OFDM rate // if( (pPktinfo->DataRate>=DESC_RATEMCS8) && (pPktinfo->DataRate <=DESC_RATEMCS15)) Max_spatial_stream = 2; else if( (pPktinfo->DataRate>=DESC_RATEVHTSS2MCS0) && (pPktinfo->DataRate <=DESC_RATEVHTSS2MCS9)) Max_spatial_stream = 2; else Max_spatial_stream = 1; //if(pPktinfo->bPacketMatchBSSID) { //DbgPrint("pPktinfo->DataRate = %d\n", pPktinfo->DataRate); for(i=0; i>= 1" because the compilor of free build environment // fill most significant bit to "zero" when doing shifting operation which may change a negative // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. // // 2013/09/02 MH According to 8812AU test, when use RX evm the value sometimes // will be incorrect and 1SS-MCS-0-7 always incorrect. Only use LSIG the evm value // seems ok. This seems BB bug, we need use another way to display better SQ. // //if (pPktinfo->DataRate>=DESC8812_RATE6M && pPktinfo->DataRate<=DESC8812_RATE54M) { if(i==ODM_RF_PATH_A ) { EVM = odm_EVMdbToPercentage( (pPhyStaRpt->sigevm )); //dbm EVM += 20; if (EVM > 100) EVM = 100; } } #if 0 else { if (pPhyStaRpt->rxevm[i] == -128) { pPhyStaRpt->rxevm[i] = -25; } EVM = odm_EVMdbToPercentage( (pPhyStaRpt->rxevm[i] )); //dbm } #endif EVMdbm = odm_EVMdbm_JaguarSeries(pPhyStaRpt->rxevm[i]); //RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n", //pPktinfo->DataRate, pPhyStaRpt->rxevm[i], "%", EVM)); { if(i==ODM_RF_PATH_A) // Fill value in RFD, Get the first spatial stream only { pPhyInfo->SignalQuality = EVM; } pPhyInfo->RxMIMOSignalQuality[i] = EVM; pPhyInfo->RxMIMOEVMdbm[i] = EVMdbm; } } } } ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->cfotail); } //DbgPrint("isCCKrate= %d, pPhyInfo->SignalStrength=%d % PWDB_AL=%d rf_rx_num=%d\n", isCCKrate, pPhyInfo->SignalStrength, PWDB_ALL, rf_rx_num); #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) //UI BSS List signal strength(in percentage), make it good looking, from 0~100. //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). if(isCCKrate) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, PWDB_ALL));//PWDB_ALL; #else pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));//PWDB_ALL; #endif } else { if (rf_rx_num != 0) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, total_rssi/=rf_rx_num));//PWDB_ALL; #else pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi/=rf_rx_num)); #endif } } #endif pDM_Odm->RxPWDBAve = pDM_Odm->RxPWDBAve + pPhyInfo->RxPWDBAll; pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->antidx_anta; pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->antidx_antb; //DbgPrint("pPhyStaRpt->antidx_anta = %d, pPhyStaRpt->antidx_antb = %d, pPhyStaRpt->resvd_1 = %d", // pPhyStaRpt->antidx_anta, pPhyStaRpt->antidx_antb, pPhyStaRpt->resvd_1); //DbgPrint("----------------------------\n"); //DbgPrint("pPktinfo->StationID=%d, pPktinfo->DataRate=0x%x\n",pPktinfo->StationID, pPktinfo->DataRate); //DbgPrint("pPhyStaRpt->gain_trsw[0]=0x%x, pPhyStaRpt->gain_trsw[1]=0x%x, pPhyStaRpt->pwdb_all=0x%x\n", // pPhyStaRpt->gain_trsw[0],pPhyStaRpt->gain_trsw[1], pPhyStaRpt->pwdb_all); //DbgPrint("pPhyInfo->RxMIMOSignalStrength[0]=%d, pPhyInfo->RxMIMOSignalStrength[1]=%d, RxPWDBAll=%d\n", // pPhyInfo->RxMIMOSignalStrength[0], pPhyInfo->RxMIMOSignalStrength[1], pPhyInfo->RxPWDBAll); } #endif VOID odm_Init_RSSIForDM( IN OUT PDM_ODM_T pDM_Odm ) { } VOID odm_Process_RSSIForDM( IN OUT PDM_ODM_T pDM_Odm, IN PODM_PHY_INFO_T pPhyInfo, IN PODM_PACKET_INFO_T pPktinfo ) { s4Byte UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK, UndecoratedSmoothedOFDM, RSSI_Ave; u1Byte i, isCCKrate=0; u1Byte RSSI_max, RSSI_min; u4Byte OFDM_pkt=0; u4Byte Weighting=0; PSTA_INFO_T pEntry; if(pPktinfo->StationID == 0xFF) return; #if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1) #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) odm_S0S1_SwAntDivByCtrlFrame_ProcessRSSI(pDM_Odm, pPhyInfo, pPktinfo); #endif #endif // // 2012/05/30 MH/Luke.Lee Add some description // In windows driver: AP/IBSS mode STA // //if (pDM_Odm->SupportPlatform == ODM_WIN) //{ // pEntry = pDM_Odm->pODM_StaInfo[pDM_Odm->pAidMap[pPktinfo->StationID-1]]; //} //else pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID]; if(!IS_STA_VALID(pEntry) ) { return; } if((!pPktinfo->bPacketMatchBSSID) ) { return; } if(pPktinfo->bPacketBeacon) pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++; isCCKrate = (pPktinfo->DataRate <= DESC_RATE11M)?TRUE :FALSE; pDM_Odm->RxRate = pPktinfo->DataRate; /* if(!isCCKrate) { DbgPrint("OFDM: pPktinfo->StationID=%d, isCCKrate=%d, pPhyInfo->RxPWDBAll=%d\n", pPktinfo->StationID, isCCKrate, pPhyInfo->RxPWDBAll); } */ //--------------Statistic for antenna/path diversity------------------ if(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) { #if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) ODM_Process_RSSIForAntDiv(pDM_Odm,pPhyInfo,pPktinfo); #endif } else if(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV) { #if (RTL8812A_SUPPORT == 1) if(pDM_Odm->SupportICType == ODM_RTL8812) { pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv; if(pPktinfo->bPacketToSelf || pPktinfo->bPacketMatchBSSID) { if(pPktinfo->DataRate > DESC_RATE11M) ODM_PathStatistics_8812A(pDM_Odm, pPktinfo->StationID, pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A], pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]); } } #endif } //-----------------Smart Antenna Debug Message------------------// UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK; UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM; UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) { if(!isCCKrate)//ofdm rate { if(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0) { RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; pDM_Odm->RSSI_B = 0; } else { //DbgPrint("pRfd->Status.RxMIMOSignalStrength[0] = %d, pRfd->Status.RxMIMOSignalStrength[1] = %d \n", //pRfd->Status.RxMIMOSignalStrength[0], pRfd->Status.RxMIMOSignalStrength[1]); pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; if(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]) { RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; } else { RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; } if((RSSI_max -RSSI_min) < 3) RSSI_Ave = RSSI_max; else if((RSSI_max -RSSI_min) < 6) RSSI_Ave = RSSI_max - 1; else if((RSSI_max -RSSI_min) < 10) RSSI_Ave = RSSI_max - 2; else RSSI_Ave = RSSI_max - 3; } //1 Process OFDM RSSI if(UndecoratedSmoothedOFDM <= 0) // initialize { UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll; } else { if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedOFDM) { UndecoratedSmoothedOFDM = ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + (RSSI_Ave)) /(Rx_Smooth_Factor); UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1; } else { UndecoratedSmoothedOFDM = ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + (RSSI_Ave)) /(Rx_Smooth_Factor); } } pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0; } else { RSSI_Ave = pPhyInfo->RxPWDBAll; pDM_Odm->RSSI_A = (u1Byte) pPhyInfo->RxPWDBAll; pDM_Odm->RSSI_B = 0; //1 Process CCK RSSI if(UndecoratedSmoothedCCK <= 0) // initialize { UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll; } else { if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedCCK) { UndecoratedSmoothedCCK = ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor); UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1; } else { UndecoratedSmoothedCCK = ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor); } } pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1; } //if(pEntry) { //2011.07.28 LukeLee: modified to prevent unstable CCK RSSI if(pEntry->rssi_stat.ValidBit >= 64) pEntry->rssi_stat.ValidBit = 64; else pEntry->rssi_stat.ValidBit++; for(i=0; irssi_stat.ValidBit; i++) OFDM_pkt += (u1Byte)(pEntry->rssi_stat.PacketMap>>i)&BIT0; if(pEntry->rssi_stat.ValidBit == 64) { Weighting = ((OFDM_pkt<<4) > 64)?64:(OFDM_pkt<<4); UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6; } else { if(pEntry->rssi_stat.ValidBit != 0) UndecoratedSmoothedPWDB = (OFDM_pkt*UndecoratedSmoothedOFDM+(pEntry->rssi_stat.ValidBit-OFDM_pkt)*UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit; else UndecoratedSmoothedPWDB = 0; } pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK; pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM; pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; //DbgPrint("OFDM_pkt=%d, Weighting=%d\n", OFDM_pkt, Weighting); //DbgPrint("UndecoratedSmoothedOFDM=%d, UndecoratedSmoothedPWDB=%d, UndecoratedSmoothedCCK=%d\n", // UndecoratedSmoothedOFDM, UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK); } } } // // Endianness before calling this API // VOID ODM_PhyStatusQuery_92CSeries( IN OUT PDM_ODM_T pDM_Odm, OUT PODM_PHY_INFO_T pPhyInfo, IN pu1Byte pPhyStatus, IN PODM_PACKET_INFO_T pPktinfo ) { odm_RxPhyStatus92CSeries_Parsing( pDM_Odm, pPhyInfo, pPhyStatus, pPktinfo); if( pDM_Odm->RSSI_test == TRUE) { // Select the packets to do RSSI checking for antenna switching. if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon ) { /* #if 0//(DM_ODM_SUPPORT_TYPE == ODM_WIN) dm_SWAW_RSSI_Check( Adapter, (tmppAdapter!=NULL)?(tmppAdapter==Adapter):TRUE, bPacketMatchBSSID, pEntry, pRfd); #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) // Select the packets to do RSSI checking for antenna switching. //odm_SwAntDivRSSICheck8192C(padapter, precvframe->u.hdr.attrib.RxPWDBAll); #endif */ #if (RTL8192C_SUPPORT == 1) ODM_SwAntDivChkPerPktRssi(pDM_Odm,pPktinfo->StationID,pPhyInfo); #endif } } else { odm_Process_RSSIForDM(pDM_Odm,pPhyInfo,pPktinfo); } } // // Endianness before calling this API // VOID ODM_PhyStatusQuery_JaguarSeries( IN OUT PDM_ODM_T pDM_Odm, OUT PODM_PHY_INFO_T pPhyInfo, IN pu1Byte pPhyStatus, IN PODM_PACKET_INFO_T pPktinfo ) { odm_RxPhyStatusJaguarSeries_Parsing( pDM_Odm, pPhyInfo, pPhyStatus, pPktinfo); odm_Process_RSSIForDM(pDM_Odm,pPhyInfo,pPktinfo); } VOID ODM_PhyStatusQuery( IN OUT PDM_ODM_T pDM_Odm, OUT PODM_PHY_INFO_T pPhyInfo, IN pu1Byte pPhyStatus, IN PODM_PACKET_INFO_T pPktinfo ) { if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES ) { ODM_PhyStatusQuery_JaguarSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo); } else { ODM_PhyStatusQuery_92CSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo); } } // For future use. VOID ODM_MacStatusQuery( IN OUT PDM_ODM_T pDM_Odm, IN pu1Byte pMacStatus, IN u1Byte MacID, IN BOOLEAN bPacketMatchBSSID, IN BOOLEAN bPacketToSelf, IN BOOLEAN bPacketBeacon ) { // 2011/10/19 Driver team will handle in the future. } // // If you want to add a new IC, Please follow below template and generate a new one. // // HAL_STATUS ODM_ConfigRFWithHeaderFile( IN PDM_ODM_T pDM_Odm, IN ODM_RF_Config_Type ConfigType, IN ODM_RF_RADIO_PATH_E eRFPath ) { PADAPTER Adapter = pDM_Odm->Adapter; ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===>ODM_ConfigRFWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip")); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType)); #if (RTL8723A_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8723A) { if(ConfigType == CONFIG_RF_RADIO) { if(eRFPath == ODM_RF_PATH_A) READ_AND_CONFIG_MP(8723A,_RadioA); } } #endif #if (RTL8188E_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8188E) { if(ConfigType == CONFIG_RF_RADIO) { if(eRFPath == ODM_RF_PATH_A) READ_AND_CONFIG_MP(8188E,_RadioA); } else if(ConfigType == CONFIG_RF_TXPWR_LMT) { READ_AND_CONFIG_MP(8188E,_TXPWR_LMT); } } #endif #if (RTL8812A_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8812) { if(ConfigType == CONFIG_RF_RADIO) { if(eRFPath == ODM_RF_PATH_A) { READ_AND_CONFIG_MP(8812A,_RadioA); } else if(eRFPath == ODM_RF_PATH_B) { READ_AND_CONFIG_MP(8812A,_RadioB); } } else if(ConfigType == CONFIG_RF_TXPWR_LMT) { READ_AND_CONFIG_MP(8812A,_TXPWR_LMT); } } #endif #if (RTL8821A_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8821) { if(ConfigType == CONFIG_RF_RADIO) { if(eRFPath == ODM_RF_PATH_A) { READ_AND_CONFIG_MP(8821A,_RadioA); } } else if(ConfigType == CONFIG_RF_TXPWR_LMT) { if (pDM_Odm->SupportInterface == ODM_ITRF_USB) { if (pDM_Odm->ExtPA5G || pDM_Odm->ExtLNA5G) READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8811AU_FEM); else READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8811AU_IPA); } else { READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A); } } ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigRFWithHeaderFile\n")); } #endif #if (RTL8723B_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8723B) { if(ConfigType == CONFIG_RF_RADIO) { READ_AND_CONFIG_MP(8723B,_RadioA); } else if(ConfigType == CONFIG_RF_TXPWR_LMT) { READ_AND_CONFIG_MP(8723B,_TXPWR_LMT); } } #endif #if (RTL8192E_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8192E) { if(ConfigType == CONFIG_RF_RADIO) { if(eRFPath == ODM_RF_PATH_A) READ_AND_CONFIG_MP(8192E,_RadioA); else if(eRFPath == ODM_RF_PATH_B) READ_AND_CONFIG_MP(8192E,_RadioB); } else if(ConfigType == CONFIG_RF_TXPWR_LMT) { READ_AND_CONFIG_MP(8192E,_TXPWR_LMT); } } #endif #if (RTL8814A_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8814A) { /* if(ConfigType == CONFIG_RF_TXPWR_LMT) { READ_AND_CONFIG(8813A,_TXPWR_LMT); } */ } #endif return HAL_STATUS_SUCCESS; } HAL_STATUS ODM_ConfigRFWithTxPwrTrackHeaderFile( IN PDM_ODM_T pDM_Odm ) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===>ODM_ConfigRFWithTxPwrTrackHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip")); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType)); if(0) { } #if (RTL8821A_SUPPORT == 1) else if(pDM_Odm->SupportICType == ODM_RTL8821) { if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) READ_AND_CONFIG_MP(8821A,_TxPowerTrack_PCIE); else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) READ_AND_CONFIG_MP(8821A,_TxPowerTrack_USB); else READ_AND_CONFIG_MP(8821A,_TxPowerTrack_PCIE); } #endif #if (RTL8812A_SUPPORT == 1) else if(pDM_Odm->SupportICType == ODM_RTL8812) { if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) READ_AND_CONFIG_MP(8812A,_TxPowerTrack_PCIE); else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) { if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip) READ_AND_CONFIG_MP(8812A,_TxPowerTrack_RFE3); else READ_AND_CONFIG_MP(8812A,_TxPowerTrack_USB); } } #endif #if (RTL8192E_SUPPORT == 1) else if(pDM_Odm->SupportICType == ODM_RTL8192E) { if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) READ_AND_CONFIG_MP(8192E,_TxPowerTrack_PCIE); else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) READ_AND_CONFIG_MP(8192E,_TxPowerTrack_USB); } #endif #if RTL8723B_SUPPORT else if(pDM_Odm->SupportICType == ODM_RTL8723B) { if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) READ_AND_CONFIG_MP(8723B,_TxPowerTrack_PCIE); else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) READ_AND_CONFIG_MP(8723B,_TxPowerTrack_USB); else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) READ_AND_CONFIG_MP(8723B,_TxPowerTrack_SDIO); } #endif #if RTL8188E_SUPPORT else if(pDM_Odm->SupportICType == ODM_RTL8188E) { if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) READ_AND_CONFIG_MP(8188E,_TxPowerTrack_PCIE); else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) READ_AND_CONFIG_MP(8188E,_TxPowerTrack_USB); else READ_AND_CONFIG_MP(8188E,_TxPowerTrack_PCIE); } #endif return HAL_STATUS_SUCCESS; } HAL_STATUS ODM_ConfigBBWithHeaderFile( IN PDM_ODM_T pDM_Odm, IN ODM_BB_Config_Type ConfigType ) { #if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) PADAPTER Adapter = pDM_Odm->Adapter; #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); #endif #endif ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===>ODM_ConfigBBWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip")); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType)); #if (RTL8723A_SUPPORT == 1) if(pDM_Odm->SupportICType == ODM_RTL8723A) { if(ConfigType == CONFIG_BB_PHY_REG) { READ_AND_CONFIG_MP(8723A,_PHY_REG); } else if(ConfigType == CONFIG_BB_AGC_TAB) { READ_AND_CONFIG_MP(8723A,_AGC_TAB); } } #endif #if (RTL8188E_SUPPORT == 1) if(pDM_Odm->SupportICType == ODM_RTL8188E) { if(ConfigType == CONFIG_BB_PHY_REG) { READ_AND_CONFIG_MP(8188E,_PHY_REG); } else if(ConfigType == CONFIG_BB_AGC_TAB) { READ_AND_CONFIG_MP(8188E,_AGC_TAB); } else if(ConfigType == CONFIG_BB_PHY_REG_PG) { READ_AND_CONFIG_MP(8188E,_PHY_REG_PG); } } #endif #if (RTL8812A_SUPPORT == 1) if(pDM_Odm->SupportICType == ODM_RTL8812) { if(ConfigType == CONFIG_BB_PHY_REG) { READ_AND_CONFIG_MP(8812A,_PHY_REG); } else if(ConfigType == CONFIG_BB_AGC_TAB) { READ_AND_CONFIG_MP(8812A,_AGC_TAB); } else if(ConfigType == CONFIG_BB_PHY_REG_PG) { if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip) READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_ASUS); #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) else if (pMgntInfo->CustomerID == RT_CID_WNC_NEC && pDM_Odm->bIsMPChip) READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_NEC); #endif else READ_AND_CONFIG_MP(8812A,_PHY_REG_PG); } else if(ConfigType == CONFIG_BB_PHY_REG_MP) { READ_AND_CONFIG_MP(8812A,_PHY_REG_MP); } else if(ConfigType == CONFIG_BB_AGC_TAB_DIFF) { if ((36 <= *pDM_Odm->pChannel) && (*pDM_Odm->pChannel <= 64)) AGC_DIFF_CONFIG_MP(8812A,LB); else if (100 <= *pDM_Odm->pChannel) AGC_DIFF_CONFIG_MP(8812A,HB); } } #endif #if (RTL8821A_SUPPORT == 1) if(pDM_Odm->SupportICType == ODM_RTL8821) { if(ConfigType == CONFIG_BB_PHY_REG) { READ_AND_CONFIG_MP(8821A,_PHY_REG); } else if(ConfigType == CONFIG_BB_AGC_TAB) { READ_AND_CONFIG_MP(8821A,_AGC_TAB); } else if(ConfigType == CONFIG_BB_PHY_REG_PG) { READ_AND_CONFIG_MP(8821A,_PHY_REG_PG); } } #endif #if (RTL8723B_SUPPORT == 1) if(pDM_Odm->SupportICType == ODM_RTL8723B) { if(ConfigType == CONFIG_BB_PHY_REG) { READ_AND_CONFIG_MP(8723B,_PHY_REG); } else if(ConfigType == CONFIG_BB_AGC_TAB) { READ_AND_CONFIG_MP(8723B,_AGC_TAB); } else if(ConfigType == CONFIG_BB_PHY_REG_PG) { READ_AND_CONFIG_MP(8723B,_PHY_REG_PG); } } #endif #if (RTL8192E_SUPPORT == 1) if(pDM_Odm->SupportICType == ODM_RTL8192E) { if(ConfigType == CONFIG_BB_PHY_REG) { READ_AND_CONFIG_MP(8192E,_PHY_REG); } else if(ConfigType == CONFIG_BB_AGC_TAB) { READ_AND_CONFIG_MP(8192E,_AGC_TAB); } else if(ConfigType == CONFIG_BB_PHY_REG_PG) { READ_AND_CONFIG_MP(8192E,_PHY_REG_PG); } } #endif #if (RTL8814A_SUPPORT == 1) if(pDM_Odm->SupportICType == ODM_RTL8814A) { if(ConfigType == CONFIG_BB_PHY_REG) { READ_AND_CONFIG(8813A,_PHY_REG); } else if(ConfigType == CONFIG_BB_AGC_TAB) { READ_AND_CONFIG(8813A,_AGC_TAB); } else if(ConfigType == CONFIG_BB_PHY_REG_PG) { //READ_AND_CONFIG(8813A,_PHY_REG_PG); } } #endif return HAL_STATUS_SUCCESS; } HAL_STATUS ODM_ConfigMACWithHeaderFile( IN PDM_ODM_T pDM_Odm ) { #if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) PADAPTER Adapter = pDM_Odm->Adapter; #endif u1Byte result = HAL_STATUS_SUCCESS; ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===>ODM_ConfigMACWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip")); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType)); #if (RTL8723A_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8723A) { READ_AND_CONFIG_MP(8723A,_MAC_REG); } #endif #if (RTL8188E_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8188E) { READ_AND_CONFIG_MP(8188E,_MAC_REG); } #endif #if (RTL8812A_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8812) { READ_AND_CONFIG_MP(8812A,_MAC_REG); } #endif #if (RTL8821A_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8821) { READ_AND_CONFIG_MP(8821A,_MAC_REG); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigMACwithHeaderFile\n")); } #endif #if (RTL8723B_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8723B) { READ_AND_CONFIG_MP(8723B,_MAC_REG); } #endif #if (RTL8192E_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8192E) { READ_AND_CONFIG_MP(8192E,_MAC_REG); } #endif return result; } HAL_STATUS ODM_ConfigFWWithHeaderFile( IN PDM_ODM_T pDM_Odm, IN ODM_FW_Config_Type ConfigType, OUT u1Byte *pFirmware, OUT u4Byte *pSize ) { #if (RTL8188E_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8188E) { #ifdef CONFIG_SFW_SUPPORTED if (ConfigType == CONFIG_FW_NIC) { READ_FIRMWARE_MP(8188E,_FW_NIC_T); } else if (ConfigType == CONFIG_FW_WoWLAN) { READ_FIRMWARE_MP(8188E,_FW_WoWLAN_T); } else if(ConfigType == CONFIG_FW_NIC_2) { READ_FIRMWARE_MP(8188E,_FW_NIC_S); } else if (ConfigType == CONFIG_FW_WoWLAN_2) { READ_FIRMWARE_MP(8188E,_FW_WoWLAN_S); } #else if (ConfigType == CONFIG_FW_NIC) { READ_FIRMWARE_MP(8188E,_FW_NIC); } else if (ConfigType == CONFIG_FW_WoWLAN) { READ_FIRMWARE_MP(8188E,_FW_WoWLAN); } #endif } #endif #if (RTL8723B_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8723B) { if (ConfigType == CONFIG_FW_NIC) { READ_FIRMWARE_MP(8723B,_FW_NIC); } else if (ConfigType == CONFIG_FW_WoWLAN) { READ_FIRMWARE_MP(8723B,_FW_WoWLAN); } #ifdef CONFIG_AP_WOWLAN else if (ConfigType == CONFIG_FW_AP_WoWLAN) { READ_FIRMWARE(8723B,_FW_AP_WoWLAN); } #endif else if (ConfigType == CONFIG_FW_BT) { READ_FIRMWARE_MP(8723B,_FW_BT); } else if (ConfigType == CONFIG_FW_MP) { READ_FIRMWARE_MP(8723B,_FW_MP); } } #endif #if (RTL8812A_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8812) { if (ConfigType == CONFIG_FW_NIC) { READ_FIRMWARE_MP(8812A,_FW_NIC); } else if (ConfigType == CONFIG_FW_WoWLAN) { READ_FIRMWARE_MP(8812A,_FW_WoWLAN); } else if (ConfigType == CONFIG_FW_BT) { READ_FIRMWARE_MP(8812A,_FW_NIC_BT); } } #endif #if (RTL8821A_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8821) { if (ConfigType == CONFIG_FW_NIC) { READ_FIRMWARE_MP(8821A,_FW_NIC); } else if (ConfigType == CONFIG_FW_WoWLAN) { READ_FIRMWARE_MP(8821A,_FW_WoWLAN); } else if (ConfigType == CONFIG_FW_BT) { READ_FIRMWARE_MP(8821A,_FW_NIC_BT); } } #endif #if (RTL8192E_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8192E) { if (ConfigType == CONFIG_FW_NIC) { READ_FIRMWARE_MP(8192E,_FW_NIC); } else if (ConfigType == CONFIG_FW_WoWLAN) { READ_FIRMWARE_MP(8192E,_FW_WoWLAN); } #ifdef CONFIG_AP_WOWLAN else if (ConfigType == CONFIG_FW_AP_WoWLAN) { READ_FIRMWARE_MP(8192E,_FW_AP_WoWLAN); } #endif } #endif return HAL_STATUS_SUCCESS; } u4Byte ODM_GetHWImgVersion( IN PDM_ODM_T pDM_Odm ) { u4Byte Version=0; #if (RTL8723A_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8723A) Version = GET_VERSION_MP(8723A,_MAC_REG); #endif #if (RTL8723B_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8723B) Version = GET_VERSION_MP(8723B,_MAC_REG); #endif #if (RTL8188E_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8188E) Version = GET_VERSION_MP(8188E,_MAC_REG); #endif #if (RTL8821A_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8821) Version = GET_VERSION_MP(8821A,_MAC_REG); #endif #if (RTL8192E_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8192E) Version = GET_VERSION_MP(8192E,_MAC_REG); #endif #if (RTL8812A_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8812) Version = GET_VERSION_MP(8812A,_MAC_REG); #endif return Version; } rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_HWConfig.h000066400000000000000000000145631261122257400223110ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HALHWOUTSRC_H__ #define __HALHWOUTSRC_H__ /*--------------------------Define -------------------------------------------*/ //#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) #define AGC_DIFF_CONFIG_MP(ic, band) (ODM_ReadAndConfig_MP_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_MP_##ic##_AGC_TAB_DIFF_##band, \ sizeof(Array_MP_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte))) #define AGC_DIFF_CONFIG_TC(ic, band) (ODM_ReadAndConfig_TC_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_TC_##ic##_AGC_TAB_DIFF_##band, \ sizeof(Array_TC_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte))) #define AGC_DIFF_CONFIG(ic, band) do {\ if (pDM_Odm->bIsMPChip)\ AGC_DIFF_CONFIG_MP(ic,band);\ else\ AGC_DIFF_CONFIG_TC(ic,band);\ } while(0) //============================================================ // structure and define //============================================================ typedef struct _Phy_Rx_AGC_Info { #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) u1Byte gain:7,trsw:1; #else u1Byte trsw:1,gain:7; #endif } PHY_RX_AGC_INFO_T,*pPHY_RX_AGC_INFO_T; typedef struct _Phy_Status_Rpt_8192cd { PHY_RX_AGC_INFO_T path_agc[2]; u1Byte ch_corr[2]; u1Byte cck_sig_qual_ofdm_pwdb_all; u1Byte cck_agc_rpt_ofdm_cfosho_a; u1Byte cck_rpt_b_ofdm_cfosho_b; u1Byte rsvd_1;//ch_corr_msb; u1Byte noise_power_db_msb; s1Byte path_cfotail[2]; u1Byte pcts_mask[2]; s1Byte stream_rxevm[2]; u1Byte path_rxsnr[2]; u1Byte noise_power_db_lsb; u1Byte rsvd_2[3]; u1Byte stream_csi[2]; u1Byte stream_target_csi[2]; s1Byte sig_evm; u1Byte rsvd_3; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) u1Byte antsel_rx_keep_2:1; //ex_intf_flg:1; u1Byte sgi_en:1; u1Byte rxsc:2; u1Byte idle_long:1; u1Byte r_ant_train_en:1; u1Byte ant_sel_b:1; u1Byte ant_sel:1; #else // _BIG_ENDIAN_ u1Byte ant_sel:1; u1Byte ant_sel_b:1; u1Byte r_ant_train_en:1; u1Byte idle_long:1; u1Byte rxsc:2; u1Byte sgi_en:1; u1Byte antsel_rx_keep_2:1; //ex_intf_flg:1; #endif } PHY_STATUS_RPT_8192CD_T,*PPHY_STATUS_RPT_8192CD_T; typedef struct _Phy_Status_Rpt_8812 { #if 0 PHY_RX_AGC_INFO_T path_agc[2]; u1Byte ch_num[2]; u1Byte cck_sig_qual_ofdm_pwdb_all; u1Byte cck_agc_rpt_ofdm_cfosho_a; u1Byte cck_bb_pwr_ofdm_cfosho_b; u1Byte cck_rx_path; //CCK_RX_PATH [3:0] (with regA07[3:0] definition) u1Byte rsvd_1; u1Byte path_cfotail[2]; u1Byte pcts_mask[2]; s1Byte stream_rxevm[2]; u1Byte path_rxsnr[2]; u1Byte rsvd_2[2]; u1Byte stream_snr[2]; u1Byte stream_csi[2]; u1Byte rsvd_3[2]; s1Byte sig_evm; u1Byte rsvd_4; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) u1Byte antidx_anta:3; u1Byte antidx_antb:3; u1Byte rsvd_5:2; #else // _BIG_ENDIAN_ u1Byte rsvd_5:2; u1Byte antidx_antb:3; u1Byte antidx_anta:3; #endif #endif //2012.05.24 LukeLee: This structure should take big/little endian in consideration later..... //DWORD 0 u1Byte gain_trsw[2]; #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) u2Byte chl_num:10; u2Byte sub_chnl:4; u2Byte r_RFMOD:2; #else // _BIG_ENDIAN_ u2Byte r_RFMOD:2; u2Byte sub_chnl:4; u2Byte chl_num:10; #endif //DWORD 1 u1Byte pwdb_all; u1Byte cfosho[4]; // DW 1 byte 1 DW 2 byte 0 //DWORD 2 s1Byte cfotail[4]; // DW 2 byte 1 DW 3 byte 0 //DWORD 3 s1Byte rxevm[2]; // DW 3 byte 1 DW 3 byte 2 s1Byte rxsnr[2]; // DW 3 byte 3 DW 4 byte 0 //DWORD 4 u1Byte PCTS_MSK_RPT[2]; u1Byte pdsnr[2]; // DW 4 byte 3 DW 5 Byte 0 //DWORD 5 u1Byte csi_current[2]; u1Byte rx_gain_c; //DWORD 6 u1Byte rx_gain_d; s1Byte sigevm; u1Byte resvd_0; u1Byte antidx_anta:3; u1Byte antidx_antb:3; u1Byte resvd_1:2; } PHY_STATUS_RPT_8812_T,*PPHY_STATUS_RPT_8812_T; VOID odm_Init_RSSIForDM( IN OUT PDM_ODM_T pDM_Odm ); VOID ODM_PhyStatusQuery( IN OUT PDM_ODM_T pDM_Odm, OUT PODM_PHY_INFO_T pPhyInfo, IN pu1Byte pPhyStatus, IN PODM_PACKET_INFO_T pPktinfo ); VOID ODM_MacStatusQuery( IN OUT PDM_ODM_T pDM_Odm, IN pu1Byte pMacStatus, IN u1Byte MacID, IN BOOLEAN bPacketMatchBSSID, IN BOOLEAN bPacketToSelf, IN BOOLEAN bPacketBeacon ); #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE|ODM_AP)) HAL_STATUS ODM_ConfigRFWithTxPwrTrackHeaderFile( IN PDM_ODM_T pDM_Odm ); HAL_STATUS ODM_ConfigRFWithHeaderFile( IN PDM_ODM_T pDM_Odm, IN ODM_RF_Config_Type ConfigType, IN ODM_RF_RADIO_PATH_E eRFPath ); HAL_STATUS ODM_ConfigBBWithHeaderFile( IN PDM_ODM_T pDM_Odm, IN ODM_BB_Config_Type ConfigType ); HAL_STATUS ODM_ConfigMACWithHeaderFile( IN PDM_ODM_T pDM_Odm ); HAL_STATUS ODM_ConfigFWWithHeaderFile( IN PDM_ODM_T pDM_Odm, IN ODM_FW_Config_Type ConfigType, OUT u1Byte *pFirmware, OUT u4Byte *pSize ); u4Byte ODM_GetHWImgVersion( IN PDM_ODM_T pDM_Odm ); s4Byte odm_SignalScaleMapping( IN OUT PDM_ODM_T pDM_Odm, IN s4Byte CurrSig ); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_NoiseMonitor.c000066400000000000000000000162061261122257400232610ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // include files //============================================================ //#include "Mp_Precomp.h" #include "phydm_precomp.h" //================================================= // This function is for inband noise test utility only // To obtain the inband noise level(dbm), do the following. // 1. disable DIG and Power Saving // 2. Set initial gain = 0x1a // 3. Stop updating idle time pwer report (for driver read) // - 0x80c[25] // //================================================= #define Valid_Min -35 #define Valid_Max 10 #define ValidCnt 5 s2Byte odm_InbandNoise_Monitor_NSeries(PDM_ODM_T pDM_Odm,u8 bPauseDIG,u8 IGIValue,u32 max_time) { u4Byte tmp4b; u1Byte max_rf_path=0,rf_path; u1Byte reg_c50, reg_c58,valid_done=0; struct noise_level noise_data; u32 start = 0, func_start=0, func_end = 0; func_start = ODM_GetCurrentTime(pDM_Odm); pDM_Odm->noise_level.noise_all = 0; if((pDM_Odm->RFType == ODM_1T2R) ||(pDM_Odm->RFType == ODM_2T2R)) max_rf_path = 2; else max_rf_path = 1; ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("odm_DebugControlInbandNoise_Nseries() ==> \n")); ODM_Memory_Set(pDM_Odm,&noise_data,0,sizeof(struct noise_level)); // // Step 1. Disable DIG && Set initial gain. // if(bPauseDIG) { odm_PauseDIG(pDM_Odm,ODM_PAUSE_DIG,IGIValue); } // // Step 2. Disable all power save for read registers // //dcmd_DebugControlPowerSave(pAdapter, PSDisable); // // Step 3. Get noise power level // start = ODM_GetCurrentTime(pDM_Odm); while(1) { //Stop updating idle time pwer report (for driver read) ODM_SetBBReg(pDM_Odm, rFPGA0_TxGainStage, BIT25, 1); //Read Noise Floor Report tmp4b = ODM_GetBBReg(pDM_Odm, 0x8f8,bMaskDWord ); ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("Noise Floor Report (0x8f8) = 0x%08x\n", tmp4b)); //ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, TestInitialGain); //if(max_rf_path == 2) // ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, TestInitialGain); //update idle time pwer report per 5us ODM_SetBBReg(pDM_Odm, rFPGA0_TxGainStage, BIT25, 0); noise_data.value[ODM_RF_PATH_A] = (u1Byte)(tmp4b&0xff); noise_data.value[ODM_RF_PATH_B] = (u1Byte)((tmp4b&0xff00)>>8); ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("value_a = 0x%x(%d), value_b = 0x%x(%d)\n", noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_B], noise_data.value[ODM_RF_PATH_B])); for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) { noise_data.sval[rf_path] = (s1Byte)noise_data.value[rf_path]; noise_data.sval[rf_path] /= 2; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("sval_a = %d, sval_b = %d\n", noise_data.sval[ODM_RF_PATH_A], noise_data.sval[ODM_RF_PATH_B])); //ODM_delay_ms(10); //ODM_sleep_ms(10); for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) { if( (noise_data.valid_cnt[rf_path] < ValidCnt) && (noise_data.sval[rf_path] < Valid_Max && noise_data.sval[rf_path] >= Valid_Min)) { noise_data.valid_cnt[rf_path]++; noise_data.sum[rf_path] += noise_data.sval[rf_path]; ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("RF_Path:%d Valid sval = %d\n", rf_path,noise_data.sval[rf_path])); ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("Sum of sval = %d, \n", noise_data.sum[rf_path])); if(noise_data.valid_cnt[rf_path] == ValidCnt) { valid_done++; ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("After divided, RF_Path:%d ,sum = %d \n", rf_path,noise_data.sum[rf_path])); } } } //printk("####### valid_done:%d #############\n",valid_done); if ((valid_done==max_rf_path) || (ODM_GetProgressingTime(pDM_Odm,start) > max_time)) { for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) { //printk("%s PATH_%d - sum = %d, valid_cnt = %d \n",__FUNCTION__,rf_path,noise_data.sum[rf_path], noise_data.valid_cnt[rf_path]); if(noise_data.valid_cnt[rf_path]) noise_data.sum[rf_path] /= noise_data.valid_cnt[rf_path]; else noise_data.sum[rf_path] = 0; } break; } } reg_c50 = (s4Byte)ODM_GetBBReg(pDM_Odm,rOFDM0_XAAGCCore1,bMaskByte0); reg_c50 &= ~BIT7; ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("0x%x = 0x%02x(%d)\n", rOFDM0_XAAGCCore1, reg_c50, reg_c50)); pDM_Odm->noise_level.noise[ODM_RF_PATH_A] = -110 + reg_c50 + noise_data.sum[ODM_RF_PATH_A]; pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_A]; if(max_rf_path == 2){ reg_c58 = (s4Byte)ODM_GetBBReg(pDM_Odm,rOFDM0_XBAGCCore1,bMaskByte0); reg_c58 &= ~BIT7; ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("0x%x = 0x%02x(%d)\n", rOFDM0_XBAGCCore1, reg_c58, reg_c58)); pDM_Odm->noise_level.noise[ODM_RF_PATH_B] = -110 + reg_c58 + noise_data.sum[ODM_RF_PATH_B]; pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_B]; } pDM_Odm->noise_level.noise_all /= max_rf_path; ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("noise_a = %d, noise_b = %d\n", pDM_Odm->noise_level.noise[ODM_RF_PATH_A], pDM_Odm->noise_level.noise[ODM_RF_PATH_B])); // // Step 4. Recover the Dig // if(bPauseDIG) { odm_PauseDIG(pDM_Odm,ODM_RESUME_DIG,IGIValue); } func_end = ODM_GetProgressingTime(pDM_Odm,func_start) ; //printk("%s noise_a = %d, noise_b = %d noise_all:%d (%d ms)\n",__FUNCTION__, // pDM_Odm->noise_level.noise[ODM_RF_PATH_A], // pDM_Odm->noise_level.noise[ODM_RF_PATH_B], // pDM_Odm->noise_level.noise_all,func_end); ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("odm_DebugControlInbandNoise_Nseries() <== \n")); return pDM_Odm->noise_level.noise_all; } s2Byte ODM_InbandNoise_Monitor(PVOID pDM_VOID,u8 bPauseDIG,u8 IGIValue,u32 max_time) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES ) { //odm_InbandNoise_Monitor_JaguarSeries(pDM_Odm,bPauseDIG,IGIValue,max_time); return 0; } else { return odm_InbandNoise_Monitor_NSeries(pDM_VOID,bPauseDIG,IGIValue,max_time); } } rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_NoiseMonitor.h000066400000000000000000000032011261122257400232550ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * *****************************************************************************/ #ifndef __ODMNOISEMONITOR_H__ #define __ODMNOISEMONITOR_H__ #define ODM_MAX_CHANNEL_NUM 38//14+24 struct noise_level { //u1Byte value_a, value_b; u1Byte value[MAX_RF_PATH]; //s1Byte sval_a, sval_b; s1Byte sval[MAX_RF_PATH]; //s4Byte noise_a=0, noise_b=0,sum_a=0, sum_b=0; //s4Byte noise[ODM_RF_PATH_MAX]; s4Byte sum[MAX_RF_PATH]; //u1Byte valid_cnt_a=0, valid_cnt_b=0, u1Byte valid[MAX_RF_PATH]; u1Byte valid_cnt[MAX_RF_PATH]; }; typedef struct _ODM_NOISE_MONITOR_ { s1Byte noise[MAX_RF_PATH]; s2Byte noise_all; }ODM_NOISE_MONITOR; s2Byte ODM_InbandNoise_Monitor(PVOID pDM_VOID,u8 bPauseDIG,u8 IGIValue,u32 max_time); #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_PathDiv.c000066400000000000000000001401111261122257400221640ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // include files //============================================================ #include "Mp_Precomp.h" #include "phydm_precomp.h" VOID odm_PathDiversityInit( IN PVOID pDM_VOID ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; if(pDM_Odm->mp_mode == TRUE) return; if(!(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("Return: Not Support PathDiv\n")); return; } #if RTL8812A_SUPPORT if(pDM_Odm->SupportICType & ODM_RTL8812) ODM_PathDiversityInit_8812A(pDM_Odm); #endif #endif } VOID odm_PathDiversity( IN PVOID pDM_VOID ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; if(!(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("Return: Not Support PathDiv\n")); return; } #if RTL8812A_SUPPORT if(pDM_Odm->SupportICType & ODM_RTL8812) ODM_PathDiversity_8812A(pDM_Odm); #endif #endif //(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) } #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) // // 2011/12/02 MH Copy from MP oursrc for temporarily test. // BOOLEAN odm_IsConnected_92C( IN PADAPTER Adapter ) { PRT_WLAN_STA pEntry; PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); u4Byte i; BOOLEAN bConnected=FALSE; if(pMgntInfo->mAssoc) { bConnected = TRUE; } else { for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); else pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); if(pEntry!=NULL) { if(pEntry->bAssociated) { bConnected = TRUE; break; } } else { break; } } } return bConnected; } BOOLEAN ODM_PathDiversityBeforeLink92C( //IN PADAPTER Adapter IN PDM_ODM_T pDM_Odm ) { #if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE* pHalData = NULL; PMGNT_INFO pMgntInfo = NULL; //pSWAT_T pDM_SWAT_Table = &Adapter->DM_SWAT_Table; pPD_T pDM_PDTable = NULL; s1Byte Score = 0; PRT_WLAN_BSS pTmpBssDesc; PRT_WLAN_BSS pTestBssDesc; u1Byte target_chnl = 0; u2Byte index; if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413 { // The ODM structure is not initialized. return FALSE; } pHalData = GET_HAL_DATA(Adapter); pMgntInfo = &Adapter->MgntInfo; pDM_PDTable = &Adapter->DM_PDTable; // Condition that does not need to use path diversity. if((!(pHalData->CVID_Version==VERSION_1_BEFORE_8703B && IS_92C_SERIAL(pHalData->VersionID))) || (pHalData->PathDivCfg!=1) || pMgntInfo->AntennaTest ) { RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C(): No PathDiv Mechanism before link.\n")); return FALSE; } // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK); if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) { PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C(): RFChangeInProgress(%x), eRFPowerState(%x)\n", pMgntInfo->RFChangeInProgress, pHalData->eRFPowerState)); //pDM_SWAT_Table->SWAS_NoLink_State = 0; pDM_PDTable->PathDiv_NoLink_State = 0; return FALSE; } else { PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); } //1 Run AntDiv mechanism "Before Link" part. //if(pDM_SWAT_Table->SWAS_NoLink_State == 0) if(pDM_PDTable->PathDiv_NoLink_State == 0) { //1 Prepare to do Scan again to check current antenna state. // Set check state to next step. //pDM_SWAT_Table->SWAS_NoLink_State = 1; pDM_PDTable->PathDiv_NoLink_State = 1; // Copy Current Scan list. Adapter->MgntInfo.tmpNumBssDesc = pMgntInfo->NumBssDesc; PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC); // Switch Antenna to another one. if(pDM_PDTable->DefaultRespPath == 0) { PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x05); // TRX path = PathB odm_SetRespPath_92C(Adapter, 1); pDM_PDTable->OFDMTXPath = 0xFFFFFFFF; pDM_PDTable->CCKTXPath = 0xFFFFFFFF; } else { PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x00); // TRX path = PathA odm_SetRespPath_92C(Adapter, 0); pDM_PDTable->OFDMTXPath = 0x0; pDM_PDTable->CCKTXPath = 0x0; } #if 0 pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A; RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Change to Ant(%s) for testing.\n", (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B")); //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); #endif // Go back to scan function again. RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Scan one more time\n")); pMgntInfo->ScanStep=0; target_chnl = odm_SwAntDivSelectScanChnl(Adapter); odm_SwAntDivConstructScanChnl(Adapter, target_chnl); PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); return TRUE; } else { //1 ScanComple() is called after antenna swiched. //1 Check scan result and determine which antenna is going //1 to be used. for(index=0; indexMgntInfo.tmpNumBssDesc; index++) { pTmpBssDesc = &(Adapter->MgntInfo.tmpbssDesc[index]); pTestBssDesc = &(pMgntInfo->bssDesc[index]); if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0) { RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C(): ERROR!! This shall not happen.\n")); continue; } if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) { RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Compare scan entry: Score++\n")); RT_PRINT_STR(COMP_INIT, DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); RT_TRACE(COMP_INIT, DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); Score++; PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); } else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower) { RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Compare scan entry: Score--\n")); RT_PRINT_STR(COMP_INIT, DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); RT_TRACE(COMP_INIT, DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); Score--; } } if(pMgntInfo->NumBssDesc!=0 && Score<=0) { RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C(): DefaultRespPath=%d\n", pDM_PDTable->DefaultRespPath)); //pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; } else { RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C(): DefaultRespPath=%d\n", pDM_PDTable->DefaultRespPath)); if(pDM_PDTable->DefaultRespPath == 0) { pDM_PDTable->OFDMTXPath = 0xFFFFFFFF; pDM_PDTable->CCKTXPath = 0xFFFFFFFF; odm_SetRespPath_92C(Adapter, 1); } else { pDM_PDTable->OFDMTXPath = 0x0; pDM_PDTable->CCKTXPath = 0x0; odm_SetRespPath_92C(Adapter, 0); } PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x01); // RX path = PathAB //pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna; //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); //pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); } // Check state reset to default and wait for next time. //pDM_SWAT_Table->SWAS_NoLink_State = 0; pDM_PDTable->PathDiv_NoLink_State = 0; return FALSE; } #else return FALSE; #endif } VOID odm_PathDiversityAfterLink_92C( IN PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; pPD_T pDM_PDTable = &Adapter->DM_PDTable; u1Byte DefaultRespPath=0; if((!(pHalData->CVID_Version==VERSION_1_BEFORE_8703B && IS_92C_SERIAL(pHalData->VersionID))) || (pHalData->PathDivCfg != 1) || (pHalData->eRFPowerState == eRfOff)) { if(pHalData->PathDivCfg == 0) { RT_TRACE( COMP_INIT, DBG_LOUD, ("No ODM_TXPathDiversity()\n")); } else { RT_TRACE( COMP_INIT, DBG_LOUD, ("2T ODM_TXPathDiversity()\n")); } return; } if(!odm_IsConnected_92C(Adapter)) { RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity(): No Connections\n")); return; } if(pDM_PDTable->TrainingState == 0) { RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity() ==>\n")); odm_OFDMTXPathDiversity_92C(Adapter); if((pDM_PDTable->CCKPathDivEnable == TRUE) && (pDM_PDTable->OFDM_Pkt_Cnt < 100)) { //RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=0\n")); if(pDM_PDTable->CCK_Pkt_Cnt > 300) pDM_PDTable->Timer = 20; else if(pDM_PDTable->CCK_Pkt_Cnt > 100) pDM_PDTable->Timer = 60; else pDM_PDTable->Timer = 250; RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: timer=%d\n",pDM_PDTable->Timer)); PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x00); // RX path = PathA pDM_PDTable->TrainingState = 1; pHalData->RSSI_test = TRUE; ODM_SetTimer( pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, pDM_PDTable->Timer); //ms } else { pDM_PDTable->CCKTXPath = pDM_PDTable->OFDMTXPath; DefaultRespPath = pDM_PDTable->OFDMDefaultRespPath; RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: Skip odm_CCKTXPathDiversity_92C, DefaultRespPath is OFDM\n")); odm_SetRespPath_92C(Adapter, DefaultRespPath); odm_ResetPathDiversity_92C(Adapter); RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity() <==\n")); } } else if(pDM_PDTable->TrainingState == 1) { //RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=1\n")); PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x05); // RX path = PathB pDM_PDTable->TrainingState = 2; ODM_SetTimer( pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, pDM_PDTable->Timer); //ms } else { //RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=2\n")); pDM_PDTable->TrainingState = 0; odm_CCKTXPathDiversity_92C(Adapter); if(pDM_PDTable->OFDM_Pkt_Cnt != 0) { DefaultRespPath = pDM_PDTable->OFDMDefaultRespPath; RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: DefaultRespPath is OFDM\n")); } else { DefaultRespPath = pDM_PDTable->CCKDefaultRespPath; RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: DefaultRespPath is CCK\n")); } odm_SetRespPath_92C(Adapter, DefaultRespPath); odm_ResetPathDiversity_92C(Adapter); RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity() <==\n")); } } VOID odm_SetRespPath_92C( IN PADAPTER Adapter, IN u1Byte DefaultRespPath ) { pPD_T pDM_PDTable = &Adapter->DM_PDTable; RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: Select Response Path=%d\n",DefaultRespPath)); if(DefaultRespPath != pDM_PDTable->DefaultRespPath) { if(DefaultRespPath == 0) { PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x15); } else { PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x2A); } } pDM_PDTable->DefaultRespPath = DefaultRespPath; } VOID odm_OFDMTXPathDiversity_92C( IN PADAPTER Adapter) { // HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); PRT_WLAN_STA pEntry; u1Byte i, DefaultRespPath = 0; s4Byte MinRSSI = 0xFF; pPD_T pDM_PDTable = &Adapter->DM_PDTable; pDM_PDTable->OFDMTXPath = 0; //1 Default Port if(pMgntInfo->mAssoc) { RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port RSSI[0]=%d, RSSI[1]=%d\n", Adapter->RxStats.RxRSSIPercentage[0], Adapter->RxStats.RxRSSIPercentage[1])); if(Adapter->RxStats.RxRSSIPercentage[0] > Adapter->RxStats.RxRSSIPercentage[1]) { pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath & (~BIT0); MinRSSI = Adapter->RxStats.RxRSSIPercentage[1]; DefaultRespPath = 0; RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port Select Path-0\n")); } else { pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath | BIT0; MinRSSI = Adapter->RxStats.RxRSSIPercentage[0]; DefaultRespPath = 1; RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port Select Path-1\n")); } //RT_TRACE( COMP_INIT, DBG_LOUD, ("pDM_PDTable->OFDMTXPath =0x%x\n",pDM_PDTable->OFDMTXPath)); } //1 Extension Port for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); else pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); if(pEntry!=NULL) { if(pEntry->bAssociated) { RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d, RSSI_0=%d, RSSI_1=%d\n", pEntry->AssociatedMacId, pEntry->rssi_stat.RxRSSIPercentage[0], pEntry->rssi_stat.RxRSSIPercentage[1])); if(pEntry->rssi_stat.RxRSSIPercentage[0] > pEntry->rssi_stat.RxRSSIPercentage[1]) { pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath & ~(BIT(pEntry->AssociatedMacId)); //pHalData->TXPath = pHalData->TXPath & ~(1<<(pEntry->AssociatedMacId)); RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d Select Path-0\n", pEntry->AssociatedMacId)); if(pEntry->rssi_stat.RxRSSIPercentage[1] < MinRSSI) { MinRSSI = pEntry->rssi_stat.RxRSSIPercentage[1]; DefaultRespPath = 0; } } else { pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath | BIT(pEntry->AssociatedMacId); //pHalData->TXPath = pHalData->TXPath | (1 << (pEntry->AssociatedMacId)); RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d Select Path-1\n", pEntry->AssociatedMacId)); if(pEntry->rssi_stat.RxRSSIPercentage[0] < MinRSSI) { MinRSSI = pEntry->rssi_stat.RxRSSIPercentage[0]; DefaultRespPath = 1; } } } } else { break; } } pDM_PDTable->OFDMDefaultRespPath = DefaultRespPath; } VOID odm_CCKTXPathDiversity_92C( IN PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); PRT_WLAN_STA pEntry; s4Byte MinRSSI = 0xFF; u1Byte i, DefaultRespPath = 0; // BOOLEAN bBModePathDiv = FALSE; pPD_T pDM_PDTable = &Adapter->DM_PDTable; //1 Default Port if(pMgntInfo->mAssoc) { if(pHalData->OFDM_Pkt_Cnt == 0) { for(i=0; i<2; i++) { if(pDM_PDTable->RSSI_CCK_Path_cnt[i] > 1) //Because the first packet is discarded pDM_PDTable->RSSI_CCK_Path[i] = pDM_PDTable->RSSI_CCK_Path[i] / (pDM_PDTable->RSSI_CCK_Path_cnt[i]-1); else pDM_PDTable->RSSI_CCK_Path[i] = 0; } RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: pDM_PDTable->RSSI_CCK_Path[0]=%d, pDM_PDTable->RSSI_CCK_Path[1]=%d\n", pDM_PDTable->RSSI_CCK_Path[0], pDM_PDTable->RSSI_CCK_Path[1])); RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: pDM_PDTable->RSSI_CCK_Path_cnt[0]=%d, pDM_PDTable->RSSI_CCK_Path_cnt[1]=%d\n", pDM_PDTable->RSSI_CCK_Path_cnt[0], pDM_PDTable->RSSI_CCK_Path_cnt[1])); if(pDM_PDTable->RSSI_CCK_Path[0] > pDM_PDTable->RSSI_CCK_Path[1]) { pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & (~BIT0); MinRSSI = pDM_PDTable->RSSI_CCK_Path[1]; DefaultRespPath = 0; RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-0\n")); } else if(pDM_PDTable->RSSI_CCK_Path[0] < pDM_PDTable->RSSI_CCK_Path[1]) { pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath | BIT0; MinRSSI = pDM_PDTable->RSSI_CCK_Path[0]; DefaultRespPath = 1; RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-1\n")); } else { if((pDM_PDTable->RSSI_CCK_Path[0] != 0) && (pDM_PDTable->RSSI_CCK_Path[0] < MinRSSI)) { pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & (~BIT0); RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-0\n")); MinRSSI = pDM_PDTable->RSSI_CCK_Path[1]; DefaultRespPath = 0; } else { RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port unchange CCK Path\n")); } } } else //Follow OFDM decision { pDM_PDTable->CCKTXPath = (pDM_PDTable->CCKTXPath & (~BIT0)) | (pDM_PDTable->OFDMTXPath &BIT0); RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Follow OFDM decision, Default port Select CCK Path-%d\n", pDM_PDTable->CCKTXPath &BIT0)); } } //1 Extension Port for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); else pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); if(pEntry!=NULL) { if(pEntry->bAssociated) { if(pEntry->rssi_stat.OFDM_Pkt_Cnt == 0) { u1Byte j=0; for(j=0; j<2; j++) { if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[j] > 1) pEntry->rssi_stat.RSSI_CCK_Path[j] = pEntry->rssi_stat.RSSI_CCK_Path[j] / (pEntry->rssi_stat.RSSI_CCK_Path_cnt[j]-1); else pEntry->rssi_stat.RSSI_CCK_Path[j] = 0; } RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d, RSSI_CCK0=%d, RSSI_CCK1=%d\n", pEntry->AssociatedMacId, pEntry->rssi_stat.RSSI_CCK_Path[0], pEntry->rssi_stat.RSSI_CCK_Path[1])); if(pEntry->rssi_stat.RSSI_CCK_Path[0] >pEntry->rssi_stat.RSSI_CCK_Path[1]) { pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & ~(BIT(pEntry->AssociatedMacId)); RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-0\n", pEntry->AssociatedMacId)); if(pEntry->rssi_stat.RSSI_CCK_Path[1] < MinRSSI) { MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[1]; DefaultRespPath = 0; } } else if(pEntry->rssi_stat.RSSI_CCK_Path[0] rssi_stat.RSSI_CCK_Path[1]) { pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath | BIT(pEntry->AssociatedMacId); RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-1\n", pEntry->AssociatedMacId)); if(pEntry->rssi_stat.RSSI_CCK_Path[0] < MinRSSI) { MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[0]; DefaultRespPath = 1; } } else { if((pEntry->rssi_stat.RSSI_CCK_Path[0] != 0) && (pEntry->rssi_stat.RSSI_CCK_Path[0] < MinRSSI)) { pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & ~(BIT(pEntry->AssociatedMacId)); MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[1]; DefaultRespPath = 0; RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-0\n", pEntry->AssociatedMacId)); } else { RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d unchange CCK Path\n", pEntry->AssociatedMacId)); } } } else //Follow OFDM decision { pDM_PDTable->CCKTXPath = (pDM_PDTable->CCKTXPath & (~(BIT(pEntry->AssociatedMacId)))) | (pDM_PDTable->OFDMTXPath & BIT(pEntry->AssociatedMacId)); RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Follow OFDM decision, MACID=%d Select CCK Path-%d\n", pEntry->AssociatedMacId, (pDM_PDTable->CCKTXPath & BIT(pEntry->AssociatedMacId))>>(pEntry->AssociatedMacId))); } } } else { break; } } RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C:MinRSSI=%d\n",MinRSSI)); if(MinRSSI == 0xFF) DefaultRespPath = pDM_PDTable->CCKDefaultRespPath; pDM_PDTable->CCKDefaultRespPath = DefaultRespPath; } VOID odm_ResetPathDiversity_92C( IN PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); pPD_T pDM_PDTable = &Adapter->DM_PDTable; PRT_WLAN_STA pEntry; u4Byte i,j; pHalData->RSSI_test = FALSE; pDM_PDTable->CCK_Pkt_Cnt = 0; pDM_PDTable->OFDM_Pkt_Cnt = 0; pHalData->CCK_Pkt_Cnt =0; pHalData->OFDM_Pkt_Cnt =0; if(pDM_PDTable->CCKPathDivEnable == TRUE) PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x01); //RX path = PathAB for(i=0; i<2; i++) { pDM_PDTable->RSSI_CCK_Path_cnt[i]=0; pDM_PDTable->RSSI_CCK_Path[i] = 0; } for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); else pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); if(pEntry!=NULL) { pEntry->rssi_stat.CCK_Pkt_Cnt = 0; pEntry->rssi_stat.OFDM_Pkt_Cnt = 0; for(j=0; j<2; j++) { pEntry->rssi_stat.RSSI_CCK_Path_cnt[j] = 0; pEntry->rssi_stat.RSSI_CCK_Path[j] = 0; } } else break; } } VOID odm_CCKTXPathDiversityCallback( PRT_TIMER pTimer ) { #if USE_WORKITEM PADAPTER Adapter = (PADAPTER)pTimer->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; #else PADAPTER Adapter = (PADAPTER)pTimer->Adapter; #endif #if DEV_BUS_TYPE==RT_PCI_INTERFACE #if USE_WORKITEM PlatformScheduleWorkItem(&pDM_Odm->CCKPathDiversityWorkitem); #else odm_PathDiversityAfterLink_92C(Adapter); #endif #else PlatformScheduleWorkItem(&pDM_Odm->CCKPathDiversityWorkitem); #endif } VOID odm_CCKTXPathDiversityWorkItemCallback( IN PVOID pContext ) { PADAPTER Adapter = (PADAPTER)pContext; odm_CCKTXPathDiversity_92C(Adapter); } // // 20100514 Luke/Joseph: // Callback function for 500ms antenna test trying. // VOID odm_PathDivChkAntSwitchCallback( PRT_TIMER pTimer ) { PADAPTER Adapter = (PADAPTER)pTimer->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; #if DEV_BUS_TYPE==RT_PCI_INTERFACE #if USE_WORKITEM PlatformScheduleWorkItem(&pDM_Odm->PathDivSwitchWorkitem); #else odm_PathDivChkAntSwitch(pDM_Odm); #endif #else PlatformScheduleWorkItem(&pDM_Odm->PathDivSwitchWorkitem); #endif //odm_SwAntDivChkAntSwitch(Adapter, SWAW_STEP_DETERMINE); } VOID odm_PathDivChkAntSwitchWorkitemCallback( IN PVOID pContext ) { PADAPTER pAdapter = (PADAPTER)pContext; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; odm_PathDivChkAntSwitch(pDM_Odm); } //MAC0_ACCESS_PHY1 // 2011-06-22 Neil Chen & Gary Hsin // Refer to Jr.Luke's SW ANT DIV // 92D Path Diversity Main function // refer to 88C software antenna diversity // VOID odm_PathDivChkAntSwitch( PDM_ODM_T pDM_Odm //PADAPTER Adapter, //u1Byte Step ) { PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; s4Byte curRSSI=100, RSSI_A, RSSI_B; u1Byte nextAntenna=AUX_ANT; static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; u8Byte curTxOkCnt, curRxOkCnt; static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; u8Byte CurByteCnt=0, PreByteCnt=0; static u1Byte TrafficLoad = TRAFFIC_LOW; u1Byte Score_A=0, Score_B=0; u1Byte i=0x0; // Neil Chen static u1Byte pathdiv_para=0x0; static u1Byte switchfirsttime=0x00; // u1Byte regB33 = (u1Byte) PHY_QueryBBReg(Adapter, 0xB30,BIT27); u1Byte regB33 = (u1Byte)ODM_GetBBReg(pDM_Odm, PATHDIV_REG, BIT27); //u1Byte reg637 =0x0; static u1Byte fw_value=0x0; //u8Byte curTxOkCnt_tmp, curRxOkCnt_tmp; PADAPTER BuddyAdapter = Adapter->BuddyAdapter; // another adapter MAC // Path Diversity //Neil Chen--2011--06--22 //u1Byte PathDiv_Trigger = (u1Byte) PHY_QueryBBReg(Adapter, 0xBA0,BIT31); u1Byte PathDiv_Trigger = (u1Byte) ODM_GetBBReg(pDM_Odm, PATHDIV_TRI,BIT31); u1Byte PathDiv_Enable = pHalData->bPathDiv_Enable; //DbgPrint("Path Div PG Value:%x \n",PathDiv_Enable); if((BuddyAdapter==NULL)||(!PathDiv_Enable)||(PathDiv_Trigger)||(pHalData->CurrentBandType == BAND_ON_2_4G)) { return; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD,("===================>odm_PathDivChkAntSwitch()\n")); // The first time to switch path excluding 2nd, 3rd, ....etc.... if(switchfirsttime==0) { if(regB33==0) { pDM_SWAT_Table->CurAntenna = MAIN_ANT; // Default MAC0_5G-->Path A (current antenna) } } // Condition that does not need to use antenna diversity. if(pDM_Odm->SupportICType != ODM_RTL8192D) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_PathDiversityMechanims(): No PathDiv Mechanism.\n")); return; } // Radio off: Status reset to default and return. if(pHalData->eRFPowerState==eRfOff) { //ODM_SwAntDivRestAfterLink(Adapter); return; } /* // Handling step mismatch condition. // Peak step is not finished at last time. Recover the variable and check again. if( Step != pDM_SWAT_Table->try_flag ) { ODM_SwAntDivRestAfterLink(Adapter); } */ if(pDM_SWAT_Table->try_flag == 0xff) { // Select RSSI checking target if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter)) { // Target: Infrastructure mode AP. pHalData->RSSI_target = NULL; ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_PathDivMechanism(): RSSI_target is DEF AP!\n")); } else { u1Byte index = 0; PRT_WLAN_STA pEntry = NULL; PADAPTER pTargetAdapter = NULL; if( pMgntInfo->mIbss || ACTING_AS_AP(Adapter) ) { // Target: AP/IBSS peer. pTargetAdapter = Adapter; } else if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) { // Target: VWIFI peer. pTargetAdapter = GetFirstExtAdapter(Adapter); } if(pTargetAdapter != NULL) { for(index=0; indexbAssociated) break; } } } if(pEntry == NULL) { ODM_PathDivRestAfterLink(pDM_Odm); ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n")); return; } else { pHalData->RSSI_target = pEntry; ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); } } pHalData->RSSI_cnt_A = 0; pHalData->RSSI_cnt_B = 0; pDM_SWAT_Table->try_flag = 0; ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): Set try_flag to 0 prepare for peak!\n")); return; } else { // 1st step curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; if(pDM_SWAT_Table->try_flag == 1) // Training State { if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) { TXByteCnt_A += curTxOkCnt; RXByteCnt_A += curRxOkCnt; } else { TXByteCnt_B += curTxOkCnt; RXByteCnt_B += curRxOkCnt; } nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT; pDM_SWAT_Table->RSSI_Trying--; ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying)); if(pDM_SWAT_Table->RSSI_Trying == 0) { CurByteCnt = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? (TXByteCnt_A+RXByteCnt_A) : (TXByteCnt_B+RXByteCnt_B); PreByteCnt = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? (TXByteCnt_B+RXByteCnt_B) : (TXByteCnt_A+RXByteCnt_A); if(TrafficLoad == TRAFFIC_HIGH) { //CurByteCnt = PlatformDivision64(CurByteCnt, 9); PreByteCnt =PreByteCnt*9; } else if(TrafficLoad == TRAFFIC_LOW) { //CurByteCnt = PlatformDivision64(CurByteCnt, 2); PreByteCnt =PreByteCnt*2; } if(pHalData->RSSI_cnt_A > 0) RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; else RSSI_A = 0; if(pHalData->RSSI_cnt_B > 0) RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; else RSSI_B = 0; curRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_A : RSSI_B; pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_B : RSSI_A; ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: preAntenna= %s, curAntenna= %s \n", (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B)); } } else // try_flag=0 { if(pHalData->RSSI_cnt_A > 0) RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; else RSSI_A = 0; if(pHalData->RSSI_cnt_B > 0) RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; else RSSI_B = 0; curRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_A : RSSI_B; pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->PreAntenna == MAIN_ANT)? RSSI_A : RSSI_B; ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: preAntenna= %s, curAntenna= %s \n", (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B)); //RT_TRACE(COMP_INIT, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt)); //RT_TRACE(COMP_INIT, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt)); } //1 Trying State if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0)) { if(pDM_SWAT_Table->TestMode == TP_MODE) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: TestMode = TP_MODE")); ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH= TRY:CurByteCnt = %"i64fmt"d,", CurByteCnt)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH= TRY:PreByteCnt = %"i64fmt"d\n",PreByteCnt)); if(CurByteCnt < PreByteCnt) { if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; else pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; } else { if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; else pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; } for (i= 0; i<8; i++) { if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1) Score_A++; else Score_B++; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Score_A=%d, Score_B=%d\n", Score_A, Score_B)); if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) { nextAntenna = (Score_A >= Score_B)?MAIN_ANT:AUX_ANT; } else { nextAntenna = (Score_B >= Score_A)?AUX_ANT:MAIN_ANT; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: nextAntenna=%s\n",(nextAntenna==MAIN_ANT)?"MAIN":"AUX")); ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: preAntenna= %s, curAntenna= %s \n", (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); if(nextAntenna != pDM_SWAT_Table->CurAntenna) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Switch back to another antenna")); } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: current anntena is good\n")); } } if(pDM_SWAT_Table->TestMode == RSSI_MODE) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: TestMode = RSSI_MODE")); pDM_SWAT_Table->SelectAntennaMap=0xAA; if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna { //RT_TRACE(COMP_INIT, DBG_LOUD, ("SWAS: Switch back to another antenna")); nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)?AUX_ANT : MAIN_ANT; } else // current anntena is good { nextAntenna =pDM_SWAT_Table->CurAntenna; //RT_TRACE(COMP_INIT, DBG_LOUD, ("SWAS: current anntena is good\n")); } } pDM_SWAT_Table->try_flag = 0; pHalData->RSSI_test = FALSE; pHalData->RSSI_sum_A = 0; pHalData->RSSI_cnt_A = 0; pHalData->RSSI_sum_B = 0; pHalData->RSSI_cnt_B = 0; TXByteCnt_A = 0; TXByteCnt_B = 0; RXByteCnt_A = 0; RXByteCnt_B = 0; } //1 Normal State else if(pDM_SWAT_Table->try_flag == 0) { if(TrafficLoad == TRAFFIC_HIGH) { if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) TrafficLoad = TRAFFIC_HIGH; else TrafficLoad = TRAFFIC_LOW; } else if(TrafficLoad == TRAFFIC_LOW) { if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) TrafficLoad = TRAFFIC_HIGH; else TrafficLoad = TRAFFIC_LOW; } if(TrafficLoad == TRAFFIC_HIGH) pDM_SWAT_Table->bTriggerAntennaSwitch = 0; //RT_TRACE(COMP_INIT, DBG_LOUD, ("Normal:TrafficLoad = %llu\n", curTxOkCnt+curRxOkCnt)); //Prepare To Try Antenna nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT; pDM_SWAT_Table->try_flag = 1; pHalData->RSSI_test = TRUE; if((curRxOkCnt+curTxOkCnt) > 1000) { #if DEV_BUS_TYPE==RT_PCI_INTERFACE pDM_SWAT_Table->RSSI_Trying = 4; #else pDM_SWAT_Table->RSSI_Trying = 2; #endif pDM_SWAT_Table->TestMode = TP_MODE; } else { pDM_SWAT_Table->RSSI_Trying = 2; pDM_SWAT_Table->TestMode = RSSI_MODE; } //RT_TRACE(COMP_INIT, DBG_LOUD, ("SWAS: Normal State -> Begin Trying!\n")); pHalData->RSSI_sum_A = 0; pHalData->RSSI_cnt_A = 0; pHalData->RSSI_sum_B = 0; pHalData->RSSI_cnt_B = 0; } // end of try_flag=0 } //1 4.Change TRX antenna if(nextAntenna != pDM_SWAT_Table->CurAntenna) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Change TX Antenna!\n ")); //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, nextAntenna); for 88C if(nextAntenna==MAIN_ANT) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Next Antenna is RF PATH A\n ")); pathdiv_para = 0x02; //02 to switchback to RF path A fw_value = 0x03; #if DEV_BUS_TYPE==RT_PCI_INTERFACE odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); #else ODM_FillH2CCmd(pDM_Odm, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); #endif } else if(nextAntenna==AUX_ANT) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Next Antenna is RF PATH B\n ")); if(switchfirsttime==0) // First Time To Enter Path Diversity { switchfirsttime=0x01; pathdiv_para = 0x00; fw_value=0x00; // to backup RF Path A Releated Registers #if DEV_BUS_TYPE==RT_PCI_INTERFACE odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); #else ODM_FillH2CCmd(pDM_Odm, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); //for(u1Byte n=0; n<80,n++) //{ //delay_us(500); ODM_delay_ms(500); odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); fw_value=0x01; // to backup RF Path A Releated Registers ODM_FillH2CCmd(pDM_Odm, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); #endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: FIRST TIME To DO PATH SWITCH!\n ")); } else { pathdiv_para = 0x01; fw_value = 0x02; #if DEV_BUS_TYPE==RT_PCI_INTERFACE odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); #else ODM_FillH2CCmd(pDM_Odm, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); #endif } } // odm_PathDiversity_8192D(Adapter, pathdiv_para); } //1 5.Reset Statistics pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; pDM_SWAT_Table->CurAntenna = nextAntenna; pDM_SWAT_Table->PreRSSI = curRSSI; //1 6.Set next timer if(pDM_SWAT_Table->RSSI_Trying == 0) return; if(pDM_SWAT_Table->RSSI_Trying%2 == 0) { if(pDM_SWAT_Table->TestMode == TP_MODE) { if(TrafficLoad == TRAFFIC_HIGH) { #if DEV_BUS_TYPE==RT_PCI_INTERFACE ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 10 ); //ms ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 10 ms\n")); #else ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 20 ); //ms ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 20 ms\n")); #endif } else if(TrafficLoad == TRAFFIC_LOW) { ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 50 ); //ms ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 50 ms\n")); } } else // TestMode == RSSI_MODE { ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 500 ); //ms ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 500 ms\n")); } } else { if(pDM_SWAT_Table->TestMode == TP_MODE) { if(TrafficLoad == TRAFFIC_HIGH) #if DEV_BUS_TYPE==RT_PCI_INTERFACE ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 90 ); //ms //ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 90 ms\n")); #else ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 180); //ms #endif else if(TrafficLoad == TRAFFIC_LOW) ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 100 ); //ms } else ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 500 ); //ms } } VOID ODM_CCKPathDiversityChkPerPktRssi( PADAPTER Adapter, BOOLEAN bIsDefPort, BOOLEAN bMatchBSSID, PRT_WLAN_STA pEntry, PRT_RFD pRfd, pu1Byte pDesc ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); BOOLEAN bCount = FALSE; pPD_T pDM_PDTable = &Adapter->DM_PDTable; //BOOLEAN isCCKrate = RX_HAL_IS_CCK_RATE_92C(pDesc); #if DEV_BUS_TYPE != RT_SDIO_INTERFACE BOOLEAN isCCKrate = RX_HAL_IS_CCK_RATE(Adapter, pDesc); #else //below code would be removed if we have verified SDIO BOOLEAN isCCKrate = IS_HARDWARE_TYPE_8188E(Adapter) ? RX_HAL_IS_CCK_RATE_88E(pDesc) : RX_HAL_IS_CCK_RATE_92C(pDesc); #endif if((pHalData->PathDivCfg != 1) || (pHalData->RSSI_test == FALSE)) return; if(pHalData->RSSI_target==NULL && bIsDefPort && bMatchBSSID) bCount = TRUE; else if(pHalData->RSSI_target!=NULL && pEntry!=NULL && pHalData->RSSI_target==pEntry) bCount = TRUE; if(bCount && isCCKrate) { if(pDM_PDTable->TrainingState == 1 ) { if(pEntry) { if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[0] != 0) pEntry->rssi_stat.RSSI_CCK_Path[0] += pRfd->Status.RxPWDBAll; pEntry->rssi_stat.RSSI_CCK_Path_cnt[0]++; } else { if(pDM_PDTable->RSSI_CCK_Path_cnt[0] != 0) pDM_PDTable->RSSI_CCK_Path[0] += pRfd->Status.RxPWDBAll; pDM_PDTable->RSSI_CCK_Path_cnt[0]++; } } else if(pDM_PDTable->TrainingState == 2 ) { if(pEntry) { if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[1] != 0) pEntry->rssi_stat.RSSI_CCK_Path[1] += pRfd->Status.RxPWDBAll; pEntry->rssi_stat.RSSI_CCK_Path_cnt[1]++; } else { if(pDM_PDTable->RSSI_CCK_Path_cnt[1] != 0) pDM_PDTable->RSSI_CCK_Path[1] += pRfd->Status.RxPWDBAll; pDM_PDTable->RSSI_CCK_Path_cnt[1]++; } } } } //Neil Chen---2011--06--22 //----92D Path Diversity----// //#ifdef PathDiv92D //================================== //3 Path Diversity //================================== // // 20100514 Luke/Joseph: // Add new function for antenna diversity after link. // This is the main function of antenna diversity after link. // This function is called in HalDmWatchDog() and ODM_SwAntDivChkAntSwitchCallback(). // HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test. // In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing. // After 500ms, ODM_SwAntDivChkAntSwitchCallback() calls this function to compare the signal just // listened on the air with the RSSI of original antenna. // It chooses the antenna with better RSSI. // There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting // penalty to get next try. // // // 20100503 Joseph: // Add new function SwAntDivCheck8192C(). // This is the main function of Antenna diversity function before link. // Mainly, it just retains last scan result and scan again. // After that, it compares the scan result to see which one gets better RSSI. // It selects antenna with better receiving power and returns better scan result. // // // 20100514 Luke/Joseph: // This function is used to gather the RSSI information for antenna testing. // It selects the RSSI of the peer STA that we want to know. // VOID ODM_PathDivChkPerPktRssi( PADAPTER Adapter, BOOLEAN bIsDefPort, BOOLEAN bMatchBSSID, PRT_WLAN_STA pEntry, PRT_RFD pRfd ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); BOOLEAN bCount = FALSE; PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; if(pHalData->RSSI_target==NULL && bIsDefPort && bMatchBSSID) bCount = TRUE; else if(pHalData->RSSI_target!=NULL && pEntry!=NULL && pHalData->RSSI_target==pEntry) bCount = TRUE; if(bCount) { //1 RSSI for SW Antenna Switch if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) { pHalData->RSSI_sum_A += pRfd->Status.RxPWDBAll; pHalData->RSSI_cnt_A++; } else { pHalData->RSSI_sum_B += pRfd->Status.RxPWDBAll; pHalData->RSSI_cnt_B++; } } } // // 20100514 Luke/Joseph: // Add new function to reset antenna diversity state after link. // VOID ODM_PathDivRestAfterLink( IN PDM_ODM_T pDM_Odm ) { PADAPTER Adapter=pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; pHalData->RSSI_cnt_A = 0; pHalData->RSSI_cnt_B = 0; pHalData->RSSI_test = FALSE; pDM_SWAT_Table->try_flag = 0x0; // NOT 0xff pDM_SWAT_Table->RSSI_Trying = 0; pDM_SWAT_Table->SelectAntennaMap=0xAA; pDM_SWAT_Table->CurAntenna = MAIN_ANT; } //================================================== //3 PathDiv End //================================================== VOID ODM_FillTXPathInTXDESC( IN PADAPTER Adapter, IN PRT_TCB pTcb, IN pu1Byte pDesc ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u4Byte TXPath; pPD_T pDM_PDTable = &Adapter->DM_PDTable; //2011.09.05 Add by Luke Lee for path diversity if(pHalData->PathDivCfg == 1) { TXPath = (pDM_PDTable->OFDMTXPath >> pTcb->macId) & BIT0; //RT_TRACE( COMP_INIT, DBG_LOUD, ("Fill TXDESC: macID=%d, TXPath=%d\n", pTcb->macId, TXPath)); //SET_TX_DESC_TX_ANT_CCK(pDesc,TXPath); if(TXPath == 0) { SET_TX_DESC_TX_ANTL_92C(pDesc,1); SET_TX_DESC_TX_ANT_HT_92C(pDesc,1); } else { SET_TX_DESC_TX_ANTL_92C(pDesc,2); SET_TX_DESC_TX_ANT_HT_92C(pDesc,2); } TXPath = (pDM_PDTable->CCKTXPath >> pTcb->macId) & BIT0; if(TXPath == 0) { SET_TX_DESC_TX_ANT_CCK_92C(pDesc,1); } else { SET_TX_DESC_TX_ANT_CCK_92C(pDesc,2); } } } //Only for MP //Neil Chen--2012--0502-- VOID odm_PathDivInit_92D( IN PDM_ODM_T pDM_Odm) { pPATHDIV_PARA pathIQK = &pDM_Odm->pathIQK; pathIQK->org_2g_RegC14=0x0; pathIQK->org_2g_RegC4C=0x0; pathIQK->org_2g_RegC80=0x0; pathIQK->org_2g_RegC94=0x0; pathIQK->org_2g_RegCA0=0x0; pathIQK->org_5g_RegC14=0x0; pathIQK->org_5g_RegCA0=0x0; pathIQK->org_5g_RegE30=0x0; pathIQK->swt_2g_RegC14=0x0; pathIQK->swt_2g_RegC4C=0x0; pathIQK->swt_2g_RegC80=0x0; pathIQK->swt_2g_RegC94=0x0; pathIQK->swt_2g_RegCA0=0x0; pathIQK->swt_5g_RegC14=0x0; pathIQK->swt_5g_RegCA0=0x0; pathIQK->swt_5g_RegE30=0x0; } u1Byte odm_SwAntDivSelectScanChnl( IN PADAPTER Adapter ) { #if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; u2Byte i; u1Byte j, ScanChannel = 0, ChannelNum = 0; PRT_CHANNEL_LIST pChannelList = GET_RT_CHANNEL_LIST(pMgntInfo); u1Byte EachChannelSTAs[MAX_SCAN_CHANNEL_NUM] = {0}; if(pMgntInfo->tmpNumBssDesc == 0) return 0; for(i = 0; i < pMgntInfo->tmpNumBssDesc; i++) { ChannelNum = pMgntInfo->tmpbssDesc[i].ChannelNumber; for(j = 0; j < pChannelList->ChannelLen; j++) { if(pChannelList->ChnlListEntry[j].ChannelNum == ChannelNum) { EachChannelSTAs[j]++; break; } } } for(i = 0; i < MAX_SCAN_CHANNEL_NUM; i++) { if(EachChannelSTAs[i] > EachChannelSTAs[ScanChannel]) ScanChannel = (u1Byte)i; } if(EachChannelSTAs[ScanChannel] == 0) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("odm_SwAntDivSelectScanChnl(): Scan List is empty.\n")); return 0; } ScanChannel = pChannelList->ChnlListEntry[ScanChannel].ChannelNum; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("odm_SwAntDivSelectScanChnl(): Channel (( %d )) is select as scan channel.\n", ScanChannel)); return ScanChannel; #else return 0; #endif } VOID odm_SwAntDivConstructScanChnl( IN PADAPTER Adapter, IN u1Byte ScanChnl ) { PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; if(ScanChnl == 0) { u1Byte i; PRT_CHANNEL_LIST pChannelList = GET_RT_CHANNEL_LIST(pMgntInfo); // 20100519 Joseph: Original antenna scanned nothing. // Test antenna shall scan all channel with half period in this condition. RT_TRACE_F(COMP_SCAN, DBG_TRACE, (" RT_CHNL_LIST_ACTION_CONSTRUCT chnl %d \n", ScanChnl)); RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_CONSTRUCT_SCAN_LIST, NULL, NULL); for(i = 0; i < pChannelList->ChannelLen; i++) pChannelList->ChnlListEntry[i].ScanPeriod /= 2; } else { // The using of this CustomizedScanRequest is a trick to rescan the two channels // under the NORMAL scanning process. It will not affect MGNT_INFO.CustomizedScanRequest. CUSTOMIZED_SCAN_REQUEST CustomScanReq; CustomScanReq.bEnabled = TRUE; CustomScanReq.Channels[0] = ScanChnl; CustomScanReq.Channels[1] = pMgntInfo->dot11CurrentChannelNumber; CustomScanReq.nChannels = 2; CustomScanReq.ScanType = SCAN_ACTIVE; CustomScanReq.Duration = DEFAULT_PASSIVE_SCAN_PERIOD; RT_TRACE_F(COMP_SCAN, DBG_TRACE, (" RT_CHNL_LIST_ACTION_CONSTRUCT chnl %d \n", ScanChnl)); RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_CONSTRUCT_SCAN_LIST, &CustomScanReq, NULL); } } #endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_PathDiv.h000066400000000000000000000072271261122257400222030ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __PHYDMPATHDIV_H__ #define __PHYDMPATHDIV_H__ #define PATHDIV_VERSION "1.0" VOID odm_PathDiversityInit( IN PVOID pDM_VOID ); VOID odm_PathDiversity( IN PVOID pDM_VOID ); #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) //#define PATHDIV_ENABLE 1 #define dm_PathDiv_RSSI_Check ODM_PathDivChkPerPktRssi #define PathDivCheckBeforeLink8192C ODM_PathDiversityBeforeLink92C typedef struct _PathDiv_Parameter_define_ { u4Byte org_5g_RegE30; u4Byte org_5g_RegC14; u4Byte org_5g_RegCA0; u4Byte swt_5g_RegE30; u4Byte swt_5g_RegC14; u4Byte swt_5g_RegCA0; //for 2G IQK information u4Byte org_2g_RegC80; u4Byte org_2g_RegC4C; u4Byte org_2g_RegC94; u4Byte org_2g_RegC14; u4Byte org_2g_RegCA0; u4Byte swt_2g_RegC80; u4Byte swt_2g_RegC4C; u4Byte swt_2g_RegC94; u4Byte swt_2g_RegC14; u4Byte swt_2g_RegCA0; }PATHDIV_PARA,*pPATHDIV_PARA; VOID odm_PathDiversityInit_92C( IN PADAPTER Adapter ); VOID odm_2TPathDiversityInit_92C( IN PADAPTER Adapter ); VOID odm_1TPathDiversityInit_92C( IN PADAPTER Adapter ); BOOLEAN odm_IsConnected_92C( IN PADAPTER Adapter ); BOOLEAN ODM_PathDiversityBeforeLink92C( //IN PADAPTER Adapter IN PDM_ODM_T pDM_Odm ); VOID odm_PathDiversityAfterLink_92C( IN PADAPTER Adapter ); VOID odm_SetRespPath_92C( IN PADAPTER Adapter, IN u1Byte DefaultRespPath ); VOID odm_OFDMTXPathDiversity_92C( IN PADAPTER Adapter ); VOID odm_CCKTXPathDiversity_92C( IN PADAPTER Adapter ); VOID odm_ResetPathDiversity_92C( IN PADAPTER Adapter ); VOID odm_CCKTXPathDiversityCallback( PRT_TIMER pTimer ); VOID odm_CCKTXPathDiversityWorkItemCallback( IN PVOID pContext ); VOID odm_PathDivChkAntSwitchCallback( PRT_TIMER pTimer ); VOID odm_PathDivChkAntSwitchWorkitemCallback( IN PVOID pContext ); VOID odm_PathDivChkAntSwitch( PDM_ODM_T pDM_Odm ); VOID ODM_CCKPathDiversityChkPerPktRssi( PADAPTER Adapter, BOOLEAN bIsDefPort, BOOLEAN bMatchBSSID, PRT_WLAN_STA pEntry, PRT_RFD pRfd, pu1Byte pDesc ); VOID ODM_PathDivChkPerPktRssi( PADAPTER Adapter, BOOLEAN bIsDefPort, BOOLEAN bMatchBSSID, PRT_WLAN_STA pEntry, PRT_RFD pRfd ); VOID ODM_PathDivRestAfterLink( IN PDM_ODM_T pDM_Odm ); VOID ODM_FillTXPathInTXDESC( IN PADAPTER Adapter, IN PRT_TCB pTcb, IN pu1Byte pDesc ); VOID odm_PathDivInit_92D( IN PDM_ODM_T pDM_Odm ); u1Byte odm_SwAntDivSelectScanChnl( IN PADAPTER Adapter ); VOID odm_SwAntDivConstructScanChnl( IN PADAPTER Adapter, IN u1Byte ScanChnl ); #endif //#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) #endif //#ifndef __ODMPATHDIV_H__ rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_PowerTracking.c000066400000000000000000000556401261122257400234200ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // include files //============================================================ #include "Mp_Precomp.h" #include "phydm_precomp.h" //============================================================ // Global var //============================================================ u4Byte OFDMSwingTable[OFDM_TABLE_SIZE] = { 0x7f8001fe, // 0, +6.0dB 0x788001e2, // 1, +5.5dB 0x71c001c7, // 2, +5.0dB 0x6b8001ae, // 3, +4.5dB 0x65400195, // 4, +4.0dB 0x5fc0017f, // 5, +3.5dB 0x5a400169, // 6, +3.0dB 0x55400155, // 7, +2.5dB 0x50800142, // 8, +2.0dB 0x4c000130, // 9, +1.5dB 0x47c0011f, // 10, +1.0dB 0x43c0010f, // 11, +0.5dB 0x40000100, // 12, +0dB 0x3c8000f2, // 13, -0.5dB 0x390000e4, // 14, -1.0dB 0x35c000d7, // 15, -1.5dB 0x32c000cb, // 16, -2.0dB 0x300000c0, // 17, -2.5dB 0x2d4000b5, // 18, -3.0dB 0x2ac000ab, // 19, -3.5dB 0x288000a2, // 20, -4.0dB 0x26000098, // 21, -4.5dB 0x24000090, // 22, -5.0dB 0x22000088, // 23, -5.5dB 0x20000080, // 24, -6.0dB 0x1e400079, // 25, -6.5dB 0x1c800072, // 26, -7.0dB 0x1b00006c, // 27. -7.5dB 0x19800066, // 28, -8.0dB 0x18000060, // 29, -8.5dB 0x16c0005b, // 30, -9.0dB 0x15800056, // 31, -9.5dB 0x14400051, // 32, -10.0dB 0x1300004c, // 33, -10.5dB 0x12000048, // 34, -11.0dB 0x11000044, // 35, -11.5dB 0x10000040, // 36, -12.0dB }; u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, // 0, +0dB {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 1, -0.5dB {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 2, -1.0dB {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 3, -1.5dB {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 4, -2.0dB {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 5, -2.5dB {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 6, -3.0dB {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 7, -3.5dB {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 8, -4.0dB {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 9, -4.5dB {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 10, -5.0dB {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 11, -5.5dB {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 12, -6.0dB <== default {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 13, -6.5dB {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 14, -7.0dB {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 15, -7.5dB {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 17, -8.5dB {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 18, -9.0dB {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 19, -9.5dB {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 20, -10.0dB {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 21, -10.5dB {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 22, -11.0dB {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 23, -11.5dB {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 24, -12.0dB {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 25, -12.5dB {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 26, -13.0dB {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 27, -13.5dB {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 28, -14.0dB {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 29, -14.5dB {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 30, -15.0dB {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 31, -15.5dB {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} // 32, -16.0dB }; u1Byte CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = { {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, // 0, +0dB {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 1, -0.5dB {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 2, -1.0dB {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 3, -1.5dB {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 4, -2.0dB {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 5, -2.5dB {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 6, -3.0dB {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 7, -3.5dB {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 8, -4.0dB {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 9, -4.5dB {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 10, -5.0dB {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 11, -5.5dB {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 12, -6.0dB <== default {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 13, -6.5dB {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 14, -7.0dB {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 15, -7.5dB {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 17, -8.5dB {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 18, -9.0dB {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 19, -9.5dB {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 20, -10.0dB {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 21, -10.5dB {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 22, -11.0dB {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 23, -11.5dB {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 24, -12.0dB {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 25, -12.5dB {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 26, -13.0dB {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 27, -13.5dB {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 28, -14.0dB {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 29, -14.5dB {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 30, -15.0dB {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 31, -15.5dB {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} // 32, -16.0dB }; u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE] = { 0x0b40002d, // 0, -15.0dB 0x0c000030, // 1, -14.5dB 0x0cc00033, // 2, -14.0dB 0x0d800036, // 3, -13.5dB 0x0e400039, // 4, -13.0dB 0x0f00003c, // 5, -12.5dB 0x10000040, // 6, -12.0dB 0x11000044, // 7, -11.5dB 0x12000048, // 8, -11.0dB 0x1300004c, // 9, -10.5dB 0x14400051, // 10, -10.0dB 0x15800056, // 11, -9.5dB 0x16c0005b, // 12, -9.0dB 0x18000060, // 13, -8.5dB 0x19800066, // 14, -8.0dB 0x1b00006c, // 15, -7.5dB 0x1c800072, // 16, -7.0dB 0x1e400079, // 17, -6.5dB 0x20000080, // 18, -6.0dB 0x22000088, // 19, -5.5dB 0x24000090, // 20, -5.0dB 0x26000098, // 21, -4.5dB 0x288000a2, // 22, -4.0dB 0x2ac000ab, // 23, -3.5dB 0x2d4000b5, // 24, -3.0dB 0x300000c0, // 25, -2.5dB 0x32c000cb, // 26, -2.0dB 0x35c000d7, // 27, -1.5dB 0x390000e4, // 28, -1.0dB 0x3c8000f2, // 29, -0.5dB 0x40000100, // 30, +0dB 0x43c0010f, // 31, +0.5dB 0x47c0011f, // 32, +1.0dB 0x4c000130, // 33, +1.5dB 0x50800142, // 34, +2.0dB 0x55400155, // 35, +2.5dB 0x5a400169, // 36, +3.0dB 0x5fc0017f, // 37, +3.5dB 0x65400195, // 38, +4.0dB 0x6b8001ae, // 39, +4.5dB 0x71c001c7, // 40, +5.0dB 0x788001e2, // 41, +5.5dB 0x7f8001fe // 42, +6.0dB }; u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8] = { {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, // 0, -16.0dB {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 1, -15.5dB {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 2, -15.0dB {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 3, -14.5dB {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 4, -14.0dB {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 5, -13.5dB {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 6, -13.0dB {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 7, -12.5dB {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 8, -12.0dB {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 9, -11.5dB {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 10, -11.0dB {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 11, -10.5dB {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 12, -10.0dB {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 13, -9.5dB {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 14, -9.0dB {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 15, -8.5dB {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 17, -7.5dB {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 18, -7.0dB {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 19, -6.5dB {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 20, -6.0dB {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 21, -5.5dB {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 22, -5.0dB {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 23, -4.5dB {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 24, -4.0dB {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 25, -3.5dB {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 26, -3.0dB {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 27, -2.5dB {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 28, -2.0dB {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 29, -1.5dB {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 30, -1.0dB {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 31, -0.5dB {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} // 32, +0dB }; u1Byte CCKSwingTable_Ch14_New[CCK_TABLE_SIZE][8]= { {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, // 0, -16.0dB {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 1, -15.5dB {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 2, -15.0dB {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 3, -14.5dB {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 4, -14.0dB {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 5, -13.5dB {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 6, -13.0dB {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 7, -12.5dB {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 8, -12.0dB {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 9, -11.5dB {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 10, -11.0dB {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 11, -10.5dB {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 12, -10.0dB {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 13, -9.5dB {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 14, -9.0dB {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 15, -8.5dB {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 17, -7.5dB {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 18, -7.0dB {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 19, -6.5dB {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 20, -6.0dB {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 21, -5.5dB {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 22, -5.0dB {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 23, -4.5dB {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 24, -4.0dB {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 25, -3.5dB {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 26, -3.0dB {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 27, -2.5dB {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 28, -2.0dB {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 29, -1.5dB {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 30, -1.0dB {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 31, -0.5dB {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} // 32, +0dB }; u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE] = { 0x081, // 0, -12.0dB 0x088, // 1, -11.5dB 0x090, // 2, -11.0dB 0x099, // 3, -10.5dB 0x0A2, // 4, -10.0dB 0x0AC, // 5, -9.5dB 0x0B6, // 6, -9.0dB 0x0C0, // 7, -8.5dB 0x0CC, // 8, -8.0dB 0x0D8, // 9, -7.5dB 0x0E5, // 10, -7.0dB 0x0F2, // 11, -6.5dB 0x101, // 12, -6.0dB 0x110, // 13, -5.5dB 0x120, // 14, -5.0dB 0x131, // 15, -4.5dB 0x143, // 16, -4.0dB 0x156, // 17, -3.5dB 0x16A, // 18, -3.0dB 0x180, // 19, -2.5dB 0x197, // 20, -2.0dB 0x1AF, // 21, -1.5dB 0x1C8, // 22, -1.0dB 0x1E3, // 23, -0.5dB 0x200, // 24, +0 dB 0x21E, // 25, +0.5dB 0x23E, // 26, +1.0dB 0x261, // 27, +1.5dB 0x285, // 28, +2.0dB 0x2AB, // 29, +2.5dB 0x2D3, // 30, +3.0dB 0x2FE, // 31, +3.5dB 0x32B, // 32, +4.0dB 0x35C, // 33, +4.5dB 0x38E, // 34, +5.0dB 0x3C4, // 35, +5.5dB 0x3FE // 36, +6.0dB }; #ifdef AP_BUILD_WORKAROUND unsigned int TxPwrTrk_OFDM_SwingTbl[TxPwrTrk_OFDM_SwingTbl_Len] = { /* +6.0dB */ 0x7f8001fe, /* +5.5dB */ 0x788001e2, /* +5.0dB */ 0x71c001c7, /* +4.5dB */ 0x6b8001ae, /* +4.0dB */ 0x65400195, /* +3.5dB */ 0x5fc0017f, /* +3.0dB */ 0x5a400169, /* +2.5dB */ 0x55400155, /* +2.0dB */ 0x50800142, /* +1.5dB */ 0x4c000130, /* +1.0dB */ 0x47c0011f, /* +0.5dB */ 0x43c0010f, /* 0.0dB */ 0x40000100, /* -0.5dB */ 0x3c8000f2, /* -1.0dB */ 0x390000e4, /* -1.5dB */ 0x35c000d7, /* -2.0dB */ 0x32c000cb, /* -2.5dB */ 0x300000c0, /* -3.0dB */ 0x2d4000b5, /* -3.5dB */ 0x2ac000ab, /* -4.0dB */ 0x288000a2, /* -4.5dB */ 0x26000098, /* -5.0dB */ 0x24000090, /* -5.5dB */ 0x22000088, /* -6.0dB */ 0x20000080, /* -6.5dB */ 0x1a00006c, /* -7.0dB */ 0x1c800072, /* -7.5dB */ 0x18000060, /* -8.0dB */ 0x19800066, /* -8.5dB */ 0x15800056, /* -9.0dB */ 0x26c0005b, /* -9.5dB */ 0x14400051, /* -10.0dB */ 0x24400051, /* -10.5dB */ 0x1300004c, /* -11.0dB */ 0x12000048, /* -11.5dB */ 0x11000044, /* -12.0dB */ 0x10000040 }; #endif VOID odm_TXPowerTrackingInit( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) if(!(pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_IC_11N_SERIES))) return; #endif odm_TXPowerTrackingThermalMeterInit(pDM_Odm); } u1Byte getSwingIndex( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u1Byte i = 0; u4Byte bbSwing; u4Byte swingTableSize; pu4Byte pSwingTable; if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8192E) { bbSwing = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, 0xFFC00000); pSwingTable = OFDMSwingTable_New; swingTableSize = OFDM_TABLE_SIZE; } else { #if ((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1)) if (pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821) { bbSwing = PHY_GetTxBBSwing_8812A(Adapter, pHalData->CurrentBandType, ODM_RF_PATH_A); pSwingTable = TxScalingTable_Jaguar; swingTableSize = TXSCALE_TABLE_SIZE; } else #endif { bbSwing = 0; pSwingTable = OFDMSwingTable; swingTableSize = OFDM_TABLE_SIZE; } } for (i = 0; i < swingTableSize; ++i) { u4Byte tableValue = pSwingTable[i]; if (tableValue >= 0x100000 ) tableValue >>= 22; if (bbSwing == tableValue) break; } return i; } VOID odm_TXPowerTrackingThermalMeterInit( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; u1Byte defaultSwingIndex = getSwingIndex(pDM_Odm); u1Byte p = 0; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); if(pDM_Odm->mp_mode == FALSE) pHalData->TxPowerTrackControl = TRUE; #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); if (pDM_Odm->SupportICType >= ODM_RTL8188E) { pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE; pDM_Odm->RFCalibrateInfo.TXPowercount = 0; pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE; if(pDM_Odm->mp_mode == FALSE) pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; else pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _FALSE; MSG_8192C("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl); } else { struct dm_priv *pdmpriv = &pHalData->dmpriv; pdmpriv->bTXPowerTracking = _TRUE; pdmpriv->TXPowercount = 0; pdmpriv->bTXPowerTrackingInit = _FALSE; //#if (MP_DRIVER != 1) //for mp driver, turn off txpwrtracking as default if(pDM_Odm->mp_mode == FALSE) pdmpriv->TxPowerTrackControl = _TRUE; else pdmpriv->TxPowerTrackControl = _FALSE; //MSG_8192C("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl); } #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #ifdef RTL8188E_SUPPORT { pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE; pDM_Odm->RFCalibrateInfo.TXPowercount = 0; pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE; pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; } #endif #endif //pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = TRUE; pDM_Odm->RFCalibrateInfo.ThermalValue = pHalData->EEPROMThermalMeter; pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = pHalData->EEPROMThermalMeter; pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = pHalData->EEPROMThermalMeter; // The index of "0 dB" in SwingTable. if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8192E) { pDM_Odm->DefaultOfdmIndex = (defaultSwingIndex >= OFDM_TABLE_SIZE) ? 30 : defaultSwingIndex; pDM_Odm->DefaultCckIndex = 20; } else { pDM_Odm->DefaultOfdmIndex = (defaultSwingIndex >= TXSCALE_TABLE_SIZE) ? 24 : defaultSwingIndex; pDM_Odm->DefaultCckIndex = 24; } pDM_Odm->BbSwingIdxCckBase = pDM_Odm->DefaultCckIndex; pDM_Odm->RFCalibrateInfo.CCK_index = pDM_Odm->DefaultCckIndex; for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p) { pDM_Odm->BbSwingIdxOfdmBase[p] = pDM_Odm->DefaultOfdmIndex; pDM_Odm->RFCalibrateInfo.OFDM_index[p] = pDM_Odm->DefaultOfdmIndex; pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = 0; pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p] = 0; pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = 0; } } VOID ODM_TXPowerTrackingCheck( IN PVOID pDM_VOID ) { // // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate // at the same time. In the stage2/3, we need to prive universal interface and merge all // HW dynamic mechanism. // PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; switch (pDM_Odm->SupportPlatform) { case ODM_WIN: odm_TXPowerTrackingCheckMP(pDM_Odm); break; case ODM_CE: odm_TXPowerTrackingCheckCE(pDM_Odm); break; case ODM_AP: odm_TXPowerTrackingCheckAP(pDM_Odm); break; case ODM_ADSL: //odm_DIGAP(pDM_Odm); break; } } VOID odm_TXPowerTrackingCheckCE( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PADAPTER Adapter = pDM_Odm->Adapter; #if( (RTL8192C_SUPPORT==1) || (RTL8723A_SUPPORT==1) ) if(IS_HARDWARE_TYPE_8192C(Adapter)){ rtl8192c_odm_CheckTXPowerTracking(Adapter); return; } #endif #if (RTL8192D_SUPPORT==1) if(IS_HARDWARE_TYPE_8192D(Adapter)){ #if (RTL8192D_EASY_SMART_CONCURRENT == 1) if(!Adapter->bSlaveOfDMSP) #endif rtl8192d_odm_CheckTXPowerTracking(Adapter); return; } #endif #if(((RTL8188E_SUPPORT==1) || (RTL8812A_SUPPORT==1) || (RTL8821A_SUPPORT==1) || (RTL8192E_SUPPORT==1) || (RTL8723B_SUPPORT==1) )) if(!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) { return; } if(!pDM_Odm->RFCalibrateInfo.TM_Trigger) //at least delay 1 sec { //pHalData->TxPowerCheckCnt++; //cosa add for debug if(IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter)||IS_HARDWARE_TYPE_8723B(Adapter)) ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER_NEW, (BIT17 | BIT16), 0x03); else ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER_OLD, bRFRegOffsetMask, 0x60); //DBG_871X("Trigger Thermal Meter!!\n"); pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; return; } else { //DBG_871X("Schedule TxPowerTracking direct call!!\n"); ODM_TXPowerTrackingCallback_ThermalMeter(Adapter); pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; } #endif #endif } VOID odm_TXPowerTrackingCheckMP( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; if (ODM_CheckPowerStatus(Adapter) == FALSE) { RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("===>ODM_CheckPowerStatus() return FALSE\n")); return; } if(IS_HARDWARE_TYPE_8723A(Adapter)) return; if(!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE) odm_TXPowerTrackingThermalMeterCheck(Adapter); else { RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE\n")); } #endif } VOID odm_TXPowerTrackingCheckAP( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; #if (DM_ODM_SUPPORT_TYPE == ODM_AP) prtl8192cd_priv priv = pDM_Odm->priv; if ( (priv->pmib->dot11RFEntry.ther) && ((priv->up_time % priv->pshare->rf_ft_var.tpt_period) == 0)){ #ifdef CONFIG_RTL_92D_SUPPORT if (GET_CHIP_VER(priv)==VERSION_8192D){ tx_power_tracking_92D(priv); } else #endif { #ifdef CONFIG_RTL_92C_SUPPORT tx_power_tracking(priv); #endif } } #endif } #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) VOID odm_TXPowerTrackingThermalMeterCheck( IN PADAPTER Adapter ) { #ifndef AP_BUILD_WORKAROUND static u1Byte TM_Trigger = 0; if(!(GET_HAL_DATA(Adapter)->DM_OutSrc.SupportAbility & ODM_RF_TX_PWR_TRACK)) { RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("===>odm_TXPowerTrackingThermalMeterCheck(),pMgntInfo->bTXPowerTracking is FALSE, return!!\n")); return; } if(!TM_Trigger) //at least delay 1 sec { if(IS_HARDWARE_TYPE_8192D(Adapter)) PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER_92D, BIT17 | BIT16, 0x03); else if(IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter) || IS_HARDWARE_TYPE_8723B(Adapter)) PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); else PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Trigger Thermal Meter!!\n")); TM_Trigger = 1; return; } else { RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Schedule TxPowerTracking direct call!!\n")); odm_TXPowerTrackingDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. TM_Trigger = 0; } #endif } #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_PowerTracking.h000066400000000000000000000161061261122257400234170ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __PHYDMPOWERTRACKING_H__ #define __PHYDMPOWERTRACKING_H__ #define POWRTRACKING_VERSION "1.0" #define DPK_DELTA_MAPPING_NUM 13 #define index_mapping_HP_NUM 15 #define OFDM_TABLE_SIZE 43 #define CCK_TABLE_SIZE 33 #define TXSCALE_TABLE_SIZE 37 #define TXPWR_TRACK_TABLE_SIZE 30 #define DELTA_SWINGIDX_SIZE 30 #define BAND_NUM 4 #define AVG_THERMAL_NUM 8 #define HP_THERMAL_NUM 8 #define IQK_MAC_REG_NUM 4 #define IQK_ADDA_REG_NUM 16 #define IQK_BB_REG_NUM_MAX 10 #if (RTL8192D_SUPPORT==1) #define IQK_BB_REG_NUM 10 #else #define IQK_BB_REG_NUM 9 #endif #define IQK_Matrix_REG_NUM 8 #define IQK_Matrix_Settings_NUM 14+24+21 // Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G extern u4Byte OFDMSwingTable[OFDM_TABLE_SIZE]; extern u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8]; extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; extern u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE]; extern u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8]; extern u1Byte CCKSwingTable_Ch14_New [CCK_TABLE_SIZE][8]; extern u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE]; // <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. static u1Byte DeltaSwingTableIdx_2GA_P_8188E[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; static u1Byte DeltaSwingTableIdx_2GA_N_8188E[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; #define dm_CheckTXPowerTracking ODM_TXPowerTrackingCheck typedef struct _IQK_MATRIX_REGS_SETTING{ BOOLEAN bIQKDone; s4Byte Value[3][IQK_Matrix_REG_NUM]; BOOLEAN bBWIqkResultSaved[3]; }IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING; typedef struct ODM_RF_Calibration_Structure { //for tx power tracking u4Byte RegA24; // for TempCCK s4Byte RegE94; s4Byte RegE9C; s4Byte RegEB4; s4Byte RegEBC; u1Byte TXPowercount; BOOLEAN bTXPowerTrackingInit; BOOLEAN bTXPowerTracking; u1Byte TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default u1Byte TM_Trigger; u1Byte InternalPA5G[2]; //pathA / pathB u1Byte ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 u1Byte ThermalValue; u1Byte ThermalValue_LCK; u1Byte ThermalValue_IQK; u1Byte ThermalValue_DPK; u1Byte ThermalValue_AVG[AVG_THERMAL_NUM]; u1Byte ThermalValue_AVG_index; u1Byte ThermalValue_RxGain; u1Byte ThermalValue_Crystal; u1Byte ThermalValue_DPKstore; u1Byte ThermalValue_DPKtrack; BOOLEAN TxPowerTrackingInProgress; BOOLEAN bReloadtxpowerindex; u1Byte bRfPiEnable; u4Byte TXPowerTrackingCallbackCnt; //cosa add for debug //------------------------- Tx power Tracking -------------------------// u1Byte bCCKinCH14; u1Byte CCK_index; u1Byte OFDM_index[MAX_RF_PATH]; s1Byte PowerIndexOffset[MAX_RF_PATH]; s1Byte DeltaPowerIndex[MAX_RF_PATH]; s1Byte DeltaPowerIndexLast[MAX_RF_PATH]; BOOLEAN bTxPowerChanged; u1Byte ThermalValue_HP[HP_THERMAL_NUM]; u1Byte ThermalValue_HP_index; IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; u1Byte Delta_LCK; s1Byte BBSwingDiff2G, BBSwingDiff5G; // Unit: dB u1Byte DeltaSwingTableIdx_2GCCKA_P[DELTA_SWINGIDX_SIZE]; u1Byte DeltaSwingTableIdx_2GCCKA_N[DELTA_SWINGIDX_SIZE]; u1Byte DeltaSwingTableIdx_2GCCKB_P[DELTA_SWINGIDX_SIZE]; u1Byte DeltaSwingTableIdx_2GCCKB_N[DELTA_SWINGIDX_SIZE]; u1Byte DeltaSwingTableIdx_2GA_P[DELTA_SWINGIDX_SIZE]; u1Byte DeltaSwingTableIdx_2GA_N[DELTA_SWINGIDX_SIZE]; u1Byte DeltaSwingTableIdx_2GB_P[DELTA_SWINGIDX_SIZE]; u1Byte DeltaSwingTableIdx_2GB_N[DELTA_SWINGIDX_SIZE]; u1Byte DeltaSwingTableIdx_5GA_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; u1Byte DeltaSwingTableIdx_5GA_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; u1Byte DeltaSwingTableIdx_5GB_P[BAND_NUM][DELTA_SWINGIDX_SIZE]; u1Byte DeltaSwingTableIdx_5GB_N[BAND_NUM][DELTA_SWINGIDX_SIZE]; u1Byte DeltaSwingTableIdx_2GA_P_8188E[DELTA_SWINGIDX_SIZE]; u1Byte DeltaSwingTableIdx_2GA_N_8188E[DELTA_SWINGIDX_SIZE]; //--------------------------------------------------------------------// //for IQK u4Byte RegC04; u4Byte Reg874; u4Byte RegC08; u4Byte RegB68; u4Byte RegB6C; u4Byte Reg870; u4Byte Reg860; u4Byte Reg864; BOOLEAN bIQKInitialized; BOOLEAN bLCKInProgress; BOOLEAN bAntennaDetected; BOOLEAN bNeedIQK; BOOLEAN bIQKInProgress; u1Byte Delta_IQK; u4Byte ADDA_backup[IQK_ADDA_REG_NUM]; u4Byte IQK_MAC_backup[IQK_MAC_REG_NUM]; u4Byte IQK_BB_backup_recover[9]; u4Byte IQK_BB_backup[IQK_BB_REG_NUM]; u4Byte TxIQC_8723B[2][3][2]; // { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} u4Byte RxIQC_8723B[2][2][2]; // { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} // IQK time measurement u8Byte IQK_StartTime; u8Byte IQK_ProgressingTime; //for APK u4Byte APKoutput[2][2]; //path A/B; output1_1a/output1_2a u1Byte bAPKdone; u1Byte bAPKThermalMeterIgnore; // DPK BOOLEAN bDPKFail; u1Byte bDPdone; u1Byte bDPPathAOK; u1Byte bDPPathBOK; u4Byte TxLOK[2]; }ODM_RF_CAL_T,*PODM_RF_CAL_T; VOID ODM_TXPowerTrackingCheck( IN PVOID pDM_VOID ); VOID odm_TXPowerTrackingInit( IN PVOID pDM_VOID ); VOID odm_TXPowerTrackingCheckAP( IN PVOID pDM_VOID ); VOID odm_TXPowerTrackingThermalMeterInit( IN PVOID pDM_VOID ); VOID odm_TXPowerTrackingInit( IN PVOID pDM_VOID ); VOID odm_TXPowerTrackingCheckMP( IN PVOID pDM_VOID ); VOID odm_TXPowerTrackingCheckCE( IN PVOID pDM_VOID ); #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) VOID odm_TXPowerTrackingCallbackThermalMeter92C( IN PADAPTER Adapter ); VOID odm_TXPowerTrackingCallbackRXGainThermalMeter92D( IN PADAPTER Adapter ); VOID odm_TXPowerTrackingCallbackThermalMeter92D( IN PADAPTER Adapter ); VOID odm_TXPowerTrackingDirectCall92C( IN PADAPTER Adapter ); VOID odm_TXPowerTrackingThermalMeterCheck( IN PADAPTER Adapter ); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_RXHP.c000066400000000000000000001422621261122257400214170ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // include files //============================================================ #include "Mp_Precomp.h" #include "phydm_precomp.h" #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #define AFH_PSD 1 //0:normal PSD scan, 1: only do 20 pts PSD #define MODE_40M 0 //0:20M, 1:40M #define PSD_TH2 3 #define PSD_CHMIN 20 // Minimum channel number for BT AFH #define SIR_STEP_SIZE 3 #define Smooth_Size_1 5 #define Smooth_TH_1 3 #define Smooth_Size_2 10 #define Smooth_TH_2 4 #define Smooth_Size_3 20 #define Smooth_TH_3 4 #define Smooth_Step_Size 5 #define Adaptive_SIR 1 #define SCAN_INTERVAL 1500 //ms #define SYN_Length 5 // for 92D #define LNA_Low_Gain_1 0x64 #define LNA_Low_Gain_2 0x5A #define LNA_Low_Gain_3 0x58 #define pw_th_10dB 0x0 #define pw_th_16dB 0x3 #define FA_RXHP_TH1 5000 #define FA_RXHP_TH2 1500 #define FA_RXHP_TH3 800 #define FA_RXHP_TH4 600 #define FA_RXHP_TH5 500 #define Idle_Mode 0 #define High_TP_Mode 1 #define Low_TP_Mode 2 VOID odm_PSDMonitorInit( IN PVOID pDM_VOID ) { #if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); //PSD Monitor Setting //Which path in ADC/DAC is turnned on for PSD: both I/Q ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT10|BIT11, 0x3); //Ageraged number: 8 ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT12|BIT13, 0x1); pDM_Odm->bPSDinProcess = FALSE; pDM_Odm->bUserAssignLevel = FALSE; pDM_Odm->bPSDactive = FALSE; //pDM_Odm->bDMInitialGainEnable=TRUE; //change the initialization to DIGinit //Set Debug Port //PHY_SetBBReg(Adapter, 0x908, bMaskDWord, 0x803); //PHY_SetBBReg(Adapter, 0xB34, bMaskByte0, 0x00); // pause PSD //PHY_SetBBReg(Adapter, 0xB38, bMaskByte0, 10); //rescan //PHY_SetBBReg(Adapter, 0xB38, bMaskByte2|bMaskByte3, 100); //interval //PlatformSetTimer( Adapter, &pHalData->PSDTriggerTimer, 0); //ms #endif } VOID PatchDCTone( IN PVOID pDM_VOID, pu4Byte PSD_report, u1Byte initial_gain_psd ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); //PADAPTER pAdapter; u4Byte psd_report; //2 Switch to CH11 to patch CH9 and CH13 DC tone ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, 11); if(pDM_Odm->SupportICType== ODM_RTL8192D) { if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)) { ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, 11); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, 0xfffff, 0x643BC); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, 0xfffff, 0xFC038); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, 0xfffff, 0x77C1A); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, 0xfffff, 0x41289); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, 0xfffff, 0x01840); } else { ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, 0xfffff, 0x643BC); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, 0xfffff, 0xFC038); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, 0xfffff, 0x77C1A); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, 0xfffff, 0x41289); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, 0xfffff, 0x01840); } } //Ch9 DC tone patch psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd); PSD_report[50] = psd_report; //Ch13 DC tone patch psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd); PSD_report[70] = psd_report; //2 Switch to CH3 to patch CH1 and CH5 DC tone ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, 3); if(pDM_Odm->SupportICType==ODM_RTL8192D) { if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)) { ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, 3); //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x25, 0xfffff, 0x643BC); //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x26, 0xfffff, 0xFC038); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, 0xfffff, 0x07C1A); //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x2B, 0xfffff, 0x61289); //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x2C, 0xfffff, 0x01C41); } else { //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x25, 0xfffff, 0x643BC); //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x26, 0xfffff, 0xFC038); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, 0xfffff, 0x07C1A); //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x2B, 0xfffff, 0x61289); //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x2C, 0xfffff, 0x01C41); } } //Ch1 DC tone patch psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd); PSD_report[10] = psd_report; //Ch5 DC tone patch psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd); PSD_report[30] = psd_report; } VOID GoodChannelDecision( IN PVOID pDM_VOID, pu4Byte PSD_report, pu1Byte PSD_bitmap, u1Byte RSSI_BT, pu1Byte PSD_bitmap_memory) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; //s4Byte TH1 = SSBT-0x15; // modify TH by Neil Chen s4Byte TH1= RSSI_BT+0x14; s4Byte TH2 = RSSI_BT+85; //u2Byte TH3; // s4Byte RegB34; u1Byte bitmap, Smooth_size[3], Smooth_TH[3]; //u1Byte psd_bit; u4Byte i,n,j, byte_idx, bit_idx, good_cnt, good_cnt_smoothing, Smooth_Interval[3]; int start_byte_idx,start_bit_idx,cur_byte_idx, cur_bit_idx,NOW_byte_idx ; // RegB34 = PHY_QueryBBReg(Adapter,0xB34, bMaskDWord)&0xFF; if((pDM_Odm->SupportICType == ODM_RTL8192C)||(pDM_Odm->SupportICType == ODM_RTL8192D)) { TH1 = RSSI_BT + 0x14; } Smooth_size[0]=Smooth_Size_1; Smooth_size[1]=Smooth_Size_2; Smooth_size[2]=Smooth_Size_3; Smooth_TH[0]=Smooth_TH_1; Smooth_TH[1]=Smooth_TH_2; Smooth_TH[2]=Smooth_TH_3; Smooth_Interval[0]=16; Smooth_Interval[1]=15; Smooth_Interval[2]=13; good_cnt = 0; if(pDM_Odm->SupportICType==ODM_RTL8723A) { //2 Threshold if(RSSI_BT >=41) TH1 = 113; else if(RSSI_BT >=38) // >= -15dBm TH1 = 105; //0x69 else if((RSSI_BT >=33)&(RSSI_BT <38)) TH1 = 99+(RSSI_BT-33); //0x63 else if((RSSI_BT >=26)&(RSSI_BT<33)) TH1 = 99-(33-RSSI_BT)+2; //0x5e else if((RSSI_BT >=24)&(RSSI_BT<26)) TH1 = 88-((RSSI_BT-24)*3); //0x58 else if((RSSI_BT >=18)&(RSSI_BT<24)) TH1 = 77+((RSSI_BT-18)*2); else if((RSSI_BT >=14)&(RSSI_BT<18)) TH1 = 63+((RSSI_BT-14)*2); else if((RSSI_BT >=8)&(RSSI_BT<14)) TH1 = 58+((RSSI_BT-8)*2); else if((RSSI_BT >=3)&(RSSI_BT<8)) TH1 = 52+(RSSI_BT-3); else TH1 = 51; } for (i = 0; i< 10; i++) PSD_bitmap[i] = 0; // Add By Gary for (i=0; i<80; i++) pRX_HP_Table->PSD_bitmap_RXHP[i] = 0; // End if(pDM_Odm->SupportICType==ODM_RTL8723A) { TH1 =TH1-SIR_STEP_SIZE; } while (good_cnt < PSD_CHMIN) { good_cnt = 0; if(pDM_Odm->SupportICType==ODM_RTL8723A) { if(TH1 ==TH2) break; if((TH1+SIR_STEP_SIZE) < TH2) TH1 += SIR_STEP_SIZE; else TH1 = TH2; } else { if(TH1==(RSSI_BT+0x1E)) break; if((TH1+2) < (RSSI_BT+0x1E)) TH1+=3; else TH1 = RSSI_BT+0x1E; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD: decision threshold is: %d", TH1)); for (i = 0; i< 80; i++) { if((s4Byte)(PSD_report[i]) < TH1) { byte_idx = i / 8; bit_idx = i -8*byte_idx; bitmap = PSD_bitmap[byte_idx]; PSD_bitmap[byte_idx] = bitmap | (u1Byte) (1 << bit_idx); } } #if DBG ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: before smoothing\n")); for(n=0;n<10;n++) { //DbgPrint("PSD_bitmap[%u]=%x\n", n, PSD_bitmap[n]); for (i = 0; i<8; i++) ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] = %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i)); } #endif //1 Start of smoothing function for (j=0;j<3;j++) { start_byte_idx=0; start_bit_idx=0; for(n=0; n 7 ) { start_byte_idx= start_byte_idx+start_bit_idx/8; start_bit_idx = start_bit_idx%8; } } ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: after %u smoothing", j+1)); for(n=0;n<10;n++) { for (i = 0; i<8; i++) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] = %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i)); if ( ((PSD_bitmap[n]&BIT(i))>>i) ==1) //----- Add By Gary { pRX_HP_Table->PSD_bitmap_RXHP[8*n+i] = 1; } // ------end by Gary } } } good_cnt = 0; for ( i = 0; i < 10; i++) { for (n = 0; n < 8; n++) if((PSD_bitmap[i]& BIT(n)) != 0) good_cnt++; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, ODM_COMP_PSD,("PSD: good channel cnt = %u",good_cnt)); } //RT_TRACE(ODM_COMP_PSD, DBG_LOUD,("PSD: SSBT=%d, TH2=%d, TH1=%d",SSBT,TH2,TH1)); for (i = 0; i <10; i++) ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: PSD_bitmap[%u]=%x",i,PSD_bitmap[i])); /* //Update bitmap memory for(i = 0; i < 80; i++) { byte_idx = i / 8; bit_idx = i -8*byte_idx; psd_bit = (PSD_bitmap[byte_idx] & BIT(bit_idx)) >> bit_idx; bitmap = PSD_bitmap_memory[i]; PSD_bitmap_memory[i] = (bitmap << 1) |psd_bit; } */ } VOID odm_PSD_Monitor( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); //PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; unsigned int pts, start_point, stop_point; u1Byte initial_gain ; static u1Byte PSD_bitmap_memory[80], init_memory = 0; static u1Byte psd_cnt=0; static u4Byte PSD_report[80], PSD_report_tmp; static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; u1Byte H2C_PSD_DATA[5]={0,0,0,0,0}; static u1Byte H2C_PSD_DATA_last[5] ={0,0,0,0,0}; u1Byte idx[20]={96,99,102,106,109,112,115,118,122,125, 0,3,6,10,13,16,19,22,26,29}; u1Byte n, i, channel, BBReset,tone_idx; u1Byte PSD_bitmap[10], SSBT=0,initial_gain_psd=0, RSSI_BT=0, initialGainUpper; s4Byte PSD_skip_start, PSD_skip_stop; u4Byte CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel; u4Byte ReScan, Interval, Is40MHz; u8Byte curTxOkCnt, curRxOkCnt; int cur_byte_idx, cur_bit_idx; PADAPTER Adapter = pDM_Odm->Adapter; PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; if(*pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("pbDriverIsGoingToPnpSetPowerSleep!!!!!!!!!!!!!!!\n")); return; } if( (*(pDM_Odm->pbScanInProcess)) || pDM_Odm->bLinkInProcess) { if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)) { ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 1500); //ms //psd_cnt=0; } return; } if(pDM_Odm->bBtHsOperation) { ReScan = 1; Interval = SCAN_INTERVAL; } else { ReScan = PSD_RESCAN; Interval = SCAN_INTERVAL; } //1 Initialization if(init_memory == 0) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Init memory\n")); for(i = 0; i < 80; i++) PSD_bitmap_memory[i] = 0xFF; // channel is always good init_memory = 1; } if(psd_cnt == 0) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n")); for(i = 0; i < 80; i++) PSD_report[i] = 0; } //1 Backup Current Settings CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); /* if(pDM_Odm->SupportICType==ODM_RTL8192D) { //2 Record Current synthesizer parameters based on current channel if((*pDM_Odm->MacPhyMode92D == SINGLEMAC_SINGLEPHY)||(*pDM_Odm->MacPhyMode92D == DUALMAC_SINGLEPHY)) { SYN_RF25 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x25, bMaskDWord); SYN_RF26 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x26, bMaskDWord); SYN_RF27 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x27, bMaskDWord); SYN_RF2B = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x2B, bMaskDWord); SYN_RF2C = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x2C, bMaskDWord); } else // DualMAC_DualPHY 2G { SYN_RF25 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x25, bMaskDWord); SYN_RF26 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x26, bMaskDWord); SYN_RF27 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x27, bMaskDWord); SYN_RF2B = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x2B, bMaskDWord); SYN_RF2C = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x2C, bMaskDWord); } } */ //RXIQI = PHY_QueryBBReg(Adapter, 0xC14, bMaskDWord); RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord); //RxIdleLowPwr = (PHY_QueryBBReg(Adapter, 0x818, bMaskDWord)&BIT28)>>28; RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28; //2??? if(CHNL_RUN_ABOVE_40MHZ(pMgntInfo)) Is40MHz = TRUE; else Is40MHz = FALSE; ODM_RT_TRACE(pDM_Odm, ODM_COMP_PSD, DBG_LOUD,("PSD Scan Start\n")); //1 Turn off CCK //PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT24, 0); ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); //1 Turn off TX //Pause TX Queue //PlatformEFIOWrite1Byte(Adapter, REG_TXPAUSE, 0xFF); ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0xFF); //Force RX to stop TX immediately //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); //1 Turn off RX //Rx AGC off RegC70[0]=0, RegC7C[20]=0 //PHY_SetBBReg(Adapter, 0xC70, BIT0, 0); //PHY_SetBBReg(Adapter, 0xC7C, BIT20, 0); ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0); ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0); //Turn off CCA //PHY_SetBBReg(Adapter, 0xC14, bMaskDWord, 0x0); ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); //BB Reset //BBReset = PlatformEFIORead1Byte(Adapter, 0x02); BBReset = ODM_Read1Byte(pDM_Odm, 0x02); //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset&(~BIT0)); //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset|BIT0); ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 1); //clock gated to prevent from AGC table mess ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0)); ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0); ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 0); //1 Leave RX idle low power //PHY_SetBBReg(Adapter, 0x818, BIT28, 0x0); ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); //1 Fix initial gain //if (IS_HARDWARE_TYPE_8723AE(Adapter)) //RSSI_BT = pHalData->RSSI_BT; //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter))) // Add by Gary // RSSI_BT = RSSI_BT_new; if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)) RSSI_BT=pDM_Odm->RSSI_BT; //need to check C2H to pDM_Odm RSSI BT if(RSSI_BT>=47) RSSI_BT=47; ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); if(pDM_Odm->SupportICType==ODM_RTL8723A) { //Neil add--2011--10--12 //2 Initial Gain index if(RSSI_BT >=35) // >= -15dBm initial_gain_psd = RSSI_BT*2; else if((RSSI_BT >=33)&(RSSI_BT<35)) initial_gain_psd = RSSI_BT*2+6; else if((RSSI_BT >=24)&(RSSI_BT<33)) initial_gain_psd = 70-(33-RSSI_BT); else if((RSSI_BT >=19)&(RSSI_BT<24)) initial_gain_psd = 64-((24-RSSI_BT)*4); else if((RSSI_BT >=14)&(RSSI_BT<19)) initial_gain_psd = 44-((18-RSSI_BT)*2); else if((RSSI_BT >=8)&(RSSI_BT<14)) initial_gain_psd = 35-(14-RSSI_BT); else initial_gain_psd = 0x1B; } else { //need to do initial_gain_psd = pDM_Odm->RSSI_Min; // PSD report based on RSSI //} } //if(RSSI_BT<0x17) // RSSI_BT +=3; //DbgPrint("PSD: RSSI_BT= %d\n", RSSI_BT); ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); //initialGainUpper = 0x5E; //Modify by neil chen if(pDM_Odm->bUserAssignLevel) { pDM_Odm->bUserAssignLevel = FALSE; initialGainUpper = 0x7f; } else { initialGainUpper = 0x5E; } /* if (initial_gain_psd < 0x1a) initial_gain_psd = 0x1a; if (initial_gain_psd > initialGainUpper) initial_gain_psd = initialGainUpper; */ //if(pDM_Odm->SupportICType==ODM_RTL8723A) SSBT = RSSI_BT * 2 +0x3E; //if(IS_HARDWARE_TYPE_8723AE(Adapter)) // SSBT = RSSI_BT * 2 +0x3E; //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter))) // Add by Gary //{ // RSSI_BT = initial_gain_psd; // SSBT = RSSI_BT; //} ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT)); ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd)); //DbgPrint("PSD: SSBT= %d", SSBT); //need to do pDM_Odm->bDMInitialGainEnable = FALSE; initial_gain =(u1Byte) (ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F); // make sure the initial gain is under the correct range. //initial_gain_psd &= 0x7f; ODM_Write_DIG(pDM_Odm, initial_gain_psd); //1 Turn off 3-wire ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF); //pts value = 128, 256, 512, 1024 pts = 128; if(pts == 128) { ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); start_point = 64; stop_point = 192; } else if(pts == 256) { ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1); start_point = 128; stop_point = 384; } else if(pts == 512) { ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2); start_point = 256; stop_point = 768; } else { ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3); start_point = 512; stop_point = 1536; } //3 Skip WLAN channels if WLAN busy curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt; curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt; lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); PSD_skip_start=80; PSD_skip_stop = 0; wlan_channel = CurrentChannel & 0x0f; ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz)); if(pDM_Odm->SupportICType==ODM_RTL8723A) { if(pDM_Odm->bBtHsOperation) { if(pDM_Odm->bLinked) { if(Is40MHz) { PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; } else { PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10; // Modify by Neil to add 10 chs to mask PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18; } } else { // mask for 40MHz PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; } if(PSD_skip_start < 0) PSD_skip_start = 0; if(PSD_skip_stop >80) PSD_skip_stop = 80; } else { if((curRxOkCnt+curTxOkCnt) > 5) { if(Is40MHz) { PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; } else { PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10; // Modify by Neil to add 10 chs to mask PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18; } if(PSD_skip_start < 0) PSD_skip_start = 0; if(PSD_skip_stop >80) PSD_skip_stop = 80; } } } #if 0 else { if((curRxOkCnt+curTxOkCnt) > 1000) { PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10; PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20; } } #endif //Reove RXHP Issue ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop)); for (n=0;n<80;n++) { if((n%20)==0) { channel = (n/20)*4 + 1; ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); } tone_idx = n%20; if ((n>=PSD_skip_start) && (n PSD_report[n]) PSD_report[n] = PSD_report_tmp; } } PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd); //----end //1 Turn on RX //Rx AGC on ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1); ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1); //CCK on ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); //1 Turn on TX //Resume TX Queue ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0x00); //Turn on 3-wire ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0); //1 Restore Current Settings //Resume DIG pDM_Odm->bDMInitialGainEnable = TRUE; ODM_Write_DIG(pDM_Odm, initial_gain); // restore originl center frequency ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); //Turn on CCA ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI); //Restore RX idle low power if(RxIdleLowPwr == TRUE) ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1); psd_cnt++; ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt)); if (psd_cnt < ReScan) ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, Interval); else { psd_cnt = 0; for(i=0;i<80;i++) //DbgPrint("psd_report[%d]= %d \n", 2402+i, PSD_report[i]); RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("psd_report[%d]= %d \n", 2402+i, PSD_report[i])); GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory); if(pDM_Odm->SupportICType==ODM_RTL8723A) { cur_byte_idx=0; cur_bit_idx=0; //2 Restore H2C PSD Data to Last Data H2C_PSD_DATA_last[0] = H2C_PSD_DATA[0]; H2C_PSD_DATA_last[1] = H2C_PSD_DATA[1]; H2C_PSD_DATA_last[2] = H2C_PSD_DATA[2]; H2C_PSD_DATA_last[3] = H2C_PSD_DATA[3]; H2C_PSD_DATA_last[4] = H2C_PSD_DATA[4]; //2 Translate 80bit channel map to 40bit channel for ( i=0;i<5;i++) { for(n=0;n<8;n++) { cur_byte_idx = i*2 + n/4; cur_bit_idx = (n%4)*2; if ( ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx)) != 0) && ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx+1)) != 0)) H2C_PSD_DATA[i] = H2C_PSD_DATA[i] | (u1Byte) (1 << n); } ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("H2C_PSD_DATA[%d]=0x%x\n" ,i, H2C_PSD_DATA[i])); } //3 To Compare the difference for ( i=0;i<5;i++) { if(H2C_PSD_DATA[i] !=H2C_PSD_DATA_last[i]) { FW_FillH2CCmd(Adapter, H2C_92C_PSD_RESULT, 5, H2C_PSD_DATA); ODM_RT_TRACE(pDM_Odm, ODM_COMP_PSD, DBG_LOUD,("Need to Update the AFH Map \n")); break; } else { if(i==5) ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Not need to Update\n")); } } if(pDM_Odm->bBtHsOperation) { ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, 10000); ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Leave dm_PSD_Monitor\n")); } else { ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, 1500); ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Leave dm_PSD_Monitor\n")); } } } } /* //Neil for Get BT RSSI // Be Triggered by BT C2H CMD VOID ODM_PSDGetRSSI( IN u1Byte RSSI_BT) { } */ VOID ODM_PSDMonitor( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); //if(IS_HARDWARE_TYPE_8723AE(Adapter)) if(pDM_Odm->SupportICType == ODM_RTL8723A) //may need to add other IC type { if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE) { if(!pDM_Odm->bBtEnabled) //need to check upper layer connection { pDM_Odm->bPSDactive=FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD, ("odm_PSDMonitor, return for BT is disabled!!!\n")); return; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD, ("odm_PSDMonitor\n")); //{ pDM_Odm->bPSDinProcess = TRUE; pDM_Odm->bPSDactive=TRUE; odm_PSD_Monitor(pDM_Odm); pDM_Odm->bPSDinProcess = FALSE; } } } VOID odm_PSDMonitorCallback( PRT_TIMER pTimer ) { PADAPTER Adapter = (PADAPTER)pTimer->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PlatformScheduleWorkItem(&pHalData->PSDMonitorWorkitem); } VOID odm_PSDMonitorWorkItemCallback( IN PVOID pContext ) { PADAPTER Adapter = (PADAPTER)pContext; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ODM_PSDMonitor(pDM_Odm); } //cosa debug tool need to modify VOID ODM_PSDDbgControl( IN PADAPTER Adapter, IN u4Byte mode, IN u4Byte btRssi ) { #if (DEV_BUS_TYPE == RT_PCI_INTERFACE) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD, (" Monitor mode=%d, btRssi=%d\n", mode, btRssi)); if(mode) { pDM_Odm->RSSI_BT = (u1Byte)btRssi; pDM_Odm->bUserAssignLevel = TRUE; ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 0); //ms } else { ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer); } #endif } //#if(DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) void odm_RXHPInit( IN PVOID pDM_VOID) { #if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; u1Byte index; pRX_HP_Table->RXHP_enable = TRUE; pRX_HP_Table->RXHP_flag = 0; pRX_HP_Table->PSD_func_trigger = 0; pRX_HP_Table->Pre_IGI = 0x20; pRX_HP_Table->Cur_IGI = 0x20; pRX_HP_Table->Cur_pw_th = pw_th_10dB; pRX_HP_Table->Pre_pw_th = pw_th_10dB; for(index=0; index<80; index++) pRX_HP_Table->PSD_bitmap_RXHP[index] = 1; #if(DEV_BUS_TYPE == RT_USB_INTERFACE) pRX_HP_Table->TP_Mode = Idle_Mode; #endif #endif } VOID odm_PSD_RXHP( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; PADAPTER Adapter = pDM_Odm->Adapter; PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); unsigned int pts, start_point, stop_point, initial_gain ; static u1Byte PSD_bitmap_memory[80], init_memory = 0; static u1Byte psd_cnt=0; static u4Byte PSD_report[80], PSD_report_tmp; static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; u1Byte idx[20]={96,99,102,106,109,112,115,118,122,125, 0,3,6,10,13,16,19,22,26,29}; u1Byte n, i, channel, BBReset,tone_idx; u1Byte PSD_bitmap[10]/*, SSBT=0*/,initial_gain_psd=0, RSSI_BT=0, initialGainUpper; s4Byte PSD_skip_start, PSD_skip_stop; u4Byte CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel; u4Byte ReScan, Interval, Is40MHz; u8Byte curTxOkCnt, curRxOkCnt; //--------------2G band synthesizer for 92D switch RF channel using----------------- u1Byte group_idx=0; u4Byte SYN_RF25=0, SYN_RF26=0, SYN_RF27=0, SYN_RF2B=0, SYN_RF2C=0; u4Byte SYN[5] = {0x25, 0x26, 0x27, 0x2B, 0x2C}; // synthesizer RF register for 2G channel u4Byte SYN_group[3][5] = {{0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840}, // For CH1,2,4,9,10.11.12 {0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840} {0x643BC, 0xFC038, 0x07C1A, 0x41289, 0x01840}, // For CH3,13,14 {0x243BC, 0xFC438, 0x07C1A, 0x4128B, 0x0FC41}}; // For Ch5,6,7,8 //--------------------- Add by Gary for Debug setting ---------------------- u1Byte RSSI_BT_new = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB9C, 0xFF); u1Byte rssi_ctrl = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB38, 0xFF); //--------------------------------------------------------------------- if(pMgntInfo->bScanInProgress) { return; } ReScan = PSD_RESCAN; Interval = SCAN_INTERVAL; //1 Initialization if(init_memory == 0) { RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("Init memory\n")); for(i = 0; i < 80; i++) PSD_bitmap_memory[i] = 0xFF; // channel is always good init_memory = 1; } if(psd_cnt == 0) { RT_TRACE(ODM_COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n")); for(i = 0; i < 80; i++) PSD_report[i] = 0; } //1 Backup Current Settings CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); if(pDM_Odm->SupportICType == ODM_RTL8192D) { //2 Record Current synthesizer parameters based on current channel if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) { SYN_RF25 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, bMaskDWord); SYN_RF26 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, bMaskDWord); SYN_RF27 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, bMaskDWord); SYN_RF2B = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, bMaskDWord); SYN_RF2C = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, bMaskDWord); } else // DualMAC_DualPHY 2G { SYN_RF25 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, bMaskDWord); SYN_RF26 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, bMaskDWord); SYN_RF27 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, bMaskDWord); SYN_RF2B = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, bMaskDWord); SYN_RF2C = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, bMaskDWord); } } RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord); RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28; Is40MHz = *(pDM_Odm->pBandWidth); ODM_RT_TRACE(pDM_Odm, ODM_COMP_PSD, DBG_LOUD,("PSD Scan Start\n")); //1 Turn off CCK ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); //1 Turn off TX //Pause TX Queue ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); //Force RX to stop TX immediately ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); //1 Turn off RX //Rx AGC off RegC70[0]=0, RegC7C[20]=0 ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0); ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0); //Turn off CCA ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); //BB Reset ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 1); //clock gated to prevent from AGC table mess BBReset = ODM_Read1Byte(pDM_Odm, 0x02); ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0)); ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0); ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 0); //1 Leave RX idle low power ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); //1 Fix initial gain RSSI_BT = RSSI_BT_new; RT_TRACE(ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); if(rssi_ctrl == 1) // just for debug!! initial_gain_psd = RSSI_BT_new; else initial_gain_psd = pDM_Odm->RSSI_Min; // PSD report based on RSSI RT_TRACE(ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); initialGainUpper = 0x54; RSSI_BT = initial_gain_psd; //SSBT = RSSI_BT; //RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT)); RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd)); pDM_Odm->bDMInitialGainEnable = FALSE; initial_gain = ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F; //ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain_psd); ODM_Write_DIG(pDM_Odm, initial_gain_psd); //1 Turn off 3-wire ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF); //pts value = 128, 256, 512, 1024 pts = 128; if(pts == 128) { ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); start_point = 64; stop_point = 192; } else if(pts == 256) { ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1); start_point = 128; stop_point = 384; } else if(pts == 512) { ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2); start_point = 256; stop_point = 768; } else { ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3); start_point = 512; stop_point = 1536; } //3 Skip WLAN channels if WLAN busy curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt; curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt; lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); PSD_skip_start=80; PSD_skip_stop = 0; wlan_channel = CurrentChannel & 0x0f; RT_TRACE(ODM_COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz)); if((curRxOkCnt+curTxOkCnt) > 1000) { PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10; PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20; } RT_TRACE(ODM_COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop)); for (n=0;n<80;n++) { if((n%20)==0) { channel = (n/20)*4 + 1; if(pDM_Odm->SupportICType == ODM_RTL8192D) { switch(channel) { case 1: case 9: group_idx = 0; break; case 5: group_idx = 2; break; case 13: group_idx = 1; break; } if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) { for(i = 0; i < SYN_Length; i++) ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, SYN[i], bMaskDWord, SYN_group[group_idx][i]); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, channel); } else // DualMAC_DualPHY 2G { for(i = 0; i < SYN_Length; i++) ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, SYN[i], bMaskDWord, SYN_group[group_idx][i]); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); } } else ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); } tone_idx = n%20; if ((n>=PSD_skip_start) && (n PSD_report[n]) PSD_report[n] = PSD_report_tmp; } } PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd); //----end //1 Turn on RX //Rx AGC on ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1); ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1); //CCK on ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); //1 Turn on TX //Resume TX Queue ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x00); //Turn on 3-wire ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0); //1 Restore Current Settings //Resume DIG pDM_Odm->bDMInitialGainEnable= TRUE; //ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain); ODM_Write_DIG(pDM_Odm,(u1Byte) initial_gain); // restore originl center frequency ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); if(pDM_Odm->SupportICType == ODM_RTL8192D) { if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) { ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, bMaskDWord, CurrentChannel); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, bMaskDWord, SYN_RF25); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, bMaskDWord, SYN_RF26); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, bMaskDWord, SYN_RF27); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, bMaskDWord, SYN_RF2B); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, bMaskDWord, SYN_RF2C); } else // DualMAC_DualPHY { ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, bMaskDWord, SYN_RF25); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, bMaskDWord, SYN_RF26); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, bMaskDWord, SYN_RF27); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, bMaskDWord, SYN_RF2B); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, bMaskDWord, SYN_RF2C); } } //Turn on CCA ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI); //Restore RX idle low power if(RxIdleLowPwr == TRUE) ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1); psd_cnt++; //gPrint("psd cnt=%d\n", psd_cnt); ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt)); if (psd_cnt < ReScan) { ODM_SetTimer(pDM_Odm, &pRX_HP_Table->PSDTimer, Interval); //ms } else { psd_cnt = 0; for(i=0;i<80;i++) RT_TRACE( ODM_COMP_PSD, DBG_LOUD,("psd_report[%d]= %d \n", 2402+i, PSD_report[i])); //DbgPrint("psd_report[%d]= %d \n", 2402+i, PSD_report[i]); GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory); } } void odm_Write_RXHP( IN PVOID pDM_VOID) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; u4Byte currentIGI; if(pRX_HP_Table->Cur_IGI != pRX_HP_Table->Pre_IGI) { ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); } if(pRX_HP_Table->Cur_pw_th != pRX_HP_Table->Pre_pw_th) { ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, BIT8|BIT9, pRX_HP_Table->Cur_pw_th); // RegC54[9:8]=2'b11: AGC Flow 3 } if(pRX_HP_Table->RXHP_flag == 0) { pRX_HP_Table->Cur_IGI = 0x20; } else { currentIGI = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0); if(currentIGI<0x50) { ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); } } pRX_HP_Table->Pre_IGI = pRX_HP_Table->Cur_IGI; pRX_HP_Table->Pre_pw_th = pRX_HP_Table->Cur_pw_th; } void odm_RXHP( IN PVOID pDM_VOID) { #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN)) #if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PADAPTER Adapter = pDM_Odm->Adapter; PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PhyDM_FalseAlmCnt); u1Byte i, j, sum; u1Byte Is40MHz; s1Byte Intf_diff_idx, MIN_Intf_diff_idx = 16; s4Byte cur_channel; u1Byte ch_map_intf_5M[17] = {0}; static u4Byte FA_TH = 0; static u1Byte psd_intf_flag = 0; static s4Byte curRssi = 0; static s4Byte preRssi = 0; static u1Byte PSDTriggerCnt = 1; u1Byte RX_HP_enable = (u1Byte)(ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, bMaskDWord)>>31); // for debug!! #if(DEV_BUS_TYPE == RT_USB_INTERFACE) static s8Byte lastTxOkCnt = 0, lastRxOkCnt = 0; s8Byte curTxOkCnt, curRxOkCnt; s8Byte curTPOkCnt; s8Byte TP_Acc3, TP_Acc5; static s8Byte TP_Buff[5] = {0}; static u1Byte pre_state = 0, pre_state_flag = 0; static u1Byte Intf_HighTP_flag = 0, De_counter = 16; static u1Byte TP_Degrade_flag = 0; #endif static u1Byte LatchCnt = 0; if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8188E)) return; //AGC RX High Power Mode is only applied on 2G band in 92D!!! if(pDM_Odm->SupportICType == ODM_RTL8192D) { if(*(pDM_Odm->pBandType) != ODM_BAND_2_4G) return; } if(!(pDM_Odm->SupportAbility & ODM_BB_RXHP)) return; //RX HP ON/OFF if(RX_HP_enable == 1) pRX_HP_Table->RXHP_enable = FALSE; else pRX_HP_Table->RXHP_enable = TRUE; if(pRX_HP_Table->RXHP_enable == FALSE) { if(pRX_HP_Table->RXHP_flag == 1) { pRX_HP_Table->RXHP_flag = 0; psd_intf_flag = 0; } return; } #if(DEV_BUS_TYPE == RT_USB_INTERFACE) //2 Record current TP for USB interface curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast)-lastTxOkCnt; curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast)-lastRxOkCnt; lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); curTPOkCnt = curTxOkCnt+curRxOkCnt; TP_Buff[0] = curTPOkCnt; // current TP TP_Acc3 = PlatformDivision64((TP_Buff[1]+TP_Buff[2]+TP_Buff[3]), 3); TP_Acc5 = PlatformDivision64((TP_Buff[0]+TP_Buff[1]+TP_Buff[2]+TP_Buff[3]+TP_Buff[4]), 5); if(TP_Acc5 < 1000) pRX_HP_Table->TP_Mode = Idle_Mode; else if((1000 < TP_Acc5)&&(TP_Acc5 < 3750000)) pRX_HP_Table->TP_Mode = Low_TP_Mode; else pRX_HP_Table->TP_Mode = High_TP_Mode; ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP TP Mode = %d\n", pRX_HP_Table->TP_Mode)); // Since TP result would be sampled every 2 sec, it needs to delay 4sec to wait PSD processing. // When LatchCnt = 0, we would Get PSD result. if(TP_Degrade_flag == 1) { LatchCnt--; if(LatchCnt == 0) { TP_Degrade_flag = 0; } } // When PSD function triggered by TP degrade 20%, and Interference Flag = 1 // Set a De_counter to wait IGI = upper bound. If time is UP, the Interference flag will be pull down. if(Intf_HighTP_flag == 1) { De_counter--; if(De_counter == 0) { Intf_HighTP_flag = 0; psd_intf_flag = 0; } } #endif //2 AGC RX High Power Mode by PSD only applied to STA Mode //3 NOT applied 1. Ad Hoc Mode. //3 NOT applied 2. AP Mode if ((pMgntInfo->mAssoc) && (!pMgntInfo->mIbss) && (!ACTING_AS_AP(Adapter))) { Is40MHz = *(pDM_Odm->pBandWidth); curRssi = pDM_Odm->RSSI_Min; cur_channel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x0fff) & 0x0f; ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP RX HP flag = %d\n", pRX_HP_Table->RXHP_flag)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP FA = %d\n", FalseAlmCnt->Cnt_all)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP cur RSSI = %d, pre RSSI=%d\n", curRssi, preRssi)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP current CH = %d\n", cur_channel)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP Is 40MHz = %d\n", Is40MHz)); //2 PSD function would be triggered //3 1. Every 4 sec for PCIE //3 2. Before TP Mode (Idle TP<4kbps) for USB //3 3. After TP Mode (High TP) for USB if((curRssi > 68) && (pRX_HP_Table->RXHP_flag == 0)) // Only RSSI>TH and RX_HP_flag=0 will Do PSD process { #if (DEV_BUS_TYPE == RT_USB_INTERFACE) //2 Before TP Mode ==> PSD would be trigger every 4 sec if(pRX_HP_Table->TP_Mode == Idle_Mode) //2.1 less wlan traffic <4kbps { #endif if(PSDTriggerCnt == 1) { odm_PSD_RXHP(pDM_Odm); pRX_HP_Table->PSD_func_trigger = 1; PSDTriggerCnt = 0; } else { PSDTriggerCnt++; } #if(DEV_BUS_TYPE == RT_USB_INTERFACE) } //2 After TP Mode ==> Check if TP degrade larger than 20% would trigger PSD function if(pRX_HP_Table->TP_Mode == High_TP_Mode) { if((pre_state_flag == 0)&&(LatchCnt == 0)) { // TP var < 5% if((((curTPOkCnt-TP_Acc3)*20)<(TP_Acc3))&&(((curTPOkCnt-TP_Acc3)*20)>(-TP_Acc3))) { pre_state++; if(pre_state == 3) // hit pre_state condition => consecutive 3 times { pre_state_flag = 1; pre_state = 0; } } else { pre_state = 0; } } //3 If pre_state_flag=1 ==> start to monitor TP degrade 20% if(pre_state_flag == 1) { if(((TP_Acc3-curTPOkCnt)*5)>(TP_Acc3)) // degrade 20% { odm_PSD_RXHP(pDM_Odm); pRX_HP_Table->PSD_func_trigger = 1; TP_Degrade_flag = 1; LatchCnt = 2; pre_state_flag = 0; } else if(((TP_Buff[2]-curTPOkCnt)*5)>TP_Buff[2]) { odm_PSD_RXHP(pDM_Odm); pRX_HP_Table->PSD_func_trigger = 1; TP_Degrade_flag = 1; LatchCnt = 2; pre_state_flag = 0; } else if(((TP_Buff[3]-curTPOkCnt)*5)>TP_Buff[3]) { odm_PSD_RXHP(pDM_Odm); pRX_HP_Table->PSD_func_trigger = 1; TP_Degrade_flag = 1; LatchCnt = 2; pre_state_flag = 0; } } } #endif } #if (DEV_BUS_TYPE == RT_USB_INTERFACE) for (i=0;i<4;i++) { TP_Buff[4-i] = TP_Buff[3-i]; } #endif //2 Update PSD bitmap according to PSD report if((pRX_HP_Table->PSD_func_trigger == 1)&&(LatchCnt == 0)) { //2 Separate 80M bandwidth into 16 group with smaller 5M BW. for (i = 0 ; i < 16 ; i++) { sum = 0; for(j = 0; j < 5 ; j++) sum += pRX_HP_Table->PSD_bitmap_RXHP[5*i + j]; if(sum < 5) { ch_map_intf_5M[i] = 1; // interference flag } } //=============just for debug========================= //for(i=0;i<16;i++) //DbgPrint("RX HP: ch_map_intf_5M[%d] = %d\n", i, ch_map_intf_5M[i]); //=============================================== //2 Mask target channel 5M index for(i = 0; i < (4+4*Is40MHz) ; i++) { ch_map_intf_5M[cur_channel - (1+2*Is40MHz) + i] = 0; } psd_intf_flag = 0; for(i = 0; i < 16; i++) { if(ch_map_intf_5M[i] == 1) { psd_intf_flag = 1; // interference is detected!!! break; } } #if (DEV_BUS_TYPE == RT_USB_INTERFACE) if(pRX_HP_Table->TP_Mode!=Idle_Mode) { if(psd_intf_flag == 1) // to avoid psd_intf_flag always 1 { Intf_HighTP_flag = 1; De_counter = 32; // 0x1E -> 0x3E needs 32 times by each IGI step =1 } } #endif ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP psd_intf_flag = %d\n", psd_intf_flag)); //2 Distance between target channel and interference for(i = 0; i < 16; i++) { if(ch_map_intf_5M[i] == 1) { Intf_diff_idx = ((cur_channel+Is40MHz-(i+1))>0) ? (s1Byte)(cur_channel-2*Is40MHz-(i-2)) : (s1Byte)((i+1)-(cur_channel+2*Is40MHz)); if(Intf_diff_idx < MIN_Intf_diff_idx) MIN_Intf_diff_idx = Intf_diff_idx; // the min difference index between interference and target } } ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP MIN_Intf_diff_idx = %d\n", MIN_Intf_diff_idx)); //2 Choose False Alarm Threshold switch (MIN_Intf_diff_idx){ case 0: case 1: case 2: case 3: FA_TH = FA_RXHP_TH1; break; case 4: // CH5 case 5: // CH6 FA_TH = FA_RXHP_TH2; break; case 6: // CH7 case 7: // CH8 FA_TH = FA_RXHP_TH3; break; case 8: // CH9 case 9: //CH10 FA_TH = FA_RXHP_TH4; break; case 10: case 11: case 12: case 13: case 14: case 15: FA_TH = FA_RXHP_TH5; break; } ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP FA_TH = %d\n", FA_TH)); pRX_HP_Table->PSD_func_trigger = 0; } //1 Monitor RSSI variation to choose the suitable IGI or Exit AGC RX High Power Mode if(pRX_HP_Table->RXHP_flag == 1) { if ((curRssi > 80)&&(preRssi < 80)) { pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1; } else if ((curRssi < 80)&&(preRssi > 80)) { pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; } else if ((curRssi > 72)&&(preRssi < 72)) { pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; } else if ((curRssi < 72)&&( preRssi > 72)) { pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3; } else if (curRssi < 68) //RSSI is NOT large enough!!==> Exit AGC RX High Power Mode { pRX_HP_Table->Cur_pw_th = pw_th_10dB; pRX_HP_Table->RXHP_flag = 0; // Back to Normal DIG Mode psd_intf_flag = 0; } } else // pRX_HP_Table->RXHP_flag == 0 { //1 Decide whether to enter AGC RX High Power Mode if ((curRssi > 70) && (psd_intf_flag == 1) && (FalseAlmCnt->Cnt_all > FA_TH) && (pDM_DigTable->CurIGValue == pDM_DigTable->rx_gain_range_max)) { if (curRssi > 80) { pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1; } else if (curRssi > 72) { pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; } else { pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3; } pRX_HP_Table->Cur_pw_th = pw_th_16dB; //RegC54[9:8]=2'b11: to enter AGC Flow 3 pRX_HP_Table->First_time_enter = TRUE; pRX_HP_Table->RXHP_flag = 1; // RXHP_flag=1: AGC RX High Power Mode, RXHP_flag=0: Normal DIG Mode } } preRssi = curRssi; odm_Write_RXHP(pDM_Odm); } #endif //#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN)) #endif //#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE) } VOID odm_PSD_RXHPCallback( PRT_TIMER pTimer ) { PADAPTER Adapter = (PADAPTER)pTimer->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; #if DEV_BUS_TYPE==RT_PCI_INTERFACE #if USE_WORKITEM ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem); #else odm_PSD_RXHP(pDM_Odm); #endif #else ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem); #endif } VOID odm_PSD_RXHPWorkitemCallback( IN PVOID pContext ) { PADAPTER pAdapter = (PADAPTER)pContext; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; odm_PSD_RXHP(pDM_Odm); } #endif //#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_RXHP.h000066400000000000000000000047661261122257400214320ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __PHYDMRXHP_H__ #define __PHYDMRXHP_H__ #define RXHP_VERSION "1.0" #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #define AFH_PSD 1 //0:normal PSD scan, 1: only do 20 pts PSD #define MODE_40M 0 //0:20M, 1:40M #define PSD_TH2 3 #define PSD_CHMIN 20 // Minimum channel number for BT AFH #define SIR_STEP_SIZE 3 #define Smooth_Size_1 5 #define Smooth_TH_1 3 #define Smooth_Size_2 10 #define Smooth_TH_2 4 #define Smooth_Size_3 20 #define Smooth_TH_3 4 #define Smooth_Step_Size 5 #define Adaptive_SIR 1 #define PSD_RESCAN 4 #define PSD_SCAN_INTERVAL 700 //ms typedef struct _RX_High_Power_ { u1Byte RXHP_flag; u1Byte PSD_func_trigger; u1Byte PSD_bitmap_RXHP[80]; u1Byte Pre_IGI; u1Byte Cur_IGI; u1Byte Pre_pw_th; u1Byte Cur_pw_th; BOOLEAN First_time_enter; BOOLEAN RXHP_enable; u1Byte TP_Mode; RT_TIMER PSDTimer; #if USE_WORKITEM RT_WORK_ITEM PSDTimeWorkitem; #endif }RXHP_T, *pRXHP_T; #define dm_PSDMonitorCallback odm_PSDMonitorCallback VOID odm_PSDMonitorCallback(PRT_TIMER pTimer); VOID odm_PSDMonitorInit( IN PVOID pDM_VOID ); void odm_RXHPInit( IN PVOID pDM_VOID); void odm_RXHP( IN PVOID pDM_VOID); VOID odm_PSD_RXHPCallback( PRT_TIMER pTimer ); VOID ODM_PSDDbgControl( IN PADAPTER Adapter, IN u4Byte mode, IN u4Byte btRssi ); VOID odm_PSD_RXHPCallback( PRT_TIMER pTimer ); VOID odm_PSD_RXHPWorkitemCallback( IN PVOID pContext ); VOID odm_PSDMonitorWorkItemCallback( IN PVOID pContext ); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_RaInfo.c000066400000000000000000001354061261122257400220160ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // include files //============================================================ #include "Mp_Precomp.h" #include "phydm_precomp.h" VOID odm_RSSIMonitorInit( IN PVOID pDM_VOID ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; pRA_Table->firstconnect = FALSE; #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) pRA_Table->PT_collision_pre = TRUE; //used in ODM_DynamicARFBSelect(WIN only) #endif #endif } VOID odm_RSSIMonitorCheck( IN PVOID pDM_VOID ) { // // For AP/ADSL use prtl8192cd_priv // For CE/NIC use PADAPTER // PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)) return; // // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate // at the same time. In the stage2/3, we need to prive universal interface and merge all // HW dynamic mechanism. // switch (pDM_Odm->SupportPlatform) { case ODM_WIN: odm_RSSIMonitorCheckMP(pDM_Odm); break; case ODM_CE: odm_RSSIMonitorCheckCE(pDM_Odm); break; case ODM_AP: odm_RSSIMonitorCheckAP(pDM_Odm); break; case ODM_ADSL: //odm_DIGAP(pDM_Odm); break; } } // odm_RSSIMonitorCheck #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) VOID odm_RSSIDumpToRegister( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PADAPTER Adapter = pDM_Odm->Adapter; if(pDM_Odm->SupportICType == ODM_RTL8812) { PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[0]); PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[1]); // Rx EVM PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[0]); PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[1]); // Rx SNR PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[0])); PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[1])); // Rx Cfo_Short PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[0]); PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[1]); // Rx Cfo_Tail PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[0]); PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[1]); } else if(pDM_Odm->SupportICType == ODM_RTL8192E) { PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[0]); PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[1]); // Rx EVM PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[0]); PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[1]); // Rx SNR PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[0])); PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[1])); // Rx Cfo_Short PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[0]); PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[1]); // Rx Cfo_Tail PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[0]); PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[1]); } } #endif VOID odm_RSSIMonitorCheckMP( IN PVOID pDM_VOID ) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PRT_WLAN_STA pEntry = NULL; u1Byte i; s4Byte tmpEntryMaxPWDB=0, tmpEntryMinPWDB=0xff; u1Byte H2C_Parameter[4] ={0}; PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; PMGNT_INFO pDefaultMgntInfo = &Adapter->MgntInfo; u8Byte curTxOkCnt = 0, curRxOkCnt = 0; u1Byte STBC_TX = 0; BOOLEAN FirstConnect; pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; #if (BEAMFORMING_SUPPORT == 1) BEAMFORMING_CAP Beamform_cap = BEAMFORMING_CAP_NONE; u1Byte TxBF_EN = 0; #endif PADAPTER pLoopAdapter = GetDefaultAdapter(Adapter); BOOLEAN bExtRAInfo = FALSE; if(pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821 || pDM_Odm->SupportICType == ODM_RTL8723B) bExtRAInfo = TRUE; FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); pRA_Table->firstconnect = pHalData->bLinked; H2C_Parameter[3] |= FirstConnect << 5; if(pDM_Odm->SupportICType == ODM_RTL8188E && (pDefaultMgntInfo->CustomerID==RT_CID_819x_HP)) { if(curRxOkCnt >(curTxOkCnt*6)) PlatformEFIOWrite4Byte(Adapter, REG_ARFR0, 0x8f015); else PlatformEFIOWrite4Byte(Adapter, REG_ARFR0, 0xff015); } if(pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821) { if(curRxOkCnt >(curTxOkCnt*6)) H2C_Parameter[3]=0x01; else H2C_Parameter[3]=0x00; } while(pLoopAdapter) { if(pLoopAdapter != NULL){ pMgntInfo = &pLoopAdapter->MgntInfo; curTxOkCnt = pLoopAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt; curRxOkCnt = pLoopAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt; pMgntInfo->lastTxOkCnt = curTxOkCnt; pMgntInfo->lastRxOkCnt = curRxOkCnt; } for(i = 0; i < ASSOCIATE_ENTRY_NUM; i++) { if(IsAPModeExist(pLoopAdapter)) { if(GetFirstExtAdapter(pLoopAdapter) != NULL && GetFirstExtAdapter(pLoopAdapter) == pLoopAdapter){ pEntry = AsocEntry_EnumStation(pLoopAdapter, i); } else if(GetFirstGOPort(pLoopAdapter) != NULL && IsFirstGoAdapter(pLoopAdapter)){ pEntry = AsocEntry_EnumStation(pLoopAdapter, i); } } else { if(GetDefaultAdapter(pLoopAdapter) == pLoopAdapter){ pEntry = AsocEntry_EnumStation(pLoopAdapter, i); } } if(pEntry != NULL) { if(pEntry->bAssociated) { RT_DISP_ADDR(FDM, DM_PWDB, ("pEntry->MacAddr ="), pEntry->MacAddr); RT_DISP(FDM, DM_PWDB, ("pEntry->rssi = 0x%x(%d)\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->rssi_stat.UndecoratedSmoothedPWDB)); if(bExtRAInfo) { #if (BEAMFORMING_SUPPORT == 1) Beamform_cap = Beamforming_GetEntryBeamCapByMacId(Adapter, pEntry->AssociatedMacId); if(Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT |BEAMFORMER_CAP_VHT_SU)) TxBF_EN = 1; else TxBF_EN = 0; H2C_Parameter[3] |= TxBF_EN << 6; if(TxBF_EN) STBC_TX = 0; else #endif { if(IS_WIRELESS_MODE_AC(Adapter)) STBC_TX = TEST_FLAG(pEntry->VHTInfo.STBC, STBC_VHT_ENABLE_TX); else STBC_TX = TEST_FLAG(pEntry->HTInfo.STBC, STBC_HT_ENABLE_TX); } H2C_Parameter[3] |= STBC_TX << 1; } if(pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; H2C_Parameter[2] = (u1Byte)(pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0xFF); H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 H2C_Parameter[0] = (pEntry->AssociatedMacId); if(bExtRAInfo) ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, 4, H2C_Parameter); else ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, 3, H2C_Parameter); } } else { break; } } pLoopAdapter = GetNextExtAdapter(pLoopAdapter); } if(tmpEntryMaxPWDB != 0) // If associated entry is found { pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; RT_DISP(FDM, DM_PWDB, ("EntryMaxPWDB = 0x%x(%d)\n", tmpEntryMaxPWDB, tmpEntryMaxPWDB)); } else { pHalData->EntryMaxUndecoratedSmoothedPWDB = 0; } if(tmpEntryMinPWDB != 0xff) // If associated entry is found { pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; RT_DISP(FDM, DM_PWDB, ("EntryMinPWDB = 0x%x(%d)\n", tmpEntryMinPWDB, tmpEntryMinPWDB)); } else { pHalData->EntryMinUndecoratedSmoothedPWDB = 0; } // Indicate Rx signal strength to FW. if(pHalData->bUseRAMask) { if(bExtRAInfo) { PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pDefaultMgntInfo); PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pDefaultMgntInfo); #if (BEAMFORMING_SUPPORT == 1) Beamform_cap = Beamforming_GetEntryBeamCapByMacId(Adapter, pDefaultMgntInfo->mMacId); if(Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT |BEAMFORMER_CAP_VHT_SU)) TxBF_EN = 1; else TxBF_EN = 0; H2C_Parameter[3] |= TxBF_EN << 6; if(TxBF_EN) STBC_TX = 0; else #endif { if(IS_WIRELESS_MODE_AC(Adapter)) STBC_TX = TEST_FLAG(pVHTInfo->VhtCurStbc, STBC_VHT_ENABLE_TX); else STBC_TX = TEST_FLAG(pHTInfo->HtCurStbc, STBC_HT_ENABLE_TX); } H2C_Parameter[3] |= STBC_TX << 1; } H2C_Parameter[2] = (u1Byte)(pHalData->UndecoratedSmoothedPWDB & 0xFF); H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 H2C_Parameter[0] = 0; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 if(bExtRAInfo) ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, 4, H2C_Parameter); else ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, 3, H2C_Parameter); // BT 3.0 HS mode Rssi if(pDM_Odm->bBtHsOperation) { H2C_Parameter[2] = pDM_Odm->btHsRssi; H2C_Parameter[1] = 0x0; H2C_Parameter[0] = 2; if(bExtRAInfo) ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, 4, H2C_Parameter); else ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, 3, H2C_Parameter); } } else { PlatformEFIOWrite1Byte(Adapter, 0x4fe, (u1Byte)pHalData->UndecoratedSmoothedPWDB); } if((pDM_Odm->SupportICType == ODM_RTL8812)||(pDM_Odm->SupportICType == ODM_RTL8192E)) odm_RSSIDumpToRegister(pDM_Odm); { PADAPTER pLoopAdapter = GetDefaultAdapter(Adapter); s4Byte GlobalRSSI_min = 0xFF, LocalRSSI_Min; BOOLEAN bLink= FALSE; while(pLoopAdapter) { LocalRSSI_Min = odm_FindMinimumRSSI(pLoopAdapter); //DbgPrint("pHalData->bLinked=%d, LocalRSSI_Min=%d\n", pHalData->bLinked, LocalRSSI_Min); if((LocalRSSI_Min < GlobalRSSI_min) && (LocalRSSI_Min != 0)) GlobalRSSI_min = LocalRSSI_Min; if(pHalData->bLinked) bLink = TRUE; pLoopAdapter = GetNextExtAdapter(pLoopAdapter); } pHalData->bLinked = bLink; ODM_CmnInfoUpdate(&pHalData->DM_OutSrc ,ODM_CMNINFO_LINK, (u8Byte)bLink); ODM_CmnInfoUpdate(&pHalData->DM_OutSrc ,ODM_CMNINFO_RSSI_MIN, (u8Byte)GlobalRSSI_min); } #endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) } #if(DM_ODM_SUPPORT_TYPE==ODM_CE) // //sherry move from DUSC to here 20110517 // static VOID FindMinimumRSSI_Dmsp( IN PADAPTER pAdapter ) { #if 0 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; s32 Rssi_val_min_back_for_mac0; BOOLEAN bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(pAdapter); BOOLEAN bRestoreRssi = _FALSE; PADAPTER BuddyAdapter = pAdapter->BuddyAdapter; if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) { if(BuddyAdapter!= NULL) { if(pHalData->bSlaveOfDMSP) { //ODM_RT_TRACE(pDM_Odm,COMP_EASY_CONCURRENT,DBG_LOUD,("bSlavecase of dmsp\n")); BuddyAdapter->DualMacDMSPControl.RssiValMinForAnotherMacOfDMSP = pdmpriv->MinUndecoratedPWDBForDM; } else { if(bGetValueFromBuddyAdapter) { //ODM_RT_TRACE(pDM_Odm,COMP_EASY_CONCURRENT,DBG_LOUD,("get new RSSI\n")); bRestoreRssi = _TRUE; Rssi_val_min_back_for_mac0 = pdmpriv->MinUndecoratedPWDBForDM; pdmpriv->MinUndecoratedPWDBForDM = pAdapter->DualMacDMSPControl.RssiValMinForAnotherMacOfDMSP; } } } } if(bRestoreRssi) { bRestoreRssi = _FALSE; pdmpriv->MinUndecoratedPWDBForDM = Rssi_val_min_back_for_mac0; } #endif } static void FindMinimumRSSI( IN PADAPTER pAdapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); //1 1.Determine the minimum RSSI if((pDM_Odm->bLinked != _TRUE) && (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) { pdmpriv->MinUndecoratedPWDBForDM = 0; //ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any \n")); } else { pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; } //DBG_8192C("%s=>MinUndecoratedPWDBForDM(%d)\n",__FUNCTION__,pdmpriv->MinUndecoratedPWDBForDM); //ODM_RT_TRACE(pDM_Odm,COMP_DIG, DBG_LOUD, ("MinUndecoratedPWDBForDM =%d\n",pHalData->MinUndecoratedPWDBForDM)); } #endif VOID odm_RSSIMonitorCheckCE( IN PVOID pDM_VOID ) { #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); int i; int tmpEntryMaxPWDB=0, tmpEntryMinPWDB=0xff; u8 sta_cnt=0; u32 UL_DL_STATE = 0, STBC_TX = 0, TxBF_EN = 0; u32 PWDB_rssi[NUM_STA]={0};//[0~15]:MACID, [16~31]:PWDB_rssi BOOLEAN FirstConnect = FALSE; pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; if(pDM_Odm->bLinked != _TRUE) return; #if((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1)) if((pDM_Odm->SupportICType == ODM_RTL8812)||(pDM_Odm->SupportICType == ODM_RTL8821)) { u64 curTxOkCnt = pdvobjpriv->traffic_stat.cur_tx_bytes; u64 curRxOkCnt = pdvobjpriv->traffic_stat.cur_rx_bytes; if(curRxOkCnt >(curTxOkCnt*6)) UL_DL_STATE = 1; else UL_DL_STATE = 0; } #endif FirstConnect = (pDM_Odm->bLinked) && (pRA_Table->firstconnect == FALSE); pRA_Table->firstconnect = pDM_Odm->bLinked; //if(check_fwstate(&Adapter->mlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) { #if 1 struct sta_info *psta; for(i=0; ipODM_StaInfo[i])) { if(IS_MCAST( psta->hwaddr)) //if(psta->mac_id ==1) continue; if(psta->rssi_stat.UndecoratedSmoothedPWDB == (-1)) continue; if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; #if 0 DBG_871X("%s mac_id:%u, mac:"MAC_FMT", rssi:%d\n", __func__, psta->mac_id, MAC_ARG(psta->hwaddr), psta->rssi_stat.UndecoratedSmoothedPWDB); #endif if(psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)) { #ifdef CONFIG_80211N_HT if(pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8812) { #ifdef CONFIG_BEAMFORMING BEAMFORMING_CAP Beamform_cap = beamforming_get_entry_beam_cap_by_mac_id(&Adapter->mlmepriv, psta->mac_id); if(Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT |BEAMFORMER_CAP_VHT_SU)) TxBF_EN = 1; else TxBF_EN = 0; if (TxBF_EN) { STBC_TX = 0; } else #endif { #ifdef CONFIG_80211AC_VHT if(IsSupportedVHT(psta->wireless_mode)) STBC_TX = TEST_FLAG(psta->vhtpriv.stbc_cap, STBC_VHT_ENABLE_TX); else #endif STBC_TX = TEST_FLAG(psta->htpriv.stbc_cap, STBC_HT_ENABLE_TX); } } #endif if(pDM_Odm->SupportICType == ODM_RTL8192D) PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) | ((Adapter->stapriv.asoc_sta_count+1) << 8)); else if ((pDM_Odm->SupportICType == ODM_RTL8192E)||(pDM_Odm->SupportICType == ODM_RTL8812)||(pDM_Odm->SupportICType == ODM_RTL8821)) PWDB_rssi[sta_cnt++] = (((u8)(psta->mac_id&0xFF)) | ((psta->rssi_stat.UndecoratedSmoothedPWDB&0x7F)<<16) |(STBC_TX << 25) | (FirstConnect << 29) | (TxBF_EN << 30)); else PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) ); } } } #else _irqL irqL; _list *plist, *phead; struct sta_info *psta; struct sta_priv *pstapriv = &Adapter->stapriv; u8 bcast_addr[ETH_ALEN]= {0xff,0xff,0xff,0xff,0xff,0xff}; _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); for(i=0; i< NUM_STA; i++) { phead = &(pstapriv->sta_hash[i]); plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); plist = get_next(plist); if(_rtw_memcmp(psta->hwaddr, bcast_addr, ETH_ALEN) || _rtw_memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) continue; if(psta->state & WIFI_ASOC_STATE) { if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; if(psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)){ //printk("%s==> mac_id(%d),rssi(%d)\n",__FUNCTION__,psta->mac_id,psta->rssi_stat.UndecoratedSmoothedPWDB); #if(RTL8192D_SUPPORT==1) PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) | ((Adapter->stapriv.asoc_sta_count+1) << 8)); #else PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) ); #endif } } } } _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); #endif //printk("%s==> sta_cnt(%d)\n",__FUNCTION__,sta_cnt); for(i=0; i< sta_cnt; i++) { if(PWDB_rssi[i] != (0)){ if(pHalData->fw_ractrl == _TRUE)// Report every sta's RSSI to FW { #if(RTL8192D_SUPPORT==1) if(pDM_Odm->SupportICType == ODM_RTL8192D){ FillH2CCmd92D(Adapter, H2C_RSSI_REPORT, 3, (u8 *)(&PWDB_rssi[i])); } #endif #if((RTL8192C_SUPPORT==1)||(RTL8723A_SUPPORT==1)) if((pDM_Odm->SupportICType == ODM_RTL8192C)||(pDM_Odm->SupportICType == ODM_RTL8723A)){ rtl8192c_set_rssi_cmd(Adapter, (u8*)&PWDB_rssi[i]); } #endif #if((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1)) if((pDM_Odm->SupportICType == ODM_RTL8812)||(pDM_Odm->SupportICType == ODM_RTL8821)){ PWDB_rssi[i] |= (UL_DL_STATE << 24); rtl8812_set_rssi_cmd(Adapter, (u8 *)(&PWDB_rssi[i])); } #endif #if(RTL8192E_SUPPORT==1) if(pDM_Odm->SupportICType == ODM_RTL8192E){ rtl8192e_set_rssi_cmd(Adapter, (u8 *)(&PWDB_rssi[i])); } #endif #if(RTL8723B_SUPPORT==1) if(pDM_Odm->SupportICType == ODM_RTL8723B){ rtl8723b_set_rssi_cmd(Adapter, (u8 *)(&PWDB_rssi[i])); } #endif #if(RTL8188E_SUPPORT==1) if(pDM_Odm->SupportICType == ODM_RTL8188E){ rtl8188e_set_rssi_cmd(Adapter, (u8 *)(&PWDB_rssi[i])); } #endif } else{ #if((RTL8188E_SUPPORT==1)&&(RATE_ADAPTIVE_SUPPORT == 1)) if(pDM_Odm->SupportICType == ODM_RTL8188E){ ODM_RA_SetRSSI_8188E( &(pHalData->odmpriv), (PWDB_rssi[i]&0xFF), (u8)((PWDB_rssi[i]>>16) & 0xFF)); } #endif } } } } if(tmpEntryMaxPWDB != 0) // If associated entry is found { pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; } else { pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0; } if(tmpEntryMinPWDB != 0xff) // If associated entry is found { pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; } else { pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0; } FindMinimumRSSI(Adapter);//get pdmpriv->MinUndecoratedPWDBForDM #if(RTL8192D_SUPPORT==1) FindMinimumRSSI_Dmsp(Adapter); #endif pDM_Odm->RSSI_Min = pdmpriv->MinUndecoratedPWDBForDM; //ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); #endif//if (DM_ODM_SUPPORT_TYPE == ODM_CE) } VOID odm_RSSIMonitorCheckAP( IN PVOID pDM_VOID ) { #if (DM_ODM_SUPPORT_TYPE == ODM_AP) #if defined(CONFIG_RTL_92C_SUPPORT) || defined(CONFIG_RTL_92D_SUPPORT) ||defined(CONFIG_RTL_8812_SUPPORT)||defined(CONFIG_WLAN_HAL_8881A)||defined(CONFIG_WLAN_HAL_8192EE) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; prtl8192cd_priv priv = pDM_Odm->priv; u4Byte i; PSTA_INFO_T pstat; static u1Byte H2C_Parameter[5]; u1Byte TxBF_EN = 0; pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable; if( priv->up_time % 2 ) return; pDM_BdcTable->num_Txbfee_Client=0; pDM_BdcTable->num_Txbfer_Client=0; //pDM_BdcTable->num_Client=0; for(i=0; ipODM_StaInfo[i]; if(IS_STA_VALID(pstat) ) { #ifdef BEAMFORMING_SUPPORT BEAMFORMING_CAP Beamform_cap = Beamforming_GetEntryBeamCapByMacId(priv, pstat->aid); if(Beamform_cap == BEAMFORMER_CAP_HT_EXPLICIT || Beamform_cap == BEAMFORMER_CAP_VHT_SU || Beamform_cap == (BEAMFORMER_CAP_HT_EXPLICIT|BEAMFORMEE_CAP_HT_EXPLICIT) || Beamform_cap == (BEAMFORMER_CAP_VHT_SU|BEAMFORMEE_CAP_VHT_SU)) { TxBF_EN = (1<< 6); pDM_BdcTable->w_BFee_Client[i]=1; //AP act as BFer pDM_BdcTable->num_Txbfee_Client++; } else { pDM_BdcTable->w_BFee_Client[i]=0; //AP act as BFer } if((Beamform_cap & BEAMFORMEE_CAP_HT_EXPLICIT) || (Beamform_cap & BEAMFORMEE_CAP_VHT_SU) ) { pDM_BdcTable->w_BFer_Client[i]=1; //AP act as BFee pDM_BdcTable->num_Txbfer_Client++; } else { pDM_BdcTable->w_BFer_Client[i]=0; //AP act as BFer } //pDM_BdcTable->num_Client++; #endif //#ifdef STA_EXT // if (GET_CHIP_VER(priv)==VERSION_8812E && REMAP_AID(pstat) < (RTL8812_NUM_STAT - 1)) //#endif { #ifdef CONFIG_RTL_8812_SUPPORT #ifdef STA_EXT if(REMAP_AID(pstat) < (RTL8812_NUM_STAT - 1)) #endif if(pDM_Odm->SupportICType == ODM_RTL8812) { memset(H2C_Parameter,0,5); H2C_Parameter[2] = (u1Byte)(pstat->rssi & 0x7F); H2C_Parameter[0] = REMAP_AID(pstat); if ((priv->pmib->dot11nConfigEntry.dot11nSTBC) && ( (pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_RX_STBC_CAP_) #ifdef RTK_AC_SUPPORT || (pstat->vht_cap_buf.vht_cap_info & cpu_to_le32(_VHTCAP_RX_STBC_CAP_)) #endif ))) H2C_Parameter[3] |= 2; H2C_Parameter[3] |= TxBF_EN ; FillH2CCmd8812(pDM_Odm->priv, H2C_8812_RSSI_REPORT, 4, H2C_Parameter); } #endif } //#ifdef STA_EXT // else if (GET_CHIP_VER(priv)!=VERSION_8812E && REMAP_AID(pstat) < (FW_NUM_STAT - 1)) //#endif { #if defined(CONFIG_WLAN_HAL_8881A) || defined(CONFIG_WLAN_HAL_8192EE) #ifdef STA_EXT if(REMAP_AID(pstat) < (RTL8812_NUM_STAT - 1)) #endif if(pDM_Odm->SupportICType == ODM_RTL8881A || pDM_Odm->SupportICType == ODM_RTL8192E) { // u1Byte H2C_Parameter[5] ={0}; u1Byte cmdlen = 3; memset(H2C_Parameter, 0, 5); H2C_Parameter[2] = (u1Byte)(pstat->rssi & 0xFF); H2C_Parameter[0] = REMAP_AID(pstat); if(pDM_Odm->SupportICType == ODM_RTL8192E) { cmdlen = 4; if ((priv->pmib->dot11nConfigEntry.dot11nSTBC) && (pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_RX_STBC_CAP_))) H2C_Parameter[3] |= 2; H2C_Parameter[3] |= TxBF_EN; } GET_HAL_INTERFACE(pDM_Odm->priv)->FillH2CCmdHandler(pDM_Odm->priv, H2C_88XX_RSSI_REPORT, cmdlen, H2C_Parameter); } #endif #if defined(CONFIG_RTL_92C_SUPPORT) || defined(CONFIG_RTL_92D_SUPPORT) #ifdef STA_EXT if(REMAP_AID(pstat) < (FW_NUM_STAT - 1)) #endif if(pDM_Odm->SupportICType == ODM_RTL8192C || pDM_Odm->SupportICType == ODM_RTL8192D) add_update_rssi(pDM_Odm->priv, pstat); #endif } } } } #endif #endif } VOID odm_RateAdaptiveMaskInit( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PODM_RATE_ADAPTIVE pOdmRA = &pDM_Odm->RateAdaptive; #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PMGNT_INFO pMgntInfo = &pDM_Odm->Adapter->MgntInfo; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); pMgntInfo->Ratr_State = DM_RATR_STA_INIT; if (pMgntInfo->DM_Type == DM_Type_ByDriver) pHalData->bUseRAMask = TRUE; else pHalData->bUseRAMask = FALSE; #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) pOdmRA->Type = DM_Type_ByDriver; if (pOdmRA->Type == DM_Type_ByDriver) pDM_Odm->bUseRAMask = _TRUE; else pDM_Odm->bUseRAMask = _FALSE; #endif pOdmRA->RATRState = DM_RATR_STA_INIT; #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) if(pDM_Odm->SupportICType == ODM_RTL8812) pOdmRA->LdpcThres = 50; else pOdmRA->LdpcThres = 35; pOdmRA->RtsThres = 35; #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) pOdmRA->LdpcThres = 35; pOdmRA->bUseLdpc = FALSE; #else pOdmRA->UltraLowRSSIThresh = 9; #endif pOdmRA->HighRSSIThresh = 50; pOdmRA->LowRSSIThresh = 20; } /*----------------------------------------------------------------------------- * Function: odm_RefreshRateAdaptiveMask() * * Overview: Update rate table mask according to rssi * * Input: NONE * * Output: NONE * * Return: NONE * * Revised History: * When Who Remark * 05/27/2009 hpfan Create Version 0. * *---------------------------------------------------------------------------*/ VOID odm_RefreshRateAdaptiveMask( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask()---------->\n")); if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask(): Return cos not supported\n")); return; } // // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate // at the same time. In the stage2/3, we need to prive universal interface and merge all // HW dynamic mechanism. // switch (pDM_Odm->SupportPlatform) { case ODM_WIN: odm_RefreshRateAdaptiveMaskMP(pDM_Odm); break; case ODM_CE: odm_RefreshRateAdaptiveMaskCE(pDM_Odm); break; case ODM_AP: case ODM_ADSL: odm_RefreshRateAdaptiveMaskAPADSL(pDM_Odm); break; } } #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) VOID odm_RefreshLdpcRtsMP( IN PADAPTER pAdapter, IN PDM_ODM_T pDM_Odm, IN u1Byte mMacId, IN u1Byte IOTPeer, IN s4Byte UndecoratedSmoothedPWDB ) { BOOLEAN bCtlLdpc = FALSE; PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter); PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; if(pDM_Odm->SupportICType != ODM_RTL8821 && pDM_Odm->SupportICType != ODM_RTL8812) return; if((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) bCtlLdpc = TRUE; else if( pDM_Odm->SupportICType == ODM_RTL8812 && IOTPeer == HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP) bCtlLdpc = TRUE; if(bCtlLdpc) { if(UndecoratedSmoothedPWDB < (pRA->LdpcThres-5)) MgntSet_TX_LDPC(pAdapter, mMacId, TRUE); else if(UndecoratedSmoothedPWDB > pRA->LdpcThres) MgntSet_TX_LDPC(pAdapter, mMacId, FALSE); } if(UndecoratedSmoothedPWDB < (pRA->RtsThres-5)) pRA->bLowerRtsRate = TRUE; else if(UndecoratedSmoothedPWDB > pRA->RtsThres) pRA->bLowerRtsRate = FALSE; } #endif VOID odm_RefreshRateAdaptiveMaskMP( IN PVOID pDM_VOID ) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PADAPTER pAdapter = pDM_Odm->Adapter; PADAPTER pTargetAdapter = NULL; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter); if(pAdapter->bDriverStopped) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); return; } if(!pHalData->bUseRAMask) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); return; } // if default port is connected, update RA table for default port (infrastructure mode only) if(pMgntInfo->mAssoc && (!ACTING_AS_AP(pAdapter))) { odm_RefreshLdpcRtsMP(pAdapter, pDM_Odm, pMgntInfo->mMacId, pMgntInfo->IOTPeer, pHalData->UndecoratedSmoothedPWDB); ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("odm_RefreshRateAdaptiveMask(): Infrasture Mode\n")); if( ODM_RAStateCheck(pDM_Odm, pHalData->UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pMgntInfo->Ratr_State) ) { ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid); ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pHalData->UndecoratedSmoothedPWDB, pMgntInfo->Ratr_State)); pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State); } else if(pDM_Odm->bChangeState) { ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid); ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining)); pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State); } } // // The following part configure AP/VWifi/IBSS rate adaptive mask. // if(pMgntInfo->mIbss) // Target: AP/IBSS peer. pTargetAdapter = GetDefaultAdapter(pAdapter); else pTargetAdapter = GetFirstAPAdapter(pAdapter); // if extension port (softap) is started, updaet RA table for more than one clients associate if(pTargetAdapter != NULL) { int i; PRT_WLAN_STA pEntry; for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { pEntry = AsocEntry_EnumStation(pTargetAdapter, i); if(NULL != pEntry) { if(pEntry->bAssociated) { odm_RefreshLdpcRtsMP(pAdapter, pDM_Odm, pEntry->AssociatedMacId, pEntry->IOTPeer, pEntry->rssi_stat.UndecoratedSmoothedPWDB); if(ODM_RAStateCheck(pDM_Odm, pEntry->rssi_stat.UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pEntry->Ratr_State) ) { ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pEntry->MacAddr); ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->Ratr_State)); pAdapter->HalFunc.UpdateHalRAMaskHandler(pTargetAdapter, pEntry->AssociatedMacId, pEntry, pEntry->Ratr_State); } else if(pDM_Odm->bChangeState) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining)); pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State); } } } } } if(pMgntInfo->bSetTXPowerTrainingByOid) pMgntInfo->bSetTXPowerTrainingByOid = FALSE; #endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) } VOID odm_RefreshRateAdaptiveMaskCE( IN PVOID pDM_VOID ) { #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; u1Byte i; PADAPTER pAdapter = pDM_Odm->Adapter; PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; if(pAdapter->bDriverStopped) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); return; } if(!pDM_Odm->bUseRAMask) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); return; } //printk("==> %s \n",__FUNCTION__); for(i=0; ipODM_StaInfo[i]; if(IS_STA_VALID(pstat) ) { if(IS_MCAST( pstat->hwaddr)) //if(psta->mac_id ==1) continue; if(IS_MCAST( pstat->hwaddr)) continue; #if((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1)) if((pDM_Odm->SupportICType == ODM_RTL8812)||(pDM_Odm->SupportICType == ODM_RTL8821)) { if(pstat->rssi_stat.UndecoratedSmoothedPWDB < pRA->LdpcThres) { pRA->bUseLdpc = TRUE; pRA->bLowerRtsRate = TRUE; if((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) Set_RA_LDPC_8812(pstat, TRUE); //DbgPrint("RSSI=%d, bUseLdpc = TRUE\n", pHalData->UndecoratedSmoothedPWDB); } else if(pstat->rssi_stat.UndecoratedSmoothedPWDB > (pRA->LdpcThres-5)) { pRA->bUseLdpc = FALSE; pRA->bLowerRtsRate = FALSE; if((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) Set_RA_LDPC_8812(pstat, FALSE); //DbgPrint("RSSI=%d, bUseLdpc = FALSE\n", pHalData->UndecoratedSmoothedPWDB); } } #endif if( TRUE == ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, FALSE , &pstat->rssi_level) ) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level)); //printk("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level); rtw_hal_update_ra_mask(pstat, pstat->rssi_level); } else if(pDM_Odm->bChangeState) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining)); rtw_hal_update_ra_mask(pstat, pstat->rssi_level); } } } #endif } VOID odm_RefreshRateAdaptiveMaskAPADSL( IN PVOID pDM_VOID ) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; struct rtl8192cd_priv *priv = pDM_Odm->priv; struct aid_obj *aidarray; u4Byte i; PSTA_INFO_T pstat; if(priv->up_time % 2) return; for(i=0; ipODM_StaInfo[i]; if(IS_STA_VALID(pstat) ) { #if defined(UNIVERSAL_REPEATER) || defined(MBSSID) aidarray = container_of(pstat, struct aid_obj, station); priv = aidarray->priv; #endif if (!priv->pmib->dot11StationConfigEntry.autoRate) continue; if(ODM_RAStateCheck(pDM_Odm, (s4Byte)pstat->rssi, FALSE, &pstat->rssi_level) ) { ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pstat->hwaddr); ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi, pstat->rssi_level)); #if defined(CONFIG_PCI_HCI) #ifdef CONFIG_WLAN_HAL if (IS_HAL_CHIP(priv)) { #ifdef WDS if(!(pstat->state & WIFI_WDS))//if WDS donot setting #endif GET_HAL_INTERFACE(priv)->UpdateHalRAMaskHandler(priv, pstat, pstat->rssi_level); } else #endif #ifdef CONFIG_RTL_8812_SUPPORT if(GET_CHIP_VER(priv)== VERSION_8812E) { UpdateHalRAMask8812(priv, pstat, 3); } else #endif #ifdef CONFIG_RTL_88E_SUPPORT if (GET_CHIP_VER(priv)==VERSION_8188E) { #ifdef TXREPORT add_RATid(priv, pstat); #endif } else #endif { #if defined(CONFIG_RTL_92D_SUPPORT) || defined(CONFIG_RTL_92C_SUPPORT) add_update_RATid(priv, pstat); #endif } #elif defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) update_STA_RATid(priv, pstat); #endif } } } #endif } // Return Value: BOOLEAN // - TRUE: RATRState is changed. BOOLEAN ODM_RAStateCheck( IN PVOID pDM_VOID, IN s4Byte RSSI, IN BOOLEAN bForceUpdate, OUT pu1Byte pRATRState ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; const u1Byte GoUpGap = 5; u1Byte HighRSSIThreshForRA = pRA->HighRSSIThresh; u1Byte LowRSSIThreshForRA = pRA->LowRSSIThresh; u1Byte RATRState; // Threshold Adjustment: // when RSSI state trends to go up one or two levels, make sure RSSI is high enough. // Here GoUpGap is added to solve the boundary's level alternation issue. #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) u1Byte UltraLowRSSIThreshForRA = pRA->UltraLowRSSIThresh; if(pDM_Odm->SupportICType == ODM_RTL8881A) LowRSSIThreshForRA = 30; // for LDPC / BCC switch #endif switch (*pRATRState) { case DM_RATR_STA_INIT: case DM_RATR_STA_HIGH: break; case DM_RATR_STA_MIDDLE: HighRSSIThreshForRA += GoUpGap; break; case DM_RATR_STA_LOW: HighRSSIThreshForRA += GoUpGap; LowRSSIThreshForRA += GoUpGap; break; #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) case DM_RATR_STA_ULTRA_LOW: HighRSSIThreshForRA += GoUpGap; LowRSSIThreshForRA += GoUpGap; UltraLowRSSIThreshForRA += GoUpGap; break; #endif default: ODM_RT_ASSERT(pDM_Odm, FALSE, ("wrong rssi level setting %d !", *pRATRState) ); break; } // Decide RATRState by RSSI. if(RSSI > HighRSSIThreshForRA) RATRState = DM_RATR_STA_HIGH; else if(RSSI > LowRSSIThreshForRA) RATRState = DM_RATR_STA_MIDDLE; #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) else if(RSSI > UltraLowRSSIThreshForRA) RATRState = DM_RATR_STA_LOW; else RATRState = DM_RATR_STA_ULTRA_LOW; #else else RATRState = DM_RATR_STA_LOW; #endif //printk("==>%s,RATRState:0x%02x ,RSSI:%d \n",__FUNCTION__,RATRState,RSSI); if( *pRATRState!=RATRState || bForceUpdate) { ODM_RT_TRACE( pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI Level %d -> %d\n", *pRATRState, RATRState) ); *pRATRState = RATRState; return TRUE; } return FALSE; } VOID odm_RefreshBasicRateMask( IN PVOID pDM_VOID ) { #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PADAPTER Adapter = pDM_Odm->Adapter; static u1Byte Stage = 0; u1Byte CurStage = 0; OCTET_STRING osRateSet; PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(Adapter); u1Byte RateSet[5] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M, MGN_6M}; if(pDM_Odm->SupportICType != ODM_RTL8812 && pDM_Odm->SupportICType != ODM_RTL8821 ) return; if(pDM_Odm->bLinked == FALSE) // unlink Default port information CurStage = 0; else if(pDM_Odm->RSSI_Min < 40) // link RSSI < 40% CurStage = 1; else if(pDM_Odm->RSSI_Min > 45) // link RSSI > 45% CurStage = 3; else CurStage = 2; // link 25% <= RSSI <= 30% if(CurStage != Stage) { if(CurStage == 1) { FillOctetString(osRateSet, RateSet, 5); FilterSupportRate(pMgntInfo->mBrates, &osRateSet, FALSE); Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)&osRateSet); } else if(CurStage == 3 && (Stage == 1 || Stage == 2)) { Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_BASIC_RATE, (pu1Byte)(&pMgntInfo->mBrates) ); } } Stage = CurStage; #endif } #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) VOID ODM_DynamicARFBSelect( IN PVOID pDM_VOID, IN u1Byte rate, IN BOOLEAN Collision_State ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; if(pDM_Odm->SupportICType != ODM_RTL8192E) return; if(Collision_State == pRA_Table->PT_collision_pre) return; if (rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS12){ if (Collision_State == 1){ if(rate == DESC_RATEMCS12){ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060501); } else if(rate == DESC_RATEMCS11){ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07070605); } else if(rate == DESC_RATEMCS10){ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080706); } else if(rate == DESC_RATEMCS9){ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080707); } else{ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09090808); } } else{ // Collision_State == 0 if(rate == DESC_RATEMCS12){ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05010000); ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706); } else if(rate == DESC_RATEMCS11){ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x06050000); ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080807); } else if(rate == DESC_RATEMCS10){ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07060000); ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090908); } else if(rate == DESC_RATEMCS9){ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07070000); ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090808); } else{ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x08080000); ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0b0a0909); } } } else{ // MCS13~MCS15, 1SS, G-mode if (Collision_State == 1){ if(rate == DESC_RATEMCS15){ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x05040302); } else if(rate == DESC_RATEMCS14){ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050302); } else if(rate == DESC_RATEMCS13){ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060502); } else{ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050402); } } else{ // Collision_State == 0 if(rate == DESC_RATEMCS15){ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000); ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060504); } else if(rate == DESC_RATEMCS14){ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000); ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605); } else if(rate == DESC_RATEMCS13){ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05020000); ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706); } else{ ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x04020000); ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605); } } } pRA_Table->PT_collision_pre = Collision_State; } VOID ODM_RateAdaptiveStateApInit( IN PVOID PADAPTER_VOID, IN PRT_WLAN_STA pEntry ) { PADAPTER Adapter = (PADAPTER)PADAPTER_VOID; pEntry->Ratr_State = DM_RATR_STA_INIT; } #endif //#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #if (DM_ODM_SUPPORT_TYPE == ODM_CE) u4Byte ODM_Get_Rate_Bitmap( IN PVOID pDM_VOID, IN u4Byte macid, IN u4Byte ra_mask, IN u1Byte rssi_level ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PSTA_INFO_T pEntry; u4Byte rate_bitmap = 0; u1Byte WirelessMode; //u1Byte WirelessMode =*(pDM_Odm->pWirelessMode); pEntry = pDM_Odm->pODM_StaInfo[macid]; if(!IS_STA_VALID(pEntry)) return ra_mask; WirelessMode = pEntry->wireless_mode; switch(WirelessMode) { case ODM_WM_B: if(ra_mask & 0x0000000c) //11M or 5.5M enable rate_bitmap = 0x0000000d; else rate_bitmap = 0x0000000f; break; case (ODM_WM_G): case (ODM_WM_A): if(rssi_level == DM_RATR_STA_HIGH) rate_bitmap = 0x00000f00; else rate_bitmap = 0x00000ff0; break; case (ODM_WM_B|ODM_WM_G): if(rssi_level == DM_RATR_STA_HIGH) rate_bitmap = 0x00000f00; else if(rssi_level == DM_RATR_STA_MIDDLE) rate_bitmap = 0x00000ff0; else rate_bitmap = 0x00000ff5; break; case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G) : case (ODM_WM_B|ODM_WM_N24G) : case (ODM_WM_G|ODM_WM_N24G) : case (ODM_WM_A|ODM_WM_N5G) : { if ( pDM_Odm->RFType == ODM_1T2R ||pDM_Odm->RFType == ODM_1T1R) { if(rssi_level == DM_RATR_STA_HIGH) { rate_bitmap = 0x000f0000; } else if(rssi_level == DM_RATR_STA_MIDDLE) { rate_bitmap = 0x000ff000; } else{ if (*(pDM_Odm->pBandWidth) == ODM_BW40M) rate_bitmap = 0x000ff015; else rate_bitmap = 0x000ff005; } } else { if(rssi_level == DM_RATR_STA_HIGH) { rate_bitmap = 0x0f8f0000; } else if(rssi_level == DM_RATR_STA_MIDDLE) { rate_bitmap = 0x0f8ff000; } else { if (*(pDM_Odm->pBandWidth) == ODM_BW40M) rate_bitmap = 0x0f8ff015; else rate_bitmap = 0x0f8ff005; } } } break; case (ODM_WM_AC|ODM_WM_G): if(rssi_level == 1) rate_bitmap = 0xfc3f0000; else if(rssi_level == 2) rate_bitmap = 0xfffff000; else rate_bitmap = 0xffffffff; break; case (ODM_WM_AC|ODM_WM_A): if (pDM_Odm->RFType == RF_1T1R) { if(rssi_level == 1) // add by Gary for ac-series rate_bitmap = 0x003f8000; else if (rssi_level == 2) rate_bitmap = 0x003ff000; else rate_bitmap = 0x003ff010; } else { if(rssi_level == 1) // add by Gary for ac-series rate_bitmap = 0xfe3f8000; // VHT 2SS MCS3~9 else if (rssi_level == 2) rate_bitmap = 0xfffff000; // VHT 2SS MCS0~9 else rate_bitmap = 0xfffff010; // All } break; default: if(pDM_Odm->RFType == RF_1T2R) rate_bitmap = 0x000fffff; else rate_bitmap = 0x0fffffff; break; } //printk("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n",__FUNCTION__,rssi_level,WirelessMode,rate_bitmap); ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n",rssi_level,WirelessMode,rate_bitmap)); return (ra_mask&rate_bitmap); } #endif //#if (DM_ODM_SUPPORT_TYPE == ODM_CE)rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_RaInfo.h000066400000000000000000000071671261122257400220250ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __PHYDMRAINFO_H__ #define __PHYDMRAINFO_H__ #define RAINFO_VERSION "1.0" #define AP_InitRateAdaptiveState ODM_RateAdaptiveStateApInit #define DM_RATR_STA_INIT 0 #define DM_RATR_STA_HIGH 1 #define DM_RATR_STA_MIDDLE 2 #define DM_RATR_STA_LOW 3 #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #define DM_RATR_STA_ULTRA_LOW 4 #endif #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) typedef struct _Rate_Adaptive_Table_{ u1Byte firstconnect; #if(DM_ODM_SUPPORT_TYPE==ODM_WIN) BOOLEAN PT_collision_pre; #endif }RA_T, *pRA_T; #endif typedef struct _ODM_RATE_ADAPTIVE { u1Byte Type; // DM_Type_ByFW/DM_Type_ByDriver u1Byte HighRSSIThresh; // if RSSI > HighRSSIThresh => RATRState is DM_RATR_STA_HIGH u1Byte LowRSSIThresh; // if RSSI <= LowRSSIThresh => RATRState is DM_RATR_STA_LOW u1Byte RATRState; // Current RSSI level, DM_RATR_STA_HIGH/DM_RATR_STA_MIDDLE/DM_RATR_STA_LOW #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) u1Byte LdpcThres; // if RSSI > LdpcThres => switch from LPDC to BCC BOOLEAN bLowerRtsRate; #endif #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) u1Byte RtsThres; #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) BOOLEAN bUseLdpc; #else u1Byte UltraLowRSSIThresh; u4Byte LastRATR; // RATR Register Content #endif } ODM_RATE_ADAPTIVE, *PODM_RATE_ADAPTIVE; VOID odm_RSSIMonitorInit( IN PVOID pDM_VOID ); VOID odm_RSSIMonitorCheck( IN PVOID pDM_VOID ); #if(DM_ODM_SUPPORT_TYPE==ODM_WIN) VOID odm_RSSIDumpToRegister( IN PVOID pDM_VOID ); #endif VOID odm_RSSIMonitorCheckMP( IN PVOID pDM_VOID ); VOID odm_RSSIMonitorCheckCE( IN PVOID pDM_VOID ); VOID odm_RSSIMonitorCheckAP( IN PVOID pDM_VOID ); VOID odm_RateAdaptiveMaskInit( IN PVOID pDM_VOID ); VOID odm_RefreshRateAdaptiveMask( IN PVOID pDM_VOID ); VOID odm_RefreshRateAdaptiveMaskMP( IN PVOID pDM_VOID ); VOID odm_RefreshRateAdaptiveMaskCE( IN PVOID pDM_VOID ); VOID odm_RefreshRateAdaptiveMaskAPADSL( IN PVOID pDM_VOID ); BOOLEAN ODM_RAStateCheck( IN PVOID pDM_VOID, IN s4Byte RSSI, IN BOOLEAN bForceUpdate, OUT pu1Byte pRATRState ); VOID odm_RefreshBasicRateMask( IN PVOID pDM_VOID ); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) VOID ODM_DynamicARFBSelect( IN PVOID pDM_VOID, IN u1Byte rate, IN BOOLEAN Collision_State ); VOID ODM_RateAdaptiveStateApInit( IN PVOID PADAPTER_VOID, IN PRT_WLAN_STA pEntry ); #endif #if (DM_ODM_SUPPORT_TYPE == ODM_CE) u4Byte ODM_Get_Rate_Bitmap( IN PVOID pDM_VOID, IN u4Byte macid, IN u4Byte ra_mask, IN u1Byte rssi_level ); #endif #endif //#ifndef __ODMRAINFO_H__ rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_RegDefine11AC.h000066400000000000000000000045241261122257400230370ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __ODM_REGDEFINE11AC_H__ #define __ODM_REGDEFINE11AC_H__ //2 RF REG LIST //2 BB REG LIST //PAGE 8 #define ODM_REG_CCK_RPT_FORMAT_11AC 0x804 #define ODM_REG_BB_RX_PATH_11AC 0x808 #define ODM_REG_BB_ATC_11AC 0x860 #define ODM_REG_DBG_RPT_11AC 0x8fc //PAGE 9 #define ODM_REG_OFDM_FA_RST_11AC 0x9A4 #define ODM_REG_NHM_TIMER_11AC 0x990 #define ODM_REG_NHM_TH9_TH10_11AC 0x994 #define ODM_REG_NHM_TH3_TO_TH0_11AC 0x998 #define ODM_REG_NHM_TH7_TO_TH4_11AC 0x99c #define ODM_REG_NHM_TH8_11AC 0x9a0 #define ODM_REG_NHM_9E8_11AC 0x9e8 //PAGE A #define ODM_REG_CCK_CCA_11AC 0xA0A #define ODM_REG_CCK_FA_RST_11AC 0xA2C #define ODM_REG_CCK_FA_11AC 0xA5C //PAGE B #define ODM_REG_RST_RPT_11AC 0xB58 //PAGE C #define ODM_REG_TRMUX_11AC 0xC08 #define ODM_REG_IGI_A_11AC 0xC50 //PAGE E #define ODM_REG_IGI_B_11AC 0xE50 #define ODM_REG_TRMUX_11AC_B 0xE08 //PAGE F #define ODM_REG_CCK_CCA_CNT_11AC 0xF08 #define ODM_REG_OFDM_FA_11AC 0xF48 #define ODM_REG_RPT_11AC 0xfa0 #define ODM_REG_NHM_CNT_11AC 0xfa8 //PAGE 18 #define ODM_REG_IGI_C_11AC 0x1850 //PAGE 1A #define ODM_REG_IGI_D_11AC 0x1A50 //2 MAC REG LIST #define ODM_REG_RESP_TX_11AC 0x6D8 //DIG Related #define ODM_BIT_IGI_11AC 0xFFFFFFFF #define ODM_BIT_CCK_RPT_FORMAT_11AC BIT16 #define ODM_BIT_BB_RX_PATH_11AC 0xF #define ODM_BIT_BB_ATC_11AC BIT14 #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_RegDefine11N.h000066400000000000000000000150141261122257400227450ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __ODM_REGDEFINE11N_H__ #define __ODM_REGDEFINE11N_H__ //2 RF REG LIST #define ODM_REG_RF_MODE_11N 0x00 #define ODM_REG_RF_0B_11N 0x0B #define ODM_REG_CHNBW_11N 0x18 #define ODM_REG_T_METER_11N 0x24 #define ODM_REG_RF_25_11N 0x25 #define ODM_REG_RF_26_11N 0x26 #define ODM_REG_RF_27_11N 0x27 #define ODM_REG_RF_2B_11N 0x2B #define ODM_REG_RF_2C_11N 0x2C #define ODM_REG_RXRF_A3_11N 0x3C #define ODM_REG_T_METER_92D_11N 0x42 #define ODM_REG_T_METER_88E_11N 0x42 //2 BB REG LIST //PAGE 8 #define ODM_REG_BB_CTRL_11N 0x800 #define ODM_REG_RF_PIN_11N 0x804 #define ODM_REG_PSD_CTRL_11N 0x808 #define ODM_REG_TX_ANT_CTRL_11N 0x80C #define ODM_REG_BB_PWR_SAV5_11N 0x818 #define ODM_REG_CCK_RPT_FORMAT_11N 0x824 #define ODM_REG_CCK_RPT_FORMAT_11N_B 0x82C #define ODM_REG_RX_DEFUALT_A_11N 0x858 #define ODM_REG_RX_DEFUALT_B_11N 0x85A #define ODM_REG_BB_PWR_SAV3_11N 0x85C #define ODM_REG_ANTSEL_CTRL_11N 0x860 #define ODM_REG_RX_ANT_CTRL_11N 0x864 #define ODM_REG_PIN_CTRL_11N 0x870 #define ODM_REG_BB_PWR_SAV1_11N 0x874 #define ODM_REG_ANTSEL_PATH_11N 0x878 #define ODM_REG_BB_3WIRE_11N 0x88C #define ODM_REG_SC_CNT_11N 0x8C4 #define ODM_REG_PSD_DATA_11N 0x8B4 #define ODM_REG_PSD_DATA_11N 0x8B4 #define ODM_REG_NHM_TIMER_11N 0x894 #define ODM_REG_NHM_TH9_TH10_11N 0x890 #define ODM_REG_NHM_TH3_TO_TH0_11N 0x898 #define ODM_REG_NHM_TH7_TO_TH4_11N 0x89c #define ODM_REG_NHM_CNT_11N 0x8d8 //PAGE 9 #define ODM_REG_DBG_RPT_11N 0x908 #define ODM_REG_ANT_MAPPING1_11N 0x914 #define ODM_REG_ANT_MAPPING2_11N 0x918 //PAGE A #define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00 #define ODM_REG_CCK_CCA_11N 0xA0A #define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C #define ODM_REG_CCK_ANTDIV_PARA3_11N 0xA10 #define ODM_REG_CCK_ANTDIV_PARA4_11N 0xA14 #define ODM_REG_CCK_FILTER_PARA1_11N 0xA22 #define ODM_REG_CCK_FILTER_PARA2_11N 0xA23 #define ODM_REG_CCK_FILTER_PARA3_11N 0xA24 #define ODM_REG_CCK_FILTER_PARA4_11N 0xA25 #define ODM_REG_CCK_FILTER_PARA5_11N 0xA26 #define ODM_REG_CCK_FILTER_PARA6_11N 0xA27 #define ODM_REG_CCK_FILTER_PARA7_11N 0xA28 #define ODM_REG_CCK_FILTER_PARA8_11N 0xA29 #define ODM_REG_CCK_FA_RST_11N 0xA2C #define ODM_REG_CCK_FA_MSB_11N 0xA58 #define ODM_REG_CCK_FA_LSB_11N 0xA5C #define ODM_REG_CCK_CCA_CNT_11N 0xA60 #define ODM_REG_BB_PWR_SAV4_11N 0xA74 //PAGE B #define ODM_REG_LNA_SWITCH_11N 0xB2C #define ODM_REG_PATH_SWITCH_11N 0xB30 #define ODM_REG_RSSI_CTRL_11N 0xB38 #define ODM_REG_CONFIG_ANTA_11N 0xB68 #define ODM_REG_RSSI_BT_11N 0xB9C //PAGE C #define ODM_REG_OFDM_FA_HOLDC_11N 0xC00 #define ODM_REG_BB_RX_PATH_11N 0xC04 #define ODM_REG_TRMUX_11N 0xC08 #define ODM_REG_OFDM_FA_RSTC_11N 0xC0C #define ODM_REG_RXIQI_MATRIX_11N 0xC14 #define ODM_REG_TXIQK_MATRIX_LSB1_11N 0xC4C #define ODM_REG_IGI_A_11N 0xC50 #define ODM_REG_ANTDIV_PARA2_11N 0xC54 #define ODM_REG_IGI_B_11N 0xC58 #define ODM_REG_ANTDIV_PARA3_11N 0xC5C #define ODM_REG_L1SBD_PD_CH_11N 0XC6C #define ODM_REG_BB_PWR_SAV2_11N 0xC70 #define ODM_REG_RX_OFF_11N 0xC7C #define ODM_REG_TXIQK_MATRIXA_11N 0xC80 #define ODM_REG_TXIQK_MATRIXB_11N 0xC88 #define ODM_REG_TXIQK_MATRIXA_LSB2_11N 0xC94 #define ODM_REG_TXIQK_MATRIXB_LSB2_11N 0xC9C #define ODM_REG_RXIQK_MATRIX_LSB_11N 0xCA0 #define ODM_REG_ANTDIV_PARA1_11N 0xCA4 #define ODM_REG_OFDM_FA_TYPE1_11N 0xCF0 //PAGE D #define ODM_REG_OFDM_FA_RSTD_11N 0xD00 #define ODM_REG_BB_ATC_11N 0xD2C #define ODM_REG_OFDM_FA_TYPE2_11N 0xDA0 #define ODM_REG_OFDM_FA_TYPE3_11N 0xDA4 #define ODM_REG_OFDM_FA_TYPE4_11N 0xDA8 #define ODM_REG_RPT_11N 0xDF4 //PAGE E #define ODM_REG_TXAGC_A_6_18_11N 0xE00 #define ODM_REG_TXAGC_A_24_54_11N 0xE04 #define ODM_REG_TXAGC_A_1_MCS32_11N 0xE08 #define ODM_REG_TXAGC_A_MCS0_3_11N 0xE10 #define ODM_REG_TXAGC_A_MCS4_7_11N 0xE14 #define ODM_REG_TXAGC_A_MCS8_11_11N 0xE18 #define ODM_REG_TXAGC_A_MCS12_15_11N 0xE1C #define ODM_REG_FPGA0_IQK_11N 0xE28 #define ODM_REG_TXIQK_TONE_A_11N 0xE30 #define ODM_REG_RXIQK_TONE_A_11N 0xE34 #define ODM_REG_TXIQK_PI_A_11N 0xE38 #define ODM_REG_RXIQK_PI_A_11N 0xE3C #define ODM_REG_TXIQK_11N 0xE40 #define ODM_REG_RXIQK_11N 0xE44 #define ODM_REG_IQK_AGC_PTS_11N 0xE48 #define ODM_REG_IQK_AGC_RSP_11N 0xE4C #define ODM_REG_BLUETOOTH_11N 0xE6C #define ODM_REG_RX_WAIT_CCA_11N 0xE70 #define ODM_REG_TX_CCK_RFON_11N 0xE74 #define ODM_REG_TX_CCK_BBON_11N 0xE78 #define ODM_REG_OFDM_RFON_11N 0xE7C #define ODM_REG_OFDM_BBON_11N 0xE80 #define ODM_REG_TX2RX_11N 0xE84 #define ODM_REG_TX2TX_11N 0xE88 #define ODM_REG_RX_CCK_11N 0xE8C #define ODM_REG_RX_OFDM_11N 0xED0 #define ODM_REG_RX_WAIT_RIFS_11N 0xED4 #define ODM_REG_RX2RX_11N 0xED8 #define ODM_REG_STANDBY_11N 0xEDC #define ODM_REG_SLEEP_11N 0xEE0 #define ODM_REG_PMPD_ANAEN_11N 0xEEC #define ODM_REG_IGI_C_11N 0xF84 #define ODM_REG_IGI_D_11N 0xF88 //2 MAC REG LIST #define ODM_REG_BB_RST_11N 0x02 #define ODM_REG_ANTSEL_PIN_11N 0x4C #define ODM_REG_EARLY_MODE_11N 0x4D0 #define ODM_REG_RSSI_MONITOR_11N 0x4FE #define ODM_REG_EDCA_VO_11N 0x500 #define ODM_REG_EDCA_VI_11N 0x504 #define ODM_REG_EDCA_BE_11N 0x508 #define ODM_REG_EDCA_BK_11N 0x50C #define ODM_REG_TXPAUSE_11N 0x522 #define ODM_REG_RESP_TX_11N 0x6D8 #define ODM_REG_ANT_TRAIN_PARA1_11N 0x7b0 #define ODM_REG_ANT_TRAIN_PARA2_11N 0x7b4 //DIG Related #define ODM_BIT_IGI_11N 0x0000007F #define ODM_BIT_CCK_RPT_FORMAT_11N BIT9 #define ODM_BIT_BB_RX_PATH_11N 0xF #define ODM_BIT_BB_ATC_11N BIT11 #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_debug.c000066400000000000000000000614231261122257400217230ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // include files //============================================================ #include "Mp_Precomp.h" #include "phydm_precomp.h" VOID PHYDM_InitDebugSetting( IN PDM_ODM_T pDM_Odm ) { pDM_Odm->DebugLevel = ODM_DBG_TRACE; pDM_Odm->DebugComponents = \ #if DBG //BB Functions // ODM_COMP_DIG | // ODM_COMP_RA_MASK | // ODM_COMP_DYNAMIC_TXPWR | // ODM_COMP_FA_CNT | // ODM_COMP_RSSI_MONITOR | // ODM_COMP_CCK_PD | // ODM_COMP_ANT_DIV | // ODM_COMP_PWR_SAVE | // ODM_COMP_PWR_TRAIN | // ODM_COMP_RATE_ADAPTIVE | // ODM_COMP_PATH_DIV | // ODM_COMP_DYNAMIC_PRICCA | // ODM_COMP_RXHP | // ODM_COMP_MP | // ODM_COMP_CFO_TRACKING | // ODM_COMP_ACS | // PHYDM_COMP_ADAPTIVITY | //MAC Functions // ODM_COMP_EDCA_TURBO | // ODM_COMP_EARLY_MODE | //RF Functions // ODM_COMP_TX_PWR_TRACK | // ODM_COMP_RX_GAIN_TRACK | // ODM_COMP_CALIBRATION | //Common // ODM_COMP_COMMON | // ODM_COMP_INIT | // ODM_COMP_PSD | #endif 0; } #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) static u1Byte BbDbgBuf[BB_TMP_BUF_SIZE]; VOID phydm_BB_Debug_Info(IN PDM_ODM_T pDM_Odm) { u1Byte RX_HT_BW, RX_VHT_BW, RXSC, RX_HT, RX_BW; static u1Byte vRX_BW ; u4Byte value32, value32_1, value32_2, value32_3; s4Byte SFO_A, SFO_B, SFO_C, SFO_D; s4Byte LFO_A, LFO_B, LFO_C, LFO_D; static u1Byte MCSS,Tail,Parity,rsv,vrsv,idx,smooth,htsound,agg,stbc,vstbc,fec,fecext,sgi,sgiext,htltf,vgid,vNsts,vtxops,vrsv2,vbrsv,bf,vbcrc; static u2Byte HLength,htcrc8,Length; static u2Byte vpaid; static u2Byte vLength,vhtcrc8,vMCSS,vTail,vbTail; static u1Byte HMCSS,HRX_BW; u1Byte pwDB; s1Byte RXEVM_0, RXEVM_1, RXEVM_2 ; u1Byte RF_gain_pathA, RF_gain_pathB, RF_gain_pathC, RF_gain_pathD; u1Byte RX_SNR_pathA, RX_SNR_pathB, RX_SNR_pathC, RX_SNR_pathD; s4Byte sig_power; const char *RXHT_table[] = {"legacy", "HT", "VHT"}; const char *BW_table[] = {"20M", "40M", "80M"}; const char *RXSC_table[] = {"duplicate/full bw", "usc20-1", "lsc20-1", "usc20-2", "lsc20-2", "usc40", "lsc40"}; const char *L_rate[]={"6M","9M","12M","18M","24M","36M","48M","54M"}; /* const double evm_comp_20M = 0.579919469776867; //10*log10(64.0/56.0) const double evm_comp_40M = 0.503051183113957; //10*log10(128.0/114.0) const double evm_comp_80M = 0.244245993314183; //10*log10(256.0/242.0) const double evm_comp_160M = 0.244245993314183; //10*log10(512.0/484.0) */ if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) return; rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s \n", "BB Report Info"); DCMD_Printf(BbDbgBuf); //BW & Mode Detection /////////////////////////////////////////////////////// value32 = ODM_GetBBReg(pDM_Odm, 0xf80 ,bMaskDWord); value32_2 =value32; RX_HT_BW = (u1Byte)(value32&0x1) ; RX_VHT_BW = (u1Byte)((value32>>1)&0x3); RXSC = (u1Byte)(value32&0x78); value32_1= (value32&0x180)>>7; RX_HT = (u1Byte)(value32_1); /* rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "F80", value32_2); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_HT_BW", RX_HT_BW); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_VHT_BW", RX_VHT_BW); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_SC", RXSC); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_HT", RX_HT); DCMD_Printf(BbDbgBuf); */ //rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n RX_HT:%s ", RXHT_table[RX_HT]); //DCMD_Printf(BbDbgBuf); RX_BW = 0; if(RX_HT == 2) { rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Mode: VHT Mode"); DCMD_Printf(BbDbgBuf); if(RX_VHT_BW==0) { rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, " BW=20M"); DCMD_Printf(BbDbgBuf); } else if(RX_VHT_BW==1) { rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, " BW=40M"); DCMD_Printf(BbDbgBuf); } else { rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, " BW=80M"); DCMD_Printf(BbDbgBuf); } RX_BW = RX_VHT_BW; } else if(RX_HT == 1) { rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Mode: HT Mode"); DCMD_Printf(BbDbgBuf); if(RX_HT_BW==0) { rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, " BW=20M"); DCMD_Printf(BbDbgBuf); } else if(RX_HT_BW==1) { rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, " BW=40M"); DCMD_Printf(BbDbgBuf); } RX_BW = RX_HT_BW; } else { rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Mode: Legeacy Mode"); DCMD_Printf(BbDbgBuf); } if(RX_HT !=0) { if(RXSC==0) rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n duplicate/full bw"); else if(RXSC==1) rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n usc20-1"); else if(RXSC==2) rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n lsc20-1"); else if(RXSC==3) rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n usc20-2"); else if(RXSC==4) rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n lsc20-2"); else if(RXSC==9) rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n usc40"); else if(RXSC==10) rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n lsc40"); DCMD_Printf(BbDbgBuf); } /* if(RX_HT == 2){ rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, " BW:%s", BW_table[RX_VHT_BW]); RX_BW = RX_VHT_BW; } else if(RX_HT == 1){ rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, " BW:%s", BW_table[RX_HT_BW]); RX_BW = RX_HT_BW; } else rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, ""); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, " RXSC:%s", RXSC_table[RXSC]); DCMD_Printf(BbDbgBuf); */ /////////////////////////////////////////////////////// // rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "dB Conversion: 10log(65)", ODM_PWdB_Conversion(65,10,0)); // DCMD_Printf(BbDbgBuf); // RX signal power and AGC related info /////////////////////////////////////////////////////// value32 = ODM_GetBBReg(pDM_Odm, 0xF90 ,bMaskDWord); pwDB = (u1Byte) ((value32 & bMaskByte1) >> 8); pwDB=pwDB>>1; sig_power = -110+pwDB; rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "OFDM RX Signal Power(dB)", sig_power); DCMD_Printf(BbDbgBuf); value32 = ODM_GetBBReg(pDM_Odm, 0xd14 ,bMaskDWord); RX_SNR_pathA = (u1Byte)(value32&0xFF)>>1; RF_gain_pathA = (s1Byte) ((value32 & bMaskByte1) >> 8); RF_gain_pathA *=2; value32 = ODM_GetBBReg(pDM_Odm, 0xd54 ,bMaskDWord); RX_SNR_pathB = (u1Byte)(value32&0xFF)>>1; RF_gain_pathB = (s1Byte) ((value32 & bMaskByte1) >> 8); RF_gain_pathB *=2; value32 = ODM_GetBBReg(pDM_Odm, 0xd94 ,bMaskDWord); RX_SNR_pathC = (u1Byte)(value32&0xFF)>>1; RF_gain_pathC = (s1Byte) ((value32 & bMaskByte1) >> 8); RF_gain_pathC *=2; value32 = ODM_GetBBReg(pDM_Odm, 0xdd4 ,bMaskDWord); RX_SNR_pathD = (u1Byte)(value32&0xFF)>>1; RF_gain_pathD = (s1Byte) ((value32 & bMaskByte1) >> 8); RF_gain_pathD *=2; rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)", RF_gain_pathA, RF_gain_pathA, RF_gain_pathC, RF_gain_pathD); DCMD_Printf(BbDbgBuf); /////////////////////////////////////////////////////// // RX Counter related info /////////////////////////////////////////////////////// value32 = ODM_GetBBReg(pDM_Odm, 0xF08 ,bMaskDWord); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "OFDM CCA Counter", ((value32&0xFFFF0000)>>16)); DCMD_Printf(BbDbgBuf); value32 = ODM_GetBBReg(pDM_Odm, 0xFD0 ,bMaskDWord); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "OFDM SBD Fail Counter", value32&0xFFFF); DCMD_Printf(BbDbgBuf); value32 = ODM_GetBBReg(pDM_Odm, 0xFC4 ,bMaskDWord); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail Counter", value32&0xFFFF, ((value32&0xFFFF0000)>>16)); DCMD_Printf(BbDbgBuf); value32 = ODM_GetBBReg(pDM_Odm, 0xFCC ,bMaskDWord); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "CCK CCA Counter", value32&0xFFFF); DCMD_Printf(BbDbgBuf); value32 = ODM_GetBBReg(pDM_Odm, 0xFBC ,bMaskDWord); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "LSIG (\"Parity Fail\"/\"Rate Illegal\") Counter", value32&0xFFFF, ((value32&0xFFFF0000)>>16)); DCMD_Printf(BbDbgBuf); value32_1 = ODM_GetBBReg(pDM_Odm, 0xFC8 ,bMaskDWord); value32_2 = ODM_GetBBReg(pDM_Odm, 0xFC0 ,bMaskDWord); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT counter", ((value32_2&0xFFFF0000)>>16), value32_1&0xFFFF); DCMD_Printf(BbDbgBuf); /////////////////////////////////////////////////////// // PostFFT related info /////////////////////////////////////////////////////// value32 = ODM_GetBBReg(pDM_Odm, 0xF8c ,bMaskDWord); RXEVM_0 = (s1Byte) ((value32 & bMaskByte2) >> 16); RXEVM_0 /=2; if(RXEVM_0 < -63) RXEVM_0=0; DCMD_Printf(BbDbgBuf); RXEVM_1 = (s1Byte) ((value32 & bMaskByte3) >> 24); RXEVM_1 /=2; value32 = ODM_GetBBReg(pDM_Odm, 0xF88 ,bMaskDWord); RXEVM_2 = (s1Byte) ((value32 & bMaskByte2) >> 16); RXEVM_2 /=2; if(RXEVM_1 < -63) RXEVM_1=0; if(RXEVM_2 < -63) RXEVM_2=0; /* if(RX_BW == 0){ RXEVM_0 -= evm_comp_20M; RXEVM_1 -= evm_comp_20M; RXEVM_2 -= evm_comp_20M; } else if(RX_BW == 1){ RXEVM_0 -= evm_comp_40M; RXEVM_1 -= evm_comp_40M; RXEVM_2 -= evm_comp_40M; } else if (RX_BW == 2){ RXEVM_0 -= evm_comp_80M; RXEVM_1 -= evm_comp_80M; RXEVM_2 -= evm_comp_80M; } */ rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d", "RXEVM (1ss/2ss/3ss)", RXEVM_0, RXEVM_1, RXEVM_2); DCMD_Printf(BbDbgBuf); // value32 = ODM_GetBBReg(pDM_Odm, 0xD14 ,bMaskDWord); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)", RX_SNR_pathA, RX_SNR_pathB, RX_SNR_pathC, RX_SNR_pathD); DCMD_Printf(BbDbgBuf); // rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "B_RXSNR", (value32&0xFF00)>>9); // DCMD_Printf(BbDbgBuf); value32 = ODM_GetBBReg(pDM_Odm, 0xF8C ,bMaskDWord); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "CSI_1st /CSI_2nd", value32&0xFFFF, ((value32&0xFFFF0000)>>16)); DCMD_Printf(BbDbgBuf); /////////////////////////////////////////////////////// //BW & Mode Detection //Reset Page F Counter ODM_SetBBReg(pDM_Odm, 0xB58 ,BIT0, 1); ODM_SetBBReg(pDM_Odm, 0xB58 ,BIT0, 0); //CFO Report Info //Short CFO value32 = ODM_GetBBReg(pDM_Odm, 0xd0c ,bMaskDWord); value32_1 = ODM_GetBBReg(pDM_Odm, 0xd4c ,bMaskDWord); value32_2 = ODM_GetBBReg(pDM_Odm, 0xd8c ,bMaskDWord); value32_3 = ODM_GetBBReg(pDM_Odm, 0xdcc ,bMaskDWord); SFO_A=(s4Byte)(value32&bMask12Bits); SFO_B=(s4Byte)(value32_1&bMask12Bits); SFO_C=(s4Byte)(value32_2&bMask12Bits); SFO_D=(s4Byte)(value32_3&bMask12Bits); LFO_A=(s4Byte)(value32>>16); LFO_B=(s4Byte)(value32_1>>16); LFO_C=(s4Byte)(value32_2>>16); LFO_D=(s4Byte)(value32_3>>16); //SFO 2's to dec if(SFO_A >2047) { SFO_A=SFO_A-4096; } SFO_A=(SFO_A*312500)/2048; if(SFO_B >2047) { SFO_B=SFO_B-4096; } SFO_B=(SFO_B*312500)/2048; if(SFO_C >2047) { SFO_C=SFO_C-4096; } SFO_C=(SFO_C*312500)/2048; if(SFO_D >2047) { SFO_D=SFO_D-4096; } SFO_D=(SFO_D*312500)/2048; //LFO 2's to dec if(LFO_A >4095) { LFO_A=LFO_A-8192; } if(LFO_B >4095) { LFO_B=LFO_B-8192; } if(LFO_C>4095) { LFO_C=LFO_C-8192; } if(LFO_D >4095) { LFO_D=LFO_D-8192; } LFO_A=LFO_A*312500/4096; LFO_B=LFO_B*312500/4096; LFO_C=LFO_C*312500/4096; LFO_D=LFO_D*312500/4096; rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "CFO Report Info"); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " Short CFO(Hz) ", SFO_A,SFO_B,SFO_C,SFO_D); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " Long CFO(Hz) ", LFO_A,LFO_B,LFO_C,LFO_D); DCMD_Printf(BbDbgBuf); //SCFO value32 = ODM_GetBBReg(pDM_Odm, 0xd10 ,bMaskDWord); value32_1 = ODM_GetBBReg(pDM_Odm, 0xd50 ,bMaskDWord); value32_2 = ODM_GetBBReg(pDM_Odm, 0xd90 ,bMaskDWord); value32_3 = ODM_GetBBReg(pDM_Odm, 0xdd0 ,bMaskDWord); SFO_A=(s4Byte)(value32&0x7ff); SFO_B=(s4Byte)(value32_1&0x7ff); SFO_C=(s4Byte)(value32_2&0x7ff); SFO_D=(s4Byte)(value32_3&0x7ff); if(SFO_A >1023) { SFO_A=SFO_A-2048; } if(SFO_B >2047) { SFO_B=SFO_B-4096; } if(SFO_C >2047) { SFO_C=SFO_C-4096; } if(SFO_D >2047) { SFO_D=SFO_D-4096; } SFO_A=SFO_A*312500/1024; SFO_B=SFO_B*312500/1024; SFO_C=SFO_C*312500/1024; SFO_D=SFO_D*312500/1024; LFO_A=(s4Byte)(value32>>16); LFO_B=(s4Byte)(value32_1>>16); LFO_C=(s4Byte)(value32_2>>16); LFO_D=(s4Byte)(value32_3>>16); if(LFO_A >4095) { LFO_A=LFO_A-8192; } if(LFO_B >4095) { LFO_B=LFO_B-8192; } if(LFO_C>4095) { LFO_C=LFO_C-8192; } if(LFO_D >4095) { LFO_D=LFO_D-8192; } LFO_A=LFO_A*312500/4096; LFO_B=LFO_B*312500/4096; LFO_C=LFO_C*312500/4096; LFO_D=LFO_D*312500/4096; rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " Value SCFO(Hz) ", SFO_A,SFO_B,SFO_C,SFO_D); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " ACQ CFO(Hz) ", LFO_A,LFO_B,LFO_C,LFO_D); DCMD_Printf(BbDbgBuf); value32 = ODM_GetBBReg(pDM_Odm, 0xd14 ,bMaskDWord); value32_1 = ODM_GetBBReg(pDM_Odm, 0xd54 ,bMaskDWord); value32_2 = ODM_GetBBReg(pDM_Odm, 0xd94 ,bMaskDWord); value32_3 = ODM_GetBBReg(pDM_Odm, 0xdd4 ,bMaskDWord); LFO_A=(s4Byte)(value32>>16); LFO_B=(s4Byte)(value32_1>>16); LFO_C=(s4Byte)(value32_2>>16); LFO_D=(s4Byte)(value32_3>>16); if(LFO_A >4095) { LFO_A=LFO_A-8192; } if(LFO_B >4095) { LFO_B=LFO_B-8192; } if(LFO_C>4095) { LFO_C=LFO_C-8192; } if(LFO_D >4095) { LFO_D=LFO_D-8192; } LFO_A=LFO_A*312500/4096; LFO_B=LFO_B*312500/4096; LFO_C=LFO_C*312500/4096; LFO_D=LFO_D*312500/4096; rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " End CFO(Hz) ", LFO_A,LFO_B,LFO_C,LFO_D); DCMD_Printf(BbDbgBuf); value32 = ODM_GetBBReg(pDM_Odm, 0xf20 ,bMaskDWord); //L SIG Tail=(u1Byte)((value32&0xfc0000)>>16); Parity = (u1Byte)((value32&0x20000)>>16); Length =(u2Byte)((value32&0x1ffe00)>>8); rsv = (u1Byte)(value32&0x10); MCSS=(u1Byte)(value32&0x0f); switch(MCSS) { case 0x0b: idx=0; break; case 0x0f: idx=1; break; case 0x0a: idx=2; break; case 0x0e: idx=3; break; case 0x09: idx=4; break; case 0x08: idx=5; break; case 0x0c: idx=6; break; default: idx=6; break; } rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "L-SIG"); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Rate:%s", L_rate[idx]); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x/ %x /%x", " Rsv/Length/Parity",rsv,RX_BW,Length); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "HT-SIG1"); DCMD_Printf(BbDbgBuf); value32 = ODM_GetBBReg(pDM_Odm, 0xf2c ,bMaskDWord); //HT SIG if(RX_HT == 1) { HMCSS=(u1Byte)(value32&0x7F); HRX_BW = (u1Byte)(value32&0x80); HLength =(u2Byte)((value32>>8)&0xffff); } rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x", " MCS/BW/Length",HMCSS,HRX_BW,HLength); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "HT-SIG2"); DCMD_Printf(BbDbgBuf); value32 = ODM_GetBBReg(pDM_Odm, 0xf30 ,bMaskDWord); //HT SIG if(RX_HT == 1) { smooth = (u1Byte)(value32&0x01); htsound = (u1Byte)(value32&0x02); rsv=(u1Byte)(value32&0x04); agg =(u1Byte)(value32&0x08); stbc =(u1Byte)(value32&0x30); fec=(u1Byte)(value32&0x40); sgi=(u1Byte)(value32&0x80); htltf=(u1Byte)((value32&0x300)>>8); htcrc8=(u2Byte)((value32&0x3fc00)>>8); Tail=(u1Byte)((value32&0xfc0000)>>16); } rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/ %x/ %x", " Smooth/NoSound/Rsv/Aggregate/STBC/LDPC",smooth,htsound,rsv,agg,stbc,fec); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x", " SGI/E-HT-LTFs/CRC/Tail",sgi,htltf,htcrc8,Tail); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "VHT-SIG-A1"); DCMD_Printf(BbDbgBuf); value32 = ODM_GetBBReg(pDM_Odm, 0xf2c ,bMaskDWord); //VHT SIG A1 if(RX_HT == 2) { //value32 = ODM_GetBBReg(pDM_Odm, 0xf2c ,bMaskDWord); //VHT SIG A1 vRX_BW=(u1Byte)(value32&0x03); vrsv=(u1Byte)(value32&0x04); vstbc =(u1Byte)(value32&0x08); vgid = (u1Byte)((value32&0x3f0)>>4); vNsts = (u1Byte)(((value32&0x1c00)>>8)+1); vpaid = (u2Byte)(value32&0x3fe); vtxops =(u1Byte)((value32&0x400000)>>20); vrsv2 = (u1Byte)((value32&0x800000)>>20); } //rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x", "F2C", value32); //DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/ %x/ %x /%x /%x", " BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2",vRX_BW,vrsv,vstbc,vgid,vNsts,vpaid,vtxops,vrsv2); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "VHT-SIG-A2"); DCMD_Printf(BbDbgBuf); value32 = ODM_GetBBReg(pDM_Odm, 0xf30 ,bMaskDWord); //VHT SIG if(RX_HT == 2) { //value32 = ODM_GetBBReg(pDM_Odm, 0xf30 ,bMaskDWord); //VHT SIG //sgi=(u1Byte)(value32&0x01); sgiext =(u1Byte)(value32&0x03); //fec = (u1Byte)(value32&0x04); fecext = (u1Byte)(value32&0x0C); vMCSS =(u1Byte)(value32&0xf0); bf = (u1Byte)((value32&0x100)>>8); vrsv =(u1Byte)((value32&0x200)>>8); vhtcrc8=(u2Byte)((value32&0x3fc00)>>8); vTail=(u1Byte)((value32&0xfc0000)>>16); } //rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x", "F30", value32); //DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/ %x/ %x/ %x", " SGI/FEC/MCS/BF/Rsv/CRC/Tail",sgiext,fecext,vMCSS,bf,vrsv,vhtcrc8,vTail); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "VHT-SIG-B"); DCMD_Printf(BbDbgBuf); value32 = ODM_GetBBReg(pDM_Odm, 0xf34 ,bMaskDWord); //VHT SIG { vLength=(u2Byte)(value32&0x1fffff); vbrsv = (u1Byte)((value32&0x600000)>>20); vbTail =(u2Byte)((value32&0x1f800000)>>20); vbcrc = (u1Byte)((value32&0x80000000)>>28); } //rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x", "F34", value32); //DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/", " Length/Rsv/Tail/CRC",vLength,vbrsv,vbTail,vbcrc); DCMD_Printf(BbDbgBuf); } VOID phydm_BasicProfile( IN PVOID pDM_VOID ) { PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PADAPTER Adapter = pDM_Odm->Adapter; char* Cut = NULL; char* ICType = NULL; rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n%-35s", "% Basic Profile %"); DCMD_Printf(BbDbgBuf); if(pDM_Odm->SupportICType == ODM_RTL8192C) ICType = "RTL8192C"; else if(pDM_Odm->SupportICType == ODM_RTL8192D) ICType = "RTL8192D"; else if(pDM_Odm->SupportICType == ODM_RTL8723A) ICType = "RTL8723A"; else if(pDM_Odm->SupportICType == ODM_RTL8188E) ICType = "RTL8188E"; else if(pDM_Odm->SupportICType == ODM_RTL8812) ICType = "RTL8812A"; else if(pDM_Odm->SupportICType == ODM_RTL8821) ICType = "RTL8821A"; else if(pDM_Odm->SupportICType == ODM_RTL8192E) ICType = "RTL8192E"; else if(pDM_Odm->SupportICType == ODM_RTL8723B) ICType = "RTL8723B"; else if(pDM_Odm->SupportICType == ODM_RTL8814A) ICType = "RTL8814A"; else if(pDM_Odm->SupportICType == ODM_RTL8881A) ICType = "RTL8881A"; else if(pDM_Odm->SupportICType == ODM_RTL8821B) ICType = "RTL8821B"; else if(pDM_Odm->SupportICType == ODM_RTL8822B) ICType = "RTL8822B"; else if(pDM_Odm->SupportICType == ODM_RTL8703B) ICType = "RTL8703B"; else if(pDM_Odm->SupportICType == ODM_RTL8195A) ICType = "RTL8195A"; else if(pDM_Odm->SupportICType == ODM_RTL8188F) ICType = "RTL8188F"; rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s (MP Chip: %s)","IC Type", ICType, pDM_Odm->bIsMPChip?"Yes":"No"); DCMD_Printf(BbDbgBuf); if(pDM_Odm->CutVersion==ODM_CUT_A) Cut = "A"; else if(pDM_Odm->CutVersion==ODM_CUT_B) Cut = "B"; else if(pDM_Odm->CutVersion==ODM_CUT_C) Cut = "C"; else if(pDM_Odm->CutVersion==ODM_CUT_D) Cut = "D"; else if(pDM_Odm->CutVersion==ODM_CUT_E) Cut = "E"; else if(pDM_Odm->CutVersion==ODM_CUT_F) Cut = "F"; else if(pDM_Odm->CutVersion==ODM_CUT_I) Cut = "I"; rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","Cut Version", Cut); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %d","PHY Parameter Version", ODM_GetHWImgVersion(pDM_Odm)); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %d (Subversion: %d)","FW Version", Adapter->MgntInfo.FirmwareVersion, Adapter->MgntInfo.FirmwareSubVersion); DCMD_Printf(BbDbgBuf); //1 PHY DM Version List rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n%-35s","% PHYDM Version %"); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","Adaptivity", ADAPTIVITY_VERSION); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","DIG", DIG_VERSION); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","Dynamic BB PowerSaving", DYNAMIC_BBPWRSAV_VERSION); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","CFO Tracking", CFO_TRACKING_VERSION); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","Antenna Diversity", ANTDIV_VERSION); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","Power Tracking", POWRTRACKING_VERSION); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","Dynamic TxPower", DYNAMIC_TXPWR_VERSION); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","RA Info", RAINFO_VERSION); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","Antenna Detection", ANTDECT_VERSION); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","Auto Channel Selection", ACS_VERSION); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","EDCA Turbo", EDCATURBO_VERSION); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","Path Diversity", PATHDIV_VERSION); DCMD_Printf(BbDbgBuf); rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","RxHP", RXHP_VERSION); DCMD_Printf(BbDbgBuf); } #endif VOID phydm_BasicDbgMessage ( IN PVOID pDM_VOID ) { #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PhyDM_FalseAlmCnt); pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_BasicDbgMsg==>\n")); ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bLinked = %d, RSSI_Min = %d, CurrentIGI = 0x%x \n", pDM_Odm->bLinked, pDM_Odm->RSSI_Min, pDM_DigTable->CurIGValue) ); ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("Cnt_Cck_fail = %d, Cnt_Ofdm_fail = %d, Total False Alarm = %d\n", FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_all)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("RxRate = 0x%x, RSSI_A = %d, RSSI_B = %d\n", pDM_Odm->RxRate, pDM_Odm->RSSI_A, pDM_Odm->RSSI_B)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_C = %d, RSSI_D = %d\n", pDM_Odm->RSSI_C, pDM_Odm->RSSI_D)); #endif } rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_debug.h000066400000000000000000000153451261122257400217320ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __ODM_DBG_H__ #define __ODM_DBG_H__ //----------------------------------------------------------------------------- // Define the debug levels // // 1. DBG_TRACE and DBG_LOUD are used for normal cases. // So that, they can help SW engineer to develope or trace states changed // and also help HW enginner to trace every operation to and from HW, // e.g IO, Tx, Rx. // // 2. DBG_WARNNING and DBG_SERIOUS are used for unusual or error cases, // which help us to debug SW or HW. // //----------------------------------------------------------------------------- // // Never used in a call to ODM_RT_TRACE()! // #define ODM_DBG_OFF 1 // // Fatal bug. // For example, Tx/Rx/IO locked up, OS hangs, memory access violation, // resource allocation failed, unexpected HW behavior, HW BUG and so on. // #define ODM_DBG_SERIOUS 2 // // Abnormal, rare, or unexpeted cases. // For example, IRP/Packet/OID canceled, device suprisely unremoved and so on. // #define ODM_DBG_WARNING 3 // // Normal case with useful information about current SW or HW state. // For example, Tx/Rx descriptor to fill, Tx/Rx descriptor completed status, // SW protocol state change, dynamic mechanism state change and so on. // #define ODM_DBG_LOUD 4 // // Normal case with detail execution flow or information. // #define ODM_DBG_TRACE 5 //----------------------------------------------------------------------------- // Define the tracing components // //----------------------------------------------------------------------------- //BB Functions #define ODM_COMP_DIG BIT0 #define ODM_COMP_RA_MASK BIT1 #define ODM_COMP_DYNAMIC_TXPWR BIT2 #define ODM_COMP_FA_CNT BIT3 #define ODM_COMP_RSSI_MONITOR BIT4 #define ODM_COMP_CCK_PD BIT5 #define ODM_COMP_ANT_DIV BIT6 #define ODM_COMP_PWR_SAVE BIT7 #define ODM_COMP_PWR_TRAIN BIT8 #define ODM_COMP_RATE_ADAPTIVE BIT9 #define ODM_COMP_PATH_DIV BIT10 #define ODM_COMP_PSD BIT11 #define ODM_COMP_DYNAMIC_PRICCA BIT12 #define ODM_COMP_RXHP BIT13 #define ODM_COMP_MP BIT14 #define ODM_COMP_CFO_TRACKING BIT15 #define ODM_COMP_ACS BIT16 #define PHYDM_COMP_ADAPTIVITY BIT17 //MAC Functions #define ODM_COMP_EDCA_TURBO BIT20 #define ODM_COMP_EARLY_MODE BIT21 //RF Functions #define ODM_COMP_TX_PWR_TRACK BIT24 #define ODM_COMP_RX_GAIN_TRACK BIT25 #define ODM_COMP_CALIBRATION BIT26 //Common Functions #define ODM_COMP_COMMON BIT30 #define ODM_COMP_INIT BIT31 /*------------------------Export Marco Definition---------------------------*/ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #define RT_PRINTK DbgPrint #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #define DbgPrint printk #define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __FUNCTION__, ## args); #define RT_DISP(dbgtype, dbgflag, printstr) #else #define DbgPrint panic_printk #define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __FUNCTION__, ## args); #endif #ifndef ASSERT #define ASSERT(expr) #endif #if DBG #define ODM_RT_TRACE(pDM_Odm, comp, level, fmt) \ if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel || level == ODM_DBG_SERIOUS)) \ { \ if(pDM_Odm->SupportICType == ODM_RTL8192C) \ DbgPrint("[ODM-92C] "); \ else if(pDM_Odm->SupportICType == ODM_RTL8192D) \ DbgPrint("[ODM-92D] "); \ else if(pDM_Odm->SupportICType == ODM_RTL8723A) \ DbgPrint("[ODM-8723A] "); \ else if(pDM_Odm->SupportICType == ODM_RTL8188E) \ DbgPrint("[ODM-8188E] "); \ else if(pDM_Odm->SupportICType == ODM_RTL8192E) \ DbgPrint("[ODM-8192E] "); \ else if(pDM_Odm->SupportICType == ODM_RTL8812) \ DbgPrint("[ODM-8812] "); \ else if(pDM_Odm->SupportICType == ODM_RTL8821) \ DbgPrint("[ODM-8821] "); \ else if(pDM_Odm->SupportICType == ODM_RTL8814A) \ DbgPrint("[ODM-8814] "); \ RT_PRINTK fmt; \ } #define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt) \ if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \ { \ RT_PRINTK fmt; \ } #define ODM_RT_ASSERT(pDM_Odm, expr, fmt) \ if(!(expr)) { \ DbgPrint( "Assertion failed! %s at ......\n", #expr); \ DbgPrint( " ......%s,%s,line=%d\n",__FILE__,__FUNCTION__,__LINE__); \ RT_PRINTK fmt; \ ASSERT(FALSE); \ } #define ODM_dbg_enter() { DbgPrint("==> %s\n", __FUNCTION__); } #define ODM_dbg_exit() { DbgPrint("<== %s\n", __FUNCTION__); } #define ODM_dbg_trace(str) { DbgPrint("%s:%s\n", __FUNCTION__, str); } #define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr) \ if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \ { \ int __i; \ pu1Byte __ptr = (pu1Byte)ptr; \ DbgPrint("[ODM] "); \ DbgPrint(title_str); \ DbgPrint(" "); \ for( __i=0; __i<6; __i++ ) \ DbgPrint("%02X%s", __ptr[__i], (__i==5)?"":"-"); \ DbgPrint("\n"); \ } #else #define ODM_RT_TRACE(pDM_Odm, comp, level, fmt) #define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt) #define ODM_RT_ASSERT(pDM_Odm, expr, fmt) #define ODM_dbg_enter() #define ODM_dbg_exit() #define ODM_dbg_trace(str) #define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr) #endif VOID PHYDM_InitDebugSetting(IN PDM_ODM_T pDM_Odm); #define BB_TMP_BUF_SIZE 100 VOID phydm_BB_Debug_Info(IN PDM_ODM_T pDM_Odm); VOID phydm_BasicProfile(IN PVOID pDM_VOID); VOID phydm_BasicDbgMessage( IN PVOID pDM_VOID); #endif // __ODM_DBG_H__ rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_interface.c000066400000000000000000000444511261122257400225770ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // include files //============================================================ #include "Mp_Precomp.h" #include "phydm_precomp.h" // // ODM IO Relative API. // u1Byte ODM_Read1Byte( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) prtl8192cd_priv priv = pDM_Odm->priv; return RTL_R8(RegAddr); #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) PADAPTER Adapter = pDM_Odm->Adapter; return rtw_read8(Adapter,RegAddr); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; return PlatformEFIORead1Byte(Adapter, RegAddr); #endif } u2Byte ODM_Read2Byte( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) prtl8192cd_priv priv = pDM_Odm->priv; return RTL_R16(RegAddr); #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) PADAPTER Adapter = pDM_Odm->Adapter; return rtw_read16(Adapter,RegAddr); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; return PlatformEFIORead2Byte(Adapter, RegAddr); #endif } u4Byte ODM_Read4Byte( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) prtl8192cd_priv priv = pDM_Odm->priv; return RTL_R32(RegAddr); #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) PADAPTER Adapter = pDM_Odm->Adapter; return rtw_read32(Adapter,RegAddr); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; return PlatformEFIORead4Byte(Adapter, RegAddr); #endif } VOID ODM_Write1Byte( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr, IN u1Byte Data ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) prtl8192cd_priv priv = pDM_Odm->priv; RTL_W8(RegAddr, Data); #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) PADAPTER Adapter = pDM_Odm->Adapter; rtw_write8(Adapter,RegAddr, Data); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; PlatformEFIOWrite1Byte(Adapter, RegAddr, Data); #endif } VOID ODM_Write2Byte( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr, IN u2Byte Data ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) prtl8192cd_priv priv = pDM_Odm->priv; RTL_W16(RegAddr, Data); #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) PADAPTER Adapter = pDM_Odm->Adapter; rtw_write16(Adapter,RegAddr, Data); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; PlatformEFIOWrite2Byte(Adapter, RegAddr, Data); #endif } VOID ODM_Write4Byte( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr, IN u4Byte Data ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) prtl8192cd_priv priv = pDM_Odm->priv; RTL_W32(RegAddr, Data); #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) PADAPTER Adapter = pDM_Odm->Adapter; rtw_write32(Adapter,RegAddr, Data); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; PlatformEFIOWrite4Byte(Adapter, RegAddr, Data); #endif } VOID ODM_SetMACReg( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr, IN u4Byte BitMask, IN u4Byte Data ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data); #elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) PADAPTER Adapter = pDM_Odm->Adapter; PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); #endif } u4Byte ODM_GetMACReg( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr, IN u4Byte BitMask ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask); #elif(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) return PHY_QueryMacReg(pDM_Odm->Adapter, RegAddr, BitMask); #endif } VOID ODM_SetBBReg( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr, IN u4Byte BitMask, IN u4Byte Data ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data); #elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) PADAPTER Adapter = pDM_Odm->Adapter; PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); #endif } u4Byte ODM_GetBBReg( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr, IN u4Byte BitMask ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask); #elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) PADAPTER Adapter = pDM_Odm->Adapter; return PHY_QueryBBReg(Adapter, RegAddr, BitMask); #endif } VOID ODM_SetRFReg( IN PDM_ODM_T pDM_Odm, IN ODM_RF_RADIO_PATH_E eRFPath, IN u4Byte RegAddr, IN u4Byte BitMask, IN u4Byte Data ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) PHY_SetRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, Data); #elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) PADAPTER Adapter = pDM_Odm->Adapter; PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data); #endif } u4Byte ODM_GetRFReg( IN PDM_ODM_T pDM_Odm, IN ODM_RF_RADIO_PATH_E eRFPath, IN u4Byte RegAddr, IN u4Byte BitMask ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) return PHY_QueryRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, 1); #elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) PADAPTER Adapter = pDM_Odm->Adapter; return PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask); #endif } // // ODM Memory relative API. // VOID ODM_AllocateMemory( IN PDM_ODM_T pDM_Odm, OUT PVOID *pPtr, IN u4Byte length ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) *pPtr = kmalloc(length, GFP_ATOMIC); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) *pPtr = rtw_zvmalloc(length); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; PlatformAllocateMemory(Adapter, pPtr, length); #endif } // length could be ignored, used to detect memory leakage. VOID ODM_FreeMemory( IN PDM_ODM_T pDM_Odm, OUT PVOID pPtr, IN u4Byte length ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) kfree(pPtr); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) rtw_vmfree(pPtr, length); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) //PADAPTER Adapter = pDM_Odm->Adapter; PlatformFreeMemory(pPtr, length); #endif } VOID ODM_MoveMemory( IN PDM_ODM_T pDM_Odm, OUT PVOID pDest, IN PVOID pSrc, IN u4Byte Length ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) memcpy(pDest, pSrc, Length); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) _rtw_memcpy(pDest, pSrc, Length); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PlatformMoveMemory(pDest, pSrc, Length); #endif } void ODM_Memory_Set (IN PDM_ODM_T pDM_Odm, IN PVOID pbuf, IN s1Byte value, IN u4Byte length) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) _rtw_memset(pbuf,value, length); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PlatformFillMemory(pbuf,length,value); #endif } s4Byte ODM_CompareMemory( IN PDM_ODM_T pDM_Odm, IN PVOID pBuf1, IN PVOID pBuf2, IN u4Byte length ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) return memcmp(pBuf1,pBuf2,length); #elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) return _rtw_memcmp(pBuf1,pBuf2,length); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) return PlatformCompareMemory(pBuf1,pBuf2,length); #endif } // // ODM MISC relative API. // VOID ODM_AcquireSpinLock( IN PDM_ODM_T pDM_Odm, IN RT_SPINLOCK_TYPE type ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) PADAPTER Adapter = pDM_Odm->Adapter; rtw_odm_acquirespinlock(Adapter, type); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; PlatformAcquireSpinLock(Adapter, type); #endif } VOID ODM_ReleaseSpinLock( IN PDM_ODM_T pDM_Odm, IN RT_SPINLOCK_TYPE type ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) PADAPTER Adapter = pDM_Odm->Adapter; rtw_odm_releasespinlock(Adapter, type); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; PlatformReleaseSpinLock(Adapter, type); #endif } // // Work item relative API. FOr MP driver only~! // VOID ODM_InitializeWorkItem( IN PDM_ODM_T pDM_Odm, IN PRT_WORK_ITEM pRtWorkItem, IN RT_WORKITEM_CALL_BACK RtWorkItemCallback, IN PVOID pContext, IN const char* szID ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; PlatformInitializeWorkItem(Adapter, pRtWorkItem, RtWorkItemCallback, pContext, szID); #endif } VOID ODM_StartWorkItem( IN PRT_WORK_ITEM pRtWorkItem ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PlatformStartWorkItem(pRtWorkItem); #endif } VOID ODM_StopWorkItem( IN PRT_WORK_ITEM pRtWorkItem ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PlatformStopWorkItem(pRtWorkItem); #endif } VOID ODM_FreeWorkItem( IN PRT_WORK_ITEM pRtWorkItem ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PlatformFreeWorkItem(pRtWorkItem); #endif } VOID ODM_ScheduleWorkItem( IN PRT_WORK_ITEM pRtWorkItem ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PlatformScheduleWorkItem(pRtWorkItem); #endif } VOID ODM_IsWorkItemScheduled( IN PRT_WORK_ITEM pRtWorkItem ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PlatformIsWorkItemScheduled(pRtWorkItem); #endif } // // ODM Timer relative API. // VOID ODM_StallExecution( IN u4Byte usDelay ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) rtw_udelay_os(usDelay); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PlatformStallExecution(usDelay); #endif } VOID ODM_delay_ms(IN u4Byte ms) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) delay_ms(ms); #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) rtw_mdelay_os(ms); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) delay_ms(ms); #endif } VOID ODM_delay_us(IN u4Byte us) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) delay_us(us); #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) rtw_udelay_os(us); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PlatformStallExecution(us); #endif } VOID ODM_sleep_ms(IN u4Byte ms) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) rtw_msleep_os(ms); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) #endif } VOID ODM_sleep_us(IN u4Byte us) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) rtw_usleep_os(us); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) #endif } VOID ODM_SetTimer( IN PDM_ODM_T pDM_Odm, IN PRT_TIMER pTimer, IN u4Byte msDelay ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) mod_timer(pTimer, jiffies + RTL_MILISECONDS_TO_JIFFIES(msDelay)); #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) _set_timer(pTimer,msDelay ); //ms #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; PlatformSetTimer(Adapter, pTimer, msDelay); #endif } VOID ODM_InitializeTimer( IN PDM_ODM_T pDM_Odm, IN PRT_TIMER pTimer, IN RT_TIMER_CALL_BACK CallBackFunc, IN PVOID pContext, IN const char* szID ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) init_timer(pTimer); pTimer->function = CallBackFunc; pTimer->data = (unsigned long)pDM_Odm; mod_timer(pTimer, jiffies+RTL_MILISECONDS_TO_JIFFIES(10)); #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) PADAPTER Adapter = pDM_Odm->Adapter; _init_timer(pTimer,Adapter->pnetdev,CallBackFunc,pDM_Odm); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; PlatformInitializeTimer(Adapter, pTimer, CallBackFunc,pContext,szID); #endif } VOID ODM_CancelTimer( IN PDM_ODM_T pDM_Odm, IN PRT_TIMER pTimer ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) del_timer_sync(pTimer); #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) _cancel_timer_ex(pTimer); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; PlatformCancelTimer(Adapter, pTimer); #endif } VOID ODM_ReleaseTimer( IN PDM_ODM_T pDM_Odm, IN PRT_TIMER pTimer ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; // <20120301, Kordan> If the initilization fails, InitializeAdapterXxx will return regardless of InitHalDm. // Hence, uninitialized timers cause BSOD when the driver releases resources since the init fail. if (pTimer == 0) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_SERIOUS, ("=====>ODM_ReleaseTimer(), The timer is NULL! Please check it!\n")); return; } PlatformReleaseTimer(Adapter, pTimer); #endif } // // ODM FW relative API. // #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) VOID ODM_FillH2CCmd( IN PDM_ODM_T pDM_Odm, IN u1Byte ElementID, IN u4Byte CmdLen, IN pu1Byte pCmdBuffer ) { PADAPTER Adapter = pDM_Odm->Adapter; if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { switch(ElementID) { case ODM_H2C_RSSI_REPORT: #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) FillH2CCmd8812(Adapter, H2C_8812_RSSI_REPORT, CmdLen, pCmdBuffer); #else #if((RTL8812A_SUPPORT==1) ||(RTL8821A_SUPPORT==1)) FillH2CCmd_8812(Adapter, H2C_8812_RSSI_REPORT, CmdLen, pCmdBuffer); #endif #endif break; case ODM_H2C_IQ_CALIBRATION: #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) FillH2CCmd8812(Adapter, H2C_8812_IQ_CALIBRATION, CmdLen, pCmdBuffer); #else #if((RTL8812A_SUPPORT==1) ||(RTL8821A_SUPPORT==1)) FillH2CCmd_8812(Adapter, H2C_8812_IQ_CALIBRATION, CmdLen, pCmdBuffer); #endif #endif break; default: break; } } else if(pDM_Odm->SupportICType == ODM_RTL8192E) { switch(ElementID) { case ODM_H2C_RSSI_REPORT: #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) FillH2CCmd8812(Adapter, H2C_8812_RSSI_REPORT, CmdLen, pCmdBuffer); #else #if(RTL8192E_SUPPORT==1) FillH2CCmd_8192E(Adapter, H2C_8192E_RSSI_REPORT, CmdLen, pCmdBuffer); #endif #endif break; default: break; } } else if(pDM_Odm->SupportICType == ODM_RTL8723B) { switch(ElementID) { case ODM_H2C_RSSI_REPORT: #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) FillH2CCmd8723B(Adapter, H2C_8723B_RSSI_REPORT, CmdLen, pCmdBuffer); #else #if(RTL8723B_SUPPORT==1) FillH2CCmd8723B(Adapter, H2C_8723B_RSSI_SETTING, CmdLen, pCmdBuffer); #endif #endif break; case ODM_H2C_WIFI_CALIBRATION: #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) FillH2CCmd8723B(Adapter, H2C_8723B_WIFI_CALIBRATION, CmdLen, pCmdBuffer); #else #if(RTL8723B_SUPPORT==1) FillH2CCmd8723B(Adapter, H2C_8723B_BT_WLAN_CALIBRATION, CmdLen, pCmdBuffer); #endif #endif break; default: break; } } else if(pDM_Odm->SupportICType == ODM_RTL8188E) { switch(ElementID) { case ODM_H2C_RSSI_REPORT: //if((pDM_Odm->CutVersion == ODM_CUT_I) && (!pDM_Odm->RaSupport88E)){ if(!pDM_Odm->RaSupport88E){ #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) FillH2CCmd88E(Adapter, H2C_88E_RSSI_REPORT, CmdLen, pCmdBuffer); #else #if(RTL8188E_SUPPORT==1) FillH2CCmd_88E(Adapter, H2C_RSSI_REPORT, CmdLen, pCmdBuffer); #endif #endif } break; default: break; } } #if(DM_ODM_SUPPORT_TYPE & ODM_CE) else if(pDM_Odm->SupportICType == ODM_RTL8723A) { switch(ElementID) { case ODM_H2C_RSSI_REPORT: #if(RTL8723A_SUPPORT==1) FillH2CCmd(Adapter, RSSI_SETTING_EID, CmdLen, pCmdBuffer); #endif break; default: break; } } else if(pDM_Odm->SupportICType == ODM_RTL8192D) { switch(ElementID) { case ODM_H2C_RSSI_REPORT: #if(RTL8192D_SUPPORT==1) FillH2CCmd92D(Adapter, H2C_RSSI_REPORT, CmdLen, pCmdBuffer); #endif break; default: break; } } #endif else { switch(ElementID) { case ODM_H2C_RSSI_REPORT: #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) FillH2CCmd92C(Adapter, H2C_RSSI_REPORT, CmdLen, pCmdBuffer); #else #if(RTL8192C_SUPPORT==1) rtl8192c_FillH2CCmd(Adapter, RSSI_SETTING_EID, CmdLen, pCmdBuffer); #endif #endif break; default: break; } } } #else u4Byte ODM_FillH2CCmd( IN pu1Byte pH2CBuffer, IN u4Byte H2CBufferLen, IN u4Byte CmdNum, IN pu4Byte pElementID, IN pu4Byte pCmdLen, IN pu1Byte* pCmbBuffer, IN pu1Byte CmdStartSeq ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) //FillH2CCmd(pH2CBuffer, H2CBufferLen, CmdNum, pElementID, pCmdLen, pCmbBuffer, CmdStartSeq); return FALSE; #endif return TRUE; } #endif u8Byte ODM_GetCurrentTime( IN PDM_ODM_T pDM_Odm ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) return 0; #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) return (u8Byte)rtw_get_current_time(); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) return PlatformGetCurrentTime(); #endif } u8Byte ODM_GetProgressingTime( IN PDM_ODM_T pDM_Odm, IN u8Byte Start_Time ) { #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) return 0; #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) return rtw_get_passing_time_ms((u4Byte)Start_Time); #elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) return (PlatformGetCurrentTime() - Start_Time)>>10; #endif } rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_interface.h000066400000000000000000000206531261122257400226020ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __ODM_INTERFACE_H__ #define __ODM_INTERFACE_H__ // // =========== Constant/Structure/Enum/... Define // // // =========== Macro Define // #define _reg_all(_name) ODM_##_name #define _reg_ic(_name, _ic) ODM_##_name##_ic #define _bit_all(_name) BIT_##_name #define _bit_ic(_name, _ic) BIT_##_name##_ic // _cat: implemented by Token-Pasting Operator. #if 0 #define _cat(_name, _ic_type, _func) \ ( \ _func##_all(_name) \ ) #endif /*=================================== #define ODM_REG_DIG_11N 0xC50 #define ODM_REG_DIG_11AC 0xDDD ODM_REG(DIG,_pDM_Odm) =====================================*/ #define _reg_11N(_name) ODM_REG_##_name##_11N #define _reg_11AC(_name) ODM_REG_##_name##_11AC #define _bit_11N(_name) ODM_BIT_##_name##_11N #define _bit_11AC(_name) ODM_BIT_##_name##_11AC #ifdef __ECOS #define _rtk_cat(_name, _ic_type, _func) \ ( \ ((_ic_type) & ODM_IC_11N_SERIES)? _func##_11N(_name): \ _func##_11AC(_name) \ ) #else #define _cat(_name, _ic_type, _func) \ ( \ ((_ic_type) & ODM_IC_11N_SERIES)? _func##_11N(_name): \ _func##_11AC(_name) \ ) #endif /* // only sample code //#define _cat(_name, _ic_type, _func) \ // ( \ // ((_ic_type) & ODM_RTL8192C)? _func##_ic(_name, _8192C): \ // ((_ic_type) & ODM_RTL8192D)? _func##_ic(_name, _8192D): \ // ((_ic_type) & ODM_RTL8192S)? _func##_ic(_name, _8192S): \ // ((_ic_type) & ODM_RTL8723A)? _func##_ic(_name, _8723A): \ // ((_ic_type) & ODM_RTL8188E)? _func##_ic(_name, _8188E): \ // _func##_ic(_name, _8195) \ // ) */ // _name: name of register or bit. // Example: "ODM_REG(R_A_AGC_CORE1, pDM_Odm)" // gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C", depends on SupportICType. #ifdef __ECOS #define ODM_REG(_name, _pDM_Odm) _rtk_cat(_name, _pDM_Odm->SupportICType, _reg) #define ODM_BIT(_name, _pDM_Odm) _rtk_cat(_name, _pDM_Odm->SupportICType, _bit) #else #define ODM_REG(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _reg) #define ODM_BIT(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _bit) #endif typedef enum _ODM_H2C_CMD { ODM_H2C_RSSI_REPORT = 0, ODM_H2C_PSD_RESULT=1, ODM_H2C_PathDiv = 2, ODM_H2C_WIFI_CALIBRATION = 3, ODM_H2C_IQ_CALIBRATION = 4, ODM_MAX_H2CCMD }ODM_H2C_CMD; // // 2012/02/17 MH For non-MP compile pass only. Linux does not support workitem. // Suggest HW team to use thread instead of workitem. Windows also support the feature. // #if (DM_ODM_SUPPORT_TYPE != ODM_WIN) typedef void *PRT_WORK_ITEM ; typedef void RT_WORKITEM_HANDLE,*PRT_WORKITEM_HANDLE; typedef VOID (*RT_WORKITEM_CALL_BACK)(PVOID pContext); #if 0 typedef struct tasklet_struct RT_WORKITEM_HANDLE, *PRT_WORKITEM_HANDLE; typedef struct _RT_WORK_ITEM { RT_WORKITEM_HANDLE Handle; // Platform-dependent handle for this workitem, e.g. Ndis Workitem object. PVOID Adapter; // Pointer to Adapter object. PVOID pContext; // Parameter to passed to CallBackFunc(). RT_WORKITEM_CALL_BACK CallbackFunc; // Callback function of the workitem. u1Byte RefCount; // 0: driver is going to unload, 1: No such workitem scheduled, 2: one workitem is schedueled. PVOID pPlatformExt; // Pointer to platform-dependent extension. BOOLEAN bFree; char szID[36]; // An identity string of this workitem. }RT_WORK_ITEM, *PRT_WORK_ITEM; #endif #endif // // =========== Extern Variable ??? It should be forbidden. // // // =========== EXtern Function Prototype // u1Byte ODM_Read1Byte( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr ); u2Byte ODM_Read2Byte( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr ); u4Byte ODM_Read4Byte( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr ); VOID ODM_Write1Byte( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr, IN u1Byte Data ); VOID ODM_Write2Byte( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr, IN u2Byte Data ); VOID ODM_Write4Byte( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr, IN u4Byte Data ); VOID ODM_SetMACReg( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr, IN u4Byte BitMask, IN u4Byte Data ); u4Byte ODM_GetMACReg( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr, IN u4Byte BitMask ); VOID ODM_SetBBReg( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr, IN u4Byte BitMask, IN u4Byte Data ); u4Byte ODM_GetBBReg( IN PDM_ODM_T pDM_Odm, IN u4Byte RegAddr, IN u4Byte BitMask ); VOID ODM_SetRFReg( IN PDM_ODM_T pDM_Odm, IN ODM_RF_RADIO_PATH_E eRFPath, IN u4Byte RegAddr, IN u4Byte BitMask, IN u4Byte Data ); u4Byte ODM_GetRFReg( IN PDM_ODM_T pDM_Odm, IN ODM_RF_RADIO_PATH_E eRFPath, IN u4Byte RegAddr, IN u4Byte BitMask ); // // Memory Relative Function. // VOID ODM_AllocateMemory( IN PDM_ODM_T pDM_Odm, OUT PVOID *pPtr, IN u4Byte length ); VOID ODM_FreeMemory( IN PDM_ODM_T pDM_Odm, OUT PVOID pPtr, IN u4Byte length ); VOID ODM_MoveMemory( IN PDM_ODM_T pDM_Odm, OUT PVOID pDest, IN PVOID pSrc, IN u4Byte Length ); s4Byte ODM_CompareMemory( IN PDM_ODM_T pDM_Odm, IN PVOID pBuf1, IN PVOID pBuf2, IN u4Byte length ); void ODM_Memory_Set (IN PDM_ODM_T pDM_Odm, IN PVOID pbuf, IN s1Byte value, IN u4Byte length); // // ODM MISC-spin lock relative API. // VOID ODM_AcquireSpinLock( IN PDM_ODM_T pDM_Odm, IN RT_SPINLOCK_TYPE type ); VOID ODM_ReleaseSpinLock( IN PDM_ODM_T pDM_Odm, IN RT_SPINLOCK_TYPE type ); // // ODM MISC-workitem relative API. // VOID ODM_InitializeWorkItem( IN PDM_ODM_T pDM_Odm, IN PRT_WORK_ITEM pRtWorkItem, IN RT_WORKITEM_CALL_BACK RtWorkItemCallback, IN PVOID pContext, IN const char* szID ); VOID ODM_StartWorkItem( IN PRT_WORK_ITEM pRtWorkItem ); VOID ODM_StopWorkItem( IN PRT_WORK_ITEM pRtWorkItem ); VOID ODM_FreeWorkItem( IN PRT_WORK_ITEM pRtWorkItem ); VOID ODM_ScheduleWorkItem( IN PRT_WORK_ITEM pRtWorkItem ); VOID ODM_IsWorkItemScheduled( IN PRT_WORK_ITEM pRtWorkItem ); // // ODM Timer relative API. // VOID ODM_StallExecution( IN u4Byte usDelay ); VOID ODM_delay_ms(IN u4Byte ms); VOID ODM_delay_us(IN u4Byte us); VOID ODM_sleep_ms(IN u4Byte ms); VOID ODM_sleep_us(IN u4Byte us); VOID ODM_SetTimer( IN PDM_ODM_T pDM_Odm, IN PRT_TIMER pTimer, IN u4Byte msDelay ); VOID ODM_InitializeTimer( IN PDM_ODM_T pDM_Odm, IN PRT_TIMER pTimer, IN RT_TIMER_CALL_BACK CallBackFunc, IN PVOID pContext, IN const char* szID ); VOID ODM_CancelTimer( IN PDM_ODM_T pDM_Odm, IN PRT_TIMER pTimer ); VOID ODM_ReleaseTimer( IN PDM_ODM_T pDM_Odm, IN PRT_TIMER pTimer ); // // ODM FW relative API. // #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) VOID ODM_FillH2CCmd( IN PDM_ODM_T pDM_Odm, IN u1Byte ElementID, IN u4Byte CmdLen, IN pu1Byte pCmdBuffer ); #else u4Byte ODM_FillH2CCmd( IN pu1Byte pH2CBuffer, IN u4Byte H2CBufferLen, IN u4Byte CmdNum, IN pu4Byte pElementID, IN pu4Byte pCmdLen, IN pu1Byte* pCmbBuffer, IN pu1Byte CmdStartSeq ); #endif u8Byte ODM_GetCurrentTime( IN PDM_ODM_T pDM_Odm ); u8Byte ODM_GetProgressingTime( IN PDM_ODM_T pDM_Odm, IN u8Byte Start_Time ); #endif // __ODM_INTERFACE_H__ rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_precomp.h000066400000000000000000000206111261122257400223010ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __ODM_PRECOMP_H__ #define __ODM_PRECOMP_H__ #include "phydm_types.h" #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #include "Precomp.h" // We need to include mp_precomp.h due to batch file setting. #else #define TEST_FALG___ 1 #endif //2 Config Flags and Structs - defined by each ODM Type #if (DM_ODM_SUPPORT_TYPE == ODM_AP) #include "../8192cd_cfg.h" #include "../odm_inc.h" #include "../8192cd.h" #include "../8192cd_util.h" #ifdef _BIG_ENDIAN_ #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG #else #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE #endif #ifdef AP_BUILD_WORKAROUND #include "../8192cd_headers.h" #include "../8192cd_debug.h" #endif #elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL) // Flags #include "../8192cd_cfg.h" // OUTSRC needs ADSL config flags. #include "../odm_inc.h" // OUTSRC needs some extra flags. // Data Structure #include "../common_types.h" // OUTSRC and rtl8192cd both needs basic type such as UINT8 and BIT0. #include "../8192cd.h" // OUTSRC needs basic ADSL struct definition. #include "../8192cd_util.h" // OUTSRC needs basic I/O function. #ifdef _BIG_ENDIAN_ #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG #else #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE #endif #ifdef ADSL_AP_BUILD_WORKAROUND // NESTED_INC: Functions defined outside should not be included!! Marked by Annie, 2011-10-14. #include "../8192cd_headers.h" #include "../8192cd_debug.h" #endif #elif (DM_ODM_SUPPORT_TYPE ==ODM_CE) //#include //#include //#include //#include //#include //#include #define BEAMFORMING_SUPPORT 0 #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) #include "Mp_Precomp.h" #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE #endif //2 Hardware Parameter Files #if (DM_ODM_SUPPORT_TYPE == ODM_AP) #if (RTL8192C_SUPPORT==1) #include "rtl8192c/Hal8192CEFWImg_AP.h" #include "rtl8192c/Hal8192CEPHYImg_AP.h" #include "rtl8192c/Hal8192CEMACImg_AP.h" #endif #elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL) #include "rtl8192c/Hal8192CEFWImg_ADSL.h" #include "rtl8192c/Hal8192CEPHYImg_ADSL.h" #include "rtl8192c/Hal8192CEMACImg_ADSL.h" #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #if(RTL8192CE_SUPPORT ==1) #include "rtl8192c/Hal8192CEFWImg_CE.h" #include "rtl8192c/Hal8192CEPHYImg_CE.h" #include "rtl8192c/Hal8192CEMACImg_CE.h" #endif #if(RTL8192CU_SUPPORT ==1) #include "rtl8192c/Hal8192CUFWImg_CE.h" #include "rtl8192c/Hal8192CUPHYImg_CE.h" #include "rtl8192c/Hal8192CUMACImg_CE.h" #endif #if(RTL8192DE_SUPPORT ==1) #include "rtl8192d/Hal8192DEFWImg_CE.h" #include "rtl8192d/Hal8192DEPHYImg_CE.h" #include "rtl8192d/Hal8192DEMACImg_CE.h" #endif #if(RTL8192DU_SUPPORT ==1) #include "rtl8192d/Hal8192DUFWImg_CE.h" #include "rtl8192d/Hal8192DUPHYImg_CE.h" #include "rtl8192d/Hal8192DUMACImg_CE.h" #endif #if(RTL8723AS_SUPPORT==1) #include "rtl8723a/Hal8723SHWImg_CE.h" #endif #if(RTL8723AU_SUPPORT==1) #include "rtl8723a/Hal8723UHWImg_CE.h" #endif #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) #endif //2 OutSrc Header Files #include "phydm.h" #include "phydm_HWConfig.h" #include "phydm_debug.h" #include "phydm_RegDefine11AC.h" #include "phydm_RegDefine11N.h" #include "phydm_AntDiv.h" #include "phydm_interface.h" #include "phydm_reg.h" #if (DM_ODM_SUPPORT_TYPE == ODM_AP) #if (RTL8192C_SUPPORT==1) #include "rtl8192c/HalDMOutSrc8192C_AP.h" #endif #if (RTL8188E_SUPPORT==1) #include "rtl8188e/Hal8188ERateAdaptive.h"//for RA,Power training #endif #elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL) #include "rtl8192c/HalDMOutSrc8192C_ADSL.h" #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) //#include "hal_com.h" #include "HalPhyRf.h" #if (RTL8192C_SUPPORT==1) #ifdef CONFIG_INTEL_PROXIM #include "../proxim/intel_proxim.h" #endif #include "rtl8192c/HalDMOutSrc8192C_CE.h" #include #endif #if (RTL8192D_SUPPORT==1) #include "rtl8192d/HalDMOutSrc8192D_CE.h" #include "rtl8192d_hal.h" #endif #if (RTL8723A_SUPPORT==1) #include "rtl8192c/HalDMOutSrc8192C_CE.h" //for IQK,LCK,Power-tracking #include "rtl8723a_hal.h" #endif #if (RTL8188E_SUPPORT==1) #include "rtl8188e/HalPhyRf_8188e.h"//for IQK,LCK,Power-tracking #include "rtl8188e/Hal8188ERateAdaptive.h"//for RA,Power training #include "rtl8188e_hal.h" #endif #if (RTL8192E_SUPPORT==1) #include "rtl8192e/HalPhyRf_8192e.h"//for IQK,LCK,Power-tracking #include "rtl8192e_hal.h" #endif #if (RTL8812A_SUPPORT==1) #include "rtl8812a/HalPhyRf_8812A.h"//for IQK,LCK,Power-tracking #include "rtl8812a_hal.h" #endif #if (RTL8821A_SUPPORT==1) #include "rtl8821a/HalPhyRf_8821A.h"//for IQK,LCK,Power-tracking #include "rtl8812a/HalPhyRf_8812A.h"//for IQK,LCK,Power-tracking #include "rtl8812a_hal.h" #include "rtl8821a/PhyDM_IQK_8821A.h" #endif #if (RTL8723B_SUPPORT==1) #include "rtl8723b/HalPhyRf_8723B.h"//for IQK,LCK,Power-tracking #include "rtl8723b_hal.h" #endif #endif #if (RTL8192C_SUPPORT==1) #if (DM_ODM_SUPPORT_TYPE == ODM_AP) #include "rtl8192c/Hal8192CHWImg_MAC.h" #include "rtl8192c/Hal8192CHWImg_RF.h" #include "rtl8192c/Hal8192CHWImg_BB.h" #include "rtl8192c/Hal8192CHWImg_FW.h" #endif #include "rtl8192c/phydm_RTL8192C.h" #endif #if (RTL8192D_SUPPORT==1) #include "rtl8192d/phydm_RTL8192D.h" #endif #if (RTL8723A_SUPPORT==1) #include "rtl8723a/HalHWImg8723A_MAC.h" #include "rtl8723a/HalHWImg8723A_RF.h" #include "rtl8723a/HalHWImg8723A_BB.h" #include "rtl8723a/HalHWImg8723A_FW.h" #include "rtl8723a/phydm_RegConfig8723A.h" #endif #if (RTL8188E_SUPPORT==1) #include "rtl8188e/HalHWImg8188E_MAC.h" #include "rtl8188e/HalHWImg8188E_RF.h" #include "rtl8188e/HalHWImg8188E_BB.h" #include "rtl8188e/HalHWImg8188E_FW.h" #include "rtl8188e/Hal8188EReg.h" #if (DM_ODM_SUPPORT_TYPE & ODM_AP) #include "rtl8188e/HalPhyRf_8188e.h" #endif #if (TESTCHIP_SUPPORT == 1) #include "rtl8188e/HalHWImg8188E_TestChip_MAC.h" #include "rtl8188e/HalHWImg8188E_TestChip_RF.h" #include "rtl8188e/HalHWImg8188E_TestChip_BB.h" #endif #include "rtl8188e/phydm_RegConfig8188E.h" #include "rtl8188e/phydm_RTL8188E.h" #endif #if (RTL8192E_SUPPORT==1) #include "rtl8192e/HalHWImg8192E_MAC.h" #include "rtl8192e/HalHWImg8192E_RF.h" #include "rtl8192e/HalHWImg8192E_BB.h" #include "rtl8192e/HalHWImg8192E_FW.h" #include "rtl8192e/Hal8192EReg.h" #include "rtl8192e/phydm_RegConfig8192E.h" #include "rtl8192e/phydm_RTL8192E.h" #endif #if (RTL8723B_SUPPORT==1) #include "rtl8723b/HalHWImg8723B_MAC.h" #include "rtl8723b/HalHWImg8723B_RF.h" #include "rtl8723b/HalHWImg8723B_BB.h" #include "rtl8723b/HalHWImg8723B_FW.h" #include "rtl8723b/HalHWImg8723B_MP.h" #include "rtl8723b/Hal8723BReg.h" #include "rtl8723b/phydm_RTL8723B.h" #include "rtl8723b/phydm_RegConfig8723B.h" #endif #if (RTL8812A_SUPPORT==1) #include "rtl8812a/HalHWImg8812A_MAC.h" #include "rtl8812a/HalHWImg8812A_RF.h" #include "rtl8812a/HalHWImg8812A_BB.h" #include "rtl8812a/HalHWImg8812A_FW.h" #include "rtl8812a/phydm_RegConfig8812A.h" #include "rtl8812a/phydm_RTL8812A.h" #endif #if (RTL8821A_SUPPORT==1) #include "rtl8821a/HalHWImg8821A_MAC.h" #include "rtl8821a/HalHWImg8821A_RF.h" #include "rtl8821a/HalHWImg8821A_BB.h" #include "rtl8821a/HalHWImg8821A_FW.h" #include "rtl8821a/phydm_RegConfig8821A.h" #include "rtl8821a/phydm_RTL8821A.h" #endif #endif // __ODM_PRECOMP_H__ rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_reg.h000066400000000000000000000165311261122257400214170ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // File Name: odm_reg.h // // Description: // // This file is for general register definition. // // //============================================================ #ifndef __HAL_ODM_REG_H__ #define __HAL_ODM_REG_H__ // // Register Definition // //MAC REG #define ODM_BB_RESET 0x002 #define ODM_DUMMY 0x4fe #define RF_T_METER_OLD 0x24 #define RF_T_METER_NEW 0x42 #define ODM_EDCA_VO_PARAM 0x500 #define ODM_EDCA_VI_PARAM 0x504 #define ODM_EDCA_BE_PARAM 0x508 #define ODM_EDCA_BK_PARAM 0x50C #define ODM_TXPAUSE 0x522 //BB REG #define ODM_FPGA_PHY0_PAGE8 0x800 #define ODM_PSD_SETTING 0x808 #define ODM_AFE_SETTING 0x818 #define ODM_TXAGC_B_6_18 0x830 #define ODM_TXAGC_B_24_54 0x834 #define ODM_TXAGC_B_MCS32_5 0x838 #define ODM_TXAGC_B_MCS0_MCS3 0x83c #define ODM_TXAGC_B_MCS4_MCS7 0x848 #define ODM_TXAGC_B_MCS8_MCS11 0x84c #define ODM_ANALOG_REGISTER 0x85c #define ODM_RF_INTERFACE_OUTPUT 0x860 #define ODM_TXAGC_B_MCS12_MCS15 0x868 #define ODM_TXAGC_B_11_A_2_11 0x86c #define ODM_AD_DA_LSB_MASK 0x874 #define ODM_ENABLE_3_WIRE 0x88c #define ODM_PSD_REPORT 0x8b4 #define ODM_R_ANT_SELECT 0x90c #define ODM_CCK_ANT_SELECT 0xa07 #define ODM_CCK_PD_THRESH 0xa0a #define ODM_CCK_RF_REG1 0xa11 #define ODM_CCK_MATCH_FILTER 0xa20 #define ODM_CCK_RAKE_MAC 0xa2e #define ODM_CCK_CNT_RESET 0xa2d #define ODM_CCK_TX_DIVERSITY 0xa2f #define ODM_CCK_FA_CNT_MSB 0xa5b #define ODM_CCK_FA_CNT_LSB 0xa5c #define ODM_CCK_NEW_FUNCTION 0xa75 #define ODM_OFDM_PHY0_PAGE_C 0xc00 #define ODM_OFDM_RX_ANT 0xc04 #define ODM_R_A_RXIQI 0xc14 #define ODM_R_A_AGC_CORE1 0xc50 #define ODM_R_A_AGC_CORE2 0xc54 #define ODM_R_B_AGC_CORE1 0xc58 #define ODM_R_AGC_PAR 0xc70 #define ODM_R_HTSTF_AGC_PAR 0xc7c #define ODM_TX_PWR_TRAINING_A 0xc90 #define ODM_TX_PWR_TRAINING_B 0xc98 #define ODM_OFDM_FA_CNT1 0xcf0 #define ODM_OFDM_PHY0_PAGE_D 0xd00 #define ODM_OFDM_FA_CNT2 0xda0 #define ODM_OFDM_FA_CNT3 0xda4 #define ODM_OFDM_FA_CNT4 0xda8 #define ODM_TXAGC_A_6_18 0xe00 #define ODM_TXAGC_A_24_54 0xe04 #define ODM_TXAGC_A_1_MCS32 0xe08 #define ODM_TXAGC_A_MCS0_MCS3 0xe10 #define ODM_TXAGC_A_MCS4_MCS7 0xe14 #define ODM_TXAGC_A_MCS8_MCS11 0xe18 #define ODM_TXAGC_A_MCS12_MCS15 0xe1c //RF REG #define ODM_GAIN_SETTING 0x00 #define ODM_CHANNEL 0x18 #define ODM_RF_T_METER 0x24 #define ODM_RF_T_METER_92D 0x42 #define ODM_RF_T_METER_88E 0x42 #define ODM_RF_T_METER_92E 0x42 #define ODM_RF_T_METER_8812 0x42 //Ant Detect Reg #define ODM_DPDT 0x300 //PSD Init #define ODM_PSDREG 0x808 //92D Path Div #define PATHDIV_REG 0xB30 #define PATHDIV_TRI 0xBA0 // // Bitmap Definition // #if(DM_ODM_SUPPORT_TYPE & (ODM_AP)) // TX AGC #define rTxAGC_A_CCK11_CCK1_JAguar 0xc20 #define rTxAGC_A_Ofdm18_Ofdm6_JAguar 0xc24 #define rTxAGC_A_Ofdm54_Ofdm24_JAguar 0xc28 #define rTxAGC_A_MCS3_MCS0_JAguar 0xc2c #define rTxAGC_A_MCS7_MCS4_JAguar 0xc30 #define rTxAGC_A_MCS11_MCS8_JAguar 0xc34 #define rTxAGC_A_MCS15_MCS12_JAguar 0xc38 #define rTxAGC_A_Nss1Index3_Nss1Index0_JAguar 0xc3c #define rTxAGC_A_Nss1Index7_Nss1Index4_JAguar 0xc40 #define rTxAGC_A_Nss2Index1_Nss1Index8_JAguar 0xc44 #define rTxAGC_A_Nss2Index5_Nss2Index2_JAguar 0xc48 #define rTxAGC_A_Nss2Index9_Nss2Index6_JAguar 0xc4c #if defined(CONFIG_WLAN_HAL_8814AE) #define rTxAGC_A_MCS19_MCS16_JAguar 0xcd8 #define rTxAGC_A_MCS23_MCS20_JAguar 0xcdc #define rTxAGC_A_Nss3Index3_Nss3Index0_JAguar 0xce0 #define rTxAGC_A_Nss3Index7_Nss3Index4_JAguar 0xce4 #define rTxAGC_A_Nss3Index9_Nss3Index8_JAguar 0xce8 #endif #define rTxAGC_B_CCK11_CCK1_JAguar 0xe20 #define rTxAGC_B_Ofdm18_Ofdm6_JAguar 0xe24 #define rTxAGC_B_Ofdm54_Ofdm24_JAguar 0xe28 #define rTxAGC_B_MCS3_MCS0_JAguar 0xe2c #define rTxAGC_B_MCS7_MCS4_JAguar 0xe30 #define rTxAGC_B_MCS11_MCS8_JAguar 0xe34 #define rTxAGC_B_MCS15_MCS12_JAguar 0xe38 #define rTxAGC_B_Nss1Index3_Nss1Index0_JAguar 0xe3c #define rTxAGC_B_Nss1Index7_Nss1Index4_JAguar 0xe40 #define rTxAGC_B_Nss2Index1_Nss1Index8_JAguar 0xe44 #define rTxAGC_B_Nss2Index5_Nss2Index2_JAguar 0xe48 #define rTxAGC_B_Nss2Index9_Nss2Index6_JAguar 0xe4c #if defined(CONFIG_WLAN_HAL_8814AE) #define rTxAGC_B_MCS19_MCS16_JAguar 0xed8 #define rTxAGC_B_MCS23_MCS20_JAguar 0xedc #define rTxAGC_B_Nss3Index3_Nss3Index0_JAguar 0xee0 #define rTxAGC_B_Nss3Index7_Nss3Index4_JAguar 0xee4 #define rTxAGC_B_Nss3Index9_Nss3Index8_JAguar 0xee8 #define rTxAGC_C_CCK11_CCK1_JAguar 0x1820 #define rTxAGC_C_Ofdm18_Ofdm6_JAguar 0x1824 #define rTxAGC_C_Ofdm54_Ofdm24_JAguar 0x1828 #define rTxAGC_C_MCS3_MCS0_JAguar 0x182c #define rTxAGC_C_MCS7_MCS4_JAguar 0x1830 #define rTxAGC_C_MCS11_MCS8_JAguar 0x1834 #define rTxAGC_C_MCS15_MCS12_JAguar 0x1838 #define rTxAGC_C_Nss1Index3_Nss1Index0_JAguar 0x183c #define rTxAGC_C_Nss1Index7_Nss1Index4_JAguar 0x1840 #define rTxAGC_C_Nss2Index1_Nss1Index8_JAguar 0x1844 #define rTxAGC_C_Nss2Index5_Nss2Index2_JAguar 0x1848 #define rTxAGC_C_Nss2Index9_Nss2Index6_JAguar 0x184c #define rTxAGC_C_MCS19_MCS16_JAguar 0x18d8 #define rTxAGC_C_MCS23_MCS20_JAguar 0x18dc #define rTxAGC_C_Nss3Index3_Nss3Index0_JAguar 0x18e0 #define rTxAGC_C_Nss3Index7_Nss3Index4_JAguar 0x18e4 #define rTxAGC_C_Nss3Index9_Nss3Index8_JAguar 0x18e8 #define rTxAGC_D_CCK11_CCK1_JAguar 0x1a20 #define rTxAGC_D_Ofdm18_Ofdm6_JAguar 0x1a24 #define rTxAGC_D_Ofdm54_Ofdm24_JAguar 0x1a28 #define rTxAGC_D_MCS3_MCS0_JAguar 0x1a2c #define rTxAGC_D_MCS7_MCS4_JAguar 0x1a30 #define rTxAGC_D_MCS11_MCS8_JAguar 0x1a34 #define rTxAGC_D_MCS15_MCS12_JAguar 0x1a38 #define rTxAGC_D_Nss1Index3_Nss1Index0_JAguar 0x1a3c #define rTxAGC_D_Nss1Index7_Nss1Index4_JAguar 0x1a40 #define rTxAGC_D_Nss2Index1_Nss1Index8_JAguar 0x1a44 #define rTxAGC_D_Nss2Index5_Nss2Index2_JAguar 0x1a48 #define rTxAGC_D_Nss2Index9_Nss2Index6_JAguar 0x1a4c #define rTxAGC_D_MCS19_MCS16_JAguar 0x1ad8 #define rTxAGC_D_MCS23_MCS20_JAguar 0x1adc #define rTxAGC_D_Nss3Index3_Nss3Index0_JAguar 0x1ae0 #define rTxAGC_D_Nss3Index7_Nss3Index4_JAguar 0x1ae4 #define rTxAGC_D_Nss3Index9_Nss3Index8_JAguar 0x1ae8 #endif #define bTxAGC_byte0_Jaguar 0xff #define bTxAGC_byte1_Jaguar 0xff00 #define bTxAGC_byte2_Jaguar 0xff0000 #define bTxAGC_byte3_Jaguar 0xff000000 #endif #define BIT_FA_RESET BIT0 #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/phydm_types.h000066400000000000000000000275611261122257400220130ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __ODM_TYPES_H__ #define __ODM_TYPES_H__ #define ODM_RATEMCS15_SG 0x1c #define ODM_RATEMCS32 0x20 // CCK Rates, TxHT = 0 #define ODM_RATE1M 0x00 #define ODM_RATE2M 0x01 #define ODM_RATE5_5M 0x02 #define ODM_RATE11M 0x03 // OFDM Rates, TxHT = 0 #define ODM_RATE6M 0x04 #define ODM_RATE9M 0x05 #define ODM_RATE12M 0x06 #define ODM_RATE18M 0x07 #define ODM_RATE24M 0x08 #define ODM_RATE36M 0x09 #define ODM_RATE48M 0x0A #define ODM_RATE54M 0x0B // MCS Rates, TxHT = 1 #define ODM_RATEMCS0 0x0C #define ODM_RATEMCS1 0x0D #define ODM_RATEMCS2 0x0E #define ODM_RATEMCS3 0x0F #define ODM_RATEMCS4 0x10 #define ODM_RATEMCS5 0x11 #define ODM_RATEMCS6 0x12 #define ODM_RATEMCS7 0x13 #define ODM_RATEMCS8 0x14 #define ODM_RATEMCS9 0x15 #define ODM_RATEMCS10 0x16 #define ODM_RATEMCS11 0x17 #define ODM_RATEMCS12 0x18 #define ODM_RATEMCS13 0x19 #define ODM_RATEMCS14 0x1A #define ODM_RATEMCS15 0x1B #define ODM_RATEMCS16 0x1C #define ODM_RATEMCS17 0x1D #define ODM_RATEMCS18 0x1E #define ODM_RATEMCS19 0x1F #define ODM_RATEMCS20 0x20 #define ODM_RATEMCS21 0x21 #define ODM_RATEMCS22 0x22 #define ODM_RATEMCS23 0x23 #define ODM_RATEMCS24 0x24 #define ODM_RATEMCS25 0x25 #define ODM_RATEMCS26 0x26 #define ODM_RATEMCS27 0x27 #define ODM_RATEMCS28 0x28 #define ODM_RATEMCS29 0x29 #define ODM_RATEMCS30 0x2A #define ODM_RATEMCS31 0x2B #define ODM_RATEVHTSS1MCS0 0x2C #define ODM_RATEVHTSS1MCS1 0x2D #define ODM_RATEVHTSS1MCS2 0x2E #define ODM_RATEVHTSS1MCS3 0x2F #define ODM_RATEVHTSS1MCS4 0x30 #define ODM_RATEVHTSS1MCS5 0x31 #define ODM_RATEVHTSS1MCS6 0x32 #define ODM_RATEVHTSS1MCS7 0x33 #define ODM_RATEVHTSS1MCS8 0x34 #define ODM_RATEVHTSS1MCS9 0x35 #define ODM_RATEVHTSS2MCS0 0x36 #define ODM_RATEVHTSS2MCS1 0x37 #define ODM_RATEVHTSS2MCS2 0x38 #define ODM_RATEVHTSS2MCS3 0x39 #define ODM_RATEVHTSS2MCS4 0x3A #define ODM_RATEVHTSS2MCS5 0x3B #define ODM_RATEVHTSS2MCS6 0x3C #define ODM_RATEVHTSS2MCS7 0x3D #define ODM_RATEVHTSS2MCS8 0x3E #define ODM_RATEVHTSS2MCS9 0x3F #define ODM_RATEVHTSS3MCS0 0x40 #define ODM_RATEVHTSS3MCS1 0x41 #define ODM_RATEVHTSS3MCS2 0x42 #define ODM_RATEVHTSS3MCS3 0x43 #define ODM_RATEVHTSS3MCS4 0x44 #define ODM_RATEVHTSS3MCS5 0x45 #define ODM_RATEVHTSS3MCS6 0x46 #define ODM_RATEVHTSS3MCS7 0x47 #define ODM_RATEVHTSS3MCS8 0x48 #define ODM_RATEVHTSS3MCS9 0x49 #define ODM_RATEVHTSS4MCS0 0x4A #define ODM_RATEVHTSS4MCS1 0x4B #define ODM_RATEVHTSS4MCS2 0x4C #define ODM_RATEVHTSS4MCS3 0x4D #define ODM_RATEVHTSS4MCS4 0x4E #define ODM_RATEVHTSS4MCS5 0x4F #define ODM_RATEVHTSS4MCS6 0x50 #define ODM_RATEVHTSS4MCS7 0x51 #define ODM_RATEVHTSS4MCS8 0x52 #define ODM_RATEVHTSS4MCS9 0x53 // // Define Different SW team support // #define ODM_AP 0x01 //BIT0 #define ODM_ADSL 0x02 //BIT1 #define ODM_CE 0x04 //BIT2 #define ODM_WIN 0x08 //BIT3 #define DM_ODM_SUPPORT_TYPE ODM_CE // Deifne HW endian support #define ODM_ENDIAN_BIG 0 #define ODM_ENDIAN_LITTLE 1 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #define GET_PDM_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->DM_OutSrc))) #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #define GET_PDM_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->odmpriv))) #endif #if (DM_ODM_SUPPORT_TYPE != ODM_WIN) #define RT_PCI_INTERFACE 1 #define RT_USB_INTERFACE 2 #define RT_SDIO_INTERFACE 3 #endif typedef enum _HAL_STATUS{ HAL_STATUS_SUCCESS, HAL_STATUS_FAILURE, /*RT_STATUS_PENDING, RT_STATUS_RESOURCE, RT_STATUS_INVALID_CONTEXT, RT_STATUS_INVALID_PARAMETER, RT_STATUS_NOT_SUPPORT, RT_STATUS_OS_API_FAILED,*/ }HAL_STATUS,*PHAL_STATUS; #if( DM_ODM_SUPPORT_TYPE == ODM_AP) #define MP_DRIVER 0 #endif #if(DM_ODM_SUPPORT_TYPE != ODM_WIN) #define VISTA_USB_RX_REVISE 0 // // Declare for ODM spin lock defintion temporarily fro compile pass. // typedef enum _RT_SPINLOCK_TYPE{ RT_TX_SPINLOCK = 1, RT_RX_SPINLOCK = 2, RT_RM_SPINLOCK = 3, RT_CAM_SPINLOCK = 4, RT_SCAN_SPINLOCK = 5, RT_LOG_SPINLOCK = 7, RT_BW_SPINLOCK = 8, RT_CHNLOP_SPINLOCK = 9, RT_RF_OPERATE_SPINLOCK = 10, RT_INITIAL_SPINLOCK = 11, RT_RF_STATE_SPINLOCK = 12, // For RF state. Added by Bruce, 2007-10-30. #if VISTA_USB_RX_REVISE RT_USBRX_CONTEXT_SPINLOCK = 13, RT_USBRX_POSTPROC_SPINLOCK = 14, // protect data of Adapter->IndicateW/ IndicateR #endif //Shall we define Ndis 6.2 SpinLock Here ? RT_PORT_SPINLOCK=16, RT_VNIC_SPINLOCK=17, RT_HVL_SPINLOCK=18, RT_H2C_SPINLOCK = 20, // For H2C cmd. Added by tynli. 2009.11.09. RT_BTData_SPINLOCK=25, RT_WAPI_OPTION_SPINLOCK=26, RT_WAPI_RX_SPINLOCK=27, // add for 92D CCK control issue RT_CCK_PAGEA_SPINLOCK = 28, RT_BUFFER_SPINLOCK = 29, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK = 30, RT_GEN_TEMP_BUF_SPINLOCK = 31, RT_AWB_SPINLOCK = 32, RT_FW_PS_SPINLOCK = 33, RT_HW_TIMER_SPIN_LOCK = 34, RT_MPT_WI_SPINLOCK = 35, RT_P2P_SPIN_LOCK = 36, // Protect P2P context RT_DBG_SPIN_LOCK = 37, RT_IQK_SPINLOCK = 38, RT_PENDED_OID_SPINLOCK = 39, RT_CHNLLIST_SPINLOCK = 40, RT_INDIC_SPINLOCK = 41, //protect indication RT_RFD_SPINLOCK = 42, RT_LAST_SPINLOCK, }RT_SPINLOCK_TYPE; #endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #define STA_INFO_T RT_WLAN_STA #define PSTA_INFO_T PRT_WLAN_STA // typedef unsigned long u4Byte,*pu4Byte; #define CONFIG_HW_ANTENNA_DIVERSITY #define CONFIG_SW_ANTENNA_DIVERSITY #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) // To let ADSL/AP project compile ok; it should be removed after all conflict are solved. Added by Annie, 2011-10-07. #define ADSL_AP_BUILD_WORKAROUND #define AP_BUILD_WORKAROUND //2 [ Configure Antenna Diversity ] #if defined(CONFIG_RTL_8881A_ANT_SWITCH) || defined(CONFIG_SLOT_0_ANT_SWITCH) || defined(CONFIG_SLOT_1_ANT_SWITCH) #define CONFIG_HW_ANTENNA_DIVERSITY #define ODM_EVM_ENHANCE_ANTDIV //---------- #if(!defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_2G_CGCS_RX_DIVERSITY) && !defined(CONFIG_2G_CG_TRX_DIVERSITY) && !defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) #define CONFIG_NO_2G_DIVERSITY #endif #ifdef CONFIG_NO_5G_DIVERSITY_8881A #define CONFIG_NO_5G_DIVERSITY #elif defined(CONFIG_5G_CGCS_RX_DIVERSITY_8881A) #define CONFIG_5G_CGCS_RX_DIVERSITY #elif defined(CONFIG_5G_CG_TRX_DIVERSITY_8881A) #define CONFIG_5G_CG_TRX_DIVERSITY #endif #if(!defined(CONFIG_NO_5G_DIVERSITY) && !defined(CONFIG_5G_CGCS_RX_DIVERSITY) && !defined(CONFIG_5G_CG_TRX_DIVERSITY) && !defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) #define CONFIG_NO_5G_DIVERSITY #endif //---------- #if ( defined(CONFIG_NO_2G_DIVERSITY) && defined(CONFIG_NO_5G_DIVERSITY) ) #define CONFIG_NOT_SUPPORT_ANTDIV #elif( !defined(CONFIG_NO_2G_DIVERSITY) && defined(CONFIG_NO_5G_DIVERSITY) ) #define CONFIG_2G_SUPPORT_ANTDIV #elif( defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_NO_5G_DIVERSITY) ) #define CONFIG_5G_SUPPORT_ANTDIV #elif( !defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_NO_5G_DIVERSITY) ) #define CONFIG_2G5G_SUPPORT_ANTDIV #endif //---------- #endif #ifdef AP_BUILD_WORKAROUND #include "../typedef.h" #else typedef void VOID,*PVOID; typedef unsigned char BOOLEAN,*PBOOLEAN; typedef unsigned char u1Byte,*pu1Byte; typedef unsigned short u2Byte,*pu2Byte; typedef unsigned int u4Byte,*pu4Byte; typedef unsigned long long u8Byte,*pu8Byte; #if 1 /* In ARM platform, system would use the type -- "char" as "unsigned char" * And we only use s1Byte/ps1Byte as INT8 now, so changes the type of s1Byte.*/ typedef signed char s1Byte,*ps1Byte; #else typedef char s1Byte,*ps1Byte; #endif typedef short s2Byte,*ps2Byte; typedef long s4Byte,*ps4Byte; typedef long long s8Byte,*ps8Byte; #endif typedef struct rtl8192cd_priv *prtl8192cd_priv; typedef struct stat_info STA_INFO_T,*PSTA_INFO_T; typedef struct timer_list RT_TIMER, *PRT_TIMER; typedef void * RT_TIMER_CALL_BACK; #ifdef CONFIG_PCI_HCI #define DEV_BUS_TYPE RT_PCI_INTERFACE #endif #define _TRUE 1 #define _FALSE 0 #elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL) // To let ADSL/AP project compile ok; it should be removed after all conflict are solved. Added by Annie, 2011-10-07. #define ADSL_AP_BUILD_WORKAROUND #define ADSL_BUILD_WORKAROUND // typedef unsigned char BOOLEAN,*PBOOLEAN; typedef unsigned char u1Byte,*pu1Byte; typedef unsigned short u2Byte,*pu2Byte; typedef unsigned int u4Byte,*pu4Byte; typedef unsigned long long u8Byte,*pu8Byte; #if 1 /* In ARM platform, system would use the type -- "char" as "unsigned char" * And we only use s1Byte/ps1Byte as INT8 now, so changes the type of s1Byte.*/ typedef signed char s1Byte,*ps1Byte; #else typedef char s1Byte,*ps1Byte; #endif typedef short s2Byte,*ps2Byte; typedef long s4Byte,*ps4Byte; typedef long long s8Byte,*ps8Byte; typedef struct rtl8192cd_priv *prtl8192cd_priv; typedef struct stat_info STA_INFO_T,*PSTA_INFO_T; typedef struct timer_list RT_TIMER, *PRT_TIMER; typedef void * RT_TIMER_CALL_BACK; #define DEV_BUS_TYPE RT_PCI_INTERFACE #define _TRUE 1 #define _FALSE 0 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #include #if 0 typedef u8 u1Byte, *pu1Byte; typedef u16 u2Byte,*pu2Byte; typedef u32 u4Byte,*pu4Byte; typedef u64 u8Byte,*pu8Byte; typedef s8 s1Byte,*ps1Byte; typedef s16 s2Byte,*ps2Byte; typedef s32 s4Byte,*ps4Byte; typedef s64 s8Byte,*ps8Byte; #else #define u1Byte u8 #define pu1Byte u8* #define u2Byte u16 #define pu2Byte u16* #define u4Byte u32 #define pu4Byte u32* #define u8Byte u64 #define pu8Byte u64* #define s1Byte s8 #define ps1Byte s8* #define s2Byte s16 #define ps2Byte s16* #define s4Byte s32 #define ps4Byte s32* #define s8Byte s64 #define ps8Byte s64* #endif #ifdef CONFIG_USB_HCI #define DEV_BUS_TYPE RT_USB_INTERFACE #elif defined(CONFIG_PCI_HCI) #define DEV_BUS_TYPE RT_PCI_INTERFACE #elif defined(CONFIG_SDIO_HCI) #define DEV_BUS_TYPE RT_SDIO_INTERFACE #elif defined(CONFIG_GSPI_HCI) #define DEV_BUS_TYPE RT_SDIO_INTERFACE #endif #if defined(CONFIG_LITTLE_ENDIAN) #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE #elif defined (CONFIG_BIG_ENDIAN) #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG #endif typedef struct timer_list RT_TIMER, *PRT_TIMER; typedef void * RT_TIMER_CALL_BACK; #define STA_INFO_T struct sta_info #define PSTA_INFO_T struct sta_info * #define TRUE _TRUE #define FALSE _FALSE #define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value) #define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value) #define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value) //define useless flag to avoid compile warning #define USE_WORKITEM 0 #define FOR_BRAZIL_PRETEST 0 #define FPGA_TWO_MAC_VERIFICATION 0 #define RTL8881A_SUPPORT 0 #endif #define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= ArrayLen) break; i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) #define COND_ELSE 2 #define COND_ENDIF 3 #endif // __ODM_TYPES_H__ rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/rtl8812a/000077500000000000000000000000001261122257400205475ustar00rootroot00000000000000rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/rtl8812a/HalHWImg8812A_BB.c000066400000000000000000001031011261122257400232760ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include "Mp_Precomp.h" #include "../phydm_precomp.h" #if (RTL8812A_SUPPORT == 1) static BOOLEAN CheckPositive( IN PDM_ODM_T pDM_Odm, IN const u4Byte Condition1, IN const u4Byte Condition2 ) { u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | // _GLNA ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | // _GPA ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | // _ALNA ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | // _APA ((pDM_Odm->BoardType & BIT2) >> 2) << 4; // _BT u4Byte cond1 = Condition1, cond2 = Condition2; u4Byte driver1 = pDM_Odm->CutVersion << 24 | pDM_Odm->SupportPlatform << 16 | pDM_Odm->PackageType << 12 | pDM_Odm->SupportInterface << 8 | _BoardType; u4Byte driver2 = pDM_Odm->TypeGLNA << 0 | pDM_Odm->TypeGPA << 8 | pDM_Odm->TypeALNA << 16 | pDM_Odm->TypeAPA << 24; ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> [8812A] CheckPositive (cond1, cond2) = (0x%X 0x%X)\n", cond1, cond2)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> [8812A] CheckPositive (driver1, driver2) = (0x%X 0x%X)\n", driver1, driver2)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, (" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, (" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->BoardType, pDM_Odm->PackageType)); //============== Value Defined Check ===============// //QFN Type [15:12] and Cut Version [27:24] need to do value check if(((cond1 & 0x0000F000) != 0) &&((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) return FALSE; if(((cond1 & 0x0F000000) != 0) &&((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) return FALSE; //=============== Bit Defined Check ================// // We don't care [31:28] and [23:20] // cond1 &= 0x000F0FFF; driver1 &= 0x000F0FFF; if ((cond1 & driver1) == cond1) { u4Byte bitMask = 0; if ((cond1 & 0x0F) == 0) // BoardType is DONTCARE return TRUE; if ((cond1 & BIT0) != 0) //GLNA bitMask |= 0x000000FF; if ((cond1 & BIT1) != 0) //GPA bitMask |= 0x0000FF00; if ((cond1 & BIT2) != 0) //ALNA bitMask |= 0x00FF0000; if ((cond1 & BIT3) != 0) //APA bitMask |= 0xFF000000; if ((cond2 & bitMask) == (driver2 & bitMask)) // BoardType of each RF path is matched return TRUE; else return FALSE; } else { return FALSE; } } static BOOLEAN CheckNegative( IN PDM_ODM_T pDM_Odm, IN const u4Byte Condition1, IN const u4Byte Condition2 ) { return TRUE; } /****************************************************************************** * AGC_TAB.TXT ******************************************************************************/ u4Byte Array_MP_8812A_AGC_TAB[] = { 0x80000001,0x00000000,0x40000000,0x00000000, 0x81C, 0xFC000001, 0x81C, 0xFB020001, 0x81C, 0xFA040001, 0x81C, 0xF9060001, 0x81C, 0xF8080001, 0x81C, 0xF70A0001, 0x81C, 0xF60C0001, 0x81C, 0xF50E0001, 0x81C, 0xF4100001, 0x81C, 0xF3120001, 0x81C, 0xF2140001, 0x81C, 0xF1160001, 0x81C, 0xF0180001, 0x81C, 0xEF1A0001, 0x81C, 0xEE1C0001, 0x81C, 0xED1E0001, 0x81C, 0xEC200001, 0x81C, 0xEB220001, 0x81C, 0xEA240001, 0x81C, 0xCD260001, 0x81C, 0xCC280001, 0x81C, 0xCB2A0001, 0x81C, 0xCA2C0001, 0x81C, 0xC92E0001, 0x81C, 0xC8300001, 0x81C, 0xA6320001, 0x81C, 0xA5340001, 0x81C, 0xA4360001, 0x81C, 0xA3380001, 0x81C, 0xA23A0001, 0x81C, 0x883C0001, 0x81C, 0x873E0001, 0x81C, 0x86400001, 0x81C, 0x85420001, 0x81C, 0x84440001, 0x81C, 0x83460001, 0x81C, 0x82480001, 0x81C, 0x814A0001, 0x81C, 0x484C0001, 0x81C, 0x474E0001, 0x81C, 0x46500001, 0x81C, 0x45520001, 0x81C, 0x44540001, 0x81C, 0x43560001, 0x81C, 0x42580001, 0x81C, 0x415A0001, 0x81C, 0x255C0001, 0x81C, 0x245E0001, 0x81C, 0x23600001, 0x81C, 0x22620001, 0x81C, 0x21640001, 0x81C, 0x21660001, 0x81C, 0x21680001, 0x81C, 0x216A0001, 0x81C, 0x216C0001, 0x81C, 0x216E0001, 0x81C, 0x21700001, 0x81C, 0x21720001, 0x81C, 0x21740001, 0x81C, 0x21760001, 0x81C, 0x21780001, 0x81C, 0x217A0001, 0x81C, 0x217C0001, 0x81C, 0x217E0001, 0x90000001,0x00000005,0x40000000,0x00000000, 0x81C, 0xF9000001, 0x81C, 0xF8020001, 0x81C, 0xF7040001, 0x81C, 0xF6060001, 0x81C, 0xF5080001, 0x81C, 0xF40A0001, 0x81C, 0xF30C0001, 0x81C, 0xF20E0001, 0x81C, 0xF1100001, 0x81C, 0xF0120001, 0x81C, 0xEF140001, 0x81C, 0xEE160001, 0x81C, 0xED180001, 0x81C, 0xEC1A0001, 0x81C, 0xEB1C0001, 0x81C, 0xEA1E0001, 0x81C, 0xCD200001, 0x81C, 0xCC220001, 0x81C, 0xCB240001, 0x81C, 0xCA260001, 0x81C, 0xC9280001, 0x81C, 0xC82A0001, 0x81C, 0xC72C0001, 0x81C, 0xC62E0001, 0x81C, 0xA5300001, 0x81C, 0xA4320001, 0x81C, 0xA3340001, 0x81C, 0xA2360001, 0x81C, 0x88380001, 0x81C, 0x873A0001, 0x81C, 0x863C0001, 0x81C, 0x853E0001, 0x81C, 0x84400001, 0x81C, 0x83420001, 0x81C, 0x82440001, 0x81C, 0x81460001, 0x81C, 0x48480001, 0x81C, 0x474A0001, 0x81C, 0x464C0001, 0x81C, 0x454E0001, 0x81C, 0x44500001, 0x81C, 0x43520001, 0x81C, 0x42540001, 0x81C, 0x41560001, 0x81C, 0x25580001, 0x81C, 0x245A0001, 0x81C, 0x235C0001, 0x81C, 0x225E0001, 0x81C, 0x21600001, 0x81C, 0x21620001, 0x81C, 0x21640001, 0x81C, 0x21660001, 0x81C, 0x21680001, 0x81C, 0x216A0001, 0x81C, 0x236C0001, 0x81C, 0x226E0001, 0x81C, 0x21700001, 0x81C, 0x21720001, 0x81C, 0x21740001, 0x81C, 0x21760001, 0x81C, 0x21780001, 0x81C, 0x217A0001, 0x81C, 0x217C0001, 0x81C, 0x217E0001, 0xA0000000,0x00000000, 0x81C, 0xFF000001, 0x81C, 0xFF020001, 0x81C, 0xFF040001, 0x81C, 0xFF060001, 0x81C, 0xFF080001, 0x81C, 0xFE0A0001, 0x81C, 0xFD0C0001, 0x81C, 0xFC0E0001, 0x81C, 0xFB100001, 0x81C, 0xFA120001, 0x81C, 0xF9140001, 0x81C, 0xF8160001, 0x81C, 0xF7180001, 0x81C, 0xF61A0001, 0x81C, 0xF51C0001, 0x81C, 0xF41E0001, 0x81C, 0xF3200001, 0x81C, 0xF2220001, 0x81C, 0xF1240001, 0x81C, 0xF0260001, 0x81C, 0xEF280001, 0x81C, 0xEE2A0001, 0x81C, 0xED2C0001, 0x81C, 0xEC2E0001, 0x81C, 0xEB300001, 0x81C, 0xEA320001, 0x81C, 0xE9340001, 0x81C, 0xE8360001, 0x81C, 0xE7380001, 0x81C, 0xE63A0001, 0x81C, 0xE53C0001, 0x81C, 0xC73E0001, 0x81C, 0xC6400001, 0x81C, 0xC5420001, 0x81C, 0xC4440001, 0x81C, 0xC3460001, 0x81C, 0xC2480001, 0x81C, 0xC14A0001, 0x81C, 0xA74C0001, 0x81C, 0xA64E0001, 0x81C, 0xA5500001, 0x81C, 0xA4520001, 0x81C, 0xA3540001, 0x81C, 0xA2560001, 0x81C, 0xA1580001, 0x81C, 0x675A0001, 0x81C, 0x665C0001, 0x81C, 0x655E0001, 0x81C, 0x64600001, 0x81C, 0x63620001, 0x81C, 0x48640001, 0x81C, 0x47660001, 0x81C, 0x46680001, 0x81C, 0x456A0001, 0x81C, 0x446C0001, 0x81C, 0x436E0001, 0x81C, 0x42700001, 0x81C, 0x41720001, 0x81C, 0x41740001, 0x81C, 0x41760001, 0x81C, 0x41780001, 0x81C, 0x417A0001, 0x81C, 0x417C0001, 0x81C, 0x417E0001, 0xB0000000,0x00000000, 0x80000004,0x00000000,0x40000000,0x00000000, 0x81C, 0xFC800001, 0x81C, 0xFB820001, 0x81C, 0xFA840001, 0x81C, 0xF9860001, 0x81C, 0xF8880001, 0x81C, 0xF78A0001, 0x81C, 0xF68C0001, 0x81C, 0xF58E0001, 0x81C, 0xF4900001, 0x81C, 0xF3920001, 0x81C, 0xF2940001, 0x81C, 0xF1960001, 0x81C, 0xF0980001, 0x81C, 0xEF9A0001, 0x81C, 0xEE9C0001, 0x81C, 0xED9E0001, 0x81C, 0xECA00001, 0x81C, 0xEBA20001, 0x81C, 0xEAA40001, 0x81C, 0xE9A60001, 0x81C, 0xE8A80001, 0x81C, 0xE7AA0001, 0x81C, 0xE6AC0001, 0x81C, 0xE5AE0001, 0x81C, 0xE4B00001, 0x81C, 0xE3B20001, 0x81C, 0xA8B40001, 0x81C, 0xA7B60001, 0x81C, 0xA6B80001, 0x81C, 0xA5BA0001, 0x81C, 0xA4BC0001, 0x81C, 0xA3BE0001, 0x81C, 0xA2C00001, 0x81C, 0xA1C20001, 0x81C, 0x68C40001, 0x81C, 0x67C60001, 0x81C, 0x66C80001, 0x81C, 0x65CA0001, 0x81C, 0x64CC0001, 0x81C, 0x47CE0001, 0x81C, 0x46D00001, 0x81C, 0x45D20001, 0x81C, 0x44D40001, 0x81C, 0x43D60001, 0x81C, 0x42D80001, 0x81C, 0x08DA0001, 0x81C, 0x07DC0001, 0x81C, 0x06DE0001, 0x81C, 0x05E00001, 0x81C, 0x04E20001, 0x81C, 0x03E40001, 0x81C, 0x02E60001, 0x81C, 0x01E80001, 0x81C, 0x01EA0001, 0x81C, 0x01EC0001, 0x81C, 0x01EE0001, 0x81C, 0x01F00001, 0x81C, 0x01F20001, 0x81C, 0x01F40001, 0x81C, 0x01F60001, 0x81C, 0x01F80001, 0x81C, 0x01FA0001, 0x81C, 0x01FC0001, 0x81C, 0x01FE0001, 0xA0000000,0x00000000, 0x81C, 0xFF800001, 0x81C, 0xFF820001, 0x81C, 0xFF840001, 0x81C, 0xFE860001, 0x81C, 0xFD880001, 0x81C, 0xFC8A0001, 0x81C, 0xFB8C0001, 0x81C, 0xFA8E0001, 0x81C, 0xF9900001, 0x81C, 0xF8920001, 0x81C, 0xF7940001, 0x81C, 0xF6960001, 0x81C, 0xF5980001, 0x81C, 0xF49A0001, 0x81C, 0xF39C0001, 0x81C, 0xF29E0001, 0x81C, 0xF1A00001, 0x81C, 0xF0A20001, 0x81C, 0xEFA40001, 0x81C, 0xEEA60001, 0x81C, 0xEDA80001, 0x81C, 0xECAA0001, 0x81C, 0xEBAC0001, 0x81C, 0xEAAE0001, 0x81C, 0xE9B00001, 0x81C, 0xE8B20001, 0x81C, 0xE7B40001, 0x81C, 0xE6B60001, 0x81C, 0xE5B80001, 0x81C, 0xE4BA0001, 0x81C, 0xE3BC0001, 0x81C, 0xA8BE0001, 0x81C, 0xA7C00001, 0x81C, 0xA6C20001, 0x81C, 0xA5C40001, 0x81C, 0xA4C60001, 0x81C, 0xA3C80001, 0x81C, 0xA2CA0001, 0x81C, 0xA1CC0001, 0x81C, 0x68CE0001, 0x81C, 0x67D00001, 0x81C, 0x66D20001, 0x81C, 0x65D40001, 0x81C, 0x64D60001, 0x81C, 0x47D80001, 0x81C, 0x46DA0001, 0x81C, 0x45DC0001, 0x81C, 0x44DE0001, 0x81C, 0x43E00001, 0x81C, 0x42E20001, 0x81C, 0x08E40001, 0x81C, 0x07E60001, 0x81C, 0x06E80001, 0x81C, 0x05EA0001, 0x81C, 0x04EC0001, 0x81C, 0x03EE0001, 0x81C, 0x02F00001, 0x81C, 0x01F20001, 0x81C, 0x01F40001, 0x81C, 0x01F60001, 0x81C, 0x01F80001, 0x81C, 0x01FA0001, 0x81C, 0x01FC0001, 0x81C, 0x01FE0001, 0xB0000000,0x00000000, 0xC50, 0x00000022, 0xC50, 0x00000020, 0xE50, 0x00000022, 0xE50, 0x00000020, }; void ODM_ReadAndConfig_MP_8812A_AGC_TAB( IN PDM_ODM_T pDM_Odm ) { u4Byte i = 0; u1Byte cCond; BOOLEAN bMatched = TRUE, bSkipped = FALSE; //ask by Luke.Lee u4Byte ArrayLen = sizeof(Array_MP_8812A_AGC_TAB)/sizeof(u4Byte); pu4Byte Array = Array_MP_8812A_AGC_TAB; ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8812A_AGC_TAB\n")); while(( i+1) < ArrayLen) { u4Byte v1 = Array[i]; u4Byte v2 = Array[i+1]; if(v1 & (BIT31|BIT30)) //positive & negative condition { if(v1 & BIT31) // positive condition { cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); if(cCond == COND_ENDIF) //end { bMatched = TRUE; bSkipped = FALSE; } else if(cCond == COND_ELSE) //else { bMatched = bSkipped?FALSE:TRUE; } else //if , else if { if(bSkipped) bMatched = FALSE; else { if(CheckPositive(pDM_Odm, v1, v2)) { bMatched = TRUE; bSkipped = TRUE; } else { bMatched = FALSE; bSkipped = FALSE; } } } } else if(v1 & BIT30){ //negative condition //do nothing } } else { if(bMatched) odm_ConfigBB_AGC_8812A(pDM_Odm, v1, bMaskDWord, v2); } i = i + 2; } } u4Byte ODM_GetVersion_MP_8812A_AGC_TAB(void) { return 49; } /****************************************************************************** * AGC_TAB_DIFF.TXT ******************************************************************************/ u4Byte Array_MP_8812A_AGC_TAB_DIFF_LB[] = { 0x80000004,0x00000000,0x40000000,0x00000000, 0x81C, 0x47CE0001, 0x81C, 0x46D00001, 0x81C, 0x45D20001, 0x81C, 0x44D40001, 0x81C, 0x43D60001, 0x81C, 0x42D80001, 0x81C, 0x08DA0001, 0x81C, 0x07DC0001, 0x81C, 0x06DE0001, 0x81C, 0x05E00001, 0x81C, 0x04E20001, 0x81C, 0x03E40001, 0x81C, 0x02E60001, 0xA0000000,0x00000000, 0x81C, 0x47D80001, 0x81C, 0x46DA0001, 0x81C, 0x45DC0001, 0x81C, 0x44DE0001, 0x81C, 0x43E00001, 0x81C, 0x42E20001, 0x81C, 0x08E40001, 0x81C, 0x07E60001, 0x81C, 0x06E80001, 0x81C, 0x05EA0001, 0x81C, 0x04EC0001, 0x81C, 0x03EE0001, 0x81C, 0x02F00001, 0xB0000000,0x00000000, }; u4Byte Array_MP_8812A_AGC_TAB_DIFF_HB[] = { 0x80000004,0x00000000,0x40000000,0x00000000, 0x81C, 0x45CE0001, 0x81C, 0x44D00001, 0x81C, 0x43D20001, 0x81C, 0x42D40001, 0x81C, 0x08D60001, 0x81C, 0x07D80001, 0x81C, 0x06DA0001, 0x81C, 0x05DC0001, 0x81C, 0x04DE0001, 0x81C, 0x03E00001, 0x81C, 0x02E20001, 0x81C, 0x01E40001, 0x81C, 0x01E60001, 0xA0000000,0x00000000, 0x81C, 0x45D80001, 0x81C, 0x44DA0001, 0x81C, 0x43DC0001, 0x81C, 0x42DE0001, 0x81C, 0x08E00001, 0x81C, 0x07E20001, 0x81C, 0x06E40001, 0x81C, 0x05E60001, 0x81C, 0x04E80001, 0x81C, 0x03EA0001, 0x81C, 0x02EC0001, 0x81C, 0x01EE0001, 0x81C, 0x01F00001, 0xB0000000,0x00000000, }; void ODM_ReadAndConfig_MP_8812A_AGC_TAB_DIFF( IN PDM_ODM_T pDM_Odm, IN u4Byte Array[], IN u4Byte ArrayLen ) { u4Byte i = 0; u1Byte cCond; BOOLEAN bMatched = TRUE, bSkipped = FALSE; //ask by Luke.Lee ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8812A_AGC_TAB_DIFF\n")); while(( i+1) < ArrayLen) { u4Byte v1 = Array[i]; u4Byte v2 = Array[i+1]; if(v1 & (BIT31|BIT30)) //positive & negative condition { if(v1 & BIT31) // positive condition { cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); if(cCond == COND_ENDIF) //end { bMatched = TRUE; bSkipped = FALSE; } else if(cCond == COND_ELSE) //else { bMatched = bSkipped?FALSE:TRUE; } else //if , else if { if(bSkipped) bMatched = FALSE; else { if(CheckPositive(pDM_Odm, v1, v2)) { bMatched = TRUE; bSkipped = TRUE; } else { bMatched = FALSE; bSkipped = FALSE; } } } } else if(v1 & BIT30){ //negative condition //do nothing } } else { if(bMatched) odm_ConfigBB_AGC_8812A(pDM_Odm, v1, bMaskDWord, v2); } i = i + 2; } } u4Byte ODM_GetVersion_MP_8812A_AGC_TAB_DIFF(void) { return 49; } /****************************************************************************** * PHY_REG.TXT ******************************************************************************/ u4Byte Array_MP_8812A_PHY_REG[] = { 0x800, 0x8020D010, 0x804, 0x080112E0, 0x808, 0x0E028233, 0x80C, 0x12131113, 0x810, 0x20101263, 0x814, 0x020C3D10, 0x818, 0x03A00385, 0x820, 0x00000000, 0x824, 0x00030FE0, 0x828, 0x00000000, 0x82C, 0x002083DD, 0x830, 0x2EAAEEB8, 0x834, 0x0037A706, 0x838, 0x06C89B44, 0x83C, 0x0000095B, 0x840, 0xC0000001, 0x844, 0x40003CDE, 0x848, 0x6210FF8B, 0x84C, 0x6CFDFFB8, 0x850, 0x28874706, 0x854, 0x0001520C, 0x858, 0x8060E000, 0x85C, 0x74210168, 0x860, 0x6929C321, 0x864, 0x79727432, 0x868, 0x8CA7A314, 0x86C, 0x338C2878, 0x870, 0x03333333, 0x874, 0x31602C2E, 0x878, 0x00003152, 0x87C, 0x000FC000, 0x8A0, 0x00000013, 0x8A4, 0x7F7F7F7F, 0x8A8, 0xA202033E, 0x8AC, 0x0FF0FA0A, 0x8B0, 0x00000600, 0x8B4, 0x000FC080, 0x8B8, 0x6C0057FF, 0x8BC, 0x4CA520A3, 0x8C0, 0x27F00020, 0x8C4, 0x00000000, 0x8C8, 0x00012D69, 0x8CC, 0x08248492, 0x8D0, 0x0000B800, 0x8DC, 0x00000000, 0x8D4, 0x940008A0, 0x8D8, 0x290B5612, 0x8F8, 0x400002C0, 0x8FC, 0x00000000, 0x900, 0x00000701, 0x90C, 0x00000000, 0x910, 0x0000FC00, 0x914, 0x00000404, 0x918, 0x1C1028C0, 0x91C, 0x64B11A1C, 0x920, 0xE0767233, 0x924, 0x055AA500, 0x928, 0x00000004, 0x92C, 0xFFFE0000, 0x930, 0xFFFFFFFE, 0x934, 0x001FFFFF, 0x960, 0x00000000, 0x964, 0x00000000, 0x968, 0x00000000, 0x96C, 0x00000000, 0x970, 0x801FFFFF, 0x978, 0x00000000, 0x97C, 0x00000000, 0x980, 0x00000000, 0x984, 0x00000000, 0x988, 0x00000000, 0x990, 0x27100000, 0x994, 0xFFFF0100, 0x998, 0xFFFFFF5C, 0x99C, 0xFFFFFFFF, 0x9A0, 0x000000FF, 0x9A4, 0x00080080, 0x9A8, 0x00000000, 0x9AC, 0x00000000, 0x9B0, 0x81081008, 0x9B4, 0x00000000, 0x9B8, 0x01081008, 0x9BC, 0x01081008, 0x9D0, 0x00000000, 0x9D4, 0x00000000, 0x9D8, 0x00000000, 0x9DC, 0x00000000, 0x9E4, 0x00000003, 0x9E8, 0x000002D5, 0xA00, 0x00D047C8, 0xA04, 0x01FF000C, 0xA08, 0x8C838300, 0xA0C, 0x2E7F000F, 0xA10, 0x9500BB78, 0xA14, 0x11144028, 0xA18, 0x00881117, 0xA1C, 0x89140F00, 0xA20, 0x1A1B0000, 0xA24, 0x090E1317, 0xA28, 0x00000204, 0xA2C, 0x00900000, 0xA70, 0x101FFF00, 0xA74, 0x00000008, 0xA78, 0x00000900, 0xA7C, 0x225B0606, 0xA80, 0x218075B2, 0xA84, 0x001F8C80, 0xB00, 0x03100000, 0xB04, 0x0000B000, 0xB08, 0xAE0201EB, 0xB0C, 0x01003207, 0xB10, 0x00009807, 0xB14, 0x01000000, 0xB18, 0x00000002, 0xB1C, 0x00000002, 0xB20, 0x0000001F, 0xB24, 0x03020100, 0xB28, 0x07060504, 0xB2C, 0x0B0A0908, 0xB30, 0x0F0E0D0C, 0xB34, 0x13121110, 0xB38, 0x17161514, 0xB3C, 0x0000003A, 0xB40, 0x00000000, 0xB44, 0x00000000, 0xB48, 0x13000032, 0xB4C, 0x48080000, 0xB50, 0x00000000, 0xB54, 0x00000000, 0xB58, 0x00000000, 0xB5C, 0x00000000, 0xC00, 0x00000007, 0xC04, 0x00042020, 0xC08, 0x80410231, 0xC0C, 0x00000000, 0xC10, 0x00000100, 0xC14, 0x01000000, 0xC1C, 0x40000003, 0xC20, 0x12121212, 0xC24, 0x12121212, 0xC28, 0x12121212, 0xC2C, 0x12121212, 0xC30, 0x12121212, 0xC34, 0x12121212, 0xC38, 0x12121212, 0xC3C, 0x12121212, 0xC40, 0x12121212, 0xC44, 0x12121212, 0xC48, 0x12121212, 0xC4C, 0x12121212, 0xC50, 0x00000020, 0xC54, 0x0008121C, 0xC58, 0x30000C1C, 0xC5C, 0x00000058, 0xC60, 0x34344443, 0xC64, 0x07003333, 0x80000008,0x00000000,0x40000000,0x00000000, 0xC68, 0x59791979, 0x90000008,0x05000000,0x40000000,0x00000000, 0xC68, 0x59791979, 0x90000002,0x00000000,0x40000000,0x00000000, 0xC68, 0x59791979, 0x90000004,0x00000000,0x40000000,0x00000000, 0xC68, 0x59791979, 0x90000001,0x00000000,0x40000000,0x00000000, 0xC68, 0x59791979, 0x90000001,0x00000005,0x40000000,0x00000000, 0xC68, 0x59791979, 0xA0000000,0x00000000, 0xC68, 0x59799979, 0xB0000000,0x00000000, 0xC6C, 0x59795979, 0xC70, 0x19795979, 0xC74, 0x19795979, 0xC78, 0x19791979, 0xC7C, 0x19791979, 0xC80, 0x19791979, 0xC84, 0x19791979, 0xC94, 0x0100005C, 0xC98, 0x00000000, 0xC9C, 0x00000000, 0xCA0, 0x00000029, 0xCA4, 0x08040201, 0xCA8, 0x80402010, 0xCB0, 0x77547777, 0xCB4, 0x00000077, 0xCB8, 0x00508242, 0xE00, 0x00000007, 0xE04, 0x00042020, 0xE08, 0x80410231, 0xE0C, 0x00000000, 0xE10, 0x00000100, 0xE14, 0x01000000, 0xE1C, 0x40000003, 0xE20, 0x12121212, 0xE24, 0x12121212, 0xE28, 0x12121212, 0xE2C, 0x12121212, 0xE30, 0x12121212, 0xE34, 0x12121212, 0xE38, 0x12121212, 0xE3C, 0x12121212, 0xE40, 0x12121212, 0xE44, 0x12121212, 0xE48, 0x12121212, 0xE4C, 0x12121212, 0xE50, 0x00000020, 0xE54, 0x0008121C, 0xE58, 0x30000C1C, 0xE5C, 0x00000058, 0xE60, 0x34344443, 0xE64, 0x07003333, 0xE68, 0x59791979, 0xE6C, 0x59795979, 0xE70, 0x19795979, 0xE74, 0x19795979, 0xE78, 0x19791979, 0xE7C, 0x19791979, 0xE80, 0x19791979, 0xE84, 0x19791979, 0xE94, 0x0100005C, 0xE98, 0x00000000, 0xE9C, 0x00000000, 0xEA0, 0x00000029, 0xEA4, 0x08040201, 0xEA8, 0x80402010, 0xEB0, 0x77547777, 0xEB4, 0x00000077, 0xEB8, 0x00508242, }; void ODM_ReadAndConfig_MP_8812A_PHY_REG( IN PDM_ODM_T pDM_Odm ) { u4Byte i = 0; u1Byte cCond; BOOLEAN bMatched = TRUE, bSkipped = FALSE; //ask by Luke.Lee u4Byte ArrayLen = sizeof(Array_MP_8812A_PHY_REG)/sizeof(u4Byte); pu4Byte Array = Array_MP_8812A_PHY_REG; ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8812A_PHY_REG\n")); while(( i+1) < ArrayLen) { u4Byte v1 = Array[i]; u4Byte v2 = Array[i+1]; if(v1 & (BIT31|BIT30)) //positive & negative condition { if(v1 & BIT31) // positive condition { cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); if(cCond == COND_ENDIF) //end { bMatched = TRUE; bSkipped = FALSE; } else if(cCond == COND_ELSE) //else { bMatched = bSkipped?FALSE:TRUE; } else //if , else if { if(bSkipped) bMatched = FALSE; else { if(CheckPositive(pDM_Odm, v1, v2)) { bMatched = TRUE; bSkipped = TRUE; } else { bMatched = FALSE; bSkipped = FALSE; } } } } else if(v1 & BIT30){ //negative condition //do nothing } } else { if(bMatched) odm_ConfigBB_PHY_8812A(pDM_Odm, v1, bMaskDWord, v2); } i = i + 2; } } u4Byte ODM_GetVersion_MP_8812A_PHY_REG(void) { return 49; } /****************************************************************************** * PHY_REG_MP.TXT ******************************************************************************/ u4Byte Array_MP_8812A_PHY_REG_MP[] = { 0x800, 0x8020D410, 0x830, 0x2EAA8EB8, }; void ODM_ReadAndConfig_MP_8812A_PHY_REG_MP( IN PDM_ODM_T pDM_Odm ) { u4Byte i = 0; u1Byte cCond; BOOLEAN bMatched = TRUE, bSkipped = FALSE; //ask by Luke.Lee u4Byte ArrayLen = sizeof(Array_MP_8812A_PHY_REG_MP)/sizeof(u4Byte); pu4Byte Array = Array_MP_8812A_PHY_REG_MP; ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8812A_PHY_REG_MP\n")); while(( i+1) < ArrayLen) { u4Byte v1 = Array[i]; u4Byte v2 = Array[i+1]; if(v1 & (BIT31|BIT30)) //positive & negative condition { if(v1 & BIT31) // positive condition { cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); if(cCond == COND_ENDIF) //end { bMatched = TRUE; bSkipped = FALSE; } else if(cCond == COND_ELSE) //else { bMatched = bSkipped?FALSE:TRUE; } else //if , else if { if(bSkipped) bMatched = FALSE; else { if(CheckPositive(pDM_Odm, v1, v2)) { bMatched = TRUE; bSkipped = TRUE; } else { bMatched = FALSE; bSkipped = FALSE; } } } } else if(v1 & BIT30){ //negative condition //do nothing } } else { if(bMatched) odm_ConfigBB_PHY_8812A(pDM_Odm, v1, bMaskDWord, v2); } i = i + 2; } } u4Byte ODM_GetVersion_MP_8812A_PHY_REG_MP(void) { return 49; } /****************************************************************************** * PHY_REG_PG.TXT ******************************************************************************/ u4Byte Array_MP_8812A_PHY_REG_PG[] = { 0, 0, 0, 0x00000c20, 0xffffffff, 0x34363840, 0, 0, 0, 0x00000c24, 0xffffffff, 0x42424444, 0, 0, 0, 0x00000c28, 0xffffffff, 0x30323638, 0, 0, 0, 0x00000c2c, 0xffffffff, 0x40424444, 0, 0, 0, 0x00000c30, 0xffffffff, 0x28303236, 0, 0, 1, 0x00000c34, 0xffffffff, 0x38404242, 0, 0, 1, 0x00000c38, 0xffffffff, 0x26283034, 0, 0, 0, 0x00000c3c, 0xffffffff, 0x40424444, 0, 0, 0, 0x00000c40, 0xffffffff, 0x28303236, 0, 0, 0, 0x00000c44, 0xffffffff, 0x42422426, 0, 0, 1, 0x00000c48, 0xffffffff, 0x30343840, 0, 0, 1, 0x00000c4c, 0xffffffff, 0x22242628, 0, 1, 0, 0x00000e20, 0xffffffff, 0x34363840, 0, 1, 0, 0x00000e24, 0xffffffff, 0x42424444, 0, 1, 0, 0x00000e28, 0xffffffff, 0x30323638, 0, 1, 0, 0x00000e2c, 0xffffffff, 0x40424444, 0, 1, 0, 0x00000e30, 0xffffffff, 0x28303236, 0, 1, 1, 0x00000e34, 0xffffffff, 0x38404242, 0, 1, 1, 0x00000e38, 0xffffffff, 0x26283034, 0, 1, 0, 0x00000e3c, 0xffffffff, 0x40424444, 0, 1, 0, 0x00000e40, 0xffffffff, 0x28303236, 0, 1, 0, 0x00000e44, 0xffffffff, 0x42422426, 0, 1, 1, 0x00000e48, 0xffffffff, 0x30343840, 0, 1, 1, 0x00000e4c, 0xffffffff, 0x22242628, 1, 0, 0, 0x00000c24, 0xffffffff, 0x42424444, 1, 0, 0, 0x00000c28, 0xffffffff, 0x30323640, 1, 0, 0, 0x00000c2c, 0xffffffff, 0x40424444, 1, 0, 0, 0x00000c30, 0xffffffff, 0x28303236, 1, 0, 1, 0x00000c34, 0xffffffff, 0x38404242, 1, 0, 1, 0x00000c38, 0xffffffff, 0x26283034, 1, 0, 0, 0x00000c3c, 0xffffffff, 0x40424444, 1, 0, 0, 0x00000c40, 0xffffffff, 0x28303236, 1, 0, 0, 0x00000c44, 0xffffffff, 0x42422426, 1, 0, 1, 0x00000c48, 0xffffffff, 0x30343840, 1, 0, 1, 0x00000c4c, 0xffffffff, 0x22242628, 1, 1, 0, 0x00000e24, 0xffffffff, 0x42424444, 1, 1, 0, 0x00000e28, 0xffffffff, 0x30323640, 1, 1, 0, 0x00000e2c, 0xffffffff, 0x40424444, 1, 1, 0, 0x00000e30, 0xffffffff, 0x28303236, 1, 1, 1, 0x00000e34, 0xffffffff, 0x38404242, 1, 1, 1, 0x00000e38, 0xffffffff, 0x26283034, 1, 1, 0, 0x00000e3c, 0xffffffff, 0x40424444, 1, 1, 0, 0x00000e40, 0xffffffff, 0x28303236, 1, 1, 0, 0x00000e44, 0xffffffff, 0x42422426, 1, 1, 1, 0x00000e48, 0xffffffff, 0x30343840, 1, 1, 1, 0x00000e4c, 0xffffffff, 0x22242628 }; void ODM_ReadAndConfig_MP_8812A_PHY_REG_PG( IN PDM_ODM_T pDM_Odm ) { u4Byte i = 0; u4Byte ArrayLen = sizeof(Array_MP_8812A_PHY_REG_PG)/sizeof(u4Byte); pu4Byte Array = Array_MP_8812A_PHY_REG_PG; ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8812A_PHY_REG_PG\n")); pDM_Odm->PhyRegPgVersion = 1; pDM_Odm->PhyRegPgValueType = PHY_REG_PG_EXACT_VALUE; for (i = 0; i < ArrayLen; i += 6 ) { u4Byte v1 = Array[i]; u4Byte v2 = Array[i+1]; u4Byte v3 = Array[i+2]; u4Byte v4 = Array[i+3]; u4Byte v5 = Array[i+4]; u4Byte v6 = Array[i+5]; odm_ConfigBB_PHY_REG_PG_8812A(pDM_Odm, v1, v2, v3, v4, v5, v6); } } /****************************************************************************** * PHY_REG_PG_ASUS.TXT ******************************************************************************/ u4Byte Array_MP_8812A_PHY_REG_PG_ASUS[] = { 0, 0, 0, 0x00000c20, 0xffffffff, 0x34343434, 0, 0, 0, 0x00000c24, 0xffffffff, 0x32323232, 0, 0, 0, 0x00000c28, 0xffffffff, 0x28303232, 0, 0, 0, 0x00000c2c, 0xffffffff, 0x32323232, 0, 0, 0, 0x00000c30, 0xffffffff, 0x28303232, 0, 0, 1, 0x00000c34, 0xffffffff, 0x32323232, 0, 0, 1, 0x00000c38, 0xffffffff, 0x26283032, 0, 0, 0, 0x00000c3c, 0xffffffff, 0x32323232, 0, 0, 0, 0x00000c40, 0xffffffff, 0x28303232, 0, 0, 0, 0x00000c44, 0xffffffff, 0x32322426, 0, 0, 1, 0x00000c48, 0xffffffff, 0x32323232, 0, 0, 1, 0x00000c4c, 0xffffffff, 0x24262830, 0, 1, 0, 0x00000e20, 0xffffffff, 0x34343434, 0, 1, 0, 0x00000e24, 0xffffffff, 0x32323232, 0, 1, 0, 0x00000e28, 0xffffffff, 0x28303232, 0, 1, 0, 0x00000e2c, 0xffffffff, 0x32323232, 0, 1, 0, 0x00000e30, 0xffffffff, 0x28303232, 0, 1, 1, 0x00000e34, 0xffffffff, 0x32323232, 0, 1, 1, 0x00000e38, 0xffffffff, 0x26283032, 0, 1, 0, 0x00000e3c, 0xffffffff, 0x32323232, 0, 1, 0, 0x00000e40, 0xffffffff, 0x28303232, 0, 1, 0, 0x00000e44, 0xffffffff, 0x32322426, 0, 1, 1, 0x00000e48, 0xffffffff, 0x32323232, 0, 1, 1, 0x00000e4c, 0xffffffff, 0x24262830, 1, 0, 0, 0x00000c24, 0xffffffff, 0x32323232, 1, 0, 0, 0x00000c28, 0xffffffff, 0x28303232, 1, 0, 0, 0x00000c2c, 0xffffffff, 0x32323232, 1, 0, 0, 0x00000c30, 0xffffffff, 0x24262830, 1, 0, 1, 0x00000c34, 0xffffffff, 0x32323232, 1, 0, 1, 0x00000c38, 0xffffffff, 0x24262830, 1, 0, 0, 0x00000c3c, 0xffffffff, 0x32323232, 1, 0, 0, 0x00000c40, 0xffffffff, 0x24262830, 1, 0, 0, 0x00000c44, 0xffffffff, 0x32322222, 1, 0, 1, 0x00000c48, 0xffffffff, 0x28303232, 1, 0, 1, 0x00000c4c, 0xffffffff, 0x22222426, 1, 1, 0, 0x00000e24, 0xffffffff, 0x32323232, 1, 1, 0, 0x00000e28, 0xffffffff, 0x28303232, 1, 1, 0, 0x00000e2c, 0xffffffff, 0x32323232, 1, 1, 0, 0x00000e30, 0xffffffff, 0x24262830, 1, 1, 1, 0x00000e34, 0xffffffff, 0x32323232, 1, 1, 1, 0x00000e38, 0xffffffff, 0x24262830, 1, 1, 0, 0x00000e3c, 0xffffffff, 0x32323232, 1, 1, 0, 0x00000e40, 0xffffffff, 0x24262830, 1, 1, 0, 0x00000e44, 0xffffffff, 0x32322222, 1, 1, 1, 0x00000e48, 0xffffffff, 0x28303232, 1, 1, 1, 0x00000e4c, 0xffffffff, 0x22222426 }; void ODM_ReadAndConfig_MP_8812A_PHY_REG_PG_ASUS( IN PDM_ODM_T pDM_Odm ) { u4Byte i = 0; u4Byte ArrayLen = sizeof(Array_MP_8812A_PHY_REG_PG_ASUS)/sizeof(u4Byte); pu4Byte Array = Array_MP_8812A_PHY_REG_PG_ASUS; ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8812A_PHY_REG_PG_ASUS\n")); pDM_Odm->PhyRegPgVersion = 1; pDM_Odm->PhyRegPgValueType = PHY_REG_PG_EXACT_VALUE; for (i = 0; i < ArrayLen; i += 6 ) { u4Byte v1 = Array[i]; u4Byte v2 = Array[i+1]; u4Byte v3 = Array[i+2]; u4Byte v4 = Array[i+3]; u4Byte v5 = Array[i+4]; u4Byte v6 = Array[i+5]; odm_ConfigBB_PHY_REG_PG_8812A(pDM_Odm, v1, v2, v3, v4, v5, v6); } } /****************************************************************************** * PHY_REG_PG_NEC.TXT ******************************************************************************/ u4Byte Array_MP_8812A_PHY_REG_PG_NEC[] = { 0, 0, 0, 0x00000c20, 0xffffffff, 0x32323232, 0, 0, 0, 0x00000c24, 0xffffffff, 0x32343434, 0, 0, 0, 0x00000c28, 0xffffffff, 0x24262830, 0, 0, 0, 0x00000c2c, 0xffffffff, 0x32343434, 0, 0, 0, 0x00000c30, 0xffffffff, 0x24262830, 0, 0, 1, 0x00000c34, 0xffffffff, 0x32343434, 0, 0, 1, 0x00000c38, 0xffffffff, 0x24262830, 0, 0, 0, 0x00000c3c, 0xffffffff, 0x32343434, 0, 0, 0, 0x00000c40, 0xffffffff, 0x24262830, 0, 0, 0, 0x00000c44, 0xffffffff, 0x34342022, 0, 0, 1, 0x00000c48, 0xffffffff, 0x28303234, 0, 0, 1, 0x00000c4c, 0xffffffff, 0x20222426, 0, 1, 0, 0x00000e20, 0xffffffff, 0x32323232, 0, 1, 0, 0x00000e24, 0xffffffff, 0x32343434, 0, 1, 0, 0x00000e28, 0xffffffff, 0x24262830, 0, 1, 0, 0x00000e2c, 0xffffffff, 0x32343434, 0, 1, 0, 0x00000e30, 0xffffffff, 0x24262830, 0, 1, 1, 0x00000e34, 0xffffffff, 0x32343434, 0, 1, 1, 0x00000e38, 0xffffffff, 0x24262830, 0, 1, 0, 0x00000e3c, 0xffffffff, 0x32343434, 0, 1, 0, 0x00000e40, 0xffffffff, 0x24262830, 0, 1, 0, 0x00000e44, 0xffffffff, 0x34342022, 0, 1, 1, 0x00000e48, 0xffffffff, 0x28303234, 0, 1, 1, 0x00000e4c, 0xffffffff, 0x20222426, 1, 0, 0, 0x00000c24, 0xffffffff, 0x32343434, 1, 0, 0, 0x00000c28, 0xffffffff, 0x24262830, 1, 0, 0, 0x00000c2c, 0xffffffff, 0x32343434, 1, 0, 0, 0x00000c30, 0xffffffff, 0x24262830, 1, 0, 1, 0x00000c34, 0xffffffff, 0x28282828, 1, 0, 1, 0x00000c38, 0xffffffff, 0x24262828, 1, 0, 0, 0x00000c3c, 0xffffffff, 0x32343434, 1, 0, 0, 0x00000c40, 0xffffffff, 0x24262830, 1, 0, 0, 0x00000c44, 0xffffffff, 0x28282022, 1, 0, 1, 0x00000c48, 0xffffffff, 0x28282828, 1, 0, 1, 0x00000c4c, 0xffffffff, 0x20222426, 1, 1, 0, 0x00000e24, 0xffffffff, 0x32343434, 1, 1, 0, 0x00000e28, 0xffffffff, 0x24262830, 1, 1, 0, 0x00000e2c, 0xffffffff, 0x32343434, 1, 1, 0, 0x00000e30, 0xffffffff, 0x24262830, 1, 1, 1, 0x00000e34, 0xffffffff, 0x28282828, 1, 1, 1, 0x00000e38, 0xffffffff, 0x24262828, 1, 1, 0, 0x00000e3c, 0xffffffff, 0x32343434, 1, 1, 0, 0x00000e40, 0xffffffff, 0x24262830, 1, 1, 0, 0x00000e44, 0xffffffff, 0x28282022, 1, 1, 1, 0x00000e48, 0xffffffff, 0x28282828, 1, 1, 1, 0x00000e4c, 0xffffffff, 0x20222426 }; void ODM_ReadAndConfig_MP_8812A_PHY_REG_PG_NEC( IN PDM_ODM_T pDM_Odm ) { u4Byte i = 0; u4Byte ArrayLen = sizeof(Array_MP_8812A_PHY_REG_PG_NEC)/sizeof(u4Byte); pu4Byte Array = Array_MP_8812A_PHY_REG_PG_NEC; ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8812A_PHY_REG_PG_NEC\n")); pDM_Odm->PhyRegPgVersion = 1; pDM_Odm->PhyRegPgValueType = PHY_REG_PG_EXACT_VALUE; for (i = 0; i < ArrayLen; i += 6 ) { u4Byte v1 = Array[i]; u4Byte v2 = Array[i+1]; u4Byte v3 = Array[i+2]; u4Byte v4 = Array[i+3]; u4Byte v5 = Array[i+4]; u4Byte v6 = Array[i+5]; odm_ConfigBB_PHY_REG_PG_8812A(pDM_Odm, v1, v2, v3, v4, v5, v6); } } #endif // end of HWIMG_SUPPORT rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/rtl8812a/HalHWImg8812A_BB.h000066400000000000000000000073011261122257400233100ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #if (RTL8812A_SUPPORT == 1) #ifndef __INC_MP_BB_HW_IMG_8812A_H #define __INC_MP_BB_HW_IMG_8812A_H /****************************************************************************** * AGC_TAB.TXT ******************************************************************************/ void ODM_ReadAndConfig_MP_8812A_AGC_TAB( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); u4Byte ODM_GetVersion_MP_8812A_AGC_TAB(void); /****************************************************************************** * AGC_TAB_DIFF.TXT ******************************************************************************/ extern u4Byte Array_MP_8812A_AGC_TAB_DIFF_LB[60]; extern u4Byte Array_MP_8812A_AGC_TAB_DIFF_HB[60]; void ODM_ReadAndConfig_MP_8812A_AGC_TAB_DIFF( IN PDM_ODM_T pDM_Odm, IN u4Byte Array[], IN u4Byte ArrayLen ); u4Byte ODM_GetVersion_MP_8812A_AGC_TAB_DIFF(void); /****************************************************************************** * PHY_REG.TXT ******************************************************************************/ void ODM_ReadAndConfig_MP_8812A_PHY_REG( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); u4Byte ODM_GetVersion_MP_8812A_PHY_REG(void); /****************************************************************************** * PHY_REG_MP.TXT ******************************************************************************/ void ODM_ReadAndConfig_MP_8812A_PHY_REG_MP( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); u4Byte ODM_GetVersion_MP_8812A_PHY_REG_MP(void); /****************************************************************************** * PHY_REG_PG.TXT ******************************************************************************/ void ODM_ReadAndConfig_MP_8812A_PHY_REG_PG( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); u4Byte ODM_GetVersion_MP_8812A_PHY_REG_PG(void); /****************************************************************************** * PHY_REG_PG_ASUS.TXT ******************************************************************************/ void ODM_ReadAndConfig_MP_8812A_PHY_REG_PG_ASUS( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); u4Byte ODM_GetVersion_MP_8812A_PHY_REG_PG_ASUS(void); /****************************************************************************** * PHY_REG_PG_NEC.TXT ******************************************************************************/ void ODM_ReadAndConfig_MP_8812A_PHY_REG_PG_NEC( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); u4Byte ODM_GetVersion_MP_8812A_PHY_REG_PG_NEC(void); #endif #endif // end of HWIMG_SUPPORT rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/rtl8812a/HalHWImg8812A_FW.c000066400000000000000000017527701261122257400233560ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include "Mp_Precomp.h" #include "../phydm_precomp.h" #if (RTL8812A_SUPPORT == 1) u1Byte Array_MP_8812A_FW_NIC[] = { 0x01, 0x95, 0x10, 0x00, 0x22, 0x00, 0x00, 0x00, 0x08, 0x19, 0x16, 0x30, 0xDE, 0x77, 0x00, 0x00, 0x2B, 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x4B, 0x8F, 0x02, 0x80, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x87, 0xE5, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x97, 0xD6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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29216; void ODM_ReadFirmware_MP_8812A_FW_NIC_BT( IN PDM_ODM_T pDM_Odm, OUT u1Byte *pFirmware, OUT u4Byte *pFirmwareSize ) { #if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8812A_FW_NIC_BT; #else ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8812A_FW_NIC_BT, ArrayLength_MP_8812A_FW_NIC_BT); #endif *pFirmwareSize = ArrayLength_MP_8812A_FW_NIC_BT; } u1Byte Array_MP_8812A_FW_WoWLAN[] = { 0x01, 0x95, 0x30, 0x00, 0x22, 0x00, 0x00, 0x00, 0x08, 0x19, 0x16, 0x31, 0x9C, 0x5B, 0x00, 0x00, 0x2B, 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x4B, 0xEE, 0x02, 0x7F, 0x9F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x80, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x87, 0xE6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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pDM_Odm, OUT u1Byte *pFirmware, OUT u4Byte *pFirmwareSize ) { #if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8812A_FW_WoWLAN; #else ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8812A_FW_WoWLAN, ArrayLength_MP_8812A_FW_WoWLAN); #endif *pFirmwareSize = ArrayLength_MP_8812A_FW_WoWLAN; } #endif // end of HWIMG_SUPPORT rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/rtl8812a/HalHWImg8812A_FW.h000066400000000000000000000043701261122257400233440ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #if (RTL8812A_SUPPORT == 1) #ifndef __INC_MP_FW_HW_IMG_8812A_H #define __INC_MP_FW_HW_IMG_8812A_H /****************************************************************************** * FW_NIC.TXT ******************************************************************************/ void ODM_ReadFirmware_MP_8812A_FW_NIC( IN PDM_ODM_T pDM_Odm, OUT u1Byte *pFirmware, OUT u4Byte *pFirmwareSize ); u4Byte ODM_GetVersion_MP_8812A_FW_NIC(VOID); /****************************************************************************** * FW_NIC_BT.TXT ******************************************************************************/ void ODM_ReadFirmware_MP_8812A_FW_NIC_BT( IN PDM_ODM_T pDM_Odm, OUT u1Byte *pFirmware, OUT u4Byte *pFirmwareSize ); u4Byte ODM_GetVersion_MP_8812A_FW_NIC_BT(VOID); /****************************************************************************** * FW_WoWLAN.TXT ******************************************************************************/ void ODM_ReadFirmware_MP_8812A_FW_WoWLAN( IN PDM_ODM_T pDM_Odm, OUT u1Byte *pFirmware, OUT u4Byte *pFirmwareSize ); u4Byte ODM_GetVersion_MP_8812A_FW_WoWLAN(VOID); #endif #endif // end of HWIMG_SUPPORT rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/rtl8812a/HalHWImg8812A_MAC.c000066400000000000000000000174541261122257400234320ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include "Mp_Precomp.h" #include "../phydm_precomp.h" #if (RTL8812A_SUPPORT == 1) static BOOLEAN CheckPositive( IN PDM_ODM_T pDM_Odm, IN const u4Byte Condition1, IN const u4Byte Condition2 ) { u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | // _GLNA ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | // _GPA ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | // _ALNA ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | // _APA ((pDM_Odm->BoardType & BIT2) >> 2) << 4; // _BT u4Byte cond1 = Condition1, cond2 = Condition2; u4Byte driver1 = pDM_Odm->CutVersion << 24 | pDM_Odm->SupportPlatform << 16 | pDM_Odm->PackageType << 12 | pDM_Odm->SupportInterface << 8 | _BoardType; u4Byte driver2 = pDM_Odm->TypeGLNA << 0 | pDM_Odm->TypeGPA << 8 | pDM_Odm->TypeALNA << 16 | pDM_Odm->TypeAPA << 24; ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> [8812A] CheckPositive (cond1, cond2) = (0x%X 0x%X)\n", cond1, cond2)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> [8812A] CheckPositive (driver1, driver2) = (0x%X 0x%X)\n", driver1, driver2)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, (" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, (" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->BoardType, pDM_Odm->PackageType)); //============== Value Defined Check ===============// //QFN Type [15:12] and Cut Version [27:24] need to do value check if(((cond1 & 0x0000F000) != 0) &&((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) return FALSE; if(((cond1 & 0x0F000000) != 0) &&((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) return FALSE; //=============== Bit Defined Check ================// // We don't care [31:28] and [23:20] // cond1 &= 0x000F0FFF; driver1 &= 0x000F0FFF; if ((cond1 & driver1) == cond1) { u4Byte bitMask = 0; if ((cond1 & 0x0F) == 0) // BoardType is DONTCARE return TRUE; if ((cond1 & BIT0) != 0) //GLNA bitMask |= 0x000000FF; if ((cond1 & BIT1) != 0) //GPA bitMask |= 0x0000FF00; if ((cond1 & BIT2) != 0) //ALNA bitMask |= 0x00FF0000; if ((cond1 & BIT3) != 0) //APA bitMask |= 0xFF000000; if ((cond2 & bitMask) == (driver2 & bitMask)) // BoardType of each RF path is matched return TRUE; else return FALSE; } else { return FALSE; } } static BOOLEAN CheckNegative( IN PDM_ODM_T pDM_Odm, IN const u4Byte Condition1, IN const u4Byte Condition2 ) { return TRUE; } /****************************************************************************** * MAC_REG.TXT ******************************************************************************/ u4Byte Array_MP_8812A_MAC_REG[] = { 0x010, 0x0000000C, 0x025, 0x0000000F, 0x072, 0x00000000, 0x428, 0x0000000A, 0x429, 0x00000010, 0x430, 0x00000000, 0x431, 0x00000000, 0x432, 0x00000000, 0x433, 0x00000001, 0x434, 0x00000004, 0x435, 0x00000005, 0x436, 0x00000007, 0x437, 0x00000008, 0x43C, 0x00000004, 0x43D, 0x00000005, 0x43E, 0x00000007, 0x43F, 0x00000008, 0x440, 0x0000005D, 0x441, 0x00000001, 0x442, 0x00000000, 0x444, 0x00000010, 0x445, 0x00000000, 0x446, 0x00000000, 0x447, 0x00000000, 0x448, 0x00000000, 0x449, 0x000000F0, 0x44A, 0x0000000F, 0x44B, 0x0000003E, 0x44C, 0x00000010, 0x44D, 0x00000000, 0x44E, 0x00000000, 0x44F, 0x00000000, 0x450, 0x00000000, 0x451, 0x000000F0, 0x452, 0x0000000F, 0x453, 0x00000000, 0x45B, 0x00000080, 0x460, 0x00000066, 0x461, 0x00000066, 0x4C8, 0x000000FF, 0x4C9, 0x00000008, 0x4CC, 0x000000FF, 0x4CD, 0x000000FF, 0x4CE, 0x00000001, 0x500, 0x00000026, 0x501, 0x000000A2, 0x502, 0x0000002F, 0x503, 0x00000000, 0x504, 0x00000028, 0x505, 0x000000A3, 0x506, 0x0000005E, 0x507, 0x00000000, 0x508, 0x0000002B, 0x509, 0x000000A4, 0x50A, 0x0000005E, 0x50B, 0x00000000, 0x50C, 0x0000004F, 0x50D, 0x000000A4, 0x50E, 0x00000000, 0x50F, 0x00000000, 0x512, 0x0000001C, 0x514, 0x0000000A, 0x516, 0x0000000A, 0x525, 0x0000004F, 0x550, 0x00000010, 0x551, 0x00000010, 0x559, 0x00000002, 0x55C, 0x00000050, 0x55D, 0x000000FF, 0x604, 0x00000001, 0x605, 0x00000030, 0x607, 0x00000003, 0x608, 0x0000000E, 0x609, 0x0000002A, 0x620, 0x000000FF, 0x621, 0x000000FF, 0x622, 0x000000FF, 0x623, 0x000000FF, 0x624, 0x000000FF, 0x625, 0x000000FF, 0x626, 0x000000FF, 0x627, 0x000000FF, 0x638, 0x00000050, 0x63C, 0x0000000A, 0x63D, 0x0000000A, 0x63E, 0x0000000E, 0x63F, 0x0000000E, 0x640, 0x00000080, 0x642, 0x00000040, 0x643, 0x00000000, 0x652, 0x000000C8, 0x66E, 0x00000005, 0x700, 0x00000021, 0x701, 0x00000043, 0x702, 0x00000065, 0x703, 0x00000087, 0x708, 0x00000021, 0x709, 0x00000043, 0x70A, 0x00000065, 0x70B, 0x00000087, 0x718, 0x00000040, }; void ODM_ReadAndConfig_MP_8812A_MAC_REG( IN PDM_ODM_T pDM_Odm ) { u4Byte i = 0; u1Byte cCond; BOOLEAN bMatched = TRUE, bSkipped = FALSE; //ask by Luke.Lee u4Byte ArrayLen = sizeof(Array_MP_8812A_MAC_REG)/sizeof(u4Byte); pu4Byte Array = Array_MP_8812A_MAC_REG; ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8812A_MAC_REG\n")); while(( i+1) < ArrayLen) { u4Byte v1 = Array[i]; u4Byte v2 = Array[i+1]; if(v1 & (BIT31|BIT30)) //positive & negative condition { if(v1 & BIT31) // positive condition { cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); if(cCond == COND_ENDIF) //end { bMatched = TRUE; bSkipped = FALSE; } else if(cCond == COND_ELSE) //else { bMatched = bSkipped?FALSE:TRUE; } else //if , else if { if(bSkipped) bMatched = FALSE; else { if(CheckPositive(pDM_Odm, v1, v2)) { bMatched = TRUE; bSkipped = TRUE; } else { bMatched = FALSE; bSkipped = FALSE; } } } } else if(v1 & BIT30){ //negative condition //do nothing } } else { if(bMatched) odm_ConfigMAC_8812A(pDM_Odm, v1, (u1Byte)v2); } i = i + 2; } } u4Byte ODM_GetVersion_MP_8812A_MAC_REG(void) { return 49; } #endif // end of HWIMG_SUPPORT rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/rtl8812a/HalHWImg8812A_MAC.h000066400000000000000000000026131261122257400234260ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #if (RTL8812A_SUPPORT == 1) #ifndef __INC_MP_MAC_HW_IMG_8812A_H #define __INC_MP_MAC_HW_IMG_8812A_H /****************************************************************************** * MAC_REG.TXT ******************************************************************************/ void ODM_ReadAndConfig_MP_8812A_MAC_REG( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); u4Byte ODM_GetVersion_MP_8812A_MAC_REG(void); #endif #endif // end of HWIMG_SUPPORT rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/rtl8812a/HalHWImg8812A_RF.c000066400000000000000000003307671261122257400233460ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include "Mp_Precomp.h" #include "../phydm_precomp.h" #if (RTL8812A_SUPPORT == 1) static BOOLEAN CheckPositive( IN PDM_ODM_T pDM_Odm, IN const u4Byte Condition1, IN const u4Byte Condition2 ) { u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | // _GLNA ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | // _GPA ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | // _ALNA ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | // _APA ((pDM_Odm->BoardType & BIT2) >> 2) << 4; // _BT u4Byte cond1 = Condition1, cond2 = Condition2; u4Byte driver1 = pDM_Odm->CutVersion << 24 | pDM_Odm->SupportPlatform << 16 | pDM_Odm->PackageType << 12 | pDM_Odm->SupportInterface << 8 | _BoardType; u4Byte driver2 = pDM_Odm->TypeGLNA << 0 | pDM_Odm->TypeGPA << 8 | pDM_Odm->TypeALNA << 16 | pDM_Odm->TypeAPA << 24; ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> [8812A] CheckPositive (cond1, cond2) = (0x%X 0x%X)\n", cond1, cond2)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> [8812A] CheckPositive (driver1, driver2) = (0x%X 0x%X)\n", driver1, driver2)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, (" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, (" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->BoardType, pDM_Odm->PackageType)); //============== Value Defined Check ===============// //QFN Type [15:12] and Cut Version [27:24] need to do value check if(((cond1 & 0x0000F000) != 0) &&((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) return FALSE; if(((cond1 & 0x0F000000) != 0) &&((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) return FALSE; //=============== Bit Defined Check ================// // We don't care [31:28] and [23:20] // cond1 &= 0x000F0FFF; driver1 &= 0x000F0FFF; if ((cond1 & driver1) == cond1) { u4Byte bitMask = 0; if ((cond1 & 0x0F) == 0) // BoardType is DONTCARE return TRUE; if ((cond1 & BIT0) != 0) //GLNA bitMask |= 0x000000FF; if ((cond1 & BIT1) != 0) //GPA bitMask |= 0x0000FF00; if ((cond1 & BIT2) != 0) //ALNA bitMask |= 0x00FF0000; if ((cond1 & BIT3) != 0) //APA bitMask |= 0xFF000000; if ((cond2 & bitMask) == (driver2 & bitMask)) // BoardType of each RF path is matched return TRUE; else return FALSE; } else { return FALSE; } } static BOOLEAN CheckNegative( IN PDM_ODM_T pDM_Odm, IN const u4Byte Condition1, IN const u4Byte Condition2 ) { return TRUE; } /****************************************************************************** * RadioA.TXT ******************************************************************************/ u4Byte Array_MP_8812A_RadioA[] = { 0x000, 0x00010000, 0x018, 0x0001712A, 0x056, 0x00051CF2, 0x066, 0x00040000, 0x01E, 0x00080000, 0x089, 0x00000080, 0x80000001,0x00000000,0x40000000,0x00000000, 0x086, 0x00014B3A, 0x90000001,0x00000005,0x40000000,0x00000000, 0x086, 0x00014B3A, 0xA0000000,0x00000000, 0x086, 0x00014B38, 0xB0000000,0x00000000, 0x80000004,0x00000000,0x40000000,0x00000000, 0x08B, 0x00080180, 0xA0000000,0x00000000, 0x08B, 0x00087180, 0xB0000000,0x00000000, 0x0B1, 0x0001FC1A, 0x0B3, 0x000F0810, 0x0B4, 0x0001A78D, 0x0BA, 0x00086180, 0x018, 0x00000006, 0x0EF, 0x00002000, 0x80000001,0x00000000,0x40000000,0x00000000, 0x03B, 0x0003F218, 0x03B, 0x00030A58, 0x03B, 0x0002FA58, 0x03B, 0x00022590, 0x03B, 0x0001FA50, 0x03B, 0x00010248, 0x03B, 0x00008240, 0x90000001,0x00000005,0x40000000,0x00000000, 0x03B, 0x0003F218, 0x03B, 0x00030A58, 0x03B, 0x0002FA58, 0x03B, 0x00022590, 0x03B, 0x0001FA50, 0x03B, 0x00010248, 0x03B, 0x00008240, 0xA0000000,0x00000000, 0x03B, 0x00038A58, 0x03B, 0x00037A58, 0x03B, 0x0002A590, 0x03B, 0x00027A50, 0x03B, 0x00018248, 0x03B, 0x00010240, 0x03B, 0x00008240, 0xB0000000,0x00000000, 0x0EF, 0x00000100, 0x80000002,0x00000000,0x40000000,0x00000000, 0x034, 0x0000A4EE, 0x034, 0x00009076, 0x034, 0x00008073, 0x034, 0x00007070, 0x034, 0x0000606D, 0x034, 0x0000506A, 0x034, 0x00004049, 0x034, 0x00003046, 0x034, 0x00002028, 0x034, 0x00001025, 0x034, 0x00000022, 0xA0000000,0x00000000, 0x034, 0x0000ADF4, 0x034, 0x00009DF1, 0x034, 0x00008DEE, 0x034, 0x00007DEB, 0x034, 0x00006DE8, 0x034, 0x00005CEC, 0x034, 0x00004CE9, 0x034, 0x000034EA, 0x034, 0x000024E7, 0x034, 0x0000146B, 0x034, 0x0000006D, 0xB0000000,0x00000000, 0x0EF, 0x00000000, 0x0EF, 0x000020A2, 0x0DF, 0x00000080, 0x035, 0x00000192, 0x035, 0x00008192, 0x035, 0x00010192, 0x036, 0x00000024, 0x036, 0x00008024, 0x036, 0x00010024, 0x036, 0x00018024, 0x0EF, 0x00000000, 0x051, 0x00000C21, 0x052, 0x000006D9, 0x053, 0x000FC649, 0x054, 0x0000017E, 0x0EF, 0x00000002, 0x008, 0x00008400, 0x018, 0x0001712A, 0x0EF, 0x00001000, 0x03A, 0x00000080, 0x03B, 0x0003A02C, 0x03C, 0x00004000, 0x03A, 0x00000400, 0x03B, 0x0003202C, 0x03C, 0x00010000, 0x03A, 0x000000A0, 0x03B, 0x0002B064, 0x03C, 0x00004000, 0x03A, 0x000000D8, 0x03B, 0x00023070, 0x03C, 0x00004000, 0x03A, 0x00000468, 0x03B, 0x0001B870, 0x03C, 0x00010000, 0x03A, 0x00000098, 0x03B, 0x00012085, 0x03C, 0x000E4000, 0x03A, 0x00000418, 0x03B, 0x0000A080, 0x03C, 0x000F0000, 0x03A, 0x00000418, 0x03B, 0x00002080, 0x03C, 0x00010000, 0x03A, 0x00000080, 0x03B, 0x0007A02C, 0x03C, 0x00004000, 0x03A, 0x00000400, 0x03B, 0x0007202C, 0x03C, 0x00010000, 0x03A, 0x000000A0, 0x03B, 0x0006B064, 0x03C, 0x00004000, 0x03A, 0x000000D8, 0x03B, 0x00063070, 0x03C, 0x00004000, 0x03A, 0x00000468, 0x03B, 0x0005B870, 0x03C, 0x00010000, 0x03A, 0x00000098, 0x03B, 0x00052085, 0x03C, 0x000E4000, 0x03A, 0x00000418, 0x03B, 0x0004A080, 0x03C, 0x000F0000, 0x03A, 0x00000418, 0x03B, 0x00042080, 0x03C, 0x00010000, 0x03A, 0x00000080, 0x03B, 0x000BA02C, 0x03C, 0x00004000, 0x03A, 0x00000400, 0x03B, 0x000B202C, 0x03C, 0x00010000, 0x03A, 0x000000A0, 0x03B, 0x000AB064, 0x03C, 0x00004000, 0x03A, 0x000000D8, 0x03B, 0x000A3070, 0x03C, 0x00004000, 0x03A, 0x00000468, 0x03B, 0x0009B870, 0x03C, 0x00010000, 0x03A, 0x00000098, 0x03B, 0x00092085, 0x03C, 0x000E4000, 0x03A, 0x00000418, 0x03B, 0x0008A080, 0x03C, 0x000F0000, 0x03A, 0x00000418, 0x03B, 0x00082080, 0x03C, 0x00010000, 0x0EF, 0x00001100, 0x80000008,0x00000000,0x40000000,0x00000000, 0x034, 0x0004A0B2, 0x034, 0x000490AF, 0x034, 0x00048070, 0x034, 0x0004706D, 0x034, 0x00046050, 0x034, 0x0004504D, 0x034, 0x0004404A, 0x034, 0x00043047, 0x034, 0x0004200A, 0x034, 0x00041007, 0x034, 0x00040004, 0x90000008,0x05000000,0x40000000,0x00000000, 0x034, 0x0004A0B2, 0x034, 0x000490AF, 0x034, 0x00048070, 0x034, 0x0004706D, 0x034, 0x0004604D, 0x034, 0x0004504A, 0x034, 0x00044047, 0x034, 0x00043044, 0x034, 0x00042007, 0x034, 0x00041004, 0x034, 0x00040001, 0xA0000000,0x00000000, 0x034, 0x0004ADF5, 0x034, 0x00049DF2, 0x034, 0x00048DEF, 0x034, 0x00047DEC, 0x034, 0x00046DE9, 0x034, 0x00045DE6, 0x034, 0x00044DE3, 0x034, 0x000438C8, 0x034, 0x000428C5, 0x034, 0x000418C2, 0x034, 0x000408C0, 0xB0000000,0x00000000, 0x80000008,0x00000000,0x40000000,0x00000000, 0x034, 0x0002A0B2, 0x034, 0x000290AF, 0x034, 0x00028070, 0x034, 0x0002706D, 0x034, 0x00026050, 0x034, 0x0002504D, 0x034, 0x0002404A, 0x034, 0x00023047, 0x034, 0x0002200A, 0x034, 0x00021007, 0x034, 0x00020004, 0x90000008,0x05000000,0x40000000,0x00000000, 0x034, 0x0002A0B4, 0x034, 0x000290B1, 0x034, 0x00028072, 0x034, 0x0002706F, 0x034, 0x0002604F, 0x034, 0x0002504C, 0x034, 0x00024049, 0x034, 0x00023046, 0x034, 0x00022009, 0x034, 0x00021006, 0x034, 0x00020003, 0xA0000000,0x00000000, 0x034, 0x0002ADF5, 0x034, 0x00029DF2, 0x034, 0x00028DEF, 0x034, 0x00027DEC, 0x034, 0x00026DE9, 0x034, 0x00025DE6, 0x034, 0x00024DE3, 0x034, 0x000238C8, 0x034, 0x000228C5, 0x034, 0x000218C2, 0x034, 0x000208C0, 0xB0000000,0x00000000, 0x80000008,0x00000000,0x40000000,0x00000000, 0x034, 0x0000A0B2, 0x034, 0x000090AF, 0x034, 0x00008070, 0x034, 0x0000706D, 0x034, 0x00006050, 0x034, 0x0000504D, 0x034, 0x0000404A, 0x034, 0x00003047, 0x034, 0x0000200A, 0x034, 0x00001007, 0x034, 0x00000004, 0x90000008,0x05000000,0x40000000,0x00000000, 0x034, 0x0000A0B2, 0x034, 0x000090AF, 0x034, 0x00008070, 0x034, 0x0000706D, 0x034, 0x0000604D, 0x034, 0x0000504A, 0x034, 0x00004047, 0x034, 0x00003044, 0x034, 0x00002007, 0x034, 0x00001004, 0x034, 0x00000001, 0xA0000000,0x00000000, 0x034, 0x0000AFF7, 0x034, 0x00009DF7, 0x034, 0x00008DF4, 0x034, 0x00007DF1, 0x034, 0x00006DEE, 0x034, 0x00005DEB, 0x034, 0x00004DE8, 0x034, 0x000038CC, 0x034, 0x000028C9, 0x034, 0x000018C6, 0x034, 0x000008C3, 0xB0000000,0x00000000, 0x0EF, 0x00000000, 0x80000008,0x00000000,0x40000000,0x00000000, 0x018, 0x0001712A, 0x0EF, 0x00000040, 0x035, 0x000001D4, 0x035, 0x000081D4, 0x035, 0x000101D4, 0x035, 0x000201B4, 0x035, 0x000281B4, 0x035, 0x000301B4, 0x035, 0x000401B4, 0x035, 0x000481B4, 0x035, 0x000501B4, 0x90000008,0x05000000,0x40000000,0x00000000, 0x018, 0x0001712A, 0x0EF, 0x00000040, 0x035, 0x000001D4, 0x035, 0x000081D4, 0x035, 0x000101D4, 0x035, 0x000201B4, 0x035, 0x000281B4, 0x035, 0x000301B4, 0x035, 0x000401B4, 0x035, 0x000481B4, 0x035, 0x000501B4, 0xA0000000,0x00000000, 0x018, 0x0001712A, 0x0EF, 0x00000040, 0x035, 0x00000188, 0x035, 0x00008147, 0x035, 0x00010147, 0x035, 0x000201D7, 0x035, 0x000281D7, 0x035, 0x000301D7, 0x035, 0x000401D8, 0x035, 0x000481D8, 0x035, 0x000501D8, 0xB0000000,0x00000000, 0x0EF, 0x00000000, 0x80000008,0x00000000,0x40000000,0x00000000, 0x018, 0x0001712A, 0x0EF, 0x00000010, 0x036, 0x00004BFB, 0x036, 0x0000CBFB, 0x036, 0x00014BFB, 0x036, 0x0001CBFB, 0x036, 0x00024F4B, 0x036, 0x0002CF4B, 0x036, 0x00034F4B, 0x036, 0x0003CF4B, 0x036, 0x00044F4B, 0x036, 0x0004CF4B, 0x036, 0x00054F4B, 0x036, 0x0005CF4B, 0x90000008,0x05000000,0x40000000,0x00000000, 0x018, 0x0001712A, 0x0EF, 0x00000010, 0x036, 0x00004BFB, 0x036, 0x0000CBFB, 0x036, 0x00014BFB, 0x036, 0x0001CBFB, 0x036, 0x00024F4B, 0x036, 0x0002CF4B, 0x036, 0x00034F4B, 0x036, 0x0003CF4B, 0x036, 0x00044F4B, 0x036, 0x0004CF4B, 0x036, 0x00054F4B, 0x036, 0x0005CF4B, 0xA0000000,0x00000000, 0x018, 0x0001712A, 0x0EF, 0x00000010, 0x036, 0x00084EB4, 0x036, 0x0008CC35, 0x036, 0x00094C35, 0x036, 0x0009CC35, 0x036, 0x000A4C35, 0x036, 0x000ACC35, 0x036, 0x000B4C35, 0x036, 0x000BCC35, 0x036, 0x000C4C34, 0x036, 0x000CCC35, 0x036, 0x000D4C35, 0x036, 0x000DCC35, 0xB0000000,0x00000000, 0x0EF, 0x00000000, 0x0EF, 0x00000008, 0x80000008,0x00000000,0x40000000,0x00000000, 0x03C, 0x000002CC, 0x03C, 0x00000522, 0x03C, 0x00000902, 0x90000008,0x05000000,0x40000000,0x00000000, 0x03C, 0x000002CC, 0x03C, 0x00000522, 0x03C, 0x00000902, 0xA0000000,0x00000000, 0x03C, 0x000002A8, 0x03C, 0x000005A2, 0x03C, 0x00000880, 0xB0000000,0x00000000, 0x0EF, 0x00000000, 0x018, 0x0001712A, 0x0EF, 0x00000002, 0x0DF, 0x00000080, 0x01F, 0x00000064, 0x80000008,0x00000000,0x40000000,0x00000000, 0x061, 0x000FDD43, 0x062, 0x00038F4B, 0x063, 0x00032117, 0x064, 0x000194AC, 0x065, 0x000931D1, 0x90000008,0x05000000,0x40000000,0x00000000, 0x061, 0x000FDD43, 0x062, 0x00038F4B, 0x063, 0x00032117, 0x064, 0x000194AC, 0x065, 0x000931D2, 0xA0000000,0x00000000, 0x061, 0x000E5D53, 0x062, 0x00038FCD, 0x063, 0x000114EB, 0x064, 0x000196AC, 0x065, 0x000911D7, 0xB0000000,0x00000000, 0x008, 0x00008400, 0x01C, 0x000739D2, 0x0B4, 0x0001E78D, 0x018, 0x0001F12A, 0x0FE, 0x00000000, 0x0FE, 0x00000000, 0x0FE, 0x00000000, 0x0FE, 0x00000000, 0x0B4, 0x0001A78D, 0x018, 0x0001712A, }; void ODM_ReadAndConfig_MP_8812A_RadioA( IN PDM_ODM_T pDM_Odm ) { u4Byte i = 0; u1Byte cCond; BOOLEAN bMatched = TRUE, bSkipped = FALSE; //ask by Luke.Lee u4Byte ArrayLen = sizeof(Array_MP_8812A_RadioA)/sizeof(u4Byte); pu4Byte Array = Array_MP_8812A_RadioA; ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8812A_RadioA\n")); while(( i+1) < ArrayLen) { u4Byte v1 = Array[i]; u4Byte v2 = Array[i+1]; if(v1 & (BIT31|BIT30)) //positive & negative condition { if(v1 & BIT31) // positive condition { cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); if(cCond == COND_ENDIF) //end { bMatched = TRUE; bSkipped = FALSE; } else if(cCond == COND_ELSE) //else { bMatched = bSkipped?FALSE:TRUE; } else //if , else if { if(bSkipped) bMatched = FALSE; else { if(CheckPositive(pDM_Odm, v1, v2)) { bMatched = TRUE; bSkipped = TRUE; } else { bMatched = FALSE; bSkipped = FALSE; } } } } else if(v1 & BIT30){ //negative condition //do nothing } } else { if(bMatched) odm_ConfigRF_RadioA_8812A(pDM_Odm, v1, v2); } i = i + 2; } } u4Byte ODM_GetVersion_MP_8812A_RadioA(void) { return 49; } /****************************************************************************** * RadioB.TXT ******************************************************************************/ u4Byte Array_MP_8812A_RadioB[] = { 0x056, 0x00051CF2, 0x066, 0x00040000, 0x089, 0x00000080, 0x80000001,0x00000000,0x40000000,0x00000000, 0x086, 0x00014B3A, 0x90000001,0x00000005,0x40000000,0x00000000, 0x086, 0x00014B3A, 0xA0000000,0x00000000, 0x086, 0x00014B38, 0xB0000000,0x00000000, 0x80000004,0x00000000,0x40000000,0x00000000, 0x08B, 0x00080180, 0xA0000000,0x00000000, 0x08B, 0x00087180, 0xB0000000,0x00000000, 0x018, 0x00000006, 0x0EF, 0x00002000, 0x80000001,0x00000000,0x40000000,0x00000000, 0x03B, 0x0003F218, 0x03B, 0x00030A58, 0x03B, 0x0002FA58, 0x03B, 0x00022590, 0x03B, 0x0001FA50, 0x03B, 0x00010248, 0x03B, 0x00008240, 0x90000001,0x00000005,0x40000000,0x00000000, 0x03B, 0x0003F218, 0x03B, 0x00030A58, 0x03B, 0x0002FA58, 0x03B, 0x00022590, 0x03B, 0x0001FA50, 0x03B, 0x00010248, 0x03B, 0x00008240, 0xA0000000,0x00000000, 0x03B, 0x00038A58, 0x03B, 0x00037A58, 0x03B, 0x0002A590, 0x03B, 0x00027A50, 0x03B, 0x00018248, 0x03B, 0x00010240, 0x03B, 0x00008240, 0xB0000000,0x00000000, 0x0EF, 0x00000100, 0x80000002,0x00000000,0x40000000,0x00000000, 0x034, 0x0000A4EE, 0x034, 0x00009076, 0x034, 0x00008073, 0x034, 0x00007070, 0x034, 0x0000606D, 0x034, 0x0000506A, 0x034, 0x00004049, 0x034, 0x00003046, 0x034, 0x00002028, 0x034, 0x00001025, 0x034, 0x00000022, 0xA0000000,0x00000000, 0x034, 0x0000ADF4, 0x034, 0x00009DF1, 0x034, 0x00008DEE, 0x034, 0x00007DEB, 0x034, 0x00006DE8, 0x034, 0x00005CEC, 0x034, 0x00004CE9, 0x034, 0x000034EA, 0x034, 0x000024E7, 0x034, 0x0000146B, 0x034, 0x0000006D, 0xB0000000,0x00000000, 0x0EF, 0x00000000, 0x0EF, 0x000020A2, 0x0DF, 0x00000080, 0x035, 0x00000192, 0x035, 0x00008192, 0x035, 0x00010192, 0x036, 0x00000024, 0x036, 0x00008024, 0x036, 0x00010024, 0x036, 0x00018024, 0x0EF, 0x00000000, 0x051, 0x00000C21, 0x052, 0x000006D9, 0x053, 0x000FC649, 0x054, 0x0000017E, 0x0EF, 0x00000002, 0x008, 0x00008400, 0x018, 0x0001712A, 0x0EF, 0x00001000, 0x03A, 0x00000080, 0x03B, 0x0003A02C, 0x03C, 0x00004000, 0x03A, 0x00000400, 0x03B, 0x0003202C, 0x03C, 0x00010000, 0x03A, 0x000000A0, 0x03B, 0x0002B064, 0x03C, 0x00004000, 0x03A, 0x000000D8, 0x03B, 0x00023070, 0x03C, 0x00004000, 0x03A, 0x00000468, 0x03B, 0x0001B870, 0x03C, 0x00010000, 0x03A, 0x00000098, 0x03B, 0x00012085, 0x03C, 0x000E4000, 0x03A, 0x00000418, 0x03B, 0x0000A080, 0x03C, 0x000F0000, 0x03A, 0x00000418, 0x03B, 0x00002080, 0x03C, 0x00010000, 0x03A, 0x00000080, 0x03B, 0x0007A02C, 0x03C, 0x00004000, 0x03A, 0x00000400, 0x03B, 0x0007202C, 0x03C, 0x00010000, 0x03A, 0x000000A0, 0x03B, 0x0006B064, 0x03C, 0x00004000, 0x03A, 0x000000D8, 0x03B, 0x00063070, 0x03C, 0x00004000, 0x03A, 0x00000468, 0x03B, 0x0005B870, 0x03C, 0x00010000, 0x03A, 0x00000098, 0x03B, 0x00052085, 0x03C, 0x000E4000, 0x03A, 0x00000418, 0x03B, 0x0004A080, 0x03C, 0x000F0000, 0x03A, 0x00000418, 0x03B, 0x00042080, 0x03C, 0x00010000, 0x03A, 0x00000080, 0x03B, 0x000BA02C, 0x03C, 0x00004000, 0x03A, 0x00000400, 0x03B, 0x000B202C, 0x03C, 0x00010000, 0x03A, 0x000000A0, 0x03B, 0x000AB064, 0x03C, 0x00004000, 0x03A, 0x000000D8, 0x03B, 0x000A3070, 0x03C, 0x00004000, 0x03A, 0x00000468, 0x03B, 0x0009B870, 0x03C, 0x00010000, 0x03A, 0x00000098, 0x03B, 0x00092085, 0x03C, 0x000E4000, 0x03A, 0x00000418, 0x03B, 0x0008A080, 0x03C, 0x000F0000, 0x03A, 0x00000418, 0x03B, 0x00082080, 0x03C, 0x00010000, 0x0EF, 0x00001100, 0x80000008,0x00000000,0x40000000,0x00000000, 0x034, 0x0004A0B2, 0x034, 0x000490AF, 0x034, 0x00048070, 0x034, 0x0004706D, 0x034, 0x00046050, 0x034, 0x0004504D, 0x034, 0x0004404A, 0x034, 0x00043047, 0x034, 0x0004200A, 0x034, 0x00041007, 0x034, 0x00040004, 0x90000008,0x05000000,0x40000000,0x00000000, 0x034, 0x0004A0B1, 0x034, 0x000490AE, 0x034, 0x0004806F, 0x034, 0x0004706C, 0x034, 0x0004604C, 0x034, 0x00045049, 0x034, 0x00044046, 0x034, 0x00043043, 0x034, 0x00042006, 0x034, 0x00041003, 0x034, 0x00040000, 0xA0000000,0x00000000, 0x034, 0x0004ADF5, 0x034, 0x00049DF2, 0x034, 0x00048DEF, 0x034, 0x00047DEC, 0x034, 0x00046DE9, 0x034, 0x00045DE6, 0x034, 0x00044DE3, 0x034, 0x000438C8, 0x034, 0x000428C5, 0x034, 0x000418C2, 0x034, 0x000408C0, 0xB0000000,0x00000000, 0x80000008,0x00000000,0x40000000,0x00000000, 0x034, 0x0002A0B2, 0x034, 0x000290AF, 0x034, 0x00028070, 0x034, 0x0002706D, 0x034, 0x00026050, 0x034, 0x0002504D, 0x034, 0x0002404A, 0x034, 0x00023047, 0x034, 0x0002200A, 0x034, 0x00021007, 0x034, 0x00020004, 0x90000008,0x05000000,0x40000000,0x00000000, 0x034, 0x0002A0B3, 0x034, 0x000290B0, 0x034, 0x00028071, 0x034, 0x0002706E, 0x034, 0x0002604E, 0x034, 0x0002504B, 0x034, 0x00024048, 0x034, 0x00023045, 0x034, 0x00022008, 0x034, 0x00021005, 0x034, 0x00020002, 0xA0000000,0x00000000, 0x034, 0x0002ADF5, 0x034, 0x00029DF2, 0x034, 0x00028DEF, 0x034, 0x00027DEC, 0x034, 0x00026DE9, 0x034, 0x00025DE6, 0x034, 0x00024DE3, 0x034, 0x000238C8, 0x034, 0x000228C5, 0x034, 0x000218C2, 0x034, 0x000208C0, 0xB0000000,0x00000000, 0x80000008,0x00000000,0x40000000,0x00000000, 0x034, 0x0000A0B2, 0x034, 0x000090AF, 0x034, 0x00008070, 0x034, 0x0000706D, 0x034, 0x00006050, 0x034, 0x0000504D, 0x034, 0x0000404A, 0x034, 0x00003047, 0x034, 0x0000200A, 0x034, 0x00001007, 0x034, 0x00000004, 0x90000008,0x05000000,0x40000000,0x00000000, 0x034, 0x0000A0B3, 0x034, 0x000090B0, 0x034, 0x00008070, 0x034, 0x0000706D, 0x034, 0x0000604D, 0x034, 0x0000504A, 0x034, 0x00004047, 0x034, 0x00003044, 0x034, 0x00002007, 0x034, 0x00001004, 0x034, 0x00000001, 0xA0000000,0x00000000, 0x034, 0x0000AFF7, 0x034, 0x00009DF7, 0x034, 0x00008DF4, 0x034, 0x00007DF1, 0x034, 0x00006DEE, 0x034, 0x00005DEB, 0x034, 0x00004DE8, 0x034, 0x000038CC, 0x034, 0x000028C9, 0x034, 0x000018C6, 0x034, 0x000008C3, 0xB0000000,0x00000000, 0x0EF, 0x00000000, 0x80000008,0x00000000,0x40000000,0x00000000, 0x018, 0x0001712A, 0x0EF, 0x00000040, 0x035, 0x000001C5, 0x035, 0x000081C5, 0x035, 0x000101C5, 0x035, 0x00020174, 0x035, 0x00028174, 0x035, 0x00030174, 0x035, 0x00040185, 0x035, 0x00048185, 0x035, 0x00050185, 0x0EF, 0x00000000, 0x90000008,0x05000000,0x40000000,0x00000000, 0x018, 0x0001712A, 0x0EF, 0x00000040, 0x035, 0x000001C5, 0x035, 0x000081C5, 0x035, 0x000101C5, 0x035, 0x00020174, 0x035, 0x00028174, 0x035, 0x00030174, 0x035, 0x00040185, 0x035, 0x00048185, 0x035, 0x00050185, 0x0EF, 0x00000000, 0xA0000000,0x00000000, 0x018, 0x0001712A, 0x0EF, 0x00000040, 0x035, 0x00000188, 0x035, 0x00008147, 0x035, 0x00010147, 0x035, 0x000201D7, 0x035, 0x000281D7, 0x035, 0x000301D7, 0x035, 0x000401D8, 0x035, 0x000481D8, 0x035, 0x000501D8, 0x0EF, 0x00000000, 0xB0000000,0x00000000, 0x80000008,0x00000000,0x40000000,0x00000000, 0x018, 0x0001712A, 0x0EF, 0x00000010, 0x036, 0x00005B8B, 0x036, 0x0000DB8B, 0x036, 0x00015B8B, 0x036, 0x0001DB8B, 0x036, 0x000262DB, 0x036, 0x0002E2DB, 0x036, 0x000362DB, 0x036, 0x0003E2DB, 0x036, 0x0004553B, 0x036, 0x0004D53B, 0x036, 0x0005553B, 0x036, 0x0005D53B, 0x90000008,0x05000000,0x40000000,0x00000000, 0x018, 0x0001712A, 0x0EF, 0x00000010, 0x036, 0x00005B8B, 0x036, 0x0000DB8B, 0x036, 0x00015B8B, 0x036, 0x0001DB8B, 0x036, 0x000262DB, 0x036, 0x0002E2DB, 0x036, 0x000362DB, 0x036, 0x0003E2DB, 0x036, 0x0004553B, 0x036, 0x0004D53B, 0x036, 0x0005553B, 0x036, 0x0005D53B, 0xA0000000,0x00000000, 0x018, 0x0001712A, 0x0EF, 0x00000010, 0x036, 0x00084EB4, 0x036, 0x0008CC35, 0x036, 0x00094C35, 0x036, 0x0009CC35, 0x036, 0x000A4C35, 0x036, 0x000ACC35, 0x036, 0x000B4C35, 0x036, 0x000BCC35, 0x036, 0x000C4C34, 0x036, 0x000CCC35, 0x036, 0x000D4C35, 0x036, 0x000DCC35, 0xB0000000,0x00000000, 0x0EF, 0x00000000, 0x0EF, 0x00000008, 0x80000008,0x00000000,0x40000000,0x00000000, 0x03C, 0x000002DC, 0x03C, 0x00000524, 0x03C, 0x00000902, 0x90000008,0x05000000,0x40000000,0x00000000, 0x03C, 0x000002DC, 0x03C, 0x00000524, 0x03C, 0x00000902, 0xA0000000,0x00000000, 0x03C, 0x000002A8, 0x03C, 0x000005A2, 0x03C, 0x00000880, 0xB0000000,0x00000000, 0x0EF, 0x00000000, 0x018, 0x0001712A, 0x0EF, 0x00000002, 0x0DF, 0x00000080, 0x80000008,0x00000000,0x40000000,0x00000000, 0x061, 0x000EAC43, 0x062, 0x00038F47, 0x063, 0x00031157, 0x064, 0x0001C4AC, 0x065, 0x000931D1, 0x90000008,0x05000000,0x40000000,0x00000000, 0x061, 0x000EAC43, 0x062, 0x00038F47, 0x063, 0x00031157, 0x064, 0x0001C4AC, 0x065, 0x000931D2, 0x90000002,0x00000000,0x40000000,0x00000000, 0x061, 0x000EAC43, 0x062, 0x00038F47, 0x063, 0x00031157, 0x064, 0x0001C4AC, 0x065, 0x000931D1, 0xA0000000,0x00000000, 0x061, 0x000E5D53, 0x062, 0x00038FCD, 0x063, 0x000114EB, 0x064, 0x000196AC, 0x065, 0x000911D7, 0xB0000000,0x00000000, 0x008, 0x00008400, }; void ODM_ReadAndConfig_MP_8812A_RadioB( IN PDM_ODM_T pDM_Odm ) { u4Byte i = 0; u1Byte cCond; BOOLEAN bMatched = TRUE, bSkipped = FALSE; //ask by Luke.Lee u4Byte ArrayLen = sizeof(Array_MP_8812A_RadioB)/sizeof(u4Byte); pu4Byte Array = Array_MP_8812A_RadioB; ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8812A_RadioB\n")); while(( i+1) < ArrayLen) { u4Byte v1 = Array[i]; u4Byte v2 = Array[i+1]; if(v1 & (BIT31|BIT30)) //positive & negative condition { if(v1 & BIT31) // positive condition { cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); if(cCond == COND_ENDIF) //end { bMatched = TRUE; bSkipped = FALSE; } else if(cCond == COND_ELSE) //else { bMatched = bSkipped?FALSE:TRUE; } else //if , else if { if(bSkipped) bMatched = FALSE; else { if(CheckPositive(pDM_Odm, v1, v2)) { bMatched = TRUE; bSkipped = TRUE; } else { bMatched = FALSE; bSkipped = FALSE; } } } } else if(v1 & BIT30){ //negative condition //do nothing } } else { if(bMatched) odm_ConfigRF_RadioB_8812A(pDM_Odm, v1, v2); } i = i + 2; } } u4Byte ODM_GetVersion_MP_8812A_RadioB(void) { return 49; } /****************************************************************************** * TxPowerTrack_AP.TXT ******************************************************************************/ #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_AP_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, }; u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_AP_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 17, 17, 18, 19, 20, 20, 20}, {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 19, 20, 20, 20}, {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21}, }; u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_AP_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 2, 3, 3, 4, 4, 5, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, {0, 1, 2, 3, 3, 4, 5, 6, 6, 6, 7, 7, 8, 8, 9, 10, 11, 11, 12, 13, 13, 14, 15, 16, 16, 16, 16, 16, 16, 16}, {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16}, }; u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_AP_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 7, 8, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 18, 19, 19, 19}, {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21}, {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21}, }; u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_AP_8812A[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11}; u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_AP_8812A[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_AP_8812A[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11}; u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_AP_8812A[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_AP_8812A[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11}; u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_AP_8812A[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_AP_8812A[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11}; u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_AP_8812A[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; #endif void ODM_ReadAndConfig_MP_8812A_TxPowerTrack_AP( IN PDM_ODM_T pDM_Odm ) { #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8812A\n")); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_AP_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_AP_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_AP_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_AP_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_AP_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_AP_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_AP_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_AP_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_AP_8812A, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_AP_8812A, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_AP_8812A, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_AP_8812A, DELTA_SWINGIDX_SIZE*3); #endif } /****************************************************************************** * TxPowerTrack_PCIE.TXT ******************************************************************************/ #if DEV_BUS_TYPE == RT_PCI_INTERFACE u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_PCIE_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13}, {0, 1, 1, 2, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 13, 13}, {0, 1, 1, 2, 3, 3, 4, 4, 5, 6, 6, 7, 8, 9, 10, 11, 12, 12, 13, 14, 14, 14, 15, 16, 17, 17, 17, 18, 18, 18}, }; u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_PCIE_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11}, {0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11}, {0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}, }; u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_PCIE_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 13, 13, 13}, {0, 1, 1, 2, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 8, 9, 9, 10, 10, 11, 11, 11, 12, 12, 12, 12, 12, 13, 13}, {0, 1, 1, 2, 2, 3, 3, 4, 5, 6, 7, 8, 8, 9, 10, 11, 12, 13, 14, 14, 15, 15, 15, 16, 16, 16, 17, 17, 18, 18}, }; u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_PCIE_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11}, {0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}, {0, 1, 1, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}, }; u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_PCIE_8812A[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11}; u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_PCIE_8812A[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_PCIE_8812A[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11}; u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_PCIE_8812A[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_PCIE_8812A[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11}; u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_PCIE_8812A[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_PCIE_8812A[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11}; u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_PCIE_8812A[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; #endif void ODM_ReadAndConfig_MP_8812A_TxPowerTrack_PCIE( IN PDM_ODM_T pDM_Odm ) { #if DEV_BUS_TYPE == RT_PCI_INTERFACE PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8812A\n")); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_PCIE_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_PCIE_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_PCIE_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_PCIE_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_PCIE_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_PCIE_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_PCIE_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_PCIE_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_PCIE_8812A, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_PCIE_8812A, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_PCIE_8812A, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_PCIE_8812A, DELTA_SWINGIDX_SIZE*3); #endif } /****************************************************************************** * TxPowerTrack_RFE3.TXT ******************************************************************************/ u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_RFE3_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 13, 14, 15, 16, 16, 17, 17, 18, 18}, {0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 12, 14, 13, 13, 14, 14, 14, 15, 15}, {0, 1, 1, 2, 2, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 16, 16}, }; u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_RFE3_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 3, 3, 4, 5, 6, 7, 7, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}, {0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}, {0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 8, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}, }; u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_RFE3_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 13, 14, 15, 16, 16, 17, 17, 18, 18}, {0, 1, 1, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 15, 16, 16, 17, 17}, {0, 1, 1, 2, 3, 3, 4, 4, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 13, 14, 14, 15, 15, 16, 17, 18, 18}, }; u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_RFE3_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 3, 4, 5, 6, 7, 7, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}, {0, 1, 2, 3, 4, 4, 5, 5, 6, 7, 7, 8, 9, 9, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}, {0, 1, 2, 3, 4, 4, 5, 5, 6, 7, 7, 8, 9, 9, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}, }; u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_RFE3_8812A[] = {0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15}; u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_RFE3_8812A[] = {0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 7, 7, 8, 9, 10, 10, 10, 10, 11, 11, 11, 11, 11}; u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_RFE3_8812A[] = {0, 1, 1, 2, 2, 3, 4, 5, 6, 6, 6, 7, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 13, 13, 13, 13, 14, 14, 15, 15}; u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_RFE3_8812A[] = {0, 0, 1, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11}; u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_RFE3_8812A[] = {0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15}; u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_RFE3_8812A[] = {0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 7, 7, 8, 9, 10, 10, 10, 10, 11, 11, 11, 11, 11}; u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_RFE3_8812A[] = {0, 1, 1, 2, 2, 3, 4, 5, 6, 6, 6, 7, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 13, 13, 13, 13, 14, 14, 15, 15}; u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_RFE3_8812A[] = {0, 0, 1, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11}; void ODM_ReadAndConfig_MP_8812A_TxPowerTrack_RFE3( IN PDM_ODM_T pDM_Odm ) { PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8812A\n")); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_RFE3_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_RFE3_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_RFE3_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_RFE3_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_RFE3_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_RFE3_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_RFE3_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_RFE3_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_RFE3_8812A, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_RFE3_8812A, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_RFE3_8812A, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_RFE3_8812A, DELTA_SWINGIDX_SIZE*3); } /****************************************************************************** * TxPowerTrack_RFE4.TXT ******************************************************************************/ u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_RFE4_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13}, {0, 1, 1, 2, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 13, 13}, {0, 1, 1, 2, 3, 3, 4, 4, 5, 6, 6, 7, 8, 9, 10, 11, 12, 12, 13, 14, 14, 14, 15, 16, 17, 17, 17, 18, 18, 18}, }; u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_RFE4_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11}, {0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11}, {0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}, }; u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_RFE4_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 13, 13, 13}, {0, 1, 1, 2, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 8, 9, 9, 10, 10, 11, 11, 11, 12, 12, 12, 12, 12, 13, 13}, {0, 1, 1, 2, 2, 3, 3, 4, 5, 6, 7, 8, 8, 9, 10, 11, 12, 13, 14, 14, 15, 15, 15, 16, 16, 16, 17, 17, 18, 18}, }; u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_RFE4_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11}, {0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}, {0, 1, 1, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}, }; u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_RFE4_8812A[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11}; u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_RFE4_8812A[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_RFE4_8812A[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11}; u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_RFE4_8812A[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_RFE4_8812A[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11}; u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_RFE4_8812A[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_RFE4_8812A[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11}; u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_RFE4_8812A[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; void ODM_ReadAndConfig_MP_8812A_TxPowerTrack_RFE4( IN PDM_ODM_T pDM_Odm ) { PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8812A\n")); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_RFE4_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_RFE4_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_RFE4_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_RFE4_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_RFE4_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_RFE4_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_RFE4_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_RFE4_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_RFE4_8812A, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_RFE4_8812A, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_RFE4_8812A, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_RFE4_8812A, DELTA_SWINGIDX_SIZE*3); } /****************************************************************************** * TxPowerTrack_USB.TXT ******************************************************************************/ #if DEV_BUS_TYPE == RT_USB_INTERFACE u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_USB_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14}, {0, 1, 1, 2, 2, 3, 4, 4, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14}, {0, 1, 1, 2, 2, 3, 4, 5, 6, 6, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 16, 16, 16, 16}, }; u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_USB_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 3, 3, 4, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}, {0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}, {0, 1, 1, 2, 3, 3, 4, 5, 6, 7, 7, 8, 8, 9, 9, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}, }; u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_USB_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 15, 15, 15, 15, 15}, {0, 1, 1, 2, 2, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 15, 15, 15, 15, 15}, {0, 1, 1, 2, 2, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 15, 15, 15, 15, 15}, }; u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_USB_8812A[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 3, 4, 5, 6, 7, 7, 8, 8, 9, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}, {0, 1, 1, 2, 3, 3, 4, 5, 6, 7, 7, 8, 8, 9, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}, {0, 1, 1, 2, 3, 3, 4, 5, 6, 7, 7, 8, 8, 9, 10, 11, 11, 12, 12, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}, }; u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_USB_8812A[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11}; u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_USB_8812A[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7}; u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_USB_8812A[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 9, 10, 10, 10, 10, 10, 10}; u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_USB_8812A[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7}; u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_USB_8812A[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 11, 11, 11}; u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_USB_8812A[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7}; u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_USB_8812A[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 9, 10, 10, 10, 10, 10, 10}; u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_USB_8812A[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7}; #endif void ODM_ReadAndConfig_MP_8812A_TxPowerTrack_USB( IN PDM_ODM_T pDM_Odm ) { #if DEV_BUS_TYPE == RT_USB_INTERFACE PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8812A\n")); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_USB_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_USB_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_USB_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_USB_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_USB_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_USB_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_USB_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_USB_8812A, DELTA_SWINGIDX_SIZE); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_USB_8812A, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_USB_8812A, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_USB_8812A, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_USB_8812A, DELTA_SWINGIDX_SIZE*3); #endif } /****************************************************************************** * TXPWR_LMT.TXT ******************************************************************************/ pu1Byte Array_MP_8812A_TXPWR_LMT[] = { "FCC", "2.4G", "20M", "CCK", "1T", "01", "36", "ETSI", "2.4G", "20M", "CCK", "1T", "01", "32", "MKK", "2.4G", "20M", "CCK", "1T", "01", "32", "FCC", "2.4G", "20M", "CCK", "1T", "02", "36", "ETSI", "2.4G", "20M", "CCK", "1T", "02", "32", "MKK", "2.4G", "20M", "CCK", "1T", "02", "32", "FCC", "2.4G", "20M", "CCK", "1T", "03", "36", "ETSI", "2.4G", "20M", "CCK", "1T", "03", "32", "MKK", "2.4G", "20M", "CCK", "1T", "03", "32", "FCC", "2.4G", "20M", "CCK", "1T", "04", "36", "ETSI", "2.4G", "20M", "CCK", "1T", "04", "32", "MKK", "2.4G", "20M", "CCK", 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"2T", "159", "34", "ETSI", "5G", "40M", "HT", "2T", "159", "30", "MKK", "5G", "40M", "HT", "2T", "159", "63", "FCC", "5G", "80M", "VHT", "1T", "42", "30", "ETSI", "5G", "80M", "VHT", "1T", "42", "32", "MKK", "5G", "80M", "VHT", "1T", "42", "32", "FCC", "5G", "80M", "VHT", "1T", "58", "28", "ETSI", "5G", "80M", "VHT", "1T", "58", "32", "MKK", "5G", "80M", "VHT", "1T", "58", "32", "FCC", "5G", "80M", "VHT", "1T", "106", "30", "ETSI", "5G", "80M", "VHT", "1T", "106", "32", "MKK", "5G", "80M", "VHT", "1T", "106", "32", "FCC", "5G", "80M", "VHT", "1T", "122", "34", "ETSI", "5G", "80M", "VHT", "1T", "122", "32", "MKK", "5G", "80M", "VHT", "1T", "122", "32", "FCC", "5G", "80M", "VHT", "1T", "155", "36", "ETSI", "5G", "80M", "VHT", "1T", "155", "32", "MKK", "5G", "80M", "VHT", "1T", "155", "63", "FCC", "5G", "80M", "VHT", "2T", "42", "28", "ETSI", "5G", "80M", "VHT", "2T", "42", "30", "MKK", "5G", "80M", "VHT", "2T", "42", "30", "FCC", "5G", "80M", "VHT", "2T", "58", "26", "ETSI", "5G", "80M", "VHT", "2T", "58", "30", "MKK", "5G", "80M", "VHT", "2T", "58", "30", "FCC", "5G", "80M", "VHT", "2T", "106", "28", "ETSI", "5G", "80M", "VHT", "2T", "106", "30", "MKK", "5G", "80M", "VHT", "2T", "106", "30", "FCC", "5G", "80M", "VHT", "2T", "122", "32", "ETSI", "5G", "80M", "VHT", "2T", "122", "30", "MKK", "5G", "80M", "VHT", "2T", "122", "30", "FCC", "5G", "80M", "VHT", "2T", "155", "34", "ETSI", "5G", "80M", "VHT", "2T", "155", "30", "MKK", "5G", "80M", "VHT", "2T", "155", "63" }; void ODM_ReadAndConfig_MP_8812A_TXPWR_LMT( IN PDM_ODM_T pDM_Odm ) { u4Byte i = 0; u4Byte ArrayLen = sizeof(Array_MP_8812A_TXPWR_LMT)/sizeof(pu1Byte); pu1Byte *Array = Array_MP_8812A_TXPWR_LMT; ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8812A_TXPWR_LMT\n")); for (i = 0; i < ArrayLen; i += 7 ) { pu1Byte regulation = Array[i]; pu1Byte band = Array[i+1]; pu1Byte bandwidth = Array[i+2]; pu1Byte rate = Array[i+3]; pu1Byte rfPath = Array[i+4]; pu1Byte chnl = Array[i+5]; pu1Byte val = Array[i+6]; odm_ConfigBB_TXPWR_LMT_8812A(pDM_Odm, regulation, band, bandwidth, rate, rfPath, chnl, val); } } /****************************************************************************** * TXPWR_LMT_HM812A03.TXT ******************************************************************************/ pu1Byte Array_MP_8812A_TXPWR_LMT_HM812A03[] = { "FCC", "2.4G", "20M", "CCK", "1T", "01", "36", "ETSI", "2.4G", "20M", "CCK", "1T", "01", "30", "MKK", "2.4G", "20M", "CCK", "1T", "01", "36", "FCC", "2.4G", "20M", "CCK", "1T", "02", "36", "ETSI", "2.4G", "20M", "CCK", "1T", "02", "30", "MKK", "2.4G", "20M", "CCK", "1T", "02", "36", "FCC", "2.4G", "20M", "CCK", "1T", "03", "36", "ETSI", "2.4G", "20M", "CCK", "1T", "03", "30", "MKK", "2.4G", "20M", "CCK", "1T", "03", "36", "FCC", "2.4G", "20M", "CCK", "1T", "04", "36", "ETSI", "2.4G", "20M", "CCK", "1T", "04", "30", "MKK", "2.4G", "20M", "CCK", "1T", "04", "36", "FCC", "2.4G", "20M", "CCK", "1T", "05", "36", "ETSI", "2.4G", "20M", "CCK", "1T", "05", "30", "MKK", "2.4G", "20M", "CCK", "1T", "05", "36", "FCC", "2.4G", "20M", "CCK", "1T", "06", "36", "ETSI", "2.4G", "20M", "CCK", "1T", "06", "30", "MKK", "2.4G", "20M", "CCK", "1T", "06", "36", "FCC", "2.4G", "20M", "CCK", "1T", "07", "36", "ETSI", "2.4G", "20M", "CCK", "1T", "07", "30", "MKK", "2.4G", "20M", "CCK", "1T", "07", "36", "FCC", "2.4G", "20M", "CCK", "1T", "08", "36", "ETSI", "2.4G", "20M", "CCK", "1T", "08", "30", "MKK", "2.4G", "20M", "CCK", "1T", "08", "36", "FCC", "2.4G", "20M", "CCK", "1T", "09", "36", "ETSI", "2.4G", "20M", "CCK", "1T", "09", "30", "MKK", "2.4G", "20M", "CCK", "1T", "09", "36", "FCC", "2.4G", "20M", "CCK", "1T", "10", "36", "ETSI", "2.4G", "20M", "CCK", "1T", "10", "30", "MKK", "2.4G", "20M", "CCK", "1T", "10", "36", "FCC", "2.4G", "20M", "CCK", "1T", "11", "36", "ETSI", "2.4G", "20M", "CCK", "1T", "11", "30", "MKK", "2.4G", "20M", "CCK", "1T", "11", "36", "FCC", "2.4G", "20M", "CCK", "1T", "12", "63", "ETSI", "2.4G", "20M", "CCK", "1T", "12", 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"2T", "62", "26", "MKK", "5G", "40M", "HT", "2T", "62", "26", "FCC", "5G", "40M", "HT", "2T", "102", "22", "ETSI", "5G", "40M", "HT", "2T", "102", "26", "MKK", "5G", "40M", "HT", "2T", "102", "36", "FCC", "5G", "40M", "HT", "2T", "110", "36", "ETSI", "5G", "40M", "HT", "2T", "110", "26", "MKK", "5G", "40M", "HT", "2T", "110", "34", "FCC", "5G", "40M", "HT", "2T", "118", "36", "ETSI", "5G", "40M", "HT", "2T", "118", "26", "MKK", "5G", "40M", "HT", "2T", "118", "34", "FCC", "5G", "40M", "HT", "2T", "126", "63", "ETSI", "5G", "40M", "HT", "2T", "126", "26", "MKK", "5G", "40M", "HT", "2T", "126", "34", "FCC", "5G", "40M", "HT", "2T", "134", "30", "ETSI", "5G", "40M", "HT", "2T", "134", "26", "MKK", "5G", "40M", "HT", "2T", "134", "34", "FCC", "5G", "40M", "HT", "2T", "151", "36", "ETSI", "5G", "40M", "HT", "2T", "151", "63", "MKK", "5G", "40M", "HT", "2T", "151", "63", "FCC", "5G", "40M", "HT", "2T", "159", "36", "ETSI", "5G", "40M", "HT", "2T", "159", "63", "MKK", "5G", "40M", "HT", "2T", "159", "63", "FCC", "5G", "80M", "VHT", "1T", "42", "20", "ETSI", "5G", "80M", "VHT", "1T", "42", "32", "MKK", "5G", "80M", "VHT", "1T", "42", "32", "FCC", "5G", "80M", "VHT", "1T", "58", "16", "ETSI", "5G", "80M", "VHT", "1T", "58", "32", "MKK", "5G", "80M", "VHT", "1T", "58", "32", "FCC", "5G", "80M", "VHT", "1T", "106", "22", "ETSI", "5G", "80M", "VHT", "1T", "106", "32", "MKK", "5G", "80M", "VHT", "1T", "106", "32", "FCC", "5G", "80M", "VHT", "1T", "122", "63", "ETSI", "5G", "80M", "VHT", "1T", "122", "32", "MKK", "5G", "80M", "VHT", "1T", "122", "32", "FCC", "5G", "80M", "VHT", "1T", "155", "36", "ETSI", "5G", "80M", "VHT", "1T", "155", "63", "MKK", "5G", "80M", "VHT", "1T", "155", "63", "FCC", "5G", "80M", "VHT", "2T", "42", "18", "ETSI", "5G", "80M", "VHT", "2T", "42", "26", "MKK", "5G", "80M", "VHT", "2T", "42", "28", "FCC", "5G", "80M", "VHT", "2T", "58", "16", "ETSI", "5G", "80M", "VHT", "2T", "58", "26", "MKK", "5G", "80M", "VHT", "2T", "58", "28", "FCC", "5G", "80M", "VHT", "2T", "106", "22", "ETSI", "5G", "80M", "VHT", "2T", "106", "26", "MKK", "5G", "80M", "VHT", "2T", "106", "32", "FCC", "5G", "80M", "VHT", "2T", "122", "63", "ETSI", "5G", "80M", "VHT", "2T", "122", "26", "MKK", "5G", "80M", "VHT", "2T", "122", "32", "FCC", "5G", "80M", "VHT", "2T", "155", "36", "ETSI", "5G", "80M", "VHT", "2T", "155", "63", "MKK", "5G", "80M", "VHT", "2T", "155", "63" }; void ODM_ReadAndConfig_MP_8812A_TXPWR_LMT_HM812A03( IN PDM_ODM_T pDM_Odm ) { u4Byte i = 0; u4Byte ArrayLen = sizeof(Array_MP_8812A_TXPWR_LMT_HM812A03)/sizeof(pu1Byte); pu1Byte *Array = Array_MP_8812A_TXPWR_LMT_HM812A03; ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8812A_TXPWR_LMT_HM812A03\n")); for (i = 0; i < ArrayLen; i += 7 ) { pu1Byte regulation = Array[i]; pu1Byte band = Array[i+1]; pu1Byte bandwidth = Array[i+2]; pu1Byte rate = Array[i+3]; pu1Byte rfPath = Array[i+4]; pu1Byte chnl = Array[i+5]; pu1Byte val = Array[i+6]; odm_ConfigBB_TXPWR_LMT_8812A(pDM_Odm, regulation, band, bandwidth, rate, rfPath, chnl, val); } } #endif // end of HWIMG_SUPPORT rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/rtl8812a/HalHWImg8812A_RF.h000066400000000000000000000105371261122257400233410ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #if (RTL8812A_SUPPORT == 1) #ifndef __INC_MP_RF_HW_IMG_8812A_H #define __INC_MP_RF_HW_IMG_8812A_H /****************************************************************************** * RadioA.TXT ******************************************************************************/ void ODM_ReadAndConfig_MP_8812A_RadioA( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); u4Byte ODM_GetVersion_MP_8812A_RadioA(void); /****************************************************************************** * RadioB.TXT ******************************************************************************/ void ODM_ReadAndConfig_MP_8812A_RadioB( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); u4Byte ODM_GetVersion_MP_8812A_RadioB(void); /****************************************************************************** * TxPowerTrack_AP.TXT ******************************************************************************/ void ODM_ReadAndConfig_MP_8812A_TxPowerTrack_AP( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); u4Byte ODM_GetVersion_MP_8812A_TxPowerTrack_AP(void); /****************************************************************************** * TxPowerTrack_PCIE.TXT ******************************************************************************/ void ODM_ReadAndConfig_MP_8812A_TxPowerTrack_PCIE( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); u4Byte ODM_GetVersion_MP_8812A_TxPowerTrack_PCIE(void); /****************************************************************************** * TxPowerTrack_RFE3.TXT ******************************************************************************/ void ODM_ReadAndConfig_MP_8812A_TxPowerTrack_RFE3( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); u4Byte ODM_GetVersion_MP_8812A_TxPowerTrack_RFE3(void); /****************************************************************************** * TxPowerTrack_RFE4.TXT ******************************************************************************/ void ODM_ReadAndConfig_MP_8812A_TxPowerTrack_RFE4( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); u4Byte ODM_GetVersion_MP_8812A_TxPowerTrack_RFE4(void); /****************************************************************************** * TxPowerTrack_USB.TXT ******************************************************************************/ void ODM_ReadAndConfig_MP_8812A_TxPowerTrack_USB( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); u4Byte ODM_GetVersion_MP_8812A_TxPowerTrack_USB(void); /****************************************************************************** * TXPWR_LMT.TXT ******************************************************************************/ void ODM_ReadAndConfig_MP_8812A_TXPWR_LMT( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); u4Byte ODM_GetVersion_MP_8812A_TXPWR_LMT(void); /****************************************************************************** * TXPWR_LMT_HM812A03.TXT ******************************************************************************/ void ODM_ReadAndConfig_MP_8812A_TXPWR_LMT_HM812A03( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); u4Byte ODM_GetVersion_MP_8812A_TXPWR_LMT_HM812A03(void); #endif #endif // end of HWIMG_SUPPORT rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/rtl8812a/HalPhyRf_8812A.c000066400000000000000000002300741261122257400231610ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include "Mp_Precomp.h" #include "../phydm_precomp.h" /*---------------------------Define Local Constant---------------------------*/ // 2010/04/25 MH Define the max tx power tracking tx agc power. #define ODM_TXPWRTRACK_MAX_IDX8812A 6 /*---------------------------Define Local Constant---------------------------*/ //3============================================================ //3 Tx Power Tracking //3============================================================ void DoIQK_8812A( PDM_ODM_T pDM_Odm, u1Byte DeltaThermalIndex, u1Byte ThermalValue, u1Byte Threshold ) { #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); #endif ODM_ResetIQKResult(pDM_Odm); pDM_Odm->RFCalibrateInfo.ThermalValue_IQK= ThermalValue; PHY_IQCalibrate_8812A(Adapter, FALSE); } /*----------------------------------------------------------------------------- * Function: odm_TxPwrTrackSetPwr88E() * * Overview: 88E change all channel tx power accordign to flag. * OFDM & CCK are all different. * * Input: NONE * * Output: NONE * * Return: NONE * * Revised History: * When Who Remark * 04/23/2012 MHC Create Version 0. * *---------------------------------------------------------------------------*/ VOID ODM_TxPwrTrackSetPwr8812A( PDM_ODM_T pDM_Odm, PWRTRACK_METHOD Method, u1Byte RFPath, u1Byte ChannelMappedIndex ) { u4Byte finalBbSwingIdx[2]; PADAPTER Adapter = pDM_Odm->Adapter; PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); u1Byte PwrTrackingLimit = 26; //+1.0dB u1Byte TxRate = 0xFF; u1Byte Final_OFDM_Swing_Index = 0; u1Byte Final_CCK_Swing_Index = 0; u1Byte i = 0; if (pDM_Odm->mp_mode == TRUE) { #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE )) #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) PMPT_CONTEXT pMptCtx = &(Adapter->MptCtx); #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx); #endif TxRate = MptToMgntRate(pMptCtx->MptRateIndex); #endif } else { u2Byte rate = *(pDM_Odm->pForcedDataRate); if(!rate) //auto rate { if(pDM_Odm->TxRate != 0xFF) #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) TxRate = HwRateToMRate(pDM_Odm->TxRate); #endif } else //force rate { TxRate = (u1Byte)rate; } } ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("===>ODM_TxPwrTrackSetPwr8812A\n")); if(TxRate != 0xFF) //20130429 Mimic Modify High Rate BBSwing Limit. { //2 CCK if((TxRate >= MGN_1M)&&(TxRate <= MGN_11M)) PwrTrackingLimit = 32; //+4dB //2 OFDM else if((TxRate >= MGN_6M)&&(TxRate <= MGN_48M)) PwrTrackingLimit = 30; //+3dB else if(TxRate == MGN_54M) PwrTrackingLimit = 28; //+2dB //2 HT else if((TxRate >= MGN_MCS0)&&(TxRate <= MGN_MCS2)) //QPSK/BPSK PwrTrackingLimit = 34; //+5dB else if((TxRate >= MGN_MCS3)&&(TxRate <= MGN_MCS4)) //16QAM PwrTrackingLimit = 30; //+3dB else if((TxRate >= MGN_MCS5)&&(TxRate <= MGN_MCS7)) //64QAM PwrTrackingLimit = 28; //+2dB else if((TxRate >= MGN_MCS8)&&(TxRate <= MGN_MCS10)) //QPSK/BPSK PwrTrackingLimit = 34; //+5dB else if((TxRate >= MGN_MCS11)&&(TxRate <= MGN_MCS12)) //16QAM PwrTrackingLimit = 30; //+3dB else if((TxRate >= MGN_MCS13)&&(TxRate <= MGN_MCS15)) //64QAM PwrTrackingLimit = 28; //+2dB //2 VHT else if((TxRate >= MGN_VHT1SS_MCS0)&&(TxRate <= MGN_VHT1SS_MCS2)) //QPSK/BPSK PwrTrackingLimit = 34; //+5dB else if((TxRate >= MGN_VHT1SS_MCS3)&&(TxRate <= MGN_VHT1SS_MCS4)) //16QAM PwrTrackingLimit = 30; //+3dB else if((TxRate >= MGN_VHT1SS_MCS5)&&(TxRate <= MGN_VHT1SS_MCS6)) //64QAM PwrTrackingLimit = 28; //+2dB else if(TxRate == MGN_VHT1SS_MCS7) //64QAM PwrTrackingLimit = 26; //+1dB else if(TxRate == MGN_VHT1SS_MCS8) //256QAM PwrTrackingLimit = 24; //+0dB else if(TxRate == MGN_VHT1SS_MCS9) //256QAM PwrTrackingLimit = 22; //-1dB else if((TxRate >= MGN_VHT2SS_MCS0)&&(TxRate <= MGN_VHT2SS_MCS2)) //QPSK/BPSK PwrTrackingLimit = 34; //+5dB else if((TxRate >= MGN_VHT2SS_MCS3)&&(TxRate <= MGN_VHT2SS_MCS4)) //16QAM PwrTrackingLimit = 30; //+3dB else if((TxRate >= MGN_VHT2SS_MCS5)&&(TxRate <= MGN_VHT2SS_MCS6)) //64QAM PwrTrackingLimit = 28; //+2dB else if(TxRate == MGN_VHT2SS_MCS7) //64QAM PwrTrackingLimit = 26; //+1dB else if(TxRate == MGN_VHT2SS_MCS8) //256QAM PwrTrackingLimit = 24; //+0dB else if(TxRate == MGN_VHT2SS_MCS9) //256QAM PwrTrackingLimit = 22; //-1dB else PwrTrackingLimit = 24; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("TxRate=0x%x, PwrTrackingLimit=%d\n", TxRate, PwrTrackingLimit)); if (Method == BBSWING) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("===>ODM_TxPwrTrackSetPwr8812A\n")); if (RFPath == ODM_RF_PATH_A) { finalBbSwingIdx[ODM_RF_PATH_A] = (pDM_Odm->RFCalibrateInfo.OFDM_index[ODM_RF_PATH_A] > PwrTrackingLimit) ? PwrTrackingLimit : pDM_Odm->RFCalibrateInfo.OFDM_index[ODM_RF_PATH_A]; ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("pDM_Odm->RFCalibrateInfo.OFDM_index[ODM_RF_PATH_A]=%d, pDM_Odm->RealBbSwingIdx[ODM_RF_PATH_A]=%d\n", pDM_Odm->RFCalibrateInfo.OFDM_index[ODM_RF_PATH_A], finalBbSwingIdx[ODM_RF_PATH_A])); ODM_SetBBReg(pDM_Odm, rA_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[finalBbSwingIdx[ODM_RF_PATH_A]]); } else { finalBbSwingIdx[ODM_RF_PATH_B] = (pDM_Odm->RFCalibrateInfo.OFDM_index[ODM_RF_PATH_B] > PwrTrackingLimit) ? PwrTrackingLimit : pDM_Odm->RFCalibrateInfo.OFDM_index[ODM_RF_PATH_B]; ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("pDM_Odm->RFCalibrateInfo.OFDM_index[ODM_RF_PATH_B]=%d, pDM_Odm->RealBbSwingIdx[ODM_RF_PATH_B]=%d\n", pDM_Odm->RFCalibrateInfo.OFDM_index[ODM_RF_PATH_B], finalBbSwingIdx[ODM_RF_PATH_B])); ODM_SetBBReg(pDM_Odm, rB_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[finalBbSwingIdx[ODM_RF_PATH_B]]); } } else if (Method == MIX_MODE) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("pDM_Odm->DefaultOfdmIndex=%d, pDM_Odm->Absolute_OFDMSwingIdx[RFPath]=%d, RF_Path = %d\n", pDM_Odm->DefaultOfdmIndex, pDM_Odm->Absolute_OFDMSwingIdx[RFPath],RFPath )); Final_CCK_Swing_Index = pDM_Odm->DefaultCckIndex + pDM_Odm->Absolute_OFDMSwingIdx[RFPath]; Final_OFDM_Swing_Index = pDM_Odm->DefaultOfdmIndex + pDM_Odm->Absolute_OFDMSwingIdx[RFPath]; if (RFPath == ODM_RF_PATH_A) { if(Final_OFDM_Swing_Index > PwrTrackingLimit) //BBSwing higher then Limit { pDM_Odm->Remnant_CCKSwingIdx= Final_CCK_Swing_Index - PwrTrackingLimit; // CCK Follow the same compensate value as Path A pDM_Odm->Remnant_OFDMSwingIdx[RFPath] = Final_OFDM_Swing_Index - PwrTrackingLimit; ODM_SetBBReg(pDM_Odm, rA_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[PwrTrackingLimit]); pDM_Odm->Modify_TxAGC_Flag_PathA= TRUE; PHY_SetTxPowerLevelByPath(Adapter, pHalData->CurrentChannel, ODM_RF_PATH_A); ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Path_A Over BBSwing Limit , PwrTrackingLimit = %d , Remnant TxAGC Value = %d \n", PwrTrackingLimit, pDM_Odm->Remnant_OFDMSwingIdx[RFPath])); } else if (Final_OFDM_Swing_Index <= 0) { pDM_Odm->Remnant_CCKSwingIdx= Final_CCK_Swing_Index; // CCK Follow the same compensate value as Path A pDM_Odm->Remnant_OFDMSwingIdx[RFPath] = Final_OFDM_Swing_Index; ODM_SetBBReg(pDM_Odm, rA_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[0]); pDM_Odm->Modify_TxAGC_Flag_PathA= TRUE; PHY_SetTxPowerLevelByPath(Adapter, pHalData->CurrentChannel, ODM_RF_PATH_A); ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Path_A Lower then BBSwing lower bound 0 , Remnant TxAGC Value = %d \n", pDM_Odm->Remnant_OFDMSwingIdx[RFPath])); } else { ODM_SetBBReg(pDM_Odm, rA_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Path_A Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index)); if(pDM_Odm->Modify_TxAGC_Flag_PathA) //If TxAGC has changed, reset TxAGC again { pDM_Odm->Remnant_CCKSwingIdx= 0; pDM_Odm->Remnant_OFDMSwingIdx[RFPath] = 0; PHY_SetTxPowerLevelByPath(Adapter, pHalData->CurrentChannel, ODM_RF_PATH_A); pDM_Odm->Modify_TxAGC_Flag_PathA= FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Path_A pDM_Odm->Modify_TxAGC_Flag = FALSE \n")); } } } if (RFPath == ODM_RF_PATH_B) { if(Final_OFDM_Swing_Index > PwrTrackingLimit) //BBSwing higher then Limit { pDM_Odm->Remnant_OFDMSwingIdx[RFPath] = Final_OFDM_Swing_Index - PwrTrackingLimit; ODM_SetBBReg(pDM_Odm, rB_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[PwrTrackingLimit]); pDM_Odm->Modify_TxAGC_Flag_PathB= TRUE; PHY_SetTxPowerLevelByPath(Adapter, pHalData->CurrentChannel, ODM_RF_PATH_B); ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Path_B Over BBSwing Limit , PwrTrackingLimit = %d , Remnant TxAGC Value = %d \n", PwrTrackingLimit, pDM_Odm->Remnant_OFDMSwingIdx[RFPath])); } else if (Final_OFDM_Swing_Index <= 0) { pDM_Odm->Remnant_OFDMSwingIdx[RFPath] = Final_OFDM_Swing_Index; ODM_SetBBReg(pDM_Odm, rB_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[0]); pDM_Odm->Modify_TxAGC_Flag_PathB = TRUE; PHY_SetTxPowerLevelByPath(Adapter, pHalData->CurrentChannel, ODM_RF_PATH_B); ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Path_B Lower then BBSwing lower bound 0 , Remnant TxAGC Value = %d \n", pDM_Odm->Remnant_OFDMSwingIdx[RFPath])); } else { ODM_SetBBReg(pDM_Odm, rB_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Path_B Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index)); if(pDM_Odm->Modify_TxAGC_Flag_PathB) //If TxAGC has changed, reset TxAGC again { pDM_Odm->Remnant_OFDMSwingIdx[RFPath] = 0; PHY_SetTxPowerLevelByPath(Adapter, pHalData->CurrentChannel, ODM_RF_PATH_B); pDM_Odm->Modify_TxAGC_Flag_PathB = FALSE; ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("******Path_B pDM_Odm->Modify_TxAGC_Flag = FALSE \n")); } } } } else { return; } } VOID GetDeltaSwingTable_8812A( IN PDM_ODM_T pDM_Odm, OUT pu1Byte *TemperatureUP_A, OUT pu1Byte *TemperatureDOWN_A, OUT pu1Byte *TemperatureUP_B, OUT pu1Byte *TemperatureDOWN_B ) { PADAPTER Adapter = pDM_Odm->Adapter; PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u2Byte rate = *(pDM_Odm->pForcedDataRate); u1Byte channel = pHalData->CurrentChannel; if ( 1 <= channel && channel <= 14) { if (IS_CCK_RATE(rate)) { *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P; *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N; *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P; *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N; } else { *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P; *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N; *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P; *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N; } } else if ( 36 <= channel && channel <= 64) { *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[0]; *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[0]; *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[0]; *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[0]; } else if ( 100 <= channel && channel <= 140) { *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[1]; *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[1]; *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[1]; *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[1]; } else if ( 149 <= channel && channel <= 173) { *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[2]; *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[2]; *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[2]; *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[2]; } else { *TemperatureUP_A = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E; *TemperatureDOWN_A = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E; *TemperatureUP_B = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E; *TemperatureDOWN_B = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E; } return; } void ConfigureTxpowerTrack_8812A( PTXPWRTRACK_CFG pConfig ) { pConfig->SwingTableSize_CCK = TXSCALE_TABLE_SIZE; pConfig->SwingTableSize_OFDM = TXSCALE_TABLE_SIZE; pConfig->Threshold_IQK = IQK_THRESHOLD; pConfig->AverageThermalNum = AVG_THERMAL_NUM_8812A; pConfig->RfPathCount = MAX_PATH_NUM_8812A; pConfig->ThermalRegAddr = RF_T_METER_8812A; pConfig->ODM_TxPwrTrackSetPwr = ODM_TxPwrTrackSetPwr8812A; pConfig->DoIQK = DoIQK_8812A; pConfig->PHY_LCCalibrate = PHY_LCCalibrate_8812A; pConfig->GetDeltaSwingTable = GetDeltaSwingTable_8812A; } #define BW_20M 0 #define BW_40M 1 #define BW_80M 2 void _IQK_RX_FillIQC_8812A( IN PDM_ODM_T pDM_Odm, IN ODM_RF_RADIO_PATH_E Path, IN unsigned int RX_X, IN unsigned int RX_Y ) { switch (Path) { case ODM_RF_PATH_A: { ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C if (RX_X>>1 >=0x112 || (RX_Y>>1 >= 0x12 && RX_Y>>1 <= 0x3ee)){ ODM_SetBBReg(pDM_Odm, 0xc10, 0x000003ff, 0x100); ODM_SetBBReg(pDM_Odm, 0xc10, 0x03ff0000, 0); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RX_X = %x;;RX_Y = %x ====>fill to IQC\n", RX_X>>1&0x000003ff, RX_Y>>1&0x000003ff)); } else{ ODM_SetBBReg(pDM_Odm, 0xc10, 0x000003ff, RX_X>>1); ODM_SetBBReg(pDM_Odm, 0xc10, 0x03ff0000, RX_Y>>1); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RX_X = %x;;RX_Y = %x ====>fill to IQC\n", RX_X>>1&0x000003ff, RX_Y>>1&0x000003ff)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xc10 = %x ====>fill to IQC\n", ODM_Read4Byte(pDM_Odm, 0xc10))); } } break; case ODM_RF_PATH_B: { ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C if (RX_X>>1 >=0x112 || (RX_Y>>1 >= 0x12 && RX_Y>>1 <= 0x3ee)){ ODM_SetBBReg(pDM_Odm, 0xe10, 0x000003ff, 0x100); ODM_SetBBReg(pDM_Odm, 0xe10, 0x03ff0000, 0); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RX_X = %x;;RX_Y = %x ====>fill to IQC\n", RX_X>>1&0x000003ff, RX_Y>>1&0x000003ff)); } else{ ODM_SetBBReg(pDM_Odm, 0xe10, 0x000003ff, RX_X>>1); ODM_SetBBReg(pDM_Odm, 0xe10, 0x03ff0000, RX_Y>>1); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RX_X = %x;;RX_Y = %x====>fill to IQC\n ", RX_X>>1&0x000003ff, RX_Y>>1&0x000003ff)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe10 = %x====>fill to IQC\n", ODM_Read4Byte(pDM_Odm, 0xe10))); } } break; default: break; }; } void _IQK_TX_FillIQC_8812A( IN PDM_ODM_T pDM_Odm, IN ODM_RF_RADIO_PATH_E Path, IN unsigned int TX_X, IN unsigned int TX_Y ) { switch (Path) { case ODM_RF_PATH_A: { ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); // [31] = 1 --> Page C1 ODM_SetBBReg(pDM_Odm, 0xc90, BIT(7), 0x1); ODM_SetBBReg(pDM_Odm, 0xcc4, BIT(18), 0x1); if (!pDM_Odm->DPK_Done) ODM_SetBBReg(pDM_Odm, 0xcc4, BIT(29), 0x1); ODM_SetBBReg(pDM_Odm, 0xcc8, BIT(29), 0x1); ODM_SetBBReg(pDM_Odm, 0xccc, 0x000007ff, TX_Y); ODM_SetBBReg(pDM_Odm, 0xcd4, 0x000007ff, TX_X); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("TX_X = %x;;TX_Y = %x =====> fill to IQC\n", TX_X&0x000007ff, TX_Y&0x000007ff)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xcd4 = %x;;0xccc = %x ====>fill to IQC\n", ODM_GetBBReg(pDM_Odm, 0xcd4, 0x000007ff), ODM_GetBBReg(pDM_Odm, 0xccc, 0x000007ff))); } break; case ODM_RF_PATH_B: { ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); // [31] = 1 --> Page C1 ODM_SetBBReg(pDM_Odm, 0xe90, BIT(7), 0x1); ODM_SetBBReg(pDM_Odm, 0xec4, BIT(18), 0x1); if (!pDM_Odm->DPK_Done) ODM_SetBBReg(pDM_Odm, 0xec4, BIT(29), 0x1); ODM_SetBBReg(pDM_Odm, 0xec8, BIT(29), 0x1); ODM_SetBBReg(pDM_Odm, 0xecc, 0x000007ff, TX_Y); ODM_SetBBReg(pDM_Odm, 0xed4, 0x000007ff, TX_X); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("TX_X = %x;;TX_Y = %x =====> fill to IQC\n", TX_X&0x000007ff, TX_Y&0x000007ff)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xed4 = %x;;0xecc = %x ====>fill to IQC\n", ODM_GetBBReg(pDM_Odm, 0xed4, 0x000007ff), ODM_GetBBReg(pDM_Odm, 0xecc, 0x000007ff))); } break; default: break; }; } void _IQK_BackupMacBB_8812A( IN PDM_ODM_T pDM_Odm, IN pu4Byte MACBB_backup, IN pu4Byte Backup_MACBB_REG, IN u4Byte MACBB_NUM ) { u4Byte i; ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C //save MACBB default value for (i = 0; i < MACBB_NUM; i++){ MACBB_backup[i] = ODM_Read4Byte(pDM_Odm, Backup_MACBB_REG[i]); } ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BackupMacBB Success!!!!\n")); } void _IQK_BackupRF_8812A( IN PDM_ODM_T pDM_Odm, IN pu4Byte RFA_backup, IN pu4Byte RFB_backup, IN pu4Byte Backup_RF_REG, IN u4Byte RF_NUM ) { u4Byte i; ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C //Save RF Parameters for (i = 0; i < RF_NUM; i++){ RFA_backup[i] = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, Backup_RF_REG[i], bMaskDWord); RFB_backup[i] = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, Backup_RF_REG[i], bMaskDWord); } ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BackupRF Success!!!!\n")); } void _IQK_BackupAFE_8812A( IN PDM_ODM_T pDM_Odm, IN pu4Byte AFE_backup, IN pu4Byte Backup_AFE_REG, IN u4Byte AFE_NUM ) { u4Byte i; ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C //Save AFE Parameters for (i = 0; i < AFE_NUM; i++){ AFE_backup[i] = ODM_Read4Byte(pDM_Odm, Backup_AFE_REG[i]); } ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BackupAFE Success!!!!\n")); } void _IQK_RestoreMacBB_8812A( IN PDM_ODM_T pDM_Odm, IN pu4Byte MACBB_backup, IN pu4Byte Backup_MACBB_REG, IN u4Byte MACBB_NUM ) { u4Byte i; ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C //Reload MacBB Parameters for (i = 0; i < MACBB_NUM; i++){ ODM_Write4Byte(pDM_Odm, Backup_MACBB_REG[i], MACBB_backup[i]); } ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RestoreMacBB Success!!!!\n")); } void _IQK_RestoreRF_8812A( IN PDM_ODM_T pDM_Odm, IN ODM_RF_RADIO_PATH_E Path, IN pu4Byte Backup_RF_REG, IN pu4Byte RF_backup, IN u4Byte RF_REG_NUM ) { u4Byte i; ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C for (i = 0; i < RF_REG_NUM; i++) ODM_SetRFReg(pDM_Odm, Path, Backup_RF_REG[i], bRFRegOffsetMask, RF_backup[i]); ODM_SetRFReg(pDM_Odm, Path, 0xef, bRFRegOffsetMask, 0x0); switch(Path){ case ODM_RF_PATH_A: { ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RestoreRF Path A Success!!!!\n")); } break; case ODM_RF_PATH_B: { ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RestoreRF Path B Success!!!!\n")); } break; default: break; } } void _IQK_RestoreAFE_8812A( IN PDM_ODM_T pDM_Odm, IN pu4Byte AFE_backup, IN pu4Byte Backup_AFE_REG, IN u4Byte AFE_NUM ) { u4Byte i; ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C //Reload AFE Parameters for (i = 0; i < AFE_NUM; i++){ ODM_Write4Byte(pDM_Odm, Backup_AFE_REG[i], AFE_backup[i]); } ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); // [31] = 1 --> Page C1 ODM_Write4Byte(pDM_Odm, 0xc80, 0x0); ODM_Write4Byte(pDM_Odm, 0xc84, 0x0); ODM_Write4Byte(pDM_Odm, 0xc88, 0x0); ODM_Write4Byte(pDM_Odm, 0xc8c, 0x3c000000); ODM_SetBBReg(pDM_Odm, 0xc90, BIT(7), 0x1); ODM_SetBBReg(pDM_Odm, 0xcc4, BIT(18), 0x1); if (!pDM_Odm->DPK_Done) ODM_SetBBReg(pDM_Odm, 0xcc4, BIT(29), 0x1); ODM_SetBBReg(pDM_Odm, 0xcc8, BIT(29), 0x1); //ODM_Write4Byte(pDM_Odm, 0xcb8, 0x0); ODM_Write4Byte(pDM_Odm, 0xe80, 0x0); ODM_Write4Byte(pDM_Odm, 0xe84, 0x0); ODM_Write4Byte(pDM_Odm, 0xe88, 0x0); ODM_Write4Byte(pDM_Odm, 0xe8c, 0x3c000000); ODM_SetBBReg(pDM_Odm, 0xe90, BIT(7), 0x1); ODM_SetBBReg(pDM_Odm, 0xec4, BIT(18), 0x1); if (!pDM_Odm->DPK_Done) ODM_SetBBReg(pDM_Odm, 0xec4, BIT(29), 0x1); ODM_SetBBReg(pDM_Odm, 0xec8, BIT(29), 0x1); //ODM_Write4Byte(pDM_Odm, 0xeb8, 0x0); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RestoreAFE Success!!!!\n")); } void _IQK_ConfigureMAC_8812A( IN PDM_ODM_T pDM_Odm ) { // ========MAC register setting======== ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C ODM_Write1Byte(pDM_Odm, 0x522, 0x3f); ODM_SetBBReg(pDM_Odm, 0x550, BIT(11)|BIT(3), 0x0); ODM_Write1Byte(pDM_Odm, 0x808, 0x00); // RX ante off ODM_SetBBReg(pDM_Odm, 0x838, 0xf, 0xc); // CCA off ODM_Write1Byte(pDM_Odm, 0xa07, 0xf); // CCK RX Path off } #define cal_num 10 void _IQK_Tx_8812A( IN PDM_ODM_T pDM_Odm, IN u1Byte chnlIdx ) { u1Byte delay_count, cal = 0; u1Byte cal0_retry, cal1_retry, TX0_Average = 0, TX1_Average = 0, RX0_Average = 0, RX1_Average = 0; int TX_IQC_temp[10][4], TX_IQC[4]={}; //TX_IQC = [TX0_X, TX0_Y,TX1_X,TX1_Y]; for 3 times int RX_IQC_temp[10][4], RX_IQC[4]={}; //RX_IQC = [RX0_X, RX0_Y,RX1_X,RX1_Y]; for 3 times BOOLEAN TX0_fail = TRUE, RX0_fail = TRUE, IQK0_ready = FALSE, TX0_finish = FALSE, RX0_finish = FALSE; BOOLEAN TX1_fail = TRUE, RX1_fail = TRUE, IQK1_ready = FALSE, TX1_finish = FALSE, RX1_finish = FALSE, VDF_enable = FALSE; int i, ii, dx = 0, dy = 0; PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BandWidth = %d, ExtPA5G = %d, ExtPA2G = %d\n", *pDM_Odm->pBandWidth, pDM_Odm->ExtPA5G, pDM_Odm->ExtPA)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Interface = %d, RFE_Type = %d\n", pDM_Odm->SupportInterface, pDM_Odm->RFEType)); if (*pDM_Odm->pBandWidth == 2){ VDF_enable = TRUE; } VDF_enable = FALSE; ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C // ========Path-A AFE all on======== // Port 0 DAC/ADC on ODM_Write4Byte(pDM_Odm, 0xc60, 0x77777777); ODM_Write4Byte(pDM_Odm, 0xc64, 0x77777777); // Port 1 DAC/ADC on ODM_Write4Byte(pDM_Odm, 0xe60, 0x77777777); ODM_Write4Byte(pDM_Odm, 0xe64, 0x77777777); ODM_Write4Byte(pDM_Odm, 0xc68, 0x19791979); ODM_Write4Byte(pDM_Odm, 0xe68, 0x19791979); ODM_SetBBReg(pDM_Odm, 0xc00, 0xf, 0x4);// hardware 3-wire off ODM_SetBBReg(pDM_Odm, 0xe00, 0xf, 0x4);// hardware 3-wire off // DAC/ADC sampling rate (160 MHz) ODM_SetBBReg(pDM_Odm, 0xc5c, BIT(26)|BIT(25)|BIT(24), 0x7); ODM_SetBBReg(pDM_Odm, 0xe5c, BIT(26)|BIT(25)|BIT(24), 0x7); //====== Path A TX IQK RF Setting ====== ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, bRFRegOffsetMask, 0x80002); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, bRFRegOffsetMask, 0x20000); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, bRFRegOffsetMask, 0x3fffd); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, bRFRegOffsetMask, 0xfe83f); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x65, bRFRegOffsetMask, 0x931d5); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x8f, bRFRegOffsetMask, 0x8a001); //====== Path B TX IQK RF Setting ====== ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, bRFRegOffsetMask, 0x80002); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x30, bRFRegOffsetMask, 0x20000); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x31, bRFRegOffsetMask, 0x3fffd); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x32, bRFRegOffsetMask, 0xfe83f); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x65, bRFRegOffsetMask, 0x931d5); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x8f, bRFRegOffsetMask, 0x8a001); ODM_Write4Byte(pDM_Odm, 0x90c, 0x00008000); ODM_SetBBReg(pDM_Odm, 0xc94, BIT(0), 0x1); ODM_SetBBReg(pDM_Odm, 0xe94, BIT(0), 0x1); ODM_Write4Byte(pDM_Odm, 0x978, 0x29002000);// TX (X,Y) ODM_Write4Byte(pDM_Odm, 0x97c, 0xa9002000);// RX (X,Y) ODM_Write4Byte(pDM_Odm, 0x984, 0x00462910);// [0]:AGC_en, [15]:idac_K_Mask ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); // [31] = 1 --> Page C1 if (pDM_Odm->ExtPA5G){ if (pDM_Odm->RFEType == 1){ ODM_Write4Byte(pDM_Odm, 0xc88, 0x821403e3); ODM_Write4Byte(pDM_Odm, 0xe88, 0x821403e3); } else{ ODM_Write4Byte(pDM_Odm, 0xc88, 0x821403f7); ODM_Write4Byte(pDM_Odm, 0xe88, 0x821403f7); } } else{ ODM_Write4Byte(pDM_Odm, 0xc88, 0x821403f1); ODM_Write4Byte(pDM_Odm, 0xe88, 0x821403f1); } if (*pDM_Odm->pBandType){ ODM_Write4Byte(pDM_Odm, 0xc8c, 0x68163e96); ODM_Write4Byte(pDM_Odm, 0xe8c, 0x68163e96); } else{ ODM_Write4Byte(pDM_Odm, 0xc8c, 0x28163e96); ODM_Write4Byte(pDM_Odm, 0xe8c, 0x28163e96); if (pDM_Odm->RFEType == 3){ if (pDM_Odm->ExtPA) ODM_Write4Byte(pDM_Odm, 0xc88, 0x821403e3); else ODM_Write4Byte(pDM_Odm, 0xc88, 0x821403f7); } } if (VDF_enable){} else{ ODM_Write4Byte(pDM_Odm, 0xc80, 0x18008c10);// TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 ODM_Write4Byte(pDM_Odm, 0xc84, 0x38008c10);// RX_Tone_idx[9:0], RxK_Mask[29] ODM_Write4Byte(pDM_Odm, 0xce8, 0x00000000); ODM_Write4Byte(pDM_Odm, 0xe80, 0x18008c10);// TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 ODM_Write4Byte(pDM_Odm, 0xe84, 0x38008c10);// RX_Tone_idx[9:0], RxK_Mask[29] ODM_Write4Byte(pDM_Odm, 0xee8, 0x00000000); cal0_retry = 0; cal1_retry = 0; while(1){ // one shot ODM_Write4Byte(pDM_Odm, 0xcb8, 0x00100000);// cb8[20] ±N SI/PI ¨Ï¥ÎÅv¤Áµ¹ iqk_dpk module ODM_Write4Byte(pDM_Odm, 0xeb8, 0x00100000);// cb8[20] ±N SI/PI ¨Ï¥ÎÅv¤Áµ¹ iqk_dpk module ODM_Write4Byte(pDM_Odm, 0x980, 0xfa000000); ODM_Write4Byte(pDM_Odm, 0x980, 0xf8000000); ODM_delay_ms(10); //Delay 10ms ODM_Write4Byte(pDM_Odm, 0xcb8, 0x00000000); ODM_Write4Byte(pDM_Odm, 0xeb8, 0x00000000); delay_count = 0; while (1){ if (!TX0_finish) IQK0_ready = (BOOLEAN) ODM_GetBBReg(pDM_Odm, 0xd00, BIT(10)); if (!TX1_finish) IQK1_ready = (BOOLEAN) ODM_GetBBReg(pDM_Odm, 0xd40, BIT(10)); if ((IQK0_ready && IQK1_ready) || (delay_count>20)) break; else{ ODM_delay_ms(1); delay_count++; } } ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("TX delay_count = %d\n", delay_count)); if (delay_count < 20){ // If 20ms No Result, then cal_retry++ // ============TXIQK Check============== TX0_fail = (BOOLEAN) ODM_GetBBReg(pDM_Odm, 0xd00, BIT(12)); TX1_fail = (BOOLEAN) ODM_GetBBReg(pDM_Odm, 0xd40, BIT(12)); if (!(TX0_fail || TX0_finish)){ ODM_Write4Byte(pDM_Odm, 0xcb8, 0x02000000); TX_IQC_temp[TX0_Average][0] = ODM_GetBBReg(pDM_Odm, 0xd00, 0x07ff0000)<<21; ODM_Write4Byte(pDM_Odm, 0xcb8, 0x04000000); TX_IQC_temp[TX0_Average][1] = ODM_GetBBReg(pDM_Odm, 0xd00, 0x07ff0000)<<21; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("TX_X0[%d] = %x ;; TX_Y0[%d] = %x\n", TX0_Average, (TX_IQC_temp[TX0_Average][0])>>21&0x000007ff, TX0_Average, (TX_IQC_temp[TX0_Average][1])>>21&0x000007ff)); /* ODM_Write4Byte(pDM_Odm, 0xcb8, 0x01000000); reg1 = ODM_GetBBReg(pDM_Odm, 0xd00, 0xffffffff); ODM_Write4Byte(pDM_Odm, 0xcb8, 0x02000000); reg2 = ODM_GetBBReg(pDM_Odm, 0xd00, 0x0000001f); Image_Power = (reg2<<32)+reg1; DbgPrint("Before PW = %d\n", Image_Power); ODM_Write4Byte(pDM_Odm, 0xcb8, 0x03000000); reg1 = ODM_GetBBReg(pDM_Odm, 0xd00, 0xffffffff); ODM_Write4Byte(pDM_Odm, 0xcb8, 0x04000000); reg2 = ODM_GetBBReg(pDM_Odm, 0xd00, 0x0000001f); Image_Power = (reg2<<32)+reg1; DbgPrint("After PW = %d\n", Image_Power); */ TX0_Average++; } else{ cal0_retry++; if (cal0_retry == 10) break; } if (!(TX1_fail || TX1_finish)){ ODM_Write4Byte(pDM_Odm, 0xeb8, 0x02000000); TX_IQC_temp[TX1_Average][2] = ODM_GetBBReg(pDM_Odm, 0xd40, 0x07ff0000)<<21; ODM_Write4Byte(pDM_Odm, 0xeb8, 0x04000000); TX_IQC_temp[TX1_Average][3] = ODM_GetBBReg(pDM_Odm, 0xd40, 0x07ff0000)<<21; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("TX_X1[%d] = %x ;; TX_Y1[%d] = %x\n", TX1_Average, (TX_IQC_temp[TX1_Average][2])>>21&0x000007ff, TX1_Average, (TX_IQC_temp[TX1_Average][3])>>21&0x000007ff)); /* int reg1 = 0, reg2 = 0, Image_Power = 0; ODM_Write4Byte(pDM_Odm, 0xeb8, 0x01000000); reg1 = ODM_GetBBReg(pDM_Odm, 0xd40, 0xffffffff); ODM_Write4Byte(pDM_Odm, 0xeb8, 0x02000000); reg2 = ODM_GetBBReg(pDM_Odm, 0xd40, 0x0000001f); Image_Power = (reg2<<32)+reg1; DbgPrint("Before PW = %d\n", Image_Power); ODM_Write4Byte(pDM_Odm, 0xeb8, 0x03000000); reg1 = ODM_GetBBReg(pDM_Odm, 0xd40, 0xffffffff); ODM_Write4Byte(pDM_Odm, 0xeb8, 0x04000000); reg2 = ODM_GetBBReg(pDM_Odm, 0xd40, 0x0000001f); Image_Power = (reg2<<32)+reg1; DbgPrint("After PW = %d\n", Image_Power); */ TX1_Average++; } else{ cal1_retry++; if (cal1_retry == 10) break; } } else{ cal0_retry++; cal1_retry++; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay 20ms TX IQK Not Ready!!!!!\n")); if (cal0_retry == 10) break; } if (TX0_Average >= 2){ for (i = 0; i < TX0_Average; i++){ for (ii = i+1; ii >21) - (TX_IQC_temp[ii][0]>>21); if (dx < 4 && dx > -4){ dy = (TX_IQC_temp[i][1]>>21) - (TX_IQC_temp[ii][1]>>21); if (dy < 4 && dy > -4){ TX_IQC[0] = ((TX_IQC_temp[i][0]>>21) + (TX_IQC_temp[ii][0]>>21))/2; TX_IQC[1] = ((TX_IQC_temp[i][1]>>21) + (TX_IQC_temp[ii][1]>>21))/2; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("TXA_X = %x;;TXA_Y = %x\n", TX_IQC[0]&0x000007ff, TX_IQC[1]&0x000007ff)); TX0_finish = TRUE; } } } } } if (TX1_Average >= 2){ for (i = 0; i < TX1_Average; i++){ for (ii = i+1; ii >21) - (TX_IQC_temp[ii][2]>>21); if (dx < 4 && dx > -4){ dy = (TX_IQC_temp[i][3]>>21) - (TX_IQC_temp[ii][3]>>21); if (dy < 4 && dy > -4){ TX_IQC[2] = ((TX_IQC_temp[i][2]>>21) + (TX_IQC_temp[ii][2]>>21))/2; TX_IQC[3] = ((TX_IQC_temp[i][3]>>21) + (TX_IQC_temp[ii][3]>>21))/2; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("TXB_X = %x;;TXB_Y = %x\n", TX_IQC[2]&0x000007ff, TX_IQC[3]&0x000007ff)); TX1_finish = TRUE; } } } } } ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("TX0_Average = %d, TX1_Average = %d\n", TX0_Average, TX1_Average)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("TX0_finish = %d, TX1_finish = %d\n", TX0_finish, TX1_finish)); if (TX0_finish && TX1_finish) break; if ((cal0_retry + TX0_Average) >= 10 || (cal1_retry + TX1_Average) >= 10 ) break; } ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("TXA_cal_retry = %d\n", cal0_retry)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("TXB_cal_retry = %d\n", cal1_retry)); } ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x58, 0x7fe00, ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x8, 0xffc00)); // Load LOK ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x58, 0x7fe00, ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x8, 0xffc00)); // Load LOK ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); // [31] = 1 --> Page C1 if (VDF_enable == 1){} else{ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C if (TX0_finish){ //====== Path A RX IQK RF Setting====== ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, bRFRegOffsetMask, 0x80000); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x30, bRFRegOffsetMask, 0x30000); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x31, bRFRegOffsetMask, 0x3f7ff); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x32, bRFRegOffsetMask, 0xfe7bf); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x8f, bRFRegOffsetMask, 0x88001); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x65, bRFRegOffsetMask, 0x931d1); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xef, bRFRegOffsetMask, 0x00000); } if (TX1_finish){ //====== Path B RX IQK RF Setting====== ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, bRFRegOffsetMask, 0x80000); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x30, bRFRegOffsetMask, 0x30000); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x31, bRFRegOffsetMask, 0x3f7ff); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x32, bRFRegOffsetMask, 0xfe7bf); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x8f, bRFRegOffsetMask, 0x88001); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x65, bRFRegOffsetMask, 0x931d1); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xef, bRFRegOffsetMask, 0x00000); } ODM_SetBBReg(pDM_Odm, 0x978, BIT(31), 0x1); ODM_SetBBReg(pDM_Odm, 0x97c, BIT(31), 0x0); ODM_Write4Byte(pDM_Odm, 0x90c, 0x00008000); if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) ODM_Write4Byte(pDM_Odm, 0x984, 0x0046a911); else ODM_Write4Byte(pDM_Odm, 0x984, 0x0046a890); //ODM_Write4Byte(pDM_Odm, 0x984, 0x0046a890); if (pDM_Odm->RFEType == 1){ ODM_Write4Byte(pDM_Odm, 0xcb0, 0x77777717); ODM_Write4Byte(pDM_Odm, 0xcb4, 0x00000077); ODM_Write4Byte(pDM_Odm, 0xeb0, 0x77777717); ODM_Write4Byte(pDM_Odm, 0xeb4, 0x00000077); } else{ ODM_Write4Byte(pDM_Odm, 0xcb0, 0x77777717); ODM_Write4Byte(pDM_Odm, 0xcb4, 0x02000077); ODM_Write4Byte(pDM_Odm, 0xeb0, 0x77777717); ODM_Write4Byte(pDM_Odm, 0xeb4, 0x02000077); } ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); // [31] = 1 --> Page C1 if (TX0_finish){ ODM_Write4Byte(pDM_Odm, 0xc80, 0x38008c10);// TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 ODM_Write4Byte(pDM_Odm, 0xc84, 0x18008c10);// RX_Tone_idx[9:0], RxK_Mask[29] ODM_Write4Byte(pDM_Odm, 0xc88, 0x82140119); } if (TX1_finish){ ODM_Write4Byte(pDM_Odm, 0xe80, 0x38008c10);// TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 ODM_Write4Byte(pDM_Odm, 0xe84, 0x18008c10);// RX_Tone_idx[9:0], RxK_Mask[29] ODM_Write4Byte(pDM_Odm, 0xe88, 0x82140119); } cal0_retry = 0; cal1_retry = 0; while(1){ // one shot ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C if (TX0_finish){ ODM_SetBBReg(pDM_Odm, 0x978, 0x03FF8000, (TX_IQC[0])&0x000007ff); ODM_SetBBReg(pDM_Odm, 0x978, 0x000007FF, (TX_IQC[1])&0x000007ff); ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); // [31] = 1 --> Page C1 if (pDM_Odm->RFEType == 1){ ODM_Write4Byte(pDM_Odm, 0xc8c, 0x28161500); } else{ ODM_Write4Byte(pDM_Odm, 0xc8c, 0x28160cc0); } ODM_Write4Byte(pDM_Odm, 0xcb8, 0x00300000);// cb8[20] ±N SI/PI ¨Ï¥ÎÅv¤Áµ¹ iqk_dpk module ODM_Write4Byte(pDM_Odm, 0xcb8, 0x00100000); ODM_delay_ms(5); //Delay 5ms ODM_Write4Byte(pDM_Odm, 0xc8c, 0x3c000000); ODM_Write4Byte(pDM_Odm, 0xcb8, 0x00000000); } if (TX1_finish){ ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C ODM_SetBBReg(pDM_Odm, 0x978, 0x03FF8000, (TX_IQC[2])&0x000007ff); ODM_SetBBReg(pDM_Odm, 0x978, 0x000007FF, (TX_IQC[3])&0x000007ff); ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); // [31] = 1 --> Page C1 if (pDM_Odm->RFEType == 1){ ODM_Write4Byte(pDM_Odm, 0xe8c, 0x28161500); } else{ ODM_Write4Byte(pDM_Odm, 0xe8c, 0x28160ca0); } ODM_Write4Byte(pDM_Odm, 0xeb8, 0x00300000);// cb8[20] ±N SI/PI ¨Ï¥ÎÅv¤Áµ¹ iqk_dpk module ODM_Write4Byte(pDM_Odm, 0xeb8, 0x00100000);// cb8[20] ±N SI/PI ¨Ï¥ÎÅv¤Áµ¹ iqk_dpk module ODM_delay_ms(5); //Delay 5ms ODM_Write4Byte(pDM_Odm, 0xe8c, 0x3c000000); ODM_Write4Byte(pDM_Odm, 0xeb8, 0x00000000); } delay_count = 0; while (1){ if (!RX0_finish && TX0_finish) IQK0_ready = (BOOLEAN) ODM_GetBBReg(pDM_Odm, 0xd00, BIT(10)); if (!RX1_finish && TX1_finish) IQK1_ready = (BOOLEAN) ODM_GetBBReg(pDM_Odm, 0xd40, BIT(10)); if ((IQK0_ready && IQK1_ready)||(delay_count>20)) break; else{ ODM_delay_ms(1); delay_count++; } } ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RX delay_count = %d\n", delay_count)); if (delay_count < 20){ // If 20ms No Result, then cal_retry++ // ============RXIQK Check============== RX0_fail = (BOOLEAN) ODM_GetBBReg(pDM_Odm, 0xd00, BIT(11)); RX1_fail = (BOOLEAN) ODM_GetBBReg(pDM_Odm, 0xd40, BIT(11)); if (!(RX0_fail || RX0_finish) && TX0_finish){ ODM_Write4Byte(pDM_Odm, 0xcb8, 0x06000000); RX_IQC_temp[RX0_Average][0] = ODM_GetBBReg(pDM_Odm, 0xd00, 0x07ff0000)<<21; ODM_Write4Byte(pDM_Odm, 0xcb8, 0x08000000); RX_IQC_temp[RX0_Average][1] = ODM_GetBBReg(pDM_Odm, 0xd00, 0x07ff0000)<<21; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RX_X0[%d] = %x ;; RX_Y0[%d] = %x\n", RX0_Average, (RX_IQC_temp[RX0_Average][0])>>21&0x000007ff, RX0_Average, (RX_IQC_temp[RX0_Average][1])>>21&0x000007ff)); /* ODM_Write4Byte(pDM_Odm, 0xcb8, 0x05000000); reg1 = ODM_GetBBReg(pDM_Odm, 0xd00, 0xffffffff); ODM_Write4Byte(pDM_Odm, 0xcb8, 0x06000000); reg2 = ODM_GetBBReg(pDM_Odm, 0xd00, 0x0000001f); DbgPrint("reg1 = %d, reg2 = %d", reg1, reg2); Image_Power = (reg2<<32)+reg1; DbgPrint("Before PW = %d\n", Image_Power); ODM_Write4Byte(pDM_Odm, 0xcb8, 0x07000000); reg1 = ODM_GetBBReg(pDM_Odm, 0xd00, 0xffffffff); ODM_Write4Byte(pDM_Odm, 0xcb8, 0x08000000); reg2 = ODM_GetBBReg(pDM_Odm, 0xd00, 0x0000001f); Image_Power = (reg2<<32)+reg1; DbgPrint("After PW = %d\n", Image_Power); */ RX0_Average++; } else{ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("1. RXA_cal_retry = %d\n", cal0_retry)); cal0_retry++; if (cal0_retry == 10) break; } if (!(RX1_fail || RX1_finish) && TX1_finish){ ODM_Write4Byte(pDM_Odm, 0xeb8, 0x06000000); RX_IQC_temp[RX1_Average][2] = ODM_GetBBReg(pDM_Odm, 0xd40, 0x07ff0000)<<21; ODM_Write4Byte(pDM_Odm, 0xeb8, 0x08000000); RX_IQC_temp[RX1_Average][3] = ODM_GetBBReg(pDM_Odm, 0xd40, 0x07ff0000)<<21; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RX_X1[%d] = %x ;; RX_Y1[%d] = %x\n", RX1_Average, (RX_IQC_temp[RX1_Average][2])>>21&0x000007ff, RX1_Average, (RX_IQC_temp[RX1_Average][3])>>21&0x000007ff)); /* ODM_Write4Byte(pDM_Odm, 0xeb8, 0x05000000); reg1 = ODM_GetBBReg(pDM_Odm, 0xd40, 0xffffffff); ODM_Write4Byte(pDM_Odm, 0xeb8, 0x06000000); reg2 = ODM_GetBBReg(pDM_Odm, 0xd40, 0x0000001f); DbgPrint("reg1 = %d, reg2 = %d", reg1, reg2); Image_Power = (reg2<<32)+reg1; DbgPrint("Before PW = %d\n", Image_Power); ODM_Write4Byte(pDM_Odm, 0xeb8, 0x07000000); reg1 = ODM_GetBBReg(pDM_Odm, 0xd40, 0xffffffff); ODM_Write4Byte(pDM_Odm, 0xeb8, 0x08000000); reg2 = ODM_GetBBReg(pDM_Odm, 0xd40, 0x0000001f); Image_Power = (reg2<<32)+reg1; DbgPrint("After PW = %d\n", Image_Power); */ RX1_Average++; } else{ cal1_retry++; if (cal1_retry == 10) break; } } else{ ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("2. RXA_cal_retry = %d\n", cal0_retry)); cal0_retry++; cal1_retry++; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay 20ms RX IQK Not Ready!!!!!\n")); if (cal0_retry == 10) break; } ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("3. RXA_cal_retry = %d\n", cal0_retry)); if (RX0_Average >= 2){ for (i = 0; i < RX0_Average; i++){ for (ii = i+1; ii >21) - (RX_IQC_temp[ii][0]>>21); if (dx < 4 && dx > -4){ dy = (RX_IQC_temp[i][1]>>21) - (RX_IQC_temp[ii][1]>>21); if (dy < 4 && dy > -4){ RX_IQC[0]= ((RX_IQC_temp[i][0]>>21) + (RX_IQC_temp[ii][0]>>21))/2; RX_IQC[1] = ((RX_IQC_temp[i][1]>>21) + (RX_IQC_temp[ii][1]>>21))/2; RX0_finish = TRUE; break; } } } } } if (RX1_Average >= 2){ for (i = 0; i < RX1_Average; i++){ for (ii = i+1; ii >21) - (RX_IQC_temp[ii][2]>>21); if (dx < 4 && dx > -4){ dy = (RX_IQC_temp[i][3]>>21) - (RX_IQC_temp[ii][3]>>21); if (dy < 4 && dy > -4){ RX_IQC[2] = ((RX_IQC_temp[i][2]>>21) + (RX_IQC_temp[ii][2]>>21))/2; RX_IQC[3] = ((RX_IQC_temp[i][3]>>21) + (RX_IQC_temp[ii][3]>>21))/2; RX1_finish = TRUE; break; } } } } } ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RX0_Average = %d, RX1_Average = %d\n", RX0_Average, RX1_Average)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RX0_finish = %d, RX1_finish = %d\n", RX0_finish, RX1_finish)); if ((RX0_finish|| !TX0_finish) && (RX1_finish || !TX1_finish) ) break; if ((cal0_retry + RX0_Average) >= 10 || (cal1_retry + RX1_Average) >= 10 || RX0_Average == 3 || RX1_Average == 3) break; } ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RXA_cal_retry = %d\n", cal0_retry)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RXB_cal_retry = %d\n", cal1_retry)); } // FillIQK Result ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("========Path_A =======\n")); if (TX0_finish){ _IQK_TX_FillIQC_8812A(pDM_Odm, ODM_RF_PATH_A, TX_IQC[0], TX_IQC[1]); } else{ _IQK_TX_FillIQC_8812A(pDM_Odm, ODM_RF_PATH_A, 0x200, 0x0); } if (RX0_finish){ _IQK_RX_FillIQC_8812A(pDM_Odm, ODM_RF_PATH_A, RX_IQC[0], RX_IQC[1]); } else{ _IQK_RX_FillIQC_8812A(pDM_Odm, ODM_RF_PATH_A, 0x200, 0x0); } ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("========Path_B =======\n")); if (TX1_finish){ _IQK_TX_FillIQC_8812A(pDM_Odm, ODM_RF_PATH_B, TX_IQC[2], TX_IQC[3]); } else{ _IQK_TX_FillIQC_8812A(pDM_Odm, ODM_RF_PATH_B, 0x200, 0x0); } if (RX1_finish){ _IQK_RX_FillIQC_8812A(pDM_Odm, ODM_RF_PATH_B, RX_IQC[2], RX_IQC[3]); } else{ _IQK_RX_FillIQC_8812A(pDM_Odm, ODM_RF_PATH_B, 0x200, 0x0); } } #define MACBB_REG_NUM 9 #define AFE_REG_NUM 12 #define RF_REG_NUM 3 // Maintained by BB James. VOID phy_IQCalibrate_8812A( IN PDM_ODM_T pDM_Odm, IN u1Byte Channel ) { u4Byte MACBB_backup[MACBB_REG_NUM], AFE_backup[AFE_REG_NUM], RFA_backup[RF_REG_NUM], RFB_backup[RF_REG_NUM]; u4Byte Backup_MACBB_REG[MACBB_REG_NUM] = {0x520, 0x550, 0x808, 0xa04, 0x90c, 0xc00, 0xe00, 0x838, 0x82c}; u4Byte Backup_AFE_REG[AFE_REG_NUM] = {0xc5c, 0xc60, 0xc64, 0xc68, 0xcb0, 0xcb4, 0xe5c, 0xe60, 0xe64, 0xe68, 0xeb0, 0xeb4}; u4Byte Reg_C1B8, Reg_E1B8; u4Byte Backup_RF_REG[RF_REG_NUM] = {0x65, 0x8f, 0x0}; u1Byte chnlIdx = ODM_GetRightChnlPlaceforIQK(Channel); _IQK_BackupMacBB_8812A(pDM_Odm, MACBB_backup, Backup_MACBB_REG, MACBB_REG_NUM); ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); Reg_C1B8 = ODM_Read4Byte(pDM_Odm, 0xcb8); Reg_E1B8 = ODM_Read4Byte(pDM_Odm, 0xeb8); ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); _IQK_BackupAFE_8812A(pDM_Odm, AFE_backup, Backup_AFE_REG, AFE_REG_NUM); _IQK_BackupRF_8812A(pDM_Odm, RFA_backup, RFB_backup, Backup_RF_REG, RF_REG_NUM); _IQK_ConfigureMAC_8812A(pDM_Odm); _IQK_Tx_8812A(pDM_Odm, chnlIdx); _IQK_RestoreRF_8812A(pDM_Odm, ODM_RF_PATH_A, Backup_RF_REG, RFA_backup, RF_REG_NUM); _IQK_RestoreRF_8812A(pDM_Odm, ODM_RF_PATH_B, Backup_RF_REG, RFB_backup, RF_REG_NUM); _IQK_RestoreAFE_8812A(pDM_Odm, AFE_backup, Backup_AFE_REG, AFE_REG_NUM); ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); ODM_Write4Byte(pDM_Odm, 0xcb8, Reg_C1B8); ODM_Write4Byte(pDM_Odm, 0xeb8, Reg_E1B8); ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); _IQK_RestoreMacBB_8812A(pDM_Odm, MACBB_backup, Backup_MACBB_REG, MACBB_REG_NUM); } VOID phy_LCCalibrate_8812A( IN PDM_ODM_T pDM_Odm, IN BOOLEAN is2T ) { u4Byte /*RF_Amode=0, RF_Bmode=0,*/ LC_Cal = 0, tmp = 0; //Check continuous TX and Packet TX u4Byte reg0x914 = ODM_Read4Byte(pDM_Odm, rSingleTone_ContTx_Jaguar);; // Backup RF reg18. LC_Cal = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); if((reg0x914 & 0x70000) != 0) //If contTx, disable all continuous TX. 0x914[18:16] // <20121121, Kordan> A workaround: If we set 0x914[18:16] as zero, BB turns off ContTx // until another packet comes in. To avoid ContTx being turned off, we skip this step. ;//ODM_Write4Byte(pDM_Odm, rSingleTone_ContTx_Jaguar, reg0x914 & (~0x70000)); else // If packet Tx-ing, pause Tx. ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); /* //3 1. Read original RF mode RF_Amode = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask); if(is2T) RF_Bmode = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bRFRegOffsetMask); //3 2. Set RF mode = standby mode ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, (RF_Amode&0x8FFFF)|0x10000); if(is2T) ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bRFRegOffsetMask, (RF_Bmode&0x8FFFF)|0x10000); */ // Enter LCK mode tmp = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_LCK, bRFRegOffsetMask); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_LCK, bRFRegOffsetMask, tmp | BIT14); //3 3. Read RF reg18 LC_Cal = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); //3 4. Set LC calibration begin bit15 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, LC_Cal|0x08000); // Leave LCK mode tmp = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_LCK, bRFRegOffsetMask); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_LCK, bRFRegOffsetMask, tmp & ~BIT14); ODM_delay_ms(100); //3 Restore original situation if((reg0x914 & 70000) != 0) //Deal with contisuous TX case, 0x914[18:16] { // <20121121, Kordan> A workaround: If we set 0x914[18:16] as zero, BB turns off ContTx // until another packet comes in. To avoid ContTx being turned off, we skip this step. //ODM_Write4Byte(pDM_Odm, rSingleTone_ContTx_Jaguar, reg0x914); } else // Deal with Packet TX case { ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x00); } // Recover channel number ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, LC_Cal); /* ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, RF_Amode); if(is2T) ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_AC, bRFRegOffsetMask, RF_Bmode); */ } #define DP_BB_REG_NUM 7 #define DP_RF_REG_NUM 1 #define DP_RETRY_LIMIT 10 #define DP_PATH_NUM 2 #define DP_DPK_NUM 3 #define DP_DPK_VALUE_NUM 2 VOID phy_ReloadIQKSetting_8812A( IN PDM_ODM_T pDM_Odm, IN u1Byte Channel ) { PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); u1Byte chnlIdx = ODM_GetRightChnlPlaceforIQK(Channel); ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); // [31] = 1 --> Page C1 ODM_SetBBReg(pDM_Odm, 0xccc, 0x000007ff, pRFCalibrateInfo->IQKMatrixRegSetting[chnlIdx].Value[*pDM_Odm->pBandWidth][0]&0x7ff); ODM_SetBBReg(pDM_Odm, 0xcd4, 0x000007ff, (pRFCalibrateInfo->IQKMatrixRegSetting[chnlIdx].Value[*pDM_Odm->pBandWidth][0]&0x7ff0000)>>16); ODM_SetBBReg(pDM_Odm, 0xecc, 0x000007ff, pRFCalibrateInfo->IQKMatrixRegSetting[chnlIdx].Value[*pDM_Odm->pBandWidth][2]&0x7ff); ODM_SetBBReg(pDM_Odm, 0xed4, 0x000007ff, (pRFCalibrateInfo->IQKMatrixRegSetting[chnlIdx].Value[*pDM_Odm->pBandWidth][2]&0x7ff0000)>>16); if (*pDM_Odm->pBandWidth != 2){ ODM_Write4Byte(pDM_Odm, 0xce8, 0x0); ODM_Write4Byte(pDM_Odm, 0xee8, 0x0); } else{ ODM_Write4Byte(pDM_Odm, 0xce8, pRFCalibrateInfo->IQKMatrixRegSetting[chnlIdx].Value[*pDM_Odm->pBandWidth][4]); ODM_Write4Byte(pDM_Odm, 0xee8, pRFCalibrateInfo->IQKMatrixRegSetting[chnlIdx].Value[*pDM_Odm->pBandWidth][5]); } ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C ODM_SetBBReg(pDM_Odm, 0xc10, 0x000003ff, (pRFCalibrateInfo->IQKMatrixRegSetting[chnlIdx].Value[*pDM_Odm->pBandWidth][1]&0x7ff0000)>>17); ODM_SetBBReg(pDM_Odm, 0xc10, 0x03ff0000, (pRFCalibrateInfo->IQKMatrixRegSetting[chnlIdx].Value[*pDM_Odm->pBandWidth][1]&0x7ff)>>1); ODM_SetBBReg(pDM_Odm, 0xe10, 0x000003ff, (pRFCalibrateInfo->IQKMatrixRegSetting[chnlIdx].Value[*pDM_Odm->pBandWidth][3]&0x7ff0000)>>17); ODM_SetBBReg(pDM_Odm, 0xe10, 0x03ff0000, (pRFCalibrateInfo->IQKMatrixRegSetting[chnlIdx].Value[*pDM_Odm->pBandWidth][3]&0x7ff)>>1); } VOID PHY_ResetIQKResult_8812A( IN PDM_ODM_T pDM_Odm ) { ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1); // [31] = 1 --> Page C1 ODM_SetBBReg(pDM_Odm, 0xccc, 0x000007ff, 0x0); ODM_SetBBReg(pDM_Odm, 0xcd4, 0x000007ff, 0x200); ODM_SetBBReg(pDM_Odm, 0xecc, 0x000007ff, 0x0); ODM_SetBBReg(pDM_Odm, 0xed4, 0x000007ff, 0x200); ODM_Write4Byte(pDM_Odm, 0xce8, 0x0); ODM_Write4Byte(pDM_Odm, 0xee8, 0x0); ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C ODM_SetBBReg(pDM_Odm, 0xc10, 0x000003ff, 0x100); ODM_SetBBReg(pDM_Odm, 0xe10, 0x000003ff, 0x100); } VOID phy_IQCalibrate_By_FW_8812A( IN PADAPTER pAdapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); u1Byte IQKcmd[3] = {pHalData->CurrentChannel, 0x0, 0x0}; u1Byte Buf1 = 0x0; u1Byte Buf2 = 0x0; //Byte 2, Bit 4 ~ Bit 5 : BandType if(pHalData->CurrentBandType) Buf1 = 0x2<<4; else Buf1 = 0x1<<4; //Byte 2, Bit 0 ~ Bit 3 : Bandwidth if(pHalData->CurrentChannelBW == CHANNEL_WIDTH_20) Buf2 = 0x1; else if(pHalData->CurrentChannelBW == CHANNEL_WIDTH_40) Buf2 = 0x1<<1; else if(pHalData->CurrentChannelBW == CHANNEL_WIDTH_80) Buf2 = 0x1<<2; else Buf2 = 0x1<<3; IQKcmd[1] = Buf1 | Buf2; IQKcmd[2] = pHalData->ExternalPA_5G | pHalData->ExternalLNA_5G<<1; DBG_871X("== IQK Start ==\n"); FillH2CCmd_8812(pAdapter, 0x45, 3, IQKcmd); rtl8812_iqk_wait(pAdapter, 500); } VOID PHY_IQCalibrate_8812A( IN PADAPTER pAdapter, IN BOOLEAN bReCovery ) { u4Byte counter = 0; u4Byte StartTime; s4Byte ProgressingTime; #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); #else // (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; #endif #endif #if (MP_DRIVER == 1) #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); #endif #endif//(MP_DRIVER == 1) //#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE) ) //if (ODM_CheckPowerStatus(pAdapter) == FALSE) //return; //#endif pDM_Odm->IQKFWOffload = 0; StartTime = ODM_GetCurrentTime( pDM_Odm); #if MP_DRIVER == 1 if( ! (pMptCtx->bSingleTone || pMptCtx->bCarrierSuppression) ) #endif { if(pDM_Odm->IQKFWOffload) { phy_IQCalibrate_By_FW_8812A(pAdapter); } else { phy_IQCalibrate_8812A(pDM_Odm, pHalData->CurrentChannel); } } ProgressingTime = ODM_GetProgressingTime( pDM_Odm, StartTime); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK ProgressingTime = %d\n", ProgressingTime)); } VOID PHY_LCCalibrate_8812A( IN PDM_ODM_T pDM_Odm ) { BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; u4Byte StartTime; s4Byte ProgressingTime; #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) PADAPTER pAdapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); #if (MP_DRIVER == 1) #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); #endif bStartContTx = pMptCtx->bStartContTx; bSingleTone = pMptCtx->bSingleTone; bCarrierSuppression = pMptCtx->bCarrierSuppression; #endif//(MP_DRIVER == 1) #endif StartTime = ODM_GetCurrentTime( pDM_Odm); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> PHY_LCCalibrate_8812A\n")); #if (MP_DRIVER == 1) phy_LCCalibrate_8812A(pDM_Odm, TRUE); #endif ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<=== PHY_LCCalibrate_8812A\n")); ProgressingTime = ODM_GetProgressingTime( pDM_Odm, StartTime); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK ProgressingTime = %d\n", ProgressingTime)); } VOID phy_SetRFPathSwitch_8812A( #if (DM_ODM_SUPPORT_TYPE & ODM_AP) IN PDM_ODM_T pDM_Odm, #else IN PADAPTER pAdapter, #endif IN BOOLEAN bMain, IN BOOLEAN is2T ) { #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; #endif #endif if (IS_HARDWARE_TYPE_8821(pAdapter)) { if(bMain) ODM_SetBBReg(pDM_Odm, rA_RFE_Pinmux_Jaguar+4, BIT29|BIT28, 0x1); //Main else ODM_SetBBReg(pDM_Odm, rA_RFE_Pinmux_Jaguar+4, BIT29|BIT28, 0x2); //Aux } else if (IS_HARDWARE_TYPE_8812(pAdapter)) { if (pHalData->RFEType == 5) { if(bMain) { //WiFi ODM_SetBBReg(pDM_Odm, r_ANTSEL_SW_Jaguar, BIT1|BIT0, 0x2); ODM_SetBBReg(pDM_Odm, r_ANTSEL_SW_Jaguar, BIT9|BIT8, 0x3); } else { // BT ODM_SetBBReg(pDM_Odm, r_ANTSEL_SW_Jaguar, BIT1|BIT0, 0x1); ODM_SetBBReg(pDM_Odm, r_ANTSEL_SW_Jaguar, BIT9|BIT8, 0x3); } } } } VOID PHY_SetRFPathSwitch_8812A( #if (DM_ODM_SUPPORT_TYPE & ODM_AP) IN PDM_ODM_T pDM_Odm, #else IN PADAPTER pAdapter, #endif IN BOOLEAN bMain ) { #if DISABLE_BB_RF return; #endif #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) phy_SetRFPathSwitch_8812A(pAdapter, bMain, TRUE); #endif } VOID _DPK_ThermalCompensation( IN PDM_ODM_T pDM_Odm ) { } VOID _DPK_parareload( IN PDM_ODM_T pDM_Odm, IN pu4Byte MACBB_backup, IN pu4Byte Backup_MACBB_REG, IN u4Byte MACBB_NUM ) { u4Byte i; ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C //save MACBB default value for (i = 0; i < MACBB_NUM; i++){ ODM_Write4Byte(pDM_Odm, Backup_MACBB_REG[i], MACBB_backup[i]); } } VOID _DPK_parabackup( IN PDM_ODM_T pDM_Odm, IN pu4Byte MACBB_backup, IN pu4Byte Backup_MACBB_REG, IN u4Byte MACBB_NUM ) { u4Byte i; ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0); // [31] = 0 --> Page C //save MACBB default value for (i = 0; i < MACBB_NUM; i++){ MACBB_backup[i] = ODM_Read4Byte(pDM_Odm, Backup_MACBB_REG[i]); } } VOID _DPK_Globalparaset( IN PDM_ODM_T pDM_Odm ) { //***************************************// //set MAC register //***************************************// //TX pause ODM_Write4Byte(pDM_Odm, 0x520, 0x007f3F0F); //***************************************// //set BB register //***************************************// // reg82c[31] = b'0, ¤Á´«¨ì page C ODM_Write4Byte(pDM_Odm, 0x82c, 0x002083d5); // test pin in/out control ODM_Write4Byte(pDM_Odm, 0x970, 0x00000000); // path A regcb8[3:0] = h'd, TRSW to TX ODM_Write4Byte(pDM_Odm, 0xcb8, 0x0050824d); // path B regeb8[3:0] = h'd, TRSW to TX ODM_Write4Byte(pDM_Odm, 0xeb8, 0x0050824d); // reg838[3:0] = h'c, CCA off ODM_Write4Byte(pDM_Odm, 0x838, 0x06c8d24c); // path A 3-wire off ODM_Write4Byte(pDM_Odm, 0xc00, 0x00000004); // path B 3-wire off ODM_Write4Byte(pDM_Odm, 0xe00, 0x00000004); // reg90c[15] = b'1, DAC fifo reset by CSWU ODM_Write4Byte(pDM_Odm, 0x90c, 0x00008000); // reset DPK circuit ODM_Write4Byte(pDM_Odm, 0xb00, 0x03000100); // path A regc94[0] = b'1 (r_gothrough_iqkdpk), ±N DPK ¤Á¶i normal path ODM_Write4Byte(pDM_Odm, 0xc94, 0x01000001); // path B rege94[0] = b'1 (r_gothrough_iqkdpk), ±N DPK ¤Á¶i normal path ODM_Write4Byte(pDM_Odm, 0xe94, 0x01000001); //***************************************// //set AFE register //***************************************// //path A //regc68 ¨ì regc84À³¸Ó¬O­n¸ò¥¿±` Tx mode ®Éªº³]©w¤@­P ODM_Write4Byte(pDM_Odm, 0xc68, 0x19791979); ODM_Write4Byte(pDM_Odm, 0xc6c, 0x19791979); ODM_Write4Byte(pDM_Odm, 0xc70, 0x19791979); ODM_Write4Byte(pDM_Odm, 0xc74, 0x19791979); ODM_Write4Byte(pDM_Odm, 0xc78, 0x19791979); ODM_Write4Byte(pDM_Odm, 0xc7c, 0x19791979); ODM_Write4Byte(pDM_Odm, 0xc80, 0x19791979); ODM_Write4Byte(pDM_Odm, 0xc84, 0x19791979); // force DAC/ADC power on ODM_Write4Byte(pDM_Odm, 0xc60, 0x77777777); ODM_Write4Byte(pDM_Odm, 0xc64, 0x77777777); //path B //rege68 ¨ì rege84À³¸Ó¬O­n¸ò¥¿±` Tx mode ®Éªº³]©w¤@­P ODM_Write4Byte(pDM_Odm, 0xe68, 0x19791979); ODM_Write4Byte(pDM_Odm, 0xe6c, 0x19791979); ODM_Write4Byte(pDM_Odm, 0xe70, 0x19791979); ODM_Write4Byte(pDM_Odm, 0xe74, 0x19791979); ODM_Write4Byte(pDM_Odm, 0xe78, 0x19791979); ODM_Write4Byte(pDM_Odm, 0xe7c, 0x19791979); ODM_Write4Byte(pDM_Odm, 0xe80, 0x19791979); ODM_Write4Byte(pDM_Odm, 0xe84, 0x19791979); // force DAC/ADC power on ODM_Write4Byte(pDM_Odm, 0xe60, 0x77777777); ODM_Write4Byte(pDM_Odm, 0xe64, 0x77777777); } VOID _DPK_GetGainLoss( IN PDM_ODM_T pDM_Odm, IN u1Byte path ) { u4Byte GL_I=0,GL_Q=0; u4Byte GL_I_tmp=0,GL_Q_tmp=0; u4Byte Power_GL; u2Byte Scaler[]={0x4000, 0x41db, 0x43c7, 0x45c3, 0x47cf, 0x49ec, 0x4c19, 0x4e46, 0x5093,0x52f2, //10 0x5560, 0x57cf, 0x5a7f, 0x5d0e, 0x5fbe }; u1Byte sindex=0; u4Byte pagesel = 0,regsel = 0; if(path == 0) //pathA { pagesel = 0; regsel = 0; } else //pathB { pagesel = 0x200; regsel = 0x40; } ODM_Write4Byte(pDM_Odm, 0xc90+pagesel, 0x0601f0bf); ODM_Write4Byte(pDM_Odm, 0xcb8+pagesel, 0x0c000000); GL_I_tmp = ODM_GetBBReg(pDM_Odm, 0xd00+regsel, 0xffff0000); GL_Q_tmp = ODM_GetBBReg(pDM_Odm, 0xd00+regsel, 0x0000ffff); if(GL_I_tmp >= 0x8000) GL_I = (GL_I_tmp-0x8000+0x1); else GL_I = GL_I_tmp; if(GL_Q_tmp >= 0x8000) GL_Q = (GL_Q_tmp-0x8000+0x1); else GL_Q = GL_Q_tmp; Power_GL = ((GL_I*GL_I)+(GL_Q*GL_Q))/4; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Power_GL = 0x%x", Power_GL)); if (Power_GL > 63676){ sindex = 0; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Gainloss = 0 dB\n")); } else if (63676 >= Power_GL && Power_GL > 60114){ sindex = 1; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Gainloss = 0.25 dB\n")); } else if (60114 >= Power_GL && Power_GL> 56751){ sindex = 2; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Gainloss = 0.5 dB\n")); } else if (56751 >= Power_GL && Power_GL> 53577){ sindex = 3; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Gainloss = 0.75 dB\n")); } else if (53577 >= Power_GL && Power_GL> 49145){ sindex = 4; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Gainloss = 1 dB\n")); } else if (49145 >= Power_GL && Power_GL> 47750){ sindex = 5; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Gainloss = 1.25 dB\n")); } else if (47750 >= Power_GL && Power_GL> 45079){ sindex = 6; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Gainloss = 1.5 dB\n")); } else if (45079 >= Power_GL && Power_GL> 42557){ sindex = 7; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Gainloss = 1.75 dB\n")); } else if (42557 >= Power_GL && Power_GL> 40177){ sindex = 8; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Gainloss = 2 dB\n")); } else if (40177 >= Power_GL && Power_GL> 37929){ sindex = 9; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Gainloss = 2.25 dB\n")); } else if (37929 >= Power_GL && Power_GL> 35807){ sindex = 10; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Gainloss = 2.5 dB\n")); } else if (35807 >= Power_GL && Power_GL> 33804){ sindex = 11; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Gainloss = 2.75 dB\n")); } else if (33804 >= Power_GL && Power_GL> 31913){ sindex = 12; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Gainloss = 3 dB\n")); } else if (31913 >= Power_GL && Power_GL> 30128){ sindex = 13; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Gainloss = 3.25 dB\n")); } else if (30128 >= Power_GL){ sindex = 14; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Gainloss = 3.5 dB\n")); } ODM_Write4Byte(pDM_Odm, 0xc98+pagesel, (Scaler[sindex] << 16) | Scaler[sindex]); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Set Gainloss reg 0xc98(0xe98)= 0x%x\n",ODM_Read4Byte(pDM_Odm, 0xc98+pagesel))); } VOID _DPK_EnableDP( IN PDM_ODM_T pDM_Odm, IN u1Byte path, IN u4Byte TXindex ) { //***************************************// //Enable DP //***************************************// //PWSF[6] = 0x40 = 0dB, set the address represented TXindex as 0dB u1Byte PWSF[] = { 0xff, 0xca, 0xa1, 0x80, 0x65, 0x51, 0x40, //6~0dB 0x33, 0x28, 0x20, 0x19, 0x14, 0x10, 0x0d, //-1~-7dB 0x0a, 0x08, 0x06, 0x05, 0x04, 0x03, 0x03, //-8~-14dB 0x02, 0x02, 0x01, 0x01, }; u1Byte zeropoint; u1Byte pwsf1,pwsf2; u1Byte i; u4Byte pagesel = 0,regsel = 0; if(path == 0) { pagesel = 0; regsel = 0; } else { pagesel = 0x200; regsel = 0x40; } //=========// // DPK setting // //=========// // reg82c[31] = b'1, ¤Á´«¨ì page C1 ODM_Write4Byte(pDM_Odm, 0x82c, 0x802083d5); ODM_Write4Byte(pDM_Odm, 0xc90+pagesel, 0x0000f098); ODM_Write4Byte(pDM_Odm, 0xc94+pagesel, 0x776c9f84); ODM_Write4Byte(pDM_Odm, 0xcc4+pagesel, 0x08840000); ODM_Write4Byte(pDM_Odm, 0xcc8+pagesel, 0x20000000); ODM_Write4Byte(pDM_Odm, 0xc8c+pagesel, 0x3c000000); // ¼gPWSF table in 1st SRAM for PA = 11 use ODM_Write4Byte(pDM_Odm, 0xc20+pagesel, 0x00000800); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Write PWSF table\n")); if(TXindex == 0x1f) zeropoint = 0; else if(TXindex == 0x1e) zeropoint = 1; else if(TXindex == 0x1d) zeropoint = 2; else if(TXindex == 0x1c) zeropoint = 3; else if(TXindex == 0x1b) zeropoint = 4; else if(TXindex == 0x1a) zeropoint = 5; else if(TXindex == 0x19) zeropoint = 6; else zeropoint = 6; for(i=0;i<16;i++) { pwsf1 = (6-zeropoint)+i*2; if(pwsf1 > 24) pwsf1 = 24; pwsf2 = (6-zeropoint-1)+i*2; if(pwsf2 > 24) pwsf2 = 24; ODM_Write4Byte(pDM_Odm, 0xce4+pagesel, 0x00000001 | i<<1 | (PWSF[pwsf1]<<8) | (PWSF[pwsf2]<<16)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0x%x\n", ODM_Read4Byte(pDM_Odm, 0xce4+pagesel))); ODM_SetBBReg(pDM_Odm, 0xce4+pagesel, 0xff, 0x0); } ODM_Write4Byte(pDM_Odm, 0xce4+pagesel, 0x00000000); // reg82c[31] = b'0, ¤Á´«¨ì page C ODM_Write4Byte(pDM_Odm, 0x82c, 0x002083d5); } VOID _DPK_pathABDPK( IN PDM_ODM_T pDM_Odm ) { u4Byte TXindex = 0; u1Byte path = 0; u4Byte pagesel = 0,regsel = 0; u4Byte i=0,j=0; for(path=0;path<2;path ++) //path A = 0; path B = 1; { ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path %s DPK start!!!\n", (path==0)?"A":"B")); if(path == 0) { pagesel = 0; regsel = 0; } else { pagesel = 0x200; regsel = 0x40; } //***************************************// //find compress-2.5dB TX index //***************************************// // reg82c[31] = b'1, ¤Á´«¨ì page C1 ODM_Write4Byte(pDM_Odm, 0x82c, 0x802083d5); // regc20[15:13] = dB sel, §i¶D Gain Loss function ¥h´M§ä dB_sel ©Ò³]©wªºPA gain loss¥Ø¼Ð©Ò¹ïÀ³ªº Tx AGC ¬°¦ó. // dB_sel = b'000 ' 1.0 dB PA gain loss // dB_sel = b'001 ' 1.5 dB PA gain loss // dB_sel = b'010 ' 2.0 dB PA gain loss // dB_sel = b'011 ' 2.5 dB PA gain loss // dB_sel = b'100 ' 3.0 dB PA gain loss // dB_sel = b'101 ' 3.5 dB PA gain loss // dB_sel = b'110 ' 4.0 dB PA gain loss ODM_Write4Byte(pDM_Odm, 0xc20+pagesel, 0x00006000); ODM_Write4Byte(pDM_Odm, 0xc90+pagesel, 0x0401e038); ODM_Write4Byte(pDM_Odm, 0xc94+pagesel, 0xf76c9f84); ODM_Write4Byte(pDM_Odm, 0xcc8+pagesel, 0x000c5599); ODM_Write4Byte(pDM_Odm, 0xcc4+pagesel, 0x148b0000); ODM_Write4Byte(pDM_Odm, 0xc8c+pagesel, 0x3c000000); // tx_amp ' ¨M©w Ramp ¤¤¦U©¶ªiªº®¶´T¤j¤p ODM_Write4Byte(pDM_Odm, 0xc98+pagesel, 0x41382e21); ODM_Write4Byte(pDM_Odm, 0xc9c+pagesel, 0x5b554f48); ODM_Write4Byte(pDM_Odm, 0xca0+pagesel, 0x6f6b6661); ODM_Write4Byte(pDM_Odm, 0xca4+pagesel, 0x817d7874); ODM_Write4Byte(pDM_Odm, 0xca8+pagesel, 0x908c8884); ODM_Write4Byte(pDM_Odm, 0xcac+pagesel, 0x9d9a9793); ODM_Write4Byte(pDM_Odm, 0xcb0+pagesel, 0xaaa7a4a1); ODM_Write4Byte(pDM_Odm, 0xcb4+pagesel, 0xb6b3b0ad); // tx_inverse ' Ramp ¤¤¦U©¶ªipower ªº­Ë¼Æ, ¥H­pºâ¥X PA ªº gain report?? ODM_Write4Byte(pDM_Odm, 0xc40+pagesel, 0x02ce03e9); ODM_Write4Byte(pDM_Odm, 0xc44+pagesel, 0x01fd0249); ODM_Write4Byte(pDM_Odm, 0xc48+pagesel, 0x01a101c9); ODM_Write4Byte(pDM_Odm, 0xc4c+pagesel, 0x016a0181); ODM_Write4Byte(pDM_Odm, 0xc50+pagesel, 0x01430155); ODM_Write4Byte(pDM_Odm, 0xc54+pagesel, 0x01270135); ODM_Write4Byte(pDM_Odm, 0xc58+pagesel, 0x0112011c); ODM_Write4Byte(pDM_Odm, 0xc5c+pagesel, 0x01000108); ODM_Write4Byte(pDM_Odm, 0xc60+pagesel, 0x00f100f8); ODM_Write4Byte(pDM_Odm, 0xc64+pagesel, 0x00e500eb); ODM_Write4Byte(pDM_Odm, 0xc68+pagesel, 0x00db00e0); ODM_Write4Byte(pDM_Odm, 0xc6c+pagesel, 0x00d100d5); ODM_Write4Byte(pDM_Odm, 0xc70+pagesel, 0x00c900cd); ODM_Write4Byte(pDM_Odm, 0xc74+pagesel, 0x00c200c5); ODM_Write4Byte(pDM_Odm, 0xc78+pagesel, 0x00bb00be); ODM_Write4Byte(pDM_Odm, 0xc7c+pagesel, 0x00b500b8); //============// // RF setting for DPK // //============// //pathA,pathB standby mode ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)0x0, 0x0, bRFRegOffsetMask, 0x10000); ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)0x1, 0x0, bRFRegOffsetMask, 0x10000); // 00[4:0] = Tx AGC, 00[9:5] = Rx AGC (BB), 00[12:10] = Rx AGC (LNA) ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)(0x0+path), 0x0, bRFRegOffsetMask, 0x50bff); // 64[14:12] = loop back attenuation ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)(0x0+path), 0x64, bRFRegOffsetMask, 0x19aac); // 8f[14:13] = PGA2 gain ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)(0x0+path), 0x8f, bRFRegOffsetMask, 0x8e001); // one shot ODM_Write4Byte(pDM_Odm, 0xcc8+pagesel, 0x800c5599); ODM_Write4Byte(pDM_Odm, 0xcc8+pagesel, 0x000c5599); // delay 100 ms ODM_delay_ms(100); // read back ODM_Write4Byte(pDM_Odm, 0xc90+pagesel, 0x0109f018); ODM_Write4Byte(pDM_Odm, 0xcb8+pagesel, 0x09000000); // ¥i¥H¦b d00[3:0] ¤¤Åª¦^, dB_sel ¤¤©Ò³]©wªº gain loss ·|¸¨¦b­þ¤@­Ó Tx AGC ³]©w // Ū¦^d00[3:0] = h'1 ' Tx AGC = 15 // Ū¦^d00[3:0] = h'2 ' Tx AGC = 16 // Ū¦^d00[3:0] = h'3 ' Tx AGC = 17 // Ū¦^d00[3:0] = h'4 ' Tx AGC = 18 // Ū¦^d00[3:0] = h'5 ' Tx AGC = 19 // Ū¦^d00[3:0] = h'6 ' Tx AGC = 1a // Ū¦^d00[3:0] = h'7 ' Tx AGC = 1b // Ū¦^d00[3:0] = h'8 ' Tx AGC = 1c // Ū¦^d00[3:0] = h'9 ' Tx AGC = 1d // Ū¦^d00[3:0] = h'a ' Tx AGC = 1e // Ū¦^d00[3:0] = h'b ' Tx AGC = 1f TXindex = ODM_GetBBReg(pDM_Odm, 0xd00+regsel, 0x0000000f); //***************************************// //get LUT //***************************************// ODM_Write4Byte(pDM_Odm, 0xc90+pagesel, 0x0001e038); ODM_Write4Byte(pDM_Odm, 0xc94+pagesel, 0xf76c9f84); ODM_Write4Byte(pDM_Odm, 0xcc8+pagesel, 0x400c5599); ODM_Write4Byte(pDM_Odm, 0xcc4+pagesel, 0x11930080); //0xcc4[9:4]= DPk fail threshold ODM_Write4Byte(pDM_Odm, 0xc8c+pagesel, 0x3c000000); // tx_amp ' ¨M©w Ramp ¤¤¦U©¶ªiªº®¶´T¤j¤p ODM_Write4Byte(pDM_Odm, 0xc98+pagesel, 0x41382e21); ODM_Write4Byte(pDM_Odm, 0xc9c+pagesel, 0x5b554f48); ODM_Write4Byte(pDM_Odm, 0xca0+pagesel, 0x6f6b6661); ODM_Write4Byte(pDM_Odm, 0xca4+pagesel, 0x817d7874); ODM_Write4Byte(pDM_Odm, 0xca8+pagesel, 0x908c8884); ODM_Write4Byte(pDM_Odm, 0xcac+pagesel, 0x9d9a9793); ODM_Write4Byte(pDM_Odm, 0xcb0+pagesel, 0xaaa7a4a1); ODM_Write4Byte(pDM_Odm, 0xcb4+pagesel, 0xb6b3b0ad); // tx_inverse ' Ramp ¤¤¦U©¶ªipower ªº­Ë¼Æ, ¥H­pºâ¥X PA ªº gain ODM_Write4Byte(pDM_Odm, 0xc40+pagesel, 0x02ce03e9); ODM_Write4Byte(pDM_Odm, 0xc44+pagesel, 0x01fd0249); ODM_Write4Byte(pDM_Odm, 0xc48+pagesel, 0x01a101c9); ODM_Write4Byte(pDM_Odm, 0xc4c+pagesel, 0x016a0181); ODM_Write4Byte(pDM_Odm, 0xc50+pagesel, 0x01430155); ODM_Write4Byte(pDM_Odm, 0xc54+pagesel, 0x01270135); ODM_Write4Byte(pDM_Odm, 0xc58+pagesel, 0x0112011c); ODM_Write4Byte(pDM_Odm, 0xc5c+pagesel, 0x01000108); ODM_Write4Byte(pDM_Odm, 0xc60+pagesel, 0x00f100f8); ODM_Write4Byte(pDM_Odm, 0xc64+pagesel, 0x00e500eb); ODM_Write4Byte(pDM_Odm, 0xc68+pagesel, 0x00db00e0); ODM_Write4Byte(pDM_Odm, 0xc6c+pagesel, 0x00d100d5); ODM_Write4Byte(pDM_Odm, 0xc70+pagesel, 0x00c900cd); ODM_Write4Byte(pDM_Odm, 0xc74+pagesel, 0x00c200c5); ODM_Write4Byte(pDM_Odm, 0xc78+pagesel, 0x00bb00be); ODM_Write4Byte(pDM_Odm, 0xc7c+pagesel, 0x00b500b8); //fill BB TX index for the DPK reference // reg82c[31] =1b'0, ¤Á´«¨ì page C ODM_Write4Byte(pDM_Odm, 0x82c, 0x002083d5); ODM_Write4Byte(pDM_Odm, 0xc20+pagesel, 0x3c3c3c3c); ODM_Write4Byte(pDM_Odm, 0xc24+pagesel, 0x3c3c3c3c); ODM_Write4Byte(pDM_Odm, 0xc28+pagesel, 0x3c3c3c3c); ODM_Write4Byte(pDM_Odm, 0xc2c+pagesel, 0x3c3c3c3c); ODM_Write4Byte(pDM_Odm, 0xc30+pagesel, 0x3c3c3c3c); ODM_Write4Byte(pDM_Odm, 0xc34+pagesel, 0x3c3c3c3c); ODM_Write4Byte(pDM_Odm, 0xc38+pagesel, 0x3c3c3c3c); ODM_Write4Byte(pDM_Odm, 0xc3c+pagesel, 0x3c3c3c3c); ODM_Write4Byte(pDM_Odm, 0xc40+pagesel, 0x3c3c3c3c); ODM_Write4Byte(pDM_Odm, 0xc44+pagesel, 0x3c3c3c3c); ODM_Write4Byte(pDM_Odm, 0xc48+pagesel, 0x3c3c3c3c); ODM_Write4Byte(pDM_Odm, 0xc4c+pagesel, 0x3c3c3c3c); // reg82c[31] =1b'1, ¤Á´«¨ì page C1 ODM_Write4Byte(pDM_Odm, 0x82c, 0x802083d5); // r_agc_boudary // PA gain = 11 ¹ïÀ³ tx_agc ±q1f ¨ì11 boundary = b'11111 ' PageC1 ªº bc0[4:0] = 11111 // PA gain = 10 ¹ïÀ³ tx_agc ±q11 ¨ì11 ? boundary = b'10011 ' PageC1 ªº bc0[9:5] = 10001 // PA gain = 01 ¹ïÀ³ tx_agc ±q10 ¨ì0e ? boundary = b'10000 ' PageC1 ªº bc0[14:10] = 10000 // PA gain = 00 ¹ïÀ³ tx_agc ±q0d ¨ì00 ? boundary = b'01101 ' PageC1 ªº bc0[19:15] = 01101 ODM_Write4Byte(pDM_Odm, 0xcbc+pagesel, 0x0006c23f); // r_bnd, ¥t¥~4¶ô PWSF (power scaling factor) ªº boundary, ¦]¬°¥Ø«e¥u¦³¦b PA gain = 11 ®É¤~°µ¸ÉÀv, ©Ò¥H³]¦¨ h'fffff §Y¥i. ODM_Write4Byte(pDM_Odm, 0xcb8+pagesel, 0x000fffff); //============// // RF setting for DPK // //============// // 00[4:0] = Tx AGC, 00[9:5] = Rx AGC (BB), 00[12:10] = Rx AGC (LNA) // ¦¹³B reg00[4:0] = h'1d, ¬O¥Ñ«e­± gain loss function ±o¨ìªºµ²ªG. ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)(0x0+path), 0x0, bRFRegOffsetMask, 0x517e0 | TXindex); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RF 0x0 = 0x%x\n", 0x517e0 | TXindex)); // one shot ODM_Write4Byte(pDM_Odm, 0xcc8+pagesel, 0xc00c5599); ODM_Write4Byte(pDM_Odm, 0xcc8+pagesel, 0x400c5599); // delay 100 ms ODM_delay_ms(100); // read back dp_fail report ODM_Write4Byte(pDM_Odm, 0xcb8+pagesel, 0x00000000); //if d00[6] = 1, DPK fail if(ODM_GetBBReg(pDM_Odm, 0xd00+regsel, BIT6)) { //bypass DPK ODM_Write4Byte(pDM_Odm, 0xcc4+pagesel, 0x28848000); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path %s DPK fail!!!!!!!!!!!!!!!!!!!!!\n", (path==0)?"A":"B")); return; } ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path %s DPK ok!!!!!!!!!!!!!!!!!!!!!\n", (path==0)?"A":"B")); //read LMS table -->debug message only ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("read LMS\n")); for(i=0;i<8;i++){ ODM_Write4Byte(pDM_Odm, 0xc90+pagesel, 0x0601f0b8+i); for(j=0;j<4;j++){ ODM_Write4Byte(pDM_Odm, 0xcb8+pagesel, 0x09000000+(j<<24)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0x%x", ODM_Read4Byte(pDM_Odm, 0xd00+regsel))); } } //***************************************// //get gain loss //***************************************// _DPK_GetGainLoss(pDM_Odm,path); //***************************************// //Enable DP //***************************************// _DPK_EnableDP(pDM_Odm, path, TXindex); } } VOID phy_DPCalibrate_8812A( IN PDM_ODM_T pDM_Odm ) { u4Byte backupRegAddrs[] = { 0x970, 0xcb8, 0x838, 0xc00, 0x90c, 0xb00, 0xc94, 0x82c, 0x520, 0xc60, // 10 0xc64, 0xc68, 0xc6c, 0xc70, 0xc74, 0xc78, 0xc7c, 0xc80, 0xc84, 0xc50, // 20 0xc20, 0xc24, 0xc28, 0xc2c, 0xc30, 0xc34, 0xc38, 0xc3c, 0xc40, 0xc44, // 30 0xc48, 0xc4c, 0xe50, 0xe20, 0xe24, 0xe28, 0xe2c, 0xe30, 0xe34, 0xe38, // 40 0xe3c, 0xe40, 0xe44, 0xe48, 0xe4c, 0xeb8, 0xe00, 0xe94, 0xe60, 0xe64, //50 0xe68, 0xe6c, 0xe70, 0xe74, 0xe78, 0xe7c, 0xe80, 0xe84 }; u4Byte backupRegData[sizeof(backupRegAddrs)/sizeof(u4Byte)]; //backup BB&MAC default value _DPK_parabackup(pDM_Odm, backupRegData, backupRegAddrs, sizeof(backupRegAddrs)/sizeof(u4Byte)); //set global parameters _DPK_Globalparaset(pDM_Odm); //DPK _DPK_pathABDPK(pDM_Odm); // TH_DPK=thermalmeter //reload BB&MAC defaul value; _DPK_parareload(pDM_Odm, backupRegData, backupRegAddrs, sizeof(backupRegAddrs)/sizeof(u4Byte)); } VOID PHY_DPCalibrate_8812A( IN PDM_ODM_T pDM_Odm ) { pDM_Odm->DPK_Done = TRUE; ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> PHY_DPCalibrate_8812A\n")); phy_DPCalibrate_8812A(pDM_Odm); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<=== PHY_DPCalibrate_8812A\n")); } rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/rtl8812a/HalPhyRf_8812A.h000066400000000000000000000051151261122257400231620ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HAL_PHY_RF_8812A_H__ #define __HAL_PHY_RF_8812A_H__ /*--------------------------Define Parameters-------------------------------*/ #define IQK_DELAY_TIME_8812A 10 //ms #define IQK_DEFERRED_TIME_8812A 4 //sec #define index_mapping_NUM_8812A 15 #define AVG_THERMAL_NUM_8812A 4 #define RF_T_METER_8812A 0x42 void ConfigureTxpowerTrack_8812A( PTXPWRTRACK_CFG pConfig ); VOID GetDeltaSwingTable_8812A( IN PDM_ODM_T pDM_Odm, OUT pu1Byte *TemperatureUP_A, OUT pu1Byte *TemperatureDOWN_A, OUT pu1Byte *TemperatureUP_B, OUT pu1Byte *TemperatureDOWN_B ); void DoIQK_8812A( PDM_ODM_T pDM_Odm, u1Byte DeltaThermalIndex, u1Byte ThermalValue, u1Byte Threshold ); VOID ODM_TxPwrTrackSetPwr8812A( PDM_ODM_T pDM_Odm, PWRTRACK_METHOD Method, u1Byte RFPath, u1Byte ChannelMappedIndex ); //1 7. IQK void PHY_IQCalibrate_8812A( IN PADAPTER pAdapter, IN BOOLEAN bReCovery ); // // LC calibrate // void PHY_LCCalibrate_8812A( IN PDM_ODM_T pDM_Odm ); // // AP calibrate // void PHY_APCalibrate_8812A( #if (DM_ODM_SUPPORT_TYPE & ODM_AP) IN PDM_ODM_T pDM_Odm, #else IN PADAPTER pAdapter, #endif IN s1Byte delta); void PHY_DigitalPredistortion_8812A( IN PADAPTER pAdapter); VOID PHY_DPCalibrate_8812A( IN PDM_ODM_T pDM_Odm ); VOID PHY_SetRFPathSwitch_8812A( #if (DM_ODM_SUPPORT_TYPE & ODM_AP) IN PDM_ODM_T pDM_Odm, #else IN PADAPTER pAdapter, #endif IN BOOLEAN bMain ); #endif // #ifndef __HAL_PHY_RF_8812A_H__ rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/rtl8812a/Mp_Precomp.h000066400000000000000000000020221261122257400227550ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //#include //#include "phydm_precomp.h" //#include "../phydm_precomp.h" rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/rtl8812a/phydm_RTL8812A.c000066400000000000000000000124571261122257400232120ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // include files //============================================================ #include "Mp_Precomp.h" #include "../phydm_precomp.h" #if (RTL8812A_SUPPORT == 1) VOID odm_UpdateTxPath_8812A(IN PDM_ODM_T pDM_Odm, IN u1Byte Path) { pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv; if(pDM_PathDiv->RespTxPath != Path) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("Need to Update Tx Path\n")); if(Path == ODM_RF_PATH_A) { ODM_SetBBReg(pDM_Odm, 0x80c , 0xFFF0, 0x111); //Tx by Reg ODM_SetBBReg(pDM_Odm, 0x6d8 , BIT7|BIT6, 1); //Resp Tx by Txinfo } else { ODM_SetBBReg(pDM_Odm, 0x80c , 0xFFF0, 0x222); //Tx by Reg ODM_SetBBReg(pDM_Odm, 0x6d8 , BIT7|BIT6, 2); //Resp Tx by Txinfo } } pDM_PathDiv->RespTxPath = Path; ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("Path=%s\n",(Path==ODM_RF_PATH_A)?"ODM_RF_PATH_A":"ODM_RF_PATH_B")); } VOID ODM_PathStatistics_8812A( IN PDM_ODM_T pDM_Odm, IN u4Byte MacId, IN u4Byte RSSI_A, IN u4Byte RSSI_B ) { pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv; pDM_PathDiv->PathA_Sum[MacId]+=RSSI_A; pDM_PathDiv->PathA_Cnt[MacId]++; pDM_PathDiv->PathB_Sum[MacId]+=RSSI_B; pDM_PathDiv->PathB_Cnt[MacId]++; } VOID ODM_PathDiversityInit_8812A( IN PDM_ODM_T pDM_Odm ) { u4Byte i; pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv; ODM_SetBBReg(pDM_Odm, 0x80c , BIT29, 1); //Tx path from Reg ODM_SetBBReg(pDM_Odm, 0x80c , 0xFFF0, 0x111); //Tx by Reg ODM_SetBBReg(pDM_Odm, 0x6d8 , BIT7|BIT6, 1); //Resp Tx by Txinfo odm_UpdateTxPath_8812A(pDM_Odm, ODM_RF_PATH_A); for (i=0; iPathSel[i] = 1; // TxInfo default at path-A } } VOID ODM_PathDiversity_8812A( IN PDM_ODM_T pDM_Odm ) { u4Byte i, RssiAvgA=0, RssiAvgB=0, LocalMinRSSI, MinRSSI=0xFF; u1Byte TxRespPath=0, TargetPath; pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv; PSTA_INFO_T pEntry; ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("Odm_PathDiversity_8812A() =>\n")); for (i=0; ipODM_StaInfo[i]; if(IS_STA_VALID(pEntry)) { //2 Caculate RSSI per Path RssiAvgA = (pDM_PathDiv->PathA_Cnt[i]!=0)?(pDM_PathDiv->PathA_Sum[i]/pDM_PathDiv->PathA_Cnt[i]):0; RssiAvgB = (pDM_PathDiv->PathB_Cnt[i]!=0)?(pDM_PathDiv->PathB_Sum[i]/pDM_PathDiv->PathB_Cnt[i]):0; TargetPath = (RssiAvgA==RssiAvgB)?pDM_PathDiv->RespTxPath:((RssiAvgA>=RssiAvgB)?ODM_RF_PATH_A:ODM_RF_PATH_B); ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("MacID=%d, PathA_Sum=%d, PathA_Cnt=%d\n", i, pDM_PathDiv->PathA_Sum[i], pDM_PathDiv->PathA_Cnt[i])); ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("MacID=%d, PathB_Sum=%d, PathB_Cnt=%d\n",i, pDM_PathDiv->PathB_Sum[i], pDM_PathDiv->PathB_Cnt[i])); ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("MacID=%d, RssiAvgA= %d, RssiAvgB= %d\n", i, RssiAvgA, RssiAvgB)); //2 Select Resp Tx Path LocalMinRSSI = (RssiAvgA>RssiAvgB)?RssiAvgB:RssiAvgA; if(LocalMinRSSI < MinRSSI) { MinRSSI = LocalMinRSSI; TxRespPath = TargetPath; } //2 Select Tx DESC if(TargetPath == ODM_RF_PATH_A) pDM_PathDiv->PathSel[i] = 1; else pDM_PathDiv->PathSel[i] = 2; ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Tx from TxInfo, TargetPath=%s\n", (TargetPath==ODM_RF_PATH_A)?"ODM_RF_PATH_A":"ODM_RF_PATH_B")); ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("pDM_PathDiv->PathSel[%d] = %d\n", i, pDM_PathDiv->PathSel[i])); } pDM_PathDiv->PathA_Cnt[i] = 0; pDM_PathDiv->PathA_Sum[i] = 0; pDM_PathDiv->PathB_Cnt[i] = 0; pDM_PathDiv->PathB_Sum[i] = 0; } //2 Update Tx Path odm_UpdateTxPath_8812A(pDM_Odm, TxRespPath); } #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) VOID ODM_SetTxPathByTxInfo_8812A( IN PDM_ODM_T pDM_Odm, IN pu1Byte pDesc, IN u1Byte macId ) { pPATHDIV_T pDM_PathDiv = &pDM_Odm->DM_PathDiv; if((pDM_Odm->SupportICType != ODM_RTL8812)||(!(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV))) return; SET_TX_DESC_TX_ANT_8812(pDesc, pDM_PathDiv->PathSel[macId]); } #else// (DM_ODM_SUPPORT_TYPE == ODM_AP) VOID ODM_SetTxPathByTxInfo_8812A( IN PDM_ODM_T pDM_Odm ) { } #endif #endif //#if (RTL8812A_SUPPORT == 1)rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/rtl8812a/phydm_RTL8812A.h000066400000000000000000000025451261122257400232140ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __ODM_RTL8812A_H__ #define __ODM_RTL8812A_H__ VOID ODM_PathStatistics_8812A( IN PDM_ODM_T pDM_Odm, IN u4Byte MacId, IN u4Byte RSSI_A, IN u4Byte RSSI_B ); VOID ODM_PathDiversityInit_8812A( IN PDM_ODM_T pDM_Odm); VOID ODM_PathDiversity_8812A( IN PDM_ODM_T pDM_Odm); VOID ODM_SetTxPathByTxInfo_8812A( IN PDM_ODM_T pDM_Odm, IN pu1Byte pDesc, IN u1Byte macId ); #endifrtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/rtl8812a/phydm_RegConfig8812A.c000066400000000000000000000114471261122257400244120ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include "Mp_Precomp.h" #include "../phydm_precomp.h" #if (RTL8812A_SUPPORT == 1) void odm_ConfigRFReg_8812A( IN PDM_ODM_T pDM_Odm, IN u4Byte Addr, IN u4Byte Data, IN ODM_RF_RADIO_PATH_E RF_PATH, IN u4Byte RegAddr ) { if(Addr == 0xfe || Addr == 0xffe) { #ifdef CONFIG_LONG_DELAY_ISSUE ODM_sleep_ms(50); #else ODM_delay_ms(50); #endif } else { ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data); // Add 1us delay between BB/RF register setting. ODM_delay_us(1); } } void odm_ConfigRF_RadioA_8812A( IN PDM_ODM_T pDM_Odm, IN u4Byte Addr, IN u4Byte Data ) { u4Byte content = 0x1000; // RF_Content: radioa_txt u4Byte maskforPhySet= (u4Byte)(content&0xE000); odm_ConfigRFReg_8812A(pDM_Odm, Addr, Data, ODM_RF_PATH_A, Addr|maskforPhySet); ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", Addr, Data)); } void odm_ConfigRF_RadioB_8812A( IN PDM_ODM_T pDM_Odm, IN u4Byte Addr, IN u4Byte Data ) { u4Byte content = 0x1001; // RF_Content: radiob_txt u4Byte maskforPhySet= (u4Byte)(content&0xE000); odm_ConfigRFReg_8812A(pDM_Odm, Addr, Data, ODM_RF_PATH_B, Addr|maskforPhySet); ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioB] %08X %08X\n", Addr, Data)); } void odm_ConfigMAC_8812A( IN PDM_ODM_T pDM_Odm, IN u4Byte Addr, IN u1Byte Data ) { ODM_Write1Byte(pDM_Odm, Addr, Data); ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data)); } void odm_ConfigBB_AGC_8812A( IN PDM_ODM_T pDM_Odm, IN u4Byte Addr, IN u4Byte Bitmask, IN u4Byte Data ) { ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); // Add 1us delay between BB/RF register setting. ODM_delay_us(1); ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n", Addr, Data)); } void odm_ConfigBB_PHY_REG_PG_8812A( IN PDM_ODM_T pDM_Odm, IN u4Byte Band, IN u4Byte RfPath, IN u4Byte TxNum, IN u4Byte Addr, IN u4Byte Bitmask, IN u4Byte Data ) { if (Addr == 0xfe || Addr == 0xffe) { #ifdef CONFIG_LONG_DELAY_ISSUE ODM_sleep_ms(50); #else ODM_delay_ms(50); #endif } else { #if !(DM_ODM_SUPPORT_TYPE&ODM_AP) PHY_StoreTxPowerByRate(pDM_Odm->Adapter, Band, RfPath, TxNum, Addr, Bitmask, Data); #endif } ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n", Addr, Bitmask, Data)); } void odm_ConfigBB_PHY_8812A( IN PDM_ODM_T pDM_Odm, IN u4Byte Addr, IN u4Byte Bitmask, IN u4Byte Data ) { if (Addr == 0xfe) { #ifdef CONFIG_LONG_DELAY_ISSUE ODM_sleep_ms(50); #else ODM_delay_ms(50); #endif } else if (Addr == 0xfd) { ODM_delay_ms(5); } else if (Addr == 0xfc) { ODM_delay_ms(1); } else if (Addr == 0xfb) { ODM_delay_us(50); } else if (Addr == 0xfa) { ODM_delay_us(5); } else if (Addr == 0xf9) { ODM_delay_us(1); } else { ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); // Add 1us delay between BB/RF register setting. ODM_delay_us(1); } ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", Addr, Data)); } void odm_ConfigBB_TXPWR_LMT_8812A( IN PDM_ODM_T pDM_Odm, IN pu1Byte Regulation, IN pu1Byte Band, IN pu1Byte Bandwidth, IN pu1Byte RateSection, IN pu1Byte RfPath, IN pu1Byte Channel, IN pu1Byte PowerLimit ) { #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) PHY_SetTxPowerLimit(pDM_Odm, Regulation, Band, Bandwidth, RateSection, RfPath, Channel, PowerLimit); #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) PHY_SetTxPowerLimit(pDM_Odm->Adapter, Regulation, Band, Bandwidth, RateSection, RfPath, Channel, PowerLimit); #endif } #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/OUTSRC/rtl8812a/phydm_RegConfig8812A.h000066400000000000000000000043221261122257400244110ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __INC_ODM_REGCONFIG_H_8812A #define __INC_ODM_REGCONFIG_H_8812A #if (RTL8812A_SUPPORT == 1) void odm_ConfigRFReg_8812A( IN PDM_ODM_T pDM_Odm, IN u4Byte Addr, IN u4Byte Data, IN ODM_RF_RADIO_PATH_E RF_PATH, IN u4Byte RegAddr ); void odm_ConfigRF_RadioA_8812A( IN PDM_ODM_T pDM_Odm, IN u4Byte Addr, IN u4Byte Data ); void odm_ConfigRF_RadioB_8812A( IN PDM_ODM_T pDM_Odm, IN u4Byte Addr, IN u4Byte Data ); void odm_ConfigMAC_8812A( IN PDM_ODM_T pDM_Odm, IN u4Byte Addr, IN u1Byte Data ); void odm_ConfigBB_AGC_8812A( IN PDM_ODM_T pDM_Odm, IN u4Byte Addr, IN u4Byte Bitmask, IN u4Byte Data ); void odm_ConfigBB_PHY_REG_PG_8812A( IN PDM_ODM_T pDM_Odm, IN u4Byte Band, IN u4Byte RfPath, IN u4Byte TxNum, IN u4Byte Addr, IN u4Byte Bitmask, IN u4Byte Data ); void odm_ConfigBB_PHY_8812A( IN PDM_ODM_T pDM_Odm, IN u4Byte Addr, IN u4Byte Bitmask, IN u4Byte Data ); void odm_ConfigBB_TXPWR_LMT_8812A( IN PDM_ODM_T pDM_Odm, IN pu1Byte Regulation, IN pu1Byte Band, IN pu1Byte Bandwidth, IN pu1Byte RateSection, IN pu1Byte RfPath, IN pu1Byte Channel, IN pu1Byte PowerLimit ); #endif #endif // end of SUPPORT rtl8812au-4.3.8.12175.20140902+dfsg/hal/hal_btcoex.c000066400000000000000000002614351261122257400205320ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define __HAL_BTCOEX_C__ #ifdef CONFIG_BT_COEXIST #include #include #include //==================================== // Global variables //==================================== const char *const BtProfileString[] = { "NONE", "A2DP", "PAN", "HID", "SCO", }; const char *const BtSpecString[] = { "1.0b", "1.1", "1.2", "2.0+EDR", "2.1+EDR", "3.0+HS", "4.0", }; const char *const BtLinkRoleString[] = { "Master", "Slave", }; const char *const h2cStaString[] = { "successful", "h2c busy", "rf off", "fw not read", }; const char *const ioStaString[] = { "success", "can not IO", "rf off", "fw not read", "wait io timeout", "invalid len", "idle Q empty", "insert waitQ fail", "unknown fail", "wrong level", "h2c stopped", }; const char *const GLBtcWifiBwString[]={ "11bg", "HT20", "HT40", "HT80", "HT160" }; const char *const GLBtcWifiFreqString[]={ "2.4G", "5G" }; #define HALBTCOUTSRC_AGG_CHK_WINDOW_IN_MS 8000 BTC_COEXIST GLBtCoexist; u8 GLBtcWiFiInScanState; u8 GLBtcWiFiInIQKState; u8 GLBtcWiFiInIPS; u8 GLBtcWiFiInLPS; u32 GLBtcDbgType[BTC_MSG_MAX]; u8 GLBtcDbgBuf[BT_TMP_BUF_SIZE]; typedef struct _btcoexdbginfo { u8 *info; u32 size; // buffer total size u32 len; // now used length } BTCDBGINFO, *PBTCDBGINFO; BTCDBGINFO GLBtcDbgInfo; #define BT_Operation(Adapter) _FALSE static void DBG_BT_INFO_INIT(PBTCDBGINFO pinfo, u8 *pbuf, u32 size) { if (NULL == pinfo) return; _rtw_memset(pinfo, 0, sizeof(BTCDBGINFO)); if (pbuf && size) { pinfo->info = pbuf; pinfo->size = size; } } void DBG_BT_INFO(u8 *dbgmsg) { PBTCDBGINFO pinfo; u32 msglen, buflen; u8 *pbuf; pinfo = &GLBtcDbgInfo; if (NULL == pinfo->info) return; msglen = strlen(dbgmsg); if (pinfo->len + msglen > pinfo->size) return; pbuf = pinfo->info + pinfo->len; _rtw_memcpy(pbuf, dbgmsg, msglen); pinfo->len += msglen; } //==================================== // Debug related function //==================================== static u8 halbtcoutsrc_IsBtCoexistAvailable(PBTC_COEXIST pBtCoexist) { if (!pBtCoexist->bBinded || NULL == pBtCoexist->Adapter) { return _FALSE; } return _TRUE; } static void halbtcoutsrc_DbgInit(void) { u8 i; for (i=0; iboardInfo.btChipType == BTC_CHIP_CSR_BC4 || pBtCoexist->boardInfo.btChipType == BTC_CHIP_CSR_BC8 ){ return _TRUE; } return _FALSE; } static u8 halbtcoutsrc_IsHwMailboxExist(PBTC_COEXIST pBtCoexist) { if (pBtCoexist->boardInfo.btChipType == BTC_CHIP_CSR_BC4 || pBtCoexist->boardInfo.btChipType == BTC_CHIP_CSR_BC8 ){ return _FALSE; } else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { return _FALSE; } else return _TRUE; } static void halbtcoutsrc_LeaveLps(PBTC_COEXIST pBtCoexist) { PADAPTER padapter; padapter = pBtCoexist->Adapter; pBtCoexist->btInfo.bBtCtrlLps = _TRUE; pBtCoexist->btInfo.bBtLpsOn = _FALSE; rtw_btcoex_LPS_Leave(padapter); } void halbtcoutsrc_EnterLps(PBTC_COEXIST pBtCoexist) { PADAPTER padapter; padapter = pBtCoexist->Adapter; pBtCoexist->btInfo.bBtCtrlLps = _TRUE; pBtCoexist->btInfo.bBtLpsOn = _TRUE; rtw_btcoex_LPS_Enter(padapter); } void halbtcoutsrc_NormalLps(PBTC_COEXIST pBtCoexist) { PADAPTER padapter; BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Normal LPS behavior!!!\n")); padapter = pBtCoexist->Adapter; if (pBtCoexist->btInfo.bBtCtrlLps) { pBtCoexist->btInfo.bBtLpsOn = _FALSE; rtw_btcoex_LPS_Leave(padapter); pBtCoexist->btInfo.bBtCtrlLps = _FALSE; // recover the LPS state to the original #if 0 padapter->HalFunc.UpdateLPSStatusHandler( padapter, pPSC->RegLeisurePsMode, pPSC->RegPowerSaveMode); #endif } } /* * Constraint: * 1. this function will request pwrctrl->lock */ void halbtcoutsrc_LeaveLowPower(PBTC_COEXIST pBtCoexist) { #ifdef CONFIG_LPS_LCLK PADAPTER padapter; PHAL_DATA_TYPE pHalData; struct pwrctrl_priv *pwrctrl; s32 ready; u32 stime; s32 utime; u32 timeout; // unit: ms padapter = pBtCoexist->Adapter; pHalData = GET_HAL_DATA(padapter); pwrctrl = adapter_to_pwrctl(padapter); ready = _FAIL; #ifdef LPS_RPWM_WAIT_MS timeout = LPS_RPWM_WAIT_MS; #else // !LPS_RPWM_WAIT_MS timeout = 30; #endif // !LPS_RPWM_WAIT_MS stime = rtw_get_current_time(); do { ready = rtw_register_task_alive(padapter, BTCOEX_ALIVE); if (_SUCCESS == ready) break; utime = rtw_get_passing_time_ms(stime); if (utime > timeout) break; rtw_msleep_os(1); } while (1); #endif // CONFIG_LPS_LCLK } /* * Constraint: * 1. this function will request pwrctrl->lock */ void halbtcoutsrc_NormalLowPower(PBTC_COEXIST pBtCoexist) { #ifdef CONFIG_LPS_LCLK PADAPTER padapter; padapter = pBtCoexist->Adapter; rtw_unregister_task_alive(padapter, BTCOEX_ALIVE); #endif // CONFIG_LPS_LCLK } void halbtcoutsrc_DisableLowPower(PBTC_COEXIST pBtCoexist, u8 bLowPwrDisable) { pBtCoexist->btInfo.bBtDisableLowPwr = bLowPwrDisable; if (bLowPwrDisable) halbtcoutsrc_LeaveLowPower(pBtCoexist); // leave 32k low power. else halbtcoutsrc_NormalLowPower(pBtCoexist); // original 32k low power behavior. } void halbtcoutsrc_AggregationCheck(PBTC_COEXIST pBtCoexist) { PADAPTER padapter; BOOLEAN bNeedToAct = _FALSE; static u32 preTime = 0; u32 curTime = 0; padapter = pBtCoexist->Adapter; //===================================== // To void continuous deleteBA=>addBA=>deleteBA=>addBA // This function is not allowed to continuous called. // It can only be called after 8 seconds. //===================================== curTime = rtw_systime_to_ms(rtw_get_current_time()); if((curTime - preTime) < HALBTCOUTSRC_AGG_CHK_WINDOW_IN_MS) // over 8 seconds you can execute this function again. { return; } else { preTime = curTime; } if (pBtCoexist->btInfo.bRejectAggPkt) { rtw_btcoex_RejectApAggregatedPacket(padapter, _TRUE); pBtCoexist->btInfo.bPreRejectAggPkt = pBtCoexist->btInfo.bRejectAggPkt; } else { if(pBtCoexist->btInfo.bPreRejectAggPkt) { bNeedToAct = _TRUE; pBtCoexist->btInfo.bPreRejectAggPkt = pBtCoexist->btInfo.bRejectAggPkt; } if (pBtCoexist->btInfo.bPreBtCtrlAggBufSize != pBtCoexist->btInfo.bBtCtrlAggBufSize) { bNeedToAct = _TRUE; pBtCoexist->btInfo.bPreBtCtrlAggBufSize = pBtCoexist->btInfo.bBtCtrlAggBufSize; } if (pBtCoexist->btInfo.bBtCtrlAggBufSize) { if (pBtCoexist->btInfo.preAggBufSize != pBtCoexist->btInfo.aggBufSize) { bNeedToAct = _TRUE; } pBtCoexist->btInfo.preAggBufSize = pBtCoexist->btInfo.aggBufSize; } if (bNeedToAct) { rtw_btcoex_RejectApAggregatedPacket(padapter, _TRUE); rtw_btcoex_RejectApAggregatedPacket(padapter, _FALSE); } } } u8 halbtcoutsrc_IsWifiBusy(PADAPTER padapter) { struct mlme_priv *pmlmepriv; pmlmepriv = &padapter->mlmepriv; if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) return _TRUE; if (_TRUE == pmlmepriv->LinkDetectInfo.bBusyTraffic) return _TRUE; } #if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_DUALMAC_CONCURRENT) pmlmepriv = &padapter->pbuddy_adapter->mlmepriv; if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) return _TRUE; if (_TRUE == pmlmepriv->LinkDetectInfo.bBusyTraffic) return _TRUE; } #endif return _FALSE; } static u32 _halbtcoutsrc_GetWifiLinkStatus(PADAPTER padapter) { struct mlme_priv *pmlmepriv; u8 bp2p; u32 portConnectedStatus; pmlmepriv = &padapter->mlmepriv; bp2p = _FALSE; portConnectedStatus = 0; #ifdef CONFIG_P2P if (!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) bp2p = _TRUE; #endif // CONFIG_P2P if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { if (_TRUE == bp2p) portConnectedStatus |= WIFI_P2P_GO_CONNECTED; else portConnectedStatus |= WIFI_AP_CONNECTED; } else { if (_TRUE == bp2p) portConnectedStatus |= WIFI_P2P_GC_CONNECTED; else portConnectedStatus |= WIFI_STA_CONNECTED; } } return portConnectedStatus; } u32 halbtcoutsrc_GetWifiLinkStatus(PBTC_COEXIST pBtCoexist) { //================================= // return value: // [31:16]=> connected port number // [15:0]=> port connected bit define //================================ PADAPTER padapter; u32 retVal; u32 portConnectedStatus, numOfConnectedPort; padapter = pBtCoexist->Adapter; retVal = 0; portConnectedStatus = 0; numOfConnectedPort = 0; retVal = _halbtcoutsrc_GetWifiLinkStatus(padapter); if (retVal) { portConnectedStatus |= retVal; numOfConnectedPort++; } #ifdef CONFIG_CONCURRENT_MODE if (padapter->pbuddy_adapter) { retVal = _halbtcoutsrc_GetWifiLinkStatus(padapter->pbuddy_adapter); if (retVal) { portConnectedStatus |= retVal; numOfConnectedPort++; } } #endif // CONFIG_CONCURRENT_MODE retVal = (numOfConnectedPort << 16) | portConnectedStatus; return retVal; } u32 halbtcoutsrc_GetBtPatchVer(PBTC_COEXIST pBtCoexist) { u16 btRealFwVer = 0x0; u8 btFwVer = 0x0; u8 cnt = 0; #if 0 if (!pBtCoexist->btInfo.btRealFwVer && cnt<=5) { if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist)) { // mailbox exists, through mailbox if (NDBG_GetBtFwVersion(pBtCoexist->Adapter, &btRealFwVer, &btFwVer)) { pBtCoexist->btInfo.btRealFwVer = btRealFwVer; pBtCoexist->btInfo.btFwVer = btFwVer; } else { pBtCoexist->btInfo.btRealFwVer = 0x0; pBtCoexist->btInfo.btFwVer = 0x0; } } else // no mailbox, query bt patch version through stack. { u1Byte dataLen=2; u1Byte buf[4] = {0}; buf[0] = 0x0; // OP_Code buf[1] = 0x0; // OP_Code_Length BT_SendEventExtBtCoexControl(pBtCoexist->Adapter, _FALSE, dataLen, &buf[0]); } cnt++; } #endif return pBtCoexist->btInfo.btRealFwVer; } s32 halbtcoutsrc_GetWifiRssi(PADAPTER padapter) { PHAL_DATA_TYPE pHalData; s32 UndecoratedSmoothedPWDB = 0; pHalData = GET_HAL_DATA(padapter); UndecoratedSmoothedPWDB = pHalData->dmpriv.EntryMinUndecoratedSmoothedPWDB; return UndecoratedSmoothedPWDB; } static u8 halbtcoutsrc_GetWifiScanAPNum(PADAPTER padapter) { struct mlme_priv *pmlmepriv; struct mlme_ext_priv *pmlmeext; static u8 scan_AP_num = 0; pmlmepriv = &padapter->mlmepriv; pmlmeext = &padapter->mlmeextpriv; if (GLBtcWiFiInScanState == _FALSE) { if (pmlmeext->sitesurvey_res.bss_cnt > 0xFF) scan_AP_num = 0xFF; else scan_AP_num = (u8)pmlmeext->sitesurvey_res.bss_cnt; } return scan_AP_num; } u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf) { PBTC_COEXIST pBtCoexist; PADAPTER padapter; PHAL_DATA_TYPE pHalData; struct mlme_ext_priv *mlmeext; u8 bSoftApExist, bVwifiExist; u8 *pu8; s32 *pS4Tmp; u32 *pU4Tmp; u8 *pU1Tmp; u8 ret; pBtCoexist = (PBTC_COEXIST)pBtcContext; if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return _FALSE; padapter = pBtCoexist->Adapter; pHalData = GET_HAL_DATA(padapter); mlmeext = &padapter->mlmeextpriv; bSoftApExist = _FALSE; bVwifiExist = _FALSE; pu8 = (u8*)pOutBuf; pS4Tmp = (s32*)pOutBuf; pU4Tmp = (u32*)pOutBuf; pU1Tmp = (u8*)pOutBuf; ret = _TRUE; switch (getType) { case BTC_GET_BL_HS_OPERATION: *pu8 = _FALSE; ret = _FALSE; break; case BTC_GET_BL_HS_CONNECTING: *pu8 = _FALSE; ret = _FALSE; break; case BTC_GET_BL_WIFI_CONNECTED: *pu8 = check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE); #ifdef CONFIG_CONCURRENT_MODE if ((_FALSE == *pu8) && padapter->pbuddy_adapter) { *pu8 = check_fwstate(&padapter->pbuddy_adapter->mlmepriv, WIFI_ASOC_STATE); } #endif // CONFIG_CONCURRENT_MODE break; case BTC_GET_BL_WIFI_BUSY: *pu8 = halbtcoutsrc_IsWifiBusy(padapter); break; case BTC_GET_BL_WIFI_SCAN: #if 0 *pu8 = check_fwstate(&padapter->mlmepriv, WIFI_SITE_MONITOR); #ifdef CONFIG_CONCURRENT_MODE if ((_FALSE == *pu8) && padapter->pbuddy_adapter) { *pu8 = check_fwstate(&padapter->pbuddy_adapter->mlmepriv, WIFI_SITE_MONITOR); } #endif // CONFIG_CONCURRENT_MODE #else /* Use the value of the new variable GLBtcWiFiInScanState to judge whether WiFi is in scan state or not, since the originally used flag WIFI_SITE_MONITOR in fwstate may not be cleared in time */ *pu8 = GLBtcWiFiInScanState; #endif break; case BTC_GET_BL_WIFI_LINK: *pu8 = check_fwstate(&padapter->mlmepriv, WIFI_UNDER_LINKING); #ifdef CONFIG_CONCURRENT_MODE if ((_FALSE == *pu8) && padapter->pbuddy_adapter) { *pu8 = check_fwstate(&padapter->pbuddy_adapter->mlmepriv, WIFI_UNDER_LINKING); } #endif // CONFIG_CONCURRENT_MODE break; case BTC_GET_BL_WIFI_ROAM: *pu8 = check_fwstate(&padapter->mlmepriv, WIFI_UNDER_LINKING); #ifdef CONFIG_CONCURRENT_MODE if ((_FALSE == *pu8) && padapter->pbuddy_adapter) { *pu8 = check_fwstate(&padapter->pbuddy_adapter->mlmepriv, WIFI_UNDER_LINKING); } #endif // CONFIG_CONCURRENT_MODE break; case BTC_GET_BL_WIFI_4_WAY_PROGRESS: *pu8 = _FALSE; break; case BTC_GET_BL_WIFI_UNDER_5G: *pu8 = (pHalData->CurrentBandType == 1)? _TRUE : _FALSE; break; case BTC_GET_BL_WIFI_AP_MODE_ENABLE: *pu8 = check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE); #ifdef CONFIG_CONCURRENT_MODE if ((_FALSE == *pu8) && padapter->pbuddy_adapter) { *pu8 = check_fwstate(&padapter->pbuddy_adapter->mlmepriv, WIFI_AP_STATE); } #endif // CONFIG_CONCURRENT_MODE break; case BTC_GET_BL_WIFI_ENABLE_ENCRYPTION: *pu8 = padapter->securitypriv.dot11PrivacyAlgrthm == 0? _FALSE: _TRUE; break; case BTC_GET_BL_WIFI_UNDER_B_MODE: if (mlmeext->cur_wireless_mode == WIRELESS_11B) *pu8 = _TRUE; else *pu8 = _FALSE; break; case BTC_GET_BL_WIFI_IS_IN_MP_MODE: if (padapter->registrypriv.mp_mode == 0) { *pu8 = _FALSE; } else { *pu8 = _TRUE; } break; case BTC_GET_BL_EXT_SWITCH: *pu8 = _FALSE; break; case BTC_GET_S4_WIFI_RSSI: *pS4Tmp = halbtcoutsrc_GetWifiRssi(padapter); break; case BTC_GET_S4_HS_RSSI: *pS4Tmp = 0; ret = _FALSE; break; case BTC_GET_U4_WIFI_BW: if (IsLegacyOnly(mlmeext->cur_wireless_mode)) *pU4Tmp = BTC_WIFI_BW_LEGACY; else if (pHalData->CurrentChannelBW == CHANNEL_WIDTH_20) *pU4Tmp = BTC_WIFI_BW_HT20; else if (pHalData->CurrentChannelBW == CHANNEL_WIDTH_40) *pU4Tmp = BTC_WIFI_BW_HT40; else *pU4Tmp = BTC_WIFI_BW_HT40; /* todo */ break; case BTC_GET_U4_WIFI_TRAFFIC_DIRECTION: { PRT_LINK_DETECT_T plinkinfo; plinkinfo = &padapter->mlmepriv.LinkDetectInfo; if (plinkinfo->NumTxOkInPeriod > plinkinfo->NumRxOkInPeriod) *pU4Tmp = BTC_WIFI_TRAFFIC_TX; else *pU4Tmp = BTC_WIFI_TRAFFIC_RX; } break; case BTC_GET_U4_WIFI_FW_VER: *pU4Tmp = pHalData->FirmwareVersion << 16; *pU4Tmp |= pHalData->FirmwareSubVersion; break; case BTC_GET_U4_WIFI_LINK_STATUS: *pU4Tmp = halbtcoutsrc_GetWifiLinkStatus(pBtCoexist); break; case BTC_GET_U4_BT_PATCH_VER: *pU4Tmp = halbtcoutsrc_GetBtPatchVer(pBtCoexist); break; case BTC_GET_U1_WIFI_DOT11_CHNL: *pU1Tmp = padapter->mlmeextpriv.cur_channel; break; case BTC_GET_U1_WIFI_CENTRAL_CHNL: *pU1Tmp = pHalData->CurrentChannel; break; case BTC_GET_U1_WIFI_HS_CHNL: *pU1Tmp = 0; ret = _FALSE; break; case BTC_GET_U1_MAC_PHY_MODE: *pU1Tmp = BTC_SMSP; // *pU1Tmp = BTC_DMSP; // *pU1Tmp = BTC_DMDP; // *pU1Tmp = BTC_MP_UNKNOWN; break; case BTC_GET_U1_AP_NUM: *pU1Tmp = halbtcoutsrc_GetWifiScanAPNum(padapter); break; case BTC_GET_U1_ANT_TYPE: *pU1Tmp = (u1Byte)BTC_ANT_TYPE_0; break; //=======1Ant=========== case BTC_GET_U1_LPS_MODE: *pU1Tmp = padapter->dvobj->pwrctl_priv.pwr_mode; break; default: ret = _FALSE; break; } return ret; } u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf) { PBTC_COEXIST pBtCoexist; PADAPTER padapter; PHAL_DATA_TYPE pHalData; u8 *pu8; u8 *pU1Tmp; u32 *pU4Tmp; u8 ret; pBtCoexist = (PBTC_COEXIST)pBtcContext; padapter = pBtCoexist->Adapter; pHalData = GET_HAL_DATA(padapter); pu8 = (u8*)pInBuf; pU1Tmp = (u8*)pInBuf; pU4Tmp = (u32*)pInBuf; ret = _TRUE; if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return _FALSE; switch (setType) { // set some u8 type variables. case BTC_SET_BL_BT_DISABLE: pBtCoexist->btInfo.bBtDisabled = *pu8; break; case BTC_SET_BL_BT_TRAFFIC_BUSY: pBtCoexist->btInfo.bBtBusy = *pu8; break; case BTC_SET_BL_BT_LIMITED_DIG: pBtCoexist->btInfo.bLimitedDig = *pu8; break; case BTC_SET_BL_FORCE_TO_ROAM: pBtCoexist->btInfo.bForceToRoam = *pu8; break; case BTC_SET_BL_TO_REJ_AP_AGG_PKT: pBtCoexist->btInfo.bRejectAggPkt = *pu8; break; case BTC_SET_BL_BT_CTRL_AGG_SIZE: pBtCoexist->btInfo.bBtCtrlAggBufSize = *pu8; break; case BTC_SET_BL_INC_SCAN_DEV_NUM: pBtCoexist->btInfo.bIncreaseScanDevNum = *pu8; break; case BTC_SET_BL_BT_TX_RX_MASK: pBtCoexist->btInfo.bBtTxRxMask = *pu8; break; case BTC_SET_BL_MIRACAST_PLUS_BT: pBtCoexist->btInfo.bMiracastPlusBt = *pu8; break; // set some u8 type variables. case BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON: pBtCoexist->btInfo.rssiAdjustForAgcTableOn = *pU1Tmp; break; case BTC_SET_U1_AGG_BUF_SIZE: pBtCoexist->btInfo.aggBufSize = *pU1Tmp; break; // the following are some action which will be triggered case BTC_SET_ACT_GET_BT_RSSI: #if 0 BT_SendGetBtRssiEvent(padapter); #else ret = _FALSE; #endif break; case BTC_SET_ACT_AGGREGATE_CTRL: halbtcoutsrc_AggregationCheck(pBtCoexist); break; //=======1Ant=========== // set some u8 type variables. case BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE: pBtCoexist->btInfo.rssiAdjustFor1AntCoexType = *pU1Tmp; break; case BTC_SET_U1_LPS_VAL: pBtCoexist->btInfo.lpsVal = *pU1Tmp; break; case BTC_SET_U1_RPWM_VAL: pBtCoexist->btInfo.rpwmVal = *pU1Tmp; break; // the following are some action which will be triggered case BTC_SET_ACT_LEAVE_LPS: halbtcoutsrc_LeaveLps(pBtCoexist); break; case BTC_SET_ACT_ENTER_LPS: halbtcoutsrc_EnterLps(pBtCoexist); break; case BTC_SET_ACT_NORMAL_LPS: halbtcoutsrc_NormalLps(pBtCoexist); break; case BTC_SET_ACT_DISABLE_LOW_POWER: halbtcoutsrc_DisableLowPower(pBtCoexist, *pu8); break; case BTC_SET_ACT_UPDATE_RAMASK: pBtCoexist->btInfo.raMask = *pU4Tmp; if (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) == _TRUE) { struct sta_info *psta; PWLAN_BSSID_EX cur_network; cur_network = &padapter->mlmeextpriv.mlmext_info.network; psta = rtw_get_stainfo(&padapter->stapriv, cur_network->MacAddress); rtw_hal_update_ra_mask(psta, 0); } break; case BTC_SET_ACT_SEND_MIMO_PS: { u8 newMimoPsMode = 3; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); // *pU1Tmp = 0 use SM_PS static type // *pU1Tmp = 1 disable SM_PS if(*pU1Tmp==0) newMimoPsMode = WLAN_HT_CAP_SM_PS_STATIC; else if(*pU1Tmp==1) newMimoPsMode = WLAN_HT_CAP_SM_PS_DISABLED; if (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) == _TRUE) { //issue_action_SM_PS(padapter, get_my_bssid(&(pmlmeinfo->network)), newMimoPsMode); issue_action_SM_PS_wait_ack(padapter, get_my_bssid(&(pmlmeinfo->network)), newMimoPsMode, 3, 1); } } break; case BTC_SET_ACT_CTRL_BT_INFO: #if 0 { u8 dataLen = *pU1Tmp; u8 tmpBuf[20]; if (dataLen) { _rtw_memcpy(tmpBuf, pU1Tmp+1, dataLen); } // BT_SendEventExtBtInfoControl(padapter, dataLen, &tmpBuf[0]); } #else ret = _FALSE; #endif break; case BTC_SET_ACT_CTRL_BT_COEX: #if 0 { u8 dataLen = *pU1Tmp; u8 tmpBuf[20]; if (dataLen) { _rtw_memcpy(tmpBuf, pU1Tmp+1, dataLen); } // BT_SendEventExtBtCoexControl(padapter, _FALSE, dataLen, &tmpBuf[0]); } #else ret = _FALSE; #endif break; case BTC_SET_ACT_CTRL_8723B_ANT: #if 0 { u1Byte dataLen=*pU1Tmp; u1Byte tmpBuf[20]; if(dataLen) { PlatformMoveMemory(&tmpBuf[0], pU1Tmp+1, dataLen); } BT_Set8723bAnt(Adapter, dataLen, &tmpBuf[0]); } #else ret = _FALSE; #endif break; //===================== default: ret = _FALSE; break; } return ret; } u8 halbtcoutsrc_UnderIps(PBTC_COEXIST pBtCoexist) { PADAPTER padapter; struct pwrctrl_priv *pwrpriv; u8 bMacPwrCtrlOn; padapter = pBtCoexist->Adapter; pwrpriv = &padapter->dvobj->pwrctl_priv; bMacPwrCtrlOn = _FALSE; if ((_TRUE == pwrpriv->bips_processing) && (IPS_NONE != pwrpriv->ips_mode_req) ) { return _TRUE; } if (rf_off == pwrpriv->rf_pwrstate) { return _TRUE; } rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); if (_FALSE == bMacPwrCtrlOn) { return _TRUE; } return _FALSE; } u8 halbtcoutsrc_UnderLps(PBTC_COEXIST pBtCoexist) { return GLBtcWiFiInLPS; } u8 halbtcoutsrc_Under32K(PBTC_COEXIST pBtCoexist) { /* todo: the method to check whether wifi is under 32K or not */ return _FALSE; } void halbtcoutsrc_DisplayCoexStatistics(PBTC_COEXIST pBtCoexist) { #if 0 PADAPTER padapter = (PADAPTER)pBtCoexist->Adapter; PBT_MGNT pBtMgnt = &padapter->MgntInfo.BtInfo.BtMgnt; PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); u8 *cliBuf = pBtCoexist->cliBuf; u8 i; CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Statistics]============"); CL_PRINTF(cliBuf); #if (H2C_USE_IO_THREAD != 1) for(i=0; ih2cStatistics[i]) { CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s] = %d", "H2C statistics", \ h2cStaString[i], pHalData->h2cStatistics[i]); CL_PRINTF(cliBuf); } } #else for(i=0; iioComStr.ioH2cStatistics[i]) { CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s] = %d", "H2C statistics", \ ioStaString[i], Adapter->ioComStr.ioH2cStatistics[i]); CL_PRINTF(cliBuf); } } #endif #if 0 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "lastHMEBoxNum", \ pHalData->LastHMEBoxNum); CL_PRINTF(cliBuf); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x / 0x%x", "LastOkH2c/FirstFailH2c(fwNotRead)", \ pHalData->lastSuccessH2cEid, pHalData->firstFailedH2cEid); CL_PRINTF(cliBuf); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d", "c2hIsr/c2hIntr/clr1AF/noRdy/noBuf", \ pHalData->InterruptLog.nIMR_C2HCMD, DBG_Var.c2hInterruptCnt, DBG_Var.c2hClrReadC2hCnt, DBG_Var.c2hNotReadyCnt, DBG_Var.c2hBufAlloFailCnt); CL_PRINTF(cliBuf); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "c2hPacket", \ DBG_Var.c2hPacketCnt); CL_PRINTF(cliBuf); #endif CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Periodical/ DbgCtrl", \ pBtCoexist->statistics.cntPeriodical, pBtCoexist->statistics.cntDbgCtrl); CL_PRINTF(cliBuf); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "PowerOn/InitHw/InitCoexDm/RfStatus", \ pBtCoexist->statistics.cntPowerOn, pBtCoexist->statistics.cntInitHwConfig, pBtCoexist->statistics.cntInitCoexDm, pBtCoexist->statistics.cntRfStatusNotify); CL_PRINTF(cliBuf); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d", "Ips/Lps/Scan/Connect/Mstatus", \ pBtCoexist->statistics.cntIpsNotify, pBtCoexist->statistics.cntLpsNotify, pBtCoexist->statistics.cntScanNotify, pBtCoexist->statistics.cntConnectNotify, pBtCoexist->statistics.cntMediaStatusNotify); CL_PRINTF(cliBuf); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Special pkt/Bt info", \ pBtCoexist->statistics.cntSpecialPacketNotify, pBtCoexist->statistics.cntBtInfoNotify); CL_PRINTF(cliBuf); #endif } void halbtcoutsrc_DisplayBtLinkInfo(PBTC_COEXIST pBtCoexist) { #if 0 PADAPTER padapter = (PADAPTER)pBtCoexist->Adapter; PBT_MGNT pBtMgnt = &padapter->MgntInfo.BtInfo.BtMgnt; u8 *cliBuf = pBtCoexist->cliBuf; u8 i; if (pBtCoexist->stackInfo.bProfileNotified) { for (i=0; iExtConfig.NumberOfACL; i++) { if (pBtMgnt->ExtConfig.HCIExtensionVer >= 1) { CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s", "Bt link type/spec/role", \ BtProfileString[pBtMgnt->ExtConfig.aclLink[i].BTProfile], BtSpecString[pBtMgnt->ExtConfig.aclLink[i].BTCoreSpec], BtLinkRoleString[pBtMgnt->ExtConfig.aclLink[i].linkRole]); CL_PRINTF(cliBuf); } else { CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s", "Bt link type/spec", \ BtProfileString[pBtMgnt->ExtConfig.aclLink[i].BTProfile], BtSpecString[pBtMgnt->ExtConfig.aclLink[i].BTCoreSpec]); CL_PRINTF(cliBuf); } } } #endif } void halbtcoutsrc_DisplayWifiStatus(PBTC_COEXIST pBtCoexist) { PADAPTER padapter = pBtCoexist->Adapter; struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); u8* cliBuf=pBtCoexist->cliBuf; s32 wifiRssi=0, btHsRssi=0; BOOLEAN bScan=_FALSE, bLink=_FALSE, bRoam=_FALSE, bWifiBusy=_FALSE, bWifiUnderBMode=_FALSE; u32 wifiBw=BTC_WIFI_BW_HT20, wifiTrafficDir=BTC_WIFI_TRAFFIC_TX, wifiFreq=BTC_FREQ_2_4G; u32 wifiLinkStatus=0x0; BOOLEAN bBtHsOn=_FALSE, bLowPower=_FALSE; u8 wifiChnl=0, wifiHsChnl=0, nScanAPNum = 0, FwPSState; wifiLinkStatus = halbtcoutsrc_GetWifiLinkStatus(pBtCoexist); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d", "STA/vWifi/HS/p2pGo/p2pGc", \ ((wifiLinkStatus&WIFI_STA_CONNECTED)? 1:0), ((wifiLinkStatus&WIFI_AP_CONNECTED)? 1:0), ((wifiLinkStatus&WIFI_HS_CONNECTED)? 1:0), ((wifiLinkStatus&WIFI_P2P_GO_CONNECTED)? 1:0), ((wifiLinkStatus&WIFI_P2P_GC_CONNECTED)? 1:0) ); CL_PRINTF(cliBuf); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiChnl); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsChnl(High Speed)", \ wifiChnl, wifiHsChnl, bBtHsOn); CL_PRINTF(cliBuf); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Wifi rssi/ HS rssi", \ wifiRssi-100, btHsRssi-100); CL_PRINTF(cliBuf); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \ bLink, bRoam, bScan); CL_PRINTF(cliBuf); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifiFreq); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &nScanAPNum); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s/ AP=%d ", "Wifi freq/ bw/ traffic", \ GLBtcWifiFreqString[wifiFreq], ((bWifiUnderBMode)? "11b": GLBtcWifiBwString[wifiBw]), ((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink")), nScanAPNum); CL_PRINTF(cliBuf); // power status CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s%s%s", "Power Status", \ ((halbtcoutsrc_UnderIps(pBtCoexist) == _TRUE)? "IPS ON":"IPS OFF"), ((halbtcoutsrc_UnderLps(pBtCoexist) == _TRUE)? ", LPS ON":", LPS OFF"), ((halbtcoutsrc_Under32K(pBtCoexist) == _TRUE)? ", 32k":"")); CL_PRINTF(cliBuf); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x (0x%x/0x%x)", "Power mode cmd(lps/rpwm)", \ pBtCoexist->pwrModeVal[0], pBtCoexist->pwrModeVal[1], pBtCoexist->pwrModeVal[2], pBtCoexist->pwrModeVal[3], pBtCoexist->pwrModeVal[4], pBtCoexist->pwrModeVal[5], pBtCoexist->btInfo.lpsVal, pBtCoexist->btInfo.rpwmVal); CL_PRINTF(cliBuf); } void halbtcoutsrc_DisplayDbgMsg(void *pBtcContext, u8 dispType) { PBTC_COEXIST pBtCoexist; pBtCoexist = (PBTC_COEXIST)pBtcContext; switch(dispType) { case BTC_DBG_DISP_COEX_STATISTICS: halbtcoutsrc_DisplayCoexStatistics(pBtCoexist); break; case BTC_DBG_DISP_BT_LINK_INFO: halbtcoutsrc_DisplayBtLinkInfo(pBtCoexist); break; case BTC_DBG_DISP_WIFI_STATUS: halbtcoutsrc_DisplayWifiStatus(pBtCoexist); break; default: break; } } //==================================== // IO related function //==================================== u8 halbtcoutsrc_Read1Byte(void *pBtcContext, u32 RegAddr) { PBTC_COEXIST pBtCoexist; PADAPTER padapter; pBtCoexist = (PBTC_COEXIST)pBtcContext; padapter = pBtCoexist->Adapter; return rtw_read8(padapter, RegAddr); } u16 halbtcoutsrc_Read2Byte(void *pBtcContext, u32 RegAddr) { PBTC_COEXIST pBtCoexist; PADAPTER padapter; pBtCoexist = (PBTC_COEXIST)pBtcContext; padapter = pBtCoexist->Adapter; return rtw_read16(padapter, RegAddr); } u32 halbtcoutsrc_Read4Byte(void *pBtcContext, u32 RegAddr) { PBTC_COEXIST pBtCoexist; PADAPTER padapter; pBtCoexist = (PBTC_COEXIST)pBtcContext; padapter = pBtCoexist->Adapter; return rtw_read32(padapter, RegAddr); } void halbtcoutsrc_Write1Byte(void *pBtcContext, u32 RegAddr, u8 Data) { PBTC_COEXIST pBtCoexist; PADAPTER padapter; pBtCoexist = (PBTC_COEXIST)pBtcContext; padapter = pBtCoexist->Adapter; rtw_write8(padapter, RegAddr, Data); } void halbtcoutsrc_BitMaskWrite1Byte(void *pBtcContext, u32 regAddr, u8 bitMask, u8 data1b) { PBTC_COEXIST pBtCoexist; PADAPTER padapter; u8 originalValue, bitShift; u8 i; pBtCoexist = (PBTC_COEXIST)pBtcContext; padapter = pBtCoexist->Adapter; originalValue = 0; bitShift = 0; if(bitMask != 0xff) { originalValue = rtw_read8(padapter, regAddr); for (i=0; i<=7; i++) { if ((bitMask>>i)&0x1) break; } bitShift = i; data1b = (originalValue & ~bitMask) | ((data1b << bitShift) & bitMask); } rtw_write8(padapter, regAddr, data1b); } void halbtcoutsrc_Write2Byte(void *pBtcContext, u32 RegAddr, u16 Data) { PBTC_COEXIST pBtCoexist; PADAPTER padapter; pBtCoexist = (PBTC_COEXIST)pBtcContext; padapter = pBtCoexist->Adapter; rtw_write16(padapter, RegAddr, Data); } void halbtcoutsrc_Write4Byte(void *pBtcContext, u32 RegAddr, u32 Data) { PBTC_COEXIST pBtCoexist; PADAPTER padapter; pBtCoexist = (PBTC_COEXIST)pBtcContext; padapter = pBtCoexist->Adapter; rtw_write32(padapter, RegAddr, Data); } void halbtcoutsrc_WriteLocalReg1Byte(void *pBtcContext, u32 RegAddr, u8 Data) { PBTC_COEXIST pBtCoexist=(PBTC_COEXIST)pBtcContext; PADAPTER Adapter=pBtCoexist->Adapter; if(BTC_INTF_SDIO == pBtCoexist->chipInterface) { rtw_write8(Adapter, SDIO_LOCAL_BASE | RegAddr, Data); } else { rtw_write8(Adapter, RegAddr, Data); } } void halbtcoutsrc_SetBbReg(void *pBtcContext, u32 RegAddr, u32 BitMask, u32 Data) { PBTC_COEXIST pBtCoexist; PADAPTER padapter; pBtCoexist = (PBTC_COEXIST)pBtcContext; padapter = pBtCoexist->Adapter; PHY_SetBBReg(padapter, RegAddr, BitMask, Data); } u32 halbtcoutsrc_GetBbReg(void *pBtcContext, u32 RegAddr, u32 BitMask) { PBTC_COEXIST pBtCoexist; PADAPTER padapter; pBtCoexist = (PBTC_COEXIST)pBtcContext; padapter = pBtCoexist->Adapter; return PHY_QueryBBReg(padapter, RegAddr, BitMask); } void halbtcoutsrc_SetRfReg(void *pBtcContext, u8 eRFPath, u32 RegAddr, u32 BitMask, u32 Data) { PBTC_COEXIST pBtCoexist; PADAPTER padapter; pBtCoexist = (PBTC_COEXIST)pBtcContext; padapter = pBtCoexist->Adapter; PHY_SetRFReg(padapter, eRFPath, RegAddr, BitMask, Data); } u32 halbtcoutsrc_GetRfReg(void *pBtcContext, u8 eRFPath, u32 RegAddr, u32 BitMask) { PBTC_COEXIST pBtCoexist; PADAPTER padapter; pBtCoexist = (PBTC_COEXIST)pBtcContext; padapter = pBtCoexist->Adapter; return PHY_QueryRFReg(padapter, eRFPath, RegAddr, BitMask); } void halbtcoutsrc_SetBtReg(void *pBtcContext, u8 RegType, u32 RegAddr, u32 Data) { PBTC_COEXIST pBtCoexist; PADAPTER padapter; u8 CmdBuffer1[4] = {0}; u8 CmdBuffer2[4] = {0}; u8* AddrToSet = (u8*)&RegAddr; u8* ValueToSet = (u8*)&Data; u8 OperVer = 0; u8 ReqNum = 0; pBtCoexist = (PBTC_COEXIST)pBtcContext; padapter = pBtCoexist->Adapter; if (IS_HARDWARE_TYPE_8723B(padapter)) { CmdBuffer1[0] |= (OperVer & 0x0f); /* Set OperVer */ CmdBuffer1[0] |= ((ReqNum << 4) & 0xf0); /* Set ReqNum */ CmdBuffer1[1] = 0x0d; /* Set OpCode to BT_LO_OP_WRITE_REG_VALUE */ CmdBuffer1[2] = ValueToSet[0]; /* Set WriteRegValue */ rtw_hal_fill_h2c_cmd(padapter, 0x67, 4, &(CmdBuffer1[0])); rtw_msleep_os(200); ReqNum++; CmdBuffer2[0] |= (OperVer & 0x0f); /* Set OperVer */ CmdBuffer2[0] |= ((ReqNum << 4) & 0xf0); /* Set ReqNum */ CmdBuffer2[1] = 0x0c; /* Set OpCode of BT_LO_OP_WRITE_REG_ADDR */ CmdBuffer2[3] = AddrToSet[0]; /* Set WriteRegAddr */ rtw_hal_fill_h2c_cmd(padapter, 0x67, 4, &(CmdBuffer2[0])); } } u32 halbtcoutsrc_GetBtReg(void *pBtcContext, u8 RegType, u32 RegAddr) { /* To be implemented. Always return 0 temporarily */ return 0; } void halbtcoutsrc_FillH2cCmd(void *pBtcContext, u8 elementId, u32 cmdLen, u8 *pCmdBuffer) { PBTC_COEXIST pBtCoexist; PADAPTER padapter; pBtCoexist = (PBTC_COEXIST)pBtcContext; padapter = pBtCoexist->Adapter; rtw_hal_fill_h2c_cmd(padapter, elementId, cmdLen, pCmdBuffer); } //==================================== // Extern functions called by other module //==================================== u8 EXhalbtcoutsrc_BindBtCoexWithAdapter(void *padapter) { PBTC_COEXIST pBtCoexist=&GLBtCoexist; u1Byte antNum=2, chipType; if(pBtCoexist->bBinded) return _FALSE; else pBtCoexist->bBinded = _TRUE; pBtCoexist->statistics.cntBind++; pBtCoexist->Adapter = padapter; pBtCoexist->stackInfo.bProfileNotified = _FALSE; pBtCoexist->btInfo.bBtCtrlAggBufSize = _FALSE; pBtCoexist->btInfo.aggBufSize = 5; pBtCoexist->btInfo.bIncreaseScanDevNum = _FALSE; pBtCoexist->btInfo.bMiracastPlusBt = _FALSE; #if 0 chipType = HALBT_GetBtChipType(Adapter); EXhalbtcoutsrc_SetChipType(chipType); antNum = HALBT_GetPgAntNum(Adapter); EXhalbtcoutsrc_SetAntNum(BT_COEX_ANT_TYPE_PG, antNum); #endif // set default antenna position to main port pBtCoexist->boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; return _TRUE; } u8 EXhalbtcoutsrc_InitlizeVariables(void *padapter) { PBTC_COEXIST pBtCoexist = &GLBtCoexist; //pBtCoexist->statistics.cntBind++; halbtcoutsrc_DbgInit(); #ifdef CONFIG_PCI_HCI pBtCoexist->chipInterface = BTC_INTF_PCI; #elif defined(CONFIG_USB_HCI) pBtCoexist->chipInterface = BTC_INTF_USB; #elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) pBtCoexist->chipInterface = BTC_INTF_SDIO; #else pBtCoexist->chipInterface = BTC_INTF_UNKNOWN; #endif EXhalbtcoutsrc_BindBtCoexWithAdapter(padapter); pBtCoexist->fBtcRead1Byte = halbtcoutsrc_Read1Byte; pBtCoexist->fBtcWrite1Byte = halbtcoutsrc_Write1Byte; pBtCoexist->fBtcWrite1ByteBitMask = halbtcoutsrc_BitMaskWrite1Byte; pBtCoexist->fBtcRead2Byte = halbtcoutsrc_Read2Byte; pBtCoexist->fBtcWrite2Byte = halbtcoutsrc_Write2Byte; pBtCoexist->fBtcRead4Byte = halbtcoutsrc_Read4Byte; pBtCoexist->fBtcWrite4Byte = halbtcoutsrc_Write4Byte; pBtCoexist->fBtcWriteLocalReg1Byte = halbtcoutsrc_WriteLocalReg1Byte; pBtCoexist->fBtcSetBbReg = halbtcoutsrc_SetBbReg; pBtCoexist->fBtcGetBbReg = halbtcoutsrc_GetBbReg; pBtCoexist->fBtcSetRfReg = halbtcoutsrc_SetRfReg; pBtCoexist->fBtcGetRfReg = halbtcoutsrc_GetRfReg; pBtCoexist->fBtcFillH2c = halbtcoutsrc_FillH2cCmd; pBtCoexist->fBtcDispDbgMsg = halbtcoutsrc_DisplayDbgMsg; pBtCoexist->fBtcGet = halbtcoutsrc_Get; pBtCoexist->fBtcSet = halbtcoutsrc_Set; pBtCoexist->fBtcGetBtReg = halbtcoutsrc_GetBtReg; pBtCoexist->fBtcSetBtReg = halbtcoutsrc_SetBtReg; pBtCoexist->cliBuf = &GLBtcDbgBuf[0]; pBtCoexist->boardInfo.singleAntPath = 0; GLBtcWiFiInScanState = _FALSE; GLBtcWiFiInIQKState = _FALSE; GLBtcWiFiInIPS = _FALSE; GLBtcWiFiInLPS = _FALSE; return _TRUE; } void EXhalbtcoutsrc_PowerOnSetting(PBTC_COEXIST pBtCoexist) { if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; /* Power on setting function is only added in 8723B currently */ if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723b2ant_PowerOnSetting(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8723b1ant_PowerOnSetting(pBtCoexist); } } void EXhalbtcoutsrc_PreLoadFirmware(PBTC_COEXIST pBtCoexist) { if(!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->statistics.cntPreLoadFirmware++; if(IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { if(pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723b2ant_PreLoadFirmware(pBtCoexist); else if(pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8723b1ant_PreLoadFirmware(pBtCoexist); } } void EXhalbtcoutsrc_InitHwConfig(PBTC_COEXIST pBtCoexist, u8 bWifiOnly) { if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->statistics.cntInitHwConfig++; if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) EXhalbtc8821aCsr2ant_InitHwConfig(pBtCoexist, bWifiOnly); else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_InitHwConfig(pBtCoexist, bWifiOnly); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_InitHwConfig(pBtCoexist, bWifiOnly); } else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723b2ant_InitHwConfig(pBtCoexist, bWifiOnly); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8723b1ant_InitHwConfig(pBtCoexist, bWifiOnly); } else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723a2ant_InitHwConfig(pBtCoexist, bWifiOnly); } else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8188c2ant_InitHwConfig(pBtCoexist, bWifiOnly); } else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192d2ant_InitHwConfig(pBtCoexist, bWifiOnly); } else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192e2ant_InitHwConfig(pBtCoexist, bWifiOnly); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8192e1ant_InitHwConfig(pBtCoexist, bWifiOnly); } else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8812a2ant_InitHwConfig(pBtCoexist, bWifiOnly); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8812a1ant_InitHwConfig(pBtCoexist, bWifiOnly); } } void EXhalbtcoutsrc_InitCoexDm(PBTC_COEXIST pBtCoexist) { if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->statistics.cntInitCoexDm++; if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) EXhalbtc8821aCsr2ant_InitCoexDm(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_InitCoexDm(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_InitCoexDm(pBtCoexist); } else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723b2ant_InitCoexDm(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8723b1ant_InitCoexDm(pBtCoexist); } else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723a2ant_InitCoexDm(pBtCoexist); } else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8188c2ant_InitCoexDm(pBtCoexist); } else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192d2ant_InitCoexDm(pBtCoexist); } else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192e2ant_InitCoexDm(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8192e1ant_InitCoexDm(pBtCoexist); } else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8812a2ant_InitCoexDm(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8812a1ant_InitCoexDm(pBtCoexist); } pBtCoexist->bInitilized = _TRUE; } void EXhalbtcoutsrc_IpsNotify(PBTC_COEXIST pBtCoexist, u8 type) { u8 ipsType; if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->statistics.cntIpsNotify++; if (pBtCoexist->bManualControl) return; if (IPS_NONE == type) { ipsType = BTC_IPS_LEAVE; GLBtcWiFiInIPS = _FALSE; } else { ipsType = BTC_IPS_ENTER; GLBtcWiFiInIPS = _TRUE; } // All notify is called in cmd thread, don't need to leave low power again // halbtcoutsrc_LeaveLowPower(pBtCoexist); if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) EXhalbtc8821aCsr2ant_IpsNotify(pBtCoexist, ipsType); else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_IpsNotify(pBtCoexist, ipsType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_IpsNotify(pBtCoexist, ipsType); } else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723b2ant_IpsNotify(pBtCoexist, ipsType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8723b1ant_IpsNotify(pBtCoexist, ipsType); } else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723a2ant_IpsNotify(pBtCoexist, ipsType); } else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8188c2ant_IpsNotify(pBtCoexist, ipsType); } else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192d2ant_IpsNotify(pBtCoexist, ipsType); } else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192e2ant_IpsNotify(pBtCoexist, ipsType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8192e1ant_IpsNotify(pBtCoexist, ipsType); } else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8812a2ant_IpsNotify(pBtCoexist, ipsType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8812a1ant_IpsNotify(pBtCoexist, ipsType); } // halbtcoutsrc_NormalLowPower(pBtCoexist); } void EXhalbtcoutsrc_LpsNotify(PBTC_COEXIST pBtCoexist, u8 type) { u8 lpsType; if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->statistics.cntLpsNotify++; if (pBtCoexist->bManualControl) return; if (PS_MODE_ACTIVE == type) { lpsType = BTC_LPS_DISABLE; GLBtcWiFiInLPS = _FALSE; } else { lpsType = BTC_LPS_ENABLE; GLBtcWiFiInLPS = _TRUE; } if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) EXhalbtc8821aCsr2ant_LpsNotify(pBtCoexist, lpsType); else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_LpsNotify(pBtCoexist, lpsType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_LpsNotify(pBtCoexist, lpsType); } else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723b2ant_LpsNotify(pBtCoexist, lpsType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8723b1ant_LpsNotify(pBtCoexist, lpsType); } else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723a2ant_LpsNotify(pBtCoexist, lpsType); } else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8188c2ant_LpsNotify(pBtCoexist, lpsType); } else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192d2ant_LpsNotify(pBtCoexist, lpsType); } else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192e2ant_LpsNotify(pBtCoexist, lpsType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8192e1ant_LpsNotify(pBtCoexist, lpsType); } else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8812a2ant_LpsNotify(pBtCoexist, lpsType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8812a1ant_LpsNotify(pBtCoexist, lpsType); } } void EXhalbtcoutsrc_ScanNotify(PBTC_COEXIST pBtCoexist, u8 type) { u8 scanType; if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->statistics.cntScanNotify++; if (pBtCoexist->bManualControl) return; if (type) { scanType = BTC_SCAN_START; GLBtcWiFiInScanState = _TRUE; } else { scanType = BTC_SCAN_FINISH; GLBtcWiFiInScanState = _FALSE; } // All notify is called in cmd thread, don't need to leave low power again // halbtcoutsrc_LeaveLowPower(pBtCoexist); if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) EXhalbtc8821aCsr2ant_ScanNotify(pBtCoexist, scanType); else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_ScanNotify(pBtCoexist, scanType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_ScanNotify(pBtCoexist, scanType); } else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723b2ant_ScanNotify(pBtCoexist, scanType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8723b1ant_ScanNotify(pBtCoexist, scanType); } else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723a2ant_ScanNotify(pBtCoexist, scanType); } else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8188c2ant_ScanNotify(pBtCoexist, scanType); } else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192d2ant_ScanNotify(pBtCoexist, scanType); } else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192e2ant_ScanNotify(pBtCoexist, scanType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8192e1ant_ScanNotify(pBtCoexist, scanType); } else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8812a2ant_ScanNotify(pBtCoexist, scanType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8812a1ant_ScanNotify(pBtCoexist, scanType); } // halbtcoutsrc_NormalLowPower(pBtCoexist); } void EXhalbtcoutsrc_ConnectNotify(PBTC_COEXIST pBtCoexist, u8 action) { u8 assoType; if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->statistics.cntConnectNotify++; if (pBtCoexist->bManualControl) return; if (action) assoType = BTC_ASSOCIATE_START; else assoType = BTC_ASSOCIATE_FINISH; // All notify is called in cmd thread, don't need to leave low power again // halbtcoutsrc_LeaveLowPower(pBtCoexist); if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) EXhalbtc8821aCsr2ant_ConnectNotify(pBtCoexist, assoType); else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_ConnectNotify(pBtCoexist, assoType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_ConnectNotify(pBtCoexist, assoType); } else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723b2ant_ConnectNotify(pBtCoexist, assoType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8723b1ant_ConnectNotify(pBtCoexist, assoType); } else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723a2ant_ConnectNotify(pBtCoexist, assoType); } else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8188c2ant_ConnectNotify(pBtCoexist, assoType); } else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192d2ant_ConnectNotify(pBtCoexist, assoType); } else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192e2ant_ConnectNotify(pBtCoexist, assoType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8192e1ant_ConnectNotify(pBtCoexist, assoType); } else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8812a2ant_ConnectNotify(pBtCoexist, assoType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8812a1ant_ConnectNotify(pBtCoexist, assoType); } // halbtcoutsrc_NormalLowPower(pBtCoexist); } void EXhalbtcoutsrc_MediaStatusNotify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS mediaStatus) { u8 mStatus; if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->statistics.cntMediaStatusNotify++; if (pBtCoexist->bManualControl) return; if (RT_MEDIA_CONNECT == mediaStatus) mStatus = BTC_MEDIA_CONNECT; else mStatus = BTC_MEDIA_DISCONNECT; // All notify is called in cmd thread, don't need to leave low power again // halbtcoutsrc_LeaveLowPower(pBtCoexist); if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) EXhalbtc8821aCsr2ant_MediaStatusNotify(pBtCoexist, mStatus); else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_MediaStatusNotify(pBtCoexist, mStatus); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_MediaStatusNotify(pBtCoexist, mStatus); } else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, mStatus); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8723b1ant_MediaStatusNotify(pBtCoexist, mStatus); } else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723a2ant_MediaStatusNotify(pBtCoexist, mStatus); } else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8188c2ant_MediaStatusNotify(pBtCoexist, mStatus); } else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192d2ant_MediaStatusNotify(pBtCoexist, mStatus); } else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192e2ant_MediaStatusNotify(pBtCoexist, mStatus); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8192e1ant_MediaStatusNotify(pBtCoexist, mStatus); } else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8812a2ant_MediaStatusNotify(pBtCoexist, mStatus); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8812a1ant_MediaStatusNotify(pBtCoexist, mStatus); } // halbtcoutsrc_NormalLowPower(pBtCoexist); } void EXhalbtcoutsrc_SpecialPacketNotify(PBTC_COEXIST pBtCoexist, u8 pktType) { u8 packetType; if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->statistics.cntSpecialPacketNotify++; if (pBtCoexist->bManualControl) return; if (PACKET_DHCP == pktType) packetType = BTC_PACKET_DHCP; else if (PACKET_EAPOL == pktType) packetType = BTC_PACKET_EAPOL; else if (PACKET_ARP == pktType) packetType = BTC_PACKET_ARP; else { packetType = BTC_PACKET_UNKNOWN; return; } // All notify is called in cmd thread, don't need to leave low power again // halbtcoutsrc_LeaveLowPower(pBtCoexist); if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) EXhalbtc8821aCsr2ant_SpecialPacketNotify(pBtCoexist, packetType); else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_SpecialPacketNotify(pBtCoexist, packetType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_SpecialPacketNotify(pBtCoexist, packetType); } else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723b2ant_SpecialPacketNotify(pBtCoexist, packetType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8723b1ant_SpecialPacketNotify(pBtCoexist, packetType); } else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723a2ant_SpecialPacketNotify(pBtCoexist, packetType); } else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8188c2ant_SpecialPacketNotify(pBtCoexist, packetType); } else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192d2ant_SpecialPacketNotify(pBtCoexist, packetType); } else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192e2ant_SpecialPacketNotify(pBtCoexist, packetType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8192e1ant_SpecialPacketNotify(pBtCoexist, packetType); } else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8812a2ant_SpecialPacketNotify(pBtCoexist, packetType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8812a1ant_SpecialPacketNotify(pBtCoexist, packetType); } // halbtcoutsrc_NormalLowPower(pBtCoexist); } void EXhalbtcoutsrc_BtInfoNotify(PBTC_COEXIST pBtCoexist, u8 *tmpBuf, u8 length) { if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->statistics.cntBtInfoNotify++; // All notify is called in cmd thread, don't need to leave low power again // halbtcoutsrc_LeaveLowPower(pBtCoexist); if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) EXhalbtc8821aCsr2ant_BtInfoNotify(pBtCoexist, tmpBuf, length); else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_BtInfoNotify(pBtCoexist, tmpBuf, length); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_BtInfoNotify(pBtCoexist, tmpBuf, length); } else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723b2ant_BtInfoNotify(pBtCoexist, tmpBuf, length); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8723b1ant_BtInfoNotify(pBtCoexist, tmpBuf, length); } else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723a2ant_BtInfoNotify(pBtCoexist, tmpBuf, length); } else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8188c2ant_BtInfoNotify(pBtCoexist, tmpBuf, length); } else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192d2ant_BtInfoNotify(pBtCoexist, tmpBuf, length); } else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192e2ant_BtInfoNotify(pBtCoexist, tmpBuf, length); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8192e1ant_BtInfoNotify(pBtCoexist, tmpBuf, length); } else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8812a2ant_BtInfoNotify(pBtCoexist, tmpBuf, length); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8812a1ant_BtInfoNotify(pBtCoexist, tmpBuf, length); } // halbtcoutsrc_NormalLowPower(pBtCoexist); } VOID EXhalbtcoutsrc_RfStatusNotify( IN PBTC_COEXIST pBtCoexist, IN u1Byte type ) { if(!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->statistics.cntRfStatusNotify++; if(IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { } else if(IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { if(pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8723b1ant_RfStatusNotify(pBtCoexist, type); } else if(IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { } else if(IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { } } void EXhalbtcoutsrc_StackOperationNotify(PBTC_COEXIST pBtCoexist, u8 type) { #if 0 u8 stackOpType; if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->statistics.cntStackOperationNotify++; if (pBtCoexist->bManualControl) return; if ((HCI_BT_OP_INQUIRY_START == type) || (HCI_BT_OP_PAGING_START == type) || (HCI_BT_OP_PAIRING_START == type)) { stackOpType = BTC_STACK_OP_INQ_PAGE_PAIR_START; } else if ((HCI_BT_OP_INQUIRY_FINISH == type) || (HCI_BT_OP_PAGING_SUCCESS == type) || (HCI_BT_OP_PAGING_UNSUCCESS == type) || (HCI_BT_OP_PAIRING_FINISH == type) ) { stackOpType = BTC_STACK_OP_INQ_PAGE_PAIR_FINISH; } else { stackOpType = BTC_STACK_OP_NONE; } if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723a2ant_StackOperationNotify(pBtCoexist, stackOpType); } #endif } void EXhalbtcoutsrc_HaltNotify(PBTC_COEXIST pBtCoexist) { if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) EXhalbtc8821aCsr2ant_HaltNotify(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_HaltNotify(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_HaltNotify(pBtCoexist); } else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723b2ant_HaltNotify(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8723b1ant_HaltNotify(pBtCoexist); } else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723a2ant_HaltNotify(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8723a1ant_HaltNotify(pBtCoexist); } else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8188c2ant_HaltNotify(pBtCoexist); } else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192d2ant_HaltNotify(pBtCoexist); } else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192e2ant_HaltNotify(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8192e1ant_HaltNotify(pBtCoexist); } else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8812a2ant_HaltNotify(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8812a1ant_HaltNotify(pBtCoexist); } pBtCoexist->bBinded = FALSE; } void EXhalbtcoutsrc_SwitchBtTRxMask(PBTC_COEXIST pBtCoexist) { if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) { halbtcoutsrc_SetBtReg(pBtCoexist, 0, 0x3c, 0x01); //BT goto standby while GNT_BT 1-->0 } else if (pBtCoexist->boardInfo.btdmAntNum == 1) { halbtcoutsrc_SetBtReg(pBtCoexist, 0, 0x3c, 0x15); //BT goto standby while GNT_BT 1-->0 } } } void EXhalbtcoutsrc_PnpNotify(PBTC_COEXIST pBtCoexist, u8 pnpState) { if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; // // currently only 1ant we have to do the notification, // once pnp is notified to sleep state, we have to leave LPS that we can sleep normally. // if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8723b1ant_PnpNotify(pBtCoexist,pnpState); else if(pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723b2ant_PnpNotify(pBtCoexist,pnpState); } else if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) EXhalbtc8821aCsr2ant_PnpNotify(pBtCoexist, pnpState); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_PnpNotify(pBtCoexist,pnpState); else if(pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_PnpNotify(pBtCoexist,pnpState); } else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8192e1ant_PnpNotify(pBtCoexist, pnpState); } else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8812a1ant_PnpNotify(pBtCoexist, pnpState); } } void EXhalbtcoutsrc_CoexDmSwitch(PBTC_COEXIST pBtCoexist) { if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->statistics.cntCoexDmSwitch++; halbtcoutsrc_LeaveLowPower(pBtCoexist); if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 1) { pBtCoexist->bStopCoexDm = TRUE; EXhalbtc8723b1ant_CoexDmReset(pBtCoexist); EXhalbtcoutsrc_SetAntNum(BT_COEX_ANT_TYPE_DETECTED, 2); EXhalbtc8723b2ant_InitHwConfig(pBtCoexist, FALSE); EXhalbtc8723b2ant_InitCoexDm(pBtCoexist); pBtCoexist->bStopCoexDm = FALSE; } } halbtcoutsrc_NormalLowPower(pBtCoexist); } void EXhalbtcoutsrc_Periodical(PBTC_COEXIST pBtCoexist) { if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->statistics.cntPeriodical++; // Periodical should be called in cmd thread, // don't need to leave low power again // halbtcoutsrc_LeaveLowPower(pBtCoexist); if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) EXhalbtc8821aCsr2ant_Periodical(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_Periodical(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) { if (!halbtcoutsrc_UnderIps(pBtCoexist)) { EXhalbtc8821a1ant_Periodical(pBtCoexist); } } } else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723b2ant_Periodical(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8723b1ant_Periodical(pBtCoexist); } else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723a2ant_Periodical(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) { if (!halbtcoutsrc_UnderIps(pBtCoexist)) EXhalbtc8723a1ant_Periodical(pBtCoexist); } } else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8188c2ant_Periodical(pBtCoexist); } else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192d2ant_Periodical(pBtCoexist); } else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192e2ant_Periodical(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8192e1ant_Periodical(pBtCoexist); } else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8812a2ant_Periodical(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8812a1ant_Periodical(pBtCoexist); } // halbtcoutsrc_NormalLowPower(pBtCoexist); } void EXhalbtcoutsrc_DbgControl(PBTC_COEXIST pBtCoexist, u8 opCode, u8 opLen, u8 *pData) { if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->statistics.cntDbgCtrl++; // This function doesn't be called yet, // default no need to leave low power to avoid deadlock // halbtcoutsrc_LeaveLowPower(pBtCoexist); if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8192e1ant_DbgControl(pBtCoexist, opCode, opLen, pData); } else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8812a2ant_DbgControl(pBtCoexist, opCode, opLen, pData); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8812a1ant_DbgControl(pBtCoexist, opCode, opLen, pData); } // halbtcoutsrc_NormalLowPower(pBtCoexist); } void EXhalbtcoutsrc_StackUpdateProfileInfo(void) { #if 0 PBTC_COEXIST pBtCoexist = &GLBtCoexist; PADAPTER padapter = (PADAPTER)GLBtCoexist.padapter; PBT_MGNT pBtMgnt = &padapter->MgntInfo.BtInfo.BtMgnt; u8 i; if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->stackInfo.bProfileNotified = _TRUE; pBtCoexist->stackInfo.numOfLink = pBtMgnt->ExtConfig.NumberOfACL+pBtMgnt->ExtConfig.NumberOfSCO; // reset first pBtCoexist->stackInfo.bBtLinkExist = _FALSE; pBtCoexist->stackInfo.bScoExist = _FALSE; pBtCoexist->stackInfo.bAclExist = _FALSE; pBtCoexist->stackInfo.bA2dpExist = _FALSE; pBtCoexist->stackInfo.bHidExist = _FALSE; pBtCoexist->stackInfo.numOfHid = 0; pBtCoexist->stackInfo.bPanExist = _FALSE; if (!pBtMgnt->ExtConfig.NumberOfACL) pBtCoexist->stackInfo.minBtRssi = 0; if (pBtCoexist->stackInfo.numOfLink) { pBtCoexist->stackInfo.bBtLinkExist = _TRUE; if (pBtMgnt->ExtConfig.NumberOfSCO) pBtCoexist->stackInfo.bScoExist = _TRUE; if (pBtMgnt->ExtConfig.NumberOfACL) pBtCoexist->stackInfo.bAclExist = _TRUE; } for (i=0; iExtConfig.NumberOfACL; i++) { if (BT_PROFILE_A2DP == pBtMgnt->ExtConfig.aclLink[i].BTProfile) { pBtCoexist->stackInfo.bA2dpExist = _TRUE; } else if (BT_PROFILE_PAN == pBtMgnt->ExtConfig.aclLink[i].BTProfile) { pBtCoexist->stackInfo.bPanExist = _TRUE; } else if (BT_PROFILE_HID == pBtMgnt->ExtConfig.aclLink[i].BTProfile) { pBtCoexist->stackInfo.bHidExist = _TRUE; pBtCoexist->stackInfo.numOfHid++; } else { pBtCoexist->stackInfo.bUnknownAclExist = _TRUE; } } #endif } void EXhalbtcoutsrc_UpdateMinBtRssi(s8 btRssi) { PBTC_COEXIST pBtCoexist = &GLBtCoexist; if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->stackInfo.minBtRssi = btRssi; } void EXhalbtcoutsrc_SetHciVersion(u16 hciVersion) { PBTC_COEXIST pBtCoexist = &GLBtCoexist; if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->stackInfo.hciVersion = hciVersion; } void EXhalbtcoutsrc_SetBtPatchVersion(u16 btHciVersion, u16 btPatchVersion) { PBTC_COEXIST pBtCoexist = &GLBtCoexist; if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; pBtCoexist->btInfo.btRealFwVer = btPatchVersion; pBtCoexist->btInfo.btHciVer = btHciVersion; } #if 0 void EXhalbtcoutsrc_SetBtExist(u8 bBtExist) { GLBtCoexist.boardInfo.bBtExist = bBtExist; } #endif void EXhalbtcoutsrc_SetChipType(u8 chipType) { switch(chipType) { default: case BT_2WIRE: case BT_ISSC_3WIRE: case BT_ACCEL: case BT_RTL8756: GLBtCoexist.boardInfo.btChipType = BTC_CHIP_UNDEF; break; case BT_CSR_BC4: GLBtCoexist.boardInfo.btChipType = BTC_CHIP_CSR_BC4; break; case BT_CSR_BC8: GLBtCoexist.boardInfo.btChipType = BTC_CHIP_CSR_BC8; break; case BT_RTL8723A: GLBtCoexist.boardInfo.btChipType = BTC_CHIP_RTL8723A; break; case BT_RTL8821: GLBtCoexist.boardInfo.btChipType = BTC_CHIP_RTL8821; break; case BT_RTL8723B: GLBtCoexist.boardInfo.btChipType = BTC_CHIP_RTL8723B; break; } } void EXhalbtcoutsrc_SetAntNum(u8 type, u8 antNum) { if (BT_COEX_ANT_TYPE_PG == type) { GLBtCoexist.boardInfo.pgAntNum = antNum; GLBtCoexist.boardInfo.btdmAntNum = antNum; #if 0 //The antenna position: Main (default) or Aux for pgAntNum=2 && btdmAntNum =1 //The antenna position should be determined by auto-detect mechanism // The following is assumed to main, and those must be modified if y auto-detect mechanism is ready if ((GLBtCoexist.boardInfo.pgAntNum == 2) && (GLBtCoexist.boardInfo.btdmAntNum == 1) ) GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; else GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; #endif } else if (BT_COEX_ANT_TYPE_ANTDIV == type) { GLBtCoexist.boardInfo.btdmAntNum = antNum; //GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; } else if (BT_COEX_ANT_TYPE_DETECTED == type) { GLBtCoexist.boardInfo.btdmAntNum = antNum; //GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; } } // // Currently used by 8723b only, S0 or S1 // void EXhalbtcoutsrc_SetSingleAntPath(u8 singleAntPath) { GLBtCoexist.boardInfo.singleAntPath = singleAntPath; } void EXhalbtcoutsrc_DisplayBtCoexInfo(PBTC_COEXIST pBtCoexist) { if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; halbtcoutsrc_LeaveLowPower(pBtCoexist); if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) EXhalbtc8821aCsr2ant_DisplayCoexInfo(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_DisplayCoexInfo(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_DisplayCoexInfo(pBtCoexist); } else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723b2ant_DisplayCoexInfo(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8723b1ant_DisplayCoexInfo(pBtCoexist); } else if (IS_HARDWARE_TYPE_8723A(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8723a2ant_DisplayCoexInfo(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8723a1ant_DisplayCoexInfo(pBtCoexist); } else if (IS_HARDWARE_TYPE_8192C(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8188c2ant_DisplayCoexInfo(pBtCoexist); } else if (IS_HARDWARE_TYPE_8192D(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192d2ant_DisplayCoexInfo(pBtCoexist); } else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8192e2ant_DisplayCoexInfo(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8192e1ant_DisplayCoexInfo(pBtCoexist); } else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8812a2ant_DisplayCoexInfo(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8812a1ant_DisplayCoexInfo(pBtCoexist); } halbtcoutsrc_NormalLowPower(pBtCoexist); } static void halbt_InitHwConfig92C(PADAPTER padapter) { PHAL_DATA_TYPE pHalData; u8 u1Tmp; pHalData = GET_HAL_DATA(padapter); if( (pHalData->bt_coexist.btChipType == BT_CSR_BC4) || (pHalData->bt_coexist.btChipType == BT_CSR_BC8)) { if (pHalData->rf_type == RF_1T1R) { // Config to 1T1R u1Tmp = rtw_read8(padapter, rOFDM0_TRxPathEnable); u1Tmp &= ~BIT(1); rtw_write8(padapter, rOFDM0_TRxPathEnable, u1Tmp); RT_DISP(FBT, BT_TRACE, ("[BTCoex], BT write 0xC04 = 0x%x\n", u1Tmp)); u1Tmp = rtw_read8(padapter, rOFDM1_TRxPathEnable); u1Tmp &= ~BIT(1); rtw_write8(padapter, rOFDM1_TRxPathEnable, u1Tmp); RT_DISP(FBT, BT_TRACE, ("[BTCoex], BT write 0xD04 = 0x%x\n", u1Tmp)); } } } static void halbt_InitHwConfig92D(PADAPTER padapter) { PHAL_DATA_TYPE pHalData; u8 u1Tmp; pHalData = GET_HAL_DATA(padapter); if ((pHalData->bt_coexist.btChipType == BT_CSR_BC4) || (pHalData->bt_coexist.btChipType == BT_CSR_BC8)) { if (pHalData->rf_type == RF_1T1R) { // Config to 1T1R u1Tmp = rtw_read8(padapter, rOFDM0_TRxPathEnable); u1Tmp &= ~BIT(1); rtw_write8(padapter, rOFDM0_TRxPathEnable, u1Tmp); RT_DISP(FBT, BT_TRACE, ("[BTCoex], BT write 0xC04 = 0x%x\n", u1Tmp)); u1Tmp = rtw_read8(padapter, rOFDM1_TRxPathEnable); u1Tmp &= ~BIT(1); rtw_write8(padapter, rOFDM1_TRxPathEnable, u1Tmp); RT_DISP(FBT, BT_TRACE, ("[BTCoex], BT write 0xD04 = 0x%x\n", u1Tmp)); } } } /* * Description: * Run BT-Coexist mechansim or not * */ void hal_btcoex_SetBTCoexist(PADAPTER padapter, u8 bBtExist) { PHAL_DATA_TYPE pHalData; pHalData = GET_HAL_DATA(padapter); pHalData->bt_coexist.bBtExist = bBtExist; //EXhalbtcoutsrc_SetBtExist(bBtExist); } /* * Dewcription: * Check is co-exist mechanism enabled or not * * Return: * _TRUE Enable BT co-exist mechanism * _FALSE Disable BT co-exist mechanism */ u8 hal_btcoex_IsBtExist(PADAPTER padapter) { PHAL_DATA_TYPE pHalData; pHalData = GET_HAL_DATA(padapter); return pHalData->bt_coexist.bBtExist; } u8 hal_btcoex_IsBtDisabled(PADAPTER padapter) { if (!hal_btcoex_IsBtExist(padapter)) return _TRUE; if (GLBtCoexist.btInfo.bBtDisabled) return _TRUE; else return _FALSE; } void hal_btcoex_SetChipType(PADAPTER padapter, u8 chipType) { PHAL_DATA_TYPE pHalData; pHalData = GET_HAL_DATA(padapter); pHalData->bt_coexist.btChipType = chipType; EXhalbtcoutsrc_SetChipType(chipType); } u8 hal_btcoex_GetChipType(PADAPTER padapter) { PHAL_DATA_TYPE pHalData; pHalData = GET_HAL_DATA(padapter); return pHalData->bt_coexist.btChipType; } void hal_btcoex_SetPgAntNum(PADAPTER padapter, u8 antNum) { PHAL_DATA_TYPE pHalData; pHalData = GET_HAL_DATA(padapter); pHalData->bt_coexist.btTotalAntNum = antNum; EXhalbtcoutsrc_SetAntNum(BT_COEX_ANT_TYPE_PG, antNum); } u8 hal_btcoex_GetPgAntNum(PADAPTER padapter) { PHAL_DATA_TYPE pHalData; pHalData = GET_HAL_DATA(padapter); return pHalData->bt_coexist.btTotalAntNum; } void hal_btcoex_SetSingleAntPath(PADAPTER padapter, u8 singleAntPath) { EXhalbtcoutsrc_SetSingleAntPath(singleAntPath); } u8 hal_btcoex_Initialize(PADAPTER padapter) { u8 ret1; u8 ret2; _rtw_memset(&GLBtCoexist, 0, sizeof(GLBtCoexist)); ret1 = EXhalbtcoutsrc_InitlizeVariables((void*)padapter); ret2 = (ret1==_TRUE) ? _TRUE : _FALSE; return ret2; } void hal_btcoex_PowerOnSetting(PADAPTER padapter) { EXhalbtcoutsrc_PowerOnSetting(&GLBtCoexist); } void hal_btcoex_PreLoadFirmware(PADAPTER padapter) { EXhalbtcoutsrc_PreLoadFirmware(&GLBtCoexist); } void hal_btcoex_InitHwConfig(PADAPTER padapter, u8 bWifiOnly) { if (!hal_btcoex_IsBtExist(padapter)) return; if (IS_HARDWARE_TYPE_8192C(padapter)) { halbt_InitHwConfig92C(padapter); } else if(IS_HARDWARE_TYPE_8192D(padapter)) { halbt_InitHwConfig92D(padapter); } EXhalbtcoutsrc_InitHwConfig(&GLBtCoexist, bWifiOnly); EXhalbtcoutsrc_InitCoexDm(&GLBtCoexist); } void hal_btcoex_IpsNotify(PADAPTER padapter, u8 type) { EXhalbtcoutsrc_IpsNotify(&GLBtCoexist, type); } void hal_btcoex_LpsNotify(PADAPTER padapter, u8 type) { EXhalbtcoutsrc_LpsNotify(&GLBtCoexist, type); } void hal_btcoex_ScanNotify(PADAPTER padapter, u8 type) { EXhalbtcoutsrc_ScanNotify(&GLBtCoexist, type); } void hal_btcoex_ConnectNotify(PADAPTER padapter, u8 action) { EXhalbtcoutsrc_ConnectNotify(&GLBtCoexist, action); } void hal_btcoex_MediaStatusNotify(PADAPTER padapter, u8 mediaStatus) { EXhalbtcoutsrc_MediaStatusNotify(&GLBtCoexist, mediaStatus); } void hal_btcoex_SpecialPacketNotify(PADAPTER padapter, u8 pktType) { EXhalbtcoutsrc_SpecialPacketNotify(&GLBtCoexist, pktType); } void hal_btcoex_IQKNotify(PADAPTER padapter, u8 state) { GLBtcWiFiInIQKState = state; } void hal_btcoex_BtInfoNotify(PADAPTER padapter, u8 length, u8 *tmpBuf) { if (GLBtcWiFiInIQKState == _TRUE) return; EXhalbtcoutsrc_BtInfoNotify(&GLBtCoexist, tmpBuf, length); } void hal_btcoex_SuspendNotify(PADAPTER padapter, u8 state) { if (state == 1) state = BTC_WIFI_PNP_SLEEP; else state = BTC_WIFI_PNP_WAKE_UP; EXhalbtcoutsrc_PnpNotify(&GLBtCoexist, state); } void hal_btcoex_HaltNotify(PADAPTER padapter) { EXhalbtcoutsrc_HaltNotify(&GLBtCoexist); } void hal_btcoex_SwitchBtTRxMask(PADAPTER padapter) { EXhalbtcoutsrc_SwitchBtTRxMask(&GLBtCoexist); } void hal_btcoex_Hanlder(PADAPTER padapter) { EXhalbtcoutsrc_Periodical(&GLBtCoexist); } s32 hal_btcoex_IsBTCoexCtrlAMPDUSize(PADAPTER padapter) { return (s32)GLBtCoexist.btInfo.bBtCtrlAggBufSize; } u32 hal_btcoex_GetAMPDUSize(PADAPTER padapter) { return (u32)GLBtCoexist.btInfo.aggBufSize; } void hal_btcoex_SetManualControl(PADAPTER padapter, u8 bmanual) { GLBtCoexist.bManualControl = bmanual; } u8 hal_btcoex_1Ant(PADAPTER padapter) { if (hal_btcoex_IsBtExist(padapter) == _FALSE) return _FALSE; if (GLBtCoexist.boardInfo.btdmAntNum == 1) return _TRUE; return _FALSE; } u8 hal_btcoex_IsBtControlLps(PADAPTER padapter) { if (hal_btcoex_IsBtExist(padapter) == _FALSE) return _FALSE; if (GLBtCoexist.btInfo.bBtDisabled) return _FALSE; if (GLBtCoexist.btInfo.bBtCtrlLps) return _TRUE; return _FALSE; } u8 hal_btcoex_IsLpsOn(PADAPTER padapter) { if (hal_btcoex_IsBtExist(padapter) == _FALSE) return _FALSE; if (GLBtCoexist.btInfo.bBtDisabled) return _FALSE; if (GLBtCoexist.btInfo.bBtLpsOn) return _TRUE; return _FALSE; } u8 hal_btcoex_RpwmVal(PADAPTER padapter) { return GLBtCoexist.btInfo.rpwmVal; } u8 hal_btcoex_LpsVal(PADAPTER padapter) { return GLBtCoexist.btInfo.lpsVal; } u32 hal_btcoex_GetRaMask(PADAPTER padapter) { if (!hal_btcoex_IsBtExist(padapter)) return 0; if (GLBtCoexist.btInfo.bBtDisabled) return 0; // Modify by YiWei , suggest by Cosa and Jenyu // Remove the limit antenna number , because 2 antenna case (ex: 8192eu)also want to get BT coex report rate mask. //if (GLBtCoexist.boardInfo.btdmAntNum != 1) // return 0; return GLBtCoexist.btInfo.raMask; } void hal_btcoex_RecordPwrMode(PADAPTER padapter, u8 *pCmdBuf, u8 cmdLen) { BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], FW write pwrModeCmd=0x%04x%08x\n", pCmdBuf[0]<<8|pCmdBuf[1], pCmdBuf[2]<<24|pCmdBuf[3]<<16|pCmdBuf[4]<<8|pCmdBuf[5])); _rtw_memcpy(GLBtCoexist.pwrModeVal, pCmdBuf, cmdLen); } void hal_btcoex_DisplayBtCoexInfo(PADAPTER padapter, u8 *pbuf, u32 bufsize) { PBTCDBGINFO pinfo; pinfo = &GLBtcDbgInfo; DBG_BT_INFO_INIT(pinfo, pbuf, bufsize); EXhalbtcoutsrc_DisplayBtCoexInfo(&GLBtCoexist); DBG_BT_INFO_INIT(pinfo, NULL, 0); } void hal_btcoex_SetDBG(PADAPTER padapter, u32 *pDbgModule) { u32 i; if (NULL == pDbgModule) return; for (i=0; i= leftSize)) goto exit; pstr += count; leftSize -= count; count = rtw_sprintf(pstr, leftSize, "BTCOEX Debug Setting:\n"); if ((count < 0) || (count >= leftSize)) goto exit; pstr += count; leftSize -= count; count = rtw_sprintf(pstr, leftSize, "INTERFACE / ALGORITHM: 0x%08X / 0x%08X\n\n", GLBtcDbgType[BTC_MSG_INTERFACE], GLBtcDbgType[BTC_MSG_ALGORITHM]); if ((count < 0) || (count >= leftSize)) goto exit; pstr += count; leftSize -= count; count = rtw_sprintf(pstr, leftSize, "INTERFACE Debug Setting Definition:\n"); if ((count < 0) || (count >= leftSize)) goto exit; pstr += count; leftSize -= count; count = rtw_sprintf(pstr, leftSize, "\tbit[0]=%d for INTF_INIT\n", GLBtcDbgType[BTC_MSG_INTERFACE]&INTF_INIT?1:0); if ((count < 0) || (count >= leftSize)) goto exit; pstr += count; leftSize -= count; count = rtw_sprintf(pstr, leftSize, "\tbit[2]=%d for INTF_NOTIFY\n\n", GLBtcDbgType[BTC_MSG_INTERFACE]&INTF_NOTIFY?1:0); if ((count < 0) || (count >= leftSize)) goto exit; pstr += count; leftSize -= count; count = rtw_sprintf(pstr, leftSize, "ALGORITHM Debug Setting Definition:\n"); if ((count < 0) || (count >= leftSize)) goto exit; pstr += count; leftSize -= count; count = rtw_sprintf(pstr, leftSize, "\tbit[0]=%d for BT_RSSI_STATE\n", GLBtcDbgType[BTC_MSG_ALGORITHM]&ALGO_BT_RSSI_STATE?1:0); if ((count < 0) || (count >= leftSize)) goto exit; pstr += count; leftSize -= count; count = rtw_sprintf(pstr, leftSize, "\tbit[1]=%d for WIFI_RSSI_STATE\n", GLBtcDbgType[BTC_MSG_ALGORITHM]&ALGO_WIFI_RSSI_STATE?1:0); if ((count < 0) || (count >= leftSize)) goto exit; pstr += count; leftSize -= count; count = rtw_sprintf(pstr, leftSize, "\tbit[2]=%d for BT_MONITOR\n", GLBtcDbgType[BTC_MSG_ALGORITHM]&ALGO_BT_MONITOR?1:0); if ((count < 0) || (count >= leftSize)) goto exit; pstr += count; leftSize -= count; count = rtw_sprintf(pstr, leftSize, "\tbit[3]=%d for TRACE\n", GLBtcDbgType[BTC_MSG_ALGORITHM]&ALGO_TRACE?1:0); if ((count < 0) || (count >= leftSize)) goto exit; pstr += count; leftSize -= count; count = rtw_sprintf(pstr, leftSize, "\tbit[4]=%d for TRACE_FW\n", GLBtcDbgType[BTC_MSG_ALGORITHM]&ALGO_TRACE_FW?1:0); if ((count < 0) || (count >= leftSize)) goto exit; pstr += count; leftSize -= count; count = rtw_sprintf(pstr, leftSize, "\tbit[5]=%d for TRACE_FW_DETAIL\n", GLBtcDbgType[BTC_MSG_ALGORITHM]&ALGO_TRACE_FW_DETAIL?1:0); if ((count < 0) || (count >= leftSize)) goto exit; pstr += count; leftSize -= count; count = rtw_sprintf(pstr, leftSize, "\tbit[6]=%d for TRACE_FW_EXEC\n", GLBtcDbgType[BTC_MSG_ALGORITHM]&ALGO_TRACE_FW_EXEC?1:0); if ((count < 0) || (count >= leftSize)) goto exit; pstr += count; leftSize -= count; count = rtw_sprintf(pstr, leftSize, "\tbit[7]=%d for TRACE_SW\n", GLBtcDbgType[BTC_MSG_ALGORITHM]&ALGO_TRACE_SW?1:0); if ((count < 0) || (count >= leftSize)) goto exit; pstr += count; leftSize -= count; count = rtw_sprintf(pstr, leftSize, "\tbit[8]=%d for TRACE_SW_DETAIL\n", GLBtcDbgType[BTC_MSG_ALGORITHM]&ALGO_TRACE_SW_DETAIL?1:0); if ((count < 0) || (count >= leftSize)) goto exit; pstr += count; leftSize -= count; count = rtw_sprintf(pstr, leftSize, "\tbit[9]=%d for TRACE_SW_EXEC\n", GLBtcDbgType[BTC_MSG_ALGORITHM]&ALGO_TRACE_SW_EXEC?1:0); if ((count < 0) || (count >= leftSize)) goto exit; pstr += count; leftSize -= count; exit: count = pstr - pStrBuf; // DBG_871X(FUNC_ADPT_FMT ": usedsize=%d\n", FUNC_ADPT_ARG(padapter), count); return count; } u8 hal_btcoex_IncreaseScanDeviceNum(PADAPTER padapter) { if (!hal_btcoex_IsBtExist(padapter)) return _FALSE; if (GLBtCoexist.btInfo.bIncreaseScanDevNum) return _TRUE; return _FALSE; } u8 hal_btcoex_IsBtLinkExist(PADAPTER padapter) { if (GLBtCoexist.btLinkInfo.bBtLinkExist) return _TRUE; return _FALSE; } /* * Description: * Setting BT coex antenna isolation type . * coex mechanisn/ spital stream/ best throughput * anttype = 0 , PSTDMA / 2SS / 0.5T , bad isolation (<20dB) for 2,3 antenna * anttype = 1 , PSTDMA / 1SS / 0.5T , normal isolaiton (>20dB) for 2 antenna * anttype = 2 , TDMA / 2SS / T , normal isolaiton (>20dB) for 3 antenna * anttype = 3 , no TDMA / 1SS / 0.5T , good isolation (>40dB) for 2 antenna * anttype = 4 , no TDMA / 2SS / T , good isolation (>40dB) for 3 antenna * wifi only throughput ~ T * wifi/BT share one antenna with SPDT */ void hal_btcoex_SetAntIsolationType(PADAPTER padapter, u8 anttype) { PHAL_DATA_TYPE pHalData; //DBG_871X("####%s , anttype = %d , %d \n", __FUNCTION__,anttype,__LINE__); pHalData = GET_HAL_DATA(padapter); pHalData->bt_coexist.btAntisolation= anttype; } #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE int hal_btcoex_ParseAntIsolationConfigFile( PADAPTER Adapter, char* buffer ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u32 i = 0 , j=0; char *szLine, *ptmp; int rtStatus = _SUCCESS; char param_value_string[10]; u8 param_value; u8 anttype = 4; u8 ant_num=3, ant_distance=50; typedef struct ant_isolation { char *param_name; // antenna isolation config parameter name u8 *value; // antenna isolation config parameter value }ANT_ISOLATION; ANT_ISOLATION ant_isolation_param[]= { {"ANT_NUMBER",&ant_num}, {"ANT_DISTANCE",&ant_distance}, {NULL,0} }; //DBG_871X("===>Hal_ParseAntIsolationConfigFile()\n" ); ptmp = buffer; for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) { // skip comment if ( IsCommentString( szLine ) ) { continue; } //DBG_871X("%s : szLine = %s , strlen(szLine) = %d \n", __FUNCTION__,szLine,strlen(szLine)); for ( j=0 ;ant_isolation_param[j].param_name != NULL ; j++ ) { if ( strstr(szLine,ant_isolation_param[j].param_name)!= NULL ) { i=0; while ( i < strlen(szLine) ) { if (szLine[i] != '"') ++i; else { // skip only has one " if( strpbrk(szLine, "\"") == strrchr(szLine, '"')) { DBG_871X("Fail to parse parameters , format error!\n"); break; } _rtw_memset( ( PVOID ) param_value_string, 0, 10 ); if ( ! ParseQualifiedString( szLine, &i, param_value_string, '"' , '"' ) ) { DBG_871X("Fail to parse parameters \n"); return _FAIL; } else { GetU1ByteIntegerFromStringInDecimal( param_value_string, ant_isolation_param[j].value ); } break; } } } } } // YiWei 20140716 , for BT coex antenna isolation control if ( ant_num==3 && ant_distance>=50) { pHalData->EEPROMBluetoothCoexist = 0; anttype = 4; } else if ( ant_num==2 && ant_distance>=50 ) { anttype = 3; } else if ( ant_num==3 && ant_distance>=15 && ant_distance<50 ) { anttype = 2; } else if ( ant_num==2 && ant_distance>=15 && ant_distance<50 ) { anttype = 1; } else if ( (ant_num==2 && ant_distance<15) || (ant_num==3 && ant_distance<15)) { anttype = 0; } else { pHalData->EEPROMBluetoothCoexist = 1; anttype = 1; } hal_btcoex_SetAntIsolationType(Adapter, anttype); DBG_871X("%s : ant_num = %d \n", __FUNCTION__,ant_num); DBG_871X("%s : ant_distance = %d \n", __FUNCTION__,ant_distance); //DBG_871X("<===Hal_ParseAntIsolationConfigFile()\n"); return rtStatus; } int hal_btcoex_AntIsolationConfig_ParaFile( IN PADAPTER Adapter, IN char* pFileName ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); int rlen = 0, rtStatus = _FAIL; //char file_path[1024]; //if(!(Adapter->registrypriv.load_phy_file & LOAD_RF_TXPWR_LMT_PARA_FILE)) // return rtStatus; _rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN); rtw_merge_string(file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); if (rtw_is_file_readable(file_path) == _TRUE) { rlen = rtw_retrive_from_file(file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); if (rlen > 0) { rtStatus = _SUCCESS; } } if(rtStatus == _SUCCESS) { //DBG_871X("%s(): read %s ok\n", __FUNCTION__, pFileName); rtStatus = hal_btcoex_ParseAntIsolationConfigFile( Adapter, pHalData->para_file_buf ); } else { DBG_871X("%s(): No File %s, Load from *** Array!\n", __FUNCTION__, pFileName); } return rtStatus; } #endif // CONFIG_LOAD_PHY_PARA_FROM_FILE #endif // CONFIG_BT_COEXIST rtl8812au-4.3.8.12175.20140902+dfsg/hal/hal_com.c000066400000000000000000002121241261122257400200130ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _HAL_COM_C_ #include #include "hal_com_h2c.h" #include "hal_data.h" #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE char file_path[PATH_LENGTH_MAX]; #endif u8 rtw_hal_data_init(_adapter *padapter) { if(is_primary_adapter(padapter)) { padapter->hal_data_sz = sizeof(HAL_DATA_TYPE); padapter->HalData = rtw_zvmalloc(padapter->hal_data_sz); if(padapter->HalData == NULL){ DBG_8192C("cant not alloc memory for HAL DATA \n"); return _FAIL; } } return _SUCCESS; } void rtw_hal_data_deinit(_adapter *padapter) { if(is_primary_adapter(padapter)) { if (padapter->HalData) { #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE phy_free_filebuf(padapter); #endif rtw_vmfree(padapter->HalData, padapter->hal_data_sz); padapter->HalData = NULL; padapter->hal_data_sz = 0; } } } void dump_chip_info(HAL_VERSION ChipVersion) { int cnt = 0; u8 buf[128]; if(IS_81XXC(ChipVersion)){ cnt += sprintf((buf+cnt), "Chip Version Info: %s_", IS_92C_SERIAL(ChipVersion)?"CHIP_8192C":"CHIP_8188C"); } else if(IS_92D(ChipVersion)){ cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8192D_"); } else if(IS_8723_SERIES(ChipVersion)){ cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8723A_"); } else if(IS_8188E(ChipVersion)){ cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8188E_"); } else if(IS_8812_SERIES(ChipVersion)){ cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8812_"); } else if(IS_8192E(ChipVersion)){ cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8192E_"); } else if(IS_8821_SERIES(ChipVersion)){ cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8821_"); } else if(IS_8723B_SERIES(ChipVersion)){ cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8723B_"); } cnt += sprintf((buf+cnt), "%s_", IS_NORMAL_CHIP(ChipVersion)?"Normal_Chip":"Test_Chip"); if(IS_CHIP_VENDOR_TSMC(ChipVersion)) cnt += sprintf((buf+cnt), "%s_","TSMC"); else if(IS_CHIP_VENDOR_UMC(ChipVersion)) cnt += sprintf((buf+cnt), "%s_","UMC"); else if(IS_CHIP_VENDOR_SMIC(ChipVersion)) cnt += sprintf((buf+cnt), "%s_","SMIC"); if(IS_A_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "A_CUT_"); else if(IS_B_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "B_CUT_"); else if(IS_C_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "C_CUT_"); else if(IS_D_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "D_CUT_"); else if(IS_E_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "E_CUT_"); else if(IS_I_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "I_CUT_"); else if(IS_J_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "J_CUT_"); else if(IS_K_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "K_CUT_"); else cnt += sprintf((buf+cnt), "UNKNOWN_CUT(%d)_", ChipVersion.CUTVersion); if(IS_1T1R(ChipVersion)) cnt += sprintf((buf+cnt), "1T1R_"); else if(IS_1T2R(ChipVersion)) cnt += sprintf((buf+cnt), "1T2R_"); else if(IS_2T2R(ChipVersion)) cnt += sprintf((buf+cnt), "2T2R_"); else cnt += sprintf((buf+cnt), "UNKNOWN_RFTYPE(%d)_", ChipVersion.RFType); cnt += sprintf((buf+cnt), "RomVer(%d)\n", ChipVersion.ROMVer); DBG_871X("%s", buf); } #define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 /* * Description: * Use hardware(efuse), driver parameter(registry) and default channel plan * to decide which one should be used. * * Parameters: * padapter pointer of adapter * hw_channel_plan channel plan from HW (efuse/eeprom) * BIT[7] software configure mode; 0:Enable, 1:disable * BIT[6:0] Channel Plan * sw_channel_plan channel plan from SW (registry/module param) * def_channel_plan channel plan used when HW/SW both invalid * AutoLoadFail efuse autoload fail or not * * Return: * Final channel plan decision * */ u8 hal_com_config_channel_plan( IN PADAPTER padapter, IN u8 hw_channel_plan, IN u8 sw_channel_plan, IN u8 def_channel_plan, IN BOOLEAN AutoLoadFail ) { PHAL_DATA_TYPE pHalData; u8 hwConfig; u8 chnlPlan; pHalData = GET_HAL_DATA(padapter); pHalData->bDisableSWChannelPlan = _FALSE; chnlPlan = def_channel_plan; if (0xFF == hw_channel_plan) AutoLoadFail = _TRUE; if (_FALSE == AutoLoadFail) { u8 hw_chnlPlan; hw_chnlPlan = hw_channel_plan & (~EEPROM_CHANNEL_PLAN_BY_HW_MASK); if (rtw_is_channel_plan_valid(hw_chnlPlan)) { #ifndef CONFIG_SW_CHANNEL_PLAN if (hw_channel_plan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) pHalData->bDisableSWChannelPlan = _TRUE; #endif // !CONFIG_SW_CHANNEL_PLAN chnlPlan = hw_chnlPlan; } } if ((_FALSE == pHalData->bDisableSWChannelPlan) && rtw_is_channel_plan_valid(sw_channel_plan)) { chnlPlan = sw_channel_plan; } return chnlPlan; } BOOLEAN HAL_IsLegalChannel( IN PADAPTER Adapter, IN u32 Channel ) { BOOLEAN bLegalChannel = _TRUE; if (Channel > 14) { if(IsSupported5G(Adapter->registrypriv.wireless_mode) == _FALSE) { bLegalChannel = _FALSE; DBG_871X("Channel > 14 but wireless_mode do not support 5G\n"); } } else if ((Channel <= 14) && (Channel >=1)){ if(IsSupported24G(Adapter->registrypriv.wireless_mode) == _FALSE) { bLegalChannel = _FALSE; DBG_871X("(Channel <= 14) && (Channel >=1) but wireless_mode do not support 2.4G\n"); } } else { bLegalChannel = _FALSE; DBG_871X("Channel is Invalid !!!\n"); } return bLegalChannel; } u8 MRateToHwRate(u8 rate) { u8 ret = DESC_RATE1M; switch(rate) { case MGN_1M: ret = DESC_RATE1M; break; case MGN_2M: ret = DESC_RATE2M; break; case MGN_5_5M: ret = DESC_RATE5_5M; break; case MGN_11M: ret = DESC_RATE11M; break; case MGN_6M: ret = DESC_RATE6M; break; case MGN_9M: ret = DESC_RATE9M; break; case MGN_12M: ret = DESC_RATE12M; break; case MGN_18M: ret = DESC_RATE18M; break; case MGN_24M: ret = DESC_RATE24M; break; case MGN_36M: ret = DESC_RATE36M; break; case MGN_48M: ret = DESC_RATE48M; break; case MGN_54M: ret = DESC_RATE54M; break; case MGN_MCS0: ret = DESC_RATEMCS0; break; case MGN_MCS1: ret = DESC_RATEMCS1; break; case MGN_MCS2: ret = DESC_RATEMCS2; break; case MGN_MCS3: ret = DESC_RATEMCS3; break; case MGN_MCS4: ret = DESC_RATEMCS4; break; case MGN_MCS5: ret = DESC_RATEMCS5; break; case MGN_MCS6: ret = DESC_RATEMCS6; break; case MGN_MCS7: ret = DESC_RATEMCS7; break; case MGN_MCS8: ret = DESC_RATEMCS8; break; case MGN_MCS9: ret = DESC_RATEMCS9; break; case MGN_MCS10: ret = DESC_RATEMCS10; break; case MGN_MCS11: ret = DESC_RATEMCS11; break; case MGN_MCS12: ret = DESC_RATEMCS12; break; case MGN_MCS13: ret = DESC_RATEMCS13; break; case MGN_MCS14: ret = DESC_RATEMCS14; break; case MGN_MCS15: ret = DESC_RATEMCS15; break; case MGN_MCS16: ret = DESC_RATEMCS16; break; case MGN_MCS17: ret = DESC_RATEMCS17; break; case MGN_MCS18: ret = DESC_RATEMCS18; break; case MGN_MCS19: ret = DESC_RATEMCS19; break; case MGN_MCS20: ret = DESC_RATEMCS20; break; case MGN_MCS21: ret = DESC_RATEMCS21; break; case MGN_MCS22: ret = DESC_RATEMCS22; break; case MGN_MCS23: ret = DESC_RATEMCS23; break; case MGN_MCS24: ret = DESC_RATEMCS24; break; case MGN_MCS25: ret = DESC_RATEMCS25; break; case MGN_MCS26: ret = DESC_RATEMCS26; break; case MGN_MCS27: ret = DESC_RATEMCS27; break; case MGN_MCS28: ret = DESC_RATEMCS28; break; case MGN_MCS29: ret = DESC_RATEMCS29; break; case MGN_MCS30: ret = DESC_RATEMCS30; break; case MGN_MCS31: ret = DESC_RATEMCS31; break; case MGN_VHT1SS_MCS0: ret = DESC_RATEVHTSS1MCS0; break; case MGN_VHT1SS_MCS1: ret = DESC_RATEVHTSS1MCS1; break; case MGN_VHT1SS_MCS2: ret = DESC_RATEVHTSS1MCS2; break; case MGN_VHT1SS_MCS3: ret = DESC_RATEVHTSS1MCS3; break; case MGN_VHT1SS_MCS4: ret = DESC_RATEVHTSS1MCS4; break; case MGN_VHT1SS_MCS5: ret = DESC_RATEVHTSS1MCS5; break; case MGN_VHT1SS_MCS6: ret = DESC_RATEVHTSS1MCS6; break; case MGN_VHT1SS_MCS7: ret = DESC_RATEVHTSS1MCS7; break; case MGN_VHT1SS_MCS8: ret = DESC_RATEVHTSS1MCS8; break; case MGN_VHT1SS_MCS9: ret = DESC_RATEVHTSS1MCS9; break; case MGN_VHT2SS_MCS0: ret = DESC_RATEVHTSS2MCS0; break; case MGN_VHT2SS_MCS1: ret = DESC_RATEVHTSS2MCS1; break; case MGN_VHT2SS_MCS2: ret = DESC_RATEVHTSS2MCS2; break; case MGN_VHT2SS_MCS3: ret = DESC_RATEVHTSS2MCS3; break; case MGN_VHT2SS_MCS4: ret = DESC_RATEVHTSS2MCS4; break; case MGN_VHT2SS_MCS5: ret = DESC_RATEVHTSS2MCS5; break; case MGN_VHT2SS_MCS6: ret = DESC_RATEVHTSS2MCS6; break; case MGN_VHT2SS_MCS7: ret = DESC_RATEVHTSS2MCS7; break; case MGN_VHT2SS_MCS8: ret = DESC_RATEVHTSS2MCS8; break; case MGN_VHT2SS_MCS9: ret = DESC_RATEVHTSS2MCS9; break; case MGN_VHT3SS_MCS0: ret = DESC_RATEVHTSS3MCS0; break; case MGN_VHT3SS_MCS1: ret = DESC_RATEVHTSS3MCS1; break; case MGN_VHT3SS_MCS2: ret = DESC_RATEVHTSS3MCS2; break; case MGN_VHT3SS_MCS3: ret = DESC_RATEVHTSS3MCS3; break; case MGN_VHT3SS_MCS4: ret = DESC_RATEVHTSS3MCS4; break; case MGN_VHT3SS_MCS5: ret = DESC_RATEVHTSS3MCS5; break; case MGN_VHT3SS_MCS6: ret = DESC_RATEVHTSS3MCS6; break; case MGN_VHT3SS_MCS7: ret = DESC_RATEVHTSS3MCS7; break; case MGN_VHT3SS_MCS8: ret = DESC_RATEVHTSS3MCS8; break; case MGN_VHT3SS_MCS9: ret = DESC_RATEVHTSS3MCS9; break; case MGN_VHT4SS_MCS0: ret = DESC_RATEVHTSS4MCS0; break; case MGN_VHT4SS_MCS1: ret = DESC_RATEVHTSS4MCS1; break; case MGN_VHT4SS_MCS2: ret = DESC_RATEVHTSS4MCS2; break; case MGN_VHT4SS_MCS3: ret = DESC_RATEVHTSS4MCS3; break; case MGN_VHT4SS_MCS4: ret = DESC_RATEVHTSS4MCS4; break; case MGN_VHT4SS_MCS5: ret = DESC_RATEVHTSS4MCS5; break; case MGN_VHT4SS_MCS6: ret = DESC_RATEVHTSS4MCS6; break; case MGN_VHT4SS_MCS7: ret = DESC_RATEVHTSS4MCS7; break; case MGN_VHT4SS_MCS8: ret = DESC_RATEVHTSS4MCS8; break; case MGN_VHT4SS_MCS9: ret = DESC_RATEVHTSS4MCS9; break; default: break; } return ret; } u8 HwRateToMRate(u8 rate) { u8 ret_rate = MGN_1M; switch(rate) { case DESC_RATE1M: ret_rate = MGN_1M; break; case DESC_RATE2M: ret_rate = MGN_2M; break; case DESC_RATE5_5M: ret_rate = MGN_5_5M; break; case DESC_RATE11M: ret_rate = MGN_11M; break; case DESC_RATE6M: ret_rate = MGN_6M; break; case DESC_RATE9M: ret_rate = MGN_9M; break; case DESC_RATE12M: ret_rate = MGN_12M; break; case DESC_RATE18M: ret_rate = MGN_18M; break; case DESC_RATE24M: ret_rate = MGN_24M; break; case DESC_RATE36M: ret_rate = MGN_36M; break; case DESC_RATE48M: ret_rate = MGN_48M; break; case DESC_RATE54M: ret_rate = MGN_54M; break; case DESC_RATEMCS0: ret_rate = MGN_MCS0; break; case DESC_RATEMCS1: ret_rate = MGN_MCS1; break; case DESC_RATEMCS2: ret_rate = MGN_MCS2; break; case DESC_RATEMCS3: ret_rate = MGN_MCS3; break; case DESC_RATEMCS4: ret_rate = MGN_MCS4; break; case DESC_RATEMCS5: ret_rate = MGN_MCS5; break; case DESC_RATEMCS6: ret_rate = MGN_MCS6; break; case DESC_RATEMCS7: ret_rate = MGN_MCS7; break; case DESC_RATEMCS8: ret_rate = MGN_MCS8; break; case DESC_RATEMCS9: ret_rate = MGN_MCS9; break; case DESC_RATEMCS10: ret_rate = MGN_MCS10; break; case DESC_RATEMCS11: ret_rate = MGN_MCS11; break; case DESC_RATEMCS12: ret_rate = MGN_MCS12; break; case DESC_RATEMCS13: ret_rate = MGN_MCS13; break; case DESC_RATEMCS14: ret_rate = MGN_MCS14; break; case DESC_RATEMCS15: ret_rate = MGN_MCS15; break; case DESC_RATEMCS16: ret_rate = MGN_MCS16; break; case DESC_RATEMCS17: ret_rate = MGN_MCS17; break; case DESC_RATEMCS18: ret_rate = MGN_MCS18; break; case DESC_RATEMCS19: ret_rate = MGN_MCS19; break; case DESC_RATEMCS20: ret_rate = MGN_MCS20; break; case DESC_RATEMCS21: ret_rate = MGN_MCS21; break; case DESC_RATEMCS22: ret_rate = MGN_MCS22; break; case DESC_RATEMCS23: ret_rate = MGN_MCS23; break; case DESC_RATEMCS24: ret_rate = MGN_MCS24; break; case DESC_RATEMCS25: ret_rate = MGN_MCS25; break; case DESC_RATEMCS26: ret_rate = MGN_MCS26; break; case DESC_RATEMCS27: ret_rate = MGN_MCS27; break; case DESC_RATEMCS28: ret_rate = MGN_MCS28; break; case DESC_RATEMCS29: ret_rate = MGN_MCS29; break; case DESC_RATEMCS30: ret_rate = MGN_MCS30; break; case DESC_RATEMCS31: ret_rate = MGN_MCS31; break; case DESC_RATEVHTSS1MCS0: ret_rate = MGN_VHT1SS_MCS0; break; case DESC_RATEVHTSS1MCS1: ret_rate = MGN_VHT1SS_MCS1; break; case DESC_RATEVHTSS1MCS2: ret_rate = MGN_VHT1SS_MCS2; break; case DESC_RATEVHTSS1MCS3: ret_rate = MGN_VHT1SS_MCS3; break; case DESC_RATEVHTSS1MCS4: ret_rate = MGN_VHT1SS_MCS4; break; case DESC_RATEVHTSS1MCS5: ret_rate = MGN_VHT1SS_MCS5; break; case DESC_RATEVHTSS1MCS6: ret_rate = MGN_VHT1SS_MCS6; break; case DESC_RATEVHTSS1MCS7: ret_rate = MGN_VHT1SS_MCS7; break; case DESC_RATEVHTSS1MCS8: ret_rate = MGN_VHT1SS_MCS8; break; case DESC_RATEVHTSS1MCS9: ret_rate = MGN_VHT1SS_MCS9; break; case DESC_RATEVHTSS2MCS0: ret_rate = MGN_VHT2SS_MCS0; break; case DESC_RATEVHTSS2MCS1: ret_rate = MGN_VHT2SS_MCS1; break; case DESC_RATEVHTSS2MCS2: ret_rate = MGN_VHT2SS_MCS2; break; case DESC_RATEVHTSS2MCS3: ret_rate = MGN_VHT2SS_MCS3; break; case DESC_RATEVHTSS2MCS4: ret_rate = MGN_VHT2SS_MCS4; break; case DESC_RATEVHTSS2MCS5: ret_rate = MGN_VHT2SS_MCS5; break; case DESC_RATEVHTSS2MCS6: ret_rate = MGN_VHT2SS_MCS6; break; case DESC_RATEVHTSS2MCS7: ret_rate = MGN_VHT2SS_MCS7; break; case DESC_RATEVHTSS2MCS8: ret_rate = MGN_VHT2SS_MCS8; break; case DESC_RATEVHTSS2MCS9: ret_rate = MGN_VHT2SS_MCS9; break; case DESC_RATEVHTSS3MCS0: ret_rate = MGN_VHT3SS_MCS0; break; case DESC_RATEVHTSS3MCS1: ret_rate = MGN_VHT3SS_MCS1; break; case DESC_RATEVHTSS3MCS2: ret_rate = MGN_VHT3SS_MCS2; break; case DESC_RATEVHTSS3MCS3: ret_rate = MGN_VHT3SS_MCS3; break; case DESC_RATEVHTSS3MCS4: ret_rate = MGN_VHT3SS_MCS4; break; case DESC_RATEVHTSS3MCS5: ret_rate = MGN_VHT3SS_MCS5; break; case DESC_RATEVHTSS3MCS6: ret_rate = MGN_VHT3SS_MCS6; break; case DESC_RATEVHTSS3MCS7: ret_rate = MGN_VHT3SS_MCS7; break; case DESC_RATEVHTSS3MCS8: ret_rate = MGN_VHT3SS_MCS8; break; case DESC_RATEVHTSS3MCS9: ret_rate = MGN_VHT3SS_MCS9; break; case DESC_RATEVHTSS4MCS0: ret_rate = MGN_VHT4SS_MCS0; break; case DESC_RATEVHTSS4MCS1: ret_rate = MGN_VHT4SS_MCS1; break; case DESC_RATEVHTSS4MCS2: ret_rate = MGN_VHT4SS_MCS2; break; case DESC_RATEVHTSS4MCS3: ret_rate = MGN_VHT4SS_MCS3; break; case DESC_RATEVHTSS4MCS4: ret_rate = MGN_VHT4SS_MCS4; break; case DESC_RATEVHTSS4MCS5: ret_rate = MGN_VHT4SS_MCS5; break; case DESC_RATEVHTSS4MCS6: ret_rate = MGN_VHT4SS_MCS6; break; case DESC_RATEVHTSS4MCS7: ret_rate = MGN_VHT4SS_MCS7; break; case DESC_RATEVHTSS4MCS8: ret_rate = MGN_VHT4SS_MCS8; break; case DESC_RATEVHTSS4MCS9: ret_rate = MGN_VHT4SS_MCS9; break; default: DBG_871X("HwRateToMRate(): Non supported Rate [%x]!!!\n",rate ); break; } return ret_rate; } void HalSetBrateCfg( IN PADAPTER Adapter, IN u8 *mBratesOS, OUT u16 *pBrateCfg) { u8 i, is_brate, brate; for(i=0;iQueue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[0];//BE pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];//BK pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD } static VOID _TwoOutPipeMapping( IN PADAPTER pAdapter, IN BOOLEAN bWIFICfg ) { struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter); if(bWIFICfg){ //WMM // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA //{ 0, 1, 0, 1, 0, 0, 0, 0, 0 }; //0:ep_0 num, 1:ep_1 num pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[1];//VO pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];//BE pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];//BK pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD } else{//typical setting //BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA //{ 1, 1, 0, 0, 0, 0, 0, 0, 0 }; //0:ep_0 num, 1:ep_1 num pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];//BE pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];//BK pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD } } static VOID _ThreeOutPipeMapping( IN PADAPTER pAdapter, IN BOOLEAN bWIFICfg ) { struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter); if(bWIFICfg){//for WMM // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA //{ 1, 2, 1, 0, 0, 0, 0, 0, 0 }; //0:H, 1:N, 2:L pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];//BK pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD } else{//typical setting // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA //{ 2, 2, 1, 0, 0, 0, 0, 0, 0 }; //0:H, 1:N, 2:L pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];//BK pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD } } static VOID _FourOutPipeMapping( IN PADAPTER pAdapter, IN BOOLEAN bWIFICfg ) { struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter); if(bWIFICfg){//for WMM // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA //{ 1, 2, 1, 0, 0, 0, 0, 0, 0 }; //0:H, 1:N, 2:L ,3:E pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];//BK pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[3];//HIGH pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD } else{//typical setting // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA //{ 2, 2, 1, 0, 0, 0, 0, 0, 0 }; //0:H, 1:N, 2:L pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];//BK pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[3];//HIGH pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD } } BOOLEAN Hal_MappingOutPipe( IN PADAPTER pAdapter, IN u8 NumOutPipe ) { struct registry_priv *pregistrypriv = &pAdapter->registrypriv; BOOLEAN bWIFICfg = (pregistrypriv->wifi_spec) ?_TRUE:_FALSE; BOOLEAN result = _TRUE; switch(NumOutPipe) { case 2: _TwoOutPipeMapping(pAdapter, bWIFICfg); break; case 3: case 4: _ThreeOutPipeMapping(pAdapter, bWIFICfg); break; case 1: _OneOutPipeMapping(pAdapter); break; default: result = _FALSE; break; } return result; } void hal_init_macaddr(_adapter *adapter) { rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter->eeprompriv.mac_addr); #ifdef CONFIG_CONCURRENT_MODE if (adapter->pbuddy_adapter) rtw_hal_set_hwreg(adapter->pbuddy_adapter, HW_VAR_MAC_ADDR, adapter->pbuddy_adapter->eeprompriv.mac_addr); #endif } void rtw_init_hal_com_default_value(PADAPTER Adapter) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); pHalData->AntDetection = 1; } /* * C2H event format: * Field TRIGGER CONTENT CMD_SEQ CMD_LEN CMD_ID * BITS [127:120] [119:16] [15:8] [7:4] [3:0] */ void c2h_evt_clear(_adapter *adapter) { rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE); } s32 c2h_evt_read(_adapter *adapter, u8 *buf) { s32 ret = _FAIL; struct c2h_evt_hdr *c2h_evt; int i; u8 trigger; if (buf == NULL) goto exit; #if defined(CONFIG_RTL8192C) || defined(CONFIG_RTL8192D) || defined(CONFIG_RTL8723A) || defined (CONFIG_RTL8188E) trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR); if (trigger == C2H_EVT_HOST_CLOSE) { goto exit; /* Not ready */ } else if (trigger != C2H_EVT_FW_CLOSE) { goto clear_evt; /* Not a valid value */ } c2h_evt = (struct c2h_evt_hdr *)buf; _rtw_memset(c2h_evt, 0, 16); *buf = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL); *(buf+1) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1); RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): ", &c2h_evt , sizeof(c2h_evt)); if (0) { DBG_871X("%s id:%u, len:%u, seq:%u, trigger:0x%02x\n", __func__ , c2h_evt->id, c2h_evt->plen, c2h_evt->seq, trigger); } /* Read the content */ for (i = 0; i < c2h_evt->plen; i++) c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + sizeof(*c2h_evt) + i); RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): Command Content:\n", c2h_evt->payload, c2h_evt->plen); ret = _SUCCESS; clear_evt: /* * Clear event to notify FW we have read the command. * If this field isn't clear, the FW won't update the next command message. */ c2h_evt_clear(adapter); #endif exit: return ret; } /* * C2H event format: * Field TRIGGER CMD_LEN CONTENT CMD_SEQ CMD_ID * BITS [127:120] [119:112] [111:16] [15:8] [7:0] */ s32 c2h_evt_read_88xx(_adapter *adapter, u8 *buf) { s32 ret = _FAIL; struct c2h_evt_hdr_88xx *c2h_evt; int i; u8 trigger; if (buf == NULL) goto exit; #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8723B) trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR); if (trigger == C2H_EVT_HOST_CLOSE) { goto exit; /* Not ready */ } else if (trigger != C2H_EVT_FW_CLOSE) { goto clear_evt; /* Not a valid value */ } c2h_evt = (struct c2h_evt_hdr_88xx *)buf; _rtw_memset(c2h_evt, 0, 16); c2h_evt->id = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL); c2h_evt->seq = rtw_read8(adapter, REG_C2HEVT_CMD_SEQ_88XX); c2h_evt->plen = rtw_read8(adapter, REG_C2HEVT_CMD_LEN_88XX); RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): ", &c2h_evt , sizeof(c2h_evt)); if (0) { DBG_871X("%s id:%u, len:%u, seq:%u, trigger:0x%02x\n", __func__ , c2h_evt->id, c2h_evt->plen, c2h_evt->seq, trigger); } /* Read the content */ for (i = 0; i < c2h_evt->plen; i++) c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 2 + i); RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): Command Content:\n", c2h_evt->payload, c2h_evt->plen); ret = _SUCCESS; clear_evt: /* * Clear event to notify FW we have read the command. * If this field isn't clear, the FW won't update the next command message. */ c2h_evt_clear(adapter); #endif exit: return ret; } u8 rtw_hal_networktype_to_raid(_adapter *adapter, struct sta_info *psta) { if(IS_NEW_GENERATION_IC(adapter)){ return networktype_to_raid_ex(adapter,psta); } else{ return networktype_to_raid(adapter,psta); } } u8 rtw_get_mgntframe_raid(_adapter *adapter,unsigned char network_type) { u8 raid; if(IS_NEW_GENERATION_IC(adapter)){ raid = (network_type & WIRELESS_11B) ?RATEID_IDX_B :RATEID_IDX_G; } else{ raid = (network_type & WIRELESS_11B) ?RATR_INX_WIRELESS_B :RATR_INX_WIRELESS_G; } return raid; } void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta) { u8 i, rf_type, limit; u32 tx_ra_bitmap; if(psta == NULL) { return; } tx_ra_bitmap = 0; //b/g mode ra_bitmap for (i=0; ibssrateset); i++) { if (psta->bssrateset[i]) tx_ra_bitmap |= rtw_get_bit_value_from_ieee_value(psta->bssrateset[i]&0x7f); } #ifdef CONFIG_80211N_HT #ifdef CONFIG_80211AC_VHT //AC mode ra_bitmap if(psta->vhtpriv.vht_option) { tx_ra_bitmap |= (rtw_vht_rate_to_bitmap(psta->vhtpriv.vht_mcs_map) << 12); } else #endif //CONFIG_80211AC_VHT { //n mode ra_bitmap if(psta->htpriv.ht_option) { rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); if(rf_type == RF_2T2R) limit=16;// 2R else limit=8;// 1R for (i=0; ihtpriv.ht_cap.supp_mcs_set[i/8] & BIT(i%8)) tx_ra_bitmap |= BIT(i+12); } } } #endif //CONFIG_80211N_HT psta->ra_mask = tx_ra_bitmap; psta->init_rate = get_highest_rate_idx(tx_ra_bitmap)&0x3f; } void hw_var_port_switch(_adapter *adapter) { #ifdef CONFIG_CONCURRENT_MODE #ifdef CONFIG_RUNTIME_PORT_SWITCH /* 0x102: MSR 0x550: REG_BCN_CTRL 0x551: REG_BCN_CTRL_1 0x55A: REG_ATIMWND 0x560: REG_TSFTR 0x568: REG_TSFTR1 0x570: REG_ATIMWND_1 0x610: REG_MACID 0x618: REG_BSSID 0x700: REG_MACID1 0x708: REG_BSSID1 */ int i; u8 msr; u8 bcn_ctrl; u8 bcn_ctrl_1; u8 atimwnd[2]; u8 atimwnd_1[2]; u8 tsftr[8]; u8 tsftr_1[8]; u8 macid[6]; u8 bssid[6]; u8 macid_1[6]; u8 bssid_1[6]; u8 iface_type; msr = rtw_read8(adapter, MSR); bcn_ctrl = rtw_read8(adapter, REG_BCN_CTRL); bcn_ctrl_1 = rtw_read8(adapter, REG_BCN_CTRL_1); for (i=0; i<2; i++) atimwnd[i] = rtw_read8(adapter, REG_ATIMWND+i); for (i=0; i<2; i++) atimwnd_1[i] = rtw_read8(adapter, REG_ATIMWND_1+i); for (i=0; i<8; i++) tsftr[i] = rtw_read8(adapter, REG_TSFTR+i); for (i=0; i<8; i++) tsftr_1[i] = rtw_read8(adapter, REG_TSFTR1+i); for (i=0; i<6; i++) macid[i] = rtw_read8(adapter, REG_MACID+i); for (i=0; i<6; i++) bssid[i] = rtw_read8(adapter, REG_BSSID+i); for (i=0; i<6; i++) macid_1[i] = rtw_read8(adapter, REG_MACID1+i); for (i=0; i<6; i++) bssid_1[i] = rtw_read8(adapter, REG_BSSID1+i); #ifdef DBG_RUNTIME_PORT_SWITCH DBG_871X(FUNC_ADPT_FMT" before switch\n" "msr:0x%02x\n" "bcn_ctrl:0x%02x\n" "bcn_ctrl_1:0x%02x\n" "atimwnd:0x%04x\n" "atimwnd_1:0x%04x\n" "tsftr:%llu\n" "tsftr1:%llu\n" "macid:"MAC_FMT"\n" "bssid:"MAC_FMT"\n" "macid_1:"MAC_FMT"\n" "bssid_1:"MAC_FMT"\n" , FUNC_ADPT_ARG(adapter) , msr , bcn_ctrl , bcn_ctrl_1 , *((u16*)atimwnd) , *((u16*)atimwnd_1) , *((u64*)tsftr) , *((u64*)tsftr_1) , MAC_ARG(macid) , MAC_ARG(bssid) , MAC_ARG(macid_1) , MAC_ARG(bssid_1) ); #endif /* DBG_RUNTIME_PORT_SWITCH */ /* disable bcn function, disable update TSF */ rtw_write8(adapter, REG_BCN_CTRL, (bcn_ctrl & (~EN_BCN_FUNCTION)) | DIS_TSF_UDT); rtw_write8(adapter, REG_BCN_CTRL_1, (bcn_ctrl_1 & (~EN_BCN_FUNCTION)) | DIS_TSF_UDT); /* switch msr */ msr = (msr&0xf0) |((msr&0x03) << 2) | ((msr&0x0c) >> 2); rtw_write8(adapter, MSR, msr); /* write port0 */ rtw_write8(adapter, REG_BCN_CTRL, bcn_ctrl_1 & ~EN_BCN_FUNCTION); for (i=0; i<2; i++) rtw_write8(adapter, REG_ATIMWND+i, atimwnd_1[i]); for (i=0; i<8; i++) rtw_write8(adapter, REG_TSFTR+i, tsftr_1[i]); for (i=0; i<6; i++) rtw_write8(adapter, REG_MACID+i, macid_1[i]); for (i=0; i<6; i++) rtw_write8(adapter, REG_BSSID+i, bssid_1[i]); /* write port1 */ rtw_write8(adapter, REG_BCN_CTRL_1, bcn_ctrl & ~EN_BCN_FUNCTION); for (i=0; i<2; i++) rtw_write8(adapter, REG_ATIMWND_1+1, atimwnd[i]); for (i=0; i<8; i++) rtw_write8(adapter, REG_TSFTR1+i, tsftr[i]); for (i=0; i<6; i++) rtw_write8(adapter, REG_MACID1+i, macid[i]); for (i=0; i<6; i++) rtw_write8(adapter, REG_BSSID1+i, bssid[i]); /* write bcn ctl */ #ifdef CONFIG_BT_COEXIST #if defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B) // always enable port0 beacon function for PSTDMA bcn_ctrl_1 |= EN_BCN_FUNCTION; // always disable port1 beacon function for PSTDMA bcn_ctrl &= ~EN_BCN_FUNCTION; #endif #endif rtw_write8(adapter, REG_BCN_CTRL, bcn_ctrl_1); rtw_write8(adapter, REG_BCN_CTRL_1, bcn_ctrl); if (adapter->iface_type == IFACE_PORT0) { adapter->iface_type = IFACE_PORT1; adapter->pbuddy_adapter->iface_type = IFACE_PORT0; DBG_871X_LEVEL(_drv_always_, "port switch - port0("ADPT_FMT"), port1("ADPT_FMT")\n", ADPT_ARG(adapter->pbuddy_adapter), ADPT_ARG(adapter)); } else { adapter->iface_type = IFACE_PORT0; adapter->pbuddy_adapter->iface_type = IFACE_PORT1; DBG_871X_LEVEL(_drv_always_, "port switch - port0("ADPT_FMT"), port1("ADPT_FMT")\n", ADPT_ARG(adapter), ADPT_ARG(adapter->pbuddy_adapter)); } #ifdef DBG_RUNTIME_PORT_SWITCH msr = rtw_read8(adapter, MSR); bcn_ctrl = rtw_read8(adapter, REG_BCN_CTRL); bcn_ctrl_1 = rtw_read8(adapter, REG_BCN_CTRL_1); for (i=0; i<2; i++) atimwnd[i] = rtw_read8(adapter, REG_ATIMWND+i); for (i=0; i<2; i++) atimwnd_1[i] = rtw_read8(adapter, REG_ATIMWND_1+i); for (i=0; i<8; i++) tsftr[i] = rtw_read8(adapter, REG_TSFTR+i); for (i=0; i<8; i++) tsftr_1[i] = rtw_read8(adapter, REG_TSFTR1+i); for (i=0; i<6; i++) macid[i] = rtw_read8(adapter, REG_MACID+i); for (i=0; i<6; i++) bssid[i] = rtw_read8(adapter, REG_BSSID+i); for (i=0; i<6; i++) macid_1[i] = rtw_read8(adapter, REG_MACID1+i); for (i=0; i<6; i++) bssid_1[i] = rtw_read8(adapter, REG_BSSID1+i); DBG_871X(FUNC_ADPT_FMT" after switch\n" "msr:0x%02x\n" "bcn_ctrl:0x%02x\n" "bcn_ctrl_1:0x%02x\n" "atimwnd:%u\n" "atimwnd_1:%u\n" "tsftr:%llu\n" "tsftr1:%llu\n" "macid:"MAC_FMT"\n" "bssid:"MAC_FMT"\n" "macid_1:"MAC_FMT"\n" "bssid_1:"MAC_FMT"\n" , FUNC_ADPT_ARG(adapter) , msr , bcn_ctrl , bcn_ctrl_1 , *((u16*)atimwnd) , *((u16*)atimwnd_1) , *((u64*)tsftr) , *((u64*)tsftr_1) , MAC_ARG(macid) , MAC_ARG(bssid) , MAC_ARG(macid_1) , MAC_ARG(bssid_1) ); #endif /* DBG_RUNTIME_PORT_SWITCH */ #endif /* CONFIG_RUNTIME_PORT_SWITCH */ #endif /* CONFIG_CONCURRENT_MODE */ } void SetHwReg(_adapter *adapter, u8 variable, u8 *val) { HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); DM_ODM_T *odm = &(hal_data->odmpriv); _func_enter_; switch (variable) { case HW_VAR_INITIAL_GAIN: { u32 rx_gain = ((u32 *)(val))[0]; if(rx_gain == 0xff){//restore rx gain //ODM_Write_DIG(podmpriv,pDigTable->BackupIGValue); odm_PauseDIG(odm, ODM_RESUME_DIG,rx_gain); } else{ //pDigTable->BackupIGValue = pDigTable->CurIGValue; //ODM_Write_DIG(podmpriv,rx_gain); odm_PauseDIG(odm, ODM_PAUSE_DIG,rx_gain); } } break; case HW_VAR_PORT_SWITCH: hw_var_port_switch(adapter); break; case HW_VAR_INIT_RTS_RATE: { u16 brate_cfg = *((u16*)val); u8 rate_index = 0; HAL_VERSION *hal_ver = &hal_data->VersionID; if (IS_81XXC(*hal_ver) ||IS_92D(*hal_ver) || IS_8723_SERIES(*hal_ver) || IS_8188E(*hal_ver)) { while (brate_cfg > 0x1) { brate_cfg = (brate_cfg >> 1); rate_index++; } rtw_write8(adapter, REG_INIRTS_RATE_SEL, rate_index); } else { rtw_warn_on(1); } } break; case HW_VAR_SEC_CFG: { #if defined(CONFIG_CONCURRENT_MODE) && !defined(DYNAMIC_CAMID_ALLOC) // enable tx enc and rx dec engine, and no key search for MC/BC rtw_write8(adapter, REG_SECCFG, SCR_NoSKMC|SCR_RxDecEnable|SCR_TxEncEnable); #elif defined(DYNAMIC_CAMID_ALLOC) u16 reg_scr; reg_scr = rtw_read16(adapter, REG_SECCFG); rtw_write16(adapter, REG_SECCFG, reg_scr|SCR_CHK_KEYID|SCR_RxDecEnable|SCR_TxEncEnable); #else rtw_write8(adapter, REG_SECCFG, *((u8*)val)); #endif } break; case HW_VAR_SEC_DK_CFG: { struct security_priv *sec = &adapter->securitypriv; u8 reg_scr = rtw_read8(adapter, REG_SECCFG); if (val) /* Enable default key related setting */ { reg_scr |= SCR_TXBCUSEDK; if (sec->dot11AuthAlgrthm != dot11AuthAlgrthm_8021X) reg_scr |= (SCR_RxUseDK|SCR_TxUseDK); } else /* Disable default key related setting */ { reg_scr &= ~(SCR_RXBCUSEDK|SCR_TXBCUSEDK|SCR_RxUseDK|SCR_TxUseDK); } rtw_write8(adapter, REG_SECCFG, reg_scr); } break; case HW_VAR_DM_FLAG: odm->SupportAbility = *((u32*)val); break; case HW_VAR_DM_FUNC_OP: if (*((u8*)val) == _TRUE) { /* save dm flag */ odm->BK_SupportAbility = odm->SupportAbility; } else { /* restore dm flag */ odm->SupportAbility = odm->BK_SupportAbility; } break; case HW_VAR_DM_FUNC_SET: if(*((u32*)val) == DYNAMIC_ALL_FUNC_ENABLE){ struct dm_priv *dm = &hal_data->dmpriv; dm->DMFlag = dm->InitDMFlag; odm->SupportAbility = dm->InitODMFlag; } else { odm->SupportAbility |= *((u32 *)val); } break; case HW_VAR_DM_FUNC_CLR: /* * input is already a mask to clear function * don't invert it again! George,Lucas@20130513 */ odm->SupportAbility &= *((u32 *)val); break; case HW_VAR_ASIX_IOT: // enable ASIX IOT function if (*((u8*)val) == _TRUE) { // 0xa2e[0]=0 (disable rake receiver) rtw_write8(adapter, rCCK0_FalseAlarmReport+2, rtw_read8(adapter, rCCK0_FalseAlarmReport+2) & ~(BIT0)); // 0xa1c=0xa0 (reset channel estimation if signal quality is bad) rtw_write8(adapter, rCCK0_DSPParameter2, 0xa0); } else { // restore reg:0xa2e, reg:0xa1c rtw_write8(adapter, rCCK0_FalseAlarmReport+2, rtw_read8(adapter, rCCK0_FalseAlarmReport+2)|(BIT0)); rtw_write8(adapter, rCCK0_DSPParameter2, 0x00); } break; default: if (0) DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" variable(%d) not defined!\n", FUNC_ADPT_ARG(adapter), variable); break; } _func_exit_; } void GetHwReg(_adapter *adapter, u8 variable, u8 *val) { HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); DM_ODM_T *odm = &(hal_data->odmpriv); _func_enter_; switch (variable) { case HW_VAR_BASIC_RATE: *((u16*)val) = hal_data->BasicRateSet; break; case HW_VAR_DM_FLAG: *((u32*)val) = odm->SupportAbility; break; case HW_VAR_RF_TYPE: *((u8*)val) = hal_data->rf_type; break; default: if (0) DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" variable(%d) not defined!\n", FUNC_ADPT_ARG(adapter), variable); break; } _func_exit_; } u8 SetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value) { HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); DM_ODM_T *odm = &(hal_data->odmpriv); u8 bResult = _SUCCESS; switch(variable) { case HW_DEF_FA_CNT_DUMP: //ODM_COMP_COMMON if(*((u8*)value)) odm->DebugComponents |= (ODM_COMP_DIG |ODM_COMP_FA_CNT); else odm->DebugComponents &= ~(ODM_COMP_DIG |ODM_COMP_FA_CNT); break; case HAL_DEF_DBG_RX_INFO_DUMP: { PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( odm , PhyDM_FalseAlmCnt); pDIG_T pDM_DigTable = &odm->DM_DigTable; DBG_871X("============ Rx Info dump ===================\n"); DBG_871X("bLinked = %d, RSSI_Min = %d(%%), CurrentIGI = 0x%x \n", odm->bLinked, odm->RSSI_Min, pDM_DigTable->CurIGValue); DBG_871X("Cnt_Cck_fail = %d, Cnt_Ofdm_fail = %d, Total False Alarm = %d\n", FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_all); if(odm->bLinked){ DBG_871X("RxRate = %s, RSSI_A = %d(%%), RSSI_B = %d(%%)\n", HDATA_RATE(odm->RxRate), odm->RSSI_A, odm->RSSI_B); #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA rtw_dump_raw_rssi_info(adapter); #endif } } break; case HW_DEF_ODM_DBG_FLAG: ODM_CmnInfoUpdate(odm, ODM_CMNINFO_DBG_COMP, *((u8Byte*)value)); break; case HW_DEF_ODM_DBG_LEVEL: ODM_CmnInfoUpdate(odm, ODM_CMNINFO_DBG_LEVEL, *((u4Byte*)value)); break; case HAL_DEF_DBG_DM_FUNC: { u8 dm_func = *((u8*)value); struct dm_priv *dm = &hal_data->dmpriv; if(dm_func == 0){ //disable all dynamic func odm->SupportAbility = DYNAMIC_FUNC_DISABLE; DBG_8192C("==> Disable all dynamic function...\n"); } else if(dm_func == 1){//disable DIG odm->SupportAbility &= (~DYNAMIC_BB_DIG); DBG_8192C("==> Disable DIG...\n"); } else if(dm_func == 2){//disable High power odm->SupportAbility &= (~DYNAMIC_BB_DYNAMIC_TXPWR); } else if(dm_func == 3){//disable tx power tracking odm->SupportAbility &= (~DYNAMIC_RF_CALIBRATION); DBG_8192C("==> Disable tx power tracking...\n"); } else if(dm_func == 4){//disable BT coexistence dm->DMFlag &= (~DYNAMIC_FUNC_BT); } else if(dm_func == 5){//disable antenna diversity odm->SupportAbility &= (~DYNAMIC_BB_ANT_DIV); } else if(dm_func == 6){//turn on all dynamic func if(!(odm->SupportAbility & DYNAMIC_BB_DIG)) { DIG_T *pDigTable = &odm->DM_DigTable; pDigTable->CurIGValue= rtw_read8(adapter, 0xc50); } dm->DMFlag |= DYNAMIC_FUNC_BT; odm->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE; DBG_8192C("==> Turn on all dynamic function...\n"); } } break; case HAL_DEF_DBG_DUMP_RXPKT: hal_data->bDumpRxPkt = *((u8*)value); break; case HAL_DEF_DBG_DUMP_TXPKT: hal_data->bDumpTxPkt = *((u8*)value); break; case HAL_DEF_ANT_DETECT: hal_data->AntDetection = *((u8 *)value); break; case HAL_DEF_DBG_DIS_PWT: hal_data->bDisableTXPowerTraining = *((u8*)value); break; default: DBG_871X_LEVEL(_drv_always_, "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n", __FUNCTION__, variable); bResult = _FAIL; break; } return bResult; } u8 GetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value) { HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); DM_ODM_T *odm = &(hal_data->odmpriv); u8 bResult = _SUCCESS; switch(variable) { case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB: { struct mlme_priv *pmlmepriv; struct sta_priv *pstapriv; struct sta_info *psta; pmlmepriv = &adapter->mlmepriv; pstapriv = &adapter->stapriv; psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress); if (psta) { *((int*)value) = psta->rssi_stat.UndecoratedSmoothedPWDB; } } break; case HW_DEF_ODM_DBG_FLAG: *((u8Byte*)value) = odm->DebugComponents; break; case HW_DEF_ODM_DBG_LEVEL: *((u4Byte*)value) = odm->DebugLevel; break; case HAL_DEF_DBG_DM_FUNC: *(( u32*)value) =hal_data->odmpriv.SupportAbility; break; case HAL_DEF_DBG_DUMP_RXPKT: *((u8*)value) = hal_data->bDumpRxPkt; break; case HAL_DEF_DBG_DUMP_TXPKT: *((u8*)value) = hal_data->bDumpTxPkt; break; case HAL_DEF_ANT_DETECT: *((u8 *)value) = hal_data->AntDetection; break; case HAL_DEF_MACID_SLEEP: *(u8*)value = _FALSE; break; case HAL_DEF_TX_PAGE_SIZE: *(( u32*)value) = PAGE_SIZE_128; break; case HAL_DEF_DBG_DIS_PWT: *(u8*)value = hal_data->bDisableTXPowerTraining; break; default: DBG_871X_LEVEL(_drv_always_, "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n", __FUNCTION__, variable); bResult = _FAIL; break; } return bResult; } void GetHalODMVar( PADAPTER Adapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, PVOID pValue2) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T podmpriv = &pHalData->odmpriv; switch(eVariable){ #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) case HAL_ODM_NOISE_MONITOR: { u8 chan = *(u8*)pValue1; *(s16 *)pValue2 = pHalData->noise[chan]; #ifdef DBG_NOISE_MONITOR DBG_8192C("### Noise monitor chan(%d)-noise:%d (dBm) ###\n", chan,pHalData->noise[chan]); #endif } break; #endif//#ifdef CONFIG_BACKGROUND_NOISE_MONITOR default: break; } } void SetHalODMVar( PADAPTER Adapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, BOOLEAN bSet) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T podmpriv = &pHalData->odmpriv; //_irqL irqL; switch(eVariable){ case HAL_ODM_STA_INFO: { struct sta_info *psta = (struct sta_info *)pValue1; if(bSet){ DBG_8192C("### Set STA_(%d) info ###\n",psta->mac_id); ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,psta); } else{ DBG_8192C("### Clean STA_(%d) info ###\n",psta->mac_id); //_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL); ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,NULL); //_exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL); } } break; case HAL_ODM_P2P_STATE: ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DIRECT,bSet); break; case HAL_ODM_WIFI_DISPLAY_STATE: ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DISPLAY,bSet); break; case HAL_ODM_REGULATION: ODM_CmnInfoInit(podmpriv, ODM_CMNINFO_DOMAIN_CODE_2G, pHalData->Regulation2_4G); ODM_CmnInfoInit(podmpriv, ODM_CMNINFO_DOMAIN_CODE_5G, pHalData->Regulation5G); break; #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) case HAL_ODM_NOISE_MONITOR: { struct noise_info *pinfo = (struct noise_info *)pValue1; #ifdef DBG_NOISE_MONITOR DBG_8192C("### Noise monitor chan(%d)-bPauseDIG:%d,IGIValue:0x%02x,max_time:%d (ms) ###\n", pinfo->chan,pinfo->bPauseDIG,pinfo->IGIValue,pinfo->max_time); #endif pHalData->noise[pinfo->chan] = ODM_InbandNoise_Monitor(podmpriv,pinfo->bPauseDIG,pinfo->IGIValue,pinfo->max_time); DBG_871X("chan_%d, noise = %d (dBm)\n",pinfo->chan,pHalData->noise[pinfo->chan]); #ifdef DBG_NOISE_MONITOR DBG_871X("noise_a = %d, noise_b = %d noise_all:%d \n", podmpriv->noise_level.noise[ODM_RF_PATH_A], podmpriv->noise_level.noise[ODM_RF_PATH_B], podmpriv->noise_level.noise_all); #endif } break; #endif//#ifdef CONFIG_BACKGROUND_NOISE_MONITOR default: break; } } BOOLEAN eqNByte( u8* str1, u8* str2, u32 num ) { if(num==0) return _FALSE; while(num>0) { num--; if(str1[num]!=str2[num]) return _FALSE; } return _TRUE; } // // Description: // Return TRUE if chTmp is represent for hex digit and // FALSE otherwise. // // BOOLEAN IsHexDigit( IN char chTmp ) { if( (chTmp >= '0' && chTmp <= '9') || (chTmp >= 'a' && chTmp <= 'f') || (chTmp >= 'A' && chTmp <= 'F') ) { return _TRUE; } else { return _FALSE; } } // // Description: // Translate a character to hex digit. // u32 MapCharToHexDigit( IN char chTmp ) { if(chTmp >= '0' && chTmp <= '9') return (chTmp - '0'); else if(chTmp >= 'a' && chTmp <= 'f') return (10 + (chTmp - 'a')); else if(chTmp >= 'A' && chTmp <= 'F') return (10 + (chTmp - 'A')); else return 0; } // // Description: // Parse hex number from the string pucStr. // BOOLEAN GetHexValueFromString( IN char* szStr, IN OUT u32* pu4bVal, IN OUT u32* pu4bMove ) { char* szScan = szStr; // Check input parameter. if(szStr == NULL || pu4bVal == NULL || pu4bMove == NULL) { DBG_871X("GetHexValueFromString(): Invalid inpur argumetns! szStr: %p, pu4bVal: %p, pu4bMove: %p\n", szStr, pu4bVal, pu4bMove); return _FALSE; } // Initialize output. *pu4bMove = 0; *pu4bVal = 0; // Skip leading space. while( *szScan != '\0' && (*szScan == ' ' || *szScan == '\t') ) { szScan++; (*pu4bMove)++; } // Skip leading '0x' or '0X'. if(*szScan == '0' && (*(szScan+1) == 'x' || *(szScan+1) == 'X')) { szScan += 2; (*pu4bMove) += 2; } // Check if szScan is now pointer to a character for hex digit, // if not, it means this is not a valid hex number. if(!IsHexDigit(*szScan)) { return _FALSE; } // Parse each digit. do { (*pu4bVal) <<= 4; *pu4bVal += MapCharToHexDigit(*szScan); szScan++; (*pu4bMove)++; } while(IsHexDigit(*szScan)); return _TRUE; } BOOLEAN GetFractionValueFromString( IN char* szStr, IN OUT u8* pInteger, IN OUT u8* pFraction, IN OUT u32* pu4bMove ) { char *szScan = szStr; // Initialize output. *pu4bMove = 0; *pInteger = 0; *pFraction = 0; // Skip leading space. while ( *szScan != '\0' && (*szScan == ' ' || *szScan == '\t') ) { ++szScan; ++(*pu4bMove); } // Parse each digit. do { (*pInteger) *= 10; *pInteger += ( *szScan - '0' ); ++szScan; ++(*pu4bMove); if ( *szScan == '.' ) { ++szScan; ++(*pu4bMove); if ( *szScan < '0' || *szScan > '9' ) return _FALSE; else { *pFraction = *szScan - '0'; ++szScan; ++(*pu4bMove); return _TRUE; } } } while(*szScan >= '0' && *szScan <= '9'); return _TRUE; } // // Description: // Return TRUE if szStr is comment out with leading "//". // BOOLEAN IsCommentString( IN char *szStr ) { if(*szStr == '/' && *(szStr+1) == '/') { return _TRUE; } else { return _FALSE; } } BOOLEAN GetU1ByteIntegerFromStringInDecimal( IN char* Str, IN OUT u8* pInt ) { u16 i = 0; *pInt = 0; while ( Str[i] != '\0' ) { if ( Str[i] >= '0' && Str[i] <= '9' ) { *pInt *= 10; *pInt += ( Str[i] - '0' ); } else { return _FALSE; } ++i; } return _TRUE; } // <20121004, Kordan> For example, // ParseQualifiedString(inString, 0, outString, '[', ']') gets "Kordan" from a string "Hello [Kordan]". // If RightQualifier does not exist, it will hang on in the while loop BOOLEAN ParseQualifiedString( IN char* In, IN OUT u32* Start, OUT char* Out, IN char LeftQualifier, IN char RightQualifier ) { u32 i = 0, j = 0; char c = In[(*Start)++]; if (c != LeftQualifier) return _FALSE; i = (*Start); while ((c = In[(*Start)++]) != RightQualifier) ; // find ']' j = (*Start) - 2; strncpy((char *)Out, (const char*)(In+i), j-i+1); return _TRUE; } BOOLEAN isAllSpaceOrTab( u8* data, u8 size ) { u8 cnt = 0, NumOfSpaceAndTab = 0; while( size > cnt ) { if ( data[cnt] == ' ' || data[cnt] == '\t' || data[cnt] == '\0' ) ++NumOfSpaceAndTab; ++cnt; } return size == NumOfSpaceAndTab; } void rtw_hal_check_rxfifo_full(_adapter *adapter) { struct dvobj_priv *psdpriv = adapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); int save_cnt=_FALSE; //switch counter to RX fifo if(IS_81XXC(pHalData->VersionID) || IS_92D(pHalData->VersionID) || IS_8188E(pHalData->VersionID) || IS_8723_SERIES(pHalData->VersionID) || IS_8812_SERIES(pHalData->VersionID) || IS_8821_SERIES(pHalData->VersionID)) { rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xa0); save_cnt = _TRUE; } else if(IS_8723B_SERIES(pHalData->VersionID) || IS_8192E(pHalData->VersionID)) { //printk("8723b or 8192e , MAC_667 set 0xf0\n"); rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xf0); save_cnt = _TRUE; } //todo: other chips if(save_cnt) { //rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xa0); pdbgpriv->dbg_rx_fifo_last_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow; pdbgpriv->dbg_rx_fifo_curr_overflow = rtw_read16(adapter, REG_RXERR_RPT); pdbgpriv->dbg_rx_fifo_diff_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow-pdbgpriv->dbg_rx_fifo_last_overflow; } } void linked_info_dump(_adapter *padapter,u8 benable) { struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); if(padapter->bLinkInfoDump == benable) return; DBG_871X("%s %s \n",__FUNCTION__,(benable)?"enable":"disable"); if(benable){ #ifdef CONFIG_LPS pwrctrlpriv->org_power_mgnt = pwrctrlpriv->power_mgnt;//keep org value rtw_pm_set_lps(padapter,PS_MODE_ACTIVE); #endif #ifdef CONFIG_IPS pwrctrlpriv->ips_org_mode = pwrctrlpriv->ips_mode;//keep org value rtw_pm_set_ips(padapter,IPS_NONE); #endif } else{ #ifdef CONFIG_IPS rtw_pm_set_ips(padapter, pwrctrlpriv->ips_org_mode); #endif // CONFIG_IPS #ifdef CONFIG_LPS rtw_pm_set_lps(padapter, pwrctrlpriv->org_power_mgnt ); #endif // CONFIG_LPS } padapter->bLinkInfoDump = benable ; } #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA void rtw_get_raw_rssi_info(void *sel, _adapter *padapter) { u8 isCCKrate,rf_path; PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info; DBG_871X_SEL_NL(sel,"RxRate = %s, PWDBALL = %d(%%), rx_pwr_all = %d(dBm)\n", HDATA_RATE(psample_pkt_rssi->data_rate), psample_pkt_rssi->pwdball, psample_pkt_rssi->pwr_all); isCCKrate = (psample_pkt_rssi->data_rate <= DESC_RATE11M)?TRUE :FALSE; if(isCCKrate) psample_pkt_rssi->mimo_singal_strength[0] = psample_pkt_rssi->pwdball; for(rf_path = 0;rf_pathNumTotalRFPath;rf_path++) { DBG_871X_SEL_NL(sel,"RF_PATH_%d=>singal_strength:%d(%%),singal_quality:%d(%%)\n" ,rf_path,psample_pkt_rssi->mimo_singal_strength[rf_path],psample_pkt_rssi->mimo_singal_quality[rf_path]); if(!isCCKrate){ DBG_871X_SEL_NL(sel,"\trx_ofdm_pwr:%d(dBm),rx_ofdm_snr:%d(dB)\n", psample_pkt_rssi->ofdm_pwr[rf_path],psample_pkt_rssi->ofdm_snr[rf_path]); } } } void rtw_dump_raw_rssi_info(_adapter *padapter) { u8 isCCKrate,rf_path; PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info; DBG_871X("============ RAW Rx Info dump ===================\n"); DBG_871X("RxRate = %s, PWDBALL = %d(%%), rx_pwr_all = %d(dBm)\n", HDATA_RATE(psample_pkt_rssi->data_rate), psample_pkt_rssi->pwdball, psample_pkt_rssi->pwr_all); isCCKrate = (psample_pkt_rssi->data_rate <= DESC_RATE11M)?TRUE :FALSE; if(isCCKrate) psample_pkt_rssi->mimo_singal_strength[0] = psample_pkt_rssi->pwdball; for(rf_path = 0;rf_pathNumTotalRFPath;rf_path++) { DBG_871X("RF_PATH_%d=>singal_strength:%d(%%),singal_quality:%d(%%)" ,rf_path,psample_pkt_rssi->mimo_singal_strength[rf_path],psample_pkt_rssi->mimo_singal_quality[rf_path]); if(!isCCKrate){ printk(",rx_ofdm_pwr:%d(dBm),rx_ofdm_snr:%d(dB)\n", psample_pkt_rssi->ofdm_pwr[rf_path],psample_pkt_rssi->ofdm_snr[rf_path]); }else{ printk("\n"); } } } void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe) { u8 isCCKrate,rf_path; PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; PODM_PHY_INFO_T pPhyInfo = (PODM_PHY_INFO_T)(&pattrib->phy_info); struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info; psample_pkt_rssi->data_rate = pattrib->data_rate; isCCKrate = (pattrib->data_rate <= DESC_RATE11M)?TRUE :FALSE; psample_pkt_rssi->pwdball = pPhyInfo->RxPWDBAll; psample_pkt_rssi->pwr_all = pPhyInfo->RecvSignalPower; for(rf_path = 0;rf_pathNumTotalRFPath;rf_path++) { psample_pkt_rssi->mimo_singal_strength[rf_path] = pPhyInfo->RxMIMOSignalStrength[rf_path]; psample_pkt_rssi->mimo_singal_quality[rf_path] = pPhyInfo->RxMIMOSignalQuality[rf_path]; if(!isCCKrate){ psample_pkt_rssi->ofdm_pwr[rf_path] = pPhyInfo->RxPwr[rf_path]; psample_pkt_rssi->ofdm_snr[rf_path] = pPhyInfo->RxSNR[rf_path]; } } } #endif #ifdef CONFIG_EFUSE_CONFIG_FILE int check_phy_efuse_tx_power_info_valid(PADAPTER padapter) { EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); u8* pContent = pEEPROM->efuse_eeprom_data; int index = 0; u16 tx_index_offset = 0x0000; switch(padapter->chip_type) { case RTL8723B: tx_index_offset = EEPROM_TX_PWR_INX_8723B; break; case RTL8188E: tx_index_offset = EEPROM_TX_PWR_INX_88E; break; case RTL8192E: tx_index_offset = EEPROM_TX_PWR_INX_8192E; break; default: tx_index_offset = 0x0010; break; } for (index = 0 ; index < 12 ; index++) { if (pContent[tx_index_offset + index] == 0xFF) { return _FALSE; } else { DBG_871X("0x%02x ,", pContent[EEPROM_TX_PWR_INX_88E+index]); } } DBG_871X("\n"); return _TRUE; } int check_phy_efuse_macaddr_info_valid(PADAPTER padapter) { u8 val = 0; u16 addr_offset = 0x0000; switch(padapter->chip_type) { case RTL8723B: if (padapter->interface_type == RTW_USB) { addr_offset = EEPROM_MAC_ADDR_8723BU; DBG_871X("%s: interface is USB\n", __func__); } else if (padapter->interface_type == RTW_SDIO) { addr_offset = EEPROM_MAC_ADDR_8723BS; DBG_871X("%s: interface is SDIO\n", __func__); } else if (padapter->interface_type == RTW_PCIE) { addr_offset = EEPROM_MAC_ADDR_8723BE; DBG_871X("%s: interface is PCIE\n", __func__); } else if (padapter->interface_type == RTW_GSPI) { //addr_offset = EEPROM_MAC_ADDR_8723BS; DBG_871X("%s: interface is GSPI\n", __func__); } break; case RTL8188E: if (padapter->interface_type == RTW_USB) { addr_offset = EEPROM_MAC_ADDR_88EU; DBG_871X("%s: interface is USB\n", __func__); } else if (padapter->interface_type == RTW_SDIO) { addr_offset = EEPROM_MAC_ADDR_88ES; DBG_871X("%s: interface is SDIO\n", __func__); } else if (padapter->interface_type == RTW_PCIE) { addr_offset = EEPROM_MAC_ADDR_88EE; DBG_871X("%s: interface is PCIE\n", __func__); } else if (padapter->interface_type == RTW_GSPI) { //addr_offset = EEPROM_MAC_ADDR_8723BS; DBG_871X("%s: interface is GSPI\n", __func__); } break; } if (addr_offset == 0x0000) { DBG_871X("phy efuse MAC addr offset is 0!!\n"); return _FALSE; } else { rtw_efuse_map_read(padapter, addr_offset, 1, &val); } if (val == 0xFF) { return _FALSE; } else { DBG_871X("phy efuse with valid MAC addr\n"); return _TRUE; } } u32 Hal_readPGDataFromConfigFile( PADAPTER padapter, struct file *fp) { u32 i; mm_segment_t fs; u8 temp[3]; loff_t pos = 0; EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); u8 *PROMContent = pEEPROM->efuse_eeprom_data; temp[2] = 0; // add end of string '\0' fs = get_fs(); set_fs(KERNEL_DS); for (i = 0 ; i < HWSET_MAX_SIZE ; i++) { vfs_read(fp, temp, 2, &pos); PROMContent[i] = simple_strtoul(temp, NULL, 16); if ((i % EFUSE_FILE_COLUMN_NUM) == (EFUSE_FILE_COLUMN_NUM - 1)) { //Filter the lates space char. vfs_read(fp, temp, 1, &pos); if (strchr(temp, ' ') == NULL) { pos--; vfs_read(fp, temp, 2, &pos); } } else { pos += 1; // Filter the space character } } set_fs(fs); pEEPROM->bloadfile_fail_flag = _FALSE; #ifdef CONFIG_DEBUG DBG_871X("Efuse configure file:\n"); for (i=0; imac_addr, 0, ETH_ALEN); fs = get_fs(); set_fs(KERNEL_DS); DBG_871X("wifi mac address:\n"); vfs_read(fp, source_addr, 18, &pos); source_addr[17] = ':'; head = end = source_addr; for (i=0; imac_addr[i] = simple_strtoul(head, NULL, 16 ); if (end) { end++; head = end; } } set_fs(fs); pEEPROM->bloadmac_fail_flag = _FALSE; if (rtw_check_invalid_mac_address(pEEPROM->mac_addr) == _TRUE) { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33)) get_random_bytes(pEEPROM->mac_addr, ETH_ALEN); pEEPROM->mac_addr[0] = 0x00; pEEPROM->mac_addr[1] = 0xe0; pEEPROM->mac_addr[2] = 0x4c; #else pEEPROM->mac_addr[0] = 0x00; pEEPROM->mac_addr[1] = 0xe0; pEEPROM->mac_addr[2] = 0x4c; pEEPROM->mac_addr[3] = (u8)(curtime & 0xff) ; pEEPROM->mac_addr[4] = (u8)((curtime>>8) & 0xff) ; pEEPROM->mac_addr[5] = (u8)((curtime>>16) & 0xff) ; #endif DBG_871X("MAC Address from wifimac error is invalid, assign random MAC !!!\n"); } DBG_871X("%s: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", __func__, pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], pEEPROM->mac_addr[4], pEEPROM->mac_addr[5]); } void Hal_GetPhyEfuseMACAddr(PADAPTER padapter, u8* mac_addr) { int i = 0; u16 addr_offset = 0x0000; switch(padapter->chip_type) { case RTL8723B: if (padapter->interface_type == RTW_USB) { addr_offset = EEPROM_MAC_ADDR_8723BU; DBG_871X("%s: interface is USB\n", __func__); } else if (padapter->interface_type == RTW_SDIO) { addr_offset = EEPROM_MAC_ADDR_8723BS; DBG_871X("%s: interface is SDIO\n", __func__); } else if (padapter->interface_type == RTW_PCIE) { addr_offset = EEPROM_MAC_ADDR_8723BE; DBG_871X("%s: interface is PCIE\n", __func__); } else if (padapter->interface_type == RTW_GSPI){ //addr_offset = EEPROM_MAC_ADDR_8723BS; DBG_871X("%s: interface is GSPI\n", __func__); } break; case RTL8188E: if (padapter->interface_type == RTW_USB) { addr_offset = EEPROM_MAC_ADDR_88EU; DBG_871X("%s: interface is USB\n", __func__); } else if (padapter->interface_type == RTW_SDIO) { addr_offset = EEPROM_MAC_ADDR_88ES; DBG_871X("%s: interface is SDIO\n", __func__); } else if (padapter->interface_type == RTW_PCIE) { addr_offset = EEPROM_MAC_ADDR_88EE; DBG_871X("%s: interface is PCIE\n", __func__); } else if (padapter->interface_type == RTW_GSPI){ //addr_offset = EEPROM_MAC_ADDR_8723BS; DBG_871X("%s: interface is GSPI\n", __func__); } break; } rtw_efuse_map_read(padapter, addr_offset, ETH_ALEN, mac_addr); if (rtw_check_invalid_mac_address(mac_addr) == _TRUE) { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33)) get_random_bytes(mac_addr, ETH_ALEN); mac_addr[0] = 0x00; mac_addr[1] = 0xe0; mac_addr[2] = 0x4c; #else mac_addr[0] = 0x00; mac_addr[1] = 0xe0; mac_addr[2] = 0x4c; mac_addr[3] = (u8)(curtime & 0xff) ; mac_addr[4] = (u8)((curtime>>8) & 0xff) ; mac_addr[5] = (u8)((curtime>>16) & 0xff) ; #endif DBG_871X("MAC Address from phy efuse error, assign random MAC !!!\n"); } DBG_871X("%s: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", __func__, mac_addr[0], mac_addr[1], mac_addr[2], mac_addr[3], mac_addr[4], mac_addr[5]); } #endif //CONFIG_EFUSE_CONFIG_FILE #ifdef CONFIG_RF_GAIN_OFFSET u32 Array_kfreemap[] = { 0x08,0xe, 0x06,0xc, 0x04,0xa, 0x02,0x8, 0x00,0x6, 0x03,0x4, 0x05,0x2, 0x07,0x0, 0x09,0x0, 0x0c,0x0, }; void rtw_bb_rf_gain_offset(_adapter *padapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); u8 value = padapter->eeprompriv.EEPROMRFGainOffset; u8 tmp = 0x3e; u32 res,i=0; u4Byte ArrayLen = sizeof(Array_kfreemap)/sizeof(u32); pu4Byte Array = Array_kfreemap; u4Byte v1=0,v2=0,GainValue,target=0; //DBG_871X("+%s value: 0x%02x+\n", __func__, value); #if defined(CONFIG_RTL8723A) if (value & BIT0) { DBG_871X("Offset RF Gain.\n"); DBG_871X("Offset RF Gain. padapter->eeprompriv.EEPROMRFGainVal=0x%x\n",padapter->eeprompriv.EEPROMRFGainVal); if(padapter->eeprompriv.EEPROMRFGainVal != 0xff){ res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0xd, 0xffffffff); DBG_871X("Offset RF Gain. reg 0xd=0x%x\n",res); res &= 0xfff87fff; res |= (padapter->eeprompriv.EEPROMRFGainVal & 0x0f)<< 15; DBG_871X("Offset RF Gain. reg 0xd=0x%x\n",res); rtw_hal_write_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET_CCK, RF_GAIN_OFFSET_MASK, res); res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0xe, 0xffffffff); DBG_871X("Offset RF Gain. reg 0xe=0x%x\n",res); res &= 0xfffffff0; res |= (padapter->eeprompriv.EEPROMRFGainVal & 0x0f); DBG_871X("Offset RF Gain. reg 0xe=0x%x\n",res); rtw_hal_write_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET_OFDM, RF_GAIN_OFFSET_MASK, res); } else { DBG_871X("Offset RF Gain. padapter->eeprompriv.EEPROMRFGainVal=0x%x != 0xff, didn't run Kfree\n",padapter->eeprompriv.EEPROMRFGainVal); } } else { DBG_871X("Using the default RF gain.\n"); } #elif defined(CONFIG_RTL8723B) if (value & BIT4) { DBG_871X("Offset RF Gain.\n"); DBG_871X("Offset RF Gain. padapter->eeprompriv.EEPROMRFGainVal=0x%x\n",padapter->eeprompriv.EEPROMRFGainVal); if(padapter->eeprompriv.EEPROMRFGainVal != 0xff){ if(pHalData->ant_path == ODM_RF_PATH_A) { GainValue=(padapter->eeprompriv.EEPROMRFGainVal & 0x0f); } else { GainValue=(padapter->eeprompriv.EEPROMRFGainVal & 0xf0)>>4; } DBG_871X("Ant PATH_%d GainValue Offset = 0x%x\n",(pHalData->ant_path == ODM_RF_PATH_A) ? (ODM_RF_PATH_A) : (ODM_RF_PATH_B),GainValue); for (i = 0; i < ArrayLen; i += 2 ) { //DBG_871X("ArrayLen in =%d ,Array 1 =0x%x ,Array2 =0x%x \n",i,Array[i],Array[i]+1); v1 = Array[i]; v2 = Array[i+1]; if ( v1 == GainValue ) { DBG_871X("Offset RF Gain. got v1 =0x%x ,v2 =0x%x \n",v1,v2); target=v2; break; } } DBG_871X("padapter->eeprompriv.EEPROMRFGainVal=0x%x ,Gain offset Target Value=0x%x\n",padapter->eeprompriv.EEPROMRFGainVal,target); res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff); DBG_871X("Offset RF Gain. before reg 0x7f=0x%08x\n",res); PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18|BIT17|BIT16|BIT15, target); res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff); DBG_871X("Offset RF Gain. After reg 0x7f=0x%08x\n",res); }else { DBG_871X("Offset RF Gain. padapter->eeprompriv.EEPROMRFGainVal=0x%x != 0xff, didn't run Kfree\n",padapter->eeprompriv.EEPROMRFGainVal); } } else { DBG_871X("Using the default RF gain.\n"); } #elif defined(CONFIG_RTL8188E) if (value & BIT4) { DBG_871X("8188ES Offset RF Gain.\n"); DBG_871X("8188ES Offset RF Gain. EEPROMRFGainVal=0x%x\n", padapter->eeprompriv.EEPROMRFGainVal); if (padapter->eeprompriv.EEPROMRFGainVal != 0xff) { res = rtw_hal_read_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, 0xffffffff); DBG_871X("Offset RF Gain. reg 0x55=0x%x\n",res); res &= 0xfff87fff; res |= (padapter->eeprompriv.EEPROMRFGainVal & 0x0f) << 15; DBG_871X("Offset RF Gain. res=0x%x\n",res); rtw_hal_write_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, RF_GAIN_OFFSET_MASK, res); } else { DBG_871X("Offset RF Gain. EEPROMRFGainVal=0x%x == 0xff, didn't run Kfree\n", padapter->eeprompriv.EEPROMRFGainVal); } } else { DBG_871X("Using the default RF gain.\n"); } #else if (!(value & 0x01)) { //DBG_871X("Offset RF Gain.\n"); res = rtw_hal_read_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, 0xffffffff); value &= tmp; res = value << 14; rtw_hal_write_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, RF_GAIN_OFFSET_MASK, res); } else { DBG_871X("Using the default RF gain.\n"); } #endif } #endif //CONFIG_RF_GAIN_OFFSET //To avoid RX affect TX throughput void dm_DynamicUsbTxAgg(_adapter *padapter, u8 from_timer) { struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); #ifdef CONFIG_USB_RX_AGGREGATION if(IS_HARDWARE_TYPE_8821U(padapter) )//|| IS_HARDWARE_TYPE_8192EU(padapter)) { //This AGG_PH_TH only for UsbRxAggMode == USB_RX_AGG_USB if((pHalData->UsbRxAggMode == USB_RX_AGG_USB) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) { if(pdvobjpriv->traffic_stat.cur_tx_tp > 2 && pdvobjpriv->traffic_stat.cur_rx_tp < 30) rtw_write16(padapter, REG_RXDMA_AGG_PG_TH,0x1003); else rtw_write16(padapter, REG_RXDMA_AGG_PG_TH,0x2005); //dmc agg th 20K //DBG_871X("TX_TP=%u, RX_TP=%u \n", pdvobjpriv->traffic_stat.cur_tx_tp, pdvobjpriv->traffic_stat.cur_rx_tp); } } #endif } //bus-agg check for SoftAP mode inline u8 rtw_hal_busagg_qsel_check(_adapter *padapter,u8 pre_qsel,u8 next_qsel) { struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); u8 chk_rst = _SUCCESS; if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) return chk_rst; //if((pre_qsel == 0xFF)||(next_qsel== 0xFF)) // return chk_rst; if( ((pre_qsel == QSLT_HIGH)||((next_qsel== QSLT_HIGH))) && (pre_qsel != next_qsel )){ //DBG_871X("### bus-agg break cause of qsel misatch, pre_qsel=0x%02x,next_qsel=0x%02x ###\n", // pre_qsel,next_qsel); chk_rst = _FAIL; } return chk_rst; } /* * Description: * dump_TX_FIFO: This is only used to dump TX_FIFO for debug WoW mode offload * contant. * * Input: * adapter: adapter pointer. * page_num: The max. page number that user want to dump. * page_size: page size of each page. eg. 128 bytes, 256 bytes. */ void dump_TX_FIFO(_adapter* padapter, u8 page_num, u16 page_size){ int i; u8 val = 0; u8 base = 0; u32 addr = 0; u32 count = (page_size / 8); if (page_num <= 0) { DBG_871X("!!%s: incorrect input page_num paramter!\n", __func__); return; } if (page_size < 128 || page_size > 256) { DBG_871X("!!%s: incorrect input page_size paramter!\n", __func__); return; } DBG_871X("+%s+\n", __func__); val = rtw_read8(padapter, 0x106); rtw_write8(padapter, 0x106, 0x69); DBG_871X("0x106: 0x%02x\n", val); base = rtw_read8(padapter, 0x209); DBG_871X("0x209: 0x%02x\n", base); addr = ((base) * page_size)/8; for (i = 0 ; i < page_num * count ; i+=2) { rtw_write32(padapter, 0x140, addr + i); printk(" %08x %08x ", rtw_read32(padapter, 0x144), rtw_read32(padapter, 0x148)); rtw_write32(padapter, 0x140, addr + i + 1); printk(" %08x %08x \n", rtw_read32(padapter, 0x144), rtw_read32(padapter, 0x148)); } } #ifdef CONFIG_GPIO_API u8 rtw_hal_get_gpio(_adapter* adapter, u8 gpio_num) { u8 value; u8 direction; struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); rtw_ps_deny(adapter, PS_DENY_IOCTL); DBG_871X("rf_pwrstate=0x%02x\n", pwrpriv->rf_pwrstate); LeaveAllPowerSaveModeDirect(adapter); /* Read GPIO Direction */ direction = (rtw_read8(adapter,REG_GPIO_PIN_CTRL + 2) & BIT(gpio_num)) >> gpio_num; /* According the direction to read register value */ if( direction ) value = (rtw_read8(adapter, REG_GPIO_PIN_CTRL + 1)& BIT(gpio_num)) >> gpio_num; else value = (rtw_read8(adapter, REG_GPIO_PIN_CTRL)& BIT(gpio_num)) >> gpio_num; rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); DBG_871X("%s direction=%d value=%d\n",__FUNCTION__,direction,value); return value; } int rtw_hal_set_gpio_output_value(_adapter* adapter, u8 gpio_num, BOOLEAN isHigh) { u8 direction = 0; u8 res = -1; if (IS_HARDWARE_TYPE_8188E(adapter)){ /* Check GPIO is 4~7 */ if( gpio_num > 7 || gpio_num < 4) { DBG_871X("%s The gpio number does not included 4~7.\n",__FUNCTION__); return -1; } } rtw_ps_deny(adapter, PS_DENY_IOCTL); LeaveAllPowerSaveModeDirect(adapter); /* Read GPIO direction */ direction = (rtw_read8(adapter,REG_GPIO_PIN_CTRL + 2) & BIT(gpio_num)) >> gpio_num; /* If GPIO is output direction, setting value. */ if( direction ) { if(isHigh) rtw_write8(adapter, REG_GPIO_PIN_CTRL + 1, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 1) | BIT(gpio_num)); else rtw_write8(adapter, REG_GPIO_PIN_CTRL + 1, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 1) & ~BIT(gpio_num)); DBG_871X("%s Set gpio %x[%d]=%d\n",__FUNCTION__,REG_GPIO_PIN_CTRL+1,gpio_num,isHigh ); res = 0; } else { DBG_871X("%s The gpio is input,not be set!\n",__FUNCTION__); res = -1; } rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); return res; } int rtw_hal_config_gpio(_adapter* adapter, u8 gpio_num, BOOLEAN isOutput) { if (IS_HARDWARE_TYPE_8188E(adapter)){ if( gpio_num > 7 || gpio_num < 4) { DBG_871X("%s The gpio number does not included 4~7.\n",__FUNCTION__); return -1; } } DBG_871X("%s gpio_num =%d direction=%d\n",__FUNCTION__,gpio_num,isOutput); rtw_ps_deny(adapter, PS_DENY_IOCTL); LeaveAllPowerSaveModeDirect(adapter); if( isOutput ) { rtw_write8(adapter, REG_GPIO_PIN_CTRL + 2, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 2) | BIT(gpio_num)); } else { rtw_write8(adapter, REG_GPIO_PIN_CTRL + 2, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 2) & ~BIT(gpio_num)); } rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); return 0; } #endifrtl8812au-4.3.8.12175.20140902+dfsg/hal/hal_com_phycfg.c000066400000000000000000003671101261122257400213610ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _HAL_COM_PHYCFG_C_ #include #include // // Description: // Map Tx power index into dBm according to // current HW model, for example, RF and PA, and // current wireless mode. // By Bruce, 2008-01-29. // s32 phy_TxPwrIdxToDbm( IN PADAPTER Adapter, IN WIRELESS_MODE WirelessMode, IN u8 TxPwrIdx ) { s32 Offset = 0; s32 PwrOutDbm = 0; // // Tested by MP, we found that CCK Index 0 equals to -7dbm, OFDM legacy equals to -8dbm. // Note: // The mapping may be different by different NICs. Do not use this formula for what needs accurate result. // By Bruce, 2008-01-29. // switch(WirelessMode) { case WIRELESS_MODE_B: Offset = -7; break; case WIRELESS_MODE_G: case WIRELESS_MODE_N_24G: Offset = -8; break; default: //for MacOSX compiler warning break; } PwrOutDbm = TxPwrIdx / 2 + Offset; // Discard the decimal part. return PwrOutDbm; } u8 PHY_GetTxPowerByRateBase( IN PADAPTER Adapter, IN u8 Band, IN u8 RfPath, IN u8 TxNum, IN RATE_SECTION RateSection ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u8 value = 0; if ( RfPath > ODM_RF_PATH_D ) { DBG_871X("Invalid Rf Path %d in PHY_GetTxPowerByRateBase()\n", RfPath ); return 0; } if ( Band == BAND_ON_2_4G ) { switch ( RateSection ) { case CCK: value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][0]; break; case OFDM: value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][1]; break; case HT_MCS0_MCS7: value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][2]; break; case HT_MCS8_MCS15: value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][3]; break; case HT_MCS16_MCS23: value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][4]; break; case HT_MCS24_MCS31: value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][5]; break; case VHT_1SSMCS0_1SSMCS9: value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][6]; break; case VHT_2SSMCS0_2SSMCS9: value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][7]; break; case VHT_3SSMCS0_3SSMCS9: value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][8]; break; case VHT_4SSMCS0_4SSMCS9: value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][9]; break; default: DBG_871X("Invalid RateSection %d in Band 2.4G, Rf Path %d, %dTx in PHY_GetTxPowerByRateBase()\n", RateSection, RfPath, TxNum ); break; }; } else if ( Band == BAND_ON_5G ) { switch ( RateSection ) { case OFDM: value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][0]; break; case HT_MCS0_MCS7: value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][1]; break; case HT_MCS8_MCS15: value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][2]; break; case HT_MCS16_MCS23: value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][3]; break; case HT_MCS24_MCS31: value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][4]; break; case VHT_1SSMCS0_1SSMCS9: value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][5]; break; case VHT_2SSMCS0_2SSMCS9: value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][6]; break; case VHT_3SSMCS0_3SSMCS9: value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][7]; break; case VHT_4SSMCS0_4SSMCS9: value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][8]; break; default: DBG_871X("Invalid RateSection %d in Band 5G, Rf Path %d, %dTx in PHY_GetTxPowerByRateBase()\n", RateSection, RfPath, TxNum ); break; }; } else { DBG_871X("Invalid Band %d in PHY_GetTxPowerByRateBase()\n", Band ); } return value; } VOID phy_SetTxPowerByRateBase( IN PADAPTER Adapter, IN u8 Band, IN u8 RfPath, IN RATE_SECTION RateSection, IN u8 TxNum, IN u8 Value ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); if ( RfPath > ODM_RF_PATH_D ) { DBG_871X("Invalid Rf Path %d in phy_SetTxPowerByRatBase()\n", RfPath ); return; } if ( Band == BAND_ON_2_4G ) { switch ( RateSection ) { case CCK: pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][0] = Value; break; case OFDM: pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][1] = Value; break; case HT_MCS0_MCS7: pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][2] = Value; break; case HT_MCS8_MCS15: pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][3] = Value; break; case HT_MCS16_MCS23: pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][4] = Value; break; case HT_MCS24_MCS31: pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][5] = Value; break; case VHT_1SSMCS0_1SSMCS9: pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][6] = Value; break; case VHT_2SSMCS0_2SSMCS9: pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][7] = Value; break; case VHT_3SSMCS0_3SSMCS9: pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][8] = Value; break; case VHT_4SSMCS0_4SSMCS9: pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][9] = Value; break; default: DBG_871X("Invalid RateSection %d in Band 2.4G, Rf Path %d, %dTx in phy_SetTxPowerByRateBase()\n", RateSection, RfPath, TxNum ); break; }; } else if ( Band == BAND_ON_5G ) { switch ( RateSection ) { case OFDM: pHalData->TxPwrByRateBase5G[RfPath][TxNum][0] = Value; break; case HT_MCS0_MCS7: pHalData->TxPwrByRateBase5G[RfPath][TxNum][1] = Value; break; case HT_MCS8_MCS15: pHalData->TxPwrByRateBase5G[RfPath][TxNum][2] = Value; break; case HT_MCS16_MCS23: pHalData->TxPwrByRateBase5G[RfPath][TxNum][3] = Value; break; case HT_MCS24_MCS31: pHalData->TxPwrByRateBase5G[RfPath][TxNum][4] = Value; break; case VHT_1SSMCS0_1SSMCS9: pHalData->TxPwrByRateBase5G[RfPath][TxNum][5] = Value; break; case VHT_2SSMCS0_2SSMCS9: pHalData->TxPwrByRateBase5G[RfPath][TxNum][6] = Value; break; case VHT_3SSMCS0_3SSMCS9: pHalData->TxPwrByRateBase5G[RfPath][TxNum][7] = Value; break; case VHT_4SSMCS0_4SSMCS9: pHalData->TxPwrByRateBase5G[RfPath][TxNum][8] = Value; break; default: DBG_871X("Invalid RateSection %d in Band 5G, Rf Path %d, %dTx in phy_SetTxPowerByRateBase()\n", RateSection, RfPath, TxNum ); break; }; } else { DBG_871X("Invalid Band %d in phy_SetTxPowerByRateBase()\n", Band ); } } VOID phy_StoreTxPowerByRateBaseOld( IN PADAPTER pAdapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA( pAdapter ); u16 rawValue = 0; u8 base = 0; u8 path = 0; rawValue = ( u16 ) ( pHalData->MCSTxPowerLevelOriginalOffset[0][7] >> 8 ) & 0xFF; base = ( rawValue >> 4 ) * 10 + ( rawValue & 0xF ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_A, CCK, RF_1TX, base ); rawValue = ( u16 ) ( pHalData->MCSTxPowerLevelOriginalOffset[0][1] >> 24 ) & 0xFF; base = ( rawValue >> 4 ) * 10 + ( rawValue & 0xF ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_A, OFDM, RF_1TX, base ); rawValue = ( u16 ) ( pHalData->MCSTxPowerLevelOriginalOffset[0][3] >> 24 ) & 0xFF; base = ( rawValue >> 4 ) * 10 + ( rawValue & 0xF ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_A, HT_MCS0_MCS7, RF_1TX, base ); rawValue = ( u16 ) ( pHalData->MCSTxPowerLevelOriginalOffset[0][5] >> 24 ) & 0xFF; base = ( rawValue >> 4) * 10 + ( rawValue & 0xF ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_A, HT_MCS8_MCS15, RF_2TX, base ); rawValue = ( u16 ) ( pHalData->MCSTxPowerLevelOriginalOffset[0][7] & 0xFF ); base = ( rawValue >> 4 ) * 10 + ( rawValue & 0xF ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_B, CCK, RF_1TX, base ); rawValue = ( u16 ) ( pHalData->MCSTxPowerLevelOriginalOffset[0][9] >> 24 ) & 0xFF; base = ( rawValue >> 4 ) * 10 + ( rawValue & 0xF ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_B, OFDM, RF_1TX, base ); rawValue = ( u16 ) ( pHalData->MCSTxPowerLevelOriginalOffset[0][11] >> 24 ) & 0xFF; base = ( rawValue >> 4 ) * 10 + ( rawValue & 0xF ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_B, HT_MCS0_MCS7, RF_1TX, base ); rawValue = ( u16 ) ( pHalData->MCSTxPowerLevelOriginalOffset[0][13] >> 24 ) & 0xFF; base = ( rawValue >> 4 ) * 10 + ( rawValue & 0xF ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_B, HT_MCS8_MCS15, RF_2TX, base ); } VOID phy_StoreTxPowerByRateBase( IN PADAPTER pAdapter ) { u8 path = 0, base = 0, index = 0; //DBG_871X( "===>%s\n", __FUNCTION__ ); for ( path = ODM_RF_PATH_A; path <= ODM_RF_PATH_B; ++path ) { base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_2_4G, path, RF_1TX, MGN_11M ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, path, CCK, RF_1TX, base ); //DBG_871X("Power index base of 2.4G path %d 1Tx CCK = > 0x%x\n", path, base ); base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_2_4G, path, RF_1TX, MGN_54M ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, path, OFDM, RF_1TX, base ); //DBG_871X("Power index base of 2.4G path %d 1Tx OFDM = > 0x%x\n", path, base ); base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_2_4G, path, RF_1TX, MGN_MCS7 ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, path, HT_MCS0_MCS7, RF_1TX, base ); //DBG_871X("Power index base of 2.4G path %d 1Tx MCS0-7 = > 0x%x\n", path, base ); base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_2_4G, path, RF_2TX, MGN_MCS15 ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, path, HT_MCS8_MCS15, RF_2TX, base ); //DBG_871X("Power index base of 2.4G path %d 2Tx MCS8-15 = > 0x%x\n", path, base ); base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_2_4G, path, RF_3TX, MGN_MCS23 ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, path, HT_MCS16_MCS23, RF_3TX, base ); //DBG_871X("Power index base of 2.4G path %d 3Tx MCS16-23 = > 0x%x\n", path, base ); base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_2_4G, path, RF_1TX, MGN_VHT1SS_MCS7 ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, path, VHT_1SSMCS0_1SSMCS9, RF_1TX, base ); //DBG_871X("Power index base of 2.4G path %d 1Tx VHT1SS = > 0x%x\n", path, base ); base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_2_4G, path, RF_2TX, MGN_VHT2SS_MCS7 ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, path, VHT_2SSMCS0_2SSMCS9, RF_2TX, base ); //DBG_871X("Power index base of 2.4G path %d 2Tx VHT2SS = > 0x%x\n", path, base ); base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_2_4G, path, RF_3TX, MGN_VHT3SS_MCS7 ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, path, VHT_3SSMCS0_3SSMCS9, RF_3TX, base ); //DBG_871X("Power index base of 2.4G path %d 3Tx VHT3SS = > 0x%x\n", path, base ); base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_5G, path, RF_1TX, MGN_54M ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_5G, path, OFDM, RF_1TX, base ); //DBG_871X("Power index base of 5G path %d 1Tx OFDM = > 0x%x\n", path, base ); base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_5G, path, RF_1TX, MGN_MCS7 ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_5G, path, HT_MCS0_MCS7, RF_1TX, base ); //DBG_871X("Power index base of 5G path %d 1Tx MCS0~7 = > 0x%x\n", path, base ); base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_5G, path, RF_2TX, MGN_MCS15 ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_5G, path, HT_MCS8_MCS15, RF_2TX, base ); //DBG_871X("Power index base of 5G path %d 2Tx MCS8~15 = > 0x%x\n", path, base ); base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_5G, path, RF_3TX, MGN_MCS23 ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_5G, path, HT_MCS16_MCS23, RF_3TX, base ); //DBG_871X("Power index base of 5G path %d 3Tx MCS16~23 = > 0x%x\n", path, base ); base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_5G, path, RF_1TX, MGN_VHT1SS_MCS7 ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_5G, path, VHT_1SSMCS0_1SSMCS9, RF_1TX, base ); //DBG_871X("Power index base of 5G path %d 1Tx VHT1SS = > 0x%x\n", path, base ); base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_5G, path, RF_2TX, MGN_VHT2SS_MCS7 ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_5G, path, VHT_2SSMCS0_2SSMCS9, RF_2TX, base ); //DBG_871X("Power index base of 5G path %d 2Tx VHT2SS = > 0x%x\n", path, base ); base = PHY_GetTxPowerByRate( pAdapter, BAND_ON_5G, path, RF_3TX, MGN_VHT2SS_MCS7 ); phy_SetTxPowerByRateBase( pAdapter, BAND_ON_5G, path, VHT_3SSMCS0_3SSMCS9, RF_3TX, base ); //DBG_871X("Power index base of 5G path %d 3Tx VHT3SS = > 0x%x\n", path, base ); } //DBG_871X("<===%s\n", __FUNCTION__ ); } u8 PHY_GetRateSectionIndexOfTxPowerByRate( IN PADAPTER pAdapter, IN u32 RegAddr, IN u32 BitMask ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA( pAdapter ); PDM_ODM_T pDM_Odm = &pHalData->odmpriv; u8 index = 0; if ( pDM_Odm->PhyRegPgVersion == 0 ) { switch ( RegAddr ) { case rTxAGC_A_Rate18_06: index = 0; break; case rTxAGC_A_Rate54_24: index = 1; break; case rTxAGC_A_CCK1_Mcs32: index = 6; break; case rTxAGC_B_CCK11_A_CCK2_11: if ( BitMask == bMaskH3Bytes ) index = 7; else if ( BitMask == 0x000000ff ) index = 15; break; case rTxAGC_A_Mcs03_Mcs00: index = 2; break; case rTxAGC_A_Mcs07_Mcs04: index = 3; break; case rTxAGC_A_Mcs11_Mcs08: index = 4; break; case rTxAGC_A_Mcs15_Mcs12: index = 5; break; case rTxAGC_B_Rate18_06: index = 8; break; case rTxAGC_B_Rate54_24: index = 9; break; case rTxAGC_B_CCK1_55_Mcs32: index = 14; break; case rTxAGC_B_Mcs03_Mcs00: index = 10; break; case rTxAGC_B_Mcs07_Mcs04: index = 11; break; case rTxAGC_B_Mcs11_Mcs08: index = 12; break; case rTxAGC_B_Mcs15_Mcs12: index = 13; break; default: DBG_871X("Invalid RegAddr 0x3%x in PHY_GetRateSectionIndexOfTxPowerByRate()", RegAddr ); break; }; } return index; } VOID PHY_GetRateValuesOfTxPowerByRate( IN PADAPTER pAdapter, IN u32 RegAddr, IN u32 BitMask, IN u32 Value, OUT u8* RateIndex, OUT s8* PwrByRateVal, OUT u8* RateNum ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA( pAdapter ); PDM_ODM_T pDM_Odm = &pHalData->odmpriv; u8 index = 0, i = 0; switch ( RegAddr ) { case rTxAGC_A_Rate18_06: case rTxAGC_B_Rate18_06: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_6M ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_9M ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_12M ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_18M ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case rTxAGC_A_Rate54_24: case rTxAGC_B_Rate54_24: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_24M ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_36M ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_48M ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_54M ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case rTxAGC_A_CCK1_Mcs32: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_1M ); PwrByRateVal[0] = ( s8 ) ( ( ( ( Value >> (8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> 8 ) & 0xF ) ); *RateNum = 1; break; case rTxAGC_B_CCK11_A_CCK2_11: if ( BitMask == 0xffffff00 ) { RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_2M ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_5_5M ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_11M ); for ( i = 1; i < 4; ++ i ) { PwrByRateVal[i - 1] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 3; } else if ( BitMask == 0x000000ff ) { RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_11M ); PwrByRateVal[0] = ( s8 ) ( ( ( ( Value >> 4 ) & 0xF ) ) * 10 + ( Value & 0xF ) ); *RateNum = 1; } break; case rTxAGC_A_Mcs03_Mcs00: case rTxAGC_B_Mcs03_Mcs00: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS0 ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS1 ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS2 ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS3 ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case rTxAGC_A_Mcs07_Mcs04: case rTxAGC_B_Mcs07_Mcs04: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS4 ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS5 ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS6 ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS7 ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case rTxAGC_A_Mcs11_Mcs08: case rTxAGC_B_Mcs11_Mcs08: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS8 ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS9 ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS10 ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS11 ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case rTxAGC_A_Mcs15_Mcs12: case rTxAGC_B_Mcs15_Mcs12: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS12 ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS13 ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS14 ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS15 ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case rTxAGC_B_CCK1_55_Mcs32: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_1M ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_2M ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_5_5M ); for ( i = 1; i < 4; ++ i ) { PwrByRateVal[i - 1] = ( s8 ) ( ( ( ( Value >> ( i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> ( i * 8) ) & 0xF ) ); } *RateNum = 3; break; case 0xC20: case 0xE20: case 0x1820: case 0x1a20: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_1M ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_2M ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_5_5M ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_11M ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case 0xC24: case 0xE24: case 0x1824: case 0x1a24: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_6M ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_9M ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_12M ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_18M ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case 0xC28: case 0xE28: case 0x1828: case 0x1a28: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_24M ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_36M ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_48M ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_54M ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case 0xC2C: case 0xE2C: case 0x182C: case 0x1a2C: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS0 ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS1 ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS2 ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS3 ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case 0xC30: case 0xE30: case 0x1830: case 0x1a30: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS4 ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS5 ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS6 ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS7 ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case 0xC34: case 0xE34: case 0x1834: case 0x1a34: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS8 ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS9 ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS10 ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS11 ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case 0xC38: case 0xE38: case 0x1838: case 0x1a38: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS12 ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS13 ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS14 ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS15 ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case 0xC3C: case 0xE3C: case 0x183C: case 0x1a3C: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS0 ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS1 ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS2 ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS3 ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case 0xC40: case 0xE40: case 0x1840: case 0x1a40: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS4 ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS5 ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS6 ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS7 ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case 0xC44: case 0xE44: case 0x1844: case 0x1a44: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS8 ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT1SS_MCS9 ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS0 ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS1 ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case 0xC48: case 0xE48: case 0x1848: case 0x1a48: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS2 ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS3 ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS4 ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS5 ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case 0xC4C: case 0xE4C: case 0x184C: case 0x1a4C: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS6 ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS7 ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS8 ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS9 ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case 0xCD8: case 0xED8: case 0x18D8: case 0x1aD8: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS16 ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS17 ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS18 ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS19 ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case 0xCDC: case 0xEDC: case 0x18DC: case 0x1aDC: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS20 ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS21 ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS22 ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_MCS23 ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case 0xCE0: case 0xEE0: case 0x18E0: case 0x1aE0: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS0 ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS1 ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS2 ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS3 ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case 0xCE4: case 0xEE4: case 0x18E4: case 0x1aE4: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS4 ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS5 ); RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS6 ); RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS7 ); for ( i = 0; i < 4; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; case 0xCE8: case 0xEE8: case 0x18E8: case 0x1aE8: RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS8 ); RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate( MGN_VHT3SS_MCS9 ); for ( i = 0; i < 2; ++ i ) { PwrByRateVal[i] = ( s8 ) ( ( ( ( Value >> (i * 8 + 4) ) & 0xF ) ) * 10 + ( ( Value >> (i * 8) ) & 0xF ) ); } *RateNum = 4; break; default: DBG_871X("Invalid RegAddr 0x%x in %s()\n", RegAddr, __FUNCTION__); break; }; } void PHY_StoreTxPowerByRateNew( IN PADAPTER pAdapter, IN u32 Band, IN u32 RfPath, IN u32 TxNum, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); u8 i = 0, rateIndex[4] = {0}, rateNum = 0; s8 PwrByRateVal[4] = {0}; PHY_GetRateValuesOfTxPowerByRate( pAdapter, RegAddr, BitMask, Data, rateIndex, PwrByRateVal, &rateNum ); if ( Band != BAND_ON_2_4G && Band != BAND_ON_5G ) { DBG_871X("Invalid Band %d\n", Band ); return; } if ( RfPath > ODM_RF_PATH_D ) { DBG_871X("Invalid RfPath %d\n", RfPath ); return; } if ( TxNum > ODM_RF_PATH_D ) { DBG_871X("Invalid TxNum %d\n", TxNum ); return; } for ( i = 0; i < rateNum; ++i ) { if ( rateIndex[i] == PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS0) || rateIndex[i] == PHY_GetRateIndexOfTxPowerByRate( MGN_VHT2SS_MCS1) ) { TxNum = RF_2TX; } pHalData->TxPwrByRateOffset[Band][RfPath][TxNum][rateIndex[i]] = PwrByRateVal[i]; } } void PHY_StoreTxPowerByRateOld( IN PADAPTER pAdapter, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); u8 index = PHY_GetRateSectionIndexOfTxPowerByRate( pAdapter, RegAddr, BitMask ); pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][index] = Data; //DBG_871X("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%x\n", pHalData->pwrGroupCnt, // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0]); } VOID PHY_InitTxPowerByRate( IN PADAPTER pAdapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); u8 band = 0, rfPath = 0, TxNum = 0, rate = 0, i = 0, j = 0; if ( IS_HARDWARE_TYPE_8188E( pAdapter ) || IS_HARDWARE_TYPE_8723A( pAdapter ) ) { for ( i = 0; i < MAX_PG_GROUP; ++i ) for ( j = 0; j < 16; ++j ) pHalData->MCSTxPowerLevelOriginalOffset[i][j] = 0; } else { for ( band = BAND_ON_2_4G; band <= BAND_ON_5G; ++band ) for ( rfPath = 0; rfPath < TX_PWR_BY_RATE_NUM_RF; ++rfPath ) for ( TxNum = 0; TxNum < TX_PWR_BY_RATE_NUM_RF; ++TxNum ) for ( rate = 0; rate < TX_PWR_BY_RATE_NUM_RATE; ++rate ) pHalData->TxPwrByRateOffset[band][rfPath][TxNum][rate] = 0; } } VOID PHY_StoreTxPowerByRate( IN PADAPTER pAdapter, IN u32 Band, IN u32 RfPath, IN u32 TxNum, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PDM_ODM_T pDM_Odm = &pHalData->odmpriv; if ( pDM_Odm->PhyRegPgVersion > 0 ) { PHY_StoreTxPowerByRateNew( pAdapter, Band, RfPath, TxNum, RegAddr, BitMask, Data ); } else if ( pDM_Odm->PhyRegPgVersion == 0 ) { PHY_StoreTxPowerByRateOld( pAdapter, RegAddr, BitMask, Data ); if ( RegAddr == rTxAGC_A_Mcs15_Mcs12 && pHalData->rf_type == RF_1T1R ) pHalData->pwrGroupCnt++; else if ( RegAddr == rTxAGC_B_Mcs15_Mcs12 && pHalData->rf_type != RF_1T1R ) pHalData->pwrGroupCnt++; } else DBG_871X("Invalid PHY_REG_PG.txt version %d\n", pDM_Odm->PhyRegPgVersion ); } VOID phy_ConvertTxPowerByRateByBase( IN u32* pData, IN u8 Start, IN u8 End, IN u8 BaseValue ) { s8 i = 0; u8 TempValue = 0; u32 TempData = 0; for ( i = 3; i >= 0; --i ) { if ( i >= Start && i <= End ) { // Get the exact value TempValue = ( u8 ) ( *pData >> ( i * 8 ) ) & 0xF; TempValue += ( ( u8 ) ( ( *pData >> ( i * 8 + 4 ) ) & 0xF ) ) * 10; // Change the value to a relative value TempValue = ( TempValue > BaseValue ) ? TempValue - BaseValue : BaseValue - TempValue; } else { TempValue = ( u8 ) ( *pData >> ( i * 8 ) ) & 0xFF; } TempData <<= 8; TempData |= TempValue; } *pData = TempData; } VOID PHY_ConvertTxPowerByRateInDbmToRelativeValuesOld( IN PADAPTER pAdapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA( pAdapter ); u8 base = 0; //DBG_871X("===>PHY_ConvertTxPowerByRateInDbmToRelativeValuesOld()\n" ); // CCK base = PHY_GetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_A, RF_1TX, CCK ); phy_ConvertTxPowerByRateByBase( &( pHalData->MCSTxPowerLevelOriginalOffset[0][6] ), 1, 1, base ); phy_ConvertTxPowerByRateByBase( &( pHalData->MCSTxPowerLevelOriginalOffset[0][7] ), 1, 3, base ); // OFDM base = PHY_GetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_A, RF_1TX, OFDM ); phy_ConvertTxPowerByRateByBase( &( pHalData->MCSTxPowerLevelOriginalOffset[0][0] ), 0, 3, base ); phy_ConvertTxPowerByRateByBase( &( pHalData->MCSTxPowerLevelOriginalOffset[0][1] ), 0, 3, base ); // HT MCS0~7 base = PHY_GetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_A, RF_1TX, HT_MCS0_MCS7 ); phy_ConvertTxPowerByRateByBase( &( pHalData->MCSTxPowerLevelOriginalOffset[0][2] ), 0, 3, base ); phy_ConvertTxPowerByRateByBase( &( pHalData->MCSTxPowerLevelOriginalOffset[0][3] ), 0, 3, base ); // HT MCS8~15 base = PHY_GetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_A, RF_2TX, HT_MCS8_MCS15 ); phy_ConvertTxPowerByRateByBase( &( pHalData->MCSTxPowerLevelOriginalOffset[0][4] ), 0, 3, base ); phy_ConvertTxPowerByRateByBase( &( pHalData->MCSTxPowerLevelOriginalOffset[0][5] ), 0, 3, base ); // CCK base = PHY_GetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_B, RF_1TX, CCK ); phy_ConvertTxPowerByRateByBase( &( pHalData->MCSTxPowerLevelOriginalOffset[0][14] ), 1, 3, base ); phy_ConvertTxPowerByRateByBase( &( pHalData->MCSTxPowerLevelOriginalOffset[0][15] ), 0, 0, base ); // OFDM base = PHY_GetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_B, RF_1TX, OFDM ); phy_ConvertTxPowerByRateByBase( &( pHalData->MCSTxPowerLevelOriginalOffset[0][8] ), 0, 3, base ); phy_ConvertTxPowerByRateByBase( &( pHalData->MCSTxPowerLevelOriginalOffset[0][9] ), 0, 3, base ); // HT MCS0~7 base = PHY_GetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_B, RF_1TX, HT_MCS0_MCS7 ); phy_ConvertTxPowerByRateByBase( &( pHalData->MCSTxPowerLevelOriginalOffset[0][10] ), 0, 3, base ); phy_ConvertTxPowerByRateByBase( &( pHalData->MCSTxPowerLevelOriginalOffset[0][11] ), 0, 3, base ); // HT MCS8~15 base = PHY_GetTxPowerByRateBase( pAdapter, BAND_ON_2_4G, ODM_RF_PATH_B, RF_2TX, HT_MCS8_MCS15 ); phy_ConvertTxPowerByRateByBase( &( pHalData->MCSTxPowerLevelOriginalOffset[0][12] ), 0, 3, base ); phy_ConvertTxPowerByRateByBase( &( pHalData->MCSTxPowerLevelOriginalOffset[0][13] ), 0, 3, base ); //DBG_871X("<===PHY_ConvertTxPowerByRateInDbmToRelativeValuesOld()\n" ); } VOID phy_ConvertTxPowerByRateInDbmToRelativeValues( IN PADAPTER pAdapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA( pAdapter ); u8 base = 0, i = 0, value = 0, band = 0, path = 0, txNum = 0, index = 0, startIndex = 0, endIndex = 0; u8 cckRates[4] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M}, ofdmRates[8] = {MGN_6M, MGN_9M, MGN_12M, MGN_18M, MGN_24M, MGN_36M, MGN_48M, MGN_54M}, mcs0_7Rates[8] = {MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3, MGN_MCS4, MGN_MCS5, MGN_MCS6, MGN_MCS7}, mcs8_15Rates[8] = {MGN_MCS8, MGN_MCS9, MGN_MCS10, MGN_MCS11, MGN_MCS12, MGN_MCS13, MGN_MCS14, MGN_MCS15}, mcs16_23Rates[8] = {MGN_MCS16, MGN_MCS17, MGN_MCS18, MGN_MCS19, MGN_MCS20, MGN_MCS21, MGN_MCS22, MGN_MCS23}, vht1ssRates[10] = {MGN_VHT1SS_MCS0, MGN_VHT1SS_MCS1, MGN_VHT1SS_MCS2, MGN_VHT1SS_MCS3, MGN_VHT1SS_MCS4, MGN_VHT1SS_MCS5, MGN_VHT1SS_MCS6, MGN_VHT1SS_MCS7, MGN_VHT1SS_MCS8, MGN_VHT1SS_MCS9}, vht2ssRates[10] = {MGN_VHT2SS_MCS0, MGN_VHT2SS_MCS1, MGN_VHT2SS_MCS2, MGN_VHT2SS_MCS3, MGN_VHT2SS_MCS4, MGN_VHT2SS_MCS5, MGN_VHT2SS_MCS6, MGN_VHT2SS_MCS7, MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9}, vht3ssRates[10] = {MGN_VHT3SS_MCS0, MGN_VHT3SS_MCS1, MGN_VHT3SS_MCS2, MGN_VHT3SS_MCS3, MGN_VHT3SS_MCS4, MGN_VHT3SS_MCS5, MGN_VHT3SS_MCS6, MGN_VHT3SS_MCS7, MGN_VHT3SS_MCS8, MGN_VHT3SS_MCS9}; //DBG_871X("===>PHY_ConvertTxPowerByRateInDbmToRelativeValues()\n" ); for ( band = BAND_ON_2_4G; band <= BAND_ON_5G; ++band ) { for ( path = ODM_RF_PATH_A; path <= ODM_RF_PATH_D; ++path ) { for ( txNum = RF_1TX; txNum < RF_MAX_TX_NUM; ++txNum ) { // CCK base = PHY_GetTxPowerByRate( pAdapter, band, path, txNum, MGN_11M ); for ( i = 0; i < sizeof( cckRates ); ++i ) { value = PHY_GetTxPowerByRate( pAdapter, band, path, txNum, cckRates[i] ); PHY_SetTxPowerByRate( pAdapter, band, path, txNum, cckRates[i], value - base ); } // OFDM base = PHY_GetTxPowerByRate( pAdapter, band, path, txNum, MGN_54M ); for ( i = 0; i < sizeof( ofdmRates ); ++i ) { value = PHY_GetTxPowerByRate( pAdapter, band, path, txNum, ofdmRates[i] ); PHY_SetTxPowerByRate( pAdapter, band, path, txNum, ofdmRates[i], value - base ); } // HT MCS0~7 base = PHY_GetTxPowerByRate( pAdapter, band, path, txNum, MGN_MCS7 ); for ( i = 0; i < sizeof( mcs0_7Rates ); ++i ) { value = PHY_GetTxPowerByRate( pAdapter, band, path, txNum, mcs0_7Rates[i] ); PHY_SetTxPowerByRate( pAdapter, band, path, txNum, mcs0_7Rates[i], value - base ); } // HT MCS8~15 base = PHY_GetTxPowerByRate( pAdapter, band, path, txNum, MGN_MCS15 ); for ( i = 0; i < sizeof( mcs8_15Rates ); ++i ) { value = PHY_GetTxPowerByRate( pAdapter, band, path, txNum, mcs8_15Rates[i] ); PHY_SetTxPowerByRate( pAdapter, band, path, txNum, mcs8_15Rates[i], value - base ); } // HT MCS16~23 base = PHY_GetTxPowerByRate( pAdapter, band, path, txNum, MGN_MCS23 ); for ( i = 0; i < sizeof( mcs16_23Rates ); ++i ) { value = PHY_GetTxPowerByRate( pAdapter, band, path, txNum, mcs16_23Rates[i] ); PHY_SetTxPowerByRate( pAdapter, band, path, txNum, mcs16_23Rates[i], value - base ); } // VHT 1SS base = PHY_GetTxPowerByRate( pAdapter, band, path, txNum, MGN_VHT1SS_MCS7 ); for ( i = 0; i < sizeof( vht1ssRates ); ++i ) { value = PHY_GetTxPowerByRate( pAdapter, band, path, txNum, vht1ssRates[i] ); PHY_SetTxPowerByRate( pAdapter, band, path, txNum, vht1ssRates[i], value - base ); } // VHT 2SS base = PHY_GetTxPowerByRate( pAdapter, band, path, txNum, MGN_VHT2SS_MCS7 ); for ( i = 0; i < sizeof( vht2ssRates ); ++i ) { value = PHY_GetTxPowerByRate( pAdapter, band, path, txNum, vht2ssRates[i] ); PHY_SetTxPowerByRate( pAdapter, band, path, txNum, vht2ssRates[i], value - base ); } // VHT 3SS base = PHY_GetTxPowerByRate( pAdapter, band, path, txNum, MGN_VHT3SS_MCS7 ); for ( i = 0; i < sizeof( vht3ssRates ); ++i ) { value = PHY_GetTxPowerByRate( pAdapter, band, path, txNum, vht3ssRates[i] ); PHY_SetTxPowerByRate( pAdapter, band, path, txNum, vht3ssRates[i], value - base ); } } } } //DBG_871X("<===PHY_ConvertTxPowerByRateInDbmToRelativeValues()\n" ); } /* * This function must be called if the value in the PHY_REG_PG.txt(or header) * is exact dBm values */ VOID PHY_TxPowerByRateConfiguration( IN PADAPTER pAdapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA( pAdapter); phy_StoreTxPowerByRateBase( pAdapter ); phy_ConvertTxPowerByRateInDbmToRelativeValues( pAdapter ); } VOID PHY_SetTxPowerIndexByRateSection( IN PADAPTER pAdapter, IN u8 RFPath, IN u8 Channel, IN u8 RateSection ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); if ( RateSection == CCK ) { u8 cckRates[] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M}; if ( pHalData->CurrentBandType == BAND_ON_2_4G ) PHY_SetTxPowerIndexByRateArray( pAdapter, RFPath, pHalData->CurrentChannelBW, Channel, cckRates, sizeof(cckRates)/sizeof(u8) ); } else if ( RateSection == OFDM ) { u8 ofdmRates[] = {MGN_6M, MGN_9M, MGN_12M, MGN_18M, MGN_24M, MGN_36M, MGN_48M, MGN_54M}; PHY_SetTxPowerIndexByRateArray( pAdapter, RFPath, pHalData->CurrentChannelBW, Channel, ofdmRates, sizeof(ofdmRates)/sizeof(u8)); } else if ( RateSection == HT_MCS0_MCS7 ) { u8 htRates1T[] = {MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3, MGN_MCS4, MGN_MCS5, MGN_MCS6, MGN_MCS7}; PHY_SetTxPowerIndexByRateArray( pAdapter, RFPath, pHalData->CurrentChannelBW, Channel, htRates1T, sizeof(htRates1T)/sizeof(u8)); } else if ( RateSection == HT_MCS8_MCS15 ) { u8 htRates2T[] = {MGN_MCS8, MGN_MCS9, MGN_MCS10, MGN_MCS11, MGN_MCS12, MGN_MCS13, MGN_MCS14, MGN_MCS15}; PHY_SetTxPowerIndexByRateArray( pAdapter, RFPath, pHalData->CurrentChannelBW, Channel, htRates2T, sizeof(htRates2T)/sizeof(u8)); } else if ( RateSection == HT_MCS16_MCS23 ) { u1Byte htRates3T[] = {MGN_MCS16, MGN_MCS17, MGN_MCS18, MGN_MCS19, MGN_MCS20, MGN_MCS21, MGN_MCS22, MGN_MCS23}; PHY_SetTxPowerIndexByRateArray( pAdapter, RFPath, pHalData->CurrentChannelBW, Channel, htRates3T, sizeof(htRates3T)/sizeof(u1Byte)); } else if ( RateSection == HT_MCS24_MCS31 ) { u1Byte htRates4T[] = {MGN_MCS24, MGN_MCS25, MGN_MCS26, MGN_MCS27, MGN_MCS28, MGN_MCS29, MGN_MCS30, MGN_MCS31}; PHY_SetTxPowerIndexByRateArray( pAdapter, RFPath, pHalData->CurrentChannelBW, Channel, htRates4T, sizeof(htRates4T)/sizeof(u1Byte)); } else if ( RateSection == VHT_1SSMCS0_1SSMCS9 ) { u8 vhtRates1T[] = {MGN_VHT1SS_MCS0, MGN_VHT1SS_MCS1, MGN_VHT1SS_MCS2, MGN_VHT1SS_MCS3, MGN_VHT1SS_MCS4, MGN_VHT1SS_MCS5, MGN_VHT1SS_MCS6, MGN_VHT1SS_MCS7, MGN_VHT1SS_MCS8, MGN_VHT1SS_MCS9}; PHY_SetTxPowerIndexByRateArray( pAdapter, RFPath, pHalData->CurrentChannelBW, Channel, vhtRates1T, sizeof(vhtRates1T)/sizeof(u8)); } else if ( RateSection == VHT_2SSMCS0_2SSMCS9 ) { u8 vhtRates2T[] = {MGN_VHT2SS_MCS0, MGN_VHT2SS_MCS1, MGN_VHT2SS_MCS2, MGN_VHT2SS_MCS3, MGN_VHT2SS_MCS4, MGN_VHT2SS_MCS5, MGN_VHT2SS_MCS6, MGN_VHT2SS_MCS7, MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9}; PHY_SetTxPowerIndexByRateArray( pAdapter, RFPath, pHalData->CurrentChannelBW, Channel, vhtRates2T, sizeof(vhtRates2T)/sizeof(u8)); } else if ( RateSection == VHT_3SSMCS0_3SSMCS9 ) { u1Byte vhtRates3T[] = {MGN_VHT3SS_MCS0, MGN_VHT3SS_MCS1, MGN_VHT3SS_MCS2, MGN_VHT3SS_MCS3, MGN_VHT3SS_MCS4, MGN_VHT3SS_MCS5, MGN_VHT3SS_MCS6, MGN_VHT3SS_MCS7, MGN_VHT3SS_MCS8, MGN_VHT3SS_MCS9}; PHY_SetTxPowerIndexByRateArray( pAdapter, RFPath, pHalData->CurrentChannelBW, Channel, vhtRates3T, sizeof(vhtRates3T)/sizeof(u1Byte)); } else if ( RateSection == VHT_4SSMCS0_4SSMCS9 ) { u1Byte vhtRates4T[] = {MGN_VHT4SS_MCS0, MGN_VHT4SS_MCS1, MGN_VHT4SS_MCS2, MGN_VHT4SS_MCS3, MGN_VHT4SS_MCS4, MGN_VHT4SS_MCS5, MGN_VHT4SS_MCS6, MGN_VHT4SS_MCS7, MGN_VHT4SS_MCS8, MGN_VHT4SS_MCS9}; PHY_SetTxPowerIndexByRateArray( pAdapter, RFPath, pHalData->CurrentChannelBW, Channel, vhtRates4T, sizeof(vhtRates4T)/sizeof(u1Byte)); } else { DBG_871X("Invalid RateSection %d in %s", RateSection, __FUNCTION__ ); } } BOOLEAN phy_GetChnlIndex( IN u8 Channel, OUT u8* ChannelIdx ) { u8 channel5G[CHANNEL_MAX_NUMBER_5G] = {36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112, 114,116,118,120,122,124,126,128,130,132,134,136,138,140,142,144,149,151, 153,155,157,159,161,163,165,167,168,169,171,173,175,177}; u8 i = 0; BOOLEAN bIn24G=_TRUE; if(Channel <= 14) { bIn24G=_TRUE; *ChannelIdx = Channel -1; } else { bIn24G = _FALSE; for (i = 0; i < sizeof(channel5G)/sizeof(u8); ++i) { if ( channel5G[i] == Channel) { *ChannelIdx = i; return bIn24G; } } } return bIn24G; } u8 PHY_GetTxPowerIndexBase( IN PADAPTER pAdapter, IN u8 RFPath, IN u8 Rate, IN CHANNEL_WIDTH BandWidth, IN u8 Channel, OUT PBOOLEAN bIn24G ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); PDM_ODM_T pDM_Odm = &pHalData->odmpriv; u8 i = 0; //default set to 1S u8 txPower = 0; u8 chnlIdx = (Channel-1); if (HAL_IsLegalChannel(pAdapter, Channel) == _FALSE) { chnlIdx = 0; DBG_871X("Illegal channel!!\n"); } *bIn24G = phy_GetChnlIndex(Channel, &chnlIdx); //DBG_871X("[%s] Channel Index: %d\n", (*bIn24G?"2.4G":"5G"), chnlIdx); if (*bIn24G) //3 ============================== 2.4 G ============================== { if ( IS_CCK_RATE(Rate) ) { txPower = pHalData->Index24G_CCK_Base[RFPath][chnlIdx]; } else if ( MGN_6M <= Rate ) { txPower = pHalData->Index24G_BW40_Base[RFPath][chnlIdx]; } else { DBG_871X("PHY_GetTxPowerIndexBase: INVALID Rate.\n"); } //DBG_871X("Base Tx power(RF-%c, Rate #%d, Channel Index %d) = 0x%X\n", // ((RFPath==0)?'A':'B'), Rate, chnlIdx, txPower); // OFDM-1T if ( (MGN_6M <= Rate && Rate <= MGN_54M) && ! IS_CCK_RATE(Rate) ) { txPower += pHalData->OFDM_24G_Diff[RFPath][TX_1S]; //DBG_871X("+PowerDiff 2.4G (RF-%c): (OFDM-1T) = (%d)\n", ((RFPath==0)?'A':'B'), pHalData->OFDM_24G_Diff[RFPath][TX_1S]); } // BW20-1S, BW20-2S if (BandWidth == CHANNEL_WIDTH_20) { if ( (MGN_MCS0 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT1SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW20_24G_Diff[RFPath][TX_1S]; if ( (MGN_MCS8 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT2SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW20_24G_Diff[RFPath][TX_2S]; if ( (MGN_MCS16 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT3SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW20_24G_Diff[RFPath][TX_3S]; if ( (MGN_MCS24 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT4SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW20_24G_Diff[RFPath][TX_4S]; //DBG_871X("+PowerDiff 2.4G (RF-%c): (BW20-1S, BW20-2S, BW20-3S, BW20-4S) = (%d, %d, %d, %d)\n", ((RFPath==0)?'A':(RFPath==1)?'B':(RFPath==2)?'C':'D'), // pHalData->BW20_24G_Diff[RFPath][TX_1S], pHalData->BW20_24G_Diff[RFPath][TX_2S], // pHalData->BW20_24G_Diff[RFPath][TX_3S], pHalData->BW20_24G_Diff[RFPath][TX_4S]); } // BW40-1S, BW40-2S else if (BandWidth == CHANNEL_WIDTH_40) { if ( (MGN_MCS0 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT1SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW40_24G_Diff[RFPath][TX_1S]; if ( (MGN_MCS8 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT2SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW40_24G_Diff[RFPath][TX_2S]; if ( (MGN_MCS16 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT3SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW40_24G_Diff[RFPath][TX_3S]; if ( (MGN_MCS24 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT4SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW40_24G_Diff[RFPath][TX_4S]; //DBG_871X("+PowerDiff 2.4G (RF-%c): (BW40-1S, BW40-2S, BW40-3S, BW40-4S) = (%d, %d, %d, %d)\n", ((RFPath==0)?'A':(RFPath==1)?'B':(RFPath==2)?'C':'D'), // pHalData->BW40_24G_Diff[RFPath][TX_1S], pHalData->BW40_24G_Diff[RFPath][TX_2S], // pHalData->BW40_24G_Diff[RFPath][TX_3S], pHalData->BW40_24G_Diff[RFPath][TX_4S]); } // Willis suggest adopt BW 40M power index while in BW 80 mode else if ( BandWidth == CHANNEL_WIDTH_80 ) { if ( (MGN_MCS0 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT1SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW40_24G_Diff[RFPath][TX_1S]; if ( (MGN_MCS8 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT2SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW40_24G_Diff[RFPath][TX_2S]; if ( (MGN_MCS16 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT3SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW40_24G_Diff[RFPath][TX_3S]; if ( (MGN_MCS24 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT4SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW40_24G_Diff[RFPath][TX_4S]; //DBG_871X("+PowerDiff 2.4G (RF-%c): (BW40-1S, BW40-2S, BW40-3S, BW40-4T) = (%d, %d, %d, %d) P.S. Current is in BW 80MHz\n", ((RFPath==0)?'A':(RFPath==1)?'B':(RFPath==2)?'C':'D'), // pHalData->BW40_24G_Diff[RFPath][TX_1S], pHalData->BW40_24G_Diff[RFPath][TX_2S], // pHalData->BW40_24G_Diff[RFPath][TX_3S], pHalData->BW40_24G_Diff[RFPath][TX_4S]); } } else //3 ============================== 5 G ============================== { if ( MGN_6M <= Rate ) { txPower = pHalData->Index5G_BW40_Base[RFPath][chnlIdx]; } else { DBG_871X("===> mpt_ProQueryCalTxPower_Jaguar: INVALID Rate.\n"); } //DBG_871X("Base Tx power(RF-%c, Rate #%d, Channel Index %d) = 0x%X\n", // ((RFPath==0)?'A':'B'), Rate, chnlIdx, txPower); // OFDM-1T if ( (MGN_6M <= Rate && Rate <= MGN_54M) && ! IS_CCK_RATE(Rate)) { txPower += pHalData->OFDM_5G_Diff[RFPath][TX_1S]; //DBG_871X("+PowerDiff 5G (RF-%c): (OFDM-1T) = (%d)\n", ((RFPath==0)?'A':'B'), pHalData->OFDM_5G_Diff[RFPath][TX_1S]); } // BW20-1S, BW20-2S if (BandWidth == CHANNEL_WIDTH_20) { if ( (MGN_MCS0 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT1SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW20_5G_Diff[RFPath][TX_1S]; if ( (MGN_MCS8 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT2SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW20_5G_Diff[RFPath][TX_2S]; if ( (MGN_MCS16 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT3SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW20_5G_Diff[RFPath][TX_3S]; if ( (MGN_MCS24 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT4SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW20_5G_Diff[RFPath][TX_4S]; //DBG_871X("+PowerDiff 5G (RF-%c): (BW20-1S, BW20-2S, BW20-3S, BW20-4S) = (%d, %d, %d, %d)\n", ((RFPath==0)?'A':(RFPath==1)?'B':(RFPath==2)?'C':'D'), // pHalData->BW20_5G_Diff[RFPath][TX_1S], pHalData->BW20_5G_Diff[RFPath][TX_2S], // pHalData->BW20_5G_Diff[RFPath][TX_3S], pHalData->BW20_5G_Diff[RFPath][TX_4S]); } // BW40-1S, BW40-2S else if (BandWidth == CHANNEL_WIDTH_40) { if ( (MGN_MCS0 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT1SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW40_5G_Diff[RFPath][TX_1S]; if ( (MGN_MCS8 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT2SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW40_5G_Diff[RFPath][TX_2S]; if ( (MGN_MCS16 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT3SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW40_5G_Diff[RFPath][TX_3S]; if ( (MGN_MCS24 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT4SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW40_5G_Diff[RFPath][TX_4S]; //DBG_871X("+PowerDiff 5G(RF-%c): (BW40-1S, BW40-2S) = (%d, %d, %d, %d)\n", ((RFPath==0)?'A':(RFPath==1)?'B':(RFPath==2)?'C':'D'), // pHalData->BW40_5G_Diff[RFPath][TX_1S], pHalData->BW40_5G_Diff[RFPath][TX_2S], // pHalData->BW40_5G_Diff[RFPath][TX_3S], pHalData->BW40_5G_Diff[RFPath][TX_4S]); } // BW80-1S, BW80-2S else if (BandWidth== CHANNEL_WIDTH_80) { // <20121220, Kordan> Get the index of array "Index5G_BW80_Base". u8 channel5G_80M[CHANNEL_MAX_NUMBER_5G_80M] = {42, 58, 106, 122, 138, 155, 171}; for (i = 0; i < sizeof(channel5G_80M)/sizeof(u8); ++i) if ( channel5G_80M[i] == Channel) chnlIdx = i; txPower = pHalData->Index5G_BW80_Base[RFPath][chnlIdx]; if ( (MGN_MCS0 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT1SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += + pHalData->BW80_5G_Diff[RFPath][TX_1S]; if ( (MGN_MCS8 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT2SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW80_5G_Diff[RFPath][TX_2S]; if ( (MGN_MCS16 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT3SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW80_5G_Diff[RFPath][TX_3S]; if ( (MGN_MCS23 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT4SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9)) txPower += pHalData->BW80_5G_Diff[RFPath][TX_4S]; //DBG_871X("+PowerDiff 5G(RF-%c): (BW80-1S, BW80-2S, BW80-3S, BW80-4S) = (%d, %d, %d, %d)\n",((RFPath==0)?'A':(RFPath==1)?'B':(RFPath==2)?'C':'D'), // pHalData->BW80_5G_Diff[RFPath][TX_1S], pHalData->BW80_5G_Diff[RFPath][TX_2S], // pHalData->BW80_5G_Diff[RFPath][TX_3S], pHalData->BW80_5G_Diff[RFPath][TX_4S]); } } return txPower; } s8 PHY_GetTxPowerTrackingOffset( PADAPTER pAdapter, u8 RFPath, u8 Rate ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); PDM_ODM_T pDM_Odm = &pHalData->odmpriv; s8 offset = 0; if( pDM_Odm->RFCalibrateInfo.TxPowerTrackControl == _FALSE) return offset; if ((Rate == MGN_1M) ||(Rate == MGN_2M)||(Rate == MGN_5_5M)||(Rate == MGN_11M)) { offset = pDM_Odm->Remnant_CCKSwingIdx; //DBG_871X("+Remnant_CCKSwingIdx = 0x%x\n", RFPath, Rate, pDM_Odm->Remnant_CCKSwingIdx); } else { offset = pDM_Odm->Remnant_OFDMSwingIdx[RFPath]; //DBG_871X("+Remanant_OFDMSwingIdx[RFPath %u][Rate 0x%x] = 0x%x\n", RFPath, Rate, pDM_Odm->Remnant_OFDMSwingIdx[RFPath]); } return offset; } u8 PHY_GetRateIndexOfTxPowerByRate( IN u8 Rate ) { u8 index = 0; switch ( Rate ) { case MGN_1M: index = 0; break; case MGN_2M: index = 1; break; case MGN_5_5M: index = 2; break; case MGN_11M: index = 3; break; case MGN_6M: index = 4; break; case MGN_9M: index = 5; break; case MGN_12M: index = 6; break; case MGN_18M: index = 7; break; case MGN_24M: index = 8; break; case MGN_36M: index = 9; break; case MGN_48M: index = 10; break; case MGN_54M: index = 11; break; case MGN_MCS0: index = 12; break; case MGN_MCS1: index = 13; break; case MGN_MCS2: index = 14; break; case MGN_MCS3: index = 15; break; case MGN_MCS4: index = 16; break; case MGN_MCS5: index = 17; break; case MGN_MCS6: index = 18; break; case MGN_MCS7: index = 19; break; case MGN_MCS8: index = 20; break; case MGN_MCS9: index = 21; break; case MGN_MCS10: index = 22; break; case MGN_MCS11: index = 23; break; case MGN_MCS12: index = 24; break; case MGN_MCS13: index = 25; break; case MGN_MCS14: index = 26; break; case MGN_MCS15: index = 27; break; case MGN_MCS16: index = 28; break; case MGN_MCS17: index = 29; break; case MGN_MCS18: index = 30; break; case MGN_MCS19: index = 31; break; case MGN_MCS20: index = 32; break; case MGN_MCS21: index = 33; break; case MGN_MCS22: index = 34; break; case MGN_MCS23: index = 35; break; case MGN_MCS24: index = 36; break; case MGN_MCS25: index = 37; break; case MGN_MCS26: index = 38; break; case MGN_MCS27: index = 39; break; case MGN_MCS28: index = 40; break; case MGN_MCS29: index = 41; break; case MGN_MCS30: index = 42; break; case MGN_MCS31: index = 43; break; case MGN_VHT1SS_MCS0: index = 44; break; case MGN_VHT1SS_MCS1: index = 45; break; case MGN_VHT1SS_MCS2: index = 46; break; case MGN_VHT1SS_MCS3: index = 47; break; case MGN_VHT1SS_MCS4: index = 48; break; case MGN_VHT1SS_MCS5: index = 49; break; case MGN_VHT1SS_MCS6: index = 50; break; case MGN_VHT1SS_MCS7: index = 51; break; case MGN_VHT1SS_MCS8: index = 52; break; case MGN_VHT1SS_MCS9: index = 53; break; case MGN_VHT2SS_MCS0: index = 54; break; case MGN_VHT2SS_MCS1: index = 55; break; case MGN_VHT2SS_MCS2: index = 56; break; case MGN_VHT2SS_MCS3: index = 57; break; case MGN_VHT2SS_MCS4: index = 58; break; case MGN_VHT2SS_MCS5: index = 59; break; case MGN_VHT2SS_MCS6: index = 60; break; case MGN_VHT2SS_MCS7: index = 61; break; case MGN_VHT2SS_MCS8: index = 62; break; case MGN_VHT2SS_MCS9: index = 63; break; case MGN_VHT3SS_MCS0: index = 64; break; case MGN_VHT3SS_MCS1: index = 65; break; case MGN_VHT3SS_MCS2: index = 66; break; case MGN_VHT3SS_MCS3: index = 67; break; case MGN_VHT3SS_MCS4: index = 68; break; case MGN_VHT3SS_MCS5: index = 69; break; case MGN_VHT3SS_MCS6: index = 70; break; case MGN_VHT3SS_MCS7: index = 71; break; case MGN_VHT3SS_MCS8: index = 72; break; case MGN_VHT3SS_MCS9: index = 73; break; case MGN_VHT4SS_MCS0: index = 74; break; case MGN_VHT4SS_MCS1: index = 75; break; case MGN_VHT4SS_MCS2: index = 76; break; case MGN_VHT4SS_MCS3: index = 77; break; case MGN_VHT4SS_MCS4: index = 78; break; case MGN_VHT4SS_MCS5: index = 79; break; case MGN_VHT4SS_MCS6: index = 80; break; case MGN_VHT4SS_MCS7: index = 81; break; case MGN_VHT4SS_MCS8: index = 82; break; case MGN_VHT4SS_MCS9: index = 83; break; default: DBG_871X("Invalid rate 0x%x in %s\n", Rate, __FUNCTION__ ); break; }; return index; } s8 PHY_GetTxPowerByRate( IN PADAPTER pAdapter, IN u8 Band, IN u8 RFPath, IN u8 TxNum, IN u8 Rate ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA( pAdapter ); s8 value = 0, limit = 0; u8 rateIndex = PHY_GetRateIndexOfTxPowerByRate( Rate ); if ( ( pAdapter->registrypriv.RegEnableTxPowerByRate == 2 && pHalData->EEPROMRegulatory == 2 ) || pAdapter->registrypriv.RegEnableTxPowerByRate == 0 ) return 0; if ( Band != BAND_ON_2_4G && Band != BAND_ON_5G ) { DBG_871X("Invalid band %d in %s\n", Band, __FUNCTION__ ); return value; } if ( RFPath > ODM_RF_PATH_D ) { DBG_871X("Invalid RfPath %d in %s\n", RFPath, __FUNCTION__ ); return value; } if ( TxNum >= RF_MAX_TX_NUM ) { DBG_871X("Invalid TxNum %d in %s\n", TxNum, __FUNCTION__ ); return value; } if ( rateIndex >= TX_PWR_BY_RATE_NUM_RATE ) { DBG_871X("Invalid RateIndex %d in %s\n", rateIndex, __FUNCTION__ ); return value; } value = pHalData->TxPwrByRateOffset[Band][RFPath][TxNum][rateIndex]; return value; } VOID PHY_SetTxPowerByRate( IN PADAPTER pAdapter, IN u8 Band, IN u8 RFPath, IN u8 TxNum, IN u8 Rate, IN s8 Value ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA( pAdapter ); u8 rateIndex = PHY_GetRateIndexOfTxPowerByRate( Rate ); if ( Band != BAND_ON_2_4G && Band != BAND_ON_5G ) { DBG_871X("Invalid band %d in %s\n", Band, __FUNCTION__ ); return; } if ( RFPath > ODM_RF_PATH_D ) { DBG_871X("Invalid RfPath %d in %s\n", RFPath, __FUNCTION__ ); return; } if ( TxNum >= RF_MAX_TX_NUM ) { DBG_871X( "Invalid TxNum %d in %s\n", TxNum, __FUNCTION__ ); return; } if ( rateIndex >= TX_PWR_BY_RATE_NUM_RATE ) { DBG_871X("Invalid RateIndex %d in %s\n", rateIndex, __FUNCTION__ ); return; } pHalData->TxPwrByRateOffset[Band][RFPath][TxNum][rateIndex] = Value; } VOID PHY_SetTxPowerLevelByPath( IN PADAPTER Adapter, IN u8 channel, IN u8 path ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); BOOLEAN bIsIn24G = (pHalData->CurrentBandType == BAND_ON_2_4G ); //if ( pMgntInfo->RegNByteAccess == 0 ) { if ( bIsIn24G ) PHY_SetTxPowerIndexByRateSection( Adapter, path, channel, CCK ); PHY_SetTxPowerIndexByRateSection( Adapter, path, channel, OFDM ); PHY_SetTxPowerIndexByRateSection( Adapter, path, channel, HT_MCS0_MCS7 ); if ( IS_HARDWARE_TYPE_JAGUAR( Adapter ) || IS_HARDWARE_TYPE_8813A( Adapter ) ) PHY_SetTxPowerIndexByRateSection( Adapter, path, channel, VHT_1SSMCS0_1SSMCS9 ); if ( pHalData->NumTotalRFPath >= 2 ) { PHY_SetTxPowerIndexByRateSection( Adapter, path, channel, HT_MCS8_MCS15 ); if ( IS_HARDWARE_TYPE_JAGUAR( Adapter ) || IS_HARDWARE_TYPE_8813A( Adapter ) ) PHY_SetTxPowerIndexByRateSection( Adapter, path, channel, VHT_2SSMCS0_2SSMCS9 ); if ( IS_HARDWARE_TYPE_8813A( Adapter ) ) { PHY_SetTxPowerIndexByRateSection( Adapter, path, channel, HT_MCS16_MCS23 ); PHY_SetTxPowerIndexByRateSection( Adapter, path, channel, VHT_3SSMCS0_3SSMCS9 ); } } } } VOID PHY_SetTxPowerIndexByRateArray( IN PADAPTER pAdapter, IN u8 RFPath, IN CHANNEL_WIDTH BandWidth, IN u8 Channel, IN u8* Rates, IN u8 RateArraySize ) { u32 powerIndex = 0; int i = 0; for (i = 0; i < RateArraySize; ++i) { powerIndex = PHY_GetTxPowerIndex(pAdapter, RFPath, Rates[i], BandWidth, Channel); PHY_SetTxPowerIndex(pAdapter, powerIndex, RFPath, Rates[i]); } } s8 phy_GetWorldWideLimit( s8* LimitTable ) { s8 min = LimitTable[0]; u8 i = 0; for (i = 0; i < MAX_REGULATION_NUM; ++i) { if (LimitTable[i] < min) min = LimitTable[i]; } return min; } s8 phy_GetChannelIndexOfTxPowerLimit( IN u8 Band, IN u8 Channel ) { s8 channelIndex = -1; u8 channel5G[CHANNEL_MAX_NUMBER_5G] = {36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112, 114,116,118,120,122,124,126,128,130,132,134,136,138,140,142,144,149,151, 153,155,157,159,161,163,165,167,168,169,171,173,175,177}; u8 i = 0; if ( Band == BAND_ON_2_4G ) { channelIndex = Channel - 1; } else if ( Band == BAND_ON_5G ) { for ( i = 0; i < sizeof(channel5G)/sizeof(u8); ++i ) { if ( channel5G[i] == Channel ) channelIndex = i; } } else { DBG_871X("Invalid Band %d in %s", Band, __FUNCTION__ ); } if ( channelIndex == -1 ) DBG_871X("Invalid Channel %d of Band %d in %s", Channel, Band, __FUNCTION__ ); return channelIndex; } s8 PHY_GetTxPowerLimit( IN PADAPTER Adapter, IN u32 RegPwrTblSel, IN BAND_TYPE Band, IN CHANNEL_WIDTH Bandwidth, IN u8 RfPath, IN u8 DataRate, IN u8 Channel ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); s16 band = -1, regulation = -1, bandwidth = -1, rateSection = -1, channel = -1; s8 powerLimit = MAX_POWER_INDEX; if ( ( Adapter->registrypriv.RegEnableTxPowerLimit == 2 && pHalData->EEPROMRegulatory != 1 ) || Adapter->registrypriv.RegEnableTxPowerLimit == 0 ) return MAX_POWER_INDEX; switch( Adapter->registrypriv.RegPwrTblSel ) { case 1: regulation = TXPWR_LMT_ETSI; break; case 2: regulation = TXPWR_LMT_MKK; break; case 3: regulation = TXPWR_LMT_FCC; break; case 4: regulation = TXPWR_LMT_WW; break; default: regulation = ( Band == BAND_ON_2_4G ) ? pHalData->Regulation2_4G : pHalData->Regulation5G; break; } //DBG_871X("pMgntInfo->RegPwrTblSel %d, final regulation %d\n", Adapter->registrypriv.RegPwrTblSel, regulation ); if ( Band == BAND_ON_2_4G ) band = 0; else if ( Band == BAND_ON_5G ) band = 1; if ( Bandwidth == CHANNEL_WIDTH_20 ) bandwidth = 0; else if ( Bandwidth == CHANNEL_WIDTH_40 ) bandwidth = 1; else if ( Bandwidth == CHANNEL_WIDTH_80 ) bandwidth = 2; else if ( Bandwidth == CHANNEL_WIDTH_160 ) bandwidth = 3; switch ( DataRate ) { case MGN_1M: case MGN_2M: case MGN_5_5M: case MGN_11M: rateSection = 0; break; case MGN_6M: case MGN_9M: case MGN_12M: case MGN_18M: case MGN_24M: case MGN_36M: case MGN_48M: case MGN_54M: rateSection = 1; break; case MGN_MCS0: case MGN_MCS1: case MGN_MCS2: case MGN_MCS3: case MGN_MCS4: case MGN_MCS5: case MGN_MCS6: case MGN_MCS7: rateSection = 2; break; case MGN_MCS8: case MGN_MCS9: case MGN_MCS10: case MGN_MCS11: case MGN_MCS12: case MGN_MCS13: case MGN_MCS14: case MGN_MCS15: rateSection = 3; break; case MGN_MCS16: case MGN_MCS17: case MGN_MCS18: case MGN_MCS19: case MGN_MCS20: case MGN_MCS21: case MGN_MCS22: case MGN_MCS23: rateSection = 4; break; case MGN_MCS24: case MGN_MCS25: case MGN_MCS26: case MGN_MCS27: case MGN_MCS28: case MGN_MCS29: case MGN_MCS30: case MGN_MCS31: rateSection = 5; break; case MGN_VHT1SS_MCS0: case MGN_VHT1SS_MCS1: case MGN_VHT1SS_MCS2: case MGN_VHT1SS_MCS3: case MGN_VHT1SS_MCS4: case MGN_VHT1SS_MCS5: case MGN_VHT1SS_MCS6: case MGN_VHT1SS_MCS7: case MGN_VHT1SS_MCS8: case MGN_VHT1SS_MCS9: rateSection = 6; break; case MGN_VHT2SS_MCS0: case MGN_VHT2SS_MCS1: case MGN_VHT2SS_MCS2: case MGN_VHT2SS_MCS3: case MGN_VHT2SS_MCS4: case MGN_VHT2SS_MCS5: case MGN_VHT2SS_MCS6: case MGN_VHT2SS_MCS7: case MGN_VHT2SS_MCS8: case MGN_VHT2SS_MCS9: rateSection = 7; break; case MGN_VHT3SS_MCS0: case MGN_VHT3SS_MCS1: case MGN_VHT3SS_MCS2: case MGN_VHT3SS_MCS3: case MGN_VHT3SS_MCS4: case MGN_VHT3SS_MCS5: case MGN_VHT3SS_MCS6: case MGN_VHT3SS_MCS7: case MGN_VHT3SS_MCS8: case MGN_VHT3SS_MCS9: rateSection = 8; break; case MGN_VHT4SS_MCS0: case MGN_VHT4SS_MCS1: case MGN_VHT4SS_MCS2: case MGN_VHT4SS_MCS3: case MGN_VHT4SS_MCS4: case MGN_VHT4SS_MCS5: case MGN_VHT4SS_MCS6: case MGN_VHT4SS_MCS7: case MGN_VHT4SS_MCS8: case MGN_VHT4SS_MCS9: rateSection = 9; break; default: DBG_871X("Wrong rate 0x%x\n", DataRate ); break; } if ( Band == BAND_ON_5G && rateSection == 0 ) DBG_871X("Wrong rate 0x%x: No CCK in 5G Band\n", DataRate ); // workaround for wrong index combination to obtain tx power limit, // OFDM only exists in BW 20M if ( rateSection == 1 ) bandwidth = 0; // workaround for wrong index combination to obtain tx power limit, // CCK table will only be given in BW 20M if ( rateSection == 0 ) bandwidth = 0; // workaround for wrong indxe combination to obtain tx power limit, // HT on 80M will reference to HT on 40M if ( ( rateSection == 2 || rateSection == 3 ) && Band == BAND_ON_5G && bandwidth == 2 ) { bandwidth = 1; } if ( Band == BAND_ON_2_4G ) channel = phy_GetChannelIndexOfTxPowerLimit( BAND_ON_2_4G, Channel ); else if ( Band == BAND_ON_5G ) channel = phy_GetChannelIndexOfTxPowerLimit( BAND_ON_5G, Channel ); else if ( Band == BAND_ON_BOTH ) { // BAND_ON_BOTH don't care temporarily } if ( band == -1 || regulation == -1 || bandwidth == -1 || rateSection == -1 || channel == -1 ) { //DBG_871X("Wrong index value to access power limit table [band %d][regulation %d][bandwidth %d][rf_path %d][rate_section %d][chnlGroup %d]\n", // band, regulation, bandwidth, RfPath, rateSection, channelGroup ); return MAX_POWER_INDEX; } if ( Band == BAND_ON_2_4G ) { s8 limits[10] = {0}; u8 i = 0; for (i = 0; i < MAX_REGULATION_NUM; ++i) limits[i] = pHalData->TxPwrLimit_2_4G[i][bandwidth][rateSection][channel][RfPath]; powerLimit = (regulation == TXPWR_LMT_WW) ? phy_GetWorldWideLimit(limits) : pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channel][RfPath]; } else if ( Band == BAND_ON_5G ) { s8 limits[10] = {0}; u8 i = 0; for (i = 0; i < MAX_REGULATION_NUM; ++i) limits[i] = pHalData->TxPwrLimit_5G[i][bandwidth][rateSection][channel][RfPath]; powerLimit = (regulation == TXPWR_LMT_WW) ? phy_GetWorldWideLimit(limits) : pHalData->TxPwrLimit_5G[regulation][bandwidth][rateSection][channel][RfPath]; } else DBG_871X("No power limit table of the specified band\n" ); // combine 5G VHT & HT rate // 5G 20M and 40M HT and VHT can cross reference /* if ( Band == BAND_ON_5G && powerLimit == MAX_POWER_INDEX ) { if ( bandwidth == 0 || bandwidth == 1 ) { RT_TRACE( COMP_INIT, DBG_LOUD, ( "No power limit table of the specified band %d, bandwidth %d, ratesection %d, rf path %d\n", band, bandwidth, rateSection, RfPath ) ); if ( rateSection == 2 ) powerLimit = pHalData->TxPwrLimit_5G[regulation] [bandwidth][4][channelGroup][RfPath]; else if ( rateSection == 4 ) powerLimit = pHalData->TxPwrLimit_5G[regulation] [bandwidth][2][channelGroup][RfPath]; else if ( rateSection == 3 ) powerLimit = pHalData->TxPwrLimit_5G[regulation] [bandwidth][5][channelGroup][RfPath]; else if ( rateSection == 5 ) powerLimit = pHalData->TxPwrLimit_5G[regulation] [bandwidth][3][channelGroup][RfPath]; } } */ //DBG_871X("TxPwrLmt[Regulation %d][Band %d][BW %d][RFPath %d][Rate 0x%x][Chnl %d] = %d\n", // regulation, pHalData->CurrentBandType, Bandwidth, RfPath, DataRate, Channel, powerLimit); return powerLimit; } VOID phy_CrossReferenceHTAndVHTTxPowerLimit( IN PADAPTER pAdapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); u8 regulation, bw, channel, rateSection; s8 tempPwrLmt = 0; for ( regulation = 0; regulation < MAX_REGULATION_NUM; ++regulation ) { for ( bw = 0; bw < MAX_5G_BANDWITH_NUM; ++bw ) { for ( channel = 0; channel < CHANNEL_MAX_NUMBER_5G; ++channel ) { for ( rateSection = 0; rateSection < MAX_RATE_SECTION_NUM; ++rateSection ) { tempPwrLmt = pHalData->TxPwrLimit_5G[regulation][bw][rateSection][channel][ODM_RF_PATH_A]; if ( tempPwrLmt == MAX_POWER_INDEX ) { u8 baseSection = 2, refSection = 6; if ( bw == 0 || bw == 1 ) { // 5G 20M 40M VHT and HT can cross reference //DBG_871X("No power limit table of the specified band %d, bandwidth %d, ratesection %d, channel %d, rf path %d\n", // 1, bw, rateSection, channel, ODM_RF_PATH_A ); if ( rateSection >= 2 && rateSection <= 9 ) { if ( rateSection == 2 ) { baseSection = 2; refSection = 6; } else if ( rateSection == 3 ) { baseSection = 3; refSection = 7; } else if ( rateSection == 4 ) { baseSection = 4; refSection = 8; } else if ( rateSection == 5 ) { baseSection = 5; refSection = 9; } else if ( rateSection == 6 ) { baseSection = 6; refSection = 2; } else if ( rateSection == 7 ) { baseSection = 7; refSection = 3; } else if ( rateSection == 8 ) { baseSection = 8; refSection = 4; } else if ( rateSection == 9 ) { baseSection = 9; refSection = 5; } pHalData->TxPwrLimit_5G[regulation][bw][baseSection][channel][ODM_RF_PATH_A] = pHalData->TxPwrLimit_5G[regulation][bw][refSection][channel][ODM_RF_PATH_A]; } //DBG_871X("use other value %d", tempPwrLmt ); } } } } } } } VOID PHY_ConvertTxPowerLimitToPowerIndex( IN PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u8 BW40PwrBasedBm2_4G = 0x2E, BW40PwrBasedBm5G = 0x2E; u8 regulation, bw, channel, rateSection; u8 baseIndex2_4G; u8 baseIndex5G; s8 tempValue = 0, tempPwrLmt = 0; u8 rfPath = 0; //DBG_871X("=====> PHY_ConvertTxPowerLimitToPowerIndex()\n" ); phy_CrossReferenceHTAndVHTTxPowerLimit( Adapter ); for ( regulation = 0; regulation < MAX_REGULATION_NUM; ++regulation ) { for ( bw = 0; bw < MAX_2_4G_BANDWITH_NUM; ++bw ) { for ( channel = 0; channel < CHANNEL_MAX_NUMBER_2G; ++channel ) { for ( rateSection = 0; rateSection < MAX_RATE_SECTION_NUM; ++rateSection ) { tempPwrLmt = pHalData->TxPwrLimit_2_4G[regulation][bw][rateSection][channel][ODM_RF_PATH_A]; for ( rfPath = ODM_RF_PATH_A; rfPath < MAX_RF_PATH_NUM; ++rfPath ) { if ( pHalData->odmpriv.PhyRegPgValueType == PHY_REG_PG_EXACT_VALUE ) { if ( rateSection == 5 ) // HT 4T BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_4TX, HT_MCS24_MCS31 ); else if ( rateSection == 4 ) // HT 3T BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_3TX, HT_MCS16_MCS23 ); else if ( rateSection == 3 ) // HT 2T BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_2TX, HT_MCS8_MCS15 ); else if ( rateSection == 2 ) // HT 1T BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_1TX, HT_MCS0_MCS7 ); else if ( rateSection == 1 ) // OFDM BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_1TX, OFDM ); else if ( rateSection == 0 ) // CCK BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_1TX, CCK ); } else BW40PwrBasedBm2_4G = Adapter->registrypriv.RegPowerBase * 2; if ( tempPwrLmt != MAX_POWER_INDEX ) { tempValue = tempPwrLmt - BW40PwrBasedBm2_4G; pHalData->TxPwrLimit_2_4G[regulation][bw][rateSection][channel][rfPath] = tempValue; } } } } } } if ( IS_HARDWARE_TYPE_JAGUAR( Adapter ) || IS_HARDWARE_TYPE_8813A( Adapter ) ) { for ( regulation = 0; regulation < MAX_REGULATION_NUM; ++regulation ) { for ( bw = 0; bw < MAX_5G_BANDWITH_NUM; ++bw ) { for ( channel = 0; channel < CHANNEL_MAX_NUMBER_5G; ++channel ) { for ( rateSection = 0; rateSection < MAX_RATE_SECTION_NUM; ++rateSection ) { tempPwrLmt = pHalData->TxPwrLimit_5G[regulation][bw][rateSection][channel][ODM_RF_PATH_A]; for ( rfPath = ODM_RF_PATH_A; rfPath < MAX_RF_PATH_NUM; ++rfPath ) { if ( pHalData->odmpriv.PhyRegPgValueType == PHY_REG_PG_EXACT_VALUE ) { if ( rateSection == 9 ) // VHT 4SS BW40PwrBasedBm5G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_4TX, VHT_4SSMCS0_4SSMCS9); else if ( rateSection == 8 ) // VHT 3SS BW40PwrBasedBm5G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_3TX, VHT_3SSMCS0_3SSMCS9 ); else if ( rateSection == 7 ) // VHT 2SS BW40PwrBasedBm5G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_2TX, VHT_2SSMCS0_2SSMCS9 ); else if ( rateSection == 6 ) // VHT 1SS BW40PwrBasedBm5G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_1TX, VHT_1SSMCS0_1SSMCS9 ); else if ( rateSection == 5 ) // HT 4T BW40PwrBasedBm5G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_4TX, HT_MCS24_MCS31 ); else if ( rateSection == 4 ) // HT 3T BW40PwrBasedBm5G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_3TX, HT_MCS16_MCS23 ); else if ( rateSection == 3 ) // HT 2T BW40PwrBasedBm5G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_2TX, HT_MCS8_MCS15 ); else if ( rateSection == 2 ) // HT 1T BW40PwrBasedBm5G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_1TX, HT_MCS0_MCS7 ); else if ( rateSection == 1 ) // OFDM BW40PwrBasedBm5G = PHY_GetTxPowerByRateBase( Adapter, BAND_ON_2_4G, rfPath, RF_1TX, OFDM ); } else BW40PwrBasedBm5G = Adapter->registrypriv.RegPowerBase * 2; if ( tempPwrLmt != MAX_POWER_INDEX ) { tempValue = tempPwrLmt - BW40PwrBasedBm5G; pHalData->TxPwrLimit_5G[regulation][bw][rateSection][channel][rfPath] = tempValue; } } } } } } } //DBG_871X("<===== PHY_ConvertTxPowerLimitToPowerIndex()\n" ); } VOID PHY_InitTxPowerLimit( IN PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u8 i, j, k, l, m; //DBG_871X("=====> PHY_InitTxPowerLimit()!\n" ); for ( i = 0; i < MAX_REGULATION_NUM; ++i ) { for ( j = 0; j < MAX_2_4G_BANDWITH_NUM; ++j ) for ( k = 0; k < MAX_RATE_SECTION_NUM; ++k ) for ( m = 0; m < CHANNEL_MAX_NUMBER_2G; ++m ) for ( l = 0; l < MAX_RF_PATH_NUM; ++l ) pHalData->TxPwrLimit_2_4G[i][j][k][m][l] = MAX_POWER_INDEX; } for ( i = 0; i < MAX_REGULATION_NUM; ++i ) { for ( j = 0; j < MAX_5G_BANDWITH_NUM; ++j ) for ( k = 0; k < MAX_RATE_SECTION_NUM; ++k ) for ( m = 0; m < CHANNEL_MAX_NUMBER_5G; ++m ) for ( l = 0; l < MAX_RF_PATH_NUM; ++l ) pHalData->TxPwrLimit_5G[i][j][k][m][l] = MAX_POWER_INDEX; } //DBG_871X("<===== PHY_InitTxPowerLimit()!\n" ); } VOID PHY_SetTxPowerLimit( IN PADAPTER Adapter, IN u8 *Regulation, IN u8 *Band, IN u8 *Bandwidth, IN u8 *RateSection, IN u8 *RfPath, IN u8 *Channel, IN u8 *PowerLimit ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA( Adapter ); u8 regulation=0, bandwidth=0, rateSection=0, channel; s8 powerLimit = 0, prevPowerLimit, channelIndex; //DBG_871X( "Index of power limit table [band %s][regulation %s][bw %s][rate section %s][rf path %s][chnl %s][val %s]\n", // Band, Regulation, Bandwidth, RateSection, RfPath, Channel, PowerLimit ); if ( !GetU1ByteIntegerFromStringInDecimal( (s8 *)Channel, &channel ) || !GetU1ByteIntegerFromStringInDecimal( (s8 *)PowerLimit, &powerLimit ) ) { DBG_871X("Illegal index of power limit table [chnl %s][val %s]\n", Channel, PowerLimit ); } powerLimit = powerLimit > MAX_POWER_INDEX ? MAX_POWER_INDEX : powerLimit; if ( eqNByte( Regulation, (u8 *)("FCC"), 3 ) ) regulation = 0; else if ( eqNByte( Regulation, (u8 *)("MKK"), 3 ) ) regulation = 1; else if ( eqNByte( Regulation, (u8 *)("ETSI"), 4 ) ) regulation = 2; else if ( eqNByte( Regulation, (u8 *)("WW13"), 4 ) ) regulation = 3; if ( eqNByte( RateSection, (u8 *)("CCK"), 3 ) && eqNByte( RfPath, (u8 *)("1T"), 2 ) ) rateSection = 0; else if ( eqNByte( RateSection, (u8 *)("OFDM"), 4 ) && eqNByte( RfPath, (u8 *)("1T"), 2 ) ) rateSection = 1; else if ( eqNByte( RateSection, (u8 *)("HT"), 2 ) && eqNByte( RfPath, (u8 *)("1T"), 2 ) ) rateSection = 2; else if ( eqNByte( RateSection, (u8 *)("HT"), 2 ) && eqNByte( RfPath, (u8 *)("2T"), 2 ) ) rateSection = 3; else if ( eqNByte( RateSection, (u8 *)("HT"), 2 ) && eqNByte( RfPath, (u8 *)("3T"), 2 ) ) rateSection = 4; else if ( eqNByte( RateSection, (u8 *)("HT"), 2 ) && eqNByte( RfPath, (u8 *)("4T"), 2 ) ) rateSection = 5; else if ( eqNByte( RateSection, (u8 *)("VHT"), 3 ) && eqNByte( RfPath, (u8 *)("1T"), 2 ) ) rateSection = 6; else if ( eqNByte( RateSection, (u8 *)("VHT"), 3 ) && eqNByte( RfPath, (u8 *)("2T"), 2 ) ) rateSection = 7; else if ( eqNByte( RateSection, (u8 *)("VHT"), 3 ) && eqNByte( RfPath, (u8 *)("3T"), 2 ) ) rateSection = 8; else if ( eqNByte( RateSection, (u8 *)("VHT"), 3 ) && eqNByte( RfPath, (u8 *)("4T"), 2 ) ) rateSection = 9; else { DBG_871X("Wrong rate section!\n"); return; } if ( eqNByte( Bandwidth, (u8 *)("20M"), 3 ) ) bandwidth = 0; else if ( eqNByte( Bandwidth, (u8 *)("40M"), 3 ) ) bandwidth = 1; else if ( eqNByte( Bandwidth, (u8 *)("80M"), 3 ) ) bandwidth = 2; else if ( eqNByte( Bandwidth, (u8 *)("160M"), 4 ) ) bandwidth = 3; if ( eqNByte( Band, (u8 *)("2.4G"), 4 ) ) { channelIndex = phy_GetChannelIndexOfTxPowerLimit( BAND_ON_2_4G, channel ); if ( channelIndex == -1 ) return; prevPowerLimit = pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A]; if ( powerLimit < prevPowerLimit ) pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A] = powerLimit; //DBG_871X( "2.4G Band value : [regulation %d][bw %d][rate_section %d][chnl %d][val %d]\n", // regulation, bandwidth, rateSection, channelIndex, pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A] ); } else if ( eqNByte( Band, (u8 *)("5G"), 2 ) ) { channelIndex = phy_GetChannelIndexOfTxPowerLimit( BAND_ON_5G, channel ); if ( channelIndex == -1 ) return; prevPowerLimit = pHalData->TxPwrLimit_5G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A]; if ( powerLimit < prevPowerLimit ) pHalData->TxPwrLimit_5G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A] = powerLimit; //DBG_871X( "5G Band value : [regulation %d][bw %d][rate_section %d][chnl %d][val %d]\n", // regulation, bandwidth, rateSection, channel, pHalData->TxPwrLimit_5G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A] ); } else { DBG_871X("Cannot recognize the band info in %s\n", Band ); return; } } u8 PHY_GetTxPowerIndex( IN PADAPTER pAdapter, IN u8 RFPath, IN u8 Rate, IN CHANNEL_WIDTH BandWidth, IN u8 Channel ) { u8 txPower = 0x3E; if (IS_HARDWARE_TYPE_8813A(pAdapter)) { //#if (RTL8814A_SUPPORT==1) // txPower = PHY_GetTxPowerIndex_8813A( pAdapter, PowerIndex, RFPath, Rate ); //#endif } else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { #if ((RTL8812A_SUPPORT==1) || (RTL8821A_SUPPORT == 1)) txPower = PHY_GetTxPowerIndex_8812A(pAdapter, RFPath, Rate, BandWidth, Channel); #endif } else if (IS_HARDWARE_TYPE_8723B(pAdapter)) { #if (RTL8723B_SUPPORT==1) txPower = PHY_GetTxPowerIndex_8723B(pAdapter, RFPath, Rate, BandWidth, Channel); #endif } else if (IS_HARDWARE_TYPE_8192E(pAdapter)) { #if (RTL8192E_SUPPORT==1) txPower = PHY_GetTxPowerIndex_8192E(pAdapter, RFPath, Rate, BandWidth, Channel); #endif } else if (IS_HARDWARE_TYPE_8188E(pAdapter)) { #if (RTL8188E_SUPPORT==1) txPower = PHY_GetTxPowerIndex_8188E(pAdapter, RFPath, Rate, BandWidth, Channel); #endif } return txPower; } VOID PHY_SetTxPowerIndex( IN PADAPTER pAdapter, IN u32 PowerIndex, IN u8 RFPath, IN u8 Rate ) { if (IS_HARDWARE_TYPE_8813A(pAdapter)) { //#if (RTL8814A_SUPPORT==1) // PHY_SetTxPowerIndex_8813A( pAdapter, PowerIndex, RFPath, Rate ); //#endif } else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { #if ((RTL8812A_SUPPORT==1) || (RTL8821A_SUPPORT == 1)) PHY_SetTxPowerIndex_8812A( pAdapter, PowerIndex, RFPath, Rate ); #endif } else if (IS_HARDWARE_TYPE_8723B(pAdapter)) { #if (RTL8723B_SUPPORT==1) PHY_SetTxPowerIndex_8723B( pAdapter, PowerIndex, RFPath, Rate ); #endif } else if (IS_HARDWARE_TYPE_8192E(pAdapter)) { #if (RTL8192E_SUPPORT==1) PHY_SetTxPowerIndex_8192E( pAdapter, PowerIndex, RFPath, Rate ); #endif } else if (IS_HARDWARE_TYPE_8188E(pAdapter)) { #if (RTL8188E_SUPPORT==1) PHY_SetTxPowerIndex_8188E( pAdapter, PowerIndex, RFPath, Rate ); #endif } } VOID Hal_ChannelPlanToRegulation( IN PADAPTER Adapter, IN u16 ChannelPlan ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); DM_ODM_T *odm = &pHalData->odmpriv; pHalData->Regulation2_4G = TXPWR_LMT_WW; pHalData->Regulation5G = TXPWR_LMT_WW; switch(ChannelPlan) { case RT_CHANNEL_DOMAIN_WORLD_NULL: pHalData->Regulation2_4G = TXPWR_LMT_WW; break; case RT_CHANNEL_DOMAIN_ETSI1_NULL: pHalData->Regulation2_4G = TXPWR_LMT_ETSI; break; case RT_CHANNEL_DOMAIN_FCC1_NULL: pHalData->Regulation2_4G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_MKK1_NULL: pHalData->Regulation2_4G = TXPWR_LMT_MKK; break; case RT_CHANNEL_DOMAIN_ETSI2_NULL: pHalData->Regulation2_4G = TXPWR_LMT_ETSI; break; case RT_CHANNEL_DOMAIN_FCC1_FCC1: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_WORLD_ETSI1: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_ETSI; break; case RT_CHANNEL_DOMAIN_MKK1_MKK1: pHalData->Regulation2_4G = TXPWR_LMT_MKK; pHalData->Regulation5G = TXPWR_LMT_MKK; break; case RT_CHANNEL_DOMAIN_WORLD_KCC1: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_MKK; break; case RT_CHANNEL_DOMAIN_WORLD_FCC2: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_WORLD_FCC3: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_WORLD_FCC4: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_WORLD_FCC5: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_WORLD_FCC6: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_FCC1_FCC7: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_WORLD_ETSI2: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_WORLD_ETSI3: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_MKK1_MKK2: pHalData->Regulation2_4G = TXPWR_LMT_MKK; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_MKK1_MKK3: pHalData->Regulation2_4G = TXPWR_LMT_MKK; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_FCC1_NCC1: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_FCC1_NCC2: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_GLOBAL_NULL: pHalData->Regulation2_4G = TXPWR_LMT_WW; pHalData->Regulation5G = TXPWR_LMT_WW; break; case RT_CHANNEL_DOMAIN_ETSI1_ETSI4: pHalData->Regulation2_4G = TXPWR_LMT_ETSI; pHalData->Regulation5G = TXPWR_LMT_ETSI; break; case RT_CHANNEL_DOMAIN_FCC1_FCC2: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_FCC1_NCC3: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_WORLD_ETSI5: pHalData->Regulation2_4G = TXPWR_LMT_ETSI; pHalData->Regulation5G = TXPWR_LMT_ETSI; break; case RT_CHANNEL_DOMAIN_FCC1_FCC8: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_WORLD_ETSI6: pHalData->Regulation2_4G = TXPWR_LMT_ETSI; pHalData->Regulation5G = TXPWR_LMT_ETSI; break; case RT_CHANNEL_DOMAIN_WORLD_ETSI7: pHalData->Regulation2_4G = TXPWR_LMT_ETSI; pHalData->Regulation5G = TXPWR_LMT_ETSI; break; case RT_CHANNEL_DOMAIN_WORLD_ETSI8: pHalData->Regulation2_4G = TXPWR_LMT_ETSI; pHalData->Regulation5G = TXPWR_LMT_ETSI; break; case RT_CHANNEL_DOMAIN_WORLD_ETSI9: pHalData->Regulation2_4G = TXPWR_LMT_ETSI; pHalData->Regulation5G = TXPWR_LMT_ETSI; break; case RT_CHANNEL_DOMAIN_WORLD_ETSI10: pHalData->Regulation2_4G = TXPWR_LMT_ETSI; pHalData->Regulation5G = TXPWR_LMT_ETSI; break; case RT_CHANNEL_DOMAIN_WORLD_ETSI11: pHalData->Regulation2_4G = TXPWR_LMT_ETSI; pHalData->Regulation5G = TXPWR_LMT_ETSI; break; case RT_CHANNEL_DOMAIN_FCC1_NCC4: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_WORLD_ETSI12: pHalData->Regulation2_4G = TXPWR_LMT_ETSI; pHalData->Regulation5G = TXPWR_LMT_ETSI; break; case RT_CHANNEL_DOMAIN_FCC1_FCC9: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_WORLD_ETSI13: pHalData->Regulation2_4G = TXPWR_LMT_ETSI; pHalData->Regulation5G = TXPWR_LMT_ETSI; break; case RT_CHANNEL_DOMAIN_FCC1_FCC10: pHalData->Regulation2_4G = TXPWR_LMT_FCC; pHalData->Regulation5G = TXPWR_LMT_FCC; break; case RT_CHANNEL_DOMAIN_REALTEK_DEFINE: //Realtek Reserve pHalData->Regulation2_4G = TXPWR_LMT_WW; pHalData->Regulation5G = TXPWR_LMT_WW; break; default: break; } DBG_871X("%s ChannelPlan:0x%02x,Regulation(2_4G/5G):0x%02x,0x%02x\n", __FUNCTION__,ChannelPlan,pHalData->Regulation2_4G,pHalData->Regulation5G); } #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE int phy_ConfigMACWithParaFile( IN PADAPTER Adapter, IN char* pFileName ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); int rlen = 0, rtStatus = _FAIL; char *szLine, *ptmp; u32 u4bRegOffset, u4bRegValue, u4bMove; if(!(Adapter->registrypriv.load_phy_file & LOAD_MAC_PARA_FILE)) return rtStatus; _rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN); if ((pHalData->mac_reg_len == 0) && (pHalData->mac_reg == NULL)) { rtw_merge_string(file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); if (rtw_is_file_readable(file_path) == _TRUE) { rlen = rtw_retrive_from_file(file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); if (rlen > 0) { rtStatus = _SUCCESS; pHalData->mac_reg = rtw_zvmalloc(rlen); if(pHalData->mac_reg) { _rtw_memcpy(pHalData->mac_reg, pHalData->para_file_buf, rlen); pHalData->mac_reg_len = rlen; } else { DBG_871X("%s mac_reg alloc fail !\n",__FUNCTION__); } } } } else { if ((pHalData->mac_reg_len != 0) && (pHalData->mac_reg != NULL)) { _rtw_memcpy(pHalData->para_file_buf, pHalData->mac_reg, pHalData->mac_reg_len); rtStatus = _SUCCESS; } else { DBG_871X("%s(): Critical Error !!!\n",__FUNCTION__); } } if (rtStatus == _SUCCESS) { ptmp = pHalData->para_file_buf; for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) { if(!IsCommentString(szLine)) { // Get 1st hex value as register offset if(GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove)) { if(u4bRegOffset == 0xffff) { // Ending. break; } // Get 2nd hex value as register value. szLine += u4bMove; if(GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) { rtw_write8(Adapter, u4bRegOffset, (u8)u4bRegValue); } } } } } else { DBG_871X("%s(): No File %s, Load from HWImg Array!\n", __FUNCTION__, pFileName); } return rtStatus; } int phy_ConfigBBWithParaFile( IN PADAPTER Adapter, IN char* pFileName, IN u32 ConfigType ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); int rlen = 0, rtStatus = _FAIL; char *szLine, *ptmp; u32 u4bRegOffset, u4bRegValue, u4bMove; char *pBuf = NULL; u32 *pBufLen = NULL; if(!(Adapter->registrypriv.load_phy_file & LOAD_BB_PARA_FILE)) return rtStatus; switch(ConfigType) { case CONFIG_BB_PHY_REG: pBuf = pHalData->bb_phy_reg; pBufLen = &pHalData->bb_phy_reg_len; break; case CONFIG_BB_AGC_TAB: pBuf = pHalData->bb_agc_tab; pBufLen = &pHalData->bb_agc_tab_len; break; default: DBG_871X("Unknown ConfigType!! %d\r\n", ConfigType); break; } _rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN); if ((pBufLen != NULL) && (*pBufLen == 0) && (pBuf == NULL)) { rtw_merge_string(file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); if (rtw_is_file_readable(file_path) == _TRUE) { rlen = rtw_retrive_from_file(file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); if (rlen > 0) { rtStatus = _SUCCESS; pBuf = rtw_zvmalloc(rlen); if(pBuf) { _rtw_memcpy(pBuf, pHalData->para_file_buf, rlen); *pBufLen = rlen; switch(ConfigType) { case CONFIG_BB_PHY_REG: pHalData->bb_phy_reg = pBuf; break; case CONFIG_BB_AGC_TAB: pHalData->bb_agc_tab = pBuf; break; } } else { DBG_871X("%s(): ConfigType %d alloc fail !\n",__FUNCTION__,ConfigType); } } } } else { if ((pBufLen != NULL) && (*pBufLen == 0) && (pBuf == NULL)) { _rtw_memcpy(pHalData->para_file_buf, pBuf, *pBufLen); rtStatus = _SUCCESS; } else { DBG_871X("%s(): Critical Error !!!\n",__FUNCTION__); } } if (rtStatus == _SUCCESS) { ptmp = pHalData->para_file_buf; for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) { if(!IsCommentString(szLine)) { // Get 1st hex value as register offset. if(GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove)) { if(u4bRegOffset == 0xffff) { // Ending. break; } else if (u4bRegOffset == 0xfe || u4bRegOffset == 0xffe) { #ifdef CONFIG_LONG_DELAY_ISSUE rtw_msleep_os(50); #else rtw_mdelay_os(50); #endif } else if (u4bRegOffset == 0xfd) { rtw_mdelay_os(5); } else if (u4bRegOffset == 0xfc) { rtw_mdelay_os(1); } else if (u4bRegOffset == 0xfb) { rtw_udelay_os(50); } else if (u4bRegOffset == 0xfa) { rtw_udelay_os(5); } else if (u4bRegOffset == 0xf9) { rtw_udelay_os(1); } // Get 2nd hex value as register value. szLine += u4bMove; if(GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) { //DBG_871X("[BB-ADDR]%03lX=%08lX\n", u4bRegOffset, u4bRegValue); PHY_SetBBReg(Adapter, u4bRegOffset, bMaskDWord, u4bRegValue); if (u4bRegOffset == 0xa24) pHalData->odmpriv.RFCalibrateInfo.RegA24 = u4bRegValue; // Add 1us delay between BB/RF register setting. rtw_udelay_os(1); } } } } } else { DBG_871X("%s(): No File %s, Load from HWImg Array!\n", __FUNCTION__, pFileName); } return rtStatus; } VOID phy_DecryptBBPgParaFile( PADAPTER Adapter, char* buffer ) { u32 i = 0, j = 0; u8 map[95] = {0}; u8 currentChar; char *BufOfLines, *ptmp; //DBG_871X("=====>phy_DecryptBBPgParaFile()\n"); // 32 the ascii code of the first visable char, 126 the last one for ( i = 0; i < 95; ++i ) map[i] = ( u8 ) ( 94 - i ); ptmp = buffer; i = 0; for (BufOfLines = GetLineFromBuffer(ptmp); BufOfLines != NULL; BufOfLines = GetLineFromBuffer(ptmp)) { //DBG_871X("Encrypted Line: %s\n", BufOfLines); for ( j = 0; j < strlen(BufOfLines); ++j ) { currentChar = BufOfLines[j]; if ( currentChar == '\0' ) break; currentChar -= (u8) ( ( ( ( i + j ) * 3 ) % 128 ) ); BufOfLines[j] = map[currentChar - 32] + 32; } //DBG_871X("Decrypted Line: %s\n", BufOfLines ); if (strlen(BufOfLines) != 0) i++; BufOfLines[strlen(BufOfLines)] = '\n'; } } int phy_ParseBBPgParaFile( PADAPTER Adapter, char* buffer ) { int rtStatus = _SUCCESS; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); char *szLine, *ptmp; u32 u4bRegOffset, u4bRegMask, u4bRegValue; u32 u4bMove; BOOLEAN firstLine = _TRUE; u8 tx_num = 0; u8 band = 0, rf_path = 0; //DBG_871X("=====>phy_ParseBBPgParaFile()\n"); if ( Adapter->registrypriv.RegDecryptCustomFile == 1 ) phy_DecryptBBPgParaFile( Adapter, buffer); ptmp = buffer; for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) { if(!IsCommentString(szLine)) { if( isAllSpaceOrTab( szLine, sizeof( *szLine ) ) ) continue; // Get header info (relative value or exact value) if ( firstLine ) { if ( eqNByte( szLine, (u8 *)("#[v1]"), 5 ) ) { pHalData->odmpriv.PhyRegPgVersion = szLine[3] - '0'; //DBG_871X("This is a new format PHY_REG_PG.txt \n"); } else if ( eqNByte( szLine, (u8 *)("#[v0]"), 5 )) { pHalData->odmpriv.PhyRegPgVersion = szLine[3] - '0'; //DBG_871X("This is a old format PHY_REG_PG.txt ok\n"); } else { DBG_871X("The format in PHY_REG_PG are invalid %s\n", szLine); return _FAIL; } if ( eqNByte( szLine + 5, (u8 *)("[Exact]#"), 8 ) ) { pHalData->odmpriv.PhyRegPgValueType = PHY_REG_PG_EXACT_VALUE; //DBG_871X("The values in PHY_REG_PG are exact values ok\n"); firstLine = _FALSE; continue; } else if ( eqNByte( szLine + 5, (pu1Byte)("[Relative]#"), 11 ) ) { pHalData->odmpriv.PhyRegPgValueType = PHY_REG_PG_RELATIVE_VALUE; //DBG_871X("The values in PHY_REG_PG are relative values ok\n"); firstLine = _FALSE; continue; } else { DBG_871X("The values in PHY_REG_PG are invalid %s\n", szLine); return _FAIL; } } if ( pHalData->odmpriv.PhyRegPgVersion == 0 ) { // Get 1st hex value as register offset. if(GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove)) { szLine += u4bMove; if(u4bRegOffset == 0xffff) { // Ending. break; } // Get 2nd hex value as register mask. if ( GetHexValueFromString(szLine, &u4bRegMask, &u4bMove) ) szLine += u4bMove; else return _FAIL; if ( pHalData->odmpriv.PhyRegPgValueType == PHY_REG_PG_RELATIVE_VALUE ) { // Get 3rd hex value as register value. if(GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) { PHY_StoreTxPowerByRate(Adapter, 0, 0, 1, u4bRegOffset, u4bRegMask, u4bRegValue); //DBG_871X("[ADDR] %03X=%08X Mask=%08x\n", u4bRegOffset, u4bRegValue, u4bRegMask); } else { return _FAIL; } } else if ( pHalData->odmpriv.PhyRegPgValueType == PHY_REG_PG_EXACT_VALUE ) { u32 combineValue = 0; u8 integer = 0, fraction = 0; if ( GetFractionValueFromString( szLine, &integer, &fraction, &u4bMove ) ) szLine += u4bMove; else return _FAIL; integer *= 2; if ( fraction == 5 ) integer += 1; combineValue |= ( ( ( integer / 10 ) << 4 ) + ( integer % 10 ) ); //DBG_871X(" %d", integer ); if ( GetFractionValueFromString( szLine, &integer, &fraction, &u4bMove ) ) szLine += u4bMove; else return _FAIL; integer *= 2; if ( fraction == 5 ) integer += 1; combineValue <<= 8; combineValue |= ( ( ( integer / 10 ) << 4 ) + ( integer % 10 ) ); //DBG_871X(" %d", integer ); if ( GetFractionValueFromString( szLine, &integer, &fraction, &u4bMove ) ) szLine += u4bMove; else return _FAIL; integer *= 2; if ( fraction == 5 ) integer += 1; combineValue <<= 8; combineValue |= ( ( ( integer / 10 ) << 4 ) + ( integer % 10 ) ); //DBG_871X(" %d", integer ); if ( GetFractionValueFromString( szLine, &integer, &fraction, &u4bMove ) ) szLine += u4bMove; else return _FAIL; integer *= 2; if ( fraction == 5 ) integer += 1; combineValue <<= 8; combineValue |= ( ( ( integer / 10 ) << 4 ) + ( integer % 10 ) ); //DBG_871X(" %d", integer ); PHY_StoreTxPowerByRate(Adapter, 0, 0, 1, u4bRegOffset, u4bRegMask, combineValue); //DBG_871X("[ADDR] 0x%3x = 0x%4x\n", u4bRegOffset, combineValue ); } } } else if ( pHalData->odmpriv.PhyRegPgVersion > 0 ) { u32 index = 0, cnt = 0; if ( eqNByte( szLine, "0xffff", 6 ) ) break; if( !eqNByte( "#[END]#", szLine, 7 ) ) { // load the table label info if ( szLine[0] == '#' ) { index = 0; if ( eqNByte( szLine, "#[2.4G]" , 7 ) ) { band = BAND_ON_2_4G; index += 8; } else if ( eqNByte( szLine, "#[5G]", 5) ) { band = BAND_ON_5G; index += 6; } else { DBG_871X("Invalid band %s in PHY_REG_PG.txt \n", szLine ); return _FAIL; } rf_path= szLine[index] - 'A'; //DBG_871X(" Table label Band %d, RfPath %d\n", band, rf_path ); } else // load rows of tables { if ( szLine[1] == '1' ) tx_num = RF_1TX; else if ( szLine[1] == '2' ) tx_num = RF_2TX; else if ( szLine[1] == '3' ) tx_num = RF_3TX; else if ( szLine[1] == '4' ) tx_num = RF_4TX; else { DBG_871X("Invalid row in PHY_REG_PG.txt %c\n", szLine[1] ); return _FAIL; } while ( szLine[index] != ']' ) ++index; ++index;// skip ] // Get 2nd hex value as register offset. szLine += index; if ( GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove) ) szLine += u4bMove; else return _FAIL; // Get 2nd hex value as register mask. if ( GetHexValueFromString(szLine, &u4bRegMask, &u4bMove) ) szLine += u4bMove; else return _FAIL; if ( pHalData->odmpriv.PhyRegPgValueType == PHY_REG_PG_RELATIVE_VALUE ) { // Get 3rd hex value as register value. if(GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) { PHY_StoreTxPowerByRate(Adapter, band, rf_path, tx_num, u4bRegOffset, u4bRegMask, u4bRegValue); //DBG_871X("[ADDR] %03X (tx_num %d) =%08X Mask=%08x\n", u4bRegOffset, tx_num, u4bRegValue, u4bRegMask); } else { return _FAIL; } } else if ( pHalData->odmpriv.PhyRegPgValueType == PHY_REG_PG_EXACT_VALUE ) { u32 combineValue = 0; u8 integer = 0, fraction = 0; if ( GetFractionValueFromString( szLine, &integer, &fraction, &u4bMove ) ) szLine += u4bMove; else return _FAIL; integer *= 2; if ( fraction == 5 ) integer += 1; combineValue |= ( ( ( integer / 10 ) << 4 ) + ( integer % 10 ) ); //DBG_871X(" %d", integer ); if ( GetFractionValueFromString( szLine, &integer, &fraction, &u4bMove ) ) szLine += u4bMove; else return _FAIL; integer *= 2; if ( fraction == 5 ) integer += 1; combineValue <<= 8; combineValue |= ( ( ( integer / 10 ) << 4 ) + ( integer % 10 ) ); //DBG_871X(" %d", integer ); if ( GetFractionValueFromString( szLine, &integer, &fraction, &u4bMove ) ) szLine += u4bMove; else return _FAIL; integer *= 2; if ( fraction == 5 ) integer += 1; combineValue <<= 8; combineValue |= ( ( ( integer / 10 ) << 4 ) + ( integer % 10 ) ); //DBG_871X(" %d", integer ); if ( GetFractionValueFromString( szLine, &integer, &fraction, &u4bMove ) ) szLine += u4bMove; else return _FAIL; integer *= 2; if ( fraction == 5 ) integer += 1; combineValue <<= 8; combineValue |= ( ( ( integer / 10 ) << 4 ) + ( integer % 10 ) ); //DBG_871X(" %d", integer ); PHY_StoreTxPowerByRate(Adapter, band, rf_path, tx_num, u4bRegOffset, u4bRegMask, combineValue); //DBG_871X("[ADDR] 0x%3x (tx_num %d) = 0x%4x\n", u4bRegOffset, tx_num, combineValue ); } } } } } } //DBG_871X("<=====phy_ParseBBPgParaFile()\n"); return rtStatus; } int phy_ConfigBBWithPgParaFile( IN PADAPTER Adapter, IN char* pFileName) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); int rlen = 0, rtStatus = _FAIL; if(!(Adapter->registrypriv.load_phy_file & LOAD_BB_PG_PARA_FILE)) return rtStatus; _rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN); if ((pHalData->bb_phy_reg_pg_len == 0) && (pHalData->bb_phy_reg_pg == NULL)) { rtw_merge_string(file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); if (rtw_is_file_readable(file_path) == _TRUE) { rlen = rtw_retrive_from_file(file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); if (rlen > 0) { rtStatus = _SUCCESS; pHalData->bb_phy_reg_pg = rtw_zvmalloc(rlen); if(pHalData->bb_phy_reg_pg) { _rtw_memcpy(pHalData->bb_phy_reg_pg, pHalData->para_file_buf, rlen); pHalData->bb_phy_reg_pg_len = rlen; } else { DBG_871X("%s bb_phy_reg_pg alloc fail !\n",__FUNCTION__); } } } } else { if ((pHalData->bb_phy_reg_pg_len != 0) && (pHalData->bb_phy_reg_pg != NULL)) { _rtw_memcpy(pHalData->para_file_buf, pHalData->bb_phy_reg_pg, pHalData->bb_phy_reg_pg_len); rtStatus = _SUCCESS; } else { DBG_871X("%s(): Critical Error !!!\n",__FUNCTION__); } } if(rtStatus == _SUCCESS) { //DBG_871X("phy_ConfigBBWithPgParaFile(): read %s ok\n", pFileName); phy_ParseBBPgParaFile(Adapter, pHalData->para_file_buf); } else { DBG_871X("%s(): No File %s, Load from HWImg Array!\n", __FUNCTION__, pFileName); } return rtStatus; } #if (MP_DRIVER == 1 ) int phy_ConfigBBWithMpParaFile( IN PADAPTER Adapter, IN char* pFileName ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); int rlen = 0, rtStatus = _FAIL; char *szLine, *ptmp; u32 u4bRegOffset, u4bRegValue, u4bMove; if(!(Adapter->registrypriv.load_phy_file & LOAD_BB_MP_PARA_FILE)) return rtStatus; _rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN); if ((pHalData->bb_phy_reg_mp_len == 0) && (pHalData->bb_phy_reg_mp == NULL)) { rtw_merge_string(file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); if (rtw_is_file_readable(file_path) == _TRUE) { rlen = rtw_retrive_from_file(file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); if (rlen > 0) { rtStatus = _SUCCESS; pHalData->bb_phy_reg_mp = rtw_zvmalloc(rlen); if(pHalData->bb_phy_reg_mp) { _rtw_memcpy(pHalData->bb_phy_reg_mp, pHalData->para_file_buf, rlen); pHalData->bb_phy_reg_mp_len = rlen; } else { DBG_871X("%s bb_phy_reg_mp alloc fail !\n",__FUNCTION__); } } } } else { if ((pHalData->bb_phy_reg_mp_len != 0) && (pHalData->bb_phy_reg_mp != NULL)) { _rtw_memcpy(pHalData->para_file_buf, pHalData->bb_phy_reg_mp, pHalData->bb_phy_reg_mp_len); rtStatus = _SUCCESS; } else { DBG_871X("%s(): Critical Error !!!\n",__FUNCTION__); } } if(rtStatus == _SUCCESS) { //DBG_871X("phy_ConfigBBWithMpParaFile(): read %s ok\n", pFileName); ptmp = pHalData->para_file_buf; for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) { if(!IsCommentString(szLine)) { // Get 1st hex value as register offset. if(GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove)) { if(u4bRegOffset == 0xffff) { // Ending. break; } else if (u4bRegOffset == 0xfe || u4bRegOffset == 0xffe) { #ifdef CONFIG_LONG_DELAY_ISSUE rtw_msleep_os(50); #else rtw_mdelay_os(50); #endif } else if (u4bRegOffset == 0xfd) { rtw_mdelay_os(5); } else if (u4bRegOffset == 0xfc) { rtw_mdelay_os(1); } else if (u4bRegOffset == 0xfb) { rtw_udelay_os(50); } else if (u4bRegOffset == 0xfa) { rtw_udelay_os(5); } else if (u4bRegOffset == 0xf9) { rtw_udelay_os(1); } // Get 2nd hex value as register value. szLine += u4bMove; if(GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) { //DBG_871X("[ADDR]%03lX=%08lX\n", u4bRegOffset, u4bRegValue); PHY_SetBBReg(Adapter, u4bRegOffset, bMaskDWord, u4bRegValue); // Add 1us delay between BB/RF register setting. rtw_udelay_os(1); } } } } } else { DBG_871X("%s(): No File %s, Load from HWImg Array!\n", __FUNCTION__, pFileName); } return rtStatus; } #endif int PHY_ConfigRFWithParaFile( IN PADAPTER Adapter, IN char* pFileName, IN u8 eRFPath ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); int rlen = 0, rtStatus = _FAIL; char *szLine, *ptmp; u32 u4bRegOffset, u4bRegValue, u4bMove; u16 i; char *pBuf = NULL; u32 *pBufLen = NULL; if(!(Adapter->registrypriv.load_phy_file & LOAD_RF_PARA_FILE)) return rtStatus; switch(eRFPath) { case ODM_RF_PATH_A: pBuf = pHalData->rf_radio_a; pBufLen = &pHalData->rf_radio_a_len; break; case ODM_RF_PATH_B: pBuf = pHalData->rf_radio_b; pBufLen = &pHalData->rf_radio_b_len; break; default: DBG_871X("Unknown RF path!! %d\r\n", eRFPath); break; } _rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN); if ((pBufLen != NULL) && (*pBufLen == 0) && (pBuf == NULL)) { rtw_merge_string(file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); if (rtw_is_file_readable(file_path) == _TRUE) { rlen = rtw_retrive_from_file(file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); if (rlen > 0) { rtStatus = _SUCCESS; pBuf = rtw_zvmalloc(rlen); if(pBuf) { _rtw_memcpy(pBuf, pHalData->para_file_buf, rlen); *pBufLen = rlen; switch(eRFPath) { case ODM_RF_PATH_A: pHalData->rf_radio_a = pBuf; break; case ODM_RF_PATH_B: pHalData->rf_radio_b = pBuf; break; } } else { DBG_871X("%s(): eRFPath=%d alloc fail !\n",__FUNCTION__,eRFPath); } } } } else { if ((pBufLen != NULL) && (*pBufLen == 0) && (pBuf == NULL)) { _rtw_memcpy(pHalData->para_file_buf, pBuf, *pBufLen); rtStatus = _SUCCESS; } else { DBG_871X("%s(): Critical Error !!!\n",__FUNCTION__); } } if(rtStatus == _SUCCESS) { //DBG_871X("%s(): read %s successfully\n", __FUNCTION__, pFileName); ptmp = pHalData->para_file_buf; for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) { if(!IsCommentString(szLine)) { // Get 1st hex value as register offset. if(GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove)) { if(u4bRegOffset == 0xfe || u4bRegOffset == 0xffe) { // Deay specific ms. Only RF configuration require delay. #ifdef CONFIG_LONG_DELAY_ISSUE rtw_msleep_os(50); #else rtw_mdelay_os(50); #endif } else if (u4bRegOffset == 0xfd) { //delay_ms(5); for(i=0;i<100;i++) rtw_udelay_os(MAX_STALL_TIME); } else if (u4bRegOffset == 0xfc) { //delay_ms(1); for(i=0;i<20;i++) rtw_udelay_os(MAX_STALL_TIME); } else if (u4bRegOffset == 0xfb) { rtw_udelay_os(50); } else if (u4bRegOffset == 0xfa) { rtw_udelay_os(5); } else if (u4bRegOffset == 0xf9) { rtw_udelay_os(1); } else if(u4bRegOffset == 0xffff) { break; } // Get 2nd hex value as register value. szLine += u4bMove; if(GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) { PHY_SetRFReg(Adapter, eRFPath, u4bRegOffset, bRFRegOffsetMask, u4bRegValue); // Temp add, for frequency lock, if no delay, that may cause // frequency shift, ex: 2412MHz => 2417MHz // If frequency shift, the following action may works. // Fractional-N table in radio_a.txt //0x2a 0x00001 // channel 1 //0x2b 0x00808 frequency divider. //0x2b 0x53333 //0x2c 0x0000c rtw_udelay_os(1); } } } } } else { DBG_871X("%s(): No File %s, Load from HWImg Array!\n", __FUNCTION__, pFileName); } return rtStatus; } VOID initDeltaSwingIndexTables( PADAPTER Adapter, char* Band, char* Path, char* Sign, char* Channel, char* Rate, char* Data ) { #define STR_EQUAL_5G(_band, _path, _sign, _rate, _chnl) \ ((strcmp(Band, _band) == 0) && (strcmp(Path, _path) == 0) && (strcmp(Sign, _sign) == 0) &&\ (strcmp(Rate, _rate) == 0) && (strcmp(Channel, _chnl) == 0)\ ) #define STR_EQUAL_2G(_band, _path, _sign, _rate) \ ((strcmp(Band, _band) == 0) && (strcmp(Path, _path) == 0) && (strcmp(Sign, _sign) == 0) &&\ (strcmp(Rate, _rate) == 0)\ ) #define STORE_SWING_TABLE(_array, _iteratedIdx) \ for(token = strsep(&Data, delim); token != NULL; token = strsep(&Data, delim))\ {\ sscanf(token, "%d", &idx);\ _array[_iteratedIdx++] = (u8)idx;\ }\ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T pDM_Odm = &pHalData->odmpriv; PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); u32 j = 0; char *token; char delim[] = ","; u32 idx = 0; //DBG_871X("===>initDeltaSwingIndexTables(): Band: %s;\nPath: %s;\nSign: %s;\nChannel: %s;\nRate: %s;\n, Data: %s;\n", // Band, Path, Sign, Channel, Rate, Data); if ( STR_EQUAL_2G("2G", "A", "+", "CCK") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P, j); } else if ( STR_EQUAL_2G("2G", "A", "-", "CCK") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N, j); } else if ( STR_EQUAL_2G("2G", "B", "+", "CCK") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P, j); } else if ( STR_EQUAL_2G("2G", "B", "-", "CCK") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N, j); } else if ( STR_EQUAL_2G("2G", "A", "+", "ALL") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, j); } else if ( STR_EQUAL_2G("2G", "A", "-", "ALL") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N, j); } else if ( STR_EQUAL_2G("2G", "B", "+", "ALL") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P, j); } else if ( STR_EQUAL_2G("2G", "B", "-", "ALL") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N, j); } else if ( STR_EQUAL_5G("5G", "A", "+", "ALL", "0") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[0], j); } else if ( STR_EQUAL_5G("5G", "A", "-", "ALL", "0") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[0], j); } else if ( STR_EQUAL_5G("5G", "B", "+", "ALL", "0") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[0], j); } else if ( STR_EQUAL_5G("5G", "B", "-", "ALL", "0") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[0], j); } else if ( STR_EQUAL_5G("5G", "A", "+", "ALL", "1") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[1], j); } else if ( STR_EQUAL_5G("5G", "A", "-", "ALL", "1") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[1], j); } else if ( STR_EQUAL_5G("5G", "B", "+", "ALL", "1") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[1], j); } else if ( STR_EQUAL_5G("5G", "B", "-", "ALL", "1") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[1], j); } else if ( STR_EQUAL_5G("5G", "A", "+", "ALL", "2") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[2], j); } else if ( STR_EQUAL_5G("5G", "A", "-", "ALL", "2") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[2], j); } else if ( STR_EQUAL_5G("5G", "B", "+", "ALL", "2") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[2], j); } else if ( STR_EQUAL_5G("5G", "B", "-", "ALL", "2") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[2], j); } else if ( STR_EQUAL_5G("5G", "A", "+", "ALL", "3") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[3], j); } else if ( STR_EQUAL_5G("5G", "A", "-", "ALL", "3") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[3], j); } else if ( STR_EQUAL_5G("5G", "B", "+", "ALL", "3") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[3], j); } else if ( STR_EQUAL_5G("5G", "B", "-", "ALL", "3") ) { STORE_SWING_TABLE(pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[3], j); } else { DBG_871X("===>initDeltaSwingIndexTables(): The input is invalid!!\n"); } } int PHY_ConfigRFWithTxPwrTrackParaFile( IN PADAPTER Adapter, IN char* pFileName ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T pDM_Odm = &pHalData->odmpriv; PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); int rlen = 0, rtStatus = _FAIL; char *szLine, *ptmp; u32 i = 0, j = 0; char c = 0; if(!(Adapter->registrypriv.load_phy_file & LOAD_RF_TXPWR_TRACK_PARA_FILE)) return rtStatus; _rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN); if ((pHalData->rf_tx_pwr_track_len == 0) && (pHalData->rf_tx_pwr_track == NULL)) { rtw_merge_string(file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); if (rtw_is_file_readable(file_path) == _TRUE) { rlen = rtw_retrive_from_file(file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); if (rlen > 0) { rtStatus = _SUCCESS; pHalData->rf_tx_pwr_track = rtw_zvmalloc(rlen); if(pHalData->rf_tx_pwr_track) { _rtw_memcpy(pHalData->rf_tx_pwr_track, pHalData->para_file_buf, rlen); pHalData->rf_tx_pwr_track_len = rlen; } else { DBG_871X("%s rf_tx_pwr_track alloc fail !\n",__FUNCTION__); } } } } else { if ((pHalData->rf_tx_pwr_track_len != 0) && (pHalData->rf_tx_pwr_track != NULL)) { _rtw_memcpy(pHalData->para_file_buf, pHalData->rf_tx_pwr_track, pHalData->rf_tx_pwr_track_len); rtStatus = _SUCCESS; } else { DBG_871X("%s(): Critical Error !!!\n",__FUNCTION__); } } if(rtStatus == _SUCCESS) { //DBG_871X("%s(): read %s successfully\n", __FUNCTION__, pFileName); ptmp = pHalData->para_file_buf; for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) { if ( ! IsCommentString(szLine) ) { char band[5]="", path[5]="", sign[5] = ""; char chnl[5]="", rate[10]=""; char data[300]=""; // 100 is too small if (strlen(szLine) < 10 || szLine[0] != '[') continue; strncpy(band, szLine+1, 2); strncpy(path, szLine+5, 1); strncpy(sign, szLine+8, 1); i = 10; // szLine+10 if ( ! ParseQualifiedString(szLine, &i, rate, '[', ']') ) { //DBG_871X("Fail to parse rate!\n"); } if ( ! ParseQualifiedString(szLine, &i, chnl, '[', ']') ) { //DBG_871X("Fail to parse channel group!\n"); } while ( szLine[i] != '{' && i < strlen(szLine)) i++; if ( ! ParseQualifiedString(szLine, &i, data, '{', '}') ) { //DBG_871X("Fail to parse data!\n"); } initDeltaSwingIndexTables(Adapter, band, path, sign, chnl, rate, data); } } } else { DBG_871X("%s(): No File %s, Load from HWImg Array!\n", __FUNCTION__, pFileName); } #if 0 for (i = 0; i < DELTA_SWINGIDX_SIZE; ++i) { DBG_871X("pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P[%d] = %d\n", i, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P[i]); DBG_871X("pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N[%d] = %d\n", i, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N[i]); DBG_871X("pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P[%d] = %d\n", i, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P[i]); DBG_871X("pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N[%d] = %d\n", i, pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N[i]); DBG_871X("pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P[%d] = %d\n", i, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P[i]); DBG_871X("pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N[%d] = %d\n", i, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N[i]); DBG_871X("pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P[%d] = %d\n", i, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P[i]); DBG_871X("pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N[%d] = %d\n", i, pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N[i]); for (j = 0; j < 3; ++j) { DBG_871X("pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[%d][%d] = %d\n", j, i, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[j][i]); DBG_871X("pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[%d][%d] = %d\n", j, i, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[j][i]); DBG_871X("pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[%d][%d] = %d\n", j, i, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[j][i]); DBG_871X("pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[%d][%d] = %d\n", j, i, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[j][i]); } } #endif return rtStatus; } int phy_ParsePowerLimitTableFile( PADAPTER Adapter, char* buffer ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u32 i = 0, forCnt = 0; u8 loadingStage = 0, limitValue = 0, fraction = 0; char *szLine, *ptmp; int rtStatus = _SUCCESS; char band[10], bandwidth[10], rateSection[10], regulation[TXPWR_LMT_MAX_REGULATION_NUM][10], rfPath[10],colNumBuf[10]; u8 colNum = 0; DBG_871X("===>phy_ParsePowerLimitTableFile()\n" ); if ( Adapter->registrypriv.RegDecryptCustomFile == 1 ) phy_DecryptBBPgParaFile( Adapter, buffer); ptmp = buffer; for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) { // skip comment if ( IsCommentString( szLine ) ) { continue; } if( loadingStage == 0 ) { for ( forCnt = 0; forCnt < TXPWR_LMT_MAX_REGULATION_NUM; ++forCnt ) _rtw_memset( ( PVOID ) regulation[forCnt], 0, 10 ); _rtw_memset( ( PVOID ) band, 0, 10 ); _rtw_memset( ( PVOID ) bandwidth, 0, 10 ); _rtw_memset( ( PVOID ) rateSection, 0, 10 ); _rtw_memset( ( PVOID ) rfPath, 0, 10 ); _rtw_memset( ( PVOID ) colNumBuf, 0, 10 ); if ( szLine[0] != '#' || szLine[1] != '#' ) continue; // skip the space i = 2; while ( szLine[i] == ' ' || szLine[i] == '\t' ) ++i; szLine[--i] = ' '; // return the space in front of the regulation info // Parse the label of the table if ( ! ParseQualifiedString( szLine, &i, band, ' ', ',' ) ) { DBG_871X( "Fail to parse band!\n"); return _FAIL; } if ( ! ParseQualifiedString( szLine, &i, bandwidth, ' ', ',' ) ) { DBG_871X("Fail to parse bandwidth!\n"); return _FAIL; } if ( ! ParseQualifiedString( szLine, &i, rfPath, ' ', ',' ) ) { DBG_871X("Fail to parse rf path!\n"); return _FAIL; } if ( ! ParseQualifiedString( szLine, &i, rateSection, ' ', ',' ) ) { DBG_871X("Fail to parse rate!\n"); return _FAIL; } loadingStage = 1; } else if ( loadingStage == 1 ) { if ( szLine[0] != '#' || szLine[1] != '#' ) continue; // skip the space i = 2; while ( szLine[i] == ' ' || szLine[i] == '\t' ) ++i; if ( !eqNByte( (u8 *)(szLine + i), (u8 *)("START"), 5 ) ) { DBG_871X("Lost \"## START\" label\n"); return _FAIL; } loadingStage = 2; } else if ( loadingStage == 2 ) { if ( szLine[0] != '#' || szLine[1] != '#' ) continue; // skip the space i = 2; while ( szLine[i] == ' ' || szLine[i] == '\t' ) ++i; if ( ! ParseQualifiedString( szLine, &i, colNumBuf, '#', '#' ) ) { DBG_871X("Fail to parse column number!\n"); return _FAIL; } if ( !GetU1ByteIntegerFromStringInDecimal( colNumBuf, &colNum ) ) return _FAIL; if ( colNum > TXPWR_LMT_MAX_REGULATION_NUM ) { DBG_871X("unvalid col number %d (greater than max %d)\n", colNum, TXPWR_LMT_MAX_REGULATION_NUM ); return _FAIL; } for ( forCnt = 0; forCnt < colNum; ++forCnt ) { u8 regulation_name_cnt = 0; // skip the space while ( szLine[i] == ' ' || szLine[i] == '\t' ) ++i; while ( szLine[i] != ' ' && szLine[i] != '\t' && szLine[i] != '\0' ) regulation[forCnt][regulation_name_cnt++] = szLine[i++]; //DBG_871X("regulation %s!\n", regulation[forCnt]); if ( regulation_name_cnt == 0 ) { DBG_871X("unvalid number of regulation!\n"); return _FAIL; } } loadingStage = 3; } else if ( loadingStage == 3 ) { char channel[10] = {0}, powerLimit[10] = {0}; u8 cnt = 0; // the table ends if ( szLine[0] == '#' && szLine[1] == '#' ) { i = 2; while ( szLine[i] == ' ' || szLine[i] == '\t' ) ++i; if ( eqNByte( (u8 *)(szLine + i), (u8 *)("END"), 3 ) ) { loadingStage = 0; continue; } else { DBG_871X("Wrong format\n"); DBG_871X("<===== phy_ParsePowerLimitTableFile()\n"); return _FAIL; } } if ( ( szLine[0] != 'c' && szLine[0] != 'C' ) || ( szLine[1] != 'h' && szLine[1] != 'H' ) ) { DBG_871X("Meet wrong channel => power limt pair\n"); continue; } i = 2;// move to the location behind 'h' // load the channel number cnt = 0; while ( szLine[i] >= '0' && szLine[i] <= '9' ) { channel[cnt] = szLine[i]; ++cnt; ++i; } //DBG_871X("chnl %s!\n", channel); for ( forCnt = 0; forCnt < colNum; ++forCnt ) { // skip the space between channel number and the power limit value while ( szLine[i] == ' ' || szLine[i] == '\t' ) ++i; // load the power limit value cnt = 0; fraction = 0; _rtw_memset( ( PVOID ) powerLimit, 0, 10 ); while ( ( szLine[i] >= '0' && szLine[i] <= '9' ) || szLine[i] == '.' ) { if ( szLine[i] == '.' ){ if ( ( szLine[i+1] >= '0' && szLine[i+1] <= '9' ) ) { fraction = szLine[i+1]; i += 2; } else { DBG_871X("Wrong fraction in TXPWR_LMT.txt\n"); return _FAIL; } break; } powerLimit[cnt] = szLine[i]; ++cnt; ++i; } if ( powerLimit[0] == '\0' ) { powerLimit[0] = '6'; powerLimit[1] = '3'; i += 2; } else { if ( !GetU1ByteIntegerFromStringInDecimal( powerLimit, &limitValue ) ) return _FAIL; limitValue *= 2; cnt = 0; if ( fraction == '5' ) ++limitValue; // the value is greater or equal to 100 if ( limitValue >= 100 ) { powerLimit[cnt++] = limitValue/100 + '0'; limitValue %= 100; if ( limitValue >= 10 ) { powerLimit[cnt++] = limitValue/10 + '0'; limitValue %= 10; } else { powerLimit[cnt++] = '0'; } powerLimit[cnt++] = limitValue + '0'; } // the value is greater or equal to 10 else if ( limitValue >= 10 ) { powerLimit[cnt++] = limitValue/10 + '0'; limitValue %= 10; powerLimit[cnt++] = limitValue + '0'; } // the value is less than 10 else powerLimit[cnt++] = limitValue + '0'; powerLimit[cnt] = '\0'; } //DBG_871X("ch%s => %s\n", channel, powerLimit); // store the power limit value PHY_SetTxPowerLimit( Adapter, (u8 *)regulation[forCnt], (u8 *)band, (u8 *)bandwidth, (u8 *)rateSection, (u8 *)rfPath, (u8 *)channel, (u8 *)powerLimit ); } } else { DBG_871X("Abnormal loading stage in phy_ParsePowerLimitTableFile()!\n"); rtStatus = _FAIL; break; } } DBG_871X("<===phy_ParsePowerLimitTableFile()\n"); return rtStatus; } int PHY_ConfigRFWithPowerLimitTableParaFile( IN PADAPTER Adapter, IN char* pFileName ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); int rlen = 0, rtStatus = _FAIL; if(!(Adapter->registrypriv.load_phy_file & LOAD_RF_TXPWR_LMT_PARA_FILE)) return rtStatus; _rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN); if ((pHalData->rf_tx_pwr_lmt_len == 0) && (pHalData->rf_tx_pwr_lmt == NULL)) { rtw_merge_string(file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName); if (rtw_is_file_readable(file_path) == _TRUE) { rlen = rtw_retrive_from_file(file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); if (rlen > 0) { rtStatus = _SUCCESS; pHalData->rf_tx_pwr_lmt = rtw_zvmalloc(rlen); if(pHalData->rf_tx_pwr_lmt) { _rtw_memcpy(pHalData->rf_tx_pwr_lmt, pHalData->para_file_buf, rlen); pHalData->rf_tx_pwr_lmt_len = rlen; } else { DBG_871X("%s rf_tx_pwr_lmt alloc fail !\n",__FUNCTION__); } } } } else { if ((pHalData->rf_tx_pwr_lmt_len != 0) && (pHalData->rf_tx_pwr_lmt != NULL)) { _rtw_memcpy(pHalData->para_file_buf, pHalData->rf_tx_pwr_lmt, pHalData->rf_tx_pwr_lmt_len); rtStatus = _SUCCESS; } else { DBG_871X("%s(): Critical Error !!!\n",__FUNCTION__); } } if(rtStatus == _SUCCESS) { //DBG_871X("%s(): read %s ok\n", __FUNCTION__, pFileName); rtStatus = phy_ParsePowerLimitTableFile( Adapter, pHalData->para_file_buf ); } else { DBG_871X("%s(): No File %s, Load from HWImg Array!\n", __FUNCTION__, pFileName); } return rtStatus; } void phy_free_filebuf(_adapter *padapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); if(pHalData->mac_reg) rtw_vmfree(pHalData->mac_reg, pHalData->mac_reg_len); if(pHalData->bb_phy_reg) rtw_vmfree(pHalData->bb_phy_reg, pHalData->bb_phy_reg_len); if(pHalData->bb_agc_tab) rtw_vmfree(pHalData->bb_agc_tab, pHalData->bb_agc_tab_len); if(pHalData->bb_phy_reg_pg) rtw_vmfree(pHalData->bb_phy_reg_pg, pHalData->bb_phy_reg_pg_len); if(pHalData->bb_phy_reg_mp) rtw_vmfree(pHalData->bb_phy_reg_mp, pHalData->bb_phy_reg_mp_len); if(pHalData->rf_radio_a) rtw_vmfree(pHalData->rf_radio_a, pHalData->rf_radio_a_len); if(pHalData->rf_radio_b) rtw_vmfree(pHalData->rf_radio_b, pHalData->rf_radio_b_len); if(pHalData->rf_tx_pwr_track) rtw_vmfree(pHalData->rf_tx_pwr_track, pHalData->rf_tx_pwr_track_len); if(pHalData->rf_tx_pwr_lmt) rtw_vmfree(pHalData->rf_tx_pwr_lmt, pHalData->rf_tx_pwr_lmt_len); } #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/hal_dm.c000066400000000000000000000160161261122257400176370ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2014 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include #include // A mapping from HalData to ODM. ODM_BOARD_TYPE_E boardType(u8 InterfaceSel) { ODM_BOARD_TYPE_E board = ODM_BOARD_DEFAULT; #ifdef CONFIG_PCI_HCI INTERFACE_SELECT_PCIE pcie = (INTERFACE_SELECT_PCIE)InterfaceSel; switch (pcie) { case INTF_SEL0_SOLO_MINICARD: board |= ODM_BOARD_MINICARD; break; case INTF_SEL1_BT_COMBO_MINICARD: board |= ODM_BOARD_BT; board |= ODM_BOARD_MINICARD; break; default: board = ODM_BOARD_DEFAULT; break; } #elif defined(CONFIG_USB_HCI) INTERFACE_SELECT_USB usb = (INTERFACE_SELECT_USB)InterfaceSel; switch (usb) { case INTF_SEL1_USB_High_Power: board |= ODM_BOARD_EXT_LNA; board |= ODM_BOARD_EXT_PA; break; case INTF_SEL2_MINICARD: board |= ODM_BOARD_MINICARD; break; case INTF_SEL4_USB_Combo: board |= ODM_BOARD_BT; break; case INTF_SEL5_USB_Combo_MF: board |= ODM_BOARD_BT; break; case INTF_SEL0_USB: case INTF_SEL3_USB_Solo: default: board = ODM_BOARD_DEFAULT; break; } #endif //DBG_871X("===> boardType(): (pHalData->InterfaceSel, pDM_Odm->BoardType) = (%d, %d)\n", InterfaceSel, board); return board; } void Init_ODM_ComInfo(_adapter *adapter) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; struct mlme_priv *pmlmepriv = &adapter->mlmepriv; struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); int i; _rtw_memset(pDM_Odm,0,sizeof(*pDM_Odm)); pDM_Odm->Adapter = adapter; ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PLATFORM, ODM_CE); if (adapter->interface_type == RTW_GSPI) ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_INTERFACE, ODM_ITRF_SDIO); else ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_INTERFACE, adapter->interface_type); ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(pHalData->VersionID)); ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PATCH_ID, pEEPROM->CustomerID); ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BWIFI_TEST, adapter->registrypriv.wifi_spec); if (pHalData->rf_type == RF_1T1R) { ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R); } else if (pHalData->rf_type == RF_2T2R){ ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R); } else if (pHalData->rf_type == RF_1T2R){ ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R); } { //1 ======= BoardType: ODM_CMNINFO_BOARD_TYPE ======= u8 odm_board_type = ODM_BOARD_DEFAULT; if (!IS_HARDWARE_TYPE_OLDER_THAN_8723A(adapter)) { if (pHalData->ExternalLNA_2G != 0) { odm_board_type |= ODM_BOARD_EXT_LNA; ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_LNA, 1); } if (pHalData->ExternalLNA_5G != 0) { odm_board_type |= ODM_BOARD_EXT_LNA_5G; ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_5G_EXT_LNA, 1); } if (pHalData->ExternalPA_2G != 0) { odm_board_type |= ODM_BOARD_EXT_PA; ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_PA, 1); } if (pHalData->ExternalPA_5G != 0) { odm_board_type |= ODM_BOARD_EXT_PA_5G; ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_5G_EXT_PA, 1); } if (pHalData->EEPROMBluetoothCoexist) odm_board_type |= ODM_BOARD_BT; } else { #ifdef CONFIG_USB_HCI if (pHalData->InterfaceSel == INTF_SEL1_USB_High_Power || pHalData->BoardType == BOARD_USB_High_PA /* This is legacy code for hal_data.BoardType */ ) { ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_LNA, 1); ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_PA, 1); } else #endif { ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_PA, pHalData->ExternalPA_2G); ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_LNA, pHalData->ExternalLNA_2G); } odm_board_type = boardType(pHalData->InterfaceSel); } ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BOARD_TYPE, odm_board_type); //1 ============== End of BoardType ============== } ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_2G, pHalData->Regulation2_4G); ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_5G, pHalData->Regulation5G); ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_GPA, pHalData->TypeGPA); ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_APA, pHalData->TypeAPA); ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_GLNA, pHalData->TypeGLNA); ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_ALNA, pHalData->TypeALNA); ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RFE_TYPE, pHalData->RFEType); ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_TRSW, 0); /* Pointer reference */ ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_TX_UNI, &(dvobj->traffic_stat.tx_bytes)); ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_RX_UNI, &(dvobj->traffic_stat.rx_bytes)); ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_WM_MODE, &(pmlmeext->cur_wireless_mode)); ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BAND, &(pHalData->CurrentBandType)); ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_FORCED_RATE, &(pHalData->ForcedDataRate)); ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SEC_CHNL_OFFSET, &(pHalData->nCur40MhzPrimeSC)); ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SEC_MODE, &(adapter->securitypriv.dot11PrivacyAlgrthm)); ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BW, &(pHalData->CurrentChannelBW)); ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_CHNL, &( pHalData->CurrentChannel)); ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_NET_CLOSED, &(adapter->net_closed)); ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_FORCED_IGI_LB, &(pHalData->u1ForcedIgiLb)); ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SCAN, &(pmlmepriv->bScanInProcess)); ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_POWER_SAVING, &(pwrctl->bpower_saving)); for(i=0; i #include #ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ int usb_write_async(struct usb_device *udev, u32 addr, void *pdata, u16 len) { u8 request; u8 requesttype; u16 wvalue; u16 index; int ret; requesttype = VENDOR_WRITE;//write_out request = REALTEK_USB_VENQT_CMD_REQ; index = REALTEK_USB_VENQT_CMD_IDX;//n/a wvalue = (u16)(addr&0x0000ffff); ret = _usbctrl_vendorreq_async_write(udev, request, wvalue, index, pdata, len, requesttype); return ret; } int usb_async_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) { u8 data; int ret; struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; struct usb_device *udev=pdvobjpriv->pusbdev; _func_enter_; data = val; ret = usb_write_async(udev, addr, &data, 1); _func_exit_; return ret; } int usb_async_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val) { u16 data; int ret; struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; struct usb_device *udev=pdvobjpriv->pusbdev; _func_enter_; data = val; ret = usb_write_async(udev, addr, &data, 2); _func_exit_; return ret; } int usb_async_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val) { u32 data; int ret; struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; struct usb_device *udev=pdvobjpriv->pusbdev; _func_enter_; data = val; ret = usb_write_async(udev, addr, &data, 4); _func_exit_; return ret; } #endif /* CONFIG_USB_SUPPORT_ASYNC_VDN_REQ */ #ifdef CONFIG_RTL8192D /* This function only works in 92DU chip. */ void usb_read_reg_rf_byfw(struct intf_hdl *pintfhdl, u16 byteCount, u32 registerIndex, PVOID buffer) { u16 wPage = 0x0000, offset; u32 BufferLengthRead; PADAPTER Adapter = pintfhdl->padapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u8 RFPath=0,nPHY=0; RFPath =(u8) ((registerIndex&0xff0000)>>16); if (pHalData->interfaceIndex!=0) { nPHY = 1; //MAC1 if(registerIndex&MAC1_ACCESS_PHY0)// MAC1 need to access PHY0 nPHY = 0; } else { if(registerIndex&MAC0_ACCESS_PHY1) nPHY = 1; } registerIndex &= 0xFF; wPage = ((nPHY<<7)|(RFPath<<5)|8)<<8; offset = (u16)registerIndex; // // IN a vendor request to read back MAC register. // usbctrl_vendorreq(pintfhdl, 0x05, offset, wPage, buffer, byteCount, 0x01); } #endif /* 92DU chip needs to remask "value" parameter, this function only works in 92DU chip. */ static inline void usb_value_remask(struct intf_hdl *pintfhdl, u16 *value) { #ifdef CONFIG_RTL8192D _adapter *padapter = pintfhdl->padapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); if ((IS_HARDWARE_TYPE_8192DU(padapter)) && (pHalData->interfaceIndex!=0)) { if(*value<0x1000) *value|=0x4000; else if ((*value&MAC1_ACCESS_PHY0) && !(*value&0x8000)) // MAC1 need to access PHY0 *value &= 0xFFF; } #endif } u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr) { u8 request; u8 requesttype; u16 wvalue; u16 index; u16 len; u8 data=0; _func_enter_; request = 0x05; requesttype = 0x01;//read_in index = 0;//n/a wvalue = (u16)(addr&0x0000ffff); len = 1; usb_value_remask(pintfhdl, &wvalue); usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); _func_exit_; return data; } u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr) { u8 request; u8 requesttype; u16 wvalue; u16 index; u16 len; u16 data=0; _func_enter_; request = 0x05; requesttype = 0x01;//read_in index = 0;//n/a wvalue = (u16)(addr&0x0000ffff); len = 2; usb_value_remask(pintfhdl, &wvalue); usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); _func_exit_; return data; } u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr) { u8 request; u8 requesttype; u16 wvalue; u16 index; u16 len; u32 data=0; _func_enter_; request = 0x05; requesttype = 0x01;//read_in index = 0;//n/a wvalue = (u16)(addr&0x0000ffff); len = 4; #ifdef CONFIG_RTL8192D if ((IS_HARDWARE_TYPE_8192DU(pintfhdl->padapter)) && ((addr&0xff000000)>>24 == 0x66)) { usb_read_reg_rf_byfw(pintfhdl, len, addr, &data); } else #endif { usb_value_remask(pintfhdl, &wvalue); usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); } _func_exit_; return data; } int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) { u8 request; u8 requesttype; u16 wvalue; u16 index; u16 len; u8 data; int ret; _func_enter_; request = 0x05; requesttype = 0x00;//write_out index = 0;//n/a wvalue = (u16)(addr&0x0000ffff); len = 1; data = val; usb_value_remask(pintfhdl, &wvalue); ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); _func_exit_; return ret; } int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val) { u8 request; u8 requesttype; u16 wvalue; u16 index; u16 len; u16 data; int ret; _func_enter_; request = 0x05; requesttype = 0x00;//write_out index = 0;//n/a wvalue = (u16)(addr&0x0000ffff); len = 2; data = val; usb_value_remask(pintfhdl, &wvalue); ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); _func_exit_; return ret; } int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val) { u8 request; u8 requesttype; u16 wvalue; u16 index; u16 len; u32 data; int ret; _func_enter_; request = 0x05; requesttype = 0x00;//write_out index = 0;//n/a wvalue = (u16)(addr&0x0000ffff); len = 4; data =val; usb_value_remask(pintfhdl, &wvalue); ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); _func_exit_; return ret; } int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata) { u8 request; u8 requesttype; u16 wvalue; u16 index; u16 len; u8 buf[VENDOR_CMD_MAX_DATA_LEN]={0}; int ret; _func_enter_; request = 0x05; requesttype = 0x00;//write_out index = 0;//n/a wvalue = (u16)(addr&0x0000ffff); len = length; _rtw_memcpy(buf, pdata, len ); usb_value_remask(pintfhdl, &wvalue); ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, buf, len, requesttype); _func_exit_; return ret; } rtl8812au-4.3.8.12175.20140902+dfsg/hal/hal_intf.c000066400000000000000000000531001261122257400201720ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _HAL_INTF_C_ #include #include void rtw_hal_chip_configure(_adapter *padapter) { if(padapter->HalFunc.intf_chip_configure) padapter->HalFunc.intf_chip_configure(padapter); } void rtw_hal_read_chip_info(_adapter *padapter) { if(padapter->HalFunc.read_adapter_info) padapter->HalFunc.read_adapter_info(padapter); } void rtw_hal_read_chip_version(_adapter *padapter) { if(padapter->HalFunc.read_chip_version) padapter->HalFunc.read_chip_version(padapter); } void rtw_hal_def_value_init(_adapter *padapter) { if (is_primary_adapter(padapter)) { if(padapter->HalFunc.init_default_value) padapter->HalFunc.init_default_value(padapter); rtw_init_hal_com_default_value(padapter); { struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); /* hal_data..macid_num is ready here */ dvobj->macid_ctl.num = rtw_min(hal_data->macid_num, MACID_NUM_SW_LIMIT); } } } void rtw_hal_free_data(_adapter *padapter) { //free HAL Data rtw_hal_data_deinit(padapter); if (is_primary_adapter(padapter)) if(padapter->HalFunc.free_hal_data) padapter->HalFunc.free_hal_data(padapter); } void rtw_hal_dm_init(_adapter *padapter) { if (is_primary_adapter(padapter)) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; if(padapter->HalFunc.dm_init) padapter->HalFunc.dm_init(padapter); _rtw_spinlock_init(&pdmpriv->IQKSpinLock); } } void rtw_hal_dm_deinit(_adapter *padapter) { if (is_primary_adapter(padapter)) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; if(padapter->HalFunc.dm_deinit) padapter->HalFunc.dm_deinit(padapter); _rtw_spinlock_free(&pdmpriv->IQKSpinLock); } } void rtw_hal_sw_led_init(_adapter *padapter) { if(padapter->HalFunc.InitSwLeds) padapter->HalFunc.InitSwLeds(padapter); } void rtw_hal_sw_led_deinit(_adapter *padapter) { if(padapter->HalFunc.DeInitSwLeds) padapter->HalFunc.DeInitSwLeds(padapter); } u32 rtw_hal_power_on(_adapter *padapter) { if(padapter->HalFunc.hal_power_on) return padapter->HalFunc.hal_power_on(padapter); return _FAIL; } void rtw_hal_power_off(_adapter *padapter) { if(padapter->HalFunc.hal_power_off) padapter->HalFunc.hal_power_off(padapter); } void rtw_hal_init_opmode(_adapter *padapter) { NDIS_802_11_NETWORK_INFRASTRUCTURE networkType = Ndis802_11InfrastructureMax; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); sint fw_state; fw_state = get_fwstate(pmlmepriv); if (fw_state & WIFI_ADHOC_STATE) networkType = Ndis802_11IBSS; else if (fw_state & WIFI_STATION_STATE) networkType = Ndis802_11Infrastructure; else if (fw_state & WIFI_AP_STATE) networkType = Ndis802_11APMode; else return; rtw_setopmode_cmd(padapter, networkType, _FALSE); } uint rtw_hal_init(_adapter *padapter) { uint status = _SUCCESS; struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); int i; #ifdef CONFIG_DUALMAC_CONCURRENT if(padapter->hw_init_completed == _TRUE) { DBG_871X("rtw_hal_init: hw_init_completed == _TRUE\n"); return status; } // before init mac0, driver must init mac1 first to avoid usb rx error. if((padapter->pbuddy_adapter != NULL) && (padapter->DualMacConcurrent == _TRUE) && (padapter->adapter_type == PRIMARY_ADAPTER)) { if(padapter->pbuddy_adapter->hw_init_completed == _TRUE) { DBG_871X("rtw_hal_init: pbuddy_adapter hw_init_completed == _TRUE\n"); } else { status = padapter->HalFunc.hal_init(padapter->pbuddy_adapter); if(status == _SUCCESS){ padapter->pbuddy_adapter->hw_init_completed = _TRUE; } else{ padapter->pbuddy_adapter->hw_init_completed = _FALSE; RT_TRACE(_module_hal_init_c_,_drv_err_,("rtw_hal_init: hal__init fail(pbuddy_adapter)\n")); DBG_871X("rtw_hal_init: hal__init fail(pbuddy_adapter)\n"); return status; } } } #endif status = padapter->HalFunc.hal_init(padapter); if(status == _SUCCESS){ rtw_hal_init_opmode(padapter); for (i = 0; iiface_nums; i++) dvobj->padapters[i]->hw_init_completed = _TRUE; if (padapter->registrypriv.notch_filter == 1) rtw_hal_notch_filter(padapter, 1); rtw_hal_reset_security_engine(padapter); for (i = 0; iiface_nums; i++) rtw_sec_restore_wep_key(dvobj->padapters[i]); rtw_led_control(padapter, LED_CTL_POWER_ON); init_hw_mlme_ext(padapter); #ifdef CONFIG_RF_GAIN_OFFSET rtw_bb_rf_gain_offset(padapter); #endif //CONFIG_RF_GAIN_OFFSET } else{ for (i = 0; iiface_nums; i++) dvobj->padapters[i]->hw_init_completed = _FALSE; DBG_871X("rtw_hal_init: hal__init fail\n"); } RT_TRACE(_module_hal_init_c_,_drv_err_,("-rtl871x_hal_init:status=0x%x\n",status)); return status; } uint rtw_hal_deinit(_adapter *padapter) { uint status = _SUCCESS; struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); int i; _func_enter_; status = padapter->HalFunc.hal_deinit(padapter); if(status == _SUCCESS){ rtw_led_control(padapter, LED_CTL_POWER_OFF); for (i = 0; iiface_nums; i++) { padapter = dvobj->padapters[i]; padapter->hw_init_completed = _FALSE; } } else { DBG_871X("\n rtw_hal_deinit: hal_init fail\n"); } _func_exit_; return status; } void rtw_hal_set_hwreg(_adapter *padapter, u8 variable, u8 *val) { if (padapter->HalFunc.SetHwRegHandler) padapter->HalFunc.SetHwRegHandler(padapter, variable, val); } void rtw_hal_get_hwreg(_adapter *padapter, u8 variable, u8 *val) { if (padapter->HalFunc.GetHwRegHandler) padapter->HalFunc.GetHwRegHandler(padapter, variable, val); } #ifdef CONFIG_C2H_PACKET_EN void rtw_hal_set_hwreg_with_buf(_adapter *padapter, u8 variable, u8 *pbuf, int len) { if (padapter->HalFunc.SetHwRegHandlerWithBuf) padapter->HalFunc.SetHwRegHandlerWithBuf(padapter, variable, pbuf, len); } #endif u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue) { if(padapter->HalFunc.SetHalDefVarHandler) return padapter->HalFunc.SetHalDefVarHandler(padapter,eVariable,pValue); return _FAIL; } u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue) { if(padapter->HalFunc.GetHalDefVarHandler) return padapter->HalFunc.GetHalDefVarHandler(padapter,eVariable,pValue); return _FAIL; } void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,BOOLEAN bSet) { if(padapter->HalFunc.SetHalODMVarHandler) padapter->HalFunc.SetHalODMVarHandler(padapter,eVariable,pValue1,bSet); } void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,PVOID pValue2) { if(padapter->HalFunc.GetHalODMVarHandler) padapter->HalFunc.GetHalODMVarHandler(padapter,eVariable,pValue1,pValue2); } void rtw_hal_enable_interrupt(_adapter *padapter) { if (padapter->HalFunc.enable_interrupt) padapter->HalFunc.enable_interrupt(padapter); else DBG_871X("%s: HalFunc.enable_interrupt is NULL!\n", __FUNCTION__); } void rtw_hal_disable_interrupt(_adapter *padapter) { if (padapter->HalFunc.disable_interrupt) padapter->HalFunc.disable_interrupt(padapter); else DBG_871X("%s: HalFunc.disable_interrupt is NULL!\n", __FUNCTION__); } u8 rtw_hal_check_ips_status(_adapter *padapter) { u8 val = _FALSE; if (padapter->HalFunc.check_ips_status) val = padapter->HalFunc.check_ips_status(padapter); else DBG_871X("%s: HalFunc.check_ips_status is NULL!\n", __FUNCTION__); return val; } #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) void rtw_hal_clear_interrupt(_adapter *padapter) { if (padapter->HalFunc.clear_interrupt) padapter->HalFunc.clear_interrupt(padapter); else DBG_871X("%s: HalFunc.clear_interrupt is NULL!\n", __FUNCTION__); } #endif u32 rtw_hal_inirp_init(_adapter *padapter) { u32 rst = _FAIL; if(padapter->HalFunc.inirp_init) rst = padapter->HalFunc.inirp_init(padapter); else DBG_871X(" %s HalFunc.inirp_init is NULL!!!\n",__FUNCTION__); return rst; } u32 rtw_hal_inirp_deinit(_adapter *padapter) { if(padapter->HalFunc.inirp_deinit) return padapter->HalFunc.inirp_deinit(padapter); return _FAIL; } void rtw_hal_irp_reset(_adapter *padapter) { if(padapter->HalFunc.irp_reset) padapter->HalFunc.irp_reset(padapter); else DBG_871X("%s: HalFunc.rtw_hal_irp_reset is NULL!\n", __FUNCTION__); } u8 rtw_hal_intf_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id, u8* val) { if(padapter->HalFunc.interface_ps_func) return padapter->HalFunc.interface_ps_func(padapter,efunc_id,val); return _FAIL; } s32 rtw_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) { if(padapter->HalFunc.hal_xmitframe_enqueue) return padapter->HalFunc.hal_xmitframe_enqueue(padapter, pxmitframe); return _FALSE; } s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe) { if(padapter->HalFunc.hal_xmit) return padapter->HalFunc.hal_xmit(padapter, pxmitframe); return _FALSE; } /* * [IMPORTANT] This function would be run in interrupt context. */ s32 rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe) { s32 ret = _FAIL; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; update_mgntframe_attrib_addr(padapter, pmgntframe); //pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; //pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; //_rtw_memcpy(pmgntframe->attrib.ra, pwlanhdr->addr1, ETH_ALEN); #ifdef CONFIG_IEEE80211W if(padapter->securitypriv.binstallBIPkey == _TRUE) { if(IS_MCAST(pmgntframe->attrib.ra)) { pmgntframe->attrib.encrypt = _BIP_; //pmgntframe->attrib.bswenc = _TRUE; } else { pmgntframe->attrib.encrypt = _AES_; pmgntframe->attrib.bswenc = _TRUE; } rtw_mgmt_xmitframe_coalesce(padapter, pmgntframe->pkt, pmgntframe); } #endif //CONFIG_IEEE80211W if(padapter->HalFunc.mgnt_xmit) ret = padapter->HalFunc.mgnt_xmit(padapter, pmgntframe); return ret; } s32 rtw_hal_init_xmit_priv(_adapter *padapter) { if(padapter->HalFunc.init_xmit_priv != NULL) return padapter->HalFunc.init_xmit_priv(padapter); return _FAIL; } void rtw_hal_free_xmit_priv(_adapter *padapter) { if(padapter->HalFunc.free_xmit_priv != NULL) padapter->HalFunc.free_xmit_priv(padapter); } s32 rtw_hal_init_recv_priv(_adapter *padapter) { if(padapter->HalFunc.init_recv_priv) return padapter->HalFunc.init_recv_priv(padapter); return _FAIL; } void rtw_hal_free_recv_priv(_adapter *padapter) { if(padapter->HalFunc.free_recv_priv) padapter->HalFunc.free_recv_priv(padapter); } void rtw_hal_update_ra_mask(struct sta_info *psta, u8 rssi_level) { _adapter *padapter; struct mlme_priv *pmlmepriv; if(!psta) return; padapter = psta->padapter; pmlmepriv = &(padapter->mlmepriv); if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { add_RATid(padapter, psta, rssi_level); } else { if(padapter->HalFunc.UpdateRAMaskHandler) padapter->HalFunc.UpdateRAMaskHandler(padapter, psta->mac_id, rssi_level); } } void rtw_hal_add_ra_tid(_adapter *padapter, u32 bitmap, u8* arg, u8 rssi_level) { if(padapter->HalFunc.Add_RateATid) padapter->HalFunc.Add_RateATid(padapter, bitmap, arg, rssi_level); } /* Start specifical interface thread */ void rtw_hal_start_thread(_adapter *padapter) { if(padapter->HalFunc.run_thread) padapter->HalFunc.run_thread(padapter); } /* Start specifical interface thread */ void rtw_hal_stop_thread(_adapter *padapter) { if(padapter->HalFunc.cancel_thread) padapter->HalFunc.cancel_thread(padapter); } u32 rtw_hal_read_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask) { u32 data = 0; if(padapter->HalFunc.read_bbreg) data = padapter->HalFunc.read_bbreg(padapter, RegAddr, BitMask); return data; } void rtw_hal_write_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data) { if(padapter->HalFunc.write_bbreg) padapter->HalFunc.write_bbreg(padapter, RegAddr, BitMask, Data); } u32 rtw_hal_read_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask) { u32 data = 0; if( padapter->HalFunc.read_rfreg) data = padapter->HalFunc.read_rfreg(padapter, eRFPath, RegAddr, BitMask); return data; } void rtw_hal_write_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data) { if(padapter->HalFunc.write_rfreg) padapter->HalFunc.write_rfreg(padapter, eRFPath, RegAddr, BitMask, Data); } s32 rtw_hal_interrupt_handler(_adapter *padapter) { if(padapter->HalFunc.interrupt_handler) return padapter->HalFunc.interrupt_handler(padapter); return _FAIL; } void rtw_hal_set_bwmode(_adapter *padapter, CHANNEL_WIDTH Bandwidth, u8 Offset) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); if(padapter->HalFunc.set_bwmode_handler) { ODM_AcquireSpinLock( pDM_Odm, RT_IQK_SPINLOCK); if(pDM_Odm->RFCalibrateInfo.bIQKInProgress == _TRUE) DBG_871X_LEVEL(_drv_err_, "%s, %d, IQK may race condition\n", __func__,__LINE__); ODM_ReleaseSpinLock( pDM_Odm, RT_IQK_SPINLOCK); padapter->HalFunc.set_bwmode_handler(padapter, Bandwidth, Offset); } } void rtw_hal_set_chan(_adapter *padapter, u8 channel) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); if(padapter->HalFunc.set_channel_handler) { ODM_AcquireSpinLock( pDM_Odm, RT_IQK_SPINLOCK); if(pDM_Odm->RFCalibrateInfo.bIQKInProgress == _TRUE) DBG_871X_LEVEL(_drv_err_, "%s, %d, IQK may race condition\n", __func__,__LINE__); ODM_ReleaseSpinLock( pDM_Odm, RT_IQK_SPINLOCK); padapter->HalFunc.set_channel_handler(padapter, channel); } } void rtw_hal_set_chnl_bw(_adapter *padapter, u8 channel, CHANNEL_WIDTH Bandwidth, u8 Offset40, u8 Offset80) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); if(padapter->HalFunc.set_chnl_bw_handler) { ODM_AcquireSpinLock( pDM_Odm, RT_IQK_SPINLOCK); if(pDM_Odm->RFCalibrateInfo.bIQKInProgress == _TRUE) DBG_871X_LEVEL(_drv_err_, "%s, %d, IQK may race condition\n", __func__,__LINE__); ODM_ReleaseSpinLock( pDM_Odm, RT_IQK_SPINLOCK); padapter->HalFunc.set_chnl_bw_handler(padapter, channel, Bandwidth, Offset40, Offset80); } } void rtw_hal_set_tx_power_level(_adapter *padapter, u8 channel) { if(padapter->HalFunc.set_tx_power_level_handler) padapter->HalFunc.set_tx_power_level_handler(padapter, channel); } void rtw_hal_get_tx_power_level(_adapter *padapter, s32 *powerlevel) { if(padapter->HalFunc.get_tx_power_level_handler) padapter->HalFunc.get_tx_power_level_handler(padapter, powerlevel); } void rtw_hal_dm_watchdog(_adapter *padapter) { #if defined(CONFIG_CONCURRENT_MODE) if (padapter->adapter_type != PRIMARY_ADAPTER) return; #endif if(padapter->HalFunc.hal_dm_watchdog) padapter->HalFunc.hal_dm_watchdog(padapter); } void rtw_hal_dm_watchdog_in_lps(_adapter *padapter) { #if defined(CONFIG_CONCURRENT_MODE) if (padapter->iface_type != IFACE_PORT0) return; #endif if (adapter_to_pwrctl(padapter)->bFwCurrentInPSMode ==_TRUE ) { if(padapter->HalFunc.hal_dm_watchdog_in_lps) { padapter->HalFunc.hal_dm_watchdog_in_lps(padapter);//this fuction caller is in interrupt context } } } void rtw_hal_bcn_related_reg_setting(_adapter *padapter) { if(padapter->HalFunc.SetBeaconRelatedRegistersHandler) padapter->HalFunc.SetBeaconRelatedRegistersHandler(padapter); } #ifdef CONFIG_ANTENNA_DIVERSITY u8 rtw_hal_antdiv_before_linked(_adapter *padapter) { if(padapter->HalFunc.AntDivBeforeLinkHandler) return padapter->HalFunc.AntDivBeforeLinkHandler(padapter); return _FALSE; } void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src) { if(padapter->HalFunc.AntDivCompareHandler) padapter->HalFunc.AntDivCompareHandler(padapter, dst, src); } #endif #ifdef CONFIG_HOSTAPD_MLME s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt) { if(padapter->HalFunc.hostap_mgnt_xmit_entry) return padapter->HalFunc.hostap_mgnt_xmit_entry(padapter, pkt); return _FAIL; } #endif //CONFIG_HOSTAPD_MLME #ifdef DBG_CONFIG_ERROR_DETECT void rtw_hal_sreset_init(_adapter *padapter) { if(padapter->HalFunc.sreset_init_value) padapter->HalFunc.sreset_init_value(padapter); } void rtw_hal_sreset_reset(_adapter *padapter) { padapter = GET_PRIMARY_ADAPTER(padapter); if(padapter->HalFunc.silentreset) padapter->HalFunc.silentreset(padapter); } void rtw_hal_sreset_reset_value(_adapter *padapter) { if(padapter->HalFunc.sreset_reset_value) padapter->HalFunc.sreset_reset_value(padapter); } void rtw_hal_sreset_xmit_status_check(_adapter *padapter) { if (!is_primary_adapter(padapter)) return; if(padapter->HalFunc.sreset_xmit_status_check) padapter->HalFunc.sreset_xmit_status_check(padapter); } void rtw_hal_sreset_linked_status_check(_adapter *padapter) { if (!is_primary_adapter(padapter)) return; if(padapter->HalFunc.sreset_linked_status_check) padapter->HalFunc.sreset_linked_status_check(padapter); } u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter) { u8 status = 0; if(padapter->HalFunc.sreset_get_wifi_status) status = padapter->HalFunc.sreset_get_wifi_status(padapter); return status; } bool rtw_hal_sreset_inprogress(_adapter *padapter) { bool inprogress = _FALSE; padapter = GET_PRIMARY_ADAPTER(padapter); if(padapter->HalFunc.sreset_inprogress) inprogress = padapter->HalFunc.sreset_inprogress(padapter); return inprogress; } #endif //DBG_CONFIG_ERROR_DETECT #ifdef CONFIG_IOL int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt) { if(adapter->HalFunc.IOL_exec_cmds_sync) return adapter->HalFunc.IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms,bndy_cnt); return _FAIL; } #endif #ifdef CONFIG_XMIT_THREAD_MODE s32 rtw_hal_xmit_thread_handler(_adapter *padapter) { if(padapter->HalFunc.xmit_thread_handler) return padapter->HalFunc.xmit_thread_handler(padapter); return _FAIL; } #endif void rtw_hal_notch_filter(_adapter *adapter, bool enable) { if(adapter->HalFunc.hal_notch_filter) adapter->HalFunc.hal_notch_filter(adapter,enable); } void rtw_hal_reset_security_engine(_adapter * adapter) { if(adapter->HalFunc.hal_reset_security_engine) adapter->HalFunc.hal_reset_security_engine(adapter); } bool rtw_hal_c2h_valid(_adapter *adapter, u8 *buf) { HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter); HAL_VERSION *hal_ver = &HalData->VersionID; bool ret = _FAIL; if (IS_81XXC(*hal_ver) || IS_8723_SERIES(*hal_ver) ||IS_92D(*hal_ver) ||IS_8188E(*hal_ver)) { ret = c2h_evt_valid((struct c2h_evt_hdr *)buf); } else if(IS_8192E(*hal_ver) || IS_8812_SERIES(*hal_ver) || IS_8821_SERIES(*hal_ver) || IS_8723B_SERIES(*hal_ver)) { ret = c2h_evt_valid((struct c2h_evt_hdr_88xx*)buf); } else { rtw_warn_on(1); } return ret; } s32 rtw_hal_c2h_evt_read(_adapter *adapter, u8 *buf) { HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter); HAL_VERSION *hal_ver = &HalData->VersionID; s32 ret = _FAIL; if (IS_81XXC(*hal_ver) || IS_8723_SERIES(*hal_ver) ||IS_92D(*hal_ver) ||IS_8188E(*hal_ver)) { ret = c2h_evt_read(adapter, buf); } else if(IS_8192E(*hal_ver) || IS_8812_SERIES(*hal_ver) || IS_8821_SERIES(*hal_ver) || IS_8723B_SERIES(*hal_ver)) { ret = c2h_evt_read_88xx(adapter, buf); } else { rtw_warn_on(1); } return ret; } s32 rtw_hal_c2h_handler(_adapter *adapter, u8 *c2h_evt) { s32 ret = _FAIL; if (adapter->HalFunc.c2h_handler) ret = adapter->HalFunc.c2h_handler(adapter, c2h_evt); return ret; } c2h_id_filter rtw_hal_c2h_id_filter_ccx(_adapter *adapter) { return adapter->HalFunc.c2h_id_filter_ccx; } s32 rtw_hal_is_disable_sw_channel_plan(PADAPTER padapter) { return GET_HAL_DATA(padapter)->bDisableSWChannelPlan; } s32 rtw_hal_macid_sleep(PADAPTER padapter, u8 macid) { struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); u8 support; support = _FALSE; rtw_hal_get_def_var(padapter, HAL_DEF_MACID_SLEEP, &support); if (_FALSE == support) return _FAIL; if (macid >= macid_ctl->num) { DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT": Invalid macid(%u)\n", FUNC_ADPT_ARG(padapter), macid); return _FAIL; } rtw_hal_set_hwreg(padapter, HW_VAR_MACID_SLEEP, &macid); return _SUCCESS; } s32 rtw_hal_macid_wakeup(PADAPTER padapter, u8 macid) { struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); u8 support; support = _FALSE; rtw_hal_get_def_var(padapter, HAL_DEF_MACID_SLEEP, &support); if (_FALSE == support) return _FAIL; if (macid >= macid_ctl->num) { DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT": Invalid macid(%u)\n", FUNC_ADPT_ARG(padapter), macid); return _FAIL; } rtw_hal_set_hwreg(padapter, HW_VAR_MACID_WAKEUP, &macid); return _SUCCESS; } s32 rtw_hal_fill_h2c_cmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer) { s32 ret = _FAIL; if (padapter->HalFunc.fill_h2c_cmd) ret = padapter->HalFunc.fill_h2c_cmd(padapter, ElementID, CmdLen, pCmdBuffer); else { DBG_871X("%s: func[fill_h2c_cmd] not defined!\n", __FUNCTION__); rtw_warn_on(1); } return ret; } rtl8812au-4.3.8.12175.20140902+dfsg/hal/hal_phy.c000066400000000000000000000151631261122257400200410ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _HAL_PHY_C_ #include //================================================================================ // Constant. //================================================================================ // 2008/11/20 MH For Debug only, RF static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG]; /** * Function: PHY_CalculateBitShift * * OverView: Get shifted position of the BitMask * * Input: * u4Byte BitMask, * * Output: none * Return: u4Byte Return the shift bit bit position of the mask */ u32 PHY_CalculateBitShift( u32 BitMask ) { u32 i; for(i=0; i<=31; i++) { if ( ((BitMask>>i) & 0x1 ) == 1) break; } return (i); } // // ==> RF shadow Operation API Code Section!!! // /*----------------------------------------------------------------------------- * Function: PHY_RFShadowRead * PHY_RFShadowWrite * PHY_RFShadowCompare * PHY_RFShadowRecorver * PHY_RFShadowCompareAll * PHY_RFShadowRecorverAll * PHY_RFShadowCompareFlagSet * PHY_RFShadowRecorverFlagSet * * Overview: When we set RF register, we must write shadow at first. * When we are running, we must compare shadow abd locate error addr. * Decide to recorver or not. * * Input: NONE * * Output: NONE * * Return: NONE * * Revised History: * When Who Remark * 11/20/2008 MHC Create Version 0. * *---------------------------------------------------------------------------*/ u32 PHY_RFShadowRead( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 Offset) { return RF_Shadow[eRFPath][Offset].Value; } /* PHY_RFShadowRead */ VOID PHY_RFShadowWrite( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 Offset, IN u32 Data) { RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask); RF_Shadow[eRFPath][Offset].Driver_Write = _TRUE; } /* PHY_RFShadowWrite */ BOOLEAN PHY_RFShadowCompare( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 Offset) { u32 reg; // Check if we need to check the register if (RF_Shadow[eRFPath][Offset].Compare == _TRUE) { reg = rtw_hal_read_rfreg(Adapter, eRFPath, Offset, bRFRegOffsetMask); // Compare shadow and real rf register for 20bits!! if (RF_Shadow[eRFPath][Offset].Value != reg) { // Locate error position. RF_Shadow[eRFPath][Offset].ErrorOrNot = _TRUE; //RT_TRACE(COMP_INIT, DBG_LOUD, //("PHY_RFShadowCompare RF-%d Addr%02lx Err = %05lx\n", //eRFPath, Offset, reg)); } return RF_Shadow[eRFPath][Offset].ErrorOrNot ; } return _FALSE; } /* PHY_RFShadowCompare */ VOID PHY_RFShadowRecorver( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 Offset) { // Check if the address is error if (RF_Shadow[eRFPath][Offset].ErrorOrNot == _TRUE) { // Check if we need to recorver the register. if (RF_Shadow[eRFPath][Offset].Recorver == _TRUE) { rtw_hal_write_rfreg(Adapter, eRFPath, Offset, bRFRegOffsetMask, RF_Shadow[eRFPath][Offset].Value); //RT_TRACE(COMP_INIT, DBG_LOUD, //("PHY_RFShadowRecorver RF-%d Addr%02lx=%05lx", //eRFPath, Offset, RF_Shadow[eRFPath][Offset].Value)); } } } /* PHY_RFShadowRecorver */ VOID PHY_RFShadowCompareAll( IN PADAPTER Adapter) { u8 eRFPath = 0 ; u32 Offset = 0, maxReg= GET_RF6052_REAL_MAX_REG(Adapter); for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) { for (Offset = 0; Offset < maxReg; Offset++) { PHY_RFShadowCompare(Adapter, eRFPath, Offset); } } } /* PHY_RFShadowCompareAll */ VOID PHY_RFShadowRecorverAll( IN PADAPTER Adapter) { u8 eRFPath =0; u32 Offset = 0, maxReg= GET_RF6052_REAL_MAX_REG(Adapter); for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) { for (Offset = 0; Offset < maxReg; Offset++) { PHY_RFShadowRecorver(Adapter, eRFPath, Offset); } } } /* PHY_RFShadowRecorverAll */ VOID PHY_RFShadowCompareFlagSet( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 Offset, IN u8 Type) { // Set True or False!!! RF_Shadow[eRFPath][Offset].Compare = Type; } /* PHY_RFShadowCompareFlagSet */ VOID PHY_RFShadowRecorverFlagSet( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 Offset, IN u8 Type) { // Set True or False!!! RF_Shadow[eRFPath][Offset].Recorver= Type; } /* PHY_RFShadowRecorverFlagSet */ VOID PHY_RFShadowCompareFlagSetAll( IN PADAPTER Adapter) { u8 eRFPath = 0; u32 Offset = 0, maxReg= GET_RF6052_REAL_MAX_REG(Adapter); for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) { for (Offset = 0; Offset < maxReg; Offset++) { // 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! if (Offset != 0x26 && Offset != 0x27) PHY_RFShadowCompareFlagSet(Adapter, eRFPath, Offset, _FALSE); else PHY_RFShadowCompareFlagSet(Adapter, eRFPath, Offset, _TRUE); } } } /* PHY_RFShadowCompareFlagSetAll */ VOID PHY_RFShadowRecorverFlagSetAll( IN PADAPTER Adapter) { u8 eRFPath = 0; u32 Offset = 0, maxReg= GET_RF6052_REAL_MAX_REG(Adapter); for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) { for (Offset = 0; Offset < maxReg; Offset++) { // 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! if (Offset != 0x26 && Offset != 0x27) PHY_RFShadowRecorverFlagSet(Adapter, eRFPath, Offset, _FALSE); else PHY_RFShadowRecorverFlagSet(Adapter, eRFPath, Offset, _TRUE); } } } /* PHY_RFShadowCompareFlagSetAll */ VOID PHY_RFShadowRefresh( IN PADAPTER Adapter) { u8 eRFPath = 0; u32 Offset = 0, maxReg= GET_RF6052_REAL_MAX_REG(Adapter); for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) { for (Offset = 0; Offset < maxReg; Offset++) { RF_Shadow[eRFPath][Offset].Value = 0; RF_Shadow[eRFPath][Offset].Compare = _FALSE; RF_Shadow[eRFPath][Offset].Recorver = _FALSE; RF_Shadow[eRFPath][Offset].ErrorOrNot = _FALSE; RF_Shadow[eRFPath][Offset].Driver_Write = _FALSE; } } } /* PHY_RFShadowRead */ rtl8812au-4.3.8.12175.20140902+dfsg/hal/led/000077500000000000000000000000001261122257400170075ustar00rootroot00000000000000rtl8812au-4.3.8.12175.20140902+dfsg/hal/led/hal_usb_led.c000066400000000000000000004075111261122257400214240ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include #include // // Description: // Implementation of LED blinking behavior. // It toggle off LED and schedule corresponding timer if necessary. // void SwLedBlink( PLED_USB pLed ) { _adapter *padapter = pLed->padapter; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); u8 bStopBlinking = _FALSE; // Change LED according to BlinkingLedState specified. if( pLed->BlinkingLedState == RTW_LED_ON ) { SwLedOn(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); } else { SwLedOff(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn off\n", pLed->BlinkTimes)); } // Determine if we shall change LED state again. pLed->BlinkTimes--; switch(pLed->CurrLedState) { case LED_BLINK_NORMAL: if(pLed->BlinkTimes == 0) { bStopBlinking = _TRUE; } break; case LED_BLINK_StartToBlink: if( check_fwstate(pmlmepriv, _FW_LINKED) && check_fwstate(pmlmepriv, WIFI_STATION_STATE) ) { bStopBlinking = _TRUE; } if( check_fwstate(pmlmepriv, _FW_LINKED) && (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) ) { bStopBlinking = _TRUE; } else if(pLed->BlinkTimes == 0) { bStopBlinking = _TRUE; } break; case LED_BLINK_WPS: if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } break; default: bStopBlinking = _TRUE; break; } if(bStopBlinking) { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) { SwLedOff(padapter, pLed); } else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && (pLed->bLedOn == _FALSE)) { SwLedOn(padapter, pLed); } else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) && pLed->bLedOn == _TRUE) { SwLedOff(padapter, pLed); } pLed->BlinkTimes = 0; pLed->bLedBlinkInProgress = _FALSE; } else { // Assign LED state to toggle. if( pLed->BlinkingLedState == RTW_LED_ON ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; // Schedule a timer to toggle LED state. switch( pLed->CurrLedState ) { case LED_BLINK_NORMAL: _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); break; case LED_BLINK_SLOWLY: case LED_BLINK_StartToBlink: _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); break; case LED_BLINK_WPS: { if( pLed->BlinkingLedState == RTW_LED_ON ) _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); else _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); } break; default: _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); break; } } } void SwLedBlink1( PLED_USB pLed ) { _adapter *padapter = pLed->padapter; EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); struct led_priv *ledpriv = &(padapter->ledpriv); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); PLED_USB pLed1 = &(ledpriv->SwLed1); u8 bStopBlinking = _FALSE; u32 uLedBlinkNoLinkInterval = LED_BLINK_NO_LINK_INTERVAL_ALPHA; //add by ylb 20121012 for customer led for alpha if(pEEPROM->CustomerID == RT_CID_819x_ALPHA_Dlink) uLedBlinkNoLinkInterval= LED_BLINK_NO_LINK_INTERVAL_ALPHA_500MS; if(pEEPROM->CustomerID == RT_CID_819x_CAMEO) pLed = &(ledpriv->SwLed1); // Change LED according to BlinkingLedState specified. if( pLed->BlinkingLedState == RTW_LED_ON ) { SwLedOn(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn on\n", pLed->BlinkTimes)); } else { SwLedOff(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); } if(pEEPROM->CustomerID == RT_CID_DEFAULT) { if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) { if(!pLed1->bSWLedCtrl) { SwLedOn(padapter, pLed1); pLed1->bSWLedCtrl = _TRUE; } else if(!pLed1->bLedOn) SwLedOn(padapter, pLed1); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn on pLed1\n")); } else { if(!pLed1->bSWLedCtrl) { SwLedOff(padapter, pLed1); pLed1->bSWLedCtrl = _TRUE; } else if(pLed1->bLedOn) SwLedOff(padapter, pLed1); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn off pLed1\n")); } } switch(pLed->CurrLedState) { case LED_BLINK_SLOWLY: if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), uLedBlinkNoLinkInterval);//change by ylb 20121012 for customer led for alpha break; case LED_BLINK_NORMAL: if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); break; case LED_BLINK_SCAN: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) { SwLedOff(padapter, pLed); } else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) { pLed->bLedLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_NORMAL; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) { pLed->bLedNoLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), uLedBlinkNoLinkInterval); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } pLed->bLedScanBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) { SwLedOff(padapter, pLed); } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); } } break; case LED_BLINK_TXRX: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) { SwLedOff(padapter, pLed); } else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) { pLed->bLedLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_NORMAL; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) { pLed->bLedNoLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), uLedBlinkNoLinkInterval); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } pLed->BlinkTimes = 0; pLed->bLedBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) { SwLedOff(padapter, pLed); } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } } break; case LED_BLINK_WPS: if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); break; case LED_BLINK_WPS_STOP: //WPS success if(pLed->BlinkingLedState == RTW_LED_ON) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); bStopBlinking = _FALSE; } else { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) { SwLedOff(padapter, pLed); } else { pLed->bLedLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_NORMAL; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } pLed->bLedWPSBlinkInProgress = _FALSE; } break; default: break; } } void SwLedBlink2( PLED_USB pLed ) { _adapter *padapter = pLed->padapter; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); u8 bStopBlinking = _FALSE; // Change LED according to BlinkingLedState specified. if( pLed->BlinkingLedState == RTW_LED_ON) { SwLedOn(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); } else { SwLedOff(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); } switch(pLed->CurrLedState) { case LED_BLINK_SCAN: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) { SwLedOff(padapter, pLed); } else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) { pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; SwLedOn(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState)); } else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) { pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; SwLedOff(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState)); } pLed->bLedScanBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) { SwLedOff(padapter, pLed); } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); } } break; case LED_BLINK_TXRX: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) { SwLedOff(padapter, pLed); } else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) { pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; SwLedOn(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState)); } else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) { pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; SwLedOff(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState)); } pLed->bLedBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) { SwLedOff(padapter, pLed); } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } } break; default: break; } } void SwLedBlink3( PLED_USB pLed ) { _adapter *padapter = pLed->padapter; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); u8 bStopBlinking = _FALSE; // Change LED according to BlinkingLedState specified. if( pLed->BlinkingLedState == RTW_LED_ON ) { SwLedOn(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); } else { if(pLed->CurrLedState != LED_BLINK_WPS_STOP) SwLedOff(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); } switch(pLed->CurrLedState) { case LED_BLINK_SCAN: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) { SwLedOff(padapter, pLed); } else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) { pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; if( !pLed->bLedOn ) SwLedOn(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) { pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if( pLed->bLedOn ) SwLedOff(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } pLed->bLedScanBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) { SwLedOff(padapter, pLed); } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); } } break; case LED_BLINK_TXRX: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) { SwLedOff(padapter, pLed); } else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) { pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; if( !pLed->bLedOn ) SwLedOn(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) { pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if( pLed->bLedOn ) SwLedOff(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } pLed->bLedBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) { SwLedOff(padapter, pLed); } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } } break; case LED_BLINK_WPS: if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); break; case LED_BLINK_WPS_STOP: //WPS success if(pLed->BlinkingLedState == RTW_LED_ON) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); bStopBlinking = _FALSE; } else { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on ) { SwLedOff(padapter, pLed); } else { pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; SwLedOn(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } pLed->bLedWPSBlinkInProgress = _FALSE; } break; default: break; } } void SwLedBlink4( PLED_USB pLed ) { _adapter *padapter = pLed->padapter; struct led_priv *ledpriv = &(padapter->ledpriv); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); PLED_USB pLed1 = &(ledpriv->SwLed1); u8 bStopBlinking = _FALSE; // Change LED according to BlinkingLedState specified. if( pLed->BlinkingLedState == RTW_LED_ON ) { SwLedOn(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); } else { SwLedOff(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); } if(!pLed1->bLedWPSBlinkInProgress && pLed1->BlinkingLedState == LED_UNKNOWN) { pLed1->BlinkingLedState = RTW_LED_OFF; pLed1->CurrLedState = RTW_LED_OFF; SwLedOff(padapter, pLed1); } switch(pLed->CurrLedState) { case LED_BLINK_SLOWLY: if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); break; case LED_BLINK_StartToBlink: if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); } break; case LED_BLINK_SCAN: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _FALSE; } if(bStopBlinking) { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(padapter, pLed); } else { pLed->bLedNoLinkBlinkInProgress = _FALSE; pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); } pLed->bLedScanBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(padapter, pLed); } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); } } break; case LED_BLINK_TXRX: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(padapter, pLed); } else { pLed->bLedNoLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); } pLed->bLedBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(padapter, pLed); } else { if(IS_HARDWARE_TYPE_8192DU(padapter)) { pLed->BlinkingLedState = RTW_LED_ON; pLed->CurrLedState = LED_BLINK_ALWAYS_ON; } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; } _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } } break; case LED_BLINK_WPS: if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); } break; case LED_BLINK_WPS_STOP: //WPS authentication fail if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); break; case LED_BLINK_WPS_STOP_OVERLAP: //WPS session overlap pLed->BlinkTimes--; if(pLed->BlinkTimes == 0) { if(pLed->bLedOn) { pLed->BlinkTimes = 1; } else { bStopBlinking = _TRUE; } } if(bStopBlinking) { pLed->BlinkTimes = 10; pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); } break; case LED_BLINK_ALWAYS_ON: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(padapter, pLed); } else { if(IS_HARDWARE_TYPE_8192DU(padapter)) { pLed->BlinkingLedState = RTW_LED_ON; pLed->CurrLedState = LED_BLINK_ALWAYS_ON; } else { pLed->bLedNoLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; } _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); } pLed->bLedBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) { RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("RFOff Status \n")); SwLedOff(padapter, pLed); } else { if(IS_HARDWARE_TYPE_8192DU(padapter)) { pLed->BlinkingLedState = RTW_LED_ON; } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; } _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } } break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink4 CurrLedState %d\n", pLed->CurrLedState)); } void SwLedBlink5( PLED_USB pLed ) { _adapter *padapter = pLed->padapter; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); u8 bStopBlinking = _FALSE; // Change LED according to BlinkingLedState specified. if( pLed->BlinkingLedState == RTW_LED_ON ) { SwLedOn(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); } else { SwLedOff(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); } switch(pLed->CurrLedState) { case LED_BLINK_SCAN: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) { pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if(pLed->bLedOn) SwLedOff(padapter, pLed); } else { pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; if(!pLed->bLedOn) _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } pLed->bLedScanBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(padapter, pLed); } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); } } break; case LED_BLINK_TXRX: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) { pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if(pLed->bLedOn) SwLedOff(padapter, pLed); } else { pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; if(!pLed->bLedOn) _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } pLed->bLedBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(padapter, pLed); } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } } break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink5 CurrLedState %d\n", pLed->CurrLedState)); } void SwLedBlink6( PLED_USB pLed ) { _adapter *padapter = pLed->padapter; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); u8 bStopBlinking = _FALSE; // Change LED according to BlinkingLedState specified. if( pLed->BlinkingLedState == RTW_LED_ON ) { SwLedOn(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); } else { SwLedOff(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("<==== blink6\n")); } void SwLedBlink7( PLED_USB pLed ) { PADAPTER Adapter = pLed->padapter; struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); BOOLEAN bStopBlinking = _FALSE; // Change LED according to BlinkingLedState specified. if( pLed->BlinkingLedState == RTW_LED_ON ) { SwLedOn(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); } else { if(pLed->CurrLedState != LED_BLINK_WPS_STOP) SwLedOff(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); } switch(pLed->CurrLedState) { case LED_BLINK_SCAN: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on ) { SwLedOff(Adapter, pLed); } else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) { pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; if( !pLed->bLedOn ) SwLedOn(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) { pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if( pLed->bLedOn ) SwLedOff(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } pLed->bLedScanBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on ) { SwLedOff(Adapter, pLed); } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_NETGEAR); } } break; case LED_BLINK_WPS: if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_NETGEAR); break; case LED_BLINK_WPS_STOP: //WPS success if(pLed->BlinkingLedState == RTW_LED_ON) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_NETGEAR); bStopBlinking = _FALSE; } else { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on ) { SwLedOff(Adapter, pLed); } else { pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; SwLedOn(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } pLed->bLedWPSBlinkInProgress = _FALSE; } break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("<==== blink7\n")); } void SwLedBlink8( PLED_USB pLed ) { PADAPTER Adapter = pLed->padapter; // Change LED according to BlinkingLedState specified. if( pLed->BlinkingLedState == RTW_LED_ON ) { SwLedOn(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes blink8(%d): turn on\n", pLed->BlinkTimes)); } else { SwLedOff(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes blink8(%d): turn off\n", pLed->BlinkTimes)); } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("<==== blink8\n")); } //page added for Belkin AC950. 20120813 void SwLedBlink9( PLED_USB pLed ) { PADAPTER Adapter = pLed->padapter; struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); BOOLEAN bStopBlinking = _FALSE; // Change LED according to BlinkingLedState specified. if( pLed->BlinkingLedState == RTW_LED_ON ) { SwLedOn(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); } else { SwLedOff(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); } //DBG_871X("%s, pLed->CurrLedState=%d, pLed->BlinkingLedState=%d \n", __FUNCTION__, pLed->CurrLedState, pLed->BlinkingLedState); switch(pLed->CurrLedState) { case RTW_LED_ON: SwLedOn(Adapter, pLed); break; case RTW_LED_OFF: SwLedOff(Adapter, pLed); break; case LED_BLINK_SLOWLY: if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); break; case LED_BLINK_StartToBlink: if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); } break; case LED_BLINK_SCAN: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on ) { SwLedOff(Adapter, pLed); } else if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { pLed->bLedLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SLOWLY; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) { pLed->bLedNoLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } pLed->BlinkTimes = 0; pLed->bLedBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(Adapter, pLed); } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); } } break; case LED_BLINK_TXRX: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(Adapter, pLed); } else { pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } pLed->bLedBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(Adapter, pLed); } else { if(IS_HARDWARE_TYPE_8192DU(Adapter)) { pLed->BlinkingLedState = RTW_LED_ON; pLed->CurrLedState = LED_BLINK_ALWAYS_ON; } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; } _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } } break; case LED_BLINK_WPS: if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); } break; case LED_BLINK_WPS_STOP: //WPS authentication fail if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); break; case LED_BLINK_WPS_STOP_OVERLAP: //WPS session overlap pLed->BlinkTimes--; pLed->BlinkCounter --; if(pLed->BlinkCounter == 0) { pLed->BlinkingLedState = RTW_LED_OFF; pLed->CurrLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); } else { if(pLed->BlinkTimes == 0) { if(pLed->bLedOn) { pLed->BlinkTimes = 1; } else { bStopBlinking = _TRUE; } } if(bStopBlinking) { pLed->BlinkTimes = 10; pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); } } break; case LED_BLINK_ALWAYS_ON: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(Adapter, pLed); } else { if(IS_HARDWARE_TYPE_8192DU(Adapter) || IS_HARDWARE_TYPE_8812AU(Adapter)) { pLed->BlinkingLedState = RTW_LED_ON; pLed->CurrLedState = LED_BLINK_ALWAYS_ON; } else { pLed->bLedNoLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; } _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); } pLed->bLedBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) { RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("RFOff Status \n")); SwLedOff(Adapter, pLed); } else { if(IS_HARDWARE_TYPE_8192DU(Adapter) || IS_HARDWARE_TYPE_8723AU(Adapter) || IS_HARDWARE_TYPE_8812AU(Adapter)) { pLed->BlinkingLedState = RTW_LED_ON; } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; } _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } } break; case LED_BLINK_LINK_IN_PROCESS: if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ON_BELKIN); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_OFF_BELKIN); } break; case LED_BLINK_AUTH_ERROR: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking == _FALSE) { if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_ERROR_INTERVAL_BELKIN); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_ERROR_INTERVAL_BELKIN); } } else { pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_ERROR_INTERVAL_BELKIN); } break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink9 CurrLedState %d\n", pLed->CurrLedState)); } //page added for Netgear A6200V2. 20120827 void SwLedBlink10( PLED_USB pLed ) { PADAPTER Adapter = pLed->padapter; struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); BOOLEAN bStopBlinking = _FALSE; // Change LED according to BlinkingLedState specified. if( pLed->BlinkingLedState == RTW_LED_ON ) { SwLedOn(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); } else { SwLedOff(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); } switch(pLed->CurrLedState) { case RTW_LED_ON: SwLedOn(Adapter, pLed); break; case RTW_LED_OFF: SwLedOff(Adapter, pLed); break; case LED_BLINK_SLOWLY: if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); break; case LED_BLINK_StartToBlink: if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); } break; case LED_BLINK_SCAN: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on ) { SwLedOff(Adapter, pLed); } else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) { pLed->bLedNoLinkBlinkInProgress = _FALSE; pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } pLed->BlinkTimes = 0; pLed->bLedBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(Adapter, pLed); } else { if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_NETGEAR); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_SLOWLY_INTERVAL_NETGEAR+LED_BLINK_LINK_INTERVAL_NETGEAR); } } } break; case LED_BLINK_WPS: if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_NETGEAR); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL+LED_BLINK_LINK_INTERVAL_NETGEAR); } break; case LED_BLINK_WPS_STOP: //WPS authentication fail if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); break; case LED_BLINK_WPS_STOP_OVERLAP: //WPS session overlap pLed->BlinkTimes--; pLed->BlinkCounter --; if(pLed->BlinkCounter == 0) { pLed->BlinkingLedState = RTW_LED_OFF; pLed->CurrLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); } else { if(pLed->BlinkTimes == 0) { if(pLed->bLedOn) { pLed->BlinkTimes = 1; } else { bStopBlinking = _TRUE; } } if(bStopBlinking) { pLed->BlinkTimes = 10; pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); } } break; case LED_BLINK_ALWAYS_ON: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(Adapter, pLed); } else { if(IS_HARDWARE_TYPE_8192DU(Adapter) || IS_HARDWARE_TYPE_8812AU(Adapter)) { pLed->BlinkingLedState = RTW_LED_ON; pLed->CurrLedState = LED_BLINK_ALWAYS_ON; } else { pLed->bLedNoLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; } _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); } pLed->bLedBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) { RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("RFOff Status \n")); SwLedOff(Adapter, pLed); } else { if(IS_HARDWARE_TYPE_8192DU(Adapter) || IS_HARDWARE_TYPE_8723AU(Adapter) || IS_HARDWARE_TYPE_8812AU(Adapter)) { pLed->BlinkingLedState = RTW_LED_ON; } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; } _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } } break; case LED_BLINK_LINK_IN_PROCESS: if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ON_BELKIN); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_OFF_BELKIN); } break; case LED_BLINK_AUTH_ERROR: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking == _FALSE) { if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_ERROR_INTERVAL_BELKIN); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_ERROR_INTERVAL_BELKIN); } } else { pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_ERROR_INTERVAL_BELKIN); } break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink10 CurrLedState %d\n", pLed->CurrLedState)); } void SwLedBlink11( PLED_USB pLed ) { PADAPTER Adapter = pLed->padapter; struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); BOOLEAN bStopBlinking = _FALSE; // Change LED according to BlinkingLedState specified. if( pLed->BlinkingLedState == RTW_LED_ON ) { SwLedOn(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); } else { SwLedOff(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); } switch(pLed->CurrLedState) { case LED_BLINK_TXRX: if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(Adapter, pLed); } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); } break; case LED_BLINK_WPS: if(pLed->BlinkTimes == 5) { SwLedOn(Adapter, pLed); _set_timer(&(pLed->BlinkTimer), LED_CM11_LINK_ON_INTERVEL); } else { if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_CM11_BLINK_INTERVAL); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_CM11_BLINK_INTERVAL); } } pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking == _TRUE) pLed->BlinkTimes = 5; break; case LED_BLINK_WPS_STOP: //WPS authentication fail if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); } else { pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; SwLedOn(Adapter, pLed); _set_timer(&(pLed->BlinkTimer), 0); } break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink5 CurrLedState %d\n", pLed->CurrLedState)); } void SwLedBlink12( PLED_USB pLed ) { PADAPTER Adapter = pLed->padapter; struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); BOOLEAN bStopBlinking = _FALSE; // Change LED according to BlinkingLedState specified. if( pLed->BlinkingLedState == RTW_LED_ON ) { SwLedOn(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%ld): turn on\n", pLed->BlinkTimes)); } else { SwLedOff(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%ld): turn off\n", pLed->BlinkTimes)); } switch(pLed->CurrLedState) { case LED_BLINK_SLOWLY: if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); break; case LED_BLINK_TXRX: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) { pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if(pLed->bLedOn) SwLedOff(Adapter, pLed); } else { pLed->bLedNoLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); } pLed->bLedBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(Adapter, pLed); } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } } break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink8 CurrLedState %d\n", pLed->CurrLedState)); } VOID SwLedBlink13( IN PLED_USB pLed ) { PADAPTER Adapter = pLed->padapter; struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); BOOLEAN bStopBlinking = _FALSE; static u8 LinkBlinkCnt=0; // Change LED according to BlinkingLedState specified. if( pLed->BlinkingLedState == RTW_LED_ON ) { SwLedOn(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); } else { if(pLed->CurrLedState != LED_BLINK_WPS_STOP) SwLedOff(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("!!! SwLedBlink13 CurrLedState %d, bLedWPSBlinkInProgress %d, bLedBlinkInProgress %d\n", pLed->CurrLedState,pLed->bLedWPSBlinkInProgress,pLed->bLedBlinkInProgress)); switch(pLed->CurrLedState) { case LED_BLINK_LINK_IN_PROCESS: if(!pLed->bLedWPSBlinkInProgress) LinkBlinkCnt++; if(LinkBlinkCnt>15) { LinkBlinkCnt=0; pLed->bLedBlinkInProgress = _FALSE; break; } if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), 500); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), 500); } break; case LED_BLINK_WPS: if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_WPS_BLINK_ON_INTERVAL_NETGEAR); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_WPS_BLINK_OFF_INTERVAL_NETGEAR); } break; case LED_BLINK_WPS_STOP: //WPS success SwLedOff(Adapter, pLed); pLed->bLedWPSBlinkInProgress = _FALSE; break; default: LinkBlinkCnt=0; break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("<==== blink13\n")); } VOID SwLedBlink14( IN PLED_USB pLed ) { PADAPTER Adapter = pLed->padapter; struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); BOOLEAN bStopBlinking = _FALSE; static u8 LinkBlinkCnt=0; // Change LED according to BlinkingLedState specified. if( pLed->BlinkingLedState == RTW_LED_ON ) { SwLedOn(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); } else { if(pLed->CurrLedState != LED_BLINK_WPS_STOP) SwLedOff(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("!!! SwLedBlink14 CurrLedState %d, bLedWPSBlinkInProgress %d, bLedBlinkInProgress %d\n", pLed->CurrLedState,pLed->bLedWPSBlinkInProgress,pLed->bLedBlinkInProgress)); switch(pLed->CurrLedState) { case LED_BLINK_TXRX: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(Adapter, pLed); } else { SwLedOn(Adapter, pLed); } pLed->bLedBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(Adapter, pLed); } else { if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; if (IS_HARDWARE_TYPE_8812AU(Adapter)) _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); else _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } else { pLed->BlinkingLedState = RTW_LED_ON; if (IS_HARDWARE_TYPE_8812AU(Adapter)) _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); else _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } } } break; default: LinkBlinkCnt=0; break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("<==== blink14\n")); } VOID SwLedBlink15( IN PLED_USB pLed ) { PADAPTER Adapter = pLed->padapter; struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); BOOLEAN bStopBlinking = _FALSE; static u8 LinkBlinkCnt=0; // Change LED according to BlinkingLedState specified. if( pLed->BlinkingLedState == RTW_LED_ON ) { SwLedOn(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); } else { if(pLed->CurrLedState != LED_BLINK_WPS_STOP) SwLedOff(Adapter, pLed); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("!!! SwLedBlink15 CurrLedState %d, bLedWPSBlinkInProgress %d, bLedBlinkInProgress %d\n", pLed->CurrLedState,pLed->bLedWPSBlinkInProgress,pLed->bLedBlinkInProgress)); switch(pLed->CurrLedState) { case LED_BLINK_WPS: if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_WPS_BLINK_ON_INTERVAL_DLINK); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_WPS_BLINK_OFF_INTERVAL_DLINK); } break; case LED_BLINK_WPS_STOP: //WPS success RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("blink15, LED_BLINK_WPS_STOP BlinkingLedState %d\n",pLed->BlinkingLedState)); if(pLed->BlinkingLedState == RTW_LED_OFF) { pLed->bLedWPSBlinkInProgress = _FALSE; return; } pLed->CurrLedState = LED_BLINK_WPS_STOP; pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_WPS_BLINK_LINKED_ON_INTERVAL_DLINK); break; case LED_BLINK_NO_LINK: { static BOOLEAN bLedOn=_TRUE; RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("blink15, LED_NO_LINK_BLINK bLedOn %d\n",bLedOn)); if(bLedOn) { bLedOn=_FALSE; pLed->BlinkingLedState = RTW_LED_OFF; } else { bLedOn=_TRUE; pLed->BlinkingLedState = RTW_LED_ON; } pLed->bLedBlinkInProgress = _TRUE; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL); } break; case LED_BLINK_LINK_IDEL: { static BOOLEAN bLedOn=_TRUE; RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("blink15, LED_BLINK_LINK_IDEL bLedOn %d\n",bLedOn)); if(bLedOn) { bLedOn=_FALSE; pLed->BlinkingLedState = RTW_LED_OFF; } else { bLedOn=_TRUE; pLed->BlinkingLedState = RTW_LED_ON; } pLed->bLedBlinkInProgress = _TRUE; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_IDEL_INTERVAL); } break; case LED_BLINK_SCAN: { static u8 BlinkTime=0; RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("blink15, LED_SCAN_BLINK bLedOn %d\n",BlinkTime)); if(BlinkTime %2==0) { pLed->BlinkingLedState = RTW_LED_ON; } else { pLed->BlinkingLedState = RTW_LED_OFF; } BlinkTime ++; if(BlinkTime<24) { pLed->bLedBlinkInProgress = _TRUE; if(pLed->BlinkingLedState == RTW_LED_ON) _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_OFF_INTERVAL); else _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_ON_INTERVAL); } else { //if(pLed->OLDLedState ==LED_NO_LINK_BLINK) if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) { pLed->CurrLedState = LED_BLINK_NO_LINK; pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), 100); } BlinkTime =0; } } break; case LED_BLINK_TXRX: pLed->BlinkTimes--; if( pLed->BlinkTimes == 0 ) { bStopBlinking = _TRUE; } if(bStopBlinking) { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(Adapter, pLed); } else { SwLedOn(Adapter, pLed); } pLed->bLedBlinkInProgress = _FALSE; } else { if( adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) { SwLedOff(Adapter, pLed); } else { if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } } break; default: LinkBlinkCnt=0; break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("<==== blink15\n")); } // // Description: // Handler function of LED Blinking. // We dispatch acture LED blink action according to LedStrategy. // void BlinkHandler(PLED_USB pLed) { _adapter *padapter = pLed->padapter; struct led_priv *ledpriv = &(padapter->ledpriv); //DBG_871X("%s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); if( (padapter->bSurpriseRemoved == _TRUE) || (padapter->hw_init_completed == _FALSE)) { //DBG_871X("%s bSurpriseRemoved:%d, bDriverStopped:%d\n", __FUNCTION__, padapter->bSurpriseRemoved, padapter->bDriverStopped); return; } switch(ledpriv->LedStrategy) { case SW_LED_MODE0: SwLedBlink(pLed); break; case SW_LED_MODE1: SwLedBlink1(pLed); break; case SW_LED_MODE2: SwLedBlink2(pLed); break; case SW_LED_MODE3: SwLedBlink3(pLed); break; case SW_LED_MODE4: SwLedBlink4(pLed); break; case SW_LED_MODE5: SwLedBlink5(pLed); break; case SW_LED_MODE6: SwLedBlink6(pLed); break; case SW_LED_MODE7: SwLedBlink7(pLed); break; case SW_LED_MODE8: SwLedBlink8(pLed); break; case SW_LED_MODE9: SwLedBlink9(pLed); break; case SW_LED_MODE10: SwLedBlink10(pLed); break; case SW_LED_MODE11: SwLedBlink11(pLed); break; case SW_LED_MODE12: SwLedBlink12(pLed); break; case SW_LED_MODE13: SwLedBlink13(pLed); break; case SW_LED_MODE14: SwLedBlink14(pLed); break; case SW_LED_MODE15: SwLedBlink15(pLed); break; default: RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("BlinkWorkItemCallback 0x%x \n", ledpriv->LedStrategy)); //SwLedBlink(pLed); break; } } // // Description: // Callback function of LED BlinkTimer, // it just schedules to corresponding BlinkWorkItem/led_blink_hdl // void BlinkTimerCallback(void *data) { PLED_USB pLed = (PLED_USB)data; _adapter *padapter = pLed->padapter; //DBG_871X("%s\n", __FUNCTION__); if( (padapter->bSurpriseRemoved == _TRUE) || (padapter->hw_init_completed == _FALSE)) { //DBG_871X("%s bSurpriseRemoved:%d, bDriverStopped:%d\n", __FUNCTION__, padapter->bSurpriseRemoved, padapter->bDriverStopped); return; } #ifdef CONFIG_LED_HANDLED_BY_CMD_THREAD rtw_led_blink_cmd(padapter, (PVOID)pLed); #else _set_workitem(&(pLed->BlinkWorkItem)); #endif } // // Description: // Callback function of LED BlinkWorkItem. // We dispatch acture LED blink action according to LedStrategy. // void BlinkWorkItemCallback(_workitem *work) { PLED_USB pLed = container_of(work, LED_USB, BlinkWorkItem); BlinkHandler(pLed); } static void SwLedControlMode0( _adapter *padapter, LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = &(padapter->ledpriv); PLED_USB pLed = &(ledpriv->SwLed1); // Decide led state switch(LedAction) { case LED_CTL_TX: case LED_CTL_RX: if( pLed->bLedBlinkInProgress == _FALSE ) { pLed->bLedBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_NORMAL; pLed->BlinkTimes = 2; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); } break; case LED_CTL_START_TO_LINK: if( pLed->bLedBlinkInProgress == _FALSE ) { pLed->bLedBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_StartToBlink; pLed->BlinkTimes = 24; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); } else { pLed->CurrLedState = LED_BLINK_StartToBlink; } break; case LED_CTL_LINK: pLed->CurrLedState = RTW_LED_ON; if( pLed->bLedBlinkInProgress == _FALSE ) { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), 0); } break; case LED_CTL_NO_LINK: pLed->CurrLedState = RTW_LED_OFF; if( pLed->bLedBlinkInProgress == _FALSE ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), 0); } break; case LED_CTL_POWER_OFF: pLed->CurrLedState = RTW_LED_OFF; if(pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } SwLedOff(padapter, pLed); break; case LED_CTL_START_WPS: if( pLed->bLedBlinkInProgress == _FALSE || pLed->CurrLedState == RTW_LED_ON) { pLed->bLedBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_WPS; pLed->BlinkTimes = 20; if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); } } break; case LED_CTL_STOP_WPS: if(pLed->bLedBlinkInProgress) { pLed->CurrLedState = RTW_LED_OFF; _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); } //ALPHA, added by chiyoko, 20090106 static void SwLedControlMode1( _adapter *padapter, LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = &(padapter->ledpriv); PLED_USB pLed = &(ledpriv->SwLed0); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); u32 uLedBlinkNoLinkInterval = LED_BLINK_NO_LINK_INTERVAL_ALPHA; //add by ylb 20121012 for customer led for alpha if(pEEPROM->CustomerID == RT_CID_819x_ALPHA_Dlink) uLedBlinkNoLinkInterval= LED_BLINK_NO_LINK_INTERVAL_ALPHA_500MS; if(pEEPROM->CustomerID == RT_CID_819x_CAMEO) pLed = &(ledpriv->SwLed1); switch(LedAction) { case LED_CTL_POWER_ON: case LED_CTL_START_TO_LINK: case LED_CTL_NO_LINK: if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) { if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) { return; } if( pLed->bLedLinkBlinkInProgress == _TRUE ) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedLinkBlinkInProgress = _FALSE; } if(pLed->bLedBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->bLedNoLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), uLedBlinkNoLinkInterval);//change by ylb 20121012 for customer led for alpha } break; case LED_CTL_LINK: if( pLed->bLedLinkBlinkInProgress == _FALSE ) { if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) { return; } if(pLed->bLedNoLinkBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } if(pLed->bLedBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->bLedLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_NORMAL; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); } break; case LED_CTL_SITE_SURVEY: if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ; else if(pLed->bLedScanBlinkInProgress ==_FALSE) { if(IS_LED_WPS_BLINKING(pLed)) return; if(pLed->bLedNoLinkBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } if( pLed->bLedLinkBlinkInProgress == _TRUE ) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedLinkBlinkInProgress = _FALSE; } if(pLed->bLedBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->bLedScanBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SCAN; pLed->BlinkTimes = 24; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason == RF_CHANGE_BY_IPS) _set_timer(&(pLed->BlinkTimer), LED_INITIAL_INTERVAL); else _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); } break; case LED_CTL_TX: case LED_CTL_RX: if(pLed->bLedBlinkInProgress ==_FALSE) { if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) { return; } if(pLed->bLedNoLinkBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } if( pLed->bLedLinkBlinkInProgress == _TRUE ) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedLinkBlinkInProgress = _FALSE; } pLed->bLedBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_TXRX; pLed->BlinkTimes = 2; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } break; case LED_CTL_START_WPS: //wait until xinpin finish case LED_CTL_START_WPS_BOTTON: if(pLed->bLedWPSBlinkInProgress ==_FALSE) { if(pLed->bLedNoLinkBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } if( pLed->bLedLinkBlinkInProgress == _TRUE ) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedLinkBlinkInProgress = _FALSE; } if(pLed->bLedBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if(pLed->bLedScanBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } pLed->bLedWPSBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_WPS; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); } break; case LED_CTL_STOP_WPS: if(pLed->bLedNoLinkBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } if( pLed->bLedLinkBlinkInProgress == _TRUE ) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedLinkBlinkInProgress = _FALSE; } if(pLed->bLedBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if(pLed->bLedScanBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } if(pLed->bLedWPSBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); } else { pLed->bLedWPSBlinkInProgress = _TRUE; } pLed->CurrLedState = LED_BLINK_WPS_STOP; if(pLed->bLedOn) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), 0); } break; case LED_CTL_STOP_WPS_FAIL: if(pLed->bLedWPSBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } pLed->bLedNoLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), uLedBlinkNoLinkInterval);//change by ylb 20121012 for customer led for alpha break; case LED_CTL_POWER_OFF: pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if( pLed->bLedNoLinkBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } if( pLed->bLedLinkBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedLinkBlinkInProgress = _FALSE; } if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if( pLed->bLedWPSBlinkInProgress ) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } if( pLed->bLedScanBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } SwLedOff(padapter, pLed); break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); } //Arcadyan/Sitecom , added by chiyoko, 20090216 static void SwLedControlMode2( _adapter *padapter, LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = &(padapter->ledpriv); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; PLED_USB pLed = &(ledpriv->SwLed0); switch(LedAction) { case LED_CTL_SITE_SURVEY: if(pmlmepriv->LinkDetectInfo.bBusyTraffic) ; else if(pLed->bLedScanBlinkInProgress ==_FALSE) { if(IS_LED_WPS_BLINKING(pLed)) return; if(pLed->bLedBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->bLedScanBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SCAN; pLed->BlinkTimes = 24; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); } break; case LED_CTL_TX: case LED_CTL_RX: if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) { if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) { return; } pLed->bLedBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_TXRX; pLed->BlinkTimes = 2; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } break; case LED_CTL_LINK: pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if( pLed->bLedScanBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } _set_timer(&(pLed->BlinkTimer), 0); break; case LED_CTL_START_WPS: //wait until xinpin finish case LED_CTL_START_WPS_BOTTON: if(pLed->bLedWPSBlinkInProgress ==_FALSE) { if(pLed->bLedBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if(pLed->bLedScanBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } pLed->bLedWPSBlinkInProgress = _TRUE; pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), 0); } break; case LED_CTL_STOP_WPS: pLed->bLedWPSBlinkInProgress = _FALSE; if(adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) { pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), 0); } else { pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), 0); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } break; case LED_CTL_STOP_WPS_FAIL: pLed->bLedWPSBlinkInProgress = _FALSE; pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), 0); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); break; case LED_CTL_START_TO_LINK: case LED_CTL_NO_LINK: if(!IS_LED_BLINKING(pLed)) { pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), 0); } break; case LED_CTL_POWER_OFF: pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if( pLed->bLedScanBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } if( pLed->bLedWPSBlinkInProgress ) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } SwLedOff(padapter, pLed); break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } //COREGA, added by chiyoko, 20090316 static void SwLedControlMode3( _adapter *padapter, LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = &(padapter->ledpriv); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; PLED_USB pLed = &(ledpriv->SwLed0); switch(LedAction) { case LED_CTL_SITE_SURVEY: if(pmlmepriv->LinkDetectInfo.bBusyTraffic) ; else if(pLed->bLedScanBlinkInProgress ==_FALSE) { if(IS_LED_WPS_BLINKING(pLed)) return; if(pLed->bLedBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->bLedScanBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SCAN; pLed->BlinkTimes = 24; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); } break; case LED_CTL_TX: case LED_CTL_RX: if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) { if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) { return; } pLed->bLedBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_TXRX; pLed->BlinkTimes = 2; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } break; case LED_CTL_LINK: if(IS_LED_WPS_BLINKING(pLed)) return; pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if( pLed->bLedScanBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } _set_timer(&(pLed->BlinkTimer), 0); break; case LED_CTL_START_WPS: //wait until xinpin finish case LED_CTL_START_WPS_BOTTON: if(pLed->bLedWPSBlinkInProgress ==_FALSE) { if(pLed->bLedBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if(pLed->bLedScanBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } pLed->bLedWPSBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_WPS; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); } break; case LED_CTL_STOP_WPS: if(pLed->bLedWPSBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } else { pLed->bLedWPSBlinkInProgress = _TRUE; } pLed->CurrLedState = LED_BLINK_WPS_STOP; if(pLed->bLedOn) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), 0); } break; case LED_CTL_STOP_WPS_FAIL: if(pLed->bLedWPSBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), 0); break; case LED_CTL_START_TO_LINK: case LED_CTL_NO_LINK: if(!IS_LED_BLINKING(pLed)) { pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), 0); } break; case LED_CTL_POWER_OFF: pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if( pLed->bLedScanBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } if( pLed->bLedWPSBlinkInProgress ) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } SwLedOff(padapter, pLed); break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); } //Edimax-Belkin, added by chiyoko, 20090413 static void SwLedControlMode4( _adapter *padapter, LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = &(padapter->ledpriv); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; PLED_USB pLed = &(ledpriv->SwLed0); PLED_USB pLed1 = &(ledpriv->SwLed1); switch(LedAction) { case LED_CTL_START_TO_LINK: if(pLed1->bLedWPSBlinkInProgress) { pLed1->bLedWPSBlinkInProgress = _FALSE; _cancel_timer_ex(&(pLed1->BlinkTimer)); pLed1->BlinkingLedState = RTW_LED_OFF; pLed1->CurrLedState = RTW_LED_OFF; if(pLed1->bLedOn) _set_timer(&(pLed->BlinkTimer), 0); } if( pLed->bLedStartToLinkBlinkInProgress == _FALSE ) { if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) { return; } if(pLed->bLedBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if(pLed->bLedNoLinkBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } pLed->bLedStartToLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_StartToBlink; if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); } } break; case LED_CTL_LINK: case LED_CTL_NO_LINK: //LED1 settings if(LedAction == LED_CTL_LINK) { if(pLed1->bLedWPSBlinkInProgress) { pLed1->bLedWPSBlinkInProgress = _FALSE; _cancel_timer_ex(&(pLed1->BlinkTimer)); pLed1->BlinkingLedState = RTW_LED_OFF; pLed1->CurrLedState = RTW_LED_OFF; if(pLed1->bLedOn) _set_timer(&(pLed->BlinkTimer), 0); } } if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) { if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) { return; } if(pLed->bLedBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->bLedNoLinkBlinkInProgress = _TRUE; if(IS_HARDWARE_TYPE_8192DU(padapter)) { if(LedAction == LED_CTL_LINK) { pLed->BlinkingLedState = RTW_LED_ON; pLed->CurrLedState = LED_BLINK_ALWAYS_ON; } else { pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; } } else { pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; } _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); } break; case LED_CTL_SITE_SURVEY: if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ; else if(pLed->bLedScanBlinkInProgress ==_FALSE) { if(IS_LED_WPS_BLINKING(pLed)) return; if(pLed->bLedNoLinkBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } if(pLed->bLedBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->bLedScanBlinkInProgress = _TRUE; if(IS_HARDWARE_TYPE_8192D(padapter)) pLed->CurrLedState = LED_BLINK_SLOWLY; else pLed->CurrLedState = LED_BLINK_SCAN; pLed->BlinkTimes = 24; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); } break; case LED_CTL_TX: case LED_CTL_RX: if(pLed->bLedBlinkInProgress ==_FALSE) { if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) { return; } if(pLed->bLedNoLinkBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } pLed->bLedBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_TXRX; pLed->BlinkTimes = 2; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } break; case LED_CTL_START_WPS: //wait until xinpin finish case LED_CTL_START_WPS_BOTTON: if(pLed1->bLedWPSBlinkInProgress) { pLed1->bLedWPSBlinkInProgress = _FALSE; _cancel_timer_ex(&(pLed1->BlinkTimer)); pLed1->BlinkingLedState = RTW_LED_OFF; pLed1->CurrLedState = RTW_LED_OFF; if(pLed1->bLedOn) _set_timer(&(pLed->BlinkTimer), 0); } if(pLed->bLedWPSBlinkInProgress ==_FALSE) { if(pLed->bLedNoLinkBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } if(pLed->bLedBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if(pLed->bLedScanBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } pLed->bLedWPSBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_WPS; if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); } } break; case LED_CTL_STOP_WPS: //WPS connect success if(pLed->bLedWPSBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } pLed->bLedNoLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); break; case LED_CTL_STOP_WPS_FAIL: //WPS authentication fail if(pLed->bLedWPSBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } pLed->bLedNoLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); //LED1 settings if(pLed1->bLedWPSBlinkInProgress) _cancel_timer_ex(&(pLed1->BlinkTimer)); else pLed1->bLedWPSBlinkInProgress = _TRUE; pLed1->CurrLedState = LED_BLINK_WPS_STOP; if( pLed1->bLedOn ) pLed1->BlinkingLedState = RTW_LED_OFF; else pLed1->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); break; case LED_CTL_STOP_WPS_FAIL_OVERLAP: //WPS session overlap if(pLed->bLedWPSBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } pLed->bLedNoLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); //LED1 settings if(pLed1->bLedWPSBlinkInProgress) _cancel_timer_ex(&(pLed1->BlinkTimer)); else pLed1->bLedWPSBlinkInProgress = _TRUE; pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP; pLed1->BlinkTimes = 10; if( pLed1->bLedOn ) pLed1->BlinkingLedState = RTW_LED_OFF; else pLed1->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); break; case LED_CTL_POWER_OFF: pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if( pLed->bLedNoLinkBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } if( pLed->bLedLinkBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedLinkBlinkInProgress = _FALSE; } if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if( pLed->bLedWPSBlinkInProgress ) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } if( pLed->bLedScanBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } if( pLed->bLedStartToLinkBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedStartToLinkBlinkInProgress = _FALSE; } if( pLed1->bLedWPSBlinkInProgress ) { _cancel_timer_ex(&(pLed1->BlinkTimer)); pLed1->bLedWPSBlinkInProgress = _FALSE; } pLed1->BlinkingLedState = LED_UNKNOWN; SwLedOff(padapter, pLed); SwLedOff(padapter, pLed1); break; case LED_CTL_CONNECTION_NO_TRANSFER: if(pLed->bLedBlinkInProgress == _FALSE) { if(pLed->bLedNoLinkBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } pLed->bLedBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_ALWAYS_ON; pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); } break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); } //Sercomm-Belkin, added by chiyoko, 20090415 static void SwLedControlMode5( _adapter *padapter, LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = &(padapter->ledpriv); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); PLED_USB pLed = &(ledpriv->SwLed0); if(pEEPROM->CustomerID == RT_CID_819x_CAMEO) pLed = &(ledpriv->SwLed1); switch(LedAction) { case LED_CTL_POWER_ON: case LED_CTL_NO_LINK: case LED_CTL_LINK: //solid blue pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), 0); break; case LED_CTL_SITE_SURVEY: if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ; else if(pLed->bLedScanBlinkInProgress ==_FALSE) { if(pLed->bLedBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->bLedScanBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SCAN; pLed->BlinkTimes = 24; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); } break; case LED_CTL_TX: case LED_CTL_RX: if(pLed->bLedBlinkInProgress ==_FALSE) { if(pLed->CurrLedState == LED_BLINK_SCAN) { return; } pLed->bLedBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_TXRX; pLed->BlinkTimes = 2; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } break; case LED_CTL_POWER_OFF: pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } SwLedOff(padapter, pLed); break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); } //WNC-Corega, added by chiyoko, 20090902 static void SwLedControlMode6( _adapter *padapter, LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = &(padapter->ledpriv); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; PLED_USB pLed0 = &(ledpriv->SwLed0); switch(LedAction) { case LED_CTL_POWER_ON: case LED_CTL_LINK: case LED_CTL_NO_LINK: _cancel_timer_ex(&(pLed0->BlinkTimer)); pLed0->CurrLedState = RTW_LED_ON; pLed0->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed0->BlinkTimer), 0); break; case LED_CTL_POWER_OFF: SwLedOff(padapter, pLed0); break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("ledcontrol 6 Led %d\n", pLed0->CurrLedState)); } //Netgear, added by sinda, 2011/11/11 void SwLedControlMode7( PADAPTER Adapter, LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = &(Adapter->ledpriv); struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; PLED_USB pLed = &(ledpriv->SwLed0); switch(LedAction) { case LED_CTL_SITE_SURVEY: if(pmlmepriv->LinkDetectInfo.bBusyTraffic) ; else if(pLed->bLedScanBlinkInProgress == _FALSE) { if(IS_LED_WPS_BLINKING(pLed)) return; if(pLed->bLedBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->bLedScanBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SCAN; pLed->BlinkTimes = 6; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_NETGEAR); } break; case LED_CTL_LINK: if(IS_LED_WPS_BLINKING(pLed)) return; pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if( pLed->bLedScanBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } _set_timer(&(pLed->BlinkTimer), 0); break; case LED_CTL_START_WPS: //wait until xinpin finish case LED_CTL_START_WPS_BOTTON: if(pLed->bLedWPSBlinkInProgress ==_FALSE) { if(pLed->bLedBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if(pLed->bLedScanBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } pLed->bLedWPSBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_WPS; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_NETGEAR); } break; case LED_CTL_STOP_WPS: if(pLed->bLedWPSBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } else { pLed->bLedWPSBlinkInProgress = _TRUE; } pLed->CurrLedState = LED_BLINK_WPS_STOP; if(pLed->bLedOn) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_NETGEAR); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), 0); } break; case LED_CTL_STOP_WPS_FAIL: case LED_CTL_STOP_WPS_FAIL_OVERLAP: //WPS session overlap if(pLed->bLedWPSBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), 0); break; case LED_CTL_START_TO_LINK: case LED_CTL_NO_LINK: if(!IS_LED_BLINKING(pLed)) { pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), 0); } break; case LED_CTL_POWER_OFF: case LED_CTL_POWER_ON: pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if( pLed->bLedScanBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } if( pLed->bLedWPSBlinkInProgress ) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } _set_timer(&(pLed->BlinkTimer), 0); break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("LEd control mode 7 CurrLedState %d\n", pLed->CurrLedState)); } void SwLedControlMode8( PADAPTER Adapter, LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = &(Adapter->ledpriv); struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; PLED_USB pLed0 = &(ledpriv->SwLed0); switch(LedAction) { case LED_CTL_LINK: _cancel_timer_ex(&(pLed0->BlinkTimer)); pLed0->CurrLedState = RTW_LED_ON; pLed0->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed0->BlinkTimer), 0); break; case LED_CTL_NO_LINK: _cancel_timer_ex(&(pLed0->BlinkTimer)); pLed0->CurrLedState = RTW_LED_OFF; pLed0->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed0->BlinkTimer), 0); break; case LED_CTL_POWER_OFF: SwLedOff(Adapter, pLed0); break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led control mode 8 %d\n", pLed0->CurrLedState)); } //page added for Belkin AC950, 20120813 void SwLedControlMode9( IN PADAPTER Adapter, IN LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = &(Adapter->ledpriv); struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; PLED_USB pLed = &(ledpriv->SwLed0); PLED_USB pLed1 = &(ledpriv->SwLed1); PLED_USB pLed2 = &(ledpriv->SwLed2); BOOLEAN bWPSOverLap = _FALSE; //DBG_871X("LedAction=%d \n", LedAction); switch(LedAction) { case LED_CTL_START_TO_LINK: if(pLed2->bLedBlinkInProgress == _FALSE) { pLed2->bLedBlinkInProgress = _TRUE; pLed2->BlinkingLedState = RTW_LED_ON; pLed2->CurrLedState = LED_BLINK_LINK_IN_PROCESS; _set_timer(&(pLed2->BlinkTimer), 0); } break; case LED_CTL_LINK: case LED_CTL_NO_LINK: //LED1 settings if(LedAction == LED_CTL_NO_LINK) { //if(pMgntInfo->AuthStatus == AUTH_STATUS_FAILED) if(0) { pLed1->CurrLedState = LED_BLINK_AUTH_ERROR; if( pLed1->bLedOn ) pLed1->BlinkingLedState = RTW_LED_OFF; else pLed1->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed1->BlinkTimer), 0); } else { pLed1->CurrLedState = RTW_LED_OFF; pLed1->BlinkingLedState = RTW_LED_OFF; if( pLed1->bLedOn ) _set_timer(&(pLed1->BlinkTimer), 0); } } else { pLed1->CurrLedState = RTW_LED_OFF; pLed1->BlinkingLedState = RTW_LED_OFF; if( pLed1->bLedOn ) _set_timer(&(pLed1->BlinkTimer), 0); } //LED2 settings if(LedAction == LED_CTL_LINK) { if(Adapter->securitypriv.dot11PrivacyAlgrthm != _NO_PRIVACY_) { if(pLed2->bLedBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed2->BlinkTimer)); pLed2->bLedBlinkInProgress = _FALSE; } pLed2->CurrLedState = RTW_LED_ON; pLed2->bLedNoLinkBlinkInProgress = _TRUE; if(!pLed2->bLedOn) _set_timer(&(pLed2->BlinkTimer), 0); } else { if(pLed2->bLedWPSBlinkInProgress != _TRUE) { pLed2->CurrLedState = RTW_LED_OFF; pLed2->BlinkingLedState = RTW_LED_OFF; if(pLed2->bLedOn) _set_timer(&(pLed2->BlinkTimer), 0); } } } else //NO_LINK { if(pLed2->bLedWPSBlinkInProgress == _FALSE) { pLed2->CurrLedState = RTW_LED_OFF; pLed2->BlinkingLedState = RTW_LED_OFF; if(pLed2->bLedOn) _set_timer(&(pLed2->BlinkTimer), 0); } } //LED0 settings if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) { if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) { return; } if(pLed->bLedBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->bLedNoLinkBlinkInProgress = _TRUE; if(IS_HARDWARE_TYPE_8192DU(Adapter) || IS_HARDWARE_TYPE_8812AU(Adapter)) { if(LedAction == LED_CTL_LINK) { pLed->BlinkingLedState = RTW_LED_ON; pLed->CurrLedState = LED_BLINK_SLOWLY; } else { pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; } } else { pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; } _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); } break; case LED_CTL_SITE_SURVEY: if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ; else //if(pLed->bLedScanBlinkInProgress ==FALSE) { if(IS_LED_WPS_BLINKING(pLed)) return; if(pLed->bLedNoLinkBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } if(pLed->bLedBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->bLedScanBlinkInProgress = _TRUE; if(IS_HARDWARE_TYPE_8192D(Adapter)) pLed->CurrLedState = LED_BLINK_SLOWLY; else pLed->CurrLedState = LED_BLINK_SCAN; pLed->BlinkTimes = 24; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); } break; case LED_CTL_TX: case LED_CTL_RX: if(pLed->bLedBlinkInProgress == _FALSE) { if(pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) { return; } if(pLed->bLedNoLinkBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } pLed->bLedBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_TXRX; pLed->BlinkTimes = 2; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } break; case LED_CTL_START_WPS: //wait until xinpin finish case LED_CTL_START_WPS_BOTTON: pLed2->bLedBlinkInProgress = _TRUE; pLed2->BlinkingLedState = RTW_LED_ON; pLed2->CurrLedState = LED_BLINK_LINK_IN_PROCESS; pLed2->bLedWPSBlinkInProgress = _TRUE; _set_timer(&(pLed2->BlinkTimer), 500); break; case LED_CTL_STOP_WPS: //WPS connect success //LED2 settings if(pLed2->bLedWPSBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed2->BlinkTimer)); pLed2->bLedBlinkInProgress = _FALSE; pLed2->bLedWPSBlinkInProgress = _FALSE; } pLed2->CurrLedState = RTW_LED_ON; pLed2->bLedNoLinkBlinkInProgress = _TRUE; if(!pLed2->bLedOn) _set_timer(&(pLed2->BlinkTimer), 0); //LED1 settings _cancel_timer_ex(&(pLed1->BlinkTimer)); pLed1->CurrLedState = RTW_LED_OFF; pLed1->BlinkingLedState = RTW_LED_OFF; if( pLed1->bLedOn ) _set_timer(&(pLed1->BlinkTimer), 0); break; case LED_CTL_STOP_WPS_FAIL: //WPS authentication fail //LED1 settings //if(bWPSOverLap == _FALSE) { pLed1->CurrLedState = LED_BLINK_AUTH_ERROR; pLed1->BlinkTimes = 50; if( pLed1->bLedOn ) pLed1->BlinkingLedState = RTW_LED_OFF; else pLed1->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed1->BlinkTimer), 0); } //else //{ // bWPSOverLap = _FALSE; // pLed1->CurrLedState = RTW_LED_OFF; // pLed1->BlinkingLedState = RTW_LED_OFF; // _set_timer(&(pLed1->BlinkTimer), 0); //} //LED2 settings pLed2->CurrLedState = RTW_LED_OFF; pLed2->BlinkingLedState = RTW_LED_OFF; pLed2->bLedWPSBlinkInProgress = _FALSE; if( pLed2->bLedOn ) _set_timer(&(pLed2->BlinkTimer), 0); break; case LED_CTL_STOP_WPS_FAIL_OVERLAP: //WPS session overlap //LED1 settings bWPSOverLap = _TRUE; pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP; pLed1->BlinkTimes = 10; pLed1->BlinkCounter = 50; if( pLed1->bLedOn ) pLed1->BlinkingLedState = RTW_LED_OFF; else pLed1->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed1->BlinkTimer), 0); //LED2 settings pLed2->CurrLedState = RTW_LED_OFF; pLed2->BlinkingLedState = RTW_LED_OFF; pLed2->bLedWPSBlinkInProgress = _FALSE; if( pLed2->bLedOn ) _set_timer(&(pLed2->BlinkTimer), 0); break; case LED_CTL_POWER_OFF: pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if( pLed->bLedNoLinkBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } if( pLed->bLedLinkBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedLinkBlinkInProgress = _FALSE; } if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if( pLed->bLedWPSBlinkInProgress ) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } if( pLed->bLedScanBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } if( pLed->bLedStartToLinkBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedStartToLinkBlinkInProgress = _FALSE; } if( pLed1->bLedWPSBlinkInProgress ) { _cancel_timer_ex(&(pLed1->BlinkTimer)); pLed1->bLedWPSBlinkInProgress = _FALSE; } pLed1->BlinkingLedState = LED_UNKNOWN; SwLedOff(Adapter, pLed); SwLedOff(Adapter, pLed1); break; case LED_CTL_CONNECTION_NO_TRANSFER: if(pLed->bLedBlinkInProgress == _FALSE) { if(pLed->bLedNoLinkBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } pLed->bLedBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_ALWAYS_ON; pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); } break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led control mode 9 Led %d\n", pLed->CurrLedState)); } //page added for Netgear A6200V2, 20120827 void SwLedControlMode10( PADAPTER Adapter, LED_CTL_MODE LedAction ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct led_priv *ledpriv = &(Adapter->ledpriv); struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; PLED_USB pLed = &(ledpriv->SwLed0); PLED_USB pLed1 = &(ledpriv->SwLed1); switch(LedAction) { case LED_CTL_START_TO_LINK: if(pLed1->bLedBlinkInProgress == _FALSE) { pLed1->bLedBlinkInProgress = _TRUE; pLed1->BlinkingLedState = RTW_LED_ON; pLed1->CurrLedState = LED_BLINK_LINK_IN_PROCESS; _set_timer(&(pLed1->BlinkTimer), 0); } break; case LED_CTL_LINK: case LED_CTL_NO_LINK: if(LedAction == LED_CTL_LINK) { if(pLed->bLedWPSBlinkInProgress == _TRUE || pLed1->bLedWPSBlinkInProgress == _TRUE) ; else { if(pHalData->CurrentBandType == BAND_ON_2_4G) //LED0 settings { pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; if(pLed->bLedBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } _set_timer(&(pLed->BlinkTimer), 0); pLed1->CurrLedState = RTW_LED_OFF; pLed1->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed1->BlinkTimer), 0); } else if(pHalData->CurrentBandType == BAND_ON_5G) //LED1 settings { pLed1->CurrLedState = RTW_LED_ON; pLed1->BlinkingLedState = RTW_LED_ON; if(pLed1->bLedBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed1->BlinkTimer)); pLed1->bLedBlinkInProgress = _FALSE; } _set_timer(&(pLed1->BlinkTimer), 0); pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), 0); } } } else if(LedAction == LED_CTL_NO_LINK) //TODO by page { if(pLed->bLedWPSBlinkInProgress == _TRUE || pLed1->bLedWPSBlinkInProgress == _TRUE) ; else { pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if( pLed->bLedOn ) _set_timer(&(pLed->BlinkTimer), 0); pLed1->CurrLedState = RTW_LED_OFF; pLed1->BlinkingLedState = RTW_LED_OFF; if( pLed1->bLedOn ) _set_timer(&(pLed1->BlinkTimer), 0); } } break; case LED_CTL_SITE_SURVEY: if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ; //don't blink when media connect else //if(pLed->bLedScanBlinkInProgress ==FALSE) { if(IS_LED_WPS_BLINKING(pLed) || IS_LED_WPS_BLINKING(pLed1)) return; if(pLed->bLedNoLinkBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } if(pLed->bLedBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->bLedScanBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SCAN; pLed->BlinkTimes = 12; pLed->BlinkingLedState = LED_BLINK_SCAN; _set_timer(&(pLed->BlinkTimer), 0); if(pLed1->bLedNoLinkBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed1->BlinkTimer)); pLed1->bLedNoLinkBlinkInProgress = _FALSE; } if(pLed1->bLedBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed1->BlinkTimer)); pLed1->bLedBlinkInProgress = _FALSE; } pLed1->bLedScanBlinkInProgress = _TRUE; pLed1->CurrLedState = LED_BLINK_SCAN; pLed1->BlinkTimes = 12; pLed1->BlinkingLedState = LED_BLINK_SCAN; _set_timer(&(pLed1->BlinkTimer), LED_BLINK_LINK_SLOWLY_INTERVAL_NETGEAR); } break; case LED_CTL_START_WPS: //wait until xinpin finish case LED_CTL_START_WPS_BOTTON: //LED0 settings if(pLed->bLedBlinkInProgress == _FALSE) { pLed->bLedBlinkInProgress = _TRUE; pLed->bLedWPSBlinkInProgress = _TRUE; pLed->BlinkingLedState = LED_BLINK_WPS; pLed->CurrLedState = LED_BLINK_WPS; _set_timer(&(pLed->BlinkTimer), 0); } //LED1 settings if(pLed1->bLedBlinkInProgress == _FALSE) { pLed1->bLedBlinkInProgress = _TRUE; pLed1->bLedWPSBlinkInProgress = _TRUE; pLed1->BlinkingLedState = LED_BLINK_WPS; pLed1->CurrLedState = LED_BLINK_WPS; _set_timer(&(pLed1->BlinkTimer), LED_BLINK_NORMAL_INTERVAL+LED_BLINK_LINK_INTERVAL_NETGEAR); } break; case LED_CTL_STOP_WPS: //WPS connect success if(pHalData->CurrentBandType == BAND_ON_2_4G) //LED0 settings { pLed->bLedWPSBlinkInProgress = _FALSE; pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; if(pLed->bLedBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } _set_timer(&(pLed->BlinkTimer), 0); pLed1->CurrLedState = RTW_LED_OFF; pLed1->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed1->BlinkTimer), 0); } else if(pHalData->CurrentBandType == BAND_ON_5G) //LED1 settings { pLed1->bLedWPSBlinkInProgress = _FALSE; pLed1->CurrLedState = RTW_LED_ON; pLed1->BlinkingLedState = RTW_LED_ON; if(pLed1->bLedBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed1->BlinkTimer)); pLed1->bLedBlinkInProgress = _FALSE; } _set_timer(&(pLed1->BlinkTimer), 0); pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), 0); } break; case LED_CTL_STOP_WPS_FAIL: //WPS authentication fail //LED1 settings pLed1->bLedWPSBlinkInProgress = _FALSE; pLed1->CurrLedState = RTW_LED_OFF; pLed1->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed1->BlinkTimer), 0); //LED0 settings pLed->bLedWPSBlinkInProgress = _FALSE; pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if( pLed->bLedOn ) _set_timer(&(pLed->BlinkTimer), 0); break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led control mode 10 Led %d\n", pLed->CurrLedState)); } //Edimax-ASUS, added by Page, 20121221 void SwLedControlMode11( PADAPTER Adapter, LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = &(Adapter->ledpriv); struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; PLED_USB pLed = &(ledpriv->SwLed0); switch(LedAction) { case LED_CTL_POWER_ON: case LED_CTL_START_TO_LINK: case LED_CTL_NO_LINK: pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), 0); break; case LED_CTL_LINK: if( pLed->bLedBlinkInProgress == _TRUE ) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->bLedBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_TXRX; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); break; case LED_CTL_START_WPS: //wait until xinpin finish case LED_CTL_START_WPS_BOTTON: if(pLed->bLedBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->bLedWPSBlinkInProgress = _TRUE; pLed->bLedBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_WPS; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; pLed->BlinkTimes = 5; _set_timer(&(pLed->BlinkTimer), 0); break; case LED_CTL_STOP_WPS: case LED_CTL_STOP_WPS_FAIL: if(pLed->bLedBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->CurrLedState = LED_BLINK_WPS_STOP; _set_timer(&(pLed->BlinkTimer), 0); break; case LED_CTL_POWER_OFF: pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if( pLed->bLedNoLinkBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } if( pLed->bLedLinkBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedLinkBlinkInProgress = _FALSE; } if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if( pLed->bLedWPSBlinkInProgress ) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } if( pLed->bLedScanBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } SwLedOff(Adapter, pLed); break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led mode 1 CurrLedState %d\n", pLed->CurrLedState)); } // page added for NEC VOID SwLedControlMode12( PADAPTER Adapter, LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = &(Adapter->ledpriv); struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; PLED_USB pLed = &(ledpriv->SwLed0); switch(LedAction) { case LED_CTL_POWER_ON: case LED_CTL_NO_LINK: case LED_CTL_LINK: case LED_CTL_SITE_SURVEY: if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) { if(pLed->bLedBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->bLedNoLinkBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_SLOWLY; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); } break; case LED_CTL_TX: case LED_CTL_RX: if(pLed->bLedBlinkInProgress == _FALSE) { if(pLed->bLedNoLinkBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } pLed->bLedBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_TXRX; pLed->BlinkTimes = 2; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } break; case LED_CTL_POWER_OFF: pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if( pLed->bLedScanBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } if(pLed->bLedNoLinkBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedNoLinkBlinkInProgress = _FALSE; } SwLedOff(Adapter, pLed); break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SWLed12 %d\n", pLed->CurrLedState)); } // Maddest add for NETGEAR R6100 VOID SwLedControlMode13( IN PADAPTER Adapter, IN LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = &(Adapter->ledpriv); struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; PLED_USB pLed = &(ledpriv->SwLed0); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led control mode 13 CurrLedState %d, LedAction %d\n", pLed->CurrLedState,LedAction)); switch(LedAction) { case LED_CTL_LINK: if(pLed->bLedWPSBlinkInProgress) { return; } pLed->CurrLedState = RTW_LED_ON; pLed->BlinkingLedState = RTW_LED_ON; if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if( pLed->bLedScanBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } _set_timer(&(pLed->BlinkTimer), 0); break; case LED_CTL_START_WPS: //wait until xinpin finish case LED_CTL_START_WPS_BOTTON: if(pLed->bLedWPSBlinkInProgress == _FALSE) { if(pLed->bLedBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if(pLed->bLedScanBlinkInProgress == _TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } pLed->bLedWPSBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_WPS; if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_WPS_BLINK_OFF_INTERVAL_NETGEAR); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_WPS_BLINK_ON_INTERVAL_NETGEAR); } } break; case LED_CTL_STOP_WPS: if(pLed->bLedWPSBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } else { pLed->bLedWPSBlinkInProgress = _TRUE; } pLed->bLedWPSBlinkInProgress = _FALSE; pLed->CurrLedState = LED_BLINK_WPS_STOP; if(pLed->bLedOn) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), 0); } break; case LED_CTL_STOP_WPS_FAIL: case LED_CTL_STOP_WPS_FAIL_OVERLAP: //WPS session overlap if(pLed->bLedWPSBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), 0); break; case LED_CTL_START_TO_LINK: if((pLed->bLedBlinkInProgress == _FALSE) && (pLed->bLedWPSBlinkInProgress == _FALSE)) { pLed->bLedBlinkInProgress = _TRUE; pLed->BlinkingLedState = RTW_LED_ON; pLed->CurrLedState = LED_BLINK_LINK_IN_PROCESS; _set_timer(&(pLed->BlinkTimer), 0); } break; case LED_CTL_NO_LINK: if(pLed->bLedWPSBlinkInProgress) { return; } if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if( pLed->bLedScanBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } //if(!IS_LED_BLINKING(pLed)) { pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), 0); } break; case LED_CTL_POWER_OFF: case LED_CTL_POWER_ON: pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if( pLed->bLedScanBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } if( pLed->bLedWPSBlinkInProgress ) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } if (LedAction == LED_CTL_POWER_ON) _set_timer(&(pLed->BlinkTimer), 0); else SwLedOff(Adapter, pLed); break; default: break; } } // Maddest add for DNI Buffalo VOID SwLedControlMode14( IN PADAPTER Adapter, IN LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = &(Adapter->ledpriv); PLED_USB pLed = &(ledpriv->SwLed0); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led control mode 14 CurrLedState %d, LedAction %d\n", pLed->CurrLedState,LedAction)); switch(LedAction) { case LED_CTL_POWER_OFF: RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led control mode 14 LED_CTL_POWER_OFF\n")); pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } SwLedOff(Adapter, pLed); break; case LED_CTL_POWER_ON: RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led control mode 14 LED_CTL_POWER_ON\n")); SwLedOn(Adapter, pLed); break; case LED_CTL_LINK: case LED_CTL_NO_LINK: if (IS_HARDWARE_TYPE_8812AU(Adapter)) SwLedOn(Adapter, pLed); break; case LED_CTL_TX: case LED_CTL_RX: if(pLed->bLedBlinkInProgress ==_FALSE) { pLed->bLedBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_TXRX; pLed->BlinkTimes = 2; if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; if (IS_HARDWARE_TYPE_8812AU(Adapter)) _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); else _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } else { pLed->BlinkingLedState = RTW_LED_ON; if (IS_HARDWARE_TYPE_8812AU(Adapter)) _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); else _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); } } break; default: break; } } // Maddest add for Dlink VOID SwLedControlMode15( IN PADAPTER Adapter, IN LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = &(Adapter->ledpriv); struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; PLED_USB pLed = &(ledpriv->SwLed0); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led control mode 15 CurrLedState %d, LedAction %d\n", pLed->CurrLedState,LedAction)); switch(LedAction) { case LED_CTL_START_WPS: //wait until xinpin finish case LED_CTL_START_WPS_BOTTON: RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led control mode 15 LED_CTL_START_WPS\n")); if(pLed->bLedWPSBlinkInProgress ==_FALSE) { if(pLed->bLedBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if(pLed->bLedScanBlinkInProgress ==_TRUE) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } pLed->bLedWPSBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_WPS; if( pLed->bLedOn ) { pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), LED_WPS_BLINK_OFF_INTERVAL_NETGEAR); } else { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_WPS_BLINK_ON_INTERVAL_NETGEAR); } } break; case LED_CTL_STOP_WPS: RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led control mode 15 LED_CTL_STOP_WPS\n")); if(pLed->bLedWPSBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); } pLed->CurrLedState = LED_BLINK_WPS_STOP; //if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) { pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), 0); } break; case LED_CTL_STOP_WPS_FAIL: case LED_CTL_STOP_WPS_FAIL_OVERLAP: //WPS session overlap RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led control mode 15 LED_CTL_STOP_WPS_FAIL\n")); if(pLed->bLedWPSBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedWPSBlinkInProgress = _FALSE; } pLed->CurrLedState = RTW_LED_OFF; pLed->BlinkingLedState = RTW_LED_OFF; _set_timer(&(pLed->BlinkTimer), 0); break; case LED_CTL_NO_LINK: RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led control mode 15 LED_CTL_NO_LINK\n")); if(pLed->bLedWPSBlinkInProgress) { return; } /*if(Adapter->securitypriv.dot11PrivacyAlgrthm > _NO_PRIVACY_) { if(SecIsTxKeyInstalled(Adapter, pMgntInfo->Bssid)) { } else { if(pMgntInfo->LEDAssocState ==LED_ASSOC_SECURITY_BEGIN) return; } }*/ if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } if( pLed->bLedScanBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedScanBlinkInProgress = _FALSE; } //if(!IS_LED_BLINKING(pLed)) { pLed->CurrLedState = LED_BLINK_NO_LINK; pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), 30); } break; case LED_CTL_LINK: RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led control mode 15 LED_CTL_LINK\n")); if(pLed->bLedWPSBlinkInProgress) { return; } if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->CurrLedState = LED_BLINK_LINK_IDEL; pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), 30); break; case LED_CTL_SITE_SURVEY : if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) return; if(pLed->bLedWPSBlinkInProgress ==_TRUE) return; if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->CurrLedState = LED_BLINK_SCAN; pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), 0); break; case LED_CTL_TX: case LED_CTL_RX: if(pLed->bLedWPSBlinkInProgress) { return; } if( pLed->bLedBlinkInProgress) { _cancel_timer_ex(&(pLed->BlinkTimer)); pLed->bLedBlinkInProgress = _FALSE; } pLed->bLedBlinkInProgress = _TRUE; pLed->CurrLedState = LED_BLINK_TXRX; pLed->BlinkTimes = 2; if( pLed->bLedOn ) pLed->BlinkingLedState = RTW_LED_OFF; else pLed->BlinkingLedState = RTW_LED_ON; _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); break; default: break; } } void LedControlUSB( _adapter *padapter, LED_CTL_MODE LedAction ) { struct led_priv *ledpriv = &(padapter->ledpriv); #if(MP_DRIVER == 1) if (padapter->registrypriv.mp_mode == 1) return; #endif if( (padapter->bSurpriseRemoved == _TRUE) ||(padapter->hw_init_completed == _FALSE) ) { return; } if( ledpriv->bRegUseLed == _FALSE) return; //if(priv->bInHctTest) // return; #ifdef CONFIG_CONCURRENT_MODE // Only do led action for PRIMARY_ADAPTER if (padapter->adapter_type != PRIMARY_ADAPTER) return; #endif if( (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) && (LedAction == LED_CTL_TX || LedAction == LED_CTL_RX || LedAction == LED_CTL_SITE_SURVEY || LedAction == LED_CTL_LINK || LedAction == LED_CTL_NO_LINK || LedAction == LED_CTL_POWER_ON) ) { return; } switch(ledpriv->LedStrategy) { case SW_LED_MODE0: SwLedControlMode0(padapter, LedAction); break; case SW_LED_MODE1: SwLedControlMode1(padapter, LedAction); break; case SW_LED_MODE2: SwLedControlMode2(padapter, LedAction); break; case SW_LED_MODE3: SwLedControlMode3(padapter, LedAction); break; case SW_LED_MODE4: SwLedControlMode4(padapter, LedAction); break; case SW_LED_MODE5: SwLedControlMode5(padapter, LedAction); break; case SW_LED_MODE6: SwLedControlMode6(padapter, LedAction); break; case SW_LED_MODE7: SwLedControlMode7(padapter, LedAction); break; case SW_LED_MODE8: SwLedControlMode8(padapter, LedAction); break; case SW_LED_MODE9: SwLedControlMode9(padapter, LedAction); break; case SW_LED_MODE10: SwLedControlMode10(padapter, LedAction); break; case SW_LED_MODE11: SwLedControlMode11(padapter, LedAction); break; case SW_LED_MODE12: SwLedControlMode12(padapter, LedAction); break; case SW_LED_MODE13: SwLedControlMode13(padapter, LedAction); break; case SW_LED_MODE14: SwLedControlMode14(padapter, LedAction); break; case SW_LED_MODE15: SwLedControlMode15(padapter, LedAction); break; default: break; } RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("LedStrategy:%d, LedAction %d\n", ledpriv->LedStrategy,LedAction)); } // // Description: // Reset status of LED_871x object. // void ResetLedStatus(PLED_USB pLed) { pLed->CurrLedState = RTW_LED_OFF; // Current LED state. pLed->bLedOn = _FALSE; // true if LED is ON, false if LED is OFF. pLed->bLedBlinkInProgress = _FALSE; // true if it is blinking, false o.w.. pLed->bLedWPSBlinkInProgress = _FALSE; pLed->BlinkTimes = 0; // Number of times to toggle led state for blinking. pLed->BlinkCounter = 0; pLed->BlinkingLedState = LED_UNKNOWN; // Next state for blinking, either RTW_LED_ON or RTW_LED_OFF are. pLed->bLedNoLinkBlinkInProgress = _FALSE; pLed->bLedLinkBlinkInProgress = _FALSE; pLed->bLedStartToLinkBlinkInProgress = _FALSE; pLed->bLedScanBlinkInProgress = _FALSE; } // // Description: // Initialize an LED_871x object. // void InitLed( _adapter *padapter, PLED_USB pLed, LED_PIN LedPin ) { pLed->padapter = padapter; pLed->LedPin = LedPin; ResetLedStatus(pLed); _init_timer(&(pLed->BlinkTimer), padapter->pnetdev, BlinkTimerCallback, pLed); _init_workitem(&(pLed->BlinkWorkItem), BlinkWorkItemCallback, pLed); } // // Description: // DeInitialize an LED_871x object. // void DeInitLed( PLED_USB pLed ) { _cancel_workitem_sync(&(pLed->BlinkWorkItem)); _cancel_timer_ex(&(pLed->BlinkTimer)); ResetLedStatus(pLed); } rtl8812au-4.3.8.12175.20140902+dfsg/hal/rtl8812a/000077500000000000000000000000001261122257400175305ustar00rootroot00000000000000rtl8812au-4.3.8.12175.20140902+dfsg/hal/rtl8812a/Hal8812PwrSeq.c000066400000000000000000000057471261122257400221020ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include "Hal8812PwrSeq.h" #include /* drivers should parse below arrays and do the corresponding actions */ //3 Power on Array WLAN_PWR_CFG rtl8812_power_on_flow[RTL8812_TRANS_CARDEMU_TO_ACT_STEPS+RTL8812_TRANS_END_STEPS]= { RTL8812_TRANS_CARDEMU_TO_ACT RTL8812_TRANS_END }; //3Radio off GPIO Array WLAN_PWR_CFG rtl8812_radio_off_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_END_STEPS]= { RTL8812_TRANS_ACT_TO_CARDEMU RTL8812_TRANS_END }; //3Card Disable Array WLAN_PWR_CFG rtl8812_card_disable_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_PDN_STEPS+RTL8812_TRANS_END_STEPS]= { RTL8812_TRANS_ACT_TO_CARDEMU RTL8812_TRANS_CARDEMU_TO_CARDDIS RTL8812_TRANS_END }; //3 Card Enable Array WLAN_PWR_CFG rtl8812_card_enable_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_PDN_STEPS+RTL8812_TRANS_END_STEPS]= { RTL8812_TRANS_CARDDIS_TO_CARDEMU RTL8812_TRANS_CARDEMU_TO_ACT RTL8812_TRANS_END }; //3Suspend Array WLAN_PWR_CFG rtl8812_suspend_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_SUS_STEPS+RTL8812_TRANS_END_STEPS]= { RTL8812_TRANS_ACT_TO_CARDEMU RTL8812_TRANS_CARDEMU_TO_SUS RTL8812_TRANS_END }; //3 Resume Array WLAN_PWR_CFG rtl8812_resume_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_SUS_STEPS+RTL8812_TRANS_END_STEPS]= { RTL8812_TRANS_SUS_TO_CARDEMU RTL8812_TRANS_CARDEMU_TO_ACT RTL8812_TRANS_END }; //3HWPDN Array WLAN_PWR_CFG rtl8812_hwpdn_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_PDN_STEPS+RTL8812_TRANS_END_STEPS]= { RTL8812_TRANS_ACT_TO_CARDEMU RTL8812_TRANS_CARDEMU_TO_PDN RTL8812_TRANS_END }; //3 Enter LPS WLAN_PWR_CFG rtl8812_enter_lps_flow[RTL8812_TRANS_ACT_TO_LPS_STEPS+RTL8812_TRANS_END_STEPS]= { //FW behavior RTL8812_TRANS_ACT_TO_LPS RTL8812_TRANS_END }; //3 Leave LPS WLAN_PWR_CFG rtl8812_leave_lps_flow[RTL8812_TRANS_LPS_TO_ACT_STEPS+RTL8812_TRANS_END_STEPS]= { //FW behavior RTL8812_TRANS_LPS_TO_ACT RTL8812_TRANS_END }; rtl8812au-4.3.8.12175.20140902+dfsg/hal/rtl8812a/Hal8821APwrSeq.c000066400000000000000000000056211261122257400221720ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * ******************************************************************************/ /* Similar file also available at upstream linux under at driver/staging/rtl8723au/hal/Hal8723PwrSeq.c */ #include "Hal8821APwrSeq.h" #include /* drivers should parse below arrays and do the corresponding actions */ //3 Power on Array WLAN_PWR_CFG rtl8821A_power_on_flow[RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8821A_TRANS_END_STEPS]= { RTL8821A_TRANS_CARDEMU_TO_ACT RTL8821A_TRANS_END }; //3Radio off GPIO Array WLAN_PWR_CFG rtl8821A_radio_off_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_END_STEPS]= { RTL8821A_TRANS_ACT_TO_CARDEMU RTL8821A_TRANS_END }; //3Card Disable Array WLAN_PWR_CFG rtl8821A_card_disable_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8821A_TRANS_END_STEPS]= { RTL8821A_TRANS_ACT_TO_CARDEMU RTL8821A_TRANS_CARDEMU_TO_CARDDIS RTL8821A_TRANS_END }; //3 Card Enable Array WLAN_PWR_CFG rtl8821A_card_enable_flow[RTL8821A_TRANS_CARDDIS_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8821A_TRANS_END_STEPS]= { RTL8821A_TRANS_CARDDIS_TO_CARDEMU RTL8821A_TRANS_CARDEMU_TO_ACT RTL8821A_TRANS_END }; //3Suspend Array WLAN_PWR_CFG rtl8821A_suspend_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8821A_TRANS_END_STEPS]= { RTL8821A_TRANS_ACT_TO_CARDEMU RTL8821A_TRANS_CARDEMU_TO_SUS RTL8821A_TRANS_END }; //3 Resume Array WLAN_PWR_CFG rtl8821A_resume_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8821A_TRANS_END_STEPS]= { RTL8821A_TRANS_SUS_TO_CARDEMU RTL8821A_TRANS_CARDEMU_TO_ACT RTL8821A_TRANS_END }; //3HWPDN Array WLAN_PWR_CFG rtl8821A_hwpdn_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8821A_TRANS_END_STEPS]= { RTL8821A_TRANS_ACT_TO_CARDEMU RTL8821A_TRANS_CARDEMU_TO_PDN RTL8821A_TRANS_END }; //3 Enter LPS WLAN_PWR_CFG rtl8821A_enter_lps_flow[RTL8821A_TRANS_ACT_TO_LPS_STEPS+RTL8821A_TRANS_END_STEPS]= { //FW behavior RTL8821A_TRANS_ACT_TO_LPS RTL8821A_TRANS_END }; //3 Leave LPS WLAN_PWR_CFG rtl8821A_leave_lps_flow[RTL8821A_TRANS_LPS_TO_ACT_STEPS+RTL8821A_TRANS_END_STEPS]= { //FW behavior RTL8821A_TRANS_LPS_TO_ACT RTL8821A_TRANS_END }; rtl8812au-4.3.8.12175.20140902+dfsg/hal/rtl8812a/rtl8812a_cmd.c000066400000000000000000002531051261122257400220120ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTL8812A_CMD_C_ //#include #include #include "hal_com_h2c.h" #define CONFIG_H2C_EF #define RTL8812_MAX_H2C_BOX_NUMS 4 #define RTL8812_MAX_CMD_LEN 7 #define RTL8812_MESSAGE_BOX_SIZE 4 #define RTL8812_EX_MESSAGE_BOX_SIZE 4 static u8 _is_fw_read_cmd_down(_adapter* padapter, u8 msgbox_num) { u8 read_down = _FALSE; int retry_cnts = 100; u8 valid; //DBG_8192C(" _is_fw_read_cmd_down ,reg_1cc(%x),msg_box(%d)...\n",rtw_read8(padapter,REG_HMETFR),msgbox_num); do{ valid = rtw_read8(padapter,REG_HMETFR) & BIT(msgbox_num); if(0 == valid ){ read_down = _TRUE; } #ifdef CONFIG_WOWLAN rtw_msleep_os(2); #endif }while( (!read_down) && (retry_cnts--)); return read_down; } /***************************************** * H2C Msg format : * 0x1DF - 0x1D0 *| 31 - 8 | 7-5 4 - 0 | *| h2c_msg |Class_ID CMD_ID | * * Extend 0x1FF - 0x1F0 *|31 - 0 | *|ext_msg| ******************************************/ s32 FillH2CCmd_8812(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer) { u8 h2c_box_num; u32 msgbox_addr; u32 msgbox_ex_addr; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); u8 cmd_idx,ext_cmd_len; u32 h2c_cmd = 0; u32 h2c_cmd_ex = 0; s32 ret = _FAIL; _func_enter_; padapter = GET_PRIMARY_ADAPTER(padapter); pHalData = GET_HAL_DATA(padapter); if(padapter->bFWReady == _FALSE) { //DBG_8192C("FillH2CCmd_8812(): return H2C cmd because fw is not ready\n"); return ret; } _enter_critical_mutex(&(adapter_to_dvobj(padapter)->h2c_fwcmd_mutex), NULL); if (!pCmdBuffer) { goto exit; } if (CmdLen > RTL8812_MAX_CMD_LEN) { goto exit; } if (padapter->bSurpriseRemoved == _TRUE) goto exit; //pay attention to if race condition happened in H2C cmd setting. do{ h2c_box_num = pHalData->LastHMEBoxNum; if(!_is_fw_read_cmd_down(padapter, h2c_box_num)){ DBG_8192C(" fw read cmd failed...\n"); goto exit; } *(u8*)(&h2c_cmd) = ElementID; if(CmdLen<=3) { _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer, CmdLen ); } else{ _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer,3); ext_cmd_len = CmdLen-3; _rtw_memcpy((u8*)(&h2c_cmd_ex), pCmdBuffer+3,ext_cmd_len ); //Write Ext command msgbox_ex_addr = REG_HMEBOX_EXT0_8812 + (h2c_box_num *RTL8812_EX_MESSAGE_BOX_SIZE); #ifdef CONFIG_H2C_EF for(cmd_idx=0;cmd_idxh2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n" // ,pHalData->LastHMEBoxNum ,CmdLen,msgbox_addr,h2c_cmd,msgbox_ex_addr,h2c_cmd_ex); pHalData->LastHMEBoxNum = (h2c_box_num+1) % RTL8812_MAX_H2C_BOX_NUMS; }while(0); ret = _SUCCESS; exit: _exit_critical_mutex(&(adapter_to_dvobj(padapter)->h2c_fwcmd_mutex), NULL); _func_exit_; return ret; } u8 rtl8812_set_rssi_cmd(_adapter*padapter, u8 *param) { u8 res=_SUCCESS; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); _func_enter_; *((u32*) param ) = cpu_to_le32( *((u32*) param ) ); FillH2CCmd_8812(padapter, H2C_8812_RSSI_REPORT, 4, param); _func_exit_; return res; } u8 Get_VHT_ENI( u32 IOTAction, u32 WirelessMode, u32 ratr_bitmap ) { u8 Ret = 0; if(WirelessMode == WIRELESS_11_24AC) { if(ratr_bitmap & 0xfff00000) // Mix , 2SS Ret = 3; else // Mix, 1SS Ret = 2; } else if(WirelessMode == WIRELESS_11_5AC) { Ret = 1; // VHT } return (Ret << 4); } BOOLEAN Get_RA_ShortGI_8812( PADAPTER Adapter, struct sta_info *psta, u8 shortGIrate, u32 ratr_bitmap ) { BOOLEAN bShortGI; struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); bShortGI = shortGIrate; #ifdef CONFIG_80211AC_VHT if( bShortGI && IsSupportedVHT(psta->wireless_mode) && (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP) && TEST_FLAG(psta->vhtpriv.ldpc_cap, LDPC_VHT_ENABLE_TX) ) { if(ratr_bitmap & 0xC0000000) bShortGI = _FALSE; } #endif return bShortGI; } void Set_RA_LDPC_8812( struct sta_info *psta, BOOLEAN bLDPC ) { if(psta == NULL) return; #ifdef CONFIG_80211AC_VHT if(psta->wireless_mode == WIRELESS_11_5AC) { if(bLDPC && TEST_FLAG(psta->vhtpriv.ldpc_cap, LDPC_VHT_CAP_TX)) SET_FLAG(psta->vhtpriv.ldpc_cap, LDPC_VHT_ENABLE_TX); else CLEAR_FLAG(psta->vhtpriv.ldpc_cap, LDPC_VHT_ENABLE_TX); } else if(IsSupportedHT(psta->wireless_mode) || IsSupportedVHT(psta->wireless_mode)) { if(bLDPC && TEST_FLAG(psta->htpriv.ldpc_cap, LDPC_HT_CAP_TX)) SET_FLAG(psta->htpriv.ldpc_cap, LDPC_HT_ENABLE_TX); else CLEAR_FLAG(psta->htpriv.ldpc_cap, LDPC_HT_ENABLE_TX); } update_ldpc_stbc_cap(psta); #endif //DBG_871X("MacId %d bLDPC %d\n", psta->mac_id, bLDPC); } u8 Get_RA_LDPC_8812( struct sta_info *psta ) { u8 bLDPC = 0; if (psta != NULL) { if(psta->mac_id == 1) { bLDPC = 0; } else { #ifdef CONFIG_80211AC_VHT if(IsSupportedVHT(psta->wireless_mode)) { if(TEST_FLAG(psta->vhtpriv.ldpc_cap, LDPC_VHT_CAP_TX)) bLDPC = 1; else bLDPC = 0; } else if(IsSupportedHT(psta->wireless_mode)) { if(TEST_FLAG(psta->htpriv.ldpc_cap, LDPC_HT_CAP_TX)) bLDPC =1; else bLDPC =0; } else #endif bLDPC = 0; } } return (bLDPC << 2); } void rtl8812_set_raid_cmd(PADAPTER padapter, u32 bitmap, u8* arg) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct sta_info *psta; u8 macid, init_rate, raid, shortGIrate=_FALSE; _func_enter_; macid = arg[0]; raid = arg[1]; shortGIrate = arg[2]; init_rate = arg[3]; psta = pmlmeinfo->FW_sta_info[macid].psta; if(psta == NULL) { return; } if(pHalData->fw_ractrl == _TRUE) { u8 H2CCommand[7] ={0}; shortGIrate = Get_RA_ShortGI_8812(padapter, psta, shortGIrate, bitmap); H2CCommand[0] = macid; H2CCommand[1] = (raid & 0x1F) | (shortGIrate?0x80:0x00) ; H2CCommand[2] = (psta->bw_mode & 0x3) |Get_RA_LDPC_8812(psta) |Get_VHT_ENI(0, psta->wireless_mode, bitmap); //DisableTXPowerTraining if(pHalData->bDisableTXPowerTraining){ H2CCommand[2] |= BIT6; DBG_871X("%s,Disable PWT by driver\n",__FUNCTION__); } else{ PDM_ODM_T pDM_OutSrc = &pHalData->odmpriv; if(pDM_OutSrc->bDisablePowerTraining){ H2CCommand[2] |= BIT6; DBG_871X("%s,Disable PWT by DM\n",__FUNCTION__); } } H2CCommand[3] = (u8)(bitmap & 0x000000ff); H2CCommand[4] = (u8)((bitmap & 0x0000ff00) >>8); H2CCommand[5] = (u8)((bitmap & 0x00ff0000) >> 16); H2CCommand[6] = (u8)((bitmap & 0xff000000) >> 24); //DBG_871X("rtl8812_set_raid_cmd, bitmap=0x%x, mac_id=0x%x, raid=0x%x, shortGIrate=%x\n", bitmap, macid, raid, shortGIrate); FillH2CCmd_8812(padapter, H2C_8812_RA_MASK, 7, H2CCommand); } if (shortGIrate==_TRUE) init_rate |= BIT(7); pdmpriv->INIDATA_RATE[macid] = init_rate; _func_exit_; } void rtl8812_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8* arg, u8 rssi_level) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); u8 macid; macid = arg[0]; if(rssi_level != DM_RATR_STA_INIT) bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv, macid, bitmap, rssi_level); rtl8812_set_raid_cmd(pAdapter, bitmap, arg); } void rtl8812_set_FwPwrMode_cmd(PADAPTER padapter, u8 PSMode) { u8 u1H2CSetPwrMode[6]={0}; struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); u8 Mode = 0, RLBM = 0, PowerState = 0, LPSAwakeIntvl = 2, pwrModeByte5 = 0; _func_enter_; DBG_871X("%s: Mode=%d SmartPS=%d UAPSD=%d\n", __FUNCTION__, PSMode, pwrpriv->smart_ps, padapter->registrypriv.uapsd_enable); switch(PSMode) { case PS_MODE_ACTIVE: Mode = 0; break; case PS_MODE_MIN: Mode = 1; break; case PS_MODE_MAX: RLBM = 1; Mode = 1; break; case PS_MODE_DTIM: RLBM = 2; Mode = 1; break; case PS_MODE_UAPSD_WMM: Mode = 2; break; default: Mode = 0; break; } if (Mode > PS_MODE_ACTIVE) { #ifdef CONFIG_BT_COEXIST if ((rtw_btcoex_IsBtControlLps(padapter) == _TRUE)) { PowerState = rtw_btcoex_RpwmVal(padapter); pwrModeByte5 = rtw_btcoex_LpsVal(padapter); } else #endif // CONFIG_BT_COEXIST { PowerState = 0x00;// AllON(0x0C), RFON(0x04), RFOFF(0x00) pwrModeByte5 = 0x40; } #ifdef CONFIG_EXT_CLK Mode |= BIT(7);//supporting 26M XTAL CLK_Request feature. #endif //CONFIG_EXT_CLK } else { PowerState = 0x0C;// AllON(0x0C), RFON(0x04), RFOFF(0x00) pwrModeByte5 = 0x40; } // 0: Active, 1: LPS, 2: WMMPS SET_8812_H2CCMD_PWRMODE_PARM_MODE(u1H2CSetPwrMode, Mode); // 0:Min, 1:Max , 2:User define SET_8812_H2CCMD_PWRMODE_PARM_RLBM(u1H2CSetPwrMode, RLBM); // (LPS) smart_ps: 0: PS_Poll, 1: PS_Poll , 2: NullData // (WMM)smart_ps: 0:PS_Poll, 1:NullData SET_8812_H2CCMD_PWRMODE_PARM_SMART_PS(u1H2CSetPwrMode, pwrpriv->smart_ps); // AwakeInterval: Unit is beacon interval, this field is only valid in PS_DTIM mode SET_8812_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(u1H2CSetPwrMode, LPSAwakeIntvl); // (WMM only)bAllQueueUAPSD SET_8812_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(u1H2CSetPwrMode, padapter->registrypriv.uapsd_enable); // AllON(0x0C), RFON(0x04), RFOFF(0x00) SET_8812_H2CCMD_PWRMODE_PARM_PWR_STATE(u1H2CSetPwrMode, PowerState); SET_8812_H2CCMD_PWRMODE_PARM_BYTE5(u1H2CSetPwrMode, pwrModeByte5); #ifdef CONFIG_BT_COEXIST rtw_btcoex_RecordPwrMode(padapter, u1H2CSetPwrMode, sizeof(u1H2CSetPwrMode)); #endif // CONFIG_BT_COEXIST //DBG_871X("u1H2CSetPwrMode="MAC_FMT"\n", MAC_ARG(u1H2CSetPwrMode)); FillH2CCmd_8812(padapter, H2C_8812_SETPWRMODE, sizeof(u1H2CSetPwrMode), u1H2CSetPwrMode); _func_exit_; } void rtl8812_set_FwMediaStatus_cmd(PADAPTER padapter, u16 mstatus_rpt ) { u8 u1JoinBssRptParm[3]={0}; u8 mstatus, macId, macId_Ind = 0, macId_End = 0; mstatus = (u8) (mstatus_rpt & 0xFF); macId = (u8)(mstatus_rpt >> 8) ; SET_8812_H2CCMD_MSRRPT_PARM_OPMODE(u1JoinBssRptParm, mstatus); SET_8812_H2CCMD_MSRRPT_PARM_MACID_IND(u1JoinBssRptParm, macId_Ind); SET_8812_H2CCMD_MSRRPT_PARM_MACID(u1JoinBssRptParm, macId); SET_8812_H2CCMD_MSRRPT_PARM_MACID_END(u1JoinBssRptParm, macId_End); DBG_871X("[MacId], Set MacId Ctrl(original) = 0x%x \n", u1JoinBssRptParm[0]<<16|u1JoinBssRptParm[1]<<8|u1JoinBssRptParm[2]); FillH2CCmd_8812(padapter, H2C_8812_MSRRPT, 3, u1JoinBssRptParm); } void ConstructBeacon(_adapter *padapter, u8 *pframe, u32 *pLength) { struct rtw_ieee80211_hdr *pwlanhdr; u16 *fctrl; u32 rate_len, pktlen; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; //DBG_871X("%s\n", __FUNCTION__); pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); //pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_BEACON); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); //timestamp will be inserted by hardware pframe += 8; pktlen += 8; // beacon interval: 2 bytes _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); pframe += 2; pktlen += 2; // capability info: 2 bytes _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); pframe += 2; pktlen += 2; if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { //DBG_871X("ie len=%d\n", cur_network->IELength); pktlen += cur_network->IELength - sizeof(NDIS_802_11_FIXED_IEs); _rtw_memcpy(pframe, cur_network->IEs+sizeof(NDIS_802_11_FIXED_IEs), pktlen); goto _ConstructBeacon; } //below for ad-hoc mode // SSID pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen); // supported rates... rate_len = rtw_get_rateset_len(cur_network->SupportedRates); pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pktlen); // DS parameter set pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen); if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) { u32 ATIMWindow; // IBSS Parameter Set... //ATIMWindow = cur->Configuration.ATIMWindow; ATIMWindow = 0; pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen); } //todo: ERP IE // EXTERNDED SUPPORTED RATE if (rate_len > 8) { pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen); } //todo:HT for adhoc _ConstructBeacon: if ((pktlen + TXDESC_SIZE) > 512) { DBG_871X("beacon frame too large\n"); return; } *pLength = pktlen; //DBG_871X("%s bcn_sz=%d\n", __FUNCTION__, pktlen); } void ConstructPSPoll(_adapter *padapter, u8 *pframe, u32 *pLength) { struct rtw_ieee80211_hdr *pwlanhdr; u16 *fctrl; u32 pktlen; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); //DBG_871X("%s\n", __FUNCTION__); pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; // Frame control. fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; SetPwrMgt(fctrl); SetFrameSubType(pframe, WIFI_PSPOLL); // AID. SetDuration(pframe, (pmlmeinfo->aid | 0xc000)); // BSSID. _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); // TA. _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); *pLength = 16; } void ConstructNullFunctionData( PADAPTER padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, u8 bQoS, u8 AC, u8 bEosp, u8 bForcePowerSave) { struct rtw_ieee80211_hdr *pwlanhdr; u16 *fctrl; u32 pktlen; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wlan_network *cur_network = &pmlmepriv->cur_network; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); //DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave); pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; fctrl = &pwlanhdr->frame_ctl; *(fctrl) = 0; if (bForcePowerSave) { SetPwrMgt(fctrl); } switch(cur_network->network.InfrastructureMode) { case Ndis802_11Infrastructure: SetToDs(fctrl); _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN); break; case Ndis802_11APMode: SetFrDs(fctrl); _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); break; case Ndis802_11IBSS: default: _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); break; } SetSeqNum(pwlanhdr, 0); if (bQoS == _TRUE) { struct rtw_ieee80211_hdr_3addr_qos *pwlanqoshdr; SetFrameSubType(pframe, WIFI_QOS_DATA_NULL); pwlanqoshdr = (struct rtw_ieee80211_hdr_3addr_qos*)pframe; SetPriority(&pwlanqoshdr->qc, AC); SetEOSP(&pwlanqoshdr->qc, bEosp); pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos); } else { SetFrameSubType(pframe, WIFI_DATA_NULL); pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); } *pLength = pktlen; } void ConstructProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bHideSSID) { struct rtw_ieee80211_hdr *pwlanhdr; u16 *fctrl; u8 *mac, *bssid; u32 pktlen; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); //DBG_871X("%s\n", __FUNCTION__); pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; mac = myid(&(padapter->eeprompriv)); bssid = cur_network->MacAddress; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); SetSeqNum(pwlanhdr, 0); SetFrameSubType(fctrl, WIFI_PROBERSP); pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); pframe += pktlen; if(cur_network->IELength>MAX_IE_SZ) return; _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); pframe += cur_network->IELength; pktlen += cur_network->IELength; *pLength = pktlen; } #ifdef CONFIG_GTK_OL static void ConstructGTKResponse( PADAPTER padapter, u8 *pframe, u32 *pLength ) { struct rtw_ieee80211_hdr *pwlanhdr; u16 *fctrl; u32 pktlen; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wlan_network *cur_network = &pmlmepriv->cur_network; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct security_priv *psecuritypriv = &padapter->securitypriv; static u8 LLCHeader[8] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00, 0x88, 0x8E}; static u8 GTKbody_a[11] ={0x01, 0x03, 0x00, 0x5F, 0x02, 0x03, 0x12, 0x00, 0x10, 0x42, 0x0B}; u8 *pGTKRspPkt = pframe; u8 EncryptionHeadOverhead = 0; //DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave); pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; fctrl = &pwlanhdr->frame_ctl; *(fctrl) = 0; //------------------------------------------------------------------------- // MAC Header. //------------------------------------------------------------------------- SetFrameType(fctrl, WIFI_DATA); //SetFrameSubType(fctrl, 0); SetToDs(fctrl); _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); SetSeqNum(pwlanhdr, 0); SetDuration(pwlanhdr, 0); #ifdef CONFIG_WAPI_SUPPORT *pLength = sMacHdrLng; #else *pLength = 24; #endif //CONFIG_WAPI_SUPPORT //YJ,del,120503 #if 0 //------------------------------------------------------------------------- // Qos Header: leave space for it if necessary. //------------------------------------------------------------------------- if(pStaQos->CurrentQosMode > QOS_DISABLE) { SET_80211_HDR_QOS_EN(pGTKRspPkt, 1); PlatformZeroMemory(&(Buffer[*pLength]), sQoSCtlLng); *pLength += sQoSCtlLng; } #endif //0 //------------------------------------------------------------------------- // Security Header: leave space for it if necessary. //------------------------------------------------------------------------- #if 1 switch (psecuritypriv->dot11PrivacyAlgrthm) { case _WEP40_: case _WEP104_: EncryptionHeadOverhead = 4; break; case _TKIP_: EncryptionHeadOverhead = 8; break; case _AES_: EncryptionHeadOverhead = 8; break; #ifdef CONFIG_WAPI_SUPPORT case _SMS4_: EncryptionHeadOverhead = 18; break; #endif //CONFIG_WAPI_SUPPORT default: EncryptionHeadOverhead = 0; } if(EncryptionHeadOverhead > 0) { _rtw_memset(&(pframe[*pLength]), 0,EncryptionHeadOverhead); *pLength += EncryptionHeadOverhead; //SET_80211_HDR_WEP(pGTKRspPkt, 1); //Suggested by CCW. //GTK's privacy bit is done by FW //SetPrivacy(fctrl); } #endif //1 //------------------------------------------------------------------------- // Frame Body. //------------------------------------------------------------------------- pGTKRspPkt = (u8*)(pframe+ *pLength); // LLC header _rtw_memcpy(pGTKRspPkt, LLCHeader, 8); *pLength += 8; // GTK element pGTKRspPkt += 8; //GTK frame body after LLC, part 1 _rtw_memcpy(pGTKRspPkt, GTKbody_a, 11); *pLength += 11; pGTKRspPkt += 11; //GTK frame body after LLC, part 2 _rtw_memset(&(pframe[*pLength]), 0, 88); *pLength += 88; pGTKRspPkt += 88; } #endif //CONFIG_GTK_OL // To check if reserved page content is destroyed by beacon beacuse beacon is too large. // 2010.06.23. Added by tynli. VOID CheckFwRsvdPageContent( IN PADAPTER Adapter ) { HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter); u32 MaxBcnPageNum; if(pHalData->FwRsvdPageStartOffset != 0) { /*MaxBcnPageNum = PageNum_128(pMgntInfo->MaxBeaconSize); RT_ASSERT((MaxBcnPageNum <= pHalData->FwRsvdPageStartOffset), ("CheckFwRsvdPageContent(): The reserved page content has been"\ "destroyed by beacon!!! MaxBcnPageNum(%d) FwRsvdPageStartOffset(%d)\n!", MaxBcnPageNum, pHalData->FwRsvdPageStartOffset));*/ } } // // Description: Get the reserved page number in Tx packet buffer. // Retrun value: the page number. // 2012.08.09, by tynli. // u8 GetTxBufferRsvdPageNum8812( IN PADAPTER Adapter, IN BOOLEAN bWoWLANBoundary ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u8 RsvdPageNum=0; u8 TxPageBndy= LAST_ENTRY_OF_TX_PKT_BUFFER_8812; // default reseved 1 page for the IC type which is undefined. if(bWoWLANBoundary) { rtw_hal_get_def_var(Adapter, HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN, (u8 *)&TxPageBndy); } else { rtw_hal_get_def_var(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&TxPageBndy); } RsvdPageNum = LAST_ENTRY_OF_TX_PKT_BUFFER_8812 -TxPageBndy + 1; return RsvdPageNum; } // // Description: Fill the reserved packets that FW will use to RSVD page. // Now we just send 4 types packet to rsvd page. // (1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp. // Input: // bDLFinished - FALSE: At the first time we will send all the packets as a large packet to Hw, // so we need to set the packet length to total lengh. // TRUE: At the second time, we should send the first packet (default:beacon) // to Hw again and set the lengh in descriptor to the real beacon lengh. // 2009.10.15 by tynli. static void SetFwRsvdPagePkt_8812(PADAPTER padapter, BOOLEAN bDLFinished) { PHAL_DATA_TYPE pHalData; struct xmit_frame *pcmdframe; struct pkt_attrib *pattrib; struct xmit_priv *pxmitpriv; struct mlme_ext_priv *pmlmeext; struct mlme_ext_info *pmlmeinfo; u32 PSPollLength, NullFunctionDataLength, QosNullLength; u32 BcnLen; u8 TotalPageNum=0, CurtPktPageNum=0, TxDescLen=0, RsvdPageNum=0; u8 *ReservedPagePacket; u8 RsvdPageLoc[5] = {0}; u16 BufIndex=0, PageSize = 256; u32 TotalPacketLen, MaxRsvdPageBufSize=0;; //DBG_871X("%s\n", __FUNCTION__); pHalData = GET_HAL_DATA(padapter); pxmitpriv = &padapter->xmitpriv; pmlmeext = &padapter->mlmeextpriv; pmlmeinfo = &pmlmeext->mlmext_info; if(IS_HARDWARE_TYPE_8812(padapter)) PageSize = 512; else if (IS_HARDWARE_TYPE_8821(padapter)) PageSize = PAGE_SIZE_TX_8821A; // The function SetFwRsvdPagePkt_8812() input must be added a value "bDLWholePackets" to // decide if download wowlan packets, and use "bDLWholePackets" to be GetTxBufferRsvdPageNum8812() 2nd input value. RsvdPageNum = GetTxBufferRsvdPageNum8812(padapter, _FALSE); MaxRsvdPageBufSize = RsvdPageNum*PageSize; pcmdframe = rtw_alloc_cmdxmitframe(pxmitpriv); if (pcmdframe == NULL) { return; } ReservedPagePacket = pcmdframe->buf_addr; TxDescLen = TXDESC_SIZE;//The desc lengh in Tx packet buffer of 8812A is 40 bytes. //(1) beacon BufIndex = TXDESC_OFFSET; ConstructBeacon(padapter, &ReservedPagePacket[BufIndex], &BcnLen); // When we count the first page size, we need to reserve description size for the RSVD // packet, it will be filled in front of the packet in TXPKTBUF. CurtPktPageNum = (u8)PageNum(BcnLen+TxDescLen, PageSize); if(bDLFinished) { TotalPageNum += CurtPktPageNum; TotalPacketLen = (TotalPageNum*PageSize); DBG_871X("%s(): Beacon page size = %d\n",__FUNCTION__,TotalPageNum); } else { TotalPageNum += CurtPktPageNum; pHalData->FwRsvdPageStartOffset = TotalPageNum; BufIndex += (CurtPktPageNum*PageSize); if(BufIndex > MaxRsvdPageBufSize) { DBG_871X("%s(): Beacon: The rsvd page size is not enough!!BufIndex %d, MaxRsvdPageBufSize %d\n",__FUNCTION__, BufIndex,MaxRsvdPageBufSize); goto error; } //(2) ps-poll ConstructPSPoll(padapter, &ReservedPagePacket[BufIndex], &PSPollLength); rtl8812a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], PSPollLength, _TRUE, _FALSE, _FALSE); SET_8812_H2CCMD_RSVDPAGE_LOC_PSPOLL(RsvdPageLoc, TotalPageNum); //DBG_871X("SetFwRsvdPagePkt_8812(): HW_VAR_SET_TX_CMD: PS-POLL %p %d\n", // &ReservedPagePacket[BufIndex-TxDescLen], (PSPollLength+TxDescLen)); CurtPktPageNum = (u8)PageNum(PSPollLength+TxDescLen, PageSize); BufIndex += (CurtPktPageNum*PageSize); TotalPageNum += CurtPktPageNum; if(BufIndex > MaxRsvdPageBufSize) { DBG_871X("%s(): ps-poll: The rsvd page size is not enough!!BufIndex %d, MaxRsvdPageBufSize %d\n",__FUNCTION__, BufIndex,MaxRsvdPageBufSize); goto error; } //(3) null data ConstructNullFunctionData( padapter, &ReservedPagePacket[BufIndex], &NullFunctionDataLength, get_my_bssid(&pmlmeinfo->network), _FALSE, 0, 0, _FALSE); rtl8812a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], NullFunctionDataLength, _FALSE, _FALSE, _FALSE); SET_8812_H2CCMD_RSVDPAGE_LOC_NULL_DATA(RsvdPageLoc, TotalPageNum); //DBG_871X("SetFwRsvdPagePkt_8812(): HW_VAR_SET_TX_CMD: NULL DATA %p %d\n", // &ReservedPagePacket[BufIndex-TxDescLen], (NullFunctionDataLength+TxDescLen)); CurtPktPageNum = (u8)PageNum(NullFunctionDataLength+TxDescLen, PageSize); BufIndex += (CurtPktPageNum*PageSize); TotalPageNum += CurtPktPageNum; if(BufIndex > MaxRsvdPageBufSize) { DBG_871X("%s(): Null-data: The rsvd page size is not enough!!BufIndex %d, MaxRsvdPageBufSize %d\n",__FUNCTION__, BufIndex,MaxRsvdPageBufSize); goto error; } //(5) Qos null data ConstructNullFunctionData( padapter, &ReservedPagePacket[BufIndex], &QosNullLength, get_my_bssid(&pmlmeinfo->network), _TRUE, 0, 0, _FALSE); rtl8812a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], QosNullLength, _FALSE, _FALSE, _FALSE); SET_8812_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(RsvdPageLoc, TotalPageNum); //DBG_871X("SetFwRsvdPagePkt_8812(): HW_VAR_SET_TX_CMD: QOS NULL DATA %p %d\n", // &ReservedPagePacket[BufIndex-TxDescLen], (QosNullLength+TxDescLen)); CurtPktPageNum = (u8)PageNum(QosNullLength+TxDescLen, PageSize); BufIndex += (CurtPktPageNum*PageSize); TotalPageNum += CurtPktPageNum; TotalPacketLen = (TotalPageNum * PageSize); } if(TotalPacketLen > MaxRsvdPageBufSize) { DBG_871X("%s(): ERROR: The rsvd page size is not enough!!TotalPacketLen %d, MaxRsvdPageBufSize %d\n",__FUNCTION__, TotalPacketLen,MaxRsvdPageBufSize); goto error; } else { // update attribute pattrib = &pcmdframe->attrib; update_mgntframe_attrib(padapter, pattrib); pattrib->qsel = QSLT_BEACON; pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TxDescLen; #ifdef CONFIG_PCI_HCI dump_mgntframe(padapter, pcmdframe); #else dump_mgntframe_and_wait(padapter, pcmdframe, 100); #endif } if(!bDLFinished) { DBG_871X("%s: Set RSVD page location to Fw ,TotalPacketLen(%d), TotalPageNum(%d)\n", __FUNCTION__,TotalPacketLen,TotalPageNum); FillH2CCmd_8812(padapter, H2C_8812_RSVDPAGE, 5, RsvdPageLoc); } return; error: rtw_free_xmitframe(pxmitpriv, pcmdframe); } void rtl8812_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); BOOLEAN bSendBeacon=_FALSE; BOOLEAN bcn_valid = _FALSE; u8 DLBcnCount=0; u32 poll = 0; _func_enter_; DBG_871X("%s mstatus(%x)\n", __FUNCTION__,mstatus); if(mstatus == 1) { // We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. // Suggested by filen. Added by tynli. rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid)); // Do not set TSF again here or vWiFi beacon DMA INT will not work. //correct_TSF(padapter, pmlmeext); // Hw sequende enable by dedault. 2010.06.23. by tynli. //rtw_write16(padapter, REG_NQOS_SEQ, ((pmlmeext->mgnt_seq+100)&0xFFF)); //rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); //Set REG_CR bit 8. DMA beacon by SW. pHalData->RegCR_1 |= BIT0; rtw_write8(padapter, REG_CR+1, pHalData->RegCR_1); // Disable Hw protection for a time which revserd for Hw sending beacon. // Fix download reserved page packet fail that access collision with the protection time. // 2010.05.11. Added by tynli. //SetBcnCtrlReg(padapter, 0, BIT3); //SetBcnCtrlReg(padapter, BIT4, 0); rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(3))); rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)); if(pHalData->RegFwHwTxQCtrl&BIT6) { DBG_871X("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n"); bSendBeacon = _TRUE; } // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl&(~BIT6))); pHalData->RegFwHwTxQCtrl &= (~BIT6); // Clear beacon valid check bit. rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); DLBcnCount = 0; poll = 0; do { // download rsvd page. SetFwRsvdPagePkt_8812(padapter, _FALSE); DLBcnCount++; do { rtw_yield_os(); //rtw_mdelay_os(10); // check rsvd page download OK. rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid)); poll++; } while(!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); }while(!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); //RT_ASSERT(bcn_valid, ("HalDownloadRSVDPage88ES(): 1 Download RSVD page failed!\n")); if(padapter->bSurpriseRemoved || padapter->bDriverStopped) { } else if(!bcn_valid) DBG_871X(ADPT_FMT": 1 DL RSVD page failed! DLBcnCount:%u, poll:%u\n", ADPT_ARG(padapter) ,DLBcnCount, poll); else { struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); pwrctl->fw_psmode_iface_id = padapter->iface_id; DBG_871X(ADPT_FMT": 1 DL RSVD page success! DLBcnCount:%u, poll:%u\n", ADPT_ARG(padapter), DLBcnCount, poll); } // // We just can send the reserved page twice during the time that Tx thread is stopped (e.g. pnpsetpower) // becuase we need to free the Tx BCN Desc which is used by the first reserved page packet. // At run time, we cannot get the Tx Desc until it is released in TxHandleInterrupt() so we will return // the beacon TCB in the following code. 2011.11.23. by tynli. // //if(bcn_valid && padapter->bEnterPnpSleep) if(0) { if(bSendBeacon) { rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); DLBcnCount = 0; poll = 0; do { SetFwRsvdPagePkt_8812(padapter, _TRUE); DLBcnCount++; do { rtw_yield_os(); //rtw_mdelay_os(10); // check rsvd page download OK. rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid)); poll++; } while(!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); }while(!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); //RT_ASSERT(bcn_valid, ("HalDownloadRSVDPage(): 2 Download RSVD page failed!\n")); if(padapter->bSurpriseRemoved || padapter->bDriverStopped) { } else if(!bcn_valid) DBG_871X("%s: 2 Download RSVD page failed! DLBcnCount:%u, poll:%u\n", __FUNCTION__ ,DLBcnCount, poll); else DBG_871X("%s: 2 Download RSVD success! DLBcnCount:%u, poll:%u\n", __FUNCTION__, DLBcnCount, poll); } } // Enable Bcn //SetBcnCtrlReg(padapter, BIT3, 0); //SetBcnCtrlReg(padapter, 0, BIT4); rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(3)); rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(4))); // To make sure that if there exists an adapter which would like to send beacon. // If exists, the origianl value of 0x422[6] will be 1, we should check this to // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause // the beacon cannot be sent by HW. // 2010.06.23. Added by tynli. if(bSendBeacon) { rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl|BIT6)); pHalData->RegFwHwTxQCtrl |= BIT6; } // // Update RSVD page location H2C to Fw. // if(bcn_valid) { rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); DBG_871X("Set RSVD page location to Fw.\n"); //FillH2CCmd88E(Adapter, H2C_88E_RSVDPAGE, H2C_RSVDPAGE_LOC_LENGTH, pMgntInfo->u1RsvdPageLoc); } // Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. //if(!padapter->bEnterPnpSleep) { // Clear CR[8] or beacon packet will not be send to TxBuf anymore. pHalData->RegCR_1 &= (~BIT0); rtw_write8(padapter, REG_CR+1, pHalData->RegCR_1); } } #ifdef CONFIG_WOWLAN if (adapter_to_pwrctl(padapter)->wowlan_mode){ u16 media_status; media_status = mstatus; rtl8812_set_FwMediaStatus_cmd(padapter, media_status); DBG_871X_LEVEL(_drv_info_, "%s wowlan_mode is on\n", __func__); } else { DBG_871X_LEVEL(_drv_info_, "%s wowlan_mode is off\n", __func__); } #endif //CONFIG_WOWLAN _func_exit_; } #ifdef CONFIG_P2P_PS void rtl8812_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); u8 *p2p_ps_offload = (u8 *)&pHalData->p2p_ps_offload; u8 i; _func_enter_; #if 1 switch(p2p_ps_state) { case P2P_PS_DISABLE: DBG_8192C("P2P_PS_DISABLE \n"); _rtw_memset(p2p_ps_offload, 0, 1); break; case P2P_PS_ENABLE: DBG_8192C("P2P_PS_ENABLE \n"); // update CTWindow value. if( pwdinfo->ctwindow > 0 ) { SET_8812_H2CCMD_P2P_PS_OFFLOAD_CTWINDOW_EN(p2p_ps_offload, 1); rtw_write8(padapter, REG_P2P_CTWIN, pwdinfo->ctwindow); } // hw only support 2 set of NoA for( i=0 ; inoa_num ; i++) { // To control the register setting for which NOA rtw_write8(padapter, REG_NOA_DESC_SEL, (i << 4)); if(i == 0) { SET_8812_H2CCMD_P2P_PS_OFFLOAD_NOA0_EN(p2p_ps_offload, 1); } else { SET_8812_H2CCMD_P2P_PS_OFFLOAD_NOA1_EN(p2p_ps_offload, 1); } // config P2P NoA Descriptor Register //DBG_8192C("%s(): noa_duration = %x\n",__FUNCTION__,pwdinfo->noa_duration[i]); rtw_write32(padapter, REG_NOA_DESC_DURATION, pwdinfo->noa_duration[i]); //DBG_8192C("%s(): noa_interval = %x\n",__FUNCTION__,pwdinfo->noa_interval[i]); rtw_write32(padapter, REG_NOA_DESC_INTERVAL, pwdinfo->noa_interval[i]); //DBG_8192C("%s(): start_time = %x\n",__FUNCTION__,pwdinfo->noa_start_time[i]); rtw_write32(padapter, REG_NOA_DESC_START, pwdinfo->noa_start_time[i]); //DBG_8192C("%s(): noa_count = %x\n",__FUNCTION__,pwdinfo->noa_count[i]); rtw_write8(padapter, REG_NOA_DESC_COUNT, pwdinfo->noa_count[i]); } if( (pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0) ) { // rst p2p circuit rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4)); SET_8812_H2CCMD_P2P_PS_OFFLOAD_ENABLE(p2p_ps_offload, 1); if(pwdinfo->role == P2P_ROLE_GO) { // 1: Owner, 0: Client SET_8812_H2CCMD_P2P_PS_OFFLOAD_ROLE(p2p_ps_offload, 1); SET_8812_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(p2p_ps_offload, 0); } else { // 1: Owner, 0: Client SET_8812_H2CCMD_P2P_PS_OFFLOAD_ROLE(p2p_ps_offload, 0); } SET_8812_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(p2p_ps_offload, 0); } break; case P2P_PS_SCAN: DBG_8192C("P2P_PS_SCAN \n"); SET_8812_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(p2p_ps_offload, 1); break; case P2P_PS_SCAN_DONE: DBG_8192C("P2P_PS_SCAN_DONE \n"); SET_8812_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(p2p_ps_offload, 0); pwdinfo->p2p_ps_state = P2P_PS_ENABLE; break; default: break; } DBG_871X("P2P_PS_OFFLOAD : %x\n", p2p_ps_offload[0]); FillH2CCmd_8812(padapter, H2C_8812_P2P_PS_OFFLOAD, 1, p2p_ps_offload); #endif _func_exit_; } #endif //CONFIG_P2P #ifdef CONFIG_TSF_RESET_OFFLOAD /* ask FW to Reset sync register at Beacon early interrupt */ u8 rtl8812_reset_tsf(_adapter *padapter, u8 reset_port ) { u8 buf[2]; u8 res=_SUCCESS; s32 ret; _func_enter_; if (IFACE_PORT0==reset_port) { buf[0] = 0x1; buf[1] = 0; } else{ buf[0] = 0x0; buf[1] = 0x1; } ret = FillH2CCmd_8812(padapter, H2C_8812_TSF_RESET, 2, buf); _func_exit_; return res; } int reset_tsf(PADAPTER Adapter, u8 reset_port ) { u8 reset_cnt_before = 0, reset_cnt_after = 0, loop_cnt = 0; u32 reg_reset_tsf_cnt = (IFACE_PORT0==reset_port) ? REG_FW_RESET_TSF_CNT_0:REG_FW_RESET_TSF_CNT_1; u32 reg_bcncrtl = (IFACE_PORT0==reset_port) ? REG_BCN_CTRL_1:REG_BCN_CTRL; rtw_scan_abort(Adapter->pbuddy_adapter); /* site survey will cause reset_tsf fail */ reset_cnt_after = reset_cnt_before = rtw_read8(Adapter,reg_reset_tsf_cnt); rtl8812_reset_tsf(Adapter, reset_port); while ((reset_cnt_after == reset_cnt_before ) && (loop_cnt < 10)) { rtw_msleep_os(100); loop_cnt++; reset_cnt_after = rtw_read8(Adapter, reg_reset_tsf_cnt); } return(loop_cnt >= 10) ? _FAIL : _TRUE; } #endif // CONFIG_TSF_RESET_OFFLOAD static void rtl8812_set_FwRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc) { u8 u1H2CRsvdPageParm[H2C_RSVDPAGE_LOC_LEN]={0}; DBG_871X("8812au/8821/8811 RsvdPageLoc: ProbeRsp=%d PsPoll=%d Null=%d QoSNull=%d BTNull=%d\n", rsvdpageloc->LocProbeRsp, rsvdpageloc->LocPsPoll, rsvdpageloc->LocNullData, rsvdpageloc->LocQosNull, rsvdpageloc->LocBTQosNull); SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1H2CRsvdPageParm, rsvdpageloc->LocProbeRsp); SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1H2CRsvdPageParm, rsvdpageloc->LocPsPoll); SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocNullData); SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocQosNull); SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocBTQosNull); RT_PRINT_DATA(_module_hal_init_c_, _drv_always_, "u1H2CRsvdPageParm:", u1H2CRsvdPageParm, H2C_RSVDPAGE_LOC_LEN); FillH2CCmd_8812(padapter, H2C_RSVD_PAGE, H2C_RSVDPAGE_LOC_LEN, u1H2CRsvdPageParm); } #ifdef CONFIG_WOWLAN #ifdef CONFIG_PNO_SUPPORT static void rtl8812_set_FwScanOffloadInfo_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc, u8 enable) { u8 u1H2CScanOffloadInfoParm[H2C_SCAN_OFFLOAD_CTRL_LEN]={0}; u8 res = 0, count = 0; struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); DBG_871X("%s: loc_probe_packet:%d, loc_scan_info: %d loc_ssid_info:%d\n", __func__, rsvdpageloc->LocProbePacket, rsvdpageloc->LocScanInfo, rsvdpageloc->LocSSIDInfo); SET_H2CCMD_AOAC_NLO_FUN_EN(u1H2CScanOffloadInfoParm, enable); SET_H2CCMD_AOAC_RSVDPAGE_LOC_SCAN_INFO(u1H2CScanOffloadInfoParm, rsvdpageloc->LocScanInfo); SET_H2CCMD_AOAC_RSVDPAGE_LOC_PROBE_PACKET(u1H2CScanOffloadInfoParm, rsvdpageloc->LocProbePacket); SET_H2CCMD_AOAC_RSVDPAGE_LOC_SSID_INFO(u1H2CScanOffloadInfoParm, rsvdpageloc->LocSSIDInfo); RT_PRINT_DATA(_module_hal_init_c_, _drv_always_, "u1H2CScanOffloadInfoParm:", u1H2CScanOffloadInfoParm, H2C_SCAN_OFFLOAD_CTRL_LEN); FillH2CCmd_8812(padapter, H2C_D0_SCAN_OFFLOAD_INFO, H2C_SCAN_OFFLOAD_CTRL_LEN, u1H2CScanOffloadInfoParm); if (pwrpriv->pno_in_resume == _FALSE) { res = rtw_read8(padapter, 0x1b9); while( res == 0 && count < 25) { DBG_871X("[%d] 0x1b9 0x%02x\n", count, res); res = rtw_read8(padapter, 0x1b9); DBG_871X("[%d] 0x1c4: 0x%08x 0x1cc:0x%08x\n", count, rtw_read32(padapter, 0x1c4), rtw_read32(padapter, 0x1cc)); rtw_msleep_os(2); count++; } count = 0; res = rtw_read8(padapter, 0x1b9); while( res != 0x77 && count < 50) { DBG_871X("[%d] 0x1b9 0x%02x\n", count, res); res = rtw_read8(padapter, 0x1b9); DBG_871X("[%d] 0x1c4: 0x%08x 0x1cc:0x%08x\n", count, rtw_read32(padapter, 0x1c4), rtw_read32(padapter, 0x1cc)); rtw_msleep_os(2); count++; } DBG_871X("0x1b9: 0x%02x\n", res); } } #endif //CONFIG_PNO_SUPPORT #ifdef CONFIG_AP_WOWLAN static void rtl8812_set_ap_wow_rsvdpage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; u8 res = 0, count = 0, header = 0; u8 rsvdparm[H2C_AOAC_RSVDPAGE_LOC_LEN]={0}; header = rtw_read8(padapter, REG_BCNQ_BDNY); DBG_871X("%s: beacon: %d, probeRsp: %d, header:0x%02x\n", __func__, rsvdpageloc->LocApOffloadBCN, rsvdpageloc->LocProbeRsp, header); SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_BCN(rsvdparm, rsvdpageloc->LocApOffloadBCN + header); FillH2CCmd_8812(padapter, H2C_BCN_RSVDPAGE, H2C_BCN_RSVDPAGE_LEN, rsvdparm); rtw_msleep_os(10); _rtw_memset(&rsvdparm, 0, sizeof(rsvdparm)); SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_ProbeRsp( rsvdparm, rsvdpageloc->LocProbeRsp + header); FillH2CCmd_8812(padapter, H2C_8192E_PROBERSP_RSVDPAGE, H2C_PROBERSP_RSVDPAGE_LEN, rsvdparm); rtw_msleep_os(10); } // //Description: Fill the reserved packets that FW will use to RSVD page. //Now we just send 2 types packet to rsvd page. (1)Beacon, (2)ProbeRsp. // //Input: bDLFinished // //FALSE: At the first time we will send all the packets as a large packet to Hw, // so we need to set the packet length to total lengh. // //TRUE: At the second time, we should send the first packet (default:beacon) // to Hw again and set the lengh in descriptor to the real beacon lengh. // 2009.10.15 by tynli. static void rtl8812_set_AP_FwRsvdPagePkt(PADAPTER padapter, BOOLEAN bDLFinished) { PHAL_DATA_TYPE pHalData; struct xmit_frame *pcmdframe; struct pkt_attrib *pattrib; struct xmit_priv *pxmitpriv; struct mlme_ext_priv *pmlmeext; struct mlme_ext_info *pmlmeinfo; struct pwrctrl_priv *pwrctl; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; u32 BeaconLength=0, ProbeRspLength=0; u8 *ReservedPagePacket; u8 TxDescLen = TXDESC_SIZE, TxDescOffset = TXDESC_OFFSET; u8 TotalPageNum=0, CurtPktPageNum=0, RsvdPageNum=0; u8 currentip[4]; u16 BufIndex, PageSize = 256; u32 TotalPacketLen = 0, MaxRsvdPageBufSize=0; RSVDPAGE_LOC RsvdPageLoc; #ifdef DBG_CONFIG_ERROR_DETECT struct sreset_priv *psrtpriv; #endif // DBG_CONFIG_ERROR_DETECT DBG_8192C("+" FUNC_ADPT_FMT ": iface_type=%d\n", FUNC_ADPT_ARG(padapter), get_iface_type(padapter)); pHalData = GET_HAL_DATA(padapter); #ifdef DBG_CONFIG_ERROR_DETECT psrtpriv = &pHalData->srestpriv; #endif pxmitpriv = &padapter->xmitpriv; pmlmeext = &padapter->mlmeextpriv; pmlmeinfo = &pmlmeext->mlmext_info; pwrctl = adapter_to_pwrctl(padapter); RsvdPageNum = 21; MaxRsvdPageBufSize = RsvdPageNum*PageSize; pcmdframe = rtw_alloc_cmdxmitframe(pxmitpriv); if (pcmdframe == NULL) { DBG_871X("%s: alloc ReservedPagePacket fail!\n", __FUNCTION__); return; } ReservedPagePacket = pcmdframe->buf_addr; _rtw_memset(&RsvdPageLoc, 0, sizeof(RSVDPAGE_LOC)); //3 (1) beacon BufIndex = TxDescOffset; ConstructBeacon(padapter, &ReservedPagePacket[BufIndex], &BeaconLength); // When we count the first page size, we need to reserve description size for the RSVD // packet, it will be filled in front of the packet in TXPKTBUF. CurtPktPageNum = (u8)PageNum_256(TxDescLen + BeaconLength); //If we don't add 1 more page, the WOWLAN function has a problem. Baron thinks it's a bug of firmware if (CurtPktPageNum == 1) { CurtPktPageNum += 1; } TotalPageNum += CurtPktPageNum; BufIndex += (CurtPktPageNum*PageSize); //2 (4) probe response RsvdPageLoc.LocProbeRsp = TotalPageNum; rtw_get_current_ip_address(padapter, currentip); ConstructProbeRsp( padapter, &ReservedPagePacket[BufIndex], &ProbeRspLength, currentip, _FALSE); rtl8812a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], ProbeRspLength, _FALSE, _FALSE, _FALSE); DBG_871X("%s(): HW_VAR_SET_TX_CMD: PROBE RSP %p %d\n", __func__, &ReservedPagePacket[BufIndex-TxDescLen], (ProbeRspLength+TxDescLen)); CurtPktPageNum = (u8)PageNum_256(TxDescLen + ProbeRspLength); TotalPageNum += CurtPktPageNum; BufIndex += (CurtPktPageNum*PageSize); TotalPacketLen = BufIndex + ProbeRspLength; if (TotalPacketLen > MaxRsvdPageBufSize) { DBG_871X("%s(): ERROR: The rsvd page size is not enough \ !!TotalPacketLen %d, MaxRsvdPageBufSize %d\n", __func__, TotalPacketLen,MaxRsvdPageBufSize); goto error; } else { // update attribute pattrib = &pcmdframe->attrib; update_mgntframe_attrib(padapter, pattrib); pattrib->qsel = QSLT_BEACON; pattrib->pktlen = TotalPacketLen - TxDescOffset; pattrib->last_txcmdsz = TotalPacketLen - TxDescOffset; #ifdef CONFIG_PCI_HCI dump_mgntframe(padapter, pcmdframe); #else dump_mgntframe_and_wait(padapter, pcmdframe, 100); #endif } DBG_871X("%s: Set RSVD page location to Fw ,TotalPacketLen(%d), TotalPageNum(%d)\n", __FUNCTION__,TotalPacketLen,TotalPageNum); rtl8812_set_ap_wow_rsvdpage_cmd(padapter, &RsvdPageLoc); return; error: rtw_free_xmitframe(pxmitpriv, pcmdframe); } #endif //CONFIG_AP_WOWLAN static void rtl8812_set_FwAoacRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; u8 res = 0, count = 0; #ifdef CONFIG_WOWLAN u8 u1H2CAoacRsvdPageParm[H2C_AOAC_RSVDPAGE_LOC_LEN]={0}; DBG_871X("8192EAOACRsvdPageLoc: RWC=%d ArpRsp=%d NbrAdv=%d GtkRsp=%d GtkInfo=%d ProbeReq=%d NetworkList=%d\n", rsvdpageloc->LocRemoteCtrlInfo, rsvdpageloc->LocArpRsp, rsvdpageloc->LocNbrAdv, rsvdpageloc->LocGTKRsp, rsvdpageloc->LocGTKInfo, rsvdpageloc->LocProbeReq, rsvdpageloc->LocNetList); #ifdef CONFIG_PNO_SUPPORT DBG_871X("NLO_INFO=%d\n", rsvdpageloc->LocPNOInfo); #endif if (check_fwstate(pmlmepriv, _FW_LINKED)) { SET_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocRemoteCtrlInfo); SET_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(u1H2CAoacRsvdPageParm, rsvdpageloc->LocArpRsp); //SET_H2CCMD_AOAC_RSVDPAGE_LOC_NEIGHBOR_ADV(u1H2CAoacRsvdPageParm, rsvdpageloc->LocNbrAdv); SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_RSP(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKRsp); SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKInfo); #ifdef CONFIG_GTK_OL SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKEXTMEM); #endif // CONFIG_GTK_OL } else { #ifdef CONFIG_PNO_SUPPORT if(!pwrpriv->pno_in_resume) { SET_H2CCMD_AOAC_RSVDPAGE_LOC_NLO_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocPNOInfo); } #endif } RT_PRINT_DATA(_module_hal_init_c_, _drv_always_, "u1H2CAoacRsvdPageParm:", u1H2CAoacRsvdPageParm, H2C_AOAC_RSVDPAGE_LOC_LEN); FillH2CCmd_8812(padapter, H2C_AOAC_RSVD_PAGE, H2C_AOAC_RSVDPAGE_LOC_LEN, u1H2CAoacRsvdPageParm); #ifdef CONFIG_PNO_SUPPORT if (!check_fwstate(pmlmepriv, WIFI_AP_STATE) && !check_fwstate(pmlmepriv, _FW_LINKED) && pwrpriv->pno_in_resume == _FALSE) { res = rtw_read8(padapter, 0x1b8); while(res == 0 && count < 25) { DBG_871X("[%d] FW loc_NLOInfo: %d\n", count, res); res = rtw_read8(padapter, 0x1b8); count++; rtw_msleep_os(2); } } #endif // CONFIG_PNO_SUPPORT #endif // CONFIG_WOWLAN } // // Description: // Construct the ARP response packet to support ARP offload. // static void ConstructARPResponse( PADAPTER padapter, u8 *pframe, u32 *pLength, u8 *pIPAddress ) { struct rtw_ieee80211_hdr *pwlanhdr; u16 *fctrl; u32 pktlen; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wlan_network *cur_network = &pmlmepriv->cur_network; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct security_priv *psecuritypriv = &padapter->securitypriv; static u8 ARPLLCHeader[8] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00, 0x08, 0x06}; u8 *pARPRspPkt = pframe; //for TKIP Cal MIC u8 *payload = pframe; u8 EncryptionHeadOverhead = 0; //DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave); pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; fctrl = &pwlanhdr->frame_ctl; *(fctrl) = 0; //------------------------------------------------------------------------- // MAC Header. //------------------------------------------------------------------------- SetFrameType(fctrl, WIFI_DATA); //SetFrameSubType(fctrl, 0); SetToDs(fctrl); _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); SetSeqNum(pwlanhdr, 0); SetDuration(pwlanhdr, 0); //SET_80211_HDR_FRAME_CONTROL(pARPRspPkt, 0); //SET_80211_HDR_TYPE_AND_SUBTYPE(pARPRspPkt, Type_Data); //SET_80211_HDR_TO_DS(pARPRspPkt, 1); //SET_80211_HDR_ADDRESS1(pARPRspPkt, pMgntInfo->Bssid); //SET_80211_HDR_ADDRESS2(pARPRspPkt, Adapter->CurrentAddress); //SET_80211_HDR_ADDRESS3(pARPRspPkt, pMgntInfo->Bssid); //SET_80211_HDR_DURATION(pARPRspPkt, 0); //SET_80211_HDR_FRAGMENT_SEQUENCE(pARPRspPkt, 0); #ifdef CONFIG_WAPI_SUPPORT *pLength = sMacHdrLng; #else *pLength = 24; #endif //YJ,del,120503 #if 0 //------------------------------------------------------------------------- // Qos Header: leave space for it if necessary. //------------------------------------------------------------------------- if(pStaQos->CurrentQosMode > QOS_DISABLE) { SET_80211_HDR_QOS_EN(pARPRspPkt, 1); PlatformZeroMemory(&(Buffer[*pLength]), sQoSCtlLng); *pLength += sQoSCtlLng; } #endif //------------------------------------------------------------------------- // Security Header: leave space for it if necessary. //------------------------------------------------------------------------- #if 1 switch (psecuritypriv->dot11PrivacyAlgrthm) { case _WEP40_: case _WEP104_: EncryptionHeadOverhead = 4; break; case _TKIP_: EncryptionHeadOverhead = 8; break; case _AES_: EncryptionHeadOverhead = 8; break; #ifdef CONFIG_WAPI_SUPPORT case _SMS4_: EncryptionHeadOverhead = 18; break; #endif default: EncryptionHeadOverhead = 0; } if(EncryptionHeadOverhead > 0) { _rtw_memset(&(pframe[*pLength]), 0,EncryptionHeadOverhead); *pLength += EncryptionHeadOverhead; //SET_80211_HDR_WEP(pARPRspPkt, 1); //Suggested by CCW. SetPrivacy(fctrl); } #endif //------------------------------------------------------------------------- // Frame Body. //------------------------------------------------------------------------- pARPRspPkt = (u8*)(pframe+ *pLength); payload = pARPRspPkt; //Get Payload pointer // LLC header _rtw_memcpy(pARPRspPkt, ARPLLCHeader, 8); *pLength += 8; // ARP element pARPRspPkt += 8; SET_ARP_PKT_HW(pARPRspPkt, 0x0100); SET_ARP_PKT_PROTOCOL(pARPRspPkt, 0x0008); // IP protocol SET_ARP_PKT_HW_ADDR_LEN(pARPRspPkt, 6); SET_ARP_PKT_PROTOCOL_ADDR_LEN(pARPRspPkt, 4); SET_ARP_PKT_OPERATION(pARPRspPkt, 0x0200); // ARP response SET_ARP_PKT_SENDER_MAC_ADDR(pARPRspPkt, myid(&(padapter->eeprompriv))); SET_ARP_PKT_SENDER_IP_ADDR(pARPRspPkt, pIPAddress); #ifdef CONFIG_ARP_KEEP_ALIVE if (rtw_gw_addr_query(padapter)==0) { SET_ARP_PKT_TARGET_MAC_ADDR(pARPRspPkt, pmlmepriv->gw_mac_addr); SET_ARP_PKT_TARGET_IP_ADDR(pARPRspPkt, pmlmepriv->gw_ip); } else #endif { SET_ARP_PKT_TARGET_MAC_ADDR(pARPRspPkt, get_my_bssid(&(pmlmeinfo->network))); SET_ARP_PKT_TARGET_IP_ADDR(pARPRspPkt, pIPAddress); DBG_871X("%s Target Mac Addr:" MAC_FMT "\n", __FUNCTION__, MAC_ARG(get_my_bssid(&(pmlmeinfo->network)))); DBG_871X("%s Target IP Addr" IP_FMT "\n", __FUNCTION__, IP_ARG(pIPAddress)); } *pLength += 28; if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_) { u8 mic[8]; struct mic_data micdata; struct sta_info *psta = NULL; u8 priority[4]={0x0,0x0,0x0,0x0}; u8 null_key[16]={0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}; DBG_871X("%s(): Add MIC\n",__FUNCTION__); psta = rtw_get_stainfo(&padapter->stapriv, get_my_bssid(&(pmlmeinfo->network))); if (psta != NULL) { if(_rtw_memcmp(&psta->dot11tkiptxmickey.skey[0],null_key, 16)==_TRUE){ DBG_871X("%s(): STA dot11tkiptxmickey==0\n",__FUNCTION__); } //start to calculate the mic code rtw_secmicsetkey(&micdata, &psta->dot11tkiptxmickey.skey[0]); } rtw_secmicappend(&micdata, pwlanhdr->addr3, 6); //DA rtw_secmicappend(&micdata, pwlanhdr->addr2, 6); //SA priority[0]=0; rtw_secmicappend(&micdata, &priority[0], 4); rtw_secmicappend(&micdata, payload, 36); //payload length = 8 + 28 rtw_secgetmic(&micdata,&(mic[0])); pARPRspPkt += 28; _rtw_memcpy(pARPRspPkt, &(mic[0]),8); *pLength += 8; } } //for wake on wlan static void rtl8812_set_FwRsvdPagePkt(PADAPTER padapter, BOOLEAN bDLFinished) { PHAL_DATA_TYPE pHalData; struct xmit_frame *pcmdframe; struct pkt_attrib *pattrib; struct xmit_priv *pxmitpriv; struct mlme_ext_priv *pmlmeext; struct mlme_ext_info *pmlmeinfo; struct pwrctrl_priv *pwrctl; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; u32 BeaconLength=0, ProbeRspLength=0, PSPollLength=0; u32 NullDataLength=0, QosNullLength=0, BTQosNullLength=0; u32 ProbeReqLength=0; u8 *ReservedPagePacket; u8 TxDescLen = TXDESC_SIZE, TxDescOffset = TXDESC_OFFSET; u8 TotalPageNum=0, CurtPktPageNum=0, RsvdPageNum=0; u16 BufIndex, PageSize = 256; u32 TotalPacketLen, MaxRsvdPageBufSize=0; RSVDPAGE_LOC RsvdPageLoc; #ifdef CONFIG_WOWLAN u32 ARPLegnth = 0, GTKLegnth = 0, PNOLength = 0, ScanInfoLength = 0; u32 SSIDLegnth = 0; struct security_priv *psecuritypriv = &padapter->securitypriv; //added by xx u8 currentip[4]; u8 cur_dot11txpn[8]; #ifdef CONFIG_GTK_OL struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info * psta; u8 kek[RTW_KEK_LEN]; u8 kck[RTW_KCK_LEN]; #endif #endif #ifdef DBG_CONFIG_ERROR_DETECT struct sreset_priv *psrtpriv; #endif // DBG_CONFIG_ERROR_DETECT if(IS_HARDWARE_TYPE_8812(padapter)) PageSize = 512; else if (IS_HARDWARE_TYPE_8821(padapter)) PageSize = PAGE_SIZE_TX_8821A; //DBG_871X("%s---->\n", __FUNCTION__); pHalData = GET_HAL_DATA(padapter); #ifdef DBG_CONFIG_ERROR_DETECT psrtpriv = &pHalData->srestpriv; #endif pxmitpriv = &padapter->xmitpriv; pmlmeext = &padapter->mlmeextpriv; pmlmeinfo = &pmlmeext->mlmext_info; pwrctl = adapter_to_pwrctl(padapter); //RsvdPageNum = BCNQ_PAGE_NUM_8723B + WOWLAN_PAGE_NUM_8723B; RsvdPageNum = 21; MaxRsvdPageBufSize = RsvdPageNum*PageSize; pcmdframe = rtw_alloc_cmdxmitframe(pxmitpriv); if (pcmdframe == NULL) { DBG_871X("%s: alloc ReservedPagePacket fail!\n", __FUNCTION__); return; } ReservedPagePacket = pcmdframe->buf_addr; _rtw_memset(&RsvdPageLoc, 0, sizeof(RSVDPAGE_LOC)); //3 (1) beacon BufIndex = TxDescOffset; ConstructBeacon(padapter, &ReservedPagePacket[BufIndex], &BeaconLength); // When we count the first page size, we need to reserve description size for the RSVD // packet, it will be filled in front of the packet in TXPKTBUF. CurtPktPageNum = (u8)PageNum(TxDescLen + BeaconLength, PageSize); //If we don't add 1 more page, the WOWLAN function has a problem. Baron thinks it's a bug of firmware if (CurtPktPageNum == 1) { CurtPktPageNum += 1; } TotalPageNum += CurtPktPageNum; BufIndex += (CurtPktPageNum*PageSize); //3 (2) ps-poll RsvdPageLoc.LocPsPoll = TotalPageNum; ConstructPSPoll(padapter, &ReservedPagePacket[BufIndex], &PSPollLength); rtl8812a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], PSPollLength, _TRUE, _FALSE, _FALSE); //DBG_871X("%s(): HW_VAR_SET_TX_CMD: PS-POLL %p %d\n", // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (PSPollLength+TxDescLen)); CurtPktPageNum = (u8)PageNum(TxDescLen + PSPollLength, PageSize); TotalPageNum += CurtPktPageNum; BufIndex += (CurtPktPageNum*PageSize); //3 (3) null data RsvdPageLoc.LocNullData = TotalPageNum; ConstructNullFunctionData( padapter, &ReservedPagePacket[BufIndex], &NullDataLength, get_my_bssid(&pmlmeinfo->network), _FALSE, 0, 0, _FALSE); rtl8812a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], NullDataLength, _FALSE, _FALSE, _FALSE); //DBG_871X("%s(): HW_VAR_SET_TX_CMD: NULL DATA %p %d\n", // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (NullDataLength+TxDescLen)); CurtPktPageNum = (u8)PageNum(TxDescLen + NullDataLength, PageSize); TotalPageNum += CurtPktPageNum; BufIndex += (CurtPktPageNum*PageSize); #if 0 //3 (4) probe response RsvdPageLoc.LocProbeRsp = TotalPageNum; ConstructProbeRsp( padapter, &ReservedPagePacket[BufIndex], &ProbeRspLength, get_my_bssid(&pmlmeinfo->network), _FALSE); rtl8812a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], ProbeRspLength, _FALSE, _FALSE); //DBG_871X("%s(): HW_VAR_SET_TX_CMD: PROBE RSP %p %d\n", // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (ProbeRspLength+TxDescLen)); CurtPktPageNum = (u8)PageNum(TxDescLen + ProbeRspLength, PageSize); TotalPageNum += CurtPktPageNum; BufIndex += (CurtPktPageNum*PageSize); #endif //3 (5) Qos null data RsvdPageLoc.LocQosNull = TotalPageNum; ConstructNullFunctionData( padapter, &ReservedPagePacket[BufIndex], &QosNullLength, get_my_bssid(&pmlmeinfo->network), _TRUE, 0, 0, _FALSE); rtl8812a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], QosNullLength, _FALSE, _FALSE, _FALSE); //DBG_871X("%s(): HW_VAR_SET_TX_CMD: QOS NULL DATA %p %d\n", // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (QosNullLength+TxDescLen)); CurtPktPageNum = (u8)PageNum(TxDescLen + QosNullLength, PageSize); TotalPageNum += CurtPktPageNum; BufIndex += (CurtPktPageNum*PageSize); //3 (6) BT Qos null data RsvdPageLoc.LocBTQosNull = TotalPageNum; ConstructNullFunctionData( padapter, &ReservedPagePacket[BufIndex], &BTQosNullLength, get_my_bssid(&pmlmeinfo->network), _TRUE, 0, 0, _FALSE); rtl8812a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], BTQosNullLength, _FALSE, _TRUE, _FALSE); //DBG_871X("%s(): HW_VAR_SET_TX_CMD: BT QOS NULL DATA %p %d\n", // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (BTQosNullLength+TxDescLen)); CurtPktPageNum = (u8)PageNum(TxDescLen + BTQosNullLength, PageSize); TotalPageNum += CurtPktPageNum; BufIndex += (CurtPktPageNum*PageSize); #ifdef CONFIG_WOWLAN if (check_fwstate(pmlmepriv, _FW_LINKED)) { //if (pwrctl->wowlan_mode == _TRUE) { //BufIndex += (CurtPktPageNum*PageSize); //3(7) ARP RSP rtw_get_current_ip_address(padapter, currentip); RsvdPageLoc.LocArpRsp= TotalPageNum; #ifdef DBG_CONFIG_ERROR_DETECT if(psrtpriv->silent_reset_inprogress == _FALSE) #endif //DBG_CONFIG_ERROR_DETECT { ConstructARPResponse( padapter, &ReservedPagePacket[BufIndex], &ARPLegnth, currentip ); rtl8812a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], ARPLegnth, _FALSE, _FALSE, _TRUE); //DBG_871X("%s(): HW_VAR_SET_TX_CMD: ARP RSP %p %d\n", // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (ARPLegnth+TxDescLen)); CurtPktPageNum = (u8)PageNum(TxDescLen + ARPLegnth, PageSize); } #ifdef DBG_CONFIG_ERROR_DETECT else CurtPktPageNum = (u8)PageNum(PageSize, PageSize); #endif //DBG_CONFIG_ERROR_DETECT TotalPageNum += CurtPktPageNum; BufIndex += (CurtPktPageNum*PageSize); //3(8) SEC IV rtw_get_sec_iv(padapter, cur_dot11txpn, get_my_bssid(&pmlmeinfo->network)); RsvdPageLoc.LocRemoteCtrlInfo = TotalPageNum; _rtw_memcpy(ReservedPagePacket+BufIndex-TxDescLen, cur_dot11txpn, _AES_IV_LEN_); //DBG_871X("%s(): HW_VAR_SET_TX_CMD: SEC IV %p %d\n", // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], _AES_IV_LEN_); CurtPktPageNum = (u8)PageNum(_AES_IV_LEN_, PageSize); TotalPageNum += CurtPktPageNum; #ifdef CONFIG_GTK_OL BufIndex += (CurtPktPageNum*PageSize); //if the ap staion info. exists, get the kek, kck from staion info. psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); if (psta == NULL) { _rtw_memset(kek, 0, RTW_KEK_LEN); _rtw_memset(kck, 0, RTW_KCK_LEN); DBG_8192C("%s, KEK, KCK download rsvd page all zero \n", __func__); } else { _rtw_memcpy(kek, psta->kek, RTW_KEK_LEN); _rtw_memcpy(kck, psta->kck, RTW_KCK_LEN); } //3(9) KEK, KCK RsvdPageLoc.LocGTKInfo = TotalPageNum; _rtw_memcpy(ReservedPagePacket+BufIndex-TxDescLen, kck, RTW_KCK_LEN); _rtw_memcpy(ReservedPagePacket+BufIndex-TxDescLen+RTW_KCK_LEN, kek, RTW_KEK_LEN); #if 0 { int i; printk("\ntoFW KCK: "); for(i=0;i<16; i++) printk(" %02x ", kck[i]); printk("\ntoFW KEK: "); for(i=0;i<16; i++) printk(" %02x ", kek[i]); printk("\n"); } #endif //DBG_871X("%s(): HW_VAR_SET_TX_CMD: KEK KCK %p %d\n", // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (TxDescLen + RTW_KCK_LEN + RTW_KEK_LEN)); CurtPktPageNum = (u8)PageNum(TxDescLen + RTW_KCK_LEN + RTW_KEK_LEN, PageSize); TotalPageNum += CurtPktPageNum; BufIndex += (CurtPktPageNum*PageSize); //3(10) GTK Response RsvdPageLoc.LocGTKRsp= TotalPageNum; ConstructGTKResponse( padapter, &ReservedPagePacket[BufIndex], >KLegnth ); rtl8812a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], GTKLegnth, _FALSE, _FALSE, _TRUE); #if 0 { int gj; printk("123GTK pkt=> \n"); for(gj=0; gj < GTKLegnth+TxDescLen; gj++) { printk(" %02x ", ReservedPagePacket[BufIndex-TxDescLen+gj]); if ((gj + 1)%16==0) printk("\n"); } printk(" <=end\n"); } #endif //DBG_871X("%s(): HW_VAR_SET_TX_CMD: GTK RSP %p %d\n", // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (TxDescLen + GTKLegnth)); CurtPktPageNum = (u8)PageNum(TxDescLen + GTKLegnth, PageSize); TotalPageNum += CurtPktPageNum; BufIndex += (CurtPktPageNum*PageSize); //below page is empty for GTK extension memory //3(11) GTK EXT MEM RsvdPageLoc.LocGTKEXTMEM= TotalPageNum; CurtPktPageNum = 1; TotalPageNum += CurtPktPageNum; TotalPacketLen = BufIndex-TxDescLen + PageSize; //extension memory for FW #else TotalPacketLen = BufIndex-TxDescLen + sizeof (union pn48); //IV len #endif //CONFIG_GTK_OL } else #endif //CONFIG_WOWLAN { #ifdef CONFIG_PNO_SUPPORT if (pwrctl->pno_in_resume == _FALSE) { //Probe Request RsvdPageLoc.LocProbePacket = TotalPageNum; ConstructProbeReq( padapter, &ReservedPagePacket[BufIndex], &ProbeReqLength); rtl8812a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], ProbeReqLength, _FALSE, _FALSE, _FALSE); #ifdef CONFIG_PNO_SET_DEBUG { int gj; printk("probe req pkt=> \n"); for(gj=0; gj < ProbeReqLength + TxDescLen; gj++) { printk(" %02x ",ReservedPagePacket[BufIndex- TxDescLen + gj]); if ((gj + 1)%8==0) printk("\n"); } printk(" <=end\n"); } #endif CurtPktPageNum = (u8)PageNum(TxDescLen + ProbeReqLength, PageSize); TotalPageNum += CurtPktPageNum; BufIndex += (CurtPktPageNum*PageSize); //PNO INFO Page RsvdPageLoc.LocPNOInfo = TotalPageNum; ConstructPnoInfo(padapter, &ReservedPagePacket[BufIndex -TxDescLen], &PNOLength); #ifdef CONFIG_PNO_SET_DEBUG { int gj; printk("PNO pkt=> \n"); for(gj=0; gj < PNOLength; gj++) { printk(" %02x ", ReservedPagePacket[BufIndex-TxDescLen +gj]); if ((gj + 1)%8==0) printk("\n"); } printk(" <=end\n"); } #endif CurtPktPageNum = (u8)PageNum(PNOLength, PageSize); TotalPageNum += CurtPktPageNum; BufIndex += (CurtPktPageNum*PageSize); //SSID List Page RsvdPageLoc.LocSSIDInfo = TotalPageNum; ConstructSSIDList(padapter, &ReservedPagePacket[BufIndex-TxDescLen], &SSIDLegnth); #ifdef CONFIG_PNO_SET_DEBUG { int gj; printk("SSID list pkt=> \n"); for(gj=0; gj < SSIDLegnth; gj++) { printk(" %02x ", ReservedPagePacket[BufIndex-TxDescLen+gj]); if ((gj + 1)%8==0) printk("\n"); } printk(" <=end\n"); } #endif CurtPktPageNum = (u8)PageNum(SSIDLegnth, PageSize); TotalPageNum += CurtPktPageNum; BufIndex += (CurtPktPageNum*PageSize); //Scan Info Page RsvdPageLoc.LocScanInfo = TotalPageNum; ConstructScanInfo(padapter, &ReservedPagePacket[BufIndex-TxDescLen], &ScanInfoLength); #ifdef CONFIG_PNO_SET_DEBUG { int gj; printk("Scan info pkt=> \n"); for(gj=0; gj < ScanInfoLength; gj++) { printk(" %02x ", ReservedPagePacket[BufIndex-TxDescLen+gj]); if ((gj + 1)%8==0) printk("\n"); } printk(" <=end\n"); } #endif CurtPktPageNum = (u8)PageNum(ScanInfoLength, PageSize); TotalPageNum += CurtPktPageNum; BufIndex += (CurtPktPageNum*PageSize); TotalPacketLen = BufIndex + ScanInfoLength; } else { TotalPacketLen = BufIndex + BTQosNullLength; } #else //CONFIG_PNO_SUPPORT TotalPacketLen = BufIndex + BTQosNullLength; #endif } if(TotalPacketLen > MaxRsvdPageBufSize) { DBG_871X("%s(): ERROR: The rsvd page size is not enough!!TotalPacketLen %d, MaxRsvdPageBufSize %d\n",__FUNCTION__, TotalPacketLen,MaxRsvdPageBufSize); goto error; } else { // update attribute pattrib = &pcmdframe->attrib; update_mgntframe_attrib(padapter, pattrib); pattrib->qsel = QSLT_BEACON; pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TxDescOffset; #ifdef CONFIG_PCI_HCI dump_mgntframe(padapter, pcmdframe); #else dump_mgntframe_and_wait(padapter, pcmdframe, 100); #endif } DBG_871X("%s: Set RSVD page location to Fw ,TotalPacketLen(%d), TotalPageNum(%d)\n", __FUNCTION__,TotalPacketLen,TotalPageNum); if(check_fwstate(pmlmepriv, _FW_LINKED)) { rtl8812_set_FwRsvdPage_cmd(padapter, &RsvdPageLoc); rtl8812_set_FwAoacRsvdPage_cmd(padapter, &RsvdPageLoc); } else { #ifdef CONFIG_PNO_SUPPORT if(pwrctl->pno_in_resume) rtl8812_set_FwScanOffloadInfo_cmd(padapter, &RsvdPageLoc, 0); else rtl8812_set_FwScanOffloadInfo_cmd(padapter, &RsvdPageLoc, 1); #endif } return; error: rtw_free_xmitframe(pxmitpriv, pcmdframe); } static void rtl8812_set_FwRemoteWakeCtrl_Cmd(PADAPTER padapter, u8 benable) { u8 u1H2CRemoteWakeCtrlParm[H2C_REMOTE_WAKE_CTRL_LEN]={0}; struct security_priv* psecuritypriv=&(padapter->securitypriv); struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(padapter); u8 res = 0, count = 0; DBG_871X("%s(): Enable=%d\n", __func__, benable); #ifdef CONFIG_PNO_SUPPORT SET_H2CCMD_REMOTE_WAKECTRL_ENABLE(u1H2CRemoteWakeCtrlParm, benable); SET_H2CCMD_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(u1H2CRemoteWakeCtrlParm, benable); #endif if (!ppwrpriv->wowlan_pno_enable) { SET_H2CCMD_REMOTE_WAKECTRL_ENABLE(u1H2CRemoteWakeCtrlParm, benable); SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN(u1H2CRemoteWakeCtrlParm, 1); #ifdef CONFIG_GTK_OL if(psecuritypriv->binstallKCK_KEK == _TRUE && psecuritypriv->dot11PrivacyAlgrthm == _AES_) { SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(u1H2CRemoteWakeCtrlParm, 1); } else { DBG_871X("no kck or security is not AES\n"); SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(u1H2CRemoteWakeCtrlParm, 0); } #endif //CONFIG_GTK_OL SET_H2CCMD_REMOTE_WAKE_CTRL_FW_UNICAST_EN(u1H2CRemoteWakeCtrlParm, 1); if ((psecuritypriv->dot11PrivacyAlgrthm == _AES_) || (psecuritypriv->dot11PrivacyAlgrthm == _NO_PRIVACY_)) { SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION(u1H2CRemoteWakeCtrlParm, 0); } else { SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION(u1H2CRemoteWakeCtrlParm, 1); } } exit: DBG_871X("H2C 81[0]:%02x , 81[2]:%02x\n", u1H2CRemoteWakeCtrlParm[0], u1H2CRemoteWakeCtrlParm[2]); RT_PRINT_DATA(_module_hal_init_c_, _drv_always_, "u1H2CRemoteWakeCtrlParm:", u1H2CRemoteWakeCtrlParm, H2C_REMOTE_WAKE_CTRL_LEN); FillH2CCmd_8812(padapter, H2C_REMOTE_WAKE_CTRL, H2C_REMOTE_WAKE_CTRL_LEN, u1H2CRemoteWakeCtrlParm); #ifdef CONFIG_PNO_SUPPORT if (ppwrpriv->wowlan_pno_enable && ppwrpriv->pno_in_resume == _FALSE) { res = rtw_read8(padapter, REG_PNO_STATUS); DBG_871X("cmd: 0x81 REG_PNO_STATUS: 0x%02x\n", res); while(!(res&BIT(7)) && count < 25) { DBG_871X("[%d] cmd: 0x81 REG_PNO_STATUS: 0x%02x\n", count, res); res = rtw_read8(padapter, REG_PNO_STATUS); count++; rtw_msleep_os(2); } DBG_871X("cmd: 0x81 REG_PNO_STATUS: 0x%02x\n", res); } #endif //CONFIG_PNO_SUPPORT } void rtl8812_set_FwMediaStatusRpt_cmd(PADAPTER padapter, u8 mstatus, u8 macid) { u8 u1H2CMediaStatusRptParm[H2C_MEDIA_STATUS_RPT_LEN]={0}; u8 macid_end = 0; DBG_871X("%s(): mstatus = %d macid=%d\n", __func__, mstatus, macid); SET_H2CCMD_MSRRPT_PARM_OPMODE(u1H2CMediaStatusRptParm, mstatus); SET_H2CCMD_MSRRPT_PARM_MACID_IND(u1H2CMediaStatusRptParm, 0); SET_H2CCMD_MSRRPT_PARM_MACID(u1H2CMediaStatusRptParm, macid); SET_H2CCMD_MSRRPT_PARM_MACID_END(u1H2CMediaStatusRptParm, macid_end); RT_PRINT_DATA(_module_hal_init_c_, _drv_always_, "u1H2CMediaStatusRptParm:", u1H2CMediaStatusRptParm, H2C_MEDIA_STATUS_RPT_LEN); FillH2CCmd_8812(padapter, H2C_MEDIA_STATUS_RPT, H2C_MEDIA_STATUS_RPT_LEN, u1H2CMediaStatusRptParm); } static void rtl8812_set_FwDisconDecision_cmd(PADAPTER padapter, u8 benable) { u8 u1H2CDisconDecisionParm[H2C_DISCON_DECISION_LEN]={0}; u8 adopt = 1, check_period = 10, trypkt_num = 0; DBG_871X("%s(): benable = %d\n", __func__, benable); SET_H2CCMD_DISCONDECISION_PARM_ENABLE(u1H2CDisconDecisionParm, benable); SET_H2CCMD_DISCONDECISION_PARM_ADOPT(u1H2CDisconDecisionParm, adopt); SET_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(u1H2CDisconDecisionParm, check_period); SET_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(u1H2CDisconDecisionParm, trypkt_num); RT_PRINT_DATA(_module_hal_init_c_, _drv_always_, "u1H2CDisconDecisionParm:", u1H2CDisconDecisionParm, H2C_DISCON_DECISION_LEN); FillH2CCmd_8812(padapter, H2C_DISCON_DECISION, H2C_DISCON_DECISION_LEN, u1H2CDisconDecisionParm); } static void rtl8812_set_FwKeepAlive_cmd(PADAPTER padapter, u8 benable, u8 pkt_type) { u8 u1H2CKeepAliveParm[H2C_KEEP_ALIVE_CTRL_LEN]={0}; u8 adopt = 1, check_period = 5; DBG_871X("%s(): benable = %d\n", __func__, benable); SET_H2CCMD_KEEPALIVE_PARM_ENABLE(u1H2CKeepAliveParm, benable); SET_H2CCMD_KEEPALIVE_PARM_ADOPT(u1H2CKeepAliveParm, adopt); SET_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(u1H2CKeepAliveParm, pkt_type); SET_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(u1H2CKeepAliveParm, check_period); RT_PRINT_DATA(_module_hal_init_c_, _drv_always_, "u1H2CKeepAliveParm:", u1H2CKeepAliveParm, H2C_KEEP_ALIVE_CTRL_LEN); FillH2CCmd_8812(padapter, H2C_KEEP_ALIVE, H2C_KEEP_ALIVE_CTRL_LEN, u1H2CKeepAliveParm); } static void rtl8812_set_FwWoWlanCtrl_Cmd(PADAPTER padapter, u8 bFuncEn) { struct security_priv *psecpriv = &padapter->securitypriv; struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(padapter); u8 u1H2CWoWlanCtrlParm[H2C_WOWLAN_LEN]={0}; u8 discont_wake = 1, gpionum = 0, gpio_dur = 0, hw_unicast = 0, gpio_pulse_cnt=100; u8 sdio_wakeup_enable = 0; u8 gpio_high_active = 0; //0: low active, 1: high active u8 magic_pkt = 1; #ifdef CONFIG_GPIO_WAKEUP gpionum = WAKEUP_GPIO_IDX; sdio_wakeup_enable = 0; #endif #ifdef CONFIG_PNO_SUPPORT if (!ppwrpriv->wowlan_pno_enable) { magic_pkt = 1; } #endif if (psecpriv->dot11PrivacyAlgrthm == _WEP40_ || psecpriv->dot11PrivacyAlgrthm == _WEP104_) hw_unicast = 1; DBG_871X("%s(): bFuncEn=%d\n", __func__, bFuncEn); SET_H2CCMD_WOWLAN_FUNC_ENABLE(u1H2CWoWlanCtrlParm, bFuncEn); SET_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(u1H2CWoWlanCtrlParm, 0); SET_H2CCMD_WOWLAN_MAGIC_PKT_ENABLE(u1H2CWoWlanCtrlParm, magic_pkt); SET_H2CCMD_WOWLAN_UNICAST_PKT_ENABLE(u1H2CWoWlanCtrlParm, hw_unicast); SET_H2CCMD_WOWLAN_ALL_PKT_DROP(u1H2CWoWlanCtrlParm, 0); SET_H2CCMD_WOWLAN_GPIO_ACTIVE(u1H2CWoWlanCtrlParm, gpio_high_active); #ifndef CONFIG_GTK_OL SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(u1H2CWoWlanCtrlParm, 1); #endif //!CONFIG_GTK_OL SET_H2CCMD_WOWLAN_DISCONNECT_WAKE_UP(u1H2CWoWlanCtrlParm, discont_wake); SET_H2CCMD_WOWLAN_GPIONUM(u1H2CWoWlanCtrlParm, gpionum); SET_H2CCMD_WOWLAN_DATAPIN_WAKE_UP(u1H2CWoWlanCtrlParm, sdio_wakeup_enable); SET_H2CCMD_WOWLAN_GPIO_DURATION(u1H2CWoWlanCtrlParm, gpio_dur); SET_H2CCMD_WOWLAN_GPIO_PULSE_EN(u1H2CWoWlanCtrlParm, 1); SET_H2CCMD_WOWLAN_GPIO_PULSE_COUNT(u1H2CWoWlanCtrlParm, 0x09); #ifdef CONFIG_LOWPR SET_H2CCMD_WOWLAN_LOWPR_RX(u1H2CWoWlanCtrlParm, bFuncEn); #endif //CONFIG_LOWPR RT_PRINT_DATA(_module_hal_init_c_, _drv_always_, "u1H2CWoWlanCtrlParm:", u1H2CWoWlanCtrlParm, H2C_WOWLAN_LEN); DBG_871X("u1H2CWoWlanCtrlParm:%08x", (u32) u1H2CWoWlanCtrlParm[0]); FillH2CCmd_8812(padapter, H2C_WOWLAN, H2C_WOWLAN_LEN, u1H2CWoWlanCtrlParm); } static void rtl8812_set_FwAOACGlobalInfo_Cmd(PADAPTER padapter, u8 group_alg, u8 pairwise_alg) { u8 u1H2CAOACGlobalInfoParm[H2C_AOAC_GLOBAL_INFO_LEN]={0}; DBG_871X("%s(): group_alg=%d pairwise_alg=%d\n", __func__, group_alg, pairwise_alg); SET_H2CCMD_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(u1H2CAOACGlobalInfoParm, pairwise_alg); SET_H2CCMD_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(u1H2CAOACGlobalInfoParm, group_alg); RT_PRINT_DATA(_module_hal_init_c_, _drv_always_, "u1H2CAOACGlobalInfoParm:", u1H2CAOACGlobalInfoParm, H2C_AOAC_GLOBAL_INFO_LEN); FillH2CCmd_8812(padapter, H2C_AOAC_GLOBAL_INFO, H2C_AOAC_GLOBAL_INFO_LEN, u1H2CAOACGlobalInfoParm); } void rtl8812_download_rsvd_page(PADAPTER padapter, u8 mstatus) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); BOOLEAN bcn_valid = _FALSE; u8 DLBcnCount=0; u32 poll = 0; u8 val8; _func_enter_; DBG_8192C("+" FUNC_ADPT_FMT ": iface_type=%d mstatus(%x)\n", FUNC_ADPT_ARG(padapter), get_iface_type(padapter), mstatus); if(mstatus == RT_MEDIA_CONNECT) { BOOLEAN bRecover = _FALSE; u8 v8; // We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. // Suggested by filen. Added by tynli. rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid)); // set REG_CR bit 8 v8 = rtw_read8(padapter, REG_CR+1); v8 |= BIT(0); // ENSWBCN rtw_write8(padapter, REG_CR+1, v8); // Disable Hw protection for a time which revserd for Hw sending beacon. // Fix download reserved page packet fail that access collision with the protection time. // 2010.05.11. Added by tynli. val8 = rtw_read8(padapter, REG_BCN_CTRL); val8 &= ~BIT(3); val8 |= BIT(4); rtw_write8(padapter, REG_BCN_CTRL, val8); // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. if (pHalData->RegFwHwTxQCtrl & BIT(6)) bRecover = _TRUE; // To tell Hw the packet is not a real beacon frame. rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, pHalData->RegFwHwTxQCtrl & ~BIT(6)); pHalData->RegFwHwTxQCtrl &= ~BIT(6); // Clear beacon valid check bit. rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); rtw_hal_set_hwreg(padapter, HW_VAR_DL_BCN_SEL, NULL); DLBcnCount = 0; poll = 0; do { #ifdef CONFIG_AP_WOWLAN if (pwrpriv->wowlan_ap_mode) rtl8192e_set_AP_FwRsvdPagePkt(padapter, 0); else rtl8812_set_FwRsvdPagePkt(padapter, 0); #else // download rsvd page. rtl8812_set_FwRsvdPagePkt(padapter, 0); #endif DLBcnCount++; do { rtw_yield_os(); //rtw_mdelay_os(10); // check rsvd page download OK. rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid)); poll++; } while(!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); }while(!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); if(padapter->bSurpriseRemoved || padapter->bDriverStopped) { } else if(!bcn_valid) DBG_871X(ADPT_FMT": 1 DL RSVD page failed! DLBcnCount:%u, poll:%u\n", ADPT_ARG(padapter) ,DLBcnCount, poll); else { struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); pwrctl->fw_psmode_iface_id = padapter->iface_id; DBG_871X(ADPT_FMT": 1 DL RSVD page success! DLBcnCount:%u, poll:%u\n", ADPT_ARG(padapter), DLBcnCount, poll); } // 2010.05.11. Added by tynli. val8 = rtw_read8(padapter, REG_BCN_CTRL); val8 |= BIT(3); val8 &= ~BIT(4); rtw_write8(padapter, REG_BCN_CTRL, val8); // To make sure that if there exists an adapter which would like to send beacon. // If exists, the origianl value of 0x422[6] will be 1, we should check this to // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause // the beacon cannot be sent by HW. // 2010.06.23. Added by tynli. if(bRecover) { rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, pHalData->RegFwHwTxQCtrl | BIT(6)); pHalData->RegFwHwTxQCtrl |= BIT(6); } // Clear CR[8] or beacon packet will not be send to TxBuf anymore. v8 = rtw_read8(padapter, REG_CR+1); v8 &= ~BIT(0); // ~ENSWBCN rtw_write8(padapter, REG_CR+1, v8); } _func_exit_; } static void rtl8812_set_FwWoWlanRelated_cmd(_adapter* padapter, u8 enable) { struct security_priv *psecpriv = &padapter->securitypriv; struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(padapter); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct sta_info *psta = NULL; u8 pkt_type = 0; DBG_871X_LEVEL(_drv_always_, "+%s()+: enable=%d\n", __func__, enable); _func_enter_; if(enable) { rtl8812_set_FwAOACGlobalInfo_Cmd(padapter, psecpriv->dot118021XGrpPrivacy, psecpriv->dot11PrivacyAlgrthm); rtl8812_download_rsvd_page(padapter, RT_MEDIA_CONNECT); //RT_MEDIA_CONNECT will confuse in the future if(!(ppwrpriv->wowlan_pno_enable)) { psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(pmlmepriv)); if (psta != NULL) rtl8812_set_FwMediaStatusRpt_cmd(padapter, RT_MEDIA_CONNECT, psta->mac_id); } else DBG_871X("%s(): Disconnected, no FwMediaStatusRpt CONNECT\n",__FUNCTION__); rtw_msleep_os(2); if(!(ppwrpriv->wowlan_pno_enable)) { rtl8812_set_FwDisconDecision_cmd(padapter, enable); rtw_msleep_os(2); if ((psecpriv->dot11PrivacyAlgrthm != _WEP40_) || (psecpriv->dot11PrivacyAlgrthm != _WEP104_)) pkt_type = 1; rtl8812_set_FwKeepAlive_cmd(padapter, enable, pkt_type); rtw_msleep_os(2); } rtl8812_set_FwRemoteWakeCtrl_Cmd(padapter, enable); rtw_msleep_os(2); rtl8812_set_FwWoWlanCtrl_Cmd(padapter, enable); } else { #if 0 dump_TX_FIFO(padapter, 4, 512); #endif rtl8812_set_FwRemoteWakeCtrl_Cmd(padapter, enable); rtw_msleep_os(2); rtl8812_set_FwWoWlanCtrl_Cmd(padapter, enable); } _func_exit_; DBG_871X_LEVEL(_drv_always_, "-%s()-\n", __func__); return ; } void rtl8812_set_wowlan_cmd(_adapter* padapter, u8 enable) { rtl8812_set_FwWoWlanRelated_cmd(padapter, enable); } #endif //CONFIG_WOWLAN int rtl8812_iqk_wait(_adapter* padapter, u32 timeout_ms) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct submit_ctx *iqk_sctx = &pHalData->iqk_sctx; iqk_sctx->submit_time = rtw_get_current_time(); iqk_sctx->timeout_ms = timeout_ms; iqk_sctx->status = RTW_SCTX_SUBMITTED; return rtw_sctx_wait(iqk_sctx, __func__); } void rtl8812_iqk_done(_adapter* padapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct submit_ctx *iqk_sctx = &pHalData->iqk_sctx; rtw_sctx_done(&iqk_sctx); } static VOID C2HTxBeamformingHandler_8812( IN PADAPTER Adapter, IN u8* CmdBuf, IN u8 CmdLen ) { u8 status = CmdBuf[0] & BIT0; #ifdef CONFIG_BEAMFORMING beamforming_check_sounding_success(Adapter, status); #if (0)//DEV_BUS_TYPE == RT_PCI_INTERFACE) beamforming_end_fw(Adapter, status); #endif #endif } static VOID C2HTxFeedbackHandler_8812( IN PADAPTER Adapter, IN u8 *CmdBuf, IN u8 CmdLen ) { #ifdef CONFIG_XMIT_ACK if (GET_8812_C2H_TX_RPT_RETRY_OVER(CmdBuf) | GET_8812_C2H_TX_RPT_LIFE_TIME_OVER(CmdBuf)) { rtw_ack_tx_done(&Adapter->xmitpriv, RTW_SCTX_DONE_CCX_PKT_FAIL); } else { rtw_ack_tx_done(&Adapter->xmitpriv, RTW_SCTX_DONE_SUCCESS); } #endif } static VOID C2HRaReportHandler_8812( IN PADAPTER Adapter, IN u8* CmdBuf, IN u8 CmdLen ) { u8 Rate = CmdBuf[0] & 0x3F; u8 MacId = CmdBuf[1]; BOOLEAN bLDPC = CmdBuf[2] & BIT0; BOOLEAN bTxBF = (CmdBuf[2] & BIT1) >> 1; BOOLEAN bNoisyStateFromC2H = (CmdBuf[2] & BIT2) >> 2; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); //pHalData->CurrentRARate = MRateToHwRate(Rate); ODM_UpdateInitRate(&pHalData->odmpriv, Rate); //ODM_UpdateNoisyState(&pHalData->odmpriv, bNoisyStateFromC2H); } s32 _C2HContentParsing8812( IN PADAPTER Adapter, IN u8 c2hCmdId, IN u8 c2hCmdLen, IN u8 *tmpBuf ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T pDM_Odm = &pHalData->odmpriv; s32 ret = _SUCCESS; switch(c2hCmdId) { case C2H_8812_DBG: DBG_871X("[C2H], C2H_8812_DBG!!\n"); break; case C2H_8812_TXBF: DBG_871X("[C2H], C2H_8812_TXBF!!\n"); C2HTxBeamformingHandler_8812(Adapter, tmpBuf, c2hCmdLen); break; case C2H_8812_TX_REPORT: //DBG_871X("[C2H], C2H_8812_TX_REPORT!!\n"); C2HTxFeedbackHandler_8812(Adapter, tmpBuf, c2hCmdLen); break; #ifdef CONFIG_BT_COEXIST case C2H_8812_BT_INFO: //DBG_871X("[C2H], C2H_8812_BT_INFO!!\n"); rtw_btcoex_BtInfoNotify(Adapter, c2hCmdLen, tmpBuf); break; #endif case C2H_8812_BT_MP: DBG_871X("[C2H], C2H_8812_BT_MP!!\n"); #ifdef CONFIG_MP_INCLUDED // MPTBT_FwC2hBtMpCtrl(Adapter, tmpBuf, c2hCmdLen); #else //NDBG_FwC2hBtControl(Adapter, tmpBuf, c2hCmdLen); #endif break; case C2H_8812_RA_RPT: C2HRaReportHandler_8812(Adapter, tmpBuf, c2hCmdLen); break; case C2H_8812_FW_SWCHNL: //DBG_871X("channel to %d\n", *tmpBuf); break; case C2H_8812_IQK_FINISH: DBG_871X("== IQK Finish ==\n"); rtl8812_iqk_done(Adapter); //rtw_odm_acquirespinlock(Adapter, RT_IQK_SPINLOCK); //pDM_Odm->RFCalibrateInfo.bIQKInProgress = FALSE; //rtw_odm_releasespinlock(Adapter, RT_IQK_SPINLOCK); break; case C2H_8812_MAILBOX_STATUS: DBG_871X("[C2H], mailbox status:%u\n", *tmpBuf); break; default: DBG_871X("%s: [WARNING] unknown C2H(0x%02x)\n", __FUNCTION__, c2hCmdId); ret = _FAIL; break; } return ret; } VOID C2HPacketHandler_8812( IN PADAPTER Adapter, IN u8 *Buffer, IN u8 Length ) { struct c2h_evt_hdr_88xx *c2h_evt = (struct c2h_evt_hdr_88xx *)Buffer; u8 c2hCmdId=0, c2hCmdSeq=0, c2hCmdLen=0; u8 *tmpBuf=NULL; //PRINT_DATA(("C2HPacketHandler_8812"), Buffer, Length); c2hCmdId = Buffer[0]; c2hCmdSeq = Buffer[1]; c2hCmdLen = Length -2; tmpBuf = Buffer+2; //DBG_871X("[C2H packet], c2hCmdId=0x%x, c2hCmdSeq=0x%x, c2hCmdLen=%d\n", c2hCmdId, c2hCmdSeq, c2hCmdLen); #ifdef CONFIG_BT_COEXIST if (Length>16) { DBG_871X("[C2H packet], c2hCmdId=0x%x, c2hCmdSeq=0x%x, c2hCmdLen=%d\n", c2hCmdId, c2hCmdSeq, c2hCmdLen); rtw_warn_on(1); } if (c2hCmdId == C2H_8812_BT_INFO) { /* enqueue */ if ((c2h_evt = (struct c2h_evt_hdr_88xx *)rtw_zmalloc(16)) != NULL) { _rtw_memcpy(c2h_evt, Buffer, Length); c2h_evt->plen = Length - 2; //DBG_871X("-[C2H packet], id=0x%x, seq=0x%x, plen=%d\n", c2h_evt->id, c2h_evt->seq, c2h_evt->plen); rtw_c2h_wk_cmd(Adapter, (u8 *)c2h_evt); } } else #endif /* CONFIG_BT_COEXIST */ { /* handle directly */ _C2HContentParsing8812(Adapter, c2hCmdId, c2hCmdLen, tmpBuf); } } rtl8812au-4.3.8.12175.20140902+dfsg/hal/rtl8812a/rtl8812a_dm.c000066400000000000000000000373711261122257400216540ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //============================================================ // Description: // // This file is for 92CE/92CU dynamic mechanism only // // //============================================================ #define _RTL8812A_DM_C_ //============================================================ // include files //============================================================ //#include #include //============================================================ // Global var //============================================================ static VOID dm_CheckProtection( IN PADAPTER Adapter ) { #if 0 PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); u1Byte CurRate, RateThreshold; if(pMgntInfo->pHTInfo->bCurBW40MHz) RateThreshold = MGN_MCS1; else RateThreshold = MGN_MCS3; if(Adapter->TxStats.CurrentInitTxRate <= RateThreshold) { pMgntInfo->bDmDisableProtect = TRUE; DbgPrint("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); } else { pMgntInfo->bDmDisableProtect = FALSE; DbgPrint("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); } #endif } static VOID dm_CheckStatistics( IN PADAPTER Adapter ) { #if 0 if(!Adapter->MgntInfo.bMediaConnect) return; //2008.12.10 tynli Add for getting Current_Tx_Rate_Reg flexibly. rtw_hal_get_hwreg( Adapter, HW_VAR_INIT_TX_RATE, (pu1Byte)(&Adapter->TxStats.CurrentInitTxRate) ); // Calculate current Tx Rate(Successful transmited!!) // Calculate current Rx Rate(Successful received!!) //for tx tx retry count rtw_hal_get_hwreg( Adapter, HW_VAR_RETRY_COUNT, (pu1Byte)(&Adapter->TxStats.NumTxRetryCount) ); #endif } #ifdef CONFIG_SUPPORT_HW_WPS_PBC static void dm_CheckPbcGPIO(_adapter *padapter) { u8 tmp1byte; u8 bPbcPressed = _FALSE; if(!padapter->registrypriv.hw_wps_pbc) return; #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) if (IS_HARDWARE_TYPE_8812(padapter)) { tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT); rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as output mode tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); rtw_write8(padapter, GPIO_IN, tmp1byte); //reset the floating voltage level tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as input mode tmp1byte =rtw_read8(padapter, GPIO_IN); if (tmp1byte == 0xff) return ; if (tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT) { bPbcPressed = _TRUE; } } else if (IS_HARDWARE_TYPE_8821(padapter)) { tmp1byte = rtw_read8(padapter, GPIO_IO_SEL_8811A); tmp1byte |= (BIT4); rtw_write8(padapter, GPIO_IO_SEL_8811A, tmp1byte); //enable GPIO[2] as output mode tmp1byte &= ~(BIT4); rtw_write8(padapter, GPIO_IN_8811A, tmp1byte); //reset the floating voltage level tmp1byte = rtw_read8(padapter, GPIO_IO_SEL_8811A); tmp1byte &= ~(BIT4); rtw_write8(padapter, GPIO_IO_SEL_8811A, tmp1byte); //enable GPIO[2] as input mode tmp1byte =rtw_read8(padapter, GPIO_IN_8811A); if (tmp1byte == 0xff) return ; if (tmp1byte&BIT4) { bPbcPressed = _TRUE; } } #else #endif if( _TRUE == bPbcPressed) { // Here we only set bPbcPressed to true // After trigger PBC, the variable will be set to false DBG_8192C("CheckPbcGPIO - PBC is pressed\n"); rtw_request_wps_pbc_event(padapter); } } #endif //#ifdef CONFIG_SUPPORT_HW_WPS_PBC #ifdef CONFIG_PCI_HCI // // Description: // Perform interrupt migration dynamically to reduce CPU utilization. // // Assumption: // 1. Do not enable migration under WIFI test. // // Created by Roger, 2010.03.05. // VOID dm_InterruptMigration( IN PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); BOOLEAN bCurrentIntMt, bCurrentACIntDisable; BOOLEAN IntMtToSet = _FALSE; BOOLEAN ACIntToSet = _FALSE; // Retrieve current interrupt migration and Tx four ACs IMR settings first. bCurrentIntMt = pHalData->bInterruptMigration; bCurrentACIntDisable = pHalData->bDisableTxInt; // // Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics // when interrupt migration is set before. 2010.03.05. // if(!Adapter->registrypriv.wifi_spec && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && pmlmepriv->LinkDetectInfo.bHigherBusyTraffic) { IntMtToSet = _TRUE; // To check whether we should disable Tx interrupt or not. if(pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic ) ACIntToSet = _TRUE; } //Update current settings. if( bCurrentIntMt != IntMtToSet ){ DBG_8192C("%s(): Update interrrupt migration(%d)\n",__FUNCTION__,IntMtToSet); if(IntMtToSet) { // // Set interrrupt migration timer and corresponging Tx/Rx counter. // timer 25ns*0xfa0=100us for 0xf packets. // 2010.03.05. // rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);// 0x306:Rx, 0x307:Tx pHalData->bInterruptMigration = IntMtToSet; } else { // Reset all interrupt migration settings. rtw_write32(Adapter, REG_INT_MIG, 0); pHalData->bInterruptMigration = IntMtToSet; } } /*if( bCurrentACIntDisable != ACIntToSet ){ DBG_8192C("%s(): Update AC interrrupt(%d)\n",__FUNCTION__,ACIntToSet); if(ACIntToSet) // Disable four ACs interrupts. { // // Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization. // When extremely highly Rx OK occurs, we will disable Tx interrupts. // 2010.03.05. // UpdateInterruptMask8192CE( Adapter, 0, RT_AC_INT_MASKS ); pHalData->bDisableTxInt = ACIntToSet; } else// Enable four ACs interrupts. { UpdateInterruptMask8192CE( Adapter, RT_AC_INT_MASKS, 0 ); pHalData->bDisableTxInt = ACIntToSet; } }*/ } #endif // // Initialize GPIO setting registers // static void dm_InitGPIOSetting( IN PADAPTER Adapter ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); u8 tmp1byte; tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG); tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT); rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte); } //============================================================ // functions //============================================================ static void Init_ODM_ComInfo_8812(PADAPTER Adapter) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); u8 cut_ver,fab_ver; Init_ODM_ComInfo(Adapter); if (IS_HARDWARE_TYPE_8812(Adapter)) ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_IC_TYPE, ODM_RTL8812); else if (IS_HARDWARE_TYPE_8821(Adapter)) ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_IC_TYPE, ODM_RTL8821); fab_ver = ODM_TSMC; if(IS_A_CUT(pHalData->VersionID)) cut_ver = ODM_CUT_A; else if(IS_B_CUT(pHalData->VersionID)) cut_ver = ODM_CUT_B; else if(IS_C_CUT(pHalData->VersionID)) cut_ver = ODM_CUT_C; else if(IS_D_CUT(pHalData->VersionID)) cut_ver = ODM_CUT_D; else if(IS_E_CUT(pHalData->VersionID)) cut_ver = ODM_CUT_E; else cut_ver = ODM_CUT_A; ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_FAB_VER,fab_ver); ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_CUT_VER,cut_ver); ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType); ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_IQKFWOFFLOAD, pHalData->RegIQKFWOffload); #ifdef CONFIG_DISABLE_ODM pdmpriv->InitODMFlag = 0; #else pdmpriv->InitODMFlag = ODM_RF_CALIBRATION | ODM_RF_TX_PWR_TRACK //| ; //if(pHalData->AntDivCfg) // pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV; #endif ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,pdmpriv->InitODMFlag); } static void Update_ODM_ComInfo_8812(PADAPTER Adapter) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); struct dm_priv *pdmpriv = &pHalData->dmpriv; pdmpriv->InitODMFlag = 0 | ODM_BB_DIG | ODM_BB_RA_MASK | ODM_BB_FA_CNT | ODM_BB_RSSI_MONITOR | ODM_BB_CFO_TRACKING | ODM_RF_TX_PWR_TRACK | ODM_MAC_EDCA_TURBO | ODM_BB_NHM_CNT // | ODM_BB_PWR_TRAIN ; if (rtw_odm_adaptivity_needed(Adapter) == _TRUE) pdmpriv->InitODMFlag |= ODM_BB_ADAPTIVITY; if(pHalData->AntDivCfg) pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV; #if (MP_DRIVER==1) if (Adapter->registrypriv.mp_mode == 1) { pdmpriv->InitODMFlag = 0 | ODM_RF_CALIBRATION | ODM_RF_TX_PWR_TRACK ; } #endif//(MP_DRIVER==1) #ifdef CONFIG_DISABLE_ODM pdmpriv->InitODMFlag = 0; #endif//CONFIG_DISABLE_ODM ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,pdmpriv->InitODMFlag); ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType); } void rtl8812_InitHalDm( IN PADAPTER Adapter ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); u8 i; #ifdef CONFIG_USB_HCI dm_InitGPIOSetting(Adapter); #endif pdmpriv->DM_Type = DM_Type_ByDriver; pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE; Update_ODM_ComInfo_8812(Adapter); ODM_DMInit(pDM_Odm); //Adapter->fix_rate = 0xFF; } VOID rtl8812_HalDmWatchDog( IN PADAPTER Adapter ) { BOOLEAN bFwCurrentInPSMode = _FALSE; BOOLEAN bFwPSAwake = _TRUE; u8 hw_init_completed = _FALSE; PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); #ifdef CONFIG_CONCURRENT_MODE PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; #endif //CONFIG_CONCURRENT_MODE _func_enter_; hw_init_completed = Adapter->hw_init_completed; if (hw_init_completed == _FALSE) goto skip_dm; #ifdef CONFIG_LPS bFwCurrentInPSMode = adapter_to_pwrctl(Adapter)->bFwCurrentInPSMode; rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake)); #endif #ifdef CONFIG_P2P_PS // Fw is under p2p powersaving mode, driver should stop dynamic mechanism. // modifed by thomas. 2011.06.11. if(Adapter->wdinfo.p2p_ps_mode) bFwPSAwake = _FALSE; #endif //CONFIG_P2P_PS if( (hw_init_completed == _TRUE) && ((!bFwCurrentInPSMode) && bFwPSAwake)) { // // Calculate Tx/Rx statistics. // dm_CheckStatistics(Adapter); rtw_hal_check_rxfifo_full(Adapter); // // Dynamically switch RTS/CTS protection. // //dm_CheckProtection(Adapter); #ifdef CONFIG_PCI_HCI // 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput. // Tx Migration settings. //dm_InterruptMigration(Adapter); //if(Adapter->HalFunc.TxCheckStuckHandler(Adapter)) // PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem)); #endif } //ODM if (hw_init_completed == _TRUE) { u8 bLinked=_FALSE; u8 bsta_state=_FALSE; u8 bBtDisabled = _TRUE; #ifdef CONFIG_DISABLE_ODM pHalData->odmpriv.SupportAbility = 0; #endif if(rtw_linked_check(Adapter)){ bLinked = _TRUE; if (check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE)) bsta_state = _TRUE; } #ifdef CONFIG_CONCURRENT_MODE if(pbuddy_adapter && rtw_linked_check(pbuddy_adapter)){ bLinked = _TRUE; if(pbuddy_adapter && check_fwstate(&pbuddy_adapter->mlmepriv, WIFI_STATION_STATE)) bsta_state = _TRUE; } #endif //CONFIG_CONCURRENT_MODE ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_LINK, bLinked); ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_STATION_STATE, bsta_state); #ifdef CONFIG_BT_COEXIST bBtDisabled = rtw_btcoex_IsBtDisabled(Adapter); #endif // CONFIG_BT_COEXIST ODM_CmnInfoUpdate(&pHalData->odmpriv, ODM_CMNINFO_BT_ENABLED, ((bBtDisabled == _TRUE)?_FALSE:_TRUE)); ODM_DMWatchdog(&pHalData->odmpriv); } skip_dm: #ifdef CONFIG_SUPPORT_HW_WPS_PBC // Check GPIO to determine current Pbc status. dm_CheckPbcGPIO(Adapter); #endif return; } void rtl8812_init_dm_priv(IN PADAPTER Adapter) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; PDM_ODM_T podmpriv = &pHalData->odmpriv; _rtw_memset(pdmpriv, 0, sizeof(struct dm_priv)); //_rtw_spinlock_init(&(pHalData->odm_stainfo_lock)); #ifdef CONFIG_BT_COEXIST /* firmware size issue, btcoex fw doesn't support IQK offload */ if (pHalData->EEPROMBluetoothCoexist == _FALSE) #endif { pHalData->RegIQKFWOffload = 1; rtw_sctx_init(&pHalData->iqk_sctx, 0); } Init_ODM_ComInfo_8812(Adapter); ODM_InitAllTimers(podmpriv ); PHYDM_InitDebugSetting(podmpriv); pHalData->TxPwrInPercentage = TX_PWR_PERCENTAGE_3; } void rtl8812_deinit_dm_priv(IN PADAPTER Adapter) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; PDM_ODM_T podmpriv = &pHalData->odmpriv; //_rtw_spinlock_free(&pHalData->odm_stainfo_lock); ODM_CancelAllTimers(podmpriv); } #ifdef CONFIG_ANTENNA_DIVERSITY // Add new function to reset the state of antenna diversity before link. // // Compare RSSI for deciding antenna void AntDivCompare8812(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src) { //PADAPTER Adapter = pDM_Odm->Adapter ; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); if(0 != pHalData->AntDivCfg ) { //DBG_8192C("update_network=> orgRSSI(%d)(%d),newRSSI(%d)(%d)\n",dst->Rssi,query_rx_pwr_percentage(dst->Rssi), // src->Rssi,query_rx_pwr_percentage(src->Rssi)); //select optimum_antenna for before linked =>For antenna diversity if(dst->Rssi >= src->Rssi )//keep org parameter { src->Rssi = dst->Rssi; src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna; } } } // Add new function to reset the state of antenna diversity before link. u8 AntDivBeforeLink8812(PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T pDM_Odm =&pHalData->odmpriv; SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); // Condition that does not need to use antenna diversity. if(pHalData->AntDivCfg==0) { //DBG_8192C("odm_AntDivBeforeLink8192C(): No AntDiv Mechanism.\n"); return _FALSE; } if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { return _FALSE; } if(pDM_SWAT_Table->SWAS_NoLink_State == 0){ //switch channel pDM_SWAT_Table->SWAS_NoLink_State = 1; pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?AUX_ANT:MAIN_ANT; //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, pDM_SWAT_Table->CurAntenna); rtw_antenna_select_cmd(Adapter, pDM_SWAT_Table->CurAntenna, _FALSE); //DBG_8192C("%s change antenna to ANT_( %s ).....\n",__FUNCTION__, (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?"MAIN":"AUX"); return _TRUE; } else { pDM_SWAT_Table->SWAS_NoLink_State = 0; return _FALSE; } } #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/rtl8812a/rtl8812a_hal_init.c000066400000000000000000006075311261122257400230440ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTL8812A_HAL_INIT_C_ //#include #include #if defined(CONFIG_IOL) void iol_mode_enable(PADAPTER padapter, u8 enable) { u8 reg_0xf0 = 0; if(enable) { //Enable initial offload reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG); //DBG_871X("%s reg_0xf0:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0xf0, reg_0xf0|IOL_ENABLE); rtw_write8(padapter, REG_SYS_CFG, reg_0xf0|SW_OFFLOAD_EN); _8051Reset8812(padapter); } else { //disable initial offload reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG); //DBG_871X("%s reg_0xf0:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0xf0, reg_0xf0& ~IOL_ENABLE); rtw_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN); } } s32 iol_execute(PADAPTER padapter, u8 control) { s32 status = _FAIL; u8 reg_0x88 = 0; u32 start = 0, passing_time = 0; control = control&0x0f; reg_0x88 = rtw_read8(padapter, 0x88); //DBG_871X("%s reg_0x88:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0x88, reg_0x88|control); rtw_write8(padapter, 0x88, reg_0x88|control); start = rtw_get_current_time(); while((reg_0x88=rtw_read8(padapter, 0x88)) & control && (passing_time=rtw_get_passing_time_ms(start))<1000 ) { DBG_871X("%s polling reg_0x88:0x%02x\n", __FUNCTION__, reg_0x88); rtw_usleep_os(100); } reg_0x88 = rtw_read8(padapter, 0x88); status = (reg_0x88 & control)?_FAIL:_SUCCESS; if(reg_0x88 & control<<4) status = _FAIL; DBG_871X("%s in %u ms, reg_0x88:0x%02x\n", __FUNCTION__, passing_time, reg_0x88); return status; } s32 iol_InitLLTTable( PADAPTER padapter, u8 txpktbuf_bndy ) { //DBG_871X("%s txpktbuf_bndy:%u\n", __FUNCTION__, txpktbuf_bndy); rtw_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy); return iol_execute(padapter, IOL_INIT_LLT); } static VOID efuse_phymap_to_logical(u8 * phymap, u16 _offset, u16 _size_byte, u8 *pbuf) { u8 *efuseTbl = NULL; u8 rtemp8; u16 eFuse_Addr = 0; u8 offset, wren; u16 i, j; u16 **eFuseWord = NULL; u16 efuse_utilized = 0; u8 efuse_usage = 0; u8 u1temp = 0; efuseTbl = (u8*)rtw_zmalloc(EFUSE_MAP_LEN_JAGUAR); if(efuseTbl == NULL) { DBG_871X("%s: alloc efuseTbl fail!\n", __FUNCTION__); goto exit; } eFuseWord= (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_JAGUAR, EFUSE_MAX_WORD_UNIT, sizeof(u16)); if(eFuseWord == NULL) { DBG_871X("%s: alloc eFuseWord fail!\n", __FUNCTION__); goto exit; } // 0. Refresh efuse init map as all oxFF. for (i = 0; i < EFUSE_MAX_SECTION_JAGUAR; i++) for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) eFuseWord[i][j] = 0xFFFF; // // 1. Read the first byte to check if efuse is empty!!! // // rtemp8 = *(phymap+eFuse_Addr); if(rtemp8 != 0xFF) { efuse_utilized++; //printk("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8); eFuse_Addr++; } else { DBG_871X("EFUSE is empty efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, rtemp8); goto exit; } // // 2. Read real efuse content. Filter PG header and every section data. // while((rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_JAGUAR)) { //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr-1, *rtemp8)); // Check PG header for section num. if((rtemp8 & 0x1F ) == 0x0F) //extended header { u1temp =( (rtemp8 & 0xE0) >> 5); //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x *rtemp&0xE0 0x%x\n", u1temp, *rtemp8 & 0xE0)); //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x \n", u1temp)); rtemp8 = *(phymap+eFuse_Addr); //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8)); if((rtemp8 & 0x0F) == 0x0F) { eFuse_Addr++; rtemp8 = *(phymap+eFuse_Addr); if(rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_JAGUAR)) { eFuse_Addr++; } continue; } else { offset = ((rtemp8 & 0xF0) >> 1) | u1temp; wren = (rtemp8 & 0x0F); eFuse_Addr++; } } else { offset = ((rtemp8 >> 4) & 0x0f); wren = (rtemp8 & 0x0f); } if(offset < EFUSE_MAX_SECTION_JAGUAR) { // Get word enable value from PG header //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wren)); for(i=0; i= EFUSE_REAL_CONTENT_LEN_JAGUAR) break; //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d", eFuse_Addr)); rtemp8 = *(phymap+eFuse_Addr); eFuse_Addr++; //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8)); efuse_utilized++; eFuseWord[offset][i] |= (((u2Byte)rtemp8 << 8) & 0xff00); if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_JAGUAR) break; } wren >>= 1; } } // Read next PG header rtemp8 = *(phymap+eFuse_Addr); //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d rtemp 0x%x\n", eFuse_Addr, *rtemp8)); if(rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_JAGUAR)) { efuse_utilized++; eFuse_Addr++; } } // // 3. Collect 16 sections and 4 word unit into Efuse map. // for(i=0; i> 8) & 0xff); } } // // 4. Copy from Efuse map to output pointer memory!!! // for(i=0; i<_size_byte; i++) { pbuf[i] = efuseTbl[_offset+i]; } // // 5. Calculate Efuse utilization. // efuse_usage = (u1Byte)((efuse_utilized*100)/EFUSE_REAL_CONTENT_LEN_JAGUAR); //Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_utilized); exit: if(efuseTbl) rtw_mfree(efuseTbl, EFUSE_MAP_LEN_JAGUAR); if(eFuseWord) rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_JAGUAR, EFUSE_MAX_WORD_UNIT, sizeof(u16)); } void efuse_read_phymap_from_txpktbuf( ADAPTER *adapter, int bcnhead, //beacon head, where FW store len(2-byte) and efuse physical map. u8 *content, //buffer to store efuse physical map u16 *size //for efuse content: the max byte to read. will update to byte read ) { u16 dbg_addr = 0; u32 start = 0, passing_time = 0; u8 reg_0x143 = 0; u8 reg_0x106 = 0; u32 lo32 = 0, hi32 = 0; u16 len = 0, count = 0; int i = 0; u16 limit = *size; u8 *pos = content; if(bcnhead<0) //if not valid bcnhead = rtw_read8(adapter, REG_TDECTRL+1); DBG_871X("%s bcnhead:%d\n", __FUNCTION__, bcnhead); //reg_0x106 = rtw_read8(adapter, REG_PKT_BUFF_ACCESS_CTRL); //DBG_871X("%s reg_0x106:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0x106, 0x69); rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT); //DBG_871X("%s reg_0x106:0x%02x\n", __FUNCTION__, rtw_read8(adapter, 0x106)); dbg_addr = bcnhead*128/8; //8-bytes addressing while(1) { //DBG_871X("%s dbg_addr:0x%x\n", __FUNCTION__, dbg_addr+i); rtw_write16(adapter, REG_PKTBUF_DBG_ADDR, dbg_addr+i); //DBG_871X("%s write reg_0x143:0x00\n", __FUNCTION__); rtw_write8(adapter, REG_TXPKTBUF_DBG, 0); start = rtw_get_current_time(); while(!(reg_0x143=rtw_read8(adapter, REG_TXPKTBUF_DBG))//dbg //while(rtw_read8(adapter, REG_TXPKTBUF_DBG) & BIT0 && (passing_time=rtw_get_passing_time_ms(start))<1000 ) { DBG_871X("%s polling reg_0x143:0x%02x, reg_0x106:0x%02x\n", __FUNCTION__, reg_0x143, rtw_read8(adapter, 0x106)); rtw_usleep_os(100); } lo32 = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L); hi32 = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H); #if 0 DBG_871X("%s lo32:0x%08x, %02x %02x %02x %02x\n", __FUNCTION__, lo32 , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L) , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+1) , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+2) , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+3) ); DBG_871X("%s hi32:0x%08x, %02x %02x %02x %02x\n", __FUNCTION__, hi32 , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H) , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H+1) , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H+2) , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H+3) ); #endif if(i==0) { #if 1 //for debug u8 lenc[2]; u16 lenbak, aaabak; u16 aaa; lenc[0] = rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L); lenc[1] = rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+1); aaabak = le16_to_cpup((u16*)lenc); lenbak = le16_to_cpu(*((u16*)lenc)); aaa = le16_to_cpup((u16*)&lo32); #endif len = le16_to_cpu(*((u16*)&lo32)); limit = len-2=count+2?2:limit-count); count+=limit>=count+2?2:limit-count; pos=content+count; } else { _rtw_memcpy(pos, ((u8*)&lo32), limit>=count+4?4:limit-count); count+=limit>=count+4?4:limit-count; pos=content+count; } if(limit>count && len-2>count) { _rtw_memcpy(pos, (u8*)&hi32, limit>=count+4?4:limit-count); count+=limit>=count+4?4:limit-count; pos=content+count; } if(limit<=count || len-2<=count) break; i++; } rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, DISABLE_TRXPKT_BUF_ACCESS); DBG_871X("%s read count:%u\n", __FUNCTION__, count); *size = count; } static bool efuse_read_phymap( PADAPTER Adapter, u8 *pbuf, //buffer to store efuse physical map u16 *size //the max byte to read. will update to byte read ) { u8 *pos = pbuf; u16 limit = *size; u16 addr = 0; bool reach_end = _FALSE; // // Refresh efuse init map as all 0xFF. // _rtw_memset(pbuf, 0xFF, limit); // // Read physical efuse content. // while(addr < limit) { ReadEFuseByte(Adapter, addr, pos, _FALSE); if(*pos != 0xFF) { pos++; addr++; } else { reach_end = _TRUE; break; } } *size = addr; return reach_end; } s32 iol_read_efuse( PADAPTER padapter, u8 txpktbuf_bndy, u16 offset, u16 size_byte, u8 *logical_map ) { s32 status = _FAIL; u8 reg_0x106 = 0; u8 physical_map[512]; u16 size = 512; int i; rtw_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy); _rtw_memset(physical_map, 0xFF, 512); ///reg_0x106 = rtw_read8(padapter, REG_PKT_BUFF_ACCESS_CTRL); //DBG_871X("%s reg_0x106:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0x106, 0x69); rtw_write8(padapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT); //DBG_871X("%s reg_0x106:0x%02x\n", __FUNCTION__, rtw_read8(padapter, 0x106)); status = iol_execute(padapter, IOL_READ_EFUSE_MAP); if(status == _SUCCESS) efuse_read_phymap_from_txpktbuf(padapter, txpktbuf_bndy, physical_map, &size); #if 0 DBG_871X("%s physical map\n", __FUNCTION__); for(i=0;i POLLING_LLT_THRESHOLD) { RT_TRACE(_module_hal_init_c_, _drv_err_, ("Failed to polling write LLT done at address %d!\n", address)); status = _FAIL; break; } } while (++count); return status; } static u8 _LLTRead_8812A( IN PADAPTER Adapter, IN u32 address ) { u32 count = 0; u32 value = _LLT_INIT_ADDR(address) | _LLT_OP(_LLT_READ_ACCESS); u16 LLTReg = REG_LLT_INIT; rtw_write32(Adapter, LLTReg, value); //polling and get value do { value = rtw_read32(Adapter, LLTReg); if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) { return (u8)value; } if (count > POLLING_LLT_THRESHOLD) { RT_TRACE(_module_hal_init_c_, _drv_err_, ("Failed to polling read LLT done at address %d!\n", address)); break; } } while (++count); return 0xFF; } s32 InitLLTTable8812A(PADAPTER padapter, u8 txpktbuf_bndy) { s32 status = _FAIL; u32 i; u32 Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); #if defined(CONFIG_IOL_LLT) if(1 || rtw_IOL_applied(padapter)) { iol_mode_enable(padapter, 1); status = iol_InitLLTTable(padapter, txpktbuf_bndy); iol_mode_enable(padapter, 0); } else #endif { for (i = 0; i < (txpktbuf_bndy - 1); i++) { status = _LLTWrite_8812A(padapter, i, i + 1); if (_SUCCESS != status) { return status; } } // end of list status = _LLTWrite_8812A(padapter, (txpktbuf_bndy - 1), 0xFF); if (_SUCCESS != status) { return status; } // Make the other pages as ring buffer // This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. // Otherwise used as local loopback buffer. for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) { status = _LLTWrite_8812A(padapter, i, (i + 1)); if (_SUCCESS != status) { return status; } } // Let last entry point to the start entry of ring buffer status = _LLTWrite_8812A(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy); if (_SUCCESS != status) { return status; } } return status; } BOOLEAN HalDetectPwrDownMode8812(PADAPTER Adapter) { u8 tmpvalue = 0; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter); EFUSE_ShadowRead(Adapter, 1, EEPROM_RF_OPT3_92C, (u32 *)&tmpvalue); // 2010/08/25 MH INF priority > PDN Efuse value. if(tmpvalue & BIT(4) && pwrctrlpriv->reg_pdnmode) { pHalData->pwrdown = _TRUE; } else { pHalData->pwrdown = _FALSE; } DBG_8192C("HalDetectPwrDownMode(): PDN=%d\n", pHalData->pwrdown); return pHalData->pwrdown; } // HalDetectPwrDownMode #ifdef CONFIG_WOWLAN void Hal_DetectWoWMode(PADAPTER pAdapter) { adapter_to_pwrctl(pAdapter)->bSupportRemoteWakeup = _TRUE; DBG_871X("%s\n", __func__); } #endif //==================================================================================== // // 20100209 Joseph: // This function is used only for 92C to set REG_BCN_CTRL(0x550) register. // We just reserve the value of the register in variable pHalData->RegBcnCtrlVal and then operate // the value of the register via atomic operation. // This prevents from race condition when setting this register. // The value of pHalData->RegBcnCtrlVal is initialized in HwConfigureRTL8192CE() function. // void SetBcnCtrlReg( PADAPTER padapter, u8 SetBits, u8 ClearBits) { PHAL_DATA_TYPE pHalData; pHalData = GET_HAL_DATA(padapter); pHalData->RegBcnCtrlVal |= SetBits; pHalData->RegBcnCtrlVal &= ~ClearBits; #if 0 //#ifdef CONFIG_SDIO_HCI if (pHalData->sdio_himr & (SDIO_HIMR_TXBCNOK_MSK | SDIO_HIMR_TXBCNERR_MSK)) pHalData->RegBcnCtrlVal |= EN_TXBCN_RPT; #endif rtw_write8(padapter, REG_BCN_CTRL, (u8)pHalData->RegBcnCtrlVal); } static VOID _FWDownloadEnable_8812( IN PADAPTER padapter, IN BOOLEAN enable ) { u8 tmp; if(enable) { // MCU firmware download enable. tmp = rtw_read8(padapter, REG_MCUFWDL); rtw_write8(padapter, REG_MCUFWDL, tmp|0x01); // 8051 reset tmp = rtw_read8(padapter, REG_MCUFWDL+2); rtw_write8(padapter, REG_MCUFWDL+2, tmp&0xf7); } else { // MCU firmware download disable. tmp = rtw_read8(padapter, REG_MCUFWDL); rtw_write8(padapter, REG_MCUFWDL, tmp&0xfe); } } #define MAX_REG_BOLCK_SIZE 196 static int _BlockWrite_8812( IN PADAPTER padapter, IN PVOID buffer, IN u32 buffSize ) { int ret = _SUCCESS; u32 blockSize_p1 = 4; // (Default) Phase #1 : PCI muse use 4-byte write to download FW u32 blockSize_p2 = 8; // Phase #2 : Use 8-byte, if Phase#1 use big size to write FW. u32 blockSize_p3 = 1; // Phase #3 : Use 1-byte, the remnant of FW image. u32 blockCount_p1 = 0, blockCount_p2 = 0, blockCount_p3 = 0; u32 remainSize_p1 = 0, remainSize_p2 = 0; u8 *bufferPtr = (u8*)buffer; u32 i=0, offset=0; #ifdef CONFIG_PCI_HCI u8 remainFW[4] = {0, 0, 0, 0}; u8 *p = NULL; #endif #ifdef CONFIG_USB_HCI blockSize_p1 = MAX_REG_BOLCK_SIZE; #endif //3 Phase #1 blockCount_p1 = buffSize / blockSize_p1; remainSize_p1 = buffSize % blockSize_p1; if (blockCount_p1) { RT_TRACE(_module_hal_init_c_, _drv_notice_, ("_BlockWrite: [P1] buffSize(%d) blockSize_p1(%d) blockCount_p1(%d) remainSize_p1(%d)\n", buffSize, blockSize_p1, blockCount_p1, remainSize_p1)); } for (i = 0; i < blockCount_p1; i++) { #ifdef CONFIG_USB_HCI ret = rtw_writeN(padapter, (FW_START_ADDRESS + i * blockSize_p1), blockSize_p1, (bufferPtr + i * blockSize_p1)); #else ret = rtw_write32(padapter, (FW_START_ADDRESS + i * blockSize_p1), le32_to_cpu(*((u32*)(bufferPtr + i * blockSize_p1)))); #endif if(ret == _FAIL) goto exit; } #ifdef CONFIG_PCI_HCI p = (u8*)((u32*)(bufferPtr + blockCount_p1 * blockSize_p1)); if (remainSize_p1) { switch (remainSize_p1) { case 0: break; case 3: remainFW[2]=*(p+2); case 2: remainFW[1]=*(p+1); case 1: remainFW[0]=*(p); ret = rtw_write32(padapter, (FW_START_ADDRESS + blockCount_p1 * blockSize_p1), le32_to_cpu(*(u32*)remainFW)); } return ret; } #endif //3 Phase #2 if (remainSize_p1) { offset = blockCount_p1 * blockSize_p1; blockCount_p2 = remainSize_p1/blockSize_p2; remainSize_p2 = remainSize_p1%blockSize_p2; if (blockCount_p2) { RT_TRACE(_module_hal_init_c_, _drv_notice_, ("_BlockWrite: [P2] buffSize_p2(%d) blockSize_p2(%d) blockCount_p2(%d) remainSize_p2(%d)\n", (buffSize-offset), blockSize_p2 ,blockCount_p2, remainSize_p2)); } #ifdef CONFIG_USB_HCI for (i = 0; i < blockCount_p2; i++) { ret = rtw_writeN(padapter, (FW_START_ADDRESS + offset + i*blockSize_p2), blockSize_p2, (bufferPtr + offset + i*blockSize_p2)); if(ret == _FAIL) goto exit; } #endif } //3 Phase #3 if (remainSize_p2) { offset = (blockCount_p1 * blockSize_p1) + (blockCount_p2 * blockSize_p2); blockCount_p3 = remainSize_p2 / blockSize_p3; RT_TRACE(_module_hal_init_c_, _drv_notice_, ("_BlockWrite: [P3] buffSize_p3(%d) blockSize_p3(%d) blockCount_p3(%d)\n", (buffSize-offset), blockSize_p3, blockCount_p3)); for(i = 0 ; i < blockCount_p3 ; i++){ ret =rtw_write8(padapter, (FW_START_ADDRESS + offset + i), *(bufferPtr + offset + i)); if(ret == _FAIL) goto exit; } } exit: return ret; } static int _PageWrite_8812( IN PADAPTER padapter, IN u32 page, IN PVOID buffer, IN u32 size ) { u8 value8; u8 u8Page = (u8) (page & 0x07) ; value8 = (rtw_read8(padapter, REG_MCUFWDL+2) & 0xF8) | u8Page ; rtw_write8(padapter, REG_MCUFWDL+2,value8); return _BlockWrite_8812(padapter,buffer,size); } static VOID _FillDummy_8812( u8* pFwBuf, u32* pFwLen ) { u32 FwLen = *pFwLen; u8 remain = (u8)(FwLen%4); remain = (remain==0)?0:(4-remain); while(remain>0) { pFwBuf[FwLen] = 0; FwLen++; remain--; } *pFwLen = FwLen; } static int _WriteFW_8812( IN PADAPTER padapter, IN PVOID buffer, IN u32 size ) { // Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. // We can remove _ReadChipVersion from ReadpadapterInfo8192C later. int ret = _SUCCESS; u32 pageNums,remainSize ; u32 page, offset; u8 *bufferPtr = (u8*)buffer; #ifdef CONFIG_PCI_HCI // 20100120 Joseph: Add for 88CE normal chip. // Fill in zero to make firmware image to dword alignment. // _FillDummy(bufferPtr, &size); #endif pageNums = size / MAX_DLFW_PAGE_SIZE ; //RT_ASSERT((pageNums <= 4), ("Page numbers should not greater then 4 \n")); remainSize = size % MAX_DLFW_PAGE_SIZE; for (page = 0; page < pageNums; page++) { offset = page * MAX_DLFW_PAGE_SIZE; ret = _PageWrite_8812(padapter, page, bufferPtr+offset, MAX_DLFW_PAGE_SIZE); if(ret == _FAIL) goto exit; } if (remainSize) { offset = pageNums * MAX_DLFW_PAGE_SIZE; page = pageNums; ret = _PageWrite_8812(padapter, page, bufferPtr+offset, remainSize); if(ret == _FAIL) goto exit; } RT_TRACE(_module_hal_init_c_, _drv_info_, ("_WriteFW Done- for Normal chip.\n")); exit: return ret; } void _8051Reset8812(PADAPTER padapter) { u8 u1bTmp, u1bTmp2; // Reset MCU IO Wrapper- sugggest by SD1-Gimmy if(IS_HARDWARE_TYPE_8812(padapter)) { u1bTmp2 = rtw_read8(padapter, REG_RSV_CTRL); rtw_write8(padapter, REG_RSV_CTRL, u1bTmp2&(~BIT1)); u1bTmp2 = rtw_read8(padapter, REG_RSV_CTRL+1); rtw_write8(padapter, REG_RSV_CTRL+1, u1bTmp2&(~BIT3)); } else if(IS_HARDWARE_TYPE_8821(padapter)) { u1bTmp2 = rtw_read8(padapter, REG_RSV_CTRL); rtw_write8(padapter, REG_RSV_CTRL, u1bTmp2&(~BIT1)); u1bTmp2 = rtw_read8(padapter, REG_RSV_CTRL+1); rtw_write8(padapter, REG_RSV_CTRL+1, u1bTmp2&(~BIT0)); } u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1); rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT2)); // Enable MCU IO Wrapper if(IS_HARDWARE_TYPE_8812(padapter)) { u1bTmp2 = rtw_read8(padapter, REG_RSV_CTRL); rtw_write8(padapter, REG_RSV_CTRL, u1bTmp2&(~BIT1)); u1bTmp2 = rtw_read8(padapter, REG_RSV_CTRL+1); rtw_write8(padapter, REG_RSV_CTRL+1, u1bTmp2 |(BIT3)); } else if(IS_HARDWARE_TYPE_8821(padapter)) { u1bTmp2 = rtw_read8(padapter, REG_RSV_CTRL); rtw_write8(padapter, REG_RSV_CTRL, u1bTmp2&(~BIT1)); u1bTmp2 = rtw_read8(padapter, REG_RSV_CTRL+1); rtw_write8(padapter, REG_RSV_CTRL+1, u1bTmp2|(BIT0)); } rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp|(BIT2)); DBG_871X("=====> _8051Reset8812(): 8051 reset success .\n"); } static s32 polling_fwdl_chksum(_adapter *adapter, u32 min_cnt, u32 timeout_ms) { s32 ret = _FAIL; u32 value32; u32 start = rtw_get_current_time(); u32 cnt = 0; /* polling CheckSum report */ do { cnt++; value32 = rtw_read32(adapter, REG_MCUFWDL); if (value32 & FWDL_ChkSum_rpt || adapter->bSurpriseRemoved || adapter->bDriverStopped) break; rtw_yield_os(); } while (rtw_get_passing_time_ms(start) < timeout_ms || cnt < min_cnt); if (!(value32 & FWDL_ChkSum_rpt)) { goto exit; } if (rtw_fwdl_test_trigger_chksum_fail()) goto exit; ret = _SUCCESS; exit: DBG_871X("%s: Checksum report %s! (%u, %dms), REG_MCUFWDL:0x%08x\n", __FUNCTION__ , (ret==_SUCCESS)?"OK":"Fail", cnt, rtw_get_passing_time_ms(start), value32); return ret; } static s32 _FWFreeToGo8812(_adapter *adapter, u32 min_cnt, u32 timeout_ms) { s32 ret = _FAIL; u32 value32; u32 start = rtw_get_current_time(); u32 cnt = 0; value32 = rtw_read32(adapter, REG_MCUFWDL); value32 |= MCUFWDL_RDY; value32 &= ~WINTINI_RDY; rtw_write32(adapter, REG_MCUFWDL, value32); _8051Reset8812(adapter); /* polling for FW ready */ do { cnt++; value32 = rtw_read32(adapter, REG_MCUFWDL); if (value32 & WINTINI_RDY || adapter->bSurpriseRemoved || adapter->bDriverStopped) break; rtw_yield_os(); } while (rtw_get_passing_time_ms(start) < timeout_ms || cnt < min_cnt); if (!(value32 & WINTINI_RDY)) { goto exit; } if (rtw_fwdl_test_trigger_wintint_rdy_fail()) goto exit; ret = _SUCCESS; exit: DBG_871X("%s: Polling FW ready %s! (%u, %dms), REG_MCUFWDL:0x%08x\n", __FUNCTION__ , (ret==_SUCCESS)?"OK":"Fail", cnt, rtw_get_passing_time_ms(start), value32); return ret; } #ifdef CONFIG_FILE_FWIMG extern char *rtw_fw_file_path; u8 FwBuffer8812[FW_SIZE_8812]; #ifdef CONFIG_MP_INCLUDED extern char *rtw_fw_mp_bt_file_path; #endif // CONFIG_MP_INCLUDED u8 FwBuffer[FW_SIZE_8812]; #endif //CONFIG_FILE_FWIMG s32 FirmwareDownload8812( IN PADAPTER Adapter, IN BOOLEAN bUsedWoWLANFw ) { s32 rtStatus = _SUCCESS; u8 write_fw = 0; u32 fwdl_start_time; PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); u8 *pFwImageFileName; u8 *pucMappedFile = NULL; PRT_FIRMWARE_8812 pFirmware = NULL; u8 *pFwHdr = NULL; u8 *pFirmwareBuf; u32 FirmwareLen; RT_TRACE(_module_hal_init_c_, _drv_info_, ("+%s\n", __FUNCTION__)); pFirmware = (PRT_FIRMWARE_8812)rtw_zmalloc(sizeof(RT_FIRMWARE_8812)); if(!pFirmware) { rtStatus = _FAIL; goto exit; } #ifdef CONFIG_FILE_FWIMG if(rtw_is_file_readable(rtw_fw_file_path) == _TRUE) { DBG_871X("%s accquire FW from file:%s\n", __FUNCTION__, rtw_fw_file_path); pFirmware->eFWSource = FW_SOURCE_IMG_FILE; } else #endif //CONFIG_FILE_FWIMG { DBG_871X("%s fw source from Header\n", __FUNCTION__); pFirmware->eFWSource = FW_SOURCE_HEADER_FILE; } switch(pFirmware->eFWSource) { case FW_SOURCE_IMG_FILE: #ifdef CONFIG_FILE_FWIMG rtStatus = rtw_retrive_from_file(rtw_fw_file_path, FwBuffer8812, FW_SIZE_8812); pFirmware->ulFwLength = rtStatus>=0?rtStatus:0; pFirmware->szFwBuffer = FwBuffer8812; #endif //CONFIG_FILE_FWIMG break; case FW_SOURCE_HEADER_FILE: #ifdef CONFIG_WOWLAN if (bUsedWoWLANFw) { ODM_ConfigFWWithHeaderFile(&pHalData->odmpriv, CONFIG_FW_WoWLAN, (u8 *)&(pFirmware->szFwBuffer), &(pFirmware->ulFwLength)); DBG_871X("%s fw:%s, size: %d\n", __FUNCTION__, "WoWLAN", pFirmware->ulFwLength); } else #endif /* CONFIG_WOWLAN */ #ifdef CONFIG_BT_COEXIST if (pHalData->EEPROMBluetoothCoexist == _TRUE) { ODM_ConfigFWWithHeaderFile(&pHalData->odmpriv, CONFIG_FW_BT, (u8 *)&(pFirmware->szFwBuffer), &(pFirmware->ulFwLength)); DBG_871X("%s fw:%s, size: %d\n", __FUNCTION__, "NIC-BTCOEX", pFirmware->ulFwLength); } else #endif /* CONFIG_BT_COEXIST */ { ODM_ConfigFWWithHeaderFile(&pHalData->odmpriv, CONFIG_FW_NIC, (u8 *)&(pFirmware->szFwBuffer), &(pFirmware->ulFwLength)); DBG_871X("%s fw:%s, size: %d\n", __FUNCTION__, "NIC", pFirmware->ulFwLength); } break; } if (pFirmware->ulFwLength > FW_SIZE_8812) { rtStatus = _FAIL; DBG_871X_LEVEL(_drv_emerg_, "Firmware size:%u exceed %u\n", pFirmware->ulFwLength, FW_SIZE_8812); goto exit; } pFirmwareBuf = pFirmware->szFwBuffer; FirmwareLen = pFirmware->ulFwLength; pFwHdr = (u8 *)pFirmware->szFwBuffer; pHalData->FirmwareVersion = (u16)GET_FIRMWARE_HDR_VERSION_8812(pFwHdr); pHalData->FirmwareSubVersion = (u16)GET_FIRMWARE_HDR_SUB_VER_8812(pFwHdr); pHalData->FirmwareSignature = (u16)GET_FIRMWARE_HDR_SIGNATURE_8812(pFwHdr); DBG_871X ("%s: fw_ver=%d fw_subver=%d sig=0x%x\n", __FUNCTION__, pHalData->FirmwareVersion, pHalData->FirmwareSubVersion, pHalData->FirmwareSignature); if (IS_FW_HEADER_EXIST_8812(pFwHdr) || IS_FW_HEADER_EXIST_8821(pFwHdr)) { // Shift 32 bytes for FW header pFirmwareBuf = pFirmwareBuf + 32; FirmwareLen = FirmwareLen - 32; } // Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself, // or it will cause download Fw fail. 2010.02.01. by tynli. if (rtw_read8(Adapter, REG_MCUFWDL) & BIT7) //8051 RAM code { rtw_write8(Adapter, REG_MCUFWDL, 0x00); _8051Reset8812(Adapter); } _FWDownloadEnable_8812(Adapter, _TRUE); fwdl_start_time = rtw_get_current_time(); while(!Adapter->bDriverStopped && !Adapter->bSurpriseRemoved && (write_fw++ < 3 || rtw_get_passing_time_ms(fwdl_start_time) < 500)) { /* reset FWDL chksum */ rtw_write8(Adapter, REG_MCUFWDL, rtw_read8(Adapter, REG_MCUFWDL)|FWDL_ChkSum_rpt); rtStatus = _WriteFW_8812(Adapter, pFirmwareBuf, FirmwareLen); if (rtStatus != _SUCCESS) continue; rtStatus = polling_fwdl_chksum(Adapter, 5, 50); if (rtStatus == _SUCCESS) break; } _FWDownloadEnable_8812(Adapter, _FALSE); if(_SUCCESS != rtStatus) goto fwdl_stat; rtStatus = _FWFreeToGo8812(Adapter, 10, 200); if (_SUCCESS != rtStatus) goto fwdl_stat; if(IS_HARDWARE_TYPE_8821(Adapter)) { //to do download BT } fwdl_stat: DBG_871X("FWDL %s. write_fw:%u, %dms\n" , (rtStatus == _SUCCESS)?"success":"fail" , write_fw , rtw_get_passing_time_ms(fwdl_start_time) ); exit: if (pFirmware) rtw_mfree((u8*)pFirmware, sizeof(RT_FIRMWARE_8812)); #ifdef CONFIG_WOWLAN if (adapter_to_pwrctl(Adapter)->wowlan_mode) InitializeFirmwareVars8812(Adapter); else DBG_871X_LEVEL(_drv_always_, "%s: wowland_mode:%d wowlan_wake_reason:%d\n", __func__, adapter_to_pwrctl(Adapter)->wowlan_mode, adapter_to_pwrctl(Adapter)->wowlan_wake_reason); #endif return rtStatus; } void InitializeFirmwareVars8812(PADAPTER padapter) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); // Init Fw LPS related. pwrpriv->bFwCurrentInPSMode = _FALSE; // Init H2C counter. by tynli. 2009.12.09. pHalData->LastHMEBoxNum = 0; } // // Description: Determine the contents of H2C BT_FW_PATCH Command sent to FW. // 2013.01.23 by tynli // Porting from 8723B. 2013.04.01 // VOID SetFwBTFwPatchCmd_8821( IN PADAPTER Adapter, IN u2Byte FwSize ) { u1Byte u1BTFwPatchParm[6]={0}; DBG_871X("SetFwBTFwPatchCmd_8821(): FwSize = %d\n", FwSize); //SET_8812_H2CCMD_BT_FW_PATCH_ENABLE(u1BTFwPatchParm, 1); SET_8812_H2CCMD_BT_FW_PATCH_SIZE(u1BTFwPatchParm, FwSize); SET_8812_H2CCMD_BT_FW_PATCH_ADDR0(u1BTFwPatchParm, 0); SET_8812_H2CCMD_BT_FW_PATCH_ADDR1(u1BTFwPatchParm, 0xa0); SET_8812_H2CCMD_BT_FW_PATCH_ADDR2(u1BTFwPatchParm, 0x10); SET_8812_H2CCMD_BT_FW_PATCH_ADDR3(u1BTFwPatchParm, 0x80); FillH2CCmd_8812(Adapter, H2C_8812_BT_FW_PATCH, 6 , u1BTFwPatchParm); } int _CheckWLANFwPatchBTFwReady_8821A( PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u4Byte count=0; u1Byte u1bTmp; int ret = _FAIL; #if (DEV_BUS_TYPE == RT_SDIO_INTERFACE) u4Byte txpktbuf_bndy; #endif //--------------------------------------------------------- // Check if BT FW patch procedure is ready. //--------------------------------------------------------- do{ u1bTmp = PlatformEFIORead1Byte(Adapter, REG_FW_DRV_MSG_8812); if((u1bTmp&BIT6) || (u1bTmp&BIT7)) { ret = _SUCCESS; break; } count++; RT_TRACE(_module_mp_, _drv_info_,("0x81=%x, wait for 50 ms (%d) times.\n", u1bTmp, count)); rtw_msleep_os(50); // 50ms }while(!((u1bTmp&BIT6) || (u1bTmp&BIT7)) && count < 50); RT_TRACE(_module_mp_, _drv_notice_,("_CheckWLANFwPatchBTFwReady():" " Polling ready bit 0x88[6:7] for %d times.\n", count)); if(count >= 50) { DBG_871X("_CheckWLANFwPatchBTFwReady():" " Polling ready bit 0x88[6:7] FAIL!!\n"); } //--------------------------------------------------------- // Reset beacon setting to the initial value. //--------------------------------------------------------- #if (DEV_BUS_TYPE == RT_SDIO_INTERFACE) #if 0 if(!Adapter->MgntInfo.bWiFiConfg) { txpktbuf_bndy = TX_PAGE_BOUNDARY_8821; } else #endif {// for WMM txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_8821; } ret = InitLLTTable8812A(Adapter, txpktbuf_bndy); if(_SUCCESS != ret){ DBG_871X("_CheckWLANFwPatchBTFwReady_8821A(): Failed to init LLT!\n"); } // Init Tx boundary. PlatformEFIOWrite1Byte(Adapter, REG_TDECTRL+1, (u1Byte)txpktbuf_bndy); #endif SetBcnCtrlReg(Adapter, BIT3, 0); SetBcnCtrlReg(Adapter, 0, BIT4); PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl|BIT6)); pHalData->RegFwHwTxQCtrl |= BIT6; u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR+1); PlatformEFIOWrite1Byte(Adapter, REG_CR+1, (u1bTmp&(~BIT0))); return ret; } int _WriteBTFWtoTxPktBuf8812( PADAPTER Adapter, PVOID buffer, u4Byte FwBufLen, u1Byte times ) { int rtStatus = _SUCCESS; //u4Byte value32; //u1Byte numHQ, numLQ, numPubQ;//, txpktbuf_bndy; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); u1Byte BcnValidReg; u1Byte count=0, DLBcnCount=0; pu1Byte FwbufferPtr = (pu1Byte)buffer; //PRT_TCB pTcb, ptempTcb; //PRT_TX_LOCAL_BUFFER pBuf; BOOLEAN bRecover=_FALSE; pu1Byte ReservedPagePacket = NULL; pu1Byte pGenBufReservedPagePacket = NULL; u4Byte TotalPktLen,txpktbuf_bndy; //u1Byte tmpReg422; //u1Byte u1bTmp; u8 *pframe; struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; u8 txdesc_offset = TXDESC_OFFSET; u8 val8; #if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE) TotalPktLen = FwBufLen; #else TotalPktLen = FwBufLen+pHalData->HWDescHeadLength; #endif if((TotalPktLen+TXDESC_OFFSET) > MAX_CMDBUF_SZ) { DBG_871X(" WARNING %s => Total packet len = %d over MAX_CMDBUF_SZ:%d \n" ,__FUNCTION__,(TotalPktLen+TXDESC_OFFSET),MAX_CMDBUF_SZ); return _FAIL; } pGenBufReservedPagePacket = rtw_zmalloc(TotalPktLen);//GetGenTempBuffer (Adapter, TotalPktLen); if (!pGenBufReservedPagePacket) return _FAIL; ReservedPagePacket = (u1Byte *)pGenBufReservedPagePacket; _rtw_memset(ReservedPagePacket, 0, TotalPktLen); #if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE) _rtw_memcpy(ReservedPagePacket, FwbufferPtr, FwBufLen); #else PlatformMoveMemory(ReservedPagePacket+Adapter->HWDescHeadLength , FwbufferPtr, FwBufLen); #endif //--------------------------------------------------------- // 1. Pause BCN //--------------------------------------------------------- //Set REG_CR bit 8. DMA beacon by SW. #if 0//(DEV_BUS_TYPE == RT_PCI_INTERFACE) u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR+1); PlatformEFIOWrite1Byte(Adapter, REG_CR+1, (u1bTmp|BIT0)); #else // Remove for temparaily because of the code on v2002 is not sync to MERGE_TMEP for USB/SDIO. // De not remove this part on MERGE_TEMP. by tynli. //pHalData->RegCR_1 |= (BIT0); //PlatformEFIOWrite1Byte(Adapter, REG_CR+1, pHalData->RegCR_1); #endif // Disable Hw protection for a time which revserd for Hw sending beacon. // Fix download reserved page packet fail that access collision with the protection time. // 2010.05.11. Added by tynli. val8 = rtw_read8(Adapter, REG_BCN_CTRL); val8 &= ~BIT(3); val8 |= BIT(4); rtw_write8(Adapter, REG_BCN_CTRL, val8); #if 0//(DEV_BUS_TYPE == RT_PCI_INTERFACE) tmpReg422 = PlatformEFIORead1Byte(Adapter, REG_FWHW_TXQ_CTRL+2); if( tmpReg422&BIT6) bRecover = TRUE; PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL+2, tmpReg422&(~BIT6)); #else // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. if(pHalData->RegFwHwTxQCtrl & BIT(6)) bRecover=_TRUE; PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl&(~BIT(6)))); pHalData->RegFwHwTxQCtrl &= (~ BIT(6)); #endif //--------------------------------------------------------- // 2. Adjust LLT table to an even boundary. //--------------------------------------------------------- #if 0//(DEV_BUS_TYPE == RT_SDIO_INTERFACE) txpktbuf_bndy = 10; // rsvd page start address should be an even value. rtStatus = InitLLTTable8723BS(Adapter, txpktbuf_bndy); if(RT_STATUS_SUCCESS != rtStatus){ DBG_8192C("_CheckWLANFwPatchBTFwReady_8723B(): Failed to init LLT!\n"); return RT_STATUS_FAILURE; } // Init Tx boundary. PlatformEFIOWrite1Byte(Adapter, REG_DWBCN0_CTRL_8723B+1, (u1Byte)txpktbuf_bndy); #endif //--------------------------------------------------------- // 3. Write Fw to Tx packet buffer by reseverd page. //--------------------------------------------------------- do { // download rsvd page. // Clear beacon valid check bit. BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_TDECTRL+2); PlatformEFIOWrite1Byte(Adapter, REG_TDECTRL+2, BcnValidReg&(~BIT(0))); //BT patch is big, we should set 0x209 < 0x40 suggested from Gimmy RT_TRACE(_module_mp_, _drv_info_,("0x209:%x\n", PlatformEFIORead1Byte(Adapter, REG_TDECTRL+1)));//209 < 0x40 PlatformEFIOWrite1Byte(Adapter, REG_TDECTRL+1, (0x90-0x20*(times-1))); DBG_871X("0x209:0x%x\n", PlatformEFIORead1Byte(Adapter, REG_TDECTRL+1)); RT_TRACE(_module_mp_, _drv_info_,("0x209:%x\n", PlatformEFIORead1Byte(Adapter, REG_TDECTRL+1))); #if 0 // Acquice TX spin lock before GetFwBuf and send the packet to prevent system deadlock. // Advertised by Roger. Added by tynli. 2010.02.22. PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); if(MgntGetFWBuffer(Adapter, &pTcb, &pBuf)) { PlatformMoveMemory(pBuf->Buffer.VirtualAddress, ReservedPagePacket, TotalPktLen); CmdSendPacket(Adapter, pTcb, pBuf, TotalPktLen, DESC_PACKET_TYPE_NORMAL, FALSE); } else dbgdump("SetFwRsvdPagePkt(): MgntGetFWBuffer FAIL!!!!!!!!.\n"); PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); #else /*--------------------------------------------------------- tx reserved_page_packet ----------------------------------------------------------*/ if ((pmgntframe = rtw_alloc_cmdxmitframe(pxmitpriv)) == NULL) { rtStatus = _FAIL; goto exit; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(Adapter, pattrib); pattrib->qsel = QSLT_BEACON; pattrib->pktlen = pattrib->last_txcmdsz = FwBufLen ; //_rtw_memset(pmgntframe->buf_addr, 0, TotalPktLen+txdesc_size); //pmgntframe->buf_addr = ReservedPagePacket ; _rtw_memcpy( (u8*) (pmgntframe->buf_addr + txdesc_offset), ReservedPagePacket, FwBufLen); DBG_871X("[%d]===>TotalPktLen + TXDESC_OFFSET TotalPacketLen:%d \n", DLBcnCount, (FwBufLen + txdesc_offset)); #ifdef CONFIG_PCI_HCI dump_mgntframe(Adapter, pmgntframe); #else dump_mgntframe_and_wait(Adapter, pmgntframe, 100); #endif #endif #if 1 // check rsvd page download OK. BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_TDECTRL+2); while(!(BcnValidReg & BIT(0)) && count <200) { count++; //PlatformSleepUs(10); rtw_msleep_os(1); BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_TDECTRL+2); RT_TRACE(_module_mp_, _drv_notice_,("Poll 0x20A = %x\n", BcnValidReg)); } DLBcnCount++; //DBG_871X("##0x208:%08x,0x210=%08x\n",PlatformEFIORead4Byte(Adapter, REG_TDECTRL),PlatformEFIORead4Byte(Adapter, 0x210)); PlatformEFIOWrite1Byte(Adapter, REG_TDECTRL+2,BcnValidReg); }while((!(BcnValidReg&BIT(0))) && DLBcnCount<5); #endif if(DLBcnCount >=5){ DBG_871X(" check rsvd page download OK DLBcnCount =%d \n",DLBcnCount); rtStatus = _FAIL; goto exit; } if(!(BcnValidReg&BIT(0))) { DBG_871X("_WriteFWtoTxPktBuf(): 1 Download RSVD page failed!\n"); rtStatus = _FAIL; goto exit; } //--------------------------------------------------------- // 4. Set Tx boundary to the initial value //--------------------------------------------------------- //--------------------------------------------------------- // 5. Reset beacon setting to the initial value. // After _CheckWLANFwPatchBTFwReady(). //--------------------------------------------------------- exit: if(pGenBufReservedPagePacket) { DBG_871X("_WriteBTFWtoTxPktBuf8723B => rtw_mfree pGenBufReservedPagePacket!\n"); rtw_mfree((u8*)pGenBufReservedPagePacket, TotalPktLen); } return rtStatus; } int ReservedPage_Compare(PADAPTER Adapter,PRT_MP_FIRMWARE pFirmware,u32 BTPatchSize) { u8 temp,ret,lastBTsz; u32 u1bTmp=0,address_start=0,count=0,i=0; u8 *myBTFwBuffer = NULL; myBTFwBuffer = rtw_zmalloc(BTPatchSize); if (myBTFwBuffer == NULL) { DBG_871X("%s can't be executed due to the failed malloc.\n", __FUNCTION__); Adapter->mppriv.bTxBufCkFail=_TRUE; return _FALSE; } temp=rtw_read8(Adapter,0x209); address_start=(temp*128)/8; rtw_write32(Adapter,0x140,0x00000000); rtw_write32(Adapter,0x144,0x00000000); rtw_write32(Adapter,0x148,0x00000000); rtw_write8(Adapter,0x106,0x69); for(i=0;i<(BTPatchSize/8);i++) { rtw_write32(Adapter,0x140,address_start+5+i) ; //polling until reg 0x140[23]=1; do{ u1bTmp = rtw_read32(Adapter, 0x140); if(u1bTmp&BIT(23)) { ret = _SUCCESS; break; } count++; DBG_871X("0x140=%x, wait for 10 ms (%d) times.\n",u1bTmp, count); rtw_msleep_os(10); // 10ms }while(!(u1bTmp&BIT(23)) && count < 50); myBTFwBuffer[i*8+0]=rtw_read8(Adapter, 0x144); myBTFwBuffer[i*8+1]=rtw_read8(Adapter, 0x145); myBTFwBuffer[i*8+2]=rtw_read8(Adapter, 0x146); myBTFwBuffer[i*8+3]=rtw_read8(Adapter, 0x147); myBTFwBuffer[i*8+4]=rtw_read8(Adapter, 0x148); myBTFwBuffer[i*8+5]=rtw_read8(Adapter, 0x149); myBTFwBuffer[i*8+6]=rtw_read8(Adapter, 0x14a); myBTFwBuffer[i*8+7]=rtw_read8(Adapter, 0x14b); } rtw_write32(Adapter,0x140,address_start+5+BTPatchSize/8) ; lastBTsz=BTPatchSize%8; //polling until reg 0x140[23]=1; u1bTmp=0; count=0; do{ u1bTmp = rtw_read32(Adapter, 0x140); if(u1bTmp&BIT(23)) { ret = _SUCCESS; break; } count++; DBG_871X("0x140=%x, wait for 10 ms (%d) times.\n",u1bTmp, count); rtw_msleep_os(10); // 10ms }while(!(u1bTmp&BIT(23)) && count < 50); for(i=0;iszFwBuffer[i]) { DBG_871X(" In direct myBTFwBuffer[%d]=%x , pFirmware->szFwBuffer=%x\n",i, myBTFwBuffer[i],pFirmware->szFwBuffer[i]); Adapter->mppriv.bTxBufCkFail=_TRUE; break; } } if (myBTFwBuffer != NULL) { rtw_mfree(myBTFwBuffer, BTPatchSize); } return _TRUE; } #ifdef CONFIG_RTL8821A s32 FirmwareDownloadBT(PADAPTER padapter, PRT_MP_FIRMWARE pFirmware) { s32 rtStatus; u8 *pBTFirmwareBuf; u32 BTFirmwareLen; u8 download_time; s8 i; rtStatus = _SUCCESS; pBTFirmwareBuf = NULL; BTFirmwareLen = 0; // // Patch BT Fw. Download BT RAM code to Tx packet buffer. // if (padapter->bBTFWReady) { DBG_8192C("%s: BT Firmware is ready!!\n", __FUNCTION__); return _FAIL; } #ifdef CONFIG_FILE_FWIMG if (rtw_is_file_readable(rtw_fw_mp_bt_file_path) == _TRUE) { DBG_8192C("%s: accquire MP BT FW from file:%s\n", __FUNCTION__, rtw_fw_mp_bt_file_path); rtStatus = rtw_retrive_from_file(rtw_fw_mp_bt_file_path, FwBuffer, 0x8000); BTFirmwareLen = rtStatus>=0?rtStatus:0; pBTFirmwareBuf = FwBuffer; } else #endif // CONFIG_FILE_FWIMG { #ifdef CONFIG_EMBEDDED_FWIMG DBG_8192C("%s: Download MP BT FW from header\n", __FUNCTION__); pBTFirmwareBuf = (u8*)Rtl8821A_BT_MP_Patch_FW; BTFirmwareLen = Rtl8812BFwBTImgArrayLength; pFirmware->szFwBuffer = pBTFirmwareBuf; pFirmware->ulFwLength = BTFirmwareLen; #endif // CONFIG_EMBEDDED_FWIMG } DBG_8192C("%s: MP BT Firmware size=%d\n", __FUNCTION__, BTFirmwareLen); // for h2c cam here should be set to true padapter->bFWReady = _TRUE; download_time = (BTFirmwareLen + 4095) / 4096; DBG_8192C("%s: download_time is %d\n", __FUNCTION__, download_time); // Download BT patch Fw. for (i = (download_time-1); i >= 0; i--) { if (i == (download_time - 1)) { rtStatus = _WriteBTFWtoTxPktBuf8812(padapter, pBTFirmwareBuf+(4096*i), (BTFirmwareLen-(4096*i)), 1); DBG_8192C("%s: start %d, len %d, time 1\n", __FUNCTION__, 4096*i, BTFirmwareLen-(4096*i)); } else { rtStatus = _WriteBTFWtoTxPktBuf8812(padapter, pBTFirmwareBuf+(4096*i), 4096, (download_time-i)); DBG_8192C("%s: start %d, len 4096, time %d\n", __FUNCTION__, 4096*i, download_time-i); } if (rtStatus != _SUCCESS) { DBG_8192C("%s: BT Firmware download to Tx packet buffer fail!\n", __FUNCTION__); padapter->bBTFWReady = _FALSE; return rtStatus; } } ReservedPage_Compare(padapter,pFirmware,BTFirmwareLen); padapter->bBTFWReady = _TRUE; SetFwBTFwPatchCmd_8821(padapter, (u16)BTFirmwareLen); rtStatus = _CheckWLANFwPatchBTFwReady_8821A(padapter); DBG_8192C("<===%s: return %s!\n", __FUNCTION__, rtStatus==_SUCCESS?"SUCCESS":"FAIL"); return rtStatus; } #endif #ifdef CONFIG_WOWLAN //=========================================== // // Description: Prepare some information to Fw for WoWLAN. // (1) Download wowlan Fw. // (2) Download RSVD page packets. // (3) Enable AP offload if needed. // // 2011.04.12 by tynli. // VOID SetFwRelatedForWoWLAN8812( IN PADAPTER padapter, IN u8 bHostIsGoingtoSleep ) { int status=_FAIL; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); u8 bRecover = _FALSE; // // 1. Before WoWLAN we need to re-download WoWLAN Fw. // status = FirmwareDownload8812(padapter, bHostIsGoingtoSleep); if(status != _SUCCESS) { DBG_871X("SetFwRelatedForWoWLAN8812(): Re-Download Firmware failed!!\n"); return; } else { DBG_871X("SetFwRelatedForWoWLAN8812(): Re-Download Firmware Success !!\n"); } // // 2. Re-Init the variables about Fw related setting. // InitializeFirmwareVars8812(padapter); } #endif //CONFIG_WOWLAN static void rtl8812_free_hal_data(PADAPTER padapter) { _func_enter_; _func_exit_; } //=========================================================== // Efuse related code //=========================================================== BOOLEAN Hal_GetChnlGroup8812A( IN u8 Channel, OUT u8* pGroup ) { BOOLEAN bIn24G=_TRUE; if(Channel <= 14) { bIn24G=_TRUE; if (1 <= Channel && Channel <= 2 ) *pGroup = 0; else if (3 <= Channel && Channel <= 5 ) *pGroup = 1; else if (6 <= Channel && Channel <= 8 ) *pGroup = 2; else if (9 <= Channel && Channel <= 11) *pGroup = 3; else if (12 <= Channel && Channel <= 14) *pGroup = 4; else { DBG_871X("==>mpt_GetChnlGroup8812A in 2.4 G, but Channel %d in Group not found \n", Channel); } } else { bIn24G=_FALSE; if (36 <= Channel && Channel <= 42) *pGroup = 0; else if (44 <= Channel && Channel <= 48) *pGroup = 1; else if (50 <= Channel && Channel <= 58) *pGroup = 2; else if (60 <= Channel && Channel <= 64) *pGroup = 3; else if (100 <= Channel && Channel <= 106) *pGroup = 4; else if (108 <= Channel && Channel <= 114) *pGroup = 5; else if (116 <= Channel && Channel <= 122) *pGroup = 6; else if (124 <= Channel && Channel <= 130) *pGroup = 7; else if (132 <= Channel && Channel <= 138) *pGroup = 8; else if (140 <= Channel && Channel <= 144) *pGroup = 9; else if (149 <= Channel && Channel <= 155) *pGroup = 10; else if (157 <= Channel && Channel <= 161) *pGroup = 11; else if (165 <= Channel && Channel <= 171) *pGroup = 12; else if (173 <= Channel && Channel <= 177) *pGroup = 13; else { DBG_871X("==>mpt_GetChnlGroup8812A in 5G, but Channel %d in Group not found \n",Channel); } } //DBG_871X("<==mpt_GetChnlGroup8812A, (%s) Channel = %d, Group =%d,\n", (bIn24G) ? "2.4G" : "5G", Channel, *pGroup); return bIn24G; } static void hal_ReadPowerValueFromPROM8812A( IN PADAPTER Adapter, IN PTxPowerInfo24G pwrInfo24G, IN PTxPowerInfo5G pwrInfo5G, IN u8* PROMContent, IN BOOLEAN AutoLoadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u32 rfPath, eeAddr=EEPROM_TX_PWR_INX_8812, group,TxCount=0; _rtw_memset(pwrInfo24G, 0, sizeof(TxPowerInfo24G)); _rtw_memset(pwrInfo5G, 0, sizeof(TxPowerInfo5G)); //DBG_871X("hal_ReadPowerValueFromPROM8812A(): PROMContent[0x%x]=0x%x\n", (eeAddr+1), PROMContent[eeAddr+1]); if(0xFF == PROMContent[eeAddr+1]) //YJ,add,120316 AutoLoadFail = _TRUE; if(AutoLoadFail) { DBG_871X("hal_ReadPowerValueFromPROM8812A(): Use Default value!\n"); for(rfPath = 0 ; rfPath < MAX_RF_PATH ; rfPath++) { // 2.4G default value for(group = 0 ; group < MAX_CHNL_GROUP_24G; group++) { pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; } for(TxCount=0;TxCountBW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF; pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF; } else { pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; } } // 5G default value for(group = 0 ; group < MAX_CHNL_GROUP_5G; group++) { pwrInfo5G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_5G_INDEX; } for(TxCount=0;TxCountOFDM_Diff[rfPath][0] = EEPROM_DEFAULT_5G_OFDM_DIFF; pwrInfo5G->BW20_Diff[rfPath][0] = EEPROM_DEFAULT_5G_HT20_DIFF; pwrInfo5G->BW80_Diff[rfPath][0] = EEPROM_DEFAULT_DIFF; pwrInfo5G->BW160_Diff[rfPath][0] = EEPROM_DEFAULT_DIFF; } else { pwrInfo5G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; pwrInfo5G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; pwrInfo5G->BW40_Diff[rfPath][TxCount]= EEPROM_DEFAULT_DIFF; pwrInfo5G->BW80_Diff[rfPath][TxCount]= EEPROM_DEFAULT_DIFF; pwrInfo5G->BW160_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; } } } //pHalData->bNOPG = _TRUE; return; } pHalData->bTXPowerDataReadFromEEPORM = _TRUE; //YJ,move,120316 for(rfPath = 0 ; rfPath < MAX_RF_PATH ; rfPath++) { // 2.4G default value for(group = 0 ; group < MAX_CHNL_GROUP_24G; group++) { pwrInfo24G->IndexCCK_Base[rfPath][group] = PROMContent[eeAddr++]; if(pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF) { pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; //pHalData->bNOPG = _TRUE; } //DBG_871X("8812-2G RF-%d-G-%d CCK-Addr-%x BASE=%x\n", //rfPath, group, eeAddr-1, pwrInfo24G->IndexCCK_Base[rfPath][group]); } for(group = 0 ; group < MAX_CHNL_GROUP_24G-1; group++) { pwrInfo24G->IndexBW40_Base[rfPath][group] = PROMContent[eeAddr++]; if(pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF) pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; //DBG_871X("8812-2G RF-%d-G-%d BW40-Addr-%x BASE=%x\n", //rfPath, group, eeAddr-1, pwrInfo24G->IndexBW40_Base[rfPath][group]); } for(TxCount=0;TxCountBW40_Diff[rfPath][TxCount] = 0; { pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; if(pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0; } //DBG_871X("8812-2G RF-%d-SS-%d BW20-Addr-%x DIFF=%d\n", //rfPath, TxCount, eeAddr, pwrInfo24G->BW20_Diff[rfPath][TxCount]); { pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); if(pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0; } //DBG_871X("8812-2G RF-%d-SS-%d LGOD-Addr-%x DIFF=%d\n", //rfPath, TxCount, eeAddr, pwrInfo24G->OFDM_Diff[rfPath][TxCount]); pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0; eeAddr++; } else { { pwrInfo24G->BW40_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; if(pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0; } //DBG_871X("8812-2G RF-%d-SS-%d BW40-Addr-%x DIFF=%d\n", //rfPath, TxCount, eeAddr, pwrInfo24G->BW40_Diff[rfPath][TxCount]); { pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); if(pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0; } //DBG_871X("8812-2G RF-%d-SS-%d BW20-Addr-%x DIFF=%d\n", //rfPath, TxCount, eeAddr, pwrInfo24G->BW20_Diff[rfPath][TxCount]); eeAddr++; { pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; if(pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0; } //DBG_871X("8812-2G RF-%d-SS-%d LGOD-Addr-%x DIFF=%d\n", //rfPath, TxCount, eeAddr, pwrInfo24G->BW20_Diff[rfPath][TxCount]); { pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); if(pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0; } //DBG_871X("8812-2G RF-%d-SS-%d CCK-Addr-%x DIFF=%d\n", //rfPath, TxCount, eeAddr, pwrInfo24G->CCK_Diff[rfPath][TxCount]); eeAddr++; } } //5G default value for(group = 0 ; group < MAX_CHNL_GROUP_5G; group++) { pwrInfo5G->IndexBW40_Base[rfPath][group] = PROMContent[eeAddr++]; if(pwrInfo5G->IndexBW40_Base[rfPath][group] == 0xFF) pwrInfo5G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_DIFF; //DBG_871X("8812-5G RF-%d-G-%d BW40-Addr-%x BASE=%x\n", // rfPath, TxCount, eeAddr-1, pwrInfo5G->IndexBW40_Base[rfPath][group]); } for(TxCount=0;TxCountBW40_Diff[rfPath][TxCount]= 0; { pwrInfo5G->BW20_Diff[rfPath][0] = (PROMContent[eeAddr]&0xf0)>>4; if(pwrInfo5G->BW20_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo5G->BW20_Diff[rfPath][TxCount] |= 0xF0; } //DBG_871X("8812-5G RF-%d-SS-%d BW20-Addr-%x DIFF=%d\n", //rfPath, TxCount, eeAddr, pwrInfo5G->BW20_Diff[rfPath][TxCount]); { pwrInfo5G->OFDM_Diff[rfPath][0] = (PROMContent[eeAddr]&0x0f); if(pwrInfo5G->OFDM_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo5G->OFDM_Diff[rfPath][TxCount] |= 0xF0; } //DBG_871X("8812-5G RF-%d-SS-%d LGOD-Addr-%x DIFF=%d\n", //rfPath, TxCount, eeAddr, pwrInfo5G->OFDM_Diff[rfPath][TxCount]); eeAddr++; } else { { pwrInfo5G->BW40_Diff[rfPath][TxCount]= (PROMContent[eeAddr]&0xf0)>>4; if(pwrInfo5G->BW40_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo5G->BW40_Diff[rfPath][TxCount] |= 0xF0; } //DBG_871X("8812-5G RF-%d-SS-%d BW40-Addr-%x DIFF=%d\n", //rfPath, TxCount, eeAddr, pwrInfo5G->BW40_Diff[rfPath][TxCount]); { pwrInfo5G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); if(pwrInfo5G->BW20_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo5G->BW20_Diff[rfPath][TxCount] |= 0xF0; } //DBG_871X("8812-5G RF-%d-SS-%d BW20-Addr-%x DIFF=%d\n", //rfPath, TxCount, eeAddr, pwrInfo5G->BW20_Diff[rfPath][TxCount]); eeAddr++; } } { pwrInfo5G->OFDM_Diff[rfPath][1] = (PROMContent[eeAddr]&0xf0)>>4; pwrInfo5G->OFDM_Diff[rfPath][2] = (PROMContent[eeAddr]&0x0f); } //DBG_871X("8812-5G RF-%d-SS-%d LGOD-Addr-%x DIFF=%d\n", // rfPath, 2, eeAddr, pwrInfo5G->OFDM_Diff[rfPath][2]); eeAddr++; pwrInfo5G->OFDM_Diff[rfPath][3] = (PROMContent[eeAddr]&0x0f); //DBG_871X("8812-5G RF-%d-SS-%d LGOD-Addr-%x DIFF=%d\n", //rfPath, 3, eeAddr, pwrInfo5G->OFDM_Diff[rfPath][3]); eeAddr++; for(TxCount=1;TxCountOFDM_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo5G->OFDM_Diff[rfPath][TxCount] |= 0xF0; //DBG_871X("8812-5G RF-%d-SS-%d LGOD-Addr-%x DIFF=%d\n", //rfPath, TxCount, eeAddr, pwrInfo5G->OFDM_Diff[rfPath][TxCount]); } for(TxCount=0;TxCountBW80_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; if(pwrInfo5G->BW80_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo5G->BW80_Diff[rfPath][TxCount] |= 0xF0; } //DBG_871X("8812-5G RF-%d-SS-%d BW80-Addr-%x DIFF=%d\n", //rfPath, TxCount, eeAddr, pwrInfo5G->BW80_Diff[rfPath][TxCount]); { pwrInfo5G->BW160_Diff[rfPath][TxCount]= (PROMContent[eeAddr]&0x0f); if(pwrInfo5G->BW160_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo5G->BW160_Diff[rfPath][TxCount] |= 0xF0; } //DBG_871X("8812-5G RF-%d-SS-%d BW160-Addr-%x DIFF=%d\n", //rfPath, TxCount, eeAddr, pwrInfo5G->BW160_Diff[rfPath][TxCount]); eeAddr++; } } } VOID Hal_EfuseParseBTCoexistInfo8812A( IN PADAPTER Adapter, IN u8 *hwinfo, IN BOOLEAN AutoLoadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u8 tmp_u8; u32 tmp_u32; if (IS_HARDWARE_TYPE_8812(Adapter)) { pHalData->EEPROMBluetoothType = BT_RTL8812A; if (!AutoLoadFail) { tmp_u8 = hwinfo[EEPROM_RF_BOARD_OPTION_8812]; if( ((tmp_u8 & 0xe0)>>5) == 0x1)// [7:5] pHalData->EEPROMBluetoothCoexist = _TRUE; else pHalData->EEPROMBluetoothCoexist = _FALSE; tmp_u8 = hwinfo[EEPROM_RF_BT_SETTING_8812]; pHalData->EEPROMBluetoothAntNum = (tmp_u8&0x1); // bit [0] } else { pHalData->EEPROMBluetoothCoexist = _FALSE; pHalData->EEPROMBluetoothAntNum = Ant_x1; } } else if (IS_HARDWARE_TYPE_8821(Adapter)){ pHalData->EEPROMBluetoothType = BT_RTL8821; if (!AutoLoadFail) { tmp_u32 = rtw_read32(Adapter, REG_MULTI_FUNC_CTRL); if(tmp_u32 & BT_FUNC_EN) pHalData->EEPROMBluetoothCoexist = _TRUE; else pHalData->EEPROMBluetoothCoexist = _FALSE; tmp_u8 = hwinfo[EEPROM_RF_BT_SETTING_8821]; pHalData->EEPROMBluetoothAntNum = (tmp_u8&0x1); // bit [0] } else { pHalData->EEPROMBluetoothCoexist = _FALSE; pHalData->EEPROMBluetoothAntNum = Ant_x2; } #ifdef CONFIG_BTCOEX_FORCE_CSR pHalData->EEPROMBluetoothType = BT_CSR_BC8; pHalData->EEPROMBluetoothCoexist = _TRUE; pHalData->EEPROMBluetoothAntNum = Ant_x2; #endif } else { rtw_warn_on(1); } #ifdef CONFIG_BT_COEXIST rtw_btcoex_SetBTCoexist(Adapter, pHalData->EEPROMBluetoothCoexist); rtw_btcoex_SetChipType(Adapter, pHalData->EEPROMBluetoothType); rtw_btcoex_SetPGAntNum(Adapter, pHalData->EEPROMBluetoothAntNum==Ant_x2?2:1); #endif /* CONFIG_BT_COEXIST */ } void Hal_EfuseParseIDCode8812A( IN PADAPTER padapter, IN u8 *hwinfo ) { EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); u16 EEPROMId; // Checl 0x8129 again for making sure autoload status!! EEPROMId = EF2Byte(*((u16*)&hwinfo[0])); if (EEPROMId != RTL_EEPROM_ID) { DBG_8192C("EEPROM ID(%#x) is invalid!!\n", EEPROMId); pEEPROM->bautoload_fail_flag = _TRUE; } else { pEEPROM->bautoload_fail_flag = _FALSE; } DBG_8192C("EEPROM ID=0x%04x\n", EEPROMId); } VOID Hal_ReadPROMVersion8812A( IN PADAPTER Adapter, IN u8* PROMContent, IN BOOLEAN AutoloadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); if(AutoloadFail){ pHalData->EEPROMVersion = EEPROM_Default_Version; } else{ if(IS_HARDWARE_TYPE_8812(Adapter)) pHalData->EEPROMVersion = *(u8 *)&PROMContent[EEPROM_VERSION_8812]; else pHalData->EEPROMVersion = *(u8 *)&PROMContent[EEPROM_VERSION_8821]; if(pHalData->EEPROMVersion == 0xFF) pHalData->EEPROMVersion = EEPROM_Default_Version; } //DBG_871X("pHalData->EEPROMVersion is 0x%x\n", pHalData->EEPROMVersion); } void Hal_ReadTxPowerInfo8812A( IN PADAPTER Adapter, IN u8* PROMContent, IN BOOLEAN AutoLoadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); TxPowerInfo24G pwrInfo24G; TxPowerInfo5G pwrInfo5G; u8 rfPath, ch, group, TxCount; u8 channel5G[CHANNEL_MAX_NUMBER_5G] = {36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112, 114,116,118,120,122,124,126,128,130,132,134,136,138,140,142,144,149,151, 153,155,157,159,161,163,165,167,168,169,171,173,175,177}; u8 channel5G_80M[CHANNEL_MAX_NUMBER_5G_80M] = {42, 58, 106, 122, 138, 155, 171}; hal_ReadPowerValueFromPROM8812A(Adapter, &pwrInfo24G,&pwrInfo5G, PROMContent, AutoLoadFail); //if(!AutoLoadFail) // pHalData->bTXPowerDataReadFromEEPORM = _TRUE; for(rfPath = 0 ; rfPath < MAX_RF_PATH ; rfPath++) { for(ch = 0 ; ch < CHANNEL_MAX_NUMBER_2G ; ch++) { Hal_GetChnlGroup8812A(ch+1, &group); if(ch == 14-1) { pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][5]; pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group]; } else { pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][group]; pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group]; } //DBG_871X("======= Path %d, ChannelIndex %d, Group %d=======\n",rfPath,ch, group); //DBG_871X("Index24G_CCK_Base[%d][%d] = 0x%x\n",rfPath,ch ,pHalData->Index24G_CCK_Base[rfPath][ch]); //DBG_871X("Index24G_BW40_Base[%d][%d] = 0x%x\n",rfPath,ch,pHalData->Index24G_BW40_Base[rfPath][ch]); } for(ch = 0 ; ch < CHANNEL_MAX_NUMBER_5G; ch++) { Hal_GetChnlGroup8812A(channel5G[ch], &group); pHalData->Index5G_BW40_Base[rfPath][ch] = pwrInfo5G.IndexBW40_Base[rfPath][group]; //DBG_871X("======= Path %d, ChannelIndex %d, Group %d=======\n",rfPath,ch, group); //DBG_871X("Index5G_BW40_Base[%d][%d] = 0x%x\n",rfPath,ch,pHalData->Index5G_BW40_Base[rfPath][ch]); } for(ch = 0 ; ch < CHANNEL_MAX_NUMBER_5G_80M; ch++) { u8 upper, lower; Hal_GetChnlGroup8812A(channel5G_80M[ch], &group); upper = pwrInfo5G.IndexBW40_Base[rfPath][group]; lower = pwrInfo5G.IndexBW40_Base[rfPath][group+1]; pHalData->Index5G_BW80_Base[rfPath][ch] = (upper + lower) / 2; //DBG_871X("======= Path %d, ChannelIndex %d, Group %d=======\n",rfPath,ch, group); //DBG_871X("Index5G_BW80_Base[%d][%d] = 0x%x\n",rfPath,ch,pHalData->Index5G_BW80_Base[rfPath][ch]); } for(TxCount=0;TxCountCCK_24G_Diff[rfPath][TxCount]=pwrInfo24G.CCK_Diff[rfPath][TxCount]; pHalData->OFDM_24G_Diff[rfPath][TxCount]=pwrInfo24G.OFDM_Diff[rfPath][TxCount]; pHalData->BW20_24G_Diff[rfPath][TxCount]=pwrInfo24G.BW20_Diff[rfPath][TxCount]; pHalData->BW40_24G_Diff[rfPath][TxCount]=pwrInfo24G.BW40_Diff[rfPath][TxCount]; pHalData->OFDM_5G_Diff[rfPath][TxCount]=pwrInfo5G.OFDM_Diff[rfPath][TxCount]; pHalData->BW20_5G_Diff[rfPath][TxCount]=pwrInfo5G.BW20_Diff[rfPath][TxCount]; pHalData->BW40_5G_Diff[rfPath][TxCount]=pwrInfo5G.BW40_Diff[rfPath][TxCount]; pHalData->BW80_5G_Diff[rfPath][TxCount]=pwrInfo5G.BW80_Diff[rfPath][TxCount]; //#if DBG #if 0 DBG_871X("--------------------------------------- 2.4G ---------------------------------------\n"); DBG_871X("CCK_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->CCK_24G_Diff[rfPath][TxCount]); DBG_871X("OFDM_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->OFDM_24G_Diff[rfPath][TxCount]); DBG_871X("BW20_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->BW20_24G_Diff[rfPath][TxCount]); DBG_871X("BW40_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->BW40_24G_Diff[rfPath][TxCount]); DBG_871X("---------------------------------------- 5G ----------------------------------------\n"); DBG_871X("OFDM_5G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->OFDM_5G_Diff[rfPath][TxCount]); DBG_871X("BW20_5G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->BW20_5G_Diff[rfPath][TxCount]); DBG_871X("BW40_5G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->BW40_5G_Diff[rfPath][TxCount]); DBG_871X("BW80_5G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->BW80_5G_Diff[rfPath][TxCount]); #endif } } // 2010/10/19 MH Add Regulator recognize for CU. if(!AutoLoadFail) { struct registry_priv *registry_par = &Adapter->registrypriv; if(PROMContent[EEPROM_RF_BOARD_OPTION_8812] == 0xFF) pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION&0x7); //bit0~2 else pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_8812]&0x7); //bit0~2 // 2012/09/26 MH Add for TX power calibrate rate. pHalData->TxPwrCalibrateRate = PROMContent[EEPROM_TX_PWR_CALIBRATE_RATE_8812]; } else { pHalData->EEPROMRegulatory = 0; // 2012/09/26 MH Add for TX power calibrate rate. pHalData->TxPwrCalibrateRate = EEPROM_DEFAULT_TX_CALIBRATE_RATE; } DBG_871X("EEPROMRegulatory = 0x%x TxPwrCalibrateRate=0x%x\n", pHalData->EEPROMRegulatory, pHalData->TxPwrCalibrateRate); } VOID Hal_ReadBoardType8812A( IN PADAPTER Adapter, IN u8* PROMContent, IN BOOLEAN AutoloadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); if(!AutoloadFail) { pHalData->InterfaceSel = (PROMContent[EEPROM_RF_BOARD_OPTION_8812]&0xE0)>>5; if(PROMContent[EEPROM_RF_BOARD_OPTION_8812] == 0xFF) pHalData->InterfaceSel = (EEPROM_DEFAULT_BOARD_OPTION&0xE0)>>5; } else { pHalData->InterfaceSel = 0; } DBG_871X("Board Type: 0x%2x\n", pHalData->InterfaceSel); } VOID Hal_ReadThermalMeter_8812A( IN PADAPTER Adapter, IN u8* PROMContent, IN BOOLEAN AutoloadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); //u8 tempval; // // ThermalMeter from EEPROM // if(!AutoloadFail) pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_8812]; else pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_8812; //pHalData->EEPROMThermalMeter = (tempval&0x1f); //[4:0] if(pHalData->EEPROMThermalMeter == 0xff || AutoloadFail) { pHalData->bAPKThermalMeterIgnore = _TRUE; pHalData->EEPROMThermalMeter = 0xFF; } //pHalData->ThermalMeter[0] = pHalData->EEPROMThermalMeter; DBG_871X("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter); } void Hal_ReadRemoteWakeup_8812A( PADAPTER padapter, IN u8* hwinfo, IN BOOLEAN AutoLoadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); u8 tmpvalue; if(AutoLoadFail){ pwrctl->bHWPowerdown = _FALSE; pwrctl->bSupportRemoteWakeup = _FALSE; } else { // decide hw if support remote wakeup function // if hw supported, 8051 (SIE) will generate WeakUP signal( D+/D- toggle) when autoresume #ifdef CONFIG_USB_HCI if(IS_HARDWARE_TYPE_8821U(padapter)) pwrctl->bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0_8811AU] & BIT1)?_TRUE :_FALSE; else pwrctl->bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT1)?_TRUE :_FALSE; #endif //CONFIG_USB_HCI DBG_871X("%s...bSupportRemoteWakeup(%x)\n",__FUNCTION__, pwrctl->bSupportRemoteWakeup); } } VOID Hal_ReadChannelPlan8812A( IN PADAPTER padapter, IN u8* hwinfo, IN BOOLEAN AutoLoadFail ) { padapter->mlmepriv.ChannelPlan = hal_com_config_channel_plan( padapter , hwinfo?hwinfo[EEPROM_ChannelPlan_8812]:0xFF , padapter->registrypriv.channel_plan , RT_CHANNEL_DOMAIN_REALTEK_DEFINE , AutoLoadFail ); DBG_871X("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan); } VOID Hal_EfuseParseXtal_8812A( IN PADAPTER pAdapter, IN u8* hwinfo, IN BOOLEAN AutoLoadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); if(!AutoLoadFail) { pHalData->CrystalCap = hwinfo[EEPROM_XTAL_8812]; if(pHalData->CrystalCap == 0xFF) pHalData->CrystalCap = EEPROM_Default_CrystalCap_8812; //what value should 8812 set? } else { pHalData->CrystalCap = EEPROM_Default_CrystalCap_8812; } DBG_871X("CrystalCap: 0x%2x\n", pHalData->CrystalCap); } VOID Hal_ReadAntennaDiversity8812A( IN PADAPTER pAdapter, IN u8* PROMContent, IN BOOLEAN AutoLoadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); struct registry_priv *registry_par = &pAdapter->registrypriv; if(!AutoLoadFail) { // Antenna Diversity setting. if(registry_par->antdiv_cfg == 2) { pHalData->AntDivCfg = (PROMContent[EEPROM_RF_BOARD_OPTION_8812]&0x18)>>3; if(PROMContent[EEPROM_RF_BOARD_OPTION_8812] == 0xFF) pHalData->AntDivCfg = (EEPROM_DEFAULT_BOARD_OPTION&0x18)>>3;; } else { pHalData->AntDivCfg = registry_par->antdiv_cfg; } #ifdef CONFIG_BT_COEXIST if(hal_btcoex_1Ant(pAdapter)) pHalData->AntDivCfg = 0; #endif pHalData->TRxAntDivType = PROMContent[EEPROM_RF_ANTENNA_OPT_8812]; //todo by page if (pHalData->TRxAntDivType == 0xFF) pHalData->TRxAntDivType = FIXED_HW_ANTDIV; // For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) } else { pHalData->AntDivCfg = 0; } DBG_871X("SWAS: bHwAntDiv = %x, TRxAntDivType = %x\n", pHalData->AntDivCfg, pHalData->TRxAntDivType); } VOID Hal_ReadAntennaDiversity8821A( IN PADAPTER pAdapter, IN u8 *PROMContent, IN BOOLEAN AutoLoadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); struct registry_priv *registry_par = &pAdapter->registrypriv; if(!AutoLoadFail) { // Antenna Diversity setting. if(registry_par->antdiv_cfg == 2) pHalData->AntDivCfg = (PROMContent[EEPROM_RF_BOARD_OPTION_8812]& BIT3)?_TRUE:_FALSE; else pHalData->AntDivCfg = registry_par->antdiv_cfg; #ifdef CONFIG_BT_COEXIST if(hal_btcoex_1Ant(pAdapter)) pHalData->AntDivCfg = 0; #endif //pHalData->TRxAntDivType = FIXED_HW_ANTDIV; // For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; //DPDT //3 TODO pHalData->AntDivCfg = 0; } else { pHalData->AntDivCfg = 0; } DBG_871X("SWAS: bHwAntDiv = %x, TRxAntDivType = %x\n", pHalData->AntDivCfg, pHalData->TRxAntDivType); } VOID hal_ReadPAType_8812A( IN PADAPTER Adapter, IN u8* PROMContent, IN BOOLEAN AutoloadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); if( ! AutoloadFail ) { if (GetRegAmplifierType2G(Adapter) == 0) // AUTO { pHalData->PAType_2G = EF1Byte( *(u8 *)&PROMContent[EEPROM_PA_TYPE_8812AU] ); pHalData->LNAType_2G = EF1Byte( *(u8 *)&PROMContent[EEPROM_LNA_TYPE_2G_8812AU] ); if (pHalData->PAType_2G == 0xFF) pHalData->PAType_2G = 0; if(pHalData->LNAType_2G == 0xFF) pHalData->LNAType_2G = 0; pHalData->ExternalPA_2G = ((pHalData->PAType_2G & BIT5) && (pHalData->PAType_2G & BIT4)) ? 1 : 0; pHalData->ExternalLNA_2G = ((pHalData->LNAType_2G & BIT7) && (pHalData->LNAType_2G & BIT3)) ? 1 : 0; } else { pHalData->ExternalPA_2G = (GetRegAmplifierType2G(Adapter)&ODM_BOARD_EXT_PA) ? 1 : 0; pHalData->ExternalLNA_2G = (GetRegAmplifierType2G(Adapter)&ODM_BOARD_EXT_LNA) ? 1 : 0; } if (GetRegAmplifierType5G(Adapter) == 0) // AUTO { pHalData->PAType_5G = EF1Byte( *(u8 *)&PROMContent[EEPROM_PA_TYPE_8812AU] ); pHalData->LNAType_5G = EF1Byte( *(u8 *)&PROMContent[EEPROM_LNA_TYPE_5G_8812AU] ); if (pHalData->PAType_5G == 0xFF && pHalData->LNAType_5G == 0xFF) { pHalData->PAType_5G = 0; pHalData->LNAType_5G = 0; } pHalData->ExternalPA_5G = ((pHalData->PAType_5G & BIT1) && (pHalData->PAType_5G & BIT0)) ? 1 : 0; pHalData->ExternalLNA_5G = ((pHalData->LNAType_5G & BIT7) && (pHalData->LNAType_5G & BIT3)) ? 1 : 0; } else { pHalData->ExternalPA_5G = (GetRegAmplifierType5G(Adapter)&ODM_BOARD_EXT_PA_5G) ? 1 : 0; pHalData->ExternalLNA_5G = (GetRegAmplifierType5G(Adapter)&ODM_BOARD_EXT_LNA_5G) ? 1 : 0; } } else { pHalData->ExternalPA_2G = EEPROM_Default_PAType; pHalData->ExternalPA_5G = 0xFF; pHalData->ExternalLNA_2G = EEPROM_Default_LNAType; pHalData->ExternalLNA_5G = 0xFF; if (GetRegAmplifierType2G(Adapter) == 0) // AUTO { pHalData->ExternalPA_2G = 0; pHalData->ExternalLNA_2G = 0; } else { pHalData->ExternalPA_2G = (GetRegAmplifierType2G(Adapter)&ODM_BOARD_EXT_PA) ? 1 : 0; pHalData->ExternalLNA_2G = (GetRegAmplifierType2G(Adapter)&ODM_BOARD_EXT_LNA) ? 1 : 0; } if (GetRegAmplifierType5G(Adapter) == 0) // AUTO { pHalData->ExternalPA_5G = 0; pHalData->ExternalLNA_5G = 0; } else { pHalData->ExternalPA_5G = (GetRegAmplifierType5G(Adapter)&ODM_BOARD_EXT_PA_5G) ? 1 : 0; pHalData->ExternalLNA_5G = (GetRegAmplifierType5G(Adapter)&ODM_BOARD_EXT_LNA_5G) ? 1 : 0; } } DBG_871X("pHalData->PAType_2G is 0x%x, pHalData->ExternalPA_2G = %d\n", pHalData->PAType_2G, pHalData->ExternalPA_2G); DBG_871X("pHalData->PAType_5G is 0x%x, pHalData->ExternalPA_5G = %d\n", pHalData->PAType_5G, pHalData->ExternalPA_5G); DBG_871X("pHalData->LNAType_2G is 0x%x, pHalData->ExternalLNA_2G = %d\n", pHalData->LNAType_2G, pHalData->ExternalLNA_2G); DBG_871X("pHalData->LNAType_5G is 0x%x, pHalData->ExternalLNA_5G = %d\n", pHalData->LNAType_5G, pHalData->ExternalLNA_5G); } VOID Hal_ReadAmplifierType_8812A( IN PADAPTER Adapter, IN u8* PROMContent, IN BOOLEAN AutoloadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u8 extTypePA_2G_A = (PROMContent[0xBD] & BIT2) >> 2; // 0xBD[2] u8 extTypePA_2G_B = (PROMContent[0xBD] & BIT6) >> 6; // 0xBD[6] u8 extTypePA_5G_A = (PROMContent[0xBF] & BIT2) >> 2; // 0xBF[2] u8 extTypePA_5G_B = (PROMContent[0xBF] & BIT6) >> 6; // 0xBF[6] u8 extTypeLNA_2G_A = (PROMContent[0xBD] & (BIT1|BIT0)) >> 0; // 0xBD[1:0] u8 extTypeLNA_2G_B = (PROMContent[0xBD] & (BIT5|BIT4)) >> 4; // 0xBD[5:4] u8 extTypeLNA_5G_A = (PROMContent[0xBF] & (BIT1|BIT0)) >> 0; // 0xBF[1:0] u8 extTypeLNA_5G_B = (PROMContent[0xBF] & (BIT5|BIT4)) >> 4; // 0xBF[5:4] hal_ReadPAType_8812A(Adapter, PROMContent, AutoloadFail); if ((pHalData->PAType_2G & (BIT5|BIT4)) == (BIT5|BIT4)) // [2.4G] Path A and B are both extPA pHalData->TypeGPA = extTypePA_2G_B << 2 | extTypePA_2G_A; if ((pHalData->PAType_5G & (BIT1|BIT0)) == (BIT1|BIT0)) // [5G] Path A and B are both extPA pHalData->TypeAPA = extTypePA_5G_B << 2 | extTypePA_5G_A; if ((pHalData->LNAType_2G & (BIT7|BIT3)) == (BIT7|BIT3)) // [2.4G] Path A and B are both extLNA pHalData->TypeGLNA = extTypeLNA_2G_B << 2 | extTypeLNA_2G_A; if ((pHalData->LNAType_5G & (BIT7|BIT3)) == (BIT7|BIT3)) // [5G] Path A and B are both extLNA pHalData->TypeALNA = extTypeLNA_5G_B << 2 | extTypeLNA_5G_A; DBG_871X("pHalData->TypeGPA = 0x%X\n", pHalData->TypeGPA); DBG_871X("pHalData->TypeAPA = 0x%X\n", pHalData->TypeAPA); DBG_871X("pHalData->TypeGLNA = 0x%X\n", pHalData->TypeGLNA); DBG_871X("pHalData->TypeALNA = 0x%X\n", pHalData->TypeALNA); } VOID Hal_ReadPAType_8821A( IN PADAPTER Adapter, IN u8* PROMContent, IN BOOLEAN AutoloadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); if( ! AutoloadFail ) { if (GetRegAmplifierType2G(Adapter) == 0) // AUTO { pHalData->PAType_2G = EF1Byte( *(u8 *)&PROMContent[EEPROM_PA_TYPE_8812AU] ); pHalData->LNAType_2G = EF1Byte( *(u8 *)&PROMContent[EEPROM_LNA_TYPE_2G_8812AU] ); if(pHalData->PAType_2G == 0xFF ) pHalData->PAType_2G = 0; if(pHalData->LNAType_2G == 0xFF) pHalData->LNAType_2G = 0; pHalData->ExternalPA_2G = (pHalData->PAType_2G & BIT4) ? 1 : 0; pHalData->ExternalLNA_2G = (pHalData->LNAType_2G & BIT3) ? 1 : 0; } else { pHalData->ExternalPA_2G = (GetRegAmplifierType2G(Adapter)&ODM_BOARD_EXT_PA) ? 1 : 0; pHalData->ExternalLNA_2G = (GetRegAmplifierType2G(Adapter)&ODM_BOARD_EXT_LNA) ? 1 : 0; } if (GetRegAmplifierType5G(Adapter) == 0) // AUTO { pHalData->PAType_5G = EF1Byte( *(u8 *)&PROMContent[EEPROM_PA_TYPE_8812AU] ); pHalData->LNAType_5G = EF1Byte( *(u8 *)&PROMContent[EEPROM_LNA_TYPE_5G_8812AU] ); if (pHalData->PAType_5G == 0xFF && pHalData->LNAType_5G == 0xFF) { pHalData->PAType_5G = 0; pHalData->LNAType_5G = 0; } pHalData->ExternalPA_5G = (pHalData->PAType_5G & BIT0) ? 1 : 0; pHalData->ExternalLNA_5G = (pHalData->LNAType_5G & BIT3) ? 1 : 0; } else { pHalData->ExternalPA_5G = (GetRegAmplifierType5G(Adapter)&ODM_BOARD_EXT_PA_5G) ? 1 : 0; pHalData->ExternalLNA_5G = (GetRegAmplifierType5G(Adapter)&ODM_BOARD_EXT_LNA_5G) ? 1 : 0; } } else { pHalData->ExternalPA_2G = EEPROM_Default_PAType; pHalData->ExternalPA_5G = 0xFF; pHalData->ExternalLNA_2G = EEPROM_Default_LNAType; pHalData->ExternalLNA_5G = 0xFF; if (GetRegAmplifierType2G(Adapter) == 0) // AUTO { pHalData->ExternalPA_2G = 0; pHalData->ExternalLNA_2G = 0; } else { pHalData->ExternalPA_2G = (GetRegAmplifierType2G(Adapter)&ODM_BOARD_EXT_PA) ? 1 : 0; pHalData->ExternalLNA_2G = (GetRegAmplifierType2G(Adapter)&ODM_BOARD_EXT_LNA) ? 1 : 0; } if (GetRegAmplifierType5G(Adapter) == 0) // AUTO { pHalData->ExternalPA_5G = 0; pHalData->ExternalLNA_5G = 0; } else { pHalData->ExternalPA_5G = (GetRegAmplifierType5G(Adapter)&ODM_BOARD_EXT_PA_5G) ? 1 : 0; pHalData->ExternalLNA_5G = (GetRegAmplifierType5G(Adapter)&ODM_BOARD_EXT_LNA_5G) ? 1 : 0; } } DBG_871X("pHalData->PAType_2G is 0x%x, pHalData->ExternalPA_2G = %d\n", pHalData->PAType_2G, pHalData->ExternalPA_2G); DBG_871X("pHalData->PAType_5G is 0x%x, pHalData->ExternalPA_5G = %d\n", pHalData->PAType_5G, pHalData->ExternalPA_5G); DBG_871X("pHalData->LNAType_2G is 0x%x, pHalData->ExternalLNA_2G = %d\n", pHalData->LNAType_2G, pHalData->ExternalLNA_2G); DBG_871X("pHalData->LNAType_5G is 0x%x, pHalData->ExternalLNA_5G = %d\n", pHalData->LNAType_5G, pHalData->ExternalLNA_5G); } VOID Hal_ReadRFEType_8812A( IN PADAPTER Adapter, IN u8* PROMContent, IN BOOLEAN AutoloadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); if(!AutoloadFail) { if(( GetRegRFEType(Adapter) != 64)|| 0xFF == PROMContent[EEPROM_RFE_OPTION_8812]) { if(GetRegRFEType(Adapter) != 64) pHalData->RFEType = GetRegRFEType(Adapter); else { if (IS_HARDWARE_TYPE_8812AU(Adapter)) pHalData->RFEType = 0; else if (IS_HARDWARE_TYPE_8812E(Adapter)) pHalData->RFEType = 2; else pHalData->RFEType = EEPROM_DEFAULT_RFE_OPTION; } } else if(PROMContent[EEPROM_RFE_OPTION_8812] & BIT7) { if(pHalData->ExternalLNA_5G) { if(pHalData->ExternalPA_5G) { if(pHalData->ExternalLNA_2G && pHalData->ExternalPA_2G ) pHalData->RFEType = 3; else pHalData->RFEType = 0; } else pHalData->RFEType = 2; } else pHalData->RFEType = 4; } else { pHalData->RFEType = PROMContent[EEPROM_RFE_OPTION_8812]&0x3F; // 2013/03/19 MH Due to othe customer already use incorrect EFUSE map // to for their product. We need to add workaround to prevent to modify // spec and notify all customer to revise the IC 0xca content. After // discussing with Willis an YN, revise driver code to prevent. if (pHalData->RFEType == 4 && (pHalData->ExternalPA_5G == _TRUE || pHalData->ExternalPA_2G == _TRUE || pHalData->ExternalLNA_5G == _TRUE || pHalData->ExternalLNA_2G == _TRUE)) { if (IS_HARDWARE_TYPE_8812AU(Adapter)) pHalData->RFEType = 0; else if (IS_HARDWARE_TYPE_8812E(Adapter)) pHalData->RFEType = 2; } } } else { if(GetRegRFEType(Adapter) != 64) pHalData->RFEType = GetRegRFEType(Adapter); else { if (IS_HARDWARE_TYPE_8812AU(Adapter)) pHalData->RFEType = 0; else if (IS_HARDWARE_TYPE_8812E(Adapter)) pHalData->RFEType = 2; else pHalData->RFEType = EEPROM_DEFAULT_RFE_OPTION; } } DBG_871X("RFE Type: 0x%2x\n", pHalData->RFEType); } // // 2013/04/15 MH Add 8812AU- VL/VS/VN for different board type. // VOID hal_ReadUsbType_8812AU( IN PADAPTER Adapter, IN u8 *PROMContent, IN BOOLEAN AutoloadFail ) { //if (IS_HARDWARE_TYPE_8812AU(Adapter) && Adapter->UsbModeMechanism.RegForcedUsbMode == 5) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); u8 reg_tmp, i, j, antenna = 0, wmode = 0; // Read anenna type from EFUSE 1019/1018 for (i = 0; i < 2; i++) { // Check efuse address 1019 // Check efuse address 1018 efuse_OneByteRead(Adapter, 1019-i, ®_tmp, _FALSE); for (j = 0; j < 2; j++) { // CHeck bit 7-5 // Check bit 3-1 antenna = ((reg_tmp&0xee) >> (5-(j*4))); if (antenna == 0) continue; else { break; } } } // Read anenna type from EFUSE 1021/1020 for (i = 0; i < 2; i++) { // Check efuse address 1019 // Check efuse address 1018 efuse_OneByteRead(Adapter, 1021-i, ®_tmp, _FALSE); for (j = 0; j < 2; j++) { // CHeck bit 3-2 // Check bit 1-0 wmode = ((reg_tmp&0x0f) >> (2-(j*2))); if (wmode) continue; else { break; } } } // Antenna == 1 WMODE = 3 RTL8812AU-VL 11AC + USB2.0 Mode if (antenna == 1) { // Config 8812AU as 1*1 mode AC mode. pHalData->rf_type = RF_1T1R; //UsbModeSwitch_SetUsbModeMechOn(Adapter, FALSE); //pHalData->EFUSEHidden = EFUSE_HIDDEN_812AU_VL; DBG_871X("%s(): EFUSE_HIDDEN_812AU_VL\n",__FUNCTION__); } else if (antenna == 2) { if (wmode == 3) { if (PROMContent[EEPROM_USB_MODE_8812] == 0x2) { // RTL8812AU Normal Mode. No further action. //pHalData->EFUSEHidden = EFUSE_HIDDEN_812AU; DBG_871X("%s(): EFUSE_HIDDEN_812AU\n",__FUNCTION__); } else { // Antenna == 2 WMODE = 3 RTL8812AU-VS 11AC + USB2.0 Mode // Driver will not support USB automatic switch //UsbModeSwitch_SetUsbModeMechOn(Adapter, FALSE); //pHalData->EFUSEHidden = EFUSE_HIDDEN_812AU_VS; DBG_871X("%s(): EFUSE_HIDDEN_812AU_VS\n",__FUNCTION__); } } else if (wmode == 2) { // Antenna == 2 WMODE = 2 RTL8812AU-VN 11N only + USB2.0 Mode //UsbModeSwitch_SetUsbModeMechOn(Adapter, FALSE); //pHalData->EFUSEHidden = EFUSE_HIDDEN_812AU_VN; DBG_871X("%s(): EFUSE_HIDDEN_812AU_VN\n",__FUNCTION__); } } } } enum{ VOLTAGE_V25 = 0x03, LDOE25_SHIFT = 28 , }; static VOID Hal_EfusePowerSwitch8812A( IN PADAPTER pAdapter, IN u8 bWrite, IN u8 PwrState) { u8 tempval; u16 tmpV16; #define EFUSE_ACCESS_ON_JAGUAR 0x69 #define EFUSE_ACCESS_OFF_JAGUAR 0x00 if (PwrState == _TRUE) { rtw_write8(pAdapter, REG_EFUSE_BURN_GNT_8812, EFUSE_ACCESS_ON_JAGUAR); // 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid tmpV16 = rtw_read16(pAdapter,REG_SYS_ISO_CTRL); if( ! (tmpV16 & PWC_EV12V ) ){ tmpV16 |= PWC_EV12V ; //rtw_write16(pAdapter,REG_SYS_ISO_CTRL,tmpV16); } // Reset: 0x0000h[28], default valid tmpV16 = rtw_read16(pAdapter,REG_SYS_FUNC_EN); if( !(tmpV16 & FEN_ELDR) ){ tmpV16 |= FEN_ELDR ; rtw_write16(pAdapter,REG_SYS_FUNC_EN,tmpV16); } // Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid tmpV16 = rtw_read16(pAdapter,REG_SYS_CLKR); if( (!(tmpV16 & LOADER_CLK_EN) ) ||(!(tmpV16 & ANA8M) ) ) { tmpV16 |= (LOADER_CLK_EN |ANA8M ) ; rtw_write16(pAdapter,REG_SYS_CLKR,tmpV16); } if(bWrite == _TRUE) { // Enable LDO 2.5V before read/write action tempval = rtw_read8(pAdapter, EFUSE_TEST+3); tempval &= ~(BIT3|BIT4|BIT5|BIT6); tempval |= (VOLTAGE_V25 << 3); tempval |= BIT7; rtw_write8(pAdapter, EFUSE_TEST+3, tempval); } } else { rtw_write8(pAdapter, REG_EFUSE_BURN_GNT_8812, EFUSE_ACCESS_OFF_JAGUAR); if(bWrite == _TRUE){ // Disable LDO 2.5V after read/write action tempval = rtw_read8(pAdapter, EFUSE_TEST+3); rtw_write8(pAdapter, EFUSE_TEST+3, (tempval & 0x7F)); } } } static VOID rtl8812_EfusePowerSwitch( IN PADAPTER pAdapter, IN u8 bWrite, IN u8 PwrState) { Hal_EfusePowerSwitch8812A(pAdapter, bWrite, PwrState); } static BOOLEAN Hal_EfuseSwitchToBank8812A( IN PADAPTER pAdapter, IN u1Byte bank, IN BOOLEAN bPseudoTest ) { return _FALSE; } static VOID Hal_EfuseReadEFuse8812A( PADAPTER Adapter, u16 _offset, u16 _size_byte, u8 *pbuf, IN BOOLEAN bPseudoTest ) { u8 *efuseTbl = NULL; u16 eFuse_Addr = 0; u8 offset=0, wden=0; u16 i, j; u16 **eFuseWord = NULL; u16 efuse_utilized = 0; u8 efuse_usage = 0; u8 offset_2_0=0; u8 efuseHeader=0, efuseExtHdr=0, efuseData=0; // // Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. // if((_offset + _size_byte)>EFUSE_MAP_LEN_JAGUAR) {// total E-Fuse table is 512bytes DBG_8192C("Hal_EfuseReadEFuse8812A(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte); goto exit; } efuseTbl = (u8*)rtw_zmalloc(EFUSE_MAP_LEN_JAGUAR); if(efuseTbl == NULL) { DBG_871X("%s: alloc efuseTbl fail!\n", __FUNCTION__); goto exit; } eFuseWord= (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_JAGUAR, EFUSE_MAX_WORD_UNIT, 2); if(eFuseWord == NULL) { DBG_871X("%s: alloc eFuseWord fail!\n", __FUNCTION__); goto exit; } // 0. Refresh efuse init map as all oxFF. for (i = 0; i < EFUSE_MAX_SECTION_JAGUAR; i++) for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) eFuseWord[i][j] = 0xFFFF; // // 1. Read the first byte to check if efuse is empty!!! // // efuse_OneByteRead(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest); if(efuseHeader != 0xFF) { efuse_utilized++; } else { DBG_871X("EFUSE is empty\n"); efuse_utilized = 0; goto exit; } //RT_DISP(FEEPROM, EFUSE_READ_ALL, ("Hal_EfuseReadEFuse8812A(): efuse_utilized: %d\n", efuse_utilized)); // // 2. Read real efuse content. Filter PG header and every section data. // while((efuseHeader != 0xFF) && AVAILABLE_EFUSE_ADDR_8812(eFuse_Addr)) { //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr-1, *rtemp8)); // Check PG header for section num. if(EXT_HEADER(efuseHeader)) //extended header { offset_2_0 = GET_HDR_OFFSET_2_0(efuseHeader); //RT_DISP(FEEPROM, EFUSE_READ_ALL, ("extended header offset_2_0=%X\n", offset_2_0)); efuse_OneByteRead(Adapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest); //RT_DISP(FEEPROM, EFUSE_READ_ALL, ("efuse[%X]=%X\n", eFuse_Addr-1, efuseExtHdr)); if(efuseExtHdr != 0xff) { efuse_utilized++; if(ALL_WORDS_DISABLED(efuseExtHdr)) { efuse_OneByteRead(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest); if(efuseHeader != 0xff) { efuse_utilized++; } break; } else { offset = ((efuseExtHdr & 0xF0) >> 1) | offset_2_0; wden = (efuseExtHdr & 0x0F); } } else { DBG_871X("Error condition, extended = 0xff\n"); // We should handle this condition. break; } } else { offset = ((efuseHeader >> 4) & 0x0f); wden = (efuseHeader & 0x0f); } if(offset < EFUSE_MAX_SECTION_JAGUAR) { // Get word enable value from PG header //RT_DISP(FEEPROM, EFUSE_READ_ALL, ("Offset-%X Worden=%X\n", offset, wden)); for(i=0; i> 8) & 0xff); } } //RT_DISP(FEEPROM, EFUSE_READ_ALL, ("Hal_EfuseReadEFuse8812A(): efuse_utilized: %d\n", efuse_utilized)); // // 4. Copy from Efuse map to output pointer memory!!! // for(i=0; i<_size_byte; i++) { pbuf[i] = efuseTbl[_offset+i]; } // // 5. Calculate Efuse utilization. // efuse_usage = (u1Byte)((eFuse_Addr*100)/EFUSE_REAL_CONTENT_LEN_JAGUAR); rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&eFuse_Addr); exit: if(efuseTbl) rtw_mfree(efuseTbl, EFUSE_MAP_LEN_JAGUAR); if(eFuseWord) rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_JAGUAR, EFUSE_MAX_WORD_UNIT, sizeof(u16)); } static VOID rtl8812_ReadEFuse( PADAPTER Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, IN BOOLEAN bPseudoTest ) { #ifdef DBG_IOL_READ_EFUSE_MAP u8 logical_map[512]; #endif #ifdef CONFIG_IOL_READ_EFUSE_MAP if(!bPseudoTest )//&& rtw_IOL_applied(Adapter)) { int ret = _FAIL; rtw_hal_power_on(Adapter); iol_mode_enable(Adapter, 1); #ifdef DBG_IOL_READ_EFUSE_MAP iol_read_efuse(Adapter, 0, _offset, _size_byte, logical_map); #else ret = iol_read_efuse(Adapter, 0, _offset, _size_byte, pbuf); #endif iol_mode_enable(Adapter, 0); if(_SUCCESS == ret) goto exit; } #endif Hal_EfuseReadEFuse8812A(Adapter, _offset, _size_byte, pbuf, bPseudoTest); #ifdef CONFIG_IOL_READ_EFUSE_MAP exit: #endif #ifdef DBG_IOL_READ_EFUSE_MAP if(_rtw_memcmp(logical_map, Adapter->eeprompriv.efuse_eeprom_data, 0x130) == _FALSE) { int i; DBG_871X("%s compare first 0x130 byte fail\n", __FUNCTION__); for(i=0;i<512;i++) { if(i%16==0) DBG_871X("0x%03x: ", i); DBG_871X("%02x ", logical_map[i]); if(i%16==15) DBG_871X("\n"); } DBG_871X("\n"); } #endif } //Do not support BT VOID Hal_EFUSEGetEfuseDefinition8812A( IN PADAPTER pAdapter, IN u1Byte efuseType, IN u1Byte type, OUT PVOID pOut ) { switch(type) { case TYPE_EFUSE_MAX_SECTION: { u8* pMax_section; pMax_section = (u8*)pOut; *pMax_section = EFUSE_MAX_SECTION_JAGUAR; } break; case TYPE_EFUSE_REAL_CONTENT_LEN: { u16* pu2Tmp; pu2Tmp = (u16*)pOut; *pu2Tmp = EFUSE_REAL_CONTENT_LEN_JAGUAR; } break; case TYPE_EFUSE_CONTENT_LEN_BANK: { u16* pu2Tmp; pu2Tmp = (u16*)pOut; *pu2Tmp = EFUSE_REAL_CONTENT_LEN_JAGUAR; } break; case TYPE_AVAILABLE_EFUSE_BYTES_BANK: { u16* pu2Tmp; pu2Tmp = (u16*)pOut; *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_JAGUAR-EFUSE_OOB_PROTECT_BYTES_JAGUAR); } break; case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: { u16* pu2Tmp; pu2Tmp = (u16*)pOut; *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_JAGUAR-EFUSE_OOB_PROTECT_BYTES_JAGUAR); } break; case TYPE_EFUSE_MAP_LEN: { u16* pu2Tmp; pu2Tmp = (u16*)pOut; *pu2Tmp = (u16)EFUSE_MAP_LEN_JAGUAR; } break; case TYPE_EFUSE_PROTECT_BYTES_BANK: { u8* pu1Tmp; pu1Tmp = (u8*)pOut; *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_JAGUAR); } break; default: { u8* pu1Tmp; pu1Tmp = (u8*)pOut; *pu1Tmp = 0; } break; } } VOID Hal_EFUSEGetEfuseDefinition_Pseudo8812A( IN PADAPTER pAdapter, IN u8 efuseType, IN u8 type, OUT PVOID pOut ) { switch(type) { case TYPE_EFUSE_MAX_SECTION: { u8* pMax_section; pMax_section = (pu1Byte)pOut; *pMax_section = EFUSE_MAX_SECTION_JAGUAR; } break; case TYPE_EFUSE_REAL_CONTENT_LEN: { u16* pu2Tmp; pu2Tmp = (pu2Byte)pOut; *pu2Tmp = EFUSE_REAL_CONTENT_LEN_JAGUAR; } break; case TYPE_EFUSE_CONTENT_LEN_BANK: { u16* pu2Tmp; pu2Tmp = (pu2Byte)pOut; *pu2Tmp = EFUSE_REAL_CONTENT_LEN_JAGUAR; } break; case TYPE_AVAILABLE_EFUSE_BYTES_BANK: { u16* pu2Tmp; pu2Tmp = (pu2Byte)pOut; *pu2Tmp = (u2Byte)(EFUSE_REAL_CONTENT_LEN_JAGUAR-EFUSE_OOB_PROTECT_BYTES_JAGUAR); } break; case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: { u16* pu2Tmp; pu2Tmp = (pu2Byte)pOut; *pu2Tmp = (u2Byte)(EFUSE_REAL_CONTENT_LEN_JAGUAR-EFUSE_OOB_PROTECT_BYTES_JAGUAR); } break; case TYPE_EFUSE_MAP_LEN: { u16* pu2Tmp; pu2Tmp = (pu2Byte)pOut; *pu2Tmp = (u2Byte)EFUSE_MAP_LEN_JAGUAR; } break; case TYPE_EFUSE_PROTECT_BYTES_BANK: { u8* pu1Tmp; pu1Tmp = (u8*)pOut; *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_JAGUAR); } break; default: { u8* pu1Tmp; pu1Tmp = (u8*)pOut; *pu1Tmp = 0; } break; } } static VOID rtl8812_EFUSE_GetEfuseDefinition( IN PADAPTER pAdapter, IN u8 efuseType, IN u8 type, OUT void *pOut, IN BOOLEAN bPseudoTest ) { if(bPseudoTest) { Hal_EFUSEGetEfuseDefinition_Pseudo8812A(pAdapter, efuseType, type, pOut); } else { Hal_EFUSEGetEfuseDefinition8812A(pAdapter, efuseType, type, pOut); } } static u8 Hal_EfuseWordEnableDataWrite8812A( IN PADAPTER pAdapter, IN u16 efuse_addr, IN u8 word_en, IN u8 *data, IN BOOLEAN bPseudoTest) { u16 tmpaddr = 0; u16 start_addr = efuse_addr; u8 badworden = 0x0F; u8 tmpdata[8]; _rtw_memset((PVOID)tmpdata, 0xff, PGPKT_DATA_SIZE); //RT_TRACE(COMP_EFUSE, DBG_LOUD, ("word_en = %x efuse_addr=%x\n", word_en, efuse_addr)); if(!(word_en&BIT0)) { tmpaddr = start_addr; efuse_OneByteWrite(pAdapter,start_addr++, data[0], bPseudoTest); efuse_OneByteWrite(pAdapter,start_addr++, data[1], bPseudoTest); efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[0], bPseudoTest); efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[1], bPseudoTest); if((data[0]!=tmpdata[0])||(data[1]!=tmpdata[1])){ badworden &= (~BIT0); } } if(!(word_en&BIT1)) { tmpaddr = start_addr; efuse_OneByteWrite(pAdapter,start_addr++, data[2], bPseudoTest); efuse_OneByteWrite(pAdapter,start_addr++, data[3], bPseudoTest); efuse_OneByteRead(pAdapter,tmpaddr , &tmpdata[2], bPseudoTest); efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[3], bPseudoTest); if((data[2]!=tmpdata[2])||(data[3]!=tmpdata[3])){ badworden &=( ~BIT1); } } if(!(word_en&BIT2)) { tmpaddr = start_addr; efuse_OneByteWrite(pAdapter,start_addr++, data[4], bPseudoTest); efuse_OneByteWrite(pAdapter,start_addr++, data[5], bPseudoTest); efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[4], bPseudoTest); efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[5], bPseudoTest); if((data[4]!=tmpdata[4])||(data[5]!=tmpdata[5])){ badworden &=( ~BIT2); } } if(!(word_en&BIT3)) { tmpaddr = start_addr; efuse_OneByteWrite(pAdapter,start_addr++, data[6], bPseudoTest); efuse_OneByteWrite(pAdapter,start_addr++, data[7], bPseudoTest); efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[6], bPseudoTest); efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[7], bPseudoTest); if((data[6]!=tmpdata[6])||(data[7]!=tmpdata[7])){ badworden &=( ~BIT3); } } return badworden; } static u8 rtl8812_Efuse_WordEnableDataWrite( IN PADAPTER pAdapter, IN u16 efuse_addr, IN u8 word_en, IN u8 *data, IN BOOLEAN bPseudoTest) { u8 ret=0; ret = Hal_EfuseWordEnableDataWrite8812A(pAdapter, efuse_addr, word_en, data, bPseudoTest); return ret; } static u16 hal_EfuseGetCurrentSize_8812A(IN PADAPTER pAdapter, IN BOOLEAN bPseudoTest) { int bContinual = _TRUE; u16 efuse_addr = 0; u8 hoffset=0,hworden=0; u8 efuse_data,word_cnts=0; if(bPseudoTest) { efuse_addr = (u16)(fakeEfuseUsedBytes); } else { rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); } //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), start_efuse_addr = %d\n", efuse_addr)); while ( bContinual && efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) && (efuse_addr < EFUSE_REAL_CONTENT_LEN_JAGUAR)) { if(efuse_data!=0xFF) { if((efuse_data&0x1F) == 0x0F) //extended header { hoffset = efuse_data; efuse_addr++; efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest); if((efuse_data & 0x0F) == 0x0F) { efuse_addr++; continue; } else { hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); hworden = efuse_data & 0x0F; } } else { hoffset = (efuse_data>>4) & 0x0F; hworden = efuse_data & 0x0F; } word_cnts = Efuse_CalculateWordCnts(hworden); //read next header efuse_addr = efuse_addr + (word_cnts*2)+1; } else { bContinual = _FALSE ; } } if(bPseudoTest) { fakeEfuseUsedBytes = efuse_addr; //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), return %d\n", fakeEfuseUsedBytes)); } else { rtw_hal_set_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), return %d\n", efuse_addr)); } return efuse_addr; } static u16 rtl8812_EfuseGetCurrentSize( IN PADAPTER pAdapter, IN u8 efuseType, IN BOOLEAN bPseudoTest) { u16 ret=0; ret = hal_EfuseGetCurrentSize_8812A(pAdapter, bPseudoTest); return ret; } static int hal_EfusePgPacketRead_8812A( IN PADAPTER pAdapter, IN u8 offset, IN u8 *data, IN BOOLEAN bPseudoTest) { u8 ReadState = PG_STATE_HEADER; int bContinual = _TRUE; int bDataEmpty = _TRUE ; u8 efuse_data,word_cnts = 0; u16 efuse_addr = 0; u8 hoffset = 0,hworden = 0; u8 tmpidx = 0; u8 tmpdata[8]; u8 max_section = 0; u8 tmp_header = 0; if(data==NULL) return _FALSE; if(offset>EFUSE_MAX_SECTION_JAGUAR) return _FALSE; _rtw_memset((PVOID)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); _rtw_memset((PVOID)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); // // Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. // Skip dummy parts to prevent unexpected data read from Efuse. // By pass right now. 2009.02.19. // while(bContinual && (efuse_addr < EFUSE_REAL_CONTENT_LEN_JAGUAR) ) { //------- Header Read ------------- if(ReadState & PG_STATE_HEADER) { if(efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest)&&(efuse_data!=0xFF)) { if(EXT_HEADER(efuse_data)) { tmp_header = efuse_data; efuse_addr++; efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest); if(!ALL_WORDS_DISABLED(efuse_data)) { hoffset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); hworden = efuse_data & 0x0F; } else { DBG_8192C("Error, All words disabled\n"); efuse_addr++; break; } } else { hoffset = (efuse_data>>4) & 0x0F; hworden = efuse_data & 0x0F; } word_cnts = Efuse_CalculateWordCnts(hworden); bDataEmpty = _TRUE ; if(hoffset==offset) { for(tmpidx = 0;tmpidx< word_cnts*2 ;tmpidx++) { if(efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx ,&efuse_data, bPseudoTest) ) { tmpdata[tmpidx] = efuse_data; if(efuse_data!=0xff) { bDataEmpty = _FALSE; } } } if(bDataEmpty==_FALSE){ ReadState = PG_STATE_DATA; }else{//read next header efuse_addr = efuse_addr + (word_cnts*2)+1; ReadState = PG_STATE_HEADER; } } else{//read next header efuse_addr = efuse_addr + (word_cnts*2)+1; ReadState = PG_STATE_HEADER; } } else{ bContinual = _FALSE ; } } //------- Data section Read ------------- else if(ReadState & PG_STATE_DATA) { efuse_WordEnableDataRead(hworden,tmpdata,data); efuse_addr = efuse_addr + (word_cnts*2)+1; ReadState = PG_STATE_HEADER; } } if( (data[0]==0xff) &&(data[1]==0xff) && (data[2]==0xff) && (data[3]==0xff) && (data[4]==0xff) &&(data[5]==0xff) && (data[6]==0xff) && (data[7]==0xff)) return _FALSE; else return _TRUE; } static int rtl8812_Efuse_PgPacketRead( IN PADAPTER pAdapter, IN u8 offset, IN u8 *data, IN BOOLEAN bPseudoTest) { int ret=0; ret = hal_EfusePgPacketRead_8812A(pAdapter, offset, data, bPseudoTest); return ret; } int hal_EfusePgPacketWrite_8812A(IN PADAPTER pAdapter, IN u8 offset, IN u8 word_en, IN u8 *data, IN BOOLEAN bPseudoTest) { u8 WriteState = PG_STATE_HEADER; int bContinual = _TRUE,bDataEmpty=_TRUE; //int bResult = _TRUE; u16 efuse_addr = 0; u8 efuse_data; u8 pg_header = 0, pg_header_temp = 0; u8 tmp_word_cnts=0,target_word_cnts=0; u8 tmp_header,match_word_en,tmp_word_en; PGPKT_STRUCT target_pkt; PGPKT_STRUCT tmp_pkt; u8 originaldata[sizeof(u8)*8]; u8 tmpindex = 0,badworden = 0x0F; static int repeat_times = 0; BOOLEAN bExtendedHeader = _FALSE; u8 efuseType=EFUSE_WIFI; // // Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. // So we have to prevent unexpected data string connection, which will cause // incorrect data auto-load from HW. The total size is equal or smaller than 498bytes // (i.e., offset 0~497, and dummy 1bytes) expected after CP test. // 2009.02.19. // if( Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= (EFUSE_REAL_CONTENT_LEN_JAGUAR-EFUSE_OOB_PROTECT_BYTES_JAGUAR)) { DBG_871X("hal_EfusePgPacketWrite_8812A() error: %x >= %x\n", Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest), (EFUSE_REAL_CONTENT_LEN_JAGUAR-EFUSE_OOB_PROTECT_BYTES_JAGUAR)); return _FALSE; } // Init the 8 bytes content as 0xff target_pkt.offset = offset; target_pkt.word_en= word_en; // Initial the value to avoid compile warning tmp_pkt.offset = 0; tmp_pkt.word_en= 0; //DBG_871X("hal_EfusePgPacketWrite_8812A target offset 0x%x word_en 0x%x \n", target_pkt.offset, target_pkt.word_en); _rtw_memset((PVOID)target_pkt.data, 0xFF, sizeof(u8)*8); efuse_WordEnableDataRead(word_en, data, target_pkt.data); target_word_cnts = Efuse_CalculateWordCnts(target_pkt.word_en); //efuse_reg_ctrl(pAdapter,_TRUE);//power on //DBG_871X("EFUSE Power ON\n"); // // Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. // So we have to prevent unexpected data string connection, which will cause // incorrect data auto-load from HW. Dummy 1bytes is additional. // 2009.02.19. // while( bContinual && (efuse_addr < (EFUSE_REAL_CONTENT_LEN_JAGUAR-EFUSE_OOB_PROTECT_BYTES_JAGUAR)) ) { if(WriteState==PG_STATE_HEADER) { bDataEmpty=_TRUE; badworden = 0x0F; //************ so ******************* //DBG_871X("EFUSE PG_STATE_HEADER\n"); if ( efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) && (efuse_data!=0xFF)) { if((efuse_data&0x1F) == 0x0F) //extended header { tmp_header = efuse_data; efuse_addr++; efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest); if((efuse_data & 0x0F) == 0x0F) //wren fail { u8 next = 0, next_next = 0, data = 0, i = 0; u8 s = ((tmp_header & 0xF0) >> 4); efuse_OneByteRead(pAdapter, efuse_addr+1, &next, bPseudoTest); efuse_OneByteRead(pAdapter, efuse_addr+2, &next_next, bPseudoTest); if (next == 0xFF && next_next == 0xFF) { // Have enough space to make fake data to recover bad header. switch (s) { case 0x0: case 0x2: case 0x4: case 0x6: case 0x8: case 0xA: case 0xC: for (i = 0; i < 3; ++i) { efuse_OneByteWrite(pAdapter, efuse_addr, 0x27, bPseudoTest); efuse_OneByteRead(pAdapter, efuse_addr, &data, bPseudoTest); if (data == 0x27) break; } break; case 0xE: for (i = 0; i < 3; ++i) { efuse_OneByteWrite(pAdapter, efuse_addr, 0x17, bPseudoTest); efuse_OneByteRead(pAdapter, efuse_addr, &data, bPseudoTest); if (data == 0x17) break; } break; default: break; } efuse_OneByteWrite(pAdapter, efuse_addr+1, 0xFF, bPseudoTest); efuse_OneByteWrite(pAdapter, efuse_addr+2, 0xFF, bPseudoTest); efuse_addr += 3; } else { efuse_addr++; } continue; } else { tmp_pkt.offset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); tmp_pkt.word_en = efuse_data & 0x0F; } } else { u8 i = 0, data = 0; tmp_header = efuse_data; tmp_pkt.offset = (tmp_header>>4) & 0x0F; tmp_pkt.word_en = tmp_header & 0x0F; if (tmp_pkt.word_en == 0xF) { u8 next = 0; efuse_OneByteRead(pAdapter, efuse_addr+1, &next, bPseudoTest); if (next == 0xFF) { // Have enough space to make fake data to recover bad header. tmp_header = (tmp_header & 0xF0) | 0x7; for (i = 0; i < 3; ++i) { efuse_OneByteWrite(pAdapter, efuse_addr, tmp_header, bPseudoTest); efuse_OneByteRead(pAdapter, efuse_addr, &data, bPseudoTest); if (data == tmp_header) break; } efuse_OneByteWrite(pAdapter, efuse_addr+1, 0xFF, bPseudoTest); efuse_OneByteWrite(pAdapter, efuse_addr+2, 0xFF, bPseudoTest); efuse_addr += 2; } } } tmp_word_cnts = Efuse_CalculateWordCnts(tmp_pkt.word_en); //DBG_871X("section offset 0x%x worden 0x%x\n", tmp_pkt.offset, tmp_pkt.word_en); //************ so-1 ******************* if(tmp_pkt.offset != target_pkt.offset) { efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet #if (EFUSE_ERROE_HANDLE == 1) WriteState = PG_STATE_HEADER; #endif } else //write the same offset { //DBG_871X("hal_EfusePgPacketWrite_8812A section offset the same\n"); //************ so-2 ******************* for(tmpindex=0 ; tmpindex<(tmp_word_cnts*2) ; tmpindex++) { if(efuse_OneByteRead(pAdapter, (efuse_addr+1+tmpindex) ,&efuse_data, bPseudoTest)&&(efuse_data != 0xFF)){ bDataEmpty = _FALSE; } } //************ so-2-1 ******************* if(bDataEmpty == _FALSE) { //DBG_871X("hal_EfusePgPacketWrite_8812A section offset the same and data is NOT empty\n"); efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet #if (EFUSE_ERROE_HANDLE == 1) WriteState=PG_STATE_HEADER; #endif } else {//************ so-2-2 ******************* //DBG_871X("hal_EfusePgPacketWrite_8812A section data empty\n"); match_word_en = 0x0F; //same bit as original wren if( !( (target_pkt.word_en&BIT0)|(tmp_pkt.word_en&BIT0) )) { match_word_en &= (~BIT0); } if( !( (target_pkt.word_en&BIT1)|(tmp_pkt.word_en&BIT1) )) { match_word_en &= (~BIT1); } if( !( (target_pkt.word_en&BIT2)|(tmp_pkt.word_en&BIT2) )) { match_word_en &= (~BIT2); } if( !( (target_pkt.word_en&BIT3)|(tmp_pkt.word_en&BIT3) )) { match_word_en &= (~BIT3); } //************ so-2-2-A ******************* if((match_word_en&0x0F)!=0x0F) { badworden = Efuse_WordEnableDataWrite(pAdapter,efuse_addr+1, tmp_pkt.word_en ,target_pkt.data, bPseudoTest); //************ so-2-2-A-1 ******************* //############################ if(0x0F != (badworden&0x0F)) { u8 reorg_offset = offset; u8 reorg_worden=badworden; Efuse_PgPacketWrite(pAdapter, reorg_offset, reorg_worden, target_pkt.data, bPseudoTest); } //############################ tmp_word_en = 0x0F; //not the same bit as original wren if( (target_pkt.word_en&BIT0)^(match_word_en&BIT0) ) { tmp_word_en &= (~BIT0); } if( (target_pkt.word_en&BIT1)^(match_word_en&BIT1) ) { tmp_word_en &= (~BIT1); } if( (target_pkt.word_en&BIT2)^(match_word_en&BIT2) ) { tmp_word_en &= (~BIT2); } if( (target_pkt.word_en&BIT3)^(match_word_en&BIT3) ) { tmp_word_en &=(~BIT3); } //************ so-2-2-A-2 ******************* if((tmp_word_en&0x0F)!=0x0F){ //reorganize other pg packet // efuse_addr = efuse_addr + (2*tmp_word_cnts) +1;//next pg packet addr efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest); //=========================== target_pkt.offset = offset; target_pkt.word_en= tmp_word_en; //=========================== }else{ bContinual = _FALSE; } #if (EFUSE_ERROE_HANDLE == 1) WriteState=PG_STATE_HEADER; repeat_times++; if(repeat_times>EFUSE_REPEAT_THRESHOLD_){ bContinual = _FALSE; //bResult = _FALSE; } #endif } else{//************ so-2-2-B ******************* //reorganize other pg packet efuse_addr = efuse_addr + (2*tmp_word_cnts) +1;//next pg packet addr //=========================== target_pkt.offset = offset; //target_pkt.word_en= target_pkt.word_en; //=========================== #if (EFUSE_ERROE_HANDLE == 1) WriteState=PG_STATE_HEADER; #endif } } } DBG_871X("EFUSE PG_STATE_HEADER-1\n"); } else //************ s1: header == oxff ******************* { bExtendedHeader = _FALSE; if(target_pkt.offset >= EFUSE_MAX_SECTION_BASE) { pg_header = ((target_pkt.offset &0x07) << 5) | 0x0F; //DBG_871X("hal_EfusePgPacketWrite_8812A extended pg_header[2:0] |0x0F 0x%x \n", pg_header); efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest); efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest); while(tmp_header == 0xFF) { //DBG_871X("hal_EfusePgPacketWrite_8812A extended pg_header[2:0] wirte fail \n"); repeat_times++; if(repeat_times>EFUSE_REPEAT_THRESHOLD_){ bContinual = _FALSE; //bResult = _FALSE; efuse_addr++; break; } efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest); efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest); } if(!bContinual) break; if(tmp_header == pg_header) { efuse_addr++; pg_header_temp = pg_header; pg_header = ((target_pkt.offset & 0x78) << 1 ) | target_pkt.word_en; //DBG_871X("hal_EfusePgPacketWrite_8812A extended pg_header[6:3] | worden 0x%x word_en 0x%x \n", pg_header, target_pkt.word_en); efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest); efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest); while(tmp_header == 0xFF) { repeat_times++; if(repeat_times>EFUSE_REPEAT_THRESHOLD_){ bContinual = _FALSE; //bResult = _FALSE; break; } efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest); efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest); } if(!bContinual) break; if((tmp_header & 0x0F) == 0x0F) //wren PG fail { repeat_times++; if(repeat_times>EFUSE_REPEAT_THRESHOLD_){ bContinual = _FALSE; //bResult = _FALSE; break; } else { efuse_addr++; continue; } } else if(pg_header != tmp_header) //offset PG fail { bExtendedHeader = _TRUE; tmp_pkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1); tmp_pkt.word_en= tmp_header & 0x0F; tmp_word_cnts = Efuse_CalculateWordCnts(tmp_pkt.word_en); } } else if ((tmp_header & 0x1F) == 0x0F) //wrong extended header { efuse_addr+=2; continue; } } else { pg_header = ((target_pkt.offset << 4)&0xf0) |target_pkt.word_en; efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest); efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest); } if(tmp_header == pg_header) { //************ s1-1******************* WriteState = PG_STATE_DATA; } #if (EFUSE_ERROE_HANDLE == 1) else if(tmp_header == 0xFF){//************ s1-3: if Write or read func doesn't work ******************* //efuse_addr doesn't change WriteState = PG_STATE_HEADER; repeat_times++; if(repeat_times>EFUSE_REPEAT_THRESHOLD_){ bContinual = _FALSE; //bResult = _FALSE; } } #endif else {//************ s1-2 : fixed the header procedure ******************* if(!bExtendedHeader) { tmp_pkt.offset = (tmp_header>>4) & 0x0F; tmp_pkt.word_en= tmp_header & 0x0F; tmp_word_cnts = Efuse_CalculateWordCnts(tmp_pkt.word_en); } //************ s1-2-A :cover the exist data ******************* _rtw_memset(originaldata, 0xff, sizeof(u8)*8); if(Efuse_PgPacketRead( pAdapter, tmp_pkt.offset,originaldata, bPseudoTest)) { //check if data exist //efuse_reg_ctrl(pAdapter,_TRUE);//power on badworden = Efuse_WordEnableDataWrite(pAdapter,efuse_addr+1,tmp_pkt.word_en,originaldata, bPseudoTest); //############################ if(0x0F != (badworden&0x0F)) { u8 reorg_offset = tmp_pkt.offset; u8 reorg_worden=badworden; Efuse_PgPacketWrite(pAdapter,reorg_offset,reorg_worden,originaldata, bPseudoTest); efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest); } //############################ else{ efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet } } //************ s1-2-B: wrong address******************* else { efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet } #if (EFUSE_ERROE_HANDLE == 1) WriteState=PG_STATE_HEADER; repeat_times++; if(repeat_times>EFUSE_REPEAT_THRESHOLD_){ bContinual = _FALSE; //bResult = _FALSE; } #endif //DBG_871X("EFUSE PG_STATE_HEADER-2\n"); } } } //write data state else if(WriteState==PG_STATE_DATA) { //************ s1-1 ******************* //DBG_871X("EFUSE PG_STATE_DATA\n"); badworden = 0x0f; badworden = Efuse_WordEnableDataWrite(pAdapter,efuse_addr+1,target_pkt.word_en,target_pkt.data, bPseudoTest); if((badworden&0x0F)==0x0F) { //************ s1-1-A ******************* bContinual = _FALSE; } else {//reorganize other pg packet //************ s1-1-B ******************* efuse_addr = efuse_addr + (2*target_word_cnts) +1;//next pg packet addr //=========================== target_pkt.offset = offset; target_pkt.word_en= badworden; target_word_cnts = Efuse_CalculateWordCnts(target_pkt.word_en); //=========================== #if (EFUSE_ERROE_HANDLE == 1) WriteState=PG_STATE_HEADER; repeat_times++; if(repeat_times>EFUSE_REPEAT_THRESHOLD_){ bContinual = _FALSE; //bResult = _FALSE; } #endif //DBG_871X("EFUSE PG_STATE_HEADER-3\n"); } } } if(efuse_addr >= (EFUSE_REAL_CONTENT_LEN_JAGUAR-EFUSE_OOB_PROTECT_BYTES_JAGUAR)) { DBG_871X("hal_EfusePgPacketWrite_8812A(): efuse_addr(%#x) Out of size!!\n", efuse_addr); } //efuse_reg_ctrl(pAdapter,_FALSE);//power off return _TRUE; } static int rtl8812_Efuse_PgPacketWrite(IN PADAPTER pAdapter, IN u8 offset, IN u8 word_en, IN u8 *data, IN BOOLEAN bPseudoTest) { int ret; ret = hal_EfusePgPacketWrite_8812A(pAdapter, offset, word_en, data, bPseudoTest); return ret; } #ifdef CONFIG_EFUSE_CONFIG_FILE static s32 _halReadPGDataFromFile(PADAPTER padapter, u8 *pbuf) { u32 i; struct file *fp; mm_segment_t fs; u8 temp[3]; loff_t pos = 0; temp[2] = 0; // add end of string '\0' DBG_8192C("%s: Read Efuse from file [%s]\n", __FUNCTION__, EFUSE_FILE_PATH); fp = filp_open(EFUSE_FILE_PATH, O_RDONLY, 0); if (IS_ERR(fp)) { DBG_8192C("%s: Error, Read Efuse configure file FAIL!\n", __FUNCTION__); pEEPROM->bloadfile_fail_flag = _TRUE; return _FAIL; } fs = get_fs(); set_fs(KERNEL_DS); for (i=0; ibloadfile_fail_flag = _FALSE; return _SUCCESS; } static s32 _halReadMACAddrFromFile(PADAPTER padapter, u8 *pbuf) { struct file *fp; mm_segment_t fs; loff_t pos = 0; u8 source_addr[18]; u8 *head, *end; u32 curtime; u32 i; s32 ret = _SUCCESS; u8 null_mac_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; u8 multi_mac_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; curtime = rtw_get_current_time(); _rtw_memset(source_addr, 0, 18); _rtw_memset(pbuf, 0, ETH_ALEN); fp = filp_open(MAC_ADDRESS_FILE_PATH, O_RDONLY, 0); if (IS_ERR(fp)) { ret = _FAIL; DBG_8192C("%s: Error, Read MAC address file FAIL!\n", __FUNCTION__); } else { fs = get_fs(); set_fs(KERNEL_DS); vfs_read(fp, source_addr, 18, &pos); source_addr[17] = ':'; head = end = source_addr; for (i=0; i>8) & 0xff) ; pbuf[5] = (u8)((curtime>>16) & 0xff) ; } DBG_8192C("%s: Permanent Address = " MAC_FMT "\n", __FUNCTION__, MAC_ARG(pbuf)); return ret; } #endif // CONFIG_EFUSE_CONFIG_FILE void InitRDGSetting8812A(PADAPTER padapter) { rtw_write8(padapter, REG_RD_CTRL, 0xFF); rtw_write16(padapter, REG_RD_NAV_NXT, 0x200); rtw_write8(padapter, REG_RD_RESP_PKT_TH, 0x05); } void ReadRFType8812A(PADAPTER padapter) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); #if DISABLE_BB_RF pHalData->rf_chip = RF_PSEUDO_11N; #else pHalData->rf_chip = RF_6052; #endif //if (pHalData->rf_type == RF_1T1R){ // pHalData->bRFPathRxEnable[0] = _TRUE; //} //else { // Default unknow type is 2T2r // pHalData->bRFPathRxEnable[0] = pHalData->bRFPathRxEnable[1] = _TRUE; //} if (IsSupported24G(padapter->registrypriv.wireless_mode) && IsSupported5G(padapter->registrypriv.wireless_mode)) pHalData->BandSet = BAND_ON_BOTH; else if (IsSupported5G(padapter->registrypriv.wireless_mode)) pHalData->BandSet = BAND_ON_5G; else pHalData->BandSet = BAND_ON_2_4G; //if(padapter->bInHctTest) // pHalData->BandSet = BAND_ON_2_4G; } void rtl8812_GetHalODMVar( PADAPTER Adapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, PVOID pValue2) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T podmpriv = &pHalData->odmpriv; switch(eVariable){ default: GetHalODMVar(Adapter,eVariable,pValue1,pValue2); break; } } void rtl8812_SetHalODMVar( PADAPTER Adapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, BOOLEAN bSet) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T podmpriv = &pHalData->odmpriv; //_irqL irqL; switch(eVariable){ default: SetHalODMVar(Adapter,eVariable,pValue1,bSet); break; } } void rtl8812_start_thread(PADAPTER padapter) { } void rtl8812_stop_thread(PADAPTER padapter) { } void hal_notch_filter_8812(_adapter *adapter, bool enable) { if (enable) { DBG_871X("Enable notch filter\n"); //rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) | BIT1); } else { DBG_871X("Disable notch filter\n"); //rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) & ~BIT1); } } u8 GetEEPROMSize8812A( IN PADAPTER Adapter ) { u8 size = 0; u32 curRCR; curRCR = rtw_read16(Adapter, REG_SYS_EEPROM_CTRL); size = (curRCR & EEPROMSEL) ? 6 : 4; // 6: EEPROM used is 93C46, 4: boot from E-Fuse. DBG_871X("EEPROM type is %s\n", size==4 ? "E-FUSE" : "93C46"); //return size; return 4; // <20120713, Kordan> The default value of HW is 6 ?!! } void CheckAutoloadState8812A(PADAPTER padapter) { PEEPROM_EFUSE_PRIV pEEPROM; u8 val8; pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); /* check system boot selection */ val8 = rtw_read8(padapter, REG_9346CR); pEEPROM->EepromOrEfuse = (val8 & BOOT_FROM_EEPROM) ? _TRUE : _FALSE; pEEPROM->bautoload_fail_flag = (val8 & EEPROM_EN) ? _FALSE : _TRUE; DBG_8192C("%s: 9346CR(%#x)=0x%02x, Boot from %s, Autoload %s!\n", __FUNCTION__, REG_9346CR, val8, (pEEPROM->EepromOrEfuse ? "EEPROM" : "EFUSE"), (pEEPROM->bautoload_fail_flag ? "Fail" : "OK")); } void InitPGData8812A(PADAPTER padapter) { PEEPROM_EFUSE_PRIV pEEPROM; u32 i; u16 val16; pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); #ifdef CONFIG_EFUSE_CONFIG_FILE { s32 tmp; u32 addr; tmp = _halReadPGDataFromFile(padapter, pEEPROM->efuse_eeprom_data); pEEPROM->bloadfile_fail_flag = ((tmp==_FAIL) ? _TRUE : _FALSE); tmp = _halReadMACAddrFromFile(padapter, pEEPROM->mac_addr); pEEPROM->bloadmac_fail_flag = ((tmp==_FAIL) ? _TRUE : _FALSE); #ifdef CONFIG_SDIO_HCI addr = EEPROM_MAC_ADDR_8821AS; #elif defined(CONFIG_USB_HCI) if (IS_HARDWARE_TYPE_8812AU(padapter)) addr = EEPROM_MAC_ADDR_8812AU; else addr = EEPROM_MAC_ADDR_8821AU; #elif defined(CONFIG_PCI_HCI) if (IS_HARDWARE_TYPE_8812E(padapter)) addr = EEPROM_MAC_ADDR_8812AE; else addr = EEPROM_MAC_ADDR_8821AE; #endif // CONFIG_PCI_HCI _rtw_memcpy(&pEEPROM->efuse_eeprom_data[addr], pEEPROM->mac_addr, ETH_ALEN); } #else // !CONFIG_EFUSE_CONFIG_FILE if (_FALSE == pEEPROM->bautoload_fail_flag) { // autoload OK. if (is_boot_from_eeprom(padapter)) { // Read all Content from EEPROM or EFUSE. for (i = 0; i < HWSET_MAX_SIZE_JAGUAR; i += 2) { //val16 = EF2Byte(ReadEEprom(pAdapter, (u2Byte) (i>>1))); //*((u16*)(&PROMContent[i])) = val16; } } else { // Read EFUSE real map to shadow. EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); } } else { // update to default value 0xFF if (!is_boot_from_eeprom(padapter)) EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); } #endif // !CONFIG_EFUSE_CONFIG_FILE } void ReadChipVersion8812A( IN PADAPTER Adapter ) { u32 value32; HAL_VERSION ChipVersion; PHAL_DATA_TYPE pHalData; pHalData = GET_HAL_DATA(Adapter); value32 = rtw_read32(Adapter, REG_SYS_CFG); DBG_8192C("%s SYS_CFG(0x%X)=0x%08x \n", __FUNCTION__, REG_SYS_CFG, value32); if(IS_HARDWARE_TYPE_8812(Adapter)) ChipVersion.ICType = CHIP_8812; else ChipVersion.ICType = CHIP_8821; ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP); if (Adapter->registrypriv.rf_config == RF_MAX_TYPE) { if(IS_HARDWARE_TYPE_8812(Adapter)) ChipVersion.RFType = RF_TYPE_2T2R;//RF_2T2R; else ChipVersion.RFType = RF_TYPE_1T1R;//RF_1T1R; } if(Adapter->registrypriv.special_rf_path == 1) ChipVersion.RFType = RF_TYPE_1T1R; //RF_1T1R; if (IS_HARDWARE_TYPE_8812(Adapter)) ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC); else { u32 vendor; vendor = (value32 & EXT_VENDOR_ID) >> EXT_VENDOR_ID_SHIFT; switch (vendor) { case 0: vendor = CHIP_VENDOR_TSMC; break; case 1: vendor = CHIP_VENDOR_SMIC; break; case 2: vendor = CHIP_VENDOR_UMC; break; } ChipVersion.VendorType = vendor; } ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; // IC version (CUT) if(IS_HARDWARE_TYPE_8812(Adapter)) ChipVersion.CUTVersion += 1; //value32 = rtw_read32(Adapter, REG_GPIO_OUTSTS); ChipVersion.ROMVer = 0; // ROM code version. // For multi-function consideration. Added by Roger, 2010.10.06. pHalData->MultiFunc = RT_MULTI_FUNC_NONE; value32 = rtw_read32(Adapter, REG_MULTI_FUNC_CTRL); pHalData->MultiFunc |= ((value32 & WL_FUNC_EN) ? RT_MULTI_FUNC_WIFI : 0); pHalData->MultiFunc |= ((value32 & BT_FUNC_EN) ? RT_MULTI_FUNC_BT : 0); pHalData->PolarityCtl = ((value32 & WL_HWPDN_SL) ? RT_POLARITY_HIGH_ACT : RT_POLARITY_LOW_ACT); #if 1 dump_chip_info(ChipVersion); #endif _rtw_memcpy(&pHalData->VersionID, &ChipVersion, sizeof(HAL_VERSION)); if (IS_1T2R(ChipVersion)){ pHalData->rf_type = RF_1T2R; pHalData->NumTotalRFPath = 2; } else if (IS_2T2R(ChipVersion)){ pHalData->rf_type = RF_2T2R; pHalData->NumTotalRFPath = 2; } else{ pHalData->rf_type = RF_1T1R; pHalData->NumTotalRFPath = 1; } DBG_8192C("RF_Type is %x!!\n", pHalData->rf_type); } VOID Hal_PatchwithJaguar_8812( IN PADAPTER Adapter, IN RT_MEDIA_STATUS MediaStatus ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if( (MediaStatus == RT_MEDIA_CONNECT) && (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_REALTEK_JAGUAR_BCUTAP )) { rtw_write8(Adapter, rVhtlen_Use_Lsig_Jaguar, 0x1); rtw_write8(Adapter, REG_TCR+3, BIT2); } else { rtw_write8(Adapter, rVhtlen_Use_Lsig_Jaguar, 0x3F); rtw_write8(Adapter, REG_TCR+3, BIT0|BIT1|BIT2); } if( (MediaStatus == RT_MEDIA_CONNECT) && ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_REALTEK_JAGUAR_BCUTAP) || (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP))) { pHalData->Reg837 |= BIT2; rtw_write8(Adapter, rBWIndication_Jaguar+3, pHalData->Reg837); } else { pHalData->Reg837 &= (~BIT2); rtw_write8(Adapter, rBWIndication_Jaguar+3, pHalData->Reg837); } } void UpdateHalRAMask8812A(PADAPTER padapter, u32 mac_id, u8 rssi_level) { u32 mask,rate_bitmap; u8 shortGIrate = _FALSE; u8 arg[4] = {0}; struct sta_info *psta; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if (mac_id >= NUM_STA) //CAM_SIZE { return; } psta = pmlmeinfo->FW_sta_info[mac_id].psta; if(psta == NULL) { return; } shortGIrate = query_ra_short_GI(psta); mask = psta->ra_mask; rate_bitmap = 0xffffffff; rate_bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv,mac_id,mask,rssi_level); DBG_871X("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n", __FUNCTION__,mac_id,psta->wireless_mode,mask,rssi_level,rate_bitmap); mask &= rate_bitmap; #ifdef CONFIG_BT_COEXIST rate_bitmap = rtw_btcoex_GetRaMask(padapter); mask &= ~rate_bitmap; #endif // CONFIG_BT_COEXIST arg[0] = mac_id; arg[1] = psta->raid; arg[2] = shortGIrate; arg[3] = psta->init_rate; rtl8812_set_raid_cmd(padapter, mask, arg); } void InitDefaultValue8821A(PADAPTER padapter) { PHAL_DATA_TYPE pHalData; struct pwrctrl_priv *pwrctrlpriv; struct dm_priv *pdmpriv; u8 i; pHalData = GET_HAL_DATA(padapter); pwrctrlpriv = adapter_to_pwrctl(padapter); pdmpriv = &pHalData->dmpriv; // init default value pHalData->fw_ractrl = _FALSE; if (!pwrctrlpriv->bkeepfwalive) pHalData->LastHMEBoxNum = 0; /* hal capability values */ #ifdef CONFIG_RTL8821A if(IS_HARDWARE_TYPE_8821(padapter)) { pHalData->macid_num = MACID_NUM_8821A; pHalData->cam_entry_num = CAM_ENTRY_NUM_8821A; } else #endif { pHalData->macid_num = MACID_NUM_8812A; pHalData->cam_entry_num = CAM_ENTRY_NUM_8812A; } // init dm default value pHalData->bChnlBWInitialized = _FALSE; pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized = _FALSE; pHalData->odmpriv.RFCalibrateInfo.TM_Trigger = 0;//for IQK pHalData->pwrGroupCnt = 0; pHalData->PGMaxGroup = MAX_PG_GROUP; pHalData->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0; for (i = 0; i < HP_THERMAL_NUM; i++) pHalData->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0; pHalData->EfuseHal.fakeEfuseBank = 0; pHalData->EfuseHal.fakeEfuseUsedBytes = 0; _rtw_memset(pHalData->EfuseHal.fakeEfuseContent, 0xFF, EFUSE_MAX_HW_SIZE); _rtw_memset(pHalData->EfuseHal.fakeEfuseInitMap, 0xFF, EFUSE_MAX_MAP_LEN); _rtw_memset(pHalData->EfuseHal.fakeEfuseModifiedMap, 0xFF, EFUSE_MAX_MAP_LEN); } VOID _InitBeaconParameters_8812A( IN PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); rtw_write16(Adapter, REG_BCN_CTRL, 0x1010); // TODO: Remove these magic number rtw_write16(Adapter, REG_TBTT_PROHIBIT,0x6404);// ms rtw_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME_8812);// 5ms rtw_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME_8812); // 2ms // Suggested by designer timchen. Change beacon AIFS to the largest number // beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 rtw_write16(Adapter, REG_BCNTCFG, 0x660F); pHalData->RegBcnCtrlVal = rtw_read8(Adapter, REG_BCN_CTRL); pHalData->RegTxPause = rtw_read8(Adapter, REG_TXPAUSE); pHalData->RegFwHwTxQCtrl = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL+2); pHalData->RegReg542 = rtw_read8(Adapter, REG_TBTT_PROHIBIT+2); pHalData->RegCR_1 = rtw_read8(Adapter, REG_CR+1); } static VOID _BeaconFunctionEnable( IN PADAPTER Adapter, IN BOOLEAN Enable, IN BOOLEAN Linked ) { rtw_write8(Adapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1)); //SetBcnCtrlReg(Adapter, (BIT4 | BIT3 | BIT1), 0x00); //RT_TRACE(COMP_BEACON, DBG_LOUD, ("_BeaconFunctionEnable 0x550 0x%x\n", PlatformEFIORead1Byte(Adapter, 0x550))); rtw_write8(Adapter, REG_RD_CTRL+1, 0x6F); } static void ResumeTxBeacon(_adapter *padapter) { HAL_DATA_TYPE* pHalData = GET_HAL_DATA(padapter); // 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value // which should be read from register to a global variable. rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) | BIT6); pHalData->RegFwHwTxQCtrl |= BIT6; rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0xff); pHalData->RegReg542 |= BIT0; rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542); } static void StopTxBeacon(_adapter *padapter) { HAL_DATA_TYPE* pHalData = GET_HAL_DATA(padapter); rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) & (~BIT6)); pHalData->RegFwHwTxQCtrl &= (~BIT6); rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0x64); pHalData->RegReg542 &= ~(BIT0); rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542); //todo: CheckFwRsvdPageContent(Adapter); // 2010.06.23. Added by tynli. } void SetBeaconRelatedRegisters8812A(PADAPTER padapter) { u32 value32; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u32 bcn_ctrl_reg = REG_BCN_CTRL; //reset TSF, enable update TSF, correcting TSF On Beacon //REG_BCN_INTERVAL //REG_BCNDMATIM //REG_ATIMWND //REG_TBTT_PROHIBIT //REG_DRVERLYINT //REG_BCN_MAX_ERR //REG_BCNTCFG //(0x510) //REG_DUAL_TSF_RST //REG_BCN_CTRL //(0x550) //BCN interval #ifdef CONFIG_CONCURRENT_MODE if (padapter->iface_type == IFACE_PORT1){ bcn_ctrl_reg = REG_BCN_CTRL_1; } #endif rtw_write16(padapter, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval); rtw_write8(padapter, REG_ATIMWND, 0x02);// 2ms _InitBeaconParameters_8812A(padapter); rtw_write8(padapter, REG_SLOT, 0x09); value32 =rtw_read32(padapter, REG_TCR); value32 &= ~TSFRST; rtw_write32(padapter, REG_TCR, value32); value32 |= TSFRST; rtw_write32(padapter, REG_TCR, value32); // NOTE: Fix test chip's bug (about contention windows's randomness) rtw_write8(padapter, REG_RXTSF_OFFSET_CCK, 0x50); rtw_write8(padapter, REG_RXTSF_OFFSET_OFDM, 0x50); _BeaconFunctionEnable(padapter, _TRUE, _TRUE); ResumeTxBeacon(padapter); //rtw_write8(padapter, 0x422, rtw_read8(padapter, 0x422)|BIT(6)); //rtw_write8(padapter, 0x541, 0xff); //rtw_write8(padapter, 0x542, rtw_read8(padapter, 0x541)|BIT(0)); rtw_write8(padapter, bcn_ctrl_reg, rtw_read8(padapter, bcn_ctrl_reg)|BIT(1)); } #ifdef CONFIG_BEAMFORMING VOID SetBeamformingCLK_8812( IN PADAPTER Adapter ) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(Adapter); u16 u2btmp; u8 Count = 0, u1btmp; DBG_871X(" ==>%s\n", __FUNCTION__); if ( (check_fwstate(&Adapter->mlmepriv, _FW_UNDER_SURVEY)==_TRUE) #ifdef CONFIG_CONCURRENT_MODE || (check_buddy_fwstate(Adapter, _FW_UNDER_SURVEY) == _TRUE) #endif ) { DBG_871X(" <==%s return by Scan\n", __FUNCTION__); return; } // Stop Usb TxDMA rtw_write_port_cancel(Adapter); #ifdef CONFIG_PCI_HCI // Stop PCIe TxDMA rtw_write8(Adapter, REG_PCIE_CTRL_REG+1, 0xFE); #endif // Wait TXFF empty for(Count = 0; Count < 100; Count++) { u2btmp = rtw_read16(Adapter, REG_TXPKT_EMPTY); u2btmp = u2btmp & 0xfff; if(u2btmp != 0xfff) { rtw_mdelay_os(10); continue; } else break; } DBG_871X(" Tx Empty count %d \n", Count); // TX pause rtw_write8(Adapter, REG_TXPAUSE, 0xFF); // Wait TX State Machine OK for(Count = 0; Count < 100; Count++) { if(rtw_read32(Adapter, REG_SCH_TXCMD_8812) != 0) continue; else break; } DBG_871X(" Tx Status count %d \n", Count); // Stop RX DMA path u1btmp = rtw_read8(Adapter, REG_RXDMA_CONTROL_8812); rtw_write8(Adapter, REG_RXDMA_CONTROL_8812, u1btmp| BIT2); for(Count = 0; Count < 100; Count++) { u1btmp = rtw_read8(Adapter, REG_RXDMA_CONTROL_8812); if(u1btmp & BIT1) break; else rtw_mdelay_os(10); } DBG_871X(" Rx Empty count %d \n", Count); // Disable clock rtw_write8(Adapter, REG_SYS_CLKR+1, 0xf0); // Disable 320M rtw_write8(Adapter, REG_AFE_PLL_CTRL+3, 0x8); // Enable 320M rtw_write8(Adapter, REG_AFE_PLL_CTRL+3, 0xa); // Enable clock rtw_write8(Adapter, REG_SYS_CLKR+1, 0xfc); // Release Tx pause rtw_write8(Adapter, REG_TXPAUSE, 0); // Enable RX DMA path u1btmp = rtw_read8(Adapter, REG_RXDMA_CONTROL_8812); rtw_write8(Adapter, REG_RXDMA_CONTROL_8812, u1btmp & (~ BIT2)); // Start Usb TxDMA RTW_ENABLE_FUNC(Adapter, DF_TX_BIT); DBG_871X("%s \n", __FUNCTION__); DBG_871X("<==%s\n", __FUNCTION__); } VOID SetBeamformRfMode_8812( IN PADAPTER Adapter, IN struct beamforming_info *pBeamInfo ) { BOOLEAN bSelfBeamformer = _FALSE; BOOLEAN bSelfBeamformee = _FALSE; BEAMFORMING_CAP BeamformCap = BEAMFORMING_CAP_NONE; BeamformCap = beamforming_get_beamform_cap(pBeamInfo); if(BeamformCap == pBeamInfo->beamforming_cap) return; else pBeamInfo->beamforming_cap = BeamformCap; if(GET_RF_TYPE(Adapter) == RF_1T1R) return; bSelfBeamformer = BeamformCap & BEAMFORMER_CAP; bSelfBeamformee = BeamformCap & BEAMFORMEE_CAP; PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000,0x1); // RF Mode table write enable PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000,0x1); // RF Mode table write enable if(bSelfBeamformer) { // Paath_A PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000,0x3); // Select RX mode PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff,0x3F7FF); // Set Table data PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff,0xE26BF); // Enable TXIQGEN in RX mode // Path_B PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); // Select RX mode PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff,0x3F7FF); // Set Table data PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff,0xE26BF); // Enable TXIQGEN in RX mode } else { // Paath_A PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000, 0x3); // Select RX mode PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff,0x3F7FF); // Set Table data PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff,0xC26BF); // Disable TXIQGEN in RX mode // Path_B PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); // Select RX mode PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff,0x3F7FF); // Set Table data PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff,0xC26BF); // Disable TXIQGEN in RX mode } PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000,0x0); // RF Mode table write disable PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000,0x0); // RF Mode table write disable if(bSelfBeamformer) PHY_SetBBReg(Adapter, rTxPath_Jaguar, bMaskByte1, 0x33); else PHY_SetBBReg(Adapter, rTxPath_Jaguar, bMaskByte1, 0x11); } VOID SetBeamformEnter_8812( IN PADAPTER Adapter, IN u8 Idx ) { u8 i = 0; u32 CSI_Param; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); struct beamforming_entry BeamformEntry = pBeamInfo->beamforming_entry[Idx]; u16 STAid = 0; SetBeamformRfMode_8812(Adapter, pBeamInfo); if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) STAid = BeamformEntry.mac_id; else STAid = BeamformEntry.p_aid; // Sounding protocol control rtw_write8(Adapter, REG_SND_PTCL_CTRL_8812, 0xCB); // MAC addresss/Partial AID of Beamformer if(Idx == 0) { for(i = 0; i < 6 ; i++) rtw_write8(Adapter, (REG_BFMER0_INFO_8812+i), BeamformEntry.mac_addr[i]); // CSI report use legacy ofdm so don't need to fill P_AID. //rtw_write16(Adapter, REG_BFMER0_INFO_8812+6, BeamformEntry.P_AID); } else { for(i = 0; i < 6 ; i++) rtw_write8(Adapter, (REG_BFMER1_INFO_8812+i), BeamformEntry.mac_addr[i]); // CSI report use legacy ofdm so don't need to fill P_AID. //rtw_write16(Adapter, REG_BFMER1_INFO_8812+6, BeamformEntry.P_AID); } // CSI report parameters of Beamformee if( (BeamformEntry.beamforming_entry_cap & BEAMFORMEE_CAP_VHT_SU) || (BeamformEntry.beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) ) { if(pHalData->rf_type == RF_2T2R) CSI_Param = 0x01090109; else CSI_Param = 0x01080108; } else { if(pHalData->rf_type == RF_2T2R) CSI_Param = 0x03090309; else CSI_Param = 0x03080308; } if(pHalData->rf_type == RF_2T2R) rtw_write32(Adapter, 0x9B4, 0x00000000); // Nc =2 else rtw_write32(Adapter, 0x9B4, 0x01081008); // Nc =1 rtw_write32(Adapter, REG_CSI_RPT_PARAM_BW20_8812, CSI_Param); rtw_write32(Adapter, REG_CSI_RPT_PARAM_BW40_8812, CSI_Param); rtw_write32(Adapter, REG_CSI_RPT_PARAM_BW80_8812, CSI_Param); // P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt if(Idx == 0) { rtw_write16(Adapter, REG_TXBF_CTRL_8812, STAid); rtw_write8(Adapter, REG_TXBF_CTRL_8812+3, rtw_read8(Adapter, REG_TXBF_CTRL_8812+3)|BIT4|BIT6|BIT7); } else { rtw_write16(Adapter, REG_TXBF_CTRL_8812+2, STAid |BIT12 | BIT14|BIT15); } // CSI report parameters of Beamformee if(Idx == 0) { // Get BIT24 & BIT25 u8 tmp = rtw_read8(Adapter, REG_BFMEE_SEL_8812+3) & 0x3; rtw_write8(Adapter, REG_BFMEE_SEL_8812+3, tmp | 0x60); rtw_write16(Adapter, REG_BFMEE_SEL_8812, STAid | BIT9); } else { // Set BIT25 rtw_write16(Adapter, REG_BFMEE_SEL_8812+2, STAid | (0xE2 << 8)); } // Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip) rtw_write8(Adapter, REG_SND_PTCL_CTRL_8812+3, 0x50); beamforming_notify(Adapter); } VOID SetBeamformLeave_8812( IN PADAPTER Adapter, IN u8 Idx ) { struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(&(Adapter->mlmepriv)); SetBeamformRfMode_8812(Adapter, pBeamInfo); /* Clear P_AID of Beamformee * Clear MAC addresss of Beamformer * Clear Associated Bfmee Sel */ if(pBeamInfo->beamforming_cap == BEAMFORMING_CAP_NONE) rtw_write8(Adapter, REG_SND_PTCL_CTRL_8812, 0xC8); if(Idx == 0) { rtw_write16(Adapter, REG_TXBF_CTRL_8812, 0); rtw_write32(Adapter, REG_BFMER0_INFO_8812, 0); rtw_write16(Adapter, REG_BFMER0_INFO_8812+4, 0); rtw_write16(Adapter, REG_BFMEE_SEL_8812, 0); } else { rtw_write16( Adapter, REG_TXBF_CTRL_8812+2, rtw_read16(Adapter, REG_TXBF_CTRL_8812+2) & 0xF000); rtw_write32(Adapter, REG_BFMER1_INFO_8812, 0); rtw_write16(Adapter, REG_BFMER1_INFO_8812+4, 0); rtw_write16( Adapter, REG_BFMEE_SEL_8812+2, rtw_read16(Adapter, REG_BFMEE_SEL_8812+2) & 0x60); } } VOID SetBeamformStatus_8812( IN PADAPTER Adapter, IN u8 Idx ) { u16 BeamCtrlVal; u32 BeamCtrlReg; struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); struct beamforming_entry BeamformEntry = pBeamInfo->beamforming_entry[Idx]; if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) BeamCtrlVal = BeamformEntry.mac_id; else BeamCtrlVal = BeamformEntry.p_aid; if(Idx == 0) BeamCtrlReg = REG_TXBF_CTRL_8812; else { BeamCtrlReg = REG_TXBF_CTRL_8812+2; BeamCtrlVal |= BIT12 | BIT14|BIT15; } if(BeamformEntry.beamforming_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) { if(BeamformEntry.sound_bw == CHANNEL_WIDTH_20) BeamCtrlVal |= BIT9; else if(BeamformEntry.sound_bw == CHANNEL_WIDTH_40) BeamCtrlVal |= BIT10; else if(BeamformEntry.sound_bw == CHANNEL_WIDTH_80) BeamCtrlVal |= BIT11; } else { BeamCtrlVal &= ~(BIT9|BIT10|BIT11); } rtw_write16(Adapter, BeamCtrlReg, BeamCtrlVal); DBG_871X("%s Idx %d BeamCtrlReg %x BeamCtrlVal %x\n", __FUNCTION__, Idx, BeamCtrlReg, BeamCtrlVal); } VOID SetBeamformFwTxBFCmd_8812( IN PADAPTER Adapter ) { u8 Idx, Period0 = 0, Period1 = 0; u8 PageNum0 = 0xFF, PageNum1 = 0xFF; u8 u1TxBFParm[3]={0}; struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); for(Idx = 0; Idx < BEAMFORMING_ENTRY_NUM; Idx++) { if(pBeamInfo->beamforming_entry[Idx].beamforming_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) { if(Idx == 0) { if(pBeamInfo->beamforming_entry[Idx].bSound) PageNum0 = 0xFE; else PageNum0 = 0xFF; //stop sounding Period0 = (u8)(pBeamInfo->beamforming_entry[Idx].sound_period); } else if(Idx == 1) { if(pBeamInfo->beamforming_entry[Idx].bSound) PageNum1 = 0xFE; else PageNum1 = 0xFF; //stop sounding Period1 = (u8)(pBeamInfo->beamforming_entry[Idx].sound_period); } } } u1TxBFParm[0] = PageNum0; u1TxBFParm[1] = PageNum1; u1TxBFParm[2] = (Period1 << 4) | Period0; FillH2CCmd_8812(Adapter, H2C_8812_TxBF, 3, u1TxBFParm); DBG_871X("%s PageNum0 = %d Period0 = %d\n", __FUNCTION__, PageNum0, Period0); DBG_871X("PageNum1 = %d Period1 %d\n", PageNum1, Period1); } VOID SetBeamformDownloadNDPA_8812( IN PADAPTER Adapter, IN u8 Idx ) { u8 u1bTmp=0, tmpReg422=0, Head_Page; u8 BcnValidReg=0, count=0, DLBcnCount=0; BOOLEAN bSendBeacon=_FALSE; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u8 TxPageBndy= LAST_ENTRY_OF_TX_PKT_BUFFER_8812; // default reseved 1 page for the IC type which is undefined. struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(&(Adapter->mlmepriv)); struct beamforming_entry *pBeamEntry = pBeamInfo->beamforming_entry+Idx; //pHalData->bFwDwRsvdPageInProgress = _TRUE; if(Idx == 0) Head_Page = 0xFE; else Head_Page = 0xFE; rtw_hal_get_def_var(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&TxPageBndy); //Set REG_CR bit 8. DMA beacon by SW. u1bTmp = rtw_read8(Adapter, REG_CR+1); rtw_write8(Adapter, REG_CR+1, (u1bTmp|BIT0)); pHalData->RegCR_1 |= BIT0; rtw_write8(Adapter, REG_CR+1, pHalData->RegCR_1); // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. tmpReg422 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL+2); rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+2, tmpReg422&(~BIT6)); if(tmpReg422&BIT6) { DBG_871X("SetBeamformDownloadNDPA_8812(): There is an Adapter is sending beacon.\n"); bSendBeacon = _TRUE; } // TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA rtw_write8(Adapter,REG_TDECTRL+1, Head_Page); do { // Clear beacon valid check bit. BcnValidReg = rtw_read8(Adapter, REG_TDECTRL+2); rtw_write8(Adapter, REG_TDECTRL+2, (BcnValidReg|BIT0)); // download NDPA rsvd page. if(pBeamEntry->beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) beamforming_send_vht_ndpa_packet(Adapter,pBeamEntry->mac_addr,pBeamEntry->aid,pBeamEntry->sound_bw, BCN_QUEUE_INX); else beamforming_send_ht_ndpa_packet(Adapter,pBeamEntry->mac_addr,pBeamEntry->sound_bw, BCN_QUEUE_INX); // check rsvd page download OK. BcnValidReg = rtw_read8(Adapter, REG_TDECTRL+2); count=0; while(!(BcnValidReg & BIT0) && count <20) { count++; rtw_udelay_os(10); BcnValidReg = rtw_read8(Adapter, REG_TDECTRL+2); } DLBcnCount++; }while(!(BcnValidReg&BIT0) && DLBcnCount<5); if(!(BcnValidReg&BIT0)) DBG_871X("%s Download RSVD page failed!\n", __FUNCTION__); // TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA rtw_write8(Adapter,REG_TDECTRL+1, TxPageBndy); // To make sure that if there exists an adapter which would like to send beacon. // If exists, the origianl value of 0x422[6] will be 1, we should check this to // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause // the beacon cannot be sent by HW. // 2010.06.23. Added by tynli. if(bSendBeacon) { rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+2, tmpReg422); } // Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. // Clear CR[8] or beacon packet will not be send to TxBuf anymore. u1bTmp = rtw_read8(Adapter, REG_CR+1); rtw_write8(Adapter, REG_CR+1, (u1bTmp&(~BIT0))); pBeamEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED; //pHalData->bFwDwRsvdPageInProgress = _FALSE; } VOID SetBeamformFwTxBF_8812( IN PADAPTER Adapter, IN u8 Idx ) { struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(&(Adapter->mlmepriv)); struct beamforming_entry *pBeamEntry = pBeamInfo->beamforming_entry+Idx; if(pBeamEntry->beamforming_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING) SetBeamformDownloadNDPA_8812(Adapter, Idx); SetBeamformFwTxBFCmd_8812(Adapter); } VOID SetBeamformPatch_8812( IN PADAPTER Adapter, IN u8 Operation ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(&(Adapter->mlmepriv)); if(pBeamInfo->beamforming_cap == BEAMFORMING_CAP_NONE) return; /*if(Operation == SCAN_OPT_BACKUP_BAND0) { rtw_write8(Adapter, REG_SND_PTCL_CTRL_8812, 0xC8); } else if(Operation == SCAN_OPT_RESTORE) { rtw_write8(Adapter, REG_SND_PTCL_CTRL_8812, 0xCB); }*/ } #endif static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8* val) { u8 val8; u8 mode = *((u8 *)val); u32 value_rcr; #ifdef CONFIG_CONCURRENT_MODE if(Adapter->iface_type == IFACE_PORT1) { // disable Port1 TSF update rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|DIS_TSF_UDT); // set net_type val8 = rtw_read8(Adapter, MSR)&0x03; val8 |= (mode<<2); rtw_write8(Adapter, MSR, val8); DBG_871X("%s()-%d mode = %d\n", __FUNCTION__, __LINE__, mode); if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) { if(!check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) { StopTxBeacon(Adapter); #ifdef CONFIG_PCI_HCI UpdateInterruptMask8812AE( Adapter, 0, 0, RT_BCN_INT_MASKS, 0); #else #ifdef CONFIG_INTERRUPT_BASED_TXBCN #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT rtw_write8(Adapter, REG_DRVERLYINT, 0x05);//restore early int time to 5ms UpdateInterruptMask8812AU(Adapter,_TRUE, 0, IMR_BCNDMAINT0_8812); #endif // CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR UpdateInterruptMask8812AU(Adapter,_TRUE ,0, (IMR_TXBCN0ERR_8812|IMR_TXBCN0OK_8812)); #endif// CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR #endif //CONFIG_INTERRUPT_BASED_TXBCN #endif } rtw_write8(Adapter,REG_BCN_CTRL_1, 0x11);//disable atim wnd and disable beacon function //rtw_write8(Adapter,REG_BCN_CTRL_1, 0x18); } else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) { ResumeTxBeacon(Adapter); rtw_write8(Adapter,REG_BCN_CTRL_1, 0x1a); } else if(mode == _HW_STATE_AP_) { #ifdef CONFIG_PCI_HCI UpdateInterruptMask8812AE( Adapter, RT_BCN_INT_MASKS, 0, 0, 0); #else #ifdef CONFIG_INTERRUPT_BASED_TXBCN #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT UpdateInterruptMask8812AU(Adapter,_TRUE ,IMR_BCNDMAINT0_8812, 0); #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR UpdateInterruptMask8812AU(Adapter,_TRUE ,(IMR_TXBCN0ERR_8812|IMR_TXBCN0OK_8812), 0); #endif//CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR #endif //CONFIG_INTERRUPT_BASED_TXBCN #endif ResumeTxBeacon(Adapter); rtw_write8(Adapter, REG_BCN_CTRL_1, 0x12); //Set RCR //rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0 //rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0 //rtw_write32(Adapter, REG_RCR, 0x7000208e);//CBSSID_DATA must set to 0,reject ICV_ERR packet value_rcr = rtw_read32(Adapter, REG_RCR); value_rcr &= ~(RCR_CBSSID_DATA);//Clear CBSSID_DATA rtw_write32(Adapter, REG_RCR, value_rcr); //enable to rx data frame rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); //Beacon Control related register for first time rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms //rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); rtw_write8(Adapter, REG_ATIMWND_1, 0x0a); // 10ms for port1 rtw_write16(Adapter, REG_BCNTCFG, 0x00); rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04); rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms) //reset TSF2 rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)); //enable BCN1 Function for if2 //don't enable update TSF1 for if2 (due to TSF update when beacon/probe rsp are received) rtw_write8(Adapter, REG_BCN_CTRL_1, (DIS_TSF_UDT|EN_BCN_FUNCTION | EN_TXBCN_RPT|DIS_BCNQ_SUB)); if(IS_HARDWARE_TYPE_8821(Adapter)) { // select BCN on port 1 rtw_write8(Adapter, REG_CCK_CHECK_8812, rtw_read8(Adapter, REG_CCK_CHECK_8812)|BIT(5)); } #ifdef CONFIG_CONCURRENT_MODE if(check_buddy_fwstate(Adapter, WIFI_FW_NULL_STATE)) rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL) & ~EN_BCN_FUNCTION); #endif //BCN1 TSF will sync to BCN0 TSF with offset(0x518) if if1_sta linked //rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(5)); //rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(3)); //dis BCN0 ATIM WND if if1 is station rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|DIS_ATIM); #ifdef CONFIG_TSF_RESET_OFFLOAD // Reset TSF for STA+AP concurrent mode if ( check_buddy_fwstate(Adapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) { if (reset_tsf(Adapter, IFACE_PORT1) == _FALSE) DBG_871X("ERROR! %s()-%d: Reset port1 TSF fail\n", __FUNCTION__, __LINE__); } #endif // CONFIG_TSF_RESET_OFFLOAD } } else //else for port0 #endif // CONFIG_CONCURRENT_MODE { // disable Port0 TSF update rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|DIS_TSF_UDT); // set net_type val8 = rtw_read8(Adapter, MSR)&0x0c; val8 |= mode; rtw_write8(Adapter, MSR, val8); DBG_871X("%s()-%d mode = %d\n", __FUNCTION__, __LINE__, mode); if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) { #ifdef CONFIG_CONCURRENT_MODE if(!check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) #endif // CONFIG_CONCURRENT_MODE { StopTxBeacon(Adapter); #ifdef CONFIG_PCI_HCI UpdateInterruptMask8812AE( Adapter, 0, 0, RT_BCN_INT_MASKS, 0); #else #ifdef CONFIG_INTERRUPT_BASED_TXBCN #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT rtw_write8(Adapter, REG_DRVERLYINT, 0x05);//restore early int time to 5ms UpdateInterruptMask8812AU(Adapter,_TRUE, 0, IMR_BCNDMAINT0_8812); #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR UpdateInterruptMask8812AU(Adapter,_TRUE ,0, (IMR_TXBCN0ERR_8812|IMR_TXBCN0OK_8812)); #endif //CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR #endif //CONFIG_INTERRUPT_BASED_TXBCN #endif } rtw_write8(Adapter,REG_BCN_CTRL, 0x19);//disable atim wnd //rtw_write8(Adapter,REG_BCN_CTRL, 0x18); } else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) { ResumeTxBeacon(Adapter); rtw_write8(Adapter,REG_BCN_CTRL, 0x1a); } else if(mode == _HW_STATE_AP_) { #ifdef CONFIG_PCI_HCI UpdateInterruptMask8812AE( Adapter, RT_BCN_INT_MASKS, 0, 0, 0); #else #ifdef CONFIG_INTERRUPT_BASED_TXBCN #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT UpdateInterruptMask8812AU(Adapter,_TRUE ,IMR_BCNDMAINT0_8812, 0); #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR UpdateInterruptMask8812AU(Adapter,_TRUE ,(IMR_TXBCN0ERR_8812|IMR_TXBCN0OK_8812), 0); #endif//CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR #endif //CONFIG_INTERRUPT_BASED_TXBCN #endif ResumeTxBeacon(Adapter); rtw_write8(Adapter, REG_BCN_CTRL, 0x12); //Set RCR //rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0 //rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0 //rtw_write32(Adapter, REG_RCR, 0x7000208e);//CBSSID_DATA must set to 0,reject ICV_ERR packet value_rcr = rtw_read32(Adapter, REG_RCR); value_rcr &= ~(RCR_CBSSID_DATA);//Clear CBSSID_DATA rtw_write32(Adapter, REG_RCR, value_rcr); //enable to rx data frame rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); //Beacon Control related register for first time rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms //rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); rtw_write8(Adapter, REG_ATIMWND, 0x0a); // 10ms rtw_write16(Adapter, REG_BCNTCFG, 0x00); rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04); rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms) //reset TSF rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); //enable BCN0 Function for if1 //don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT|EN_BCN_FUNCTION | EN_TXBCN_RPT|DIS_BCNQ_SUB)); if(IS_HARDWARE_TYPE_8821(Adapter)) { // select BCN on port 0 rtw_write8(Adapter, REG_CCK_CHECK_8812, rtw_read8(Adapter, REG_CCK_CHECK_8812)&(~BIT(5))); } #ifdef CONFIG_CONCURRENT_MODE if(check_buddy_fwstate(Adapter, WIFI_FW_NULL_STATE)) rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1) & ~EN_BCN_FUNCTION); #endif //dis BCN1 ATIM WND if if2 is station rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|DIS_ATIM); #ifdef CONFIG_TSF_RESET_OFFLOAD // Reset TSF for STA+AP concurrent mode if ( check_buddy_fwstate(Adapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) { if (reset_tsf(Adapter, IFACE_PORT0) == _FALSE) DBG_871X("ERROR! %s()-%d: Reset port0 TSF fail\n", __FUNCTION__, __LINE__); } #endif // CONFIG_TSF_RESET_OFFLOAD } } } static void hw_var_set_macaddr(PADAPTER Adapter, u8 variable, u8* val) { u8 idx = 0; u32 reg_macid; #ifdef CONFIG_CONCURRENT_MODE if(Adapter->iface_type == IFACE_PORT1) { reg_macid = REG_MACID1; } else #endif { reg_macid = REG_MACID; } for(idx = 0 ; idx < 6; idx++) { rtw_write8(GET_PRIMARY_ADAPTER(Adapter), (reg_macid+idx), val[idx]); } } static void hw_var_set_bssid(PADAPTER Adapter, u8 variable, u8* val) { u8 idx = 0; u32 reg_bssid; #ifdef CONFIG_CONCURRENT_MODE if(Adapter->iface_type == IFACE_PORT1) { reg_bssid = REG_BSSID1; } else #endif { reg_bssid = REG_BSSID; } for(idx = 0 ; idx < 6; idx++) { rtw_write8(Adapter, (reg_bssid+idx), val[idx]); } } static void hw_var_set_bcn_func(PADAPTER Adapter, u8 variable, u8* val) { u32 bcn_ctrl_reg; #ifdef CONFIG_CONCURRENT_MODE if(Adapter->iface_type == IFACE_PORT1) { bcn_ctrl_reg = REG_BCN_CTRL_1; } else #endif { bcn_ctrl_reg = REG_BCN_CTRL; } if(*((u8 *)val)) { rtw_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT)); } else { rtw_write8(Adapter, bcn_ctrl_reg, rtw_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT))); } } static void hw_var_set_correct_tsf(PADAPTER Adapter, u8 variable, u8* val) { #ifdef CONFIG_CONCURRENT_MODE u64 tsf; struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); //tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) { //pHalData->RegTxPause |= STOP_BCNQ;BIT(6) //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6))); StopTxBeacon(Adapter); } if(Adapter->iface_type == IFACE_PORT1) { //disable related TSF function rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); rtw_write32(Adapter, REG_TSFTR1, tsf); rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32); //enable related TSF function rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3)); // Update buddy port's TSF if it is SoftAP for beacon TX issue! if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE && check_buddy_fwstate(Adapter, WIFI_AP_STATE) ) { //disable related TSF function rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3))); rtw_write32(Adapter, REG_TSFTR, tsf); rtw_write32(Adapter, REG_TSFTR+4, tsf>>32); //enable related TSF function rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3)); #ifdef CONFIG_TSF_RESET_OFFLOAD // Update buddy port's TSF(TBTT) if it is SoftAP for beacon TX issue! if (reset_tsf(Adapter, IFACE_PORT0) == _FALSE) DBG_871X("ERROR! %s()-%d: Reset port0 TSF fail\n", __FUNCTION__, __LINE__); #endif // CONFIG_TSF_RESET_OFFLOAD } } else { //disable related TSF function rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3))); rtw_write32(Adapter, REG_TSFTR, tsf); rtw_write32(Adapter, REG_TSFTR+4, tsf>>32); //enable related TSF function rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3)); // Update buddy port's TSF if it is SoftAP for beacon TX issue! if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE && check_buddy_fwstate(Adapter, WIFI_AP_STATE) ) { //disable related TSF function rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); rtw_write32(Adapter, REG_TSFTR1, tsf); rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32); //enable related TSF function rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3)); #ifdef CONFIG_TSF_RESET_OFFLOAD // Update buddy port's TSF if it is SoftAP for beacon TX issue! if (reset_tsf(Adapter, IFACE_PORT1) == _FALSE) DBG_871X("ERROR! %s()-%d: Reset port1 TSF fail\n", __FUNCTION__, __LINE__); #endif // CONFIG_TSF_RESET_OFFLOAD } } if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) { //pHalData->RegTxPause &= (~STOP_BCNQ); //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6)))); ResumeTxBeacon(Adapter); } #endif } static void hw_var_set_mlme_disconnect(PADAPTER Adapter, u8 variable, u8* val) { #ifdef CONFIG_CONCURRENT_MODE if(check_buddy_mlmeinfo_state(Adapter, _HW_STATE_NOLINK_)) rtw_write16(Adapter, REG_RXFLTMAP2, 0x00); if(Adapter->iface_type == IFACE_PORT1) { //reset TSF1 rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)); //disable update TSF1 rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4)); // disable Port1's beacon function rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); } else { //reset TSF rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); //disable update TSF rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); } #endif } static void hw_var_set_mlme_sitesurvey(PADAPTER Adapter, u8 variable, u8* val) { u32 value_rcr, rcr_clear_bit, reg_bcn_ctl; u16 value_rxfltmap2; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct mlme_priv *pmlmepriv=&(Adapter->mlmepriv); #ifdef CONFIG_CONCURRENT_MODE if(Adapter->iface_type == IFACE_PORT1) reg_bcn_ctl = REG_BCN_CTRL_1; else #endif reg_bcn_ctl = REG_BCN_CTRL; #ifdef CONFIG_FIND_BEST_CHANNEL rcr_clear_bit = (RCR_CBSSID_BCN | RCR_CBSSID_DATA); // Recieve all data frames value_rxfltmap2 = 0xFFFF; #else /* CONFIG_FIND_BEST_CHANNEL */ rcr_clear_bit = RCR_CBSSID_BCN; //config RCR to receive different BSSID & not to receive data frame value_rxfltmap2 = 0; #endif /* CONFIG_FIND_BEST_CHANNEL */ if( (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) #ifdef CONFIG_CONCURRENT_MODE || (check_buddy_fwstate(Adapter, WIFI_AP_STATE) == _TRUE) #endif ) { rcr_clear_bit = RCR_CBSSID_BCN; } #ifdef CONFIG_TDLS // TDLS will clear RCR_CBSSID_DATA bit for connection. else if (Adapter->tdlsinfo.link_established == _TRUE) { rcr_clear_bit = RCR_CBSSID_BCN; } #endif // CONFIG_TDLS value_rcr = rtw_read32(Adapter, REG_RCR); if(*((u8 *)val))//under sitesurvey { value_rcr &= ~(rcr_clear_bit); rtw_write32(Adapter, REG_RCR, value_rcr); rtw_write16(Adapter, REG_RXFLTMAP2, value_rxfltmap2); if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE |WIFI_ADHOC_MASTER_STATE)) { //disable update TSF rtw_write8(Adapter, reg_bcn_ctl, rtw_read8(Adapter, reg_bcn_ctl)|DIS_TSF_UDT); } // Save orignal RRSR setting. pHalData->RegRRSR = rtw_read16(Adapter, REG_RRSR); #ifdef CONFIG_CONCURRENT_MODE if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && check_buddy_fwstate(Adapter, _FW_LINKED)) { StopTxBeacon(Adapter); } #endif } else//sitesurvey done { if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) #ifdef CONFIG_CONCURRENT_MODE || check_buddy_fwstate(Adapter, (_FW_LINKED|WIFI_AP_STATE)) #endif ) { //enable to rx data frame rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); } if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE |WIFI_ADHOC_MASTER_STATE)) { //enable update TSF rtw_write8(Adapter, reg_bcn_ctl, rtw_read8(Adapter, reg_bcn_ctl)&(~(DIS_TSF_UDT))); } value_rcr |= rcr_clear_bit; rtw_write32(Adapter, REG_RCR, value_rcr); // Restore orignal RRSR setting. rtw_write16(Adapter, REG_RRSR, pHalData->RegRRSR); #ifdef CONFIG_CONCURRENT_MODE if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && check_buddy_fwstate(Adapter, _FW_LINKED)) { ResumeTxBeacon(Adapter); } #endif } } static void hw_var_set_mlme_join(PADAPTER Adapter, u8 variable, u8* val) { #ifdef CONFIG_CONCURRENT_MODE u8 RetryLimit = 0x30; u8 type = *((u8 *)val); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); if(type == 0) // prepare to join { if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && check_buddy_fwstate(Adapter, _FW_LINKED)) { StopTxBeacon(Adapter); } //enable to rx data frame.Accept all data frame //rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) { rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); } else { rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); } if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) { RetryLimit = (pEEPROM->CustomerID == RT_CID_CCX) ? 7 : 48; } else // Ad-hoc Mode { RetryLimit = 0x7; } } else if(type == 1) //joinbss_event call back when join res < 0 { if(check_buddy_mlmeinfo_state(Adapter, _HW_STATE_NOLINK_)) rtw_write16(Adapter, REG_RXFLTMAP2,0x00); if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && check_buddy_fwstate(Adapter, _FW_LINKED)) { ResumeTxBeacon(Adapter); //reset TSF 1/2 after ResumeTxBeacon rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0)); } } else if(type == 2) //sta add event call back { //enable update TSF if(Adapter->iface_type == IFACE_PORT1) rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4))); else rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) { //fixed beacon issue for 8191su........... rtw_write8(Adapter,0x542 ,0x02); RetryLimit = 0x7; } if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && check_buddy_fwstate(Adapter, _FW_LINKED)) { ResumeTxBeacon(Adapter); //reset TSF 1/2 after ResumeTxBeacon rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0)); } } rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); #endif } void SetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval) { PHAL_DATA_TYPE pHalData; struct dm_priv *pdmpriv; PDM_ODM_T podmpriv; u8 val8; u16 val16; u32 val32; _func_enter_; pHalData = GET_HAL_DATA(padapter); pdmpriv = &pHalData->dmpriv; podmpriv = &pHalData->odmpriv; switch (variable) { case HW_VAR_MEDIA_STATUS: val8 = rtw_read8(padapter, MSR) & 0x0c; val8 |= *pval; rtw_write8(padapter, MSR, val8); break; case HW_VAR_MEDIA_STATUS1: val8 = rtw_read8(padapter, MSR) & 0x03; val8 |= *pval << 2; rtw_write8(padapter, MSR, val8); break; case HW_VAR_SET_OPMODE: hw_var_set_opmode(padapter, variable, pval); break; case HW_VAR_MAC_ADDR: hw_var_set_macaddr(padapter, variable, pval); break; case HW_VAR_BSSID: hw_var_set_bssid(padapter, variable, pval); break; case HW_VAR_BASIC_RATE: { struct mlme_ext_info *mlmext_info = &padapter->mlmeextpriv.mlmext_info; u16 input_b = 0, masked = 0, ioted = 0, BrateCfg = 0; u16 rrsr_2g_force_mask = (RRSR_11M|RRSR_5_5M|RRSR_1M); u16 rrsr_2g_allow_mask = (RRSR_24M|RRSR_12M|RRSR_6M|RRSR_CCK_RATES); u16 rrsr_5g_force_mask = (RRSR_6M); u16 rrsr_5g_allow_mask = (RRSR_OFDM_RATES); HalSetBrateCfg(padapter, pval, &BrateCfg); input_b = BrateCfg; /* apply force and allow mask */ if(pHalData->CurrentBandType == BAND_ON_2_4G) { BrateCfg |= rrsr_2g_force_mask; BrateCfg &= rrsr_2g_allow_mask; } else // 5G { BrateCfg |= rrsr_5g_force_mask; BrateCfg &= rrsr_5g_allow_mask; } masked = BrateCfg; /* IOT consideration */ if (mlmext_info->assoc_AP_vendor == HT_IOT_PEER_CISCO) { /* if peer is cisco and didn't use ofdm rate, we enable 6M ack */ if((BrateCfg & (RRSR_24M|RRSR_12M|RRSR_6M)) == 0) BrateCfg |= RRSR_6M; } ioted = BrateCfg; pHalData->BasicRateSet = BrateCfg; DBG_8192C("HW_VAR_BASIC_RATE: %#x -> %#x -> %#x\n", input_b, masked, ioted); // Set RRSR rate table. rtw_write16(padapter, REG_RRSR, BrateCfg); rtw_write8(padapter, REG_RRSR+2, rtw_read8(padapter, REG_RRSR+2)&0xf0); } break; case HW_VAR_TXPAUSE: rtw_write8(padapter, REG_TXPAUSE, *pval); break; case HW_VAR_BCN_FUNC: hw_var_set_bcn_func(padapter, variable, pval); break; case HW_VAR_CORRECT_TSF: #ifdef CONFIG_CONCURRENT_MODE hw_var_set_correct_tsf(padapter, variable, pval); #else { u64 tsf; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); //tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) { //pHalData->RegTxPause |= STOP_BCNQ;BIT(6) //rtw_write8(padapter, REG_TXPAUSE, (rtw_read8(padapter, REG_TXPAUSE)|BIT(6))); StopTxBeacon(padapter); } //disable related TSF function rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(3))); rtw_write32(padapter, REG_TSFTR, tsf); rtw_write32(padapter, REG_TSFTR+4, tsf>>32); //enable related TSF function rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(3)); if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) { //pHalData->RegTxPause &= (~STOP_BCNQ); //rtw_write8(padapter, REG_TXPAUSE, (rtw_read8(padapter, REG_TXPAUSE)&(~BIT(6)))); ResumeTxBeacon(padapter); } } #endif break; case HW_VAR_CHECK_BSSID: val32 = rtw_read32(padapter, REG_RCR); if (*pval) val32 |= RCR_CBSSID_DATA|RCR_CBSSID_BCN; else val32 &= ~(RCR_CBSSID_DATA|RCR_CBSSID_BCN); rtw_write32(padapter, REG_RCR, val32); break; case HW_VAR_MLME_DISCONNECT: #ifdef CONFIG_CONCURRENT_MODE hw_var_set_mlme_disconnect(padapter, variable, pval); #else { // Set RCR to not to receive data frame when NO LINK state // val32 = rtw_read32(padapter, REG_RCR); // val32 &= ~RCR_ADF; // rtw_write32(padapter, REG_RCR, val32); // reject all data frames rtw_write16(padapter, REG_RXFLTMAP2, 0x00); // reset TSF val8 = BIT(0) | BIT(1); rtw_write8(padapter, REG_DUAL_TSF_RST, val8); // disable update TSF val8 = rtw_read8(padapter, REG_BCN_CTRL); val8 |= BIT(4); rtw_write8(padapter, REG_BCN_CTRL, val8); } #endif break; case HW_VAR_MLME_SITESURVEY: hw_var_set_mlme_sitesurvey(padapter, variable, pval); #ifdef CONFIG_BT_COEXIST rtw_btcoex_ScanNotify(padapter, *pval?_TRUE:_FALSE); #endif break; case HW_VAR_MLME_JOIN: #ifdef CONFIG_CONCURRENT_MODE hw_var_set_mlme_join(padapter, variable, pval); #else // !CONFIG_CONCURRENT_MODE { u8 RetryLimit = 0x30; u8 type = *(u8*)pval; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); if (type == 0) // prepare to join { //enable to rx data frame.Accept all data frame //rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); rtw_write16(padapter, REG_RXFLTMAP2, 0xFFFF); val32 = rtw_read32(padapter, REG_RCR); if (padapter->in_cta_test) val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);//| RCR_ADF else val32 |= RCR_CBSSID_DATA|RCR_CBSSID_BCN; rtw_write32(padapter, REG_RCR, val32); if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) { RetryLimit = (pEEPROM->CustomerID == RT_CID_CCX) ? 7 : 48; } else // Ad-hoc Mode { RetryLimit = 0x7; } } else if (type == 1) //joinbss_event call back when join res < 0 { rtw_write16(padapter, REG_RXFLTMAP2, 0x00); } else if (type == 2) //sta add event call back { //enable update TSF val8 = rtw_read8(padapter, REG_BCN_CTRL); val8 &= ~BIT(4); rtw_write8(padapter, REG_BCN_CTRL, val8); if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) { RetryLimit = 0x7; } } val16 = RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT; rtw_write16(padapter, REG_RL, val16); } #endif // !CONFIG_CONCURRENT_MODE #ifdef CONFIG_BT_COEXIST switch (*pval) { case 0: // prepare to join rtw_btcoex_ConnectNotify(padapter, _TRUE); break; case 1: // joinbss_event callback when join res < 0 rtw_btcoex_ConnectNotify(padapter, _FALSE); break; case 2: // sta add event callback // rtw_btcoex_MediaStatusNotify(padapter, RT_MEDIA_CONNECT); break; } #endif break; case HW_VAR_ON_RCR_AM: val32 = rtw_read32(padapter, REG_RCR); val32 |= RCR_AM; rtw_write32(padapter, REG_RCR, val32); DBG_8192C("%s, %d, RCR= %x\n", __FUNCTION__, __LINE__, rtw_read32(padapter, REG_RCR)); break; case HW_VAR_OFF_RCR_AM: val32 = rtw_read32(padapter, REG_RCR); val32 &= ~RCR_AM; rtw_write32(padapter, REG_RCR, val32); DBG_8192C("%s, %d, RCR= %x\n", __FUNCTION__, __LINE__, rtw_read32(padapter, REG_RCR)); break; case HW_VAR_BEACON_INTERVAL: rtw_write16(padapter, REG_BCN_INTERVAL, *(u16*)pval); #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT { struct mlme_ext_priv *pmlmeext; struct mlme_ext_info *pmlmeinfo; u16 bcn_interval; pmlmeext = &padapter->mlmeextpriv; pmlmeinfo = &pmlmeext->mlmext_info; bcn_interval = *((u16*)pval); if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { DBG_8192C("%s==> bcn_interval:%d, eraly_int:%d\n", __FUNCTION__, bcn_interval, bcn_interval>>1); rtw_write8(padapter, REG_DRVERLYINT, bcn_interval>>1);// 50ms for sdio } } #endif // CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT break; case HW_VAR_SLOT_TIME: rtw_write8(padapter, REG_SLOT, *pval); break; case HW_VAR_RESP_SIFS: // SIFS_Timer = 0x0a0a0808; // RESP_SIFS for CCK rtw_write8(padapter, REG_RESP_SIFS_CCK, pval[0]); // SIFS_T2T_CCK (0x08) rtw_write8(padapter, REG_RESP_SIFS_CCK+1, pval[1]); //SIFS_R2T_CCK(0x08) // RESP_SIFS for OFDM rtw_write8(padapter, REG_RESP_SIFS_OFDM, pval[2]); //SIFS_T2T_OFDM (0x0a) rtw_write8(padapter, REG_RESP_SIFS_OFDM+1, pval[3]); //SIFS_R2T_OFDM(0x0a) break; case HW_VAR_ACK_PREAMBLE: { u8 bShortPreamble = *pval; // Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) val8 = (pHalData->nCur40MhzPrimeSC) << 5; if (bShortPreamble) val8 |= 0x80; rtw_write8(padapter, REG_RRSR+2, val8); } break; case HW_VAR_CAM_EMPTY_ENTRY: { u8 ucIndex = *pval; u8 i; u32 ulCommand = 0; u32 ulContent = 0; u32 ulEncAlgo = CAM_AES; for (i=0; iAcParam_BE = *(u32*)pval; rtw_write32(padapter, REG_EDCA_BE_PARAM, *(u32*)pval); break; case HW_VAR_AC_PARAM_BK: rtw_write32(padapter, REG_EDCA_BK_PARAM, *(u32*)pval); break; case HW_VAR_ACM_CTRL: { u8 acm_ctrl; u8 AcmCtrl; acm_ctrl = *(u8*)pval; AcmCtrl = rtw_read8(padapter, REG_ACMHWCTRL); if (acm_ctrl > 1) AcmCtrl = AcmCtrl | 0x1; if (acm_ctrl & BIT(3)) AcmCtrl |= AcmHw_VoqEn; else AcmCtrl &= (~AcmHw_VoqEn); if (acm_ctrl & BIT(2)) AcmCtrl |= AcmHw_ViqEn; else AcmCtrl &= (~AcmHw_ViqEn); if (acm_ctrl & BIT(1)) AcmCtrl |= AcmHw_BeqEn; else AcmCtrl &= (~AcmHw_BeqEn); DBG_8192C("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl); rtw_write8(padapter, REG_ACMHWCTRL, AcmCtrl ); } break; case HW_VAR_AMPDU_FACTOR: { u32 AMPDULen = *(u8*)pval; if (IS_HARDWARE_TYPE_8812(padapter)) { if (AMPDULen < VHT_AGG_SIZE_128K) AMPDULen = (0x2000 << *(u8*)pval) - 1; else AMPDULen = 0x1ffff; } else if(IS_HARDWARE_TYPE_8821(padapter)) { if (AMPDULen < HT_AGG_SIZE_64K) AMPDULen = (0x2000 << *(u8*)pval) - 1; else AMPDULen = 0xffff; } AMPDULen |= BIT(31); rtw_write32(padapter, REG_AMPDU_MAX_LENGTH_8812, AMPDULen); } break; #if 0 case HW_VAR_RXDMA_AGG_PG_TH: rtw_write8(padapter, REG_RXDMA_AGG_PG_TH, *pval); break; #endif case HW_VAR_H2C_FW_PWRMODE: { u8 psmode = *pval; // Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power // saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. if ((psmode != PS_MODE_ACTIVE) && (!IS_92C_SERIAL(pHalData->VersionID))) { ODM_RF_Saving(podmpriv, _TRUE); } rtl8812_set_FwPwrMode_cmd(padapter, psmode); } break; case HW_VAR_H2C_FW_JOINBSSRPT: rtl8812_set_FwJoinBssReport_cmd(padapter, *pval); break; #ifdef CONFIG_P2P_PS case HW_VAR_H2C_FW_P2P_PS_OFFLOAD: rtl8812_set_p2p_ps_offload_cmd(padapter, *pval); break; #endif // CONFIG_P2P_PS #ifdef CONFIG_TDLS case HW_VAR_TDLS_WRCR: val32 = rtw_read32(padapter, REG_RCR); val32 &= ~RCR_CBSSID_DATA; rtw_write32(padapter, REG_RCR, val32); break; case HW_VAR_TDLS_INIT_CH_SEN: val32 = rtw_read32(padapter, REG_RCR); val32 &= (~RCR_CBSSID_DATA) & (~RCR_CBSSID_BCN); rtw_write32(padapter, REG_RCR, val32); rtw_write16(padapter, REG_RXFLTMAP2, 0xffff); // disable update TSF val8 = rtw_read8(padapter, REG_BCN_CTRL); val8 |= BIT(4); rtw_write8(padapter, REG_BCN_CTRL, val8); break; case HW_VAR_TDLS_DONE_CH_SEN: // enable update TSF val8 = rtw_read8(padapter, REG_BCN_CTRL); val8 &= ~BIT(4); rtw_write8(padapter, REG_BCN_CTRL, val8); val32 = rtw_read32(padapter, REG_RCR); val32 |= RCR_CBSSID_BCN; rtw_write32(padapter, REG_RCR, val32); break; case HW_VAR_TDLS_RS_RCR: val32 = rtw_read32(padapter, REG_RCR); val32 |= RCR_CBSSID_DATA; rtw_write32(padapter, REG_RCR, val32); break; #endif // CONFIG_TDLS #if defined(CONFIG_BT_COEXIST) && 0 case HW_VAR_BT_SET_COEXIST: rtl8812_set_dm_bt_coexist(padapter, *pval); break; case HW_VAR_BT_ISSUE_DELBA: rtl8812_issue_delete_ba(padapter, *pval); break; #endif #ifdef CONFIG_SW_ANTENNA_DIVERSITY case HW_VAR_ANTENNA_DIVERSITY_LINK: //SwAntDivRestAfterLink8192C(padapter); ODM_SwAntDivRestAfterLink(podmpriv); break; case HW_VAR_ANTENNA_DIVERSITY_SELECT: { u8 Optimum_antenna = *pval; u8 Ant; //switch antenna to Optimum_antenna //DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); if (pHalData->CurAntenna != Optimum_antenna) { Ant = (Optimum_antenna==2) ? MAIN_ANT : AUX_ANT; ODM_UpdateRxIdleAnt(podmpriv, Ant); pHalData->CurAntenna = Optimum_antenna; //DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); } } break; #endif case HW_VAR_EFUSE_USAGE: pHalData->EfuseUsedPercentage = *pval; break; case HW_VAR_EFUSE_BYTES: pHalData->EfuseUsedBytes = *(u16*)pval; break; #if 0 case HW_VAR_EFUSE_BT_USAGE: #ifdef HAL_EFUSE_MEMORY pHalData->EfuseHal.BTEfuseUsedPercentage = *pval; #endif break; case HW_VAR_EFUSE_BT_BYTES: #ifdef HAL_EFUSE_MEMORY pHalData->EfuseHal.BTEfuseUsedBytes = *(u16*)pval; #else BTEfuseUsedBytes = *(u16*)pval; #endif break; #endif case HW_VAR_FIFO_CLEARN_UP: { struct pwrctrl_priv *pwrpriv; u8 trycnt = 100; pwrpriv = adapter_to_pwrctl(padapter); // pause tx rtw_write8(padapter, REG_TXPAUSE, 0xff); // keep sn padapter->xmitpriv.nqos_ssn = rtw_read16(padapter, REG_NQOS_SEQ); if (pwrpriv->bkeepfwalive != _TRUE) { // RX DMA stop val32 = rtw_read32(padapter, REG_RXPKT_NUM); val32 |= RW_RELEASE_EN; rtw_write32(padapter, REG_RXPKT_NUM, val32); do { val32 = rtw_read32(padapter, REG_RXPKT_NUM); val32 &= RXDMA_IDLE; if (val32) break; } while (--trycnt); if (trycnt == 0) { DBG_8192C("[HW_VAR_FIFO_CLEARN_UP] Stop RX DMA failed......\n"); } //RQPN Load 0 rtw_write16(padapter, REG_RQPN_NPQ, 0x0); rtw_write32(padapter, REG_RQPN, 0x80000000); rtw_mdelay_os(10); } } break; case HW_VAR_CHECK_TXBUF: { u8 retry_limit; u32 reg_200 = 0, reg_204 = 0; u32 init_reg_200 = 0, init_reg_204 = 0; u32 start = rtw_get_current_time(); u32 pass_ms; int i = 0; retry_limit = 0x01; val16 = retry_limit << RETRY_LIMIT_SHORT_SHIFT | retry_limit << RETRY_LIMIT_LONG_SHIFT; rtw_write16(padapter, REG_RL, val16); while (rtw_get_passing_time_ms(start) < 2000 && !padapter->bDriverStopped && !padapter->bSurpriseRemoved ) { reg_200 = rtw_read32(padapter, 0x200); reg_204 = rtw_read32(padapter, 0x204); if (i == 0) { init_reg_200 = reg_200; init_reg_204 = reg_204; } i++; if ((reg_200 & 0x00ffffff) != (reg_204 & 0x00ffffff)) { //DBG_871X("%s: (HW_VAR_CHECK_TXBUF)TXBUF NOT empty - 0x204=0x%x, 0x200=0x%x (%d)\n", __FUNCTION__, reg_204, reg_200, i); rtw_msleep_os(10); } else { break; } } pass_ms = rtw_get_passing_time_ms(start); if (padapter->bDriverStopped || padapter->bSurpriseRemoved) { } else if (pass_ms >= 2000 || (reg_200 & 0x00ffffff) != (reg_204 & 0x00ffffff)) { DBG_871X_LEVEL(_drv_always_, "%s:(HW_VAR_CHECK_TXBUF)NOT empty(%d) in %d ms\n", __FUNCTION__, i, pass_ms); DBG_871X_LEVEL(_drv_always_, "%s:(HW_VAR_CHECK_TXBUF)0x200=0x%08x, 0x204=0x%08x (0x%08x, 0x%08x)\n", __FUNCTION__, reg_200, reg_204, init_reg_200, init_reg_204); //rtw_warn_on(1); } else { DBG_871X("%s:(HW_VAR_CHECK_TXBUF)TXBUF Empty(%d) in %d ms\n", __FUNCTION__, i, pass_ms); } retry_limit = 0x30; val16 = retry_limit << RETRY_LIMIT_SHORT_SHIFT | retry_limit << RETRY_LIMIT_LONG_SHIFT; rtw_write16(padapter, REG_RL, val16); } break; case HW_VAR_H2C_MEDIA_STATUS_RPT: { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; RT_MEDIA_STATUS mstatus = *(u16*)pval & 0xFF; rtl8812_set_FwMediaStatus_cmd(padapter, *(u16*)pval); if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) Hal_PatchwithJaguar_8812(padapter, mstatus); } break; case HW_VAR_APFM_ON_MAC: pHalData->bMacPwrCtrlOn = *pval; DBG_8192C("%s: bMacPwrCtrlOn=%d\n", __FUNCTION__, pHalData->bMacPwrCtrlOn); break; case HW_VAR_NAV_UPPER: { u32 usNavUpper = *((u32*)pval); if (usNavUpper > HAL_NAV_UPPER_UNIT * 0xFF) { DBG_8192C("%s: [HW_VAR_NAV_UPPER] set value(0x%08X us) is larger than (%d * 0xFF)!\n", __FUNCTION__, usNavUpper, HAL_NAV_UPPER_UNIT); break; } // The value of ((usNavUpper + HAL_NAV_UPPER_UNIT - 1) / HAL_NAV_UPPER_UNIT) // is getting the upper integer. usNavUpper = (usNavUpper + HAL_NAV_UPPER_UNIT - 1) / HAL_NAV_UPPER_UNIT; rtw_write8(padapter, REG_NAV_UPPER, (u8)usNavUpper); } break; case HW_VAR_BCN_VALID: #ifdef CONFIG_CONCURRENT_MODE if (IS_HARDWARE_TYPE_8821(padapter) && padapter->iface_type == IFACE_PORT1) { val8 = rtw_read8(padapter, REG_DWBCN1_CTRL_8812+2); val8 |= BIT(0); rtw_write8(padapter, REG_DWBCN1_CTRL_8812+2, val8); } else #endif { // BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw val8 = rtw_read8(padapter, REG_TDECTRL+2); val8 |= BIT(0); rtw_write8(padapter, REG_TDECTRL+2, val8); } break; case HW_VAR_DL_BCN_SEL: #ifdef CONFIG_CONCURRENT_MODE if (IS_HARDWARE_TYPE_8821(padapter) && padapter->iface_type == IFACE_PORT1) { // SW_BCN_SEL - Port1 val8 = rtw_read8(padapter, REG_DWBCN1_CTRL_8812+2); val8 |= BIT(4); rtw_write8(padapter, REG_DWBCN1_CTRL_8812+2, val8); } else #endif { // SW_BCN_SEL - Port0 val8 = rtw_read8(padapter, REG_DWBCN1_CTRL_8812+2); val8 &= ~BIT(4); rtw_write8(padapter, REG_DWBCN1_CTRL_8812+2, val8); } break; case HW_VAR_WIRELESS_MODE: { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; u8 R2T_SIFS = 0, SIFS_Timer = 0; u8 wireless_mode = *pval; if ((wireless_mode == WIRELESS_11BG) || (wireless_mode == WIRELESS_11G)) SIFS_Timer = 0xa; else SIFS_Timer = 0xe; // SIFS for OFDM Data ACK rtw_write8(padapter, REG_SIFS_CTX+1, SIFS_Timer); // SIFS for OFDM consecutive tx like CTS data! rtw_write8(padapter, REG_SIFS_TRX+1, SIFS_Timer); rtw_write8(padapter,REG_SPEC_SIFS+1, SIFS_Timer); rtw_write8(padapter,REG_MAC_SPEC_SIFS+1, SIFS_Timer); // 20100719 Joseph: Revise SIFS setting due to Hardware register definition change. rtw_write8(padapter, REG_RESP_SIFS_OFDM+1, SIFS_Timer); rtw_write8(padapter, REG_RESP_SIFS_OFDM, SIFS_Timer); // // Adjust R2T SIFS for IOT issue. Add by hpfan 2013.01.25 // Set R2T SIFS to 0x0a for Atheros IOT. Add by hpfan 2013.02.22 // // Mac has 10 us delay so use 0xa value is enough. R2T_SIFS = 0xa; #ifdef CONFIG_80211AC_VHT if (wireless_mode & WIRELESS_11_5AC && //MgntLinkStatusQuery(Adapter) && TEST_FLAG(pmlmepriv->vhtpriv.ldpc_cap, LDPC_VHT_ENABLE_RX) && TEST_FLAG(pmlmepriv->vhtpriv.stbc_cap, STBC_VHT_ENABLE_RX)) { if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_ATHEROS) R2T_SIFS = 0x8; else R2T_SIFS = 0xa; } #endif //CONFIG_80211AC_VHT rtw_write8(padapter, REG_RESP_SIFS_OFDM+1, R2T_SIFS); } break; case HW_VAR_DO_IQK: pHalData->bNeedIQK = _TRUE; break; #ifdef CONFIG_BEAMFORMING case HW_VAR_SOUNDING_ENTER: SetBeamformEnter_8812(padapter, *pval); break; case HW_VAR_SOUNDING_LEAVE: SetBeamformLeave_8812(padapter, *pval); break; case HW_VAR_SOUNDING_RATE: rtw_write8(padapter, REG_NDPA_OPT_CTRL_8812, (MRateToHwRate(pval[1]) << 2 | pval[0]) ); break; case HW_VAR_SOUNDING_STATUS: SetBeamformStatus_8812(padapter, *pval); break; case HW_VAR_SOUNDING_FW_NDPA: SetBeamformFwTxBF_8812(padapter, *pval); break; case HW_VAR_SOUNDING_CLK: SetBeamformingCLK_8812(padapter); break; #endif case HW_VAR_MACID_SLEEP: { u32 reg_macid_sleep; u8 bit_shift; u8 id = *(u8*)pval; u32 val32; if (id < 32) { reg_macid_sleep = REG_MACID_SLEEP; bit_shift = id; } else if (id < 64) { reg_macid_sleep = REG_MACID_SLEEP_1; bit_shift = id-32; } else if (id < 96) { reg_macid_sleep = REG_MACID_SLEEP_2; bit_shift = id-64; } else if (id < 128) { reg_macid_sleep = REG_MACID_SLEEP_3; bit_shift = id-96; } else { rtw_warn_on(1); break; } val32 = rtw_read32(padapter, reg_macid_sleep); DBG_8192C(FUNC_ADPT_FMT ": [HW_VAR_MACID_SLEEP] macid=%d, org reg_0x%03x=0x%08X\n", FUNC_ADPT_ARG(padapter), id, reg_macid_sleep, val32); if (val32 & BIT(bit_shift)) break; val32 |= BIT(bit_shift); rtw_write32(padapter, reg_macid_sleep, val32); } break; case HW_VAR_MACID_WAKEUP: { u32 reg_macid_sleep; u8 bit_shift; u8 id = *(u8*)pval; u32 val32; if (id < 32) { reg_macid_sleep = REG_MACID_SLEEP; bit_shift = id; } else if (id < 64) { reg_macid_sleep = REG_MACID_SLEEP_1; bit_shift = id-32; } else if (id < 96) { reg_macid_sleep = REG_MACID_SLEEP_2; bit_shift = id-64; } else if (id < 128) { reg_macid_sleep = REG_MACID_SLEEP_3; bit_shift = id-96; } else { rtw_warn_on(1); break; } val32 = rtw_read32(padapter, reg_macid_sleep); DBG_8192C(FUNC_ADPT_FMT ": [HW_VAR_MACID_WAKEUP] macid=%d, org reg_0x%03x=0x%08X\n", FUNC_ADPT_ARG(padapter), id, reg_macid_sleep, val32); if (!(val32 & BIT(bit_shift))) break; val32 &= ~BIT(bit_shift); rtw_write32(padapter, reg_macid_sleep, val32); } break; default: SetHwReg(padapter, variable, pval); break; } _func_exit_; } struct qinfo_8812a { u32 head:8; u32 pkt_num:7; u32 tail:8; u32 ac:2; u32 macid:7; }; struct bcn_qinfo_8812a { u16 head:8; u16 pkt_num:8; }; void dump_qinfo_8812a(void *sel, struct qinfo_8812a *info, const char *tag) { //if (info->pkt_num) DBG_871X_SEL_NL(sel, "%shead:0x%02x, tail:0x%02x, pkt_num:%u, macid:%u, ac:%u\n" , tag ? tag : "", info->head, info->tail, info->pkt_num, info->macid, info->ac ); } void dump_bcn_qinfo_8812a(void *sel, struct bcn_qinfo_8812a *info, const char *tag) { //if (info->pkt_num) DBG_871X_SEL_NL(sel, "%shead:0x%02x, pkt_num:%u\n" , tag ? tag : "", info->head, info->pkt_num ); } void dump_mac_qinfo_8812a(void *sel, _adapter *adapter) { u32 q0_info; u32 q1_info; u32 q2_info; u32 q3_info; u32 q4_info; u32 q5_info; u32 q6_info; u32 q7_info; u32 mg_q_info; u32 hi_q_info; u16 bcn_q_info; q0_info = rtw_read32(adapter, REG_Q0_INFO); q1_info = rtw_read32(adapter, REG_Q1_INFO); q2_info = rtw_read32(adapter, REG_Q2_INFO); q3_info = rtw_read32(adapter, REG_Q3_INFO); q4_info = rtw_read32(adapter, REG_Q4_INFO); q5_info = rtw_read32(adapter, REG_Q5_INFO); q6_info = rtw_read32(adapter, REG_Q6_INFO); q7_info = rtw_read32(adapter, REG_Q7_INFO); mg_q_info = rtw_read32(adapter, REG_MGQ_INFO); hi_q_info = rtw_read32(adapter, REG_HGQ_INFO); bcn_q_info = rtw_read16(adapter, REG_BCNQ_INFO); dump_qinfo_8812a(sel, (struct qinfo_8812a *)&q0_info, "Q0 "); dump_qinfo_8812a(sel, (struct qinfo_8812a *)&q1_info, "Q1 "); dump_qinfo_8812a(sel, (struct qinfo_8812a *)&q2_info, "Q2 "); dump_qinfo_8812a(sel, (struct qinfo_8812a *)&q3_info, "Q3 "); dump_qinfo_8812a(sel, (struct qinfo_8812a *)&q4_info, "Q4 "); dump_qinfo_8812a(sel, (struct qinfo_8812a *)&q5_info, "Q5 "); dump_qinfo_8812a(sel, (struct qinfo_8812a *)&q6_info, "Q6 "); dump_qinfo_8812a(sel, (struct qinfo_8812a *)&q7_info, "Q7 "); dump_qinfo_8812a(sel, (struct qinfo_8812a *)&mg_q_info, "MG "); dump_qinfo_8812a(sel, (struct qinfo_8812a *)&hi_q_info, "HI "); dump_bcn_qinfo_8812a(sel, (struct bcn_qinfo_8812a *)&bcn_q_info, "BCN "); } void GetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval) { PHAL_DATA_TYPE pHalData; PDM_ODM_T podmpriv; u8 val8; u16 val16; u32 val32; _func_enter_; pHalData = GET_HAL_DATA(padapter); podmpriv = &pHalData->odmpriv; switch (variable) { case HW_VAR_TXPAUSE: *pval = rtw_read8(padapter, REG_TXPAUSE); break; case HW_VAR_BCN_VALID: #ifdef CONFIG_CONCURRENT_MODE if (IS_HARDWARE_TYPE_8821(padapter) && padapter->iface_type == IFACE_PORT1) { val8 = rtw_read8(padapter, REG_DWBCN1_CTRL_8812+2); *pval = (BIT(0) & val8) ? _TRUE:_FALSE; } else #endif { //BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 val8 = rtw_read8(padapter, REG_TDECTRL+2); *pval = (BIT(0) & val8) ? _TRUE:_FALSE; } break; case HW_VAR_FWLPS_RF_ON: //When we halt NIC, we should check if FW LPS is leave. if(adapter_to_pwrctl(padapter)->rf_pwrstate == rf_off) { // If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, // because Fw is unload. *pval = _TRUE; } else { u32 valRCR; valRCR = rtw_read32(padapter, REG_RCR); valRCR &= 0x00070000; if(valRCR) *pval = _FALSE; else *pval = _TRUE; } break; #ifdef CONFIG_ANTENNA_DIVERSITY case HW_VAR_CURRENT_ANTENNA: *pval = pHalData->CurAntenna; break; #endif case HW_VAR_EFUSE_BYTES: // To get EFUE total used bytes, added by Roger, 2008.12.22. *(u16*)pval = pHalData->EfuseUsedBytes; break; case HW_VAR_APFM_ON_MAC: *pval = pHalData->bMacPwrCtrlOn; break; case HW_VAR_CHK_HI_QUEUE_EMPTY: val16 = rtw_read16(padapter, REG_TXPKT_EMPTY); *pval = (val16 & BIT(10)) ? _TRUE:_FALSE; break; case HW_VAR_DUMP_MAC_QUEUE_INFO: dump_mac_qinfo_8812a(pval, padapter); break; default: GetHwReg(padapter, variable, pval); break; } _func_exit_; } /* * Description: * Change default setting of specified variable. */ u8 SetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval) { PHAL_DATA_TYPE pHalData; u8 bResult; pHalData = GET_HAL_DATA(padapter); bResult = _SUCCESS; switch (variable) { default: bResult = SetHalDefVar(padapter, variable, pval); break; } return bResult; } /* * Description: * Query setting of specified variable. */ u8 GetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval) { PHAL_DATA_TYPE pHalData; u8 bResult; pHalData = GET_HAL_DATA(padapter); bResult = _SUCCESS; switch (variable) { #ifdef CONFIG_ANTENNA_DIVERSITY case HAL_DEF_IS_SUPPORT_ANT_DIV: *((u8*)pval) = (pHalData->AntDivCfg==0) ? _FALSE : _TRUE; break; #endif #ifdef CONFIG_ANTENNA_DIVERSITY case HAL_DEF_CURRENT_ANTENNA: *((u8*)pval) = pHalData->CurAntenna; break; #endif case HAL_DEF_DRVINFO_SZ: *((u32*)pval) = DRVINFO_SZ; break; case HAL_DEF_MAX_RECVBUF_SZ: *((u32*)pval) = MAX_RECVBUF_SZ; break; case HAL_DEF_RX_PACKET_OFFSET: *((u32*)pval) = RXDESC_SIZE + DRVINFO_SZ*8; break; case HW_VAR_MAX_RX_AMPDU_FACTOR: *((u32*)pval) = MAX_AMPDU_FACTOR_64K; break; case HAL_DEF_TX_LDPC: if (IS_VENDOR_8812A_C_CUT(padapter)) *(u8*)pval = _TRUE; else if (IS_HARDWARE_TYPE_8821(padapter)) *(u8*)pval = _TRUE; else *(u8*)pval = _FALSE; break; case HAL_DEF_RX_LDPC: if (IS_VENDOR_8812A_C_CUT(padapter)) *(u8*)pval = _TRUE; else if (IS_HARDWARE_TYPE_8821(padapter)) *(u8*)pval = _FALSE; else *(u8*)pval = _FALSE; break; case HAL_DEF_TX_STBC: if (pHalData->rf_type == RF_2T2R) *(u8*)pval = 1; else *(u8*)pval = 0; break; case HAL_DEF_RX_STBC: *(u8*)pval = 1; break; case HAL_DEF_EXPLICIT_BEAMFORMER: if(pHalData->rf_type == RF_2T2R) *((PBOOLEAN)pval) = _TRUE; else *((PBOOLEAN)pval) = _FALSE; break; case HAL_DEF_EXPLICIT_BEAMFORMEE: *((PBOOLEAN)pval) = _TRUE; break; case HW_DEF_RA_INFO_DUMP: { u8 mac_id = *(u8*)pval; u32 cmd ; u32 ra_info1, ra_info2; u32 rate_mask1, rate_mask2; u8 curr_tx_rate,curr_tx_sgi,hight_rate,lowest_rate; DBG_8192C("============ RA status check Mac_id:%d ===================\n", mac_id); cmd = 0x40000100 |mac_id; rtw_write32(padapter,REG_HMEBOX_E2_E3_8812,cmd); rtw_msleep_os(10); ra_info1 = rtw_read32(padapter,REG_RSVD5_8812); curr_tx_rate = ra_info1&0x7F; curr_tx_sgi = (ra_info1>>7)&0x01; DBG_8192C("[ ra_info1:0x%08x ] =>cur_tx_rate= %s,cur_sgi:%d, PWRSTS = 0x%02x \n", ra_info1, HDATA_RATE(curr_tx_rate), curr_tx_sgi, (ra_info1>>8) & 0x07); cmd = 0x40000400 | mac_id; rtw_write32(padapter, REG_HMEBOX_E2_E3_8812,cmd); rtw_msleep_os(10); ra_info1 = rtw_read32(padapter, REG_RSVD5_8812); ra_info2 = rtw_read32(padapter, REG_RSVD6_8812); rate_mask1 = rtw_read32(padapter,REG_RSVD7_8812); rate_mask2 = rtw_read32(padapter,REG_RSVD8_8812); hight_rate = ra_info2&0xFF; lowest_rate = (ra_info2>>8) & 0xFF; DBG_8192C("[ ra_info1:0x%08x ] =>RSSI=%d, BW_setting=0x%02x, DISRA=0x%02x, VHT_EN=0x%02x\n", ra_info1, ra_info1&0xFF, (ra_info1>>8) & 0xFF, (ra_info1>>16) & 0xFF, (ra_info1>>24) & 0xFF); DBG_8192C("[ ra_info2:0x%08x ] =>hight_rate=%s, lowest_rate=%s, SGI=0x%02x, RateID=%d\n", ra_info2, HDATA_RATE(hight_rate), HDATA_RATE(lowest_rate), (ra_info2>>16) & 0xFF, (ra_info2>>24) & 0xFF); DBG_8192C("rate_mask2=0x%08x, rate_mask1=0x%08x\n", rate_mask2, rate_mask1); } break; case HAL_DEF_TX_PAGE_SIZE: if (IS_HARDWARE_TYPE_8812(padapter)) *(u32*)pval = PAGE_SIZE_512; else *(u32*)pval = PAGE_SIZE_256; break; case HAL_DEF_TX_PAGE_BOUNDARY: if (!padapter->registrypriv.wifi_spec) { if (IS_HARDWARE_TYPE_8812(padapter)) *(u8*)pval = TX_PAGE_BOUNDARY_8812; else *(u8*)pval = TX_PAGE_BOUNDARY_8821; } else { if (IS_HARDWARE_TYPE_8812(padapter)) *(u8*)pval = WMM_NORMAL_TX_PAGE_BOUNDARY_8812; else *(u8*)pval = WMM_NORMAL_TX_PAGE_BOUNDARY_8821; } break; case HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN: *(u8*)pval = TX_PAGE_BOUNDARY_WOWLAN_8812; break; case HAL_DEF_MACID_SLEEP: *(u8*)pval = _TRUE; // support macid sleep break; default: bResult = GetHalDefVar(padapter, variable, pval); break; } return bResult; } s32 c2h_id_filter_ccx_8812a(u8 *buf) { struct c2h_evt_hdr_88xx *c2h_evt = (struct c2h_evt_hdr_88xx *)buf; s32 ret = _FALSE; if (c2h_evt->id == C2H_8812_TX_REPORT) ret = _TRUE; return ret; } static s32 c2h_handler_8812a(PADAPTER padapter, u8 *buf) { struct c2h_evt_hdr_88xx *c2h_evt = (struct c2h_evt_hdr_88xx *)buf; s32 ret = _SUCCESS; if (c2h_evt == NULL) { DBG_8192C("%s c2h_evt is NULL\n",__FUNCTION__); ret = _FAIL; goto exit; } ret = _C2HContentParsing8812(padapter, c2h_evt->id, c2h_evt->plen, c2h_evt->payload); exit: return ret; } void rtl8812_set_hal_ops(struct hal_ops *pHalFunc) { pHalFunc->free_hal_data = &rtl8812_free_hal_data; pHalFunc->dm_init = &rtl8812_init_dm_priv; pHalFunc->dm_deinit = &rtl8812_deinit_dm_priv; pHalFunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8812A; pHalFunc->UpdateRAMaskHandler = &UpdateHalRAMask8812A; pHalFunc->read_chip_version = &ReadChipVersion8812A; pHalFunc->set_bwmode_handler = &PHY_SetBWMode8812; pHalFunc->set_channel_handler = &PHY_SwChnl8812; pHalFunc->set_chnl_bw_handler = &PHY_SetSwChnlBWMode8812; pHalFunc->set_tx_power_level_handler = &PHY_SetTxPowerLevel8812; pHalFunc->get_tx_power_level_handler = &PHY_GetTxPowerLevel8812; pHalFunc->hal_dm_watchdog = &rtl8812_HalDmWatchDog; pHalFunc->Add_RateATid = &rtl8812_Add_RateATid; pHalFunc->run_thread= &rtl8812_start_thread; pHalFunc->cancel_thread= &rtl8812_stop_thread; #ifdef CONFIG_ANTENNA_DIVERSITY pHalFunc->AntDivBeforeLinkHandler = &AntDivBeforeLink8812; pHalFunc->AntDivCompareHandler = &AntDivCompare8812; #endif pHalFunc->read_bbreg = &PHY_QueryBBReg8812; pHalFunc->write_bbreg = &PHY_SetBBReg8812; pHalFunc->read_rfreg = &PHY_QueryRFReg8812; pHalFunc->write_rfreg = &PHY_SetRFReg8812; // Efuse related function pHalFunc->EfusePowerSwitch = &rtl8812_EfusePowerSwitch; pHalFunc->ReadEFuse = &rtl8812_ReadEFuse; pHalFunc->EFUSEGetEfuseDefinition = &rtl8812_EFUSE_GetEfuseDefinition; pHalFunc->EfuseGetCurrentSize = &rtl8812_EfuseGetCurrentSize; pHalFunc->Efuse_PgPacketRead = &rtl8812_Efuse_PgPacketRead; pHalFunc->Efuse_PgPacketWrite = &rtl8812_Efuse_PgPacketWrite; pHalFunc->Efuse_WordEnableDataWrite = &rtl8812_Efuse_WordEnableDataWrite; #ifdef DBG_CONFIG_ERROR_DETECT pHalFunc->sreset_init_value = &sreset_init_value; pHalFunc->sreset_reset_value = &sreset_reset_value; pHalFunc->silentreset = &sreset_reset; pHalFunc->sreset_xmit_status_check = &rtl8812_sreset_xmit_status_check; pHalFunc->sreset_linked_status_check = &rtl8812_sreset_linked_status_check; pHalFunc->sreset_get_wifi_status = &sreset_get_wifi_status; pHalFunc->sreset_inprogress= &sreset_inprogress; #endif //DBG_CONFIG_ERROR_DETECT pHalFunc->GetHalODMVarHandler = &rtl8812_GetHalODMVar; pHalFunc->SetHalODMVarHandler = &rtl8812_SetHalODMVar; pHalFunc->hal_notch_filter = &hal_notch_filter_8812; pHalFunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8812A; pHalFunc->c2h_handler = c2h_handler_8812a; pHalFunc->c2h_id_filter_ccx = c2h_id_filter_ccx_8812a; pHalFunc->fill_h2c_cmd = FillH2CCmd_8812; } rtl8812au-4.3.8.12175.20140902+dfsg/hal/rtl8812a/rtl8812a_mp.c000066400000000000000000001154141261122257400216630ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTL8812A_MP_C_ #ifdef CONFIG_MP_INCLUDED //#include #include s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable) { BOOLEAN bResult = TRUE; PMPT_CONTEXT pMptCtx = &(padapter->mppriv.MptCtx); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); pHalData->TxPowerTrackControl = (u1Byte)enable; if(pHalData->TxPowerTrackControl > 1) pHalData->TxPowerTrackControl = 0; return bResult; return _SUCCESS; } void Hal_GetPowerTracking(PADAPTER padapter, u8 *enable) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); *enable = pDM_Odm->RFCalibrateInfo.TxPowerTrackControl; } static void Hal_disable_dm(PADAPTER padapter) { u8 v8; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); //3 1. disable firmware dynamic mechanism // disable Power Training, Rate Adaptive v8 = rtw_read8(padapter, REG_BCN_CTRL); v8 &= ~EN_BCN_FUNCTION; rtw_write8(padapter, REG_BCN_CTRL, v8); //3 2. disable driver dynamic mechanism // disable Dynamic Initial Gain // disable High Power // disable Power Tracking Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); // enable APK, LCK and IQK but disable power tracking pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _FALSE; Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _TRUE); } /*----------------------------------------------------------------------------- * Function: mpt_SwitchRfSetting * * Overview: Change RF Setting when we siwthc channel/rate/BW for MP. * * Input: IN PADAPTER pAdapter * * Output: NONE * * Return: NONE * * Revised History: * When Who Remark * 01/08/2009 MHC Suggestion from SD3 Willis for 92S series. * 01/09/2009 MHC Add CCK modification for 40MHZ. Suggestion from SD3. * *---------------------------------------------------------------------------*/ void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter) { //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); struct mp_priv *pmp = &pAdapter->mppriv; u1Byte ChannelToSw = pmp->channel; ULONG ulRateIdx = pmp->rateidx; ULONG ulbandwidth = pmp->bandwidth; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); #if 0 // <20120525, Kordan> Dynamic mechanism for APK, asked by Dennis. pmp->MptCtx.backup0x52_RF_A = (u1Byte)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); pmp->MptCtx.backup0x52_RF_B = (u1Byte)PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0); PHY_SetRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0xD); PHY_SetRFReg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, 0xD); #endif return ; } /*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/ /*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14) { u32 TempVal = 0, TempVal2 = 0, TempVal3 = 0; u32 CurrCCKSwingVal = 0, CCKSwingIndex = 12; u8 i; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); // get current cck swing value and check 0xa22 & 0xa23 later to match the table. CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord); if (!bInCH14) { // Readback the current bb cck swing value and compare with the table to // get the current swing index for (i = 0; i < CCK_TABLE_SIZE; i++) { if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch1_Ch13[i][0]) && (((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch1_Ch13[i][1])) { CCKSwingIndex = i; // RT_TRACE(COMP_INIT, DBG_LOUD,("Ch1~13, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", // (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex)); break; } } //Write 0xa22 0xa23 TempVal = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][0] + (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][1]<<8) ; //Write 0xa24 ~ 0xa27 TempVal2 = 0; TempVal2 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][2] + (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][3]<<8) + (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][4]<<16 )+ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][5]<<24); //Write 0xa28 0xa29 TempVal3 = 0; TempVal3 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][6] + (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][7]<<8) ; } else { for (i = 0; i < CCK_TABLE_SIZE; i++) { if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch14[i][0]) && (((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch14[i][1])) { CCKSwingIndex = i; // RT_TRACE(COMP_INIT, DBG_LOUD,("Ch14, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", // (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex)); break; } } //Write 0xa22 0xa23 TempVal = CCKSwingTable_Ch14[CCKSwingIndex][0] + (CCKSwingTable_Ch14[CCKSwingIndex][1]<<8) ; //Write 0xa24 ~ 0xa27 TempVal2 = 0; TempVal2 = CCKSwingTable_Ch14[CCKSwingIndex][2] + (CCKSwingTable_Ch14[CCKSwingIndex][3]<<8) + (CCKSwingTable_Ch14[CCKSwingIndex][4]<<16 )+ (CCKSwingTable_Ch14[CCKSwingIndex][5]<<24); //Write 0xa28 0xa29 TempVal3 = 0; TempVal3 = CCKSwingTable_Ch14[CCKSwingIndex][6] + (CCKSwingTable_Ch14[CCKSwingIndex][7]<<8) ; } write_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord, TempVal); write_bbreg(Adapter, rCCK0_TxFilter2, bMaskDWord, TempVal2); write_bbreg(Adapter, rCCK0_DebugPort, bMaskLWord, TempVal3); } void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven) { s32 TempCCk; u8 CCK_index, CCK_index_old = 0; u8 Action = 0; //0: no action, 1: even->odd, 2:odd->even u8 TimeOut = 100; s32 i = 0; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; struct dm_priv *pdmpriv = &pHalData->dmpriv; PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); if (!IS_92C_SERIAL(pHalData->VersionID)) return; #if 0 while(PlatformAtomicExchange(&Adapter->IntrCCKRefCount, TRUE) == TRUE) { PlatformSleepUs(100); TimeOut--; if(TimeOut <= 0) { RTPRINT(FINIT, INIT_TxPower, ("!!!MPT_CCKTxPowerAdjustbyIndex Wait for check CCK gain index too long!!!\n" )); break; } } #endif if (beven && !pMptCtx->bMptIndexEven) //odd->even { Action = 2; pMptCtx->bMptIndexEven = _TRUE; } else if (!beven && pMptCtx->bMptIndexEven) //even->odd { Action = 1; pMptCtx->bMptIndexEven = _FALSE; } if (Action != 0) { //Query CCK default setting From 0xa24 TempCCk = read_bbreg(pAdapter, rCCK0_TxFilter2, bMaskDWord) & bMaskCCK; for (i = 0; i < CCK_TABLE_SIZE; i++) { if (pDM_Odm->RFCalibrateInfo.bCCKinCH14) { if (_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch14[i][2], 4) == _TRUE) { CCK_index_old = (u8) i; // RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: Initial reg0x%x = 0x%lx, CCK_index=0x%x, ch 14 %d\n", // rCCK0_TxFilter2, TempCCk, CCK_index_old, pHalData->bCCKinCH14)); break; } } else { if (_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch1_Ch13[i][2], 4) == _TRUE) { CCK_index_old = (u8) i; // RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: Initial reg0x%x = 0x%lx, CCK_index=0x%x, ch14 %d\n", // rCCK0_TxFilter2, TempCCk, CCK_index_old, pHalData->bCCKinCH14)); break; } } } if (Action == 1) { if (CCK_index_old == 0) CCK_index_old = 1; CCK_index = CCK_index_old - 1; } else { CCK_index = CCK_index_old + 1; } if (CCK_index == CCK_TABLE_SIZE) { CCK_index = CCK_TABLE_SIZE -1; RT_TRACE(_module_mp_, _drv_info_, ("CCK_index == CCK_TABLE_SIZE\n")); } // RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: new CCK_index=0x%x\n", // CCK_index)); //Adjust CCK according to gain index if (!pDM_Odm->RFCalibrateInfo.bCCKinCH14) { rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch1_Ch13[CCK_index][0]); rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch1_Ch13[CCK_index][1]); rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch1_Ch13[CCK_index][2]); rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch1_Ch13[CCK_index][3]); rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch1_Ch13[CCK_index][4]); rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch1_Ch13[CCK_index][5]); rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch1_Ch13[CCK_index][6]); rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch1_Ch13[CCK_index][7]); } else { rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch14[CCK_index][0]); rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch14[CCK_index][1]); rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch14[CCK_index][2]); rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch14[CCK_index][3]); rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch14[CCK_index][4]); rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch14[CCK_index][5]); rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch14[CCK_index][6]); rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch14[CCK_index][7]); } } #if 0 RTPRINT(FINIT, INIT_TxPower, ("MPT_CCKTxPowerAdjustbyIndex 0xa20=%x\n", PlatformEFIORead4Byte(Adapter, 0xa20))); PlatformAtomicExchange(&Adapter->IntrCCKRefCount, FALSE); #endif } /*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ /* * SetChannel * Description * Use H2C command to change channel, * not only modify rf register, but also other setting need to be done. */ void Hal_SetChannel(PADAPTER pAdapter) { #if 0 struct mp_priv *pmp = &pAdapter->mppriv; // SelectChannel(pAdapter, pmp->channel); set_channel_bwmode(pAdapter, pmp->channel, pmp->channel_offset, pmp->bandwidth); #else u8 eRFPath; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); struct mp_priv *pmp = &pAdapter->mppriv; struct dm_priv *pdmpriv = &pHalData->dmpriv; PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); u8 channel = pmp->channel; u8 bandwidth = pmp->bandwidth; pHalData->bSwChnl = _TRUE; //SelectChannel(pAdapter, channel); PHY_SwChnl8812(pAdapter, channel); //PHY_HandleSwChnlAndSetBW8812(pAdapter, _TRUE, _FALSE, channel, bandwidth, 0, 0, channel); //set_channel_bwmode(pAdapter, pAdapter->mppriv.channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, pAdapter->mppriv.bandwidth); if (pHalData->CurrentChannel == 14 && !pDM_Odm->RFCalibrateInfo.bCCKinCH14) { pDM_Odm->RFCalibrateInfo.bCCKinCH14 = _TRUE; Hal_MPT_CCKTxPowerAdjust(pAdapter, pDM_Odm->RFCalibrateInfo.bCCKinCH14); } else if (pHalData->CurrentChannel != 14 && pDM_Odm->RFCalibrateInfo.bCCKinCH14) { pDM_Odm->RFCalibrateInfo.bCCKinCH14 = _FALSE; Hal_MPT_CCKTxPowerAdjust(pAdapter, pDM_Odm->RFCalibrateInfo.bCCKinCH14); } #endif } /* * Notice * Switch bandwitdth may change center frequency(channel) */ void Hal_SetBandwidth(PADAPTER pAdapter) { struct mp_priv *pmp = &pAdapter->mppriv; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); u8 channel = pmp->channel; u8 bandwidth = pmp->bandwidth; pHalData->bSetChnlBW=_TRUE; PHY_SetSwChnlBWMode8812(pAdapter, channel, bandwidth, 0, 0 ); //SetBWMode(pAdapter, pmp->bandwidth, pmp->prime_channel_offset); } void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 *TxPower) { u32 tmpval = 0; // rf-A cck tx power write_bbreg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, TxPower[RF_PATH_A]); tmpval = (TxPower[RF_PATH_A]<<16) | (TxPower[RF_PATH_A]<<8) | TxPower[RF_PATH_A]; write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskH3Bytes, tmpval); // rf-B cck tx power write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, TxPower[RF_PATH_B]); tmpval = (TxPower[RF_PATH_B]<<16) | (TxPower[RF_PATH_B]<<8) | TxPower[RF_PATH_B]; write_bbreg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, bMaskH3Bytes, tmpval); RT_TRACE(_module_mp_, _drv_notice_, ("-SetCCKTxPower: A[0x%02x] B[0x%02x]\n", TxPower[RF_PATH_A], TxPower[RF_PATH_B])); } void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 *TxPower) { u32 TxAGC = 0; u8 tmpval = 0; PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); // HT Tx-rf(A) tmpval = TxPower[RF_PATH_A]; TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval; write_bbreg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); write_bbreg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); write_bbreg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); write_bbreg(pAdapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); write_bbreg(pAdapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); write_bbreg(pAdapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); // HT Tx-rf(B) tmpval = TxPower[RF_PATH_B]; TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval; write_bbreg(pAdapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC); write_bbreg(pAdapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC); write_bbreg(pAdapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC); write_bbreg(pAdapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC); write_bbreg(pAdapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC); write_bbreg(pAdapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC); } void mpt_SetTxPower_8812( PADAPTER pAdapter, MPT_TXPWR_DEF Rate, pu1Byte pTxPower ) { u1Byte path = 0; switch (Rate) { case MPT_CCK: { for (path = ODM_RF_PATH_A; path <= ODM_RF_PATH_B; path++) { PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_1M ); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_2M ); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_5_5M); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_11M ); } } break; case MPT_OFDM: { for (path = ODM_RF_PATH_A; path <= ODM_RF_PATH_B; path++) { PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_1M ); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_2M ); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_5_5M); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_11M ); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_6M ); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_9M ); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_12M); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_18M); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_24M); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_36M); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_48M); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_54M); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_MCS0 ); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_MCS1 ); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_MCS2 ); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_MCS3 ); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_MCS4 ); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_MCS5 ); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_MCS6 ); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_MCS7 ); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_MCS8 ); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_MCS9 ); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_MCS10); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_MCS11); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_MCS12); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_MCS13); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_MCS14); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_MCS15); } } break; case MPT_VHT_OFDM: { for (path = ODM_RF_PATH_A; path <= ODM_RF_PATH_B; path++) { PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT1SS_MCS0); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT1SS_MCS1); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT1SS_MCS2); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT1SS_MCS3); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT1SS_MCS4); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT1SS_MCS5); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT1SS_MCS6); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT1SS_MCS7); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT1SS_MCS8); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT1SS_MCS9); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT2SS_MCS0); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT2SS_MCS1); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT2SS_MCS2); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT2SS_MCS3); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT2SS_MCS4); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT2SS_MCS5); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT2SS_MCS6); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT2SS_MCS7); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT2SS_MCS8); PHY_SetTxPowerIndex_8812A(pAdapter, pTxPower[path], path, MGN_VHT2SS_MCS9); } } break; default: DBG_871X("<===mpt_SetTxPower_8812: Illegal channel!!\n"); break; } } void Hal_SetAntennaPathPower(PADAPTER pAdapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); u8 TxPowerLevel[MAX_RF_PATH]; u8 rfPath; TxPowerLevel[RF_PATH_A] = pAdapter->mppriv.txpoweridx; TxPowerLevel[RF_PATH_B] = pAdapter->mppriv.txpoweridx_b; switch (pAdapter->mppriv.antenna_tx) { case ANTENNA_A: default: rfPath = RF_PATH_A; break; case ANTENNA_B: rfPath = RF_PATH_B; break; case ANTENNA_C: rfPath = RF_PATH_C; break; } switch (pHalData->rf_chip) { case RF_8225: case RF_8256: case RF_6052: if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) { // CCK rate mpt_SetTxPower_8812(pAdapter,MPT_CCK,TxPowerLevel); }else if (pAdapter->mppriv.rateidx <= MPT_RATE_MCS15) { // OFDM rate mpt_SetTxPower_8812(pAdapter,MPT_OFDM,TxPowerLevel); } else if ( (pAdapter->mppriv.rateidx >= MPT_RATE_VHT1SS_MCS0) && (pAdapter->mppriv.rateidx <= MPT_RATE_VHT2SS_MCS9)) { //OFDM mpt_SetTxPower_8812(pAdapter,MPT_VHT_OFDM,TxPowerLevel); }else{ RT_TRACE(_module_mp_,_drv_err_,("\nERROR: incorrect rateidx=%d\n",pAdapter->mppriv.rateidx)); } break; default: break; } } void Hal_SetTxPower(PADAPTER pAdapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); u1Byte path; PDM_ODM_T pDM_Odm = &pHalData->odmpriv; path = ( pAdapter->mppriv.antenna_tx == ANTENNA_A) ? (ODM_RF_PATH_A) : (ODM_RF_PATH_B); if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { DBG_871X("===> MPT_ProSetTxPower: Jaguar\n"); mpt_SetTxPower_8812(pAdapter, MPT_CCK, pMptCtx->TxPwrLevel); mpt_SetTxPower_8812(pAdapter, MPT_OFDM, pMptCtx->TxPwrLevel); mpt_SetTxPower_8812(pAdapter, MPT_VHT_OFDM, pMptCtx->TxPwrLevel); } ODM_ClearTxPowerTrackingState(pDM_Odm); } void Hal_SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset) { u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D,tmpAGC; TxAGCOffset_B = (ulTxAGCOffset&0x000000ff); TxAGCOffset_C = ((ulTxAGCOffset&0x0000ff00)>>8); TxAGCOffset_D = ((ulTxAGCOffset&0x00ff0000)>>16); tmpAGC = (TxAGCOffset_D<<8 | TxAGCOffset_C<<4 | TxAGCOffset_B); write_bbreg(pAdapter, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC|bXDTxAGC), tmpAGC); } void Hal_SetDataRate(PADAPTER pAdapter) { //Hal_mpt_SwitchRfSetting(pAdapter); } #define RF_PATH_AB 22 void Hal_SetAntenna(PADAPTER pAdapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */ R_ANTENNA_SELECT_CCK *p_cck_txrx; u8 r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0; u8 chgTx = 0, chgRx = 0; u32 r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0; p_ofdm_tx = (R_ANTENNA_SELECT_OFDM *)&r_ant_select_ofdm_val; p_cck_txrx = (R_ANTENNA_SELECT_CCK *)&r_ant_select_cck_val; switch (pAdapter->mppriv.antenna_tx) { case ANTENNA_A: pMptCtx->MptRfPath = ODM_RF_PATH_A; PHY_SetBBReg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x1111); if (pHalData->RFEType == 3) PHY_SetBBReg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x0 ); break; case ANTENNA_B: pMptCtx->MptRfPath = ODM_RF_PATH_B; PHY_SetBBReg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x2222); if (pHalData->RFEType == 3) PHY_SetBBReg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x1 ); break; break; case ANTENNA_AB: // For 8192S pMptCtx->MptRfPath = RF_PATH_AB; PHY_SetBBReg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x3333); if (pHalData->RFEType == 3) PHY_SetBBReg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x0 ); break; default: pMptCtx->MptRfPath = RF_PATH_AB; DBG_871X("Unknown Tx antenna.\n"); break; } switch (pAdapter->mppriv.antenna_rx) { u32 reg0xC50 = 0; case ANTENNA_A: PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x11); PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); // RF_B_0x0[19:16] = 1, Standby mode PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, BIT19|BIT18|BIT17|BIT16, 0x3); // <20121101, Kordan> To prevent gain table from not switched, asked by Ynlin. reg0xC50 = PHY_QueryBBReg(pAdapter, rA_IGI_Jaguar, bMaskByte0); PHY_SetBBReg(pAdapter, rA_IGI_Jaguar, bMaskByte0, reg0xC50+2); PHY_SetBBReg(pAdapter, rA_IGI_Jaguar, bMaskByte0, reg0xC50); break; case ANTENNA_B: PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x22); PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); // RF_A_0x0[19:16] = 1, Standby mode PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x1); PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, BIT19|BIT18|BIT17|BIT16, 0x3); // <20121101, Kordan> To prevent gain table from not switched, asked by Ynlin. reg0xC50 = PHY_QueryBBReg(pAdapter, rB_IGI_Jaguar, bMaskByte0); PHY_SetBBReg(pAdapter, rB_IGI_Jaguar, bMaskByte0, reg0xC50+2); PHY_SetBBReg(pAdapter, rB_IGI_Jaguar, bMaskByte0, reg0xC50); break; case ANTENNA_AB: PHY_SetBBReg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x33); PHY_SetRFReg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); // RF_B_0x0[19:16] = 3, Rx mode PHY_SetBBReg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); break; default: DBG_871X("Unknown Rx antenna.\n"); break; } RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n")); } s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); if (!netif_running(pAdapter->pnetdev)) { RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter! Fail: interface not opened!\n")); return _FAIL; } if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter: Fail! not in MP mode!\n")); return _FAIL; } target_ther &= 0xff; if (target_ther < 0x07) target_ther = 0x07; else if (target_ther > 0x1d) target_ther = 0x1d; pHalData->EEPROMThermalMeter = target_ther; return _SUCCESS; } void Hal_TriggerRFThermalMeter(PADAPTER pAdapter) { PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_T_METER_8812A, BIT17 | BIT16, 0x03); // RT_TRACE(_module_mp_,_drv_alert_, ("TriggerRFThermalMeter() finished.\n" )); } u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter) { u32 ThermalValue = 0; ThermalValue = (u1Byte)PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, RF_T_METER_8812A, 0xfc00); // 0x42: RF Reg[15:10] // RT_TRACE(_module_mp_, _drv_alert_, ("ThermalValue = 0x%x\n", ThermalValue)); return (u8)ThermalValue; } void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value) { #if 0 fw_cmd(pAdapter, IOCMD_GET_THERMAL_METER); rtw_msleep_os(1000); fw_cmd_data(pAdapter, value, 1); *value &= 0xFF; #else Hal_TriggerRFThermalMeter(pAdapter); rtw_msleep_os(1000); *value = Hal_ReadRFThermalMeter(pAdapter); #endif } void Hal_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); pAdapter->mppriv.MptCtx.bSingleCarrier = bStart; if (bStart)// Start Single Carrier. { RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleCarrierTx: test start\n")); // 1. if OFDM block on? if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on // 2. set CCK test mode off, set to CCK normal mode write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable); // 3. turn on scramble setting write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); // 4. Turn On Continue Tx and turn off the other test modes. if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) PHY_SetBBReg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18|BIT17|BIT16, OFDM_SingleCarrier); else PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_SingleCarrier); //for dynamic set Power index. write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); } else// Stop Single Carrier. { RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleCarrierTx: test stop\n")); //Turn off all test modes. if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) PHY_SetBBReg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18|BIT17|BIT16, OFDM_ALL_OFF); else PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); //Delay 10 ms //delay_ms(10); rtw_msleep_os(10); //BB Reset write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); //Stop for dynamic set Power index. write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); } } void Hal_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; BOOLEAN is92C = IS_92C_SERIAL(pHalData->VersionID); u8 rfPath; u32 reg58 = 0x0; static u4Byte regRF0x0 = 0x0; static u4Byte reg0xCB0 = 0x0; static u4Byte reg0xEB0 = 0x0; static u4Byte reg0xCB4 = 0x0; static u4Byte reg0xEB4 = 0x0; switch (pAdapter->mppriv.antenna_tx) { case ANTENNA_A: default: pMptCtx->MptRfPath = rfPath = RF_PATH_A; break; case ANTENNA_B: pMptCtx->MptRfPath = rfPath = RF_PATH_B; break; case ANTENNA_C: pMptCtx->MptRfPath = rfPath = RF_PATH_C; break; } pAdapter->mppriv.MptCtx.bSingleTone = bStart; if (bStart)// Start Single Tone. { if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { u1Byte p = ODM_RF_PATH_A; regRF0x0 = PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, bRFRegOffsetMask); reg0xCB0 = PHY_QueryBBReg(pAdapter, rA_RFE_Pinmux_Jaguar, bMaskDWord); reg0xEB0 = PHY_QueryBBReg(pAdapter, rB_RFE_Pinmux_Jaguar, bMaskDWord); reg0xCB4 = PHY_QueryBBReg(pAdapter, rA_RFE_Pinmux_Jaguar+4, bMaskDWord); reg0xEB4 = PHY_QueryBBReg(pAdapter, rB_RFE_Pinmux_Jaguar+4, bMaskDWord); PHY_SetBBReg(pAdapter, rOFDMCCKEN_Jaguar, BIT29|BIT28, 0x0); // Disable CCK and OFDM if (pMptCtx->MptRfPath == RF_PATH_AB) { for (p = ODM_RF_PATH_A; p <= ODM_RF_PATH_B; ++p) { PHY_SetRFReg(pAdapter, p, RF_AC_Jaguar, 0xF0000, 0x2); // Tx mode: RF0x00[19:16]=4'b0010 PHY_SetRFReg(pAdapter, p, RF_AC_Jaguar, 0x1F, 0x0); // Lowest RF gain index: RF_0x0[4:0] = 0 PHY_SetRFReg(pAdapter, p, LNA_Low_Gain_3, BIT1, 0x1); // RF LO enabled } } else { PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC_Jaguar, 0xF0000, 0x2); // Tx mode: RF0x00[19:16]=4'b0010 PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, RF_AC_Jaguar, 0x1F, 0x0); // Lowest RF gain index: RF_0x0[4:0] = 0 PHY_SetRFReg(pAdapter, pMptCtx->MptRfPath, LNA_Low_Gain_3, BIT1, 0x1); // RF LO enabled } PHY_SetBBReg(pAdapter, rA_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007); // 0xCB0[[23:16, 7:4] = 0x77007 PHY_SetBBReg(pAdapter, rB_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007); // 0xCB0[[23:16, 7:4] = 0x77007 if (pHalData->ExternalPA_5G) { PHY_SetBBReg(pAdapter, rA_RFE_Pinmux_Jaguar+4, 0xFF00000, 0x12); // 0xCB4[23:16] = 0x12 PHY_SetBBReg(pAdapter, rB_RFE_Pinmux_Jaguar+4, 0xFF00000, 0x12); // 0xEB4[23:16] = 0x12 } else if (pHalData->ExternalPA_2G) { PHY_SetBBReg(pAdapter, rA_RFE_Pinmux_Jaguar+4, 0xFF00000, 0x11); // 0xCB4[23:16] = 0x11 PHY_SetBBReg(pAdapter, rB_RFE_Pinmux_Jaguar+4, 0xFF00000, 0x11); // 0xEB4[23:16] = 0x11 } } else { // Turn On SingleTone and turn off the other test modes. PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_SingleTone); } //for dynamic set Power index. write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); } else// Stop Single Tone. { RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleToneTx: test stop\n")); { // <20120326, Kordan> To amplify the power of tone for Xtal calibration. (asked by Edlu) // <20120326, Kordan> Only in single tone mode. (asked by Edlu) if (IS_HARDWARE_TYPE_8188E(pAdapter)) { reg58 = PHY_QueryRFReg(pAdapter, RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask); reg58 &= 0xFFFFFFF0; PHY_SetRFReg(pAdapter, RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask, reg58); } write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1); write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1); } if (is92C) { _write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x00); rtw_usleep_os(100); write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x32d75); // PAD all on. write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x32d75); // PAD all on. rtw_usleep_os(100); } else { write_rfreg(pAdapter, rfPath, 0x21, 0x54000); rtw_usleep_os(100); write_rfreg(pAdapter, rfPath, 0x00, 0x30000); // PAD all on. rtw_usleep_os(100); } //Stop for dynamic set Power index. write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); } } void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart) { pAdapter->mppriv.MptCtx.bCarrierSuppression = bStart; if (bStart) // Start Carrier Suppression. { RT_TRACE(_module_mp_,_drv_alert_, ("SetCarrierSuppressionTx: test start\n")); //if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B) if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) { // 1. if CCK block on? if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on //Turn Off All Test Mode if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) PHY_SetBBReg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18|BIT17|BIT16, OFDM_ALL_OFF); else PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); //transmit mode PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 0x0); //turn off scramble setting //Set CCK Tx Test Rate //PHY_SetBBReg(pAdapter, rCCK0_System, bCCKTxRate, pMgntInfo->ForcedDataRate); PHY_SetBBReg(pAdapter, rCCK0_System, bCCKTxRate, 0x0); //Set FTxRate to 1Mbps } //for dynamic set Power index. write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); } else// Stop Carrier Suppression. { RT_TRACE(_module_mp_,_drv_alert_, ("SetCarrierSuppressionTx: test stop\n")); //if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B) if (pAdapter->mppriv.rateidx <= MPT_RATE_11M ) { PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); //normal mode PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 0x1); //turn on scramble setting //BB Reset PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); } //Stop for dynamic set Power index. write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); } //DbgPrint("\n MPT_ProSetCarrierSupp() is finished. \n"); } void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart) { u32 cckrate; if (bStart) { RT_TRACE(_module_mp_, _drv_alert_, ("SetCCKContinuousTx: test start\n")); // 1. if CCK block on? if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on //Turn Off All Test Mode if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) PHY_SetBBReg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18|BIT17|BIT16, OFDM_ALL_OFF); else PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); //Set CCK Tx Test Rate #if 0 switch(pAdapter->mppriv.rateidx) { case 2: cckrate = 0; break; case 4: cckrate = 1; break; case 11: cckrate = 2; break; case 22: cckrate = 3; break; default: cckrate = 0; break; } #else cckrate = pAdapter->mppriv.rateidx; #endif PHY_SetBBReg(pAdapter, rCCK0_System, bCCKTxRate, cckrate); PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); //transmit mode PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 0x1); //turn on scramble setting PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); pAdapter->mppriv.MptCtx.bCckContTx = TRUE; pAdapter->mppriv.MptCtx.bOfdmContTx = FALSE; } else { RT_TRACE(_module_mp_, _drv_info_, ("SetCCKContinuousTx: test stop\n")); pAdapter->mppriv.MptCtx.bCckContTx = FALSE; pAdapter->mppriv.MptCtx.bOfdmContTx = FALSE; PHY_SetBBReg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); //normal mode PHY_SetBBReg(pAdapter, rCCK0_System, bCCKScramble, 0x1); //turn on scramble setting //BB Reset PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); PHY_SetBBReg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); } }/* mpt_StartCckContTx */ void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); if (bStart) { RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test start\n")); // 1. if OFDM block on? if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on // 2. set CCK test mode off, set to CCK normal mode write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable); // 3. turn on scramble setting write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); // 4. Turn On Continue Tx and turn off the other test modes. if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) PHY_SetBBReg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18|BIT17|BIT16, OFDM_ContinuousTx); else PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ContinuousTx); //for dynamic set Power index. write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); } else { RT_TRACE(_module_mp_,_drv_info_, ("SetOFDMContinuousTx: test stop\n")); if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) PHY_SetBBReg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18|BIT17|BIT16, OFDM_ALL_OFF); else PHY_SetBBReg(pAdapter, rOFDM1_LSTF, BIT30|BIT29|BIT28, OFDM_ALL_OFF); rtw_msleep_os(10); //BB Reset write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); //Stop for dynamic set Power index. write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); } pAdapter->mppriv.MptCtx.bCckContTx = _FALSE; pAdapter->mppriv.MptCtx.bOfdmContTx = bStart; }/* mpt_StartOfdmContTx */ void Hal_SetContinuousTx(PADAPTER pAdapter, u8 bStart) { #if 0 // ADC turn off [bit24-21] adc port0 ~ port1 if (bStart) { write_bbreg(pAdapter, rRx_Wait_CCCA, read_bbreg(pAdapter, rRx_Wait_CCCA) & 0xFE1FFFFF); rtw_usleep_os(100); } #endif RT_TRACE(_module_mp_, _drv_info_, ("SetContinuousTx: rate:%d\n", pAdapter->mppriv.rateidx)); pAdapter->mppriv.MptCtx.bStartContTx = bStart; if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) { //CCK Hal_SetCCKContinuousTx(pAdapter, bStart); } else if ((pAdapter->mppriv.rateidx >= MPT_RATE_6M) && (pAdapter->mppriv.rateidx <= MPT_RATE_MCS15)) { //OFDM Hal_SetOFDMContinuousTx(pAdapter, bStart); } else if ((pAdapter->mppriv.rateidx >= MPT_RATE_VHT1SS_MCS0) && (pAdapter->mppriv.rateidx <= MPT_RATE_VHT2SS_MCS9)) { //OFDM Hal_SetOFDMContinuousTx(pAdapter, bStart); } else { RT_TRACE(_module_mp_,_drv_err_,("\nERROR: incorrect rateidx=%d\n",pAdapter->mppriv.rateidx)); } #if 0 // ADC turn on [bit24-21] adc port0 ~ port1 if (!bStart) { write_bbreg(pAdapter, rRx_Wait_CCCA, read_bbreg(pAdapter, rRx_Wait_CCCA) | 0x01E00000); } #endif } #endif // CONFIG_MP_INCLUDE rtl8812au-4.3.8.12175.20140902+dfsg/hal/rtl8812a/rtl8812a_phycfg.c000066400000000000000000002172471261122257400225360ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTL8812A_PHYCFG_C_ //#include #include const char *const GLBwSrc[]={ "CHANNEL_WIDTH_20", "CHANNEL_WIDTH_40", "CHANNEL_WIDTH_80", "CHANNEL_WIDTH_160", "CHANNEL_WIDTH_80_80" }; #define ENABLE_POWER_BY_RATE 1 #define POWERINDEX_ARRAY_SIZE 48 //= cckRatesSize + ofdmRatesSize + htRates1TSize + htRates2TSize + vhtRates1TSize + vhtRates1TSize; /*---------------------Define local function prototype-----------------------*/ /*----------------------------Function Body----------------------------------*/ // // 1. BB register R/W API // u32 PHY_QueryBBReg8812( IN PADAPTER Adapter, IN u32 RegAddr, IN u32 BitMask ) { u32 ReturnValue = 0, OriginalValue, BitShift; #if (DISABLE_BB_RF == 1) return 0; #endif //DBG_871X("--->PHY_QueryBBReg8812(): RegAddr(%#x), BitMask(%#x)\n", RegAddr, BitMask); OriginalValue = rtw_read32(Adapter, RegAddr); BitShift = PHY_CalculateBitShift(BitMask); ReturnValue = (OriginalValue & BitMask) >> BitShift; //DBG_871X("BBR MASK=0x%x Addr[0x%x]=0x%x\n", BitMask, RegAddr, OriginalValue); return (ReturnValue); } VOID PHY_SetBBReg8812( IN PADAPTER Adapter, IN u4Byte RegAddr, IN u4Byte BitMask, IN u4Byte Data ) { u4Byte OriginalValue, BitShift; #if (DISABLE_BB_RF == 1) return; #endif if(BitMask!= bMaskDWord) {//if not "double word" write OriginalValue = rtw_read32(Adapter, RegAddr); BitShift = PHY_CalculateBitShift(BitMask); Data = ((OriginalValue) & (~BitMask)) |( ((Data << BitShift)) & BitMask); } rtw_write32(Adapter, RegAddr, Data); //DBG_871X("BBW MASK=0x%x Addr[0x%x]=0x%x\n", BitMask, RegAddr, Data); } // // 2. RF register R/W API // static u32 phy_RFSerialRead( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 Offset ) { u32 retValue = 0; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; BOOLEAN bIsPIMode = _FALSE; // 2009/06/17 MH We can not execute IO for power save or other accident mode. //if(RT_CANNOT_IO(Adapter)) //{ // RT_DISP(FPHY, PHY_RFR, ("phy_RFSerialRead return all one\n")); // return 0xFFFFFFFF; //} // <20120809, Kordan> CCA OFF(when entering), asked by James to avoid reading the wrong value. // <20120828, Kordan> Toggling CCA would affect RF 0x0, skip it! if (Offset != 0x0 && ! (IS_VENDOR_8812A_C_CUT(Adapter) || IS_HARDWARE_TYPE_8821(Adapter))) PHY_SetBBReg(Adapter, rCCAonSec_Jaguar, 0x8, 1); Offset &= 0xff; if (eRFPath == RF_PATH_A) bIsPIMode = (BOOLEAN)PHY_QueryBBReg(Adapter, 0xC00, 0x4); else if (eRFPath == RF_PATH_B) bIsPIMode = (BOOLEAN)PHY_QueryBBReg(Adapter, 0xE00, 0x4); PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bHSSIRead_addr_Jaguar, Offset); if (IS_VENDOR_8812A_C_CUT(Adapter) || IS_HARDWARE_TYPE_8821(Adapter)) rtw_udelay_os(20); if (bIsPIMode) { retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, rRead_data_Jaguar); //DBG_871X("[PI mode] RFR-%d Addr[0x%x]=0x%x\n", eRFPath, pPhyReg->rfLSSIReadBackPi, retValue); } else { retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack, rRead_data_Jaguar); //DBG_871X("[SI mode] RFR-%d Addr[0x%x]=0x%x\n", eRFPath, pPhyReg->rfLSSIReadBack, retValue); } // <20120809, Kordan> CCA ON(when exiting), asked by James to avoid reading the wrong value. // <20120828, Kordan> Toggling CCA would affect RF 0x0, skip it! if (Offset != 0x0 && ! (IS_VENDOR_8812A_C_CUT(Adapter) || IS_HARDWARE_TYPE_8821(Adapter))) PHY_SetBBReg(Adapter, rCCAonSec_Jaguar, 0x8, 0); return retValue; } static VOID phy_RFSerialWrite( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 Offset, IN u32 Data ) { u32 DataAndAddr = 0; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; // 2009/06/17 MH We can not execute IO for power save or other accident mode. //if(RT_CANNOT_IO(Adapter)) //{ // RTPRINT(FPHY, PHY_RFW, ("phy_RFSerialWrite stop\n")); // return; //} Offset &= 0xff; // Shadow Update //PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data); // Put write addr in [27:20] and write data in [19:00] DataAndAddr = ((Offset<<20) | (Data&0x000fffff)) & 0x0fffffff; // Write Operation // TODO: Dynamically determine whether using PI or SI to write RF registers. PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); //DBG_871X("RFW-%d Addr[0x%x]=0x%x\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr); } u32 PHY_QueryRFReg8812( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 RegAddr, IN u32 BitMask ) { u32 Original_Value, Readback_Value, BitShift; #if (DISABLE_BB_RF == 1) return 0; #endif Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); BitShift = PHY_CalculateBitShift(BitMask); Readback_Value = (Original_Value & BitMask) >> BitShift; return (Readback_Value); } VOID PHY_SetRFReg8812( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ) { #if (DISABLE_BB_RF == 1) return; #endif if(BitMask == 0) return; // RF data is 20 bits only if (BitMask != bLSSIWrite_data_Jaguar) { u32 Original_Value, BitShift; Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); BitShift = PHY_CalculateBitShift(BitMask); Data = ((Original_Value) & (~BitMask)) | (Data<< BitShift); } phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data); } // // 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. // s32 PHY_MACConfig8812(PADAPTER Adapter) { int rtStatus = _FAIL; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); s8 *pszMACRegFile; s8 sz8812MACRegFile[] = RTL8812_PHY_MACREG; s8 sz8821MACRegFile[] = RTL8821_PHY_MACREG; if(IS_HARDWARE_TYPE_8812(Adapter)) { pszMACRegFile = sz8812MACRegFile; } else { pszMACRegFile = sz8821MACRegFile; } // // Config MAC // #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE rtStatus = phy_ConfigMACWithParaFile(Adapter, pszMACRegFile); if (rtStatus == _FAIL) #endif { #ifdef CONFIG_EMBEDDED_FWIMG ODM_ConfigMACWithHeaderFile(&pHalData->odmpriv); rtStatus = _SUCCESS; #endif//CONFIG_EMBEDDED_FWIMG } return rtStatus; } static VOID phy_InitBBRFRegisterDefinition( IN PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); // RF Interface Sowrtware Control pHalData->PHYRegDef[ODM_RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 LSBs if read 32-bit from 0x870 pHalData->PHYRegDef[ODM_RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) // RF Interface Output (and Enable) pHalData->PHYRegDef[ODM_RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x860 pHalData->PHYRegDef[ODM_RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x864 // RF Interface (Output and) Enable pHalData->PHYRegDef[ODM_RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) pHalData->PHYRegDef[ODM_RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) pHalData->PHYRegDef[ODM_RF_PATH_A].rf3wireOffset = rA_LSSIWrite_Jaguar; //LSSI Parameter pHalData->PHYRegDef[ODM_RF_PATH_B].rf3wireOffset = rB_LSSIWrite_Jaguar; pHalData->PHYRegDef[ODM_RF_PATH_A].rfHSSIPara2 = rHSSIRead_Jaguar; //wire control parameter2 pHalData->PHYRegDef[ODM_RF_PATH_B].rfHSSIPara2 = rHSSIRead_Jaguar; //wire control parameter2 // Tranceiver Readback LSSI/HSPI mode pHalData->PHYRegDef[ODM_RF_PATH_A].rfLSSIReadBack = rA_SIRead_Jaguar; pHalData->PHYRegDef[ODM_RF_PATH_B].rfLSSIReadBack = rB_SIRead_Jaguar; pHalData->PHYRegDef[ODM_RF_PATH_A].rfLSSIReadBackPi = rA_PIRead_Jaguar; pHalData->PHYRegDef[ODM_RF_PATH_B].rfLSSIReadBackPi = rB_PIRead_Jaguar; } VOID PHY_BB8812_Config_1T( IN PADAPTER Adapter ) { // BB OFDM RX Path_A PHY_SetBBReg(Adapter, rRxPath_Jaguar, bRxPath_Jaguar, 0x11); // BB OFDM TX Path_A PHY_SetBBReg(Adapter, rTxPath_Jaguar, bMaskLWord, 0x1111); // BB CCK R/Rx Path_A PHY_SetBBReg(Adapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); // MCS support PHY_SetBBReg(Adapter, 0x8bc, 0xc0000060, 0x4); // RF Path_B HSSI OFF PHY_SetBBReg(Adapter, 0xe00, 0xf, 0x4); // RF Path_B Power Down PHY_SetBBReg(Adapter, 0xe90, bMaskDWord, 0); // ADDA Path_B OFF PHY_SetBBReg(Adapter, 0xe60, bMaskDWord, 0); PHY_SetBBReg(Adapter, 0xe64, bMaskDWord, 0); } static int phy_BB8812_Config_ParaFile( IN PADAPTER Adapter ) { EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); int rtStatus = _SUCCESS; s8 sz8812BBRegFile[] = RTL8812_PHY_REG; s8 sz8812AGCTableFile[] = RTL8812_AGC_TAB; s8 sz8812BBRegPgFile[] = RTL8812_PHY_REG_PG; s8 sz8812BBRegMpFile[] = RTL8812_PHY_REG_MP; s8 sz8812BBRegLimitFile[] = RTL8812_TXPWR_LMT; s8 sz8821BBRegFile[] = RTL8821_PHY_REG; s8 sz8821AGCTableFile[] = RTL8821_AGC_TAB; s8 sz8821BBRegPgFile[] = RTL8821_PHY_REG_PG; s8 sz8821BBRegMpFile[] = RTL8821_PHY_REG_MP; s8 sz8821RFTxPwrLmtFile[] = RTL8821_TXPWR_LMT; s8 *pszBBRegFile = NULL, *pszAGCTableFile = NULL, *pszBBRegPgFile = NULL, *pszBBRegMpFile=NULL, *pszRFTxPwrLmtFile = NULL; //DBG_871X("==>phy_BB8812_Config_ParaFile\n"); if(IS_HARDWARE_TYPE_8812(Adapter)) { pszBBRegFile=sz8812BBRegFile ; pszAGCTableFile =sz8812AGCTableFile; pszBBRegPgFile = sz8812BBRegPgFile; pszBBRegMpFile = sz8812BBRegMpFile; pszRFTxPwrLmtFile = sz8812BBRegLimitFile; } else { pszBBRegFile=sz8821BBRegFile ; pszAGCTableFile =sz8821AGCTableFile; pszBBRegPgFile = sz8821BBRegPgFile; pszBBRegMpFile = sz8821BBRegMpFile; pszRFTxPwrLmtFile = sz8821RFTxPwrLmtFile; } DBG_871X("===> phy_BB8812_Config_ParaFile() EEPROMRegulatory %d\n", pHalData->EEPROMRegulatory ); //DBG_871X(" ===> phy_BB8812_Config_ParaFile() phy_reg:%s\n",pszBBRegFile); //DBG_871X(" ===> phy_BB8812_Config_ParaFile() phy_reg_pg:%s\n",pszBBRegPgFile); //DBG_871X(" ===> phy_BB8812_Config_ParaFile() agc_table:%s\n",pszAGCTableFile); // Read Tx Power Limit PHY_InitTxPowerLimit( Adapter ); if ( Adapter->registrypriv.RegEnableTxPowerLimit == 1 || ( Adapter->registrypriv.RegEnableTxPowerLimit == 2 && pHalData->EEPROMRegulatory == 1 ) ) { #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE if (PHY_ConfigRFWithPowerLimitTableParaFile( Adapter, pszRFTxPwrLmtFile )== _FAIL) #endif { #ifdef CONFIG_EMBEDDED_FWIMG if (HAL_STATUS_SUCCESS != ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, CONFIG_RF_TXPWR_LMT, (ODM_RF_RADIO_PATH_E)0)) rtStatus = _FAIL; #endif } if(rtStatus != _SUCCESS){ DBG_871X("%s():Read Tx power limit fail\n",__FUNCTION__ ); goto phy_BB_Config_ParaFile_Fail; } } // Read PHY_REG.TXT BB INIT!! #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE if (phy_ConfigBBWithParaFile(Adapter, pszBBRegFile, CONFIG_BB_PHY_REG) == _FAIL) #endif { #ifdef CONFIG_EMBEDDED_FWIMG if (HAL_STATUS_SUCCESS != ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG)) rtStatus = _FAIL; #endif } if(rtStatus != _SUCCESS){ DBG_871X("%s(): CONFIG_BB_PHY_REG Fail!!\n",__FUNCTION__ ); goto phy_BB_Config_ParaFile_Fail; } // Read PHY_REG_MP.TXT BB INIT!! #if (MP_DRIVER == 1) if (Adapter->registrypriv.mp_mode == 1) { #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE if (phy_ConfigBBWithMpParaFile(Adapter, pszBBRegMpFile) == _FAIL) #endif { #ifdef CONFIG_EMBEDDED_FWIMG if (HAL_STATUS_SUCCESS != ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG_MP)) rtStatus = _FAIL; #endif } if(rtStatus != _SUCCESS){ DBG_871X("phy_BB8812_Config_ParaFile():Write BB Reg MP Fail!!\n"); goto phy_BB_Config_ParaFile_Fail; } } #endif // #if (MP_DRIVER == 1) // If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt PHY_InitTxPowerByRate( Adapter ); if ( Adapter->registrypriv.RegEnableTxPowerByRate == 1 || ( Adapter->registrypriv.RegEnableTxPowerByRate == 2 && pHalData->EEPROMRegulatory != 2 ) ) { #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE if (phy_ConfigBBWithPgParaFile(Adapter, pszBBRegPgFile) == _FAIL) #endif { #ifdef CONFIG_EMBEDDED_FWIMG if (HAL_STATUS_SUCCESS != ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG_PG)) rtStatus = _FAIL; #endif } if ( pHalData->odmpriv.PhyRegPgValueType == PHY_REG_PG_EXACT_VALUE ) PHY_TxPowerByRateConfiguration( Adapter ); if ( Adapter->registrypriv.RegEnableTxPowerLimit == 1 || ( Adapter->registrypriv.RegEnableTxPowerLimit == 2 && pHalData->EEPROMRegulatory == 1 ) ) PHY_ConvertTxPowerLimitToPowerIndex( Adapter ); if(rtStatus != _SUCCESS){ DBG_871X("%s(): CONFIG_BB_PHY_REG_PG Fail!!\n",__FUNCTION__ ); goto phy_BB_Config_ParaFile_Fail; } } // BB AGC table Initialization #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE if (phy_ConfigBBWithParaFile(Adapter, pszAGCTableFile, CONFIG_BB_AGC_TAB) == _FAIL) #endif { #ifdef CONFIG_EMBEDDED_FWIMG if (HAL_STATUS_SUCCESS != ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_AGC_TAB)) rtStatus = _FAIL; #endif } if(rtStatus != _SUCCESS){ DBG_871X("%s(): CONFIG_BB_AGC_TAB Fail!!\n",__FUNCTION__ ); } phy_BB_Config_ParaFile_Fail: return rtStatus; } int PHY_BBConfig8812( IN PADAPTER Adapter ) { int rtStatus = _SUCCESS; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u8 TmpU1B=0; u8 CrystalCap; phy_InitBBRFRegisterDefinition(Adapter); //tangw check start 20120412 // . APLL_EN,,APLL_320_GATEB,APLL_320BIAS, auto config by hw fsm after pfsm_go (0x4 bit 8) set TmpU1B = rtw_read8(Adapter, REG_SYS_FUNC_EN); if(IS_HARDWARE_TYPE_8812AU(Adapter) || IS_HARDWARE_TYPE_8821U(Adapter)) TmpU1B |= FEN_USBA; else if(IS_HARDWARE_TYPE_8812E(Adapter) || IS_HARDWARE_TYPE_8821E(Adapter)) TmpU1B |= FEN_PCIEA; rtw_write8(Adapter, REG_SYS_FUNC_EN, TmpU1B); rtw_write8(Adapter, REG_SYS_FUNC_EN, (TmpU1B|FEN_BB_GLB_RSTn|FEN_BBRSTB));//same with 8812 //6. 0x1f[7:0] = 0x07 PathA RF Power On rtw_write8(Adapter, REG_RF_CTRL, 0x07);//RF_SDMRSTB,RF_RSTB,RF_EN same with 8723a //7. PathB RF Power On rtw_write8(Adapter, REG_OPT_CTRL_8812+2, 0x7);//RF_SDMRSTB,RF_RSTB,RF_EN same with 8723a //tangw check end 20120412 // // Config BB and AGC // rtStatus = phy_BB8812_Config_ParaFile(Adapter); if(IS_HARDWARE_TYPE_8812(Adapter)) { // write 0x2C[30:25] = 0x2C[24:19] = CrystalCap CrystalCap = pHalData->CrystalCap & 0x3F; PHY_SetBBReg(Adapter, REG_MAC_PHY_CTRL, 0x7FF80000, (CrystalCap | (CrystalCap << 6))); } else if (IS_HARDWARE_TYPE_8821(Adapter)) { // 0x2C[23:18] = 0x2C[17:12] = CrystalCap CrystalCap = pHalData->CrystalCap & 0x3F; PHY_SetBBReg(Adapter, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6))); } if(IS_HARDWARE_TYPE_JAGUAR(Adapter)) { pHalData->Reg837 = rtw_read8(Adapter, 0x837); } return rtStatus; } int PHY_RFConfig8812( IN PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); int rtStatus = _SUCCESS; if (Adapter->bSurpriseRemoved) return _FAIL; switch(pHalData->rf_chip) { case RF_PSEUDO_11N: DBG_871X("%s(): RF_PSEUDO_11N\n",__FUNCTION__); break; default: rtStatus = PHY_RF6052_Config_8812(Adapter); break; } return rtStatus; } VOID PHY_TxPowerTrainingByPath_8812( IN PADAPTER Adapter, IN CHANNEL_WIDTH BandWidth, IN u8 Channel, IN u8 RfPath ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u8 i; u32 PowerLevel, writeData, writeOffset; if(RfPath >= pHalData->NumTotalRFPath) return; writeData = 0; if(RfPath == ODM_RF_PATH_A) { PowerLevel = PHY_GetTxPowerIndex_8812A(Adapter, ODM_RF_PATH_A, MGN_MCS7, BandWidth, Channel); writeOffset = rA_TxPwrTraing_Jaguar; } else { PowerLevel = PHY_GetTxPowerIndex_8812A(Adapter, ODM_RF_PATH_B, MGN_MCS7, BandWidth, Channel); writeOffset = rB_TxPwrTraing_Jaguar; } for(i = 0; i < 3; i++) { if(i == 0) PowerLevel = PowerLevel - 10; else if(i == 1) PowerLevel = PowerLevel - 8; else PowerLevel = PowerLevel - 6; writeData |= (((PowerLevel > 2)?(PowerLevel):2) << (i * 8)); } PHY_SetBBReg(Adapter, writeOffset, 0xffffff, writeData); } VOID phy_TxPwrAdjInPercentage( IN PADAPTER Adapter, OUT u8* pTxPwrIdx) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u8 TxPwrInPercentage = 0; // Retrieve default TxPwr index settings from registry. TxPwrInPercentage = pHalData->TxPwrInPercentage; if(*pTxPwrIdx > RF6052_MAX_TX_PWR) *pTxPwrIdx = RF6052_MAX_TX_PWR; // // NEC Spec: dB = 10*log(X/Y), X: target value, Y: default value. // For example: TxPower 50%, 10*log(50/100)=(nearly)-3dB // 2010.07.26. // if(TxPwrInPercentage & TX_PWR_PERCENTAGE_0)// 12.5% , -9dB { *pTxPwrIdx -=18; } else if(TxPwrInPercentage & TX_PWR_PERCENTAGE_1)// 25%, -6dB { *pTxPwrIdx -=12; } else if(TxPwrInPercentage & TX_PWR_PERCENTAGE_2)// 50%, -3dB { *pTxPwrIdx -=6; } if(*pTxPwrIdx > RF6052_MAX_TX_PWR) // Avoid underflow condition. *pTxPwrIdx = RF6052_MAX_TX_PWR; } VOID PHY_GetTxPowerLevel8812( IN PADAPTER Adapter, OUT s32* powerlevel ) { #if 0 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); s4Byte TxPwrDbm = 13; RT_TRACE(COMP_TXAGC, DBG_LOUD, ("PHY_GetTxPowerLevel8812(): TxPowerLevel: %#x\n", TxPwrDbm)); if ( pMgntInfo->ClientConfigPwrInDbm != UNSPECIFIED_PWR_DBM ) *powerlevel = pMgntInfo->ClientConfigPwrInDbm; else *powerlevel = TxPwrDbm; #endif } //create new definition of PHY_SetTxPowerLevel8812 by YP. //Page revised on 20121106 //the new way to set tx power by rate, NByte access, here N byte shall be 4 byte(DWord) or NByte(N>4) access. by page/YP, 20121106 VOID PHY_SetTxPowerLevel8812( IN PADAPTER Adapter, IN u8 Channel ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); u8 path = 0; //DBG_871X("==>PHY_SetTxPowerLevel8812()\n"); for( path = ODM_RF_PATH_A; path < pHalData->NumTotalRFPath; ++path ) { PHY_SetTxPowerLevelByPath(Adapter, Channel, path); PHY_TxPowerTrainingByPath_8812(Adapter, pHalData->CurrentChannelBW, Channel, path); } //DBG_871X("<==PHY_SetTxPowerLevel8812()\n"); } u8 phy_GetCurrentTxNum_8812A( IN PADAPTER pAdapter, IN u8 Rate ) { u8 tx_num = 0; if ( ( Rate >= MGN_MCS8 && Rate <= MGN_MCS15 ) || ( Rate >= MGN_VHT2SS_MCS0 && Rate <= MGN_VHT2SS_MCS9 ) ) tx_num = RF_2TX; else tx_num = RF_1TX; return tx_num; } /************************************************************************************************************** * Description: * The low-level interface to get the FINAL Tx Power Index , called by both MP and Normal Driver. * * <20120830, Kordan> **************************************************************************************************************/ u8 PHY_GetTxPowerIndex_8812A( IN PADAPTER pAdapter, IN u8 RFPath, IN u8 Rate, IN CHANNEL_WIDTH BandWidth, IN u8 Channel ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); s8 powerDiffByRate = 0; s8 txPower = 0, limit = 0; u8 tx_num = phy_GetCurrentTxNum_8812A( pAdapter, Rate ); BOOLEAN bIn24G = _FALSE; //DBG_871X("===> PHY_GetTxPowerIndex_8812A\n"); txPower = (s8) PHY_GetTxPowerIndexBase( pAdapter, RFPath, Rate, BandWidth, Channel, &bIn24G ); powerDiffByRate = PHY_GetTxPowerByRate( pAdapter, (u8)(!bIn24G), RFPath, tx_num, Rate ); limit = PHY_GetTxPowerLimit( pAdapter, pAdapter->registrypriv.RegPwrTblSel, (u8)(!bIn24G), pHalData->CurrentChannelBW, RFPath, Rate, pHalData->CurrentChannel); powerDiffByRate = powerDiffByRate > limit ? limit : powerDiffByRate; //DBG_871X("Rate-0x%x: (TxPower, PowerDiffByRate Path-%c) = (0x%X, %d)\n", Rate, ((RFPath==0)?'A':'B'), txPower, powerDiffByRate); // We need to reduce power index for VHT MCS 8 & 9. if (Rate == MGN_VHT1SS_MCS8 || Rate == MGN_VHT1SS_MCS9 || Rate == MGN_VHT2SS_MCS8 || Rate == MGN_VHT2SS_MCS9) { txPower += powerDiffByRate; } else { #ifdef CONFIG_USB_HCI // // 2013/01/29 MH For preventing VHT rate of 8812AU to be used in USB 2.0 mode // and the current will be more than 500mA and card disappear. We need to limit // TX power with any power by rate for VHT in U2. // 2013/01/30 MH According to power current test compare with BCM AC NIC, we // decide to use host hub = 2.0 mode to enable tx power limit behavior. // if (adapter_to_dvobj(pAdapter)->usb_speed == RTW_USB_SPEED_2 && IS_HARDWARE_TYPE_8812AU(pAdapter)) { powerDiffByRate = 0; } #endif txPower += powerDiffByRate; #if 0 // // 2013/02/06 MH Add for ASUS requiremen for adjusting TX power limit. // This is a temporarily dirty fix for asus , neeed to revise later! // 2013/03/07 MH Asus add more request. // 2013/03/14 MH Asus add one more request for the power control. // if (Channel >= 36) { txPower += pMgntInfo->RegTPCLvl5g; if (txPower > pMgntInfo->RegTPCLvl5gD) txPower -= pMgntInfo->RegTPCLvl5gD; } else { txPower += pMgntInfo->RegTPCLvl; if (txPower > pMgntInfo->RegTPCLvlD) txPower -= pMgntInfo->RegTPCLvlD; } #endif } txPower += PHY_GetTxPowerTrackingOffset( pAdapter, RFPath, Rate ); // 2012/09/26 MH We need to take care high power device limiation to prevent destroy EXT_PA. // This case had ever happened in CU/SU high power module. THe limitation = 0x20. // But for 8812, we still not know the value. phy_TxPwrAdjInPercentage(pAdapter, (u8 *)&txPower); if(txPower > MAX_POWER_INDEX) txPower = MAX_POWER_INDEX; if ( txPower % 2 == 1 && !IS_NORMAL_CHIP(pHalData->VersionID)) --txPower; //DBG_871X("Final Tx Power(RF-%c, Channel: %d) = %d(0x%X)\n", ((RFPath==0)?'A':'B'), Channel,txPower, txPower); return (u8) txPower; } /************************************************************************************************************** * Description: * The low-level interface to set TxAGC , called by both MP and Normal Driver. * * <20120830, Kordan> **************************************************************************************************************/ VOID PHY_SetTxPowerIndex_8812A( IN PADAPTER Adapter, IN u32 PowerIndex, IN u8 RFPath, IN u8 Rate ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); BOOLEAN Direction = _FALSE; u32 TxagcOffset = 0; // <20120928, Kordan> A workaround in 8812A/8821A testchip, to fix the bug of odd Tx power indexes. if ( (PowerIndex % 2 == 1) && IS_HARDWARE_TYPE_JAGUAR(Adapter) && IS_TEST_CHIP(pHalData->VersionID) ) PowerIndex -= 1; //2013.01.18 LukeLee: Modify TXAGC by dcmd_Dynamic_Ctrl() if(RFPath == RF_PATH_A) { Direction = pHalData->odmpriv.IsTxagcOffsetPositiveA; TxagcOffset = pHalData->odmpriv.TxagcOffsetValueA; } else if(RFPath == RF_PATH_B) { Direction = pHalData->odmpriv.IsTxagcOffsetPositiveB; TxagcOffset = pHalData->odmpriv.TxagcOffsetValueB; } if(Direction == _FALSE) { if(PowerIndex > TxagcOffset) PowerIndex -= TxagcOffset; else PowerIndex = 0; } else { PowerIndex += TxagcOffset; if(PowerIndex > 0x3F) PowerIndex = 0x3F; } if (RFPath == RF_PATH_A) { switch (Rate) { case MGN_1M: PHY_SetBBReg(Adapter, rTxAGC_A_CCK11_CCK1_JAguar, bMaskByte0, PowerIndex); break; case MGN_2M: PHY_SetBBReg(Adapter, rTxAGC_A_CCK11_CCK1_JAguar, bMaskByte1, PowerIndex); break; case MGN_5_5M: PHY_SetBBReg(Adapter, rTxAGC_A_CCK11_CCK1_JAguar, bMaskByte2, PowerIndex); break; case MGN_11M: PHY_SetBBReg(Adapter, rTxAGC_A_CCK11_CCK1_JAguar, bMaskByte3, PowerIndex); break; case MGN_6M: PHY_SetBBReg(Adapter, rTxAGC_A_Ofdm18_Ofdm6_JAguar, bMaskByte0, PowerIndex); break; case MGN_9M: PHY_SetBBReg(Adapter, rTxAGC_A_Ofdm18_Ofdm6_JAguar, bMaskByte1, PowerIndex); break; case MGN_12M: PHY_SetBBReg(Adapter, rTxAGC_A_Ofdm18_Ofdm6_JAguar, bMaskByte2, PowerIndex); break; case MGN_18M: PHY_SetBBReg(Adapter, rTxAGC_A_Ofdm18_Ofdm6_JAguar, bMaskByte3, PowerIndex); break; case MGN_24M: PHY_SetBBReg(Adapter, rTxAGC_A_Ofdm54_Ofdm24_JAguar, bMaskByte0, PowerIndex); break; case MGN_36M: PHY_SetBBReg(Adapter, rTxAGC_A_Ofdm54_Ofdm24_JAguar, bMaskByte1, PowerIndex); break; case MGN_48M: PHY_SetBBReg(Adapter, rTxAGC_A_Ofdm54_Ofdm24_JAguar, bMaskByte2, PowerIndex); break; case MGN_54M: PHY_SetBBReg(Adapter, rTxAGC_A_Ofdm54_Ofdm24_JAguar, bMaskByte3, PowerIndex); break; case MGN_MCS0: PHY_SetBBReg(Adapter, rTxAGC_A_MCS3_MCS0_JAguar, bMaskByte0, PowerIndex); break; case MGN_MCS1: PHY_SetBBReg(Adapter, rTxAGC_A_MCS3_MCS0_JAguar, bMaskByte1, PowerIndex); break; case MGN_MCS2: PHY_SetBBReg(Adapter, rTxAGC_A_MCS3_MCS0_JAguar, bMaskByte2, PowerIndex); break; case MGN_MCS3: PHY_SetBBReg(Adapter, rTxAGC_A_MCS3_MCS0_JAguar, bMaskByte3, PowerIndex); break; case MGN_MCS4: PHY_SetBBReg(Adapter, rTxAGC_A_MCS7_MCS4_JAguar, bMaskByte0, PowerIndex); break; case MGN_MCS5: PHY_SetBBReg(Adapter, rTxAGC_A_MCS7_MCS4_JAguar, bMaskByte1, PowerIndex); break; case MGN_MCS6: PHY_SetBBReg(Adapter, rTxAGC_A_MCS7_MCS4_JAguar, bMaskByte2, PowerIndex); break; case MGN_MCS7: PHY_SetBBReg(Adapter, rTxAGC_A_MCS7_MCS4_JAguar, bMaskByte3, PowerIndex); break; case MGN_MCS8: PHY_SetBBReg(Adapter, rTxAGC_A_MCS11_MCS8_JAguar, bMaskByte0, PowerIndex); break; case MGN_MCS9: PHY_SetBBReg(Adapter, rTxAGC_A_MCS11_MCS8_JAguar, bMaskByte1, PowerIndex); break; case MGN_MCS10: PHY_SetBBReg(Adapter, rTxAGC_A_MCS11_MCS8_JAguar, bMaskByte2, PowerIndex); break; case MGN_MCS11: PHY_SetBBReg(Adapter, rTxAGC_A_MCS11_MCS8_JAguar, bMaskByte3, PowerIndex); break; case MGN_MCS12: PHY_SetBBReg(Adapter, rTxAGC_A_MCS15_MCS12_JAguar, bMaskByte0, PowerIndex); break; case MGN_MCS13: PHY_SetBBReg(Adapter, rTxAGC_A_MCS15_MCS12_JAguar, bMaskByte1, PowerIndex); break; case MGN_MCS14: PHY_SetBBReg(Adapter, rTxAGC_A_MCS15_MCS12_JAguar, bMaskByte2, PowerIndex); break; case MGN_MCS15: PHY_SetBBReg(Adapter, rTxAGC_A_MCS15_MCS12_JAguar, bMaskByte3, PowerIndex); break; case MGN_VHT1SS_MCS0: PHY_SetBBReg(Adapter, rTxAGC_A_Nss1Index3_Nss1Index0_JAguar, bMaskByte0, PowerIndex); break; case MGN_VHT1SS_MCS1: PHY_SetBBReg(Adapter, rTxAGC_A_Nss1Index3_Nss1Index0_JAguar, bMaskByte1, PowerIndex); break; case MGN_VHT1SS_MCS2: PHY_SetBBReg(Adapter, rTxAGC_A_Nss1Index3_Nss1Index0_JAguar, bMaskByte2, PowerIndex); break; case MGN_VHT1SS_MCS3: PHY_SetBBReg(Adapter, rTxAGC_A_Nss1Index3_Nss1Index0_JAguar, bMaskByte3, PowerIndex); break; case MGN_VHT1SS_MCS4: PHY_SetBBReg(Adapter, rTxAGC_A_Nss1Index7_Nss1Index4_JAguar, bMaskByte0, PowerIndex); break; case MGN_VHT1SS_MCS5: PHY_SetBBReg(Adapter, rTxAGC_A_Nss1Index7_Nss1Index4_JAguar, bMaskByte1, PowerIndex); break; case MGN_VHT1SS_MCS6: PHY_SetBBReg(Adapter, rTxAGC_A_Nss1Index7_Nss1Index4_JAguar, bMaskByte2, PowerIndex); break; case MGN_VHT1SS_MCS7: PHY_SetBBReg(Adapter, rTxAGC_A_Nss1Index7_Nss1Index4_JAguar, bMaskByte3, PowerIndex); break; case MGN_VHT1SS_MCS8: PHY_SetBBReg(Adapter, rTxAGC_A_Nss2Index1_Nss1Index8_JAguar, bMaskByte0, PowerIndex); break; case MGN_VHT1SS_MCS9: PHY_SetBBReg(Adapter, rTxAGC_A_Nss2Index1_Nss1Index8_JAguar, bMaskByte1, PowerIndex); break; case MGN_VHT2SS_MCS0: PHY_SetBBReg(Adapter, rTxAGC_A_Nss2Index1_Nss1Index8_JAguar, bMaskByte2, PowerIndex); break; case MGN_VHT2SS_MCS1: PHY_SetBBReg(Adapter, rTxAGC_A_Nss2Index1_Nss1Index8_JAguar, bMaskByte3, PowerIndex); break; case MGN_VHT2SS_MCS2: PHY_SetBBReg(Adapter, rTxAGC_A_Nss2Index5_Nss2Index2_JAguar, bMaskByte0, PowerIndex); break; case MGN_VHT2SS_MCS3: PHY_SetBBReg(Adapter, rTxAGC_A_Nss2Index5_Nss2Index2_JAguar, bMaskByte1, PowerIndex); break; case MGN_VHT2SS_MCS4: PHY_SetBBReg(Adapter, rTxAGC_A_Nss2Index5_Nss2Index2_JAguar, bMaskByte2, PowerIndex); break; case MGN_VHT2SS_MCS5: PHY_SetBBReg(Adapter, rTxAGC_A_Nss2Index5_Nss2Index2_JAguar, bMaskByte3, PowerIndex); break; case MGN_VHT2SS_MCS6: PHY_SetBBReg(Adapter, rTxAGC_A_Nss2Index9_Nss2Index6_JAguar, bMaskByte0, PowerIndex); break; case MGN_VHT2SS_MCS7: PHY_SetBBReg(Adapter, rTxAGC_A_Nss2Index9_Nss2Index6_JAguar, bMaskByte1, PowerIndex); break; case MGN_VHT2SS_MCS8: PHY_SetBBReg(Adapter, rTxAGC_A_Nss2Index9_Nss2Index6_JAguar, bMaskByte2, PowerIndex); break; case MGN_VHT2SS_MCS9: PHY_SetBBReg(Adapter, rTxAGC_A_Nss2Index9_Nss2Index6_JAguar, bMaskByte3, PowerIndex); break; default: DBG_871X("Invalid Rate!!\n"); break; } } else if (RFPath == RF_PATH_B) { switch (Rate) { case MGN_1M: PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_CCK1_JAguar, bMaskByte0, PowerIndex); break; case MGN_2M: PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_CCK1_JAguar, bMaskByte1, PowerIndex); break; case MGN_5_5M: PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_CCK1_JAguar, bMaskByte2, PowerIndex); break; case MGN_11M: PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_CCK1_JAguar, bMaskByte3, PowerIndex); break; case MGN_6M: PHY_SetBBReg(Adapter, rTxAGC_B_Ofdm18_Ofdm6_JAguar, bMaskByte0, PowerIndex); break; case MGN_9M: PHY_SetBBReg(Adapter, rTxAGC_B_Ofdm18_Ofdm6_JAguar, bMaskByte1, PowerIndex); break; case MGN_12M: PHY_SetBBReg(Adapter, rTxAGC_B_Ofdm18_Ofdm6_JAguar, bMaskByte2, PowerIndex); break; case MGN_18M: PHY_SetBBReg(Adapter, rTxAGC_B_Ofdm18_Ofdm6_JAguar, bMaskByte3, PowerIndex); break; case MGN_24M: PHY_SetBBReg(Adapter, rTxAGC_B_Ofdm54_Ofdm24_JAguar, bMaskByte0, PowerIndex); break; case MGN_36M: PHY_SetBBReg(Adapter, rTxAGC_B_Ofdm54_Ofdm24_JAguar, bMaskByte1, PowerIndex); break; case MGN_48M: PHY_SetBBReg(Adapter, rTxAGC_B_Ofdm54_Ofdm24_JAguar, bMaskByte2, PowerIndex); break; case MGN_54M: PHY_SetBBReg(Adapter, rTxAGC_B_Ofdm54_Ofdm24_JAguar, bMaskByte3, PowerIndex); break; case MGN_MCS0: PHY_SetBBReg(Adapter, rTxAGC_B_MCS3_MCS0_JAguar, bMaskByte0, PowerIndex); break; case MGN_MCS1: PHY_SetBBReg(Adapter, rTxAGC_B_MCS3_MCS0_JAguar, bMaskByte1, PowerIndex); break; case MGN_MCS2: PHY_SetBBReg(Adapter, rTxAGC_B_MCS3_MCS0_JAguar, bMaskByte2, PowerIndex); break; case MGN_MCS3: PHY_SetBBReg(Adapter, rTxAGC_B_MCS3_MCS0_JAguar, bMaskByte3, PowerIndex); break; case MGN_MCS4: PHY_SetBBReg(Adapter, rTxAGC_B_MCS7_MCS4_JAguar, bMaskByte0, PowerIndex); break; case MGN_MCS5: PHY_SetBBReg(Adapter, rTxAGC_B_MCS7_MCS4_JAguar, bMaskByte1, PowerIndex); break; case MGN_MCS6: PHY_SetBBReg(Adapter, rTxAGC_B_MCS7_MCS4_JAguar, bMaskByte2, PowerIndex); break; case MGN_MCS7: PHY_SetBBReg(Adapter, rTxAGC_B_MCS7_MCS4_JAguar, bMaskByte3, PowerIndex); break; case MGN_MCS8: PHY_SetBBReg(Adapter, rTxAGC_B_MCS11_MCS8_JAguar, bMaskByte0, PowerIndex); break; case MGN_MCS9: PHY_SetBBReg(Adapter, rTxAGC_B_MCS11_MCS8_JAguar, bMaskByte1, PowerIndex); break; case MGN_MCS10: PHY_SetBBReg(Adapter, rTxAGC_B_MCS11_MCS8_JAguar, bMaskByte2, PowerIndex); break; case MGN_MCS11: PHY_SetBBReg(Adapter, rTxAGC_B_MCS11_MCS8_JAguar, bMaskByte3, PowerIndex); break; case MGN_MCS12: PHY_SetBBReg(Adapter, rTxAGC_B_MCS15_MCS12_JAguar, bMaskByte0, PowerIndex); break; case MGN_MCS13: PHY_SetBBReg(Adapter, rTxAGC_B_MCS15_MCS12_JAguar, bMaskByte1, PowerIndex); break; case MGN_MCS14: PHY_SetBBReg(Adapter, rTxAGC_B_MCS15_MCS12_JAguar, bMaskByte2, PowerIndex); break; case MGN_MCS15: PHY_SetBBReg(Adapter, rTxAGC_B_MCS15_MCS12_JAguar, bMaskByte3, PowerIndex); break; case MGN_VHT1SS_MCS0: PHY_SetBBReg(Adapter, rTxAGC_B_Nss1Index3_Nss1Index0_JAguar, bMaskByte0, PowerIndex); break; case MGN_VHT1SS_MCS1: PHY_SetBBReg(Adapter, rTxAGC_B_Nss1Index3_Nss1Index0_JAguar, bMaskByte1, PowerIndex); break; case MGN_VHT1SS_MCS2: PHY_SetBBReg(Adapter, rTxAGC_B_Nss1Index3_Nss1Index0_JAguar, bMaskByte2, PowerIndex); break; case MGN_VHT1SS_MCS3: PHY_SetBBReg(Adapter, rTxAGC_B_Nss1Index3_Nss1Index0_JAguar, bMaskByte3, PowerIndex); break; case MGN_VHT1SS_MCS4: PHY_SetBBReg(Adapter, rTxAGC_B_Nss1Index7_Nss1Index4_JAguar, bMaskByte0, PowerIndex); break; case MGN_VHT1SS_MCS5: PHY_SetBBReg(Adapter, rTxAGC_B_Nss1Index7_Nss1Index4_JAguar, bMaskByte1, PowerIndex); break; case MGN_VHT1SS_MCS6: PHY_SetBBReg(Adapter, rTxAGC_B_Nss1Index7_Nss1Index4_JAguar, bMaskByte2, PowerIndex); break; case MGN_VHT1SS_MCS7: PHY_SetBBReg(Adapter, rTxAGC_B_Nss1Index7_Nss1Index4_JAguar, bMaskByte3, PowerIndex); break; case MGN_VHT1SS_MCS8: PHY_SetBBReg(Adapter, rTxAGC_B_Nss2Index1_Nss1Index8_JAguar, bMaskByte0, PowerIndex); break; case MGN_VHT1SS_MCS9: PHY_SetBBReg(Adapter, rTxAGC_B_Nss2Index1_Nss1Index8_JAguar, bMaskByte1, PowerIndex); break; case MGN_VHT2SS_MCS0: PHY_SetBBReg(Adapter, rTxAGC_B_Nss2Index1_Nss1Index8_JAguar, bMaskByte2, PowerIndex); break; case MGN_VHT2SS_MCS1: PHY_SetBBReg(Adapter, rTxAGC_B_Nss2Index1_Nss1Index8_JAguar, bMaskByte3, PowerIndex); break; case MGN_VHT2SS_MCS2: PHY_SetBBReg(Adapter, rTxAGC_B_Nss2Index5_Nss2Index2_JAguar, bMaskByte0, PowerIndex); break; case MGN_VHT2SS_MCS3: PHY_SetBBReg(Adapter, rTxAGC_B_Nss2Index5_Nss2Index2_JAguar, bMaskByte1, PowerIndex); break; case MGN_VHT2SS_MCS4: PHY_SetBBReg(Adapter, rTxAGC_B_Nss2Index5_Nss2Index2_JAguar, bMaskByte2, PowerIndex); break; case MGN_VHT2SS_MCS5: PHY_SetBBReg(Adapter, rTxAGC_B_Nss2Index5_Nss2Index2_JAguar, bMaskByte3, PowerIndex); break; case MGN_VHT2SS_MCS6: PHY_SetBBReg(Adapter, rTxAGC_B_Nss2Index9_Nss2Index6_JAguar, bMaskByte0, PowerIndex); break; case MGN_VHT2SS_MCS7: PHY_SetBBReg(Adapter, rTxAGC_B_Nss2Index9_Nss2Index6_JAguar, bMaskByte1, PowerIndex); break; case MGN_VHT2SS_MCS8: PHY_SetBBReg(Adapter, rTxAGC_B_Nss2Index9_Nss2Index6_JAguar, bMaskByte2, PowerIndex); break; case MGN_VHT2SS_MCS9: PHY_SetBBReg(Adapter, rTxAGC_B_Nss2Index9_Nss2Index6_JAguar, bMaskByte3, PowerIndex); break; default: DBG_871X("Invalid Rate!!\n"); break; } } else { DBG_871X("Invalid RFPath!!\n"); } } BOOLEAN PHY_UpdateTxPowerDbm8812( IN PADAPTER Adapter, IN int powerInDbm ) { return _TRUE; } u32 PHY_GetTxBBSwing_8812A( IN PADAPTER Adapter, IN BAND_TYPE Band, IN u8 RFPath ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(GetDefaultAdapter(Adapter)); PDM_ODM_T pDM_Odm = &pHalData->odmpriv; PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); s8 bbSwing_2G = -1 * GetRegTxBBSwing_2G(Adapter); s8 bbSwing_5G = -1 * GetRegTxBBSwing_5G(Adapter); u32 out = 0x200; const s8 AUTO = -1; if (pEEPROM->bautoload_fail_flag) { if ( Band == BAND_ON_2_4G ) { pRFCalibrateInfo->BBSwingDiff2G = bbSwing_2G; if (bbSwing_2G == 0) out = 0x200; // 0 dB else if (bbSwing_2G == -3) out = 0x16A; // -3 dB else if (bbSwing_2G == -6) out = 0x101; // -6 dB else if (bbSwing_2G == -9) out = 0x0B6; // -9 dB else { if ( pHalData->ExternalPA_2G ) { pRFCalibrateInfo->BBSwingDiff2G = -3; out = 0x16A; } else { pRFCalibrateInfo->BBSwingDiff2G = 0; out = 0x200; } } } else if ( Band == BAND_ON_5G ) { pRFCalibrateInfo->BBSwingDiff5G = bbSwing_5G; if (bbSwing_5G == 0) out = 0x200; // 0 dB else if (bbSwing_5G == -3) out = 0x16A; // -3 dB else if (bbSwing_5G == -6) out = 0x101; // -6 dB else if (bbSwing_5G == -9) out = 0x0B6; // -9 dB else { if ( pHalData->ExternalPA_5G || IS_HARDWARE_TYPE_8821(Adapter)) { pRFCalibrateInfo->BBSwingDiff5G = -3; out = 0x16A; } else { pRFCalibrateInfo->BBSwingDiff5G = 0; out = 0x200; } } } else { pRFCalibrateInfo->BBSwingDiff2G = -3; pRFCalibrateInfo->BBSwingDiff5G = -3; out = 0x16A; // -3 dB } } else { u32 swing = 0, onePathSwing = 0; if (Band == BAND_ON_2_4G) { if (GetRegTxBBSwing_2G(Adapter) == AUTO) { EFUSE_ShadowRead(Adapter, 1, EEPROM_TX_BBSWING_2G_8812, (u32 *)&swing); swing = (swing == 0xFF) ? 0x00 : swing; } else if (bbSwing_2G == 0) swing = 0x00; // 0 dB else if (bbSwing_2G == -3) swing = 0x05; // -3 dB else if (bbSwing_2G == -6) swing = 0x0A; // -6 dB else if (bbSwing_2G == -9) swing = 0xFF; // -9 dB else swing = 0x00; } else { if (GetRegTxBBSwing_5G(Adapter) == AUTO) { EFUSE_ShadowRead(Adapter, 1, EEPROM_TX_BBSWING_5G_8812, (u32 *)&swing); swing = (swing == 0xFF) ? 0x00 : swing; } else if (bbSwing_5G == 0) swing = 0x00; // 0 dB else if (bbSwing_5G == -3) swing = 0x05; // -3 dB else if (bbSwing_5G == -6) swing = 0x0A; // -6 dB else if (bbSwing_5G == -9) swing = 0xFF; // -9 dB else swing = 0x00; } if (RFPath == ODM_RF_PATH_A) onePathSwing = (swing & 0x3) >> 0; // 0xC6/C7[1:0] else if(RFPath == ODM_RF_PATH_B) onePathSwing = (swing & 0xC) >> 2; // 0xC6/C7[3:2] if (onePathSwing == 0x0) { if (Band == BAND_ON_2_4G) pRFCalibrateInfo->BBSwingDiff2G = 0; else pRFCalibrateInfo->BBSwingDiff5G = 0; out = 0x200; // 0 dB } else if (onePathSwing == 0x1) { if (Band == BAND_ON_2_4G) pRFCalibrateInfo->BBSwingDiff2G = -3; else pRFCalibrateInfo->BBSwingDiff5G = -3; out = 0x16A; // -3 dB } else if (onePathSwing == 0x2) { if (Band == BAND_ON_2_4G) pRFCalibrateInfo->BBSwingDiff2G = -6; else pRFCalibrateInfo->BBSwingDiff5G = -6; out = 0x101; // -6 dB } else if (onePathSwing == 0x3) { if (Band == BAND_ON_2_4G) pRFCalibrateInfo->BBSwingDiff2G = -9; else pRFCalibrateInfo->BBSwingDiff5G = -9; out = 0x0B6; // -9 dB } } //DBG_871X("<=== PHY_GetTxBBSwing_8812A, out = 0x%X\n", out); return out; } VOID phy_SetRFEReg8812( IN PADAPTER Adapter, IN u8 Band ) { u1Byte u1tmp = 0; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); if(Band == BAND_ON_2_4G) { switch(pHalData->RFEType){ case 0: case 2: PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar,bMaskDWord, 0x77777777); PHY_SetBBReg(Adapter, rB_RFE_Pinmux_Jaguar,bMaskDWord, 0x77777777); PHY_SetBBReg(Adapter, rA_RFE_Inv_Jaguar,bMask_RFEInv_Jaguar, 0x000); PHY_SetBBReg(Adapter, rB_RFE_Inv_Jaguar,bMask_RFEInv_Jaguar, 0x000); break; case 1: #ifdef CONFIG_BT_COEXIST if (hal_btcoex_IsBtExist(Adapter) && (Adapter->registrypriv.mp_mode==0)) { PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar,0xffffff, 0x777777); PHY_SetBBReg(Adapter, rB_RFE_Pinmux_Jaguar,bMaskDWord, 0x77777777); PHY_SetBBReg(Adapter, rA_RFE_Inv_Jaguar, 0x33f00000, 0x000); PHY_SetBBReg(Adapter, rB_RFE_Inv_Jaguar,bMask_RFEInv_Jaguar, 0x000); } else #endif { PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar,bMaskDWord, 0x77777777); PHY_SetBBReg(Adapter, rB_RFE_Pinmux_Jaguar,bMaskDWord, 0x77777777); PHY_SetBBReg(Adapter, rA_RFE_Inv_Jaguar,bMask_RFEInv_Jaguar, 0x000); PHY_SetBBReg(Adapter, rB_RFE_Inv_Jaguar,bMask_RFEInv_Jaguar, 0x000); } break; case 3: PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar,bMaskDWord, 0x54337770); PHY_SetBBReg(Adapter, rB_RFE_Pinmux_Jaguar,bMaskDWord, 0x54337770); PHY_SetBBReg(Adapter, rA_RFE_Inv_Jaguar,bMask_RFEInv_Jaguar, 0x010); PHY_SetBBReg(Adapter, rB_RFE_Inv_Jaguar,bMask_RFEInv_Jaguar, 0x010); PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar,0x00000303, 0x1); break; case 4: PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar,bMaskDWord, 0x77777777); PHY_SetBBReg(Adapter, rB_RFE_Pinmux_Jaguar,bMaskDWord, 0x77777777); PHY_SetBBReg(Adapter, rA_RFE_Inv_Jaguar,bMask_RFEInv_Jaguar, 0x001); PHY_SetBBReg(Adapter, rB_RFE_Inv_Jaguar,bMask_RFEInv_Jaguar, 0x001); break; case 5: rtw_write8(Adapter, rA_RFE_Pinmux_Jaguar+2, 0x77); PHY_SetBBReg(Adapter, rB_RFE_Pinmux_Jaguar,bMaskDWord, 0x77777777); u1tmp = rtw_read8(Adapter, rA_RFE_Inv_Jaguar+3); rtw_write8(Adapter, rA_RFE_Inv_Jaguar+3, (u1tmp &= ~BIT0)); PHY_SetBBReg(Adapter, rB_RFE_Inv_Jaguar, bMask_RFEInv_Jaguar, 0x000); break; default: break; } } else { switch(pHalData->RFEType){ case 0: PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar,bMaskDWord, 0x77337717); PHY_SetBBReg(Adapter, rB_RFE_Pinmux_Jaguar,bMaskDWord, 0x77337717); PHY_SetBBReg(Adapter, rA_RFE_Inv_Jaguar,bMask_RFEInv_Jaguar, 0x010); PHY_SetBBReg(Adapter, rB_RFE_Inv_Jaguar,bMask_RFEInv_Jaguar, 0x010); break; case 1: #ifdef CONFIG_BT_COEXIST if (hal_btcoex_IsBtExist(Adapter) && (Adapter->registrypriv.mp_mode==0)) { PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar,0xffffff, 0x337717); PHY_SetBBReg(Adapter, rB_RFE_Pinmux_Jaguar,bMaskDWord, 0x77337717); PHY_SetBBReg(Adapter, rA_RFE_Inv_Jaguar, 0x33f00000, 0x000); PHY_SetBBReg(Adapter, rB_RFE_Inv_Jaguar,bMask_RFEInv_Jaguar, 0x000); } else #endif { PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar,bMaskDWord, 0x77337717); PHY_SetBBReg(Adapter, rB_RFE_Pinmux_Jaguar,bMaskDWord, 0x77337717); PHY_SetBBReg(Adapter, rA_RFE_Inv_Jaguar,bMask_RFEInv_Jaguar, 0x000); PHY_SetBBReg(Adapter, rB_RFE_Inv_Jaguar,bMask_RFEInv_Jaguar, 0x000); } break; case 2: case 4: PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar,bMaskDWord, 0x77337777); PHY_SetBBReg(Adapter, rB_RFE_Pinmux_Jaguar,bMaskDWord, 0x77337777); PHY_SetBBReg(Adapter, rA_RFE_Inv_Jaguar,bMask_RFEInv_Jaguar, 0x010); PHY_SetBBReg(Adapter, rB_RFE_Inv_Jaguar,bMask_RFEInv_Jaguar, 0x010); break; case 3: PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar,bMaskDWord, 0x54337717); PHY_SetBBReg(Adapter, rB_RFE_Pinmux_Jaguar,bMaskDWord, 0x54337717); PHY_SetBBReg(Adapter, rA_RFE_Inv_Jaguar,bMask_RFEInv_Jaguar, 0x010); PHY_SetBBReg(Adapter, rB_RFE_Inv_Jaguar,bMask_RFEInv_Jaguar, 0x010); PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar,0x00000303, 0x1); break; case 5: rtw_write8(Adapter, rA_RFE_Pinmux_Jaguar+2, 0x33); PHY_SetBBReg(Adapter, rB_RFE_Pinmux_Jaguar,bMaskDWord, 0x77337777); u1tmp = rtw_read8(Adapter, rA_RFE_Inv_Jaguar+3); rtw_write8(Adapter, rA_RFE_Inv_Jaguar+3, (u1tmp |= BIT0)); PHY_SetBBReg(Adapter, rB_RFE_Inv_Jaguar, bMask_RFEInv_Jaguar, 0x010); break; default: break; } } } void phy_SetBBSwingByBand_8812A( IN PADAPTER Adapter, IN u8 Band, IN u1Byte PreviousBand ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(GetDefaultAdapter(Adapter)); //<20120903, Kordan> Tx BB swing setting for RL6286, asked by Ynlin. if (IS_NORMAL_CHIP(pHalData->VersionID) || IS_HARDWARE_TYPE_8821(Adapter)) { #if (MP_DRIVER == 1) PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx); #endif s8 BBDiffBetweenBand = 0; PDM_ODM_T pDM_Odm = &pHalData->odmpriv; PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); u8 path = ODM_RF_PATH_A; PHY_SetBBReg(Adapter, rA_TxScale_Jaguar, 0xFFE00000, PHY_GetTxBBSwing_8812A(Adapter, (BAND_TYPE)Band, ODM_RF_PATH_A)); // 0xC1C[31:21] PHY_SetBBReg(Adapter, rB_TxScale_Jaguar, 0xFFE00000, PHY_GetTxBBSwing_8812A(Adapter, (BAND_TYPE)Band, ODM_RF_PATH_B)); // 0xE1C[31:21] // <20121005, Kordan> When TxPowerTrack is ON, we should take care of the change of BB swing. // That is, reset all info to trigger Tx power tracking. { #if (MP_DRIVER == 1) path = pMptCtx->MptRfPath; #endif if (Band != PreviousBand) { BBDiffBetweenBand = (pRFCalibrateInfo->BBSwingDiff2G - pRFCalibrateInfo->BBSwingDiff5G); BBDiffBetweenBand = (Band == BAND_ON_2_4G) ? BBDiffBetweenBand : (-1 * BBDiffBetweenBand); pDM_Odm->DefaultOfdmIndex += BBDiffBetweenBand*2; } ODM_ClearTxPowerTrackingState(pDM_Odm); } } } VOID phy_SetRFEReg8821( IN PADAPTER Adapter, IN u1Byte Band ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); if(Band == BAND_ON_2_4G) { // Turn off RF PA and LNA PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar, 0xF000, 0x7); // 0xCB0[15:12] = 0x7 (LNA_On) PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar, 0xF0, 0x7); // 0xCB0[7:4] = 0x7 (PAPE_A) if (pHalData->ExternalLNA_2G) { // <20131223, VincentL> Turn on 2.4G External LNA (Asked by Luke Lee & Alex Wang) PHY_SetBBReg(Adapter, rA_RFE_Inv_Jaguar, BIT20, 1); // 0xCB4 = 0x10100077; PHY_SetBBReg(Adapter, rA_RFE_Inv_Jaguar, BIT22, 0); // 0xCB4 = 0x10100077; PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar, BIT2|BIT1|BIT0, 0x2); // 0xCB0[2:0] = b'010 PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar, BIT10|BIT9|BIT8, 0x2); // 0xCB0[10:8] = b'010 }else{ // <20131223, VincentL> Bypass 2.4G External LNA (Asked by Luke Lee & Alex Wang) PHY_SetBBReg(Adapter, rA_RFE_Inv_Jaguar, BIT20, 0); // 0xCB4 = 0x10000077; PHY_SetBBReg(Adapter, rA_RFE_Inv_Jaguar, BIT22, 0); // 0xCB4 = 0x10000077; PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar, BIT2|BIT1|BIT0, 0x7); // 0xCB0[2:0] = b'111 PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar, BIT10|BIT9|BIT8, 0x7); // 0xCB0[10:8] = b'111 } } else { // Turn ON RF PA and LNA PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar, 0xF000, 0x5); // 0xCB0[15:12] = 0x5 (LNA_On) PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar, 0xF0, 0x4); // 0xCB0[7:4] = 0x4 (PAPE_A) // <20131223, VincentL> Bypass 2.4G External LNA (Asked by Luke Lee & Alex Wang) PHY_SetBBReg(Adapter, rA_RFE_Inv_Jaguar, BIT20, 0); // 0xCB4 = 0x10000077; PHY_SetBBReg(Adapter, rA_RFE_Inv_Jaguar, BIT22, 0); // 0xCB4 = 0x10000077; PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar, BIT2|BIT1|BIT0, 0x7); // 0xCB0[2:0] = b'111 PHY_SetBBReg(Adapter, rA_RFE_Pinmux_Jaguar, BIT10|BIT9|BIT8, 0x7); // 0xCB0[10:8] = b'111 } } s32 PHY_SwitchWirelessBand8812( IN PADAPTER Adapter, IN u8 Band ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u8 currentBand = pHalData->CurrentBandType; //DBG_871X("==>PHY_SwitchWirelessBand8812() %s\n", ((Band==0)?"2.4G":"5G")); pHalData->CurrentBandType =(BAND_TYPE)Band; if(Band == BAND_ON_2_4G) {// 2.4G band PHY_SetBBReg(Adapter, rOFDMCCKEN_Jaguar, bOFDMEN_Jaguar|bCCKEN_Jaguar, 0x03); if (IS_HARDWARE_TYPE_8821(Adapter)) phy_SetRFEReg8821(Adapter, Band); if(IS_HARDWARE_TYPE_8812(Adapter)) { // <20131128, VincentL> Remove 0x830[3:1] setting when switching 2G/5G, requested by Yn. PHY_SetBBReg(Adapter,rBWIndication_Jaguar,0x3,0x1); // 0x834[1:0] = 0x1 //BB Yn user guide R27 PHY_SetBBReg(Adapter,rPwed_TH_Jaguar, BIT13|BIT14|BIT15|BIT16|BIT17, 0x17); //0x830[17:13]=5'b10111 } // AGC table select if(IS_VENDOR_8821A_MP_CHIP(Adapter)) PHY_SetBBReg(Adapter, rA_TxScale_Jaguar, 0xF00, 0); // 0xC1C[11:8] = 0 else PHY_SetBBReg(Adapter, rAGC_table_Jaguar, 0x3, 0); // 0x82C[1:0] = 2b'00 if(IS_HARDWARE_TYPE_8812(Adapter)) phy_SetRFEReg8812(Adapter, Band); // <20131106, Kordan> Workaround to fix CCK FA for scan issue. //if( pHalData->bMPMode == FALSE) if(Adapter->registrypriv.mp_mode==0) { PHY_SetBBReg(Adapter, rTxPath_Jaguar, 0xf0, 0x1); PHY_SetBBReg(Adapter, rCCK_RX_Jaguar, 0x0f000000, 0x1); } update_tx_basic_rate(Adapter, WIRELESS_11BG); // CCK_CHECK_en rtw_write8(Adapter, REG_CCK_CHECK_8812, 0x0); } else //5G band { u16 count = 0, reg41A = 0; if (IS_HARDWARE_TYPE_8821(Adapter)) phy_SetRFEReg8821(Adapter, Band); // CCK_CHECK_en rtw_write8(Adapter, REG_CCK_CHECK_8812, 0x80); count = 0; reg41A = rtw_read16(Adapter, REG_TXPKT_EMPTY); //DBG_871X("Reg41A value %d", reg41A); reg41A &= 0x30; while((reg41A!= 0x30) && (count < 50)) { rtw_udelay_os(50); //DBG_871X("Delay 50us \n"); reg41A = rtw_read16(Adapter, REG_TXPKT_EMPTY); reg41A &= 0x30; count++; //DBG_871X("Reg41A value %d", reg41A); } if(count != 0) DBG_871X("PHY_SwitchWirelessBand8812(): Switch to 5G Band. Count = %d reg41A=0x%x\n", count, reg41A); // 2012/02/01, Sinda add registry to switch workaround without long-run verification for scan issue. if(Adapter->registrypriv.mp_mode==0) PHY_SetBBReg(Adapter, rOFDMCCKEN_Jaguar, bOFDMEN_Jaguar|bCCKEN_Jaguar, 0x03); if(IS_HARDWARE_TYPE_8812(Adapter)) { // <20131128, VincentL> Remove 0x830[3:1] setting when switching 2G/5G, requested by Yn. PHY_SetBBReg(Adapter,rBWIndication_Jaguar,0x3,0x2); // 0x834[1:0] = 0x2 //BB Yn user guide R27 PHY_SetBBReg(Adapter,rPwed_TH_Jaguar, BIT13|BIT14|BIT15|BIT16|BIT17, 0x15); //0x830[17:13]=5'b10101 } // AGC table select if (IS_VENDOR_8821A_MP_CHIP(Adapter)) PHY_SetBBReg(Adapter, rA_TxScale_Jaguar, 0xF00, 1); // 0xC1C[11:8] = 1 else PHY_SetBBReg(Adapter, rAGC_table_Jaguar, 0x3, 1); // 0x82C[1:0] = 2'b00 if(IS_HARDWARE_TYPE_8812(Adapter)) phy_SetRFEReg8812(Adapter, Band); // <20131106, Kordan> Workaround to fix CCK FA for scan issue. //if( pHalData->bMPMode == FALSE) if(Adapter->registrypriv.mp_mode==0) { PHY_SetBBReg(Adapter, rTxPath_Jaguar, 0xf0, 0x0); PHY_SetBBReg(Adapter, rCCK_RX_Jaguar, 0x0f000000, 0xF); } else { // cck_enable PHY_SetBBReg(Adapter, rOFDMCCKEN_Jaguar, bOFDMEN_Jaguar|bCCKEN_Jaguar, 0x02); } //avoid using cck rate in 5G band // Set RRSR rate table. update_tx_basic_rate(Adapter, WIRELESS_11A); //DBG_871X("==>PHY_SwitchWirelessBand8812() BAND_ON_5G settings OFDM index 0x%x\n", pHalData->OFDM_index[RF_PATH_A]); } phy_SetBBSwingByBand_8812A(Adapter, Band, currentBand); //DBG_871X("<==PHY_SwitchWirelessBand8812():Switch Band OK.\n"); return _SUCCESS; } BOOLEAN phy_SwBand8812( IN PADAPTER pAdapter, IN u8 channelToSW ) { u8 u1Btmp; BOOLEAN ret_value = _TRUE; u8 Band = BAND_ON_5G, BandToSW; u1Btmp = rtw_read8(pAdapter, REG_CCK_CHECK_8812); if(u1Btmp & BIT7) Band = BAND_ON_5G; else Band = BAND_ON_2_4G; // Use current channel to judge Band Type and switch Band if need. if(channelToSW > 14) { BandToSW = BAND_ON_5G; } else { BandToSW = BAND_ON_2_4G; } if(BandToSW != Band) PHY_SwitchWirelessBand8812(pAdapter,BandToSW); return ret_value; } u8 phy_GetSecondaryChnl_8812( IN PADAPTER Adapter ) { u8 SCSettingOf40 = 0, SCSettingOf20 = 0; PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); //DBG_871X("SCMapping: Case: pHalData->CurrentChannelBW %d, pHalData->nCur80MhzPrimeSC %d, pHalData->nCur40MhzPrimeSC %d \n",pHalData->CurrentChannelBW,pHalData->nCur80MhzPrimeSC,pHalData->nCur40MhzPrimeSC); if(pHalData->CurrentChannelBW== CHANNEL_WIDTH_80) { if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) SCSettingOf40 = VHT_DATA_SC_40_LOWER_OF_80MHZ; else if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) SCSettingOf40 = VHT_DATA_SC_40_UPPER_OF_80MHZ; else DBG_871X("SCMapping: Not Correct Primary80MHz Setting \n"); if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)) SCSettingOf20 = VHT_DATA_SC_20_LOWEST_OF_80MHZ; else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)) SCSettingOf20 = VHT_DATA_SC_20_LOWER_OF_80MHZ; else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)) SCSettingOf20 = VHT_DATA_SC_20_UPPER_OF_80MHZ; else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)) SCSettingOf20 = VHT_DATA_SC_20_UPPERST_OF_80MHZ; else DBG_871X("SCMapping: Not Correct Primary80MHz Setting \n"); } else if(pHalData->CurrentChannelBW == CHANNEL_WIDTH_40) { //DBG_871X("SCMapping: Case: pHalData->CurrentChannelBW %d, pHalData->nCur40MhzPrimeSC %d \n",pHalData->CurrentChannelBW,pHalData->nCur40MhzPrimeSC); if(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) SCSettingOf20 = VHT_DATA_SC_20_UPPER_OF_80MHZ; else if(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) SCSettingOf20 = VHT_DATA_SC_20_LOWER_OF_80MHZ; else DBG_871X("SCMapping: Not Correct Primary40MHz Setting \n"); } //DBG_871X("SCMapping: SC Value %x \n", ( (SCSettingOf40 << 4) | SCSettingOf20)); return ( (SCSettingOf40 << 4) | SCSettingOf20); } VOID phy_SetRegBW_8812( IN PADAPTER Adapter, CHANNEL_WIDTH CurrentBW ) { u16 RegRfMod_BW, u2tmp = 0; RegRfMod_BW = rtw_read16(Adapter, REG_WMAC_TRXPTCL_CTL); switch(CurrentBW) { case CHANNEL_WIDTH_20: rtw_write16(Adapter, REG_WMAC_TRXPTCL_CTL, (RegRfMod_BW & 0xFE7F)); // BIT 7 = 0, BIT 8 = 0 break; case CHANNEL_WIDTH_40: u2tmp = RegRfMod_BW | BIT7; rtw_write16(Adapter, REG_WMAC_TRXPTCL_CTL, (u2tmp & 0xFEFF)); // BIT 7 = 1, BIT 8 = 0 break; case CHANNEL_WIDTH_80: u2tmp = RegRfMod_BW | BIT8; rtw_write16(Adapter, REG_WMAC_TRXPTCL_CTL, (u2tmp & 0xFF7F)); // BIT 7 = 0, BIT 8 = 1 break; default: DBG_871X("phy_PostSetBWMode8812(): unknown Bandwidth: %#X\n",CurrentBW); break; } } void phy_FixSpur_8812A( IN PADAPTER pAdapter, IN CHANNEL_WIDTH Bandwidth, IN u1Byte Channel ) { // C cut Item12 ADC FIFO CLOCK if(IS_VENDOR_8812A_C_CUT(pAdapter)) { if(Bandwidth == CHANNEL_WIDTH_40 && Channel == 11) PHY_SetBBReg(pAdapter, rRFMOD_Jaguar, 0xC00, 0x3) ; // 0x8AC[11:10] = 2'b11 else PHY_SetBBReg(pAdapter, rRFMOD_Jaguar, 0xC00, 0x2); // 0x8AC[11:10] = 2'b10 // <20120914, Kordan> A workarould to resolve 2480Mhz spur by setting ADC clock as 160M. (Asked by Binson) if (Bandwidth == CHANNEL_WIDTH_20 && (Channel == 13 || Channel == 14)) { PHY_SetBBReg(pAdapter, rRFMOD_Jaguar, 0x300, 0x3); // 0x8AC[9:8] = 2'b11 PHY_SetBBReg(pAdapter, rADC_Buf_Clk_Jaguar, BIT30, 1); // 0x8C4[30] = 1 } else if (Bandwidth == CHANNEL_WIDTH_40 && Channel == 11) { PHY_SetBBReg(pAdapter, rADC_Buf_Clk_Jaguar, BIT30, 1); // 0x8C4[30] = 1 } else if (Bandwidth != CHANNEL_WIDTH_80) { PHY_SetBBReg(pAdapter, rRFMOD_Jaguar, 0x300, 0x2); // 0x8AC[9:8] = 2'b10 PHY_SetBBReg(pAdapter, rADC_Buf_Clk_Jaguar, BIT30, 0); // 0x8C4[30] = 0 } } else if (IS_HARDWARE_TYPE_8812(pAdapter)) { // <20120914, Kordan> A workarould to resolve 2480Mhz spur by setting ADC clock as 160M. (Asked by Binson) if (Bandwidth == CHANNEL_WIDTH_20 && (Channel == 13 || Channel == 14)) PHY_SetBBReg(pAdapter, rRFMOD_Jaguar, 0x300, 0x3); // 0x8AC[9:8] = 11 else if (Channel <= 14) // 2.4G only PHY_SetBBReg(pAdapter, rRFMOD_Jaguar, 0x300, 0x2); // 0x8AC[9:8] = 10 } } VOID phy_PostSetBwMode8812( IN PADAPTER Adapter ) { u8 SubChnlNum = 0; u8 L1pkVal = 0; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); //3 Set Reg668 BW phy_SetRegBW_8812(Adapter, pHalData->CurrentChannelBW); //3 Set Reg483 SubChnlNum = phy_GetSecondaryChnl_8812(Adapter); rtw_write8(Adapter, REG_DATA_SC_8812, SubChnlNum); if(pHalData->rf_chip == RF_PSEUDO_11N) { DBG_871X("phy_PostSetBwMode8812: return for PSEUDO \n"); return; } //DBG_871X("[BW:CHNL], phy_PostSetBwMode8812(), set BW=%s !!\n", GLBwSrc[pHalData->CurrentChannelBW]); //3 Set Reg848 Reg864 Reg8AC Reg8C4 RegA00 switch(pHalData->CurrentChannelBW) { case CHANNEL_WIDTH_20: PHY_SetBBReg(Adapter, rRFMOD_Jaguar, 0x003003C3, 0x00300200); // 0x8ac[21,20,9:6,1,0]=8'b11100000 PHY_SetBBReg(Adapter, rADC_Buf_Clk_Jaguar, BIT30, 0); // 0x8c4[30] = 1'b0 if(pHalData->rf_type == RF_2T2R) PHY_SetBBReg(Adapter, rL1PeakTH_Jaguar, 0x03C00000, 7); // 2R 0x848[25:22] = 0x7 else PHY_SetBBReg(Adapter, rL1PeakTH_Jaguar, 0x03C00000, 8); // 1R 0x848[25:22] = 0x8 break; case CHANNEL_WIDTH_40: PHY_SetBBReg(Adapter, rRFMOD_Jaguar, 0x003003C3, 0x00300201); // 0x8ac[21,20,9:6,1,0]=8'b11100000 PHY_SetBBReg(Adapter, rADC_Buf_Clk_Jaguar, BIT30, 0); // 0x8c4[30] = 1'b0 PHY_SetBBReg(Adapter, rRFMOD_Jaguar, 0x3C, SubChnlNum); PHY_SetBBReg(Adapter, rCCAonSec_Jaguar, 0xf0000000, SubChnlNum); if(pHalData->Reg837 & BIT2) L1pkVal = 6; else { if(pHalData->rf_type == RF_2T2R) L1pkVal = 7; else L1pkVal = 8; } PHY_SetBBReg(Adapter, rL1PeakTH_Jaguar, 0x03C00000, L1pkVal); // 0x848[25:22] = 0x6 if(SubChnlNum == VHT_DATA_SC_20_UPPER_OF_80MHZ) PHY_SetBBReg(Adapter, rCCK_System_Jaguar, bCCK_System_Jaguar, 1); else PHY_SetBBReg(Adapter, rCCK_System_Jaguar, bCCK_System_Jaguar, 0); break; case CHANNEL_WIDTH_80: PHY_SetBBReg(Adapter, rRFMOD_Jaguar, 0x003003C3, 0x00300202); // 0x8ac[21,20,9:6,1,0]=8'b11100010 PHY_SetBBReg(Adapter, rADC_Buf_Clk_Jaguar, BIT30, 1); // 0x8c4[30] = 1 PHY_SetBBReg(Adapter, rRFMOD_Jaguar, 0x3C, SubChnlNum); PHY_SetBBReg(Adapter, rCCAonSec_Jaguar, 0xf0000000, SubChnlNum); if(pHalData->Reg837 & BIT2) L1pkVal = 5; else { if(pHalData->rf_type == RF_2T2R) L1pkVal = 6; else L1pkVal = 7; } PHY_SetBBReg(Adapter, rL1PeakTH_Jaguar, 0x03C00000, L1pkVal); // 0x848[25:22] = 0x5 break; default: DBG_871X("phy_PostSetBWMode8812(): unknown Bandwidth: %#X\n",pHalData->CurrentChannelBW); break; } // <20121109, Kordan> A workaround for 8812A only. phy_FixSpur_8812A(Adapter, pHalData->CurrentChannelBW, pHalData->CurrentChannel); //DBG_871X("phy_PostSetBwMode8812(): Reg483: %x\n", rtw_read8(Adapter, 0x483)); //DBG_871X("phy_PostSetBwMode8812(): Reg668: %x\n", rtw_read32(Adapter, 0x668)); //DBG_871X("phy_PostSetBwMode8812(): Reg8AC: %x\n", PHY_QueryBBReg(Adapter, rRFMOD_Jaguar, 0xffffffff)); //3 Set RF related register PHY_RF6052SetBandwidth8812(Adapter, pHalData->CurrentChannelBW); } //<20130207, Kordan> The variales initialized here are used in odm_LNAPowerControl(). VOID phy_InitRssiTRSW( IN PADAPTER pAdapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PDM_ODM_T pDM_Odm = &pHalData->odmpriv; u8 channel = pHalData->CurrentChannel; if (pHalData->RFEType == 3){ if (channel <= 14) { pDM_Odm->RSSI_TRSW_H = 70; // Unit: percentage(%) pDM_Odm->RSSI_TRSW_iso = 25; } else { pDM_Odm->RSSI_TRSW_H = 80; pDM_Odm->RSSI_TRSW_iso = 25; } pDM_Odm->RSSI_TRSW_L = pDM_Odm->RSSI_TRSW_H - pDM_Odm->RSSI_TRSW_iso - 10; } } // <20130806, Kordan> Referenced from "WB-20130801-YN-RL6286 Settings for Spur Issues.xls". VOID phy_SpurCalibration_8812A( IN PADAPTER pAdapter, IN u8 Channel ) { //RT_TRACE(COMP_SCAN, DBG_LOUD, ("===>phy_SpurCalibration_8812A()\n")); //2 1. Reset PHY_SetBBReg(pAdapter, 0x878, BIT8|BIT7|BIT6, 0x3); PHY_SetBBReg(pAdapter, 0x878, BIT0, 0); PHY_SetBBReg(pAdapter, 0x87C, BIT13, 0); PHY_SetBBReg(pAdapter, 0x880, bMaskDWord, 0); PHY_SetBBReg(pAdapter, 0x884, bMaskDWord, 0); PHY_SetBBReg(pAdapter, 0x898, bMaskDWord, 0); PHY_SetBBReg(pAdapter, 0x89C, bMaskDWord, 0); //2 2. Register Setting 1 (False Alarm) switch (Channel) { case 149: case 153: case 151: case 155: { PHY_SetBBReg(pAdapter, 0x878, BIT8|BIT7|BIT6, 0x4); PHY_SetBBReg(pAdapter, 0x878, BIT0, 1); PHY_SetBBReg(pAdapter, 0x87C, BIT13, 1); break; } default: break; } //2 3. Register Setting 2 (SINR) PHY_SetBBReg(pAdapter, 0x874, BIT21, 1); PHY_SetBBReg(pAdapter, 0x874, BIT0 , 1); switch (Channel) { case 149: PHY_SetBBReg(pAdapter, 0x884, bMaskDWord, 0x00010000); break; case 153: PHY_SetBBReg(pAdapter, 0x89C, bMaskDWord, 0x00010000); break; case 165: PHY_SetBBReg(pAdapter, 0x884, bMaskDWord, 0x00010000); break; case 169: PHY_SetBBReg(pAdapter, 0x89C, bMaskDWord, 0x00010000); break; case 38: case 54: case 102: case 118: case 134: //PHY_SetBBReg(pAdapter, 0x884, bMaskDWord, 0x00000001); break; case 151: case 167: PHY_SetBBReg(pAdapter, 0x880, bMaskDWord, 0x00010000); break; case 42: case 58: case 106: case 122: case 138: PHY_SetBBReg(pAdapter, 0x89C, bMaskDWord, 0x00000001); break; case 155: PHY_SetBBReg(pAdapter, 0x898, bMaskDWord, 0x00010000); break; default: break; } //RT_TRACE(COMP_SCAN, DBG_LOUD, ("<===phy_SpurCalibration_8812A()\n")); } VOID phy_SwChnl8812( IN PADAPTER pAdapter ) { u8 eRFPath = 0; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); u8 channelToSW = pHalData->CurrentChannel; if(phy_SwBand8812(pAdapter, channelToSW) == _FALSE) { DBG_871X("error Chnl %d !\n", channelToSW); } //<20130313, Kordan> Sample code to demonstrate how to configure AGC_TAB_DIFF.(Disabled by now) #if (MP_DRIVER == 1) if (pAdapter->registrypriv.mp_mode == 1) ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_AGC_TAB_DIFF); #endif if(pHalData->rf_chip == RF_PSEUDO_11N) { DBG_871X("phy_SwChnl8812: return for PSEUDO \n"); return; } //DBG_871X("[BW:CHNL], phy_SwChnl8812(), switch to channel %d !!\n", channelToSW); // fc_area if (36 <= channelToSW && channelToSW <= 48) PHY_SetBBReg(pAdapter, rFc_area_Jaguar, 0x1ffe0000, 0x494); else if (50 <= channelToSW && channelToSW <= 64) PHY_SetBBReg(pAdapter, rFc_area_Jaguar, 0x1ffe0000, 0x453); else if (100 <= channelToSW && channelToSW <= 116) PHY_SetBBReg(pAdapter, rFc_area_Jaguar, 0x1ffe0000, 0x452); else if (118 <= channelToSW) PHY_SetBBReg(pAdapter, rFc_area_Jaguar, 0x1ffe0000, 0x412); else PHY_SetBBReg(pAdapter, rFc_area_Jaguar, 0x1ffe0000, 0x96a); for(eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) { // RF_MOD_AG if (36 <= channelToSW && channelToSW <= 64) PHY_SetRFReg(pAdapter, eRFPath, RF_CHNLBW_Jaguar, BIT18|BIT17|BIT16|BIT9|BIT8, 0x101); //5'b00101); else if (100 <= channelToSW && channelToSW <= 140) PHY_SetRFReg(pAdapter, eRFPath, RF_CHNLBW_Jaguar, BIT18|BIT17|BIT16|BIT9|BIT8, 0x301); //5'b01101); else if (140 < channelToSW) PHY_SetRFReg(pAdapter, eRFPath, RF_CHNLBW_Jaguar, BIT18|BIT17|BIT16|BIT9|BIT8, 0x501); //5'b10101); else PHY_SetRFReg(pAdapter, eRFPath, RF_CHNLBW_Jaguar, BIT18|BIT17|BIT16|BIT9|BIT8, 0x000); //5'b00000); // <20121109, Kordan> A workaround for 8812A only. phy_FixSpur_8812A(pAdapter, pHalData->CurrentChannelBW, channelToSW); PHY_SetRFReg(pAdapter, eRFPath, RF_CHNLBW_Jaguar, bMaskByte0, channelToSW); // <20130104, Kordan> APK for MP chip is done on initialization from folder. if (IS_HARDWARE_TYPE_8821U(pAdapter) && ( !IS_NORMAL_CHIP(pHalData->VersionID)) && channelToSW > 14 ) { // <20121116, Kordan> For better result of APK. Asked by AlexWang. if (36 <= channelToSW && channelToSW <= 64) PHY_SetRFReg(pAdapter, eRFPath, RF_APK_Jaguar, bRFRegOffsetMask, 0x710E7); else if (100 <= channelToSW && channelToSW <= 140) PHY_SetRFReg(pAdapter, eRFPath, RF_APK_Jaguar, bRFRegOffsetMask, 0x716E9); else PHY_SetRFReg(pAdapter, eRFPath, RF_APK_Jaguar, bRFRegOffsetMask, 0x714E9); } else if (IS_HARDWARE_TYPE_8821S(pAdapter) && channelToSW > 14) { // <20130111, Kordan> For better result of APK. Asked by Willson. if (36 <= channelToSW && channelToSW <= 64) PHY_SetRFReg(pAdapter, eRFPath, RF_APK_Jaguar, bRFRegOffsetMask, 0x714E9); else if (100 <= channelToSW && channelToSW <= 140) PHY_SetRFReg(pAdapter, eRFPath, RF_APK_Jaguar, bRFRegOffsetMask, 0x110E9); else PHY_SetRFReg(pAdapter, eRFPath, RF_APK_Jaguar, bRFRegOffsetMask, 0x714E9); } else if (IS_HARDWARE_TYPE_8821E(pAdapter) && channelToSW > 14) { // <20130613, Kordan> For better result of APK. Asked by Willson. if (36 <= channelToSW && channelToSW <= 64) PHY_SetRFReg(pAdapter, eRFPath, RF_APK_Jaguar, bRFRegOffsetMask, 0x114E9); else if (100 <= channelToSW && channelToSW <= 140) PHY_SetRFReg(pAdapter, eRFPath, RF_APK_Jaguar, bRFRegOffsetMask, 0x110E9); else PHY_SetRFReg(pAdapter, eRFPath, RF_APK_Jaguar, bRFRegOffsetMask, 0x110E9); } } if (IS_HARDWARE_TYPE_8812(pAdapter) && (pHalData->RFEType == 4 || pHalData->ExternalPA_5G == 0)) phy_SpurCalibration_8812A(pAdapter, channelToSW); } VOID phy_SwChnlAndSetBwMode8812( IN PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T pDM_Odm = &pHalData->odmpriv; //DBG_871X("phy_SwChnlAndSetBwMode8812(): bSwChnl %d, bSetChnlBW %d \n", pHalData->bSwChnl, pHalData->bSetChnlBW); if ( Adapter->bNotifyChannelChange ) { DBG_871X( "[%s] bSwChnl=%d, ch=%d, bSetChnlBW=%d, bw=%d\n", __FUNCTION__, pHalData->bSwChnl, pHalData->CurrentChannel, pHalData->bSetChnlBW, pHalData->CurrentChannelBW); } if((Adapter->bDriverStopped) || (Adapter->bSurpriseRemoved)) { return; } if(pHalData->bSwChnl) { phy_SwChnl8812(Adapter); pHalData->bSwChnl = _FALSE; } if(pHalData->bSetChnlBW) { phy_PostSetBwMode8812(Adapter); pHalData->bSetChnlBW = _FALSE; } ODM_ClearTxPowerTrackingState(&pHalData->odmpriv); PHY_SetTxPowerLevel8812(Adapter, pHalData->CurrentChannel); if(IS_HARDWARE_TYPE_8812(Adapter)) phy_InitRssiTRSW(Adapter); if ( (pHalData->bNeedIQK == _TRUE) #if (MP_DRIVER == 1) || (Adapter->registrypriv.mp_mode == 1) #endif ) { if(IS_HARDWARE_TYPE_8812(Adapter)) { #if (RTL8812A_SUPPORT == 1) PHY_IQCalibrate_8812A(Adapter, _FALSE); #endif } else if(IS_HARDWARE_TYPE_8821(Adapter)) { #if (RTL8821A_SUPPORT == 1) PHY_IQCalibrate_8821A(pDM_Odm, _FALSE); #endif } pHalData->bNeedIQK = _FALSE; } } VOID PHY_HandleSwChnlAndSetBW8812( IN PADAPTER Adapter, IN BOOLEAN bSwitchChannel, IN BOOLEAN bSetBandWidth, IN u8 ChannelNum, IN CHANNEL_WIDTH ChnlWidth, IN u8 ChnlOffsetOf40MHz, IN u8 ChnlOffsetOf80MHz, IN u8 CenterFrequencyIndex1 ) { PADAPTER pDefAdapter = GetDefaultAdapter(Adapter); PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pDefAdapter); u8 tmpChannel = pHalData->CurrentChannel; CHANNEL_WIDTH tmpBW= pHalData->CurrentChannelBW; u8 tmpnCur40MhzPrimeSC = pHalData->nCur40MhzPrimeSC; u8 tmpnCur80MhzPrimeSC = pHalData->nCur80MhzPrimeSC; u8 tmpCenterFrequencyIndex1 =pHalData->CurrentCenterFrequencyIndex1; struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; //DBG_871X("=> PHY_HandleSwChnlAndSetBW8812: bSwitchChannel %d, bSetBandWidth %d \n",bSwitchChannel,bSetBandWidth); //check is swchnl or setbw if(!bSwitchChannel && !bSetBandWidth) { DBG_871X("PHY_HandleSwChnlAndSetBW8812: not switch channel and not set bandwidth \n"); return; } //skip change for channel or bandwidth is the same if(bSwitchChannel) { if(pHalData->CurrentChannel != ChannelNum) { if (HAL_IsLegalChannel(Adapter, ChannelNum)) pHalData->bSwChnl = _TRUE; else return; } } if(bSetBandWidth) { if(pHalData->bChnlBWInitialized == _FALSE) { pHalData->bChnlBWInitialized = _TRUE; pHalData->bSetChnlBW = _TRUE; } else if((pHalData->CurrentChannelBW != ChnlWidth) || (pHalData->nCur40MhzPrimeSC != ChnlOffsetOf40MHz) || (pHalData->nCur80MhzPrimeSC != ChnlOffsetOf80MHz) || (pHalData->CurrentCenterFrequencyIndex1!= CenterFrequencyIndex1)) { pHalData->bSetChnlBW = _TRUE; } } if(!pHalData->bSetChnlBW && !pHalData->bSwChnl) { //DBG_871X("<= PHY_HandleSwChnlAndSetBW8812: bSwChnl %d, bSetChnlBW %d \n",pHalData->bSwChnl,pHalData->bSetChnlBW); return; } if(pHalData->bSwChnl) { pHalData->CurrentChannel=ChannelNum; pHalData->CurrentCenterFrequencyIndex1 = ChannelNum; } if(pHalData->bSetChnlBW) { pHalData->CurrentChannelBW = ChnlWidth; #if 0 if(ExtChnlOffsetOf40MHz==EXTCHNL_OFFSET_LOWER) pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; else if(ExtChnlOffsetOf40MHz==EXTCHNL_OFFSET_UPPER) pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; else pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; if(ExtChnlOffsetOf80MHz==EXTCHNL_OFFSET_LOWER) pHalData->nCur80MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; else if(ExtChnlOffsetOf80MHz==EXTCHNL_OFFSET_UPPER) pHalData->nCur80MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; else pHalData->nCur80MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; #else pHalData->nCur40MhzPrimeSC = ChnlOffsetOf40MHz; pHalData->nCur80MhzPrimeSC = ChnlOffsetOf80MHz; #endif pHalData->CurrentCenterFrequencyIndex1 = CenterFrequencyIndex1; } //Switch workitem or set timer to do switch channel or setbandwidth operation if((!pDefAdapter->bDriverStopped) && (!pDefAdapter->bSurpriseRemoved)) { phy_SwChnlAndSetBwMode8812(Adapter); } else { if(pHalData->bSwChnl) { pHalData->CurrentChannel = tmpChannel; pHalData->CurrentCenterFrequencyIndex1 = tmpChannel; } if(pHalData->bSetChnlBW) { pHalData->CurrentChannelBW = tmpBW; pHalData->nCur40MhzPrimeSC = tmpnCur40MhzPrimeSC; pHalData->nCur80MhzPrimeSC = tmpnCur80MhzPrimeSC; pHalData->CurrentCenterFrequencyIndex1 = tmpCenterFrequencyIndex1; } } //DBG_871X("Channel %d ChannelBW %d ",pHalData->CurrentChannel, pHalData->CurrentChannelBW); //DBG_871X("40MhzPrimeSC %d 80MhzPrimeSC %d ",pHalData->nCur40MhzPrimeSC, pHalData->nCur80MhzPrimeSC); //DBG_871X("CenterFrequencyIndex1 %d \n",pHalData->CurrentCenterFrequencyIndex1); //DBG_871X("<= PHY_HandleSwChnlAndSetBW8812: bSwChnl %d, bSetChnlBW %d \n",pHalData->bSwChnl,pHalData->bSetChnlBW); } VOID PHY_SetBWMode8812( IN PADAPTER Adapter, IN CHANNEL_WIDTH Bandwidth, // 20M or 40M IN u8 Offset // Upper, Lower, or Don't care ) { PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); //DBG_871X("%s()===>\n",__FUNCTION__); PHY_HandleSwChnlAndSetBW8812(Adapter, _FALSE, _TRUE, pHalData->CurrentChannel, Bandwidth, Offset, Offset, pHalData->CurrentChannel); //DBG_871X("<==%s()\n",__FUNCTION__); } VOID PHY_SwChnl8812( IN PADAPTER Adapter, IN u8 channel ) { //DBG_871X("%s()===>\n",__FUNCTION__); PHY_HandleSwChnlAndSetBW8812(Adapter, _TRUE, _FALSE, channel, 0, 0, 0, channel); //DBG_871X("<==%s()\n",__FUNCTION__); } VOID PHY_SetSwChnlBWMode8812( IN PADAPTER Adapter, IN u8 channel, IN CHANNEL_WIDTH Bandwidth, IN u8 Offset40, IN u8 Offset80 ) { //DBG_871X("%s()===>\n",__FUNCTION__); PHY_HandleSwChnlAndSetBW8812(Adapter, _TRUE, _TRUE, channel, Bandwidth, Offset40, Offset80, channel); //DBG_871X("<==%s()\n",__FUNCTION__); } rtl8812au-4.3.8.12175.20140902+dfsg/hal/rtl8812a/rtl8812a_rf6052.c000066400000000000000000000130441261122257400221670ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTL8812A_RF6052_C_ //#include #include /*----------------------------------------------------------------------------- * Function: PHY_RF6052SetBandwidth() * * Overview: This function is called by SetBWModeCallback8190Pci() only * * Input: PADAPTER Adapter * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M * * Output: NONE * * Return: NONE * * Note: For RF type 0222D *---------------------------------------------------------------------------*/ VOID PHY_RF6052SetBandwidth8812( IN PADAPTER Adapter, IN CHANNEL_WIDTH Bandwidth) //20M or 40M { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); switch(Bandwidth) { case CHANNEL_WIDTH_20: //DBG_871X("PHY_RF6052SetBandwidth8812(), set 20MHz\n"); PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW_Jaguar, BIT11|BIT10, 3); PHY_SetRFReg(Adapter, RF_PATH_B, RF_CHNLBW_Jaguar, BIT11|BIT10, 3); break; case CHANNEL_WIDTH_40: //DBG_871X("PHY_RF6052SetBandwidth8812(), set 40MHz\n"); PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW_Jaguar, BIT11|BIT10, 1); PHY_SetRFReg(Adapter, RF_PATH_B, RF_CHNLBW_Jaguar, BIT11|BIT10, 1); break; case CHANNEL_WIDTH_80: //DBG_871X("PHY_RF6052SetBandwidth8812(), set 80MHz\n"); PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW_Jaguar, BIT11|BIT10, 0); PHY_SetRFReg(Adapter, RF_PATH_B, RF_CHNLBW_Jaguar, BIT11|BIT10, 0); break; default: DBG_871X("PHY_RF6052SetBandwidth8812(): unknown Bandwidth: %#X\n",Bandwidth ); break; } } static int phy_RF6052_Config_ParaFile_8812( IN PADAPTER Adapter ) { u8 eRFPath; int rtStatus = _SUCCESS; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); static char sz8812RadioAFile[] = RTL8812_PHY_RADIO_A; static char sz8812RadioBFile[] = RTL8812_PHY_RADIO_B; static char sz8812TxPwrTrack[] = RTL8812_TXPWR_TRACK; static char sz8821RadioAFile[] = RTL8821_PHY_RADIO_A; static char sz8821RadioBFile[] = RTL8821_PHY_RADIO_B; static char sz8821TxPwrTrack[] = RTL8821_TXPWR_TRACK; char *pszRadioAFile = NULL, *pszRadioBFile = NULL, *pszTxPwrTrack = NULL; if(IS_HARDWARE_TYPE_8812(Adapter)) { pszRadioAFile = sz8812RadioAFile; pszRadioBFile = sz8812RadioBFile; pszTxPwrTrack = sz8812TxPwrTrack; } else { pszRadioAFile = sz8821RadioAFile; pszRadioBFile = sz8821RadioBFile; pszTxPwrTrack = sz8821TxPwrTrack; } //3//----------------------------------------------------------------- //3// <2> Initialize RF //3//----------------------------------------------------------------- //for(eRFPath = RF_PATH_A; eRFPath NumTotalRFPath; eRFPath++) for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) { /*----Initialize RF fom connfiguration file----*/ switch(eRFPath) { case RF_PATH_A: #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE if (PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, eRFPath) == _FAIL) #endif { #ifdef CONFIG_EMBEDDED_FWIMG if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,CONFIG_RF_RADIO, (ODM_RF_RADIO_PATH_E)eRFPath)) rtStatus = _FAIL; #endif } break; case RF_PATH_B: #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE if (PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, eRFPath) == _FAIL) #endif { #ifdef CONFIG_EMBEDDED_FWIMG if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,CONFIG_RF_RADIO, (ODM_RF_RADIO_PATH_E)eRFPath)) rtStatus = _FAIL; #endif } break; default: break; } if(rtStatus != _SUCCESS){ DBG_871X("%s():Radio[%d] Fail!!", __FUNCTION__, eRFPath); goto phy_RF6052_Config_ParaFile_Fail; } } //3 ----------------------------------------------------------------- //3 Configuration of Tx Power Tracking //3 ----------------------------------------------------------------- #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE if (PHY_ConfigRFWithTxPwrTrackParaFile(Adapter, pszTxPwrTrack) == _FAIL) #endif { #ifdef CONFIG_EMBEDDED_FWIMG ODM_ConfigRFWithTxPwrTrackHeaderFile(&pHalData->odmpriv); #endif } //RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile_8812()\n")); phy_RF6052_Config_ParaFile_Fail: return rtStatus; } int PHY_RF6052_Config_8812( IN PADAPTER Adapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); int rtStatus = _SUCCESS; // Initialize general global value if(pHalData->rf_type == RF_1T1R) pHalData->NumTotalRFPath = 1; else pHalData->NumTotalRFPath = 2; // // Config BB and RF // rtStatus = phy_RF6052_Config_ParaFile_8812(Adapter); return rtStatus; } /* End of HalRf6052.c */ rtl8812au-4.3.8.12175.20140902+dfsg/hal/rtl8812a/rtl8812a_rxdesc.c000066400000000000000000000252321261122257400225350ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTL8812A_RXDESC_C_ //#include #include static void process_rssi(_adapter *padapter,union recv_frame *prframe) { u32 last_rssi, tmp_val; struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS struct signal_stat * signal_stat = &padapter->recvpriv.signal_strength_data; #endif //CONFIG_NEW_SIGNAL_STAT_PROCESS //DBG_8192C("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->RecvSignalPower,pattrib->signal_strength); //if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon) { #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS if(signal_stat->update_req) { signal_stat->total_num = 0; signal_stat->total_val = 0; signal_stat->update_req = 0; } signal_stat->total_num++; signal_stat->total_val += pattrib->phy_info.SignalStrength; signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; #else //CONFIG_NEW_SIGNAL_STAT_PROCESS //Adapter->RxStats.RssiCalculateCnt++; //For antenna Test if(padapter->recvpriv.signal_strength_data.total_num++ >= PHY_RSSI_SLID_WIN_MAX) { padapter->recvpriv.signal_strength_data.total_num = PHY_RSSI_SLID_WIN_MAX; last_rssi = padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index]; padapter->recvpriv.signal_strength_data.total_val -= last_rssi; } padapter->recvpriv.signal_strength_data.total_val +=pattrib->phy_info.SignalStrength; padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index++] = pattrib->phy_info.SignalStrength; if(padapter->recvpriv.signal_strength_data.index >= PHY_RSSI_SLID_WIN_MAX) padapter->recvpriv.signal_strength_data.index = 0; tmp_val = padapter->recvpriv.signal_strength_data.total_val/padapter->recvpriv.signal_strength_data.total_num; if(padapter->recvpriv.is_signal_dbg) { padapter->recvpriv.signal_strength= padapter->recvpriv.signal_strength_dbg; padapter->recvpriv.rssi=(s8)translate_percentage_to_dbm(padapter->recvpriv.signal_strength_dbg); } else { padapter->recvpriv.signal_strength= tmp_val; padapter->recvpriv.rssi=(s8)translate_percentage_to_dbm(tmp_val); } RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("UI RSSI = %d, ui_rssi.TotalVal = %d, ui_rssi.TotalNum = %d\n", tmp_val, padapter->recvpriv.signal_strength_data.total_val,padapter->recvpriv.signal_strength_data.total_num)); #endif //CONFIG_NEW_SIGNAL_STAT_PROCESS } }// Process_UI_RSSI_8192C static void process_link_qual(_adapter *padapter,union recv_frame *prframe) { u32 last_evm=0, tmpVal; struct rx_pkt_attrib *pattrib; #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS struct signal_stat * signal_stat; #endif //CONFIG_NEW_SIGNAL_STAT_PROCESS if(prframe == NULL || padapter==NULL){ return; } pattrib = &prframe->u.hdr.attrib; #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS signal_stat = &padapter->recvpriv.signal_qual_data; #endif //CONFIG_NEW_SIGNAL_STAT_PROCESS //DBG_8192C("process_link_qual=> pattrib->signal_qual(%d)\n ",pattrib->signal_qual); #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS if(signal_stat->update_req) { signal_stat->total_num = 0; signal_stat->total_val = 0; signal_stat->update_req = 0; } signal_stat->total_num++; signal_stat->total_val += pattrib->phy_info.SignalQuality; signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; #else //CONFIG_NEW_SIGNAL_STAT_PROCESS if(pattrib->phy_info.SignalQuality != 0) { // // 1. Record the general EVM to the sliding window. // if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX) { padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX; last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index]; padapter->recvpriv.signal_qual_data.total_val -= last_evm; } padapter->recvpriv.signal_qual_data.total_val += pattrib->phy_info.SignalQuality; padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = pattrib->phy_info.SignalQuality; if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX) padapter->recvpriv.signal_qual_data.index = 0; RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Total SQ=%d pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, pattrib->phy_info.SignalQuality)); // <1> Showed on UI for user, in percentage. tmpVal = padapter->recvpriv.signal_qual_data.total_val/padapter->recvpriv.signal_qual_data.total_num; padapter->recvpriv.signal_qual=(u8)tmpVal; } else { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" pattrib->signal_qual =%d\n", pattrib->phy_info.SignalQuality)); } #endif //CONFIG_NEW_SIGNAL_STAT_PROCESS } static void process_phy_info(_adapter *padapter, void *prframe) { union recv_frame *precvframe = (union recv_frame *)prframe; // // Check RSSI // process_rssi(padapter, precvframe); // // Check PWDB. // //process_PWDB(padapter, precvframe); //UpdateRxSignalStatistics8192C(Adapter, pRfd); // // Check EVM // process_link_qual(padapter, precvframe); #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA rtw_store_phy_info( padapter,prframe); #endif } void rtl8812_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc) { struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; _rtw_memset(pattrib, 0, sizeof(struct rx_pkt_attrib)); //Offset 0 pattrib->pkt_len = (u16)GET_RX_STATUS_DESC_PKT_LEN_8812(pdesc);//(le32_to_cpu(pdesc->rxdw0)&0x00003fff) pattrib->crc_err = (u8)GET_RX_STATUS_DESC_CRC32_8812(pdesc);//((le32_to_cpu(pdesc->rxdw0) >> 14) & 0x1); pattrib->icv_err = (u8)GET_RX_STATUS_DESC_ICV_8812(pdesc);//((le32_to_cpu(pdesc->rxdw0) >> 15) & 0x1); pattrib->drvinfo_sz = (u8)GET_RX_STATUS_DESC_DRVINFO_SIZE_8812(pdesc) * 8;//((le32_to_cpu(pdesc->rxdw0) >> 16) & 0xf) * 8;//uint 2^3 = 8 bytes pattrib->encrypt = (u8)GET_RX_STATUS_DESC_SECURITY_8812(pdesc);//((le32_to_cpu(pdesc->rxdw0) >> 20) & 0x7); pattrib->qos = (u8)GET_RX_STATUS_DESC_QOS_8812(pdesc);//(( le32_to_cpu( pdesc->rxdw0 ) >> 23) & 0x1);// Qos data, wireless lan header length is 26 pattrib->shift_sz = (u8)GET_RX_STATUS_DESC_SHIFT_8812(pdesc);//((le32_to_cpu(pdesc->rxdw0) >> 24) & 0x3); pattrib->physt = (u8)GET_RX_STATUS_DESC_PHY_STATUS_8812(pdesc);//((le32_to_cpu(pdesc->rxdw0) >> 26) & 0x1); pattrib->bdecrypted = !GET_RX_STATUS_DESC_SWDEC_8812(pdesc);//(le32_to_cpu(pdesc->rxdw0) & BIT(27))? 0:1; //Offset 4 pattrib->priority = (u8)GET_RX_STATUS_DESC_TID_8812(pdesc);//((le32_to_cpu(pdesc->rxdw1) >> 8) & 0xf); pattrib->mdata = (u8)GET_RX_STATUS_DESC_MORE_DATA_8812(pdesc);//((le32_to_cpu(pdesc->rxdw1) >> 26) & 0x1); pattrib->mfrag = (u8)GET_RX_STATUS_DESC_MORE_FRAG_8812(pdesc);//((le32_to_cpu(pdesc->rxdw1) >> 27) & 0x1);//more fragment bit //Offset 8 pattrib->seq_num = (u16)GET_RX_STATUS_DESC_SEQ_8812(pdesc);//(le32_to_cpu(pdesc->rxdw2) & 0x00000fff); pattrib->frag_num = (u8)GET_RX_STATUS_DESC_FRAG_8812(pdesc);//((le32_to_cpu(pdesc->rxdw2) >> 12) & 0xf);//fragmentation number if (GET_RX_STATUS_DESC_RPT_SEL_8812(pdesc)) pattrib->pkt_rpt_type = C2H_PACKET; else pattrib->pkt_rpt_type = NORMAL_RX; //Offset 12 pattrib->data_rate=(u8)GET_RX_STATUS_DESC_RX_RATE_8812(pdesc);//((le32_to_cpu(pdesc->rxdw3))&0x7f); //Offset 16 //Offset 20 } /* * Notice: * Before calling this function, * precvframe->u.hdr.rx_data should be ready! */ void rtl8812_query_rx_phy_status( union recv_frame *precvframe, u8 *pphy_status) { PADAPTER padapter = precvframe->u.hdr.adapter; struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); PODM_PHY_INFO_T pPHYInfo = (PODM_PHY_INFO_T)(&pattrib->phy_info); u8 *wlanhdr; ODM_PACKET_INFO_T pkt_info; u8 *sa = NULL; struct sta_priv *pstapriv; struct sta_info *psta; //_irqL irqL; pkt_info.bPacketMatchBSSID =_FALSE; pkt_info.bPacketToSelf = _FALSE; pkt_info.bPacketBeacon = _FALSE; wlanhdr = get_recvframe_data(precvframe); pkt_info.bPacketMatchBSSID = ((!IsFrameTypeCtrl(wlanhdr)) && !pattrib->icv_err && !pattrib->crc_err && _rtw_memcmp(get_hdr_bssid(wlanhdr), get_bssid(&padapter->mlmepriv), ETH_ALEN)); pkt_info.bPacketToSelf = pkt_info.bPacketMatchBSSID && (_rtw_memcmp(get_ra(wlanhdr), myid(&padapter->eeprompriv), ETH_ALEN)); pkt_info.bPacketBeacon = pkt_info.bPacketMatchBSSID && (GetFrameSubType(wlanhdr) == WIFI_BEACON); /* if(pkt_info.bPacketBeacon){ if(check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE){ sa = padapter->mlmepriv.cur_network.network.MacAddress; #if 0 { DBG_8192C("==> rx beacon from AP[%02x:%02x:%02x:%02x:%02x:%02x]\n", sa[0],sa[1],sa[2],sa[3],sa[4],sa[5]); } #endif } else { //to do Ad-hoc sa = NULL; } } else{ sa = get_sa(wlanhdr); } */ sa = get_ta(wlanhdr); pstapriv = &padapter->stapriv; pkt_info.StationID = 0xFF; psta = rtw_get_stainfo(pstapriv, sa); if (psta) { pkt_info.StationID = psta->mac_id; //DBG_8192C("%s ==> StationID(%d)\n",__FUNCTION__,pkt_info.StationID); } pkt_info.DataRate = pattrib->data_rate; //rtl8188e_query_rx_phy_status(precvframe, pphy_status); //_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL); ODM_PhyStatusQuery(&pHalData->odmpriv,pPHYInfo,pphy_status,&(pkt_info)); if(psta) psta->rssi = pattrib->phy_info.RecvSignalPower; //_exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL); precvframe->u.hdr.psta = NULL; if (pkt_info.bPacketMatchBSSID && (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)) { if (psta) { precvframe->u.hdr.psta = psta; process_phy_info(padapter, precvframe); } } else if (pkt_info.bPacketToSelf || pkt_info.bPacketBeacon) { if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) { if (psta) { precvframe->u.hdr.psta = psta; } } process_phy_info(padapter, precvframe); } } rtl8812au-4.3.8.12175.20140902+dfsg/hal/rtl8812a/rtl8812a_sreset.c000066400000000000000000000074541261122257400225600ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTL8812A_SRESET_C_ //#include #include #ifdef DBG_CONFIG_ERROR_DETECT void rtl8812_sreset_xmit_status_check(_adapter *padapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct sreset_priv *psrtpriv = &pHalData->srestpriv; unsigned long current_time; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; unsigned int diff_time; u32 txdma_status; if( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){ DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status); rtw_hal_sreset_reset(padapter); } #ifdef CONFIG_USB_HCI //total xmit irp = 4 //DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt); //if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1) current_time = rtw_get_current_time(); if (0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) { diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time); if (diff_time > 2000) { if (psrtpriv->last_tx_complete_time == 0) { psrtpriv->last_tx_complete_time = current_time; } else{ diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time); if (diff_time > 4000) { u32 ability; //padapter->Wifi_Error_Status = WIFI_TX_HANG; rtw_hal_get_hwreg(padapter, HW_VAR_DM_FLAG, (u8*)&ability); DBG_871X("%s tx hang %s\n", __FUNCTION__, (ability & ODM_BB_ADAPTIVITY)? "ODM_BB_ADAPTIVITY" : ""); if (!(ability & ODM_BB_ADAPTIVITY)) rtw_hal_sreset_reset(padapter); } } } } #endif //CONFIG_USB_HCI if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) { psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; rtw_hal_sreset_reset(padapter); return; } } void rtl8812_sreset_linked_status_check(_adapter *padapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct sreset_priv *psrtpriv = &pHalData->srestpriv; u32 rx_dma_status = 0; rx_dma_status = rtw_read32(padapter,REG_RXDMA_STATUS); if(rx_dma_status!= 0x00){ DBG_8192C("%s REG_RXDMA_STATUS:0x%08x\n",__FUNCTION__,rx_dma_status); } #if 0 u32 regc50,regc58,reg824,reg800; regc50 = rtw_read32(padapter,0xc50); regc58 = rtw_read32(padapter,0xc58); reg824 = rtw_read32(padapter,0x824); reg800 = rtw_read32(padapter,0x800); if( ((regc50&0xFFFFFF00)!= 0x69543400)|| ((regc58&0xFFFFFF00)!= 0x69543400)|| (((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))|| ( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000))) { DBG_8192C("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__, regc50, regc58, reg824, reg800); rtw_hal_sreset_reset(padapter); } #endif if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) { psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; rtw_hal_sreset_reset(padapter); return; } } #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/rtl8812a/rtl8812a_xmit.c000066400000000000000000000352141261122257400222270ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTL8812A_XMIT_C_ //#include #include void _dbg_dump_tx_info(_adapter *padapter,int frame_tag, u8 *ptxdesc) { u8 bDumpTxPkt; u8 bDumpTxDesc = _FALSE; rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DUMP_TXPKT, &(bDumpTxPkt)); if(bDumpTxPkt ==1){//dump txdesc for data frame DBG_871X("dump tx_desc for data frame\n"); if((frame_tag&0x0f) == DATA_FRAMETAG){ bDumpTxDesc = _TRUE; } } else if(bDumpTxPkt ==2){//dump txdesc for mgnt frame DBG_871X("dump tx_desc for mgnt frame\n"); if((frame_tag&0x0f) == MGNT_FRAMETAG){ bDumpTxDesc = _TRUE; } } else if(bDumpTxPkt ==3){//dump early info } if(bDumpTxDesc){ // ptxdesc->txdw4 = cpu_to_le32(0x00001006);//RTS Rate=24M // ptxdesc->txdw6 = 0x6666f800; DBG_8192C("=====================================\n"); DBG_8192C("Offset00(0x%08x)\n",*((u32 *)(ptxdesc))); DBG_8192C("Offset04(0x%08x)\n",*((u32 *)(ptxdesc+4))); DBG_8192C("Offset08(0x%08x)\n",*((u32 *)(ptxdesc+8))); DBG_8192C("Offset12(0x%08x)\n",*((u32 *)(ptxdesc+12))); DBG_8192C("Offset16(0x%08x)\n",*((u32 *)(ptxdesc+16))); DBG_8192C("Offset20(0x%08x)\n",*((u32 *)(ptxdesc+20))); DBG_8192C("Offset24(0x%08x)\n",*((u32 *)(ptxdesc+24))); DBG_8192C("Offset28(0x%08x)\n",*((u32 *)(ptxdesc+28))); DBG_8192C("Offset32(0x%08x)\n",*((u32 *)(ptxdesc+32))); DBG_8192C("Offset36(0x%08x)\n",*((u32 *)(ptxdesc+36))); DBG_8192C("=====================================\n"); } } /* * Description: * Aggregation packets and send to hardware * * Return: * 0 Success * -1 Hardware resource(TX FIFO) not ready * -2 Software resource(xmitbuf) not ready */ #ifdef CONFIG_TX_EARLY_MODE //#define DBG_EMINFO #if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 #define EARLY_MODE_MAX_PKT_NUM 10 #else #define EARLY_MODE_MAX_PKT_NUM 5 #endif struct EMInfo{ u8 EMPktNum; u16 EMPktLen[EARLY_MODE_MAX_PKT_NUM]; }; void InsertEMContent_8812( struct EMInfo *pEMInfo, IN pu1Byte VirtualAddress) { #if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 u1Byte index=0; u4Byte dwtmp=0; #endif _rtw_memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE); if(pEMInfo->EMPktNum==0) return; #ifdef DBG_EMINFO { int i; DBG_8192C("\n%s ==> pEMInfo->EMPktNum =%d\n",__FUNCTION__,pEMInfo->EMPktNum); for(i=0;i< EARLY_MODE_MAX_PKT_NUM;i++){ DBG_8192C("%s ==> pEMInfo->EMPktLen[%d] =%d\n",__FUNCTION__,i,pEMInfo->EMPktLen[i]); } } #endif #if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum); if(pEMInfo->EMPktNum == 1){ dwtmp = pEMInfo->EMPktLen[0]; }else{ dwtmp = pEMInfo->EMPktLen[0]; dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; dwtmp += pEMInfo->EMPktLen[1]; } SET_EARLYMODE_LEN0(VirtualAddress, dwtmp); if(pEMInfo->EMPktNum <= 3){ dwtmp = pEMInfo->EMPktLen[2]; }else{ dwtmp = pEMInfo->EMPktLen[2]; dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; dwtmp += pEMInfo->EMPktLen[3]; } SET_EARLYMODE_LEN1(VirtualAddress, dwtmp); if(pEMInfo->EMPktNum <= 5){ dwtmp = pEMInfo->EMPktLen[4]; }else{ dwtmp = pEMInfo->EMPktLen[4]; dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; dwtmp += pEMInfo->EMPktLen[5]; } SET_EARLYMODE_LEN2_1(VirtualAddress, dwtmp&0xF); SET_EARLYMODE_LEN2_2(VirtualAddress, dwtmp>>4); if(pEMInfo->EMPktNum <= 7){ dwtmp = pEMInfo->EMPktLen[6]; }else{ dwtmp = pEMInfo->EMPktLen[6]; dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; dwtmp += pEMInfo->EMPktLen[7]; } SET_EARLYMODE_LEN3(VirtualAddress, dwtmp); if(pEMInfo->EMPktNum <= 9){ dwtmp = pEMInfo->EMPktLen[8]; }else{ dwtmp = pEMInfo->EMPktLen[8]; dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; dwtmp += pEMInfo->EMPktLen[9]; } SET_EARLYMODE_LEN4(VirtualAddress, dwtmp); #else SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum); SET_EARLYMODE_LEN0(VirtualAddress, pEMInfo->EMPktLen[0]); SET_EARLYMODE_LEN1(VirtualAddress, pEMInfo->EMPktLen[1]); SET_EARLYMODE_LEN2_1(VirtualAddress, pEMInfo->EMPktLen[2]&0xF); SET_EARLYMODE_LEN2_2(VirtualAddress, pEMInfo->EMPktLen[2]>>4); SET_EARLYMODE_LEN3(VirtualAddress, pEMInfo->EMPktLen[3]); SET_EARLYMODE_LEN4(VirtualAddress, pEMInfo->EMPktLen[4]); #endif //RT_PRINT_DATA(COMP_SEND, DBG_LOUD, "EMHdr:", VirtualAddress, 8); } void UpdateEarlyModeInfo8812(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ) { //_adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq *ptxservq int index,j; u16 offset,pktlen; PTXDESC_8812 ptxdesc; u8 *pmem,*pEMInfo_mem; s8 node_num_0=0,node_num_1=0; struct EMInfo eminfo; struct agg_pkt_info *paggpkt; struct xmit_frame *pframe = (struct xmit_frame*)pxmitbuf->priv_data; pmem= pframe->buf_addr; #ifdef DBG_EMINFO DBG_8192C("\n%s ==> agg_num:%d\n",__FUNCTION__, pframe->agg_num); for(index=0;indexagg_num;index++){ offset = pxmitpriv->agg_pkt[index].offset; pktlen = pxmitpriv->agg_pkt[index].pkt_len; DBG_8192C("%s ==> agg_pkt[%d].offset=%d\n",__FUNCTION__,index,offset); DBG_8192C("%s ==> agg_pkt[%d].pkt_len=%d\n",__FUNCTION__,index,pktlen); } #endif if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM) { node_num_0 = pframe->agg_num; node_num_1= EARLY_MODE_MAX_PKT_NUM-1; } for(index=0;indexagg_num;index++){ offset = pxmitpriv->agg_pkt[index].offset; pktlen = pxmitpriv->agg_pkt[index].pkt_len; _rtw_memset(&eminfo,0,sizeof(struct EMInfo)); if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM){ if(node_num_0 > EARLY_MODE_MAX_PKT_NUM){ eminfo.EMPktNum = EARLY_MODE_MAX_PKT_NUM; node_num_0--; } else{ eminfo.EMPktNum = node_num_1; node_num_1--; } } else{ eminfo.EMPktNum = pframe->agg_num-(index+1); } for(j=0;j< eminfo.EMPktNum ;j++){ eminfo.EMPktLen[j] = pxmitpriv->agg_pkt[index+1+j].pkt_len+4;// 4 bytes CRC } if(pmem){ if(index==0){ ptxdesc = (PTXDESC_8812)(pmem); pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE; } else{ pmem = pmem + pxmitpriv->agg_pkt[index-1].offset; ptxdesc = (PTXDESC_8812)(pmem); pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE; } #ifdef DBG_EMINFO DBG_8192C("%s ==> desc.pkt_len=%d\n",__FUNCTION__,ptxdesc->pktlen); #endif InsertEMContent_8812(&eminfo,pEMInfo_mem); } } _rtw_memset(pxmitpriv->agg_pkt,0,sizeof(struct agg_pkt_info)*MAX_AGG_PKT_NUM); } #endif void rtl8812a_cal_txdesc_chksum(u8 *ptxdesc) { u16 *usPtr; u32 count; u32 index; u16 checksum = 0; usPtr = (u16*)ptxdesc; // checksume is always calculated by first 32 bytes, // and it doesn't depend on TX DESC length. // Thomas,Lucas@SD4,20130515 count = 16; // Clear first SET_TX_DESC_TX_DESC_CHECKSUM_8812(ptxdesc, 0); for(index = 0 ; index < count ; index++){ checksum = checksum ^ le16_to_cpu(*(usPtr + index)); } SET_TX_DESC_TX_DESC_CHECKSUM_8812(ptxdesc, checksum); } // // Description: In normal chip, we should send some packet to Hw which will be used by Fw // in FW LPS mode. The function is to fill the Tx descriptor of this packets, then // Fw can tell Hw to send these packet derectly. // void rtl8812a_fill_fake_txdesc( PADAPTER padapter, u8* pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; // Clear all status _rtw_memset(pDesc, 0, TXDESC_SIZE); SET_TX_DESC_FIRST_SEG_8812(pDesc, 1); SET_TX_DESC_LAST_SEG_8812(pDesc, 1); SET_TX_DESC_OFFSET_8812(pDesc, TXDESC_SIZE); SET_TX_DESC_PKT_SIZE_8812(pDesc, BufferLen); SET_TX_DESC_QUEUE_SEL_8812(pDesc, QSLT_MGNT); if (pmlmeext->cur_wireless_mode & WIRELESS_11B) { SET_TX_DESC_RATE_ID_8812(pDesc, RATEID_IDX_B); } else { SET_TX_DESC_RATE_ID_8812(pDesc, RATEID_IDX_G); } //Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. if (IsPsPoll) { SET_TX_DESC_NAV_USE_HDR_8812(pDesc, 1); } else { SET_TX_DESC_HWSEQ_EN_8812(pDesc, 1); // Hw set sequence number } if(IsBTQosNull) { SET_TX_DESC_BT_INT_8812(pDesc, 1); } SET_TX_DESC_USE_RATE_8812(pDesc, 1); SET_TX_DESC_OWN_8812(pDesc, 1); // // Encrypt the data frame if under security mode excepct null data. Suggested by CCW. // if (_TRUE ==bDataFrame) { u32 EncAlg; EncAlg = padapter->securitypriv.dot11PrivacyAlgrthm; switch (EncAlg) { case _NO_PRIVACY_: SET_TX_DESC_SEC_TYPE_8812(pDesc, 0x0); break; case _WEP40_: case _WEP104_: case _TKIP_: SET_TX_DESC_SEC_TYPE_8812(pDesc, 0x1); break; case _SMS4_: SET_TX_DESC_SEC_TYPE_8812(pDesc, 0x2); break; case _AES_: SET_TX_DESC_SEC_TYPE_8812(pDesc, 0x3); break; default: SET_TX_DESC_SEC_TYPE_8812(pDesc, 0x0); break; } } SET_TX_DESC_TX_RATE_8812(pDesc, MRateToHwRate(pmlmeext->tx_rate)); #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) // USB interface drop packet if the checksum of descriptor isn't correct. // Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). rtl8812a_cal_txdesc_chksum(pDesc); #endif } void rtl8812a_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc) { if ((pattrib->encrypt > 0) && !pattrib->bswenc) { switch (pattrib->encrypt) { //SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES case _WEP40_: case _WEP104_: case _TKIP_: case _TKIP_WTMIC_: SET_TX_DESC_SEC_TYPE_8812(ptxdesc, 0x1); break; #ifdef CONFIG_WAPI_SUPPORT case _SMS4_: SET_TX_DESC_SEC_TYPE_8812(ptxdesc, 0x2); break; #endif case _AES_: SET_TX_DESC_SEC_TYPE_8812(ptxdesc, 0x3); break; case _NO_PRIVACY_: default: SET_TX_DESC_SEC_TYPE_8812(ptxdesc, 0x0); break; } } } void rtl8812a_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); //DBG_8192C("vcs_mode=%d\n", pattrib->vcs_mode); if (pattrib->vcs_mode) { switch(pattrib->vcs_mode) { case RTS_CTS: SET_TX_DESC_RTS_ENABLE_8812(ptxdesc, 1); break; case CTS_TO_SELF: SET_TX_DESC_CTS2SELF_8812(ptxdesc, 1); break; case NONE_VCS: default: break; } if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT) SET_TX_DESC_RTS_SHORT_8812(ptxdesc, 1); SET_TX_DESC_RTS_RATE_8812(ptxdesc, 0x8);//RTS Rate=24M SET_TX_DESC_RTS_RATE_FB_LIMIT_8812(ptxdesc, 0xf); //Enable HW RTS if(IS_HARDWARE_TYPE_8821(padapter)) SET_TX_DESC_HW_RTS_ENABLE_8812(ptxdesc, 1); } } void rtl8812a_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc) { //DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset); if(pattrib->ht_en) { // Set Bandwidth and sub-channel settings. SET_TX_DESC_DATA_BW_8812(ptxdesc, BWMapping_8812(padapter,pattrib)); SET_TX_DESC_DATA_SC_8812(ptxdesc, SCMapping_8812(padapter,pattrib)); } } u8 BWMapping_8812( IN PADAPTER Adapter, IN struct pkt_attrib *pattrib ) { u8 BWSettingOfDesc = 0; PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); //DBG_871X("BWMapping pHalData->CurrentChannelBW %d, pattrib->bwmode %d \n",pHalData->CurrentChannelBW,pattrib->bwmode); if(pHalData->CurrentChannelBW== CHANNEL_WIDTH_80) { if(pattrib->bwmode == CHANNEL_WIDTH_80) BWSettingOfDesc= 2; else if(pattrib->bwmode == CHANNEL_WIDTH_40) BWSettingOfDesc = 1; else BWSettingOfDesc = 0; } else if(pHalData->CurrentChannelBW== CHANNEL_WIDTH_40) { if((pattrib->bwmode == CHANNEL_WIDTH_40) || (pattrib->bwmode == CHANNEL_WIDTH_80)) BWSettingOfDesc = 1; else BWSettingOfDesc = 0; } else BWSettingOfDesc = 0; return BWSettingOfDesc; } u8 SCMapping_8812( IN PADAPTER Adapter, IN struct pkt_attrib *pattrib ) { u8 SCSettingOfDesc = 0; PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); //DBG_871X("SCMapping: pHalData->CurrentChannelBW %d, pHalData->nCur80MhzPrimeSC %d, pHalData->nCur40MhzPrimeSC %d \n",pHalData->CurrentChannelBW,pHalData->nCur80MhzPrimeSC,pHalData->nCur40MhzPrimeSC); if(pHalData->CurrentChannelBW == CHANNEL_WIDTH_80) { if(pattrib->bwmode == CHANNEL_WIDTH_80) { SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE; } else if(pattrib->bwmode == CHANNEL_WIDTH_40) { if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) SCSettingOfDesc = VHT_DATA_SC_40_LOWER_OF_80MHZ; else if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) SCSettingOfDesc = VHT_DATA_SC_40_UPPER_OF_80MHZ; else DBG_871X("SCMapping: Not Correct Primary40MHz Setting \n"); } else { if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)) SCSettingOfDesc = VHT_DATA_SC_20_LOWEST_OF_80MHZ; else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)) SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ; else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)) SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ; else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)) SCSettingOfDesc = VHT_DATA_SC_20_UPPERST_OF_80MHZ; else DBG_871X("SCMapping: Not Correct Primary40MHz Setting \n"); } } else if(pHalData->CurrentChannelBW== CHANNEL_WIDTH_40) { //DBG_871X("SCMapping: HT Case: pHalData->CurrentChannelBW %d, pHalData->nCur40MhzPrimeSC %d \n",pHalData->CurrentChannelBW,pHalData->nCur40MhzPrimeSC); if(pattrib->bwmode == CHANNEL_WIDTH_40) { SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE; } else if(pattrib->bwmode == CHANNEL_WIDTH_20) { if(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) { SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ; } else if(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) { SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ; } else { SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE; } } } else { SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE; } return SCSettingOfDesc; } rtl8812au-4.3.8.12175.20140902+dfsg/hal/rtl8812a/usb/000077500000000000000000000000001261122257400203215ustar00rootroot00000000000000rtl8812au-4.3.8.12175.20140902+dfsg/hal/rtl8812a/usb/rtl8812au_led.c000066400000000000000000000276451261122257400230010ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTL8812AU_LED_C_ //#include #include //================================================================================ // LED object. //================================================================================ //================================================================================ // Prototype of protected function. //================================================================================ //================================================================================ // LED_819xUsb routines. //================================================================================ // // Description: // Turn on LED according to LedPin specified. // static void SwLedOn_8812AU( PADAPTER padapter, PLED_USB pLed ) { u8 LedCfg; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) { return; } if( RT_GetInterfaceSelection(padapter) == INTF_SEL2_MINICARD || RT_GetInterfaceSelection(padapter) == INTF_SEL3_USB_Solo || RT_GetInterfaceSelection(padapter) == INTF_SEL4_USB_Combo) { LedCfg = rtw_read8(padapter, REG_LEDCFG2); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("In SwLedON,LedAddr:%X LEDPIN=%d\n",REG_LEDCFG2, pLed->LedPin)); switch(pLed->LedPin) { case LED_PIN_GPIO0: break; case LED_PIN_LED0: RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("In SwLedOn,LedAddr:%X LEDPIN=%d\n",REG_LEDCFG2, pLed->LedPin)); LedCfg = rtw_read8(padapter, REG_LEDCFG2); rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); // SW control led0 on. break; case LED_PIN_LED1: rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x0f)|BIT5); // SW control led1 on. break; default: break; } } else { switch(pLed->LedPin) { case LED_PIN_GPIO0: break; case LED_PIN_LED0: if(pHalData->AntDivCfg==0) { LedCfg = rtw_read8(padapter, REG_LEDCFG0); rtw_write8(padapter, REG_LEDCFG0, (LedCfg&0x70)|BIT5); // SW control led0 on. RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedOn LED0 0x%x\n", rtw_read32(padapter, REG_LEDCFG0))); } else { LedCfg = rtw_read8(padapter, REG_LEDCFG2) & 0xe0; rtw_write8(padapter, REG_LEDCFG2, LedCfg|BIT7|BIT6|BIT5); // SW control led0 on. RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedOn LED0 Addr 0x%x, 0x%x\n", REG_LEDCFG2, rtw_read32(padapter, REG_LEDCFG2))); } break; case LED_PIN_LED1: LedCfg = rtw_read8(padapter, (REG_LEDCFG1)); rtw_write8(padapter, (REG_LEDCFG1), (LedCfg&0x70)|BIT5); // SW control led1 on. RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedOn LED1 0x%x\n", rtw_read32(padapter, REG_LEDCFG1))); break; case LED_PIN_LED2: LedCfg = rtw_read8(padapter, (REG_LEDCFG2)); rtw_write8(padapter, (REG_LEDCFG2), (LedCfg&0x70)|BIT5); // SW control led1 on. RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedOn LED2 0x%x\n", rtw_read32(padapter, REG_LEDCFG2))); break; default: break; } } pLed->bLedOn = _TRUE; } // // Description: // Turn off LED according to LedPin specified. // static void SwLedOff_8812AU( PADAPTER padapter, PLED_USB pLed ) { u8 LedCfg; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); if(padapter->bSurpriseRemoved == _TRUE) { return; } if( RT_GetInterfaceSelection(padapter) == INTF_SEL2_MINICARD || RT_GetInterfaceSelection(padapter) == INTF_SEL3_USB_Solo || RT_GetInterfaceSelection(padapter) == INTF_SEL4_USB_Combo) { RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("In SwLedOff,LedAddr:%X LEDPIN=%d\n",REG_LEDCFG2, pLed->LedPin)); LedCfg = rtw_read8(padapter, REG_LEDCFG2); // 2009/10/23 MH Issau eed to move the LED GPIO from bit 0 to bit3. // 2009/10/26 MH Issau if tyhe device is 8c DID is 0x8176, we need to enable bit6 to // enable GPIO8 for controlling LED. // 2010/07/02 Supprt Open-drain arrangement for controlling the LED. Added by Roger. // switch(pLed->LedPin) { case LED_PIN_GPIO0: break; case LED_PIN_LED0: if(pHalData->bLedOpenDrain == _TRUE) { LedCfg &= 0x90; // Set to software control. rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3)); LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG); LedCfg &= 0xFE; rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg); } else { rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6)); } break; case LED_PIN_LED1: LedCfg &= 0x0f; // Set to software control. rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3)); break; default: break; } } else { switch(pLed->LedPin) { case LED_PIN_GPIO0: break; case LED_PIN_LED0: if(pHalData->AntDivCfg==0) { LedCfg = rtw_read8(padapter, REG_LEDCFG0); LedCfg &= 0x70; // Set to software control. rtw_write8(padapter, REG_LEDCFG0, (LedCfg|BIT3|BIT5)); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedOff LED0 0x%x\n", rtw_read32(padapter, REG_LEDCFG0))); } else { LedCfg = rtw_read8(padapter, REG_LEDCFG2); LedCfg &= 0xe0; // Set to software control. if(IS_HARDWARE_TYPE_8723A(padapter)) rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT7|BIT5)); else rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT7|BIT6|BIT5)); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedOff LED0 0x%x\n", rtw_read32(padapter, REG_LEDCFG2))); } break; case LED_PIN_LED1: LedCfg = rtw_read8(padapter, REG_LEDCFG1); LedCfg &= 0x70; // Set to software control. rtw_write8(padapter, REG_LEDCFG1, (LedCfg|BIT3|BIT5)); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedOff LED1 0x%x\n", rtw_read32(padapter, REG_LEDCFG1))); break; case LED_PIN_LED2: LedCfg = rtw_read8(padapter, REG_LEDCFG2); LedCfg &= 0x70; // Set to software control. rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5)); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedOff LED1 0x%x\n", rtw_read32(padapter, REG_LEDCFG2))); break; default: break; } } pLed->bLedOn = _FALSE; } // // Description: // Turn on LED according to LedPin specified. // static void SwLedOn_8821AU( PADAPTER Adapter, PLED_USB pLed ) { u8 LedCfg; if( (Adapter->bSurpriseRemoved == _TRUE) || ( Adapter->bDriverStopped == _TRUE)) { return; } if( RT_GetInterfaceSelection(Adapter) == INTF_SEL2_MINICARD || RT_GetInterfaceSelection(Adapter) == INTF_SEL3_USB_Solo || RT_GetInterfaceSelection(Adapter) == INTF_SEL4_USB_Combo) { LedCfg = rtw_read8(Adapter, REG_LEDCFG2); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("In SwLedON,LedAddr:%X LEDPIN=%d\n",REG_LEDCFG2, pLed->LedPin)); switch(pLed->LedPin) { case LED_PIN_GPIO0: break; case LED_PIN_LED0: RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("In SwLedOn,LedAddr:%X LEDPIN=%d\n",REG_LEDCFG2, pLed->LedPin)); LedCfg = rtw_read8(Adapter, REG_LEDCFG2); rtw_write8(Adapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); // SW control led0 on. break; case LED_PIN_LED1: rtw_write8(Adapter, REG_LEDCFG2, (LedCfg&0x0f)|BIT5); // SW control led1 on. break; default: break; } } else { switch(pLed->LedPin) { case LED_PIN_GPIO0: break; case LED_PIN_LED0: case LED_PIN_LED1: case LED_PIN_LED2: if(IS_HARDWARE_TYPE_8821U(Adapter)) { LedCfg = rtw_read8(Adapter, REG_LEDCFG2) & 0x20; rtw_write8(Adapter, REG_LEDCFG2, (LedCfg & ~(BIT3))|BIT5); // SW control led0 on. RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("8821 SwLedOn LED2 0x%x\n", rtw_read32(Adapter, REG_LEDCFG0))); //DBG_871X("8821 SwLedOn LED2 0x%x\n", rtw_read32(Adapter, REG_LEDCFG0)); } break; default: break; } } pLed->bLedOn = _TRUE; } // // Description: // Turn off LED according to LedPin specified. // static void SwLedOff_8821AU( PADAPTER Adapter, PLED_USB pLed ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u8 LedCfg; if(Adapter->bSurpriseRemoved == _TRUE) { return; } if( RT_GetInterfaceSelection(Adapter) == INTF_SEL2_MINICARD || RT_GetInterfaceSelection(Adapter) == INTF_SEL3_USB_Solo || RT_GetInterfaceSelection(Adapter) == INTF_SEL4_USB_Combo) { RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("In SwLedOff,LedAddr:%X LEDPIN=%d\n",REG_LEDCFG2, pLed->LedPin)); LedCfg = rtw_read8(Adapter, REG_LEDCFG2); // 2009/10/23 MH Issau eed to move the LED GPIO from bit 0 to bit3. // 2009/10/26 MH Issau if tyhe device is 8c DID is 0x8176, we need to enable bit6 to // enable GPIO8 for controlling LED. // 2010/07/02 Supprt Open-drain arrangement for controlling the LED. Added by Roger. // switch(pLed->LedPin) { case LED_PIN_GPIO0: break; case LED_PIN_LED0: if(pHalData->bLedOpenDrain == _TRUE) { LedCfg &= 0x90; // Set to software control. rtw_write8(Adapter, REG_LEDCFG2, (LedCfg|BIT3)); LedCfg = rtw_read8(Adapter, REG_MAC_PINMUX_CFG); LedCfg &= 0xFE; rtw_write8(Adapter, REG_MAC_PINMUX_CFG, LedCfg); } else { rtw_write8(Adapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6)); } break; case LED_PIN_LED1: LedCfg &= 0x0f; // Set to software control. rtw_write8(Adapter, REG_LEDCFG2, (LedCfg|BIT3)); break; default: break; } } else { switch(pLed->LedPin) { case LED_PIN_GPIO0: break; case LED_PIN_LED0: case LED_PIN_LED1: case LED_PIN_LED2: if(IS_HARDWARE_TYPE_8821U(Adapter)) { LedCfg = rtw_read8(Adapter, REG_LEDCFG2); LedCfg &= 0x20; // Set to software control. rtw_write8(Adapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5)); //DBG_871X("8821 SwLedOn LED2 0x%x\n", rtw_read32(Adapter, REG_LEDCFG0)); RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("8821 SwLedOff LED2 0x%x\n", rtw_read32(Adapter, REG_LEDCFG0))); } break; default: break; } } pLed->bLedOn = _FALSE; } //================================================================================ // Interface to manipulate LED objects. //================================================================================ //================================================================================ // Default LED behavior. //================================================================================ // // Description: // Initialize all LED_871x objects. // void rtl8812au_InitSwLeds( _adapter *padapter ) { struct led_priv *pledpriv = &(padapter->ledpriv); pledpriv->LedControlHandler = LedControlUSB; if(IS_HARDWARE_TYPE_8812(padapter)) { pledpriv->SwLedOn = SwLedOn_8812AU; pledpriv->SwLedOff = SwLedOff_8812AU; } else { pledpriv->SwLedOn = SwLedOn_8821AU; pledpriv->SwLedOff = SwLedOff_8821AU; } InitLed(padapter, &(pledpriv->SwLed0), LED_PIN_LED0); InitLed(padapter, &(pledpriv->SwLed1), LED_PIN_LED1); InitLed(padapter, &(pledpriv->SwLed2), LED_PIN_LED2); } // // Description: // DeInitialize all LED_819xUsb objects. // void rtl8812au_DeInitSwLeds( _adapter *padapter ) { struct led_priv *ledpriv = &(padapter->ledpriv); DeInitLed( &(ledpriv->SwLed0) ); DeInitLed( &(ledpriv->SwLed1) ); DeInitLed( &(ledpriv->SwLed2) ); } rtl8812au-4.3.8.12175.20140902+dfsg/hal/rtl8812a/usb/rtl8812au_recv.c000066400000000000000000000125211261122257400231570ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTL8812AU_RECV_C_ //#include #include int rtl8812au_init_recv_priv(_adapter *padapter) { struct recv_priv *precvpriv = &padapter->recvpriv; int i, res = _SUCCESS; struct recv_buf *precvbuf; #ifdef CONFIG_RECV_THREAD_MODE _rtw_init_sema(&precvpriv->recv_sema, 0);//will be removed _rtw_init_sema(&precvpriv->terminate_recvthread_sema, 0);//will be removed #endif #ifdef PLATFORM_LINUX tasklet_init(&precvpriv->recv_tasklet, (void(*)(unsigned long))usb_recv_tasklet, (unsigned long)padapter); #endif #ifdef CONFIG_USB_INTERRUPT_IN_PIPE #ifdef PLATFORM_LINUX precvpriv->int_in_urb = usb_alloc_urb(0, GFP_KERNEL); if(precvpriv->int_in_urb == NULL){ res= _FAIL; DBG_8192C("alloc_urb for interrupt in endpoint fail !!!!\n"); goto exit; } #endif precvpriv->int_in_buf = rtw_zmalloc(INTERRUPT_MSG_FORMAT_LEN); if(precvpriv->int_in_buf == NULL){ res= _FAIL; DBG_8192C("alloc_mem for interrupt in endpoint fail !!!!\n"); goto exit; } #endif //init recv_buf _rtw_init_queue(&precvpriv->free_recv_buf_queue); _rtw_init_queue(&precvpriv->recv_buf_pending_queue); precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF *sizeof(struct recv_buf) + 4); if(precvpriv->pallocated_recv_buf==NULL){ res= _FAIL; RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("alloc recv_buf fail!\n")); goto exit; } _rtw_memset(precvpriv->pallocated_recv_buf, 0, NR_RECVBUFF *sizeof(struct recv_buf) + 4); precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_recv_buf), 4); //precvpriv->precv_buf = precvpriv->pallocated_recv_buf + 4 - // ((uint) (precvpriv->pallocated_recv_buf) &(4-1)); precvbuf = (struct recv_buf*)precvpriv->precv_buf; for(i=0; i < NR_RECVBUFF ; i++) { _rtw_init_listhead(&precvbuf->list); _rtw_spinlock_init(&precvbuf->recvbuf_lock); precvbuf->alloc_sz = MAX_RECVBUF_SZ; res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf); if(res==_FAIL) break; precvbuf->ref_cnt = 0; precvbuf->adapter =padapter; //rtw_list_insert_tail(&precvbuf->list, &(precvpriv->free_recv_buf_queue.queue)); precvbuf++; } precvpriv->free_recv_buf_queue_cnt = NR_RECVBUFF; #ifdef PLATFORM_LINUX skb_queue_head_init(&precvpriv->rx_skb_queue); #ifdef CONFIG_PREALLOC_RECV_SKB { int i; SIZE_PTR tmpaddr=0; SIZE_PTR alignment=0; struct sk_buff *pskb=NULL; skb_queue_head_init(&precvpriv->free_recv_skb_queue); for(i=0; idev = padapter->pnetdev; #ifndef CONFIG_PREALLOC_RX_SKB_BUFFER tmpaddr = (SIZE_PTR)pskb->data; alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment)); #endif //! skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb); } pskb=NULL; } } #endif #endif exit: return res; } void rtl8812au_free_recv_priv (_adapter *padapter) { int i; struct recv_buf *precvbuf; struct recv_priv *precvpriv = &padapter->recvpriv; precvbuf = (struct recv_buf *)precvpriv->precv_buf; for(i=0; i < NR_RECVBUFF ; i++) { rtw_os_recvbuf_resource_free(padapter, precvbuf); precvbuf++; } if(precvpriv->pallocated_recv_buf) rtw_mfree(precvpriv->pallocated_recv_buf, NR_RECVBUFF *sizeof(struct recv_buf) + 4); #ifdef CONFIG_USB_INTERRUPT_IN_PIPE #ifdef PLATFORM_LINUX if(precvpriv->int_in_urb) { usb_free_urb(precvpriv->int_in_urb); } #endif//PLATFORM_LINUX if(precvpriv->int_in_buf) rtw_mfree(precvpriv->int_in_buf, INTERRUPT_MSG_FORMAT_LEN); #endif//CONFIG_USB_INTERRUPT_IN_PIPE #ifdef PLATFORM_LINUX if (skb_queue_len(&precvpriv->rx_skb_queue)) { DBG_8192C(KERN_WARNING "rx_skb_queue not empty\n"); } rtw_skb_queue_purge(&precvpriv->rx_skb_queue); #ifdef CONFIG_PREALLOC_RECV_SKB if (skb_queue_len(&precvpriv->free_recv_skb_queue)) { DBG_8192C(KERN_WARNING "free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue)); } #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER { int i=0; struct sk_buff *skb; while ((skb = skb_dequeue(&precvpriv->free_recv_skb_queue)) != NULL) { if(ifree_recv_skb_queue); #endif //CONFIG_PREALLOC_RX_SKB_BUFFER #endif #endif } rtl8812au-4.3.8.12175.20140902+dfsg/hal/rtl8812a/usb/rtl8812au_xmit.c000066400000000000000000000714111261122257400232040ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RTL8812AU_XMIT_C_ //#include #include s32 rtl8812au_init_xmit_priv(_adapter *padapter) { struct xmit_priv *pxmitpriv = &padapter->xmitpriv; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); #ifdef PLATFORM_LINUX tasklet_init(&pxmitpriv->xmit_tasklet, (void(*)(unsigned long))rtl8812au_xmit_tasklet, (unsigned long)padapter); #endif #ifdef CONFIG_TX_EARLY_MODE pHalData->bEarlyModeEnable = padapter->registrypriv.early_mode; #endif return _SUCCESS; } void rtl8812au_free_xmit_priv(_adapter *padapter) { } static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz ,u8 bagg_pkt) { int pull=0; uint qsel; u8 data_rate,pwr_status,offset; _adapter *padapter = pxmitframe->padapter; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct pkt_attrib *pattrib = &pxmitframe->attrib; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; u8 *ptxdesc = pmem; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); sint bmcst = IS_MCAST(pattrib->ra); #ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX if (padapter->registrypriv.mp_mode == 0) { if((PACKET_OFFSET_SZ != 0) && (!bagg_pkt) &&(rtw_usb_bulk_size_boundary(padapter,TXDESC_SIZE+sz)==_FALSE)) { ptxdesc = (pmem+PACKET_OFFSET_SZ); //DBG_8192C("==> non-agg-pkt,shift pointer...\n"); pull = 1; } } #endif // CONFIG_USE_USB_BUFFER_ALLOC_TX _rtw_memset(ptxdesc, 0, TXDESC_SIZE); //4 offset 0 SET_TX_DESC_FIRST_SEG_8812(ptxdesc, 1); SET_TX_DESC_LAST_SEG_8812(ptxdesc, 1); SET_TX_DESC_OWN_8812(ptxdesc, 1); //DBG_8192C("%s==> pkt_len=%d,bagg_pkt=%02x\n",__FUNCTION__,sz,bagg_pkt); SET_TX_DESC_PKT_SIZE_8812(ptxdesc, sz); offset = TXDESC_SIZE + OFFSET_SZ; #ifdef CONFIG_TX_EARLY_MODE if(bagg_pkt){ offset += EARLY_MODE_INFO_SIZE ;//0x28 } #endif //DBG_8192C("%s==>offset(0x%02x) \n",__FUNCTION__,offset); SET_TX_DESC_OFFSET_8812(ptxdesc, offset); if (bmcst) { SET_TX_DESC_BMC_8812(ptxdesc, 1); } #ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX if (padapter->registrypriv.mp_mode == 0) { if((PACKET_OFFSET_SZ != 0) && (!bagg_pkt)){ if((pull) && (pxmitframe->pkt_offset>0)) { pxmitframe->pkt_offset = pxmitframe->pkt_offset -1; } } } #endif //DBG_8192C("%s, pkt_offset=0x%02x\n",__FUNCTION__,pxmitframe->pkt_offset); // pkt_offset, unit:8 bytes padding if (pxmitframe->pkt_offset > 0) { SET_TX_DESC_PKT_OFFSET_8812(ptxdesc, pxmitframe->pkt_offset); } SET_TX_DESC_MACID_8812(ptxdesc, pattrib->mac_id); SET_TX_DESC_RATE_ID_8812(ptxdesc, pattrib->raid); SET_TX_DESC_QUEUE_SEL_8812(ptxdesc, pattrib->qsel); //offset 12 if (!pattrib->qos_en) { SET_TX_DESC_HWSEQ_EN_8812(ptxdesc, 1); // Hw set sequence number } else { SET_TX_DESC_SEQ_8812(ptxdesc, pattrib->seqnum); } if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG) { //DBG_8192C("pxmitframe->frame_tag == DATA_FRAMETAG\n"); rtl8812a_fill_txdesc_sectype(pattrib, ptxdesc); //offset 20 #ifdef CONFIG_USB_TX_AGGREGATION if (pxmitframe->agg_num > 1){ //DBG_8192C("%s agg_num:%d\n",__FUNCTION__,pxmitframe->agg_num ); SET_TX_DESC_USB_TXAGG_NUM_8812(ptxdesc, pxmitframe->agg_num); } #endif rtl8812a_fill_txdesc_vcs(padapter, pattrib, ptxdesc); if ((pattrib->ether_type != 0x888e) && (pattrib->ether_type != 0x0806) && (pattrib->ether_type != 0x88b4) && (pattrib->dhcp_pkt != 1) #ifdef CONFIG_AUTO_AP_MODE && (pattrib->pctrl != _TRUE) #endif ) { //Non EAP & ARP & DHCP type data packet if (pattrib->ampdu_en==_TRUE) { SET_TX_DESC_AGG_ENABLE_8812(ptxdesc, 1); SET_TX_DESC_MAX_AGG_NUM_8812(ptxdesc, 0x1f); // Set A-MPDU aggregation. SET_TX_DESC_AMPDU_DENSITY_8812(ptxdesc, pattrib->ampdu_spacing); } else { SET_TX_DESC_AGG_BREAK_8812(ptxdesc, 1); } rtl8812a_fill_txdesc_phy(padapter, pattrib, ptxdesc); //DATA Rate FB LMT SET_TX_DESC_DATA_RATE_FB_LIMIT_8812(ptxdesc, 0x1f); if (pHalData->fw_ractrl == _FALSE) { SET_TX_DESC_USE_RATE_8812(ptxdesc, 1); if(pdmpriv->INIDATA_RATE[pattrib->mac_id] & BIT(7)) SET_TX_DESC_DATA_SHORT_8812(ptxdesc, 1); SET_TX_DESC_TX_RATE_8812(ptxdesc, (pdmpriv->INIDATA_RATE[pattrib->mac_id] & 0x7F)); } if (padapter->fix_rate != 0xFF) { // modify data rate by iwpriv SET_TX_DESC_USE_RATE_8812(ptxdesc, 1); if(padapter->fix_rate & BIT(7)) SET_TX_DESC_DATA_SHORT_8812(ptxdesc, 1); SET_TX_DESC_TX_RATE_8812(ptxdesc, (padapter->fix_rate & 0x7F)); SET_TX_DESC_DISABLE_FB_8812(ptxdesc,1); } if (pattrib->ldpc) SET_TX_DESC_DATA_LDPC_8812(ptxdesc, 1); if (pattrib->stbc) SET_TX_DESC_DATA_STBC_8812(ptxdesc, 1); } else { // EAP data packet and ARP packet and DHCP. // Use the 1M data rate to send the EAP/ARP packet. // This will maybe make the handshake smooth. SET_TX_DESC_USE_RATE_8812(ptxdesc, 1); SET_TX_DESC_AGG_BREAK_8812(ptxdesc, 1); // HW will ignore this setting if the transmission rate is legacy OFDM. if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT) { SET_TX_DESC_DATA_SHORT_8812(ptxdesc, 1); } SET_TX_DESC_TX_RATE_8812(ptxdesc, MRateToHwRate(pmlmeext->tx_rate)); } } else if((pxmitframe->frame_tag&0x0f)== MGNT_FRAMETAG) { //DBG_8192C("pxmitframe->frame_tag == MGNT_FRAMETAG\n"); if(IS_HARDWARE_TYPE_8821(padapter)) SET_TX_DESC_MBSSID_8821(ptxdesc, pattrib->mbssid); SET_TX_DESC_USE_RATE_8812(ptxdesc, 1); #ifdef CONFIG_INTEL_PROXIM if((padapter->proximity.proxim_on==_TRUE)&&(pattrib->intel_proxim==_TRUE)){ DBG_871X("\n %s pattrib->rate=%d\n",__FUNCTION__,pattrib->rate); SET_TX_DESC_TX_RATE_8812(ptxdesc, pattrib->rate); } else #endif { SET_TX_DESC_TX_RATE_8812(ptxdesc, MRateToHwRate(pattrib->rate)); } // VHT NDPA or HT NDPA Packet for Beamformer. if((pattrib->subtype == WIFI_NDPA) || ((pattrib->subtype == WIFI_ACTION_NOACK) && (pattrib->order == 1))) { SET_TX_DESC_NAV_USE_HDR_8812(ptxdesc, 1); SET_TX_DESC_DATA_BW_8812(ptxdesc, BWMapping_8812(padapter,pattrib)); SET_TX_DESC_RTS_SC_8812(ptxdesc, SCMapping_8812(padapter,pattrib)); SET_TX_DESC_RETRY_LIMIT_ENABLE_8812(ptxdesc, 1); SET_TX_DESC_DATA_RETRY_LIMIT_8812(ptxdesc, 5); SET_TX_DESC_DISABLE_FB_8812(ptxdesc, 1); //if(pattrib->rts_cca) //{ // SET_TX_DESC_NDPA_8812(ptxdesc, 2); //} //else { SET_TX_DESC_NDPA_8812(ptxdesc, 1); } } else { SET_TX_DESC_RETRY_LIMIT_ENABLE_8812(ptxdesc, 1); if (pattrib->retry_ctrl == _TRUE) { SET_TX_DESC_DATA_RETRY_LIMIT_8812(ptxdesc, 6); } else { SET_TX_DESC_DATA_RETRY_LIMIT_8812(ptxdesc, 12); } } #ifdef CONFIG_XMIT_ACK //CCX-TXRPT ack for xmit mgmt frames. if (pxmitframe->ack_report) { SET_TX_DESC_SPE_RPT_8812(ptxdesc, 1); #ifdef DBG_CCX DBG_871X("%s set tx report\n", __func__); #endif } #endif //CONFIG_XMIT_ACK } else if((pxmitframe->frame_tag&0x0f) == TXAGG_FRAMETAG) { DBG_8192C("pxmitframe->frame_tag == TXAGG_FRAMETAG\n"); } #ifdef CONFIG_MP_INCLUDED else if(((pxmitframe->frame_tag&0x0f) == MP_FRAMETAG) && (padapter->registrypriv.mp_mode == 1)) { fill_txdesc_for_mp(padapter, ptxdesc); } #endif else { DBG_8192C("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag); SET_TX_DESC_USE_RATE_8812(ptxdesc, 1); SET_TX_DESC_TX_RATE_8812(ptxdesc, MRateToHwRate(pmlmeext->tx_rate)); } rtl8812a_cal_txdesc_chksum(ptxdesc); _dbg_dump_tx_info(padapter,pxmitframe->frame_tag,ptxdesc); return pull; } #ifdef CONFIG_XMIT_THREAD_MODE /* * Description * Transmit xmitbuf to hardware tx fifo * * Return * _SUCCESS ok * _FAIL something error */ s32 rtl8812au_xmit_buf_handler(PADAPTER padapter) { PHAL_DATA_TYPE phal; struct xmit_priv *pxmitpriv; struct xmit_buf *pxmitbuf; s32 ret; phal = GET_HAL_DATA(padapter); pxmitpriv = &padapter->xmitpriv; ret = _rtw_down_sema(&pxmitpriv->xmit_sema); if (_FAIL == ret) { RT_TRACE(_module_hal_xmit_c_, _drv_emerg_, ("%s: down SdioXmitBufSema fail!\n", __FUNCTION__)); return _FAIL; } ret = (padapter->bDriverStopped == _TRUE) || (padapter->bSurpriseRemoved == _TRUE); if (ret) { RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("%s: bDriverStopped(%d) bSurpriseRemoved(%d)!\n", __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved)); return _FAIL; } if(check_pending_xmitbuf(pxmitpriv) == _FALSE) return _SUCCESS; #ifdef CONFIG_LPS_LCLK ret = rtw_register_tx_alive(padapter); if (ret != _SUCCESS) { RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("%s: wait to leave LPS_LCLK\n", __FUNCTION__)); return _SUCCESS; } #endif do { pxmitbuf = dequeue_pending_xmitbuf(pxmitpriv); if (pxmitbuf == NULL) break; rtw_write_port(padapter, pxmitbuf->ff_hwaddr, pxmitbuf->len, (unsigned char*)pxmitbuf); } while (1); #ifdef CONFIG_LPS_LCLK rtw_unregister_tx_alive(padapter); #endif return _SUCCESS; } #endif //for non-agg data frame or management frame static s32 rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe) { s32 ret = _SUCCESS; s32 inner_ret = _SUCCESS; int t, sz, w_sz, pull=0; u8 *mem_addr; u32 ff_hwaddr; struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf; struct pkt_attrib *pattrib = &pxmitframe->attrib; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct security_priv *psecuritypriv = &padapter->securitypriv; #ifdef CONFIG_80211N_HT if ((pxmitframe->frame_tag == DATA_FRAMETAG) && (pxmitframe->attrib.ether_type != 0x0806) && (pxmitframe->attrib.ether_type != 0x888e) && (pxmitframe->attrib.ether_type != 0x88b4) && (pxmitframe->attrib.dhcp_pkt != 1)) { rtw_issue_addbareq_cmd(padapter, pxmitframe); } #endif //CONFIG_80211N_HT mem_addr = pxmitframe->buf_addr; RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_dump_xframe()\n")); for (t = 0; t < pattrib->nr_frags; t++) { if (inner_ret != _SUCCESS && ret == _SUCCESS) ret = _FAIL; if (t != (pattrib->nr_frags - 1)) { RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("pattrib->nr_frags=%d\n", pattrib->nr_frags)); sz = pxmitpriv->frag_len; sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 : pattrib->icv_len); } else //no frag { sz = pattrib->last_txcmdsz; } pull = update_txdesc(pxmitframe, mem_addr, sz, _FALSE); if(pull) { mem_addr += PACKET_OFFSET_SZ; //pull txdesc head //pxmitbuf ->pbuf = mem_addr; pxmitframe->buf_addr = mem_addr; w_sz = sz + TXDESC_SIZE; } else { w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ; } ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe); #ifdef CONFIG_XMIT_THREAD_MODE pxmitbuf->len = w_sz; pxmitbuf->ff_hwaddr = ff_hwaddr; enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); #else inner_ret = rtw_write_port(padapter, ff_hwaddr, w_sz, (unsigned char*)pxmitbuf); #endif rtw_count_tx_stats(padapter, pxmitframe, sz); RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_write_port, w_sz=%d\n", w_sz)); //DBG_8192C("rtw_write_port, w_sz=%d, sz=%d, txdesc_sz=%d, tid=%d\n", w_sz, sz, w_sz-sz, pattrib->priority); mem_addr += w_sz; mem_addr = (u8 *)RND4(((SIZE_PTR)(mem_addr))); } rtw_free_xmitframe(pxmitpriv, pxmitframe); if (ret != _SUCCESS) rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_UNKNOWN); return ret; } #ifdef CONFIG_USB_TX_AGGREGATION static u32 xmitframe_need_length(struct xmit_frame *pxmitframe) { struct pkt_attrib *pattrib = &pxmitframe->attrib; u32 len = 0; // no consider fragement len = pattrib->hdrlen + pattrib->iv_len + SNAP_SIZE + sizeof(u16) + pattrib->pktlen + ((pattrib->bswenc) ? pattrib->icv_len : 0); if(pattrib->encrypt ==_TKIP_) len += 8; return len; } #define IDEA_CONDITION 1 // check all packets before enqueue s32 rtl8812au_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct xmit_frame *pxmitframe = NULL; struct xmit_frame *pfirstframe = NULL; // aggregate variable struct hw_xmit *phwxmit; struct sta_info *psta = NULL; struct tx_servq *ptxservq = NULL; _irqL irqL; _list *xmitframe_plist = NULL, *xmitframe_phead = NULL; u32 pbuf; // next pkt address u32 pbuf_tail; // last pkt tail u32 len; // packet length, except TXDESC_SIZE and PKT_OFFSET u32 bulkSize = pHalData->UsbBulkOutSize; u8 descCount; u32 bulkPtr; // dump frame variable u32 ff_hwaddr; #ifndef IDEA_CONDITION int res = _SUCCESS; #endif RT_TRACE(_module_rtl8192c_xmit_c_, _drv_info_, ("+xmitframe_complete\n")); // check xmitbuffer is ok if (pxmitbuf == NULL) { pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); if (pxmitbuf == NULL){ //DBG_871X("%s #1, connot alloc xmitbuf!!!! \n",__FUNCTION__); return _FALSE; } } //DBG_8192C("%s ===================================== \n",__FUNCTION__); //3 1. pick up first frame do { rtw_free_xmitframe(pxmitpriv, pxmitframe); pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); if (pxmitframe == NULL) { // no more xmit frame, release xmit buffer //DBG_8192C("no more xmit frame ,return\n"); rtw_free_xmitbuf(pxmitpriv, pxmitbuf); return _FALSE; } #ifndef IDEA_CONDITION if (pxmitframe->frame_tag != DATA_FRAMETAG) { RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n", pxmitframe->frame_tag, DATA_FRAMETAG)); // rtw_free_xmitframe(pxmitpriv, pxmitframe); continue; } // TID 0~15 if ((pxmitframe->attrib.priority < 0) || (pxmitframe->attrib.priority > 15)) { RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, ("xmitframe_complete: TID(%d) should be 0~15!\n", pxmitframe->attrib.priority)); // rtw_free_xmitframe(pxmitpriv, pxmitframe); continue; } #endif //DBG_8192C("==> pxmitframe->attrib.priority:%d\n",pxmitframe->attrib.priority); pxmitframe->pxmitbuf = pxmitbuf; pxmitframe->buf_addr = pxmitbuf->pbuf; pxmitbuf->priv_data = pxmitframe; pxmitframe->agg_num = 1; // alloc xmitframe should assign to 1. #ifdef CONFIG_TX_EARLY_MODE pxmitframe->pkt_offset = (PACKET_OFFSET_SZ/8)+1; // 2; // first frame of aggregation, reserve one offset for EM info ,another for usb bulk-out block check #else pxmitframe->pkt_offset = (PACKET_OFFSET_SZ/8); // 1; // first frame of aggregation, reserve offset #endif if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == _FALSE) { DBG_871X("%s coalesce 1st xmitframe failed \n",__FUNCTION__); continue; } // always return ndis_packet after rtw_xmitframe_coalesce rtw_os_xmit_complete(padapter, pxmitframe); break; } while (1); //3 2. aggregate same priority and same DA(AP or STA) frames pfirstframe = pxmitframe; len = xmitframe_need_length(pfirstframe) + TXDESC_SIZE+(pfirstframe->pkt_offset*PACKET_OFFSET_SZ); pbuf_tail = len; pbuf = _RND8(pbuf_tail); // check pkt amount in one bulk descCount = 0; bulkPtr = bulkSize; if (pbuf < bulkPtr) descCount++; if (descCount == pHalData->UsbTxAggDescNum) goto agg_end; else { descCount = 0; bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; // round to next bulkSize } // dequeue same priority packet from station tx queue psta = pfirstframe->attrib.psta; switch (pfirstframe->attrib.priority) { case 1: case 2: ptxservq = &(psta->sta_xmitpriv.bk_q); phwxmit = pxmitpriv->hwxmits + 3; break; case 4: case 5: ptxservq = &(psta->sta_xmitpriv.vi_q); phwxmit = pxmitpriv->hwxmits + 1; break; case 6: case 7: ptxservq = &(psta->sta_xmitpriv.vo_q); phwxmit = pxmitpriv->hwxmits; break; case 0: case 3: default: ptxservq = &(psta->sta_xmitpriv.be_q); phwxmit = pxmitpriv->hwxmits + 2; break; } //DBG_8192C("==> pkt_no=%d,pkt_len=%d,len=%d,RND8_LEN=%d,pkt_offset=0x%02x\n", //pxmitframe->agg_num,pxmitframe->attrib.last_txcmdsz,len,pbuf,pxmitframe->pkt_offset ); _enter_critical_bh(&pxmitpriv->lock, &irqL); xmitframe_phead = get_list_head(&ptxservq->sta_pending); xmitframe_plist = get_next(xmitframe_phead); while (rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist) == _FALSE) { pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); xmitframe_plist = get_next(xmitframe_plist); if(_FAIL == rtw_hal_busagg_qsel_check(padapter,pfirstframe->attrib.qsel,pxmitframe->attrib.qsel)) break; pxmitframe->agg_num = 0; // not first frame of aggregation #ifdef CONFIG_TX_EARLY_MODE pxmitframe->pkt_offset = 1;// not first frame of aggregation,reserve offset for EM Info #else pxmitframe->pkt_offset = 0; // not first frame of aggregation, no need to reserve offset #endif len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE +(pxmitframe->pkt_offset*PACKET_OFFSET_SZ); if (_RND8(pbuf + len) > MAX_XMITBUF_SZ) //if (_RND8(pbuf + len) > (MAX_XMITBUF_SZ/2))//to do : for TX TP finial tune , Georgia 2012-0323 { //DBG_8192C("%s....len> MAX_XMITBUF_SZ\n",__FUNCTION__); pxmitframe->agg_num = 1; pxmitframe->pkt_offset = 1; break; } rtw_list_delete(&pxmitframe->list); ptxservq->qcnt--; phwxmit->accnt--; #ifndef IDEA_CONDITION // suppose only data frames would be in queue if (pxmitframe->frame_tag != DATA_FRAMETAG) { RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n", pxmitframe->frame_tag, DATA_FRAMETAG)); rtw_free_xmitframe(pxmitpriv, pxmitframe); continue; } // TID 0~15 if ((pxmitframe->attrib.priority < 0) || (pxmitframe->attrib.priority > 15)) { RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, ("xmitframe_complete: TID(%d) should be 0~15!\n", pxmitframe->attrib.priority)); rtw_free_xmitframe(pxmitpriv, pxmitframe); continue; } #endif // pxmitframe->pxmitbuf = pxmitbuf; pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf; if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == _FALSE) { DBG_871X("%s coalesce failed \n",__FUNCTION__); rtw_free_xmitframe(pxmitpriv, pxmitframe); continue; } //DBG_8192C("==> pxmitframe->attrib.priority:%d\n",pxmitframe->attrib.priority); // always return ndis_packet after rtw_xmitframe_coalesce rtw_os_xmit_complete(padapter, pxmitframe); // (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz,_TRUE); // don't need xmitframe any more rtw_free_xmitframe(pxmitpriv, pxmitframe); // handle pointer and stop condition pbuf_tail = pbuf + len; pbuf = _RND8(pbuf_tail); pfirstframe->agg_num++; #ifdef CONFIG_TX_EARLY_MODE pxmitpriv->agg_pkt[pfirstframe->agg_num-1].offset = _RND8(len); pxmitpriv->agg_pkt[pfirstframe->agg_num-1].pkt_len = pxmitframe->attrib.last_txcmdsz; #endif if (MAX_TX_AGG_PACKET_NUMBER == pfirstframe->agg_num) break; if (pbuf < bulkPtr) { descCount++; if (descCount == pHalData->UsbTxAggDescNum) break; } else { descCount = 0; bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; } }//end while( aggregate same priority and same DA(AP or STA) frames) if (_rtw_queue_empty(&ptxservq->sta_pending) == _TRUE) rtw_list_delete(&ptxservq->tx_pending); _exit_critical_bh(&pxmitpriv->lock, &irqL); agg_end: #ifdef CONFIG_80211N_HT if ((pfirstframe->attrib.ether_type != 0x0806) && (pfirstframe->attrib.ether_type != 0x888e) && (pfirstframe->attrib.ether_type != 0x88b4) && (pfirstframe->attrib.dhcp_pkt != 1)) { rtw_issue_addbareq_cmd(padapter, pfirstframe); } #endif //CONFIG_80211N_HT #ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX //3 3. update first frame txdesc if ((PACKET_OFFSET_SZ != 0) && ((pbuf_tail % bulkSize) == 0)) { // remove pkt_offset pbuf_tail -= PACKET_OFFSET_SZ; pfirstframe->buf_addr += PACKET_OFFSET_SZ; pfirstframe->pkt_offset--; //DBG_8192C("$$$$$ buf size equal to USB block size $$$$$$\n"); } #endif // CONFIG_USE_USB_BUFFER_ALLOC_TX update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz,_TRUE); #ifdef CONFIG_TX_EARLY_MODE //prepare EM info for first frame, agg_num value start from 1 pxmitpriv->agg_pkt[0].offset = _RND8(pfirstframe->attrib.last_txcmdsz +TXDESC_SIZE +(pfirstframe->pkt_offset*PACKET_OFFSET_SZ)); pxmitpriv->agg_pkt[0].pkt_len = pfirstframe->attrib.last_txcmdsz;//get from rtw_xmitframe_coalesce UpdateEarlyModeInfo8812(pxmitpriv,pxmitbuf ); #endif //3 4. write xmit buffer to USB FIFO ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe); //DBG_8192C("%s ===================================== write port,buf_size(%d) \n",__FUNCTION__,pbuf_tail); // xmit address == ((xmit_frame*)pxmitbuf->priv_data)->buf_addr rtw_write_port(padapter, ff_hwaddr, pbuf_tail, (u8*)pxmitbuf); //3 5. update statisitc pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE); pbuf_tail -= (pfirstframe->pkt_offset * PACKET_OFFSET_SZ); rtw_count_tx_stats(padapter, pfirstframe, pbuf_tail); rtw_free_xmitframe(pxmitpriv, pfirstframe); return _TRUE; } #else s32 rtl8812au_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) { struct hw_xmit *phwxmits; sint hwentry; struct xmit_frame *pxmitframe=NULL; int res=_SUCCESS, xcnt = 0; phwxmits = pxmitpriv->hwxmits; hwentry = pxmitpriv->hwxmit_entry; RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete()\n")); if(pxmitbuf==NULL) { pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); if(!pxmitbuf) { return _FALSE; } } do { pxmitframe = rtw_dequeue_xframe(pxmitpriv, phwxmits, hwentry); if(pxmitframe) { pxmitframe->pxmitbuf = pxmitbuf; pxmitframe->buf_addr = pxmitbuf->pbuf; pxmitbuf->priv_data = pxmitframe; if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG) { if(pxmitframe->attrib.priority<=15)//TID0~15 { res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); } //DBG_8192C("==> pxmitframe->attrib.priority:%d\n",pxmitframe->attrib.priority); rtw_os_xmit_complete(padapter, pxmitframe);//always return ndis_packet after rtw_xmitframe_coalesce } RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete(): rtw_dump_xframe\n")); if(res == _SUCCESS) { rtw_dump_xframe(padapter, pxmitframe); } else { rtw_free_xmitbuf(pxmitpriv, pxmitbuf); rtw_free_xmitframe(pxmitpriv, pxmitframe); } xcnt++; } else { rtw_free_xmitbuf(pxmitpriv, pxmitbuf); return _FALSE; } break; }while(0/*xcnt < (NR_XMITFRAME >> 3)*/); return _TRUE; } #endif static s32 xmitframe_direct(_adapter *padapter, struct xmit_frame *pxmitframe) { s32 res = _SUCCESS; //DBG_8192C("==> %s \n",__FUNCTION__); res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); if (res == _SUCCESS) { rtw_dump_xframe(padapter, pxmitframe); } else{ DBG_8192C("==> %s xmitframe_coalsece failed\n",__FUNCTION__); } return res; } /* * Return * _TRUE dump packet directly * _FALSE enqueue packet */ static s32 pre_xmitframe(_adapter *padapter, struct xmit_frame *pxmitframe) { _irqL irqL; s32 res; struct xmit_buf *pxmitbuf = NULL; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct pkt_attrib *pattrib = &pxmitframe->attrib; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _enter_critical_bh(&pxmitpriv->lock, &irqL); //DBG_8192C("==> %s \n",__FUNCTION__); if (rtw_txframes_sta_ac_pending(padapter, pattrib) > 0) { //DBG_8192C("enqueue AC(%d)\n",pattrib->priority); goto enqueue; } if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) goto enqueue; #ifdef CONFIG_CONCURRENT_MODE if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) goto enqueue; #endif pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); if (pxmitbuf == NULL) goto enqueue; _exit_critical_bh(&pxmitpriv->lock, &irqL); pxmitframe->pxmitbuf = pxmitbuf; pxmitframe->buf_addr = pxmitbuf->pbuf; pxmitbuf->priv_data = pxmitframe; if (xmitframe_direct(padapter, pxmitframe) != _SUCCESS) { rtw_free_xmitbuf(pxmitpriv, pxmitbuf); rtw_free_xmitframe(pxmitpriv, pxmitframe); } return _TRUE; enqueue: res = rtw_xmitframe_enqueue(padapter, pxmitframe); _exit_critical_bh(&pxmitpriv->lock, &irqL); if (res != _SUCCESS) { RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("pre_xmitframe: enqueue xmitframe fail\n")); rtw_free_xmitframe(pxmitpriv, pxmitframe); pxmitpriv->tx_drop++; return _TRUE; } return _FALSE; } s32 rtl8812au_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe) { return rtw_dump_xframe(padapter, pmgntframe); } /* * Return * _TRUE dump packet directly ok * _FALSE temporary can't transmit packets to hardware */ s32 rtl8812au_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe) { return pre_xmitframe(padapter, pxmitframe); } s32 rtl8812au_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) { struct xmit_priv *pxmitpriv = &padapter->xmitpriv; s32 err; if ((err=rtw_xmitframe_enqueue(padapter, pxmitframe)) != _SUCCESS) { rtw_free_xmitframe(pxmitpriv, pxmitframe); pxmitpriv->tx_drop++; } else { #ifdef PLATFORM_LINUX tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); #endif } return err; } #ifdef CONFIG_HOSTAPD_MLME static void rtl8812au_hostap_mgnt_xmit_cb(struct urb *urb) { #ifdef PLATFORM_LINUX struct sk_buff *skb = (struct sk_buff *)urb->context; //DBG_8192C("%s\n", __FUNCTION__); rtw_skb_free(skb); #endif } s32 rtl8812au_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt) { #ifdef PLATFORM_LINUX u16 fc; int rc, len, pipe; unsigned int bmcst, tid, qsel; struct sk_buff *skb, *pxmit_skb; struct urb *urb; unsigned char *pxmitbuf; struct tx_desc *ptxdesc; struct rtw_ieee80211_hdr *tx_hdr; struct hostapd_priv *phostapdpriv = padapter->phostapdpriv; struct net_device *pnetdev = padapter->pnetdev; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); //DBG_8192C("%s\n", __FUNCTION__); skb = pkt; len = skb->len; tx_hdr = (struct rtw_ieee80211_hdr *)(skb->data); fc = le16_to_cpu(tx_hdr->frame_ctl); bmcst = IS_MCAST(tx_hdr->addr1); if ((fc & RTW_IEEE80211_FCTL_FTYPE) != RTW_IEEE80211_FTYPE_MGMT) goto _exit; pxmit_skb = rtw_skb_alloc(len + TXDESC_SIZE); if(!pxmit_skb) goto _exit; pxmitbuf = pxmit_skb->data; urb = usb_alloc_urb(0, GFP_ATOMIC); if (!urb) { goto _exit; } // ----- fill tx desc ----- ptxdesc = (struct tx_desc *)pxmitbuf; _rtw_memset(ptxdesc, 0, sizeof(*ptxdesc)); //offset 0 ptxdesc->txdw0 |= cpu_to_le32(len&0x0000ffff); ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<txdw0 |= cpu_to_le32(OWN | FSG | LSG); if(bmcst) { ptxdesc->txdw0 |= cpu_to_le32(BIT(24)); } //offset 4 ptxdesc->txdw1 |= cpu_to_le32(0x00);//MAC_ID ptxdesc->txdw1 |= cpu_to_le32((0x12<txdw1 |= cpu_to_le32((0x06<< 16) & 0x000f0000);//b mode //offset 8 //offset 12 ptxdesc->txdw3 |= cpu_to_le32((le16_to_cpu(tx_hdr->seq_ctl)<<16)&0xffff0000); //offset 16 ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate //offset 20 //HW append seq ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. rtl8188eu_cal_txdesc_chksum(ptxdesc); // ----- end of fill tx desc ----- // skb_put(pxmit_skb, len + TXDESC_SIZE); pxmitbuf = pxmitbuf + TXDESC_SIZE; _rtw_memcpy(pxmitbuf, skb->data, len); //DBG_8192C("mgnt_xmit, len=%x\n", pxmit_skb->len); // ----- prepare urb for submit ----- //translate DMA FIFO addr to pipehandle //pipe = ffaddr2pipehdl(pdvobj, MGT_QUEUE_INX); pipe = usb_sndbulkpipe(pdvobj->pusbdev, pHalData->Queue2EPNum[(u8)MGT_QUEUE_INX]&0x0f); usb_fill_bulk_urb(urb, pdvobj->pusbdev, pipe, pxmit_skb->data, pxmit_skb->len, rtl8192cu_hostap_mgnt_xmit_cb, pxmit_skb); urb->transfer_flags |= URB_ZERO_PACKET; usb_anchor_urb(urb, &phostapdpriv->anchored); rc = usb_submit_urb(urb, GFP_ATOMIC); if (rc < 0) { usb_unanchor_urb(urb); kfree_skb(skb); } usb_free_urb(urb); _exit: rtw_skb_free(skb); #endif return 0; } #endif rtl8812au-4.3.8.12175.20140902+dfsg/hal/rtl8812a/usb/usb_halinit.c000066400000000000000000002621461261122257400230010ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _HCI_HAL_INIT_C_ //#include #include #ifndef CONFIG_USB_HCI #error "CONFIG_USB_HCI shall be on!\n" #endif static void _dbg_dump_macreg(_adapter *padapter) { u32 offset = 0; u32 val32 = 0; u32 index =0 ; for(index=0;index<64;index++) { offset = index*4; val32 = rtw_read32(padapter,offset); DBG_8192C("offset : 0x%02x ,val:0x%08x\n",offset,val32); } } static VOID _ConfigChipOutEP_8812( IN PADAPTER pAdapter, IN u8 NumOutPipe ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); pHalData->OutEpQueueSel = 0; pHalData->OutEpNumber = 0; switch(NumOutPipe){ case 4: pHalData->OutEpQueueSel=TX_SELE_HQ| TX_SELE_LQ|TX_SELE_NQ; pHalData->OutEpNumber=4; break; case 3: pHalData->OutEpQueueSel=TX_SELE_HQ| TX_SELE_LQ|TX_SELE_NQ; pHalData->OutEpNumber=3; break; case 2: pHalData->OutEpQueueSel=TX_SELE_HQ| TX_SELE_NQ; pHalData->OutEpNumber=2; break; case 1: pHalData->OutEpQueueSel=TX_SELE_HQ; pHalData->OutEpNumber=1; break; default: break; } DBG_871X("%s OutEpQueueSel(0x%02x), OutEpNumber(%d) \n",__FUNCTION__,pHalData->OutEpQueueSel,pHalData->OutEpNumber ); } static BOOLEAN HalUsbSetQueuePipeMapping8812AUsb( IN PADAPTER pAdapter, IN u8 NumInPipe, IN u8 NumOutPipe ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); BOOLEAN result = _FALSE; _ConfigChipOutEP_8812(pAdapter, NumOutPipe); // Normal chip with one IN and one OUT doesn't have interrupt IN EP. if(1 == pHalData->OutEpNumber){ if(1 != NumInPipe){ return result; } } // All config other than above support one Bulk IN and one Interrupt IN. //if(2 != NumInPipe){ // return result; //} result = Hal_MappingOutPipe(pAdapter, NumOutPipe); return result; } void rtl8812au_interface_configure(_adapter *padapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); if (IS_SUPER_SPEED_USB(padapter)) { pHalData->UsbBulkOutSize = USB_SUPER_SPEED_BULK_SIZE;//1024 bytes } else if (IS_HIGH_SPEED_USB(padapter)) { pHalData->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;//512 bytes } else { pHalData->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;//64 bytes } pHalData->interfaceIndex = pdvobjpriv->InterfaceNumber; #ifdef CONFIG_USB_TX_AGGREGATION pHalData->UsbTxAggMode = 1; pHalData->UsbTxAggDescNum = 6; // only 4 bits if(IS_HARDWARE_TYPE_8812AU(padapter)) //page added for Jaguar pHalData->UsbTxAggDescNum = 0x01 ; //adjust value for OQT Overflow issue //0x3; // only 4 bits #endif #ifdef CONFIG_USB_RX_AGGREGATION if(IS_HARDWARE_TYPE_8812AU(padapter)) pHalData->UsbRxAggMode = USB_RX_AGG_USB; else pHalData->UsbRxAggMode = USB_RX_AGG_USB; //todo: change to USB_RX_AGG_DMA; pHalData->UsbRxAggBlockCount = 8; //unit : 512b pHalData->UsbRxAggBlockTimeout = 0x6; pHalData->UsbRxAggPageCount = 16; //uint :128 b //0x0A; // 10 = MAX_RX_DMA_BUFFER_SIZE/2/pHalData->UsbBulkOutSize pHalData->UsbRxAggPageTimeout = 0x6; //6, absolute time = 34ms/(2^6) if (IS_SUPER_SPEED_USB(padapter)) { pHalData->RegAcUsbDmaSize = 0x7; pHalData->RegAcUsbDmaTime = 0x1a; } else { //the setting to reduce RX FIFO overflow on USB2.0 and increase rx throughput pHalData->RegAcUsbDmaSize = 0x5; pHalData->RegAcUsbDmaTime = 0x20; } #endif HalUsbSetQueuePipeMapping8812AUsb(padapter, pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes); } static VOID _InitBurstPktLen(IN PADAPTER Adapter) { u1Byte speedvalue, provalue, temp; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); //rtw_write16(Adapter, REG_TRXDMA_CTRL_8195, 0xf5b0); //rtw_write16(Adapter, REG_TRXDMA_CTRL_8812, 0xf5b4); rtw_write8(Adapter, 0xf050, 0x01); //usb3 rx interval rtw_write16(Adapter, REG_RXDMA_STATUS, 0x7400); //burset lenght=4, set 0x3400 for burset length=2 rtw_write8(Adapter, 0x289,0xf5); //for rxdma control //rtw_write8(Adapter, 0x3a, 0x46); // 0x456 = 0x70, sugguested by Zhilin if(IS_HARDWARE_TYPE_8821U(Adapter)) { rtw_write8(Adapter, REG_AMPDU_MAX_TIME_8812, 0x5e); } else { rtw_write8(Adapter, REG_AMPDU_MAX_TIME_8812, 0x70); } rtw_write32(Adapter, REG_AMPDU_MAX_LENGTH_8812, 0xffffffff); rtw_write8(Adapter, REG_USTIME_TSF, 0x50); rtw_write8(Adapter, REG_USTIME_EDCA, 0x50); if(IS_HARDWARE_TYPE_8821U(Adapter)) speedvalue = BIT7; else speedvalue = rtw_read8(Adapter, 0xff); //check device operation speed: SS 0xff bit7 if(speedvalue & BIT7) //USB2/1.1 Mode { temp = rtw_read8(Adapter, 0xfe17); if(((temp>>4)&0x03)==0) { pHalData->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE; provalue = rtw_read8(Adapter, REG_RXDMA_PRO_8812); rtw_write8(Adapter, REG_RXDMA_PRO_8812, ((provalue|BIT(4)|BIT(3)|BIT(2)|BIT(1))&(~BIT(5)))); //set burst pkt len=512B } else { pHalData->UsbBulkOutSize = 64; provalue = rtw_read8(Adapter, REG_RXDMA_PRO_8812); rtw_write8(Adapter, REG_RXDMA_PRO_8812, ((provalue|BIT(5)|BIT(3)|BIT(2)|BIT(1))&(~BIT(4)))); //set burst pkt len=64B } //rtw_write8(Adapter, 0x10c, 0xb4); //hal_UphyUpdate8812AU(Adapter); pHalData->bSupportUSB3 = _FALSE; } else //USB3 Mode { pHalData->UsbBulkOutSize = USB_SUPER_SPEED_BULK_SIZE; provalue = rtw_read8(Adapter, REG_RXDMA_PRO_8812); rtw_write8(Adapter, REG_RXDMA_PRO_8812, ((provalue|BIT(3)|BIT(2)|BIT(1))&(~(BIT5|BIT4)))); //set burst pkt len=1k //PlatformEFIOWrite2Byte(Adapter, REG_RXDMA_AGG_PG_TH,0x0a05); //dmc agg th 20K pHalData->bSupportUSB3 = _TRUE; // set Reg 0xf008[3:4] to 2'00 to disable U1/U2 Mode to avoid 2.5G spur in USB3.0. added by page, 20120712 rtw_write8(Adapter, 0xf008, rtw_read8(Adapter, 0xf008)&0xE7); } #ifdef CONFIG_USB_TX_AGGREGATION //rtw_write8(Adapter, REG_TDECTRL_8195, 0x30); #else rtw_write8(Adapter, REG_TDECTRL, 0x10); #endif temp = rtw_read8(Adapter, REG_SYS_FUNC_EN); rtw_write8(Adapter, REG_SYS_FUNC_EN, temp&(~BIT(10))); //reset 8051 rtw_write8(Adapter, REG_HT_SINGLE_AMPDU_8812,rtw_read8(Adapter, REG_HT_SINGLE_AMPDU_8812)|BIT(7)); //enable single pkt ampdu rtw_write8(Adapter, REG_RX_PKT_LIMIT, 0x18); //for VHT packet length 11K rtw_write8(Adapter, REG_PIFS, 0x00); if(IS_HARDWARE_TYPE_8821U(Adapter) && (Adapter->registrypriv.wifi_spec == _FALSE)) { //0x0a0a too small , it can't pass AC logo. change to 0x1f1f rtw_write16(Adapter, REG_MAX_AGGR_NUM, 0x1f1f); rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, 0x80); rtw_write32(Adapter, REG_FAST_EDCA_CTRL, 0x03087777); } else { rtw_write16(Adapter, REG_MAX_AGGR_NUM, 0x1f1f); rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, rtw_read8(Adapter, REG_FWHW_TXQ_CTRL)&(~BIT(7))); } if(pHalData->AMPDUBurstMode) { rtw_write8(Adapter,REG_AMPDU_BURST_MODE_8812, 0x5F); } rtw_write8(Adapter, 0x1c, rtw_read8(Adapter, 0x1c) | BIT(5) |BIT(6)); //to prevent mac is reseted by bus. 20111208, by Page // ARFB table 9 for 11ac 5G 2SS rtw_write32(Adapter, REG_ARFR0_8812, 0x00000010); rtw_write32(Adapter, REG_ARFR0_8812+4, 0xfffff000); // ARFB table 10 for 11ac 5G 1SS rtw_write32(Adapter, REG_ARFR1_8812, 0x00000010); rtw_write32(Adapter, REG_ARFR1_8812+4, 0x003ff000); // ARFB table 11 for 11ac 24G 1SS rtw_write32(Adapter, REG_ARFR2_8812, 0x00000015); rtw_write32(Adapter, REG_ARFR2_8812+4, 0x003ff000); // ARFB table 12 for 11ac 24G 2SS rtw_write32(Adapter, REG_ARFR3_8812, 0x00000015); rtw_write32(Adapter, REG_ARFR3_8812+4, 0xffcff000); } static u32 _InitPowerOn_8812AU(_adapter *padapter) { u16 u2btmp = 0; u8 u1btmp = 0; u8 bMacPwrCtrlOn=_FALSE; // HW Power on sequence rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); if(bMacPwrCtrlOn == _TRUE) return _SUCCESS; if(IS_VENDOR_8821A_MP_CHIP(padapter)) { // HW Power on sequence if(!HalPwrSeqCmdParsing(padapter, PWR_CUT_A_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8821A_NIC_ENABLE_FLOW)) { DBG_871X(KERN_ERR "%s: run power on flow fail\n", __func__); return _FAIL; } } else if(IS_HARDWARE_TYPE_8821U(padapter)) { if(!HalPwrSeqCmdParsing(padapter, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8821A_NIC_ENABLE_FLOW)) { DBG_871X(KERN_ERR "%s: run power on flow fail\n", __func__); return _FAIL; } } else { if(!HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8812_NIC_ENABLE_FLOW)) { DBG_871X(KERN_ERR "%s: run power on flow fail\n", __func__); return _FAIL; } } // Enable MAC DMA/WMAC/SCHEDULE/SEC block // Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. rtw_write16(padapter, REG_CR, 0x00); //suggseted by zhouzhou, by page, 20111230 u2btmp = rtw_read16(padapter, REG_CR); u2btmp |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN); rtw_write16(padapter, REG_CR, u2btmp); //Need remove below furture, suggest by Jackie. // if 0xF0[24] =1 (LDO), need to set the 0x7C[6] to 1. if(IS_HARDWARE_TYPE_8821U(padapter)) { u1btmp = rtw_read8(padapter, REG_SYS_CFG+3); if(u1btmp & BIT0) //LDO mode. { u1btmp =rtw_read8(padapter, 0x7c); rtw_write8(padapter,0x7c,u1btmp | BIT6); } } bMacPwrCtrlOn = _TRUE; rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); return _SUCCESS; } //--------------------------------------------------------------- // // MAC init functions // //--------------------------------------------------------------- // Shall USB interface init this? static VOID _InitInterrupt_8812AU( IN PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); // HIMR rtw_write32(Adapter, REG_HIMR0_8812, pHalData->IntrMask[0]&0xFFFFFFFF); rtw_write32(Adapter, REG_HIMR1_8812, pHalData->IntrMask[1]&0xFFFFFFFF); } static VOID _InitQueueReservedPage_8821AUsb( IN PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct registry_priv *pregistrypriv = &Adapter->registrypriv; u32 numHQ = 0; u32 numLQ = 0; u32 numNQ = 0; u32 numPubQ = 0; u32 value32; u8 value8; BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec; if(!bWiFiConfig) { if(pHalData->OutEpQueueSel & TX_SELE_HQ) { numHQ = NORMAL_PAGE_NUM_HPQ_8821; } if(pHalData->OutEpQueueSel & TX_SELE_LQ) { numLQ = NORMAL_PAGE_NUM_LPQ_8821; } // NOTE: This step shall be proceed before writting REG_RQPN. if(pHalData->OutEpQueueSel & TX_SELE_NQ){ numNQ = NORMAL_PAGE_NUM_NPQ_8821; } } else { // WMM if(pHalData->OutEpQueueSel & TX_SELE_HQ) { numHQ = WMM_NORMAL_PAGE_NUM_HPQ_8821; } if(pHalData->OutEpQueueSel & TX_SELE_LQ) { numLQ = WMM_NORMAL_PAGE_NUM_LPQ_8821; } // NOTE: This step shall be proceed before writting REG_RQPN. if(pHalData->OutEpQueueSel & TX_SELE_NQ){ numNQ = WMM_NORMAL_PAGE_NUM_NPQ_8821; } } numPubQ = TX_TOTAL_PAGE_NUMBER_8821 - numHQ - numLQ - numNQ; value8 = (u8)_NPQ(numNQ); rtw_write8(Adapter, REG_RQPN_NPQ, value8); // TX DMA value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN; rtw_write32(Adapter, REG_RQPN, value32); } static VOID _InitQueueReservedPage_8812AUsb( IN PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct registry_priv *pregistrypriv = &Adapter->registrypriv; u32 numHQ = 0; u32 numLQ = 0; u32 numNQ = 0; u32 numPubQ = 0; u32 value32; u8 value8; BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec; if(!bWiFiConfig) { if(pHalData->OutEpQueueSel & TX_SELE_HQ) { numHQ = NORMAL_PAGE_NUM_HPQ_8812; } if(pHalData->OutEpQueueSel & TX_SELE_LQ) { numLQ = NORMAL_PAGE_NUM_LPQ_8812; } // NOTE: This step shall be proceed before writting REG_RQPN. if(pHalData->OutEpQueueSel & TX_SELE_NQ){ numNQ = NORMAL_PAGE_NUM_NPQ_8812; } } else { // WMM if(pHalData->OutEpQueueSel & TX_SELE_HQ) { numHQ = WMM_NORMAL_PAGE_NUM_HPQ_8812; } if(pHalData->OutEpQueueSel & TX_SELE_LQ) { numLQ = WMM_NORMAL_PAGE_NUM_LPQ_8812; } // NOTE: This step shall be proceed before writting REG_RQPN. if(pHalData->OutEpQueueSel & TX_SELE_NQ){ numNQ = WMM_NORMAL_PAGE_NUM_NPQ_8812; } } numPubQ = TX_TOTAL_PAGE_NUMBER_8812 - numHQ - numLQ - numNQ; value8 = (u8)_NPQ(numNQ); rtw_write8(Adapter, REG_RQPN_NPQ, value8); // TX DMA value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN; rtw_write32(Adapter, REG_RQPN, value32); } static void _InitID_8812A(IN PADAPTER Adapter) { hal_init_macaddr(Adapter);//set mac_address } static VOID _InitTxBufferBoundary_8821AUsb( IN PADAPTER Adapter ) { struct registry_priv *pregistrypriv = &Adapter->registrypriv; u8 txpktbuf_bndy; if(!pregistrypriv->wifi_spec){ txpktbuf_bndy = TX_PAGE_BOUNDARY_8821; } else {//for WMM txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_8821; } rtw_write8(Adapter, REG_BCNQ_BDNY, txpktbuf_bndy); rtw_write8(Adapter, REG_MGQ_BDNY, txpktbuf_bndy); rtw_write8(Adapter, REG_WMAC_LBK_BF_HD, txpktbuf_bndy); rtw_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy); rtw_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy); #ifdef CONFIG_CONCURRENT_MODE rtw_write8(Adapter, REG_BCNQ1_BDNY, txpktbuf_bndy+8); rtw_write8(Adapter, REG_DWBCN1_CTRL_8812+1, txpktbuf_bndy+8);//BCN1_HEAD // BIT1- BIT_SW_BCN_SEL_EN rtw_write8(Adapter, REG_DWBCN1_CTRL_8812+2, rtw_read8(Adapter, REG_DWBCN1_CTRL_8812+2)|BIT1); #endif } static VOID _InitTxBufferBoundary_8812AUsb( IN PADAPTER Adapter ) { struct registry_priv *pregistrypriv = &Adapter->registrypriv; u8 txpktbuf_bndy; if(!pregistrypriv->wifi_spec){ txpktbuf_bndy = TX_PAGE_BOUNDARY_8812; } else {//for WMM txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_8812; } rtw_write8(Adapter, REG_BCNQ_BDNY, txpktbuf_bndy); rtw_write8(Adapter, REG_MGQ_BDNY, txpktbuf_bndy); rtw_write8(Adapter, REG_WMAC_LBK_BF_HD, txpktbuf_bndy); rtw_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy); rtw_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy); } static VOID _InitPageBoundary_8812AUsb( IN PADAPTER Adapter ) { //u2Byte rxff_bndy; //u2Byte Offset; //BOOLEAN bSupportRemoteWakeUp; //Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_WOWLAN , &bSupportRemoteWakeUp); // RX Page Boundary //srand(static_cast(time(NULL)) ); // Offset = MAX_RX_DMA_BUFFER_SIZE_8812/256; // rxff_bndy = (Offset*256)-1; if(IS_HARDWARE_TYPE_8812(Adapter)) rtw_write16(Adapter, (REG_TRXFF_BNDY + 2), MAX_RX_DMA_BUFFER_SIZE_8812-1); else rtw_write16(Adapter, (REG_TRXFF_BNDY + 2), MAX_RX_DMA_BUFFER_SIZE_8821-1); } static VOID _InitNormalChipRegPriority_8812AUsb( IN PADAPTER Adapter, IN u16 beQ, IN u16 bkQ, IN u16 viQ, IN u16 voQ, IN u16 mgtQ, IN u16 hiQ ) { u16 value16 = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7); value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) | _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) | _TXDMA_MGQ_MAP(mgtQ)| _TXDMA_HIQ_MAP(hiQ); rtw_write16(Adapter, REG_TRXDMA_CTRL, value16); } static VOID _InitNormalChipTwoOutEpPriority_8812AUsb( IN PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct registry_priv *pregistrypriv = &Adapter->registrypriv; u16 beQ,bkQ,viQ,voQ,mgtQ,hiQ; u16 valueHi = 0; u16 valueLow = 0; switch(pHalData->OutEpQueueSel) { case (TX_SELE_HQ | TX_SELE_LQ): valueHi = QUEUE_HIGH; valueLow = QUEUE_LOW; break; case (TX_SELE_NQ | TX_SELE_LQ): valueHi = QUEUE_NORMAL; valueLow = QUEUE_LOW; break; case (TX_SELE_HQ | TX_SELE_NQ): valueHi = QUEUE_HIGH; valueLow = QUEUE_NORMAL; break; default: valueHi = QUEUE_HIGH; valueLow = QUEUE_NORMAL; break; } if(!pregistrypriv->wifi_spec ){ beQ = valueLow; bkQ = valueLow; viQ = valueHi; voQ = valueHi; mgtQ = valueHi; hiQ = valueHi; } else{//for WMM ,CONFIG_OUT_EP_WIFI_MODE beQ = valueLow; bkQ = valueHi; viQ = valueHi; voQ = valueLow; mgtQ = valueHi; hiQ = valueHi; } _InitNormalChipRegPriority_8812AUsb(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); } static VOID _InitNormalChipThreeOutEpPriority_8812AUsb( IN PADAPTER Adapter ) { struct registry_priv *pregistrypriv = &Adapter->registrypriv; u16 beQ,bkQ,viQ,voQ,mgtQ,hiQ; if(!pregistrypriv->wifi_spec ){// typical setting beQ = QUEUE_LOW; bkQ = QUEUE_LOW; viQ = QUEUE_NORMAL; voQ = QUEUE_HIGH; mgtQ = QUEUE_HIGH; hiQ = QUEUE_HIGH; } else{// for WMM beQ = QUEUE_LOW; bkQ = QUEUE_NORMAL; viQ = QUEUE_NORMAL; voQ = QUEUE_HIGH; mgtQ = QUEUE_HIGH; hiQ = QUEUE_HIGH; } _InitNormalChipRegPriority_8812AUsb(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); } static VOID _InitQueuePriority_8812AUsb( IN PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); switch(pHalData->OutEpNumber) { case 2: _InitNormalChipTwoOutEpPriority_8812AUsb(Adapter); break; case 3: case 4: _InitNormalChipThreeOutEpPriority_8812AUsb(Adapter); break; default: DBG_871X("_InitQueuePriority_8812AUsb(): Shall not reach here!\n"); break; } } static VOID _InitHardwareDropIncorrectBulkOut_8812A( IN PADAPTER Adapter ) { #ifdef ENABLE_USB_DROP_INCORRECT_OUT u32 value32 = rtw_read32(Adapter, REG_TXDMA_OFFSET_CHK); value32 |= DROP_DATA_EN; rtw_write32(Adapter, REG_TXDMA_OFFSET_CHK, value32); #endif } static VOID _InitNetworkType_8812A( IN PADAPTER Adapter ) { u32 value32; value32 = rtw_read32(Adapter, REG_CR); // TODO: use the other function to set network type value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP); rtw_write32(Adapter, REG_CR, value32); } static VOID _InitTransferPageSize_8812AUsb( IN PADAPTER Adapter ) { u8 value8; value8 = _PSTX(PBP_512); PlatformEFIOWrite1Byte(Adapter, REG_PBP, value8); } static VOID _InitDriverInfoSize_8812A( IN PADAPTER Adapter, IN u8 drvInfoSize ) { rtw_write8(Adapter,REG_RX_DRVINFO_SZ, drvInfoSize); } static VOID _InitWMACSetting_8812A( IN PADAPTER Adapter ) { //u4Byte value32; u16 value16; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); //pHalData->ReceiveConfig = AAP | APM | AM | AB | APP_ICV | ADF | AMF | APP_FCS | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS; pHalData->ReceiveConfig = RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYST_RXFF; #if (1 == RTL8812A_RX_PACKET_INCLUDE_CRC) pHalData->ReceiveConfig |= ACRC32; #endif #ifdef CONFIG_RX_PACKET_APPEND_FCS pHalData->ReceiveConfig |= RCR_APPFCS; #endif if(IS_HARDWARE_TYPE_8812AU(Adapter) || IS_HARDWARE_TYPE_8821U(Adapter)) pHalData->ReceiveConfig |= FORCEACK; // some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() rtw_write32(Adapter, REG_RCR, pHalData->ReceiveConfig); // Accept all multicast address rtw_write32(Adapter, REG_MAR, 0xFFFFFFFF); rtw_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF); // Accept all data frames //value16 = 0xFFFF; //rtw_write16(Adapter, REG_RXFLTMAP2, value16); // 2010.09.08 hpfan // Since ADF is removed from RCR, ps-poll will not be indicate to driver, // RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. value16 = BIT10; #ifdef CONFIG_BEAMFORMING // NDPA packet subtype is 0x0101 value16 |= BIT5; #endif rtw_write16(Adapter, REG_RXFLTMAP1, value16); // Accept all management frames //value16 = 0xFFFF; //rtw_write16(Adapter, REG_RXFLTMAP0, value16); //enable RX_SHIFT bits //rtw_write8(Adapter, REG_TRXDMA_CTRL, rtw_read8(Adapter, REG_TRXDMA_CTRL)|BIT(1)); } static VOID _InitAdaptiveCtrl_8812AUsb( IN PADAPTER Adapter ) { u16 value16; u32 value32; // Response Rate Set value32 = rtw_read32(Adapter, REG_RRSR); value32 &= ~RATE_BITMAP_ALL; if(Adapter->registrypriv.wireless_mode & WIRELESS_11B) value32 |= RATE_RRSR_CCK_ONLY_1M; else value32 |= RATE_RRSR_WITHOUT_CCK; value32 |= RATE_RRSR_CCK_ONLY_1M; rtw_write32(Adapter, REG_RRSR, value32); // CF-END Threshold //m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1); // SIFS (used in NAV) value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10); rtw_write16(Adapter, REG_SPEC_SIFS, value16); // Retry Limit value16 = _LRL(0x30) | _SRL(0x30); rtw_write16(Adapter, REG_RL, value16); } static VOID _InitEDCA_8812AUsb( IN PADAPTER Adapter ) { // Set Spec SIFS (used in NAV) rtw_write16(Adapter,REG_SPEC_SIFS, 0x100a); rtw_write16(Adapter,REG_MAC_SPEC_SIFS, 0x100a); // Set SIFS for CCK rtw_write16(Adapter,REG_SIFS_CTX, 0x100a); // Set SIFS for OFDM rtw_write16(Adapter,REG_SIFS_TRX, 0x100a); // TXOP rtw_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B); rtw_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F); rtw_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324); rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226); // 0x50 for 80MHz clock rtw_write8(Adapter, REG_USTIME_TSF, 0x50); rtw_write8(Adapter, REG_USTIME_EDCA, 0x50); } static VOID _InitBeaconMaxError_8812A( IN PADAPTER Adapter, IN BOOLEAN InfraMode ) { #ifdef RTL8192CU_ADHOC_WORKAROUND_SETTING rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); #else //rtw_write8(Adapter, REG_BCN_MAX_ERR, (InfraMode ? 0xFF : 0x10)); #endif } #ifdef CONFIG_LED static void _InitHWLed(PADAPTER Adapter) { struct led_priv *pledpriv = &(Adapter->ledpriv); if( pledpriv->LedStrategy != HW_LED) return; // HW led control // to do .... //must consider cases of antenna diversity/ commbo card/solo card/mini card } #endif //CONFIG_LED static VOID _InitRDGSetting_8812A( IN PADAPTER Adapter ) { rtw_write8(Adapter,REG_RD_CTRL,0xFF); rtw_write16(Adapter, REG_RD_NAV_NXT, 0x200); rtw_write8(Adapter,REG_RD_RESP_PKT_TH,0x05); } static VOID _InitRxSetting_8812AU( IN PADAPTER Adapter ) { rtw_write32(Adapter, REG_MACID, 0x87654321); rtw_write32(Adapter, 0x0700, 0x87654321); } static VOID _InitRetryFunction_8812A( IN PADAPTER Adapter ) { u8 value8; value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL); value8 |= EN_AMPDU_RTY_NEW; rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8); // Set ACK timeout //rtw_write8(Adapter, REG_ACKTO, 0x40); //masked by page for BCM IOT issue temporally rtw_write8(Adapter, REG_ACKTO, 0x80); } /*----------------------------------------------------------------------------- * Function: usb_AggSettingTxUpdate() * * Overview: Seperate TX/RX parameters update independent for TP detection and * dynamic TX/RX aggreagtion parameters update. * * Input: PADAPTER * * Output/Return: NONE * * Revised History: * When Who Remark * 12/10/2010 MHC Seperate to smaller function. * *---------------------------------------------------------------------------*/ static VOID usb_AggSettingTxUpdate_8812A( IN PADAPTER Adapter ) { #ifdef CONFIG_USB_TX_AGGREGATION HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u32 value32; if(Adapter->registrypriv.wifi_spec) pHalData->UsbTxAggMode = _FALSE; if(pHalData->UsbTxAggMode){ value32 = rtw_read32(Adapter, REG_TDECTRL); value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT); value32 |= ((pHalData->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT); rtw_write32(Adapter, REG_DWBCN0_CTRL_8812, value32); if(IS_HARDWARE_TYPE_8821U(Adapter)) //page added for Jaguar rtw_write8(Adapter, REG_DWBCN1_CTRL_8812, pHalData->UsbTxAggDescNum<<1); } #endif } // usb_AggSettingTxUpdate /*----------------------------------------------------------------------------- * Function: usb_AggSettingRxUpdate() * * Overview: Seperate TX/RX parameters update independent for TP detection and * dynamic TX/RX aggreagtion parameters update. * * Input: PADAPTER * * Output/Return: NONE * * Revised History: * When Who Remark * 12/10/2010 MHC Seperate to smaller function. * *---------------------------------------------------------------------------*/ static VOID usb_AggSettingRxUpdate_8812A( IN PADAPTER Adapter ) { #ifdef CONFIG_USB_RX_AGGREGATION HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u8 valueDMA; u8 valueUSB; valueDMA = rtw_read8(Adapter, REG_TRXDMA_CTRL); switch(pHalData->UsbRxAggMode) { case USB_RX_AGG_DMA: valueDMA |= RXDMA_AGG_EN; // // 2012/10/26 MH For TX throught start rate temp fix. // { u16 temp; //Adjust DMA page and thresh. temp = pHalData->RegAcUsbDmaSize | (pHalData->RegAcUsbDmaTime<<8); rtw_write16(Adapter, REG_RXDMA_AGG_PG_TH, temp); rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH+3, BIT(7)); //for dma agg , 0x280[31]¡GBIT_RXDMA_AGG_OLD_MOD, set 1 } break; case USB_RX_AGG_USB: valueDMA |= RXDMA_AGG_EN; { u16 temp; //Adjust DMA page and thresh. temp = pHalData->RegAcUsbDmaSize | (pHalData->RegAcUsbDmaTime<<8); rtw_write16(Adapter, REG_RXDMA_AGG_PG_TH, temp); } break; case USB_RX_AGG_MIX: case USB_RX_AGG_DISABLE: default: // TODO: break; } rtw_write8(Adapter, REG_TRXDMA_CTRL, valueDMA); #endif } // usb_AggSettingRxUpdate static VOID init_UsbAggregationSetting_8812A( IN PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); // Tx aggregation setting usb_AggSettingTxUpdate_8812A(Adapter); // Rx aggregation setting usb_AggSettingRxUpdate_8812A(Adapter); // 201/12/10 MH Add for USB agg mode dynamic switch. pHalData->UsbRxHighSpeedMode = _FALSE; } /*----------------------------------------------------------------------------- * Function: USB_AggModeSwitch() * * Overview: When RX traffic is more than 40M, we need to adjust some parameters to increase * RX speed by increasing batch indication size. This will decrease TCP ACK speed, we * need to monitor the influence of FTP/network share. * For TX mode, we are still ubder investigation. * * Input: PADAPTER * * Output: NONE * * Return: NONE * * Revised History: * When Who Remark * 12/10/2010 MHC Create Version 0. * *---------------------------------------------------------------------------*/ VOID USB_AggModeSwitch( IN PADAPTER Adapter ) { #if 0 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); //pHalData->UsbRxHighSpeedMode = FALSE; // How to measure the RX speed? We assume that when traffic is more than if (pMgntInfo->bRegAggDMEnable == FALSE) { return; // Inf not support. } if (pMgntInfo->LinkDetectInfo.bHigherBusyRxTraffic == TRUE && pHalData->UsbRxHighSpeedMode == FALSE) { pHalData->UsbRxHighSpeedMode = TRUE; RT_TRACE(COMP_INIT, DBG_LOUD, ("UsbAggModeSwitchCheck to HIGH\n")); } else if (pMgntInfo->LinkDetectInfo.bHigherBusyRxTraffic == FALSE && pHalData->UsbRxHighSpeedMode == TRUE) { pHalData->UsbRxHighSpeedMode = FALSE; RT_TRACE(COMP_INIT, DBG_LOUD, ("UsbAggModeSwitchCheck to LOW\n")); } else { return; } #if USB_RX_AGGREGATION_92C if (pHalData->UsbRxHighSpeedMode == TRUE) { // 2010/12/10 MH The parameter is tested by SD1 engineer and SD3 channel emulator. // USB mode #if (RT_PLATFORM == PLATFORM_LINUX) if (pMgntInfo->LinkDetectInfo.bTxBusyTraffic) { pHalData->RxAggBlockCount = 16; pHalData->RxAggBlockTimeout = 7; } else #endif { pHalData->RxAggBlockCount = 40; pHalData->RxAggBlockTimeout = 5; } // Mix mode pHalData->RxAggPageCount = 72; pHalData->RxAggPageTimeout = 6; } else { // USB mode pHalData->RxAggBlockCount = pMgntInfo->RegRxAggBlockCount; pHalData->RxAggBlockTimeout = pMgntInfo->RegRxAggBlockTimeout; // Mix mode pHalData->RxAggPageCount = pMgntInfo->RegRxAggPageCount; pHalData->RxAggPageTimeout = pMgntInfo->RegRxAggPageTimeout; } if (pHalData->RxAggBlockCount > MAX_RX_AGG_BLKCNT) pHalData->RxAggBlockCount = MAX_RX_AGG_BLKCNT; #if (OS_WIN_FROM_VISTA(OS_VERSION)) || (RT_PLATFORM == PLATFORM_LINUX) // do not support WINXP to prevent usbehci.sys BSOD if (IS_WIRELESS_MODE_N_24G(Adapter) || IS_WIRELESS_MODE_N_5G(Adapter)) { // // 2010/12/24 MH According to V1012 QC IOT test, XP BSOD happen when running chariot test // with the aggregation dynamic change!! We need to disable the function to prevent it is broken // in usbehci.sys. // usb_AggSettingRxUpdate_8188E(Adapter); // 2010/12/27 MH According to designer's suggstion, we can only modify Timeout value. Otheriwse // there might many HW incorrect behavior, the XP BSOD at usbehci.sys may be relative to the // issue. Base on the newest test, we can not enable block cnt > 30, otherwise XP usbehci.sys may // BSOD. } #endif #endif #endif } // USB_AggModeSwitch static VOID _InitOperationMode_8812A( IN PADAPTER Adapter ) { #if 0//gtest PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); u1Byte regBwOpMode = 0; u4Byte regRATR = 0, regRRSR = 0; //1 This part need to modified according to the rate set we filtered!! // // Set RRSR, RATR, and REG_BWOPMODE registers // switch(Adapter->RegWirelessMode) { case WIRELESS_MODE_B: regBwOpMode = BW_OPMODE_20MHZ; regRATR = RATE_ALL_CCK; regRRSR = RATE_ALL_CCK; break; case WIRELESS_MODE_A: regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ; regRATR = RATE_ALL_OFDM_AG; regRRSR = RATE_ALL_OFDM_AG; break; case WIRELESS_MODE_G: regBwOpMode = BW_OPMODE_20MHZ; regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; break; case WIRELESS_MODE_AUTO: if (Adapter->bInHctTest) { regBwOpMode = BW_OPMODE_20MHZ; regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; } else { regBwOpMode = BW_OPMODE_20MHZ; regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; } break; case WIRELESS_MODE_N_24G: // It support CCK rate by default. // CCK rate will be filtered out only when associated AP does not support it. regBwOpMode = BW_OPMODE_20MHZ; regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; break; case WIRELESS_MODE_N_5G: regBwOpMode = BW_OPMODE_5G; regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; regRRSR = RATE_ALL_OFDM_AG; break; default: //for MacOSX compiler warning. break; } // Ziv ???????? //PlatformEFIOWrite4Byte(Adapter, REG_INIRTS_RATE_SEL, regRRSR); PlatformEFIOWrite1Byte(Adapter, REG_BWOPMODE, regBwOpMode); #endif } // Set CCK and OFDM Block "ON" static VOID _BBTurnOnBlock( IN PADAPTER Adapter ) { #if (DISABLE_BB_RF) return; #endif PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1); PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1); } static VOID _RfPowerSave( IN PADAPTER Adapter ) { #if 0 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); u1Byte eRFPath; #if (DISABLE_BB_RF) return; #endif if(pMgntInfo->RegRfOff == TRUE){ // User disable RF via registry. RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): Turn off RF for RegRfOff.\n")); MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_SW); // Those action will be discard in MgntActSet_RF_State because off the same state for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) PHY_SetRFReg(Adapter, eRFPath, 0x4, 0xC00, 0x0); } else if(pMgntInfo->RfOffReason > RF_CHANGE_BY_PS){ // H/W or S/W RF OFF before sleep. RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): Turn off RF for RfOffReason(%ld).\n", pMgntInfo->RfOffReason)); MgntActSet_RF_State(Adapter, eRfOff, pMgntInfo->RfOffReason); } else{ pHalData->eRFPowerState = eRfOn; pMgntInfo->RfOffReason = 0; if(Adapter->bInSetPower || Adapter->bResetInProgress) PlatformUsbEnableInPipes(Adapter); RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): RF is on.\n")); } #endif } enum { Antenna_Lfet = 1, Antenna_Right = 2, }; static VOID _InitAntenna_Selection_8812A(IN PADAPTER Adapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); if(pHalData->AntDivCfg==0) return; DBG_8192C("==> %s ....\n",__FUNCTION__); rtw_write8(Adapter, REG_LEDCFG2, 0x82); PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); if(PHY_QueryBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == MAIN_ANT) pHalData->CurAntenna = MAIN_ANT; else pHalData->CurAntenna = AUX_ANT; DBG_8192C("%s,Cur_ant:(%x)%s\n",__FUNCTION__,pHalData->CurAntenna,(pHalData->CurAntenna == MAIN_ANT)?"MAIN_ANT":"AUX_ANT"); } // // 2010/08/26 MH Add for selective suspend mode check. // If Efuse 0x0e bit1 is not enabled, we can not support selective suspend for Minicard and // slim card. // static VOID HalDetectSelectiveSuspendMode( IN PADAPTER Adapter ) { #if 0 u8 tmpvalue; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); // If support HW radio detect, we need to enable WOL ability, otherwise, we // can not use FW to notify host the power state switch. EFUSE_ShadowRead(Adapter, 1, EEPROM_USB_OPTIONAL1, (u32 *)&tmpvalue); DBG_8192C("HalDetectSelectiveSuspendMode(): SS "); if(tmpvalue & BIT1) { DBG_8192C("Enable\n"); } else { DBG_8192C("Disable\n"); pdvobjpriv->RegUsbSS = _FALSE; } // 2010/09/01 MH According to Dongle Selective Suspend INF. We can switch SS mode. if (pdvobjpriv->RegUsbSS && !SUPPORT_HW_RADIO_DETECT(pHalData)) { //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); //if (!pMgntInfo->bRegDongleSS) //{ // RT_TRACE(COMP_INIT, DBG_LOUD, ("Dongle disable SS\n")); pdvobjpriv->RegUsbSS = _FALSE; //} } #endif } // HalDetectSelectiveSuspendMode rt_rf_power_state RfOnOffDetect(IN PADAPTER pAdapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(pAdapter); u8 val8; rt_rf_power_state rfpowerstate = rf_off; if(pwrctl->bHWPowerdown) { val8 = rtw_read8(pAdapter, REG_HSISR); DBG_8192C("pwrdown, 0x5c(BIT7)=%02x\n", val8); rfpowerstate = (val8 & BIT7) ? rf_off: rf_on; } else // rf on/off { rtw_write8( pAdapter, REG_MAC_PINMUX_CFG,rtw_read8(pAdapter, REG_MAC_PINMUX_CFG)&~(BIT3)); val8 = rtw_read8(pAdapter, REG_GPIO_IO_SEL); DBG_8192C("GPIO_IN=%02x\n", val8); rfpowerstate = (val8 & BIT3) ? rf_on : rf_off; } return rfpowerstate; } // HalDetectPwrDownMode void _ps_open_RF(_adapter *padapter) { //here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified //phy_SsPwrSwitch92CU(padapter, rf_on, 1); } void _ps_close_RF(_adapter *padapter){ //here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified //phy_SsPwrSwitch92CU(padapter, rf_off, 1); } /* A lightweight deinit function */ static void rtl8812au_hw_reset(_adapter *Adapter) { u8 reg_val=0; if(rtw_read8(Adapter, REG_MCUFWDL)&BIT7) { _8051Reset8812(Adapter); rtw_write8(Adapter, REG_MCUFWDL, 0x00); //before BB reset should do clock gated rtw_write32(Adapter, rFPGA0_XCD_RFPara, rtw_read32(Adapter, rFPGA0_XCD_RFPara)|(BIT6)); //reset BB reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN); reg_val &= ~(BIT(0) | BIT(1)); rtw_write8(Adapter, REG_SYS_FUNC_EN, reg_val); //reset RF rtw_write8(Adapter, REG_RF_CTRL, 0); //reset TRX path rtw_write16(Adapter, REG_CR, 0); //reset MAC reg_val = rtw_read8(Adapter, REG_APS_FSMCO+1); reg_val |= BIT(1); reg_val = rtw_write8(Adapter, REG_APS_FSMCO+1, reg_val); //reg0x5[1] ,auto FSM off reg_val = rtw_read8(Adapter, REG_APS_FSMCO+1); //check if reg0x5[1] auto cleared while(reg_val & BIT(1)){ rtw_udelay_os(1); reg_val = rtw_read8(Adapter, REG_APS_FSMCO+1); } reg_val |= BIT(0); reg_val = rtw_write8(Adapter, REG_APS_FSMCO+1, reg_val); //reg0x5[0] ,auto FSM on reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); reg_val &= ~(BIT(4) | BIT(7)); rtw_write8(Adapter, REG_SYS_FUNC_EN+1, reg_val); reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); reg_val |= BIT(4) | BIT(7); rtw_write8(Adapter, REG_SYS_FUNC_EN+1, reg_val); } } u32 rtl8812au_hal_init(PADAPTER Adapter) { u8 value8 = 0, u1bRegCR; u16 value16; u8 txpktbuf_bndy; u32 status = _SUCCESS; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter); struct registry_priv *pregistrypriv = &Adapter->registrypriv; rt_rf_power_state eRfPowerStateToSet; u32 init_start_time = rtw_get_current_time(); #ifdef DBG_HAL_INIT_PROFILING enum HAL_INIT_STAGES { HAL_INIT_STAGES_BEGIN = 0, HAL_INIT_STAGES_INIT_PW_ON, HAL_INIT_STAGES_INIT_LLTT, HAL_INIT_STAGES_DOWNLOAD_FW, HAL_INIT_STAGES_MAC, HAL_INIT_STAGES_MISC01, HAL_INIT_STAGES_MISC02, HAL_INIT_STAGES_BB, HAL_INIT_STAGES_RF, HAL_INIT_STAGES_TURN_ON_BLOCK, HAL_INIT_STAGES_INIT_SECURITY, HAL_INIT_STAGES_MISC11, HAL_INIT_STAGES_INIT_HAL_DM, //HAL_INIT_STAGES_RF_PS, HAL_INIT_STAGES_IQK, HAL_INIT_STAGES_PW_TRACK, HAL_INIT_STAGES_LCK, HAL_INIT_STAGES_MISC21, //HAL_INIT_STAGES_INIT_PABIAS, #ifdef CONFIG_BT_COEXIST HAL_INIT_STAGES_BT_COEXIST, #endif //HAL_INIT_STAGES_ANTENNA_SEL, HAL_INIT_STAGES_MISC31, HAL_INIT_STAGES_END, HAL_INIT_STAGES_NUM }; char * hal_init_stages_str[] = { "HAL_INIT_STAGES_BEGIN", "HAL_INIT_STAGES_INIT_PW_ON", "HAL_INIT_STAGES_INIT_LLTT", "HAL_INIT_STAGES_DOWNLOAD_FW", "HAL_INIT_STAGES_MAC", "HAL_INIT_STAGES_MISC01", "HAL_INIT_STAGES_MISC02", "HAL_INIT_STAGES_BB", "HAL_INIT_STAGES_RF", "HAL_INIT_STAGES_TURN_ON_BLOCK", "HAL_INIT_STAGES_INIT_SECURITY", "HAL_INIT_STAGES_MISC11", "HAL_INIT_STAGES_INIT_HAL_DM", //"HAL_INIT_STAGES_RF_PS", "HAL_INIT_STAGES_IQK", "HAL_INIT_STAGES_PW_TRACK", "HAL_INIT_STAGES_LCK", "HAL_INIT_STAGES_MISC21", #ifdef CONFIG_BT_COEXIST "HAL_INIT_STAGES_BT_COEXIST", #endif //"HAL_INIT_STAGES_ANTENNA_SEL", "HAL_INIT_STAGES_MISC31", "HAL_INIT_STAGES_END", }; int hal_init_profiling_i; u32 hal_init_stages_timestamp[HAL_INIT_STAGES_NUM]; //used to record the time of each stage's starting point for(hal_init_profiling_i=0;hal_init_profiling_ibkeepfwalive) { _ps_open_RF(Adapter); if(pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized){ //PHY_IQCalibrate_8812A(Adapter,_TRUE); } else { //PHY_IQCalibrate_8812A(Adapter,_FALSE); //pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized = _TRUE; } //ODM_TXPowerTrackingCheck(&pHalData->odmpriv ); //PHY_LCCalibrate_8812A(Adapter); goto exit; } // Check if MAC has already power on. by tynli. 2011.05.27. value8 = rtw_read8(Adapter, REG_SYS_CLKR+1); u1bRegCR = PlatformEFIORead1Byte(Adapter, REG_CR); DBG_871X(" power-on :REG_SYS_CLKR 0x09=0x%02x. REG_CR 0x100=0x%02x.\n", value8, u1bRegCR); if((value8&BIT3) && (u1bRegCR != 0 && u1bRegCR != 0xEA)) { //pHalData->bMACFuncEnable = TRUE; DBG_871X(" MAC has already power on.\n"); } else { //pHalData->bMACFuncEnable = FALSE; // Set FwPSState to ALL_ON mode to prevent from the I/O be return because of 32k // state which is set before sleep under wowlan mode. 2012.01.04. by tynli. //pHalData->FwPSState = FW_PS_STATE_ALL_ON_88E; DBG_871X(" MAC has not been powered on yet.\n"); } // // 2012/11/13 MH Revise for U2/U3 switch we can not update RF-A/B reset. // After discuss with BB team YN, reset after MAC power on to prevent RF // R/W error. Is it a right method? // if(!IS_HARDWARE_TYPE_8821(Adapter)) { rtw_write8(Adapter, REG_RF_CTRL, 5); rtw_write8(Adapter, REG_RF_CTRL, 7); rtw_write8(Adapter, REG_RF_B_CTRL_8812, 5); rtw_write8(Adapter, REG_RF_B_CTRL_8812, 7); } /* If HW didn't go through a complete de-initial procedure, it probably occurs some problem for double initial procedure. Like "CONFIG_DEINIT_BEFORE_INIT" in 92du chip */ rtl8812au_hw_reset(Adapter); HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON); status = _InitPowerOn_8812AU(Adapter); if(status == _FAIL){ RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n")); goto exit; } HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT); if (!pregistrypriv->wifi_spec) { if(IS_HARDWARE_TYPE_8812(Adapter)) txpktbuf_bndy = TX_PAGE_BOUNDARY_8812; else txpktbuf_bndy = TX_PAGE_BOUNDARY_8821; } else { // for WMM if(IS_HARDWARE_TYPE_8812(Adapter)) txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_8812; else txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_8821; } status = InitLLTTable8812A(Adapter, txpktbuf_bndy); if(status == _FAIL){ RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT table\n")); goto exit; } _InitHardwareDropIncorrectBulkOut_8812A(Adapter); if(pHalData->bRDGEnable){ _InitRDGSetting_8812A(Adapter); } HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW); #if (MP_DRIVER == 1) if (Adapter->registrypriv.mp_mode == 1) { _InitRxSetting_8812AU(Adapter); } #endif //MP_DRIVER == 1 { status = FirmwareDownload8812(Adapter, _FALSE); if (status != _SUCCESS) { DBG_871X("%s: Download Firmware failed!!\n", __FUNCTION__); Adapter->bFWReady = _FALSE; pHalData->fw_ractrl = _FALSE; //return status; } else { DBG_871X("%s: Download Firmware Success!!\n",__FUNCTION__); Adapter->bFWReady = _TRUE; pHalData->fw_ractrl = _TRUE; } } InitializeFirmwareVars8812(Adapter); if(pwrctrlpriv->reg_rfoff == _TRUE){ pwrctrlpriv->rf_pwrstate = rf_off; } // 2010/08/09 MH We need to check if we need to turnon or off RF after detecting // HW GPIO pin. Before PHY_RFConfig8192C. //HalDetectPwrDownMode(Adapter); // 2010/08/26 MH If Efuse does not support sective suspend then disable the function. //HalDetectSelectiveSuspendMode(Adapter); // Save target channel // Current Channel will be updated again later. pHalData->CurrentChannel = 0;//set 0 to trigger switch correct channel HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC); #if (HAL_MAC_ENABLE == 1) status = PHY_MACConfig8812(Adapter); if(status == _FAIL) { goto exit; } #endif HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01); if(IS_HARDWARE_TYPE_8812(Adapter)) { _InitQueueReservedPage_8812AUsb(Adapter); _InitTxBufferBoundary_8812AUsb(Adapter); } else if(IS_HARDWARE_TYPE_8821(Adapter)) { _InitQueueReservedPage_8821AUsb(Adapter); _InitTxBufferBoundary_8821AUsb(Adapter); } _InitQueuePriority_8812AUsb(Adapter); _InitPageBoundary_8812AUsb(Adapter); if(IS_HARDWARE_TYPE_8812(Adapter)) _InitTransferPageSize_8812AUsb(Adapter); HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02); // Get Rx PHY status in order to report RSSI and others. _InitDriverInfoSize_8812A(Adapter, DRVINFO_SZ); _InitInterrupt_8812AU(Adapter); _InitID_8812A(Adapter);//set mac_address _InitNetworkType_8812A(Adapter);//set msr _InitWMACSetting_8812A(Adapter); _InitAdaptiveCtrl_8812AUsb(Adapter); _InitEDCA_8812AUsb(Adapter); _InitRetryFunction_8812A(Adapter); init_UsbAggregationSetting_8812A(Adapter); _InitOperationMode_8812A(Adapter);//todo _InitBeaconParameters_8812A(Adapter); _InitBeaconMaxError_8812A(Adapter, _TRUE); _InitBurstPktLen(Adapter); //added by page. 20110919 // // Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch // Hw bug which Hw initials RxFF boundry size to a value which is larger than the real Rx buffer size in 88E. // 2011.08.05. by tynli. // value8 = rtw_read8(Adapter, REG_CR); rtw_write8(Adapter, REG_CR, (value8|MACTXEN|MACRXEN)); #if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_TX_MCAST2UNI) #ifdef CONFIG_CHECK_AC_LIFETIME // Enable lifetime check for the four ACs rtw_write8(Adapter, REG_LIFETIME_CTRL, 0x0F); #endif // CONFIG_CHECK_AC_LIFETIME #ifdef CONFIG_TX_MCAST2UNI rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); // unit: 256us. 256ms rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); // unit: 256us. 256ms #else // CONFIG_TX_MCAST2UNI rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x3000); // unit: 256us. 3s rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x3000); // unit: 256us. 3s #endif // CONFIG_TX_MCAST2UNI #endif // CONFIG_CONCURRENT_MODE || CONFIG_TX_MCAST2UNI #ifdef CONFIG_LED _InitHWLed(Adapter); #endif //CONFIG_LED // //d. Initialize BB related configurations. // HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB); #if (HAL_BB_ENABLE == 1) status = PHY_BBConfig8812(Adapter); if(status == _FAIL) { goto exit; } #endif // 92CU use 3-wire to r/w RF //pHalData->Rf_Mode = RF_OP_By_SW_3wire; HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF); #if (HAL_RF_ENABLE == 1) status = PHY_RFConfig8812(Adapter); if(status == _FAIL) { goto exit; } if(pHalData->rf_type == RF_1T1R && IS_HARDWARE_TYPE_8812AU(Adapter)) PHY_BB8812_Config_1T(Adapter); #endif if(Adapter->registrypriv.channel <= 14) PHY_SwitchWirelessBand8812(Adapter, BAND_ON_2_4G); else PHY_SwitchWirelessBand8812(Adapter, BAND_ON_5G); rtw_hal_set_chnl_bw(Adapter, Adapter->registrypriv.channel, CHANNEL_WIDTH_20, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HAL_PRIME_CHNL_OFFSET_DONT_CARE); HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK); HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY); invalidate_cam_all(Adapter); HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11); _InitAntenna_Selection_8812A(Adapter); // HW SEQ CTRL //set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. rtw_write8(Adapter,REG_HWSEQ_CTRL, 0xFF); // // Disable BAR, suggested by Scott // 2010.04.09 add by hpfan // rtw_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff); if(pregistrypriv->wifi_spec) rtw_write16(Adapter,REG_FAST_EDCA_CTRL ,0); //adjust EDCCA to avoid collision if(pregistrypriv->wifi_spec) { rtw_write16(Adapter, rEDCCA_Jaguar, 0xfe01); } //Nav limit , suggest by scott rtw_write8(Adapter, 0x652, 0x0); HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM); rtl8812_InitHalDm(Adapter); #if (MP_DRIVER == 1) if (Adapter->registrypriv.mp_mode == 1) { Adapter->mppriv.channel = pHalData->CurrentChannel; MPT_InitializeAdapter(Adapter, Adapter->mppriv.channel); } else #endif //#if (MP_DRIVER == 1) { // // 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status // and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not // call init_adapter. May cause some problem?? // // Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed // in MgntActSet_RF_State() after wake up, because the value of pHalData->eRFPowerState // is the same as eRfOff, we should change it to eRfOn after we config RF parameters. // Added by tynli. 2010.03.30. pwrctrlpriv->rf_pwrstate = rf_on; #if 0 //to do RT_CLEAR_PS_LEVEL(pwrctrlpriv, RT_RF_OFF_LEVL_HALT_NIC); #if 1 //Todo // 20100326 Joseph: Copy from GPIOChangeRFWorkItemCallBack() function to check HW radio on/off. // 20100329 Joseph: Revise and integrate the HW/SW radio off code in initialization. eRfPowerStateToSet = (rt_rf_power_state) RfOnOffDetect(Adapter); pwrctrlpriv->rfoff_reason |= eRfPowerStateToSet==rf_on ? RF_CHANGE_BY_INIT : RF_CHANGE_BY_HW; pwrctrlpriv->rfoff_reason |= (pwrctrlpriv->reg_rfoff) ? RF_CHANGE_BY_SW : 0; if(pwrctrlpriv->rfoff_reason&RF_CHANGE_BY_HW) pwrctrlpriv->b_hw_radio_off = _TRUE; DBG_8192C("eRfPowerStateToSet=%d\n", eRfPowerStateToSet); if(pwrctrlpriv->reg_rfoff == _TRUE) { // User disable RF via registry. DBG_8192C("InitializeAdapter8192CU(): Turn off RF for RegRfOff.\n"); //MgntActSet_RF_State(Adapter, rf_off, RF_CHANGE_BY_SW, _TRUE); // Those action will be discard in MgntActSet_RF_State because off the same state //for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) //PHY_SetRFReg(Adapter, eRFPath, 0x4, 0xC00, 0x0); } else if(pwrctrlpriv->rfoff_reason > RF_CHANGE_BY_PS) { // H/W or S/W RF OFF before sleep. DBG_8192C(" Turn off RF for RfOffReason(%x) ----------\n", pwrctrlpriv->rfoff_reason); //pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; pwrctrlpriv->rf_pwrstate = rf_on; //MgntActSet_RF_State(Adapter, rf_off, pwrctrlpriv->rfoff_reason, _TRUE); } else { // Perform GPIO polling to find out current RF state. added by Roger, 2010.04.09. if(pHalData->BoardType == BOARD_MINICARD /*&& (Adapter->MgntInfo.PowerSaveControl.bGpioRfSw)*/) { DBG_8192C("InitializeAdapter8192CU(): RF=%d \n", eRfPowerStateToSet); if (eRfPowerStateToSet == rf_off) { //MgntActSet_RF_State(Adapter, rf_off, RF_CHANGE_BY_HW, _TRUE); pwrctrlpriv->b_hw_radio_off = _TRUE; } else { pwrctrlpriv->rf_pwrstate = rf_off; pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; pwrctrlpriv->b_hw_radio_off = _FALSE; //MgntActSet_RF_State(Adapter, rf_on, pwrctrlpriv->rfoff_reason, _TRUE); } } else { pwrctrlpriv->rf_pwrstate = rf_off; pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; //MgntActSet_RF_State(Adapter, rf_on, pwrctrlpriv->rfoff_reason, _TRUE); } pwrctrlpriv->rfoff_reason = 0; pwrctrlpriv->b_hw_radio_off = _FALSE; pwrctrlpriv->rf_pwrstate = rf_on; rtw_led_control(Adapter, LED_CTL_POWER_ON); } // 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. // Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. if(pHalData->pwrdown && eRfPowerStateToSet == rf_off) { // Enable register area 0x0-0xc. rtw_write8(Adapter, REG_RSV_CTRL, 0x0); // // We should configure HW PDn source for WiFi ONLY, and then // our HW will be set in power-down mode if PDn source from all functions are configured. // 2010.10.06. // //if(IS_HARDWARE_TYPE_8723AU(Adapter)) //{ // u1bTmp = rtw_read8(Adapter, REG_MULTI_FUNC_CTRL); // rtw_write8(Adapter, REG_MULTI_FUNC_CTRL, (u1bTmp|WL_HWPDN_EN)); //} //else //{ rtw_write16(Adapter, REG_APS_FSMCO, 0x8812); //} } //DrvIFIndicateCurrentPhyStatus(Adapter); // 2010/08/17 MH Disable to prevent BSOD. #endif #endif //0x4c6[3] 1: RTS BW = Data BW //0: RTS BW depends on CCA / secondary CCA result. rtw_write8(Adapter, REG_QUEUE_CTRL, rtw_read8(Adapter, REG_QUEUE_CTRL)&0xF7); // enable Tx report. rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+1, 0x0F); // Suggested by SD1 pisa. Added by tynli. 2011.10.21. rtw_write8(Adapter, REG_EARLY_MODE_CONTROL_8812+3, 0x01);//Pretx_en, for WEP/TKIP SEC //tynli_test_tx_report. rtw_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0); // Reset USB mode switch setting rtw_write8(Adapter, REG_SDIO_CTRL_8812, 0x0); rtw_write8(Adapter, REG_ACLK_MON, 0x0); //RT_TRACE(COMP_INIT, DBG_TRACE, ("InitializeAdapter8188EUsb() <====\n")); HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); // 2010/08/26 MH Merge from 8192CE. if(pwrctrlpriv->rf_pwrstate == rf_on) { /* if(IS_HARDWARE_TYPE_8812AU(Adapter)) { #if (RTL8812A_SUPPORT == 1) pHalData->odmpriv.RFCalibrateInfo.bNeedIQK = _TRUE; if(pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized) PHY_IQCalibrate_8812A(Adapter, _TRUE); else { PHY_IQCalibrate_8812A(Adapter, _FALSE); pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized = _TRUE; } #endif }*/ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK); //ODM_TXPowerTrackingCheck(&pHalData->odmpriv ); HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK); //PHY_LCCalibrate_8812A(Adapter); } } HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC21); //HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); // _InitPABias(Adapter); #ifdef CONFIG_BT_COEXIST HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BT_COEXIST); //_InitBTCoexist(Adapter); #endif // 2010/08/23 MH According to Alfred's suggestion, we need to to prevent HW enter // suspend mode automatically. //HwSuspendModeEnable92Cu(Adapter, _FALSE); #ifdef CONFIG_BT_COEXIST // Init BT hw config. rtw_btcoex_HAL_Initialize(Adapter, _FALSE); #endif HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC31); rtw_write8(Adapter, REG_USB_HRPWM, 0); #ifdef CONFIG_XMIT_ACK //ack for xmit mgmt frames. rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, rtw_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12)); #endif //CONFIG_XMIT_ACK //misc { int i; u8 mac_addr[6]; for(i=0; i<6; i++) { #ifdef CONFIG_CONCURRENT_MODE if(Adapter->iface_type == IFACE_PORT1) mac_addr[i] = rtw_read8(Adapter, REG_MACID1+i); else #endif mac_addr[i] = rtw_read8(Adapter, REG_MACID+i); } DBG_8192C("MAC Address from REG_MACID = "MAC_FMT"\n", MAC_ARG(mac_addr)); } exit: HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END); DBG_871X("%s in %dms\n", __FUNCTION__, rtw_get_passing_time_ms(init_start_time)); #ifdef DBG_HAL_INIT_PROFILING hal_init_stages_timestamp[HAL_INIT_STAGES_END]=rtw_get_current_time(); for(hal_init_profiling_i=0;hal_init_profiling_ibFWReady) //8051 RAM code { _8051Reset8812(Adapter); } // Reset MCU. Suggested by Filen. 2011.01.26. by tynli. u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); rtw_write8(Adapter, REG_SYS_FUNC_EN+1, (u1bTmp&(~BIT2))); // MCUFWDL 0x80[1:0]=0 // reset MCU ready status rtw_write8(Adapter, REG_MCUFWDL, 0x00); // Card disable power action flow if(IS_HARDWARE_TYPE_8821U(Adapter)) HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8821A_NIC_DISABLE_FLOW); else HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8812_NIC_DISABLE_FLOW); bMacPwrCtrlOn = _FALSE; rtw_hal_set_hwreg(Adapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); } static void rtl8812au_hw_power_down(_adapter *padapter) { // 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. // Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. // Enable register area 0x0-0xc. rtw_write8(padapter,REG_RSV_CTRL, 0x0); rtw_write16(padapter, REG_APS_FSMCO, 0x8812); } u32 rtl8812au_hal_deinit(PADAPTER Adapter) { struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); DBG_8192C("==> %s \n",__FUNCTION__); #ifdef CONFIG_BT_COEXIST if (hal_btcoex_IsBtExist(Adapter)) { DBG_871X("BT module enable SIC\n"); // Only under WIN7 we can support selective suspend and enter D3 state when system call halt adapter. //rtw_write16(Adapter, REG_GPIO_MUXCFG, rtw_read16(Adapter, REG_GPIO_MUXCFG)|BIT12); // 2010/10/13 MH If we enable SIC in the position and then call _ResetDigitalProcedure1. in XP, // the system will hang due to 8051 reset fail. } else #endif //CONFIG_BT_COEXIST { rtw_write16(Adapter, REG_GPIO_MUXCFG, rtw_read16(Adapter, REG_GPIO_MUXCFG)&(~BIT12)); } if(pHalData->bSupportUSB3 == _TRUE) { // set Reg 0xf008[3:4] to 2'11 to eable U1/U2 Mode in USB3.0. added by page, 20120712 rtw_write8(Adapter, 0xf008, rtw_read8(Adapter, 0xf008)|0x18); } rtw_write32(Adapter, REG_HISR0_8812, 0xFFFFFFFF); rtw_write32(Adapter, REG_HISR1_8812, 0xFFFFFFFF); rtw_write32(Adapter, REG_HIMR0_8812, IMR_DISABLED_8812); rtw_write32(Adapter, REG_HIMR1_8812, IMR_DISABLED_8812); #ifdef SUPPORT_HW_RFOFF_DETECTED DBG_8192C("bkeepfwalive(%x)\n", pwrctl->bkeepfwalive); if(pwrctl->bkeepfwalive) { _ps_close_RF(Adapter); if((pwrctl->bHWPwrPindetect) && (pwrctl->bHWPowerdown)) rtl8812au_hw_power_down(Adapter); } else #endif { if(Adapter->hw_init_completed == _TRUE){ hal_poweroff_8812au(Adapter); if((pwrctl->bHWPwrPindetect ) && (pwrctl->bHWPowerdown)) rtl8812au_hw_power_down(Adapter); } } return _SUCCESS; } unsigned int rtl8812au_inirp_init(PADAPTER Adapter) { u8 i; struct recv_buf *precvbuf; uint status; struct dvobj_priv *pdev= adapter_to_dvobj(Adapter); struct intf_hdl * pintfhdl=&Adapter->iopriv.intf; struct recv_priv *precvpriv = &(Adapter->recvpriv); u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); #ifdef CONFIG_USB_INTERRUPT_IN_PIPE HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr); #endif _func_enter_; _read_port = pintfhdl->io_ops._read_port; status = _SUCCESS; RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("===> usb_inirp_init \n")); precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR; //issue Rx irp to receive data precvbuf = (struct recv_buf *)precvpriv->precv_buf; for(i=0; iff_hwaddr, 0, (unsigned char *)precvbuf) == _FALSE ) { RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_port error \n")); status = _FAIL; goto exit; } precvbuf++; precvpriv->free_recv_buf_queue_cnt--; } #ifdef CONFIG_USB_INTERRUPT_IN_PIPE if(pHalData->RtIntInPipe != 0x05) { status = _FAIL; DBG_871X("%s =>Warning !! Have not USB Int-IN pipe, pHalData->RtIntInPipe(%d)!!!\n",__FUNCTION__,pHalData->RtIntInPipe); goto exit; } _read_interrupt = pintfhdl->io_ops._read_interrupt; if(_read_interrupt(pintfhdl, RECV_INT_IN_ADDR) == _FALSE ) { RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_interrupt error \n")); status = _FAIL; } #endif exit: RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("<=== usb_inirp_init \n")); _func_exit_; return status; } unsigned int rtl8812au_inirp_deinit(PADAPTER Adapter) { RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n ===> usb_rx_deinit \n")); rtw_read_port_cancel(Adapter); RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n <=== usb_rx_deinit \n")); return _SUCCESS; } //------------------------------------------------------------------- // // EEPROM/EFUSE Content Parsing // //------------------------------------------------------------------- VOID hal_ReadIDs_8812AU( IN PADAPTER Adapter, IN pu1Byte PROMContent, IN BOOLEAN AutoloadFail ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); if( !AutoloadFail ) { // VID, PID if(IS_HARDWARE_TYPE_8812AU(Adapter)) { pHalData->EEPROMVID = EF2Byte( *(u16 *)&PROMContent[EEPROM_VID_8812AU] ); pHalData->EEPROMPID = EF2Byte( *(u16 *)&PROMContent[EEPROM_PID_8812AU] ); } else if (IS_HARDWARE_TYPE_8821U(Adapter)) { pHalData->EEPROMVID = EF2Byte( *(u16 *)&PROMContent[EEPROM_VID_8821AU] ); pHalData->EEPROMPID = EF2Byte( *(u16 *)&PROMContent[EEPROM_PID_8821AU] ); } // Customer ID, 0x00 and 0xff are reserved for Realtek. pHalData->EEPROMCustomerID = *(u8 *)&PROMContent[EEPROM_CustomID_8812]; pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; } else { pHalData->EEPROMVID = EEPROM_Default_VID; pHalData->EEPROMPID = EEPROM_Default_PID; // Customer ID, 0x00 and 0xff are reserved for Realtek. pHalData->EEPROMCustomerID = EEPROM_Default_CustomerID; pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; } if((pHalData->EEPROMVID == 0x050D) && (pHalData->EEPROMPID == 0x1106))// SerComm for Belkin. pEEPROM->CustomerID = RT_CID_819x_Sercomm_Belkin; else if((pHalData->EEPROMVID == 0x0846) && (pHalData->EEPROMPID == 0x9051))// SerComm for Netgear. pEEPROM->CustomerID = RT_CID_819x_Sercomm_Netgear; else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330e))//add by ylb 20121012 for customer led for alpha pEEPROM->CustomerID = RT_CID_819x_ALPHA_Dlink; else if((pHalData->EEPROMVID == 0x0B05) && (pHalData->EEPROMPID == 0x17D2))//Edimax for ASUS pEEPROM->CustomerID = RT_CID_819x_Edimax_ASUS; else if ((pHalData->EEPROMVID == 0x0846) &&(pHalData->EEPROMPID == 0x9052)) pEEPROM->CustomerID = RT_CID_NETGEAR; else if ((pHalData->EEPROMVID == 0x0411) && ((pHalData->EEPROMPID == 0x0242) || (pHalData->EEPROMPID == 0x025D))) pEEPROM->CustomerID = RT_CID_DNI_BUFFALO; else if (((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3314)) || ((pHalData->EEPROMVID == 0x20F4) &&(pHalData->EEPROMPID == 0x804B)) || ((pHalData->EEPROMVID == 0x20F4) &&(pHalData->EEPROMPID == 0x805B)) || ((pHalData->EEPROMVID == 0x2001) &&(pHalData->EEPROMPID == 0x3315)) || ((pHalData->EEPROMVID == 0x2001) &&(pHalData->EEPROMPID == 0x3316))) pEEPROM->CustomerID = RT_CID_DLINK; DBG_871X("VID = 0x%04X, PID = 0x%04X\n", pHalData->EEPROMVID, pHalData->EEPROMPID); DBG_871X("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", pHalData->EEPROMCustomerID, pHalData->EEPROMSubCustomerID); } VOID hal_ReadMACAddress_8812AU( IN PADAPTER Adapter, IN u8* PROMContent, IN BOOLEAN AutoloadFail ) { EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); if(_FALSE == AutoloadFail) { if(IS_HARDWARE_TYPE_8812AU(Adapter)) { //Read Permanent MAC address and set value to hardware _rtw_memcpy(pEEPROM->mac_addr, &PROMContent[EEPROM_MAC_ADDR_8812AU], ETH_ALEN); } else if(IS_HARDWARE_TYPE_8821U(Adapter)) { //Read Permanent MAC address and set value to hardware _rtw_memcpy(pEEPROM->mac_addr, &PROMContent[EEPROM_MAC_ADDR_8821AU], ETH_ALEN); } } else { //Random assigh MAC address u8 sMacAddr[ETH_ALEN] = {0x00, 0xE0, 0x4C, 0x88, 0x12, 0x00}; //sMacAddr[5] = (u8)GetRandomNumber(1, 254); _rtw_memcpy(pEEPROM->mac_addr, sMacAddr, ETH_ALEN); } DBG_8192C("%s MAC Address from EFUSE = "MAC_FMT"\n",__FUNCTION__, MAC_ARG(pEEPROM->mac_addr)); } VOID hal_InitPGData_8812A( IN PADAPTER padapter, IN OUT u8* PROMContent ) { EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); // HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); u32 i; u16 value16; if(_FALSE == pEEPROM->bautoload_fail_flag) { // autoload OK. if (is_boot_from_eeprom(padapter)) { // Read all Content from EEPROM or EFUSE. for(i = 0; i < HWSET_MAX_SIZE_JAGUAR; i += 2) { //value16 = EF2Byte(ReadEEprom(pAdapter, (u2Byte) (i>>1))); //*((u16*)(&PROMContent[i])) = value16; } } else { // // 2013/03/08 MH Add for 8812A HW limitation, ROM code can only // if (IS_HARDWARE_TYPE_8812AU(padapter)) { u8 efuse_content[4]; efuse_OneByteRead(padapter, 0x200, &efuse_content[0], _FALSE); efuse_OneByteRead(padapter, 0x202, &efuse_content[1], _FALSE); efuse_OneByteRead(padapter, 0x204, &efuse_content[2], _FALSE); efuse_OneByteRead(padapter, 0x210, &efuse_content[3], _FALSE); if (efuse_content[0] != 0xFF || efuse_content[1] != 0xFF || efuse_content[2] != 0xFF || efuse_content[3] != 0xFF) { //DbgPrint("Disable FW ofl load\n"); //pMgntInfo->RegFWOffload = FALSE; } } // Read EFUSE real map to shadow. EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); } } else {//autoload fail RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("AutoLoad Fail reported from CR9346!!\n")); //pHalData->AutoloadFailFlag = _TRUE; // // 2013/03/08 MH Add for 8812A HW limitation, ROM code can only // if (IS_HARDWARE_TYPE_8812AU(padapter)) { u8 efuse_content[4]; efuse_OneByteRead(padapter, 0x200, &efuse_content[0], _FALSE); efuse_OneByteRead(padapter, 0x202, &efuse_content[1], _FALSE); efuse_OneByteRead(padapter, 0x204, &efuse_content[2], _FALSE); efuse_OneByteRead(padapter, 0x210, &efuse_content[3], _FALSE); if (efuse_content[0] != 0xFF || efuse_content[1] != 0xFF || efuse_content[2] != 0xFF || efuse_content[3] != 0xFF) { //DbgPrint("Disable FW ofl load\n"); //pMgntInfo->RegFWOffload = FALSE; pEEPROM->bautoload_fail_flag=_FALSE; } else { //DbgPrint("EFUSE_Read1Byte(pAdapter, (u2Byte)512) = %x\n", EFUSE_Read1Byte(pAdapter, (u2Byte)512)); } } //update to default value 0xFF if (!is_boot_from_eeprom(padapter)) EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); } } VOID hal_CustomizedBehavior_8812AU( IN PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); struct led_priv *pledpriv = &(Adapter->ledpriv); // Led mode switch(pEEPROM->CustomerID) { case RT_CID_DEFAULT: pledpriv->LedStrategy = SW_LED_MODE9; pledpriv->bRegUseLed = _TRUE; break; case RT_CID_819x_HP: pledpriv->LedStrategy = SW_LED_MODE6; // Customize Led mode break; case RT_CID_819x_Sercomm_Belkin: pledpriv->LedStrategy = SW_LED_MODE9; break; case RT_CID_819x_Sercomm_Netgear: pledpriv->LedStrategy = SW_LED_MODE10; break; case RT_CID_819x_ALPHA_Dlink://add by ylb 20121012 for customer led for alpha pledpriv->LedStrategy = SW_LED_MODE1; break; case RT_CID_819x_Edimax_ASUS: pledpriv->LedStrategy = SW_LED_MODE11; break; case RT_CID_WNC_NEC: pledpriv->LedStrategy = SW_LED_MODE12; break; case RT_CID_NETGEAR: pledpriv->LedStrategy = SW_LED_MODE13; break; case RT_CID_DNI_BUFFALO: pledpriv->LedStrategy = SW_LED_MODE14; break; case RT_CID_DLINK: pledpriv->LedStrategy = SW_LED_MODE15; break; default: pledpriv->LedStrategy = SW_LED_MODE9; break; } pHalData->bLedOpenDrain = _TRUE;// Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. } static void hal_CustomizeByCustomerID_8812AU( IN PADAPTER pAdapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); // For customized behavior. if((pHalData->EEPROMVID == 0x103C) && (pHalData->EEPROMPID == 0x1629))// HP Lite-On for RTL8188CUS Slim Combo. pEEPROM->CustomerID = RT_CID_819x_HP; else if ((pHalData->EEPROMVID == 0x9846) && (pHalData->EEPROMPID == 0x9041)) pEEPROM->CustomerID = RT_CID_NETGEAR; else if ((pHalData->EEPROMVID == 0x2019) && (pHalData->EEPROMPID == 0x1201)) pEEPROM->CustomerID = RT_CID_PLANEX; else if((pHalData->EEPROMVID == 0x0BDA) &&(pHalData->EEPROMPID == 0x5088)) pEEPROM->CustomerID = RT_CID_CC_C; else if ((pHalData->EEPROMVID == 0x0411) && ((pHalData->EEPROMPID == 0x0242) || (pHalData->EEPROMPID == 0x025D))) pEEPROM->CustomerID = RT_CID_DNI_BUFFALO; else if (((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3314)) || ((pHalData->EEPROMVID == 0x20F4) &&(pHalData->EEPROMPID == 0x804B)) || ((pHalData->EEPROMVID == 0x20F4) &&(pHalData->EEPROMPID == 0x805B)) || ((pHalData->EEPROMVID == 0x2001) &&(pHalData->EEPROMPID == 0x3315)) || ((pHalData->EEPROMVID == 0x2001) &&(pHalData->EEPROMPID == 0x3316))) pEEPROM->CustomerID = RT_CID_DLINK; DBG_871X("PID= 0x%x, VID= %x\n",pHalData->EEPROMPID,pHalData->EEPROMVID); // Decide CustomerID according to VID/DID or EEPROM switch(pHalData->EEPROMCustomerID) { case EEPROM_CID_DEFAULT: if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3308)) pEEPROM->CustomerID = RT_CID_DLINK; else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3309)) pEEPROM->CustomerID = RT_CID_DLINK; else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a)) pEEPROM->CustomerID = RT_CID_DLINK; else if((pHalData->EEPROMVID == 0x0BFF) && (pHalData->EEPROMPID == 0x8160)) { //pHalData->bAutoConnectEnable = _FALSE; pEEPROM->CustomerID = RT_CID_CHINA_MOBILE; } else if((pHalData->EEPROMVID == 0x0BDA) && (pHalData->EEPROMPID == 0x5088)) pEEPROM->CustomerID = RT_CID_CC_C; else if ((pHalData->EEPROMVID == 0x0846) &&(pHalData->EEPROMPID == 0x9052)) pEEPROM->CustomerID = RT_CID_NETGEAR; else if ((pHalData->EEPROMVID == 0x0411) && ((pHalData->EEPROMPID == 0x0242) || (pHalData->EEPROMPID == 0x025D))) pEEPROM->CustomerID = RT_CID_DNI_BUFFALO; else if (((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3314)) || ((pHalData->EEPROMVID == 0x20F4) &&(pHalData->EEPROMPID == 0x804B)) || ((pHalData->EEPROMVID == 0x20F4) &&(pHalData->EEPROMPID == 0x805B)) || ((pHalData->EEPROMVID == 0x2001) &&(pHalData->EEPROMPID == 0x3315)) || ((pHalData->EEPROMVID == 0x2001) &&(pHalData->EEPROMPID == 0x3316))) pEEPROM->CustomerID = RT_CID_DLINK; DBG_871X("PID= 0x%x, VID= %x\n",pHalData->EEPROMPID,pHalData->EEPROMVID); break; case EEPROM_CID_WHQL: //padapter->bInHctTest = TRUE; //pMgntInfo->bSupportTurboMode = FALSE; //pMgntInfo->bAutoTurboBy8186 = FALSE; //pMgntInfo->PowerSaveControl.bInactivePs = FALSE; //pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; //pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; //pMgntInfo->PowerSaveControl.bLeisurePsModeBackup = FALSE; //pMgntInfo->keepAliveLevel = 0; //padapter->bUnloadDriverwhenS3S4 = FALSE; break; default: pEEPROM->CustomerID = RT_CID_DEFAULT; break; } DBG_871X("Customer ID: 0x%2x\n", pEEPROM->CustomerID); hal_CustomizedBehavior_8812AU(pAdapter); } VOID hal_ReadUsbModeSwitch_8812AU( IN PADAPTER Adapter, IN u8* PROMContent, IN BOOLEAN AutoloadFail ) { #if 0 if(AutoloadFail) { UsbModeSwitch_SetUsbModeMechOn(Adapter, FALSE); } else { UsbModeSwitch_SetUsbModeMechOn(Adapter, ((PROMContent[8]&BIT1)>>1)); } #endif } static VOID ReadLEDSetting_8812AU( IN PADAPTER Adapter, IN u8* PROMContent, IN BOOLEAN AutoloadFail ) { struct led_priv *pledpriv = &(Adapter->ledpriv); #ifdef CONFIG_SW_LED pledpriv->bRegUseLed = _TRUE; #else // HW LED pledpriv->LedStrategy = HW_LED; #endif //CONFIG_SW_LED } VOID InitAdapterVariablesByPROM_8812AU( IN PADAPTER Adapter ) { EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); hal_InitPGData_8812A(Adapter, pEEPROM->efuse_eeprom_data); Hal_EfuseParseIDCode8812A(Adapter, pEEPROM->efuse_eeprom_data); Hal_ReadPROMVersion8812A(Adapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); hal_ReadIDs_8812AU(Adapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); hal_ReadMACAddress_8812AU(Adapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); Hal_ReadTxPowerInfo8812A(Adapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); Hal_ReadBoardType8812A(Adapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); // // Read Bluetooth co-exist and initialize // Hal_EfuseParseBTCoexistInfo8812A(Adapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); Hal_ReadChannelPlan8812A(Adapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); Hal_EfuseParseXtal_8812A(Adapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); Hal_ReadThermalMeter_8812A(Adapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); Hal_ReadRemoteWakeup_8812A(Adapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); Hal_ReadAntennaDiversity8812A(Adapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); if(IS_HARDWARE_TYPE_8821U(Adapter)) { Hal_ReadPAType_8821A(Adapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); } else { Hal_ReadAmplifierType_8812A(Adapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); Hal_ReadRFEType_8812A(Adapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); } hal_ReadUsbModeSwitch_8812AU(Adapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); hal_CustomizeByCustomerID_8812AU(Adapter); ReadLEDSetting_8812AU(Adapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); // 2013/04/15 MH Add for different board type recognize. hal_ReadUsbType_8812AU(Adapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); } static void Hal_ReadPROMContent_8812A( IN PADAPTER Adapter ) { EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); u8 eeValue; /* check system boot selection */ eeValue = rtw_read8(Adapter, REG_9346CR); pEEPROM->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE; pEEPROM->bautoload_fail_flag = (eeValue & EEPROM_EN) ? _FALSE : _TRUE; DBG_8192C("Boot from %s, Autoload %s !\n", (pEEPROM->EepromOrEfuse ? "EEPROM" : "EFUSE"), (pEEPROM->bautoload_fail_flag ? "Fail" : "OK") ); //pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE; InitAdapterVariablesByPROM_8812AU(Adapter); } VOID hal_CustomizedBehavior_8812AUsb( IN PADAPTER Adapter ) { #if 0 PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); // DTM test, we need to disable all power save mode. if(Adapter->bInHctTest) { pMgntInfo->PowerSaveControl.bInactivePs = FALSE; pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; pMgntInfo->PowerSaveControl.bLeisurePsModeBackup =FALSE; pMgntInfo->keepAliveLevel = 0; pMgntInfo->dot11CurrentChannelNumber = 10; pMgntInfo->Regdot11ChannelNumber = 10; } #endif } void ReadAdapterInfo8812AU( IN PADAPTER Adapter ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); DBG_871X("====> ReadAdapterInfo8812AU\n"); // Read all content in Efuse/EEPROM. Hal_ReadPROMContent_8812A(Adapter); // We need to define the RF type after all PROM value is recognized. ReadRFType8812A(Adapter); // 2011/02/09 MH We gather the same value for all USB series IC. hal_CustomizedBehavior_8812AUsb(Adapter); DBG_871X("ReadAdapterInfo8812AU <====\n"); } void UpdateInterruptMask8812AU(PADAPTER padapter,u8 bHIMR0 ,u32 AddMSR, u32 RemoveMSR) { HAL_DATA_TYPE *pHalData; u32 *himr; pHalData = GET_HAL_DATA(padapter); if(bHIMR0) himr = &(pHalData->IntrMask[0]); else himr = &(pHalData->IntrMask[1]); if (AddMSR) *himr |= AddMSR; if (RemoveMSR) *himr &= (~RemoveMSR); if(bHIMR0) rtw_write32(padapter, REG_HIMR0_8812, *himr); else rtw_write32(padapter, REG_HIMR1_8812, *himr); } void SetHwReg8812AU(PADAPTER Adapter, u8 variable, u8* val) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; DM_ODM_T *podmpriv = &pHalData->odmpriv; #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) struct wowlan_ioctl_param *poidparam; struct recv_buf *precvbuf; struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter); int res, i; u32 tmp; u16 len = 0; u8 mstatus = (*(u8 *)val); u8 trycnt = 100; u8 data[4]; #endif _func_enter_; switch(variable) { case HW_VAR_RXDMA_AGG_PG_TH: #ifdef CONFIG_USB_RX_AGGREGATION { /*u8 threshold = *((u8 *)val); if( threshold == 0) { threshold = pHalData->UsbRxAggPageCount; } rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);*/ } #endif break; case HW_VAR_SET_RPWM: #ifdef CONFIG_LPS_LCLK { u8 ps_state = *((u8 *)val); //rpwm value only use BIT0(clock bit) ,BIT6(Ack bit), and BIT7(Toggle bit) for 88e. //BIT0 value - 1: 32k, 0:40MHz. //BIT6 value - 1: report cpwm value after success set, 0:do not report. //BIT7 value - Toggle bit change. //modify by Thomas. 2012/4/2. ps_state = ps_state & 0xC1; //DBG_871X("##### Change RPWM value to = %x for switch clk #####\n",ps_state); rtw_write8(Adapter, REG_USB_HRPWM, ps_state); } #endif break; case HW_VAR_USB_MODE: if(*val == 1) rtw_write8(Adapter, REG_OPT_CTRL_8812, 0x4); else if(*val == 2) rtw_write8(Adapter, REG_OPT_CTRL_8812, 0x8); rtw_write8(Adapter, REG_SDIO_CTRL_8812, 0x2); rtw_write8(Adapter, REG_ACLK_MON, 0x1); // // 2013/01/29 MH Test with chunchu/cheng, in Alpha AMD platform. when // U2/U3 switch 8812AU will be recognized as another card and then // OS will treat it as a new card and assign a new GUID. Then SWUSB // service can not work well. We need to delay the card switch time to U3 // Then OS can unload the previous U2 port card and load new U3 port card later. // The strange sympton can disappear. // rtw_write8(Adapter, REG_CAL_TIMER+1, 0x40); //rtw_write8(Adapter, REG_CAL_TIMER+1, 0x3); rtw_write8(Adapter, REG_APS_FSMCO+1, 0x80); break; #ifdef CONFIG_AP_WOWLAN if (pwrctl->wowlan_ap_mode == _TRUE) { u8 ps_state = *((u8 *)val); DBG_871X("%s, RPWM\n", __func__); //rpwm value only use BIT0(clock bit) ,BIT6(Ack bit), and BIT7(Toggle bit) for 88e. //BIT0 value - 1: 32k, 0:40MHz. //BIT6 value - 1: report cpwm value after success set, 0:do not report. //BIT7 value - Toggle bit change. //modify by Thomas. 2012/4/2. ps_state = ps_state & 0xC1; //DBG_871X("##### Change RPWM value to = %x for switch clk #####\n",ps_state); rtw_write8(Adapter, REG_USB_HRPWM, ps_state); } #endif break; #ifdef CONFIG_WOWLAN case HW_VAR_WOWLAN: { poidparam = (struct wowlan_ioctl_param *)val; switch (poidparam->subcode){ case WOWLAN_ENABLE: DBG_871X_LEVEL(_drv_always_, "WOWLAN_ENABLE\n"); SetFwRelatedForWoWLAN8812(Adapter, _TRUE); //Set Pattern //if(pwrctl->wowlan_pattern==_TRUE) // rtw_wowlan_reload_pattern(Adapter); //RX DMA stop DBG_871X_LEVEL(_drv_always_, "Pause DMA\n"); rtw_write32(Adapter,REG_RXPKT_NUM,(rtw_read32(Adapter,REG_RXPKT_NUM)|RW_RELEASE_EN)); do{ if((rtw_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE)) { DBG_871X_LEVEL(_drv_always_, "RX_DMA_IDLE is true\n"); break; } else { // If RX_DMA is not idle, receive one pkt from DMA DBG_871X_LEVEL(_drv_always_, "RX_DMA_IDLE is not true\n"); } }while(trycnt--); if(trycnt ==0) DBG_871X_LEVEL(_drv_always_, "Stop RX DMA failed...... \n"); //Set WOWLAN H2C command. DBG_871X_LEVEL(_drv_always_, "Set WOWLan cmd\n"); rtl8812_set_wowlan_cmd(Adapter, 1); mstatus = rtw_read8(Adapter, REG_WOW_CTRL); trycnt = 10; while(!(mstatus&BIT1) && trycnt>1) { mstatus = rtw_read8(Adapter, REG_WOW_CTRL); DBG_871X_LEVEL(_drv_always_, "Loop index: %d :0x%02x\n", trycnt, mstatus); trycnt --; rtw_msleep_os(2); } pwrctl->wowlan_wake_reason = rtw_read8(Adapter, REG_MCUTST_WOWLAN); DBG_871X_LEVEL(_drv_always_, "wowlan_wake_reason: 0x%02x\n", pwrctl->wowlan_wake_reason); if (Adapter->intf_stop) Adapter->intf_stop(Adapter); // Invoid SE0 reset signal during suspending rtw_write8(Adapter, REG_RSV_CTRL, 0x20); rtw_write8(Adapter, REG_RSV_CTRL, 0x60); //rtw_msleep_os(10); break; case WOWLAN_DISABLE: DBG_871X_LEVEL(_drv_always_, "WOWLAN_DISABLE\n"); trycnt = 10; // 1. Read wakeup reason pwrctl->wowlan_wake_reason = rtw_read8(Adapter, REG_MCUTST_WOWLAN); DBG_871X_LEVEL(_drv_always_, "wakeup_reason: 0x%02x, mac_630=0x%08x, mac_634=0x%08x, mac_1c0=0x%08x, mac_1c4=0x%08x" ", mac_494=0x%08x, , mac_498=0x%08x, mac_49c=0x%08x, mac_608=0x%08x, mac_4a0=0x%08x, mac_4a4=0x%08x\n" ", mac_1cc=0x%08x, mac_2f0=0x%08x, mac_2f4=0x%08x, mac_2f8=0x%08x, mac_2fc=0x%08x, mac_8c=0x%08x, mac_1a8=0x%08x" , pwrctl->wowlan_wake_reason, rtw_read32(Adapter, 0x630), rtw_read32(Adapter, 0x634) , rtw_read32(Adapter, 0x1c0), rtw_read32(Adapter, 0x1c4) , rtw_read32(Adapter, 0x494), rtw_read32(Adapter, 0x498), rtw_read32(Adapter, 0x49c), rtw_read32(Adapter, 0x608) , rtw_read32(Adapter, 0x4a0), rtw_read32(Adapter, 0x4a4) , rtw_read32(Adapter, 0x1cc), rtw_read32(Adapter, 0x2f0), rtw_read32(Adapter, 0x2f4), rtw_read32(Adapter, 0x2f8) , rtw_read32(Adapter, 0x2fc), rtw_read32(Adapter, 0x8c), rtw_read32(Adapter, 0x1a8)); rtl8812_set_wowlan_cmd(Adapter, 0); mstatus = rtw_read8(Adapter, REG_WOW_CTRL); DBG_871X_LEVEL(_drv_info_, "%s mstatus:0x%02x\n", __func__, mstatus); while(mstatus&BIT1 && trycnt>1) { mstatus = rtw_read8(Adapter, REG_WOW_CTRL); DBG_871X_LEVEL(_drv_always_, "Loop index: %d :0x%02x\n", trycnt, mstatus); trycnt --; rtw_msleep_os(2); } if (mstatus & BIT1) printk("System did not release RX_DMA\n"); else SetFwRelatedForWoWLAN8812(Adapter, _FALSE); rtw_msleep_os(2); if(!(pwrctl->wowlan_wake_reason & FWDecisionDisconnect)) rtl8812_set_FwJoinBssReport_cmd(Adapter, 1); //rtw_msleep_os(10); break; default: break; } } break; #endif #ifdef CONFIG_AP_WOWLAN case HW_VAR_AP_WOWLAN: { poidparam = (struct wowlan_ioctl_param *)val; switch (poidparam->subcode) { case WOWLAN_AP_ENABLE: DBG_871X("%s, WOWLAN_AP_ENABLE\n", __func__); // 1. Download WOWLAN FW DBG_871X_LEVEL(_drv_always_, "Re-download WoWlan FW!\n"); #ifdef DBG_CHECK_FW_PS_STATE if(rtw_fw_ps_state(Adapter) == _FAIL) { pdbgpriv->dbg_enwow_dload_fw_fail_cnt++; DBG_871X_LEVEL(_drv_always_, "wowlan enable no leave 32k\n"); } #endif //DBG_CHECK_FW_PS_STATE do { if (rtw_read8(Adapter, REG_HMETFR) == 0x00) { DBG_871X_LEVEL(_drv_always_, "Ready to change FW.\n"); break; } rtw_msleep_os(10); DBG_871X_LEVEL(_drv_always_, "trycnt: %d\n", (100-trycnt)); } while (trycnt--); SetFwRelatedForWoWLAN8192E(Adapter, _TRUE); // 2. RX DMA stop DBG_871X_LEVEL(_drv_always_, "Pause DMA\n"); trycnt = 100; rtw_write32(Adapter,REG_RXPKT_NUM, (rtw_read32(Adapter,REG_RXPKT_NUM)|RW_RELEASE_EN)); do { if ((rtw_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE)) { DBG_871X_LEVEL(_drv_always_, "RX_DMA_IDLE is true\n"); if (Adapter->intf_stop) Adapter->intf_stop(Adapter); break; } else { // If RX_DMA is not idle, receive one pkt from DMA DBG_871X_LEVEL(_drv_always_, "RX_DMA_IDLE is not true\n"); } } while (trycnt--); if (trycnt == 0) DBG_871X_LEVEL(_drv_always_, "Stop RX DMA failed...... \n"); // 5. Set Enable WOWLAN H2C command. DBG_871X_LEVEL(_drv_always_, "Set Enable AP WOWLan cmd\n"); rtl8192e_set_ap_wowlan_cmd(Adapter, 1); // 6. add some delay for H2C cmd ready rtw_msleep_os(10); // 7. enable AP power save rtl8192e_set_ap_ps_wowlan_cmd(Adapter, 1); rtw_write8(Adapter, REG_MCUTST_WOWLAN, 0); // Invoid SE0 reset signal during suspending rtw_write8(Adapter, REG_RSV_CTRL, 0x20); rtw_write8(Adapter, REG_RSV_CTRL, 0x60); break; case WOWLAN_AP_DISABLE: DBG_871X("%s, WOWLAN_AP_DISABLE\n", __func__); // 1. Read wakeup reason pwrctl->wowlan_wake_reason = rtw_read8(Adapter, REG_MCUTST_WOWLAN); DBG_871X_LEVEL(_drv_always_, "wakeup_reason: 0x%02x\n", pwrctl->wowlan_wake_reason); // 2. diable AP power save rtl8192e_set_ap_ps_wowlan_cmd(Adapter, 0); // 3. Set Disable WOWLAN H2C command. DBG_871X_LEVEL(_drv_always_, "Set Disable WOWLan cmd\n"); rtl8192e_set_ap_wowlan_cmd(Adapter, 0); // 6. add some delay for H2C cmd ready rtw_msleep_os(2); #ifdef DBG_CHECK_FW_PS_STATE if (rtw_fw_ps_state(Adapter) == _FAIL) { pdbgpriv->dbg_diswow_dload_fw_fail_cnt++; DBG_871X_LEVEL(_drv_always_, "wowlan enable no leave 32k\n"); } #endif //DBG_CHECK_FW_PS_STATE DBG_871X_LEVEL(_drv_always_, "Release RXDMA\n"); rtw_write32(Adapter, REG_RXPKT_NUM, (rtw_read32(Adapter,REG_RXPKT_NUM) & (~RW_RELEASE_EN))); do { if (rtw_read8(Adapter, REG_HMETFR) == 0x00) { DBG_871X_LEVEL(_drv_always_, "Ready to change FW.\n"); break; } rtw_msleep_os(10); DBG_871X_LEVEL(_drv_always_, "trycnt: %d\n", (100-trycnt)); } while (trycnt--); SetFwRelatedForWoWLAN8192E(Adapter, _FALSE); #ifdef CONFIG_GPIO_WAKEUP DBG_871X_LEVEL(_drv_always_, "Set Wake GPIO to high for default.\n"); HalSetOutPutGPIO(Adapter, WAKEUP_GPIO_IDX, 1); #endif #ifdef CONFIG_CONCURRENT_MODE if (rtw_buddy_adapter_up(Adapter) == _TRUE && check_buddy_fwstate(Adapter, WIFI_AP_STATE) == _TRUE) { rtl8192e_set_FwJoinBssReport_cmd(Adapter->pbuddy_adapter, RT_MEDIA_CONNECT); issue_beacon(Adapter->pbuddy_adapter, 0); } else { rtl8192e_set_FwJoinBssReport_cmd(Adapter, RT_MEDIA_CONNECT); issue_beacon(Adapter, 0); } #else rtl8192e_set_FwJoinBssReport_cmd(Adapter, RT_MEDIA_CONNECT); issue_beacon(Adapter, 0); #endif break; default: break; } } break; #endif //CONFIG_AP_WOWLAN default: SetHwReg8812A(Adapter, variable, val); break; } _func_exit_; } void GetHwReg8812AU(PADAPTER Adapter, u8 variable, u8* val) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); DM_ODM_T *podmpriv = &pHalData->odmpriv; _func_enter_; switch(variable) { default: GetHwReg8812A(Adapter,variable,val); break; } _func_exit_; } // // Description: // Change default setting of specified variable. // u8 SetHalDefVar8812AUsb( IN PADAPTER Adapter, IN HAL_DEF_VARIABLE eVariable, IN PVOID pValue ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u8 bResult = _SUCCESS; switch(eVariable) { default: SetHalDefVar8812A(Adapter,eVariable,pValue); break; } return bResult; } // // Description: // Query setting of specified variable. // u8 GetHalDefVar8812AUsb( IN PADAPTER Adapter, IN HAL_DEF_VARIABLE eVariable, IN PVOID pValue ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u8 bResult = _SUCCESS; switch(eVariable) { default: GetHalDefVar8812A(Adapter,eVariable,pValue); break; } return bResult; } void _update_response_rate(_adapter *padapter,unsigned int mask) { u8 RateIndex = 0; // Set RRSR rate table. rtw_write8(padapter, REG_RRSR, mask&0xff); rtw_write8(padapter,REG_RRSR+1, (mask>>8)&0xff); // Set RTS initial rate while(mask > 0x1) { mask = (mask>> 1); RateIndex++; } rtw_write8(padapter, REG_INIRTS_RATE_SEL, RateIndex); } static void rtl8812au_init_default_value(_adapter * padapter) { PHAL_DATA_TYPE pHalData; pHalData = GET_HAL_DATA(padapter); InitDefaultValue8821A(padapter); pHalData->IntrMask[0] = (u32)( \ //IMR_ROK | //IMR_RDU | //IMR_VODOK | //IMR_VIDOK | //IMR_BEDOK | //IMR_BKDOK | //IMR_MGNTDOK | //IMR_HIGHDOK | //IMR_CPWM | //IMR_CPWM2 | //IMR_C2HCMD | //IMR_HISR1_IND_INT | //IMR_ATIMEND | //IMR_BCNDMAINT_E | //IMR_HSISR_IND_ON_INT | //IMR_BCNDOK0 | //IMR_BCNDMAINT0 | //IMR_TSF_BIT32_TOGGLE | //IMR_TXBCN0OK | //IMR_TXBCN0ERR | //IMR_GTINT3 | //IMR_GTINT4 | //IMR_TXCCK | 0); pHalData->IntrMask[1] = (u32)(\ //IMR_RXFOVW | //IMR_TXFOVW | //IMR_RXERR | //IMR_TXERR | //IMR_ATIMEND_E | //IMR_BCNDOK1 | //IMR_BCNDOK2 | //IMR_BCNDOK3 | //IMR_BCNDOK4 | //IMR_BCNDOK5 | //IMR_BCNDOK6 | //IMR_BCNDOK7 | //IMR_BCNDMAINT1 | //IMR_BCNDMAINT2 | //IMR_BCNDMAINT3 | //IMR_BCNDMAINT4 | //IMR_BCNDMAINT5 | //IMR_BCNDMAINT6 | //IMR_BCNDMAINT7 | 0); } static u8 rtl8812au_ps_func(PADAPTER Adapter,HAL_INTF_PS_FUNC efunc_id, u8 *val) { u8 bResult = _TRUE; switch(efunc_id){ #if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED) case HAL_USB_SELECT_SUSPEND: { u8 bfwpoll = *(( u8*)val); //rtl8188e_set_FwSelectSuspend_cmd(Adapter,bfwpoll ,500);//note fw to support hw power down ping detect } break; #endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED default: break; } return bResult; } void rtl8812au_set_hal_ops(_adapter * padapter) { struct hal_ops *pHalFunc = &padapter->HalFunc; _func_enter_; pHalFunc->hal_power_on = _InitPowerOn_8812AU; pHalFunc->hal_power_off = hal_poweroff_8812au; pHalFunc->hal_init = &rtl8812au_hal_init; pHalFunc->hal_deinit = &rtl8812au_hal_deinit; pHalFunc->inirp_init = &rtl8812au_inirp_init; pHalFunc->inirp_deinit = &rtl8812au_inirp_deinit; pHalFunc->init_xmit_priv = &rtl8812au_init_xmit_priv; pHalFunc->free_xmit_priv = &rtl8812au_free_xmit_priv; pHalFunc->init_recv_priv = &rtl8812au_init_recv_priv; pHalFunc->free_recv_priv = &rtl8812au_free_recv_priv; #ifdef CONFIG_SW_LED pHalFunc->InitSwLeds = &rtl8812au_InitSwLeds; pHalFunc->DeInitSwLeds = &rtl8812au_DeInitSwLeds; #else //case of hw led or no led pHalFunc->InitSwLeds = NULL; pHalFunc->DeInitSwLeds = NULL; #endif//CONFIG_SW_LED pHalFunc->init_default_value = &rtl8812au_init_default_value; pHalFunc->intf_chip_configure = &rtl8812au_interface_configure; pHalFunc->read_adapter_info = &ReadAdapterInfo8812AU; //pHalFunc->set_bwmode_handler = &PHY_SetBWMode8192C; //pHalFunc->set_channel_handler = &PHY_SwChnl8192C; //pHalFunc->hal_dm_watchdog = &rtl8192c_HalDmWatchDog; pHalFunc->SetHwRegHandler = &SetHwReg8812AU; pHalFunc->GetHwRegHandler = &GetHwReg8812AU; pHalFunc->GetHalDefVarHandler = &GetHalDefVar8812AUsb; pHalFunc->SetHalDefVarHandler = &SetHalDefVar8812AUsb; //pHalFunc->Add_RateATid = &rtl8192c_Add_RateATid; pHalFunc->hal_xmit = &rtl8812au_hal_xmit; pHalFunc->mgnt_xmit = &rtl8812au_mgnt_xmit; pHalFunc->hal_xmitframe_enqueue = &rtl8812au_hal_xmitframe_enqueue; #ifdef CONFIG_HOSTAPD_MLME pHalFunc->hostap_mgnt_xmit_entry = &rtl8812au_hostap_mgnt_xmit_entry; #endif pHalFunc->interface_ps_func = &rtl8812au_ps_func; #ifdef CONFIG_XMIT_THREAD_MODE pHalFunc->xmit_thread_handler = &rtl8812au_xmit_buf_handler; #endif rtl8812_set_hal_ops(pHalFunc); _func_exit_; } rtl8812au-4.3.8.12175.20140902+dfsg/hal/rtl8812a/usb/usb_ops_linux.c000066400000000000000000000401401261122257400233550ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _HCI_OPS_OS_C_ //#include #include #ifdef CONFIG_SUPPORT_USB_INT void interrupt_handler_8812au(_adapter *padapter,u16 pkt_len,u8 *pbuf) { HAL_DATA_TYPE *pHalData=GET_HAL_DATA(padapter); struct reportpwrstate_parm pwr_rpt; if ( pkt_len != INTERRUPT_MSG_FORMAT_LEN ) { DBG_8192C("%s Invalid interrupt content length (%d)!\n", __FUNCTION__, pkt_len); return ; } // HISR _rtw_memcpy(&(pHalData->IntArray[0]), &(pbuf[USB_INTR_CONTENT_HISR_OFFSET]), 4); _rtw_memcpy(&(pHalData->IntArray[1]), &(pbuf[USB_INTR_CONTENT_HISRE_OFFSET]), 4); #if 0 //DBG { u32 hisr=0 ,hisr_ex=0; _rtw_memcpy(&hisr,&(pHalData->IntArray[0]),4); hisr = le32_to_cpu(hisr); _rtw_memcpy(&hisr_ex,&(pHalData->IntArray[1]),4); hisr_ex = le32_to_cpu(hisr_ex); if((hisr != 0) || (hisr_ex!=0)) DBG_871X("===> %s hisr:0x%08x ,hisr_ex:0x%08x \n",__FUNCTION__,hisr,hisr_ex); } #endif #ifdef CONFIG_LPS_LCLK if( pHalData->IntArray[0] & IMR_CPWM_88E ) { _rtw_memcpy(&pwr_rpt.state, &(pbuf[USB_INTR_CONTENT_CPWM1_OFFSET]), 1); //_rtw_memcpy(&pwr_rpt.state2, &(pbuf[USB_INTR_CONTENT_CPWM2_OFFSET]), 1); //88e's cpwm value only change BIT0, so driver need to add PS_STATE_S2 for LPS flow. pwr_rpt.state |= PS_STATE_S2; _set_workitem(&(adapter_to_pwrctl(padapter)->cpwm_event)); } #endif//CONFIG_LPS_LCLK #ifdef CONFIG_INTERRUPT_BASED_TXBCN #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT if (pHalData->IntArray[0] & IMR_BCNDMAINT0_88E) #endif #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR if (pHalData->IntArray[0] & (IMR_TBDER_88E|IMR_TBDOK_88E)) #endif { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; #if 0 if(pHalData->IntArray[0] & IMR_BCNDMAINT0_88E) DBG_8192C("%s: HISR_BCNERLY_INT\n", __func__); if(pHalData->IntArray[0] & IMR_TBDOK_88E) DBG_8192C("%s: HISR_TXBCNOK\n", __func__); if(pHalData->IntArray[0] & IMR_TBDER_88E) DBG_8192C("%s: HISR_TXBCNERR\n", __func__); #endif if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { //send_beacon(padapter); if(pmlmepriv->update_bcn == _TRUE) { //tx_beacon_hdl(padapter, NULL); set_tx_beacon_cmd(padapter); } } #ifdef CONFIG_CONCURRENT_MODE if(check_buddy_fwstate(padapter, WIFI_AP_STATE)) { //send_beacon(padapter); if(padapter->pbuddy_adapter->mlmepriv.update_bcn == _TRUE) { //tx_beacon_hdl(padapter, NULL); set_tx_beacon_cmd(padapter->pbuddy_adapter); } } #endif } #endif //CONFIG_INTERRUPT_BASED_TXBCN #ifdef DBG_CONFIG_ERROR_DETECT_INT if( pHalData->IntArray[1] & IMR_TXERR_88E ) DBG_871X("===> %s Tx Error Flag Interrupt Status \n",__FUNCTION__); if( pHalData->IntArray[1] & IMR_RXERR_88E ) DBG_871X("===> %s Rx Error Flag INT Status \n",__FUNCTION__); if( pHalData->IntArray[1] & IMR_TXFOVW_88E ) DBG_871X("===> %s Transmit FIFO Overflow \n",__FUNCTION__); if( pHalData->IntArray[1] & IMR_RXFOVW_88E ) DBG_871X("===> %s Receive FIFO Overflow \n",__FUNCTION__); #endif//DBG_CONFIG_ERROR_DETECT_INT // C2H Event if(pbuf[0]!= 0){ _rtw_memcpy(&(pHalData->C2hArray[0]), &(pbuf[USB_INTR_CONTENT_C2H_OFFSET]), 16); //rtw_c2h_wk_cmd(padapter); to do.. } } #endif #ifdef CONFIG_USB_INTERRUPT_IN_PIPE static void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs) { int err; _adapter *padapter = (_adapter *)purb->context; if(RTW_CANNOT_RX(padapter)) { DBG_8192C("%s() RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", __FUNCTION__,padapter->bDriverStopped, padapter->bSurpriseRemoved,); return; } if(purb->status==0)//SUCCESS { if (purb->actual_length > INTERRUPT_MSG_FORMAT_LEN) { DBG_8192C("usb_read_interrupt_complete: purb->actual_length > INTERRUPT_MSG_FORMAT_LEN(%d)\n",INTERRUPT_MSG_FORMAT_LEN); } interrupt_handler_8188eu(padapter, purb->actual_length,purb->transfer_buffer ); err = usb_submit_urb(purb, GFP_ATOMIC); if((err) && (err != (-EPERM))) { DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, purb->status); } } else { DBG_8192C("###=> usb_read_interrupt_complete => urb status(%d)\n", purb->status); switch(purb->status) { case -EINVAL: case -EPIPE: case -ENODEV: case -ESHUTDOWN: //padapter->bSurpriseRemoved=_TRUE; //RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n")); case -ENOENT: padapter->bDriverStopped=_TRUE; RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n")); break; case -EPROTO: break; case -EINPROGRESS: DBG_8192C("ERROR: URB IS IN PROGRESS!/n"); break; default: break; } } } static u32 usb_read_interrupt(struct intf_hdl *pintfhdl, u32 addr) { int err; unsigned int pipe; u32 ret = _SUCCESS; _adapter *adapter = pintfhdl->padapter; struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); struct recv_priv *precvpriv = &adapter->recvpriv; struct usb_device *pusbd = pdvobj->pusbdev; _func_enter_; if (RTW_CANNOT_RX(adapter)) { RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_interrupt:( RTW_CANNOT_RX )!!!\n")); return _FAIL; } //translate DMA FIFO addr to pipehandle pipe = ffaddr2pipehdl(pdvobj, addr); usb_fill_int_urb(precvpriv->int_in_urb, pusbd, pipe, precvpriv->int_in_buf, INTERRUPT_MSG_FORMAT_LEN, usb_read_interrupt_complete, adapter, 1); err = usb_submit_urb(precvpriv->int_in_urb, GFP_ATOMIC); if((err) && (err != (-EPERM))) { DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, precvpriv->int_in_urb->status); ret = _FAIL; } _func_exit_; return ret; } #endif static s32 pre_recv_entry(union recv_frame *precvframe, u8 *pphy_status) { s32 ret=_SUCCESS; #ifdef CONFIG_CONCURRENT_MODE u8 *primary_myid, *secondary_myid, *paddr1; union recv_frame *precvframe_if2 = NULL; _adapter *primary_padapter = precvframe->u.hdr.adapter; _adapter *secondary_padapter = primary_padapter->pbuddy_adapter; struct recv_priv *precvpriv = &primary_padapter->recvpriv; _queue *pfree_recv_queue = &precvpriv->free_recv_queue; u8 *pbuf = precvframe->u.hdr.rx_data; if(!secondary_padapter) return ret; paddr1 = GetAddr1Ptr(pbuf); if(IS_MCAST(paddr1) == _FALSE)//unicast packets { //primary_myid = myid(&primary_padapter->eeprompriv); secondary_myid = myid(&secondary_padapter->eeprompriv); if(_rtw_memcmp(paddr1, secondary_myid, ETH_ALEN)) { //change to secondary interface precvframe->u.hdr.adapter = secondary_padapter; } //ret = recv_entry(precvframe); } else // Handle BC/MC Packets { u8 clone = _TRUE; #if 0 u8 type, subtype, *paddr2, *paddr3; type = GetFrameType(pbuf); subtype = GetFrameSubType(pbuf); //bit(7)~bit(2) switch (type) { case WIFI_MGT_TYPE: //Handle BC/MC mgnt Packets if(subtype == WIFI_BEACON) { paddr3 = GetAddr3Ptr(precvframe->u.hdr.rx_data); if (check_fwstate(&secondary_padapter->mlmepriv, _FW_LINKED) && _rtw_memcmp(paddr3, get_bssid(&secondary_padapter->mlmepriv), ETH_ALEN)) { //change to secondary interface precvframe->u.hdr.adapter = secondary_padapter; clone = _FALSE; } if(check_fwstate(&primary_padapter->mlmepriv, _FW_LINKED) && _rtw_memcmp(paddr3, get_bssid(&primary_padapter->mlmepriv), ETH_ALEN)) { if(clone==_FALSE) { clone = _TRUE; } else { clone = _FALSE; } precvframe->u.hdr.adapter = primary_padapter; } if(check_fwstate(&primary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) || check_fwstate(&secondary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING)) { clone = _TRUE; precvframe->u.hdr.adapter = primary_padapter; } } else if(subtype == WIFI_PROBEREQ) { //probe req frame is only for interface2 //change to secondary interface precvframe->u.hdr.adapter = secondary_padapter; clone = _FALSE; } break; case WIFI_CTRL_TYPE: // Handle BC/MC ctrl Packets break; case WIFI_DATA_TYPE: //Handle BC/MC data Packets //Notes: AP MODE never rx BC/MC data packets paddr2 = GetAddr2Ptr(precvframe->u.hdr.rx_data); if(_rtw_memcmp(paddr2, get_bssid(&secondary_padapter->mlmepriv), ETH_ALEN)) { //change to secondary interface precvframe->u.hdr.adapter = secondary_padapter; clone = _FALSE; } break; default: break; } #endif if(_TRUE == clone) { //clone/copy to if2 struct rx_pkt_attrib *pattrib = NULL; precvframe_if2 = rtw_alloc_recvframe(pfree_recv_queue); if(precvframe_if2) { precvframe_if2->u.hdr.adapter = secondary_padapter; _rtw_init_listhead(&precvframe_if2->u.hdr.list); precvframe_if2->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. precvframe_if2->u.hdr.len=0; _rtw_memcpy(&precvframe_if2->u.hdr.attrib, &precvframe->u.hdr.attrib, sizeof(struct rx_pkt_attrib)); pattrib = &precvframe_if2->u.hdr.attrib; if(rtw_os_alloc_recvframe(secondary_padapter, precvframe_if2, pbuf, NULL) == _SUCCESS) { recvframe_put(precvframe_if2, pattrib->pkt_len); //recvframe_pull(precvframe_if2, drvinfo_sz + RXDESC_SIZE); if (pattrib->physt && pphy_status) rtl8812_query_rx_phy_status(precvframe_if2, pphy_status); ret = rtw_recv_entry(precvframe_if2); } else { rtw_free_recvframe(precvframe_if2, pfree_recv_queue); DBG_8192C("%s()-%d: alloc_skb() failed!\n", __FUNCTION__, __LINE__); } } } } //if (precvframe->u.hdr.attrib.physt) // rtl8812_query_rx_phy_status(precvframe, pphy_status); //ret = rtw_recv_entry(precvframe); #endif return ret; } int recvbuf2recvframe(_adapter *padapter, #ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX struct recv_buf *precvbuf #else _pkt *pskb #endif ) { u8 *pbuf; u8 pkt_cnt = 0; u32 pkt_offset; s32 transfer_len; u8 *pphy_status = NULL; union recv_frame *precvframe = NULL; struct rx_pkt_attrib *pattrib = NULL; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct recv_priv *precvpriv = &padapter->recvpriv; _queue *pfree_recv_queue = &precvpriv->free_recv_queue; #ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX transfer_len = (s32)precvbuf->transfer_len; pbuf = precvbuf->pbuf; #else transfer_len = (s32)pskb->len; pbuf = pskb->data; #endif//CONFIG_USE_USB_BUFFER_ALLOC_RX #ifdef CONFIG_USB_RX_AGGREGATION pkt_cnt = GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8812(pbuf); #endif do{ precvframe = rtw_alloc_recvframe(pfree_recv_queue); if(precvframe==NULL) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n")); DBG_8192C("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__); goto _exit_recvbuf2recvframe; } _rtw_init_listhead(&precvframe->u.hdr.list); precvframe->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. precvframe->u.hdr.len=0; rtl8812_query_rx_desc_status(precvframe, pbuf); pattrib = &precvframe->u.hdr.attrib; if ((padapter->registrypriv.mp_mode == 0) && ((pattrib->crc_err) || (pattrib->icv_err))) { DBG_8192C("%s: RX Warning! crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err); rtw_free_recvframe(precvframe, pfree_recv_queue); goto _exit_recvbuf2recvframe; } pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len; if((pattrib->pkt_len<=0) || (pkt_offset>transfer_len)) { RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n")); DBG_8192C("%s()-%d: RX Warning!,pkt_len<=0 or pkt_offset> transfer_len \n", __FUNCTION__, __LINE__); rtw_free_recvframe(precvframe, pfree_recv_queue); goto _exit_recvbuf2recvframe; } #ifdef CONFIG_RX_PACKET_APPEND_FCS if(pattrib->pkt_rpt_type == NORMAL_RX) pattrib->pkt_len -= IEEE80211_FCS_LEN; #endif if(rtw_os_alloc_recvframe(padapter, precvframe, (pbuf+pattrib->shift_sz + pattrib->drvinfo_sz + RXDESC_SIZE), #ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX NULL #else pskb #endif ) == _FAIL) { rtw_free_recvframe(precvframe, pfree_recv_queue); goto _exit_recvbuf2recvframe; } recvframe_put(precvframe, pattrib->pkt_len); //recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet { if(pattrib->physt) pphy_status = (pbuf + RXDESC_OFFSET); #ifdef CONFIG_CONCURRENT_MODE if(rtw_buddy_adapter_up(padapter)) { if(pre_recv_entry(precvframe, pphy_status) != _SUCCESS) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, ("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); } } #endif //CONFIG_CONCURRENT_MODE if(pattrib->physt && pphy_status) rtl8812_query_rx_phy_status(precvframe, pphy_status); if(rtw_recv_entry(precvframe) != _SUCCESS) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, ("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); } } else{ // pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP if (pattrib->pkt_rpt_type == C2H_PACKET) { //DBG_8192C("rx C2H_PACKET \n"); C2HPacketHandler_8812(padapter,precvframe->u.hdr.rx_data,pattrib->pkt_len); } rtw_free_recvframe(precvframe, pfree_recv_queue); } #ifdef CONFIG_USB_RX_AGGREGATION // jaguar 8-byte alignment pkt_offset = (u16)_RND8(pkt_offset); pkt_cnt--; pbuf += pkt_offset; #endif transfer_len -= pkt_offset; precvframe = NULL; }while(transfer_len>0); _exit_recvbuf2recvframe: return _SUCCESS; } void rtl8812au_xmit_tasklet(void *priv) { int ret = _FALSE; _adapter *padapter = (_adapter*)priv; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; if(check_fwstate(&padapter->mlmepriv, _FW_UNDER_SURVEY) == _TRUE) return; while(1) { if (RTW_CANNOT_TX(padapter)) { DBG_8192C("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n"); break; } ret = rtl8812au_xmitframe_complete(padapter, pxmitpriv, NULL); if(ret==_FALSE) break; } } void rtl8812au_set_intf_ops(struct _io_ops *pops) { _func_enter_; _rtw_memset((u8 *)pops, 0, sizeof(struct _io_ops)); pops->_read8 = &usb_read8; pops->_read16 = &usb_read16; pops->_read32 = &usb_read32; pops->_read_mem = &usb_read_mem; pops->_read_port = &usb_read_port; pops->_write8 = &usb_write8; pops->_write16 = &usb_write16; pops->_write32 = &usb_write32; pops->_writeN = &usb_writeN; #ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ pops->_write8_async= &usb_async_write8; pops->_write16_async = &usb_async_write16; pops->_write32_async = &usb_async_write32; #endif pops->_write_mem = &usb_write_mem; pops->_write_port = &usb_write_port; pops->_read_port_cancel = &usb_read_port_cancel; pops->_write_port_cancel = &usb_write_port_cancel; #ifdef CONFIG_USB_INTERRUPT_IN_PIPE pops->_read_interrupt = &usb_read_interrupt; #endif _func_exit_; } void rtl8812au_set_hw_type(_adapter *padapter) { if(padapter->chip_type == RTL8812) { padapter->HardwareType = HARDWARE_TYPE_RTL8812AU; DBG_871X("CHIP TYPE: RTL8812\n"); } else if(padapter->chip_type == RTL8821) { //padapter->HardwareType = HARDWARE_TYPE_RTL8811AU; padapter->HardwareType = HARDWARE_TYPE_RTL8821U; DBG_871X("CHIP TYPE: RTL8811AU or RTL8821U\n"); } } rtl8812au-4.3.8.12175.20140902+dfsg/ifcfg-wlan0000066400000000000000000000000661261122257400175210ustar00rootroot00000000000000#DHCP client DEVICE=wlan0 BOOTPROTO=dhcp ONBOOT=yesrtl8812au-4.3.8.12175.20140902+dfsg/include/000077500000000000000000000000001261122257400171225ustar00rootroot00000000000000rtl8812au-4.3.8.12175.20140902+dfsg/include/Hal8188EPhyCfg.h000066400000000000000000000165751261122257400215540ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __INC_HAL8188EPHYCFG_H__ #define __INC_HAL8188EPHYCFG_H__ /*--------------------------Define Parameters-------------------------------*/ #define LOOP_LIMIT 5 #define MAX_STALL_TIME 50 //us #define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) #define MAX_TXPWR_IDX_NMODE_92S 63 #define Reset_Cnt_Limit 3 #ifdef CONFIG_PCI_HCI #define MAX_AGGR_NUM 0x0B #else #define MAX_AGGR_NUM 0x07 #endif // CONFIG_PCI_HCI /*--------------------------Define Parameters-------------------------------*/ /*------------------------------Define structure----------------------------*/ #define MAX_PG_GROUP 13 #define MAX_TX_COUNT_8188E 1 /* BB/RF related */ /*------------------------------Define structure----------------------------*/ /*------------------------Export global variable----------------------------*/ /*------------------------Export global variable----------------------------*/ /*------------------------Export Marco Definition---------------------------*/ /*------------------------Export Marco Definition---------------------------*/ /*--------------------------Exported Function prototype---------------------*/ // // BB and RF register read/write // u32 PHY_QueryBBReg8188E( IN PADAPTER Adapter, IN u32 RegAddr, IN u32 BitMask ); void PHY_SetBBReg8188E( IN PADAPTER Adapter, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ); u32 PHY_QueryRFReg8188E( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 RegAddr, IN u32 BitMask ); void PHY_SetRFReg8188E( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ); // // Initialization related function // /* MAC/BB/RF HAL config */ int PHY_MACConfig8188E(IN PADAPTER Adapter ); int PHY_BBConfig8188E(IN PADAPTER Adapter ); int PHY_RFConfig8188E(IN PADAPTER Adapter ); /* RF config */ int rtl8188e_PHY_ConfigRFWithParaFile(IN PADAPTER Adapter, IN u8 * pFileName, u8 eRFPath); /* Read initi reg value for tx power setting. */ void rtl8192c_PHY_GetHWRegOriginalValue( IN PADAPTER Adapter ); // // RF Power setting // //extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter, // IN RT_RF_POWER_STATE eRFPowerState); // // BB TX Power R/W // void PHY_GetTxPowerLevel8188E( IN PADAPTER Adapter, OUT s32* powerlevel ); void PHY_SetTxPowerLevel8188E( IN PADAPTER Adapter, IN u8 channel ); BOOLEAN PHY_UpdateTxPowerDbm8188E( IN PADAPTER Adapter, IN int powerInDbm ); VOID PHY_SetTxPowerIndex_8188E( IN PADAPTER Adapter, IN u32 PowerIndex, IN u8 RFPath, IN u8 Rate ); u8 PHY_GetTxPowerIndex_8188E( IN PADAPTER pAdapter, IN u8 RFPath, IN u8 Rate, IN CHANNEL_WIDTH BandWidth, IN u8 Channel ); // // Switch bandwidth for 8192S // //extern void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer ); void PHY_SetBWMode8188E( IN PADAPTER pAdapter, IN CHANNEL_WIDTH ChnlWidth, IN unsigned char Offset ); // // Set FW CMD IO for 8192S. // //extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter, // IN IO_TYPE IOType); // // Set A2 entry to fw for 8192S // extern void FillA2Entry8192C( IN PADAPTER Adapter, IN u8 index, IN u8* val); // // channel switch related funciton // //extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer ); void PHY_SwChnl8188E( IN PADAPTER pAdapter, IN u8 channel ); VOID PHY_SetSwChnlBWMode8188E( IN PADAPTER Adapter, IN u8 channel, IN CHANNEL_WIDTH Bandwidth, IN u8 Offset40, IN u8 Offset80 ); // // BB/MAC/RF other monitor API // void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter, IN BOOLEAN bEnableMonitorMode ); BOOLEAN PHY_CheckIsLegalRfPath8192C(IN PADAPTER pAdapter, IN u32 eRFPath ); VOID PHY_SetRFPathSwitch_8188E(IN PADAPTER pAdapter, IN BOOLEAN bMain); extern VOID PHY_SwitchEphyParameter( IN PADAPTER Adapter ); extern VOID PHY_EnableHostClkReq( IN PADAPTER Adapter ); BOOLEAN SetAntennaConfig92C( IN PADAPTER Adapter, IN u8 DefaultAnt ); VOID storePwrIndexDiffRateOffset( IN PADAPTER Adapter, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ); /*--------------------------Exported Function prototype---------------------*/ // // Initialization related function // /* MAC/BB/RF HAL config */ //extern s32 PHY_MACConfig8723(PADAPTER padapter); //s32 PHY_BBConfig8723(PADAPTER padapter); //s32 PHY_RFConfig8723(PADAPTER padapter); //================================================================== // Note: If SIC_ENABLE under PCIE, because of the slow operation // you should // 2) "#define RTL8723_FPGA_VERIFICATION 1" in Precomp.h.WlanE.Windows // 3) "#define RTL8190_Download_Firmware_From_Header 0" in Precomp.h.WlanE.Windows if needed. // #if (RTL8188E_SUPPORT == 1) && (RTL8188E_FPGA_TRUE_PHY_VERIFICATION == 1) #define SIC_ENABLE 1 #define SIC_HW_SUPPORT 1 #else #define SIC_ENABLE 0 #define SIC_HW_SUPPORT 0 #endif //================================================================== #define SIC_MAX_POLL_CNT 5 #if(SIC_HW_SUPPORT == 1) #define SIC_CMD_READY 0 #define SIC_CMD_PREWRITE 0x1 #if(RTL8188E_SUPPORT == 1) #define SIC_CMD_WRITE 0x40 #define SIC_CMD_PREREAD 0x2 #define SIC_CMD_READ 0x80 #define SIC_CMD_INIT 0xf0 #define SIC_INIT_VAL 0xff #define SIC_INIT_REG 0x1b7 #define SIC_CMD_REG 0x1EB // 1byte #define SIC_ADDR_REG 0x1E8 // 1b4~1b5, 2 bytes #define SIC_DATA_REG 0x1EC // 1b0~1b3 #else #define SIC_CMD_WRITE 0x11 #define SIC_CMD_PREREAD 0x2 #define SIC_CMD_READ 0x12 #define SIC_CMD_INIT 0x1f #define SIC_INIT_VAL 0xff #define SIC_INIT_REG 0x1b7 #define SIC_CMD_REG 0x1b6 // 1byte #define SIC_ADDR_REG 0x1b4 // 1b4~1b5, 2 bytes #define SIC_DATA_REG 0x1b0 // 1b0~1b3 #endif #else #define SIC_CMD_READY 0 #define SIC_CMD_WRITE 1 #define SIC_CMD_READ 2 #if(RTL8188E_SUPPORT == 1) #define SIC_CMD_REG 0x1EB // 1byte #define SIC_ADDR_REG 0x1E8 // 1b9~1ba, 2 bytes #define SIC_DATA_REG 0x1EC // 1bc~1bf #else #define SIC_CMD_REG 0x1b8 // 1byte #define SIC_ADDR_REG 0x1b9 // 1b9~1ba, 2 bytes #define SIC_DATA_REG 0x1bc // 1bc~1bf #endif #endif #if(SIC_ENABLE == 1) VOID SIC_Init(IN PADAPTER Adapter); #endif #endif // __INC_HAL8192CPHYCFG_H rtl8812au-4.3.8.12175.20140902+dfsg/include/Hal8188EPhyReg.h000066400000000000000000001224221261122257400215570ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __INC_HAL8188EPHYREG_H__ #define __INC_HAL8188EPHYREG_H__ /*--------------------------Define Parameters-------------------------------*/ // // BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF // 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF // 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 // 3. RF register 0x00-2E // 4. Bit Mask for BB/RF register // 5. Other defintion for BB/RF R/W // // // 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF // 1. Page1(0x100) // #define rPMAC_Reset 0x100 #define rPMAC_TxStart 0x104 #define rPMAC_TxLegacySIG 0x108 #define rPMAC_TxHTSIG1 0x10c #define rPMAC_TxHTSIG2 0x110 #define rPMAC_PHYDebug 0x114 #define rPMAC_TxPacketNum 0x118 #define rPMAC_TxIdle 0x11c #define rPMAC_TxMACHeader0 0x120 #define rPMAC_TxMACHeader1 0x124 #define rPMAC_TxMACHeader2 0x128 #define rPMAC_TxMACHeader3 0x12c #define rPMAC_TxMACHeader4 0x130 #define rPMAC_TxMACHeader5 0x134 #define rPMAC_TxDataType 0x138 #define rPMAC_TxRandomSeed 0x13c #define rPMAC_CCKPLCPPreamble 0x140 #define rPMAC_CCKPLCPHeader 0x144 #define rPMAC_CCKCRC16 0x148 #define rPMAC_OFDMRxCRC32OK 0x170 #define rPMAC_OFDMRxCRC32Er 0x174 #define rPMAC_OFDMRxParityEr 0x178 #define rPMAC_OFDMRxCRC8Er 0x17c #define rPMAC_CCKCRxRC16Er 0x180 #define rPMAC_CCKCRxRC32Er 0x184 #define rPMAC_CCKCRxRC32OK 0x188 #define rPMAC_TxStatus 0x18c // // 2. Page2(0x200) // // The following two definition are only used for USB interface. #define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. #define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. // // 3. Page8(0x800) // #define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? #define rFPGA0_TxInfo 0x804 // Status report?? #define rFPGA0_PSDFunction 0x808 #define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? #define rFPGA0_RFTiming1 0x810 // Useless now #define rFPGA0_RFTiming2 0x814 #define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register #define rFPGA0_XA_HSSIParameter2 0x824 #define rFPGA0_XB_HSSIParameter1 0x828 #define rFPGA0_XB_HSSIParameter2 0x82c #define rFPGA0_XA_LSSIParameter 0x840 #define rFPGA0_XB_LSSIParameter 0x844 #define rFPGA0_RFWakeUpParameter 0x850 // Useless now #define rFPGA0_RFSleepUpParameter 0x854 #define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch #define rFPGA0_XCD_SwitchControl 0x85c #define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch #define rFPGA0_XB_RFInterfaceOE 0x864 #define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control #define rFPGA0_XCD_RFInterfaceSW 0x874 #define rFPGA0_XAB_RFParameter 0x878 // RF Parameter #define rFPGA0_XCD_RFParameter 0x87c #define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? #define rFPGA0_AnalogParameter2 0x884 #define rFPGA0_AnalogParameter3 0x888 #define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy #define rFPGA0_AnalogParameter4 0x88c #define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback #define rFPGA0_XB_LSSIReadBack 0x8a4 #define rFPGA0_XC_LSSIReadBack 0x8a8 #define rFPGA0_XD_LSSIReadBack 0x8ac #define rFPGA0_PSDReport 0x8b4 // Useless now #define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback #define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback #define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value #define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now // // 4. Page9(0x900) // #define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? #define rFPGA1_TxBlock 0x904 // Useless now #define rFPGA1_DebugSelect 0x908 // Useless now #define rFPGA1_TxInfo 0x90c // Useless now // Status report?? // // 5. PageA(0xA00) // // Set Control channel to upper or lower. These settings are required only for 40MHz #define rCCK0_System 0xa00 #define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI #define rCCK0_CCA 0xa08 // Disable init gain now // Init gain #define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series #define rCCK0_RxAGC2 0xa10 //AGC & DAGC #define rCCK0_RxHP 0xa14 #define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold #define rCCK0_DSPParameter2 0xa1c //SQ threshold #define rCCK0_TxFilter1 0xa20 #define rCCK0_TxFilter2 0xa24 #define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 #define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report #define rCCK0_TRSSIReport 0xa50 #define rCCK0_RxReport 0xa54 //0xa57 #define rCCK0_FACounterLower 0xa5c //0xa5b #define rCCK0_FACounterUpper 0xa58 //0xa5c // // PageB(0xB00) // #define rPdp_AntA 0xb00 #define rPdp_AntA_4 0xb04 #define rConfig_Pmpd_AntA 0xb28 #define rConfig_ram64x16 0xb2c #define rConfig_AntA 0xb68 #define rConfig_AntB 0xb6c #define rPdp_AntB 0xb70 #define rPdp_AntB_4 0xb74 #define rConfig_Pmpd_AntB 0xb98 #define rAPK 0xbd8 // // 6. PageC(0xC00) // #define rOFDM0_LSTF 0xc00 #define rOFDM0_TRxPathEnable 0xc04 #define rOFDM0_TRMuxPar 0xc08 #define rOFDM0_TRSWIsolation 0xc0c #define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter #define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix #define rOFDM0_XBRxAFE 0xc18 #define rOFDM0_XBRxIQImbalance 0xc1c #define rOFDM0_XCRxAFE 0xc20 #define rOFDM0_XCRxIQImbalance 0xc24 #define rOFDM0_XDRxAFE 0xc28 #define rOFDM0_XDRxIQImbalance 0xc2c #define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain #define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. #define rOFDM0_RxDetector3 0xc38 //Frame Sync. #define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI #define rOFDM0_RxDSP 0xc40 //Rx Sync Path #define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC #define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold #define rOFDM0_ECCAThreshold 0xc4c // energy CCA #define rOFDM0_XAAGCCore1 0xc50 // DIG #define rOFDM0_XAAGCCore2 0xc54 #define rOFDM0_XBAGCCore1 0xc58 #define rOFDM0_XBAGCCore2 0xc5c #define rOFDM0_XCAGCCore1 0xc60 #define rOFDM0_XCAGCCore2 0xc64 #define rOFDM0_XDAGCCore1 0xc68 #define rOFDM0_XDAGCCore2 0xc6c #define rOFDM0_AGCParameter1 0xc70 #define rOFDM0_AGCParameter2 0xc74 #define rOFDM0_AGCRSSITable 0xc78 #define rOFDM0_HTSTFAGC 0xc7c #define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG #define rOFDM0_XATxAFE 0xc84 #define rOFDM0_XBTxIQImbalance 0xc88 #define rOFDM0_XBTxAFE 0xc8c #define rOFDM0_XCTxIQImbalance 0xc90 #define rOFDM0_XCTxAFE 0xc94 #define rOFDM0_XDTxIQImbalance 0xc98 #define rOFDM0_XDTxAFE 0xc9c #define rOFDM0_RxIQExtAnta 0xca0 #define rOFDM0_TxCoeff1 0xca4 #define rOFDM0_TxCoeff2 0xca8 #define rOFDM0_TxCoeff3 0xcac #define rOFDM0_TxCoeff4 0xcb0 #define rOFDM0_TxCoeff5 0xcb4 #define rOFDM0_TxCoeff6 0xcb8 #define rOFDM0_RxHPParameter 0xce0 #define rOFDM0_TxPseudoNoiseWgt 0xce4 #define rOFDM0_FrameSync 0xcf0 #define rOFDM0_DFSReport 0xcf4 // // 7. PageD(0xD00) // #define rOFDM1_LSTF 0xd00 #define rOFDM1_TRxPathEnable 0xd04 #define rOFDM1_CFO 0xd08 // No setting now #define rOFDM1_CSI1 0xd10 #define rOFDM1_SBD 0xd14 #define rOFDM1_CSI2 0xd18 #define rOFDM1_CFOTracking 0xd2c #define rOFDM1_TRxMesaure1 0xd34 #define rOFDM1_IntfDet 0xd3c #define rOFDM1_csi_fix_mask1 0xd40 #define rOFDM1_csi_fix_mask2 0xd44 #define rOFDM1_PseudoNoiseStateAB 0xd50 #define rOFDM1_PseudoNoiseStateCD 0xd54 #define rOFDM1_RxPseudoNoiseWgt 0xd58 #define rOFDM_PHYCounter1 0xda0 //cca, parity fail #define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail #define rOFDM_PHYCounter3 0xda8 //MCS not support #define rOFDM_ShortCFOAB 0xdac // No setting now #define rOFDM_ShortCFOCD 0xdb0 #define rOFDM_LongCFOAB 0xdb4 #define rOFDM_LongCFOCD 0xdb8 #define rOFDM_TailCFOAB 0xdbc #define rOFDM_TailCFOCD 0xdc0 #define rOFDM_PWMeasure1 0xdc4 #define rOFDM_PWMeasure2 0xdc8 #define rOFDM_BWReport 0xdcc #define rOFDM_AGCReport 0xdd0 #define rOFDM_RxSNR 0xdd4 #define rOFDM_RxEVMCSI 0xdd8 #define rOFDM_SIGReport 0xddc // // 8. PageE(0xE00) // #define rTxAGC_A_Rate18_06 0xe00 #define rTxAGC_A_Rate54_24 0xe04 #define rTxAGC_A_CCK1_Mcs32 0xe08 #define rTxAGC_A_Mcs03_Mcs00 0xe10 #define rTxAGC_A_Mcs07_Mcs04 0xe14 #define rTxAGC_A_Mcs11_Mcs08 0xe18 #define rTxAGC_A_Mcs15_Mcs12 0xe1c #define rTxAGC_B_Rate18_06 0x830 #define rTxAGC_B_Rate54_24 0x834 #define rTxAGC_B_CCK1_55_Mcs32 0x838 #define rTxAGC_B_Mcs03_Mcs00 0x83c #define rTxAGC_B_Mcs07_Mcs04 0x848 #define rTxAGC_B_Mcs11_Mcs08 0x84c #define rTxAGC_B_Mcs15_Mcs12 0x868 #define rTxAGC_B_CCK11_A_CCK2_11 0x86c #define rFPGA0_IQK 0xe28 #define rTx_IQK_Tone_A 0xe30 #define rRx_IQK_Tone_A 0xe34 #define rTx_IQK_PI_A 0xe38 #define rRx_IQK_PI_A 0xe3c #define rTx_IQK 0xe40 #define rRx_IQK 0xe44 #define rIQK_AGC_Pts 0xe48 #define rIQK_AGC_Rsp 0xe4c #define rTx_IQK_Tone_B 0xe50 #define rRx_IQK_Tone_B 0xe54 #define rTx_IQK_PI_B 0xe58 #define rRx_IQK_PI_B 0xe5c #define rIQK_AGC_Cont 0xe60 #define rBlue_Tooth 0xe6c #define rRx_Wait_CCA 0xe70 #define rTx_CCK_RFON 0xe74 #define rTx_CCK_BBON 0xe78 #define rTx_OFDM_RFON 0xe7c #define rTx_OFDM_BBON 0xe80 #define rTx_To_Rx 0xe84 #define rTx_To_Tx 0xe88 #define rRx_CCK 0xe8c #define rTx_Power_Before_IQK_A 0xe94 #define rTx_Power_After_IQK_A 0xe9c #define rRx_Power_Before_IQK_A 0xea0 #define rRx_Power_Before_IQK_A_2 0xea4 #define rRx_Power_After_IQK_A 0xea8 #define rRx_Power_After_IQK_A_2 0xeac #define rTx_Power_Before_IQK_B 0xeb4 #define rTx_Power_After_IQK_B 0xebc #define rRx_Power_Before_IQK_B 0xec0 #define rRx_Power_Before_IQK_B_2 0xec4 #define rRx_Power_After_IQK_B 0xec8 #define rRx_Power_After_IQK_B_2 0xecc #define rRx_OFDM 0xed0 #define rRx_Wait_RIFS 0xed4 #define rRx_TO_Rx 0xed8 #define rStandby 0xedc #define rSleep 0xee0 #define rPMPD_ANAEN 0xeec // // 7. RF Register 0x00-0x2E (RF 8256) // RF-0222D 0x00-3F // //Zebra1 #define rZebra1_HSSIEnable 0x0 // Useless now #define rZebra1_TRxEnable1 0x1 #define rZebra1_TRxEnable2 0x2 #define rZebra1_AGC 0x4 #define rZebra1_ChargePump 0x5 #define rZebra1_Channel 0x7 // RF channel switch //#endif #define rZebra1_TxGain 0x8 // Useless now #define rZebra1_TxLPF 0x9 #define rZebra1_RxLPF 0xb #define rZebra1_RxHPFCorner 0xc //Zebra4 #define rGlobalCtrl 0 // Useless now #define rRTL8256_TxLPF 19 #define rRTL8256_RxLPF 11 //RTL8258 #define rRTL8258_TxLPF 0x11 // Useless now #define rRTL8258_RxLPF 0x13 #define rRTL8258_RSSILPF 0xa // // RL6052 Register definition // #define RF_AC 0x00 // #define RF_IQADJ_G1 0x01 // #define RF_IQADJ_G2 0x02 // #define RF_POW_TRSW 0x05 // #define RF_GAIN_RX 0x06 // #define RF_GAIN_TX 0x07 // #define RF_TXM_IDAC 0x08 // #define RF_IPA_G 0x09 // #define RF_TXBIAS_G 0x0A #define RF_TXPA_AG 0x0B #define RF_IPA_A 0x0C // #define RF_TXBIAS_A 0x0D #define RF_BS_PA_APSET_G9_G11 0x0E #define RF_BS_IQGEN 0x0F // #define RF_MODE1 0x10 // #define RF_MODE2 0x11 // #define RF_RX_AGC_HP 0x12 // #define RF_TX_AGC 0x13 // #define RF_BIAS 0x14 // #define RF_IPA 0x15 // #define RF_TXBIAS 0x16 #define RF_POW_ABILITY 0x17 // #define RF_CHNLBW 0x18 // RF channel and BW switch #define RF_TOP 0x19 // #define RF_RX_G1 0x1A // #define RF_RX_G2 0x1B // #define RF_RX_BB2 0x1C // #define RF_RX_BB1 0x1D // #define RF_RCK1 0x1E // #define RF_RCK2 0x1F // #define RF_TX_G1 0x20 // #define RF_TX_G2 0x21 // #define RF_TX_G3 0x22 // #define RF_TX_BB1 0x23 // //#if HARDWARE_TYPE_IS_RTL8192D == 1 #define RF_T_METER_92D 0x42 // //#else #define RF_T_METER_88E 0x42 // #define RF_T_METER 0x24 // //#endif #define RF_SYN_G1 0x25 // RF TX Power control #define RF_SYN_G2 0x26 // RF TX Power control #define RF_SYN_G3 0x27 // RF TX Power control #define RF_SYN_G4 0x28 // RF TX Power control #define RF_SYN_G5 0x29 // RF TX Power control #define RF_SYN_G6 0x2A // RF TX Power control #define RF_SYN_G7 0x2B // RF TX Power control #define RF_SYN_G8 0x2C // RF TX Power control #define RF_RCK_OS 0x30 // RF TX PA control #define RF_TXPA_G1 0x31 // RF TX PA control #define RF_TXPA_G2 0x32 // RF TX PA control #define RF_TXPA_G3 0x33 // RF TX PA control #define RF_TX_BIAS_A 0x35 #define RF_TX_BIAS_D 0x36 #define RF_LOBF_9 0x38 #define RF_RXRF_A3 0x3C // #define RF_TRSW 0x3F #define RF_TXRF_A2 0x41 #define RF_TXPA_G4 0x46 #define RF_TXPA_A4 0x4B #define RF_0x52 0x52 #define RF_WE_LUT 0xEF // //Bit Mask // // 1. Page1(0x100) #define bBBResetB 0x100 // Useless now? #define bGlobalResetB 0x200 #define bOFDMTxStart 0x4 #define bCCKTxStart 0x8 #define bCRC32Debug 0x100 #define bPMACLoopback 0x10 #define bTxLSIG 0xffffff #define bOFDMTxRate 0xf #define bOFDMTxReserved 0x10 #define bOFDMTxLength 0x1ffe0 #define bOFDMTxParity 0x20000 #define bTxHTSIG1 0xffffff #define bTxHTMCSRate 0x7f #define bTxHTBW 0x80 #define bTxHTLength 0xffff00 #define bTxHTSIG2 0xffffff #define bTxHTSmoothing 0x1 #define bTxHTSounding 0x2 #define bTxHTReserved 0x4 #define bTxHTAggreation 0x8 #define bTxHTSTBC 0x30 #define bTxHTAdvanceCoding 0x40 #define bTxHTShortGI 0x80 #define bTxHTNumberHT_LTF 0x300 #define bTxHTCRC8 0x3fc00 #define bCounterReset 0x10000 #define bNumOfOFDMTx 0xffff #define bNumOfCCKTx 0xffff0000 #define bTxIdleInterval 0xffff #define bOFDMService 0xffff0000 #define bTxMACHeader 0xffffffff #define bTxDataInit 0xff #define bTxHTMode 0x100 #define bTxDataType 0x30000 #define bTxRandomSeed 0xffffffff #define bCCKTxPreamble 0x1 #define bCCKTxSFD 0xffff0000 #define bCCKTxSIG 0xff #define bCCKTxService 0xff00 #define bCCKLengthExt 0x8000 #define bCCKTxLength 0xffff0000 #define bCCKTxCRC16 0xffff #define bCCKTxStatus 0x1 #define bOFDMTxStatus 0x2 #define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) // 2. Page8(0x800) #define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD #define bJapanMode 0x2 #define bCCKTxSC 0x30 #define bCCKEn 0x1000000 #define bOFDMEn 0x2000000 #define bOFDMRxADCPhase 0x10000 // Useless now #define bOFDMTxDACPhase 0x40000 #define bXATxAGC 0x3f #define bAntennaSelect 0x0300 #define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage #define bXCTxAGC 0xf000 #define bXDTxAGC 0xf0000 #define bPAStart 0xf0000000 // Useless now #define bTRStart 0x00f00000 #define bRFStart 0x0000f000 #define bBBStart 0x000000f0 #define bBBCCKStart 0x0000000f #define bPAEnd 0xf //Reg0x814 #define bTREnd 0x0f000000 #define bRFEnd 0x000f0000 #define bCCAMask 0x000000f0 //T2R #define bR2RCCAMask 0x00000f00 #define bHSSI_R2TDelay 0xf8000000 #define bHSSI_T2RDelay 0xf80000 #define bContTxHSSI 0x400 //chane gain at continue Tx #define bIGFromCCK 0x200 #define bAGCAddress 0x3f #define bRxHPTx 0x7000 #define bRxHPT2R 0x38000 #define bRxHPCCKIni 0xc0000 #define bAGCTxCode 0xc00000 #define bAGCRxCode 0x300000 #define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 #define b3WireAddressLength 0x400 #define b3WireRFPowerDown 0x1 // Useless now //#define bHWSISelect 0x8 #define b5GPAPEPolarity 0x40000000 #define b2GPAPEPolarity 0x80000000 #define bRFSW_TxDefaultAnt 0x3 #define bRFSW_TxOptionAnt 0x30 #define bRFSW_RxDefaultAnt 0x300 #define bRFSW_RxOptionAnt 0x3000 #define bRFSI_3WireData 0x1 #define bRFSI_3WireClock 0x2 #define bRFSI_3WireLoad 0x4 #define bRFSI_3WireRW 0x8 #define bRFSI_3Wire 0xf #define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW #define bRFSI_TRSW 0x20 // Useless now #define bRFSI_TRSWB 0x40 #define bRFSI_ANTSW 0x100 #define bRFSI_ANTSWB 0x200 #define bRFSI_PAPE 0x400 #define bRFSI_PAPE5G 0x800 #define bBandSelect 0x1 #define bHTSIG2_GI 0x80 #define bHTSIG2_Smoothing 0x01 #define bHTSIG2_Sounding 0x02 #define bHTSIG2_Aggreaton 0x08 #define bHTSIG2_STBC 0x30 #define bHTSIG2_AdvCoding 0x40 #define bHTSIG2_NumOfHTLTF 0x300 #define bHTSIG2_CRC8 0x3fc #define bHTSIG1_MCS 0x7f #define bHTSIG1_BandWidth 0x80 #define bHTSIG1_HTLength 0xffff #define bLSIG_Rate 0xf #define bLSIG_Reserved 0x10 #define bLSIG_Length 0x1fffe #define bLSIG_Parity 0x20 #define bCCKRxPhase 0x4 #define bLSSIReadAddress 0x7f800000 // T65 RF #define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal #define bLSSIReadBackData 0xfffff // T65 RF #define bLSSIReadOKFlag 0x1000 // Useless now #define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz #define bRegulator0Standby 0x1 #define bRegulatorPLLStandby 0x2 #define bRegulator1Standby 0x4 #define bPLLPowerUp 0x8 #define bDPLLPowerUp 0x10 #define bDA10PowerUp 0x20 #define bAD7PowerUp 0x200 #define bDA6PowerUp 0x2000 #define bXtalPowerUp 0x4000 #define b40MDClkPowerUP 0x8000 #define bDA6DebugMode 0x20000 #define bDA6Swing 0x380000 #define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ #define b80MClkDelay 0x18000000 // Useless #define bAFEWatchDogEnable 0x20000000 #define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap #define bXtalCap23 0x3 #define bXtalCap92x 0x0f000000 #define bXtalCap 0x0f000000 #define bIntDifClkEnable 0x400 // Useless #define bExtSigClkEnable 0x800 #define bBandgapMbiasPowerUp 0x10000 #define bAD11SHGain 0xc0000 #define bAD11InputRange 0x700000 #define bAD11OPCurrent 0x3800000 #define bIPathLoopback 0x4000000 #define bQPathLoopback 0x8000000 #define bAFELoopback 0x10000000 #define bDA10Swing 0x7e0 #define bDA10Reverse 0x800 #define bDAClkSource 0x1000 #define bAD7InputRange 0x6000 #define bAD7Gain 0x38000 #define bAD7OutputCMMode 0x40000 #define bAD7InputCMMode 0x380000 #define bAD7Current 0xc00000 #define bRegulatorAdjust 0x7000000 #define bAD11PowerUpAtTx 0x1 #define bDA10PSAtTx 0x10 #define bAD11PowerUpAtRx 0x100 #define bDA10PSAtRx 0x1000 #define bCCKRxAGCFormat 0x200 #define bPSDFFTSamplepPoint 0xc000 #define bPSDAverageNum 0x3000 #define bIQPathControl 0xc00 #define bPSDFreq 0x3ff #define bPSDAntennaPath 0x30 #define bPSDIQSwitch 0x40 #define bPSDRxTrigger 0x400000 #define bPSDTxTrigger 0x80000000 #define bPSDSineToneScale 0x7f000000 #define bPSDReport 0xffff // 3. Page9(0x900) #define bOFDMTxSC 0x30000000 // Useless #define bCCKTxOn 0x1 #define bOFDMTxOn 0x2 #define bDebugPage 0xfff //reset debug page and also HWord, LWord #define bDebugItem 0xff //reset debug page and LWord #define bAntL 0x10 #define bAntNonHT 0x100 #define bAntHT1 0x1000 #define bAntHT2 0x10000 #define bAntHT1S1 0x100000 #define bAntNonHTS1 0x1000000 // 4. PageA(0xA00) #define bCCKBBMode 0x3 // Useless #define bCCKTxPowerSaving 0x80 #define bCCKRxPowerSaving 0x40 #define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch #define bCCKScramble 0x8 // Useless #define bCCKAntDiversity 0x8000 #define bCCKCarrierRecovery 0x4000 #define bCCKTxRate 0x3000 #define bCCKDCCancel 0x0800 #define bCCKISICancel 0x0400 #define bCCKMatchFilter 0x0200 #define bCCKEqualizer 0x0100 #define bCCKPreambleDetect 0x800000 #define bCCKFastFalseCCA 0x400000 #define bCCKChEstStart 0x300000 #define bCCKCCACount 0x080000 #define bCCKcs_lim 0x070000 #define bCCKBistMode 0x80000000 #define bCCKCCAMask 0x40000000 #define bCCKTxDACPhase 0x4 #define bCCKRxADCPhase 0x20000000 //r_rx_clk #define bCCKr_cp_mode0 0x0100 #define bCCKTxDCOffset 0xf0 #define bCCKRxDCOffset 0xf #define bCCKCCAMode 0xc000 #define bCCKFalseCS_lim 0x3f00 #define bCCKCS_ratio 0xc00000 #define bCCKCorgBit_sel 0x300000 #define bCCKPD_lim 0x0f0000 #define bCCKNewCCA 0x80000000 #define bCCKRxHPofIG 0x8000 #define bCCKRxIG 0x7f00 #define bCCKLNAPolarity 0x800000 #define bCCKRx1stGain 0x7f0000 #define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity #define bCCKRxAGCSatLevel 0x1f000000 #define bCCKRxAGCSatCount 0xe0 #define bCCKRxRFSettle 0x1f //AGCsamp_dly #define bCCKFixedRxAGC 0x8000 //#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 #define bCCKAntennaPolarity 0x2000 #define bCCKTxFilterType 0x0c00 #define bCCKRxAGCReportType 0x0300 #define bCCKRxDAGCEn 0x80000000 #define bCCKRxDAGCPeriod 0x20000000 #define bCCKRxDAGCSatLevel 0x1f000000 #define bCCKTimingRecovery 0x800000 #define bCCKTxC0 0x3f0000 #define bCCKTxC1 0x3f000000 #define bCCKTxC2 0x3f #define bCCKTxC3 0x3f00 #define bCCKTxC4 0x3f0000 #define bCCKTxC5 0x3f000000 #define bCCKTxC6 0x3f #define bCCKTxC7 0x3f00 #define bCCKDebugPort 0xff0000 #define bCCKDACDebug 0x0f000000 #define bCCKFalseAlarmEnable 0x8000 #define bCCKFalseAlarmRead 0x4000 #define bCCKTRSSI 0x7f #define bCCKRxAGCReport 0xfe #define bCCKRxReport_AntSel 0x80000000 #define bCCKRxReport_MFOff 0x40000000 #define bCCKRxRxReport_SQLoss 0x20000000 #define bCCKRxReport_Pktloss 0x10000000 #define bCCKRxReport_Lockedbit 0x08000000 #define bCCKRxReport_RateError 0x04000000 #define bCCKRxReport_RxRate 0x03000000 #define bCCKRxFACounterLower 0xff #define bCCKRxFACounterUpper 0xff000000 #define bCCKRxHPAGCStart 0xe000 #define bCCKRxHPAGCFinal 0x1c00 #define bCCKRxFalseAlarmEnable 0x8000 #define bCCKFACounterFreeze 0x4000 #define bCCKTxPathSel 0x10000000 #define bCCKDefaultRxPath 0xc000000 #define bCCKOptionRxPath 0x3000000 // 5. PageC(0xC00) #define bNumOfSTF 0x3 // Useless #define bShift_L 0xc0 #define bGI_TH 0xc #define bRxPathA 0x1 #define bRxPathB 0x2 #define bRxPathC 0x4 #define bRxPathD 0x8 #define bTxPathA 0x1 #define bTxPathB 0x2 #define bTxPathC 0x4 #define bTxPathD 0x8 #define bTRSSIFreq 0x200 #define bADCBackoff 0x3000 #define bDFIRBackoff 0xc000 #define bTRSSILatchPhase 0x10000 #define bRxIDCOffset 0xff #define bRxQDCOffset 0xff00 #define bRxDFIRMode 0x1800000 #define bRxDCNFType 0xe000000 #define bRXIQImb_A 0x3ff #define bRXIQImb_B 0xfc00 #define bRXIQImb_C 0x3f0000 #define bRXIQImb_D 0xffc00000 #define bDC_dc_Notch 0x60000 #define bRxNBINotch 0x1f000000 #define bPD_TH 0xf #define bPD_TH_Opt2 0xc000 #define bPWED_TH 0x700 #define bIfMF_Win_L 0x800 #define bPD_Option 0x1000 #define bMF_Win_L 0xe000 #define bBW_Search_L 0x30000 #define bwin_enh_L 0xc0000 #define bBW_TH 0x700000 #define bED_TH2 0x3800000 #define bBW_option 0x4000000 #define bRatio_TH 0x18000000 #define bWindow_L 0xe0000000 #define bSBD_Option 0x1 #define bFrame_TH 0x1c #define bFS_Option 0x60 #define bDC_Slope_check 0x80 #define bFGuard_Counter_DC_L 0xe00 #define bFrame_Weight_Short 0x7000 #define bSub_Tune 0xe00000 #define bFrame_DC_Length 0xe000000 #define bSBD_start_offset 0x30000000 #define bFrame_TH_2 0x7 #define bFrame_GI2_TH 0x38 #define bGI2_Sync_en 0x40 #define bSarch_Short_Early 0x300 #define bSarch_Short_Late 0xc00 #define bSarch_GI2_Late 0x70000 #define bCFOAntSum 0x1 #define bCFOAcc 0x2 #define bCFOStartOffset 0xc #define bCFOLookBack 0x70 #define bCFOSumWeight 0x80 #define bDAGCEnable 0x10000 #define bTXIQImb_A 0x3ff #define bTXIQImb_B 0xfc00 #define bTXIQImb_C 0x3f0000 #define bTXIQImb_D 0xffc00000 #define bTxIDCOffset 0xff #define bTxQDCOffset 0xff00 #define bTxDFIRMode 0x10000 #define bTxPesudoNoiseOn 0x4000000 #define bTxPesudoNoise_A 0xff #define bTxPesudoNoise_B 0xff00 #define bTxPesudoNoise_C 0xff0000 #define bTxPesudoNoise_D 0xff000000 #define bCCADropOption 0x20000 #define bCCADropThres 0xfff00000 #define bEDCCA_H 0xf #define bEDCCA_L 0xf0 #define bLambda_ED 0x300 #define bRxInitialGain 0x7f #define bRxAntDivEn 0x80 #define bRxAGCAddressForLNA 0x7f00 #define bRxHighPowerFlow 0x8000 #define bRxAGCFreezeThres 0xc0000 #define bRxFreezeStep_AGC1 0x300000 #define bRxFreezeStep_AGC2 0xc00000 #define bRxFreezeStep_AGC3 0x3000000 #define bRxFreezeStep_AGC0 0xc000000 #define bRxRssi_Cmp_En 0x10000000 #define bRxQuickAGCEn 0x20000000 #define bRxAGCFreezeThresMode 0x40000000 #define bRxOverFlowCheckType 0x80000000 #define bRxAGCShift 0x7f #define bTRSW_Tri_Only 0x80 #define bPowerThres 0x300 #define bRxAGCEn 0x1 #define bRxAGCTogetherEn 0x2 #define bRxAGCMin 0x4 #define bRxHP_Ini 0x7 #define bRxHP_TRLNA 0x70 #define bRxHP_RSSI 0x700 #define bRxHP_BBP1 0x7000 #define bRxHP_BBP2 0x70000 #define bRxHP_BBP3 0x700000 #define bRSSI_H 0x7f0000 //the threshold for high power #define bRSSI_Gen 0x7f000000 //the threshold for ant diversity #define bRxSettle_TRSW 0x7 #define bRxSettle_LNA 0x38 #define bRxSettle_RSSI 0x1c0 #define bRxSettle_BBP 0xe00 #define bRxSettle_RxHP 0x7000 #define bRxSettle_AntSW_RSSI 0x38000 #define bRxSettle_AntSW 0xc0000 #define bRxProcessTime_DAGC 0x300000 #define bRxSettle_HSSI 0x400000 #define bRxProcessTime_BBPPW 0x800000 #define bRxAntennaPowerShift 0x3000000 #define bRSSITableSelect 0xc000000 #define bRxHP_Final 0x7000000 #define bRxHTSettle_BBP 0x7 #define bRxHTSettle_HSSI 0x8 #define bRxHTSettle_RxHP 0x70 #define bRxHTSettle_BBPPW 0x80 #define bRxHTSettle_Idle 0x300 #define bRxHTSettle_Reserved 0x1c00 #define bRxHTRxHPEn 0x8000 #define bRxHTAGCFreezeThres 0x30000 #define bRxHTAGCTogetherEn 0x40000 #define bRxHTAGCMin 0x80000 #define bRxHTAGCEn 0x100000 #define bRxHTDAGCEn 0x200000 #define bRxHTRxHP_BBP 0x1c00000 #define bRxHTRxHP_Final 0xe0000000 #define bRxPWRatioTH 0x3 #define bRxPWRatioEn 0x4 #define bRxMFHold 0x3800 #define bRxPD_Delay_TH1 0x38 #define bRxPD_Delay_TH2 0x1c0 #define bRxPD_DC_COUNT_MAX 0x600 //#define bRxMF_Hold 0x3800 #define bRxPD_Delay_TH 0x8000 #define bRxProcess_Delay 0xf0000 #define bRxSearchrange_GI2_Early 0x700000 #define bRxFrame_Guard_Counter_L 0x3800000 #define bRxSGI_Guard_L 0xc000000 #define bRxSGI_Search_L 0x30000000 #define bRxSGI_TH 0xc0000000 #define bDFSCnt0 0xff #define bDFSCnt1 0xff00 #define bDFSFlag 0xf0000 #define bMFWeightSum 0x300000 #define bMinIdxTH 0x7f000000 #define bDAFormat 0x40000 #define bTxChEmuEnable 0x01000000 #define bTRSWIsolation_A 0x7f #define bTRSWIsolation_B 0x7f00 #define bTRSWIsolation_C 0x7f0000 #define bTRSWIsolation_D 0x7f000000 #define bExtLNAGain 0x7c00 // 6. PageE(0xE00) #define bSTBCEn 0x4 // Useless #define bAntennaMapping 0x10 #define bNss 0x20 #define bCFOAntSumD 0x200 #define bPHYCounterReset 0x8000000 #define bCFOReportGet 0x4000000 #define bOFDMContinueTx 0x10000000 #define bOFDMSingleCarrier 0x20000000 #define bOFDMSingleTone 0x40000000 //#define bRxPath1 0x01 //#define bRxPath2 0x02 //#define bRxPath3 0x04 //#define bRxPath4 0x08 //#define bTxPath1 0x10 //#define bTxPath2 0x20 #define bHTDetect 0x100 #define bCFOEn 0x10000 #define bCFOValue 0xfff00000 #define bSigTone_Re 0x3f #define bSigTone_Im 0x7f00 #define bCounter_CCA 0xffff #define bCounter_ParityFail 0xffff0000 #define bCounter_RateIllegal 0xffff #define bCounter_CRC8Fail 0xffff0000 #define bCounter_MCSNoSupport 0xffff #define bCounter_FastSync 0xffff #define bShortCFO 0xfff #define bShortCFOTLength 12 //total #define bShortCFOFLength 11 //fraction #define bLongCFO 0x7ff #define bLongCFOTLength 11 #define bLongCFOFLength 11 #define bTailCFO 0x1fff #define bTailCFOTLength 13 #define bTailCFOFLength 12 #define bmax_en_pwdB 0xffff #define bCC_power_dB 0xffff0000 #define bnoise_pwdB 0xffff #define bPowerMeasTLength 10 #define bPowerMeasFLength 3 #define bRx_HT_BW 0x1 #define bRxSC 0x6 #define bRx_HT 0x8 #define bNB_intf_det_on 0x1 #define bIntf_win_len_cfg 0x30 #define bNB_Intf_TH_cfg 0x1c0 #define bRFGain 0x3f #define bTableSel 0x40 #define bTRSW 0x80 #define bRxSNR_A 0xff #define bRxSNR_B 0xff00 #define bRxSNR_C 0xff0000 #define bRxSNR_D 0xff000000 #define bSNREVMTLength 8 #define bSNREVMFLength 1 #define bCSI1st 0xff #define bCSI2nd 0xff00 #define bRxEVM1st 0xff0000 #define bRxEVM2nd 0xff000000 #define bSIGEVM 0xff #define bPWDB 0xff00 #define bSGIEN 0x10000 #define bSFactorQAM1 0xf // Useless #define bSFactorQAM2 0xf0 #define bSFactorQAM3 0xf00 #define bSFactorQAM4 0xf000 #define bSFactorQAM5 0xf0000 #define bSFactorQAM6 0xf0000 #define bSFactorQAM7 0xf00000 #define bSFactorQAM8 0xf000000 #define bSFactorQAM9 0xf0000000 #define bCSIScheme 0x100000 #define bNoiseLvlTopSet 0x3 // Useless #define bChSmooth 0x4 #define bChSmoothCfg1 0x38 #define bChSmoothCfg2 0x1c0 #define bChSmoothCfg3 0xe00 #define bChSmoothCfg4 0x7000 #define bMRCMode 0x800000 #define bTHEVMCfg 0x7000000 #define bLoopFitType 0x1 // Useless #define bUpdCFO 0x40 #define bUpdCFOOffData 0x80 #define bAdvUpdCFO 0x100 #define bAdvTimeCtrl 0x800 #define bUpdClko 0x1000 #define bFC 0x6000 #define bTrackingMode 0x8000 #define bPhCmpEnable 0x10000 #define bUpdClkoLTF 0x20000 #define bComChCFO 0x40000 #define bCSIEstiMode 0x80000 #define bAdvUpdEqz 0x100000 #define bUChCfg 0x7000000 #define bUpdEqz 0x8000000 //Rx Pseduo noise #define bRxPesudoNoiseOn 0x20000000 // Useless #define bRxPesudoNoise_A 0xff #define bRxPesudoNoise_B 0xff00 #define bRxPesudoNoise_C 0xff0000 #define bRxPesudoNoise_D 0xff000000 #define bPesudoNoiseState_A 0xffff #define bPesudoNoiseState_B 0xffff0000 #define bPesudoNoiseState_C 0xffff #define bPesudoNoiseState_D 0xffff0000 //7. RF Register //Zebra1 #define bZebra1_HSSIEnable 0x8 // Useless #define bZebra1_TRxControl 0xc00 #define bZebra1_TRxGainSetting 0x07f #define bZebra1_RxCorner 0xc00 #define bZebra1_TxChargePump 0x38 #define bZebra1_RxChargePump 0x7 #define bZebra1_ChannelNum 0xf80 #define bZebra1_TxLPFBW 0x400 #define bZebra1_RxLPFBW 0x600 //Zebra4 #define bRTL8256RegModeCtrl1 0x100 // Useless #define bRTL8256RegModeCtrl0 0x40 #define bRTL8256_TxLPFBW 0x18 #define bRTL8256_RxLPFBW 0x600 //RTL8258 #define bRTL8258_TxLPFBW 0xc // Useless #define bRTL8258_RxLPFBW 0xc00 #define bRTL8258_RSSILPFBW 0xc0 // // Other Definition // //byte endable for sb_write #define bByte0 0x1 // Useless #define bByte1 0x2 #define bByte2 0x4 #define bByte3 0x8 #define bWord0 0x3 #define bWord1 0xc #define bDWord 0xf //for PutRegsetting & GetRegSetting BitMask #define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f #define bMaskByte1 0xff00 #define bMaskByte2 0xff0000 #define bMaskByte3 0xff000000 #define bMaskHWord 0xffff0000 #define bMaskLWord 0x0000ffff #define bMaskDWord 0xffffffff #define bMaskH3Bytes 0xffffff00 #define bMask12Bits 0xfff #define bMaskH4Bits 0xf0000000 #define bMaskOFDM_D 0xffc00000 #define bMaskCCK 0x3f3f3f3f #define bEnable 0x1 // Useless #define bDisable 0x0 #define LeftAntenna 0x0 // Useless #define RightAntenna 0x1 #define tCheckTxStatus 500 //500ms // Useless #define tUpdateRxCounter 100 //100ms #define rateCCK 0 // Useless #define rateOFDM 1 #define rateHT 2 //define Register-End #define bPMAC_End 0x1ff // Useless #define bFPGAPHY0_End 0x8ff #define bFPGAPHY1_End 0x9ff #define bCCKPHY0_End 0xaff #define bOFDMPHY0_End 0xcff #define bOFDMPHY1_End 0xdff //define max debug item in each debug page //#define bMaxItem_FPGA_PHY0 0x9 //#define bMaxItem_FPGA_PHY1 0x3 //#define bMaxItem_PHY_11B 0x16 //#define bMaxItem_OFDM_PHY0 0x29 //#define bMaxItem_OFDM_PHY1 0x0 #define bPMACControl 0x0 // Useless #define bWMACControl 0x1 #define bWNICControl 0x2 #define PathA 0x0 // Useless #define PathB 0x1 #define PathC 0x2 #define PathD 0x3 /*--------------------------Define Parameters-------------------------------*/ #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/Hal8188EPwrSeq.h000066400000000000000000000323151261122257400216030ustar00rootroot00000000000000 /****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HAL8188EPWRSEQ_H__ #define __HAL8188EPWRSEQ_H__ #include "HalPwrSeqCmd.h" /* Check document WM-20110607-Paul-RTL8188E_Power_Architecture-R02.vsd There are 6 HW Power States: 0: POFF--Power Off 1: PDN--Power Down 2: CARDEMU--Card Emulation 3: ACT--Active Mode 4: LPS--Low Power State 5: SUS--Suspend The transision from different states are defined below TRANS_CARDEMU_TO_ACT TRANS_ACT_TO_CARDEMU TRANS_CARDEMU_TO_SUS TRANS_SUS_TO_CARDEMU TRANS_CARDEMU_TO_PDN TRANS_ACT_TO_LPS TRANS_LPS_TO_ACT TRANS_END PWR SEQ Version: rtl8188E_PwrSeq_V09.h */ #define RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS 10 #define RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS 10 #define RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS 10 #define RTL8188E_TRANS_SUS_TO_CARDEMU_STEPS 10 #define RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS 10 #define RTL8188E_TRANS_PDN_TO_CARDEMU_STEPS 10 #define RTL8188E_TRANS_ACT_TO_LPS_STEPS 15 #define RTL8188E_TRANS_LPS_TO_ACT_STEPS 15 #define RTL8188E_TRANS_END_STEPS 1 #define RTL8188E_TRANS_CARDEMU_TO_ACT \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0|BIT1, 0}, /* 0x02[1:0] = 0 reset BB*/ \ {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0}, /* 0x04[15] = 0 disable HWPDN (control by DRV)*/\ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, 0}, /*0x04[12:11] = 2b'00 disable WL suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x04[8] = 1 polling until return 0*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0}, /*wait till 0x04[8] = 0*/ \ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*LDO normal mode*/ \ #define RTL8188E_TRANS_ACT_TO_CARDEMU \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*LDO Sleep mode*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ #define RTL8188E_TRANS_CARDEMU_TO_SUS \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01enable WL suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11enable WL suspend for PCIe*/ \ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, BIT7}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \ {0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ #define RTL8188E_TRANS_SUS_TO_CARDEMU \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ #define RTL8188E_TRANS_CARDEMU_TO_CARDDIS \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \ {0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ #define RTL8188E_TRANS_CARDDIS_TO_CARDEMU \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ #define RTL8188E_TRANS_CARDEMU_TO_PDN \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ #define RTL8188E_TRANS_PDN_TO_CARDEMU \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ //This is used by driver for LPSRadioOff Procedure, not for FW LPS Step #define RTL8188E_TRANS_ACT_TO_LPS \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ #define RTL8188E_TRANS_LPS_TO_ACT \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ #define RTL8188E_TRANS_END \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // extern WLAN_PWR_CFG rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS+RTL8188E_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]; #endif //__HAL8188EPWRSEQ_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/Hal8192CPhyCfg.h000066400000000000000000000153651261122257400215410ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ /***************************************************************************** * Module: __INC_HAL8192CPHYCFG_H * * * Note: * * * Export: Constants, macro, functions(API), global variables(None). * * Abbrev: * * History: * Data Who Remark * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. * 2. Reorganize code architecture. * *****************************************************************************/ /* Check to see if the file has been included already. */ #ifndef __INC_HAL8192CPHYCFG_H #define __INC_HAL8192CPHYCFG_H /*--------------------------Define Parameters-------------------------------*/ #define LOOP_LIMIT 5 #define MAX_STALL_TIME 50 //us #define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) #define MAX_TXPWR_IDX_NMODE_92S 63 #define Reset_Cnt_Limit 3 #ifdef CONFIG_PCI_HCI #define MAX_AGGR_NUM 0x0A0A #else #define MAX_AGGR_NUM 0x0909 #endif #ifdef CONFIG_PCI_HCI #define SET_RTL8192SE_RF_SLEEP(_pAdapter) \ { \ u1Byte u1bTmp; \ u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL); \ u1bTmp |= BIT0; \ PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp); \ PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0); \ PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF); \ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ delay_us(100); \ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0); \ delay_us(10); \ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC); \ delay_us(10); \ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ delay_us(10); \ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ } #endif /*--------------------------Define Parameters-------------------------------*/ /*------------------------------Define structure----------------------------*/ /* BB/RF related */ /*------------------------------Define structure----------------------------*/ /*------------------------Export global variable----------------------------*/ /*------------------------Export global variable----------------------------*/ /*------------------------Export Marco Definition---------------------------*/ /*------------------------Export Marco Definition---------------------------*/ /*--------------------------Exported Function prototype---------------------*/ // // BB and RF register read/write // u32 PHY_QueryBBReg8192C( IN PADAPTER Adapter, IN u32 RegAddr, IN u32 BitMask ); void PHY_SetBBReg8192C( IN PADAPTER Adapter, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ); u32 PHY_QueryRFReg8192C( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 RegAddr, IN u32 BitMask ); void PHY_SetRFReg8192C( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ); // // Initialization related function // /* MAC/BB/RF HAL config */ int PHY_MACConfig8192C( IN PADAPTER Adapter ); int PHY_BBConfig8192C( IN PADAPTER Adapter ); int PHY_RFConfig8192C( IN PADAPTER Adapter ); /* RF config */ int rtl8192c_PHY_ConfigRFWithParaFile( IN PADAPTER Adapter, IN u8* pFileName, IN u8 eRFPath); int rtl8192c_PHY_ConfigRFWithHeaderFile( IN PADAPTER Adapter, IN u8 eRFPath); /* BB/RF readback check for making sure init OK */ int rtl8192c_PHY_CheckBBAndRFOK( IN PADAPTER Adapter, IN HW_BLOCK_E CheckBlock, IN u8 eRFPath ); /* Read initi reg value for tx power setting. */ void rtl8192c_PHY_GetHWRegOriginalValue( IN PADAPTER Adapter ); // // RF Power setting // //extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter, // IN RT_RF_POWER_STATE eRFPowerState); // // BB TX Power R/W // void PHY_GetTxPowerLevel8192C( IN PADAPTER Adapter, OUT s32* powerlevel ); void PHY_SetTxPowerLevel8192C( IN PADAPTER Adapter, IN u8 channel ); BOOLEAN PHY_UpdateTxPowerDbm8192C( IN PADAPTER Adapter, IN int powerInDbm ); // VOID PHY_ScanOperationBackup8192C(IN PADAPTER Adapter, IN u8 Operation ); // // Switch bandwidth for 8192S // //extern void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer ); void PHY_SetBWMode8192C( IN PADAPTER pAdapter, IN CHANNEL_WIDTH ChnlWidth, IN unsigned char Offset ); // // Set FW CMD IO for 8192S. // //extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter, // IN IO_TYPE IOType); // // Set A2 entry to fw for 8192S // extern void FillA2Entry8192C( IN PADAPTER Adapter, IN u8 index, IN u8* val); // // channel switch related funciton // //extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer ); void PHY_SwChnl8192C( IN PADAPTER pAdapter, IN u8 channel ); VOID PHY_SetSwChnlBWMode8192C( IN PADAPTER Adapter, IN u8 channel, IN CHANNEL_WIDTH Bandwidth, IN u8 Offset40, IN u8 Offset80 ); // // BB/MAC/RF other monitor API // void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter, IN BOOLEAN bEnableMonitorMode ); BOOLEAN PHY_CheckIsLegalRfPath8192C(IN PADAPTER pAdapter, IN u32 eRFPath ); VOID rtl8192c_PHY_SetRFPathSwitch(IN PADAPTER pAdapter, IN BOOLEAN bMain); // // Modify the value of the hw register when beacon interval be changed. // void rtl8192c_PHY_SetBeaconHwReg( IN PADAPTER Adapter, IN u16 BeaconInterval ); extern VOID PHY_SwitchEphyParameter( IN PADAPTER Adapter ); extern VOID PHY_EnableHostClkReq( IN PADAPTER Adapter ); BOOLEAN SetAntennaConfig92C( IN PADAPTER Adapter, IN u8 DefaultAnt ); #ifdef RTL8192C_RECONFIG_TO_1T1R extern void PHY_Reconfig_To_1T1R(_adapter *padapter); #endif /*--------------------------Exported Function prototype---------------------*/ #endif // __INC_HAL8192CPHYCFG_H rtl8812au-4.3.8.12175.20140902+dfsg/include/Hal8192CPhyReg.h000066400000000000000000001107641261122257400215560ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ /***************************************************************************** * * Module: __INC_HAL8192CPHYREG_H * * * Note: 1. Define PMAC/BB register map * 2. Define RF register map * 3. PMAC/BB register bit mask. * 4. RF reg bit mask. * 5. Other BB/RF relative definition. * * * Export: Constants, macro, functions(API), global variables(None). * * Abbrev: * * History: * Data Who Remark * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. * 2. Reorganize code architecture. * 09/25/2008 MH 1. Add RL6052 register definition * *****************************************************************************/ #ifndef __INC_HAL8192CPHYREG_H #define __INC_HAL8192CPHYREG_H /*--------------------------Define Parameters-------------------------------*/ //============================================================ // 8192S Regsiter offset definition //============================================================ // // BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF // 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF // 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 // 3. RF register 0x00-2E // 4. Bit Mask for BB/RF register // 5. Other defintion for BB/RF R/W // // // 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF // 1. Page1(0x100) // #define rPMAC_Reset 0x100 #define rPMAC_TxStart 0x104 #define rPMAC_TxLegacySIG 0x108 #define rPMAC_TxHTSIG1 0x10c #define rPMAC_TxHTSIG2 0x110 #define rPMAC_PHYDebug 0x114 #define rPMAC_TxPacketNum 0x118 #define rPMAC_TxIdle 0x11c #define rPMAC_TxMACHeader0 0x120 #define rPMAC_TxMACHeader1 0x124 #define rPMAC_TxMACHeader2 0x128 #define rPMAC_TxMACHeader3 0x12c #define rPMAC_TxMACHeader4 0x130 #define rPMAC_TxMACHeader5 0x134 #define rPMAC_TxDataType 0x138 #define rPMAC_TxRandomSeed 0x13c #define rPMAC_CCKPLCPPreamble 0x140 #define rPMAC_CCKPLCPHeader 0x144 #define rPMAC_CCKCRC16 0x148 #define rPMAC_OFDMRxCRC32OK 0x170 #define rPMAC_OFDMRxCRC32Er 0x174 #define rPMAC_OFDMRxParityEr 0x178 #define rPMAC_OFDMRxCRC8Er 0x17c #define rPMAC_CCKCRxRC16Er 0x180 #define rPMAC_CCKCRxRC32Er 0x184 #define rPMAC_CCKCRxRC32OK 0x188 #define rPMAC_TxStatus 0x18c // // 2. Page2(0x200) // // The following two definition are only used for USB interface. #define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. #define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. // // 3. Page8(0x800) // #define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? #define rFPGA0_TxInfo 0x804 // Status report?? #define rFPGA0_PSDFunction 0x808 #define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? #define rFPGA0_RFTiming1 0x810 // Useless now #define rFPGA0_RFTiming2 0x814 #define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register #define rFPGA0_XA_HSSIParameter2 0x824 #define rFPGA0_XB_HSSIParameter1 0x828 #define rFPGA0_XB_HSSIParameter2 0x82c #define rTxAGC_B_Rate18_06 0x830 #define rTxAGC_B_Rate54_24 0x834 #define rTxAGC_B_CCK1_55_Mcs32 0x838 #define rTxAGC_B_Mcs03_Mcs00 0x83c #define rTxAGC_B_Mcs07_Mcs04 0x848 #define rTxAGC_B_Mcs11_Mcs08 0x84c #define rFPGA0_XA_LSSIParameter 0x840 #define rFPGA0_XB_LSSIParameter 0x844 #define rFPGA0_RFWakeUpParameter 0x850 // Useless now #define rFPGA0_RFSleepUpParameter 0x854 #define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch #define rFPGA0_XCD_SwitchControl 0x85c #define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch #define rFPGA0_XB_RFInterfaceOE 0x864 #define rTxAGC_B_Mcs15_Mcs12 0x868 #define rTxAGC_B_CCK11_A_CCK2_11 0x86c #define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control #define rFPGA0_XCD_RFInterfaceSW 0x874 #define rFPGA0_XAB_RFParameter 0x878 // RF Parameter #define rFPGA0_XCD_RFParameter 0x87c #define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? #define rFPGA0_AnalogParameter2 0x884 #define rFPGA0_AnalogParameter3 0x888 // Useless now #define rFPGA0_AnalogParameter4 0x88c #define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback #define rFPGA0_XB_LSSIReadBack 0x8a4 #define rFPGA0_XC_LSSIReadBack 0x8a8 #define rFPGA0_XD_LSSIReadBack 0x8ac #define rFPGA0_PSDReport 0x8b4 // Useless now #define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback #define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback #define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value #define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now // // 4. Page9(0x900) // #define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? #define rFPGA1_TxBlock 0x904 // Useless now #define rFPGA1_DebugSelect 0x908 // Useless now #define rFPGA1_TxInfo 0x90c // Useless now // Status report?? #define rS0S1_PathSwitch 0x948 // // 5. PageA(0xA00) // // Set Control channel to upper or lower. These settings are required only for 40MHz #define rCCK0_System 0xa00 #define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI #define rCCK0_CCA 0xa08 // Disable init gain now // Init gain #define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series #define rCCK0_RxAGC2 0xa10 //AGC & DAGC #define rCCK0_RxHP 0xa14 #define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold #define rCCK0_DSPParameter2 0xa1c //SQ threshold #define rCCK0_TxFilter1 0xa20 #define rCCK0_TxFilter2 0xa24 #define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 #define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report #define rCCK0_TRSSIReport 0xa50 #define rCCK0_RxReport 0xa54 //0xa57 #define rCCK0_FACounterLower 0xa5c //0xa5b #define rCCK0_FACounterUpper 0xa58 //0xa5c // // PageB(0xB00) // #define rPdp_AntA 0xb00 #define rPdp_AntA_4 0xb04 #define rConfig_Pmpd_AntA 0xb28 #define rConfig_AntA 0xb68 #define rConfig_AntB 0xb6c #define rPdp_AntB 0xb70 #define rPdp_AntB_4 0xb74 #define rConfig_Pmpd_AntB 0xb98 #define rAPK 0xbd8 // // 6. PageC(0xC00) // #define rOFDM0_LSTF 0xc00 #define rOFDM0_TRxPathEnable 0xc04 #define rOFDM0_TRMuxPar 0xc08 #define rOFDM0_TRSWIsolation 0xc0c #define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter #define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix #define rOFDM0_XBRxAFE 0xc18 #define rOFDM0_XBRxIQImbalance 0xc1c #define rOFDM0_XCRxAFE 0xc20 #define rOFDM0_XCRxIQImbalance 0xc24 #define rOFDM0_XDRxAFE 0xc28 #define rOFDM0_XDRxIQImbalance 0xc2c #define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain #define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. #define rOFDM0_RxDetector3 0xc38 //Frame Sync. #define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI #define rOFDM0_RxDSP 0xc40 //Rx Sync Path #define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC #define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold #define rOFDM0_ECCAThreshold 0xc4c // energy CCA #define rOFDM0_XAAGCCore1 0xc50 // DIG #define rOFDM0_XAAGCCore2 0xc54 #define rOFDM0_XBAGCCore1 0xc58 #define rOFDM0_XBAGCCore2 0xc5c #define rOFDM0_XCAGCCore1 0xc60 #define rOFDM0_XCAGCCore2 0xc64 #define rOFDM0_XDAGCCore1 0xc68 #define rOFDM0_XDAGCCore2 0xc6c #define rOFDM0_AGCParameter1 0xc70 #define rOFDM0_AGCParameter2 0xc74 #define rOFDM0_AGCRSSITable 0xc78 #define rOFDM0_HTSTFAGC 0xc7c #define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG #define rOFDM0_XATxAFE 0xc84 #define rOFDM0_XBTxIQImbalance 0xc88 #define rOFDM0_XBTxAFE 0xc8c #define rOFDM0_XCTxIQImbalance 0xc90 #define rOFDM0_XCTxAFE 0xc94 #define rOFDM0_XDTxIQImbalance 0xc98 #define rOFDM0_XDTxAFE 0xc9c #define rOFDM0_RxIQExtAnta 0xca0 #define rOFDM0_TxCoeff1 0xca4 #define rOFDM0_TxCoeff2 0xca8 #define rOFDM0_TxCoeff3 0xcac #define rOFDM0_TxCoeff4 0xcb0 #define rOFDM0_TxCoeff5 0xcb4 #define rOFDM0_TxCoeff6 0xcb8 #define rOFDM0_RxHPParameter 0xce0 #define rOFDM0_TxPseudoNoiseWgt 0xce4 #define rOFDM0_FrameSync 0xcf0 #define rOFDM0_DFSReport 0xcf4 // // 7. PageD(0xD00) // #define rOFDM1_LSTF 0xd00 #define rOFDM1_TRxPathEnable 0xd04 #define rOFDM1_CFO 0xd08 // No setting now #define rOFDM1_CSI1 0xd10 #define rOFDM1_SBD 0xd14 #define rOFDM1_CSI2 0xd18 #define rOFDM1_CFOTracking 0xd2c #define rOFDM1_TRxMesaure1 0xd34 #define rOFDM1_IntfDet 0xd3c #define rOFDM1_PseudoNoiseStateAB 0xd50 #define rOFDM1_PseudoNoiseStateCD 0xd54 #define rOFDM1_RxPseudoNoiseWgt 0xd58 #define rOFDM_PHYCounter1 0xda0 //cca, parity fail #define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail #define rOFDM_PHYCounter3 0xda8 //MCS not support #define rOFDM_ShortCFOAB 0xdac // No setting now #define rOFDM_ShortCFOCD 0xdb0 #define rOFDM_LongCFOAB 0xdb4 #define rOFDM_LongCFOCD 0xdb8 #define rOFDM_TailCFOAB 0xdbc #define rOFDM_TailCFOCD 0xdc0 #define rOFDM_PWMeasure1 0xdc4 #define rOFDM_PWMeasure2 0xdc8 #define rOFDM_BWReport 0xdcc #define rOFDM_AGCReport 0xdd0 #define rOFDM_RxSNR 0xdd4 #define rOFDM_RxEVMCSI 0xdd8 #define rOFDM_SIGReport 0xddc // // 8. PageE(0xE00) // #define rTxAGC_A_Rate18_06 0xe00 #define rTxAGC_A_Rate54_24 0xe04 #define rTxAGC_A_CCK1_Mcs32 0xe08 #define rTxAGC_A_Mcs03_Mcs00 0xe10 #define rTxAGC_A_Mcs07_Mcs04 0xe14 #define rTxAGC_A_Mcs11_Mcs08 0xe18 #define rTxAGC_A_Mcs15_Mcs12 0xe1c #define rFPGA0_IQK 0xe28 #define rTx_IQK_Tone_A 0xe30 #define rRx_IQK_Tone_A 0xe34 #define rTx_IQK_PI_A 0xe38 #define rRx_IQK_PI_A 0xe3c #define rTx_IQK 0xe40 #define rRx_IQK 0xe44 #define rIQK_AGC_Pts 0xe48 #define rIQK_AGC_Rsp 0xe4c #define rTx_IQK_Tone_B 0xe50 #define rRx_IQK_Tone_B 0xe54 #define rTx_IQK_PI_B 0xe58 #define rRx_IQK_PI_B 0xe5c #define rIQK_AGC_Cont 0xe60 #define rBlue_Tooth 0xe6c #define rRx_Wait_CCA 0xe70 #define rTx_CCK_RFON 0xe74 #define rTx_CCK_BBON 0xe78 #define rTx_OFDM_RFON 0xe7c #define rTx_OFDM_BBON 0xe80 #define rTx_To_Rx 0xe84 #define rTx_To_Tx 0xe88 #define rRx_CCK 0xe8c #define rTx_Power_Before_IQK_A 0xe94 #define rTx_Power_After_IQK_A 0xe9c #define rRx_Power_Before_IQK_A 0xea0 #define rRx_Power_Before_IQK_A_2 0xea4 #define rRx_Power_After_IQK_A 0xea8 #define rRx_Power_After_IQK_A_2 0xeac #define rTx_Power_Before_IQK_B 0xeb4 #define rTx_Power_After_IQK_B 0xebc #define rRx_Power_Before_IQK_B 0xec0 #define rRx_Power_Before_IQK_B_2 0xec4 #define rRx_Power_After_IQK_B 0xec8 #define rRx_Power_After_IQK_B_2 0xecc #define rRx_OFDM 0xed0 #define rRx_Wait_RIFS 0xed4 #define rRx_TO_Rx 0xed8 #define rStandby 0xedc #define rSleep 0xee0 #define rPMPD_ANAEN 0xeec // // 7. RF Register 0x00-0x2E (RF 8256) // RF-0222D 0x00-3F // //Zebra1 #define rZebra1_HSSIEnable 0x0 // Useless now #define rZebra1_TRxEnable1 0x1 #define rZebra1_TRxEnable2 0x2 #define rZebra1_AGC 0x4 #define rZebra1_ChargePump 0x5 #define rZebra1_Channel 0x7 // RF channel switch //#endif #define rZebra1_TxGain 0x8 // Useless now #define rZebra1_TxLPF 0x9 #define rZebra1_RxLPF 0xb #define rZebra1_RxHPFCorner 0xc //Zebra4 #define rGlobalCtrl 0 // Useless now #define rRTL8256_TxLPF 19 #define rRTL8256_RxLPF 11 //RTL8258 #define rRTL8258_TxLPF 0x11 // Useless now #define rRTL8258_RxLPF 0x13 #define rRTL8258_RSSILPF 0xa // // RL6052 Register definition // #define RF_AC 0x00 // #define RF_IQADJ_G1 0x01 // #define RF_IQADJ_G2 0x02 // #define RF_BS_PA_APSET_G1_G4 0x03 #define RF_BS_PA_APSET_G5_G8 0x04 #define RF_POW_TRSW 0x05 // #define RF_GAIN_RX 0x06 // #define RF_GAIN_TX 0x07 // #define RF_TXM_IDAC 0x08 // #define RF_IPA_G 0x09 // #define RF_TXBIAS_G 0x0A #define RF_TXPA_AG 0x0B #define RF_IPA_A 0x0C // #define RF_TXBIAS_A 0x0D #define RF_BS_PA_APSET_G9_G11 0x0E #define RF_BS_IQGEN 0x0F // #define RF_MODE1 0x10 // #define RF_MODE2 0x11 // #define RF_RX_AGC_HP 0x12 // #define RF_TX_AGC 0x13 // #define RF_BIAS 0x14 // #define RF_IPA 0x15 // #define RF_TXBIAS 0x16 // #define RF_POW_ABILITY 0x17 // #define RF_MODE_AG 0x18 // #define rRfChannel 0x18 // RF channel and BW switch #define RF_CHNLBW 0x18 // RF channel and BW switch #define RF_TOP 0x19 // #define RF_RX_G1 0x1A // #define RF_RX_G2 0x1B // #define RF_RX_BB2 0x1C // #define RF_RX_BB1 0x1D // #define RF_RCK1 0x1E // #define RF_RCK2 0x1F // #define RF_TX_G1 0x20 // #define RF_TX_G2 0x21 // #define RF_TX_G3 0x22 // #define RF_TX_BB1 0x23 // #define RF_T_METER 0x24 // #define RF_SYN_G1 0x25 // RF TX Power control #define RF_SYN_G2 0x26 // RF TX Power control #define RF_SYN_G3 0x27 // RF TX Power control #define RF_SYN_G4 0x28 // RF TX Power control #define RF_SYN_G5 0x29 // RF TX Power control #define RF_SYN_G6 0x2A // RF TX Power control #define RF_SYN_G7 0x2B // RF TX Power control #define RF_SYN_G8 0x2C // RF TX Power control #define RF_RCK_OS 0x30 // RF TX PA control #define RF_TXPA_G1 0x31 // RF TX PA control #define RF_TXPA_G2 0x32 // RF TX PA control #define RF_TXPA_G3 0x33 // RF TX PA control #define RF_TX_BIAS_A 0x35 #define RF_TX_BIAS_D 0x36 #define RF_LOBF_9 0x38 #define RF_RXRF_A3 0x3C // #define RF_TRSW 0x3F #define RF_TXRF_A2 0x41 #define RF_TXPA_G4 0x46 #define RF_TXPA_A4 0x4B #define RF_0x52 0x52 #define RF_WE_LUT 0xEF #define RF_S0S1 0xB0 // //Bit Mask // // 1. Page1(0x100) #define bBBResetB 0x100 // Useless now? #define bGlobalResetB 0x200 #define bOFDMTxStart 0x4 #define bCCKTxStart 0x8 #define bCRC32Debug 0x100 #define bPMACLoopback 0x10 #define bTxLSIG 0xffffff #define bOFDMTxRate 0xf #define bOFDMTxReserved 0x10 #define bOFDMTxLength 0x1ffe0 #define bOFDMTxParity 0x20000 #define bTxHTSIG1 0xffffff #define bTxHTMCSRate 0x7f #define bTxHTBW 0x80 #define bTxHTLength 0xffff00 #define bTxHTSIG2 0xffffff #define bTxHTSmoothing 0x1 #define bTxHTSounding 0x2 #define bTxHTReserved 0x4 #define bTxHTAggreation 0x8 #define bTxHTSTBC 0x30 #define bTxHTAdvanceCoding 0x40 #define bTxHTShortGI 0x80 #define bTxHTNumberHT_LTF 0x300 #define bTxHTCRC8 0x3fc00 #define bCounterReset 0x10000 #define bNumOfOFDMTx 0xffff #define bNumOfCCKTx 0xffff0000 #define bTxIdleInterval 0xffff #define bOFDMService 0xffff0000 #define bTxMACHeader 0xffffffff #define bTxDataInit 0xff #define bTxHTMode 0x100 #define bTxDataType 0x30000 #define bTxRandomSeed 0xffffffff #define bCCKTxPreamble 0x1 #define bCCKTxSFD 0xffff0000 #define bCCKTxSIG 0xff #define bCCKTxService 0xff00 #define bCCKLengthExt 0x8000 #define bCCKTxLength 0xffff0000 #define bCCKTxCRC16 0xffff #define bCCKTxStatus 0x1 #define bOFDMTxStatus 0x2 #define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) // 2. Page8(0x800) #define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD #define bJapanMode 0x2 #define bCCKTxSC 0x30 #define bCCKEn 0x1000000 #define bOFDMEn 0x2000000 #define bOFDMRxADCPhase 0x10000 // Useless now #define bOFDMTxDACPhase 0x40000 #define bXATxAGC 0x3f #define bAntennaSelect 0x0300 #define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage #define bXCTxAGC 0xf000 #define bXDTxAGC 0xf0000 #define bPAStart 0xf0000000 // Useless now #define bTRStart 0x00f00000 #define bRFStart 0x0000f000 #define bBBStart 0x000000f0 #define bBBCCKStart 0x0000000f #define bPAEnd 0xf //Reg0x814 #define bTREnd 0x0f000000 #define bRFEnd 0x000f0000 #define bCCAMask 0x000000f0 //T2R #define bR2RCCAMask 0x00000f00 #define bHSSI_R2TDelay 0xf8000000 #define bHSSI_T2RDelay 0xf80000 #define bContTxHSSI 0x400 //chane gain at continue Tx #define bIGFromCCK 0x200 #define bAGCAddress 0x3f #define bRxHPTx 0x7000 #define bRxHPT2R 0x38000 #define bRxHPCCKIni 0xc0000 #define bAGCTxCode 0xc00000 #define bAGCRxCode 0x300000 #define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 #define b3WireAddressLength 0x400 #define b3WireRFPowerDown 0x1 // Useless now //#define bHWSISelect 0x8 #define b5GPAPEPolarity 0x40000000 #define b2GPAPEPolarity 0x80000000 #define bRFSW_TxDefaultAnt 0x3 #define bRFSW_TxOptionAnt 0x30 #define bRFSW_RxDefaultAnt 0x300 #define bRFSW_RxOptionAnt 0x3000 #define bRFSI_3WireData 0x1 #define bRFSI_3WireClock 0x2 #define bRFSI_3WireLoad 0x4 #define bRFSI_3WireRW 0x8 #define bRFSI_3Wire 0xf #define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW #define bRFSI_TRSW 0x20 // Useless now #define bRFSI_TRSWB 0x40 #define bRFSI_ANTSW 0x100 #define bRFSI_ANTSWB 0x200 #define bRFSI_PAPE 0x400 #define bRFSI_PAPE5G 0x800 #define bBandSelect 0x1 #define bHTSIG2_GI 0x80 #define bHTSIG2_Smoothing 0x01 #define bHTSIG2_Sounding 0x02 #define bHTSIG2_Aggreaton 0x08 #define bHTSIG2_STBC 0x30 #define bHTSIG2_AdvCoding 0x40 #define bHTSIG2_NumOfHTLTF 0x300 #define bHTSIG2_CRC8 0x3fc #define bHTSIG1_MCS 0x7f #define bHTSIG1_BandWidth 0x80 #define bHTSIG1_HTLength 0xffff #define bLSIG_Rate 0xf #define bLSIG_Reserved 0x10 #define bLSIG_Length 0x1fffe #define bLSIG_Parity 0x20 #define bCCKRxPhase 0x4 #define bLSSIReadAddress 0x7f800000 // T65 RF #define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal #define bLSSIReadBackData 0xfffff // T65 RF #define bLSSIReadOKFlag 0x1000 // Useless now #define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz #define bRegulator0Standby 0x1 #define bRegulatorPLLStandby 0x2 #define bRegulator1Standby 0x4 #define bPLLPowerUp 0x8 #define bDPLLPowerUp 0x10 #define bDA10PowerUp 0x20 #define bAD7PowerUp 0x200 #define bDA6PowerUp 0x2000 #define bXtalPowerUp 0x4000 #define b40MDClkPowerUP 0x8000 #define bDA6DebugMode 0x20000 #define bDA6Swing 0x380000 #define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ #define b80MClkDelay 0x18000000 // Useless #define bAFEWatchDogEnable 0x20000000 #define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap #define bXtalCap23 0x3 #define bXtalCap92x 0x0f000000 #define bXtalCap 0x0f000000 #define bIntDifClkEnable 0x400 // Useless #define bExtSigClkEnable 0x800 #define bBandgapMbiasPowerUp 0x10000 #define bAD11SHGain 0xc0000 #define bAD11InputRange 0x700000 #define bAD11OPCurrent 0x3800000 #define bIPathLoopback 0x4000000 #define bQPathLoopback 0x8000000 #define bAFELoopback 0x10000000 #define bDA10Swing 0x7e0 #define bDA10Reverse 0x800 #define bDAClkSource 0x1000 #define bAD7InputRange 0x6000 #define bAD7Gain 0x38000 #define bAD7OutputCMMode 0x40000 #define bAD7InputCMMode 0x380000 #define bAD7Current 0xc00000 #define bRegulatorAdjust 0x7000000 #define bAD11PowerUpAtTx 0x1 #define bDA10PSAtTx 0x10 #define bAD11PowerUpAtRx 0x100 #define bDA10PSAtRx 0x1000 #define bCCKRxAGCFormat 0x200 #define bPSDFFTSamplepPoint 0xc000 #define bPSDAverageNum 0x3000 #define bIQPathControl 0xc00 #define bPSDFreq 0x3ff #define bPSDAntennaPath 0x30 #define bPSDIQSwitch 0x40 #define bPSDRxTrigger 0x400000 #define bPSDTxTrigger 0x80000000 #define bPSDSineToneScale 0x7f000000 #define bPSDReport 0xffff // 3. Page9(0x900) #define bOFDMTxSC 0x30000000 // Useless #define bCCKTxOn 0x1 #define bOFDMTxOn 0x2 #define bDebugPage 0xfff //reset debug page and also HWord, LWord #define bDebugItem 0xff //reset debug page and LWord #define bAntL 0x10 #define bAntNonHT 0x100 #define bAntHT1 0x1000 #define bAntHT2 0x10000 #define bAntHT1S1 0x100000 #define bAntNonHTS1 0x1000000 // 4. PageA(0xA00) #define bCCKBBMode 0x3 // Useless #define bCCKTxPowerSaving 0x80 #define bCCKRxPowerSaving 0x40 #define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch #define bCCKScramble 0x8 // Useless #define bCCKAntDiversity 0x8000 #define bCCKCarrierRecovery 0x4000 #define bCCKTxRate 0x3000 #define bCCKDCCancel 0x0800 #define bCCKISICancel 0x0400 #define bCCKMatchFilter 0x0200 #define bCCKEqualizer 0x0100 #define bCCKPreambleDetect 0x800000 #define bCCKFastFalseCCA 0x400000 #define bCCKChEstStart 0x300000 #define bCCKCCACount 0x080000 #define bCCKcs_lim 0x070000 #define bCCKBistMode 0x80000000 #define bCCKCCAMask 0x40000000 #define bCCKTxDACPhase 0x4 #define bCCKRxADCPhase 0x20000000 //r_rx_clk #define bCCKr_cp_mode0 0x0100 #define bCCKTxDCOffset 0xf0 #define bCCKRxDCOffset 0xf #define bCCKCCAMode 0xc000 #define bCCKFalseCS_lim 0x3f00 #define bCCKCS_ratio 0xc00000 #define bCCKCorgBit_sel 0x300000 #define bCCKPD_lim 0x0f0000 #define bCCKNewCCA 0x80000000 #define bCCKRxHPofIG 0x8000 #define bCCKRxIG 0x7f00 #define bCCKLNAPolarity 0x800000 #define bCCKRx1stGain 0x7f0000 #define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity #define bCCKRxAGCSatLevel 0x1f000000 #define bCCKRxAGCSatCount 0xe0 #define bCCKRxRFSettle 0x1f //AGCsamp_dly #define bCCKFixedRxAGC 0x8000 //#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 #define bCCKAntennaPolarity 0x2000 #define bCCKTxFilterType 0x0c00 #define bCCKRxAGCReportType 0x0300 #define bCCKRxDAGCEn 0x80000000 #define bCCKRxDAGCPeriod 0x20000000 #define bCCKRxDAGCSatLevel 0x1f000000 #define bCCKTimingRecovery 0x800000 #define bCCKTxC0 0x3f0000 #define bCCKTxC1 0x3f000000 #define bCCKTxC2 0x3f #define bCCKTxC3 0x3f00 #define bCCKTxC4 0x3f0000 #define bCCKTxC5 0x3f000000 #define bCCKTxC6 0x3f #define bCCKTxC7 0x3f00 #define bCCKDebugPort 0xff0000 #define bCCKDACDebug 0x0f000000 #define bCCKFalseAlarmEnable 0x8000 #define bCCKFalseAlarmRead 0x4000 #define bCCKTRSSI 0x7f #define bCCKRxAGCReport 0xfe #define bCCKRxReport_AntSel 0x80000000 #define bCCKRxReport_MFOff 0x40000000 #define bCCKRxRxReport_SQLoss 0x20000000 #define bCCKRxReport_Pktloss 0x10000000 #define bCCKRxReport_Lockedbit 0x08000000 #define bCCKRxReport_RateError 0x04000000 #define bCCKRxReport_RxRate 0x03000000 #define bCCKRxFACounterLower 0xff #define bCCKRxFACounterUpper 0xff000000 #define bCCKRxHPAGCStart 0xe000 #define bCCKRxHPAGCFinal 0x1c00 #define bCCKRxFalseAlarmEnable 0x8000 #define bCCKFACounterFreeze 0x4000 #define bCCKTxPathSel 0x10000000 #define bCCKDefaultRxPath 0xc000000 #define bCCKOptionRxPath 0x3000000 // 5. PageC(0xC00) #define bNumOfSTF 0x3 // Useless #define bShift_L 0xc0 #define bGI_TH 0xc #define bRxPathA 0x1 #define bRxPathB 0x2 #define bRxPathC 0x4 #define bRxPathD 0x8 #define bTxPathA 0x1 #define bTxPathB 0x2 #define bTxPathC 0x4 #define bTxPathD 0x8 #define bTRSSIFreq 0x200 #define bADCBackoff 0x3000 #define bDFIRBackoff 0xc000 #define bTRSSILatchPhase 0x10000 #define bRxIDCOffset 0xff #define bRxQDCOffset 0xff00 #define bRxDFIRMode 0x1800000 #define bRxDCNFType 0xe000000 #define bRXIQImb_A 0x3ff #define bRXIQImb_B 0xfc00 #define bRXIQImb_C 0x3f0000 #define bRXIQImb_D 0xffc00000 #define bDC_dc_Notch 0x60000 #define bRxNBINotch 0x1f000000 #define bPD_TH 0xf #define bPD_TH_Opt2 0xc000 #define bPWED_TH 0x700 #define bIfMF_Win_L 0x800 #define bPD_Option 0x1000 #define bMF_Win_L 0xe000 #define bBW_Search_L 0x30000 #define bwin_enh_L 0xc0000 #define bBW_TH 0x700000 #define bED_TH2 0x3800000 #define bBW_option 0x4000000 #define bRatio_TH 0x18000000 #define bWindow_L 0xe0000000 #define bSBD_Option 0x1 #define bFrame_TH 0x1c #define bFS_Option 0x60 #define bDC_Slope_check 0x80 #define bFGuard_Counter_DC_L 0xe00 #define bFrame_Weight_Short 0x7000 #define bSub_Tune 0xe00000 #define bFrame_DC_Length 0xe000000 #define bSBD_start_offset 0x30000000 #define bFrame_TH_2 0x7 #define bFrame_GI2_TH 0x38 #define bGI2_Sync_en 0x40 #define bSarch_Short_Early 0x300 #define bSarch_Short_Late 0xc00 #define bSarch_GI2_Late 0x70000 #define bCFOAntSum 0x1 #define bCFOAcc 0x2 #define bCFOStartOffset 0xc #define bCFOLookBack 0x70 #define bCFOSumWeight 0x80 #define bDAGCEnable 0x10000 #define bTXIQImb_A 0x3ff #define bTXIQImb_B 0xfc00 #define bTXIQImb_C 0x3f0000 #define bTXIQImb_D 0xffc00000 #define bTxIDCOffset 0xff #define bTxQDCOffset 0xff00 #define bTxDFIRMode 0x10000 #define bTxPesudoNoiseOn 0x4000000 #define bTxPesudoNoise_A 0xff #define bTxPesudoNoise_B 0xff00 #define bTxPesudoNoise_C 0xff0000 #define bTxPesudoNoise_D 0xff000000 #define bCCADropOption 0x20000 #define bCCADropThres 0xfff00000 #define bEDCCA_H 0xf #define bEDCCA_L 0xf0 #define bLambda_ED 0x300 #define bRxInitialGain 0x7f #define bRxAntDivEn 0x80 #define bRxAGCAddressForLNA 0x7f00 #define bRxHighPowerFlow 0x8000 #define bRxAGCFreezeThres 0xc0000 #define bRxFreezeStep_AGC1 0x300000 #define bRxFreezeStep_AGC2 0xc00000 #define bRxFreezeStep_AGC3 0x3000000 #define bRxFreezeStep_AGC0 0xc000000 #define bRxRssi_Cmp_En 0x10000000 #define bRxQuickAGCEn 0x20000000 #define bRxAGCFreezeThresMode 0x40000000 #define bRxOverFlowCheckType 0x80000000 #define bRxAGCShift 0x7f #define bTRSW_Tri_Only 0x80 #define bPowerThres 0x300 #define bRxAGCEn 0x1 #define bRxAGCTogetherEn 0x2 #define bRxAGCMin 0x4 #define bRxHP_Ini 0x7 #define bRxHP_TRLNA 0x70 #define bRxHP_RSSI 0x700 #define bRxHP_BBP1 0x7000 #define bRxHP_BBP2 0x70000 #define bRxHP_BBP3 0x700000 #define bRSSI_H 0x7f0000 //the threshold for high power #define bRSSI_Gen 0x7f000000 //the threshold for ant diversity #define bRxSettle_TRSW 0x7 #define bRxSettle_LNA 0x38 #define bRxSettle_RSSI 0x1c0 #define bRxSettle_BBP 0xe00 #define bRxSettle_RxHP 0x7000 #define bRxSettle_AntSW_RSSI 0x38000 #define bRxSettle_AntSW 0xc0000 #define bRxProcessTime_DAGC 0x300000 #define bRxSettle_HSSI 0x400000 #define bRxProcessTime_BBPPW 0x800000 #define bRxAntennaPowerShift 0x3000000 #define bRSSITableSelect 0xc000000 #define bRxHP_Final 0x7000000 #define bRxHTSettle_BBP 0x7 #define bRxHTSettle_HSSI 0x8 #define bRxHTSettle_RxHP 0x70 #define bRxHTSettle_BBPPW 0x80 #define bRxHTSettle_Idle 0x300 #define bRxHTSettle_Reserved 0x1c00 #define bRxHTRxHPEn 0x8000 #define bRxHTAGCFreezeThres 0x30000 #define bRxHTAGCTogetherEn 0x40000 #define bRxHTAGCMin 0x80000 #define bRxHTAGCEn 0x100000 #define bRxHTDAGCEn 0x200000 #define bRxHTRxHP_BBP 0x1c00000 #define bRxHTRxHP_Final 0xe0000000 #define bRxPWRatioTH 0x3 #define bRxPWRatioEn 0x4 #define bRxMFHold 0x3800 #define bRxPD_Delay_TH1 0x38 #define bRxPD_Delay_TH2 0x1c0 #define bRxPD_DC_COUNT_MAX 0x600 //#define bRxMF_Hold 0x3800 #define bRxPD_Delay_TH 0x8000 #define bRxProcess_Delay 0xf0000 #define bRxSearchrange_GI2_Early 0x700000 #define bRxFrame_Guard_Counter_L 0x3800000 #define bRxSGI_Guard_L 0xc000000 #define bRxSGI_Search_L 0x30000000 #define bRxSGI_TH 0xc0000000 #define bDFSCnt0 0xff #define bDFSCnt1 0xff00 #define bDFSFlag 0xf0000 #define bMFWeightSum 0x300000 #define bMinIdxTH 0x7f000000 #define bDAFormat 0x40000 #define bTxChEmuEnable 0x01000000 #define bTRSWIsolation_A 0x7f #define bTRSWIsolation_B 0x7f00 #define bTRSWIsolation_C 0x7f0000 #define bTRSWIsolation_D 0x7f000000 #define bExtLNAGain 0x7c00 // 6. PageE(0xE00) #define bSTBCEn 0x4 // Useless #define bAntennaMapping 0x10 #define bNss 0x20 #define bCFOAntSumD 0x200 #define bPHYCounterReset 0x8000000 #define bCFOReportGet 0x4000000 #define bOFDMContinueTx 0x10000000 #define bOFDMSingleCarrier 0x20000000 #define bOFDMSingleTone 0x40000000 //#define bRxPath1 0x01 //#define bRxPath2 0x02 //#define bRxPath3 0x04 //#define bRxPath4 0x08 //#define bTxPath1 0x10 //#define bTxPath2 0x20 #define bHTDetect 0x100 #define bCFOEn 0x10000 #define bCFOValue 0xfff00000 #define bSigTone_Re 0x3f #define bSigTone_Im 0x7f00 #define bCounter_CCA 0xffff #define bCounter_ParityFail 0xffff0000 #define bCounter_RateIllegal 0xffff #define bCounter_CRC8Fail 0xffff0000 #define bCounter_MCSNoSupport 0xffff #define bCounter_FastSync 0xffff #define bShortCFO 0xfff #define bShortCFOTLength 12 //total #define bShortCFOFLength 11 //fraction #define bLongCFO 0x7ff #define bLongCFOTLength 11 #define bLongCFOFLength 11 #define bTailCFO 0x1fff #define bTailCFOTLength 13 #define bTailCFOFLength 12 #define bmax_en_pwdB 0xffff #define bCC_power_dB 0xffff0000 #define bnoise_pwdB 0xffff #define bPowerMeasTLength 10 #define bPowerMeasFLength 3 #define bRx_HT_BW 0x1 #define bRxSC 0x6 #define bRx_HT 0x8 #define bNB_intf_det_on 0x1 #define bIntf_win_len_cfg 0x30 #define bNB_Intf_TH_cfg 0x1c0 #define bRFGain 0x3f #define bTableSel 0x40 #define bTRSW 0x80 #define bRxSNR_A 0xff #define bRxSNR_B 0xff00 #define bRxSNR_C 0xff0000 #define bRxSNR_D 0xff000000 #define bSNREVMTLength 8 #define bSNREVMFLength 1 #define bCSI1st 0xff #define bCSI2nd 0xff00 #define bRxEVM1st 0xff0000 #define bRxEVM2nd 0xff000000 #define bSIGEVM 0xff #define bPWDB 0xff00 #define bSGIEN 0x10000 #define bSFactorQAM1 0xf // Useless #define bSFactorQAM2 0xf0 #define bSFactorQAM3 0xf00 #define bSFactorQAM4 0xf000 #define bSFactorQAM5 0xf0000 #define bSFactorQAM6 0xf0000 #define bSFactorQAM7 0xf00000 #define bSFactorQAM8 0xf000000 #define bSFactorQAM9 0xf0000000 #define bCSIScheme 0x100000 #define bNoiseLvlTopSet 0x3 // Useless #define bChSmooth 0x4 #define bChSmoothCfg1 0x38 #define bChSmoothCfg2 0x1c0 #define bChSmoothCfg3 0xe00 #define bChSmoothCfg4 0x7000 #define bMRCMode 0x800000 #define bTHEVMCfg 0x7000000 #define bLoopFitType 0x1 // Useless #define bUpdCFO 0x40 #define bUpdCFOOffData 0x80 #define bAdvUpdCFO 0x100 #define bAdvTimeCtrl 0x800 #define bUpdClko 0x1000 #define bFC 0x6000 #define bTrackingMode 0x8000 #define bPhCmpEnable 0x10000 #define bUpdClkoLTF 0x20000 #define bComChCFO 0x40000 #define bCSIEstiMode 0x80000 #define bAdvUpdEqz 0x100000 #define bUChCfg 0x7000000 #define bUpdEqz 0x8000000 //Rx Pseduo noise #define bRxPesudoNoiseOn 0x20000000 // Useless #define bRxPesudoNoise_A 0xff #define bRxPesudoNoise_B 0xff00 #define bRxPesudoNoise_C 0xff0000 #define bRxPesudoNoise_D 0xff000000 #define bPesudoNoiseState_A 0xffff #define bPesudoNoiseState_B 0xffff0000 #define bPesudoNoiseState_C 0xffff #define bPesudoNoiseState_D 0xffff0000 //7. RF Register //Zebra1 #define bZebra1_HSSIEnable 0x8 // Useless #define bZebra1_TRxControl 0xc00 #define bZebra1_TRxGainSetting 0x07f #define bZebra1_RxCorner 0xc00 #define bZebra1_TxChargePump 0x38 #define bZebra1_RxChargePump 0x7 #define bZebra1_ChannelNum 0xf80 #define bZebra1_TxLPFBW 0x400 #define bZebra1_RxLPFBW 0x600 //Zebra4 #define bRTL8256RegModeCtrl1 0x100 // Useless #define bRTL8256RegModeCtrl0 0x40 #define bRTL8256_TxLPFBW 0x18 #define bRTL8256_RxLPFBW 0x600 //RTL8258 #define bRTL8258_TxLPFBW 0xc // Useless #define bRTL8258_RxLPFBW 0xc00 #define bRTL8258_RSSILPFBW 0xc0 // // Other Definition // //byte endable for sb_write #define bByte0 0x1 // Useless #define bByte1 0x2 #define bByte2 0x4 #define bByte3 0x8 #define bWord0 0x3 #define bWord1 0xc #define bDWord 0xf //for PutRegsetting & GetRegSetting BitMask #define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f #define bMaskByte1 0xff00 #define bMaskByte2 0xff0000 #define bMaskByte3 0xff000000 #define bMaskHWord 0xffff0000 #define bMaskLWord 0x0000ffff #define bMaskDWord 0xffffffff #define bMaskH3Bytes 0xffffff00 #define bMask12Bits 0xfff #define bMaskH4Bits 0xf0000000 #define bMaskOFDM_D 0xffc00000 #define bMaskCCK 0x3f3f3f3f #define bEnable 0x1 // Useless #define bDisable 0x0 #define LeftAntenna 0x0 // Useless #define RightAntenna 0x1 #define tCheckTxStatus 500 //500ms // Useless #define tUpdateRxCounter 100 //100ms #define rateCCK 0 // Useless #define rateOFDM 1 #define rateHT 2 //define Register-End #define bPMAC_End 0x1ff // Useless #define bFPGAPHY0_End 0x8ff #define bFPGAPHY1_End 0x9ff #define bCCKPHY0_End 0xaff #define bOFDMPHY0_End 0xcff #define bOFDMPHY1_End 0xdff //define max debug item in each debug page //#define bMaxItem_FPGA_PHY0 0x9 //#define bMaxItem_FPGA_PHY1 0x3 //#define bMaxItem_PHY_11B 0x16 //#define bMaxItem_OFDM_PHY0 0x29 //#define bMaxItem_OFDM_PHY1 0x0 #define bPMACControl 0x0 // Useless #define bWMACControl 0x1 #define bWNICControl 0x2 #define PathA 0x0 // Useless #define PathB 0x1 #define PathC 0x2 #define PathD 0x3 /*--------------------------Define Parameters-------------------------------*/ #endif //__INC_HAL8192SPHYREG_H rtl8812au-4.3.8.12175.20140902+dfsg/include/Hal8192DPhyCfg.h000066400000000000000000000173011261122257400215320ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ /***************************************************************************** * * Module: __INC_HAL8192DPHYCFG_H * * * Note: * * * Export: Constants, macro, functions(API), global variables(None). * * Abbrev: * * History: * Data Who Remark * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. * 2. Reorganize code architecture. * *****************************************************************************/ /* Check to see if the file has been included already. */ #ifndef __INC_HAL8192DPHYCFG_H #define __INC_HAL8192DPHYCFG_H /*--------------------------Define Parameters-------------------------------*/ #define LOOP_LIMIT 5 #define MAX_STALL_TIME 50 //us #define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) #define MAX_TXPWR_IDX_NMODE_92S 63 #define Reset_Cnt_Limit 3 #ifdef CONFIG_PCI_HCI #define SET_RTL8192SE_RF_SLEEP(_pAdapter) \ { \ u1Byte u1bTmp; \ u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL); \ u1bTmp |= BIT0; \ PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp); \ PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0); \ PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF); \ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ delay_us(100); \ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0); \ delay_us(10); \ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC); \ delay_us(10); \ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ delay_us(10); \ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ } #endif /*--------------------------Define Parameters-------------------------------*/ /*------------------------------Define structure----------------------------*/ #define CHANNEL_GROUP_MAX_2G 3 #define CHANNEL_GROUP_IDX_5GL 3 #define CHANNEL_GROUP_IDX_5GM 6 #define CHANNEL_GROUP_IDX_5GH 9 #define CHANNEL_GROUP_MAX_5G 9 #define CHANNEL_MAX_NUMBER_2G 14 typedef enum _MACPHY_MODE_CHANGE_ACTION{ DMDP2DMSP = 0, DMSP2DMDP = 1, DMDP2SMSP = 2, SMSP2DMDP = 3, DMSP2SMSP = 4, SMSP2DMSP = 5, MAXACTION }MACPHY_MODE_CHANGE_ACTION,*PMACPHY_MODE_CHANGE_ACTION; /* BB/RF related */ /*------------------------------Define structure----------------------------*/ /*------------------------Export global variable----------------------------*/ /*------------------------Export global variable----------------------------*/ /*------------------------Export Marco Definition---------------------------*/ /*--------------------------Exported Function prototype---------------------*/ // // BB and RF register read/write // void PHY_SetBBReg1Byte8192D( IN PADAPTER Adapter, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ); u32 PHY_QueryBBReg8192D( IN PADAPTER Adapter, IN u32 RegAddr, IN u32 BitMask ); void PHY_SetBBReg8192D( IN PADAPTER Adapter, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ); u32 PHY_QueryRFReg8192D( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 RegAddr, IN u32 BitMask ); void PHY_SetRFReg8192D( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ); // // Initialization related function // /* MAC/BB/RF HAL config */ extern int PHY_MACConfig8192D( IN PADAPTER Adapter ); extern int PHY_BBConfig8192D( IN PADAPTER Adapter ); extern int PHY_RFConfig8192D( IN PADAPTER Adapter ); /* RF config */ int rtl8192d_PHY_ConfigRFWithParaFile( IN PADAPTER Adapter, IN u8* pFileName, IN u8 eRFPath); int rtl8192d_PHY_ConfigRFWithHeaderFile( IN PADAPTER Adapter, IN RF_CONTENT Content, IN u8 eRFPath); /* BB/RF readback check for making sure init OK */ int rtl8192d_PHY_CheckBBAndRFOK( IN PADAPTER Adapter, IN HW_BLOCK_E CheckBlock, IN u8 eRFPath ); /* Read initi reg value for tx power setting. */ void rtl8192d_PHY_GetHWRegOriginalValue( IN PADAPTER Adapter ); // // RF Power setting // //extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter, // IN RT_RF_POWER_STATE eRFPowerState); // // BB TX Power R/W // void PHY_GetTxPowerLevel8192D( IN PADAPTER Adapter, OUT s32* powerlevel ); void PHY_SetTxPowerLevel8192D( IN PADAPTER Adapter, IN u8 channel ); BOOLEAN PHY_UpdateTxPowerDbm8192D( IN PADAPTER Adapter, IN int powerInDbm ); // VOID PHY_ScanOperationBackup8192D(IN PADAPTER Adapter, IN u8 Operation ); // // Switch bandwidth for 8192S // //void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer ); void PHY_SetBWMode8192D( IN PADAPTER pAdapter, IN CHANNEL_WIDTH ChnlWidth, IN unsigned char Offset ); // // Set FW CMD IO for 8192S. // //extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter, // IN IO_TYPE IOType); // // Set A2 entry to fw for 8192S // extern void FillA2Entry8192C( IN PADAPTER Adapter, IN u8 index, IN u8* val); // // channel switch related funciton // //extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer ); void PHY_SwChnl8192D( IN PADAPTER pAdapter, IN u8 channel ); VOID PHY_SetSwChnlBWMode8192D( IN PADAPTER Adapter, IN u8 channel, IN CHANNEL_WIDTH Bandwidth, IN u8 Offset40, IN u8 Offset80 ); // // BB/MAC/RF other monitor API // void PHY_SetMonitorMode8192D(IN PADAPTER pAdapter, IN BOOLEAN bEnableMonitorMode ); BOOLEAN PHY_CheckIsLegalRfPath8192D(IN PADAPTER pAdapter, IN u32 eRFPath ); // // Modify the value of the hw register when beacon interval be changed. // void rtl8192d_PHY_SetBeaconHwReg( IN PADAPTER Adapter, IN u16 BeaconInterval ); extern VOID PHY_SwitchEphyParameter( IN PADAPTER Adapter ); extern VOID PHY_EnableHostClkReq( IN PADAPTER Adapter ); BOOLEAN SetAntennaConfig92C( IN PADAPTER Adapter, IN u8 DefaultAnt ); VOID PHY_UpdateBBRFConfiguration8192D( IN PADAPTER Adapter, IN BOOLEAN bisBandSwitch ); VOID PHY_ReadMacPhyMode92D( IN PADAPTER Adapter, IN BOOLEAN AutoloadFail ); VOID PHY_ConfigMacPhyMode92D( IN PADAPTER Adapter ); VOID PHY_ConfigMacPhyModeInfo92D( IN PADAPTER Adapter ); VOID PHY_ConfigMacCoexist_RFPage92D( IN PADAPTER Adapter ); VOID rtl8192d_PHY_InitRxSetting( IN PADAPTER Adapter ); VOID rtl8192d_PHY_SetRFPathSwitch(IN PADAPTER pAdapter, IN BOOLEAN bMain); VOID HalChangeCCKStatus8192D( IN PADAPTER Adapter, IN BOOLEAN bCCKDisable ); VOID PHY_InitPABias92D(IN PADAPTER Adapter); /*--------------------------Exported Function prototype---------------------*/ #define PHY_SetBBReg1Byte(Adapter, RegAddr, BitMask, Data) PHY_SetBBReg1Byte8192D((Adapter), (RegAddr), (BitMask), (Data)) #endif // __INC_HAL8192SPHYCFG_H rtl8812au-4.3.8.12175.20140902+dfsg/include/Hal8192DPhyReg.h000066400000000000000000001126461261122257400215600ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ /***************************************************************************** * * Module: __INC_HAL8192DPHYREG_H * * * Note: 1. Define PMAC/BB register map * 2. Define RF register map * 3. PMAC/BB register bit mask. * 4. RF reg bit mask. * 5. Other BB/RF relative definition. * * * Export: Constants, macro, functions(API), global variables(None). * * Abbrev: * * History: * Data Who Remark * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. * 2. Reorganize code architecture. * 09/25/2008 MH 1. Add RL6052 register definition * *****************************************************************************/ #ifndef __INC_HAL8192DPHYREG_H #define __INC_HAL8192DPHYREG_H /*--------------------------Define Parameters-------------------------------*/ //============================================================ // 8192S Regsiter offset definition //============================================================ // // BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF // 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF // 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 // 3. RF register 0x00-2E // 4. Bit Mask for BB/RF register // 5. Other defintion for BB/RF R/W // // // 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF // 1. Page1(0x100) // #define rPMAC_Reset 0x100 #define rPMAC_TxStart 0x104 #define rPMAC_TxLegacySIG 0x108 #define rPMAC_TxHTSIG1 0x10c #define rPMAC_TxHTSIG2 0x110 #define rPMAC_PHYDebug 0x114 #define rPMAC_TxPacketNum 0x118 #define rPMAC_TxIdle 0x11c #define rPMAC_TxMACHeader0 0x120 #define rPMAC_TxMACHeader1 0x124 #define rPMAC_TxMACHeader2 0x128 #define rPMAC_TxMACHeader3 0x12c #define rPMAC_TxMACHeader4 0x130 #define rPMAC_TxMACHeader5 0x134 #define rPMAC_TxDataType 0x138 #define rPMAC_TxRandomSeed 0x13c #define rPMAC_CCKPLCPPreamble 0x140 #define rPMAC_CCKPLCPHeader 0x144 #define rPMAC_CCKCRC16 0x148 #define rPMAC_OFDMRxCRC32OK 0x170 #define rPMAC_OFDMRxCRC32Er 0x174 #define rPMAC_OFDMRxParityEr 0x178 #define rPMAC_OFDMRxCRC8Er 0x17c #define rPMAC_CCKCRxRC16Er 0x180 #define rPMAC_CCKCRxRC32Er 0x184 #define rPMAC_CCKCRxRC32OK 0x188 #define rPMAC_TxStatus 0x18c // // 2. Page2(0x200) // // The following two definition are only used for USB interface. #define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. #define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. // // 3. Page8(0x800) // #define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? #define rFPGA0_TxInfo 0x804 // Status report?? #define rFPGA0_PSDFunction 0x808 #define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? #define rFPGA0_RFTiming1 0x810 // Useless now #define rFPGA0_RFTiming2 0x814 #define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register #define rFPGA0_XA_HSSIParameter2 0x824 #define rFPGA0_XB_HSSIParameter1 0x828 #define rFPGA0_XB_HSSIParameter2 0x82c #define rFPGA0_XA_LSSIParameter 0x840 #define rFPGA0_XB_LSSIParameter 0x844 #define rFPGA0_RFWakeUpParameter 0x850 // Useless now #define rFPGA0_RFSleepUpParameter 0x854 #define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch #define rFPGA0_XCD_SwitchControl 0x85c #define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch #define rFPGA0_XB_RFInterfaceOE 0x864 #define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control #define rFPGA0_XCD_RFInterfaceSW 0x874 #define rFPGA0_XAB_RFParameter 0x878 // RF Parameter #define rFPGA0_XCD_RFParameter 0x87c #define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? #define rFPGA0_AnalogParameter2 0x884 #define rFPGA0_AnalogParameter3 0x888 #define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy #define rFPGA0_AnalogParameter4 0x88c #define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback #define rFPGA0_XB_LSSIReadBack 0x8a4 #define rFPGA0_XC_LSSIReadBack 0x8a8 #define rFPGA0_XD_LSSIReadBack 0x8ac #define rFPGA0_PSDReport 0x8b4 // Useless now #define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback #define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback #define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value #define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now // // 4. Page9(0x900) // #define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? #define rFPGA1_TxBlock 0x904 // Useless now #define rFPGA1_DebugSelect 0x908 // Useless now #define rFPGA1_TxInfo 0x90c // Useless now // Status report?? // // 5. PageA(0xA00) // // Set Control channel to upper or lower. These settings are required only for 40MHz #define rCCK0_System 0xa00 #define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI #define rCCK0_CCA 0xa08 // Disable init gain now // Init gain #define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series #define rCCK0_RxAGC2 0xa10 //AGC & DAGC #define rCCK0_RxHP 0xa14 #define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold #define rCCK0_DSPParameter2 0xa1c //SQ threshold #define rCCK0_TxFilter1 0xa20 #define rCCK0_TxFilter2 0xa24 #define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 #define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report #define rCCK0_TRSSIReport 0xa50 #define rCCK0_RxReport 0xa54 //0xa57 #define rCCK0_FACounterLower 0xa5c //0xa5b #define rCCK0_FACounterUpper 0xa58 //0xa5c // // PageB(0xB00) // #define rPdp_AntA 0xb00 #define rPdp_AntA_4 0xb04 #define rPdp_AntA_8 0xb08 #define rPdp_AntA_C 0xb0c #define rPdp_AntA_10 0xb10 #define rPdp_AntA_14 0xb14 #define rPdp_AntA_18 0xb18 #define rPdp_AntA_1C 0xb1c #define rPdp_AntA_20 0xb20 #define rPdp_AntA_24 0xb24 #define rConfig_Pmpd_AntA 0xb28 #define rConfig_ram64x16 0xb2c #define rBndA 0xb30 #define rHssiPar 0xb34 #define rConfig_AntA 0xb68 #define rConfig_AntB 0xb6c #define rPdp_AntB 0xb70 #define rPdp_AntB_4 0xb74 #define rPdp_AntB_8 0xb78 #define rPdp_AntB_C 0xb7c #define rPdp_AntB_10 0xb80 #define rPdp_AntB_14 0xb84 #define rPdp_AntB_18 0xb88 #define rPdp_AntB_1C 0xb8c #define rPdp_AntB_20 0xb90 #define rPdp_AntB_24 0xb94 #define rConfig_Pmpd_AntB 0xb98 #define rBndB 0xba0 #define rAPK 0xbd8 #define rPm_Rx0_AntA 0xbdc #define rPm_Rx1_AntA 0xbe0 #define rPm_Rx2_AntA 0xbe4 #define rPm_Rx3_AntA 0xbe8 #define rPm_Rx0_AntB 0xbec #define rPm_Rx1_AntB 0xbf0 #define rPm_Rx2_AntB 0xbf4 #define rPm_Rx3_AntB 0xbf8 // // 6. PageC(0xC00) // #define rOFDM0_LSTF 0xc00 #define rOFDM0_TRxPathEnable 0xc04 #define rOFDM0_TRMuxPar 0xc08 #define rOFDM0_TRSWIsolation 0xc0c #define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter #define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix #define rOFDM0_XBRxAFE 0xc18 #define rOFDM0_XBRxIQImbalance 0xc1c #define rOFDM0_XCRxAFE 0xc20 #define rOFDM0_XCRxIQImbalance 0xc24 #define rOFDM0_XDRxAFE 0xc28 #define rOFDM0_XDRxIQImbalance 0xc2c #define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain #define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. #define rOFDM0_RxDetector3 0xc38 //Frame Sync. #define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI #define rOFDM0_RxDSP 0xc40 //Rx Sync Path #define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC #define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold #define rOFDM0_ECCAThreshold 0xc4c // energy CCA #define rOFDM0_XAAGCCore1 0xc50 // DIG #define rOFDM0_XAAGCCore2 0xc54 #define rOFDM0_XBAGCCore1 0xc58 #define rOFDM0_XBAGCCore2 0xc5c #define rOFDM0_XCAGCCore1 0xc60 #define rOFDM0_XCAGCCore2 0xc64 #define rOFDM0_XDAGCCore1 0xc68 #define rOFDM0_XDAGCCore2 0xc6c #define rOFDM0_AGCParameter1 0xc70 #define rOFDM0_AGCParameter2 0xc74 #define rOFDM0_AGCRSSITable 0xc78 #define rOFDM0_HTSTFAGC 0xc7c #define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG #define rOFDM0_XATxAFE 0xc84 #define rOFDM0_XBTxIQImbalance 0xc88 #define rOFDM0_XBTxAFE 0xc8c #define rOFDM0_XCTxIQImbalance 0xc90 #define rOFDM0_XCTxAFE 0xc94 #define rOFDM0_XDTxIQImbalance 0xc98 #define rOFDM0_XDTxAFE 0xc9c #define rOFDM0_RxIQExtAnta 0xca0 #define rOFDM0_TxCoeff1 0xca4 #define rOFDM0_TxCoeff2 0xca8 #define rOFDM0_TxCoeff3 0xcac #define rOFDM0_TxCoeff4 0xcb0 #define rOFDM0_TxCoeff5 0xcb4 #define rOFDM0_TxCoeff6 0xcb8 #define rOFDM0_RxHPParameter 0xce0 #define rOFDM0_TxPseudoNoiseWgt 0xce4 #define rOFDM0_FrameSync 0xcf0 #define rOFDM0_DFSReport 0xcf4 // // 7. PageD(0xD00) // #define rOFDM1_LSTF 0xd00 #define rOFDM1_TRxPathEnable 0xd04 #define rOFDM1_CFO 0xd08 // No setting now #define rOFDM1_CSI1 0xd10 #define rOFDM1_SBD 0xd14 #define rOFDM1_CSI2 0xd18 #define rOFDM1_CFOTracking 0xd2c #define rOFDM1_TRxMesaure1 0xd34 #define rOFDM1_IntfDet 0xd3c #define rOFDM1_PseudoNoiseStateAB 0xd50 #define rOFDM1_PseudoNoiseStateCD 0xd54 #define rOFDM1_RxPseudoNoiseWgt 0xd58 #define rOFDM_PHYCounter1 0xda0 //cca, parity fail #define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail #define rOFDM_PHYCounter3 0xda8 //MCS not support #define rOFDM_ShortCFOAB 0xdac // No setting now #define rOFDM_ShortCFOCD 0xdb0 #define rOFDM_LongCFOAB 0xdb4 #define rOFDM_LongCFOCD 0xdb8 #define rOFDM_TailCFOAB 0xdbc #define rOFDM_TailCFOCD 0xdc0 #define rOFDM_PWMeasure1 0xdc4 #define rOFDM_PWMeasure2 0xdc8 #define rOFDM_BWReport 0xdcc #define rOFDM_AGCReport 0xdd0 #define rOFDM_RxSNR 0xdd4 #define rOFDM_RxEVMCSI 0xdd8 #define rOFDM_SIGReport 0xddc // // 8. PageE(0xE00) // #define rTxAGC_A_Rate18_06 0xe00 #define rTxAGC_A_Rate54_24 0xe04 #define rTxAGC_A_CCK1_Mcs32 0xe08 #define rTxAGC_A_Mcs03_Mcs00 0xe10 #define rTxAGC_A_Mcs07_Mcs04 0xe14 #define rTxAGC_A_Mcs11_Mcs08 0xe18 #define rTxAGC_A_Mcs15_Mcs12 0xe1c #define rTxAGC_B_Rate18_06 0x830 #define rTxAGC_B_Rate54_24 0x834 #define rTxAGC_B_CCK1_55_Mcs32 0x838 #define rTxAGC_B_Mcs03_Mcs00 0x83c #define rTxAGC_B_Mcs07_Mcs04 0x848 #define rTxAGC_B_Mcs11_Mcs08 0x84c #define rTxAGC_B_Mcs15_Mcs12 0x868 #define rTxAGC_B_CCK11_A_CCK2_11 0x86c #define rFPGA0_IQK 0xe28 #define rTx_IQK_Tone_A 0xe30 #define rRx_IQK_Tone_A 0xe34 #define rTx_IQK_PI_A 0xe38 #define rRx_IQK_PI_A 0xe3c #define rTx_IQK 0xe40 #define rRx_IQK 0xe44 #define rIQK_AGC_Pts 0xe48 #define rIQK_AGC_Rsp 0xe4c #define rTx_IQK_Tone_B 0xe50 #define rRx_IQK_Tone_B 0xe54 #define rTx_IQK_PI_B 0xe58 #define rRx_IQK_PI_B 0xe5c #define rIQK_AGC_Cont 0xe60 #define rBlue_Tooth 0xe6c #define rRx_Wait_CCA 0xe70 #define rTx_CCK_RFON 0xe74 #define rTx_CCK_BBON 0xe78 #define rTx_OFDM_RFON 0xe7c #define rTx_OFDM_BBON 0xe80 #define rTx_To_Rx 0xe84 #define rTx_To_Tx 0xe88 #define rRx_CCK 0xe8c #define rTx_Power_Before_IQK_A 0xe94 #define rTx_Power_After_IQK_A 0xe9c #define rRx_Power_Before_IQK_A 0xea0 #define rRx_Power_Before_IQK_A_2 0xea4 #define rRx_Power_After_IQK_A 0xea8 #define rRx_Power_After_IQK_A_2 0xeac #define rTx_Power_Before_IQK_B 0xeb4 #define rTx_Power_After_IQK_B 0xebc #define rRx_Power_Before_IQK_B 0xec0 #define rRx_Power_Before_IQK_B_2 0xec4 #define rRx_Power_After_IQK_B 0xec8 #define rRx_Power_After_IQK_B_2 0xecc #define rRx_OFDM 0xed0 #define rRx_Wait_RIFS 0xed4 #define rRx_TO_Rx 0xed8 #define rStandby 0xedc #define rSleep 0xee0 #define rPMPD_ANAEN 0xeec // // 7. RF Register 0x00-0x2E (RF 8256) // RF-0222D 0x00-3F // //Zebra1 #define rZebra1_HSSIEnable 0x0 // Useless now #define rZebra1_TRxEnable1 0x1 #define rZebra1_TRxEnable2 0x2 #define rZebra1_AGC 0x4 #define rZebra1_ChargePump 0x5 #define rZebra1_Channel 0x7 // RF channel switch //#endif #define rZebra1_TxGain 0x8 // Useless now #define rZebra1_TxLPF 0x9 #define rZebra1_RxLPF 0xb #define rZebra1_RxHPFCorner 0xc //Zebra4 #define rGlobalCtrl 0 // Useless now #define rRTL8256_TxLPF 19 #define rRTL8256_RxLPF 11 //RTL8258 #define rRTL8258_TxLPF 0x11 // Useless now #define rRTL8258_RxLPF 0x13 #define rRTL8258_RSSILPF 0xa // // RL6052 Register definition // #define RF_AC 0x00 // #define RF_IQADJ_G1 0x01 // #define RF_IQADJ_G2 0x02 // #define RF_BS_PA_APSET_G1_G4 0x03 #define RF_BS_PA_APSET_G5_G8 0x04 #define RF_POW_TRSW 0x05 // #define RF_GAIN_RX 0x06 // #define RF_GAIN_TX 0x07 // #define RF_TXM_IDAC 0x08 // #define RF_IPA_G 0x09 // #define RF_TXBIAS_G 0x0A #define RF_TXPA_AG 0x0B #define RF_IPA_A 0x0C // #define RF_TXBIAS_A 0x0D #define RF_BS_PA_APSET_G9_G11 0x0E #define RF_BS_IQGEN 0x0F // #define RF_MODE1 0x10 // #define RF_MODE2 0x11 // #define RF_RX_AGC_HP 0x12 // #define RF_TX_AGC 0x13 // #define RF_BIAS 0x14 // #define RF_IPA 0x15 // #define RF_TXBIAS 0x16 // #define RF_POW_ABILITY 0x17 // #define RF_MODE_AG 0x18 // #define rRfChannel 0x18 // RF channel and BW switch #define RF_CHNLBW 0x18 // RF channel and BW switch #define RF_TOP 0x19 // #define RF_RX_G1 0x1A // #define RF_RX_G2 0x1B // #define RF_RX_BB2 0x1C // #define RF_RX_BB1 0x1D // #define RF_RCK1 0x1E // #define RF_RCK2 0x1F // #define RF_TX_G1 0x20 // #define RF_TX_G2 0x21 // #define RF_TX_G3 0x22 // #define RF_TX_BB1 0x23 // #define RF_T_METER_92D 0x42 #define RF_T_METER 0x42 // #define RF_SYN_G1 0x25 // RF TX Power control #define RF_SYN_G2 0x26 // RF TX Power control #define RF_SYN_G3 0x27 // RF TX Power control #define RF_SYN_G4 0x28 // RF TX Power control #define RF_SYN_G5 0x29 // RF TX Power control #define RF_SYN_G6 0x2A // RF TX Power control #define RF_SYN_G7 0x2B // RF TX Power control #define RF_SYN_G8 0x2C // RF TX Power control #define RF_RCK_OS 0x30 // RF TX PA control #define RF_TXPA_G1 0x31 // RF TX PA control #define RF_TXPA_G2 0x32 // RF TX PA control #define RF_TXPA_G3 0x33 // RF TX PA control #define RF_LOBF_9 0x38 #define RF_RXRF_A3 0x3C // #define RF_TRSW 0x3F #define RF_TXRF_A2 0x41 #define RF_TXPA_G4 0x46 #define RF_TXPA_A4 0x4B // //Bit Mask // // 1. Page1(0x100) #define bBBResetB 0x100 // Useless now? #define bGlobalResetB 0x200 #define bOFDMTxStart 0x4 #define bCCKTxStart 0x8 #define bCRC32Debug 0x100 #define bPMACLoopback 0x10 #define bTxLSIG 0xffffff #define bOFDMTxRate 0xf #define bOFDMTxReserved 0x10 #define bOFDMTxLength 0x1ffe0 #define bOFDMTxParity 0x20000 #define bTxHTSIG1 0xffffff #define bTxHTMCSRate 0x7f #define bTxHTBW 0x80 #define bTxHTLength 0xffff00 #define bTxHTSIG2 0xffffff #define bTxHTSmoothing 0x1 #define bTxHTSounding 0x2 #define bTxHTReserved 0x4 #define bTxHTAggreation 0x8 #define bTxHTSTBC 0x30 #define bTxHTAdvanceCoding 0x40 #define bTxHTShortGI 0x80 #define bTxHTNumberHT_LTF 0x300 #define bTxHTCRC8 0x3fc00 #define bCounterReset 0x10000 #define bNumOfOFDMTx 0xffff #define bNumOfCCKTx 0xffff0000 #define bTxIdleInterval 0xffff #define bOFDMService 0xffff0000 #define bTxMACHeader 0xffffffff #define bTxDataInit 0xff #define bTxHTMode 0x100 #define bTxDataType 0x30000 #define bTxRandomSeed 0xffffffff #define bCCKTxPreamble 0x1 #define bCCKTxSFD 0xffff0000 #define bCCKTxSIG 0xff #define bCCKTxService 0xff00 #define bCCKLengthExt 0x8000 #define bCCKTxLength 0xffff0000 #define bCCKTxCRC16 0xffff #define bCCKTxStatus 0x1 #define bOFDMTxStatus 0x2 #define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) // 2. Page8(0x800) #define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD #define bJapanMode 0x2 #define bCCKTxSC 0x30 #define bCCKEn 0x1000000 #define bOFDMEn 0x2000000 #define bOFDMRxADCPhase 0x10000 // Useless now #define bOFDMTxDACPhase 0x40000 #define bXATxAGC 0x3f #define bAntennaSelect 0x0300 #define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage #define bXCTxAGC 0xf000 #define bXDTxAGC 0xf0000 #define bPAStart 0xf0000000 // Useless now #define bTRStart 0x00f00000 #define bRFStart 0x0000f000 #define bBBStart 0x000000f0 #define bBBCCKStart 0x0000000f #define bPAEnd 0xf //Reg0x814 #define bTREnd 0x0f000000 #define bRFEnd 0x000f0000 #define bCCAMask 0x000000f0 //T2R #define bR2RCCAMask 0x00000f00 #define bHSSI_R2TDelay 0xf8000000 #define bHSSI_T2RDelay 0xf80000 #define bContTxHSSI 0x400 //chane gain at continue Tx #define bIGFromCCK 0x200 #define bAGCAddress 0x3f #define bRxHPTx 0x7000 #define bRxHPT2R 0x38000 #define bRxHPCCKIni 0xc0000 #define bAGCTxCode 0xc00000 #define bAGCRxCode 0x300000 #define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 #define b3WireAddressLength 0x400 #define b3WireRFPowerDown 0x1 // Useless now //#define bHWSISelect 0x8 #define b5GPAPEPolarity 0x40000000 #define b2GPAPEPolarity 0x80000000 #define bRFSW_TxDefaultAnt 0x3 #define bRFSW_TxOptionAnt 0x30 #define bRFSW_RxDefaultAnt 0x300 #define bRFSW_RxOptionAnt 0x3000 #define bRFSI_3WireData 0x1 #define bRFSI_3WireClock 0x2 #define bRFSI_3WireLoad 0x4 #define bRFSI_3WireRW 0x8 #define bRFSI_3Wire 0xf #define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW #define bRFSI_TRSW 0x20 // Useless now #define bRFSI_TRSWB 0x40 #define bRFSI_ANTSW 0x100 #define bRFSI_ANTSWB 0x200 #define bRFSI_PAPE 0x400 #define bRFSI_PAPE5G 0x800 #define bBandSelect 0x1 #define bHTSIG2_GI 0x80 #define bHTSIG2_Smoothing 0x01 #define bHTSIG2_Sounding 0x02 #define bHTSIG2_Aggreaton 0x08 #define bHTSIG2_STBC 0x30 #define bHTSIG2_AdvCoding 0x40 #define bHTSIG2_NumOfHTLTF 0x300 #define bHTSIG2_CRC8 0x3fc #define bHTSIG1_MCS 0x7f #define bHTSIG1_BandWidth 0x80 #define bHTSIG1_HTLength 0xffff #define bLSIG_Rate 0xf #define bLSIG_Reserved 0x10 #define bLSIG_Length 0x1fffe #define bLSIG_Parity 0x20 #define bCCKRxPhase 0x4 #define bLSSIReadAddress 0x7f800000 // T65 RF #define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal #define bLSSIReadBackData 0xfffff // T65 RF #define bLSSIReadOKFlag 0x1000 // Useless now #define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz #define bRegulator0Standby 0x1 #define bRegulatorPLLStandby 0x2 #define bRegulator1Standby 0x4 #define bPLLPowerUp 0x8 #define bDPLLPowerUp 0x10 #define bDA10PowerUp 0x20 #define bAD7PowerUp 0x200 #define bDA6PowerUp 0x2000 #define bXtalPowerUp 0x4000 #define b40MDClkPowerUP 0x8000 #define bDA6DebugMode 0x20000 #define bDA6Swing 0x380000 #define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ #define b80MClkDelay 0x18000000 // Useless #define bAFEWatchDogEnable 0x20000000 #define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap #define bXtalCap23 0x3 #define bXtalCap92x 0x0f000000 #define bXtalCap 0x0f000000 #define bIntDifClkEnable 0x400 // Useless #define bExtSigClkEnable 0x800 #define bBandgapMbiasPowerUp 0x10000 #define bAD11SHGain 0xc0000 #define bAD11InputRange 0x700000 #define bAD11OPCurrent 0x3800000 #define bIPathLoopback 0x4000000 #define bQPathLoopback 0x8000000 #define bAFELoopback 0x10000000 #define bDA10Swing 0x7e0 #define bDA10Reverse 0x800 #define bDAClkSource 0x1000 #define bAD7InputRange 0x6000 #define bAD7Gain 0x38000 #define bAD7OutputCMMode 0x40000 #define bAD7InputCMMode 0x380000 #define bAD7Current 0xc00000 #define bRegulatorAdjust 0x7000000 #define bAD11PowerUpAtTx 0x1 #define bDA10PSAtTx 0x10 #define bAD11PowerUpAtRx 0x100 #define bDA10PSAtRx 0x1000 #define bCCKRxAGCFormat 0x200 #define bPSDFFTSamplepPoint 0xc000 #define bPSDAverageNum 0x3000 #define bIQPathControl 0xc00 #define bPSDFreq 0x3ff #define bPSDAntennaPath 0x30 #define bPSDIQSwitch 0x40 #define bPSDRxTrigger 0x400000 #define bPSDTxTrigger 0x80000000 #define bPSDSineToneScale 0x7f000000 #define bPSDReport 0xffff // 3. Page9(0x900) #define bOFDMTxSC 0x30000000 // Useless #define bCCKTxOn 0x1 #define bOFDMTxOn 0x2 #define bDebugPage 0xfff //reset debug page and also HWord, LWord #define bDebugItem 0xff //reset debug page and LWord #define bAntL 0x10 #define bAntNonHT 0x100 #define bAntHT1 0x1000 #define bAntHT2 0x10000 #define bAntHT1S1 0x100000 #define bAntNonHTS1 0x1000000 // 4. PageA(0xA00) #define bCCKBBMode 0x3 // Useless #define bCCKTxPowerSaving 0x80 #define bCCKRxPowerSaving 0x40 #define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch #define bCCKScramble 0x8 // Useless #define bCCKAntDiversity 0x8000 #define bCCKCarrierRecovery 0x4000 #define bCCKTxRate 0x3000 #define bCCKDCCancel 0x0800 #define bCCKISICancel 0x0400 #define bCCKMatchFilter 0x0200 #define bCCKEqualizer 0x0100 #define bCCKPreambleDetect 0x800000 #define bCCKFastFalseCCA 0x400000 #define bCCKChEstStart 0x300000 #define bCCKCCACount 0x080000 #define bCCKcs_lim 0x070000 #define bCCKBistMode 0x80000000 #define bCCKCCAMask 0x40000000 #define bCCKTxDACPhase 0x4 #define bCCKRxADCPhase 0x20000000 //r_rx_clk #define bCCKr_cp_mode0 0x0100 #define bCCKTxDCOffset 0xf0 #define bCCKRxDCOffset 0xf #define bCCKCCAMode 0xc000 #define bCCKFalseCS_lim 0x3f00 #define bCCKCS_ratio 0xc00000 #define bCCKCorgBit_sel 0x300000 #define bCCKPD_lim 0x0f0000 #define bCCKNewCCA 0x80000000 #define bCCKRxHPofIG 0x8000 #define bCCKRxIG 0x7f00 #define bCCKLNAPolarity 0x800000 #define bCCKRx1stGain 0x7f0000 #define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity #define bCCKRxAGCSatLevel 0x1f000000 #define bCCKRxAGCSatCount 0xe0 #define bCCKRxRFSettle 0x1f //AGCsamp_dly #define bCCKFixedRxAGC 0x8000 //#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 #define bCCKAntennaPolarity 0x2000 #define bCCKTxFilterType 0x0c00 #define bCCKRxAGCReportType 0x0300 #define bCCKRxDAGCEn 0x80000000 #define bCCKRxDAGCPeriod 0x20000000 #define bCCKRxDAGCSatLevel 0x1f000000 #define bCCKTimingRecovery 0x800000 #define bCCKTxC0 0x3f0000 #define bCCKTxC1 0x3f000000 #define bCCKTxC2 0x3f #define bCCKTxC3 0x3f00 #define bCCKTxC4 0x3f0000 #define bCCKTxC5 0x3f000000 #define bCCKTxC6 0x3f #define bCCKTxC7 0x3f00 #define bCCKDebugPort 0xff0000 #define bCCKDACDebug 0x0f000000 #define bCCKFalseAlarmEnable 0x8000 #define bCCKFalseAlarmRead 0x4000 #define bCCKTRSSI 0x7f #define bCCKRxAGCReport 0xfe #define bCCKRxReport_AntSel 0x80000000 #define bCCKRxReport_MFOff 0x40000000 #define bCCKRxRxReport_SQLoss 0x20000000 #define bCCKRxReport_Pktloss 0x10000000 #define bCCKRxReport_Lockedbit 0x08000000 #define bCCKRxReport_RateError 0x04000000 #define bCCKRxReport_RxRate 0x03000000 #define bCCKRxFACounterLower 0xff #define bCCKRxFACounterUpper 0xff000000 #define bCCKRxHPAGCStart 0xe000 #define bCCKRxHPAGCFinal 0x1c00 #define bCCKRxFalseAlarmEnable 0x8000 #define bCCKFACounterFreeze 0x4000 #define bCCKTxPathSel 0x10000000 #define bCCKDefaultRxPath 0xc000000 #define bCCKOptionRxPath 0x3000000 // 5. PageC(0xC00) #define bNumOfSTF 0x3 // Useless #define bShift_L 0xc0 #define bGI_TH 0xc #define bRxPathA 0x1 #define bRxPathB 0x2 #define bRxPathC 0x4 #define bRxPathD 0x8 #define bTxPathA 0x1 #define bTxPathB 0x2 #define bTxPathC 0x4 #define bTxPathD 0x8 #define bTRSSIFreq 0x200 #define bADCBackoff 0x3000 #define bDFIRBackoff 0xc000 #define bTRSSILatchPhase 0x10000 #define bRxIDCOffset 0xff #define bRxQDCOffset 0xff00 #define bRxDFIRMode 0x1800000 #define bRxDCNFType 0xe000000 #define bRXIQImb_A 0x3ff #define bRXIQImb_B 0xfc00 #define bRXIQImb_C 0x3f0000 #define bRXIQImb_D 0xffc00000 #define bDC_dc_Notch 0x60000 #define bRxNBINotch 0x1f000000 #define bPD_TH 0xf #define bPD_TH_Opt2 0xc000 #define bPWED_TH 0x700 #define bIfMF_Win_L 0x800 #define bPD_Option 0x1000 #define bMF_Win_L 0xe000 #define bBW_Search_L 0x30000 #define bwin_enh_L 0xc0000 #define bBW_TH 0x700000 #define bED_TH2 0x3800000 #define bBW_option 0x4000000 #define bRatio_TH 0x18000000 #define bWindow_L 0xe0000000 #define bSBD_Option 0x1 #define bFrame_TH 0x1c #define bFS_Option 0x60 #define bDC_Slope_check 0x80 #define bFGuard_Counter_DC_L 0xe00 #define bFrame_Weight_Short 0x7000 #define bSub_Tune 0xe00000 #define bFrame_DC_Length 0xe000000 #define bSBD_start_offset 0x30000000 #define bFrame_TH_2 0x7 #define bFrame_GI2_TH 0x38 #define bGI2_Sync_en 0x40 #define bSarch_Short_Early 0x300 #define bSarch_Short_Late 0xc00 #define bSarch_GI2_Late 0x70000 #define bCFOAntSum 0x1 #define bCFOAcc 0x2 #define bCFOStartOffset 0xc #define bCFOLookBack 0x70 #define bCFOSumWeight 0x80 #define bDAGCEnable 0x10000 #define bTXIQImb_A 0x3ff #define bTXIQImb_B 0xfc00 #define bTXIQImb_C 0x3f0000 #define bTXIQImb_D 0xffc00000 #define bTxIDCOffset 0xff #define bTxQDCOffset 0xff00 #define bTxDFIRMode 0x10000 #define bTxPesudoNoiseOn 0x4000000 #define bTxPesudoNoise_A 0xff #define bTxPesudoNoise_B 0xff00 #define bTxPesudoNoise_C 0xff0000 #define bTxPesudoNoise_D 0xff000000 #define bCCADropOption 0x20000 #define bCCADropThres 0xfff00000 #define bEDCCA_H 0xf #define bEDCCA_L 0xf0 #define bLambda_ED 0x300 #define bRxInitialGain 0x7f #define bRxAntDivEn 0x80 #define bRxAGCAddressForLNA 0x7f00 #define bRxHighPowerFlow 0x8000 #define bRxAGCFreezeThres 0xc0000 #define bRxFreezeStep_AGC1 0x300000 #define bRxFreezeStep_AGC2 0xc00000 #define bRxFreezeStep_AGC3 0x3000000 #define bRxFreezeStep_AGC0 0xc000000 #define bRxRssi_Cmp_En 0x10000000 #define bRxQuickAGCEn 0x20000000 #define bRxAGCFreezeThresMode 0x40000000 #define bRxOverFlowCheckType 0x80000000 #define bRxAGCShift 0x7f #define bTRSW_Tri_Only 0x80 #define bPowerThres 0x300 #define bRxAGCEn 0x1 #define bRxAGCTogetherEn 0x2 #define bRxAGCMin 0x4 #define bRxHP_Ini 0x7 #define bRxHP_TRLNA 0x70 #define bRxHP_RSSI 0x700 #define bRxHP_BBP1 0x7000 #define bRxHP_BBP2 0x70000 #define bRxHP_BBP3 0x700000 #define bRSSI_H 0x7f0000 //the threshold for high power #define bRSSI_Gen 0x7f000000 //the threshold for ant diversity #define bRxSettle_TRSW 0x7 #define bRxSettle_LNA 0x38 #define bRxSettle_RSSI 0x1c0 #define bRxSettle_BBP 0xe00 #define bRxSettle_RxHP 0x7000 #define bRxSettle_AntSW_RSSI 0x38000 #define bRxSettle_AntSW 0xc0000 #define bRxProcessTime_DAGC 0x300000 #define bRxSettle_HSSI 0x400000 #define bRxProcessTime_BBPPW 0x800000 #define bRxAntennaPowerShift 0x3000000 #define bRSSITableSelect 0xc000000 #define bRxHP_Final 0x7000000 #define bRxHTSettle_BBP 0x7 #define bRxHTSettle_HSSI 0x8 #define bRxHTSettle_RxHP 0x70 #define bRxHTSettle_BBPPW 0x80 #define bRxHTSettle_Idle 0x300 #define bRxHTSettle_Reserved 0x1c00 #define bRxHTRxHPEn 0x8000 #define bRxHTAGCFreezeThres 0x30000 #define bRxHTAGCTogetherEn 0x40000 #define bRxHTAGCMin 0x80000 #define bRxHTAGCEn 0x100000 #define bRxHTDAGCEn 0x200000 #define bRxHTRxHP_BBP 0x1c00000 #define bRxHTRxHP_Final 0xe0000000 #define bRxPWRatioTH 0x3 #define bRxPWRatioEn 0x4 #define bRxMFHold 0x3800 #define bRxPD_Delay_TH1 0x38 #define bRxPD_Delay_TH2 0x1c0 #define bRxPD_DC_COUNT_MAX 0x600 //#define bRxMF_Hold 0x3800 #define bRxPD_Delay_TH 0x8000 #define bRxProcess_Delay 0xf0000 #define bRxSearchrange_GI2_Early 0x700000 #define bRxFrame_Guard_Counter_L 0x3800000 #define bRxSGI_Guard_L 0xc000000 #define bRxSGI_Search_L 0x30000000 #define bRxSGI_TH 0xc0000000 #define bDFSCnt0 0xff #define bDFSCnt1 0xff00 #define bDFSFlag 0xf0000 #define bMFWeightSum 0x300000 #define bMinIdxTH 0x7f000000 #define bDAFormat 0x40000 #define bTxChEmuEnable 0x01000000 #define bTRSWIsolation_A 0x7f #define bTRSWIsolation_B 0x7f00 #define bTRSWIsolation_C 0x7f0000 #define bTRSWIsolation_D 0x7f000000 #define bExtLNAGain 0x7c00 // 6. PageE(0xE00) #define bSTBCEn 0x4 // Useless #define bAntennaMapping 0x10 #define bNss 0x20 #define bCFOAntSumD 0x200 #define bPHYCounterReset 0x8000000 #define bCFOReportGet 0x4000000 #define bOFDMContinueTx 0x10000000 #define bOFDMSingleCarrier 0x20000000 #define bOFDMSingleTone 0x40000000 //#define bRxPath1 0x01 //#define bRxPath2 0x02 //#define bRxPath3 0x04 //#define bRxPath4 0x08 //#define bTxPath1 0x10 //#define bTxPath2 0x20 #define bHTDetect 0x100 #define bCFOEn 0x10000 #define bCFOValue 0xfff00000 #define bSigTone_Re 0x3f #define bSigTone_Im 0x7f00 #define bCounter_CCA 0xffff #define bCounter_ParityFail 0xffff0000 #define bCounter_RateIllegal 0xffff #define bCounter_CRC8Fail 0xffff0000 #define bCounter_MCSNoSupport 0xffff #define bCounter_FastSync 0xffff #define bShortCFO 0xfff #define bShortCFOTLength 12 //total #define bShortCFOFLength 11 //fraction #define bLongCFO 0x7ff #define bLongCFOTLength 11 #define bLongCFOFLength 11 #define bTailCFO 0x1fff #define bTailCFOTLength 13 #define bTailCFOFLength 12 #define bmax_en_pwdB 0xffff #define bCC_power_dB 0xffff0000 #define bnoise_pwdB 0xffff #define bPowerMeasTLength 10 #define bPowerMeasFLength 3 #define bRx_HT_BW 0x1 #define bRxSC 0x6 #define bRx_HT 0x8 #define bNB_intf_det_on 0x1 #define bIntf_win_len_cfg 0x30 #define bNB_Intf_TH_cfg 0x1c0 #define bRFGain 0x3f #define bTableSel 0x40 #define bTRSW 0x80 #define bRxSNR_A 0xff #define bRxSNR_B 0xff00 #define bRxSNR_C 0xff0000 #define bRxSNR_D 0xff000000 #define bSNREVMTLength 8 #define bSNREVMFLength 1 #define bCSI1st 0xff #define bCSI2nd 0xff00 #define bRxEVM1st 0xff0000 #define bRxEVM2nd 0xff000000 #define bSIGEVM 0xff #define bPWDB 0xff00 #define bSGIEN 0x10000 #define bSFactorQAM1 0xf // Useless #define bSFactorQAM2 0xf0 #define bSFactorQAM3 0xf00 #define bSFactorQAM4 0xf000 #define bSFactorQAM5 0xf0000 #define bSFactorQAM6 0xf0000 #define bSFactorQAM7 0xf00000 #define bSFactorQAM8 0xf000000 #define bSFactorQAM9 0xf0000000 #define bCSIScheme 0x100000 #define bNoiseLvlTopSet 0x3 // Useless #define bChSmooth 0x4 #define bChSmoothCfg1 0x38 #define bChSmoothCfg2 0x1c0 #define bChSmoothCfg3 0xe00 #define bChSmoothCfg4 0x7000 #define bMRCMode 0x800000 #define bTHEVMCfg 0x7000000 #define bLoopFitType 0x1 // Useless #define bUpdCFO 0x40 #define bUpdCFOOffData 0x80 #define bAdvUpdCFO 0x100 #define bAdvTimeCtrl 0x800 #define bUpdClko 0x1000 #define bFC 0x6000 #define bTrackingMode 0x8000 #define bPhCmpEnable 0x10000 #define bUpdClkoLTF 0x20000 #define bComChCFO 0x40000 #define bCSIEstiMode 0x80000 #define bAdvUpdEqz 0x100000 #define bUChCfg 0x7000000 #define bUpdEqz 0x8000000 //Rx Pseduo noise #define bRxPesudoNoiseOn 0x20000000 // Useless #define bRxPesudoNoise_A 0xff #define bRxPesudoNoise_B 0xff00 #define bRxPesudoNoise_C 0xff0000 #define bRxPesudoNoise_D 0xff000000 #define bPesudoNoiseState_A 0xffff #define bPesudoNoiseState_B 0xffff0000 #define bPesudoNoiseState_C 0xffff #define bPesudoNoiseState_D 0xffff0000 //7. RF Register //Zebra1 #define bZebra1_HSSIEnable 0x8 // Useless #define bZebra1_TRxControl 0xc00 #define bZebra1_TRxGainSetting 0x07f #define bZebra1_RxCorner 0xc00 #define bZebra1_TxChargePump 0x38 #define bZebra1_RxChargePump 0x7 #define bZebra1_ChannelNum 0xf80 #define bZebra1_TxLPFBW 0x400 #define bZebra1_RxLPFBW 0x600 //Zebra4 #define bRTL8256RegModeCtrl1 0x100 // Useless #define bRTL8256RegModeCtrl0 0x40 #define bRTL8256_TxLPFBW 0x18 #define bRTL8256_RxLPFBW 0x600 //RTL8258 #define bRTL8258_TxLPFBW 0xc // Useless #define bRTL8258_RxLPFBW 0xc00 #define bRTL8258_RSSILPFBW 0xc0 // // Other Definition // //byte endable for sb_write #define bByte0 0x1 // Useless #define bByte1 0x2 #define bByte2 0x4 #define bByte3 0x8 #define bWord0 0x3 #define bWord1 0xc #define bDWord 0xf //for PutRegsetting & GetRegSetting BitMask #define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f #define bMaskByte1 0xff00 #define bMaskByte2 0xff0000 #define bMaskByte3 0xff000000 #define bMaskHWord 0xffff0000 #define bMaskLWord 0x0000ffff #define bMaskDWord 0xffffffff #define bMaskH3Bytes 0xffffff00 #define bMask12Bits 0xfff #define bMaskH4Bits 0xf0000000 #define bMaskOFDM_D 0xffc00000 #define bMaskCCK 0x3f3f3f3f //MAC0 will wirte PHY1 #define MAC0_ACCESS_PHY1 0x4000 //MAC1 will wirte PHY0 #define MAC1_ACCESS_PHY0 0x2000 #define bEnable 0x1 // Useless #define bDisable 0x0 #define LeftAntenna 0x0 // Useless #define RightAntenna 0x1 #define tCheckTxStatus 500 //500ms // Useless #define tUpdateRxCounter 100 //100ms #define rateCCK 0 // Useless #define rateOFDM 1 #define rateHT 2 //define Register-End #define bPMAC_End 0x1ff // Useless #define bFPGAPHY0_End 0x8ff #define bFPGAPHY1_End 0x9ff #define bCCKPHY0_End 0xaff #define bOFDMPHY0_End 0xcff #define bOFDMPHY1_End 0xdff //define max debug item in each debug page //#define bMaxItem_FPGA_PHY0 0x9 //#define bMaxItem_FPGA_PHY1 0x3 //#define bMaxItem_PHY_11B 0x16 //#define bMaxItem_OFDM_PHY0 0x29 //#define bMaxItem_OFDM_PHY1 0x0 #define bPMACControl 0x0 // Useless #define bWMACControl 0x1 #define bWNICControl 0x2 #define PathA 0x0 // Useless #define PathB 0x1 #define PathC 0x2 #define PathD 0x3 /*--------------------------Define Parameters-------------------------------*/ #endif //__INC_HAL8192SPHYREG_H rtl8812au-4.3.8.12175.20140902+dfsg/include/Hal8192EPhyCfg.h000066400000000000000000000102261261122257400215320ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __INC_HAL8192EPHYCFG_H__ #define __INC_HAL8192EPHYCFG_H__ /*--------------------------Define Parameters-------------------------------*/ #define LOOP_LIMIT 5 #define MAX_STALL_TIME 50 //us #define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) #define MAX_TXPWR_IDX_NMODE_92S 63 #define Reset_Cnt_Limit 3 #ifdef CONFIG_PCI_HCI #define MAX_AGGR_NUM 0x0B #else #define MAX_AGGR_NUM 0x07 #endif // CONFIG_PCI_HCI /*--------------------------Define Parameters-------------------------------*/ /*------------------------------Define structure----------------------------*/ /* BB/RF related */ /*------------------------------Define structure----------------------------*/ /*------------------------Export global variable----------------------------*/ /*------------------------Export global variable----------------------------*/ /*------------------------Export Marco Definition---------------------------*/ /*------------------------Export Marco Definition---------------------------*/ /*--------------------------Exported Function prototype---------------------*/ // // BB and RF register read/write // u32 PHY_QueryBBReg8192E( IN PADAPTER Adapter, IN u32 RegAddr, IN u32 BitMask ); void PHY_SetBBReg8192E( IN PADAPTER Adapter, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ); u32 PHY_QueryRFReg8192E( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 RegAddr, IN u32 BitMask ); void PHY_SetRFReg8192E( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ); // // Initialization related function // /* MAC/BB/RF HAL config */ int PHY_MACConfig8192E(IN PADAPTER Adapter ); int PHY_BBConfig8192E(IN PADAPTER Adapter ); int PHY_RFConfig8192E(IN PADAPTER Adapter ); /* RF config */ // // BB TX Power R/W // void PHY_GetTxPowerLevel8192E( IN PADAPTER Adapter, OUT s32* powerlevel ); void PHY_SetTxPowerLevel8192E( IN PADAPTER Adapter, IN u8 channel ); BOOLEAN PHY_UpdateTxPowerDbm8192E( IN PADAPTER Adapter, IN int powerInDbm ); VOID PHY_SetTxPowerIndex_8192E( IN PADAPTER Adapter, IN u32 PowerIndex, IN u8 RFPath, IN u8 Rate ); u8 PHY_GetTxPowerIndex_8192E( IN PADAPTER pAdapter, IN u8 RFPath, IN u8 Rate, IN CHANNEL_WIDTH BandWidth, IN u8 Channel ); // // Switch bandwidth for 8192S // VOID PHY_SetBWMode8192E( IN PADAPTER pAdapter, IN CHANNEL_WIDTH Bandwidth, IN u8 Offset ); // // channel switch related funciton // VOID PHY_SwChnl8192E( IN PADAPTER Adapter, IN u8 channel ); VOID PHY_SetSwChnlBWMode8192E( IN PADAPTER Adapter, IN u8 channel, IN CHANNEL_WIDTH Bandwidth, IN u8 Offset40, IN u8 Offset80 ); void phy_SpurCalibration_8192E( IN PADAPTER Adapter ); // // BB/MAC/RF other monitor API // VOID PHY_SetRFPathSwitch_8192E( IN PADAPTER pAdapter, IN BOOLEAN bMain ); VOID storePwrIndexDiffRateOffset( IN PADAPTER Adapter, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ); /*--------------------------Exported Function prototype---------------------*/ #endif // __INC_HAL8192CPHYCFG_H rtl8812au-4.3.8.12175.20140902+dfsg/include/Hal8723APhyCfg.h000066400000000000000000000025001261122257400215220ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __INC_HAL8723PHYCFG_H__ #define __INC_HAL8723PHYCFG_H__ #include /* MAC/BB/RF HAL config */ int PHY_BBConfig8723A( IN PADAPTER Adapter ); int PHY_RFConfig8723A( IN PADAPTER Adapter ); s32 PHY_MACConfig8723A(PADAPTER padapter); VOID PHY_SetSwChnlBWMode8723A( IN PADAPTER Adapter, IN u8 channel, IN CHANNEL_WIDTH Bandwidth, IN u8 Offset40, IN u8 Offset80 ); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/Hal8723APhyReg.h000066400000000000000000000042741261122257400215520ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __INC_HAL8723APHYREG_H__ #define __INC_HAL8723APHYREG_H__ #include // // PageB(0xB00) // #define rPdp_AntA 0xb00 #define rPdp_AntA_4 0xb04 #define rPdp_AntA_8 0xb08 #define rPdp_AntA_C 0xb0c #define rPdp_AntA_10 0xb10 #define rPdp_AntA_14 0xb14 #define rPdp_AntA_18 0xb18 #define rPdp_AntA_1C 0xb1c #define rPdp_AntA_20 0xb20 #define rPdp_AntA_24 0xb24 #define rConfig_Pmpd_AntA 0xb28 #define rConfig_ram64x16 0xb2c #define rBndA 0xb30 #define rHssiPar 0xb34 #define rConfig_AntA 0xb68 #define rConfig_AntB 0xb6c #define rPdp_AntB 0xb70 #define rPdp_AntB_4 0xb74 #define rPdp_AntB_8 0xb78 #define rPdp_AntB_C 0xb7c #define rPdp_AntB_10 0xb80 #define rPdp_AntB_14 0xb84 #define rPdp_AntB_18 0xb88 #define rPdp_AntB_1C 0xb8c #define rPdp_AntB_20 0xb90 #define rPdp_AntB_24 0xb94 #define rConfig_Pmpd_AntB 0xb98 #define rBndB 0xba0 #define rAPK 0xbd8 #define rPm_Rx0_AntA 0xbdc #define rPm_Rx1_AntA 0xbe0 #define rPm_Rx2_AntA 0xbe4 #define rPm_Rx3_AntA 0xbe8 #define rPm_Rx0_AntB 0xbec #define rPm_Rx1_AntB 0xbf0 #define rPm_Rx2_AntB 0xbf4 #define rPm_Rx3_AntB 0xbf8 #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/Hal8723BPhyCfg.h000066400000000000000000000067171261122257400215410ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __INC_HAL8723BPHYCFG_H__ #define __INC_HAL8723BPHYCFG_H__ /*--------------------------Define Parameters-------------------------------*/ #define LOOP_LIMIT 5 #define MAX_STALL_TIME 50 //us #define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) #define MAX_TXPWR_IDX_NMODE_92S 63 #define Reset_Cnt_Limit 3 #ifdef CONFIG_PCI_HCI #define MAX_AGGR_NUM 0x0B #else #define MAX_AGGR_NUM 0x07 #endif // CONFIG_PCI_HCI /*--------------------------Define Parameters End-------------------------------*/ /*------------------------------Define structure----------------------------*/ /*------------------------------Define structure End----------------------------*/ /*--------------------------Exported Function prototype---------------------*/ u32 PHY_QueryBBReg_8723B( IN PADAPTER Adapter, IN u32 RegAddr, IN u32 BitMask ); VOID PHY_SetBBReg_8723B( IN PADAPTER Adapter, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ); u32 PHY_QueryRFReg_8723B( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 RegAddr, IN u32 BitMask ); VOID PHY_SetRFReg_8723B( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ); /* MAC/BB/RF HAL config */ int PHY_BBConfig8723B(PADAPTER Adapter ); int PHY_RFConfig8723B(PADAPTER Adapter ); s32 PHY_MACConfig8723B(PADAPTER padapter); int PHY_ConfigRFWithParaFile_8723B( IN PADAPTER Adapter, IN u8* pFileName, RF_PATH eRFPath ); VOID PHY_SetTxPowerIndex_8723B( IN PADAPTER Adapter, IN u32 PowerIndex, IN u8 RFPath, IN u8 Rate ); u8 PHY_GetTxPowerIndex_8723B( IN PADAPTER pAdapter, IN u8 RFPath, IN u8 Rate, IN CHANNEL_WIDTH BandWidth, IN u8 Channel ); VOID PHY_GetTxPowerLevel8723B( IN PADAPTER Adapter, OUT s32* powerlevel ); VOID PHY_SetTxPowerLevel8723B( IN PADAPTER Adapter, IN u8 channel ); VOID PHY_SetBWMode8723B( IN PADAPTER Adapter, IN CHANNEL_WIDTH Bandwidth, // 20M or 40M IN unsigned char Offset // Upper, Lower, or Don't care ); VOID PHY_SwChnl8723B( // Call after initialization IN PADAPTER Adapter, IN u8 channel ); VOID PHY_SetSwChnlBWMode8723B( IN PADAPTER Adapter, IN u8 channel, IN CHANNEL_WIDTH Bandwidth, IN u8 Offset40, IN u8 Offset80 ); VOID PHY_SetRFPathSwitch_8723B( IN PADAPTER pAdapter, IN BOOLEAN bMain ); /*--------------------------Exported Function prototype End---------------------*/ #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/Hal8723BPhyReg.h000066400000000000000000000046011261122257400215450ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __INC_HAL8723BPHYREG_H__ #define __INC_HAL8723BPHYREG_H__ #include // BB Register Definition // // 4. Page9(0x900) // #define rDPDT_control 0x92c #define rfe_ctrl_anta_src 0x930 #define rS0S1_PathSwitch 0x948 #define AGC_table_select 0xb2c // // PageB(0xB00) // #define rPdp_AntA 0xb00 #define rPdp_AntA_4 0xb04 #define rPdp_AntA_8 0xb08 #define rPdp_AntA_C 0xb0c #define rPdp_AntA_10 0xb10 #define rPdp_AntA_14 0xb14 #define rPdp_AntA_18 0xb18 #define rPdp_AntA_1C 0xb1c #define rPdp_AntA_20 0xb20 #define rPdp_AntA_24 0xb24 #define rConfig_Pmpd_AntA 0xb28 #define rConfig_ram64x16 0xb2c #define rBndA 0xb30 #define rHssiPar 0xb34 #define rConfig_AntA 0xb68 #define rConfig_AntB 0xb6c #define rPdp_AntB 0xb70 #define rPdp_AntB_4 0xb74 #define rPdp_AntB_8 0xb78 #define rPdp_AntB_C 0xb7c #define rPdp_AntB_10 0xb80 #define rPdp_AntB_14 0xb84 #define rPdp_AntB_18 0xb88 #define rPdp_AntB_1C 0xb8c #define rPdp_AntB_20 0xb90 #define rPdp_AntB_24 0xb94 #define rConfig_Pmpd_AntB 0xb98 #define rBndB 0xba0 #define rAPK 0xbd8 #define rPm_Rx0_AntA 0xbdc #define rPm_Rx1_AntA 0xbe0 #define rPm_Rx2_AntA 0xbe4 #define rPm_Rx3_AntA 0xbe8 #define rPm_Rx0_AntB 0xbec #define rPm_Rx1_AntB 0xbf0 #define rPm_Rx2_AntB 0xbf4 #define rPm_Rx3_AntB 0xbf8 #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/Hal8812PhyCfg.h000066400000000000000000000103001261122257400214150ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __INC_HAL8812PHYCFG_H__ #define __INC_HAL8812PHYCFG_H__ /*--------------------------Define Parameters-------------------------------*/ #define LOOP_LIMIT 5 #define MAX_STALL_TIME 50 //us #define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) #define MAX_TXPWR_IDX_NMODE_92S 63 #define Reset_Cnt_Limit 3 #ifdef CONFIG_PCI_HCI #define MAX_AGGR_NUM 0x0B #else #define MAX_AGGR_NUM 0x07 #endif // CONFIG_PCI_HCI /*--------------------------Define Parameters-------------------------------*/ /*------------------------------Define structure----------------------------*/ /* BB/RF related */ /*------------------------------Define structure----------------------------*/ /*------------------------Export global variable----------------------------*/ /*------------------------Export global variable----------------------------*/ /*------------------------Export Marco Definition---------------------------*/ /*------------------------Export Marco Definition---------------------------*/ /*--------------------------Exported Function prototype---------------------*/ // // BB and RF register read/write // u32 PHY_QueryBBReg8812( IN PADAPTER Adapter, IN u32 RegAddr, IN u32 BitMask ); void PHY_SetBBReg8812( IN PADAPTER Adapter, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ); u32 PHY_QueryRFReg8812( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 RegAddr, IN u32 BitMask ); void PHY_SetRFReg8812( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ); // // Initialization related function // /* MAC/BB/RF HAL config */ int PHY_MACConfig8812(IN PADAPTER Adapter ); int PHY_BBConfig8812(IN PADAPTER Adapter ); void PHY_BB8812_Config_1T(IN PADAPTER Adapter ); int PHY_RFConfig8812(IN PADAPTER Adapter ); /* RF config */ s32 PHY_SwitchWirelessBand8812( IN PADAPTER Adapter, IN u8 Band ); // // BB TX Power R/W // void PHY_GetTxPowerLevel8812( IN PADAPTER Adapter, OUT s32* powerlevel ); void PHY_SetTxPowerLevel8812( IN PADAPTER Adapter, IN u8 Channel ); BOOLEAN PHY_UpdateTxPowerDbm8812( IN PADAPTER Adapter, IN int powerInDbm ); u8 PHY_GetTxPowerIndex_8812A( IN PADAPTER pAdapter, IN u8 RFPath, IN u8 Rate, IN CHANNEL_WIDTH BandWidth, IN u8 Channel ); u32 PHY_GetTxBBSwing_8812A( IN PADAPTER Adapter, IN BAND_TYPE Band, IN u8 RFPath ); VOID PHY_SetTxPowerIndex_8812A( IN PADAPTER Adapter, IN u4Byte PowerIndex, IN u1Byte RFPath, IN u1Byte Rate ); // // Switch bandwidth for 8192S // VOID PHY_SetBWMode8812( IN PADAPTER pAdapter, IN CHANNEL_WIDTH Bandwidth, IN u8 Offset ); // // channel switch related funciton // VOID PHY_SwChnl8812( IN PADAPTER Adapter, IN u8 channel ); VOID PHY_SetSwChnlBWMode8812( IN PADAPTER Adapter, IN u8 channel, IN CHANNEL_WIDTH Bandwidth, IN u8 Offset40, IN u8 Offset80 ); // // BB/MAC/RF other monitor API // VOID PHY_SetRFPathSwitch_8812A( IN PADAPTER pAdapter, IN BOOLEAN bMain ); /*--------------------------Exported Function prototype---------------------*/ #endif // __INC_HAL8192CPHYCFG_H rtl8812au-4.3.8.12175.20140902+dfsg/include/Hal8812PhyReg.h000066400000000000000000000630421261122257400214460ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __INC_HAL8812PHYREG_H__ #define __INC_HAL8812PHYREG_H__ /*--------------------------Define Parameters-------------------------------*/ // // BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF // 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF // 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 // 3. RF register 0x00-2E // 4. Bit Mask for BB/RF register // 5. Other defintion for BB/RF R/W // // BB Register Definition #define rCCAonSec_Jaguar 0x838 #define rPwed_TH_Jaguar 0x830 // BW and sideband setting #define rBWIndication_Jaguar 0x834 #define rL1PeakTH_Jaguar 0x848 #define rRFMOD_Jaguar 0x8ac //RF mode #define rADC_Buf_Clk_Jaguar 0x8c4 #define rRFECTRL_Jaguar 0x900 #define bRFMOD_Jaguar 0xc3 #define rCCK_System_Jaguar 0xa00 // for cck sideband #define bCCK_System_Jaguar 0x10 // Block & Path enable #define rOFDMCCKEN_Jaguar 0x808 // OFDM/CCK block enable #define bOFDMEN_Jaguar 0x20000000 #define bCCKEN_Jaguar 0x10000000 #define rRxPath_Jaguar 0x808 // Rx antenna #define bRxPath_Jaguar 0xff #define rTxPath_Jaguar 0x80c // Tx antenna #define bTxPath_Jaguar 0x0fffffff #define rCCK_RX_Jaguar 0xa04 // for cck rx path selection #define bCCK_RX_Jaguar 0x0c000000 #define rVhtlen_Use_Lsig_Jaguar 0x8c3 // Use LSIG for VHT length // RF read/write-related #define rHSSIRead_Jaguar 0x8b0 // RF read addr #define bHSSIRead_addr_Jaguar 0xff #define bHSSIRead_trigger_Jaguar 0x100 #define rA_PIRead_Jaguar 0xd04 // RF readback with PI #define rB_PIRead_Jaguar 0xd44 // RF readback with PI #define rA_SIRead_Jaguar 0xd08 // RF readback with SI #define rB_SIRead_Jaguar 0xd48 // RF readback with SI #define rRead_data_Jaguar 0xfffff #define rA_LSSIWrite_Jaguar 0xc90 // RF write addr #define rB_LSSIWrite_Jaguar 0xe90 // RF write addr #define bLSSIWrite_data_Jaguar 0x000fffff #define bLSSIWrite_addr_Jaguar 0x0ff00000 // YN: mask the following register definition temporarily #define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch #define rFPGA0_XB_RFInterfaceOE 0x864 #define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control #define rFPGA0_XCD_RFInterfaceSW 0x874 //#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter //#define rFPGA0_XCD_RFParameter 0x87c //#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? //#define rFPGA0_AnalogParameter2 0x884 //#define rFPGA0_AnalogParameter3 0x888 //#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy //#define rFPGA0_AnalogParameter4 0x88c // CCK TX scaling #define rCCK_TxFilter1_Jaguar 0xa20 #define bCCK_TxFilter1_C0_Jaguar 0x00ff0000 #define bCCK_TxFilter1_C1_Jaguar 0xff000000 #define rCCK_TxFilter2_Jaguar 0xa24 #define bCCK_TxFilter2_C2_Jaguar 0x000000ff #define bCCK_TxFilter2_C3_Jaguar 0x0000ff00 #define bCCK_TxFilter2_C4_Jaguar 0x00ff0000 #define bCCK_TxFilter2_C5_Jaguar 0xff000000 #define rCCK_TxFilter3_Jaguar 0xa28 #define bCCK_TxFilter3_C6_Jaguar 0x000000ff #define bCCK_TxFilter3_C7_Jaguar 0x0000ff00 // YN: mask the following register definition temporarily //#define rPdp_AntA 0xb00 //#define rPdp_AntA_4 0xb04 //#define rConfig_Pmpd_AntA 0xb28 //#define rConfig_AntA 0xb68 //#define rConfig_AntB 0xb6c //#define rPdp_AntB 0xb70 //#define rPdp_AntB_4 0xb74 //#define rConfig_Pmpd_AntB 0xb98 //#define rAPK 0xbd8 // RXIQC #define rA_RxIQC_AB_Jaguar 0xc10 //RxIQ imblance matrix coeff. A & B #define rA_RxIQC_CD_Jaguar 0xc14 //RxIQ imblance matrix coeff. C & D #define rA_TxScale_Jaguar 0xc1c // Pah_A TX scaling factor #define rB_TxScale_Jaguar 0xe1c // Path_B TX scaling factor #define rB_RxIQC_AB_Jaguar 0xe10 //RxIQ imblance matrix coeff. A & B #define rB_RxIQC_CD_Jaguar 0xe14 //RxIQ imblance matrix coeff. C & D #define b_RxIQC_AC_Jaguar 0x02ff // bit mask for IQC matrix element A & C #define b_RxIQC_BD_Jaguar 0x02ff0000 // bit mask for IQC matrix element A & C // DIG-related #define rA_IGI_Jaguar 0xc50 // Initial Gain for path-A #define rB_IGI_Jaguar 0xe50 // Initial Gain for path-B #define rOFDM_FalseAlarm1_Jaguar 0xf48 // counter for break #define rOFDM_FalseAlarm2_Jaguar 0xf4c // counter for spoofing #define rCCK_FalseAlarm_Jaguar 0xa5c // counter for cck false alarm #define b_FalseAlarm_Jaguar 0xffff #define rCCK_CCA_Jaguar 0xa08 // cca threshold #define bCCK_CCA_Jaguar 0x00ff0000 // Tx Power Ttraining-related #define rA_TxPwrTraing_Jaguar 0xc54 #define rB_TxPwrTraing_Jaguar 0xe54 // Report-related #define rOFDM_ShortCFOAB_Jaguar 0xf60 #define rOFDM_LongCFOAB_Jaguar 0xf64 #define rOFDM_EndCFOAB_Jaguar 0xf70 #define rOFDM_AGCReport_Jaguar 0xf84 #define rOFDM_RxSNR_Jaguar 0xf88 #define rOFDM_RxEVMCSI_Jaguar 0xf8c #define rOFDM_SIGReport_Jaguar 0xf90 // Misc functions #define rEDCCA_Jaguar 0x8a4 // EDCCA #define bEDCCA_Jaguar 0xffff #define rAGC_table_Jaguar 0x82c // AGC tabel select #define bAGC_table_Jaguar 0x3 #define b_sel5g_Jaguar 0x1000 // sel5g #define b_LNA_sw_Jaguar 0x8000 // HW/WS control for LNA #define rFc_area_Jaguar 0x860 // fc_area #define bFc_area_Jaguar 0x1ffe000 #define rSingleTone_ContTx_Jaguar 0x914 // RFE #define rA_RFE_Pinmux_Jaguar 0xcb0 // Path_A RFE cotrol pinmux #define rB_RFE_Pinmux_Jaguar 0xeb0 // Path_B RFE control pinmux #define rA_RFE_Inv_Jaguar 0xcb4 // Path_A RFE cotrol #define rB_RFE_Inv_Jaguar 0xeb4 // Path_B RFE control #define rA_RFE_Jaguar 0xcb8 // Path_A RFE cotrol #define rB_RFE_Jaguar 0xeb8 // Path_B RFE control #define r_ANTSEL_SW_Jaguar 0x900 // ANTSEL SW Control #define bMask_RFEInv_Jaguar 0x3ff00000 #define bMask_AntselPathFollow_Jaguar 0x00030000 // TX AGC #define rTxAGC_A_CCK11_CCK1_JAguar 0xc20 #define rTxAGC_A_Ofdm18_Ofdm6_JAguar 0xc24 #define rTxAGC_A_Ofdm54_Ofdm24_JAguar 0xc28 #define rTxAGC_A_MCS3_MCS0_JAguar 0xc2c #define rTxAGC_A_MCS7_MCS4_JAguar 0xc30 #define rTxAGC_A_MCS11_MCS8_JAguar 0xc34 #define rTxAGC_A_MCS15_MCS12_JAguar 0xc38 #define rTxAGC_A_Nss1Index3_Nss1Index0_JAguar 0xc3c #define rTxAGC_A_Nss1Index7_Nss1Index4_JAguar 0xc40 #define rTxAGC_A_Nss2Index1_Nss1Index8_JAguar 0xc44 #define rTxAGC_A_Nss2Index5_Nss2Index2_JAguar 0xc48 #define rTxAGC_A_Nss2Index9_Nss2Index6_JAguar 0xc4c #define rTxAGC_B_CCK11_CCK1_JAguar 0xe20 #define rTxAGC_B_Ofdm18_Ofdm6_JAguar 0xe24 #define rTxAGC_B_Ofdm54_Ofdm24_JAguar 0xe28 #define rTxAGC_B_MCS3_MCS0_JAguar 0xe2c #define rTxAGC_B_MCS7_MCS4_JAguar 0xe30 #define rTxAGC_B_MCS11_MCS8_JAguar 0xe34 #define rTxAGC_B_MCS15_MCS12_JAguar 0xe38 #define rTxAGC_B_Nss1Index3_Nss1Index0_JAguar 0xe3c #define rTxAGC_B_Nss1Index7_Nss1Index4_JAguar 0xe40 #define rTxAGC_B_Nss2Index1_Nss1Index8_JAguar 0xe44 #define rTxAGC_B_Nss2Index5_Nss2Index2_JAguar 0xe48 #define rTxAGC_B_Nss2Index9_Nss2Index6_JAguar 0xe4c #define bTxAGC_byte0_Jaguar 0xff #define bTxAGC_byte1_Jaguar 0xff00 #define bTxAGC_byte2_Jaguar 0xff0000 #define bTxAGC_byte3_Jaguar 0xff000000 // IQK YN: temporaily mask this part //#define rFPGA0_IQK 0xe28 //#define rTx_IQK_Tone_A 0xe30 //#define rRx_IQK_Tone_A 0xe34 //#define rTx_IQK_PI_A 0xe38 //#define rRx_IQK_PI_A 0xe3c //#define rTx_IQK 0xe40 //#define rRx_IQK 0xe44 //#define rIQK_AGC_Pts 0xe48 //#define rIQK_AGC_Rsp 0xe4c //#define rTx_IQK_Tone_B 0xe50 //#define rRx_IQK_Tone_B 0xe54 //#define rTx_IQK_PI_B 0xe58 //#define rRx_IQK_PI_B 0xe5c //#define rIQK_AGC_Cont 0xe60 // AFE-related #define rA_AFEPwr1_Jaguar 0xc60 // dynamic AFE power control #define rA_AFEPwr2_Jaguar 0xc64 // dynamic AFE power control #define rA_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xc68 #define rA_Tx_CCKBBON_OFDMRFON_Jaguar 0xc6c #define rA_Tx_OFDMBBON_Tx2Rx_Jaguar 0xc70 #define rA_Tx2Tx_RXCCK_Jaguar 0xc74 #define rA_Rx_OFDM_WaitRIFS_Jaguar 0xc78 #define rA_Rx2Rx_BT_Jaguar 0xc7c #define rA_sleep_nav_Jaguar 0xc80 #define rA_pmpd_Jaguar 0xc84 #define rB_AFEPwr1_Jaguar 0xe60 // dynamic AFE power control #define rB_AFEPwr2_Jaguar 0xe64 // dynamic AFE power control #define rB_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xe68 #define rB_Tx_CCKBBON_OFDMRFON_Jaguar 0xe6c #define rB_Tx_OFDMBBON_Tx2Rx_Jaguar 0xe70 #define rB_Tx2Tx_RXCCK_Jaguar 0xe74 #define rB_Rx_OFDM_WaitRIFS_Jaguar 0xe78 #define rB_Rx2Rx_BT_Jaguar 0xe7c #define rB_sleep_nav_Jaguar 0xe80 #define rB_pmpd_Jaguar 0xe84 // YN: mask these registers temporaily //#define rTx_Power_Before_IQK_A 0xe94 //#define rTx_Power_After_IQK_A 0xe9c //#define rRx_Power_Before_IQK_A 0xea0 //#define rRx_Power_Before_IQK_A_2 0xea4 //#define rRx_Power_After_IQK_A 0xea8 //#define rRx_Power_After_IQK_A_2 0xeac //#define rTx_Power_Before_IQK_B 0xeb4 //#define rTx_Power_After_IQK_B 0xebc //#define rRx_Power_Before_IQK_B 0xec0 //#define rRx_Power_Before_IQK_B_2 0xec4 //#define rRx_Power_After_IQK_B 0xec8 //#define rRx_Power_After_IQK_B_2 0xecc // RSSI Dump #define rA_RSSIDump_Jaguar 0xBF0 #define rB_RSSIDump_Jaguar 0xBF1 #define rS1_RXevmDump_Jaguar 0xBF4 #define rS2_RXevmDump_Jaguar 0xBF5 #define rA_RXsnrDump_Jaguar 0xBF6 #define rB_RXsnrDump_Jaguar 0xBF7 #define rA_CfoShortDump_Jaguar 0xBF8 #define rB_CfoShortDump_Jaguar 0xBFA #define rA_CfoLongDump_Jaguar 0xBEC #define rB_CfoLongDump_Jaguar 0xBEE // RF Register // #define RF_AC_Jaguar 0x00 // #define RF_RF_Top_Jaguar 0x07 // #define RF_TXLOK_Jaguar 0x08 // #define RF_TXAPK_Jaguar 0x0B #define RF_CHNLBW_Jaguar 0x18 // RF channel and BW switch #define RF_RCK1_Jaguar 0x1c // #define RF_RCK2_Jaguar 0x1d #define RF_RCK3_Jaguar 0x1e #define RF_ModeTableAddr 0x30 #define RF_ModeTableData0 0x31 #define RF_ModeTableData1 0x32 #define RF_TxLCTank_Jaguar 0x54 #define RF_APK_Jaguar 0x63 #define RF_LCK 0xB4 #define RF_WeLut_Jaguar 0xEF #define bRF_CHNLBW_MOD_AG_Jaguar 0x70300 #define bRF_CHNLBW_BW 0xc00 // // RL6052 Register definition // #define RF_AC 0x00 // #define RF_IPA_A 0x0C // #define RF_TXBIAS_A 0x0D #define RF_BS_PA_APSET_G9_G11 0x0E #define RF_MODE1 0x10 // #define RF_MODE2 0x11 // #define RF_CHNLBW 0x18 // RF channel and BW switch #define RF_RCK_OS 0x30 // RF TX PA control #define RF_TXPA_G1 0x31 // RF TX PA control #define RF_TXPA_G2 0x32 // RF TX PA control #define RF_TXPA_G3 0x33 // RF TX PA control #define RF_0x52 0x52 #define RF_WE_LUT 0xEF // //Bit Mask // // 1. Page1(0x100) #define bBBResetB 0x100 // Useless now? #define bGlobalResetB 0x200 #define bOFDMTxStart 0x4 #define bCCKTxStart 0x8 #define bCRC32Debug 0x100 #define bPMACLoopback 0x10 #define bTxLSIG 0xffffff #define bOFDMTxRate 0xf #define bOFDMTxReserved 0x10 #define bOFDMTxLength 0x1ffe0 #define bOFDMTxParity 0x20000 #define bTxHTSIG1 0xffffff #define bTxHTMCSRate 0x7f #define bTxHTBW 0x80 #define bTxHTLength 0xffff00 #define bTxHTSIG2 0xffffff #define bTxHTSmoothing 0x1 #define bTxHTSounding 0x2 #define bTxHTReserved 0x4 #define bTxHTAggreation 0x8 #define bTxHTSTBC 0x30 #define bTxHTAdvanceCoding 0x40 #define bTxHTShortGI 0x80 #define bTxHTNumberHT_LTF 0x300 #define bTxHTCRC8 0x3fc00 #define bCounterReset 0x10000 #define bNumOfOFDMTx 0xffff #define bNumOfCCKTx 0xffff0000 #define bTxIdleInterval 0xffff #define bOFDMService 0xffff0000 #define bTxMACHeader 0xffffffff #define bTxDataInit 0xff #define bTxHTMode 0x100 #define bTxDataType 0x30000 #define bTxRandomSeed 0xffffffff #define bCCKTxPreamble 0x1 #define bCCKTxSFD 0xffff0000 #define bCCKTxSIG 0xff #define bCCKTxService 0xff00 #define bCCKLengthExt 0x8000 #define bCCKTxLength 0xffff0000 #define bCCKTxCRC16 0xffff #define bCCKTxStatus 0x1 #define bOFDMTxStatus 0x2 // // 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF // 1. Page1(0x100) // #define rPMAC_Reset 0x100 #define rPMAC_TxStart 0x104 #define rPMAC_TxLegacySIG 0x108 #define rPMAC_TxHTSIG1 0x10c #define rPMAC_TxHTSIG2 0x110 #define rPMAC_PHYDebug 0x114 #define rPMAC_TxPacketNum 0x118 #define rPMAC_TxIdle 0x11c #define rPMAC_TxMACHeader0 0x120 #define rPMAC_TxMACHeader1 0x124 #define rPMAC_TxMACHeader2 0x128 #define rPMAC_TxMACHeader3 0x12c #define rPMAC_TxMACHeader4 0x130 #define rPMAC_TxMACHeader5 0x134 #define rPMAC_TxDataType 0x138 #define rPMAC_TxRandomSeed 0x13c #define rPMAC_CCKPLCPPreamble 0x140 #define rPMAC_CCKPLCPHeader 0x144 #define rPMAC_CCKCRC16 0x148 #define rPMAC_OFDMRxCRC32OK 0x170 #define rPMAC_OFDMRxCRC32Er 0x174 #define rPMAC_OFDMRxParityEr 0x178 #define rPMAC_OFDMRxCRC8Er 0x17c #define rPMAC_CCKCRxRC16Er 0x180 #define rPMAC_CCKCRxRC32Er 0x184 #define rPMAC_CCKCRxRC32OK 0x188 #define rPMAC_TxStatus 0x18c // // 3. Page8(0x800) // #define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? #define rFPGA0_TxInfo 0x804 // Status report?? #define rFPGA0_PSDFunction 0x808 #define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? #define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register #define rFPGA0_XA_HSSIParameter2 0x824 #define rFPGA0_XB_HSSIParameter1 0x828 #define rFPGA0_XB_HSSIParameter2 0x82c #define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch #define rFPGA0_XCD_SwitchControl 0x85c #define rFPGA0_XAB_RFParameter 0x878 // RF Parameter #define rFPGA0_XCD_RFParameter 0x87c #define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? #define rFPGA0_AnalogParameter2 0x884 #define rFPGA0_AnalogParameter3 0x888 #define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy #define rFPGA0_AnalogParameter4 0x88c #define rFPGA0_XB_LSSIReadBack 0x8a4 #define rFPGA0_XCD_RFPara 0x8b4 // // 4. Page9(0x900) // #define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? #define rFPGA1_TxBlock 0x904 // Useless now #define rFPGA1_DebugSelect 0x908 // Useless now #define rFPGA1_TxInfo 0x90c // Useless now // Status report?? // // PageA(0xA00) // #define rCCK0_System 0xa00 #define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI #define rCCK0_DSPParameter2 0xa1c //SQ threshold #define rCCK0_TxFilter1 0xa20 #define rCCK0_TxFilter2 0xa24 #define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 #define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report // // PageB(0xB00) // #define rPdp_AntA 0xb00 #define rPdp_AntA_4 0xb04 #define rConfig_Pmpd_AntA 0xb28 #define rConfig_AntA 0xb68 #define rConfig_AntB 0xb6c #define rPdp_AntB 0xb70 #define rPdp_AntB_4 0xb74 #define rConfig_Pmpd_AntB 0xb98 #define rAPK 0xbd8 // // 6. PageC(0xC00) // #define rOFDM0_LSTF 0xc00 #define rOFDM0_TRxPathEnable 0xc04 #define rOFDM0_TRMuxPar 0xc08 #define rOFDM0_TRSWIsolation 0xc0c #define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter #define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix #define rOFDM0_XBRxAFE 0xc18 #define rOFDM0_XBRxIQImbalance 0xc1c #define rOFDM0_XCRxAFE 0xc20 #define rOFDM0_XCRxIQImbalance 0xc24 #define rOFDM0_XDRxAFE 0xc28 #define rOFDM0_XDRxIQImbalance 0xc2c #define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain #define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. #define rOFDM0_RxDetector3 0xc38 //Frame Sync. #define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI #define rOFDM0_RxDSP 0xc40 //Rx Sync Path #define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC #define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold #define rOFDM0_ECCAThreshold 0xc4c // energy CCA #define rOFDM0_XAAGCCore1 0xc50 // DIG #define rOFDM0_XAAGCCore2 0xc54 #define rOFDM0_XBAGCCore1 0xc58 #define rOFDM0_XBAGCCore2 0xc5c #define rOFDM0_XCAGCCore1 0xc60 #define rOFDM0_XCAGCCore2 0xc64 #define rOFDM0_XDAGCCore1 0xc68 #define rOFDM0_XDAGCCore2 0xc6c #define rOFDM0_AGCParameter1 0xc70 #define rOFDM0_AGCParameter2 0xc74 #define rOFDM0_AGCRSSITable 0xc78 #define rOFDM0_HTSTFAGC 0xc7c #define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG #define rOFDM0_XATxAFE 0xc84 #define rOFDM0_XBTxIQImbalance 0xc88 #define rOFDM0_XBTxAFE 0xc8c #define rOFDM0_XCTxIQImbalance 0xc90 #define rOFDM0_XCTxAFE 0xc94 #define rOFDM0_XDTxIQImbalance 0xc98 #define rOFDM0_XDTxAFE 0xc9c #define rOFDM0_RxIQExtAnta 0xca0 #define rOFDM0_TxCoeff1 0xca4 #define rOFDM0_TxCoeff2 0xca8 #define rOFDM0_TxCoeff3 0xcac #define rOFDM0_TxCoeff4 0xcb0 #define rOFDM0_TxCoeff5 0xcb4 #define rOFDM0_TxCoeff6 0xcb8 #define rOFDM0_RxHPParameter 0xce0 #define rOFDM0_TxPseudoNoiseWgt 0xce4 #define rOFDM0_FrameSync 0xcf0 #define rOFDM0_DFSReport 0xcf4 // // 7. PageD(0xD00) // #define rOFDM1_LSTF 0xd00 #define rOFDM1_TRxPathEnable 0xd04 // // 8. PageE(0xE00) // #define rTxAGC_A_Rate18_06 0xe00 #define rTxAGC_A_Rate54_24 0xe04 #define rTxAGC_A_CCK1_Mcs32 0xe08 #define rTxAGC_A_Mcs03_Mcs00 0xe10 #define rTxAGC_A_Mcs07_Mcs04 0xe14 #define rTxAGC_A_Mcs11_Mcs08 0xe18 #define rTxAGC_A_Mcs15_Mcs12 0xe1c #define rTxAGC_B_Rate18_06 0x830 #define rTxAGC_B_Rate54_24 0x834 #define rTxAGC_B_CCK1_55_Mcs32 0x838 #define rTxAGC_B_Mcs03_Mcs00 0x83c #define rTxAGC_B_Mcs07_Mcs04 0x848 #define rTxAGC_B_Mcs11_Mcs08 0x84c #define rTxAGC_B_Mcs15_Mcs12 0x868 #define rTxAGC_B_CCK11_A_CCK2_11 0x86c #define rFPGA0_IQK 0xe28 #define rTx_IQK_Tone_A 0xe30 #define rRx_IQK_Tone_A 0xe34 #define rTx_IQK_PI_A 0xe38 #define rRx_IQK_PI_A 0xe3c #define rTx_IQK 0xe40 #define rRx_IQK 0xe44 #define rIQK_AGC_Pts 0xe48 #define rIQK_AGC_Rsp 0xe4c #define rTx_IQK_Tone_B 0xe50 #define rRx_IQK_Tone_B 0xe54 #define rTx_IQK_PI_B 0xe58 #define rRx_IQK_PI_B 0xe5c #define rIQK_AGC_Cont 0xe60 #define rBlue_Tooth 0xe6c #define rRx_Wait_CCA 0xe70 #define rTx_CCK_RFON 0xe74 #define rTx_CCK_BBON 0xe78 #define rTx_OFDM_RFON 0xe7c #define rTx_OFDM_BBON 0xe80 #define rTx_To_Rx 0xe84 #define rTx_To_Tx 0xe88 #define rRx_CCK 0xe8c #define rTx_Power_Before_IQK_A 0xe94 #define rTx_Power_After_IQK_A 0xe9c #define rRx_Power_Before_IQK_A 0xea0 #define rRx_Power_Before_IQK_A_2 0xea4 #define rRx_Power_After_IQK_A 0xea8 #define rRx_Power_After_IQK_A_2 0xeac #define rTx_Power_Before_IQK_B 0xeb4 #define rTx_Power_After_IQK_B 0xebc #define rRx_Power_Before_IQK_B 0xec0 #define rRx_Power_Before_IQK_B_2 0xec4 #define rRx_Power_After_IQK_B 0xec8 #define rRx_Power_After_IQK_B_2 0xecc #define rRx_OFDM 0xed0 #define rRx_Wait_RIFS 0xed4 #define rRx_TO_Rx 0xed8 #define rStandby 0xedc #define rSleep 0xee0 #define rPMPD_ANAEN 0xeec // 2. Page8(0x800) #define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD #define bJapanMode 0x2 #define bCCKTxSC 0x30 #define bCCKEn 0x1000000 #define bOFDMEn 0x2000000 #define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage #define bXCTxAGC 0xf000 #define bXDTxAGC 0xf0000 // 4. PageA(0xA00) #define bCCKBBMode 0x3 // Useless #define bCCKTxPowerSaving 0x80 #define bCCKRxPowerSaving 0x40 #define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch #define bCCKScramble 0x8 // Useless #define bCCKAntDiversity 0x8000 #define bCCKCarrierRecovery 0x4000 #define bCCKTxRate 0x3000 #define bCCKDCCancel 0x0800 #define bCCKISICancel 0x0400 #define bCCKMatchFilter 0x0200 #define bCCKEqualizer 0x0100 #define bCCKPreambleDetect 0x800000 #define bCCKFastFalseCCA 0x400000 #define bCCKChEstStart 0x300000 #define bCCKCCACount 0x080000 #define bCCKcs_lim 0x070000 #define bCCKBistMode 0x80000000 #define bCCKCCAMask 0x40000000 #define bCCKTxDACPhase 0x4 #define bCCKRxADCPhase 0x20000000 //r_rx_clk #define bCCKr_cp_mode0 0x0100 #define bCCKTxDCOffset 0xf0 #define bCCKRxDCOffset 0xf #define bCCKCCAMode 0xc000 #define bCCKFalseCS_lim 0x3f00 #define bCCKCS_ratio 0xc00000 #define bCCKCorgBit_sel 0x300000 #define bCCKPD_lim 0x0f0000 #define bCCKNewCCA 0x80000000 #define bCCKRxHPofIG 0x8000 #define bCCKRxIG 0x7f00 #define bCCKLNAPolarity 0x800000 #define bCCKRx1stGain 0x7f0000 #define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity #define bCCKRxAGCSatLevel 0x1f000000 #define bCCKRxAGCSatCount 0xe0 #define bCCKRxRFSettle 0x1f //AGCsamp_dly #define bCCKFixedRxAGC 0x8000 //#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 #define bCCKAntennaPolarity 0x2000 #define bCCKTxFilterType 0x0c00 #define bCCKRxAGCReportType 0x0300 #define bCCKRxDAGCEn 0x80000000 #define bCCKRxDAGCPeriod 0x20000000 #define bCCKRxDAGCSatLevel 0x1f000000 #define bCCKTimingRecovery 0x800000 #define bCCKTxC0 0x3f0000 #define bCCKTxC1 0x3f000000 #define bCCKTxC2 0x3f #define bCCKTxC3 0x3f00 #define bCCKTxC4 0x3f0000 #define bCCKTxC5 0x3f000000 #define bCCKTxC6 0x3f #define bCCKTxC7 0x3f00 #define bCCKDebugPort 0xff0000 #define bCCKDACDebug 0x0f000000 #define bCCKFalseAlarmEnable 0x8000 #define bCCKFalseAlarmRead 0x4000 #define bCCKTRSSI 0x7f #define bCCKRxAGCReport 0xfe #define bCCKRxReport_AntSel 0x80000000 #define bCCKRxReport_MFOff 0x40000000 #define bCCKRxRxReport_SQLoss 0x20000000 #define bCCKRxReport_Pktloss 0x10000000 #define bCCKRxReport_Lockedbit 0x08000000 #define bCCKRxReport_RateError 0x04000000 #define bCCKRxReport_RxRate 0x03000000 #define bCCKRxFACounterLower 0xff #define bCCKRxFACounterUpper 0xff000000 #define bCCKRxHPAGCStart 0xe000 #define bCCKRxHPAGCFinal 0x1c00 #define bCCKRxFalseAlarmEnable 0x8000 #define bCCKFACounterFreeze 0x4000 #define bCCKTxPathSel 0x10000000 #define bCCKDefaultRxPath 0xc000000 #define bCCKOptionRxPath 0x3000000 // 6. PageE(0xE00) #define bSTBCEn 0x4 // Useless #define bAntennaMapping 0x10 #define bNss 0x20 #define bCFOAntSumD 0x200 #define bPHYCounterReset 0x8000000 #define bCFOReportGet 0x4000000 #define bOFDMContinueTx 0x10000000 #define bOFDMSingleCarrier 0x20000000 #define bOFDMSingleTone 0x40000000 // // Other Definition // #define bEnable 0x1 // Useless #define bDisable 0x0 //byte endable for srwrite #define bByte0 0x1 // Useless #define bByte1 0x2 #define bByte2 0x4 #define bByte3 0x8 #define bWord0 0x3 #define bWord1 0xc #define bDWord 0xf //for PutRegsetting & GetRegSetting BitMask #define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f #define bMaskByte1 0xff00 #define bMaskByte2 0xff0000 #define bMaskByte3 0xff000000 #define bMaskHWord 0xffff0000 #define bMaskLWord 0x0000ffff #define bMaskDWord 0xffffffff #define bMaskH3Bytes 0xffffff00 #define bMask12Bits 0xfff #define bMaskH4Bits 0xf0000000 #define bMaskOFDM_D 0xffc00000 #define bMaskCCK 0x3f3f3f3f /*--------------------------Define Parameters-------------------------------*/ #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/Hal8812PwrSeq.h000066400000000000000000000433301261122257400214670ustar00rootroot00000000000000 /****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HAL8812PWRSEQ_H__ #define __HAL8812PWRSEQ_H__ #include "HalPwrSeqCmd.h" /* Check document WB-110628-DZ-RTL8195 (Jaguar) Power Architecture-R04.pdf There are 6 HW Power States: 0: POFF--Power Off 1: PDN--Power Down 2: CARDEMU--Card Emulation 3: ACT--Active Mode 4: LPS--Low Power State 5: SUS--Suspend The transision from different states are defined below TRANS_CARDEMU_TO_ACT TRANS_ACT_TO_CARDEMU TRANS_CARDEMU_TO_SUS TRANS_SUS_TO_CARDEMU TRANS_CARDEMU_TO_PDN TRANS_ACT_TO_LPS TRANS_LPS_TO_ACT TRANS_END */ #define RTL8812_TRANS_CARDEMU_TO_ACT_STEPS 15 #define RTL8812_TRANS_ACT_TO_CARDEMU_STEPS 15 #define RTL8812_TRANS_CARDEMU_TO_SUS_STEPS 15 #define RTL8812_TRANS_SUS_TO_CARDEMU_STEPS 15 #define RTL8812_TRANS_CARDEMU_TO_PDN_STEPS 15 #define RTL8812_TRANS_PDN_TO_CARDEMU_STEPS 15 #define RTL8812_TRANS_ACT_TO_LPS_STEPS 15 #define RTL8812_TRANS_LPS_TO_ACT_STEPS 15 #define RTL8812_TRANS_END_STEPS 1 #define RTL8812_TRANS_CARDEMU_TO_ACT \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ /*{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0}, disable HWPDN 0x04[15]=0*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0},/* disable WL suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ #define RTL8812_TRANS_ACT_TO_CARDEMU \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ /*{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},//0x1F[7:0] = 0 turn off RF*/ \ /*{0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},//0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */ \ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x2A}, /* 0x07[7:0] = 0x28 sps pwm mode 0x2a for BT coex*/ \ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk =500k */ \ /*{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0|BIT1, 0}, // 0x02[1:0] = 0 reset BB */ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ #define RTL8812_TRANS_CARDEMU_TO_SUS \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xcc},\ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xEC},\ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},/* gpio11 input mode, gpio10~8 output mode */ \ {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* suspend option all off */ \ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, BIT7},/*0x14[7] = 1 turn on ZCD */ \ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, BIT0},/* 0x15[0] =1 trun on ZCD */ \ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk =500k */ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 2b'11 enable WL suspend for PCIe*/ #define RTL8812_TRANS_SUS_TO_CARDEMU \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 2b'01enable WL suspend*/ \ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, 0},/*0x23[4] = 0 hpon LDO sleep mode leave */ \ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/* 0x15[0] =0 trun off ZCD */ \ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, 0},/*0x14[7] = 0 turn off ZCD */ \ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio11 input mode, gpio10~8 input mode */ #define RTL8812_TRANS_CARDEMU_TO_CARDDIS \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ /**{0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, //0x194[0]=0 , disable 32K clock*/ \ /**{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x94}, //0x93=0x94 , 90[30] =0 enable 500k ANA clock .switch clock from 12M to 500K , 90 [26] =0 disable EEprom loader clock*/ \ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*0x03[2] = 0, reset 8051*/ \ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x05}, /*0x80=05h if reload fw, fill the default value of host_CPU handshake field*/ \ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xcc},\ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xF0, 0xEC},\ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},/* gpio11 input mode, gpio10~8 output mode */ \ {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, BIT7},/*0x14[7] = 1 turn on ZCD */ \ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, BIT0},/* 0x15[0] =1 trun on ZCD */ \ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/*0x12[0] = 0 force PFM mode */ \ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk =500k */ \ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /*0x01f[1]=0 , disable RFC_0 control REG_RF_CTRL_8812 */ \ {0x0076, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /*0x076[1]=0 , disable RFC_1 control REG_OPT_CTRL_8812 +2 */ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 2b'01 enable WL suspend*/ #define RTL8812_TRANS_CARDDIS_TO_CARDEMU \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*0x12[0] = 1 force PWM mode */ \ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x80, 0},/*0x14[7] = 0 turn off ZCD */ \ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x01, 0},/* 0x15[0] =0 trun off ZCD */ \ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x10, 0},/*0x23[4] = 0 hpon LDO leave sleep mode */ \ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/* gpio11 input mode, gpio10~8 input mode */ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, 0}, /*0x04[10] = 0, enable SW LPS PCIE only*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 2b'01enable WL suspend*/ \ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x03[2] = 1, enable 8051*/ \ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ #define RTL8812_TRANS_CARDEMU_TO_PDN \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ #define RTL8812_TRANS_PDN_TO_CARDEMU \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ #define RTL8812_TRANS_ACT_TO_LPS \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated,and RF closed*/ \ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ #define RTL8812_TRANS_LPS_TO_ACT \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/ \ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/ \ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/ \ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/ \ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/ \ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/ \ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/ \ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/ \ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/ \ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/ \ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ #define RTL8812_TRANS_END \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // extern WLAN_PWR_CFG rtl8812_power_on_flow[RTL8812_TRANS_CARDEMU_TO_ACT_STEPS+RTL8812_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8812_radio_off_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8812_card_disable_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_PDN_STEPS+RTL8812_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8812_card_enable_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_PDN_STEPS+RTL8812_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8812_suspend_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_SUS_STEPS+RTL8812_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8812_resume_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_SUS_STEPS+RTL8812_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8812_hwpdn_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS+RTL8812_TRANS_CARDEMU_TO_PDN_STEPS+RTL8812_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8812_enter_lps_flow[RTL8812_TRANS_ACT_TO_LPS_STEPS+RTL8812_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8812_leave_lps_flow[RTL8812_TRANS_LPS_TO_ACT_STEPS+RTL8812_TRANS_END_STEPS]; #endif //__HAL8812PWRSEQ_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/Hal8821APwrSeq.h000066400000000000000000000420721261122257400215720ustar00rootroot00000000000000/* Similar file also available at upstream linux under at driver/staging/rtl8723au/include/Hal8723PwrSeq.h */ #ifndef REALTEK_POWER_SEQUENCE_8821 #define REALTEK_POWER_SEQUENCE_8821 #include "HalPwrSeqCmd.h" /* Check document WM-20130516-JackieLau-RTL8821A_Power_Architecture-R10.vsd There are 6 HW Power States: 0: POFF--Power Off 1: PDN--Power Down 2: CARDEMU--Card Emulation 3: ACT--Active Mode 4: LPS--Low Power State 5: SUS--Suspend The transision from different states are defined below TRANS_CARDEMU_TO_ACT TRANS_ACT_TO_CARDEMU TRANS_CARDEMU_TO_SUS TRANS_SUS_TO_CARDEMU TRANS_CARDEMU_TO_PDN TRANS_ACT_TO_LPS TRANS_LPS_TO_ACT TRANS_END */ #define RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS 25 #define RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS 15 #define RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS 15 #define RTL8821A_TRANS_SUS_TO_CARDEMU_STEPS 15 #define RTL8821A_TRANS_CARDDIS_TO_CARDEMU_STEPS 15 #define RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS 15 #define RTL8821A_TRANS_PDN_TO_CARDEMU_STEPS 15 #define RTL8821A_TRANS_ACT_TO_LPS_STEPS 15 #define RTL8821A_TRANS_LPS_TO_ACT_STEPS 15 #define RTL8821A_TRANS_END_STEPS 1 #define RTL8821A_TRANS_CARDEMU_TO_ACT \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[12:11]=0*/ \ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ {0x004F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*0x4C[24] = 0x4F[0] = 1, switch DPDT_SEL_P output from WL BB */\ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT5|BIT4), (BIT5|BIT4)},/*0x66[13] = 0x67[5] = 1, switch for PAPE_G/PAPE_A from WL BB ; 0x66[12] = 0x67[4] = 1, switch LNAON from WL BB */\ {0x0025, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, 0},/*anapar_mac<118> , 0x25[6]=0 by wlan single function*/\ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\ {0x007A, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x3A},/*0x7A = 0x3A start BT*/\ {0x002E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF , 0x82 },/* 0x2C[23:12]=0x820 ; XTAL trim */ \ {0x0010, PWR_CUT_A_MSK , PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6 , BIT6 },/* 0x10[6]=1 ; MP·s¼W¹ï©ó0x2Cªº±±¨îÅv¡A¶·§â0x10[6]³]¬°1¤~¯àÅýWLAN±±¨î */ \ #define RTL8821A_TRANS_ACT_TO_CARDEMU \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ {0x004F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*0x4C[24] = 0x4F[0] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/ \ #define RTL8821A_TRANS_CARDEMU_TO_SUS \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ #define RTL8821A_TRANS_SUS_TO_CARDEMU \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ #define RTL8821A_TRANS_CARDEMU_TO_CARDDIS \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ #define RTL8821A_TRANS_CARDDIS_TO_CARDEMU \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ #define RTL8821A_TRANS_CARDEMU_TO_PDN \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ #define RTL8821A_TRANS_PDN_TO_CARDEMU \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ #define RTL8821A_TRANS_ACT_TO_LPS \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ #define RTL8821A_TRANS_LPS_TO_ACT \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ #define RTL8821A_TRANS_END \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // extern WLAN_PWR_CFG rtl8821A_power_on_flow[RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8821A_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8821A_radio_off_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8821A_card_disable_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8821A_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8821A_card_enable_flow[RTL8821A_TRANS_CARDDIS_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8821A_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8821A_suspend_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8821A_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8821A_resume_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8821A_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8821A_hwpdn_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8821A_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8821A_enter_lps_flow[RTL8821A_TRANS_ACT_TO_LPS_STEPS+RTL8821A_TRANS_END_STEPS]; extern WLAN_PWR_CFG rtl8821A_leave_lps_flow[RTL8821A_TRANS_LPS_TO_ACT_STEPS+RTL8821A_TRANS_END_STEPS]; #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/HalPwrSeqCmd.h000066400000000000000000000106711261122257400215720ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HALPWRSEQCMD_H__ #define __HALPWRSEQCMD_H__ #include /*---------------------------------------------*/ //3 The value of cmd: 4 bits /*---------------------------------------------*/ #define PWR_CMD_READ 0x00 // offset: the read register offset // msk: the mask of the read value // value: N/A, left by 0 // note: dirver shall implement this function by read & msk #define PWR_CMD_WRITE 0x01 // offset: the read register offset // msk: the mask of the write bits // value: write value // note: driver shall implement this cmd by read & msk after write #define PWR_CMD_POLLING 0x02 // offset: the read register offset // msk: the mask of the polled value // value: the value to be polled, masked by the msd field. // note: driver shall implement this cmd by // do{ // if( (Read(offset) & msk) == (value & msk) ) // break; // } while(not timeout); #define PWR_CMD_DELAY 0x03 // offset: the value to delay // msk: N/A // value: the unit of delay, 0: us, 1: ms #define PWR_CMD_END 0x04 // offset: N/A // msk: N/A // value: N/A /*---------------------------------------------*/ //3 The value of base: 4 bits /*---------------------------------------------*/ // define the base address of each block #define PWR_BASEADDR_MAC 0x00 #define PWR_BASEADDR_USB 0x01 #define PWR_BASEADDR_PCIE 0x02 #define PWR_BASEADDR_SDIO 0x03 /*---------------------------------------------*/ //3 The value of interface_msk: 4 bits /*---------------------------------------------*/ #define PWR_INTF_SDIO_MSK BIT(0) #define PWR_INTF_USB_MSK BIT(1) #define PWR_INTF_PCI_MSK BIT(2) #define PWR_INTF_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3)) /*---------------------------------------------*/ //3 The value of fab_msk: 4 bits /*---------------------------------------------*/ #define PWR_FAB_TSMC_MSK BIT(0) #define PWR_FAB_UMC_MSK BIT(1) #define PWR_FAB_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3)) /*---------------------------------------------*/ //3 The value of cut_msk: 8 bits /*---------------------------------------------*/ #define PWR_CUT_TESTCHIP_MSK BIT(0) #define PWR_CUT_A_MSK BIT(1) #define PWR_CUT_B_MSK BIT(2) #define PWR_CUT_C_MSK BIT(3) #define PWR_CUT_D_MSK BIT(4) #define PWR_CUT_E_MSK BIT(5) #define PWR_CUT_F_MSK BIT(6) #define PWR_CUT_G_MSK BIT(7) #define PWR_CUT_ALL_MSK 0xFF typedef enum _PWRSEQ_CMD_DELAY_UNIT_ { PWRSEQ_DELAY_US, PWRSEQ_DELAY_MS, } PWRSEQ_DELAY_UNIT; typedef struct _WL_PWR_CFG_ { u16 offset; u8 cut_msk; u8 fab_msk:4; u8 interface_msk:4; u8 base:4; u8 cmd:4; u8 msk; u8 value; } WLAN_PWR_CFG, *PWLAN_PWR_CFG; #define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset #define GET_PWR_CFG_CUT_MASK(__PWR_CMD) __PWR_CMD.cut_msk #define GET_PWR_CFG_FAB_MASK(__PWR_CMD) __PWR_CMD.fab_msk #define GET_PWR_CFG_INTF_MASK(__PWR_CMD) __PWR_CMD.interface_msk #define GET_PWR_CFG_BASE(__PWR_CMD) __PWR_CMD.base #define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd #define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk #define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value //================================================================================ // Prototype of protected function. //================================================================================ u8 HalPwrSeqCmdParsing( PADAPTER padapter, u8 CutVersion, u8 FabVersion, u8 InterfaceType, WLAN_PWR_CFG PwrCfgCmd[]); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/HalVerDef.h000066400000000000000000000207361261122257400211030ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HAL_VERSION_DEF_H__ #define __HAL_VERSION_DEF_H__ #define TRUE _TRUE #define FALSE _FALSE // HAL_IC_TYPE_E typedef enum tag_HAL_IC_Type_Definition { CHIP_8192S = 0, CHIP_8188C = 1, CHIP_8192C = 2, CHIP_8192D = 3, CHIP_8723A = 4, CHIP_8188E = 5, CHIP_8812 = 6, CHIP_8821 = 7, CHIP_8723B = 8, CHIP_8192E = 9, }HAL_IC_TYPE_E; //HAL_CHIP_TYPE_E typedef enum tag_HAL_CHIP_Type_Definition { TEST_CHIP = 0, NORMAL_CHIP = 1, FPGA = 2, }HAL_CHIP_TYPE_E; //HAL_CUT_VERSION_E typedef enum tag_HAL_Cut_Version_Definition { A_CUT_VERSION = 0, B_CUT_VERSION = 1, C_CUT_VERSION = 2, D_CUT_VERSION = 3, E_CUT_VERSION = 4, F_CUT_VERSION = 5, G_CUT_VERSION = 6, H_CUT_VERSION = 7, I_CUT_VERSION = 8, J_CUT_VERSION = 9, K_CUT_VERSION = 10, }HAL_CUT_VERSION_E; // HAL_Manufacturer typedef enum tag_HAL_Manufacturer_Version_Definition { CHIP_VENDOR_TSMC = 0, CHIP_VENDOR_UMC = 1, CHIP_VENDOR_SMIC = 2, }HAL_VENDOR_E; typedef enum tag_HAL_RF_Type_Definition { RF_TYPE_1T1R = 0, RF_TYPE_1T2R = 1, RF_TYPE_2T2R = 2, RF_TYPE_2T3R = 3, RF_TYPE_2T4R = 4, RF_TYPE_3T3R = 5, RF_TYPE_3T4R = 6, RF_TYPE_4T4R = 7, }HAL_RF_TYPE_E; typedef struct tag_HAL_VERSION { HAL_IC_TYPE_E ICType; HAL_CHIP_TYPE_E ChipType; HAL_CUT_VERSION_E CUTVersion; HAL_VENDOR_E VendorType; HAL_RF_TYPE_E RFType; u8 ROMVer; }HAL_VERSION,*PHAL_VERSION; //VERSION_8192C VersionID; //HAL_VERSION VersionID; // Get element #define GET_CVID_IC_TYPE(version) ((HAL_IC_TYPE_E)(((HAL_VERSION)version).ICType) ) #define GET_CVID_CHIP_TYPE(version) ((HAL_CHIP_TYPE_E)(((HAL_VERSION)version).ChipType) ) #define GET_CVID_RF_TYPE(version) ((HAL_RF_TYPE_E)(((HAL_VERSION)version).RFType)) #define GET_CVID_MANUFACTUER(version) ((HAL_VENDOR_E)(((HAL_VERSION)version).VendorType)) #define GET_CVID_CUT_VERSION(version) ((HAL_CUT_VERSION_E)(((HAL_VERSION)version).CUTVersion)) #define GET_CVID_ROM_VERSION(version) ((((HAL_VERSION)version).ROMVer) & ROM_VERSION_MASK) //---------------------------------------------------------------------------- //Common Macro. -- //---------------------------------------------------------------------------- //HAL_VERSION VersionID // HAL_IC_TYPE_E #define IS_81XXC(version) (((GET_CVID_IC_TYPE(version) == CHIP_8192C)||(GET_CVID_IC_TYPE(version) == CHIP_8188C))? TRUE : FALSE) #define IS_8723_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723A)? TRUE : FALSE) #define IS_92D(version) ((GET_CVID_IC_TYPE(version) == CHIP_8192D)? TRUE : FALSE) #define IS_8188E(version) ((GET_CVID_IC_TYPE(version) == CHIP_8188E)? TRUE : FALSE) #define IS_8192E(version) ((GET_CVID_IC_TYPE(version) == CHIP_8192E)? TRUE : FALSE) #define IS_8812_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8812)? TRUE : FALSE) #define IS_8821_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8821)? TRUE : FALSE) #define IS_8723B_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723B)? TRUE : FALSE) //HAL_CHIP_TYPE_E #define IS_TEST_CHIP(version) ((GET_CVID_CHIP_TYPE(version)==TEST_CHIP)? TRUE: FALSE) #define IS_NORMAL_CHIP(version) ((GET_CVID_CHIP_TYPE(version)==NORMAL_CHIP)? TRUE: FALSE) //HAL_CUT_VERSION_E #define IS_A_CUT(version) ((GET_CVID_CUT_VERSION(version) == A_CUT_VERSION) ? TRUE : FALSE) #define IS_B_CUT(version) ((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? TRUE : FALSE) #define IS_C_CUT(version) ((GET_CVID_CUT_VERSION(version) == C_CUT_VERSION) ? TRUE : FALSE) #define IS_D_CUT(version) ((GET_CVID_CUT_VERSION(version) == D_CUT_VERSION) ? TRUE : FALSE) #define IS_E_CUT(version) ((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? TRUE : FALSE) #define IS_I_CUT(version) ((GET_CVID_CUT_VERSION(version) == I_CUT_VERSION) ? TRUE : FALSE) #define IS_J_CUT(version) ((GET_CVID_CUT_VERSION(version) == J_CUT_VERSION) ? TRUE : FALSE) #define IS_K_CUT(version) ((GET_CVID_CUT_VERSION(version) == K_CUT_VERSION) ? TRUE : FALSE) //HAL_VENDOR_E #define IS_CHIP_VENDOR_TSMC(version) ((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_TSMC)? TRUE: FALSE) #define IS_CHIP_VENDOR_UMC(version) ((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_UMC)? TRUE: FALSE) #define IS_CHIP_VENDOR_SMIC(version) ((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_SMIC)? TRUE: FALSE) //HAL_RF_TYPE_E #define IS_1T1R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T1R)? TRUE : FALSE ) #define IS_1T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R)? TRUE : FALSE) #define IS_2T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R)? TRUE : FALSE) //---------------------------------------------------------------------------- //Chip version Macro. -- //---------------------------------------------------------------------------- #define IS_81XXC_TEST_CHIP(version) ((IS_81XXC(version) && (!IS_NORMAL_CHIP(version)))? TRUE: FALSE) #define IS_92C_SERIAL(version) ((IS_81XXC(version) && IS_2T2R(version)) ? TRUE : FALSE) #define IS_81xxC_VENDOR_UMC_A_CUT(version) (IS_81XXC(version)?(IS_CHIP_VENDOR_UMC(version) ? (IS_A_CUT(version) ? TRUE : FALSE) : FALSE): FALSE) #define IS_81xxC_VENDOR_UMC_B_CUT(version) (IS_81XXC(version)?(IS_CHIP_VENDOR_UMC(version) ? (IS_B_CUT(version) ? TRUE : FALSE) : FALSE): FALSE) #define IS_81xxC_VENDOR_UMC_C_CUT(version) (IS_81XXC(version)?(IS_CHIP_VENDOR_UMC(version) ? (IS_C_CUT(version) ? TRUE : FALSE) : FALSE): FALSE) #define IS_NORMAL_CHIP92D(version) (( IS_92D(version))?((GET_CVID_CHIP_TYPE(version)==NORMAL_CHIP)? TRUE: FALSE):FALSE) #define IS_92D_SINGLEPHY(version) ((IS_92D(version)) ? (IS_2T2R(version) ? TRUE: FALSE) : FALSE) #define IS_92D_C_CUT(version) ((IS_92D(version)) ? (IS_C_CUT(version) ? TRUE : FALSE) : FALSE) #define IS_92D_D_CUT(version) ((IS_92D(version)) ? (IS_D_CUT(version) ? TRUE : FALSE) : FALSE) #define IS_92D_E_CUT(version) ((IS_92D(version)) ? (IS_E_CUT(version) ? TRUE : FALSE) : FALSE) #define IS_8723A_A_CUT(version) ((IS_8723_SERIES(version)) ? ( IS_A_CUT(version)?TRUE : FALSE) : FALSE) #define IS_8723A_B_CUT(version) ((IS_8723_SERIES(version)) ? ( IS_B_CUT(version)?TRUE : FALSE) : FALSE) #define IS_VENDOR_8188E_I_CUT_SERIES(_Adapter) ((IS_8188E(GET_HAL_DATA(_Adapter)->VersionID)) ? ((GET_CVID_CUT_VERSION(GET_HAL_DATA(_Adapter)->VersionID) >= I_CUT_VERSION) ? TRUE : FALSE) : FALSE) #define IS_VENDOR_8812A_TEST_CHIP(_Adapter) ((IS_8812_SERIES(GET_HAL_DATA(_Adapter)->VersionID)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->VersionID)) ? FALSE : TRUE) : FALSE) #define IS_VENDOR_8812A_MP_CHIP(_Adapter) ((IS_8812_SERIES(GET_HAL_DATA(_Adapter)->VersionID)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->VersionID)) ? TRUE : FALSE) : FALSE) #define IS_VENDOR_8812A_C_CUT(_Adapter) ((IS_8812_SERIES(GET_HAL_DATA(_Adapter)->VersionID)) ? ((GET_CVID_CUT_VERSION(GET_HAL_DATA(_Adapter)->VersionID) == C_CUT_VERSION) ? TRUE : FALSE) : FALSE) #define IS_VENDOR_8821A_TEST_CHIP(_Adapter) ((IS_8821_SERIES(GET_HAL_DATA(_Adapter)->VersionID)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->VersionID)) ? FALSE : TRUE) : FALSE) #define IS_VENDOR_8821A_MP_CHIP(_Adapter) ((IS_8821_SERIES(GET_HAL_DATA(_Adapter)->VersionID)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->VersionID)) ? TRUE : FALSE) : FALSE) #define IS_VENDOR_8192E_B_CUT(_Adapter) ((GET_CVID_CUT_VERSION(GET_HAL_DATA(_Adapter)->VersionID) == B_CUT_VERSION) ? TRUE : FALSE) #define IS_VENDOR_8723B_TEST_CHIP(_Adapter) ((IS_8723B_SERIES(GET_HAL_DATA(_Adapter)->VersionID)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->VersionID)) ? FALSE : TRUE) : FALSE) #define IS_VENDOR_8723B_MP_CHIP(_Adapter) ((IS_8723B_SERIES(GET_HAL_DATA(_Adapter)->VersionID)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->VersionID)) ? TRUE : FALSE) : FALSE) #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/autoconf.h000077500000000000000000000236571261122257400211310ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ //***** temporarily flag ******* #define CONFIG_SINGLE_IMG //#define CONFIG_DISABLE_ODM //***** temporarily flag ******* /* * Public General Config */ #define AUTOCONF_INCLUDED #define RTL871X_MODULE_NAME "8812AU" #define DRV_NAME "rtl8812au" #define CONFIG_USB_HCI 1 #define PLATFORM_LINUX 1 //#define CONFIG_IOCTL_CFG80211 1 #ifdef CONFIG_IOCTL_CFG80211 //#define RTW_USE_CFG80211_STA_EVENT /* Indecate new sta asoc through cfg80211_new_sta */ #define CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER //#define CONFIG_DEBUG_CFG80211 //#define CONFIG_DRV_ISSUE_PROV_REQ // IOT FOR S2 #define CONFIG_SET_SCAN_DENY_TIMER #endif /* * Internal General Config */ //#define CONFIG_H2CLBK #define CONFIG_EMBEDDED_FWIMG 1 //#define CONFIG_FILE_FWIMG #define CONFIG_XMIT_ACK #ifdef CONFIG_XMIT_ACK #define CONFIG_ACTIVE_KEEP_ALIVE_CHECK #endif #define CONFIG_80211N_HT 1 #ifdef CONFIG_80211N_HT #define CONFIG_80211AC_VHT 1 #define CONFIG_BEAMFORMING #endif #define CONFIG_RECV_REORDERING_CTRL 1 //#define CONFIG_TCP_CSUM_OFFLOAD_RX 1 //#define CONFIG_DRVEXT_MODULE 1 #define CONFIG_DFS 1 //#define CONFIG_SUPPORT_USB_INT #ifdef CONFIG_SUPPORT_USB_INT //#define CONFIG_USB_INTERRUPT_IN_PIPE 1 #endif //#ifndef CONFIG_MP_INCLUDED #define CONFIG_IPS 1 #ifdef CONFIG_IPS //#define CONFIG_IPS_LEVEL_2 1 //enable this to set default IPS mode to IPS_LEVEL_2 #define CONFIG_IPS_CHECK_IN_WD // Do IPS Check in WatchDog. #endif //#define SUPPORT_HW_RFOFF_DETECTED 1 #define CONFIG_LPS 1 #if defined(CONFIG_LPS) && defined(CONFIG_SUPPORT_USB_INT) //#define CONFIG_LPS_LCLK 1 #endif #ifdef CONFIG_LPS_LCLK #define CONFIG_XMIT_THREAD_MODE #endif //befor link //#define CONFIG_ANTENNA_DIVERSITY //after link #ifdef CONFIG_ANTENNA_DIVERSITY #define CONFIG_HW_ANTENNA_DIVERSITY #endif //#define CONFIG_CONCURRENT_MODE 1 #ifdef CONFIG_CONCURRENT_MODE //#define CONFIG_HWPORT_SWAP //Port0->Sec , Port1 -> Pri #define CONFIG_RUNTIME_PORT_SWITCH //#define DBG_RUNTIME_PORT_SWITCH #define CONFIG_STA_MODE_SCAN_UNDER_AP_MODE //#ifdef CONFIG_RTL8812A // #define CONFIG_TSF_RESET_OFFLOAD 1 // For 2 PORT TSF SYNC. //#endif #endif //#define CONFIG_IOL //#else //#ifndef CONFIG_MP_INCLUDED //#endif //#ifndef CONFIG_MP_INCLUDED #define CONFIG_AP_MODE 1 #ifdef CONFIG_AP_MODE //#define CONFIG_INTERRUPT_BASED_TXBCN // Tx Beacon when driver BCN_OK ,BCN_ERR interrupt occurs #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_INTERRUPT_BASED_TXBCN) #undef CONFIG_INTERRUPT_BASED_TXBCN #endif #ifdef CONFIG_INTERRUPT_BASED_TXBCN //#define CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT #define CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR #endif #define CONFIG_NATIVEAP_MLME #ifndef CONFIG_NATIVEAP_MLME #define CONFIG_HOSTAPD_MLME 1 #endif #define CONFIG_FIND_BEST_CHANNEL 1 //#define CONFIG_NO_WIRELESS_HANDLERS 1 #endif #define CONFIG_P2P 1 #ifdef CONFIG_P2P //The CONFIG_WFD is for supporting the Wi-Fi display #define CONFIG_WFD #ifndef CONFIG_WIFI_TEST #define CONFIG_P2P_REMOVE_GROUP_INFO #endif //#define CONFIG_DBG_P2P #define CONFIG_P2P_PS //#define CONFIG_P2P_IPS #define CONFIG_P2P_OP_CHK_SOCIAL_CH #define CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT //replace CONFIG_P2P_CHK_INVITE_CH_LIST flag #define CONFIG_P2P_INVITE_IOT #endif // Added by Kurt 20110511 //#define CONFIG_TDLS 1 #ifdef CONFIG_TDLS // #ifndef CONFIG_WFD // #define CONFIG_WFD 1 // #endif // #define CONFIG_TDLS_AUTOSETUP 1 // #define CONFIG_TDLS_AUTOCHECKALIVE 1 #endif #define CONFIG_SKB_COPY 1//for amsdu #define CONFIG_LED #ifdef CONFIG_LED #define CONFIG_SW_LED #ifdef CONFIG_SW_LED //#define CONFIG_LED_HANDLED_BY_CMD_THREAD #endif #endif // CONFIG_LED #ifdef CONFIG_IOL #define CONFIG_IOL_READ_EFUSE_MAP //#define DBG_IOL_READ_EFUSE_MAP #define CONFIG_IOL_LLT #endif #define USB_INTERFERENCE_ISSUE // this should be checked in all usb interface #define CONFIG_GLOBAL_UI_PID #define CONFIG_LAYER2_ROAMING #define CONFIG_LAYER2_ROAMING_RESUME //#define CONFIG_ADAPTOR_INFO_CACHING_FILE // now just applied on 8192cu only, should make it general... //#define CONFIG_RESUME_IN_WORKQUEUE //#define CONFIG_SET_SCAN_DENY_TIMER #define CONFIG_LONG_DELAY_ISSUE #define CONFIG_NEW_SIGNAL_STAT_PROCESS //#define CONFIG_SIGNAL_DISPLAY_DBM //display RX signal with dbm #ifdef CONFIG_SIGNAL_DISPLAY_DBM //#define CONFIG_BACKGROUND_NOISE_MONITOR #endif #define RTW_NOTCH_FILTER 0 /* 0:Disable, 1:Enable, */ #define CONFIG_DEAUTH_BEFORE_CONNECT #define CONFIG_TX_MCAST2UNI 1 // Support IP multicast->unicast //#define CONFIG_CHECK_AC_LIFETIME 1 // Check packet lifetime of 4 ACs. /* * Interface Related Config */ #ifndef CONFIG_MINIMAL_MEMORY_USAGE #define CONFIG_USB_TX_AGGREGATION 1 #define CONFIG_USB_RX_AGGREGATION 1 #endif #define CONFIG_PREALLOC_RECV_SKB 1 //#define CONFIG_REDUCE_USB_TX_INT 1 // Trade-off: Improve performance, but may cause TX URBs blocked by USB Host/Bus driver on few platforms. //#define CONFIG_EASY_REPLACEMENT 1 /* * CONFIG_USE_USB_BUFFER_ALLOC_XX uses Linux USB Buffer alloc API and is for Linux platform only now! */ //#define CONFIG_USE_USB_BUFFER_ALLOC_TX 1 // Trade-off: For TX path, improve stability on some platforms, but may cause performance degrade on other platforms. //#define CONFIG_USE_USB_BUFFER_ALLOC_RX 1 // For RX path #ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX #undef CONFIG_PREALLOC_RECV_SKB #else #ifdef CONFIG_PREALLOC_RECV_SKB // #define CONFIG_FIX_NR_BULKIN_BUFFER // only use USB prealloc_recv_buffer, no use alloc_skb() #endif #endif #ifdef CONFIG_WOWLAN // 1 spatial stream for lower power mode when entering suspend //#define CONFIG_LOWPR_1SS #endif /* * USB VENDOR REQ BUFFER ALLOCATION METHOD * if not set we'll use function local variable (stack memory) */ //#define CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE #define CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC #define CONFIG_USB_VENDOR_REQ_MUTEX #define CONFIG_VENDOR_REQ_RETRY //#define CONFIG_USB_SUPPORT_ASYNC_VDN_REQ 1 #define WAKEUP_GPIO_IDX 1 //WIFI Chip Side /* * HAL Related Config */ #define RTL8812A_RX_PACKET_INCLUDE_CRC 0 #define CONFIG_RX_PACKET_APPEND_FCS //#define CONFIG_ONLY_ONE_OUT_EP_TO_LOW 0 #define CONFIG_OUT_EP_WIFI_MODE 0 #define ENABLE_USB_DROP_INCORRECT_OUT #define RTL8192CU_ADHOC_WORKAROUND_SETTING 1 #define ENABLE_NEW_RFE_TYPE 0 #define DISABLE_BB_RF 0 #ifdef CONFIG_MP_INCLUDED #define MP_DRIVER 1 #define CONFIG_MP_IWPRIV_SUPPORT 1 //#undef CONFIG_USB_TX_AGGREGATION //#undef CONFIG_USB_RX_AGGREGATION #else #define MP_DRIVER 0 #endif /* * Platform Related Config */ #ifdef CONFIG_PLATFORM_MN10300 #define CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV #define CONFIG_USE_USB_BUFFER_ALLOC_RX #if defined (CONFIG_SW_ANTENNA_DIVERSITY) #undef CONFIG_SW_ANTENNA_DIVERSITY #define CONFIG_HW_ANTENNA_DIVERSITY #endif #if defined (CONFIG_POWER_SAVING) #undef CONFIG_POWER_SAVING #endif #endif//CONFIG_PLATFORM_MN10300 #if defined(CONFIG_PLATFORM_ACTIONS_ATM702X) #ifdef CONFIG_USB_TX_AGGREGATION #undef CONFIG_USB_TX_AGGREGATION #endif #ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX #define CONFIG_USE_USB_BUFFER_ALLOC_TX #endif #ifndef CONFIG_USE_USB_BUFFER_ALLOC_RX #define CONFIG_USE_USB_BUFFER_ALLOC_RX #endif #endif /* * Outsource Related Config */ #define TESTCHIP_SUPPORT 0 #define RTL8192CE_SUPPORT 0 #define RTL8192CU_SUPPORT 0 #define RTL8192C_SUPPORT (RTL8192CE_SUPPORT|RTL8192CU_SUPPORT) #define RTL8192DE_SUPPORT 0 #define RTL8192DU_SUPPORT 0 #define RTL8192D_SUPPORT (RTL8192DE_SUPPORT|RTL8192DU_SUPPORT) #define RTL8723AU_SUPPORT 0 #define RTL8723AS_SUPPORT 0 #define RTL8723AE_SUPPORT 0 #define RTL8723A_SUPPORT (RTL8723AU_SUPPORT|RTL8723AS_SUPPORT|RTL8723AE_SUPPORT) #define RTL8723_FPGA_VERIFICATION 0 #define RTL8188E_SUPPORT 0 #ifdef CONFIG_RTL8812A #define RTL8812A_SUPPORT 1 #else #define RTL8812A_SUPPORT 0 #endif #ifdef CONFIG_RTL8821A #define RTL8821A_SUPPORT 1 #else #define RTL8821A_SUPPORT 0 #endif #define RTL8723B_SUPPORT 0 #define RTL8192E_SUPPORT 0 #define RTL8814A_SUPPORT 0 #define RTL8195A_SUPPORT 0 #define RATE_ADAPTIVE_SUPPORT 0 #define POWER_TRAINING_ACTIVE 0 #ifdef CONFIG_USB_TX_AGGREGATION //#define CONFIG_TX_EARLY_MODE #endif #define RTL8188E_EARLY_MODE_PKT_NUM_10 0 #define CONFIG_80211D #define CONFIG_ATTEMPT_TO_FIX_AP_BEACON_ERROR /* * Debug Related Config */ #define DBG 1 #define CONFIG_DEBUG /* DBG_871X, etc... */ //#define CONFIG_DEBUG_RTL871X /* RT_TRACE, RT_PRINT_DATA, _func_enter_, _func_exit_ */ #define CONFIG_PROC_DEBUG #define DBG_CONFIG_ERROR_DETECT //#define DBG_CONFIG_ERROR_DETECT_INT //#define DBG_CONFIG_ERROR_RESET //#define DBG_IO //#define DBG_DELAY_OS //#define DBG_MEM_ALLOC //#define DBG_IOCTL //#define DBG_TX //#define DBG_XMIT_BUF //#define DBG_XMIT_BUF_EXT //#define DBG_TX_DROP_FRAME //#define DBG_RX_DROP_FRAME //#define DBG_RX_SEQ //#define DBG_RX_SIGNAL_DISPLAY_PROCESSING //#define DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED "jeff-ap" //#define DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE //#define DBG_ROAMING_TEST //#define DBG_HAL_INIT_PROFILING //#define DBG_MEMORY_LEAK 1 rtl8812au-4.3.8.12175.20140902+dfsg/include/basic_types.h000066400000000000000000000210261261122257400216010ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __BASIC_TYPES_H__ #define __BASIC_TYPES_H__ #define SUCCESS 0 #define FAIL (-1) #ifndef TRUE #define _TRUE 1 #else #define _TRUE TRUE #endif #ifndef FALSE #define _FALSE 0 #else #define _FALSE FALSE #endif #ifdef PLATFORM_WINDOWS typedef signed char s8; typedef unsigned char u8; typedef signed short s16; typedef unsigned short u16; typedef signed long s32; typedef unsigned long u32; typedef unsigned int uint; typedef signed int sint; typedef signed long long s64; typedef unsigned long long u64; #ifdef NDIS50_MINIPORT #define NDIS_MAJOR_VERSION 5 #define NDIS_MINOR_VERSION 0 #endif #ifdef NDIS51_MINIPORT #define NDIS_MAJOR_VERSION 5 #define NDIS_MINOR_VERSION 1 #endif typedef NDIS_PROC proc_t; typedef LONG atomic_t; #endif #ifdef PLATFORM_LINUX #include #define IN #define OUT #define VOID void #define NDIS_OID uint #define NDIS_STATUS uint typedef signed int sint; #ifndef PVOID typedef void * PVOID; //#define PVOID (void *) #endif #define UCHAR u8 #define USHORT u16 #define UINT u32 #define ULONG u32 typedef void (*proc_t)(void*); typedef __kernel_size_t SIZE_T; typedef __kernel_ssize_t SSIZE_T; #define FIELD_OFFSET(s,field) ((SSIZE_T)&((s*)(0))->field) #endif #ifdef PLATFORM_FREEBSD typedef signed char s8; typedef unsigned char u8; typedef signed short s16; typedef unsigned short u16; typedef signed int s32; typedef unsigned int u32; typedef unsigned int uint; typedef signed int sint; typedef long atomic_t; typedef signed long long s64; typedef unsigned long long u64; #define IN #define OUT #define VOID void #define NDIS_OID uint #define NDIS_STATUS uint #ifndef PVOID typedef void * PVOID; //#define PVOID (void *) #endif typedef u32 dma_addr_t; #define UCHAR u8 #define USHORT u16 #define UINT u32 #define ULONG u32 typedef void (*proc_t)(void*); typedef unsigned int __kernel_size_t; typedef int __kernel_ssize_t; typedef __kernel_size_t SIZE_T; typedef __kernel_ssize_t SSIZE_T; #define FIELD_OFFSET(s,field) ((SSIZE_T)&((s*)(0))->field) #endif #define MEM_ALIGNMENT_OFFSET (sizeof (SIZE_T)) #define MEM_ALIGNMENT_PADDING (sizeof(SIZE_T) - 1) #define SIZE_PTR SIZE_T #define SSIZE_PTR SSIZE_T //port from fw by thomas // TODO: Belows are Sync from SD7-Driver. It is necessary to check correctness /* * Call endian free function when * 1. Read/write packet content. * 2. Before write integer to IO. * 3. After read integer from IO. */ // // Byte Swapping routine. // #define EF1Byte (u8) #define EF2Byte le16_to_cpu #define EF4Byte le32_to_cpu // // Read LE format data from memory // #define ReadEF1Byte(_ptr) EF1Byte(*((u8 *)(_ptr))) #define ReadEF2Byte(_ptr) EF2Byte(*((u16 *)(_ptr))) #define ReadEF4Byte(_ptr) EF4Byte(*((u32 *)(_ptr))) // // Write LE data to memory // #define WriteEF1Byte(_ptr, _val) (*((u8 *)(_ptr)))=EF1Byte(_val) #define WriteEF2Byte(_ptr, _val) (*((u16 *)(_ptr)))=EF2Byte(_val) #define WriteEF4Byte(_ptr, _val) (*((u32 *)(_ptr)))=EF4Byte(_val) // // Example: // BIT_LEN_MASK_32(0) => 0x00000000 // BIT_LEN_MASK_32(1) => 0x00000001 // BIT_LEN_MASK_32(2) => 0x00000003 // BIT_LEN_MASK_32(32) => 0xFFFFFFFF // #define BIT_LEN_MASK_32(__BitLen) \ (0xFFFFFFFF >> (32 - (__BitLen))) // // Example: // BIT_OFFSET_LEN_MASK_32(0, 2) => 0x00000003 // BIT_OFFSET_LEN_MASK_32(16, 2) => 0x00030000 // #define BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) \ (BIT_LEN_MASK_32(__BitLen) << (__BitOffset)) // // Description: // Return 4-byte value in host byte ordering from // 4-byte pointer in litten-endian system. // #define LE_P4BYTE_TO_HOST_4BYTE(__pStart) \ (EF4Byte(*((u32 *)(__pStart)))) // // Description: // Translate subfield (continuous bits in little-endian) of 4-byte value in litten byte to // 4-byte value in host byte ordering. // #define LE_BITS_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ ( \ ( LE_P4BYTE_TO_HOST_4BYTE(__pStart) >> (__BitOffset) ) \ & \ BIT_LEN_MASK_32(__BitLen) \ ) // // Description: // Mask subfield (continuous bits in little-endian) of 4-byte value in litten byte oredering // and return the result in 4-byte value in host byte ordering. // #define LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ ( \ LE_P4BYTE_TO_HOST_4BYTE(__pStart) \ & \ ( ~BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) ) \ ) // // Description: // Set subfield of little-endian 4-byte value to specified value. // #define SET_BITS_TO_LE_4BYTE(__pStart, __BitOffset, __BitLen, __Value) \ *((u32 *)(__pStart)) = \ EF4Byte( \ LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ | \ ( (((u32)__Value) & BIT_LEN_MASK_32(__BitLen)) << (__BitOffset) ) \ ); #define BIT_LEN_MASK_16(__BitLen) \ (0xFFFF >> (16 - (__BitLen))) #define BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) \ (BIT_LEN_MASK_16(__BitLen) << (__BitOffset)) #define LE_P2BYTE_TO_HOST_2BYTE(__pStart) \ (EF2Byte(*((u16 *)(__pStart)))) #define LE_BITS_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ ( \ ( LE_P2BYTE_TO_HOST_2BYTE(__pStart) >> (__BitOffset) ) \ & \ BIT_LEN_MASK_16(__BitLen) \ ) #define LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ ( \ LE_P2BYTE_TO_HOST_2BYTE(__pStart) \ & \ ( ~BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) ) \ ) #define SET_BITS_TO_LE_2BYTE(__pStart, __BitOffset, __BitLen, __Value) \ *((u16 *)(__pStart)) = \ EF2Byte( \ LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ | \ ( (((u16)__Value) & BIT_LEN_MASK_16(__BitLen)) << (__BitOffset) ) \ ); #define BIT_LEN_MASK_8(__BitLen) \ (0xFF >> (8 - (__BitLen))) #define BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) \ (BIT_LEN_MASK_8(__BitLen) << (__BitOffset)) #define LE_P1BYTE_TO_HOST_1BYTE(__pStart) \ (EF1Byte(*((u8 *)(__pStart)))) #define LE_BITS_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ ( \ ( LE_P1BYTE_TO_HOST_1BYTE(__pStart) >> (__BitOffset) ) \ & \ BIT_LEN_MASK_8(__BitLen) \ ) #define LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ ( \ LE_P1BYTE_TO_HOST_1BYTE(__pStart) \ & \ ( ~BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) ) \ ) #define SET_BITS_TO_LE_1BYTE(__pStart, __BitOffset, __BitLen, __Value) \ *((u8 *)(__pStart)) = \ EF1Byte( \ LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ | \ ( (((u8)__Value) & BIT_LEN_MASK_8(__BitLen)) << (__BitOffset) ) \ ); #define LE_BITS_CLEARED_TO_2BYTE_16BIT(__pStart, __BitOffset, __BitLen) \ ( \ LE_P2BYTE_TO_HOST_2BYTE(__pStart) \ ) #define SET_BITS_TO_LE_2BYTE_16BIT(__pStart, __BitOffset, __BitLen, __Value) \ *((u16 *)(__pStart)) = \ EF2Byte( \ LE_BITS_CLEARED_TO_2BYTE_16BIT(__pStart, __BitOffset, __BitLen) \ | \ ( (u16)__Value) \ ); #define LE_BITS_CLEARED_TO_1BYTE_8BIT(__pStart, __BitOffset, __BitLen) \ ( \ LE_P1BYTE_TO_HOST_1BYTE(__pStart) \ ) #define SET_BITS_TO_LE_1BYTE_8BIT(__pStart, __BitOffset, __BitLen, __Value) \ { \ *((u8 *)(__pStart)) = \ EF1Byte( \ LE_BITS_CLEARED_TO_1BYTE_8BIT(__pStart, __BitOffset, __BitLen) \ | \ ((u8)__Value) \ ); \ } // Get the N-bytes aligment offset from the current length #define N_BYTE_ALIGMENT(__Value, __Aligment) ((__Aligment == 1) ? (__Value) : (((__Value + __Aligment - 1) / __Aligment) * __Aligment)) typedef unsigned char BOOLEAN,*PBOOLEAN; #define TEST_FLAG(__Flag,__testFlag) (((__Flag) & (__testFlag)) != 0) #define SET_FLAG(__Flag, __setFlag) ((__Flag) |= __setFlag) #define CLEAR_FLAG(__Flag, __clearFlag) ((__Flag) &= ~(__clearFlag)) #define CLEAR_FLAGS(__Flag) ((__Flag) = 0) #define TEST_FLAGS(__Flag, __testFlags) (((__Flag) & (__testFlags)) == (__testFlags)) #endif //__BASIC_TYPES_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/byteorder/000077500000000000000000000000001261122257400211215ustar00rootroot00000000000000rtl8812au-4.3.8.12175.20140902+dfsg/include/byteorder/big_endian.h000066400000000000000000000066331261122257400233610ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _LINUX_BYTEORDER_BIG_ENDIAN_H #define _LINUX_BYTEORDER_BIG_ENDIAN_H #ifndef __BIG_ENDIAN #define __BIG_ENDIAN 4321 #endif #ifndef __BIG_ENDIAN_BITFIELD #define __BIG_ENDIAN_BITFIELD #endif #include #define __constant_htonl(x) ((__u32)(x)) #define __constant_ntohl(x) ((__u32)(x)) #define __constant_htons(x) ((__u16)(x)) #define __constant_ntohs(x) ((__u16)(x)) #define __constant_cpu_to_le64(x) ___constant_swab64((x)) #define __constant_le64_to_cpu(x) ___constant_swab64((x)) #define __constant_cpu_to_le32(x) ___constant_swab32((x)) #define __constant_le32_to_cpu(x) ___constant_swab32((x)) #define __constant_cpu_to_le16(x) ___constant_swab16((x)) #define __constant_le16_to_cpu(x) ___constant_swab16((x)) #define __constant_cpu_to_be64(x) ((__u64)(x)) #define __constant_be64_to_cpu(x) ((__u64)(x)) #define __constant_cpu_to_be32(x) ((__u32)(x)) #define __constant_be32_to_cpu(x) ((__u32)(x)) #define __constant_cpu_to_be16(x) ((__u16)(x)) #define __constant_be16_to_cpu(x) ((__u16)(x)) #define __cpu_to_le64(x) __swab64((x)) #define __le64_to_cpu(x) __swab64((x)) #define __cpu_to_le32(x) __swab32((x)) #define __le32_to_cpu(x) __swab32((x)) #define __cpu_to_le16(x) __swab16((x)) #define __le16_to_cpu(x) __swab16((x)) #define __cpu_to_be64(x) ((__u64)(x)) #define __be64_to_cpu(x) ((__u64)(x)) #define __cpu_to_be32(x) ((__u32)(x)) #define __be32_to_cpu(x) ((__u32)(x)) #define __cpu_to_be16(x) ((__u16)(x)) #define __be16_to_cpu(x) ((__u16)(x)) #define __cpu_to_le64p(x) __swab64p((x)) #define __le64_to_cpup(x) __swab64p((x)) #define __cpu_to_le32p(x) __swab32p((x)) #define __le32_to_cpup(x) __swab32p((x)) #define __cpu_to_le16p(x) __swab16p((x)) #define __le16_to_cpup(x) __swab16p((x)) #define __cpu_to_be64p(x) (*(__u64*)(x)) #define __be64_to_cpup(x) (*(__u64*)(x)) #define __cpu_to_be32p(x) (*(__u32*)(x)) #define __be32_to_cpup(x) (*(__u32*)(x)) #define __cpu_to_be16p(x) (*(__u16*)(x)) #define __be16_to_cpup(x) (*(__u16*)(x)) #define __cpu_to_le64s(x) __swab64s((x)) #define __le64_to_cpus(x) __swab64s((x)) #define __cpu_to_le32s(x) __swab32s((x)) #define __le32_to_cpus(x) __swab32s((x)) #define __cpu_to_le16s(x) __swab16s((x)) #define __le16_to_cpus(x) __swab16s((x)) #define __cpu_to_be64s(x) do {} while (0) #define __be64_to_cpus(x) do {} while (0) #define __cpu_to_be32s(x) do {} while (0) #define __be32_to_cpus(x) do {} while (0) #define __cpu_to_be16s(x) do {} while (0) #define __be16_to_cpus(x) do {} while (0) #include #endif /* _LINUX_BYTEORDER_BIG_ENDIAN_H */ rtl8812au-4.3.8.12175.20140902+dfsg/include/byteorder/generic.h000066400000000000000000000163321261122257400227130ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _LINUX_BYTEORDER_GENERIC_H #define _LINUX_BYTEORDER_GENERIC_H /* * linux/byteorder_generic.h * Generic Byte-reordering support * * Francois-Rene Rideau 19970707 * gathered all the good ideas from all asm-foo/byteorder.h into one file, * cleaned them up. * I hope it is compliant with non-GCC compilers. * I decided to put __BYTEORDER_HAS_U64__ in byteorder.h, * because I wasn't sure it would be ok to put it in types.h * Upgraded it to 2.1.43 * Francois-Rene Rideau 19971012 * Upgraded it to 2.1.57 * to please Linus T., replaced huge #ifdef's between little/big endian * by nestedly #include'd files. * Francois-Rene Rideau 19971205 * Made it to 2.1.71; now a facelift: * Put files under include/linux/byteorder/ * Split swab from generic support. * * TODO: * = Regular kernel maintainers could also replace all these manual * byteswap macros that remain, disseminated among drivers, * after some grep or the sources... * = Linus might want to rename all these macros and files to fit his taste, * to fit his personal naming scheme. * = it seems that a few drivers would also appreciate * nybble swapping support... * = every architecture could add their byteswap macro in asm/byteorder.h * see how some architectures already do (i386, alpha, ppc, etc) * = cpu_to_beXX and beXX_to_cpu might some day need to be well * distinguished throughout the kernel. This is not the case currently, * since little endian, big endian, and pdp endian machines needn't it. * But this might be the case for, say, a port of Linux to 20/21 bit * architectures (and F21 Linux addict around?). */ /* * The following macros are to be defined by : * * Conversion of long and short int between network and host format * ntohl(__u32 x) * ntohs(__u16 x) * htonl(__u32 x) * htons(__u16 x) * It seems that some programs (which? where? or perhaps a standard? POSIX?) * might like the above to be functions, not macros (why?). * if that's true, then detect them, and take measures. * Anyway, the measure is: define only ___ntohl as a macro instead, * and in a separate file, have * unsigned long inline ntohl(x){return ___ntohl(x);} * * The same for constant arguments * __constant_ntohl(__u32 x) * __constant_ntohs(__u16 x) * __constant_htonl(__u32 x) * __constant_htons(__u16 x) * * Conversion of XX-bit integers (16- 32- or 64-) * between native CPU format and little/big endian format * 64-bit stuff only defined for proper architectures * cpu_to_[bl]eXX(__uXX x) * [bl]eXX_to_cpu(__uXX x) * * The same, but takes a pointer to the value to convert * cpu_to_[bl]eXXp(__uXX x) * [bl]eXX_to_cpup(__uXX x) * * The same, but change in situ * cpu_to_[bl]eXXs(__uXX x) * [bl]eXX_to_cpus(__uXX x) * * See asm-foo/byteorder.h for examples of how to provide * architecture-optimized versions * */ #if defined(PLATFORM_LINUX) || defined(PLATFORM_WINDOWS) || defined(PLATFORM_MPIXEL) || defined(PLATFORM_FREEBSD) /* * inside the kernel, we can use nicknames; * outside of it, we must avoid POSIX namespace pollution... */ #define cpu_to_le64 __cpu_to_le64 #define le64_to_cpu __le64_to_cpu #define cpu_to_le32 __cpu_to_le32 #define le32_to_cpu __le32_to_cpu #define cpu_to_le16 __cpu_to_le16 #define le16_to_cpu __le16_to_cpu #define cpu_to_be64 __cpu_to_be64 #define be64_to_cpu __be64_to_cpu #define cpu_to_be32 __cpu_to_be32 #define be32_to_cpu __be32_to_cpu #define cpu_to_be16 __cpu_to_be16 #define be16_to_cpu __be16_to_cpu #define cpu_to_le64p __cpu_to_le64p #define le64_to_cpup __le64_to_cpup #define cpu_to_le32p __cpu_to_le32p #define le32_to_cpup __le32_to_cpup #define cpu_to_le16p __cpu_to_le16p #define le16_to_cpup __le16_to_cpup #define cpu_to_be64p __cpu_to_be64p #define be64_to_cpup __be64_to_cpup #define cpu_to_be32p __cpu_to_be32p #define be32_to_cpup __be32_to_cpup #define cpu_to_be16p __cpu_to_be16p #define be16_to_cpup __be16_to_cpup #define cpu_to_le64s __cpu_to_le64s #define le64_to_cpus __le64_to_cpus #define cpu_to_le32s __cpu_to_le32s #define le32_to_cpus __le32_to_cpus #define cpu_to_le16s __cpu_to_le16s #define le16_to_cpus __le16_to_cpus #define cpu_to_be64s __cpu_to_be64s #define be64_to_cpus __be64_to_cpus #define cpu_to_be32s __cpu_to_be32s #define be32_to_cpus __be32_to_cpus #define cpu_to_be16s __cpu_to_be16s #define be16_to_cpus __be16_to_cpus #endif /* * Handle ntohl and suches. These have various compatibility * issues - like we want to give the prototype even though we * also have a macro for them in case some strange program * wants to take the address of the thing or something.. * * Note that these used to return a "long" in libc5, even though * long is often 64-bit these days.. Thus the casts. * * They have to be macros in order to do the constant folding * correctly - if the argument passed into a inline function * it is no longer constant according to gcc.. */ #undef ntohl #undef ntohs #undef htonl #undef htons /* * Do the prototypes. Somebody might want to take the * address or some such sick thing.. */ #if defined(PLATFORM_LINUX) || (defined (__GLIBC__) && __GLIBC__ >= 2) extern __u32 ntohl(__u32); extern __u32 htonl(__u32); #else //defined(PLATFORM_LINUX) || (defined (__GLIBC__) && __GLIBC__ >= 2) #ifndef PLATFORM_FREEBSD extern unsigned long int ntohl(unsigned long int); extern unsigned long int htonl(unsigned long int); #endif #endif #ifndef PLATFORM_FREEBSD extern unsigned short int ntohs(unsigned short int); extern unsigned short int htons(unsigned short int); #endif #if defined(__GNUC__) && (__GNUC__ >= 2) && defined(__OPTIMIZE__) || defined(PLATFORM_MPIXEL) #define ___htonl(x) __cpu_to_be32(x) #define ___htons(x) __cpu_to_be16(x) #define ___ntohl(x) __be32_to_cpu(x) #define ___ntohs(x) __be16_to_cpu(x) #if defined(PLATFORM_LINUX) || (defined (__GLIBC__) && __GLIBC__ >= 2) #define htonl(x) ___htonl(x) #define ntohl(x) ___ntohl(x) #else #define htonl(x) ((unsigned long)___htonl(x)) #define ntohl(x) ((unsigned long)___ntohl(x)) #endif #define htons(x) ___htons(x) #define ntohs(x) ___ntohs(x) #endif /* OPTIMIZE */ #if defined (PLATFORM_WINDOWS) #define htonl(x) __cpu_to_be32(x) #define ntohl(x) __be32_to_cpu(x) #define htons(x) __cpu_to_be16(x) #define ntohs(x) __be16_to_cpu(x) #endif #endif /* _LINUX_BYTEORDER_GENERIC_H */ rtl8812au-4.3.8.12175.20140902+dfsg/include/byteorder/little_endian.h000066400000000000000000000070201261122257400241040ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _LINUX_BYTEORDER_LITTLE_ENDIAN_H #define _LINUX_BYTEORDER_LITTLE_ENDIAN_H #ifndef __LITTLE_ENDIAN #define __LITTLE_ENDIAN 1234 #endif #ifndef __LITTLE_ENDIAN_BITFIELD #define __LITTLE_ENDIAN_BITFIELD #endif #include #ifndef __constant_htonl #define __constant_htonl(x) ___constant_swab32((x)) #define __constant_ntohl(x) ___constant_swab32((x)) #define __constant_htons(x) ___constant_swab16((x)) #define __constant_ntohs(x) ___constant_swab16((x)) #define __constant_cpu_to_le64(x) ((__u64)(x)) #define __constant_le64_to_cpu(x) ((__u64)(x)) #define __constant_cpu_to_le32(x) ((__u32)(x)) #define __constant_le32_to_cpu(x) ((__u32)(x)) #define __constant_cpu_to_le16(x) ((__u16)(x)) #define __constant_le16_to_cpu(x) ((__u16)(x)) #define __constant_cpu_to_be64(x) ___constant_swab64((x)) #define __constant_be64_to_cpu(x) ___constant_swab64((x)) #define __constant_cpu_to_be32(x) ___constant_swab32((x)) #define __constant_be32_to_cpu(x) ___constant_swab32((x)) #define __constant_cpu_to_be16(x) ___constant_swab16((x)) #define __constant_be16_to_cpu(x) ___constant_swab16((x)) #define __cpu_to_le64(x) ((__u64)(x)) #define __le64_to_cpu(x) ((__u64)(x)) #define __cpu_to_le32(x) ((__u32)(x)) #define __le32_to_cpu(x) ((__u32)(x)) #define __cpu_to_le16(x) ((__u16)(x)) #define __le16_to_cpu(x) ((__u16)(x)) #define __cpu_to_be64(x) __swab64((x)) #define __be64_to_cpu(x) __swab64((x)) #define __cpu_to_be32(x) __swab32((x)) #define __be32_to_cpu(x) __swab32((x)) #define __cpu_to_be16(x) __swab16((x)) #define __be16_to_cpu(x) __swab16((x)) #define __cpu_to_le64p(x) (*(__u64*)(x)) #define __le64_to_cpup(x) (*(__u64*)(x)) #define __cpu_to_le32p(x) (*(__u32*)(x)) #define __le32_to_cpup(x) (*(__u32*)(x)) #define __cpu_to_le16p(x) (*(__u16*)(x)) #define __le16_to_cpup(x) (*(__u16*)(x)) #define __cpu_to_be64p(x) __swab64p((x)) #define __be64_to_cpup(x) __swab64p((x)) #define __cpu_to_be32p(x) __swab32p((x)) #define __be32_to_cpup(x) __swab32p((x)) #define __cpu_to_be16p(x) __swab16p((x)) #define __be16_to_cpup(x) __swab16p((x)) #define __cpu_to_le64s(x) do {} while (0) #define __le64_to_cpus(x) do {} while (0) #define __cpu_to_le32s(x) do {} while (0) #define __le32_to_cpus(x) do {} while (0) #define __cpu_to_le16s(x) do {} while (0) #define __le16_to_cpus(x) do {} while (0) #define __cpu_to_be64s(x) __swab64s((x)) #define __be64_to_cpus(x) __swab64s((x)) #define __cpu_to_be32s(x) __swab32s((x)) #define __be32_to_cpus(x) __swab32s((x)) #define __cpu_to_be16s(x) __swab16s((x)) #define __be16_to_cpus(x) __swab16s((x)) #endif // __constant_htonl #include #endif /* _LINUX_BYTEORDER_LITTLE_ENDIAN_H */ rtl8812au-4.3.8.12175.20140902+dfsg/include/byteorder/swab.h000066400000000000000000000067321261122257400222360ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _LINUX_BYTEORDER_SWAB_H #define _LINUX_BYTEORDER_SWAB_H #if !defined(CONFIG_PLATFORM_MSTAR) #ifndef __u16 typedef unsigned short __u16; #endif #ifndef __u32 typedef unsigned int __u32; #endif #ifndef __u8 typedef unsigned char __u8; #endif #ifndef __u64 typedef unsigned long long __u64; #endif __inline static __u16 ___swab16(__u16 x) { __u16 __x = x; return ((__u16)( (((__u16)(__x) & (__u16)0x00ffU) << 8) | (((__u16)(__x) & (__u16)0xff00U) >> 8) )); } __inline static __u32 ___swab32(__u32 x) { __u32 __x = (x); return ((__u32)( (((__u32)(__x) & (__u32)0x000000ffUL) << 24) | (((__u32)(__x) & (__u32)0x0000ff00UL) << 8) | (((__u32)(__x) & (__u32)0x00ff0000UL) >> 8) | (((__u32)(__x) & (__u32)0xff000000UL) >> 24) )); } __inline static __u64 ___swab64(__u64 x) { __u64 __x = (x); return ((__u64)( \ (__u64)(((__u64)(__x) & (__u64)0x00000000000000ffULL) << 56) | \ (__u64)(((__u64)(__x) & (__u64)0x000000000000ff00ULL) << 40) | \ (__u64)(((__u64)(__x) & (__u64)0x0000000000ff0000ULL) << 24) | \ (__u64)(((__u64)(__x) & (__u64)0x00000000ff000000ULL) << 8) | \ (__u64)(((__u64)(__x) & (__u64)0x000000ff00000000ULL) >> 8) | \ (__u64)(((__u64)(__x) & (__u64)0x0000ff0000000000ULL) >> 24) | \ (__u64)(((__u64)(__x) & (__u64)0x00ff000000000000ULL) >> 40) | \ (__u64)(((__u64)(__x) & (__u64)0xff00000000000000ULL) >> 56) )); \ } #endif // CONFIG_PLATFORM_MSTAR #ifndef __arch__swab16 __inline static __u16 __arch__swab16(__u16 x) { return ___swab16(x); } #endif #ifndef __arch__swab32 __inline static __u32 __arch__swab32(__u32 x) { __u32 __tmp = (x) ; return ___swab32(__tmp); } #endif #ifndef __arch__swab64 __inline static __u64 __arch__swab64(__u64 x) { __u64 __tmp = (x) ; return ___swab64(__tmp); } #endif #ifndef __swab16 #define __swab16(x) __fswab16(x) #define __swab32(x) __fswab32(x) #define __swab64(x) __fswab64(x) #endif // __swab16 #ifdef PLATFORM_FREEBSD __inline static __u16 __fswab16(__u16 x) #else __inline static const __u16 __fswab16(__u16 x) #endif //PLATFORM_FREEBSD { return __arch__swab16(x); } #ifdef PLATFORM_FREEBSD __inline static __u32 __fswab32(__u32 x) #else __inline static const __u32 __fswab32(__u32 x) #endif //PLATFORM_FREEBSD { return __arch__swab32(x); } #if defined(PLATFORM_LINUX) || defined(PLATFORM_WINDOWS) #define swab16 __swab16 #define swab32 __swab32 #define swab64 __swab64 #define swab16p __swab16p #define swab32p __swab32p #define swab64p __swab64p #define swab16s __swab16s #define swab32s __swab32s #define swab64s __swab64s #endif #endif /* _LINUX_BYTEORDER_SWAB_H */ rtl8812au-4.3.8.12175.20140902+dfsg/include/byteorder/swabb.h000066400000000000000000000102661261122257400223750ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _LINUX_BYTEORDER_SWABB_H #define _LINUX_BYTEORDER_SWABB_H /* * linux/byteorder/swabb.h * SWAp Bytes Bizarrely * swaHHXX[ps]?(foo) * * Support for obNUXIous pdp-endian and other bizarre architectures. * Will Linux ever run on such ancient beasts? if not, this file * will be but a programming pearl. Still, it's a reminder that we * shouldn't be making too many assumptions when trying to be portable. * */ /* * Meaning of the names I chose (vaxlinux people feel free to correct them): * swahw32 swap 16-bit half-words in a 32-bit word * swahb32 swap 8-bit halves of each 16-bit half-word in a 32-bit word * * No 64-bit support yet. I don't know NUXI conventions for long longs. * I guarantee it will be a mess when it's there, though :-> * It will be even worse if there are conflicting 64-bit conventions. * Hopefully, no one ever used 64-bit objects on NUXI machines. * */ #define ___swahw32(x) \ ({ \ __u32 __x = (x); \ ((__u32)( \ (((__u32)(__x) & (__u32)0x0000ffffUL) << 16) | \ (((__u32)(__x) & (__u32)0xffff0000UL) >> 16) )); \ }) #define ___swahb32(x) \ ({ \ __u32 __x = (x); \ ((__u32)( \ (((__u32)(__x) & (__u32)0x00ff00ffUL) << 8) | \ (((__u32)(__x) & (__u32)0xff00ff00UL) >> 8) )); \ }) #define ___constant_swahw32(x) \ ((__u32)( \ (((__u32)(x) & (__u32)0x0000ffffUL) << 16) | \ (((__u32)(x) & (__u32)0xffff0000UL) >> 16) )) #define ___constant_swahb32(x) \ ((__u32)( \ (((__u32)(x) & (__u32)0x00ff00ffUL) << 8) | \ (((__u32)(x) & (__u32)0xff00ff00UL) >> 8) )) /* * provide defaults when no architecture-specific optimization is detected */ #ifndef __arch__swahw32 # define __arch__swahw32(x) ___swahw32(x) #endif #ifndef __arch__swahb32 # define __arch__swahb32(x) ___swahb32(x) #endif #ifndef __arch__swahw32p # define __arch__swahw32p(x) __swahw32(*(x)) #endif #ifndef __arch__swahb32p # define __arch__swahb32p(x) __swahb32(*(x)) #endif #ifndef __arch__swahw32s # define __arch__swahw32s(x) do { *(x) = __swahw32p((x)); } while (0) #endif #ifndef __arch__swahb32s # define __arch__swahb32s(x) do { *(x) = __swahb32p((x)); } while (0) #endif /* * Allow constant folding */ #if defined(__GNUC__) && (__GNUC__ >= 2) && defined(__OPTIMIZE__) # define __swahw32(x) \ (__builtin_constant_p((__u32)(x)) ? \ ___swahw32((x)) : \ __fswahw32((x))) # define __swahb32(x) \ (__builtin_constant_p((__u32)(x)) ? \ ___swahb32((x)) : \ __fswahb32((x))) #else # define __swahw32(x) __fswahw32(x) # define __swahb32(x) __fswahb32(x) #endif /* OPTIMIZE */ __inline static__ __const__ __u32 __fswahw32(__u32 x) { return __arch__swahw32(x); } __inline static__ __u32 __swahw32p(__u32 *x) { return __arch__swahw32p(x); } __inline static__ void __swahw32s(__u32 *addr) { __arch__swahw32s(addr); } __inline static__ __const__ __u32 __fswahb32(__u32 x) { return __arch__swahb32(x); } __inline static__ __u32 __swahb32p(__u32 *x) { return __arch__swahb32p(x); } __inline static__ void __swahb32s(__u32 *addr) { __arch__swahb32s(addr); } #ifdef __BYTEORDER_HAS_U64__ /* * Not supported yet */ #endif /* __BYTEORDER_HAS_U64__ */ #if defined(PLATFORM_LINUX) #define swahw32 __swahw32 #define swahb32 __swahb32 #define swahw32p __swahw32p #define swahb32p __swahb32p #define swahw32s __swahw32s #define swahb32s __swahb32s #endif #endif /* _LINUX_BYTEORDER_SWABB_H */ rtl8812au-4.3.8.12175.20140902+dfsg/include/circ_buf.h000066400000000000000000000021641261122257400210520ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __CIRC_BUF_H_ #define __CIRC_BUF_H_ 1 #define CIRC_CNT(head,tail,size) (((head) - (tail)) & ((size)-1)) #define CIRC_SPACE(head,tail,size) CIRC_CNT((tail),((head)+1),(size)) #endif //_CIRC_BUF_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/cmd_osdep.h000066400000000000000000000025061261122257400212330ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __CMD_OSDEP_H_ #define __CMD_OSDEP_H_ extern sint _rtw_init_cmd_priv (struct cmd_priv *pcmdpriv); extern sint _rtw_init_evt_priv(struct evt_priv *pevtpriv); extern void _rtw_free_evt_priv (struct evt_priv *pevtpriv); extern void _rtw_free_cmd_priv (struct cmd_priv *pcmdpriv); extern sint _rtw_enqueue_cmd(_queue *queue, struct cmd_obj *obj); extern struct cmd_obj *_rtw_dequeue_cmd(_queue *queue); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/drv_conf.h000066400000000000000000000073001261122257400210730ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __DRV_CONF_H__ #define __DRV_CONF_H__ #include "autoconf.h" #if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) #error "Shall be Linux or Windows, but not both!\n" #endif //Older Android kernel doesn't has CONFIG_ANDROID defined, //add this to force CONFIG_ANDROID defined #ifdef CONFIG_PLATFORM_ANDROID #ifndef CONFIG_ANDROID #define CONFIG_ANDROID #endif #endif #ifdef CONFIG_ANDROID //Some Android build will restart the UI while non-printable ascii is passed //between java and c/c++ layer (JNI). We force CONFIG_VALIDATE_SSID //for Android here. If you are sure there is no risk on your system about this, //mask this macro define to support non-printable ascii ssid. //#define CONFIG_VALIDATE_SSID //Android expect dbm as the rx signal strength unit #define CONFIG_SIGNAL_DISPLAY_DBM #endif /* #if defined(CONFIG_HAS_EARLYSUSPEND) && defined (CONFIG_RESUME_IN_WORKQUEUE) #warning "You have CONFIG_HAS_EARLYSUSPEND enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically" #undef CONFIG_RESUME_IN_WORKQUEUE #endif #if defined(CONFIG_ANDROID_POWER) && defined (CONFIG_RESUME_IN_WORKQUEUE) #warning "You have CONFIG_ANDROID_POWER enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically" #undef CONFIG_RESUME_IN_WORKQUEUE #endif */ #ifdef CONFIG_RESUME_IN_WORKQUEUE //this can be removed, because there is no case for this... #if !defined( CONFIG_WAKELOCK) && !defined(CONFIG_ANDROID_POWER) #error "enable CONFIG_RESUME_IN_WORKQUEUE without CONFIG_WAKELOCK or CONFIG_ANDROID_POWER will suffer from the danger of wifi's unfunctionality..." #error "If you still want to enable CONFIG_RESUME_IN_WORKQUEUE in this case, mask this preprossor checking and GOOD LUCK..." #endif #endif //About USB VENDOR REQ #if defined(CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC) && !defined(CONFIG_USB_VENDOR_REQ_MUTEX) #warning "define CONFIG_USB_VENDOR_REQ_MUTEX for CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC automatically" #define CONFIG_USB_VENDOR_REQ_MUTEX #endif #if defined(CONFIG_VENDOR_REQ_RETRY) && !defined(CONFIG_USB_VENDOR_REQ_MUTEX) #warning "define CONFIG_USB_VENDOR_REQ_MUTEX for CONFIG_VENDOR_REQ_RETRY automatically" #define CONFIG_USB_VENDOR_REQ_MUTEX #endif #define DYNAMIC_CAMID_ALLOC #ifndef CONFIG_RTW_HIQ_FILTER #define CONFIG_RTW_HIQ_FILTER 1 #endif #ifndef CONFIG_RTW_ADAPTIVITY_EN #define CONFIG_RTW_ADAPTIVITY_EN 0 #endif #ifndef CONFIG_RTW_ADAPTIVITY_MODE #define CONFIG_RTW_ADAPTIVITY_MODE 0 #endif #ifndef CONFIG_RTW_NHM_EN #define CONFIG_RTW_NHM_EN 0 #endif #ifndef CONFIG_RTW_AMPLIFIER_TYPE_2G #define CONFIG_RTW_AMPLIFIER_TYPE_2G 0 #endif #ifndef CONFIG_RTW_AMPLIFIER_TYPE_5G #define CONFIG_RTW_AMPLIFIER_TYPE_5G 0 #endif #define MACID_NUM_SW_LIMIT 32 #define CAM_ENTRY_NUM_SW_LIMIT 32 //#include #endif // __DRV_CONF_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/drv_types.h000066400000000000000000000671471261122257400213310ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ /*------------------------------------------------------------------------------- For type defines and data structure defines --------------------------------------------------------------------------------*/ #ifndef __DRV_TYPES_H__ #define __DRV_TYPES_H__ #include #include #include #include #include #include #include #ifdef CONFIG_ARP_KEEP_ALIVE #include #include #endif #ifdef PLATFORM_OS_XP #include #endif #ifdef PLATFORM_OS_CE #include #endif #ifdef PLATFORM_LINUX #include #endif enum _NIC_VERSION { RTL8711_NIC, RTL8712_NIC, RTL8713_NIC, RTL8716_NIC }; typedef struct _ADAPTER _adapter, ADAPTER,*PADAPTER; #include #include #ifdef CONFIG_80211N_HT #include #endif #ifdef CONFIG_80211AC_VHT #include #endif #ifdef CONFIG_INTEL_WIDI #include #endif #include #include #include #include #include #include #ifdef CONFIG_BEAMFORMING #include #endif #include #include #include #include #include #include #include "../hal/hal_dm.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER #include #endif #ifdef CONFIG_P2P #include #endif // CONFIG_P2P #ifdef CONFIG_TDLS #include #endif // CONFIG_TDLS #ifdef CONFIG_WAPI_SUPPORT #include #endif // CONFIG_WAPI_SUPPORT #ifdef CONFIG_DRVEXT_MODULE #include #endif // CONFIG_DRVEXT_MODULE #ifdef CONFIG_MP_INCLUDED #include #endif // CONFIG_MP_INCLUDED #ifdef CONFIG_BR_EXT #include #endif // CONFIG_BR_EXT #ifdef CONFIG_IOL #include #endif // CONFIG_IOL #include #include #include #include #include #define SPEC_DEV_ID_NONE BIT(0) #define SPEC_DEV_ID_DISABLE_HT BIT(1) #define SPEC_DEV_ID_ENABLE_PS BIT(2) #define SPEC_DEV_ID_RF_CONFIG_1T1R BIT(3) #define SPEC_DEV_ID_RF_CONFIG_2T2R BIT(4) #define SPEC_DEV_ID_ASSIGN_IFNAME BIT(5) struct specific_device_id{ u32 flags; u16 idVendor; u16 idProduct; }; struct registry_priv { u8 chip_version; u8 rfintfs; u8 lbkmode; u8 hci; NDIS_802_11_SSID ssid; u8 network_mode; //infra, ad-hoc, auto u8 channel;//ad-hoc support requirement u8 wireless_mode;//A, B, G, auto u8 scan_mode;//active, passive u8 radio_enable; u8 preamble;//long, short, auto u8 vrtl_carrier_sense;//Enable, Disable, Auto u8 vcs_type;//RTS/CTS, CTS-to-self u16 rts_thresh; u16 frag_thresh; u8 adhoc_tx_pwr; u8 soft_ap; u8 power_mgnt; u8 ips_mode; u8 smart_ps; u8 usb_rxagg_mode; u8 long_retry_lmt; u8 short_retry_lmt; u16 busy_thresh; u8 ack_policy; u8 mp_mode; u8 mp_dm; u8 software_encrypt; u8 software_decrypt; #ifdef CONFIG_TX_EARLY_MODE u8 early_mode; #endif u8 acm_method; //UAPSD u8 wmm_enable; u8 uapsd_enable; u8 uapsd_max_sp; u8 uapsd_acbk_en; u8 uapsd_acbe_en; u8 uapsd_acvi_en; u8 uapsd_acvo_en; WLAN_BSSID_EX dev_network; #ifdef CONFIG_80211N_HT u8 ht_enable; // 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160MHz // 2.4G use bit 0 ~ 3, 5G use bit 4 ~ 7 // 0x21 means enable 2.4G 40MHz & 5G 80MHz u8 bw_mode; u8 ampdu_enable;//for tx u8 rx_stbc; u8 ampdu_amsdu;//A-MPDU Supports A-MSDU is permitted // Short GI support Bit Map // BIT0 - 20MHz, 1: support, 0: non-support // BIT1 - 40MHz, 1: support, 0: non-support // BIT2 - 80MHz, 1: support, 0: non-support // BIT3 - 160MHz, 1: support, 0: non-support u8 short_gi; // BIT0: Enable VHT LDPC Rx, BIT1: Enable VHT LDPC Tx, BIT4: Enable HT LDPC Rx, BIT5: Enable HT LDPC Tx u8 ldpc_cap; // BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx, BIT4: Enable HT STBC Rx, BIT5: Enable HT STBC Tx u8 stbc_cap; // BIT0: Enable VHT Beamformer, BIT1: Enable VHT Beamformee, BIT4: Enable HT Beamformer, BIT5: Enable HT Beamformee u8 beamform_cap; #endif //CONFIG_80211N_HT #ifdef CONFIG_80211AC_VHT u8 vht_enable; //0:disable, 1:enable, 2:auto u8 ampdu_factor; u8 vht_rate_sel; #endif //CONFIG_80211AC_VHT u8 lowrate_two_xmit; u8 rf_config ; u8 low_power ; u8 wifi_spec;// !turbo_mode u8 special_rf_path; // 0: 2T2R ,1: only turn on path A 1T1R u8 channel_plan; #ifdef CONFIG_BT_COEXIST u8 btcoex; u8 bt_iso; u8 bt_sco; u8 bt_ampdu; s8 ant_num; #endif BOOLEAN bAcceptAddbaReq; u8 antdiv_cfg; u8 antdiv_type; u8 usbss_enable;//0:disable,1:enable u8 hwpdn_mode;//0:disable,1:enable,2:decide by EFUSE config u8 hwpwrp_detect;//0:disable,1:enable u8 hw_wps_pbc;//0:disable,1:enable #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE char adaptor_info_caching_file_path[PATH_LENGTH_MAX]; #endif #ifdef CONFIG_LAYER2_ROAMING u8 max_roaming_times; // the max number driver will try to roaming #endif #ifdef CONFIG_IOL u8 fw_iol; //enable iol without other concern #endif #ifdef CONFIG_DUALMAC_CONCURRENT u8 dmsp;//0:disable,1:enable #endif #ifdef CONFIG_80211D u8 enable80211d; #endif u8 ifname[16]; u8 if2name[16]; u8 notch_filter; #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV u8 force_ant;//0 normal,1 main,2 aux u8 force_igi;//0 normal #endif //define for tx power adjust u8 RegEnableTxPowerLimit; u8 RegEnableTxPowerByRate; u8 RegPowerBase; u8 RegPwrTblSel; s8 TxBBSwing_2G; s8 TxBBSwing_5G; u8 AmplifierType_2G; u8 AmplifierType_5G; u8 bEn_RFE; u8 RFE_Type; u8 check_fw_ps; #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE u8 load_phy_file; u8 RegDecryptCustomFile; #endif #ifdef CONFIG_MULTI_VIR_IFACES u8 ext_iface_num;//primary/secondary iface is excluded #endif u8 qos_opt_enable; u8 hiq_filter; u8 adaptivity_en; u8 adaptivity_mode; u8 nhm_en; }; //For registry parameters #define RGTRY_OFT(field) ((ULONG)FIELD_OFFSET(struct registry_priv,field)) #define RGTRY_SZ(field) sizeof(((struct registry_priv*) 0)->field) #define GetRegAmplifierType2G(_Adapter) (_Adapter->registrypriv.AmplifierType_2G) #define GetRegAmplifierType5G(_Adapter) (_Adapter->registrypriv.AmplifierType_5G) #define GetRegTxBBSwing_2G(_Adapter) (_Adapter->registrypriv.TxBBSwing_2G) #define GetRegTxBBSwing_5G(_Adapter) (_Adapter->registrypriv.TxBBSwing_5G) #define GetRegbENRFEType(_Adapter) (_Adapter->registrypriv.bEn_RFE) #define GetRegRFEType(_Adapter) (_Adapter->registrypriv.RFE_Type) #define BSSID_OFT(field) ((ULONG)FIELD_OFFSET(WLAN_BSSID_EX,field)) #define BSSID_SZ(field) sizeof(((PWLAN_BSSID_EX) 0)->field) #ifdef CONFIG_SDIO_HCI #include #define INTF_DATA SDIO_DATA #elif defined(CONFIG_GSPI_HCI) #include #define INTF_DATA GSPI_DATA #elif defined(CONFIG_PCI_HCI) #include #endif #ifdef CONFIG_CONCURRENT_MODE #define is_primary_adapter(adapter) (adapter->adapter_type == PRIMARY_ADAPTER) #define get_iface_type(adapter) (adapter->iface_type) #else #define is_primary_adapter(adapter) (1) #define get_iface_type(adapter) (IFACE_PORT0) #endif #define GET_PRIMARY_ADAPTER(padapter) (((_adapter *)padapter)->dvobj->if1) #define GET_IFACE_NUMS(padapter) (((_adapter *)padapter)->dvobj->iface_nums) #define GET_ADAPTER(padapter, iface_id) (((_adapter *)padapter)->dvobj->padapters[iface_id]) #define GetDefaultAdapter(padapter) padapter enum _IFACE_ID { IFACE_ID0, //maping to PRIMARY_ADAPTER IFACE_ID1, //maping to SECONDARY_ADAPTER IFACE_ID2, IFACE_ID3, IFACE_ID_MAX, }; #ifdef CONFIG_DBG_COUNTER struct rx_logs { u32 intf_rx; u32 intf_rx_err_recvframe; u32 intf_rx_err_skb; u32 intf_rx_report; u32 core_rx; u32 core_rx_pre; u32 core_rx_pre_ver_err; u32 core_rx_pre_mgmt; u32 core_rx_pre_mgmt_err_80211w; u32 core_rx_pre_mgmt_err; u32 core_rx_pre_ctrl; u32 core_rx_pre_ctrl_err; u32 core_rx_pre_data; u32 core_rx_pre_data_wapi_seq_err; u32 core_rx_pre_data_wapi_key_err; u32 core_rx_pre_data_handled; u32 core_rx_pre_data_err; u32 core_rx_pre_data_unknown; u32 core_rx_pre_unknown; u32 core_rx_enqueue; u32 core_rx_dequeue; u32 core_rx_post; u32 core_rx_post_decrypt; u32 core_rx_post_decrypt_wep; u32 core_rx_post_decrypt_tkip; u32 core_rx_post_decrypt_aes; u32 core_rx_post_decrypt_wapi; u32 core_rx_post_decrypt_hw; u32 core_rx_post_decrypt_unknown; u32 core_rx_post_decrypt_err; u32 core_rx_post_defrag_err; u32 core_rx_post_portctrl_err; u32 core_rx_post_indicate; u32 core_rx_post_indicate_in_oder; u32 core_rx_post_indicate_reoder; u32 core_rx_post_indicate_err; u32 os_indicate; u32 os_indicate_ap_mcast; u32 os_indicate_ap_forward; u32 os_indicate_ap_self; u32 os_indicate_err; u32 os_netif_ok; u32 os_netif_err; }; struct tx_logs { u32 os_tx; u32 os_tx_err_up; u32 os_tx_err_xmit; u32 os_tx_m2u; u32 os_tx_m2u_ignore_fw_linked; u32 os_tx_m2u_ignore_self; u32 os_tx_m2u_entry; u32 os_tx_m2u_entry_err_xmit; u32 os_tx_m2u_entry_err_skb; u32 os_tx_m2u_stop; u32 core_tx; u32 core_tx_err_pxmitframe; u32 core_tx_err_brtx; u32 core_tx_upd_attrib; u32 core_tx_upd_attrib_adhoc; u32 core_tx_upd_attrib_sta; u32 core_tx_upd_attrib_ap; u32 core_tx_upd_attrib_unknown; u32 core_tx_upd_attrib_dhcp; u32 core_tx_upd_attrib_icmp; u32 core_tx_upd_attrib_active; u32 core_tx_upd_attrib_err_ucast_sta; u32 core_tx_upd_attrib_err_ucast_ap_link; u32 core_tx_upd_attrib_err_sta; u32 core_tx_upd_attrib_err_link; u32 core_tx_upd_attrib_err_sec; u32 core_tx_ap_enqueue_warn_fwstate; u32 core_tx_ap_enqueue_warn_sta; u32 core_tx_ap_enqueue_warn_nosta; u32 core_tx_ap_enqueue_warn_link; u32 core_tx_ap_enqueue_warn_trigger; u32 core_tx_ap_enqueue_mcast; u32 core_tx_ap_enqueue_ucast; u32 core_tx_ap_enqueue; u32 intf_tx; u32 intf_tx_pending_ac; u32 intf_tx_pending_fw_under_survey; u32 intf_tx_pending_fw_under_linking; u32 intf_tx_pending_xmitbuf; u32 intf_tx_enqueue; u32 core_tx_enqueue; u32 core_tx_enqueue_class; u32 core_tx_enqueue_class_err_sta; u32 core_tx_enqueue_class_err_nosta; u32 core_tx_enqueue_class_err_fwlink; u32 intf_tx_direct; u32 intf_tx_direct_err_coalesce; u32 intf_tx_dequeue; u32 intf_tx_dequeue_err_coalesce; u32 intf_tx_dump_xframe; u32 intf_tx_dump_xframe_err_txdesc; u32 intf_tx_dump_xframe_err_port; }; struct int_logs { u32 all; u32 err; u32 tbdok; u32 tbder; u32 bcnderr; u32 bcndma; u32 bcndma_e; u32 rx; u32 rx_rdu; u32 rx_fovw; u32 txfovw; u32 mgntok; u32 highdok; u32 bkdok; u32 bedok; u32 vidok; u32 vodok; }; #endif // CONFIG_DBG_COUNTER struct debug_priv { u32 dbg_sdio_free_irq_error_cnt; u32 dbg_sdio_alloc_irq_error_cnt; u32 dbg_sdio_free_irq_cnt; u32 dbg_sdio_alloc_irq_cnt; u32 dbg_sdio_deinit_error_cnt; u32 dbg_sdio_init_error_cnt; u32 dbg_suspend_error_cnt; u32 dbg_suspend_cnt; u32 dbg_resume_cnt; u32 dbg_resume_error_cnt; u32 dbg_deinit_fail_cnt; u32 dbg_carddisable_cnt; u32 dbg_carddisable_error_cnt; u32 dbg_ps_insuspend_cnt; u32 dbg_dev_unload_inIPS_cnt; u32 dbg_wow_leave_ps_fail_cnt; u32 dbg_scan_pwr_state_cnt; u32 dbg_downloadfw_pwr_state_cnt; u32 dbg_fw_read_ps_state_fail_cnt; u32 dbg_leave_ips_fail_cnt; u32 dbg_leave_lps_fail_cnt; u32 dbg_h2c_leave32k_fail_cnt; u32 dbg_diswow_dload_fw_fail_cnt; u32 dbg_enwow_dload_fw_fail_cnt; u32 dbg_ips_drvopen_fail_cnt; u32 dbg_poll_fail_cnt; u32 dbg_rpwm_toogle_cnt; u32 dbg_rpwm_timeout_fail_cnt; u32 dbg_sreset_cnt; u64 dbg_rx_fifo_last_overflow; u64 dbg_rx_fifo_curr_overflow; u64 dbg_rx_fifo_diff_overflow; u64 dbg_rx_ampdu_drop_count; u64 dbg_rx_ampdu_forced_indicate_count; u64 dbg_rx_ampdu_loss_count; u64 dbg_rx_dup_mgt_frame_drop_count; u64 dbg_rx_ampdu_window_shift_cnt; }; struct rtw_traffic_statistics { // tx statistics u64 tx_bytes; u64 tx_pkts; u64 tx_drop; u64 cur_tx_bytes; u64 last_tx_bytes; u32 cur_tx_tp; // Tx throughput in MBps. // rx statistics u64 rx_bytes; u64 rx_pkts; u64 rx_drop; u64 cur_rx_bytes; u64 last_rx_bytes; u32 cur_rx_tp; // Rx throughput in MBps. }; struct cam_ctl_t { _lock lock; u64 bitmap; }; struct cam_entry_cache { u16 ctrl; u8 mac[ETH_ALEN]; u8 key[16]; }; #define KEY_FMT "%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x" #define KEY_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5], \ ((u8*)(x))[6],((u8*)(x))[7],((u8*)(x))[8],((u8*)(x))[9],((u8*)(x))[10],((u8*)(x))[11], \ ((u8*)(x))[12],((u8*)(x))[13],((u8*)(x))[14],((u8*)(x))[15] struct macid_bmp { u32 m0; #if (MACID_NUM_SW_LIMIT > 32) u32 m1; #endif #if (MACID_NUM_SW_LIMIT > 64) u32 m2; #endif #if (MACID_NUM_SW_LIMIT > 96) u32 m3; #endif }; struct macid_ctl_t { _lock lock; u8 num; struct macid_bmp used; struct macid_bmp bmc; struct macid_bmp if_g[IFACE_ID_MAX]; struct macid_bmp ch_g[2]; /* 2 ch concurrency */ }; struct dvobj_priv { /*-------- below is common data --------*/ _adapter *if1; //PRIMARY_ADAPTER _adapter *if2; //SECONDARY_ADAPTER s32 processing_dev_remove; struct debug_priv drv_dbg; _mutex hw_init_mutex; _mutex h2c_fwcmd_mutex; _mutex setch_mutex; _mutex setbw_mutex; unsigned char oper_channel; //saved channel info when call set_channel_bw unsigned char oper_bwmode; unsigned char oper_ch_offset;//PRIME_CHNL_OFFSET u32 on_oper_ch_time; //extend to support mulitu interface //padapters[IFACE_ID0] == if1 //padapters[IFACE_ID1] == if2 _adapter *padapters[IFACE_ID_MAX]; u8 iface_nums; // total number of ifaces used runtime struct macid_ctl_t macid_ctl; struct cam_ctl_t cam_ctl; struct cam_entry_cache cam_cache[TOTAL_CAM_ENTRY]; //For 92D, DMDP have 2 interface. u8 InterfaceNumber; u8 NumInterfaces; //In /Out Pipe information int RtInPipe[2]; int RtOutPipe[4]; u8 Queue2Pipe[HW_QUEUE_ENTRY];//for out pipe mapping u8 irq_alloc; ATOMIC_T continual_io_error; ATOMIC_T disable_func; struct pwrctrl_priv pwrctl_priv; struct rtw_traffic_statistics traffic_stat; /*-------- below is for SDIO INTERFACE --------*/ #ifdef INTF_DATA INTF_DATA intf_data; #endif /*-------- below is for USB INTERFACE --------*/ #ifdef CONFIG_USB_HCI u8 usb_speed; // 1.1, 2.0 or 3.0 u8 nr_endpoint; u8 RtNumInPipes; u8 RtNumOutPipes; int ep_num[6]; //endpoint number int RegUsbSS; _sema usb_suspend_sema; #ifdef CONFIG_USB_VENDOR_REQ_MUTEX _mutex usb_vendor_req_mutex; #endif #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC u8 * usb_alloc_vendor_req_buf; u8 * usb_vendor_req_buf; #endif #ifdef PLATFORM_WINDOWS //related device objects PDEVICE_OBJECT pphysdevobj;//pPhysDevObj; PDEVICE_OBJECT pfuncdevobj;//pFuncDevObj; PDEVICE_OBJECT pnextdevobj;//pNextDevObj; u8 nextdevstacksz;//unsigned char NextDeviceStackSize; //= (CHAR)CEdevice->pUsbDevObj->StackSize + 1; //urb for control diescriptor request #ifdef PLATFORM_OS_XP struct _URB_CONTROL_DESCRIPTOR_REQUEST descriptor_urb; PUSB_CONFIGURATION_DESCRIPTOR pconfig_descriptor;//UsbConfigurationDescriptor; #endif #ifdef PLATFORM_OS_CE WCHAR active_path[MAX_ACTIVE_REG_PATH]; // adapter regpath USB_EXTENSION usb_extension; _nic_hdl pipehdls_r8192c[0x10]; #endif u32 config_descriptor_len;//ULONG UsbConfigurationDescriptorLength; #endif//PLATFORM_WINDOWS #ifdef PLATFORM_LINUX struct usb_interface *pusbintf; struct usb_device *pusbdev; #endif//PLATFORM_LINUX #ifdef PLATFORM_FREEBSD struct usb_interface *pusbintf; struct usb_device *pusbdev; #endif//PLATFORM_FREEBSD #endif//CONFIG_USB_HCI /*-------- below is for PCIE INTERFACE --------*/ #ifdef CONFIG_PCI_HCI #ifdef PLATFORM_LINUX struct pci_dev *ppcidev; //PCI MEM map unsigned long pci_mem_end; /* shared mem end */ unsigned long pci_mem_start; /* shared mem start */ //PCI IO map unsigned long pci_base_addr; /* device I/O address */ //PciBridge struct pci_priv pcipriv; u16 irqline; u8 irq_enabled; RT_ISR_CONTENT isr_content; _lock irq_th_lock; //ASPM u8 const_pci_aspm; u8 const_amdpci_aspm; u8 const_hwsw_rfoff_d3; u8 const_support_pciaspm; // pci-e bridge */ u8 const_hostpci_aspm_setting; // pci-e device */ u8 const_devicepci_aspm_setting; u8 b_support_aspm; // If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00. u8 b_support_backdoor; u8 bdma64; #endif//PLATFORM_LINUX #endif//CONFIG_PCI_HCI }; #define dvobj_to_pwrctl(dvobj) (&(dvobj->pwrctl_priv)) #define pwrctl_to_dvobj(pwrctl) container_of(pwrctl, struct dvobj_priv, pwrctl_priv) #define dvobj_to_macidctl(dvobj) (&(dvobj->macid_ctl)) #ifdef PLATFORM_LINUX static struct device *dvobj_to_dev(struct dvobj_priv *dvobj) { /* todo: get interface type from dvobj and the return the dev accordingly */ #ifdef RTW_DVOBJ_CHIP_HW_TYPE #endif #ifdef CONFIG_USB_HCI return &dvobj->pusbintf->dev; #endif #ifdef CONFIG_SDIO_HCI return &dvobj->intf_data.func->dev; #endif #ifdef CONFIG_GSPI_HCI return &dvobj->intf_data.func->dev; #endif #ifdef CONFIG_PCI_HCI return &dvobj->ppcidev->dev; #endif } #endif _adapter *dvobj_get_port0_adapter(struct dvobj_priv *dvobj); enum _IFACE_TYPE { IFACE_PORT0, //mapping to port0 for C/D series chips IFACE_PORT1, //mapping to port1 for C/D series chip MAX_IFACE_PORT, }; enum _ADAPTER_TYPE { PRIMARY_ADAPTER, SECONDARY_ADAPTER, MAX_ADAPTER = 0xFF, }; typedef enum _DRIVER_STATE{ DRIVER_NORMAL = 0, DRIVER_DISAPPEAR = 1, DRIVER_REPLACE_DONGLE = 2, }DRIVER_STATE; #ifdef CONFIG_INTEL_PROXIM struct proxim { bool proxim_support; bool proxim_on; void *proximity_priv; int (*proxim_rx)(_adapter *padapter, union recv_frame *precv_frame); u8 (*proxim_get_var)(_adapter* padapter, u8 type); }; #endif //CONFIG_INTEL_PROXIM #ifdef CONFIG_MAC_LOOPBACK_DRIVER typedef struct loopbackdata { _sema sema; _thread_hdl_ lbkthread; u8 bstop; u32 cnt; u16 size; u16 txsize; u8 txbuf[0x8000]; u16 rxsize; u8 rxbuf[0x8000]; u8 msg[100]; }LOOPBACKDATA, *PLOOPBACKDATA; #endif struct _ADAPTER{ int DriverState;// for disable driver using module, use dongle to replace module. int pid[3];//process id from UI, 0:wps, 1:hostapd, 2:dhcpcd int bDongle;//build-in module or external dongle u16 chip_type; u16 HardwareType; u16 interface_type;//USB,SDIO,SPI,PCI struct dvobj_priv *dvobj; struct mlme_priv mlmepriv; struct mlme_ext_priv mlmeextpriv; struct cmd_priv cmdpriv; struct evt_priv evtpriv; //struct io_queue *pio_queue; struct io_priv iopriv; struct xmit_priv xmitpriv; struct recv_priv recvpriv; struct sta_priv stapriv; struct security_priv securitypriv; _lock security_key_mutex; // add for CONFIG_IEEE80211W, none 11w also can use struct registry_priv registrypriv; struct eeprom_priv eeprompriv; struct led_priv ledpriv; #ifdef CONFIG_MP_INCLUDED struct mp_priv mppriv; #endif #ifdef CONFIG_DRVEXT_MODULE struct drvext_priv drvextpriv; #endif #ifdef CONFIG_AP_MODE struct hostapd_priv *phostapdpriv; #endif #ifdef CONFIG_IOCTL_CFG80211 #ifdef CONFIG_P2P struct cfg80211_wifidirect_info cfg80211_wdinfo; #endif //CONFIG_P2P #endif //CONFIG_IOCTL_CFG80211 u32 setband; #ifdef CONFIG_P2P struct wifidirect_info wdinfo; #endif //CONFIG_P2P #ifdef CONFIG_TDLS struct tdls_info tdlsinfo; #endif //CONFIG_TDLS #ifdef CONFIG_WAPI_SUPPORT u8 WapiSupport; RT_WAPI_T wapiInfo; #endif #ifdef CONFIG_WFD struct wifi_display_info wfd_info; #endif //CONFIG_WFD PVOID HalData; u32 hal_data_sz; struct hal_ops HalFunc; s32 bDriverStopped; s32 bSurpriseRemoved; s32 bCardDisableWOHSM; u32 IsrContent; u32 ImrContent; u8 EepromAddressSize; u8 hw_init_completed; u8 bDriverIsGoingToUnload; u8 init_adpt_in_progress; u8 bHaltInProgress; #ifdef CONFIG_GPIO_API u8 pre_gpio_pin; #endif _thread_hdl_ cmdThread; _thread_hdl_ evtThread; _thread_hdl_ xmitThread; _thread_hdl_ recvThread; #ifndef PLATFORM_LINUX NDIS_STATUS (*dvobj_init)(struct dvobj_priv *dvobj); void (*dvobj_deinit)(struct dvobj_priv *dvobj); #endif u32 (*intf_init)(struct dvobj_priv *dvobj); void (*intf_deinit)(struct dvobj_priv *dvobj); int (*intf_alloc_irq)(struct dvobj_priv *dvobj); void (*intf_free_irq)(struct dvobj_priv *dvobj); void (*intf_start)(_adapter * adapter); void (*intf_stop)(_adapter * adapter); #ifdef PLATFORM_WINDOWS _nic_hdl hndis_adapter;//hNdisAdapter(NDISMiniportAdapterHandle); _nic_hdl hndis_config;//hNdisConfiguration; NDIS_STRING fw_img; u32 NdisPacketFilter; u8 MCList[MAX_MCAST_LIST_NUM][6]; u32 MCAddrCount; #endif //end of PLATFORM_WINDOWS #ifdef PLATFORM_LINUX _nic_hdl pnetdev; char old_ifname[IFNAMSIZ]; // used by rtw_rereg_nd_name related function struct rereg_nd_name_data { _nic_hdl old_pnetdev; char old_ifname[IFNAMSIZ]; u8 old_ips_mode; u8 old_bRegUseLed; } rereg_nd_name_priv; int bup; struct net_device_stats stats; struct iw_statistics iwstats; struct proc_dir_entry *dir_dev;// for proc directory struct proc_dir_entry *dir_odm; #ifdef CONFIG_IOCTL_CFG80211 struct wireless_dev *rtw_wdev; struct rtw_wdev_priv wdev_data; #endif //CONFIG_IOCTL_CFG80211 #endif //end of PLATFORM_LINUX #ifdef PLATFORM_FREEBSD _nic_hdl pifp; int bup; _lock glock; #endif //PLATFORM_FREEBSD int net_closed; u8 netif_up; u8 bFWReady; u8 bBTFWReady; u8 bLinkInfoDump; u8 bRxRSSIDisplay; // Added by Albert 2012/10/26 // The driver will show up the desired channel number when this flag is 1. u8 bNotifyChannelChange; #ifdef CONFIG_P2P // Added by Albert 2012/12/06 // The driver will show the current P2P status when the upper application reads it. u8 bShowGetP2PState; #endif #ifdef CONFIG_AUTOSUSPEND u8 bDisableAutosuspend; #endif //pbuddy_adapter is used only in two inteface case, (iface_nums=2 in struct dvobj_priv) //PRIMARY_ADAPTER's buddy is SECONDARY_ADAPTER //SECONDARY_ADAPTER's buddy is PRIMARY_ADAPTER //for iface_id > SECONDARY_ADAPTER(IFACE_ID1), refer to padapters[iface_id] in struct dvobj_priv //and their pbuddy_adapter is PRIMARY_ADAPTER. //for PRIMARY_ADAPTER(IFACE_ID0) can directly refer to if1 in struct dvobj_priv _adapter *pbuddy_adapter; #if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_DUALMAC_CONCURRENT) u8 isprimary; //is primary adapter or not //notes: // if isprimary is true, the adapter_type value is 0, iface_id is IFACE_ID0 for PRIMARY_ADAPTER // if isprimary is false, the adapter_type value is 1, iface_id is IFACE_ID1 for SECONDARY_ADAPTER // refer to iface_id if iface_nums>2 and isprimary is false and the adapter_type value is 0xff. u8 adapter_type;//used only in two inteface case(PRIMARY_ADAPTER and SECONDARY_ADAPTER) . u8 iface_type; //interface port type, it depends on HW port #endif //CONFIG_CONCURRENT_MODE || CONFIG_DUALMAC_CONCURRENT //extend to support multi interface //IFACE_ID0 is equals to PRIMARY_ADAPTER //IFACE_ID1 is equals to SECONDARY_ADAPTER u8 iface_id; #ifdef CONFIG_DUALMAC_CONCURRENT u8 DualMacConcurrent; // 1: DMSP 0:DMDP #endif #ifdef CONFIG_BR_EXT _lock br_ext_lock; //unsigned int macclone_completed; struct nat25_network_db_entry *nethash[NAT25_HASH_SIZE]; int pppoe_connection_in_progress; unsigned char pppoe_addr[MACADDRLEN]; unsigned char scdb_mac[MACADDRLEN]; unsigned char scdb_ip[4]; struct nat25_network_db_entry *scdb_entry; unsigned char br_mac[MACADDRLEN]; unsigned char br_ip[4]; struct br_ext_info ethBrExtInfo; #endif // CONFIG_BR_EXT #ifdef CONFIG_INTEL_PROXIM /* intel Proximity, should be alloc mem * in intel Proximity module and can only * be used in intel Proximity mode */ struct proxim proximity; #endif //CONFIG_INTEL_PROXIM #ifdef CONFIG_MAC_LOOPBACK_DRIVER PLOOPBACKDATA ploopback; #endif //for debug purpose u8 fix_rate; u8 driver_vcs_en; //Enable=1, Disable=0 driver control vrtl_carrier_sense for tx u8 driver_vcs_type;//force 0:disable VCS, 1:RTS-CTS, 2:CTS-to-self when vcs_en=1. u8 driver_ampdu_spacing;//driver control AMPDU Density for peer sta's rx u8 driver_rx_ampdu_factor;//0xff: disable drv ctrl, 0:8k, 1:16k, 2:32k, 3:64k; u8 fix_ba_rxbuf_bz; /* 0~127, TODO:consider each sta and each TID */ u8 driver_rx_ampdu_spacing; //driver control Rx AMPDU Density unsigned char in_cta_test; #ifdef CONFIG_DBG_COUNTER struct rx_logs rx_logs; struct tx_logs tx_logs; struct int_logs int_logs; #endif }; #define adapter_to_dvobj(adapter) (adapter->dvobj) #define adapter_to_pwrctl(adapter) (dvobj_to_pwrctl(adapter->dvobj)) #define adapter_wdev_data(adapter) (&((adapter)->wdev_data)) // // Function disabled. // #define DF_TX_BIT BIT0 #define DF_RX_BIT BIT1 #define DF_IO_BIT BIT2 //#define RTW_DISABLE_FUNC(padapter, func) (ATOMIC_ADD(&adapter_to_dvobj(padapter)->disable_func, (func))) //#define RTW_ENABLE_FUNC(padapter, func) (ATOMIC_SUB(&adapter_to_dvobj(padapter)->disable_func, (func))) __inline static void RTW_DISABLE_FUNC(_adapter*padapter, int func_bit) { int df = ATOMIC_READ(&adapter_to_dvobj(padapter)->disable_func); df |= func_bit; ATOMIC_SET(&adapter_to_dvobj(padapter)->disable_func, df); } __inline static void RTW_ENABLE_FUNC(_adapter*padapter, int func_bit) { int df = ATOMIC_READ(&adapter_to_dvobj(padapter)->disable_func); df &= ~(func_bit); ATOMIC_SET(&adapter_to_dvobj(padapter)->disable_func, df); } #define RTW_IS_FUNC_DISABLED(padapter, func_bit) (ATOMIC_READ(&adapter_to_dvobj(padapter)->disable_func) & (func_bit)) #define RTW_CANNOT_IO(padapter) \ ((padapter)->bSurpriseRemoved || \ RTW_IS_FUNC_DISABLED((padapter), DF_IO_BIT)) #define RTW_CANNOT_RX(padapter) \ ((padapter)->bDriverStopped || \ (padapter)->bSurpriseRemoved || \ RTW_IS_FUNC_DISABLED((padapter), DF_RX_BIT)) #define RTW_CANNOT_TX(padapter) \ ((padapter)->bDriverStopped || \ (padapter)->bSurpriseRemoved || \ RTW_IS_FUNC_DISABLED((padapter), DF_TX_BIT)) int rtw_handle_dualmac(_adapter *adapter, bool init); #ifdef CONFIG_PNO_SUPPORT int rtw_parse_ssid_list_tlv(char** list_str, pno_ssid_t* ssid, int max, int *bytes_left); int rtw_dev_pno_set(struct net_device *net, pno_ssid_t* ssid, int num, int pno_time, int pno_repeat, int pno_freq_expo_max); #ifdef CONFIG_PNO_SET_DEBUG void rtw_dev_pno_debug(struct net_device *net); #endif //CONFIG_PNO_SET_DEBUG #endif //CONFIG_PNO_SUPPORT #ifdef CONFIG_WOWLAN int rtw_suspend_wow(_adapter *padapter); int rtw_resume_process_wow(_adapter *padapter); #endif __inline static u8 *myid(struct eeprom_priv *peepriv) { return (peepriv->mac_addr); } // HCI Related header file #ifdef CONFIG_USB_HCI #include #include #include #endif #ifdef CONFIG_SDIO_HCI #include #include #include #endif #ifdef CONFIG_GSPI_HCI #include #include #include #endif #ifdef CONFIG_PCI_HCI #include #include #include #endif #ifdef CONFIG_BT_COEXIST #include #endif // CONFIG_BT_COEXIST #endif //__DRV_TYPES_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/drv_types_ce.h000066400000000000000000000052611261122257400217650ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __DRV_TYPES_CE_H__ #define __DRV_TYPES_CE_H__ #include #include #include #define MAX_ACTIVE_REG_PATH 256 #define MAX_MCAST_LIST_NUM 32 //for ioctl #define MAKE_DRIVER_VERSION(_MainVer,_MinorVer) ((((u32)(_MainVer))<<16)+_MinorVer) #define NIC_HEADER_SIZE 14 //!< can be moved to typedef.h #define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h #define NIC_MAX_SEND_PACKETS 10 // max number of send packets the MiniportSendPackets function can accept, can be moved to typedef.h #define NIC_VENDOR_DRIVER_VERSION MAKE_DRIVER_VERSION(0,001) //!< can be moved to typedef.h #define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h typedef struct _MP_REG_ENTRY { NDIS_STRING RegName; // variable name text BOOLEAN bRequired; // 1 -> required, 0 -> optional u8 Type; // NdisParameterInteger/NdisParameterHexInteger/NdisParameterStringle/NdisParameterMultiString uint FieldOffset; // offset to MP_ADAPTER field uint FieldSize; // size (in bytes) of the field #ifdef UNDER_AMD64 u64 Default; #else u32 Default; // default value to use #endif u32 Min; // minimum value allowed u32 Max; // maximum value allowed } MP_REG_ENTRY, *PMP_REG_ENTRY; #ifdef CONFIG_USB_HCI typedef struct _USB_EXTENSION { LPCUSB_FUNCS _lpUsbFuncs; USB_HANDLE _hDevice; PVOID pAdapter; #if 0 USB_ENDPOINT_DESCRIPTOR _endpACLIn; USB_ENDPOINT_DESCRIPTOR _endpACLOutHigh; USB_ENDPOINT_DESCRIPTOR _endpACLOutNormal; USB_PIPE pPipeIn; USB_PIPE pPipeOutNormal; USB_PIPE pPipeOutHigh; #endif } USB_EXTENSION, *PUSB_EXTENSION; #endif typedef struct _OCTET_STRING{ u8 *Octet; u16 Length; } OCTET_STRING, *POCTET_STRING; #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/drv_types_gspi.h000066400000000000000000000031611261122257400223350ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __DRV_TYPES_GSPI_H__ #define __DRV_TYPES_GSPI_H__ // SPI Header Files #ifdef PLATFORM_LINUX #include #include #include //#include #include #include #include #include #include #include #include #endif typedef struct gspi_data { u8 func_number; u8 tx_block_mode; u8 rx_block_mode; u32 block_transfer_len; #ifdef PLATFORM_LINUX struct spi_device *func; struct workqueue_struct *priv_wq; struct delayed_work irq_work; #endif } GSPI_DATA, *PGSPI_DATA; #endif // #ifndef __DRV_TYPES_GSPI_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/drv_types_linux.h000066400000000000000000000017521261122257400225360ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __DRV_TYPES_LINUX_H__ #define __DRV_TYPES_LINUX_H__ #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/drv_types_pci.h000066400000000000000000000201211261122257400221410ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __DRV_TYPES_PCI_H__ #define __DRV_TYPES_PCI_H__ #ifdef PLATFORM_LINUX #include #endif #define INTEL_VENDOR_ID 0x8086 #define SIS_VENDOR_ID 0x1039 #define ATI_VENDOR_ID 0x1002 #define ATI_DEVICE_ID 0x7914 #define AMD_VENDOR_ID 0x1022 #define PCI_MAX_BRIDGE_NUMBER 255 #define PCI_MAX_DEVICES 32 #define PCI_MAX_FUNCTION 8 #define PCI_CONF_ADDRESS 0x0CF8 // PCI Configuration Space Address #define PCI_CONF_DATA 0x0CFC // PCI Configuration Space Data #define PCI_CLASS_BRIDGE_DEV 0x06 #define PCI_SUBCLASS_BR_PCI_TO_PCI 0x04 #define PCI_CAPABILITY_ID_PCI_EXPRESS 0x10 #define U1DONTCARE 0xFF #define U2DONTCARE 0xFFFF #define U4DONTCARE 0xFFFFFFFF #define PCI_VENDER_ID_REALTEK 0x10ec #define HAL_HW_PCI_8180_DEVICE_ID 0x8180 #define HAL_HW_PCI_8185_DEVICE_ID 0x8185 //8185 or 8185b #define HAL_HW_PCI_8188_DEVICE_ID 0x8188 //8185b #define HAL_HW_PCI_8198_DEVICE_ID 0x8198 //8185b #define HAL_HW_PCI_8190_DEVICE_ID 0x8190 //8190 #define HAL_HW_PCI_8723E_DEVICE_ID 0x8723 //8723E #define HAL_HW_PCI_8192_DEVICE_ID 0x8192 //8192 PCI-E #define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192 //8192 SE #define HAL_HW_PCI_8174_DEVICE_ID 0x8174 //8192 SE #define HAL_HW_PCI_8173_DEVICE_ID 0x8173 //8191 SE Crab #define HAL_HW_PCI_8172_DEVICE_ID 0x8172 //8191 SE RE #define HAL_HW_PCI_8171_DEVICE_ID 0x8171 //8191 SE Unicron #define HAL_HW_PCI_0045_DEVICE_ID 0x0045 //8190 PCI for Ceraga #define HAL_HW_PCI_0046_DEVICE_ID 0x0046 //8190 Cardbus for Ceraga #define HAL_HW_PCI_0044_DEVICE_ID 0x0044 //8192e PCIE for Ceraga #define HAL_HW_PCI_0047_DEVICE_ID 0x0047 //8192e Express Card for Ceraga #define HAL_HW_PCI_700F_DEVICE_ID 0x700F #define HAL_HW_PCI_701F_DEVICE_ID 0x701F #define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304 #define HAL_HW_PCI_8192CET_DEVICE_ID 0x8191 //8192ce #define HAL_HW_PCI_8192CE_DEVICE_ID 0x8178 //8192ce #define HAL_HW_PCI_8191CE_DEVICE_ID 0x8177 //8192ce #define HAL_HW_PCI_8188CE_DEVICE_ID 0x8176 //8192ce #define HAL_HW_PCI_8192CU_DEVICE_ID 0x8191 //8192ce #define HAL_HW_PCI_8192DE_DEVICE_ID 0x8193 //8192de #define HAL_HW_PCI_002B_DEVICE_ID 0x002B //8192de, provided by HW SD #define HAL_HW_PCI_8188EE_DEVICE_ID 0x8179 #define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000 //8190 support 16 pages of IO registers #define HAL_HW_PCI_REVISION_ID_8190PCI 0x00 #define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000 //8192 support 16 pages of IO registers #define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01 #define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000 //8192 support 16 pages of IO registers #define HAL_HW_PCI_REVISION_ID_8192SE 0x10 #define HAL_HW_PCI_REVISION_ID_8192CE 0x1 #define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000 //8192 support 16 pages of IO registers #define HAL_HW_PCI_REVISION_ID_8192DE 0x0 #define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000 //8192 support 16 pages of IO registers enum pci_bridge_vendor { PCI_BRIDGE_VENDOR_INTEL = 0x0,//0b'0000,0001 PCI_BRIDGE_VENDOR_ATI, //= 0x02,//0b'0000,0010 PCI_BRIDGE_VENDOR_AMD, //= 0x04,//0b'0000,0100 PCI_BRIDGE_VENDOR_SIS ,//= 0x08,//0b'0000,1000 PCI_BRIDGE_VENDOR_UNKNOWN, //= 0x40,//0b'0100,0000 PCI_BRIDGE_VENDOR_MAX ,//= 0x80 } ; // copy this data structor defination from MSDN SDK typedef struct _PCI_COMMON_CONFIG { u16 VendorID; u16 DeviceID; u16 Command; u16 Status; u8 RevisionID; u8 ProgIf; u8 SubClass; u8 BaseClass; u8 CacheLineSize; u8 LatencyTimer; u8 HeaderType; u8 BIST; union { struct _PCI_HEADER_TYPE_0 { u32 BaseAddresses[6]; u32 CIS; u16 SubVendorID; u16 SubSystemID; u32 ROMBaseAddress; u8 CapabilitiesPtr; u8 Reserved1[3]; u32 Reserved2; u8 InterruptLine; u8 InterruptPin; u8 MinimumGrant; u8 MaximumLatency; } type0; #if 0 struct _PCI_HEADER_TYPE_1 { ULONG BaseAddresses[PCI_TYPE1_ADDRESSES]; UCHAR PrimaryBusNumber; UCHAR SecondaryBusNumber; UCHAR SubordinateBusNumber; UCHAR SecondaryLatencyTimer; UCHAR IOBase; UCHAR IOLimit; USHORT SecondaryStatus; USHORT MemoryBase; USHORT MemoryLimit; USHORT PrefetchableMemoryBase; USHORT PrefetchableMemoryLimit; ULONG PrefetchableMemoryBaseUpper32; ULONG PrefetchableMemoryLimitUpper32; USHORT IOBaseUpper; USHORT IOLimitUpper; ULONG Reserved2; ULONG ExpansionROMBase; UCHAR InterruptLine; UCHAR InterruptPin; USHORT BridgeControl; } type1; struct _PCI_HEADER_TYPE_2 { ULONG BaseAddress; UCHAR CapabilitiesPtr; UCHAR Reserved2; USHORT SecondaryStatus; UCHAR PrimaryBusNumber; UCHAR CardbusBusNumber; UCHAR SubordinateBusNumber; UCHAR CardbusLatencyTimer; ULONG MemoryBase0; ULONG MemoryLimit0; ULONG MemoryBase1; ULONG MemoryLimit1; USHORT IOBase0_LO; USHORT IOBase0_HI; USHORT IOLimit0_LO; USHORT IOLimit0_HI; USHORT IOBase1_LO; USHORT IOBase1_HI; USHORT IOLimit1_LO; USHORT IOLimit1_HI; UCHAR InterruptLine; UCHAR InterruptPin; USHORT BridgeControl; USHORT SubVendorID; USHORT SubSystemID; ULONG LegacyBaseAddress; UCHAR Reserved3[56]; ULONG SystemControl; UCHAR MultiMediaControl; UCHAR GeneralStatus; UCHAR Reserved4[2]; UCHAR GPIO0Control; UCHAR GPIO1Control; UCHAR GPIO2Control; UCHAR GPIO3Control; ULONG IRQMuxRouting; UCHAR RetryStatus; UCHAR CardControl; UCHAR DeviceControl; UCHAR Diagnostic; } type2; #endif } u; u8 DeviceSpecific[108]; } PCI_COMMON_CONFIG , *PPCI_COMMON_CONFIG; typedef struct _RT_PCI_CAPABILITIES_HEADER { u8 CapabilityID; u8 Next; } RT_PCI_CAPABILITIES_HEADER, *PRT_PCI_CAPABILITIES_HEADER; struct pci_priv{ BOOLEAN pci_clk_req; u8 pciehdr_offset; // PCIeCap is only differece between B-cut and C-cut. // Configuration Space offset 72[7:4] // 0: A/B cut // 1: C cut and later. u8 pcie_cap; u8 linkctrl_reg; u8 busnumber; u8 devnumber; u8 funcnumber; u8 pcibridge_busnum; u8 pcibridge_devnum; u8 pcibridge_funcnum; u8 pcibridge_vendor; u16 pcibridge_vendorid; u16 pcibridge_deviceid; u8 pcibridge_pciehdr_offset; u8 pcibridge_linkctrlreg; u8 amd_l1_patch; }; typedef struct _RT_ISR_CONTENT { union{ u32 IntArray[2]; u32 IntReg4Byte; u16 IntReg2Byte; }; }RT_ISR_CONTENT, *PRT_ISR_CONTENT; //#define RegAddr(addr) (addr + 0xB2000000UL) //some platform macros will def here static inline void NdisRawWritePortUlong(u32 port, u32 val) { outl(val, port); //writel(val, (u8 *)RegAddr(port)); } static inline void NdisRawWritePortUchar(u32 port, u8 val) { outb(val, port); //writeb(val, (u8 *)RegAddr(port)); } static inline void NdisRawReadPortUchar(u32 port, u8 *pval) { *pval = inb(port); //*pval = readb((u8 *)RegAddr(port)); } static inline void NdisRawReadPortUshort(u32 port, u16 *pval) { *pval = inw(port); //*pval = readw((u8 *)RegAddr(port)); } static inline void NdisRawReadPortUlong(u32 port, u32 *pval) { *pval = inl(port); //*pval = readl((u8 *)RegAddr(port)); } #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/drv_types_sdio.h000066400000000000000000000043031261122257400223300ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __DRV_TYPES_SDIO_H__ #define __DRV_TYPES_SDIO_H__ // SDIO Header Files #ifdef PLATFORM_LINUX #include #include #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_PLATFORM_SPRD) #include #include #endif #ifdef CONFIG_PLATFORM_SPRD #include #include #endif // CONFIG_PLATFORM_SPRD #endif #ifdef PLATFORM_OS_XP #include #include #endif #ifdef PLATFORM_OS_CE #include #endif typedef struct sdio_data { u8 func_number; u8 tx_block_mode; u8 rx_block_mode; u32 block_transfer_len; #ifdef PLATFORM_LINUX struct sdio_func *func; _thread_hdl_ sys_sdio_irq_thd; #endif #ifdef PLATFORM_OS_XP PDEVICE_OBJECT pphysdevobj; PDEVICE_OBJECT pfuncdevobj; PDEVICE_OBJECT pnextdevobj; SDBUS_INTERFACE_STANDARD sdbusinft; u8 nextdevstacksz; #endif #ifdef PLATFORM_OS_CE SD_DEVICE_HANDLE hDevice; SD_CARD_RCA sd_rca; SD_CARD_INTERFACE card_intf; BOOLEAN enableIsarWithStatus; WCHAR active_path[MAX_ACTIVE_REG_PATH]; SD_HOST_BLOCK_CAPABILITY sd_host_blk_cap; #endif } SDIO_DATA, *PSDIO_DATA; #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/drv_types_xp.h000066400000000000000000000053011261122257400220200ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __DRV_TYPES_XP_H__ #define __DRV_TYPES_XP_H__ #include #include #define MAX_MCAST_LIST_NUM 32 //for ioctl #define MAKE_DRIVER_VERSION(_MainVer,_MinorVer) ((((u32)(_MainVer))<<16)+_MinorVer) #define NIC_HEADER_SIZE 14 //!< can be moved to typedef.h #define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h #define NIC_MAX_SEND_PACKETS 10 // max number of send packets the MiniportSendPackets function can accept, can be moved to typedef.h #define NIC_VENDOR_DRIVER_VERSION MAKE_DRIVER_VERSION(0,001) //!< can be moved to typedef.h #define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h #undef ON_VISTA //added by Jackson #ifndef ON_VISTA // // Bus driver versions // #define SDBUS_DRIVER_VERSION_1 0x100 #define SDBUS_DRIVER_VERSION_2 0x200 #define SDP_FUNCTION_TYPE 4 #define SDP_BUS_DRIVER_VERSION 5 #define SDP_BUS_WIDTH 6 #define SDP_BUS_CLOCK 7 #define SDP_BUS_INTERFACE_CONTROL 8 #define SDP_HOST_BLOCK_LENGTH 9 #define SDP_FUNCTION_BLOCK_LENGTH 10 #define SDP_FN0_BLOCK_LENGTH 11 #define SDP_FUNCTION_INT_ENABLE 12 #endif typedef struct _MP_REG_ENTRY { NDIS_STRING RegName; // variable name text BOOLEAN bRequired; // 1 -> required, 0 -> optional u8 Type; // NdisParameterInteger/NdisParameterHexInteger/NdisParameterStringle/NdisParameterMultiString uint FieldOffset; // offset to MP_ADAPTER field uint FieldSize; // size (in bytes) of the field #ifdef UNDER_AMD64 u64 Default; #else u32 Default; // default value to use #endif u32 Min; // minimum value allowed u32 Max; // maximum value allowed } MP_REG_ENTRY, *PMP_REG_ENTRY; typedef struct _OCTET_STRING{ u8 *Octet; u16 Length; } OCTET_STRING, *POCTET_STRING; #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/ethernet.h000066400000000000000000000035331261122257400211150ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ /*! \file */ #ifndef __INC_ETHERNET_H #define __INC_ETHERNET_H #define ETHERNET_ADDRESS_LENGTH 6 //!< Ethernet Address Length #define ETHERNET_HEADER_SIZE 14 //!< Ethernet Header Length #define LLC_HEADER_SIZE 6 //!< LLC Header Length #define TYPE_LENGTH_FIELD_SIZE 2 //!< Type/Length Size #define MINIMUM_ETHERNET_PACKET_SIZE 60 //!< Minimum Ethernet Packet Size #define MAXIMUM_ETHERNET_PACKET_SIZE 1514 //!< Maximum Ethernet Packet Size #define RT_ETH_IS_MULTICAST(_pAddr) ((((UCHAR *)(_pAddr))[0]&0x01)!=0) //!< Is Multicast Address? #define RT_ETH_IS_BROADCAST(_pAddr) ( \ ((UCHAR *)(_pAddr))[0]==0xff && \ ((UCHAR *)(_pAddr))[1]==0xff && \ ((UCHAR *)(_pAddr))[2]==0xff && \ ((UCHAR *)(_pAddr))[3]==0xff && \ ((UCHAR *)(_pAddr))[4]==0xff && \ ((UCHAR *)(_pAddr))[5]==0xff ) //!< Is Broadcast Address? #endif // #ifndef __INC_ETHERNET_H rtl8812au-4.3.8.12175.20140902+dfsg/include/gspi_hal.h000066400000000000000000000024161261122257400210640ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __GSPI_HAL_H__ #define __GSPI_HAL_H__ void spi_int_dpc(PADAPTER padapter, u32 sdio_hisr); void rtw_set_hal_ops(_adapter *padapter); #ifdef CONFIG_RTL8723A void rtl8723as_set_hal_ops(PADAPTER padapter); #endif #ifdef CONFIG_RTL8188E void rtl8188es_set_hal_ops(PADAPTER padapter); #endif #ifdef CONFIG_RTL8723B void rtl8723bs_set_hal_ops(PADAPTER padapter); #endif #endif //__GSPI_HAL_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/gspi_ops.h000066400000000000000000000200401261122257400211120ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __GSPI_OPS_H__ #define __GSPI_OPS_H__ /* follwing defination is based on * GSPI spec of RTL8723, we temp * suppose that it will be the same * for diff chips of GSPI, if not * we should move it to HAL folder */ #define SPI_LOCAL_DOMAIN 0x0 #define WLAN_IOREG_DOMAIN 0x8 #define FW_FIFO_DOMAIN 0x4 #define TX_HIQ_DOMAIN 0xc #define TX_MIQ_DOMAIN 0xd #define TX_LOQ_DOMAIN 0xe #define RX_RXFIFO_DOMAIN 0x1f //IO Bus domain address mapping #define DEFUALT_OFFSET 0x0 #define SPI_LOCAL_OFFSET 0x10250000 #define WLAN_IOREG_OFFSET 0x10260000 #define FW_FIFO_OFFSET 0x10270000 #define TX_HIQ_OFFSET 0x10310000 #define TX_MIQ_OFFSET 0x1032000 #define TX_LOQ_OFFSET 0x10330000 #define RX_RXOFF_OFFSET 0x10340000 //SPI Local registers #define SPI_REG_TX_CTRL 0x0000 // SPI Tx Control #define SPI_REG_STATUS_RECOVERY 0x0004 #define SPI_REG_INT_TIMEOUT 0x0006 #define SPI_REG_HIMR 0x0014 // SPI Host Interrupt Mask #define SPI_REG_HISR 0x0018 // SPI Host Interrupt Service Routine #define SPI_REG_RX0_REQ_LEN 0x001C // RXDMA Request Length #define SPI_REG_FREE_TXPG 0x0020 // Free Tx Buffer Page #define SPI_REG_HCPWM1 0x0024 // HCI Current Power Mode 1 #define SPI_REG_HCPWM2 0x0026 // HCI Current Power Mode 2 #define SPI_REG_HTSFR_INFO 0x0030 // HTSF Informaion #define SPI_REG_HRPWM1 0x0080 // HCI Request Power Mode 1 #define SPI_REG_HRPWM2 0x0082 // HCI Request Power Mode 2 #define SPI_REG_HPS_CLKR 0x0084 // HCI Power Save Clock #define SPI_REG_HSUS_CTRL 0x0086 // SPI HCI Suspend Control #define SPI_REG_HIMR_ON 0x0090 //SPI Host Extension Interrupt Mask Always #define SPI_REG_HISR_ON 0x0091 //SPI Host Extension Interrupt Status Always #define SPI_REG_CFG 0x00F0 //SPI Configuration Register #define SPI_TX_CTRL (SPI_REG_TX_CTRL |SPI_LOCAL_OFFSET) #define SPI_STATUS_RECOVERY (SPI_REG_STATUS_RECOVERY |SPI_LOCAL_OFFSET) #define SPI_INT_TIMEOUT (SPI_REG_INT_TIMEOUT |SPI_LOCAL_OFFSET) #define SPI_HIMR (SPI_REG_HIMR |SPI_LOCAL_OFFSET) #define SPI_HISR (SPI_REG_HISR |SPI_LOCAL_OFFSET) #define SPI_RX0_REQ_LEN_1_BYTE (SPI_REG_RX0_REQ_LEN |SPI_LOCAL_OFFSET) #define SPI_FREE_TXPG (SPI_REG_FREE_TXPG |SPI_LOCAL_OFFSET) #define SPI_HIMR_DISABLED 0 //SPI HIMR MASK diff with SDIO #define SPI_HISR_RX_REQUEST BIT(0) #define SPI_HISR_AVAL BIT(1) #define SPI_HISR_TXERR BIT(2) #define SPI_HISR_RXERR BIT(3) #define SPI_HISR_TXFOVW BIT(4) #define SPI_HISR_RXFOVW BIT(5) #define SPI_HISR_TXBCNOK BIT(6) #define SPI_HISR_TXBCNERR BIT(7) #define SPI_HISR_BCNERLY_INT BIT(16) #define SPI_HISR_ATIMEND BIT(17) #define SPI_HISR_ATIMEND_E BIT(18) #define SPI_HISR_CTWEND BIT(19) #define SPI_HISR_C2HCMD BIT(20) #define SPI_HISR_CPWM1 BIT(21) #define SPI_HISR_CPWM2 BIT(22) #define SPI_HISR_HSISR_IND BIT(23) #define SPI_HISR_GTINT3_IND BIT(24) #define SPI_HISR_GTINT4_IND BIT(25) #define SPI_HISR_PSTIMEOUT BIT(26) #define SPI_HISR_OCPINT BIT(27) #define SPI_HISR_TSF_BIT32_TOGGLE BIT(29) #define MASK_SPI_HISR_CLEAR (SPI_HISR_TXERR |\ SPI_HISR_RXERR |\ SPI_HISR_TXFOVW |\ SPI_HISR_RXFOVW |\ SPI_HISR_TXBCNOK |\ SPI_HISR_TXBCNERR |\ SPI_HISR_C2HCMD |\ SPI_HISR_CPWM1 |\ SPI_HISR_CPWM2 |\ SPI_HISR_HSISR_IND |\ SPI_HISR_GTINT3_IND |\ SPI_HISR_GTINT4_IND |\ SPI_HISR_PSTIMEOUT |\ SPI_HISR_OCPINT) #define REG_LEN_FORMAT(pcmd, x) SET_BITS_TO_LE_4BYTE(pcmd, 0, 8, x)//(x<<(unsigned int)24) #define REG_ADDR_FORMAT(pcmd,x) SET_BITS_TO_LE_4BYTE(pcmd, 8, 16, x)//(x<<(unsigned int)16) #define REG_DOMAIN_ID_FORMAT(pcmd,x) SET_BITS_TO_LE_4BYTE(pcmd, 24, 5, x)//(x<<(unsigned int)0) #define REG_FUN_FORMAT(pcmd,x) SET_BITS_TO_LE_4BYTE(pcmd, 29, 2, x)//(x<<(unsigned int)5) #define REG_RW_FORMAT(pcmd,x) SET_BITS_TO_LE_4BYTE(pcmd, 31, 1, x)//(x<<(unsigned int)7) #define FIFO_LEN_FORMAT(pcmd, x) SET_BITS_TO_LE_4BYTE(pcmd, 0, 16, x)//(x<<(unsigned int)24) //#define FIFO_ADDR_FORMAT(pcmd,x) SET_BITS_TO_LE_4BYTE(pcmd, 8, 16, x)//(x<<(unsigned int)16) #define FIFO_DOMAIN_ID_FORMAT(pcmd,x) SET_BITS_TO_LE_4BYTE(pcmd, 24, 5, x)//(x<<(unsigned int)0) #define FIFO_FUN_FORMAT(pcmd,x) SET_BITS_TO_LE_4BYTE(pcmd, 29, 2, x)//(x<<(unsigned int)5) #define FIFO_RW_FORMAT(pcmd,x) SET_BITS_TO_LE_4BYTE(pcmd, 31, 1, x)//(x<<(unsigned int)7) //get status dword0 #define GET_STATUS_PUB_PAGE_NUM(status) LE_BITS_TO_4BYTE(status, 24, 8) #define GET_STATUS_HI_PAGE_NUM(status) LE_BITS_TO_4BYTE(status, 18, 6) #define GET_STATUS_MID_PAGE_NUM(status) LE_BITS_TO_4BYTE(status, 12, 6) #define GET_STATUS_LOW_PAGE_NUM(status) LE_BITS_TO_4BYTE(status, 6, 6) #define GET_STATUS_HISR_HI6BIT(status) LE_BITS_TO_4BYTE(status, 0, 6) //get status dword1 #define GET_STATUS_HISR_MID8BIT(status) LE_BITS_TO_4BYTE(status + 4, 24, 8) #define GET_STATUS_HISR_LOW8BIT(status) LE_BITS_TO_4BYTE(status + 4, 16, 8) #define GET_STATUS_ERROR(status) LE_BITS_TO_4BYTE(status + 4, 17, 1) #define GET_STATUS_INT(status) LE_BITS_TO_4BYTE(status + 4, 16, 1) #define GET_STATUS_RX_LENGTH(status) LE_BITS_TO_4BYTE(status + 4, 0, 16) #define RXDESC_SIZE 24 struct spi_more_data { unsigned long more_data; unsigned long len; }; #ifdef CONFIG_RTL8723A void rtl8723as_set_hal_ops(PADAPTER padapter); #define set_hal_ops rtl8723as_set_hal_ops #endif #ifdef CONFIG_RTL8188E void rtl8188es_set_hal_ops(PADAPTER padapter); #define set_hal_ops rtl8188es_set_hal_ops #endif extern void spi_set_chip_endian(PADAPTER padapter); extern unsigned int spi_write8_endian(ADAPTER *Adapter, unsigned int addr, unsigned int buf, u32 big); extern void spi_set_intf_ops(_adapter *padapter,struct _io_ops *pops); extern void spi_set_chip_endian(PADAPTER padapter); extern void InitInterrupt8723ASdio(PADAPTER padapter); extern void InitSysInterrupt8723ASdio(PADAPTER padapter); extern void EnableInterrupt8723ASdio(PADAPTER padapter); extern void DisableInterrupt8723ASdio(PADAPTER padapter); extern void spi_int_hdl(PADAPTER padapter); extern u8 HalQueryTxBufferStatus8723ASdio(PADAPTER padapter); #ifdef CONFIG_RTL8723B extern void InitInterrupt8723BSdio(PADAPTER padapter); extern void InitSysInterrupt8723BSdio(PADAPTER padapter); extern void EnableInterrupt8723BSdio(PADAPTER padapter); extern void DisableInterrupt8723BSdio(PADAPTER padapter); extern u8 HalQueryTxBufferStatus8723BSdio(PADAPTER padapter); #endif #ifdef CONFIG_RTL8188E extern void InitInterrupt8188EGspi(PADAPTER padapter); extern void EnableInterrupt8188EGspi(PADAPTER padapter); extern void DisableInterrupt8188EGspi(PADAPTER padapter); extern void UpdateInterruptMask8188EGspi(PADAPTER padapter, u32 AddMSR, u32 RemoveMSR); extern u8 HalQueryTxBufferStatus8189EGspi(PADAPTER padapter); extern u8 HalQueryTxOQTBufferStatus8189EGspi(PADAPTER padapter); extern void ClearInterrupt8188EGspi(PADAPTER padapter); extern u8 CheckIPSStatus(PADAPTER padapter); #endif // CONFIG_RTL8188E #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) extern u8 RecvOnePkt(PADAPTER padapter, u32 size); #endif // CONFIG_WOWLAN #endif //__GSPI_OPS_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/gspi_ops_linux.h000066400000000000000000000016771261122257400223500ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __SDIO_OPS_LINUX_H__ #define __SDIO_OPS_LINUX_H__ #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/gspi_osintf.h000066400000000000000000000022151261122257400216170ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __SDIO_OSINTF_H__ #define __SDIO_OSINTF_H__ #ifdef PLATFORM_OS_CE extern NDIS_STATUS ce_sd_get_dev_hdl(PADAPTER padapter); SD_API_STATUS ce_sd_int_callback(SD_DEVICE_HANDLE hDevice, PADAPTER padapter); extern void sd_setup_irs(PADAPTER padapter); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/h2clbk.h000066400000000000000000000021471261122257400204440ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _H2CLBK_H_ void _lbk_cmd(PADAPTER Adapter); void _lbk_rsp(PADAPTER Adapter); void _lbk_evt(IN PADAPTER Adapter); void h2c_event_callback(unsigned char *dev, unsigned char *pbuf); rtl8812au-4.3.8.12175.20140902+dfsg/include/hal_btcoex.h000066400000000000000000000070251261122257400214070ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HAL_BTCOEX_H__ #define __HAL_BTCOEX_H__ #include // Some variables can't get from outsrc BT-Coex, // so we need to save here typedef struct _BT_COEXIST { u8 bBtExist; u8 btTotalAntNum; u8 btChipType; u8 bInitlized; u8 btAntisolation; } BT_COEXIST, *PBT_COEXIST; void DBG_BT_INFO(u8 *dbgmsg); void hal_btcoex_SetBTCoexist(PADAPTER padapter, u8 bBtExist); u8 hal_btcoex_IsBtExist(PADAPTER padapter); u8 hal_btcoex_IsBtDisabled(PADAPTER); void hal_btcoex_SetChipType(PADAPTER padapter, u8 chipType); u8 hal_btcoex_GetChipType(PADAPTER padapter); void hal_btcoex_SetPgAntNum(PADAPTER padapter, u8 antNum); u8 hal_btcoex_GetPgAntNum(PADAPTER padapter); void hal_btcoex_SetSingleAntPath(PADAPTER padapter, u8 singleAntPath); u8 hal_btcoex_Initialize(PADAPTER padapter); void hal_btcoex_PowerOnSetting(PADAPTER padapter); void hal_btcoex_PreLoadFirmware(PADAPTER padapter); void hal_btcoex_InitHwConfig(PADAPTER padapter, u8 bWifiOnly); void hal_btcoex_IpsNotify(PADAPTER padapter, u8 type); void hal_btcoex_LpsNotify(PADAPTER padapter, u8 type); void hal_btcoex_ScanNotify(PADAPTER padapter, u8 type); void hal_btcoex_ConnectNotify(PADAPTER padapter, u8 action); void hal_btcoex_MediaStatusNotify(PADAPTER padapter, u8 mediaStatus); void hal_btcoex_SpecialPacketNotify(PADAPTER padapter, u8 pktType); void hal_btcoex_IQKNotify(PADAPTER padapter, u8 state); void hal_btcoex_BtInfoNotify(PADAPTER padapter, u8 length, u8 *tmpBuf); void hal_btcoex_SuspendNotify(PADAPTER padapter, u8 state); void hal_btcoex_HaltNotify(PADAPTER padapter); void hal_btcoex_SwitchBtTRxMask(PADAPTER padapter); void hal_btcoex_Hanlder(PADAPTER padapter); s32 hal_btcoex_IsBTCoexCtrlAMPDUSize(PADAPTER padapter); u32 hal_btcoex_GetAMPDUSize(PADAPTER padapter); void hal_btcoex_SetManualControl(PADAPTER padapter, u8 bmanual); u8 hal_btcoex_1Ant(PADAPTER padapter); u8 hal_btcoex_IsBtControlLps(PADAPTER); u8 hal_btcoex_IsLpsOn(PADAPTER); u8 hal_btcoex_RpwmVal(PADAPTER); u8 hal_btcoex_LpsVal(PADAPTER); u32 hal_btcoex_GetRaMask(PADAPTER); void hal_btcoex_RecordPwrMode(PADAPTER padapter, u8 *pCmdBuf, u8 cmdLen); void hal_btcoex_DisplayBtCoexInfo(PADAPTER, u8 *pbuf, u32 bufsize); void hal_btcoex_SetDBG(PADAPTER, u32 *pDbgModule); u32 hal_btcoex_GetDBG(PADAPTER, u8 *pStrBuf, u32 bufSize); u8 hal_btcoex_IncreaseScanDeviceNum(PADAPTER); u8 hal_btcoex_IsBtLinkExist(PADAPTER); void hal_btcoex_SetAntIsolationType(PADAPTER padapter, u8 anttype); #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE int hal_btcoex_AntIsolationConfig_ParaFile(IN PADAPTER Adapter,IN char* pFileName); int hal_btcoex_ParseAntIsolationConfigFile(PADAPTER Adapter, char* buffer); #endif // CONFIG_LOAD_PHY_PARA_FROM_FILE #endif // !__HAL_BTCOEX_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/hal_com.h000066400000000000000000000260311261122257400206770ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HAL_COMMON_H__ #define __HAL_COMMON_H__ #include "HalVerDef.h" #include "hal_pg.h" #include "hal_phy.h" #include "hal_phy_reg.h" #include "hal_com_reg.h" #include "hal_com_phycfg.h" /*------------------------------ Tx Desc definition Macro ------------------------*/ //#pragma mark -- Tx Desc related definition. -- //---------------------------------------------------------------------------- //----------------------------------------------------------- // Rate //----------------------------------------------------------- // CCK Rates, TxHT = 0 #define DESC_RATE1M 0x00 #define DESC_RATE2M 0x01 #define DESC_RATE5_5M 0x02 #define DESC_RATE11M 0x03 // OFDM Rates, TxHT = 0 #define DESC_RATE6M 0x04 #define DESC_RATE9M 0x05 #define DESC_RATE12M 0x06 #define DESC_RATE18M 0x07 #define DESC_RATE24M 0x08 #define DESC_RATE36M 0x09 #define DESC_RATE48M 0x0a #define DESC_RATE54M 0x0b // MCS Rates, TxHT = 1 #define DESC_RATEMCS0 0x0c #define DESC_RATEMCS1 0x0d #define DESC_RATEMCS2 0x0e #define DESC_RATEMCS3 0x0f #define DESC_RATEMCS4 0x10 #define DESC_RATEMCS5 0x11 #define DESC_RATEMCS6 0x12 #define DESC_RATEMCS7 0x13 #define DESC_RATEMCS8 0x14 #define DESC_RATEMCS9 0x15 #define DESC_RATEMCS10 0x16 #define DESC_RATEMCS11 0x17 #define DESC_RATEMCS12 0x18 #define DESC_RATEMCS13 0x19 #define DESC_RATEMCS14 0x1a #define DESC_RATEMCS15 0x1b #define DESC_RATEMCS16 0x1C #define DESC_RATEMCS17 0x1D #define DESC_RATEMCS18 0x1E #define DESC_RATEMCS19 0x1F #define DESC_RATEMCS20 0x20 #define DESC_RATEMCS21 0x21 #define DESC_RATEMCS22 0x22 #define DESC_RATEMCS23 0x23 #define DESC_RATEMCS24 0x24 #define DESC_RATEMCS25 0x25 #define DESC_RATEMCS26 0x26 #define DESC_RATEMCS27 0x27 #define DESC_RATEMCS28 0x28 #define DESC_RATEMCS29 0x29 #define DESC_RATEMCS30 0x2A #define DESC_RATEMCS31 0x2B #define DESC_RATEVHTSS1MCS0 0x2C #define DESC_RATEVHTSS1MCS1 0x2D #define DESC_RATEVHTSS1MCS2 0x2E #define DESC_RATEVHTSS1MCS3 0x2F #define DESC_RATEVHTSS1MCS4 0x30 #define DESC_RATEVHTSS1MCS5 0x31 #define DESC_RATEVHTSS1MCS6 0x32 #define DESC_RATEVHTSS1MCS7 0x33 #define DESC_RATEVHTSS1MCS8 0x34 #define DESC_RATEVHTSS1MCS9 0x35 #define DESC_RATEVHTSS2MCS0 0x36 #define DESC_RATEVHTSS2MCS1 0x37 #define DESC_RATEVHTSS2MCS2 0x38 #define DESC_RATEVHTSS2MCS3 0x39 #define DESC_RATEVHTSS2MCS4 0x3A #define DESC_RATEVHTSS2MCS5 0x3B #define DESC_RATEVHTSS2MCS6 0x3C #define DESC_RATEVHTSS2MCS7 0x3D #define DESC_RATEVHTSS2MCS8 0x3E #define DESC_RATEVHTSS2MCS9 0x3F #define DESC_RATEVHTSS3MCS0 0x40 #define DESC_RATEVHTSS3MCS1 0x41 #define DESC_RATEVHTSS3MCS2 0x42 #define DESC_RATEVHTSS3MCS3 0x43 #define DESC_RATEVHTSS3MCS4 0x44 #define DESC_RATEVHTSS3MCS5 0x45 #define DESC_RATEVHTSS3MCS6 0x46 #define DESC_RATEVHTSS3MCS7 0x47 #define DESC_RATEVHTSS3MCS8 0x48 #define DESC_RATEVHTSS3MCS9 0x49 #define DESC_RATEVHTSS4MCS0 0x4A #define DESC_RATEVHTSS4MCS1 0x4B #define DESC_RATEVHTSS4MCS2 0x4C #define DESC_RATEVHTSS4MCS3 0x4D #define DESC_RATEVHTSS4MCS4 0x4E #define DESC_RATEVHTSS4MCS5 0x4F #define DESC_RATEVHTSS4MCS6 0x50 #define DESC_RATEVHTSS4MCS7 0x51 #define DESC_RATEVHTSS4MCS8 0x52 #define DESC_RATEVHTSS4MCS9 0x53 #define HDATA_RATE(rate)\ (rate==DESC_RATE1M)?"CCK_1M":\ (rate==DESC_RATE2M)?"CCK_2M":\ (rate==DESC_RATE5_5M)?"CCK5_5M":\ (rate==DESC_RATE11M)?"CCK_11M":\ (rate==DESC_RATE6M)?"OFDM_6M":\ (rate==DESC_RATE9M)?"OFDM_9M":\ (rate==DESC_RATE12M)?"OFDM_12M":\ (rate==DESC_RATE18M)?"OFDM_18M":\ (rate==DESC_RATE24M)?"OFDM_24M":\ (rate==DESC_RATE36M)?"OFDM_36M":\ (rate==DESC_RATE48M)?"OFDM_48M":\ (rate==DESC_RATE54M)?"OFDM_54M":\ (rate==DESC_RATEMCS0)?"MCS0":\ (rate==DESC_RATEMCS1)?"MCS1":\ (rate==DESC_RATEMCS2)?"MCS2":\ (rate==DESC_RATEMCS3)?"MCS3":\ (rate==DESC_RATEMCS4)?"MCS4":\ (rate==DESC_RATEMCS5)?"MCS5":\ (rate==DESC_RATEMCS6)?"MCS6":\ (rate==DESC_RATEMCS7)?"MCS7":\ (rate==DESC_RATEMCS8)?"MCS8":\ (rate==DESC_RATEMCS9)?"MCS9":\ (rate==DESC_RATEMCS10)?"MCS10":\ (rate==DESC_RATEMCS11)?"MCS11":\ (rate==DESC_RATEMCS12)?"MCS12":\ (rate==DESC_RATEMCS13)?"MCS13":\ (rate==DESC_RATEMCS14)?"MCS14":\ (rate==DESC_RATEMCS15)?"MCS15":\ (rate==DESC_RATEVHTSS1MCS0)?"VHTSS1MCS0":\ (rate==DESC_RATEVHTSS1MCS1)?"VHTSS1MCS1":\ (rate==DESC_RATEVHTSS1MCS2)?"VHTSS1MCS2":\ (rate==DESC_RATEVHTSS1MCS3)?"VHTSS1MCS3":\ (rate==DESC_RATEVHTSS1MCS4)?"VHTSS1MCS4":\ (rate==DESC_RATEVHTSS1MCS5)?"VHTSS1MCS5":\ (rate==DESC_RATEVHTSS1MCS6)?"VHTSS1MCS6":\ (rate==DESC_RATEVHTSS1MCS7)?"VHTSS1MCS7":\ (rate==DESC_RATEVHTSS1MCS8)?"VHTSS1MCS8":\ (rate==DESC_RATEVHTSS1MCS9)?"VHTSS1MCS9":\ (rate==DESC_RATEVHTSS2MCS0)?"VHTSS2MCS0":\ (rate==DESC_RATEVHTSS2MCS1)?"VHTSS2MCS1":\ (rate==DESC_RATEVHTSS2MCS2)?"VHTSS2MCS2":\ (rate==DESC_RATEVHTSS2MCS3)?"VHTSS2MCS3":\ (rate==DESC_RATEVHTSS2MCS4)?"VHTSS2MCS4":\ (rate==DESC_RATEVHTSS2MCS5)?"VHTSS2MCS5":\ (rate==DESC_RATEVHTSS2MCS6)?"VHTSS2MCS6":\ (rate==DESC_RATEVHTSS2MCS7)?"VHTSS2MCS7":\ (rate==DESC_RATEVHTSS2MCS8)?"VHTSS2MCS8":\ (rate==DESC_RATEVHTSS2MCS9)?"VHTSS2MCS9":"UNKNOW" enum{ UP_LINK, DOWN_LINK, }; typedef enum _RT_MEDIA_STATUS { RT_MEDIA_DISCONNECT = 0, RT_MEDIA_CONNECT = 1 } RT_MEDIA_STATUS; #define MAX_DLFW_PAGE_SIZE 4096 // @ page : 4k bytes typedef enum _FIRMWARE_SOURCE { FW_SOURCE_IMG_FILE = 0, FW_SOURCE_HEADER_FILE = 1, //from header file } FIRMWARE_SOURCE, *PFIRMWARE_SOURCE; // // Queue Select Value in TxDesc // #define QSLT_BK 0x2//0x01 #define QSLT_BE 0x0 #define QSLT_VI 0x5//0x4 #define QSLT_VO 0x7//0x6 #define QSLT_BEACON 0x10 #define QSLT_HIGH 0x11 #define QSLT_MGNT 0x12 #define QSLT_CMD 0x13 // BK, BE, VI, VO, HCCA, MANAGEMENT, COMMAND, HIGH, BEACON. //#define MAX_TX_QUEUE 9 #define TX_SELE_HQ BIT(0) // High Queue #define TX_SELE_LQ BIT(1) // Low Queue #define TX_SELE_NQ BIT(2) // Normal Queue #define TX_SELE_EQ BIT(3) // Extern Queue #define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0)) #define PageNum_256(_Len) (u32)(((_Len)>>8) + ((_Len)&0xFF ? 1:0)) #define PageNum_512(_Len) (u32)(((_Len)>>9) + ((_Len)&0x1FF ? 1:0)) #define PageNum(_Len, _Size) (u32)(((_Len)/(_Size)) + ((_Len)&((_Size) - 1) ? 1:0)) u8 rtw_hal_data_init(_adapter *padapter); void rtw_hal_data_deinit(_adapter *padapter); void dump_chip_info(HAL_VERSION ChipVersion); u8 //return the final channel plan decision hal_com_config_channel_plan( IN PADAPTER padapter, IN u8 hw_channel_plan, //channel plan from HW (efuse/eeprom) IN u8 sw_channel_plan, //channel plan from SW (registry/module param) IN u8 def_channel_plan, //channel plan used when the former two is invalid IN BOOLEAN AutoLoadFail ); BOOLEAN HAL_IsLegalChannel( IN PADAPTER Adapter, IN u32 Channel ); u8 MRateToHwRate(u8 rate); u8 HwRateToMRate(u8 rate); void HalSetBrateCfg( IN PADAPTER Adapter, IN u8 *mBratesOS, OUT u16 *pBrateCfg); BOOLEAN Hal_MappingOutPipe( IN PADAPTER pAdapter, IN u8 NumOutPipe ); void hal_init_macaddr(_adapter *adapter); void rtw_init_hal_com_default_value(PADAPTER Adapter); void c2h_evt_clear(_adapter *adapter); s32 c2h_evt_read(_adapter *adapter, u8 *buf); s32 c2h_evt_read_88xx(_adapter *adapter, u8 *buf); u8 rtw_hal_networktype_to_raid(_adapter *adapter, struct sta_info *psta); u8 rtw_get_mgntframe_raid(_adapter *adapter,unsigned char network_type); void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta); void hw_var_port_switch(_adapter *adapter); void SetHwReg(PADAPTER padapter, u8 variable, u8 *val); void GetHwReg(PADAPTER padapter, u8 variable, u8 *val); void rtw_hal_check_rxfifo_full(_adapter *adapter); u8 SetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value); u8 GetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value); BOOLEAN eqNByte( u8* str1, u8* str2, u32 num ); BOOLEAN IsHexDigit( IN char chTmp ); u32 MapCharToHexDigit( IN char chTmp ); BOOLEAN GetHexValueFromString( IN char* szStr, IN OUT u32* pu4bVal, IN OUT u32* pu4bMove ); BOOLEAN GetFractionValueFromString( IN char* szStr, IN OUT u8* pInteger, IN OUT u8* pFraction, IN OUT u32* pu4bMove ); BOOLEAN IsCommentString( IN char* szStr ); BOOLEAN ParseQualifiedString( IN char* In, IN OUT u32* Start, OUT char* Out, IN char LeftQualifier, IN char RightQualifier ); BOOLEAN GetU1ByteIntegerFromStringInDecimal( IN char* Str, IN OUT u8* pInt ); BOOLEAN isAllSpaceOrTab( u8* data, u8 size ); void linked_info_dump(_adapter *padapter,u8 benable); #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA void rtw_get_raw_rssi_info(void *sel, _adapter *padapter); void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe); void rtw_dump_raw_rssi_info(_adapter *padapter); #endif #define HWSET_MAX_SIZE 512 #ifdef CONFIG_EFUSE_CONFIG_FILE #define EFUSE_FILE_COLUMN_NUM 16 u32 Hal_readPGDataFromConfigFile(PADAPTER padapter, struct file *fp); void Hal_ReadMACAddrFromFile(PADAPTER padapter, struct file *fp); void Hal_GetPhyEfuseMACAddr(PADAPTER padapter, u8* mac_addr); int check_phy_efuse_tx_power_info_valid(PADAPTER padapter); int check_phy_efuse_macaddr_info_valid(PADAPTER padapter); #endif //CONFIG_EFUSE_CONFIG_FILE #ifdef CONFIG_RF_GAIN_OFFSET void rtw_bb_rf_gain_offset(_adapter *padapter); #endif //CONFIG_RF_GAIN_OFFSET void dm_DynamicUsbTxAgg(_adapter *padapter, u8 from_timer); u8 rtw_hal_busagg_qsel_check(_adapter *padapter,u8 pre_qsel,u8 next_qsel); void GetHalODMVar( PADAPTER Adapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, PVOID pValue2); void SetHalODMVar( PADAPTER Adapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, BOOLEAN bSet); #ifdef CONFIG_BACKGROUND_NOISE_MONITOR struct noise_info { u8 bPauseDIG; u8 IGIValue; u32 max_time;//ms u8 chan; }; #endif #ifdef CONFIG_GPIO_API u8 rtw_hal_get_gpio(_adapter* adapter, u8 gpio_num); int rtw_hal_set_gpio_output_value(_adapter* adapter, u8 gpio_num, BOOLEAN isHigh); int rtw_hal_config_gpio(_adapter* adapter, u8 gpio_num, BOOLEAN isOutput); #endif #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE extern char *rtw_phy_file_path; extern char file_path[PATH_LENGTH_MAX]; #define GetLineFromBuffer(buffer) strsep(&buffer, "\n") #endif #endif //__HAL_COMMON_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/hal_com_h2c.h000066400000000000000000000361571261122257400214450ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __COMMON_H2C_H__ #define __COMMON_H2C_H__ //---------------------------------------------------------------------------------------------------------// //---------------------------------- H2C CMD DEFINITION ------------------------------------------------// //---------------------------------------------------------------------------------------------------------// // 88e, 8723b, 8812, 8821, 92e use the same FW code base enum h2c_cmd{ //Common Class: 000 H2C_RSVD_PAGE = 0x00, H2C_MEDIA_STATUS_RPT = 0x01, H2C_SCAN_ENABLE = 0x02, H2C_KEEP_ALIVE = 0x03, H2C_DISCON_DECISION = 0x04, H2C_PSD_OFFLOAD = 0x05, H2C_AP_OFFLOAD = 0x08, H2C_BCN_RSVDPAGE = 0x09, H2C_PROBERSP_RSVDPAGE = 0x0A, H2C_FCS_RSVDPAGE = 0x10, H2C_FCS_INFO = 0x11, H2C_AP_WOW_GPIO_CTRL = 0x13, //PoweSave Class: 001 H2C_SET_PWR_MODE = 0x20, H2C_PS_TUNING_PARA = 0x21, H2C_PS_TUNING_PARA2 = 0x22, H2C_P2P_LPS_PARAM = 0x23, H2C_P2P_PS_OFFLOAD = 0x24, H2C_PS_SCAN_ENABLE = 0x25, H2C_SAP_PS_ = 0x26, H2C_INACTIVE_PS_ = 0x27, //Inactive_PS H2C_FWLPS_IN_IPS_ = 0x28, //Dynamic Mechanism Class: 010 H2C_MACID_CFG = 0x40, H2C_TXBF = 0x41, H2C_RSSI_SETTING = 0x42, H2C_AP_REQ_TXRPT = 0x43, H2C_INIT_RATE_COLLECT = 0x44, //BT Class: 011 H2C_B_TYPE_TDMA = 0x60, H2C_BT_INFO = 0x61, H2C_FORCE_BT_TXPWR = 0x62, H2C_BT_IGNORE_WLANACT = 0x63, H2C_DAC_SWING_VALUE = 0x64, H2C_ANT_SEL_RSV = 0x65, H2C_WL_OPMODE = 0x66, H2C_BT_MP_OPER = 0x67, H2C_BT_CONTROL = 0x68, H2C_BT_WIFI_CTRL = 0x69, H2C_BT_FW_PATCH = 0x6A, //WOWLAN Class: 100 H2C_WOWLAN = 0x80, H2C_REMOTE_WAKE_CTRL = 0x81, H2C_AOAC_GLOBAL_INFO = 0x82, H2C_AOAC_RSVD_PAGE = 0x83, H2C_AOAC_RSVD_PAGE2 = 0x84, H2C_D0_SCAN_OFFLOAD_CTRL = 0x85, H2C_D0_SCAN_OFFLOAD_INFO = 0x86, H2C_CHNL_SWITCH_OFFLOAD = 0x87, H2C_AOAC_RSVDPAGE3 = 0x88, H2C_RESET_TSF = 0xC0, H2C_MAXID, }; #define H2C_RSVDPAGE_LOC_LEN 5 #define H2C_MEDIA_STATUS_RPT_LEN 3 #define H2C_KEEP_ALIVE_CTRL_LEN 2 #define H2C_DISCON_DECISION_LEN 3 #define H2C_AP_OFFLOAD_LEN 3 #define H2C_AP_WOW_GPIO_CTRL_LEN 4 #define H2C_AP_PS_LEN 2 #define H2C_PWRMODE_LEN 7 #define H2C_PSTUNEPARAM_LEN 4 #define H2C_MACID_CFG_LEN 7 #define H2C_BTMP_OPER_LEN 4 #define H2C_WOWLAN_LEN 5 #define H2C_REMOTE_WAKE_CTRL_LEN 3 #define H2C_AOAC_GLOBAL_INFO_LEN 2 #define H2C_AOAC_RSVDPAGE_LOC_LEN 7 #define H2C_SCAN_OFFLOAD_CTRL_LEN 4 #define H2C_BT_FW_PATCH_LEN 6 #define H2C_RSSI_SETTING_LEN 4 #define H2C_AP_REQ_TXRPT_LEN 2 #define H2C_FORCE_BT_TXPWR_LEN 3 #define H2C_BCN_RSVDPAGE_LEN 5 #define H2C_PROBERSP_RSVDPAGE_LEN 5 #ifdef CONFIG_WOWLAN #define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 ) #define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5]) #define cpIpAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3]) // // ARP packet // // LLC Header #define GET_ARP_PKT_LLC_TYPE(__pHeader) ReadEF2Byte( ((u8*)(__pHeader)) + 6) //ARP element #define GET_ARP_PKT_OPERATION(__pHeader) ReadEF2Byte(((u8*)(__pHeader)) + 6) #define GET_ARP_PKT_SENDER_MAC_ADDR(__pHeader, _val) cpMacAddr((u8*)(_val), ((u8*)(__pHeader))+8) #define GET_ARP_PKT_SENDER_IP_ADDR(__pHeader, _val) cpIpAddr((u8*)(_val), ((u8*)(__pHeader))+14) #define GET_ARP_PKT_TARGET_MAC_ADDR(__pHeader, _val) cpMacAddr((u8*)(_val), ((u8*)(__pHeader))+18) #define GET_ARP_PKT_TARGET_IP_ADDR(__pHeader, _val) cpIpAddr((u8*)(_val), ((u8*)(__pHeader))+24) #define SET_ARP_PKT_HW(__pHeader, __Value) WriteEF2Byte( ((u8*)(__pHeader)) + 0, __Value) #define SET_ARP_PKT_PROTOCOL(__pHeader, __Value) WriteEF2Byte( ((u8*)(__pHeader)) + 2, __Value) #define SET_ARP_PKT_HW_ADDR_LEN(__pHeader, __Value) WriteEF1Byte( ((u8*)(__pHeader)) + 4, __Value) #define SET_ARP_PKT_PROTOCOL_ADDR_LEN(__pHeader, __Value) WriteEF1Byte( ((u8*)(__pHeader)) + 5, __Value) #define SET_ARP_PKT_OPERATION(__pHeader, __Value) WriteEF2Byte( ((u8*)(__pHeader)) + 6, __Value) #define SET_ARP_PKT_SENDER_MAC_ADDR(__pHeader, _val) cpMacAddr(((u8*)(__pHeader))+8, (u8*)(_val)) #define SET_ARP_PKT_SENDER_IP_ADDR(__pHeader, _val) cpIpAddr(((u8*)(__pHeader))+14, (u8*)(_val)) #define SET_ARP_PKT_TARGET_MAC_ADDR(__pHeader, _val) cpMacAddr(((u8*)(__pHeader))+18, (u8*)(_val)) #define SET_ARP_PKT_TARGET_IP_ADDR(__pHeader, _val) cpIpAddr(((u8*)(__pHeader))+24, (u8*)(_val)) #define FW_WOWLAN_FUN_EN BIT(0) #define FW_WOWLAN_PATTERN_MATCH BIT(1) #define FW_WOWLAN_MAGIC_PKT BIT(2) #define FW_WOWLAN_UNICAST BIT(3) #define FW_WOWLAN_ALL_PKT_DROP BIT(4) #define FW_WOWLAN_GPIO_ACTIVE BIT(5) #define FW_WOWLAN_REKEY_WAKEUP BIT(6) #define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) #define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) #define FW_FW_PARSE_MAGIC_PKT BIT(1) #define FW_REMOTE_WAKE_CTRL_EN BIT(0) #define FW_REALWOWLAN_EN BIT(5) #define FW_WOWLAN_KEEP_ALIVE_EN BIT(0) #define FW_ADOPT_USER BIT(1) #define FW_WOWLAN_KEEP_ALIVE_PKT_TYPE BIT(2) #define FW_REMOTE_WAKE_CTRL_EN BIT(0) #define FW_ARP_EN BIT(1) #define FW_REALWOWLAN_EN BIT(5) #define FW_WOW_FW_UNICAST_EN BIT(7) #endif //CONFIG_WOWLAN //_RSVDPAGE_LOC_CMD_0x00 #define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) #define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) #define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) #define SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) #define SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value)SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) //_MEDIA_STATUS_RPT_PARM_CMD_0x01 #define SET_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) #define SET_H2CCMD_MSRRPT_PARM_MACID_IND(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) #define SET_H2CCMD_MSRRPT_PARM_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) #define SET_H2CCMD_MSRRPT_PARM_MACID_END(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+2, 0, 8, __Value) //_KEEP_ALIVE_CMD_0x03 #define SET_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) #define SET_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) #define SET_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) #define SET_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) //_DISCONNECT_DECISION_CMD_0x04 #define SET_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) #define SET_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) #define SET_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) #define SET_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+2, 0, 8, __Value) #ifdef CONFIG_AP_WOWLAN //_AP_Offload 0x08 #define SET_H2CCMD_AP_WOWLAN_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) //_BCN_RsvdPage 0x09 #define SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_BCN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) //_Probersp_RsvdPage 0x0a #define SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_ProbeRsp(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) //_Probersp_RsvdPage 0x13 #define SET_H2CCMD_AP_WOW_GPIO_CTRL_INDEX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) #define SET_H2CCMD_AP_WOW_GPIO_CTRL_C2H_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) #define SET_H2CCMD_AP_WOW_GPIO_CTRL_PLUS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) #define SET_H2CCMD_AP_WOW_GPIO_CTRL_HIGH_ACTIVE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) #define SET_H2CCMD_AP_WOW_GPIO_CTRL_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) #define SET_H2CCMD_AP_WOW_GPIO_CTRL_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) #define SET_H2CCMD_AP_WOW_GPIO_CTRL_C2H_DURATION(__pH2CCmd, __Value)SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) //_AP_PS 0x26 #define SET_H2CCMD_AP_WOW_PS_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) #define SET_H2CCMD_AP_WOW_PS_32K_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) #define SET_H2CCMD_AP_WOW_PS_RF(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) #define SET_H2CCMD_AP_WOW_PS_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) #endif // _WoWLAN PARAM_CMD_0x80 #define SET_H2CCMD_WOWLAN_FUNC_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) #define SET_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) #define SET_H2CCMD_WOWLAN_MAGIC_PKT_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) #define SET_H2CCMD_WOWLAN_UNICAST_PKT_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) #define SET_H2CCMD_WOWLAN_ALL_PKT_DROP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) #define SET_H2CCMD_WOWLAN_GPIO_ACTIVE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) #define SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) #define SET_H2CCMD_WOWLAN_DISCONNECT_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) #define SET_H2CCMD_WOWLAN_GPIONUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 7, __Value) #define SET_H2CCMD_WOWLAN_DATAPIN_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 7, 1, __Value) #define SET_H2CCMD_WOWLAN_GPIO_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) #define SET_H2CCMD_WOWLAN_GPIO_PULSE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 1, __Value) #define SET_H2CCMD_WOWLAN_GPIO_PULSE_COUNT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 1, 7, __Value) #define SET_H2CCMD_WOWLAN_LOWPR_RX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 1, __Value) // _REMOTE_WAKEUP_CMD_0x81 #define SET_H2CCMD_REMOTE_WAKECTRL_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) #define SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) #define SET_H2CCMD_REMOTE_WAKE_CTRL_NDP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) #define SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) #define SET_H2CCMD_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) #define SET_H2CCMD_REMOTE_WAKE_CTRL_FW_UNICAST_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) #define SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 1, __Value) // AOAC_GLOBAL_INFO_0x82 #define SET_H2CCMD_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) #define SET_H2CCMD_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) // AOAC_RSVDPAGE_LOC_0x83 #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd), 0, 8, __Value) #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_NEIGHBOR_ADV(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) #ifdef CONFIG_GTK_OL #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+5, 0, 8, __Value) #endif //CONFIG_GTK_OL #ifdef CONFIG_PNO_SUPPORT #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_NLO_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd), 0, 8, __Value) #endif #ifdef CONFIG_PNO_SUPPORT // D0_Scan_Offload_Info_0x86 #define SET_H2CCMD_AOAC_NLO_FUN_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 3, 1, __Value) #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_PROBE_PACKET(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_SCAN_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_SSID_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) #endif //CONFIG_PNO_SUPPORT //---------------------------------------------------------------------------------------------------------// //------------------------------------------- Structure --------------------------------------------------// //---------------------------------------------------------------------------------------------------------// typedef struct _RSVDPAGE_LOC { u8 LocProbeRsp; u8 LocPsPoll; u8 LocNullData; u8 LocQosNull; u8 LocBTQosNull; #ifdef CONFIG_WOWLAN u8 LocRemoteCtrlInfo; u8 LocArpRsp; u8 LocNbrAdv; u8 LocGTKRsp; u8 LocGTKInfo; u8 LocProbeReq; u8 LocNetList; #ifdef CONFIG_GTK_OL u8 LocGTKEXTMEM; #endif //CONFIG_GTK_OL #ifdef CONFIG_PNO_SUPPORT u8 LocPNOInfo; u8 LocScanInfo; u8 LocSSIDInfo; u8 LocProbePacket; #endif //CONFIG_PNO_SUPPORT #endif //CONFIG_WOWLAN #ifdef CONFIG_AP_WOWLAN u8 LocApOffloadBCN; #endif //CONFIG_AP_WOWLAN } RSVDPAGE_LOC, *PRSVDPAGE_LOC; #endif void dump_TX_FIFO(PADAPTER padapter, u8 page_num, u16 page_size); u8 rtw_check_invalid_mac_address (u8 *mac_addr); #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) void rtw_get_current_ip_address(PADAPTER padapter, u8 *pcurrentip); void rtw_get_sec_iv(PADAPTER padapter, u8*pcur_dot11txpn, u8 *StaAddr); void rtw_set_sec_pn(_adapter *padapter); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/hal_com_led.h000066400000000000000000000322551261122257400215300ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HAL_COMMON_LED_H_ #define __HAL_COMMON_LED_H_ #define MSECS(t) (HZ * ((t) / 1000) + (HZ * ((t) % 1000)) / 1000) //================================================================================ // LED Behavior Constant. //================================================================================ // Default LED behavior. // #define LED_BLINK_NORMAL_INTERVAL 100 #define LED_BLINK_SLOWLY_INTERVAL 200 #define LED_BLINK_LONG_INTERVAL 400 #define LED_INITIAL_INTERVAL 1800 // LED Customerization //NETTRONIX #define LED_BLINK_NORMAL_INTERVAL_NETTRONIX 100 #define LED_BLINK_SLOWLY_INTERVAL_NETTRONIX 2000 //PORNET #define LED_BLINK_SLOWLY_INTERVAL_PORNET 1000 #define LED_BLINK_NORMAL_INTERVAL_PORNET 100 #define LED_BLINK_FAST_INTERVAL_BITLAND 30 //AzWave. #define LED_CM2_BLINK_ON_INTERVAL 250 #define LED_CM2_BLINK_OFF_INTERVAL 4750 #define LED_CM8_BLINK_OFF_INTERVAL 3750 //for QMI //RunTop #define LED_RunTop_BLINK_INTERVAL 300 //ALPHA #define LED_BLINK_NO_LINK_INTERVAL_ALPHA 1000 #define LED_BLINK_NO_LINK_INTERVAL_ALPHA_500MS 500 //add by ylb 20121012 for customer led for alpha #define LED_BLINK_LINK_INTERVAL_ALPHA 500 //500 #define LED_BLINK_SCAN_INTERVAL_ALPHA 180 //150 #define LED_BLINK_FASTER_INTERVAL_ALPHA 50 #define LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA 5000 // 111122 by hpfan: Customized for Xavi #define LED_CM11_BLINK_INTERVAL 300 #define LED_CM11_LINK_ON_INTERVEL 3000 //Netgear #define LED_BLINK_LINK_INTERVAL_NETGEAR 500 #define LED_BLINK_LINK_SLOWLY_INTERVAL_NETGEAR 1000 #define LED_WPS_BLINK_OFF_INTERVAL_NETGEAR 100 #define LED_WPS_BLINK_ON_INTERVAL_NETGEAR 500 //Belkin AC950 #define LED_BLINK_LINK_INTERVAL_ON_BELKIN 200 #define LED_BLINK_LINK_INTERVAL_OFF_BELKIN 100 #define LED_BLINK_ERROR_INTERVAL_BELKIN 100 //by chiyokolin for Azurewave #define LED_CM12_BLINK_INTERVAL_5Mbps 160 #define LED_CM12_BLINK_INTERVAL_10Mbps 80 #define LED_CM12_BLINK_INTERVAL_20Mbps 50 #define LED_CM12_BLINK_INTERVAL_40Mbps 40 #define LED_CM12_BLINK_INTERVAL_80Mbps 30 #define LED_CM12_BLINK_INTERVAL_MAXMbps 25 //Dlink #define LED_BLINK_NO_LINK_INTERVAL 1000 #define LED_BLINK_LINK_IDEL_INTERVAL 100 #define LED_BLINK_SCAN_ON_INTERVAL 30 #define LED_BLINK_SCAN_OFF_INTERVAL 300 #define LED_WPS_BLINK_ON_INTERVAL_DLINK 30 #define LED_WPS_BLINK_OFF_INTERVAL_DLINK 300 #define LED_WPS_BLINK_LINKED_ON_INTERVAL_DLINK 5000 //================================================================================ // LED object. //================================================================================ typedef enum _LED_CTL_MODE{ LED_CTL_POWER_ON = 1, LED_CTL_LINK = 2, LED_CTL_NO_LINK = 3, LED_CTL_TX = 4, LED_CTL_RX = 5, LED_CTL_SITE_SURVEY = 6, LED_CTL_POWER_OFF = 7, LED_CTL_START_TO_LINK = 8, LED_CTL_START_WPS = 9, LED_CTL_STOP_WPS = 10, LED_CTL_START_WPS_BOTTON = 11, //added for runtop LED_CTL_STOP_WPS_FAIL = 12, //added for ALPHA LED_CTL_STOP_WPS_FAIL_OVERLAP = 13, //added for BELKIN LED_CTL_CONNECTION_NO_TRANSFER = 14, }LED_CTL_MODE; typedef enum _LED_STATE{ LED_UNKNOWN = 0, RTW_LED_ON = 1, RTW_LED_OFF = 2, LED_BLINK_NORMAL = 3, LED_BLINK_SLOWLY = 4, LED_BLINK_POWER_ON = 5, LED_BLINK_SCAN = 6, // LED is blinking during scanning period, the # of times to blink is depend on time for scanning. LED_BLINK_NO_LINK = 7, // LED is blinking during no link state. LED_BLINK_StartToBlink = 8, // Customzied for Sercomm Printer Server case LED_BLINK_TXRX = 9, LED_BLINK_WPS = 10, // LED is blinkg during WPS communication LED_BLINK_WPS_STOP = 11, //for ALPHA LED_BLINK_WPS_STOP_OVERLAP = 12, //for BELKIN LED_BLINK_RUNTOP = 13, // Customized for RunTop LED_BLINK_CAMEO = 14, LED_BLINK_XAVI = 15, LED_BLINK_ALWAYS_ON = 16, LED_BLINK_LINK_IN_PROCESS = 17, //Customized for Belkin AC950 LED_BLINK_AUTH_ERROR = 18, //Customized for Belkin AC950 LED_BLINK_Azurewave_5Mbps = 19, LED_BLINK_Azurewave_10Mbps = 20, LED_BLINK_Azurewave_20Mbps = 21, LED_BLINK_Azurewave_40Mbps = 22, LED_BLINK_Azurewave_80Mbps = 23, LED_BLINK_Azurewave_MAXMbps = 24, LED_BLINK_LINK_IDEL = 25, LED_BLINK_WPS_LINKED = 26, }LED_STATE; typedef enum _LED_PIN{ LED_PIN_GPIO0, LED_PIN_LED0, LED_PIN_LED1, LED_PIN_LED2 }LED_PIN; //================================================================================ // PCIE LED Definition. //================================================================================ #ifdef CONFIG_PCI_HCI typedef enum _LED_STRATEGY_PCIE{ SW_LED_MODE0, // SW control 1 LED via GPIO0. It is default option. SW_LED_MODE1, // SW control for PCI Express SW_LED_MODE2, // SW control for Cameo. SW_LED_MODE3, // SW contorl for RunTop. SW_LED_MODE4, // SW control for Netcore SW_LED_MODE5, //added by vivi, for led new mode, DLINK SW_LED_MODE6, //added by vivi, for led new mode, PRONET SW_LED_MODE7, //added by chiyokolin, for Lenovo, PCI Express Minicard Spec Rev.1.2 spec SW_LED_MODE8, //added by chiyokolin, for QMI SW_LED_MODE9, //added by chiyokolin, for BITLAND-LENOVO, PCI Express Minicard Spec Rev.1.1 SW_LED_MODE10, //added by chiyokolin, for Edimax-ASUS SW_LED_MODE11, //added by hpfan, for Xavi SW_LED_MODE12, //added by chiyokolin, for Azurewave HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes) }LED_STRATEGY_PCIE, *PLED_STRATEGY_PCIE; typedef struct _LED_PCIE{ PADAPTER padapter; LED_PIN LedPin; // Identify how to implement this SW led. LED_STATE CurrLedState; // Current LED state. BOOLEAN bLedOn; // TRUE if LED is ON, FALSE if LED is OFF. BOOLEAN bLedBlinkInProgress; // TRUE if it is blinking, FALSE o.w.. BOOLEAN bLedWPSBlinkInProgress; // TRUE if it is blinking, FALSE o.w.. BOOLEAN bLedSlowBlinkInProgress;//added by vivi, for led new mode u32 BlinkTimes; // Number of times to toggle led state for blinking. LED_STATE BlinkingLedState; // Next state for blinking, either LED_ON or LED_OFF are. _timer BlinkTimer; // Timer object for led blinking. } LED_PCIE, *PLED_PCIE; typedef struct _LED_PCIE LED_DATA, *PLED_DATA; typedef enum _LED_STRATEGY_PCIE LED_STRATEGY, *PLED_STRATEGY; VOID LedControlPCIE( IN PADAPTER Adapter, IN LED_CTL_MODE LedAction ); VOID gen_RefreshLedState( IN PADAPTER Adapter); //================================================================================ // USB LED Definition. //================================================================================ #elif defined(CONFIG_USB_HCI) #define IS_LED_WPS_BLINKING(_LED_USB) (((PLED_USB)_LED_USB)->CurrLedState==LED_BLINK_WPS \ || ((PLED_USB)_LED_USB)->CurrLedState==LED_BLINK_WPS_STOP \ || ((PLED_USB)_LED_USB)->bLedWPSBlinkInProgress) #define IS_LED_BLINKING(_LED_USB) (((PLED_USB)_LED_USB)->bLedWPSBlinkInProgress \ ||((PLED_USB)_LED_USB)->bLedScanBlinkInProgress) typedef enum _LED_STRATEGY_USB{ SW_LED_MODE0, // SW control 1 LED via GPIO0. It is default option. SW_LED_MODE1, // 2 LEDs, through LED0 and LED1. For ALPHA. SW_LED_MODE2, // SW control 1 LED via GPIO0, customized for AzWave 8187 minicard. SW_LED_MODE3, // SW control 1 LED via GPIO0, customized for Sercomm Printer Server case. SW_LED_MODE4, //for Edimax / Belkin SW_LED_MODE5, //for Sercomm / Belkin SW_LED_MODE6, //for 88CU minicard, porting from ce SW_LED_MODE7 SW_LED_MODE7, //for Netgear special requirement SW_LED_MODE8, //for LC SW_LED_MODE9, //for Belkin AC950 SW_LED_MODE10, //for Netgear A6200V2 SW_LED_MODE11, //for Edimax / ASUS SW_LED_MODE12, //for WNC/NEC SW_LED_MODE13, //for Netgear A6100, 8811Au SW_LED_MODE14, //for Buffalo, DNI, 8811Au SW_LED_MODE15, //for DLINK, 8811Au/8812AU HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes, see MAC.CONFIG1 for details.) }LED_STRATEGY_USB, *PLED_STRATEGY_USB; typedef struct _LED_USB{ PADAPTER padapter; LED_PIN LedPin; // Identify how to implement this SW led. LED_STATE CurrLedState; // Current LED state. BOOLEAN bLedOn; // TRUE if LED is ON, FALSE if LED is OFF. BOOLEAN bSWLedCtrl; BOOLEAN bLedBlinkInProgress; // TRUE if it is blinking, FALSE o.w.. // ALPHA, added by chiyoko, 20090106 BOOLEAN bLedNoLinkBlinkInProgress; BOOLEAN bLedLinkBlinkInProgress; BOOLEAN bLedStartToLinkBlinkInProgress; BOOLEAN bLedScanBlinkInProgress; BOOLEAN bLedWPSBlinkInProgress; u32 BlinkTimes; // Number of times to toggle led state for blinking. u8 BlinkCounter; //Added for turn off overlap led after blinking a while, by page, 20120821 LED_STATE BlinkingLedState; // Next state for blinking, either LED_ON or LED_OFF are. _timer BlinkTimer; // Timer object for led blinking. _workitem BlinkWorkItem; // Workitem used by BlinkTimer to manipulate H/W to blink LED. } LED_USB, *PLED_USB; typedef struct _LED_USB LED_DATA, *PLED_DATA; typedef enum _LED_STRATEGY_USB LED_STRATEGY, *PLED_STRATEGY; VOID LedControlUSB( IN PADAPTER Adapter, IN LED_CTL_MODE LedAction ); //================================================================================ // SDIO LED Definition. //================================================================================ #elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) #define IS_LED_WPS_BLINKING(_LED_SDIO) (((PLED_SDIO)_LED_SDIO)->CurrLedState==LED_BLINK_WPS \ || ((PLED_SDIO)_LED_SDIO)->CurrLedState==LED_BLINK_WPS_STOP \ || ((PLED_SDIO)_LED_SDIO)->bLedWPSBlinkInProgress) #define IS_LED_BLINKING(_LED_SDIO) (((PLED_SDIO)_LED_SDIO)->bLedWPSBlinkInProgress \ ||((PLED_SDIO)_LED_SDIO)->bLedScanBlinkInProgress) typedef enum _LED_STRATEGY_SDIO{ SW_LED_MODE0, // SW control 1 LED via GPIO0. It is default option. SW_LED_MODE1, // 2 LEDs, through LED0 and LED1. For ALPHA. SW_LED_MODE2, // SW control 1 LED via GPIO0, customized for AzWave 8187 minicard. SW_LED_MODE3, // SW control 1 LED via GPIO0, customized for Sercomm Printer Server case. SW_LED_MODE4, //for Edimax / Belkin SW_LED_MODE5, //for Sercomm / Belkin SW_LED_MODE6, //for 88CU minicard, porting from ce SW_LED_MODE7 HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes, see MAC.CONFIG1 for details.) }LED_STRATEGY_SDIO, *PLED_STRATEGY_SDIO; typedef struct _LED_SDIO{ PADAPTER padapter; LED_PIN LedPin; // Identify how to implement this SW led. LED_STATE CurrLedState; // Current LED state. BOOLEAN bLedOn; // TRUE if LED is ON, FALSE if LED is OFF. BOOLEAN bSWLedCtrl; BOOLEAN bLedBlinkInProgress; // TRUE if it is blinking, FALSE o.w.. // ALPHA, added by chiyoko, 20090106 BOOLEAN bLedNoLinkBlinkInProgress; BOOLEAN bLedLinkBlinkInProgress; BOOLEAN bLedStartToLinkBlinkInProgress; BOOLEAN bLedScanBlinkInProgress; BOOLEAN bLedWPSBlinkInProgress; u32 BlinkTimes; // Number of times to toggle led state for blinking. LED_STATE BlinkingLedState; // Next state for blinking, either LED_ON or LED_OFF are. _timer BlinkTimer; // Timer object for led blinking. _workitem BlinkWorkItem; // Workitem used by BlinkTimer to manipulate H/W to blink LED. } LED_SDIO, *PLED_SDIO; typedef struct _LED_SDIO LED_DATA, *PLED_DATA; typedef enum _LED_STRATEGY_SDIO LED_STRATEGY, *PLED_STRATEGY; VOID LedControlSDIO( IN PADAPTER Adapter, IN LED_CTL_MODE LedAction ); #endif struct led_priv{ /* add for led controll */ LED_DATA SwLed0; LED_DATA SwLed1; LED_DATA SwLed2; LED_STRATEGY LedStrategy; u8 bRegUseLed; void (*LedControlHandler)(_adapter *padapter, LED_CTL_MODE LedAction); void (*SwLedOn)(_adapter *padapter, PLED_DATA pLed); void (*SwLedOff)(_adapter *padapter, PLED_DATA pLed); /* add for led controll */ }; #ifdef CONFIG_SW_LED #define rtw_led_control(adapter, LedAction) \ do { \ if((adapter)->ledpriv.LedControlHandler) \ (adapter)->ledpriv.LedControlHandler((adapter), (LedAction)); \ } while(0) #else //CONFIG_SW_LED #define rtw_led_control(adapter, LedAction) #endif //CONFIG_SW_LED #define SwLedOn(adapter, pLed) \ do { \ if((adapter)->ledpriv.SwLedOn) \ (adapter)->ledpriv.SwLedOn((adapter), (pLed)); \ } while(0) #define SwLedOff(adapter, pLed) \ do { \ if((adapter)->ledpriv.SwLedOff) \ (adapter)->ledpriv.SwLedOff((adapter), (pLed)); \ } while(0) void BlinkTimerCallback(void *data); void BlinkWorkItemCallback(_workitem *work); void ResetLedStatus(PLED_DATA pLed); void InitLed( _adapter *padapter, PLED_DATA pLed, LED_PIN LedPin ); void DeInitLed( PLED_DATA pLed ); //hal... extern void BlinkHandler(PLED_DATA pLed); #endif //__RTW_LED_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/hal_com_phycfg.h000066400000000000000000000141201261122257400222330ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HAL_COM_PHYCFG_H__ #define __HAL_COM_PHYCFG_H__ #define PathA 0x0 // Useless #define PathB 0x1 #define PathC 0x2 #define PathD 0x3 typedef enum _RATE_SECTION { CCK = 0, OFDM, HT_MCS0_MCS7, HT_MCS8_MCS15, HT_MCS16_MCS23, HT_MCS24_MCS31, VHT_1SSMCS0_1SSMCS9, VHT_2SSMCS0_2SSMCS9, VHT_3SSMCS0_3SSMCS9, VHT_4SSMCS0_4SSMCS9, } RATE_SECTION; typedef enum _RF_TX_NUM { RF_1TX = 0, RF_2TX, RF_3TX, RF_4TX, RF_MAX_TX_NUM, RF_TX_NUM_NONIMPLEMENT, } RF_TX_NUM; #define MAX_POWER_INDEX 0x3F typedef enum _REGULATION_TXPWR_LMT { TXPWR_LMT_FCC = 0, TXPWR_LMT_MKK = 1, TXPWR_LMT_ETSI = 2, TXPWR_LMT_WW = 3, TXPWR_LMT_MAX_REGULATION_NUM = 4 } REGULATION_TXPWR_LMT; /*------------------------------Define structure----------------------------*/ typedef struct _BB_REGISTER_DEFINITION{ u32 rfintfs; // set software control: // 0x870~0x877[8 bytes] u32 rfintfo; // output data: // 0x860~0x86f [16 bytes] u32 rfintfe; // output enable: // 0x860~0x86f [16 bytes] u32 rf3wireOffset; // LSSI data: // 0x840~0x84f [16 bytes] u32 rfHSSIPara2; // wire parameter control2 : // 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes] u32 rfLSSIReadBack; //LSSI RF readback data SI mode // 0x8a0~0x8af [16 bytes] u32 rfLSSIReadBackPi; //LSSI RF readback data PI mode 0x8b8-8bc for Path A and B }BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T; //---------------------------------------------------------------------- s32 phy_TxPwrIdxToDbm( IN PADAPTER Adapter, IN WIRELESS_MODE WirelessMode, IN u8 TxPwrIdx ); u8 PHY_GetTxPowerByRateBase( IN PADAPTER Adapter, IN u8 Band, IN u8 RfPath, IN u8 TxNum, IN RATE_SECTION RateSection ); u8 PHY_GetRateSectionIndexOfTxPowerByRate( IN PADAPTER pAdapter, IN u32 RegAddr, IN u32 BitMask ); VOID PHY_GetRateValuesOfTxPowerByRate( IN PADAPTER pAdapter, IN u32 RegAddr, IN u32 BitMask, IN u32 Value, OUT u8* RateIndex, OUT s8* PwrByRateVal, OUT u8* RateNum ); u8 PHY_GetRateIndexOfTxPowerByRate( IN u8 Rate ); VOID PHY_SetTxPowerIndexByRateSection( IN PADAPTER pAdapter, IN u8 RFPath, IN u8 Channel, IN u8 RateSection ); s8 PHY_GetTxPowerByRate( IN PADAPTER pAdapter, IN u8 Band, IN u8 RFPath, IN u8 TxNum, IN u8 RateIndex ); VOID PHY_SetTxPowerByRate( IN PADAPTER pAdapter, IN u8 Band, IN u8 RFPath, IN u8 TxNum, IN u8 Rate, IN s8 Value ); VOID PHY_SetTxPowerLevelByPath( IN PADAPTER Adapter, IN u8 channel, IN u8 path ); VOID PHY_SetTxPowerIndexByRateArray( IN PADAPTER pAdapter, IN u8 RFPath, IN CHANNEL_WIDTH BandWidth, IN u8 Channel, IN u8* Rates, IN u8 RateArraySize ); VOID PHY_InitTxPowerByRate( IN PADAPTER pAdapter ); VOID PHY_StoreTxPowerByRate( IN PADAPTER pAdapter, IN u32 Band, IN u32 RfPath, IN u32 TxNum, IN u32 RegAddr, IN u32 BitMask, IN u32 Data ); VOID PHY_TxPowerByRateConfiguration( IN PADAPTER pAdapter ); u8 PHY_GetTxPowerIndexBase( IN PADAPTER pAdapter, IN u8 RFPath, IN u8 Rate, IN CHANNEL_WIDTH BandWidth, IN u8 Channel, OUT PBOOLEAN bIn24G ); s8 PHY_GetTxPowerLimit( IN PADAPTER Adapter, IN u32 RegPwrTblSel, IN BAND_TYPE Band, IN CHANNEL_WIDTH Bandwidth, IN u8 RfPath, IN u8 DataRate, IN u8 Channel ); VOID PHY_SetTxPowerLimit( IN PADAPTER Adapter, IN u8 *Regulation, IN u8 *Band, IN u8 *Bandwidth, IN u8 *RateSection, IN u8 *RfPath, IN u8 *Channel, IN u8 *PowerLimit ); VOID PHY_ConvertTxPowerLimitToPowerIndex( IN PADAPTER Adapter ); VOID PHY_InitTxPowerLimit( IN PADAPTER Adapter ); s8 PHY_GetTxPowerTrackingOffset( PADAPTER pAdapter, u8 Rate, u8 RFPath ); u8 PHY_GetTxPowerIndex( IN PADAPTER pAdapter, IN u8 RFPath, IN u8 Rate, IN CHANNEL_WIDTH BandWidth, IN u8 Channel ); VOID PHY_SetTxPowerIndex( IN PADAPTER pAdapter, IN u32 PowerIndex, IN u8 RFPath, IN u8 Rate ); VOID Hal_ChannelPlanToRegulation( IN PADAPTER Adapter, IN u16 ChannelPlan ); #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE #define MAX_PARA_FILE_BUF_LEN 25600 #define LOAD_MAC_PARA_FILE BIT0 #define LOAD_BB_PARA_FILE BIT1 #define LOAD_BB_PG_PARA_FILE BIT2 #define LOAD_BB_MP_PARA_FILE BIT3 #define LOAD_RF_PARA_FILE BIT4 #define LOAD_RF_TXPWR_TRACK_PARA_FILE BIT5 #define LOAD_RF_TXPWR_LMT_PARA_FILE BIT6 int phy_ConfigMACWithParaFile(IN PADAPTER Adapter, IN char* pFileName); int phy_ConfigBBWithParaFile(IN PADAPTER Adapter, IN char* pFileName, IN u32 ConfigType); int phy_ConfigBBWithPgParaFile(IN PADAPTER Adapter, IN char* pFileName); int phy_ConfigBBWithMpParaFile(IN PADAPTER Adapter, IN char* pFileName); int PHY_ConfigRFWithParaFile(IN PADAPTER Adapter, IN char* pFileName, IN u8 eRFPath); int PHY_ConfigRFWithTxPwrTrackParaFile(IN PADAPTER Adapter, IN char* pFileName); int PHY_ConfigRFWithPowerLimitTableParaFile(IN PADAPTER Adapter, IN char* pFileName); void phy_free_filebuf(_adapter *padapter); #endif //CONFIG_LOAD_PHY_PARA_FROM_FILE #endif //__HAL_COMMON_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/hal_com_reg.h000077500000000000000000001712661261122257400215520ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HAL_COMMON_REG_H__ #define __HAL_COMMON_REG_H__ #define MAC_ADDR_LEN 6 #define HAL_NAV_UPPER_UNIT 128 // micro-second // 8188E PKT_BUFF_ACCESS_CTRL value #define TXPKT_BUF_SELECT 0x69 #define RXPKT_BUF_SELECT 0xA5 #define DISABLE_TRXPKT_BUF_ACCESS 0x0 //============================================================ // //============================================================ //----------------------------------------------------- // // 0x0000h ~ 0x00FFh System Configuration // //----------------------------------------------------- #define REG_SYS_ISO_CTRL 0x0000 #define REG_SYS_FUNC_EN 0x0002 #define REG_APS_FSMCO 0x0004 #define REG_SYS_CLKR 0x0008 #define REG_9346CR 0x000A #define REG_SYS_EEPROM_CTRL 0x000A #define REG_EE_VPD 0x000C #define REG_AFE_MISC 0x0010 #define REG_SPS0_CTRL 0x0011 #define REG_SPS0_CTRL_6 0x0016 #define REG_POWER_OFF_IN_PROCESS 0x0017 #define REG_SPS_OCP_CFG 0x0018 #define REG_RSV_CTRL 0x001C #define REG_RF_CTRL 0x001F #define REG_LDOA15_CTRL 0x0020 #define REG_LDOV12D_CTRL 0x0021 #define REG_LDOHCI12_CTRL 0x0022 #define REG_LPLDO_CTRL 0x0023 #define REG_AFE_XTAL_CTRL 0x0024 #define REG_AFE_LDO_CTRL 0x0027 // 1.5v for 8188EE test chip, 1.4v for MP chip #define REG_AFE_PLL_CTRL 0x0028 #define REG_MAC_PHY_CTRL 0x002c //for 92d, DMDP,SMSP,DMSP contrl #define REG_APE_PLL_CTRL_EXT 0x002c #define REG_EFUSE_CTRL 0x0030 #define REG_EFUSE_TEST 0x0034 #define REG_PWR_DATA 0x0038 #define REG_CAL_TIMER 0x003C #define REG_ACLK_MON 0x003E #define REG_GPIO_MUXCFG 0x0040 #define REG_GPIO_IO_SEL 0x0042 #define REG_MAC_PINMUX_CFG 0x0043 #define REG_GPIO_PIN_CTRL 0x0044 #define REG_GPIO_INTM 0x0048 #define REG_LEDCFG0 0x004C #define REG_LEDCFG1 0x004D #define REG_LEDCFG2 0x004E #define REG_LEDCFG3 0x004F #define REG_FSIMR 0x0050 #define REG_FSISR 0x0054 #define REG_HSIMR 0x0058 #define REG_HSISR 0x005c #define REG_GPIO_PIN_CTRL_2 0x0060 // RTL8723 WIFI/BT/GPS Multi-Function GPIO Pin Control. #define REG_GPIO_IO_SEL_2 0x0062 // RTL8723 WIFI/BT/GPS Multi-Function GPIO Select. #define REG_MULTI_FUNC_CTRL 0x0068 // RTL8723 WIFI/BT/GPS Multi-Function control source. #define REG_GSSR 0x006c #define REG_AFE_XTAL_CTRL_EXT 0x0078 //RTL8188E #define REG_XCK_OUT_CTRL 0x007c //RTL8188E #define REG_MCUFWDL 0x0080 #define REG_WOL_EVENT 0x0081 //RTL8188E #define REG_MCUTSTCFG 0x0084 #define REG_FDHM0 0x0088 #define REG_HOST_SUSP_CNT 0x00BC // RTL8192C Host suspend counter on FPGA platform #define REG_SYSTEM_ON_CTRL 0x00CC // For 8723AE Reset after S3 #define REG_EFUSE_ACCESS 0x00CF // Efuse access protection for RTL8723 #define REG_BIST_SCAN 0x00D0 #define REG_BIST_RPT 0x00D4 #define REG_BIST_ROM_RPT 0x00D8 #define REG_USB_SIE_INTF 0x00E0 #define REG_PCIE_MIO_INTF 0x00E4 #define REG_PCIE_MIO_INTD 0x00E8 #define REG_HPON_FSM 0x00EC #define REG_SYS_CFG 0x00F0 #define REG_GPIO_OUTSTS 0x00F4 // For RTL8723 only. #define REG_TYPE_ID 0x00FC // // 2010/12/29 MH Add for 92D // #define REG_MAC_PHY_CTRL_NORMAL 0x00f8 //----------------------------------------------------- // // 0x0100h ~ 0x01FFh MACTOP General Configuration // //----------------------------------------------------- #define REG_CR 0x0100 #define REG_PBP 0x0104 #define REG_PKT_BUFF_ACCESS_CTRL 0x0106 #define REG_TRXDMA_CTRL 0x010C #define REG_TRXFF_BNDY 0x0114 #define REG_TRXFF_STATUS 0x0118 #define REG_RXFF_PTR 0x011C #define REG_HIMR 0x0120 #define REG_HISR 0x0124 #define REG_HIMRE 0x0128 #define REG_HISRE 0x012C #define REG_CPWM 0x012F #define REG_FWIMR 0x0130 #define REG_FWISR 0x0134 #define REG_FTIMR 0x0138 #define REG_FTISR 0x013C //RTL8192C #define REG_PKTBUF_DBG_CTRL 0x0140 #define REG_RXPKTBUF_CTRL (REG_PKTBUF_DBG_CTRL+2) #define REG_PKTBUF_DBG_DATA_L 0x0144 #define REG_PKTBUF_DBG_DATA_H 0x0148 #define REG_TC0_CTRL 0x0150 #define REG_TC1_CTRL 0x0154 #define REG_TC2_CTRL 0x0158 #define REG_TC3_CTRL 0x015C #define REG_TC4_CTRL 0x0160 #define REG_TCUNIT_BASE 0x0164 #define REG_MBIST_START 0x0174 #define REG_MBIST_DONE 0x0178 #define REG_MBIST_FAIL 0x017C #define REG_32K_CTRL 0x0194 //RTL8188E #define REG_C2HEVT_MSG_NORMAL 0x01A0 #define REG_C2HEVT_CLEAR 0x01AF #define REG_MCUTST_1 0x01c0 #define REG_MCUTST_WOWLAN 0x01C7 // Defined after 8188E series. #define REG_FMETHR 0x01C8 #define REG_HMETFR 0x01CC #define REG_HMEBOX_0 0x01D0 #define REG_HMEBOX_1 0x01D4 #define REG_HMEBOX_2 0x01D8 #define REG_HMEBOX_3 0x01DC #define REG_LLT_INIT 0x01E0 //----------------------------------------------------- // // 0x0200h ~ 0x027Fh TXDMA Configuration // //----------------------------------------------------- #define REG_RQPN 0x0200 #define REG_FIFOPAGE 0x0204 #define REG_TDECTRL 0x0208 #define REG_TXDMA_OFFSET_CHK 0x020C #define REG_TXDMA_STATUS 0x0210 #define REG_RQPN_NPQ 0x0214 #define REG_AUTO_LLT 0x0224 //----------------------------------------------------- // // 0x0280h ~ 0x02FFh RXDMA Configuration // //----------------------------------------------------- #define REG_RXDMA_AGG_PG_TH 0x0280 #define REG_RXPKT_NUM 0x0284 #define REG_RXDMA_STATUS 0x0288 //----------------------------------------------------- // // 0x0300h ~ 0x03FFh PCIe // //----------------------------------------------------- #define REG_PCIE_CTRL_REG 0x0300 #define REG_INT_MIG 0x0304 // Interrupt Migration #define REG_BCNQ_DESA 0x0308 // TX Beacon Descriptor Address #define REG_HQ_DESA 0x0310 // TX High Queue Descriptor Address #define REG_MGQ_DESA 0x0318 // TX Manage Queue Descriptor Address #define REG_VOQ_DESA 0x0320 // TX VO Queue Descriptor Address #define REG_VIQ_DESA 0x0328 // TX VI Queue Descriptor Address #define REG_BEQ_DESA 0x0330 // TX BE Queue Descriptor Address #define REG_BKQ_DESA 0x0338 // TX BK Queue Descriptor Address #define REG_RX_DESA 0x0340 // RX Queue Descriptor Address //sherry added for DBI Read/Write 20091126 #define REG_DBI_WDATA 0x0348 // Backdoor REG for Access Configuration #define REG_DBI_RDATA 0x034C //Backdoor REG for Access Configuration #define REG_DBI_CTRL 0x0350 //Backdoor REG for Access Configuration #define REG_DBI_FLAG 0x0352 //Backdoor REG for Access Configuration #define REG_MDIO 0x0354 // MDIO for Access PCIE PHY #define REG_DBG_SEL 0x0360 // Debug Selection Register #define REG_PCIE_HRPWM 0x0361 //PCIe RPWM #define REG_PCIE_HCPWM 0x0363 //PCIe CPWM #define REG_WATCH_DOG 0x0368 // RTL8723 series ------------------------------- #define REG_PCIE_HISR_EN 0x0394 //PCIE Local Interrupt Enable Register #define REG_PCIE_HISR 0x03A0 #define REG_PCIE_HISRE 0x03A4 #define REG_PCIE_HIMR 0x03A8 #define REG_PCIE_HIMRE 0x03AC #define REG_USB_HIMR 0xFE38 #define REG_USB_HIMRE 0xFE3C #define REG_USB_HISR 0xFE78 #define REG_USB_HISRE 0xFE7C //----------------------------------------------------- // // 0x0400h ~ 0x047Fh Protocol Configuration // //----------------------------------------------------- /* 92C, 92D */ #define REG_VOQ_INFO 0x0400 #define REG_VIQ_INFO 0x0404 #define REG_BEQ_INFO 0x0408 #define REG_BKQ_INFO 0x040C /* 88E, 8723A, 8812A, 8821A, 92E, 8723B */ #define REG_Q0_INFO 0x400 #define REG_Q1_INFO 0x404 #define REG_Q2_INFO 0x408 #define REG_Q3_INFO 0x40C #define REG_MGQ_INFO 0x0410 #define REG_HGQ_INFO 0x0414 #define REG_BCNQ_INFO 0x0418 #define REG_TXPKT_EMPTY 0x041A #define REG_CPU_MGQ_INFORMATION 0x041C #define REG_FWHW_TXQ_CTRL 0x0420 #define REG_HWSEQ_CTRL 0x0423 #define REG_BCNQ_BDNY 0x0424 #define REG_MGQ_BDNY 0x0425 #define REG_LIFETIME_CTRL 0x0426 #define REG_MULTI_BCNQ_OFFSET 0x0427 #define REG_SPEC_SIFS 0x0428 #define REG_RL 0x042A #define REG_DARFRC 0x0430 #define REG_RARFRC 0x0438 #define REG_RRSR 0x0440 #define REG_ARFR0 0x0444 #define REG_ARFR1 0x0448 #define REG_ARFR2 0x044C #define REG_ARFR3 0x0450 #define REG_BCNQ1_BDNY 0x0457 #define REG_AGGLEN_LMT 0x0458 #define REG_AMPDU_MIN_SPACE 0x045C #define REG_WMAC_LBK_BF_HD 0x045D #define REG_FAST_EDCA_CTRL 0x0460 #define REG_RD_RESP_PKT_TH 0x0463 /* 8723A, 8812A, 8821A, 92E, 8723B */ #define REG_Q4_INFO 0x468 #define REG_Q5_INFO 0x46C #define REG_Q6_INFO 0x470 #define REG_Q7_INFO 0x474 #define REG_INIRTS_RATE_SEL 0x0480 #define REG_INIDATA_RATE_SEL 0x0484 /* 8723B, 92E, 8812A, 8821A*/ #define REG_MACID_SLEEP_3 0x0484 #define REG_MACID_SLEEP_1 0x0488 #define REG_POWER_STAGE1 0x04B4 #define REG_POWER_STAGE2 0x04B8 #define REG_PKT_VO_VI_LIFE_TIME 0x04C0 #define REG_PKT_BE_BK_LIFE_TIME 0x04C2 #define REG_STBC_SETTING 0x04C4 #define REG_QUEUE_CTRL 0x04C6 #define REG_SINGLE_AMPDU_CTRL 0x04c7 #define REG_PROT_MODE_CTRL 0x04C8 #define REG_MAX_AGGR_NUM 0x04CA #define REG_RTS_MAX_AGGR_NUM 0x04CB #define REG_BAR_MODE_CTRL 0x04CC #define REG_RA_TRY_RATE_AGG_LMT 0x04CF /* 8723A */ #define REG_MACID_DROP 0x04D0 /* 88E */ #define REG_EARLY_MODE_CONTROL 0x04D0 /* 8723B, 92E, 8812A, 8821A */ #define REG_MACID_SLEEP_2 0x04D0 /* 8723A, 8723B, 92E, 8812A, 8821A */ #define REG_MACID_SLEEP 0x04D4 #define REG_NQOS_SEQ 0x04DC #define REG_QOS_SEQ 0x04DE #define REG_NEED_CPU_HANDLE 0x04E0 #define REG_PKT_LOSE_RPT 0x04E1 #define REG_PTCL_ERR_STATUS 0x04E2 #define REG_TX_RPT_CTRL 0x04EC #define REG_TX_RPT_TIME 0x04F0 // 2 byte #define REG_DUMMY 0x04FC //----------------------------------------------------- // // 0x0500h ~ 0x05FFh EDCA Configuration // //----------------------------------------------------- #define REG_EDCA_VO_PARAM 0x0500 #define REG_EDCA_VI_PARAM 0x0504 #define REG_EDCA_BE_PARAM 0x0508 #define REG_EDCA_BK_PARAM 0x050C #define REG_BCNTCFG 0x0510 #define REG_PIFS 0x0512 #define REG_RDG_PIFS 0x0513 #define REG_SIFS_CTX 0x0514 #define REG_SIFS_TRX 0x0516 #define REG_TSFTR_SYN_OFFSET 0x0518 #define REG_AGGR_BREAK_TIME 0x051A #define REG_SLOT 0x051B #define REG_TX_PTCL_CTRL 0x0520 #define REG_TXPAUSE 0x0522 #define REG_DIS_TXREQ_CLR 0x0523 #define REG_RD_CTRL 0x0524 // // Format for offset 540h-542h: // [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. // [7:4]: Reserved. // [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. // [23:20]: Reserved // Description: // | // |<--Setup--|--Hold------------>| // --------------|---------------------- // | // TBTT // Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. // Described by Designer Tim and Bruce, 2011-01-14. // #define REG_TBTT_PROHIBIT 0x0540 #define REG_RD_NAV_NXT 0x0544 #define REG_NAV_PROT_LEN 0x0546 #define REG_BCN_CTRL 0x0550 #define REG_BCN_CTRL_1 0x0551 #define REG_MBID_NUM 0x0552 #define REG_DUAL_TSF_RST 0x0553 #define REG_BCN_INTERVAL 0x0554 // The same as REG_MBSSID_BCN_SPACE #define REG_DRVERLYINT 0x0558 #define REG_BCNDMATIM 0x0559 #define REG_ATIMWND 0x055A #define REG_USTIME_TSF 0x055C #define REG_BCN_MAX_ERR 0x055D #define REG_RXTSF_OFFSET_CCK 0x055E #define REG_RXTSF_OFFSET_OFDM 0x055F #define REG_TSFTR 0x0560 #define REG_TSFTR1 0x0568 // HW Port 1 TSF Register #define REG_ATIMWND_1 0x0570 #define REG_P2P_CTWIN 0x0572 // 1 Byte long (in unit of TU) #define REG_PSTIMER 0x0580 #define REG_TIMER0 0x0584 #define REG_TIMER1 0x0588 #define REG_ACMHWCTRL 0x05C0 #define REG_NOA_DESC_SEL 0x05CF #define REG_NOA_DESC_DURATION 0x05E0 #define REG_NOA_DESC_INTERVAL 0x05E4 #define REG_NOA_DESC_START 0x05E8 #define REG_NOA_DESC_COUNT 0x05EC #define REG_DMC 0x05F0 //Dual MAC Co-Existence Register #define REG_SCH_TX_CMD 0x05F8 #define REG_FW_RESET_TSF_CNT_1 0x05FC #define REG_FW_RESET_TSF_CNT_0 0x05FD #define REG_FW_BCN_DIS_CNT 0x05FE //----------------------------------------------------- // // 0x0600h ~ 0x07FFh WMAC Configuration // //----------------------------------------------------- #define REG_APSD_CTRL 0x0600 #define REG_BWOPMODE 0x0603 #define REG_TCR 0x0604 #define REG_RCR 0x0608 #define REG_RX_PKT_LIMIT 0x060C #define REG_RX_DLK_TIME 0x060D #define REG_RX_DRVINFO_SZ 0x060F #define REG_MACID 0x0610 #define REG_BSSID 0x0618 #define REG_MAR 0x0620 #define REG_MBIDCAMCFG 0x0628 #define REG_PNO_STATUS 0x0631 #define REG_USTIME_EDCA 0x0638 #define REG_MAC_SPEC_SIFS 0x063A // 20100719 Joseph: Hardware register definition change. (HW datasheet v54) #define REG_RESP_SIFS_CCK 0x063C // [15:8]SIFS_R2T_OFDM, [7:0]SIFS_R2T_CCK #define REG_RESP_SIFS_OFDM 0x063E // [15:8]SIFS_T2T_OFDM, [7:0]SIFS_T2T_CCK #define REG_ACKTO 0x0640 #define REG_CTS2TO 0x0641 #define REG_EIFS 0x0642 //RXERR_RPT #define RXERR_TYPE_OFDM_PPDU 0 #define RXERR_TYPE_OFDM_FALSE_ALARM 1 #define RXERR_TYPE_OFDM_MPDU_OK 2 #define RXERR_TYPE_OFDM_MPDU_FAIL 3 #define RXERR_TYPE_CCK_PPDU 4 #define RXERR_TYPE_CCK_FALSE_ALARM 5 #define RXERR_TYPE_CCK_MPDU_OK 6 #define RXERR_TYPE_CCK_MPDU_FAIL 7 #define RXERR_TYPE_HT_PPDU 8 #define RXERR_TYPE_HT_FALSE_ALARM 9 #define RXERR_TYPE_HT_MPDU_TOTAL 10 #define RXERR_TYPE_HT_MPDU_OK 11 #define RXERR_TYPE_HT_MPDU_FAIL 12 #define RXERR_TYPE_RX_FULL_DROP 15 #define RXERR_COUNTER_MASK 0xFFFFF #define RXERR_RPT_RST BIT(27) #define _RXERR_RPT_SEL(type) ((type) << 28) // // Note: // The NAV upper value is very important to WiFi 11n 5.2.3 NAV test. The default value is // always too small, but the WiFi TestPlan test by 25,000 microseconds of NAV through sending // CTS in the air. We must update this value greater than 25,000 microseconds to pass the item. // The offset of NAV_UPPER in 8192C Spec is incorrect, and the offset should be 0x0652. Commented // by SD1 Scott. // By Bruce, 2011-07-18. // #define REG_NAV_UPPER 0x0652 // unit of 128 //WMA, BA, CCX #define REG_NAV_CTRL 0x0650 #define REG_BACAMCMD 0x0654 #define REG_BACAMCONTENT 0x0658 #define REG_LBDLY 0x0660 #define REG_FWDLY 0x0661 #define REG_RXERR_RPT 0x0664 #define REG_WMAC_TRXPTCL_CTL 0x0668 // Security #define REG_CAMCMD 0x0670 #define REG_CAMWRITE 0x0674 #define REG_CAMREAD 0x0678 #define REG_CAMDBG 0x067C #define REG_SECCFG 0x0680 // Power #define REG_WOW_CTRL 0x0690 #define REG_PS_RX_INFO 0x0692 #define REG_UAPSD_TID 0x0693 #define REG_WKFMCAM_CMD 0x0698 #define REG_WKFMCAM_NUM REG_WKFMCAM_CMD #define REG_WKFMCAM_RWD 0x069C #define REG_RXFLTMAP0 0x06A0 #define REG_RXFLTMAP1 0x06A2 #define REG_RXFLTMAP2 0x06A4 #define REG_BCN_PSR_RPT 0x06A8 #define REG_BT_COEX_TABLE 0x06C0 // Hardware Port 2 #define REG_MACID1 0x0700 #define REG_BSSID1 0x0708 //----------------------------------------------------- // // 0xFE00h ~ 0xFE55h USB Configuration // //----------------------------------------------------- #define REG_USB_INFO 0xFE17 #define REG_USB_SPECIAL_OPTION 0xFE55 #define REG_USB_DMA_AGG_TO 0xFE5B #define REG_USB_AGG_TO 0xFE5C #define REG_USB_AGG_TH 0xFE5D #define REG_USB_HRPWM 0xFE58 #define REG_USB_HCPWM 0xFE57 // for 92DU high_Queue low_Queue Normal_Queue select #define REG_USB_High_NORMAL_Queue_Select_MAC0 0xFE44 //#define REG_USB_LOW_Queue_Select_MAC0 0xFE45 #define REG_USB_High_NORMAL_Queue_Select_MAC1 0xFE47 //#define REG_USB_LOW_Queue_Select_MAC1 0xFE48 // For test chip #define REG_TEST_USB_TXQS 0xFE48 #define REG_TEST_SIE_VID 0xFE60 // 0xFE60~0xFE61 #define REG_TEST_SIE_PID 0xFE62 // 0xFE62~0xFE63 #define REG_TEST_SIE_OPTIONAL 0xFE64 #define REG_TEST_SIE_CHIRP_K 0xFE65 #define REG_TEST_SIE_PHY 0xFE66 // 0xFE66~0xFE6B #define REG_TEST_SIE_MAC_ADDR 0xFE70 // 0xFE70~0xFE75 #define REG_TEST_SIE_STRING 0xFE80 // 0xFE80~0xFEB9 // For normal chip #define REG_NORMAL_SIE_VID 0xFE60 // 0xFE60~0xFE61 #define REG_NORMAL_SIE_PID 0xFE62 // 0xFE62~0xFE63 #define REG_NORMAL_SIE_OPTIONAL 0xFE64 #define REG_NORMAL_SIE_EP 0xFE65 // 0xFE65~0xFE67 #define REG_NORMAL_SIE_PHY 0xFE68 // 0xFE68~0xFE6B #define REG_NORMAL_SIE_OPTIONAL2 0xFE6C #define REG_NORMAL_SIE_GPS_EP 0xFE6D // 0xFE6D, for RTL8723 only. #define REG_NORMAL_SIE_MAC_ADDR 0xFE70 // 0xFE70~0xFE75 #define REG_NORMAL_SIE_STRING 0xFE80 // 0xFE80~0xFEDF //----------------------------------------------------- // // Redifine 8192C register definition for compatibility // //----------------------------------------------------- // TODO: use these definition when using REG_xxx naming rule. // NOTE: DO NOT Remove these definition. Use later. #define EFUSE_CTRL REG_EFUSE_CTRL // E-Fuse Control. #define EFUSE_TEST REG_EFUSE_TEST // E-Fuse Test. #define MSR (REG_CR + 2) // Media Status register //#define ISR REG_HISR #define TSFR REG_TSFTR // Timing Sync Function Timer Register. #define TSFR1 REG_TSFTR1 // HW Port 1 TSF Register #define PBP REG_PBP // Redifine MACID register, to compatible prior ICs. #define IDR0 REG_MACID // MAC ID Register, Offset 0x0050-0x0053 #define IDR4 (REG_MACID + 4) // MAC ID Register, Offset 0x0054-0x0055 // // 9. Security Control Registers (Offset: ) // #define RWCAM REG_CAMCMD //IN 8190 Data Sheet is called CAMcmd #define WCAMI REG_CAMWRITE // Software write CAM input content #define RCAMO REG_CAMREAD // Software read/write CAM config #define CAMDBG REG_CAMDBG #define SECR REG_SECCFG //Security Configuration Register // Unused register #define UnusedRegister 0x1BF #define DCAM UnusedRegister #define PSR UnusedRegister #define BBAddr UnusedRegister #define PhyDataR UnusedRegister // Min Spacing related settings. #define MAX_MSS_DENSITY_2T 0x13 #define MAX_MSS_DENSITY_1T 0x0A //---------------------------------------------------------------------------- // 8192C Cmd9346CR bits (Offset 0xA, 16bit) //---------------------------------------------------------------------------- #define CmdEEPROM_En BIT5 // EEPROM enable when set 1 #define CmdEERPOMSEL BIT4 // System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is 9346 #define Cmd9346CR_9356SEL BIT4 //---------------------------------------------------------------------------- // 8192C GPIO MUX Configuration Register (offset 0x40, 4 byte) //---------------------------------------------------------------------------- #define GPIOSEL_GPIO 0 #define GPIOSEL_ENBT BIT5 //---------------------------------------------------------------------------- // 8192C GPIO PIN Control Register (offset 0x44, 4 byte) //---------------------------------------------------------------------------- #define GPIO_IN REG_GPIO_PIN_CTRL // GPIO pins input value #define GPIO_OUT (REG_GPIO_PIN_CTRL+1) // GPIO pins output value #define GPIO_IO_SEL (REG_GPIO_PIN_CTRL+2) // GPIO pins output enable when a bit is set to "1"; otherwise, input is configured. #define GPIO_MOD (REG_GPIO_PIN_CTRL+3) //---------------------------------------------------------------------------- // 8811A GPIO PIN Control Register (offset 0x60, 4 byte) //---------------------------------------------------------------------------- #define GPIO_IN_8811A REG_GPIO_PIN_CTRL_2 // GPIO pins input value #define GPIO_OUT_8811A (REG_GPIO_PIN_CTRL_2+1) // GPIO pins output value #define GPIO_IO_SEL_8811A (REG_GPIO_PIN_CTRL_2+2) // GPIO pins output enable when a bit is set to "1"; otherwise, input is configured. #define GPIO_MOD_8811A (REG_GPIO_PIN_CTRL_2+3) //---------------------------------------------------------------------------- // 8723/8188E Host System Interrupt Mask Register (offset 0x58, 32 byte) //---------------------------------------------------------------------------- #define HSIMR_GPIO12_0_INT_EN BIT0 #define HSIMR_SPS_OCP_INT_EN BIT5 #define HSIMR_RON_INT_EN BIT6 #define HSIMR_PDN_INT_EN BIT7 #define HSIMR_GPIO9_INT_EN BIT25 //---------------------------------------------------------------------------- // 8723/8188E Host System Interrupt Status Register (offset 0x5C, 32 byte) //---------------------------------------------------------------------------- #define HSISR_GPIO12_0_INT BIT0 #define HSISR_SPS_OCP_INT BIT5 #define HSISR_RON_INT BIT6 #define HSISR_PDNINT BIT7 #define HSISR_GPIO9_INT BIT25 //---------------------------------------------------------------------------- // 8192C (MSR) Media Status Register (Offset 0x4C, 8 bits) //---------------------------------------------------------------------------- /* Network Type 00: No link 01: Link in ad hoc network 10: Link in infrastructure network 11: AP mode Default: 00b. */ #define MSR_NOLINK 0x00 #define MSR_ADHOC 0x01 #define MSR_INFRA 0x02 #define MSR_AP 0x03 //---------------------------------------------------------------------------- // USB INTR CONTENT //---------------------------------------------------------------------------- #define USB_C2H_CMDID_OFFSET 0 #define USB_C2H_SEQ_OFFSET 1 #define USB_C2H_EVENT_OFFSET 2 #define USB_INTR_CPWM_OFFSET 16 #define USB_INTR_CONTENT_C2H_OFFSET 0 #define USB_INTR_CONTENT_CPWM1_OFFSET 16 #define USB_INTR_CONTENT_CPWM2_OFFSET 20 #define USB_INTR_CONTENT_HISR_OFFSET 48 #define USB_INTR_CONTENT_HISRE_OFFSET 52 #define USB_INTR_CONTENT_LENGTH 56 //---------------------------------------------------------------------------- // Response Rate Set Register (offset 0x440, 24bits) //---------------------------------------------------------------------------- #define RRSR_1M BIT0 #define RRSR_2M BIT1 #define RRSR_5_5M BIT2 #define RRSR_11M BIT3 #define RRSR_6M BIT4 #define RRSR_9M BIT5 #define RRSR_12M BIT6 #define RRSR_18M BIT7 #define RRSR_24M BIT8 #define RRSR_36M BIT9 #define RRSR_48M BIT10 #define RRSR_54M BIT11 #define RRSR_MCS0 BIT12 #define RRSR_MCS1 BIT13 #define RRSR_MCS2 BIT14 #define RRSR_MCS3 BIT15 #define RRSR_MCS4 BIT16 #define RRSR_MCS5 BIT17 #define RRSR_MCS6 BIT18 #define RRSR_MCS7 BIT19 #define RRSR_CCK_RATES (RRSR_11M|RRSR_5_5M|RRSR_2M|RRSR_1M) #define RRSR_OFDM_RATES (RRSR_54M|RRSR_48M|RRSR_36M|RRSR_24M|RRSR_18M|RRSR_12M|RRSR_9M|RRSR_6M) // WOL bit information #define HAL92C_WOL_PTK_UPDATE_EVENT BIT0 #define HAL92C_WOL_GTK_UPDATE_EVENT BIT1 #define HAL92C_WOL_DISASSOC_EVENT BIT2 #define HAL92C_WOL_DEAUTH_EVENT BIT3 #define HAL92C_WOL_FW_DISCONNECT_EVENT BIT4 //---------------------------------------------------------------------------- // Rate Definition //---------------------------------------------------------------------------- //CCK #define RATR_1M 0x00000001 #define RATR_2M 0x00000002 #define RATR_55M 0x00000004 #define RATR_11M 0x00000008 //OFDM #define RATR_6M 0x00000010 #define RATR_9M 0x00000020 #define RATR_12M 0x00000040 #define RATR_18M 0x00000080 #define RATR_24M 0x00000100 #define RATR_36M 0x00000200 #define RATR_48M 0x00000400 #define RATR_54M 0x00000800 //MCS 1 Spatial Stream #define RATR_MCS0 0x00001000 #define RATR_MCS1 0x00002000 #define RATR_MCS2 0x00004000 #define RATR_MCS3 0x00008000 #define RATR_MCS4 0x00010000 #define RATR_MCS5 0x00020000 #define RATR_MCS6 0x00040000 #define RATR_MCS7 0x00080000 //MCS 2 Spatial Stream #define RATR_MCS8 0x00100000 #define RATR_MCS9 0x00200000 #define RATR_MCS10 0x00400000 #define RATR_MCS11 0x00800000 #define RATR_MCS12 0x01000000 #define RATR_MCS13 0x02000000 #define RATR_MCS14 0x04000000 #define RATR_MCS15 0x08000000 //CCK #define RATE_1M BIT(0) #define RATE_2M BIT(1) #define RATE_5_5M BIT(2) #define RATE_11M BIT(3) //OFDM #define RATE_6M BIT(4) #define RATE_9M BIT(5) #define RATE_12M BIT(6) #define RATE_18M BIT(7) #define RATE_24M BIT(8) #define RATE_36M BIT(9) #define RATE_48M BIT(10) #define RATE_54M BIT(11) //MCS 1 Spatial Stream #define RATE_MCS0 BIT(12) #define RATE_MCS1 BIT(13) #define RATE_MCS2 BIT(14) #define RATE_MCS3 BIT(15) #define RATE_MCS4 BIT(16) #define RATE_MCS5 BIT(17) #define RATE_MCS6 BIT(18) #define RATE_MCS7 BIT(19) //MCS 2 Spatial Stream #define RATE_MCS8 BIT(20) #define RATE_MCS9 BIT(21) #define RATE_MCS10 BIT(22) #define RATE_MCS11 BIT(23) #define RATE_MCS12 BIT(24) #define RATE_MCS13 BIT(25) #define RATE_MCS14 BIT(26) #define RATE_MCS15 BIT(27) // ALL CCK Rate #define RATE_ALL_CCK RATR_1M|RATR_2M|RATR_55M|RATR_11M #define RATE_ALL_OFDM_AG RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M|\ RATR_36M|RATR_48M|RATR_54M #define RATE_ALL_OFDM_1SS RATR_MCS0|RATR_MCS1|RATR_MCS2|RATR_MCS3 |\ RATR_MCS4|RATR_MCS5|RATR_MCS6 |RATR_MCS7 #define RATE_ALL_OFDM_2SS RATR_MCS8|RATR_MCS9 |RATR_MCS10|RATR_MCS11|\ RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15 #define RATE_BITMAP_ALL 0xFFFFF // Only use CCK 1M rate for ACK #define RATE_RRSR_CCK_ONLY_1M 0xFFFF1 #define RATE_RRSR_WITHOUT_CCK 0xFFFF0 //---------------------------------------------------------------------------- // BW_OPMODE bits (Offset 0x603, 8bit) //---------------------------------------------------------------------------- #define BW_OPMODE_20MHZ BIT2 #define BW_OPMODE_5G BIT1 //---------------------------------------------------------------------------- // CAM Config Setting (offset 0x680, 1 byte) //---------------------------------------------------------------------------- #define CAM_VALID BIT15 #define CAM_NOTVALID 0x0000 #define CAM_USEDK BIT5 #define CAM_CONTENT_COUNT 8 #define CAM_NONE 0x0 #define CAM_WEP40 0x01 #define CAM_TKIP 0x02 #define CAM_AES 0x04 #define CAM_WEP104 0x05 #define CAM_SMS4 0x6 #define TOTAL_CAM_ENTRY 32 #define HALF_CAM_ENTRY 16 #define CAM_CONFIG_USEDK _TRUE #define CAM_CONFIG_NO_USEDK _FALSE #define CAM_WRITE BIT16 #define CAM_READ 0x00000000 #define CAM_POLLINIG BIT31 // // 10. Power Save Control Registers // #define WOW_PMEN BIT0 // Power management Enable. #define WOW_WOMEN BIT1 // WoW function on or off. #define WOW_MAGIC BIT2 // Magic packet #define WOW_UWF BIT3 // Unicast Wakeup frame. // // 12. Host Interrupt Status Registers // //---------------------------------------------------------------------------- // 8190 IMR/ISR bits //---------------------------------------------------------------------------- #define IMR8190_DISABLED 0x0 #define IMR_DISABLED 0x0 // IMR DW0 Bit 0-31 #define IMR_BCNDMAINT6 BIT31 // Beacon DMA Interrupt 6 #define IMR_BCNDMAINT5 BIT30 // Beacon DMA Interrupt 5 #define IMR_BCNDMAINT4 BIT29 // Beacon DMA Interrupt 4 #define IMR_BCNDMAINT3 BIT28 // Beacon DMA Interrupt 3 #define IMR_BCNDMAINT2 BIT27 // Beacon DMA Interrupt 2 #define IMR_BCNDMAINT1 BIT26 // Beacon DMA Interrupt 1 #define IMR_BCNDOK8 BIT25 // Beacon Queue DMA OK Interrup 8 #define IMR_BCNDOK7 BIT24 // Beacon Queue DMA OK Interrup 7 #define IMR_BCNDOK6 BIT23 // Beacon Queue DMA OK Interrup 6 #define IMR_BCNDOK5 BIT22 // Beacon Queue DMA OK Interrup 5 #define IMR_BCNDOK4 BIT21 // Beacon Queue DMA OK Interrup 4 #define IMR_BCNDOK3 BIT20 // Beacon Queue DMA OK Interrup 3 #define IMR_BCNDOK2 BIT19 // Beacon Queue DMA OK Interrup 2 #define IMR_BCNDOK1 BIT18 // Beacon Queue DMA OK Interrup 1 #define IMR_TIMEOUT2 BIT17 // Timeout interrupt 2 #define IMR_TIMEOUT1 BIT16 // Timeout interrupt 1 #define IMR_TXFOVW BIT15 // Transmit FIFO Overflow #define IMR_PSTIMEOUT BIT14 // Power save time out interrupt #define IMR_BcnInt BIT13 // Beacon DMA Interrupt 0 #define IMR_RXFOVW BIT12 // Receive FIFO Overflow #define IMR_RDU BIT11 // Receive Descriptor Unavailable #define IMR_ATIMEND BIT10 // For 92C,ATIM Window End Interrupt. For 8723 and later ICs, it also means P2P CTWin End interrupt. #define IMR_BDOK BIT9 // Beacon Queue DMA OK Interrup #define IMR_HIGHDOK BIT8 // High Queue DMA OK Interrupt #define IMR_TBDOK BIT7 // Transmit Beacon OK interrup #define IMR_MGNTDOK BIT6 // Management Queue DMA OK Interrupt #define IMR_TBDER BIT5 // For 92C,Transmit Beacon Error Interrupt #define IMR_BKDOK BIT4 // AC_BK DMA OK Interrupt #define IMR_BEDOK BIT3 // AC_BE DMA OK Interrupt #define IMR_VIDOK BIT2 // AC_VI DMA OK Interrupt #define IMR_VODOK BIT1 // AC_VO DMA Interrupt #define IMR_ROK BIT0 // Receive DMA OK Interrupt // 13. Host Interrupt Status Extension Register (Offset: 0x012C-012Eh) #define IMR_TSF_BIT32_TOGGLE BIT15 #define IMR_BcnInt_E BIT12 #define IMR_TXERR BIT11 #define IMR_RXERR BIT10 #define IMR_C2HCMD BIT9 #define IMR_CPWM BIT8 //RSVD [2-7] #define IMR_OCPINT BIT1 #define IMR_WLANOFF BIT0 //---------------------------------------------------------------------------- // 8723E series PCIE Host IMR/ISR bit //---------------------------------------------------------------------------- // IMR DW0 Bit 0-31 #define PHIMR_TIMEOUT2 BIT31 #define PHIMR_TIMEOUT1 BIT30 #define PHIMR_PSTIMEOUT BIT29 #define PHIMR_GTINT4 BIT28 #define PHIMR_GTINT3 BIT27 #define PHIMR_TXBCNERR BIT26 #define PHIMR_TXBCNOK BIT25 #define PHIMR_TSF_BIT32_TOGGLE BIT24 #define PHIMR_BCNDMAINT3 BIT23 #define PHIMR_BCNDMAINT2 BIT22 #define PHIMR_BCNDMAINT1 BIT21 #define PHIMR_BCNDMAINT0 BIT20 #define PHIMR_BCNDOK3 BIT19 #define PHIMR_BCNDOK2 BIT18 #define PHIMR_BCNDOK1 BIT17 #define PHIMR_BCNDOK0 BIT16 #define PHIMR_HSISR_IND_ON BIT15 #define PHIMR_BCNDMAINT_E BIT14 #define PHIMR_ATIMEND_E BIT13 #define PHIMR_ATIM_CTW_END BIT12 #define PHIMR_HISRE_IND BIT11 // RO. HISRE Indicator (HISRE & HIMRE is true, this bit is set to 1) #define PHIMR_C2HCMD BIT10 #define PHIMR_CPWM2 BIT9 #define PHIMR_CPWM BIT8 #define PHIMR_HIGHDOK BIT7 // High Queue DMA OK Interrupt #define PHIMR_MGNTDOK BIT6 // Management Queue DMA OK Interrupt #define PHIMR_BKDOK BIT5 // AC_BK DMA OK Interrupt #define PHIMR_BEDOK BIT4 // AC_BE DMA OK Interrupt #define PHIMR_VIDOK BIT3 // AC_VI DMA OK Interrupt #define PHIMR_VODOK BIT2 // AC_VO DMA Interrupt #define PHIMR_RDU BIT1 // Receive Descriptor Unavailable #define PHIMR_ROK BIT0 // Receive DMA OK Interrupt // PCIE Host Interrupt Status Extension bit #define PHIMR_BCNDMAINT7 BIT23 #define PHIMR_BCNDMAINT6 BIT22 #define PHIMR_BCNDMAINT5 BIT21 #define PHIMR_BCNDMAINT4 BIT20 #define PHIMR_BCNDOK7 BIT19 #define PHIMR_BCNDOK6 BIT18 #define PHIMR_BCNDOK5 BIT17 #define PHIMR_BCNDOK4 BIT16 // bit12 15: RSVD #define PHIMR_TXERR BIT11 #define PHIMR_RXERR BIT10 #define PHIMR_TXFOVW BIT9 #define PHIMR_RXFOVW BIT8 // bit2-7: RSVD #define PHIMR_OCPINT BIT1 // bit0: RSVD #define UHIMR_TIMEOUT2 BIT31 #define UHIMR_TIMEOUT1 BIT30 #define UHIMR_PSTIMEOUT BIT29 #define UHIMR_GTINT4 BIT28 #define UHIMR_GTINT3 BIT27 #define UHIMR_TXBCNERR BIT26 #define UHIMR_TXBCNOK BIT25 #define UHIMR_TSF_BIT32_TOGGLE BIT24 #define UHIMR_BCNDMAINT3 BIT23 #define UHIMR_BCNDMAINT2 BIT22 #define UHIMR_BCNDMAINT1 BIT21 #define UHIMR_BCNDMAINT0 BIT20 #define UHIMR_BCNDOK3 BIT19 #define UHIMR_BCNDOK2 BIT18 #define UHIMR_BCNDOK1 BIT17 #define UHIMR_BCNDOK0 BIT16 #define UHIMR_HSISR_IND BIT15 #define UHIMR_BCNDMAINT_E BIT14 //RSVD BIT13 #define UHIMR_CTW_END BIT12 //RSVD BIT11 #define UHIMR_C2HCMD BIT10 #define UHIMR_CPWM2 BIT9 #define UHIMR_CPWM BIT8 #define UHIMR_HIGHDOK BIT7 // High Queue DMA OK Interrupt #define UHIMR_MGNTDOK BIT6 // Management Queue DMA OK Interrupt #define UHIMR_BKDOK BIT5 // AC_BK DMA OK Interrupt #define UHIMR_BEDOK BIT4 // AC_BE DMA OK Interrupt #define UHIMR_VIDOK BIT3 // AC_VI DMA OK Interrupt #define UHIMR_VODOK BIT2 // AC_VO DMA Interrupt #define UHIMR_RDU BIT1 // Receive Descriptor Unavailable #define UHIMR_ROK BIT0 // Receive DMA OK Interrupt // USB Host Interrupt Status Extension bit #define UHIMR_BCNDMAINT7 BIT23 #define UHIMR_BCNDMAINT6 BIT22 #define UHIMR_BCNDMAINT5 BIT21 #define UHIMR_BCNDMAINT4 BIT20 #define UHIMR_BCNDOK7 BIT19 #define UHIMR_BCNDOK6 BIT18 #define UHIMR_BCNDOK5 BIT17 #define UHIMR_BCNDOK4 BIT16 // bit14-15: RSVD #define UHIMR_ATIMEND_E BIT13 #define UHIMR_ATIMEND BIT12 #define UHIMR_TXERR BIT11 #define UHIMR_RXERR BIT10 #define UHIMR_TXFOVW BIT9 #define UHIMR_RXFOVW BIT8 // bit2-7: RSVD #define UHIMR_OCPINT BIT1 // bit0: RSVD #define HAL_NIC_UNPLUG_ISR 0xFFFFFFFF // The value when the NIC is unplugged for PCI. #define HAL_NIC_UNPLUG_PCI_ISR 0xEAEAEAEA // The value when the NIC is unplugged for PCI in PCI interrupt (page 3). //---------------------------------------------------------------------------- // 8188 IMR/ISR bits //---------------------------------------------------------------------------- #define IMR_DISABLED_88E 0x0 // IMR DW0(0x0060-0063) Bit 0-31 #define IMR_TXCCK_88E BIT30 // TXRPT interrupt when CCX bit of the packet is set #define IMR_PSTIMEOUT_88E BIT29 // Power Save Time Out Interrupt #define IMR_GTINT4_88E BIT28 // When GTIMER4 expires, this bit is set to 1 #define IMR_GTINT3_88E BIT27 // When GTIMER3 expires, this bit is set to 1 #define IMR_TBDER_88E BIT26 // Transmit Beacon0 Error #define IMR_TBDOK_88E BIT25 // Transmit Beacon0 OK #define IMR_TSF_BIT32_TOGGLE_88E BIT24 // TSF Timer BIT32 toggle indication interrupt #define IMR_BCNDMAINT0_88E BIT20 // Beacon DMA Interrupt 0 #define IMR_BCNDERR0_88E BIT16 // Beacon Queue DMA Error 0 #define IMR_HSISR_IND_ON_INT_88E BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) #define IMR_BCNDMAINT_E_88E BIT14 // Beacon DMA Interrupt Extension for Win7 #define IMR_ATIMEND_88E BIT12 // CTWidnow End or ATIM Window End #define IMR_HISR1_IND_INT_88E BIT11 // HISR1 Indicator (HISR1 & HIMR1 is true, this bit is set to 1) #define IMR_C2HCMD_88E BIT10 // CPU to Host Command INT Status, Write 1 clear #define IMR_CPWM2_88E BIT9 // CPU power Mode exchange INT Status, Write 1 clear #define IMR_CPWM_88E BIT8 // CPU power Mode exchange INT Status, Write 1 clear #define IMR_HIGHDOK_88E BIT7 // High Queue DMA OK #define IMR_MGNTDOK_88E BIT6 // Management Queue DMA OK #define IMR_BKDOK_88E BIT5 // AC_BK DMA OK #define IMR_BEDOK_88E BIT4 // AC_BE DMA OK #define IMR_VIDOK_88E BIT3 // AC_VI DMA OK #define IMR_VODOK_88E BIT2 // AC_VO DMA OK #define IMR_RDU_88E BIT1 // Rx Descriptor Unavailable #define IMR_ROK_88E BIT0 // Receive DMA OK // IMR DW1(0x00B4-00B7) Bit 0-31 #define IMR_BCNDMAINT7_88E BIT27 // Beacon DMA Interrupt 7 #define IMR_BCNDMAINT6_88E BIT26 // Beacon DMA Interrupt 6 #define IMR_BCNDMAINT5_88E BIT25 // Beacon DMA Interrupt 5 #define IMR_BCNDMAINT4_88E BIT24 // Beacon DMA Interrupt 4 #define IMR_BCNDMAINT3_88E BIT23 // Beacon DMA Interrupt 3 #define IMR_BCNDMAINT2_88E BIT22 // Beacon DMA Interrupt 2 #define IMR_BCNDMAINT1_88E BIT21 // Beacon DMA Interrupt 1 #define IMR_BCNDOK7_88E BIT20 // Beacon Queue DMA OK Interrup 7 #define IMR_BCNDOK6_88E BIT19 // Beacon Queue DMA OK Interrup 6 #define IMR_BCNDOK5_88E BIT18 // Beacon Queue DMA OK Interrup 5 #define IMR_BCNDOK4_88E BIT17 // Beacon Queue DMA OK Interrup 4 #define IMR_BCNDOK3_88E BIT16 // Beacon Queue DMA OK Interrup 3 #define IMR_BCNDOK2_88E BIT15 // Beacon Queue DMA OK Interrup 2 #define IMR_BCNDOK1_88E BIT14 // Beacon Queue DMA OK Interrup 1 #define IMR_ATIMEND_E_88E BIT13 // ATIM Window End Extension for Win7 #define IMR_TXERR_88E BIT11 // Tx Error Flag Interrupt Status, write 1 clear. #define IMR_RXERR_88E BIT10 // Rx Error Flag INT Status, Write 1 clear #define IMR_TXFOVW_88E BIT9 // Transmit FIFO Overflow #define IMR_RXFOVW_88E BIT8 // Receive FIFO Overflow /*=================================================================== ===================================================================== Here the register defines are for 92C. When the define is as same with 92C, we will use the 92C's define for the consistency So the following defines for 92C is not entire!!!!!! ===================================================================== =====================================================================*/ /* Based on Datasheet V33---090401 Register Summary Current IOREG MAP 0x0000h ~ 0x00FFh System Configuration (256 Bytes) 0x0100h ~ 0x01FFh MACTOP General Configuration (256 Bytes) 0x0200h ~ 0x027Fh TXDMA Configuration (128 Bytes) 0x0280h ~ 0x02FFh RXDMA Configuration (128 Bytes) 0x0300h ~ 0x03FFh PCIE EMAC Reserved Region (256 Bytes) 0x0400h ~ 0x04FFh Protocol Configuration (256 Bytes) 0x0500h ~ 0x05FFh EDCA Configuration (256 Bytes) 0x0600h ~ 0x07FFh WMAC Configuration (512 Bytes) 0x2000h ~ 0x3FFFh 8051 FW Download Region (8196 Bytes) */ //---------------------------------------------------------------------------- // 8192C (TXPAUSE) transmission pause (Offset 0x522, 8 bits) //---------------------------------------------------------------------------- // Note: // The the bits of stoping AC(VO/VI/BE/BK) queue in datasheet RTL8192S/RTL8192C are wrong, // the correct arragement is VO - Bit0, VI - Bit1, BE - Bit2, and BK - Bit3. // 8723 and 88E may be not correct either in the eralier version. Confirmed with DD Tim. // By Bruce, 2011-09-22. #define StopBecon BIT6 #define StopHigh BIT5 #define StopMgt BIT4 #define StopBK BIT3 #define StopBE BIT2 #define StopVI BIT1 #define StopVO BIT0 //---------------------------------------------------------------------------- // 8192C (RCR) Receive Configuration Register (Offset 0x608, 32 bits) //---------------------------------------------------------------------------- #define RCR_APPFCS BIT31 // WMAC append FCS after pauload #define RCR_APP_MIC BIT30 // MACRX will retain the MIC at the bottom of the packet. #define RCR_APP_ICV BIT29 // MACRX will retain the ICV at the bottom of the packet. #define RCR_APP_PHYST_RXFF BIT28 // PHY Status is appended before RX packet in RXFF #define RCR_APP_BA_SSN BIT27 // SSN of previous TXBA is appended as after original RXDESC as the 4-th DW of RXDESC. #define RCR_NONQOS_VHT BIT26 // Reserved #define RCR_RSVD_BIT25 BIT25 // Reserved #define RCR_ENMBID BIT24 // Enable Multiple BssId. Only response ACK to the packets whose DID(A1) matching to the addresses in the MBSSID CAM Entries. #define RCR_LSIGEN BIT23 // Enable LSIG TXOP Protection function. Search KEYCAM for each rx packet to check if LSIGEN bit is set. #define RCR_MFBEN BIT22 // Enable immediate MCS Feedback function. When Rx packet with MRQ = 1'b1, then search KEYCAM to find sender's MCS Feedback function and send response. #define RCR_RSVD_BIT21 BIT21 // Reserved #define RCR_RSVD_BIT20 BIT20 // Reserved #define RCR_RSVD_BIT19 BIT19 // Reserved #define RCR_TIM_PARSER_EN BIT18 // RX Beacon TIM Parser. #define RCR_BM_DATA_EN BIT17 // Broadcast data packet interrupt enable. #define RCR_UC_DATA_EN BIT16 // Unicast data packet interrupt enable. #define RCR_RSVD_BIT15 BIT15 // Reserved #define RCR_HTC_LOC_CTRL BIT14 // MFC<--HTC=1 MFC-->HTC=0 #define RCR_AMF BIT13 // Accept management type frame #define RCR_ACF BIT12 // Accept control type frame. Control frames BA, BAR, and PS-Poll (when in AP mode) are not controlled by this bit. They are controlled by ADF. #define RCR_ADF BIT11 // Accept data type frame. This bit also regulates BA, BAR, and PS-Poll (AP mode only). #define RCR_RSVD_BIT10 BIT10 // Reserved #define RCR_AICV BIT9 // Accept ICV error packet #define RCR_ACRC32 BIT8 // Accept CRC32 error packet #define RCR_CBSSID_BCN BIT7 // Accept BSSID match packet (Rx beacon, probe rsp) #define RCR_CBSSID_DATA BIT6 // Accept BSSID match packet (Data) #define RCR_CBSSID RCR_CBSSID_DATA // Accept BSSID match packet #define RCR_APWRMGT BIT5 // Accept power management packet #define RCR_ADD3 BIT4 // Accept address 3 match packet #define RCR_AB BIT3 // Accept broadcast packet #define RCR_AM BIT2 // Accept multicast packet #define RCR_APM BIT1 // Accept physical match packet #define RCR_AAP BIT0 // Accept all unicast packet //----------------------------------------------------- // // 0x0000h ~ 0x00FFh System Configuration // //----------------------------------------------------- //2 SYS_ISO_CTRL #define ISO_MD2PP BIT(0) #define ISO_UA2USB BIT(1) #define ISO_UD2CORE BIT(2) #define ISO_PA2PCIE BIT(3) #define ISO_PD2CORE BIT(4) #define ISO_IP2MAC BIT(5) #define ISO_DIOP BIT(6) #define ISO_DIOE BIT(7) #define ISO_EB2CORE BIT(8) #define ISO_DIOR BIT(9) #define PWC_EV12V BIT(15) //2 SYS_FUNC_EN #define FEN_BBRSTB BIT(0) #define FEN_BB_GLB_RSTn BIT(1) #define FEN_USBA BIT(2) #define FEN_UPLL BIT(3) #define FEN_USBD BIT(4) #define FEN_DIO_PCIE BIT(5) #define FEN_PCIEA BIT(6) #define FEN_PPLL BIT(7) #define FEN_PCIED BIT(8) #define FEN_DIOE BIT(9) #define FEN_CPUEN BIT(10) #define FEN_DCORE BIT(11) #define FEN_ELDR BIT(12) #define FEN_EN_25_1 BIT(13) #define FEN_HWPDN BIT(14) #define FEN_MREGEN BIT(15) //2 APS_FSMCO #define PFM_LDALL BIT(0) #define PFM_ALDN BIT(1) #define PFM_LDKP BIT(2) #define PFM_WOWL BIT(3) #define EnPDN BIT(4) #define PDN_PL BIT(5) #define APFM_ONMAC BIT(8) #define APFM_OFF BIT(9) #define APFM_RSM BIT(10) #define AFSM_HSUS BIT(11) #define AFSM_PCIE BIT(12) #define APDM_MAC BIT(13) #define APDM_HOST BIT(14) #define APDM_HPDN BIT(15) #define RDY_MACON BIT(16) #define SUS_HOST BIT(17) #define ROP_ALD BIT(20) #define ROP_PWR BIT(21) #define ROP_SPS BIT(22) #define SOP_MRST BIT(25) #define SOP_FUSE BIT(26) #define SOP_ABG BIT(27) #define SOP_AMB BIT(28) #define SOP_RCK BIT(29) #define SOP_A8M BIT(30) #define XOP_BTCK BIT(31) //2 SYS_CLKR #define ANAD16V_EN BIT(0) #define ANA8M BIT(1) #define MACSLP BIT(4) #define LOADER_CLK_EN BIT(5) //2 9346CR /REG_SYS_EEPROM_CTRL #define BOOT_FROM_EEPROM BIT(4) #define EEPROMSEL BIT(4) #define EEPROM_EN BIT(5) //2 RF_CTRL #define RF_EN BIT(0) #define RF_RSTB BIT(1) #define RF_SDMRSTB BIT(2) //2 LDOV12D_CTRL #define LDV12_EN BIT(0) #define LDV12_SDBY BIT(1) #define LPLDO_HSM BIT(2) #define LPLDO_LSM_DIS BIT(3) #define _LDV12_VADJ(x) (((x) & 0xF) << 4) //2 EFUSE_TEST (For RTL8723 partially) #define EF_TRPT BIT(7) #define EF_CELL_SEL (BIT(8)|BIT(9)) // 00: Wifi Efuse, 01: BT Efuse0, 10: BT Efuse1, 11: BT Efuse2 #define LDOE25_EN BIT(31) #define EFUSE_SEL(x) (((x) & 0x3) << 8) #define EFUSE_SEL_MASK 0x300 #define EFUSE_WIFI_SEL_0 0x0 #define EFUSE_BT_SEL_0 0x1 #define EFUSE_BT_SEL_1 0x2 #define EFUSE_BT_SEL_2 0x3 //2 8051FWDL //2 MCUFWDL #define MCUFWDL_EN BIT(0) #define MCUFWDL_RDY BIT(1) #define FWDL_ChkSum_rpt BIT(2) #define MACINI_RDY BIT(3) #define BBINI_RDY BIT(4) #define RFINI_RDY BIT(5) #define WINTINI_RDY BIT(6) #define RAM_DL_SEL BIT(7) #define ROM_DLEN BIT(19) #define CPRST BIT(23) //2 REG_SYS_CFG #define XCLK_VLD BIT(0) #define ACLK_VLD BIT(1) #define UCLK_VLD BIT(2) #define PCLK_VLD BIT(3) #define PCIRSTB BIT(4) #define V15_VLD BIT(5) #define SW_OFFLOAD_EN BIT(7) #define SIC_IDLE BIT(8) #define BD_MAC2 BIT(9) #define BD_MAC1 BIT(10) #define IC_MACPHY_MODE BIT(11) #define CHIP_VER (BIT(12)|BIT(13)|BIT(14)|BIT(15)) #define BT_FUNC BIT(16) #define VENDOR_ID BIT(19) #define EXT_VENDOR_ID (BIT(18)|BIT(19)) //Currently only for RTL8723B #define PAD_HWPD_IDN BIT(22) #define TRP_VAUX_EN BIT(23) // RTL ID #define TRP_BT_EN BIT(24) #define BD_PKG_SEL BIT(25) #define BD_HCI_SEL BIT(26) #define TYPE_ID BIT(27) #define RF_TYPE_ID BIT(27) #define RTL_ID BIT(23) // TestChip ID, 1:Test(RLE); 0:MP(RL) #define SPS_SEL BIT(24) // 1:LDO regulator mode; 0:Switching regulator mode #define CHIP_VER_RTL_MASK 0xF000 //Bit 12 ~ 15 #define CHIP_VER_RTL_SHIFT 12 #define EXT_VENDOR_ID_SHIFT 18 //2 REG_GPIO_OUTSTS (For RTL8723 only) #define EFS_HCI_SEL (BIT(0)|BIT(1)) #define PAD_HCI_SEL (BIT(2)|BIT(3)) #define HCI_SEL (BIT(4)|BIT(5)) #define PKG_SEL_HCI BIT(6) #define FEN_GPS BIT(7) #define FEN_BT BIT(8) #define FEN_WL BIT(9) #define FEN_PCI BIT(10) #define FEN_USB BIT(11) #define BTRF_HWPDN_N BIT(12) #define WLRF_HWPDN_N BIT(13) #define PDN_BT_N BIT(14) #define PDN_GPS_N BIT(15) #define BT_CTL_HWPDN BIT(16) #define GPS_CTL_HWPDN BIT(17) #define PPHY_SUSB BIT(20) #define UPHY_SUSB BIT(21) #define PCI_SUSEN BIT(22) #define USB_SUSEN BIT(23) #define RF_RL_ID (BIT(31)|BIT(30)|BIT(29)|BIT(28)) //----------------------------------------------------- // // 0x0100h ~ 0x01FFh MACTOP General Configuration // //----------------------------------------------------- //2 Function Enable Registers //2 CR #define HCI_TXDMA_EN BIT(0) #define HCI_RXDMA_EN BIT(1) #define TXDMA_EN BIT(2) #define RXDMA_EN BIT(3) #define PROTOCOL_EN BIT(4) #define SCHEDULE_EN BIT(5) #define MACTXEN BIT(6) #define MACRXEN BIT(7) #define ENSWBCN BIT(8) #define ENSEC BIT(9) #define CALTMR_EN BIT(10) // 32k CAL TMR enable // Network type #define _NETTYPE(x) (((x) & 0x3) << 16) #define MASK_NETTYPE 0x30000 #define NT_NO_LINK 0x0 #define NT_LINK_AD_HOC 0x1 #define NT_LINK_AP 0x2 #define NT_AS_AP 0x3 //2 PBP - Page Size Register #define GET_RX_PAGE_SIZE(value) ((value) & 0xF) #define GET_TX_PAGE_SIZE(value) (((value) & 0xF0) >> 4) #define _PSRX_MASK 0xF #define _PSTX_MASK 0xF0 #define _PSRX(x) (x) #define _PSTX(x) ((x) << 4) #define PBP_64 0x0 #define PBP_128 0x1 #define PBP_256 0x2 #define PBP_512 0x3 #define PBP_1024 0x4 //2 TX/RXDMA #define RXDMA_ARBBW_EN BIT(0) #define RXSHFT_EN BIT(1) #define RXDMA_AGG_EN BIT(2) #define QS_VO_QUEUE BIT(8) #define QS_VI_QUEUE BIT(9) #define QS_BE_QUEUE BIT(10) #define QS_BK_QUEUE BIT(11) #define QS_MANAGER_QUEUE BIT(12) #define QS_HIGH_QUEUE BIT(13) #define HQSEL_VOQ BIT(0) #define HQSEL_VIQ BIT(1) #define HQSEL_BEQ BIT(2) #define HQSEL_BKQ BIT(3) #define HQSEL_MGTQ BIT(4) #define HQSEL_HIQ BIT(5) // For normal driver, 0x10C #define _TXDMA_CMQ_MAP(x) (((x)&0x3) << 16) #define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14) #define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12) #define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10) #define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8 ) #define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6 ) #define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4 ) #define QUEUE_EXTRA 0 #define QUEUE_LOW 1 #define QUEUE_NORMAL 2 #define QUEUE_HIGH 3 //2 TRXFF_BNDY //2 LLT_INIT #define _LLT_NO_ACTIVE 0x0 #define _LLT_WRITE_ACCESS 0x1 #define _LLT_READ_ACCESS 0x2 #define _LLT_INIT_DATA(x) ((x) & 0xFF) #define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) #define _LLT_OP(x) (((x) & 0x3) << 30) #define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) //----------------------------------------------------- // // 0x0200h ~ 0x027Fh TXDMA Configuration // //----------------------------------------------------- //2 RQPN #define _HPQ(x) ((x) & 0xFF) #define _LPQ(x) (((x) & 0xFF) << 8) #define _PUBQ(x) (((x) & 0xFF) << 16) #define _NPQ(x) ((x) & 0xFF) // NOTE: in RQPN_NPQ register #define _EPQ(x) (((x) & 0xFF) << 16) // NOTE: in RQPN_EPQ register #define HPQ_PUBLIC_DIS BIT(24) #define LPQ_PUBLIC_DIS BIT(25) #define LD_RQPN BIT(31) //2 TDECTL #define BLK_DESC_NUM_SHIFT 4 #define BLK_DESC_NUM_MASK 0xF //2 TXDMA_OFFSET_CHK #define DROP_DATA_EN BIT(9) //2 AUTO_LLT #define BIT_SHIFT_TXPKTNUM 24 #define BIT_MASK_TXPKTNUM 0xff #define BIT_TXPKTNUM(x) (((x) & BIT_MASK_TXPKTNUM) << BIT_SHIFT_TXPKTNUM) #define BIT_TDE_DBG_SEL BIT(23) #define BIT_AUTO_INIT_LLT BIT(16) #define BIT_SHIFT_Tx_OQT_free_space 8 #define BIT_MASK_Tx_OQT_free_space 0xff #define BIT_Tx_OQT_free_space(x) (((x) & BIT_MASK_Tx_OQT_free_space) << BIT_SHIFT_Tx_OQT_free_space) //----------------------------------------------------- // // 0x0280h ~ 0x028Bh RX DMA Configuration // //----------------------------------------------------- //2 REG_RXDMA_CONTROL, 0x0286h // Write only. When this bit is set, RXDMA will decrease RX PKT counter by one. Before // this bit is polled, FW shall update RXFF_RD_PTR first. This register is write pulse and auto clear. //#define RXPKT_RELEASE_POLL BIT(0) // Read only. When RXMA finishes on-going DMA operation, RXMDA will report idle state in // this bit. FW can start releasing packets after RXDMA entering idle mode. //#define RXDMA_IDLE BIT(1) // When this bit is set, RXDMA will enter this mode after on-going RXDMA packet to host // completed, and stop DMA packet to host. RXDMA will then report Default: 0; //#define RW_RELEASE_EN BIT(2) //2 REG_RXPKT_NUM, 0x0284 #define RXPKT_RELEASE_POLL BIT(16) #define RXDMA_IDLE BIT(17) #define RW_RELEASE_EN BIT(18) //----------------------------------------------------- // // 0x0400h ~ 0x047Fh Protocol Configuration // //----------------------------------------------------- //2 FWHW_TXQ_CTRL #define EN_AMPDU_RTY_NEW BIT(7) //2 SPEC SIFS #define _SPEC_SIFS_CCK(x) ((x) & 0xFF) #define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) //2 RL #define RETRY_LIMIT_SHORT_SHIFT 8 #define RETRY_LIMIT_LONG_SHIFT 0 //----------------------------------------------------- // // 0x0500h ~ 0x05FFh EDCA Configuration // //----------------------------------------------------- //2 EDCA setting #define AC_PARAM_TXOP_LIMIT_OFFSET 16 #define AC_PARAM_ECW_MAX_OFFSET 12 #define AC_PARAM_ECW_MIN_OFFSET 8 #define AC_PARAM_AIFS_OFFSET 0 #define _LRL(x) ((x) & 0x3F) #define _SRL(x) (((x) & 0x3F) << 8) //2 BCN_CTRL #define EN_TXBCN_RPT BIT(2) #define EN_BCN_FUNCTION BIT(3) #define STOP_BCNQ BIT(6) #define DIS_RX_BSSID_FIT BIT(6) #define DIS_ATIM BIT(0) #define DIS_BCNQ_SUB BIT(1) #define DIS_TSF_UDT BIT(4) // The same function but different bit field. #define DIS_TSF_UDT0_NORMAL_CHIP BIT(4) #define DIS_TSF_UDT0_TEST_CHIP BIT(5) //2 ACMHWCTRL #define AcmHw_HwEn BIT(0) #define AcmHw_BeqEn BIT(1) #define AcmHw_ViqEn BIT(2) #define AcmHw_VoqEn BIT(3) #define AcmHw_BeqStatus BIT(4) #define AcmHw_ViqStatus BIT(5) #define AcmHw_VoqStatus BIT(6) //2 //REG_DUAL_TSF_RST (0x553) #define DUAL_TSF_RST_P2P BIT(4) //2 // REG_NOA_DESC_SEL (0x5CF) #define NOA_DESC_SEL_0 0 #define NOA_DESC_SEL_1 BIT(4) //----------------------------------------------------- // // 0x0600h ~ 0x07FFh WMAC Configuration // //----------------------------------------------------- //2 APSD_CTRL #define APSDOFF BIT(6) //2 TCR #define TSFRST BIT(0) #define DIS_GCLK BIT(1) #define PAD_SEL BIT(2) #define PWR_ST BIT(6) #define PWRBIT_OW_EN BIT(7) #define ACRC BIT(8) #define CFENDFORM BIT(9) #define ICV BIT(10) //2 RCR #define AAP BIT(0) #define APM BIT(1) #define AM BIT(2) #define AB BIT(3) #define ADD3 BIT(4) #define APWRMGT BIT(5) #define CBSSID BIT(6) #define CBSSID_DATA BIT(6) #define CBSSID_BCN BIT(7) #define ACRC32 BIT(8) #define AICV BIT(9) #define ADF BIT(11) #define ACF BIT(12) #define AMF BIT(13) #define HTC_LOC_CTRL BIT(14) #define UC_DATA_EN BIT(16) #define BM_DATA_EN BIT(17) #define MFBEN BIT(22) #define LSIGEN BIT(23) #define EnMBID BIT(24) #define FORCEACK BIT(26) #define APP_BASSN BIT(27) #define APP_PHYSTS BIT(28) #define APP_ICV BIT(29) #define APP_MIC BIT(30) #define APP_FCS BIT(31) //2 SECCFG #define SCR_TxUseDK BIT(0) //Force Tx Use Default Key #define SCR_RxUseDK BIT(1) //Force Rx Use Default Key #define SCR_TxEncEnable BIT(2) //Enable Tx Encryption #define SCR_RxDecEnable BIT(3) //Enable Rx Decryption #define SCR_SKByA2 BIT(4) //Search kEY BY A2 #define SCR_NoSKMC BIT(5) //No Key Search Multicast #define SCR_TXBCUSEDK BIT(6) // Force Tx Broadcast packets Use Default Key #define SCR_RXBCUSEDK BIT(7) // Force Rx Broadcast packets Use Default Key #define SCR_CHK_KEYID BIT(8) //----------------------------------------------------- // // SDIO Bus Specification // //----------------------------------------------------- // I/O bus domain address mapping #define SDIO_LOCAL_BASE 0x10250000 #define WLAN_IOREG_BASE 0x10260000 #define FIRMWARE_FIFO_BASE 0x10270000 #define TX_HIQ_BASE 0x10310000 #define TX_MIQ_BASE 0x10320000 #define TX_LOQ_BASE 0x10330000 #define TX_EPQ_BASE 0x10350000 #define RX_RX0FF_BASE 0x10340000 //SDIO host local register space mapping. #define SDIO_LOCAL_MSK 0x0FFF #define WLAN_IOREG_MSK 0x7FFF #define WLAN_FIFO_MSK 0x1FFF // Aggregation Length[12:0] #define WLAN_RX0FF_MSK 0x0003 #define SDIO_WITHOUT_REF_DEVICE_ID 0 // Without reference to the SDIO Device ID #define SDIO_LOCAL_DEVICE_ID 0 // 0b[16], 000b[15:13] #define WLAN_TX_HIQ_DEVICE_ID 4 // 0b[16], 100b[15:13] #define WLAN_TX_MIQ_DEVICE_ID 5 // 0b[16], 101b[15:13] #define WLAN_TX_LOQ_DEVICE_ID 6 // 0b[16], 110b[15:13] #define WLAN_TX_EXQ_DEVICE_ID 3 // 0b[16], 011b[15:13] #define WLAN_RX0FF_DEVICE_ID 7 // 0b[16], 111b[15:13] #define WLAN_IOREG_DEVICE_ID 8 // 1b[16] //SDIO Tx Free Page Index #define HI_QUEUE_IDX 0 #define MID_QUEUE_IDX 1 #define LOW_QUEUE_IDX 2 #define PUBLIC_QUEUE_IDX 3 #define SDIO_MAX_TX_QUEUE 3 // HIQ, MIQ and LOQ #define SDIO_MAX_RX_QUEUE 1 #define SDIO_REG_TX_CTRL 0x0000 // SDIO Tx Control #define SDIO_REG_HIMR 0x0014 // SDIO Host Interrupt Mask #define SDIO_REG_HISR 0x0018 // SDIO Host Interrupt Service Routine #define SDIO_REG_HCPWM 0x0019 // HCI Current Power Mode #define SDIO_REG_RX0_REQ_LEN 0x001C // RXDMA Request Length #define SDIO_REG_OQT_FREE_PG 0x001E // OQT Free Page #define SDIO_REG_FREE_TXPG 0x0020 // Free Tx Buffer Page #define SDIO_REG_HCPWM1 0x0024 // HCI Current Power Mode 1 #define SDIO_REG_HCPWM2 0x0026 // HCI Current Power Mode 2 #define SDIO_REG_FREE_TXPG_SEQ 0x0028 // Free Tx Page Sequence #define SDIO_REG_HTSFR_INFO 0x0030 // HTSF Informaion #define SDIO_REG_HRPWM1 0x0080 // HCI Request Power Mode 1 #define SDIO_REG_HRPWM2 0x0082 // HCI Request Power Mode 2 #define SDIO_REG_HPS_CLKR 0x0084 // HCI Power Save Clock #define SDIO_REG_HSUS_CTRL 0x0086 // SDIO HCI Suspend Control #define SDIO_REG_HIMR_ON 0x0090 //SDIO Host Extension Interrupt Mask Always #define SDIO_REG_HISR_ON 0x0091 //SDIO Host Extension Interrupt Status Always #define SDIO_HIMR_DISABLED 0 // RTL8723/RTL8188E SDIO Host Interrupt Mask Register #define SDIO_HIMR_RX_REQUEST_MSK BIT0 #define SDIO_HIMR_AVAL_MSK BIT1 #define SDIO_HIMR_TXERR_MSK BIT2 #define SDIO_HIMR_RXERR_MSK BIT3 #define SDIO_HIMR_TXFOVW_MSK BIT4 #define SDIO_HIMR_RXFOVW_MSK BIT5 #define SDIO_HIMR_TXBCNOK_MSK BIT6 #define SDIO_HIMR_TXBCNERR_MSK BIT7 #define SDIO_HIMR_BCNERLY_INT_MSK BIT16 #define SDIO_HIMR_C2HCMD_MSK BIT17 #define SDIO_HIMR_CPWM1_MSK BIT18 #define SDIO_HIMR_CPWM2_MSK BIT19 #define SDIO_HIMR_HSISR_IND_MSK BIT20 #define SDIO_HIMR_GTINT3_IND_MSK BIT21 #define SDIO_HIMR_GTINT4_IND_MSK BIT22 #define SDIO_HIMR_PSTIMEOUT_MSK BIT23 #define SDIO_HIMR_OCPINT_MSK BIT24 #define SDIO_HIMR_ATIMEND_MSK BIT25 #define SDIO_HIMR_ATIMEND_E_MSK BIT26 #define SDIO_HIMR_CTWEND_MSK BIT27 //RTL8188E SDIO Specific #define SDIO_HIMR_MCU_ERR_MSK BIT28 #define SDIO_HIMR_TSF_BIT32_TOGGLE_MSK BIT29 // SDIO Host Interrupt Service Routine #define SDIO_HISR_RX_REQUEST BIT0 #define SDIO_HISR_AVAL BIT1 #define SDIO_HISR_TXERR BIT2 #define SDIO_HISR_RXERR BIT3 #define SDIO_HISR_TXFOVW BIT4 #define SDIO_HISR_RXFOVW BIT5 #define SDIO_HISR_TXBCNOK BIT6 #define SDIO_HISR_TXBCNERR BIT7 #define SDIO_HISR_BCNERLY_INT BIT16 #define SDIO_HISR_C2HCMD BIT17 #define SDIO_HISR_CPWM1 BIT18 #define SDIO_HISR_CPWM2 BIT19 #define SDIO_HISR_HSISR_IND BIT20 #define SDIO_HISR_GTINT3_IND BIT21 #define SDIO_HISR_GTINT4_IND BIT22 #define SDIO_HISR_PSTIMEOUT BIT23 #define SDIO_HISR_OCPINT BIT24 #define SDIO_HISR_ATIMEND BIT25 #define SDIO_HISR_ATIMEND_E BIT26 #define SDIO_HISR_CTWEND BIT27 //RTL8188E SDIO Specific #define SDIO_HISR_MCU_ERR BIT28 #define SDIO_HISR_TSF_BIT32_TOGGLE BIT29 #define MASK_SDIO_HISR_CLEAR (SDIO_HISR_TXERR |\ SDIO_HISR_RXERR |\ SDIO_HISR_TXFOVW |\ SDIO_HISR_RXFOVW |\ SDIO_HISR_TXBCNOK |\ SDIO_HISR_TXBCNERR |\ SDIO_HISR_C2HCMD |\ SDIO_HISR_CPWM1 |\ SDIO_HISR_CPWM2 |\ SDIO_HISR_HSISR_IND |\ SDIO_HISR_GTINT3_IND |\ SDIO_HISR_GTINT4_IND |\ SDIO_HISR_PSTIMEOUT |\ SDIO_HISR_OCPINT) // SDIO HCI Suspend Control Register #define HCI_RESUME_PWR_RDY BIT1 #define HCI_SUS_CTRL BIT0 // SDIO Tx FIFO related #define SDIO_TX_FREE_PG_QUEUE 4 // The number of Tx FIFO free page #define SDIO_TX_FIFO_PAGE_SZ 128 #ifdef CONFIG_SDIO_HCI #define MAX_TX_AGG_PACKET_NUMBER 0x8 #else #define MAX_TX_AGG_PACKET_NUMBER 0xFF #define MAX_TX_AGG_PACKET_NUMBER_8812 64 #endif //----------------------------------------------------- // // 0xFE00h ~ 0xFE55h USB Configuration // //----------------------------------------------------- //2 USB Information (0xFE17) #define USB_IS_HIGH_SPEED 0 #define USB_IS_FULL_SPEED 1 #define USB_SPEED_MASK BIT(5) #define USB_NORMAL_SIE_EP_MASK 0xF #define USB_NORMAL_SIE_EP_SHIFT 4 //2 Special Option #define USB_AGG_EN BIT(3) // 0; Use interrupt endpoint to upload interrupt pkt // 1; Use bulk endpoint to upload interrupt pkt, #define INT_BULK_SEL BIT(4) //2REG_C2HEVT_CLEAR #define C2H_EVT_HOST_CLOSE 0x00 // Set by driver and notify FW that the driver has read the C2H command message #define C2H_EVT_FW_CLOSE 0xFF // Set by FW indicating that FW had set the C2H command message and it's not yet read by driver. //2REG_MULTI_FUNC_CTRL(For RTL8723 Only) #define WL_HWPDN_EN BIT0 // Enable GPIO[9] as WiFi HW PDn source #define WL_HWPDN_SL BIT1 // WiFi HW PDn polarity control #define WL_FUNC_EN BIT2 // WiFi function enable #define WL_HWROF_EN BIT3 // Enable GPIO[9] as WiFi RF HW PDn source #define BT_HWPDN_EN BIT16 // Enable GPIO[11] as BT HW PDn source #define BT_HWPDN_SL BIT17 // BT HW PDn polarity control #define BT_FUNC_EN BIT18 // BT function enable #define BT_HWROF_EN BIT19 // Enable GPIO[11] as BT/GPS RF HW PDn source #define GPS_HWPDN_EN BIT20 // Enable GPIO[10] as GPS HW PDn source #define GPS_HWPDN_SL BIT21 // GPS HW PDn polarity control #define GPS_FUNC_EN BIT22 // GPS function enable //3 REG_LIFECTRL_CTRL #define HAL92C_EN_PKT_LIFE_TIME_BK BIT3 #define HAL92C_EN_PKT_LIFE_TIME_BE BIT2 #define HAL92C_EN_PKT_LIFE_TIME_VI BIT1 #define HAL92C_EN_PKT_LIFE_TIME_VO BIT0 #define HAL92C_MSDU_LIFE_TIME_UNIT 128 // in us, said by Tim. //2 8192D PartNo. #define PARTNO_92D_NIC (BIT7|BIT6) #define PARTNO_92D_NIC_REMARK (BIT5|BIT4) #define PARTNO_SINGLE_BAND_VS BIT3 #define PARTNO_SINGLE_BAND_VS_REMARK BIT1 #define PARTNO_CONCURRENT_BAND_VC (BIT3|BIT2) #define PARTNO_CONCURRENT_BAND_VC_REMARK (BIT1|BIT0) //======================================================== // General definitions //======================================================== #define LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(__Adapter) ( IS_VENDOR_8188E_I_CUT_SERIES(__Adapter) ? 255 : 175 ) #define LAST_ENTRY_OF_TX_PKT_BUFFER_8812 255 #define LAST_ENTRY_OF_TX_PKT_BUFFER_8723B 255 #define LAST_ENTRY_OF_TX_PKT_BUFFER_8192C 255 #define LAST_ENTRY_OF_TX_PKT_BUFFER_DUAL_MAC 127 #define POLLING_LLT_THRESHOLD 20 #if defined(CONFIG_RTL8723B) && defined(CONFIG_PCI_HCI) #define POLLING_READY_TIMEOUT_COUNT 6000 #else #define POLLING_READY_TIMEOUT_COUNT 1000 #endif // GPIO BIT #define HAL_8192C_HW_GPIO_WPS_BIT BIT2 #define HAL_8192EU_HW_GPIO_WPS_BIT BIT7 #define HAL_8188E_HW_GPIO_WPS_BIT BIT7 #endif //__HAL_COMMON_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/hal_data.h000077500000000000000000000451571261122257400210470ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HAL_DATA_H__ #define __HAL_DATA_H__ #if 1//def CONFIG_SINGLE_IMG #include "../hal/OUTSRC/phydm_precomp.h" #ifdef CONFIG_BT_COEXIST #include #endif #ifdef CONFIG_SDIO_HCI #include #endif #ifdef CONFIG_GSPI_HCI #include #endif // // For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06. // typedef enum _RT_MULTI_FUNC{ RT_MULTI_FUNC_NONE = 0x00, RT_MULTI_FUNC_WIFI = 0x01, RT_MULTI_FUNC_BT = 0x02, RT_MULTI_FUNC_GPS = 0x04, }RT_MULTI_FUNC,*PRT_MULTI_FUNC; // // For RTL8723 WiFi PDn/GPIO polarity control configuration. 2010.10.08. // typedef enum _RT_POLARITY_CTL { RT_POLARITY_LOW_ACT = 0, RT_POLARITY_HIGH_ACT = 1, } RT_POLARITY_CTL, *PRT_POLARITY_CTL; // For RTL8723 regulator mode. by tynli. 2011.01.14. typedef enum _RT_REGULATOR_MODE { RT_SWITCHING_REGULATOR = 0, RT_LDO_REGULATOR = 1, } RT_REGULATOR_MODE, *PRT_REGULATOR_MODE; // // Interface type. // typedef enum _INTERFACE_SELECT_PCIE{ INTF_SEL0_SOLO_MINICARD = 0, // WiFi solo-mCard INTF_SEL1_BT_COMBO_MINICARD = 1, // WiFi+BT combo-mCard INTF_SEL2_PCIe = 2, // PCIe Card } INTERFACE_SELECT_PCIE, *PINTERFACE_SELECT_PCIE; typedef enum _INTERFACE_SELECT_USB{ INTF_SEL0_USB = 0, // USB INTF_SEL1_USB_High_Power = 1, // USB with high power PA INTF_SEL2_MINICARD = 2, // Minicard INTF_SEL3_USB_Solo = 3, // USB solo-Slim module INTF_SEL4_USB_Combo = 4, // USB Combo-Slim module INTF_SEL5_USB_Combo_MF = 5, // USB WiFi+BT Multi-Function Combo, i.e., Proprietary layout(AS-VAU) which is the same as SDIO card } INTERFACE_SELECT_USB, *PINTERFACE_SELECT_USB; #ifdef CONFIG_USB_HCI //should be sync with INTERFACE_SELECT_USB typedef enum _BOARD_TYPE_8192CUSB{ BOARD_USB_DONGLE = 0, // USB dongle BOARD_USB_High_PA = 1, // USB dongle with high power PA BOARD_MINICARD = 2, // Minicard BOARD_USB_SOLO = 3, // USB solo-Slim module BOARD_USB_COMBO = 4, // USB Combo-Slim module } BOARD_TYPE_8192CUSB, *PBOARD_TYPE_8192CUSB; #define SUPPORT_HW_RADIO_DETECT(pHalData) \ (pHalData->BoardType == BOARD_MINICARD||\ pHalData->BoardType == BOARD_USB_SOLO||\ pHalData->BoardType == BOARD_USB_COMBO) #endif typedef enum _RT_AMPDU_BRUST_MODE{ RT_AMPDU_BRUST_NONE = 0, RT_AMPDU_BRUST_92D = 1, RT_AMPDU_BRUST_88E = 2, RT_AMPDU_BRUST_8812_4 = 3, RT_AMPDU_BRUST_8812_8 = 4, RT_AMPDU_BRUST_8812_12 = 5, RT_AMPDU_BRUST_8812_15 = 6, RT_AMPDU_BRUST_8723B = 7, }RT_AMPDU_BRUST,*PRT_AMPDU_BRUST_MODE; #define CHANNEL_MAX_NUMBER 14+24+21 // 14 is the max channel number #define CHANNEL_MAX_NUMBER_2G 14 #define CHANNEL_MAX_NUMBER_5G 54 // Please refer to "phy_GetChnlGroup8812A" and "Hal_ReadTxPowerInfo8812A" #define CHANNEL_MAX_NUMBER_5G_80M 7 #define CHANNEL_GROUP_MAX 3+9 // ch1~3, ch4~9, ch10~14 total three groups #define MAX_PG_GROUP 13 // Tx Power Limit Table Size #define MAX_REGULATION_NUM 4 #define MAX_RF_PATH_NUM_IN_POWER_LIMIT_TABLE 4 #define MAX_2_4G_BANDWITH_NUM 2 #define MAX_RATE_SECTION_NUM 10 #define MAX_5G_BANDWITH_NUM 4 #define MAX_BASE_NUM_IN_PHY_REG_PG_2_4G 10 // CCK:1,OFDM:1, HT:4, VHT:4 #define MAX_BASE_NUM_IN_PHY_REG_PG_5G 9 // OFDM:1, HT:4, VHT:4 //###### duplicate code,will move to ODM ######### //#define IQK_MAC_REG_NUM 4 //#define IQK_ADDA_REG_NUM 16 //#define IQK_BB_REG_NUM 10 #define IQK_BB_REG_NUM_92C 9 #define IQK_BB_REG_NUM_92D 10 #define IQK_BB_REG_NUM_test 6 #define IQK_Matrix_Settings_NUM_92D 1+24+21 //#define HP_THERMAL_NUM 8 //###### duplicate code,will move to ODM ######### #if defined(CONFIG_RTL8192D) || defined(CONFIG_BT_COEXIST) typedef enum _MACPHY_MODE_8192D{ SINGLEMAC_SINGLEPHY, //SMSP DUALMAC_DUALPHY, //DMDP DUALMAC_SINGLEPHY, //DMSP }MACPHY_MODE_8192D,*PMACPHY_MODE_8192D; #endif #ifdef CONFIG_USB_RX_AGGREGATION typedef enum _USB_RX_AGG_MODE{ USB_RX_AGG_DISABLE, USB_RX_AGG_DMA, USB_RX_AGG_USB, USB_RX_AGG_MIX }USB_RX_AGG_MODE; //#define MAX_RX_DMA_BUFFER_SIZE 10240 // 10K for 8192C RX DMA buffer #endif #define PAGE_SIZE_128 128 #define PAGE_SIZE_256 256 #define PAGE_SIZE_512 512 struct dm_priv { u8 DM_Type; #define DYNAMIC_FUNC_BT BIT0 u8 DMFlag; u8 InitDMFlag; //u8 RSVD_1; u32 InitODMFlag; //* Upper and Lower Signal threshold for Rate Adaptive*/ int UndecoratedSmoothedPWDB; int UndecoratedSmoothedCCK; int EntryMinUndecoratedSmoothedPWDB; int EntryMaxUndecoratedSmoothedPWDB; int MinUndecoratedPWDBForDM; int LastMinUndecoratedPWDBForDM; s32 UndecoratedSmoothedBeacon; //###### duplicate code,will move to ODM ######### //for High Power u8 bDynamicTxPowerEnable; u8 LastDTPLvl; u8 DynamicTxHighPowerLvl;//Add by Jacken Tx Power Control for Near/Far Range 2008/03/06 //for tx power tracking u8 bTXPowerTracking; u8 TXPowercount; u8 bTXPowerTrackingInit; u8 TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default u8 TM_Trigger; u8 ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 u8 ThermalValue; u8 ThermalValue_LCK; u8 ThermalValue_IQK; u8 ThermalValue_DPK; u8 bRfPiEnable; //u8 RSVD_2; //for APK u32 APKoutput[2][2]; //path A/B; output1_1a/output1_2a u8 bAPKdone; u8 bAPKThermalMeterIgnore; u8 bDPdone; u8 bDPPathAOK; u8 bDPPathBOK; //u8 RSVD_3; //u8 RSVD_4; //u8 RSVD_5; //for IQK u32 ADDA_backup[IQK_ADDA_REG_NUM]; u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; u32 IQK_BB_backup_recover[9]; u32 IQK_BB_backup[IQK_BB_REG_NUM]; u8 PowerIndex_backup[6]; u8 OFDM_index[2]; u8 bCCKinCH14; u8 CCK_index; u8 bDoneTxpower; u8 CCK_index_HP; u8 OFDM_index_HP[2]; u8 ThermalValue_HP[HP_THERMAL_NUM]; u8 ThermalValue_HP_index; //u8 RSVD_6; //for TxPwrTracking2 s32 RegE94; s32 RegE9C; s32 RegEB4; s32 RegEBC; u32 TXPowerTrackingCallbackCnt; //cosa add for debug u32 prv_traffic_idx; // edca turbo #ifdef CONFIG_RTL8192D u8 ThermalValue_AVG[AVG_THERMAL_NUM]; u8 ThermalValue_AVG_index; u8 ThermalValue_RxGain; u8 ThermalValue_Crystal; u8 bReloadtxpowerindex; u32 RegD04_MP; u8 RegC04_MP; u8 Delta_IQK; u8 Delta_LCK; //u8 RSVD_7; BOOLEAN bDPKdone[2]; //u16 RSVD_8; u32 RegA24; u32 RegRF3C[2]; //pathA / pathB #endif //###### duplicate code,will move to ODM ######### // Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas u8 INIDATA_RATE[32]; _lock IQKSpinLock; }; typedef struct hal_com_data { HAL_VERSION VersionID; RT_MULTI_FUNC MultiFunc; // For multi-function consideration. RT_POLARITY_CTL PolarityCtl; // For Wifi PDn Polarity control. RT_REGULATOR_MODE RegulatorMode; // switching regulator or LDO u16 FirmwareVersion; u16 FirmwareVersionRev; u16 FirmwareSubVersion; u16 FirmwareSignature; //current WIFI_PHY values WIRELESS_MODE CurrentWirelessMode; CHANNEL_WIDTH CurrentChannelBW; BAND_TYPE CurrentBandType; //0:2.4G, 1:5G BAND_TYPE BandSet; u8 CurrentChannel; u8 CurrentCenterFrequencyIndex1; u8 nCur40MhzPrimeSC;// Control channel sub-carrier u8 nCur80MhzPrimeSC; //used for primary 40MHz of 80MHz mode u16 CustomerID; u16 BasicRateSet; u16 ForcedDataRate;// Force Data Rate. 0: Auto, 0x02: 1M ~ 0x6C: 54M. u32 ReceiveConfig; //rf_ctrl u8 rf_chip; u8 rf_type; u8 PackageType; u8 NumTotalRFPath; u8 InterfaceSel; u8 framesync; u32 framesyncC34; u8 framesyncMonitor; u8 DefaultInitialGain[4]; // // EEPROM setting. // u16 EEPROMVID; u16 EEPROMSVID; #ifdef CONFIG_USB_HCI u16 EEPROMPID; u16 EEPROMSDID; #endif #ifdef CONFIG_PCI_HCI u16 EEPROMDID; u16 EEPROMSMID; #endif u8 EEPROMCustomerID; u8 EEPROMSubCustomerID; u8 EEPROMVersion; u8 EEPROMRegulatory; u8 EEPROMThermalMeter; u8 EEPROMBluetoothCoexist; u8 EEPROMBluetoothType; u8 EEPROMBluetoothAntNum; u8 EEPROMBluetoothAntIsolation; u8 EEPROMBluetoothRadioShared; u8 bTXPowerDataReadFromEEPORM; u8 bAPKThermalMeterIgnore; u8 bDisableSWChannelPlan; // flag of disable software change channel plan BOOLEAN EepromOrEfuse; u8 EfuseUsedPercentage; u16 EfuseUsedBytes; //u8 EfuseMap[2][HWSET_MAX_SIZE_JAGUAR]; EFUSE_HAL EfuseHal; //---------------------------------------------------------------------------------// //3 [2.4G] u8 Index24G_CCK_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER]; u8 Index24G_BW40_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER]; //If only one tx, only BW20 and OFDM are used. s8 CCK_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s8 OFDM_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s8 BW20_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s8 BW40_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; //3 [5G] u8 Index5G_BW40_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER]; u8 Index5G_BW80_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER_5G_80M]; s8 OFDM_5G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s8 BW20_5G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s8 BW40_5G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s8 BW80_5G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; u8 Regulation2_4G; u8 Regulation5G; u8 TxPwrInPercentage; u8 TxPwrCalibrateRate; // // TX power by rate table at most 4RF path. // The register is // // VHT TX power by rate off setArray = // Band:-2G&5G = 0 / 1 // RF: at most 4*4 = ABCD=0/1/2/3 // CCK=0 OFDM=1/2 HT-MCS 0-15=3/4/56 VHT=7/8/9/10/11 // u8 TxPwrByRateTable; u8 TxPwrByRateBand; s8 TxPwrByRateOffset[TX_PWR_BY_RATE_NUM_BAND] [TX_PWR_BY_RATE_NUM_RF] [TX_PWR_BY_RATE_NUM_RF] [TX_PWR_BY_RATE_NUM_RATE]; //---------------------------------------------------------------------------------// //2 Power Limit Table u8 TxPwrLevelCck[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; u8 TxPwrLevelHT40_1S[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr u8 TxPwrLevelHT40_2S[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr s8 TxPwrHt20Diff[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff u8 TxPwrLegacyHtDiff[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff // Power Limit Table for 2.4G s8 TxPwrLimit_2_4G[MAX_REGULATION_NUM] [MAX_2_4G_BANDWITH_NUM] [MAX_RATE_SECTION_NUM] [CHANNEL_MAX_NUMBER_2G] [MAX_RF_PATH_NUM]; // Power Limit Table for 5G s8 TxPwrLimit_5G[MAX_REGULATION_NUM] [MAX_5G_BANDWITH_NUM] [MAX_RATE_SECTION_NUM] [CHANNEL_MAX_NUMBER_5G] [MAX_RF_PATH_NUM]; // Store the original power by rate value of the base of each rate section of rf path A & B u8 TxPwrByRateBase2_4G[TX_PWR_BY_RATE_NUM_RF] [TX_PWR_BY_RATE_NUM_RF] [MAX_BASE_NUM_IN_PHY_REG_PG_2_4G]; u8 TxPwrByRateBase5G[TX_PWR_BY_RATE_NUM_RF] [TX_PWR_BY_RATE_NUM_RF] [MAX_BASE_NUM_IN_PHY_REG_PG_5G]; // For power group u8 PwrGroupHT20[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; u8 PwrGroupHT40[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; u8 PGMaxGroup; u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff // The current Tx Power Level u8 CurrentCckTxPwrIdx; u8 CurrentOfdm24GTxPwrIdx; u8 CurrentBW2024GTxPwrIdx; u8 CurrentBW4024GTxPwrIdx; // Read/write are allow for following hardware information variables u8 pwrGroupCnt; u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16]; u32 CCKTxPowerLevelOriginalOffset; u8 CrystalCap; u32 AntennaTxPath; // Antenna path Tx u32 AntennaRxPath; // Antenna path Rx u8 PAType_2G; u8 PAType_5G; u8 LNAType_2G; u8 LNAType_5G; u8 ExternalPA_2G; u8 ExternalLNA_2G; u8 ExternalPA_5G; u8 ExternalLNA_5G; u8 TypeGLNA; u8 TypeGPA; u8 TypeALNA; u8 TypeAPA; u8 RFEType; u8 BoardType; u8 ExternalPA; u8 bIQKInitialized; BOOLEAN bLCKInProgress; BOOLEAN bSwChnl; BOOLEAN bSetChnlBW; BOOLEAN bChnlBWInitialized; BOOLEAN bNeedIQK; u8 bLedOpenDrain; // Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. u8 TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default u8 b1x1RecvCombine; // for 1T1R receive combining u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo. BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D u32 RfRegChnlVal[2]; //RDG enable BOOLEAN bRDGEnable; //for host message to fw u8 LastHMEBoxNum; u8 fw_ractrl; u8 RegTxPause; // Beacon function related global variable. u8 RegBcnCtrlVal; u8 RegFwHwTxQCtrl; u8 RegReg542; u8 RegCR_1; u8 Reg837; u16 RegRRSR; u8 CurAntenna; u8 AntDivCfg; u8 AntDetection; u8 TRxAntDivType; u8 ant_path; //for 8723B s0/s1 selection u8 u1ForcedIgiLb; // forced IGI lower bound u8 bDumpRxPkt;//for debug u8 bDumpTxPkt;//for debug u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ. // 2010/08/09 MH Add CU power down mode. BOOLEAN pwrdown; // Add for dual MAC 0--Mac0 1--Mac1 u32 interfaceIndex; u8 OutEpQueueSel; u8 OutEpNumber; // 2010/12/10 MH Add for USB aggreation mode dynamic shceme. BOOLEAN UsbRxHighSpeedMode; // 2010/11/22 MH Add for slim combo debug mode selective. // This is used for fix the drawback of CU TSMC-A/UMC-A cut. HW auto suspend ability. Close BT clock. BOOLEAN SlimComboDbg; #ifdef CONFIG_P2P u8 p2p_ps_offload; #endif //u8 AMPDUDensity; // Auto FSM to Turn On, include clock, isolation, power control for MAC only u8 bMacPwrCtrlOn; u8 bDisableTXPowerTraining; u8 RegIQKFWOffload; struct submit_ctx iqk_sctx; RT_AMPDU_BRUST AMPDUBurstMode; //92C maybe not use, but for compile successfully #if defined (CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) // // For SDIO Interface HAL related // // // SDIO ISR Related // // u32 IntrMask[1]; // u32 IntrMaskToSet[1]; // LOG_INTERRUPT InterruptLog; u32 sdio_himr; u32 sdio_hisr; // // SDIO Tx FIFO related. // // HIQ, MID, LOW, PUB free pages; padapter->xmitpriv.free_txpg u8 SdioTxFIFOFreePage[SDIO_TX_FREE_PG_QUEUE]; _lock SdioTxFIFOFreePageLock; u8 SdioTxOQTMaxFreeSpace; u8 SdioTxOQTFreeSpace; // // SDIO Rx FIFO related. // u8 SdioRxFIFOCnt; u16 SdioRxFIFOSize; u32 sdio_tx_max_len[SDIO_MAX_TX_QUEUE];// H, N, L, used for sdio tx aggregation max length per queue #endif //CONFIG_SDIO_HCI #ifdef CONFIG_USB_HCI u32 UsbBulkOutSize; BOOLEAN bSupportUSB3; // Interrupt relatd register information. u32 IntArray[3];//HISR0,HISR1,HSISR u32 IntrMask[3]; u8 C2hArray[16]; #ifdef CONFIG_USB_TX_AGGREGATION u8 UsbTxAggMode; u8 UsbTxAggDescNum; #endif // CONFIG_USB_TX_AGGREGATION #ifdef CONFIG_USB_RX_AGGREGATION u16 HwRxPageSize; // Hardware setting u32 MaxUsbRxAggBlock; USB_RX_AGG_MODE UsbRxAggMode; u8 UsbRxAggBlockCount; //FOR USB Mode, USB Block count. Block size is 512-byte in hight speed and 64-byte in full speed u8 UsbRxAggBlockTimeout; u8 UsbRxAggPageCount; //FOR DMA Mode, 8192C DMA page count u8 UsbRxAggPageTimeout; u8 RegAcUsbDmaSize; u8 RegAcUsbDmaTime; #endif//CONFIG_USB_RX_AGGREGATION #endif //CONFIG_USB_HCI #ifdef CONFIG_PCI_HCI // // EEPROM setting. // u16 EEPROMChannelPlan; u8 EEPROMTSSI[2]; u8 EEPROMBoardType; u32 TransmitConfig; u32 IntrMaskToSet[2]; u32 IntArray[2]; u32 IntrMask[2]; u32 SysIntArray[1]; u32 SysIntrMask[1]; u32 IntrMaskReg[2]; u32 IntrMaskDefault[2]; BOOLEAN bL1OffSupport; BOOLEAN bSupportBackDoor; u8 bDefaultAntenna; //u8 bIQKInitialized; u8 bInterruptMigration; u8 bDisableTxInt; u16 RxTag; #endif //CONFIG_PCI_HCI struct dm_priv dmpriv; DM_ODM_T odmpriv; #ifdef DBG_CONFIG_ERROR_DETECT struct sreset_priv srestpriv; #endif //#ifdef DBG_CONFIG_ERROR_DETECT #ifdef CONFIG_BT_COEXIST // For bluetooth co-existance BT_COEXIST bt_coexist; #ifdef CONFIG_RTL8723A u8 bAntennaDetected; #endif // CONFIG_RTL8723A #endif // CONFIG_BT_COEXIST #if defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B) #ifndef CONFIG_PCI_HCI // mutual exclusive with PCI -- so they're SDIO and GSPI // Interrupt relatd register information. u32 SysIntrStatus; u32 SysIntrMask; #endif #endif //endif CONFIG_RTL8723A #if defined(CONFIG_RTL8192C) ||defined(CONFIG_RTL8192D) u8 BluetoothCoexist; u8 EEPROMChnlAreaTxPwrCCK[2][3]; u8 EEPROMChnlAreaTxPwrHT40_1S[2][3]; u8 EEPROMChnlAreaTxPwrHT40_2SDiff[2][3]; u8 EEPROMPwrLimitHT20[3]; u8 EEPROMPwrLimitHT40[3]; #ifdef CONFIG_RTL8192D MACPHY_MODE_8192D MacPhyMode92D; BAND_TYPE CurrentBandType92D; //0:2.4G, 1:5G BAND_TYPE BandSet92D; BOOLEAN bMasterOfDMSP; BOOLEAN bSlaveOfDMSP; IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM_92D]; #ifdef CONFIG_DUALMAC_CONCURRENT BOOLEAN bInModeSwitchProcess; #endif u8 AutoLoadStatusFor8192D; u8 EEPROMC9; u8 EEPROMCC; u8 PAMode; u8 InternalPA5G[2]; //pathA / pathB BOOLEAN bPhyValueInitReady; BOOLEAN bLoadIMRandIQKSettingFor2G;// True if IMR or IQK have done for 2.4G in scan progress BOOLEAN bNOPG; BOOLEAN bIsVS; //Query RF by FW BOOLEAN bReadRFbyFW; BOOLEAN bEarlyModeEnable; BOOLEAN bSupportRemoteWakeUp; BOOLEAN bInSetPower; u8 RTSInitRate; // 2010.11.24.by tynli. #endif //CONFIG_RTL8192D #endif //defined(CONFIG_RTL8192C) ||defined(CONFIG_RTL8192D) #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE char para_file_buf[MAX_PARA_FILE_BUF_LEN]; char *mac_reg; u32 mac_reg_len; char *bb_phy_reg; u32 bb_phy_reg_len; char *bb_agc_tab; u32 bb_agc_tab_len; char *bb_phy_reg_pg; u32 bb_phy_reg_pg_len; char *bb_phy_reg_mp; u32 bb_phy_reg_mp_len; char *rf_radio_a; u32 rf_radio_a_len; char *rf_radio_b; u32 rf_radio_b_len; char *rf_tx_pwr_track; u32 rf_tx_pwr_track_len; char *rf_tx_pwr_lmt; u32 rf_tx_pwr_lmt_len; #endif #ifdef CONFIG_BACKGROUND_NOISE_MONITOR s16 noise[ODM_MAX_CHANNEL_NUM]; #endif u8 macid_num; u8 cam_entry_num; } HAL_DATA_COMMON, *PHAL_DATA_COMMON; typedef struct hal_com_data HAL_DATA_TYPE, *PHAL_DATA_TYPE; #define GET_HAL_DATA(__pAdapter) ((HAL_DATA_TYPE *)((__pAdapter)->HalData)) #define GET_HAL_RFPATH_NUM(__pAdapter) (((HAL_DATA_TYPE *)((__pAdapter)->HalData))->NumTotalRFPath ) #define RT_GetInterfaceSelection(_Adapter) (GET_HAL_DATA(_Adapter)->InterfaceSel) #define GET_RF_TYPE(__pAdapter) (GET_HAL_DATA(__pAdapter)->rf_type) #endif #endif //__HAL_DATA_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/hal_gspi.h000066400000000000000000000026571261122257400210730ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HAL_GSPI_H_ #define __HAL_GSPI_H_ #define ffaddr2deviceId(pdvobj, addr) (pdvobj->Queue2Pipe[addr]) u8 rtw_hal_gspi_max_txoqt_free_space(_adapter *padapter); u8 rtw_hal_gspi_query_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum); void rtw_hal_gspi_update_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum); void rtw_hal_set_gspi_tx_max_length(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ); u32 rtw_hal_get_gspi_tx_max_length(PADAPTER padapter, u8 queue_idx); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/hal_intf.h000066400000000000000000000552771261122257400210770ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HAL_INTF_H__ #define __HAL_INTF_H__ enum RTL871X_HCI_TYPE { RTW_PCIE = BIT0, RTW_USB = BIT1, RTW_SDIO = BIT2, RTW_GSPI = BIT3, }; enum _CHIP_TYPE { NULL_CHIP_TYPE, RTL8188C_8192C, RTL8192D, RTL8723A, RTL8188E, RTL8192E, RTL8812, RTL8821, //RTL8811 RTL8723B, MAX_CHIP_TYPE }; typedef enum _HW_VARIABLES{ HW_VAR_MEDIA_STATUS, HW_VAR_MEDIA_STATUS1, HW_VAR_SET_OPMODE, HW_VAR_MAC_ADDR, HW_VAR_BSSID, HW_VAR_INIT_RTS_RATE, HW_VAR_BASIC_RATE, HW_VAR_TXPAUSE, HW_VAR_BCN_FUNC, HW_VAR_CORRECT_TSF, HW_VAR_CHECK_BSSID, HW_VAR_MLME_DISCONNECT, HW_VAR_MLME_SITESURVEY, HW_VAR_MLME_JOIN, HW_VAR_ON_RCR_AM, HW_VAR_OFF_RCR_AM, HW_VAR_BEACON_INTERVAL, HW_VAR_SLOT_TIME, HW_VAR_RESP_SIFS, HW_VAR_ACK_PREAMBLE, HW_VAR_SEC_CFG, HW_VAR_SEC_DK_CFG, HW_VAR_BCN_VALID, HW_VAR_RF_TYPE, HW_VAR_DM_FLAG, HW_VAR_DM_FUNC_OP, HW_VAR_DM_FUNC_SET, HW_VAR_DM_FUNC_CLR, HW_VAR_CAM_EMPTY_ENTRY, HW_VAR_CAM_INVALID_ALL, HW_VAR_CAM_WRITE, HW_VAR_CAM_READ, HW_VAR_AC_PARAM_VO, HW_VAR_AC_PARAM_VI, HW_VAR_AC_PARAM_BE, HW_VAR_AC_PARAM_BK, HW_VAR_ACM_CTRL, HW_VAR_AMPDU_MIN_SPACE, HW_VAR_AMPDU_FACTOR, HW_VAR_RXDMA_AGG_PG_TH, HW_VAR_SET_RPWM, HW_VAR_CPWM, HW_VAR_H2C_FW_PWRMODE, HW_VAR_H2C_PS_TUNE_PARAM, HW_VAR_H2C_FW_JOINBSSRPT, HW_VAR_FWLPS_RF_ON, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, HW_VAR_TDLS_WRCR, HW_VAR_TDLS_INIT_CH_SEN, HW_VAR_TDLS_RS_RCR, HW_VAR_TDLS_DONE_CH_SEN, HW_VAR_INITIAL_GAIN, HW_VAR_TRIGGER_GPIO_0, HW_VAR_BT_SET_COEXIST, HW_VAR_BT_ISSUE_DELBA, HW_VAR_CURRENT_ANTENNA, HW_VAR_ANTENNA_DIVERSITY_LINK, HW_VAR_ANTENNA_DIVERSITY_SELECT, HW_VAR_SWITCH_EPHY_WoWLAN, HW_VAR_EFUSE_USAGE, HW_VAR_EFUSE_BYTES, HW_VAR_EFUSE_BT_USAGE, HW_VAR_EFUSE_BT_BYTES, HW_VAR_FIFO_CLEARN_UP, HW_VAR_CHECK_TXBUF, HW_VAR_PCIE_STOP_TX_DMA, HW_VAR_APFM_ON_MAC, //Auto FSM to Turn On, include clock, isolation, power control for MAC only // The valid upper nav range for the HW updating, if the true value is larger than the upper range, the HW won't update it. // Unit in microsecond. 0 means disable this function. #ifdef CONFIG_WOWLAN HW_VAR_WOWLAN, HW_VAR_WAKEUP_REASON, HW_VAR_RPWM_TOG, #endif #ifdef CONFIG_AP_WOWLAN HW_VAR_AP_WOWLAN, #endif HW_VAR_SYS_CLKR, HW_VAR_NAV_UPPER, HW_VAR_C2H_HANDLE, HW_VAR_RPT_TIMER_SETTING, HW_VAR_TX_RPT_MAX_MACID, HW_VAR_H2C_MEDIA_STATUS_RPT, HW_VAR_CHK_HI_QUEUE_EMPTY, HW_VAR_DL_BCN_SEL, HW_VAR_AMPDU_MAX_TIME, HW_VAR_WIRELESS_MODE, HW_VAR_USB_MODE, HW_VAR_PORT_SWITCH, HW_VAR_DO_IQK, HW_VAR_DM_IN_LPS, HW_VAR_SET_REQ_FW_PS, HW_VAR_FW_PS_STATE, HW_VAR_SOUNDING_ENTER, HW_VAR_SOUNDING_LEAVE, HW_VAR_SOUNDING_RATE, HW_VAR_SOUNDING_STATUS, HW_VAR_SOUNDING_FW_NDPA, HW_VAR_SOUNDING_CLK, HW_VAR_DL_RSVD_PAGE, HW_VAR_MACID_SLEEP, HW_VAR_MACID_WAKEUP, HW_VAR_DUMP_MAC_QUEUE_INFO, HW_VAR_ASIX_IOT, }HW_VARIABLES; typedef enum _HAL_DEF_VARIABLE{ HAL_DEF_UNDERCORATEDSMOOTHEDPWDB, HAL_DEF_IS_SUPPORT_ANT_DIV, HAL_DEF_CURRENT_ANTENNA, HAL_DEF_DRVINFO_SZ, HAL_DEF_MAX_RECVBUF_SZ, HAL_DEF_RX_PACKET_OFFSET, HAL_DEF_DBG_DUMP_RXPKT,//for dbg HAL_DEF_DBG_DM_FUNC,//for dbg HAL_DEF_RA_DECISION_RATE, HAL_DEF_RA_SGI, HAL_DEF_PT_PWR_STATUS, HAL_DEF_TX_LDPC, // LDPC support HAL_DEF_RX_LDPC, // LDPC support HAL_DEF_TX_STBC, // TX STBC support HAL_DEF_RX_STBC, // RX STBC support HAL_DEF_EXPLICIT_BEAMFORMER,// Explicit Compressed Steering Capable HAL_DEF_EXPLICIT_BEAMFORMEE,// Explicit Compressed Beamforming Feedback Capable HW_VAR_MAX_RX_AMPDU_FACTOR, HW_DEF_RA_INFO_DUMP, HAL_DEF_DBG_DUMP_TXPKT, HW_DEF_FA_CNT_DUMP, HW_DEF_ODM_DBG_FLAG, HW_DEF_ODM_DBG_LEVEL, HAL_DEF_TX_PAGE_SIZE, HAL_DEF_TX_PAGE_BOUNDARY, HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN, HAL_DEF_ANT_DETECT,//to do for 8723a HAL_DEF_PCI_SUUPORT_L1_BACKDOOR, // Determine if the L1 Backdoor setting is turned on. HAL_DEF_PCI_AMD_L1_SUPPORT, HAL_DEF_PCI_ASPM_OSC, // Support for ASPM OSC, added by Roger, 2013.03.27. HAL_DEF_MACID_SLEEP, // Support for MACID sleep HAL_DEF_DBG_RX_INFO_DUMP, HAL_DEF_DBG_DIS_PWT, //disable Tx power training or not. }HAL_DEF_VARIABLE; typedef enum _HAL_ODM_VARIABLE{ HAL_ODM_STA_INFO, HAL_ODM_P2P_STATE, HAL_ODM_WIFI_DISPLAY_STATE, HAL_ODM_NOISE_MONITOR, HAL_ODM_REGULATION, }HAL_ODM_VARIABLE; typedef enum _HAL_INTF_PS_FUNC{ HAL_USB_SELECT_SUSPEND, HAL_MAX_ID, }HAL_INTF_PS_FUNC; typedef s32 (*c2h_id_filter)(u8 *c2h_evt); struct hal_ops { u32 (*hal_power_on)(_adapter *padapter); void (*hal_power_off)(_adapter *padapter); u32 (*hal_init)(_adapter *padapter); u32 (*hal_deinit)(_adapter *padapter); void (*free_hal_data)(_adapter *padapter); u32 (*inirp_init)(_adapter *padapter); u32 (*inirp_deinit)(_adapter *padapter); void (*irp_reset)(_adapter *padapter); s32 (*init_xmit_priv)(_adapter *padapter); void (*free_xmit_priv)(_adapter *padapter); s32 (*init_recv_priv)(_adapter *padapter); void (*free_recv_priv)(_adapter *padapter); void (*InitSwLeds)(_adapter *padapter); void (*DeInitSwLeds)(_adapter *padapter); void (*dm_init)(_adapter *padapter); void (*dm_deinit)(_adapter *padapter); void (*read_chip_version)(_adapter *padapter); void (*init_default_value)(_adapter *padapter); void (*intf_chip_configure)(_adapter *padapter); void (*read_adapter_info)(_adapter *padapter); void (*enable_interrupt)(_adapter *padapter); void (*disable_interrupt)(_adapter *padapter); u8 (*check_ips_status)(_adapter *padapter); s32 (*interrupt_handler)(_adapter *padapter); void (*clear_interrupt)(_adapter *padapter); void (*set_bwmode_handler)(_adapter *padapter, CHANNEL_WIDTH Bandwidth, u8 Offset); void (*set_channel_handler)(_adapter *padapter, u8 channel); void (*set_chnl_bw_handler)(_adapter *padapter, u8 channel, CHANNEL_WIDTH Bandwidth, u8 Offset40, u8 Offset80); void (*set_tx_power_level_handler)(_adapter *padapter, u8 channel); void (*get_tx_power_level_handler)(_adapter *padapter, s32 *powerlevel); void (*hal_dm_watchdog)(_adapter *padapter); void (*hal_dm_watchdog_in_lps)(_adapter *padapter); void (*SetHwRegHandler)(_adapter *padapter, u8 variable,u8* val); void (*GetHwRegHandler)(_adapter *padapter, u8 variable,u8* val); #ifdef CONFIG_C2H_PACKET_EN void (*SetHwRegHandlerWithBuf)(_adapter *padapter, u8 variable, u8* pbuf, int len); #endif u8 (*GetHalDefVarHandler)(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); u8 (*SetHalDefVarHandler)(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); void (*GetHalODMVarHandler)(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,PVOID pValue2); void (*SetHalODMVarHandler)(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,BOOLEAN bSet); void (*UpdateRAMaskHandler)(_adapter *padapter, u32 mac_id, u8 rssi_level); void (*SetBeaconRelatedRegistersHandler)(_adapter *padapter); void (*Add_RateATid)(_adapter *padapter, u32 bitmap, u8* arg, u8 rssi_level); void (*run_thread)(_adapter *padapter); void (*cancel_thread)(_adapter *padapter); #ifdef CONFIG_ANTENNA_DIVERSITY u8 (*AntDivBeforeLinkHandler)(_adapter *padapter); void (*AntDivCompareHandler)(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); #endif u8 (*interface_ps_func)(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id, u8* val); s32 (*hal_xmit)(_adapter *padapter, struct xmit_frame *pxmitframe); /* * mgnt_xmit should be implemented to run in interrupt context */ s32 (*mgnt_xmit)(_adapter *padapter, struct xmit_frame *pmgntframe); s32 (*hal_xmitframe_enqueue)(_adapter *padapter, struct xmit_frame *pxmitframe); u32 (*read_bbreg)(_adapter *padapter, u32 RegAddr, u32 BitMask); void (*write_bbreg)(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data); u32 (*read_rfreg)(_adapter *padapter, u8 eRFPath, u32 RegAddr, u32 BitMask); void (*write_rfreg)(_adapter *padapter, u8 eRFPath, u32 RegAddr, u32 BitMask, u32 Data); #ifdef CONFIG_HOSTAPD_MLME s32 (*hostap_mgnt_xmit_entry)(_adapter *padapter, _pkt *pkt); #endif void (*EfusePowerSwitch)(_adapter *padapter, u8 bWrite, u8 PwrState); void (*BTEfusePowerSwitch)(_adapter *padapter, u8 bWrite, u8 PwrState); void (*ReadEFuse)(_adapter *padapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, BOOLEAN bPseudoTest); void (*EFUSEGetEfuseDefinition)(_adapter *padapter, u8 efuseType, u8 type, void *pOut, BOOLEAN bPseudoTest); u16 (*EfuseGetCurrentSize)(_adapter *padapter, u8 efuseType, BOOLEAN bPseudoTest); int (*Efuse_PgPacketRead)(_adapter *padapter, u8 offset, u8 *data, BOOLEAN bPseudoTest); int (*Efuse_PgPacketWrite)(_adapter *padapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest); u8 (*Efuse_WordEnableDataWrite)(_adapter *padapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest); BOOLEAN (*Efuse_PgPacketWrite_BT)(_adapter *padapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest); #ifdef DBG_CONFIG_ERROR_DETECT void (*sreset_init_value)(_adapter *padapter); void (*sreset_reset_value)(_adapter *padapter); void (*silentreset)(_adapter *padapter); void (*sreset_xmit_status_check)(_adapter *padapter); void (*sreset_linked_status_check) (_adapter *padapter); u8 (*sreset_get_wifi_status)(_adapter *padapter); bool (*sreset_inprogress)(_adapter *padapter); #endif #ifdef CONFIG_IOL int (*IOL_exec_cmds_sync)(_adapter *padapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt); #endif #ifdef CONFIG_XMIT_THREAD_MODE s32 (*xmit_thread_handler)(_adapter *padapter); #endif void (*hal_notch_filter)(_adapter * adapter, bool enable); void (*hal_reset_security_engine)(_adapter * adapter); s32 (*c2h_handler)(_adapter *padapter, u8 *c2h_evt); c2h_id_filter c2h_id_filter_ccx; s32 (*fill_h2c_cmd)(PADAPTER, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); }; typedef enum _RT_EEPROM_TYPE{ EEPROM_93C46, EEPROM_93C56, EEPROM_BOOT_EFUSE, }RT_EEPROM_TYPE,*PRT_EEPROM_TYPE; #define RF_CHANGE_BY_INIT 0 #define RF_CHANGE_BY_IPS BIT28 #define RF_CHANGE_BY_PS BIT29 #define RF_CHANGE_BY_HW BIT30 #define RF_CHANGE_BY_SW BIT31 typedef enum _HARDWARE_TYPE{ HARDWARE_TYPE_RTL8180, HARDWARE_TYPE_RTL8185, HARDWARE_TYPE_RTL8187, HARDWARE_TYPE_RTL8188, HARDWARE_TYPE_RTL8190P, HARDWARE_TYPE_RTL8192E, HARDWARE_TYPE_RTL819xU, HARDWARE_TYPE_RTL8192SE, HARDWARE_TYPE_RTL8192SU, HARDWARE_TYPE_RTL8192CE, HARDWARE_TYPE_RTL8192CU, HARDWARE_TYPE_RTL8192DE, HARDWARE_TYPE_RTL8192DU, HARDWARE_TYPE_RTL8723AE, HARDWARE_TYPE_RTL8723AU, HARDWARE_TYPE_RTL8723AS, HARDWARE_TYPE_RTL8188EE, HARDWARE_TYPE_RTL8188EU, HARDWARE_TYPE_RTL8188ES, // NEW_GENERATION_IC HARDWARE_TYPE_RTL8192EE, HARDWARE_TYPE_RTL8192EU, HARDWARE_TYPE_RTL8192ES, HARDWARE_TYPE_RTL8812E, HARDWARE_TYPE_RTL8812AU, HARDWARE_TYPE_RTL8811AU, HARDWARE_TYPE_RTL8821E, HARDWARE_TYPE_RTL8821U, HARDWARE_TYPE_RTL8821S, HARDWARE_TYPE_RTL8723BE, HARDWARE_TYPE_RTL8723BU, HARDWARE_TYPE_RTL8723BS, HARDWARE_TYPE_RTL8813AE, HARDWARE_TYPE_RTL8813AU, HARDWARE_TYPE_RTL8813AS, HARDWARE_TYPE_MAX, }HARDWARE_TYPE; #define IS_NEW_GENERATION_IC(_Adapter) (((PADAPTER)_Adapter)->HardwareType >=HARDWARE_TYPE_RTL8192EE) // // RTL8192C Series // #define IS_HARDWARE_TYPE_8192CE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192CE) #define IS_HARDWARE_TYPE_8192CU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192CU) #define IS_HARDWARE_TYPE_8192C(_Adapter) \ (IS_HARDWARE_TYPE_8192CE(_Adapter) || IS_HARDWARE_TYPE_8192CU(_Adapter)) // // RTL8192D Series // #define IS_HARDWARE_TYPE_8192DE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192DE) #define IS_HARDWARE_TYPE_8192DU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192DU) #define IS_HARDWARE_TYPE_8192D(_Adapter) \ (IS_HARDWARE_TYPE_8192DE(_Adapter) || IS_HARDWARE_TYPE_8192DU(_Adapter)) #define IS_HARDWARE_TYPE_OLDER_THAN_8723A(_Adapter) \ (IS_HARDWARE_TYPE_8192D(_Adapter) || IS_HARDWARE_TYPE_8192C(_Adapter)) // // RTL8723A Series // #define IS_HARDWARE_TYPE_8723AE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723AE) #define IS_HARDWARE_TYPE_8723AU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723AU) #define IS_HARDWARE_TYPE_8723AS(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723AS) #define IS_HARDWARE_TYPE_8723A(_Adapter) \ (IS_HARDWARE_TYPE_8723AE(_Adapter) || IS_HARDWARE_TYPE_8723AU(_Adapter) || IS_HARDWARE_TYPE_8723AS(_Adapter)) // // RTL8188E Series // #define IS_HARDWARE_TYPE_8188EE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8188EE) #define IS_HARDWARE_TYPE_8188EU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8188EU) #define IS_HARDWARE_TYPE_8188ES(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8188ES) #define IS_HARDWARE_TYPE_8188E(_Adapter) \ (IS_HARDWARE_TYPE_8188EE(_Adapter) || IS_HARDWARE_TYPE_8188EU(_Adapter) || IS_HARDWARE_TYPE_8188ES(_Adapter)) #define IS_HARDWARE_TYPE_8188E_before(_Adapter) \ (IS_HARDWARE_TYPE_8192C(_Adapter) ||IS_HARDWARE_TYPE_8192D(_Adapter) ||IS_HARDWARE_TYPE_8723A(_Adapter)) #define IS_HARDWARE_TYPE_OLDER_THAN_8812A(_Adapter) \ (IS_HARDWARE_TYPE_8192D(_Adapter) || IS_HARDWARE_TYPE_8192C(_Adapter) ||\ IS_HARDWARE_TYPE_8723AE(_Adapter) || IS_HARDWARE_TYPE_8723AU(_Adapter) || IS_HARDWARE_TYPE_8723AS(_Adapter) ||\ IS_HARDWARE_TYPE_8188EE(_Adapter) || IS_HARDWARE_TYPE_8188EU(_Adapter) || IS_HARDWARE_TYPE_8188ES(_Adapter)\ ) // RTL8812 Series #define IS_HARDWARE_TYPE_8812E(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8812E) #define IS_HARDWARE_TYPE_8812AU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8812AU) #define IS_HARDWARE_TYPE_8812(_Adapter) \ (IS_HARDWARE_TYPE_8812E(_Adapter) || IS_HARDWARE_TYPE_8812AU(_Adapter)) // RTL8821 Series #define IS_HARDWARE_TYPE_8821E(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8821E) #define IS_HARDWARE_TYPE_8811AU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8811AU) #define IS_HARDWARE_TYPE_8821U(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8821U ||\ ((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8811AU) #define IS_HARDWARE_TYPE_8821S(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8821S) #define IS_HARDWARE_TYPE_8821(_Adapter) \ (IS_HARDWARE_TYPE_8821E(_Adapter) || IS_HARDWARE_TYPE_8821U(_Adapter)|| IS_HARDWARE_TYPE_8821S(_Adapter)) #define IS_HARDWARE_TYPE_JAGUAR(_Adapter) \ (IS_HARDWARE_TYPE_8812(_Adapter) || IS_HARDWARE_TYPE_8821(_Adapter)) //RTL8192E Series #define IS_HARDWARE_TYPE_8192EE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192EE) #define IS_HARDWARE_TYPE_8192EU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192EU) #define IS_HARDWARE_TYPE_8192ES(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192ES) #define IS_HARDWARE_TYPE_8192E(_Adapter) \ (IS_HARDWARE_TYPE_8192EE(_Adapter) || IS_HARDWARE_TYPE_8192EU(_Adapter) ||IS_HARDWARE_TYPE_8192ES(_Adapter)) #define IS_HARDWARE_TYPE_8723BE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723BE) #define IS_HARDWARE_TYPE_8723BU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723BU) #define IS_HARDWARE_TYPE_8723BS(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723BS) #define IS_HARDWARE_TYPE_8723B(_Adapter) \ (IS_HARDWARE_TYPE_8723BE(_Adapter) || IS_HARDWARE_TYPE_8723BU(_Adapter) ||IS_HARDWARE_TYPE_8723BS(_Adapter)) //RTL8813A Series #define IS_HARDWARE_TYPE_8813AE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8813AE) #define IS_HARDWARE_TYPE_8813AU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8813AU) #define IS_HARDWARE_TYPE_8813AS(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8813AS) #define IS_HARDWARE_TYPE_8813A(_Adapter) \ (IS_HARDWARE_TYPE_8813AE(_Adapter) || IS_HARDWARE_TYPE_8813AU(_Adapter) ||IS_HARDWARE_TYPE_8813AS(_Adapter)) typedef struct eeprom_priv EEPROM_EFUSE_PRIV, *PEEPROM_EFUSE_PRIV; #define GET_EEPROM_EFUSE_PRIV(adapter) (&adapter->eeprompriv) #define is_boot_from_eeprom(adapter) (adapter->eeprompriv.EepromOrEfuse) typedef enum _wowlan_subcode{ WOWLAN_PATTERN_MATCH = 1, WOWLAN_MAGIC_PACKET = 2, WOWLAN_UNICAST = 3, WOWLAN_SET_PATTERN = 4, WOWLAN_DUMP_REG = 5, WOWLAN_ENABLE = 6, WOWLAN_DISABLE = 7, WOWLAN_STATUS = 8, WOWLAN_DEBUG_RELOAD_FW = 9, WOWLAN_DEBUG_1 =10, WOWLAN_DEBUG_2 =11, WOWLAN_AP_ENABLE =12, WOWLAN_AP_DISABLE =13 }wowlan_subcode; struct wowlan_ioctl_param{ unsigned int subcode; unsigned int subcode_value; unsigned int wakeup_reason; unsigned int len; unsigned char pattern[0]; }; #define Rx_Pairwisekey 0x01 #define Rx_GTK 0x02 #define Rx_DisAssoc 0x04 #define Rx_DeAuth 0x08 #define Rx_ARPReq 0x09 #define FWDecisionDisconnect 0x10 #define Rx_MagicPkt 0x21 #define Rx_UnicastPkt 0x22 #define Rx_PatternPkt 0x23 #define RX_PNOWakeUp 0x55 #define AP_WakeUp 0x66 void rtw_hal_def_value_init(_adapter *padapter); void rtw_hal_free_data(_adapter *padapter); void rtw_hal_dm_init(_adapter *padapter); void rtw_hal_dm_deinit(_adapter *padapter); void rtw_hal_sw_led_init(_adapter *padapter); void rtw_hal_sw_led_deinit(_adapter *padapter); u32 rtw_hal_power_on(_adapter *padapter); void rtw_hal_power_off(_adapter *padapter); uint rtw_hal_init(_adapter *padapter); uint rtw_hal_deinit(_adapter *padapter); void rtw_hal_stop(_adapter *padapter); void rtw_hal_set_hwreg(PADAPTER padapter, u8 variable, u8 *val); void rtw_hal_get_hwreg(PADAPTER padapter, u8 variable, u8 *val); #ifdef CONFIG_C2H_PACKET_EN void rtw_hal_set_hwreg_with_buf(_adapter *padapter, u8 variable, u8 *pbuf, int len); #endif void rtw_hal_chip_configure(_adapter *padapter); void rtw_hal_read_chip_info(_adapter *padapter); void rtw_hal_read_chip_version(_adapter *padapter); u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,BOOLEAN bSet); void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,PVOID pValue2); void rtw_hal_enable_interrupt(_adapter *padapter); void rtw_hal_disable_interrupt(_adapter *padapter); u8 rtw_hal_check_ips_status(_adapter *padapter); u32 rtw_hal_inirp_init(_adapter *padapter); u32 rtw_hal_inirp_deinit(_adapter *padapter); void rtw_hal_irp_reset(_adapter *padapter); u8 rtw_hal_intf_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id, u8* val); s32 rtw_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); s32 rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); s32 rtw_hal_init_xmit_priv(_adapter *padapter); void rtw_hal_free_xmit_priv(_adapter *padapter); s32 rtw_hal_init_recv_priv(_adapter *padapter); void rtw_hal_free_recv_priv(_adapter *padapter); void rtw_hal_update_ra_mask(struct sta_info *psta, u8 rssi_level); void rtw_hal_add_ra_tid(_adapter *padapter, u32 bitmap, u8* arg, u8 rssi_level); void rtw_hal_start_thread(_adapter *padapter); void rtw_hal_stop_thread(_adapter *padapter); void rtw_hal_bcn_related_reg_setting(_adapter *padapter); u32 rtw_hal_read_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask); void rtw_hal_write_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data); u32 rtw_hal_read_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask); void rtw_hal_write_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data); #define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtw_hal_read_bbreg((Adapter), (RegAddr), (BitMask)) #define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtw_hal_write_bbreg((Adapter), (RegAddr), (BitMask), (Data)) #define PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask) rtw_hal_read_rfreg((Adapter), (eRFPath), (RegAddr), (BitMask)) #define PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data) rtw_hal_write_rfreg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data)) #define PHY_SetMacReg PHY_SetBBReg #define PHY_QueryMacReg PHY_QueryBBReg s32 rtw_hal_interrupt_handler(_adapter *padapter); void rtw_hal_set_bwmode(_adapter *padapter, CHANNEL_WIDTH Bandwidth, u8 Offset); void rtw_hal_set_chan(_adapter *padapter, u8 channel); void rtw_hal_set_chnl_bw(_adapter *padapter, u8 channel, CHANNEL_WIDTH Bandwidth, u8 Offset40, u8 Offset80); void rtw_hal_dm_watchdog(_adapter *padapter); void rtw_hal_dm_watchdog_in_lps(_adapter *padapter); void rtw_hal_set_tx_power_level(_adapter *padapter, u8 channel); void rtw_hal_get_tx_power_level(_adapter *padapter, s32 *powerlevel); #ifdef CONFIG_ANTENNA_DIVERSITY u8 rtw_hal_antdiv_before_linked(_adapter *padapter); void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); #endif #ifdef CONFIG_HOSTAPD_MLME s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); #endif #ifdef DBG_CONFIG_ERROR_DETECT void rtw_hal_sreset_init(_adapter *padapter); void rtw_hal_sreset_reset(_adapter *padapter); void rtw_hal_sreset_reset_value(_adapter *padapter); void rtw_hal_sreset_xmit_status_check(_adapter *padapter); void rtw_hal_sreset_linked_status_check (_adapter *padapter); u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter); bool rtw_hal_sreset_inprogress(_adapter *padapter); #endif #ifdef CONFIG_IOL int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt); #endif #ifdef CONFIG_XMIT_THREAD_MODE s32 rtw_hal_xmit_thread_handler(_adapter *padapter); #endif void rtw_hal_notch_filter(_adapter * adapter, bool enable); void rtw_hal_reset_security_engine(_adapter * adapter); bool rtw_hal_c2h_valid(_adapter *adapter, u8 *buf); s32 rtw_hal_c2h_evt_read(_adapter *adapter, u8 *buf); s32 rtw_hal_c2h_handler(_adapter *adapter, u8 *c2h_evt); c2h_id_filter rtw_hal_c2h_id_filter_ccx(_adapter *adapter); s32 rtw_hal_is_disable_sw_channel_plan(PADAPTER padapter); s32 rtw_hal_macid_sleep(PADAPTER padapter, u8 macid); s32 rtw_hal_macid_wakeup(PADAPTER padapter, u8 macid); s32 rtw_hal_fill_h2c_cmd(PADAPTER, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); #endif //__HAL_INTF_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/hal_pg.h000066400000000000000000000533741261122257400205410ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HAL_PG_H__ #define __HAL_PG_H__ //==================================================== // EEPROM/Efuse PG Offset for 8192 CE/CU //==================================================== #define EEPROM_VID_92C 0x0A #define EEPROM_PID_92C 0x0C #define EEPROM_DID_92C 0x0C #define EEPROM_SVID_92C 0x0E #define EEPROM_SMID_92C 0x10 #define EEPROM_MAC_ADDR_92C 0x16 #define EEPROM_MAC_ADDR 0x16 #define EEPROM_TV_OPTION 0x50 #define EEPROM_SUBCUSTOMER_ID_92C 0x59 #define EEPROM_CCK_TX_PWR_INX 0x5A #define EEPROM_HT40_1S_TX_PWR_INX 0x60 #define EEPROM_HT40_2S_TX_PWR_INX_DIFF 0x66 #define EEPROM_HT20_TX_PWR_INX_DIFF 0x69 #define EEPROM_OFDM_TX_PWR_INX_DIFF 0x6C #define EEPROM_HT40_MAX_PWR_OFFSET 0x6F #define EEPROM_HT20_MAX_PWR_OFFSET 0x72 #define EEPROM_CHANNEL_PLAN_92C 0x75 #define EEPROM_TSSI_A 0x76 #define EEPROM_TSSI_B 0x77 #define EEPROM_THERMAL_METER_92C 0x78 #define EEPROM_RF_OPT1_92C 0x79 #define EEPROM_RF_OPT2_92C 0x7A #define EEPROM_RF_OPT3_92C 0x7B #define EEPROM_RF_OPT4_92C 0x7C #define EEPROM_VERSION_92C 0x7E #define EEPROM_CUSTOMER_ID_92C 0x7F #define EEPROM_NORMAL_CHANNEL_PLAN 0x75 #define EEPROM_NORMAL_BoardType_92C EEPROM_RF_OPT1_92C #define BOARD_TYPE_NORMAL_MASK 0xE0 #define BOARD_TYPE_TEST_MASK 0xF #define EEPROM_TYPE_ID 0x7E // PCIe related #define EEPROM_PCIE_DEV_CAP_01 0xE0 // Express device capability in PCIe configuration space, i.e., map to offset 0x74 #define EEPROM_PCIE_DEV_CAP_02 0xE1 // Express device capability in PCIe configuration space, i.e., map to offset 0x75 // EEPROM address for Test chip #define EEPROM_TEST_USB_OPT 0x0E #define EEPROM_EASY_REPLACEMENT 0x50//BIT0 1 for build-in module, 0 for external dongle //==================================================== // EEPROM/Efuse PG Offset for 8723AE/8723AU/8723AS //==================================================== #define EEPROM_CCK_TX_PWR_INX_8723A 0x10 #define EEPROM_HT40_1S_TX_PWR_INX_8723A 0x16 #define EEPROM_HT20_TX_PWR_INX_DIFF_8723A 0x1C #define EEPROM_OFDM_TX_PWR_INX_DIFF_8723A 0x1F #define EEPROM_HT40_MAX_PWR_OFFSET_8723A 0x22 #define EEPROM_HT20_MAX_PWR_OFFSET_8723A 0x25 #define EEPROM_ChannelPlan_8723A 0x28 #define EEPROM_TSSI_A_8723A 0x29 #define EEPROM_THERMAL_METER_8723A 0x2A #define RF_OPTION1_8723A 0x2B #define RF_OPTION2_8723A 0x2C #define RF_OPTION3_8723A 0x2D #define RF_OPTION4_8723A 0x2E #define EEPROM_VERSION_8723A 0x30 #define EEPROM_CustomID_8723A 0x31 #define EEPROM_SubCustomID_8723A 0x32 #define EEPROM_XTAL_K_8723A 0x33 #define EEPROM_Chipset_8723A 0x34 // RTL8723AE #define EEPROM_VID_8723AE 0x49 #define EEPROM_DID_8723AE 0x4B #define EEPROM_SVID_8723AE 0x4D #define EEPROM_SMID_8723AE 0x4F #define EEPROM_MAC_ADDR_8723AE 0x67 //RTL8723AU #define EEPROM_MAC_ADDR_8723AU 0xC6 #define EEPROM_VID_8723AU 0xB7 #define EEPROM_PID_8723AU 0xB9 // RTL8723AS #define EEPROM_MAC_ADDR_8723AS 0xAA //==================================================== // EEPROM/Efuse PG Offset for 8192 DE/DU //==================================================== // pcie #define RTL8190_EEPROM_ID 0x8129 // 0-1 #define EEPROM_HPON 0x02 // LDO settings.2-5 #define EEPROM_CLK 0x06 // Clock settings.6-7 #define EEPROM_MAC_FUNCTION 0x08 // SE Test mode.8 #define EEPROM_MAC_ADDR_MAC0_92DE 0x55 #define EEPROM_MAC_ADDR_MAC1_92DE 0x5B //usb #define EEPROM_ENDPOINT_SETTING 0x10 #define EEPROM_CHIRP_K 0x12 // Changed #define EEPROM_USB_PHY 0x13 // Changed #define EEPROM_STRING 0x1F #define EEPROM_SUBCUSTOMER_ID_92D 0x59 #define EEPROM_MAC_ADDR_MAC0_92DU 0x19 #define EEPROM_MAC_ADDR_MAC1_92DU 0x5B //---------------------------------------------------------------- // 2.4G band Tx power index setting #define EEPROM_CCK_TX_PWR_INX_2G_92D 0x61 #define EEPROM_HT40_1S_TX_PWR_INX_2G_92D 0x67 #define EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G_92D 0x6D #define EEPROM_HT20_TX_PWR_INX_DIFF_2G_92D 0x70 #define EEPROM_OFDM_TX_PWR_INX_DIFF_2G_92D 0x73 #define EEPROM_HT40_MAX_PWR_OFFSET_2G_92D 0x76 #define EEPROM_HT20_MAX_PWR_OFFSET_2G_92D 0x79 //5GL channel 32-64 #define EEPROM_HT40_1S_TX_PWR_INX_5GL_92D 0x7C #define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GL_92D 0x82 #define EEPROM_HT20_TX_PWR_INX_DIFF_5GL_92D 0x85 #define EEPROM_OFDM_TX_PWR_INX_DIFF_5GL_92D 0x88 #define EEPROM_HT40_MAX_PWR_OFFSET_5GL_92D 0x8B #define EEPROM_HT20_MAX_PWR_OFFSET_5GL_92D 0x8E //5GM channel 100-140 #define EEPROM_HT40_1S_TX_PWR_INX_5GM_92D 0x91 #define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GM_92D 0x97 #define EEPROM_HT20_TX_PWR_INX_DIFF_5GM_92D 0x9A #define EEPROM_OFDM_TX_PWR_INX_DIFF_5GM_92D 0x9D #define EEPROM_HT40_MAX_PWR_OFFSET_5GM_92D 0xA0 #define EEPROM_HT20_MAX_PWR_OFFSET_5GM_92D 0xA3 //5GH channel 149-165 #define EEPROM_HT40_1S_TX_PWR_INX_5GH_92D 0xA6 #define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GH_92D 0xAC #define EEPROM_HT20_TX_PWR_INX_DIFF_5GH_92D 0xAF #define EEPROM_OFDM_TX_PWR_INX_DIFF_5GH_92D 0xB2 #define EEPROM_HT40_MAX_PWR_OFFSET_5GH_92D 0xB5 #define EEPROM_HT20_MAX_PWR_OFFSET_5GH_92D 0xB8 #define EEPROM_CHANNEL_PLAN_92D 0xBB // Map of supported channels. #define EEPROM_TEST_CHANNEL_PLAN_92D 0xBB #define EEPROM_THERMAL_METER_92D 0xC3 //[4:0] #define EEPROM_IQK_DELTA_92D 0xBC #define EEPROM_LCK_DELTA_92D 0xBC #define EEPROM_XTAL_K_92D 0xBD //[7:5] #define EEPROM_TSSI_A_5G_92D 0xBE #define EEPROM_TSSI_B_5G_92D 0xBF #define EEPROM_TSSI_AB_5G_92D 0xC0 #define EEPROM_RF_OPT1_92D 0xC4 #define EEPROM_RF_OPT2_92D 0xC5 #define EEPROM_RF_OPT3_92D 0xC6 #define EEPROM_RF_OPT4_92D 0xC7 #define EEPROM_RF_OPT5_92D 0xC8 #define EEPROM_RF_OPT6_92D 0xC9 #define EEPROM_RF_OPT7_92D 0xCC #define EEPROM_NORMAL_BoardType_92D EEPROM_RF_OPT1_92D //[7:5] #define EEPROM_WIDIPAIRING_ADDR 0xF0 #define EEPROM_WIDIPAIRING_KEY 0xF6 #define EEPROM_DEF_PART_NO 0x3FD //Byte #define EEPROME_CHIP_VERSION_L 0x3FF #define EEPROME_CHIP_VERSION_H 0x3FE //---------------------------------------------------------------- #define EEPROM_VID_92DE 0x28 #define EEPROM_PID_92DE 0x2A #define EEPROM_SVID_92DE 0x2C #define EEPROM_SMID_92DE 0x2E #define EEPROM_PATHDIV_92D 0xC4 #define EEPROM_BOARD_OPTIONS_92D 0xC4 #define EEPROM_5G_LNA_GAIN_92D 0xC6 #define EEPROM_FEATURE_OPTIONS_92D 0xC7 #define EEPROM_BT_SETTING_92D 0xC8 #define EEPROM_VERSION_92D 0xCA #define EEPROM_CUSTOMER_ID_92D 0xCB #define EEPROM_VID_92DU 0xC #define EEPROM_PID_92DU 0xE //==================================================== // EEPROM/Efuse PG Offset for 88EE/88EU/88ES //==================================================== #define EEPROM_TX_PWR_INX_88E 0x10 #define EEPROM_ChannelPlan_88E 0xB8 #define EEPROM_XTAL_88E 0xB9 #define EEPROM_THERMAL_METER_88E 0xBA #define EEPROM_IQK_LCK_88E 0xBB #define EEPROM_RF_BOARD_OPTION_88E 0xC1 #define EEPROM_RF_FEATURE_OPTION_88E 0xC2 #define EEPROM_RF_BT_SETTING_88E 0xC3 #define EEPROM_VERSION_88E 0xC4 #define EEPROM_CustomID_88E 0xC5 #define EEPROM_RF_ANTENNA_OPT_88E 0xC9 // RTL88EE #define EEPROM_MAC_ADDR_88EE 0xD0 #define EEPROM_VID_88EE 0xD6 #define EEPROM_DID_88EE 0xD8 #define EEPROM_SVID_88EE 0xDA #define EEPROM_SMID_88EE 0xDC //RTL88EU #define EEPROM_MAC_ADDR_88EU 0xD7 #define EEPROM_VID_88EU 0xD0 #define EEPROM_PID_88EU 0xD2 #define EEPROM_USB_OPTIONAL_FUNCTION0 0xD4 //8192EU, 8812AU is the same #define EEPROM_USB_OPTIONAL_FUNCTION0_8811AU 0x104 // RTL88ES #define EEPROM_MAC_ADDR_88ES 0x11A //==================================================== // EEPROM/Efuse PG Offset for 8192EE/8192EU/8192ES //==================================================== // 0x10 ~ 0x63 = TX power area. #define EEPROM_TX_PWR_INX_8192E 0x10 #define EEPROM_ChannelPlan_8192E 0xB8 #define EEPROM_XTAL_8192E 0xB9 #define EEPROM_THERMAL_METER_8192E 0xBA #define EEPROM_IQK_LCK_8192E 0xBB #define EEPROM_2G_5G_PA_TYPE_8192E 0xBC #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8192E 0xBD #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8192E 0xBF #define EEPROM_RF_BOARD_OPTION_8192E 0xC1 #define EEPROM_RF_FEATURE_OPTION_8192E 0xC2 #define EEPROM_RF_BT_SETTING_8192E 0xC3 #define EEPROM_VERSION_8192E 0xC4 #define EEPROM_CustomID_8192E 0xC5 #define EEPROM_TX_BBSWING_2G_8192E 0xC6 #define EEPROM_TX_BBSWING_5G_8192E 0xC7 #define EEPROM_TX_PWR_CALIBRATE_RATE_8192E 0xC8 #define EEPROM_RF_ANTENNA_OPT_8192E 0xC9 // RTL8192EE #define EEPROM_MAC_ADDR_8192EE 0xD0 #define EEPROM_VID_8192EE 0xD6 #define EEPROM_DID_8192EE 0xD8 #define EEPROM_SVID_8192EE 0xDA #define EEPROM_SMID_8192EE 0xDC //RTL8192EU #define EEPROM_MAC_ADDR_8192EU 0xD7 #define EEPROM_VID_8192EU 0xD0 #define EEPROM_PID_8192EU 0xD2 #define EEPROM_PA_TYPE_8192EU 0xBC #define EEPROM_LNA_TYPE_2G_8192EU 0xBD #define EEPROM_LNA_TYPE_5G_8192EU 0xBF // RTL8192ES #define EEPROM_MAC_ADDR_8192ES 0x11B //==================================================== // EEPROM/Efuse PG Offset for 8812AE/8812AU/8812AS //==================================================== // 0x10 ~ 0x63 = TX power area. #define EEPROM_USB_MODE_8812 0x08 #define EEPROM_TX_PWR_INX_8812 0x10 #define EEPROM_ChannelPlan_8812 0xB8 #define EEPROM_XTAL_8812 0xB9 #define EEPROM_THERMAL_METER_8812 0xBA #define EEPROM_IQK_LCK_8812 0xBB #define EEPROM_2G_5G_PA_TYPE_8812 0xBC #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8812 0xBD #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8812 0xBF #define EEPROM_RF_BOARD_OPTION_8812 0xC1 #define EEPROM_RF_FEATURE_OPTION_8812 0xC2 #define EEPROM_RF_BT_SETTING_8812 0xC3 #define EEPROM_VERSION_8812 0xC4 #define EEPROM_CustomID_8812 0xC5 #define EEPROM_TX_BBSWING_2G_8812 0xC6 #define EEPROM_TX_BBSWING_5G_8812 0xC7 #define EEPROM_TX_PWR_CALIBRATE_RATE_8812 0xC8 #define EEPROM_RF_ANTENNA_OPT_8812 0xC9 #define EEPROM_RFE_OPTION_8812 0xCA // RTL8812AE #define EEPROM_MAC_ADDR_8812AE 0xD0 #define EEPROM_VID_8812AE 0xD6 #define EEPROM_DID_8812AE 0xD8 #define EEPROM_SVID_8812AE 0xDA #define EEPROM_SMID_8812AE 0xDC //RTL8812AU #define EEPROM_MAC_ADDR_8812AU 0xD7 #define EEPROM_VID_8812AU 0xD0 #define EEPROM_PID_8812AU 0xD2 #define EEPROM_PA_TYPE_8812AU 0xBC #define EEPROM_LNA_TYPE_2G_8812AU 0xBD #define EEPROM_LNA_TYPE_5G_8812AU 0xBF //==================================================== // EEPROM/Efuse PG Offset for 8821AE/8821AU/8821AS //==================================================== #define EEPROM_TX_PWR_INX_8821 0x10 #define EEPROM_ChannelPlan_8821 0xB8 #define EEPROM_XTAL_8821 0xB9 #define EEPROM_THERMAL_METER_8821 0xBA #define EEPROM_IQK_LCK_8821 0xBB #define EEPROM_RF_BOARD_OPTION_8821 0xC1 #define EEPROM_RF_FEATURE_OPTION_8821 0xC2 #define EEPROM_RF_BT_SETTING_8821 0xC3 #define EEPROM_VERSION_8821 0xC4 #define EEPROM_CustomID_8821 0xC5 #define EEPROM_RF_ANTENNA_OPT_8821 0xC9 // RTL8821AE #define EEPROM_MAC_ADDR_8821AE 0xD0 #define EEPROM_VID_8821AE 0xD6 #define EEPROM_DID_8821AE 0xD8 #define EEPROM_SVID_8821AE 0xDA #define EEPROM_SMID_8821AE 0xDC //RTL8821AU #define EEPROM_PA_TYPE_8821AU 0xBC #define EEPROM_LNA_TYPE_8821AU 0xBF // RTL8821AS #define EEPROM_MAC_ADDR_8821AS 0x11A //RTL8821AU #define EEPROM_MAC_ADDR_8821AU 0x107 #define EEPROM_VID_8821AU 0x100 #define EEPROM_PID_8821AU 0x102 //==================================================== // EEPROM/Efuse PG Offset for 8192 SE/SU //==================================================== #define EEPROM_VID_92SE 0x0A #define EEPROM_DID_92SE 0x0C #define EEPROM_SVID_92SE 0x0E #define EEPROM_SMID_92SE 0x10 #define EEPROM_MAC_ADDR_92S 0x12 #define EEPROM_TSSI_A_92SE 0x74 #define EEPROM_TSSI_B_92SE 0x75 #define EEPROM_Version_92SE 0x7C #define EEPROM_VID_92SU 0x08 #define EEPROM_PID_92SU 0x0A #define EEPROM_Version_92SU 0x50 #define EEPROM_TSSI_A_92SU 0x6b #define EEPROM_TSSI_B_92SU 0x6c //==================================================== // EEPROM/Efuse PG Offset for 8723BE/8723BU/8723BS //==================================================== // 0x10 ~ 0x63 = TX power area. #define EEPROM_TX_PWR_INX_8723B 0x10 #define EEPROM_ChannelPlan_8723B 0xB8 #define EEPROM_XTAL_8723B 0xB9 #define EEPROM_THERMAL_METER_8723B 0xBA #define EEPROM_IQK_LCK_8723B 0xBB #define EEPROM_2G_5G_PA_TYPE_8723B 0xBC #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8723B 0xBD #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8723B 0xBF #define EEPROM_RF_BOARD_OPTION_8723B 0xC1 #define EEPROM_FEATURE_OPTION_8723B 0xC2 #define EEPROM_RF_BT_SETTING_8723B 0xC3 #define EEPROM_VERSION_8723B 0xC4 #define EEPROM_CustomID_8723B 0xC5 #define EEPROM_TX_BBSWING_2G_8723B 0xC6 #define EEPROM_TX_PWR_CALIBRATE_RATE_8723B 0xC8 #define EEPROM_RF_ANTENNA_OPT_8723B 0xC9 #define EEPROM_RFE_OPTION_8723B 0xCA // RTL8723BE #define EEPROM_MAC_ADDR_8723BE 0xD0 #define EEPROM_VID_8723BE 0xD6 #define EEPROM_DID_8723BE 0xD8 #define EEPROM_SVID_8723BE 0xDA #define EEPROM_SMID_8723BE 0xDC //RTL8723BU #define EEPROM_MAC_ADDR_8723BU 0x107 #define EEPROM_VID_8723BU 0x100 #define EEPROM_PID_8723BU 0x102 #define EEPROM_PA_TYPE_8723BU 0xBC #define EEPROM_LNA_TYPE_2G_8723BU 0xBD //RTL8723BS #define EEPROM_MAC_ADDR_8723BS 0x11A #define EEPROM_Voltage_ADDR_8723B 0x8 //==================================================== // EEPROM/Efuse Value Type //==================================================== #define EETYPE_TX_PWR 0x0 //==================================================== // EEPROM/Efuse Default Value //==================================================== #define EEPROM_CID_DEFAULT 0x0 #define EEPROM_CID_DEFAULT_EXT 0xFF // Reserved for Realtek #define EEPROM_CID_TOSHIBA 0x4 #define EEPROM_CID_CCX 0x10 #define EEPROM_CID_QMI 0x0D #define EEPROM_CID_WHQL 0xFE #define EEPROM_CHANNEL_PLAN_FCC 0x0 #define EEPROM_CHANNEL_PLAN_IC 0x1 #define EEPROM_CHANNEL_PLAN_ETSI 0x2 #define EEPROM_CHANNEL_PLAN_SPAIN 0x3 #define EEPROM_CHANNEL_PLAN_FRANCE 0x4 #define EEPROM_CHANNEL_PLAN_MKK 0x5 #define EEPROM_CHANNEL_PLAN_MKK1 0x6 #define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 #define EEPROM_CHANNEL_PLAN_TELEC 0x8 #define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 #define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA #define EEPROM_CHANNEL_PLAN_NCC_TAIWAN 0xB #define EEPROM_CHANNEL_PLAN_CHIAN 0XC #define EEPROM_CHANNEL_PLAN_SINGAPORE_INDIA_MEXICO 0XD #define EEPROM_CHANNEL_PLAN_KOREA 0xE #define EEPROM_CHANNEL_PLAN_TURKEY 0xF #define EEPROM_CHANNEL_PLAN_JAPAN 0x10 #define EEPROM_CHANNEL_PLAN_FCC_NO_DFS 0x11 #define EEPROM_CHANNEL_PLAN_JAPAN_NO_DFS 0x12 #define EEPROM_CHANNEL_PLAN_WORLD_WIDE_5G 0x13 #define EEPROM_CHANNEL_PLAN_TAIWAN_NO_DFS 0x14 #define EEPROM_USB_OPTIONAL1 0xE #define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 #define RTL_EEPROM_ID 0x8129 #define EEPROM_Default_TSSI 0x0 #define EEPROM_Default_BoardType 0x02 #define EEPROM_Default_ThermalMeter 0x12 #define EEPROM_Default_ThermalMeter_92SU 0x7 #define EEPROM_Default_ThermalMeter_88E 0x18 #define EEPROM_Default_ThermalMeter_8812 0x18 #define EEPROM_Default_ThermalMeter_8192E 0x1A #define EEPROM_Default_ThermalMeter_8723B 0x18 #define EEPROM_Default_CrystalCap 0x0 #define EEPROM_Default_CrystalCap_8723A 0x20 #define EEPROM_Default_CrystalCap_88E 0x20 #define EEPROM_Default_CrystalCap_8812 0x20 #define EEPROM_Default_CrystalCap_8192E 0x20 #define EEPROM_Default_CrystalCap_8723B 0x20 #define EEPROM_Default_CrystalFreq 0x0 #define EEPROM_Default_TxPowerLevel_92C 0x22 #define EEPROM_Default_TxPowerLevel_2G 0x2C #define EEPROM_Default_TxPowerLevel_5G 0x22 #define EEPROM_Default_TxPowerLevel 0x22 #define EEPROM_Default_HT40_2SDiff 0x0 #define EEPROM_Default_HT20_Diff 2 #define EEPROM_Default_LegacyHTTxPowerDiff 0x3 #define EEPROM_Default_LegacyHTTxPowerDiff_92C 0x3 #define EEPROM_Default_LegacyHTTxPowerDiff_92D 0x4 #define EEPROM_Default_HT40_PwrMaxOffset 0 #define EEPROM_Default_HT20_PwrMaxOffset 0 #define EEPROM_Default_PID 0x1234 #define EEPROM_Default_VID 0x5678 #define EEPROM_Default_CustomerID 0xAB #define EEPROM_Default_CustomerID_8188E 0x00 #define EEPROM_Default_SubCustomerID 0xCD #define EEPROM_Default_Version 0 #define EEPROM_Default_externalPA_C9 0x00 #define EEPROM_Default_externalPA_CC 0xFF #define EEPROM_Default_internalPA_SP3T_C9 0xAA #define EEPROM_Default_internalPA_SP3T_CC 0xAF #define EEPROM_Default_internalPA_SPDT_C9 0xAA #ifdef CONFIG_PCI_HCI #define EEPROM_Default_internalPA_SPDT_CC 0xA0 #else #define EEPROM_Default_internalPA_SPDT_CC 0xFA #endif #define EEPROM_Default_PAType 0 #define EEPROM_Default_LNAType 0 //New EFUSE deafult value #define EEPROM_DEFAULT_24G_INDEX 0x2D #define EEPROM_DEFAULT_24G_HT20_DIFF 0X02 #define EEPROM_DEFAULT_24G_OFDM_DIFF 0X04 #define EEPROM_DEFAULT_5G_INDEX 0X2A #define EEPROM_DEFAULT_5G_HT20_DIFF 0X00 #define EEPROM_DEFAULT_5G_OFDM_DIFF 0X04 #define EEPROM_DEFAULT_DIFF 0XFE #define EEPROM_DEFAULT_CHANNEL_PLAN 0x7F #define EEPROM_DEFAULT_BOARD_OPTION 0x00 #define EEPROM_DEFAULT_RFE_OPTION 0x04 #define EEPROM_DEFAULT_FEATURE_OPTION 0x00 #define EEPROM_DEFAULT_BT_OPTION 0x10 #define EEPROM_DEFAULT_TX_CALIBRATE_RATE 0x00 // // For VHT series TX power by rate table. // VHT TX power by rate off setArray = // Band:-2G&5G = 0 / 1 // RF: at most 4*4 = ABCD=0/1/2/3 // CCK=0 OFDM=1/2 HT-MCS 0-15=3/4/56 VHT=7/8/9/10/11 // #define TX_PWR_BY_RATE_NUM_BAND 2 #define TX_PWR_BY_RATE_NUM_RF 4 #define TX_PWR_BY_RATE_NUM_RATE 84 #define TXPWR_LMT_MAX_RF 4 //---------------------------------------------------------------------------- // EEPROM/EFUSE data structure definition. //---------------------------------------------------------------------------- #define MAX_RF_PATH_NUM 2 #define MAX_CHNL_GROUP 3+9 typedef struct _TxPowerInfo{ u8 CCKIndex[MAX_RF_PATH_NUM][MAX_CHNL_GROUP]; u8 HT40_1SIndex[MAX_RF_PATH_NUM][MAX_CHNL_GROUP]; u8 HT40_2SIndexDiff[MAX_RF_PATH_NUM][MAX_CHNL_GROUP]; s8 HT20IndexDiff[MAX_RF_PATH_NUM][MAX_CHNL_GROUP]; u8 OFDMIndexDiff[MAX_RF_PATH_NUM][MAX_CHNL_GROUP]; u8 HT40MaxOffset[MAX_RF_PATH_NUM][MAX_CHNL_GROUP]; u8 HT20MaxOffset[MAX_RF_PATH_NUM][MAX_CHNL_GROUP]; u8 TSSI_A[3]; u8 TSSI_B[3]; u8 TSSI_A_5G[3]; //5GL/5GM/5GH u8 TSSI_B_5G[3]; }TxPowerInfo, *PTxPowerInfo; //For 88E new structure /* 2.4G: { {1,2}, {3,4,5}, {6,7,8}, {9,10,11}, {12,13}, {14} } 5G: { {36,38,40}, {44,46,48}, {52,54,56}, {60,62,64}, {100,102,104}, {108,110,112}, {116,118,120}, {124,126,128}, {132,134,136}, {140,142,144}, {149,151,153}, {157,159,161}, {173,175,177}, } */ #define MAX_RF_PATH 4 #define RF_PATH_MAX MAX_RF_PATH #define MAX_CHNL_GROUP_24G 6 #define MAX_CHNL_GROUP_5G 14 //It must always set to 4, otherwise read efuse table secquence will be wrong. #define MAX_TX_COUNT 4 typedef struct _TxPowerInfo24G{ u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; //If only one tx, only BW20 and OFDM are used. s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; }TxPowerInfo24G, *PTxPowerInfo24G; typedef struct _TxPowerInfo5G{ u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_5G]; //If only one tx, only BW20, OFDM, BW80 and BW160 are used. s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s8 BW80_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s8 BW160_Diff[MAX_RF_PATH][MAX_TX_COUNT]; }TxPowerInfo5G, *PTxPowerInfo5G; typedef enum _BT_Ant_NUM{ Ant_x2 = 0, Ant_x1 = 1 } BT_Ant_NUM, *PBT_Ant_NUM; typedef enum _BT_CoType{ BT_2WIRE = 0, BT_ISSC_3WIRE = 1, BT_ACCEL = 2, BT_CSR_BC4 = 3, BT_CSR_BC8 = 4, BT_RTL8756 = 5, BT_RTL8723A = 6, BT_RTL8821 = 7, BT_RTL8723B = 8, BT_RTL8192E = 9, BT_RTL8813A = 10, BT_RTL8812A = 11 } BT_CoType, *PBT_CoType; typedef enum _BT_RadioShared{ BT_Radio_Shared = 0, BT_Radio_Individual = 1, } BT_RadioShared, *PBT_RadioShared; #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/hal_phy.h000066400000000000000000000135731261122257400207300ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HAL_PHY_H__ #define __HAL_PHY_H__ #if DISABLE_BB_RF #define HAL_FW_ENABLE 0 #define HAL_MAC_ENABLE 0 #define HAL_BB_ENABLE 0 #define HAL_RF_ENABLE 0 #else // FPGA_PHY and ASIC #define HAL_FW_ENABLE 1 #define HAL_MAC_ENABLE 1 #define HAL_BB_ENABLE 1 #define HAL_RF_ENABLE 1 #endif #define RF6052_MAX_TX_PWR 0x3F #define RF6052_MAX_REG_88E 0xFF #define RF6052_MAX_REG_92C 0x7F #define RF6052_MAX_REG \ (RF6052_MAX_REG_88E > RF6052_MAX_REG_92C) ? RF6052_MAX_REG_88E: RF6052_MAX_REG_92C #define GET_RF6052_REAL_MAX_REG(_Adapter) \ IS_HARDWARE_TYPE_8188E(_Adapter) ? RF6052_MAX_REG_88E : RF6052_MAX_REG_92C #define RF6052_MAX_PATH 2 // // Antenna detection method, i.e., using single tone detection or RSSI reported from each antenna detected. // Added by Roger, 2013.05.22. // #define ANT_DETECT_BY_SINGLE_TONE BIT0 #define ANT_DETECT_BY_RSSI BIT1 #define IS_ANT_DETECT_SUPPORT_SINGLE_TONE(__Adapter) ((GET_HAL_DATA(__Adapter)->AntDetection) & ANT_DETECT_BY_SINGLE_TONE) #define IS_ANT_DETECT_SUPPORT_RSSI(__Adapter) ((GET_HAL_DATA(__Adapter)->AntDetection) & ANT_DETECT_BY_RSSI) /*--------------------------Define Parameters-------------------------------*/ typedef enum _BAND_TYPE{ BAND_ON_2_4G = 0, BAND_ON_5G, BAND_ON_BOTH, BANDMAX }BAND_TYPE,*PBAND_TYPE; typedef enum _RF_TYPE{ RF_TYPE_MIN = 0, // 0 RF_8225=1, // 1 11b/g RF for verification only RF_8256=2, // 2 11b/g/n RF_8258=3, // 3 11a/b/g/n RF RF_6052=4, // 4 11b/g/n RF RF_PSEUDO_11N=5, // 5, It is a temporality RF. RF_TYPE_MAX }RF_TYPE_E,*PRF_TYPE_E; typedef enum _RF_PATH{ RF_PATH_A = 0, RF_PATH_B, RF_PATH_C, RF_PATH_D }RF_PATH, *PRF_PATH; #define TX_1S 0 #define TX_2S 1 #define TX_3S 2 #define TX_4S 3 #define RF_PATH_MAX_92C_88E 2 #define RF_PATH_MAX_90_8812 4 //Max RF number 90 support typedef enum _ANTENNA_PATH{ ANTENNA_NONE = 0, ANTENNA_D = 1, ANTENNA_C = 2, ANTENNA_CD = 3, ANTENNA_B = 4, ANTENNA_BD = 5, ANTENNA_BC = 6, ANTENNA_BCD = 7, ANTENNA_A = 8, ANTENNA_AD = 9, ANTENNA_AC = 10, ANTENNA_ACD = 11, ANTENNA_AB = 12, ANTENNA_ABD = 13, ANTENNA_ABC = 14, ANTENNA_ABCD = 15 } ANTENNA_PATH; typedef enum _RF_CONTENT{ radioa_txt = 0x1000, radiob_txt = 0x1001, radioc_txt = 0x1002, radiod_txt = 0x1003 } RF_CONTENT; typedef enum _BaseBand_Config_Type{ BaseBand_Config_PHY_REG = 0, //Radio Path A BaseBand_Config_AGC_TAB = 1, //Radio Path B BaseBand_Config_AGC_TAB_2G = 2, BaseBand_Config_AGC_TAB_5G = 3, BaseBand_Config_PHY_REG_PG }BaseBand_Config_Type, *PBaseBand_Config_Type; typedef enum _HW_BLOCK{ HW_BLOCK_MAC = 0, HW_BLOCK_PHY0 = 1, HW_BLOCK_PHY1 = 2, HW_BLOCK_RF = 3, HW_BLOCK_MAXIMUM = 4, // Never use this }HW_BLOCK_E, *PHW_BLOCK_E; typedef enum _WIRELESS_MODE { WIRELESS_MODE_UNKNOWN = 0x00, WIRELESS_MODE_A = 0x01, WIRELESS_MODE_B = 0x02, WIRELESS_MODE_G = 0x04, WIRELESS_MODE_AUTO = 0x08, WIRELESS_MODE_N_24G = 0x10, WIRELESS_MODE_N_5G = 0x20, WIRELESS_MODE_AC_5G = 0x40, WIRELESS_MODE_AC_24G = 0x80, WIRELESS_MODE_AC_ONLY = 0x100, } WIRELESS_MODE; typedef enum _SwChnlCmdID{ CmdID_End, CmdID_SetTxPowerLevel, CmdID_BBRegWrite10, CmdID_WritePortUlong, CmdID_WritePortUshort, CmdID_WritePortUchar, CmdID_RF_WriteReg, }SwChnlCmdID; typedef struct _SwChnlCmd{ SwChnlCmdID CmdID; u32 Para1; u32 Para2; u32 msDelay; }SwChnlCmd; typedef struct _R_ANTENNA_SELECT_OFDM{ u32 r_tx_antenna:4; u32 r_ant_l:4; u32 r_ant_non_ht:4; u32 r_ant_ht1:4; u32 r_ant_ht2:4; u32 r_ant_ht_s1:4; u32 r_ant_non_ht_s1:4; u32 OFDM_TXSC:2; u32 Reserved:2; }R_ANTENNA_SELECT_OFDM; typedef struct _R_ANTENNA_SELECT_CCK{ u8 r_cckrx_enable_2:2; u8 r_cckrx_enable:2; u8 r_ccktx_enable:4; }R_ANTENNA_SELECT_CCK; typedef struct RF_Shadow_Compare_Map { // Shadow register value u32 Value; // Compare or not flag u8 Compare; // Record If it had ever modified unpredicted u8 ErrorOrNot; // Recorver Flag u8 Recorver; // u8 Driver_Write; }RF_SHADOW_T; /*--------------------------Exported Function prototype---------------------*/ u32 PHY_CalculateBitShift( u32 BitMask ); u32 PHY_RFShadowRead( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 Offset); VOID PHY_RFShadowWrite( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 Offset, IN u32 Data); BOOLEAN PHY_RFShadowCompare( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 Offset); VOID PHY_RFShadowRecorver( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 Offset); VOID PHY_RFShadowCompareAll( IN PADAPTER Adapter); VOID PHY_RFShadowRecorverAll( IN PADAPTER Adapter); VOID PHY_RFShadowCompareFlagSet( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 Offset, IN u8 Type); VOID PHY_RFShadowRecorverFlagSet( IN PADAPTER Adapter, IN u8 eRFPath, IN u32 Offset, IN u8 Type); VOID PHY_RFShadowCompareFlagSetAll( IN PADAPTER Adapter); VOID PHY_RFShadowRecorverFlagSetAll( IN PADAPTER Adapter); VOID PHY_RFShadowRefresh( IN PADAPTER Adapter); #endif //__HAL_COMMON_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/hal_phy_reg.h000066400000000000000000000022401261122257400215520ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HAL_PHY_REG_H__ #define __HAL_PHY_REG_H__ //for PutRFRegsetting & GetRFRegSetting BitMask //#if (RTL92SE_FPGA_VERIFY == 1) //#define bRFRegOffsetMask 0xfff //#else #define bRFRegOffsetMask 0xfffff //#endif #endif //__HAL_PHY_REG_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/hal_sdio.h000066400000000000000000000026751261122257400210670ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __HAL_SDIO_H_ #define __HAL_SDIO_H_ #define ffaddr2deviceId(pdvobj, addr) (pdvobj->Queue2Pipe[addr]) u8 rtw_hal_sdio_max_txoqt_free_space(_adapter *padapter); u8 rtw_hal_sdio_query_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum); void rtw_hal_sdio_update_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum); void rtw_hal_set_sdio_tx_max_length(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ); u32 rtw_hal_get_sdio_tx_max_length(PADAPTER padapter, u8 queue_idx); #endif //__RTW_LED_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/ieee80211.h000066400000000000000000001351331261122257400206040ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __IEEE80211_H #define __IEEE80211_H #ifndef CONFIG_RTL8711FW #if defined PLATFORM_OS_XP #include #endif #else #endif #define MGMT_QUEUE_NUM 5 #define ETH_ALEN 6 #define ETH_TYPE_LEN 2 #define PAYLOAD_TYPE_LEN 1 #ifdef CONFIG_AP_MODE #define RTL_IOCTL_HOSTAPD (SIOCIWFIRSTPRIV + 28) /* RTL871X_IOCTL_HOSTAPD ioctl() cmd: */ enum { RTL871X_HOSTAPD_FLUSH = 1, RTL871X_HOSTAPD_ADD_STA = 2, RTL871X_HOSTAPD_REMOVE_STA = 3, RTL871X_HOSTAPD_GET_INFO_STA = 4, /* REMOVED: PRISM2_HOSTAPD_RESET_TXEXC_STA = 5, */ RTL871X_HOSTAPD_GET_WPAIE_STA = 5, RTL871X_SET_ENCRYPTION = 6, RTL871X_GET_ENCRYPTION = 7, RTL871X_HOSTAPD_SET_FLAGS_STA = 8, RTL871X_HOSTAPD_GET_RID = 9, RTL871X_HOSTAPD_SET_RID = 10, RTL871X_HOSTAPD_SET_ASSOC_AP_ADDR = 11, RTL871X_HOSTAPD_SET_GENERIC_ELEMENT = 12, RTL871X_HOSTAPD_MLME = 13, RTL871X_HOSTAPD_SCAN_REQ = 14, RTL871X_HOSTAPD_STA_CLEAR_STATS = 15, RTL871X_HOSTAPD_SET_BEACON=16, RTL871X_HOSTAPD_SET_WPS_BEACON = 17, RTL871X_HOSTAPD_SET_WPS_PROBE_RESP = 18, RTL871X_HOSTAPD_SET_WPS_ASSOC_RESP = 19, RTL871X_HOSTAPD_SET_HIDDEN_SSID = 20, RTL871X_HOSTAPD_SET_MACADDR_ACL = 21, RTL871X_HOSTAPD_ACL_ADD_STA = 22, RTL871X_HOSTAPD_ACL_REMOVE_STA = 23, }; /* STA flags */ #define WLAN_STA_AUTH BIT(0) #define WLAN_STA_ASSOC BIT(1) #define WLAN_STA_PS BIT(2) #define WLAN_STA_TIM BIT(3) #define WLAN_STA_PERM BIT(4) #define WLAN_STA_AUTHORIZED BIT(5) #define WLAN_STA_PENDING_POLL BIT(6) /* pending activity poll not ACKed */ #define WLAN_STA_SHORT_PREAMBLE BIT(7) #define WLAN_STA_PREAUTH BIT(8) #define WLAN_STA_WME BIT(9) #define WLAN_STA_MFP BIT(10) #define WLAN_STA_HT BIT(11) #define WLAN_STA_WPS BIT(12) #define WLAN_STA_MAYBE_WPS BIT(13) #define WLAN_STA_VHT BIT(14) #define WLAN_STA_NONERP BIT(31) #endif #define IEEE_CMD_SET_WPA_PARAM 1 #define IEEE_CMD_SET_WPA_IE 2 #define IEEE_CMD_SET_ENCRYPTION 3 #define IEEE_CMD_MLME 4 #define IEEE_PARAM_WPA_ENABLED 1 #define IEEE_PARAM_TKIP_COUNTERMEASURES 2 #define IEEE_PARAM_DROP_UNENCRYPTED 3 #define IEEE_PARAM_PRIVACY_INVOKED 4 #define IEEE_PARAM_AUTH_ALGS 5 #define IEEE_PARAM_IEEE_802_1X 6 #define IEEE_PARAM_WPAX_SELECT 7 #define AUTH_ALG_OPEN_SYSTEM 0x1 #define AUTH_ALG_SHARED_KEY 0x2 #define AUTH_ALG_LEAP 0x00000004 #define IEEE_MLME_STA_DEAUTH 1 #define IEEE_MLME_STA_DISASSOC 2 #define IEEE_CRYPT_ERR_UNKNOWN_ALG 2 #define IEEE_CRYPT_ERR_UNKNOWN_ADDR 3 #define IEEE_CRYPT_ERR_CRYPT_INIT_FAILED 4 #define IEEE_CRYPT_ERR_KEY_SET_FAILED 5 #define IEEE_CRYPT_ERR_TX_KEY_SET_FAILED 6 #define IEEE_CRYPT_ERR_CARD_CONF_FAILED 7 #define IEEE_CRYPT_ALG_NAME_LEN 16 #define WPA_CIPHER_NONE BIT(0) #define WPA_CIPHER_WEP40 BIT(1) #define WPA_CIPHER_WEP104 BIT(2) #define WPA_CIPHER_TKIP BIT(3) #define WPA_CIPHER_CCMP BIT(4) #define WPA_SELECTOR_LEN 4 extern u8 RTW_WPA_OUI_TYPE[] ; extern u16 RTW_WPA_VERSION ; extern u8 WPA_AUTH_KEY_MGMT_NONE[]; extern u8 WPA_AUTH_KEY_MGMT_UNSPEC_802_1X[]; extern u8 WPA_AUTH_KEY_MGMT_PSK_OVER_802_1X[]; extern u8 WPA_CIPHER_SUITE_NONE[]; extern u8 WPA_CIPHER_SUITE_WEP40[]; extern u8 WPA_CIPHER_SUITE_TKIP[]; extern u8 WPA_CIPHER_SUITE_WRAP[]; extern u8 WPA_CIPHER_SUITE_CCMP[]; extern u8 WPA_CIPHER_SUITE_WEP104[]; #define RSN_HEADER_LEN 4 #define RSN_SELECTOR_LEN 4 extern u16 RSN_VERSION_BSD; extern u8 RSN_AUTH_KEY_MGMT_UNSPEC_802_1X[]; extern u8 RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X[]; extern u8 RSN_CIPHER_SUITE_NONE[]; extern u8 RSN_CIPHER_SUITE_WEP40[]; extern u8 RSN_CIPHER_SUITE_TKIP[]; extern u8 RSN_CIPHER_SUITE_WRAP[]; extern u8 RSN_CIPHER_SUITE_CCMP[]; extern u8 RSN_CIPHER_SUITE_WEP104[]; typedef enum _RATEID_IDX_ { RATEID_IDX_BGN_40M_2SS = 0, RATEID_IDX_BGN_40M_1SS = 1, RATEID_IDX_BGN_20M_2SS_BN = 2, RATEID_IDX_BGN_20M_1SS_BN = 3, RATEID_IDX_GN_N2SS = 4, RATEID_IDX_GN_N1SS = 5, RATEID_IDX_BG = 6, RATEID_IDX_G = 7, RATEID_IDX_B = 8, RATEID_IDX_VHT_2SS = 9, RATEID_IDX_VHT_1SS = 10, } RATEID_IDX, *PRATEID_IDX; typedef enum _RATR_TABLE_MODE{ RATR_INX_WIRELESS_NGB = 0, // BGN 40 Mhz 2SS 1SS RATR_INX_WIRELESS_NG = 1, // GN or N RATR_INX_WIRELESS_NB = 2, // BGN 20 Mhz 2SS 1SS or BN RATR_INX_WIRELESS_N = 3, RATR_INX_WIRELESS_GB = 4, RATR_INX_WIRELESS_G = 5, RATR_INX_WIRELESS_B = 6, RATR_INX_WIRELESS_MC = 7, RATR_INX_WIRELESS_AC_N = 8, }RATR_TABLE_MODE, *PRATR_TABLE_MODE; enum NETWORK_TYPE { WIRELESS_INVALID = 0, //Sub-Element WIRELESS_11B = BIT(0), // tx: cck only , rx: cck only, hw: cck WIRELESS_11G = BIT(1), // tx: ofdm only, rx: ofdm & cck, hw: cck & ofdm WIRELESS_11A = BIT(2), // tx: ofdm only, rx: ofdm only, hw: ofdm only WIRELESS_11_24N = BIT(3), // tx: MCS only, rx: MCS & cck, hw: MCS & cck WIRELESS_11_5N = BIT(4), // tx: MCS only, rx: MCS & ofdm, hw: ofdm only WIRELESS_AUTO = BIT(5), WIRELESS_11AC = BIT(6), //Combination //Type for current wireless mode WIRELESS_11BG = (WIRELESS_11B|WIRELESS_11G), // tx: cck & ofdm, rx: cck & ofdm & MCS, hw: cck & ofdm WIRELESS_11G_24N = (WIRELESS_11G|WIRELESS_11_24N), // tx: ofdm & MCS, rx: ofdm & cck & MCS, hw: cck & ofdm WIRELESS_11A_5N = (WIRELESS_11A|WIRELESS_11_5N), // tx: ofdm & MCS, rx: ofdm & MCS, hw: ofdm only WIRELESS_11B_24N = (WIRELESS_11B|WIRELESS_11_24N), // tx: ofdm & cck & MCS, rx: ofdm & cck & MCS, hw: ofdm & cck WIRELESS_11BG_24N = (WIRELESS_11B|WIRELESS_11G|WIRELESS_11_24N), // tx: ofdm & cck & MCS, rx: ofdm & cck & MCS, hw: ofdm & cck WIRELESS_11_24AC = (WIRELESS_11G|WIRELESS_11AC), WIRELESS_11_5AC = (WIRELESS_11A|WIRELESS_11AC), //Type for registry default wireless mode WIRELESS_11AGN = (WIRELESS_11A|WIRELESS_11G|WIRELESS_11_24N|WIRELESS_11_5N), // tx: ofdm & MCS, rx: ofdm & MCS, hw: ofdm only WIRELESS_11ABGN = (WIRELESS_11A|WIRELESS_11B|WIRELESS_11G|WIRELESS_11_24N|WIRELESS_11_5N), WIRELESS_MODE_24G = (WIRELESS_11B|WIRELESS_11G|WIRELESS_11_24N|WIRELESS_11AC), WIRELESS_MODE_5G = (WIRELESS_11A|WIRELESS_11_5N|WIRELESS_11AC), WIRELESS_MODE_MAX = (WIRELESS_11A|WIRELESS_11B|WIRELESS_11G|WIRELESS_11_24N|WIRELESS_11_5N|WIRELESS_11AC), }; #define SUPPORTED_24G_NETTYPE_MSK (WIRELESS_11B | WIRELESS_11G | WIRELESS_11_24N) #define SUPPORTED_5G_NETTYPE_MSK (WIRELESS_11A | WIRELESS_11_5N) #define IsLegacyOnly(NetType) ((NetType) == ((NetType) & (WIRELESS_11BG|WIRELESS_11A))) #define IsSupported24G(NetType) ((NetType) & SUPPORTED_24G_NETTYPE_MSK ? _TRUE : _FALSE) #define IsSupported5G(NetType) ((NetType) & SUPPORTED_5G_NETTYPE_MSK ? _TRUE : _FALSE) #define IsEnableHWCCK(NetType) IsSupported24G(NetType) #define IsEnableHWOFDM(NetType) ((NetType) & (WIRELESS_11G|WIRELESS_11_24N|SUPPORTED_5G_NETTYPE_MSK) ? _TRUE : _FALSE) #define IsSupportedRxCCK(NetType) IsEnableHWCCK(NetType) #define IsSupportedRxOFDM(NetType) IsEnableHWOFDM(NetType) #define IsSupportedRxHT(NetType) IsEnableHWOFDM(NetType) #define IsSupportedTxCCK(NetType) ((NetType) & (WIRELESS_11B) ? _TRUE : _FALSE) #define IsSupportedTxOFDM(NetType) ((NetType) & (WIRELESS_11G|WIRELESS_11A) ? _TRUE : _FALSE) #define IsSupportedHT(NetType) ((NetType) & (WIRELESS_11_24N|WIRELESS_11_5N) ? _TRUE : _FALSE) #define IsSupportedVHT(NetType) ((NetType) & (WIRELESS_11AC) ? _TRUE : _FALSE) typedef struct ieee_param { u32 cmd; u8 sta_addr[ETH_ALEN]; union { struct { u8 name; u32 value; } wpa_param; struct { u32 len; u8 reserved[32]; u8 data[0]; } wpa_ie; struct{ int command; int reason_code; } mlme; struct { u8 alg[IEEE_CRYPT_ALG_NAME_LEN]; u8 set_tx; u32 err; u8 idx; u8 seq[8]; /* sequence counter (set: RX, get: TX) */ u16 key_len; u8 key[0]; } crypt; #ifdef CONFIG_AP_MODE struct { u16 aid; u16 capability; int flags; u8 tx_supp_rates[16]; struct rtw_ieee80211_ht_cap ht_cap; } add_sta; struct { u8 reserved[2];//for set max_num_sta u8 buf[0]; } bcn_ie; #endif } u; }ieee_param; #ifdef CONFIG_AP_MODE typedef struct ieee_param_ex { u32 cmd; u8 sta_addr[ETH_ALEN]; u8 data[0]; }ieee_param_ex; struct sta_data{ u16 aid; u16 capability; int flags; u32 sta_set; u8 tx_supp_rates[16]; u32 tx_supp_rates_len; struct rtw_ieee80211_ht_cap ht_cap; u64 rx_pkts; u64 rx_bytes; u64 rx_drops; u64 tx_pkts; u64 tx_bytes; u64 tx_drops; }; #endif #if WIRELESS_EXT < 17 #define IW_QUAL_QUAL_INVALID 0x10 #define IW_QUAL_LEVEL_INVALID 0x20 #define IW_QUAL_NOISE_INVALID 0x40 #define IW_QUAL_QUAL_UPDATED 0x1 #define IW_QUAL_LEVEL_UPDATED 0x2 #define IW_QUAL_NOISE_UPDATED 0x4 #endif #define IEEE80211_DATA_LEN 2304 /* Maximum size for the MA-UNITDATA primitive, 802.11 standard section 6.2.1.1.2. The figure in section 7.1.2 suggests a body size of up to 2312 bytes is allowed, which is a bit confusing, I suspect this represents the 2304 bytes of real data, plus a possible 8 bytes of WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */ #define IEEE80211_HLEN 30 #define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN) /* this is stolen from ipw2200 driver */ #define IEEE_IBSS_MAC_HASH_SIZE 31 struct ieee_ibss_seq { u8 mac[ETH_ALEN]; u16 seq_num; u16 frag_num; unsigned long packet_time; _list list; }; #if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW)||defined(PLATFORM_FREEBSD) struct rtw_ieee80211_hdr { u16 frame_ctl; u16 duration_id; u8 addr1[ETH_ALEN]; u8 addr2[ETH_ALEN]; u8 addr3[ETH_ALEN]; u16 seq_ctl; u8 addr4[ETH_ALEN]; } __attribute__ ((packed)); struct rtw_ieee80211_hdr_3addr { u16 frame_ctl; u16 duration_id; u8 addr1[ETH_ALEN]; u8 addr2[ETH_ALEN]; u8 addr3[ETH_ALEN]; u16 seq_ctl; } __attribute__ ((packed)); struct rtw_ieee80211_hdr_qos { u16 frame_ctl; u16 duration_id; u8 addr1[ETH_ALEN]; u8 addr2[ETH_ALEN]; u8 addr3[ETH_ALEN]; u16 seq_ctl; u8 addr4[ETH_ALEN]; u16 qc; } __attribute__ ((packed)); struct rtw_ieee80211_hdr_3addr_qos { u16 frame_ctl; u16 duration_id; u8 addr1[ETH_ALEN]; u8 addr2[ETH_ALEN]; u8 addr3[ETH_ALEN]; u16 seq_ctl; u16 qc; } __attribute__ ((packed)); struct eapol { u8 snap[6]; u16 ethertype; u8 version; u8 type; u16 length; } __attribute__ ((packed)); #endif #ifdef PLATFORM_WINDOWS #pragma pack(1) struct rtw_ieee80211_hdr { u16 frame_ctl; u16 duration_id; u8 addr1[ETH_ALEN]; u8 addr2[ETH_ALEN]; u8 addr3[ETH_ALEN]; u16 seq_ctl; u8 addr4[ETH_ALEN]; }; struct rtw_ieee80211_hdr_3addr { u16 frame_ctl; u16 duration_id; u8 addr1[ETH_ALEN]; u8 addr2[ETH_ALEN]; u8 addr3[ETH_ALEN]; u16 seq_ctl; }; struct rtw_ieee80211_hdr_qos { struct rtw_ieee80211_hdr wlan_hdr; u16 qc; }; struct rtw_ieee80211_hdr_3addr_qos { struct rtw_ieee80211_hdr_3addr wlan_hdr; u16 qc; }; struct eapol { u8 snap[6]; u16 ethertype; u8 version; u8 type; u16 length; }; #pragma pack() #endif enum eap_type { EAP_PACKET = 0, EAPOL_START, EAPOL_LOGOFF, EAPOL_KEY, EAPOL_ENCAP_ASF_ALERT }; #define IEEE80211_3ADDR_LEN 24 #define IEEE80211_4ADDR_LEN 30 #define IEEE80211_FCS_LEN 4 #define MIN_FRAG_THRESHOLD 256U #define MAX_FRAG_THRESHOLD 2346U /* Frame control field constants */ #define RTW_IEEE80211_FCTL_VERS 0x0003 #define RTW_IEEE80211_FCTL_FTYPE 0x000c #define RTW_IEEE80211_FCTL_STYPE 0x00f0 #define RTW_IEEE80211_FCTL_TODS 0x0100 #define RTW_IEEE80211_FCTL_FROMDS 0x0200 #define RTW_IEEE80211_FCTL_MOREFRAGS 0x0400 #define RTW_IEEE80211_FCTL_RETRY 0x0800 #define RTW_IEEE80211_FCTL_PM 0x1000 #define RTW_IEEE80211_FCTL_MOREDATA 0x2000 #define RTW_IEEE80211_FCTL_PROTECTED 0x4000 #define RTW_IEEE80211_FCTL_ORDER 0x8000 #define RTW_IEEE80211_FCTL_CTL_EXT 0x0f00 #define RTW_IEEE80211_FTYPE_MGMT 0x0000 #define RTW_IEEE80211_FTYPE_CTL 0x0004 #define RTW_IEEE80211_FTYPE_DATA 0x0008 #define RTW_IEEE80211_FTYPE_EXT 0x000c /* management */ #define RTW_IEEE80211_STYPE_ASSOC_REQ 0x0000 #define RTW_IEEE80211_STYPE_ASSOC_RESP 0x0010 #define RTW_IEEE80211_STYPE_REASSOC_REQ 0x0020 #define RTW_IEEE80211_STYPE_REASSOC_RESP 0x0030 #define RTW_IEEE80211_STYPE_PROBE_REQ 0x0040 #define RTW_IEEE80211_STYPE_PROBE_RESP 0x0050 #define RTW_IEEE80211_STYPE_BEACON 0x0080 #define RTW_IEEE80211_STYPE_ATIM 0x0090 #define RTW_IEEE80211_STYPE_DISASSOC 0x00A0 #define RTW_IEEE80211_STYPE_AUTH 0x00B0 #define RTW_IEEE80211_STYPE_DEAUTH 0x00C0 #define RTW_IEEE80211_STYPE_ACTION 0x00D0 /* control */ #define RTW_IEEE80211_STYPE_CTL_EXT 0x0060 #define RTW_IEEE80211_STYPE_BACK_REQ 0x0080 #define RTW_IEEE80211_STYPE_BACK 0x0090 #define RTW_IEEE80211_STYPE_PSPOLL 0x00A0 #define RTW_IEEE80211_STYPE_RTS 0x00B0 #define RTW_IEEE80211_STYPE_CTS 0x00C0 #define RTW_IEEE80211_STYPE_ACK 0x00D0 #define RTW_IEEE80211_STYPE_CFEND 0x00E0 #define RTW_IEEE80211_STYPE_CFENDACK 0x00F0 /* data */ #define RTW_IEEE80211_STYPE_DATA 0x0000 #define RTW_IEEE80211_STYPE_DATA_CFACK 0x0010 #define RTW_IEEE80211_STYPE_DATA_CFPOLL 0x0020 #define RTW_IEEE80211_STYPE_DATA_CFACKPOLL 0x0030 #define RTW_IEEE80211_STYPE_NULLFUNC 0x0040 #define RTW_IEEE80211_STYPE_CFACK 0x0050 #define RTW_IEEE80211_STYPE_CFPOLL 0x0060 #define RTW_IEEE80211_STYPE_CFACKPOLL 0x0070 #define RTW_IEEE80211_STYPE_QOS_DATA 0x0080 #define RTW_IEEE80211_STYPE_QOS_DATA_CFACK 0x0090 #define RTW_IEEE80211_STYPE_QOS_DATA_CFPOLL 0x00A0 #define RTW_IEEE80211_STYPE_QOS_DATA_CFACKPOLL 0x00B0 #define RTW_IEEE80211_STYPE_QOS_NULLFUNC 0x00C0 #define RTW_IEEE80211_STYPE_QOS_CFACK 0x00D0 #define RTW_IEEE80211_STYPE_QOS_CFPOLL 0x00E0 #define RTW_IEEE80211_STYPE_QOS_CFACKPOLL 0x00F0 /* sequence control field */ #define RTW_IEEE80211_SCTL_FRAG 0x000F #define RTW_IEEE80211_SCTL_SEQ 0xFFF0 #define RTW_ERP_INFO_NON_ERP_PRESENT BIT(0) #define RTW_ERP_INFO_USE_PROTECTION BIT(1) #define RTW_ERP_INFO_BARKER_PREAMBLE_MODE BIT(2) /* QoS,QOS */ #define NORMAL_ACK 0 #define NO_ACK 1 #define NON_EXPLICIT_ACK 2 #define BLOCK_ACK 3 #ifndef ETH_P_PAE #define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */ #endif /* ETH_P_PAE */ #define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */ #define ETH_P_ECONET 0x0018 #ifndef ETH_P_80211_RAW #define ETH_P_80211_RAW (ETH_P_ECONET + 1) #endif /* IEEE 802.11 defines */ #define P80211_OUI_LEN 3 #if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) || defined(PLATFORM_FREEBSD) struct ieee80211_snap_hdr { u8 dsap; /* always 0xAA */ u8 ssap; /* always 0xAA */ u8 ctrl; /* always 0x03 */ u8 oui[P80211_OUI_LEN]; /* organizational universal id */ } __attribute__ ((packed)); #endif #ifdef PLATFORM_WINDOWS #pragma pack(1) struct ieee80211_snap_hdr { u8 dsap; /* always 0xAA */ u8 ssap; /* always 0xAA */ u8 ctrl; /* always 0x03 */ u8 oui[P80211_OUI_LEN]; /* organizational universal id */ }; #pragma pack() #endif #define SNAP_SIZE sizeof(struct ieee80211_snap_hdr) #define WLAN_FC_GET_TYPE(fc) ((fc) & RTW_IEEE80211_FCTL_FTYPE) #define WLAN_FC_GET_STYPE(fc) ((fc) & RTW_IEEE80211_FCTL_STYPE) #define WLAN_QC_GET_TID(qc) ((qc) & 0x0f) #define WLAN_GET_SEQ_FRAG(seq) ((seq) & RTW_IEEE80211_SCTL_FRAG) #define WLAN_GET_SEQ_SEQ(seq) ((seq) & RTW_IEEE80211_SCTL_SEQ) /* Authentication algorithms */ #define WLAN_AUTH_OPEN 0 #define WLAN_AUTH_SHARED_KEY 1 #define WLAN_AUTH_CHALLENGE_LEN 128 #define WLAN_CAPABILITY_BSS (1<<0) #define WLAN_CAPABILITY_IBSS (1<<1) #define WLAN_CAPABILITY_CF_POLLABLE (1<<2) #define WLAN_CAPABILITY_CF_POLL_REQUEST (1<<3) #define WLAN_CAPABILITY_PRIVACY (1<<4) #define WLAN_CAPABILITY_SHORT_PREAMBLE (1<<5) #define WLAN_CAPABILITY_PBCC (1<<6) #define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7) #define WLAN_CAPABILITY_SHORT_SLOT (1<<10) /* Status codes */ #define WLAN_STATUS_SUCCESS 0 #define WLAN_STATUS_UNSPECIFIED_FAILURE 1 #define WLAN_STATUS_CAPS_UNSUPPORTED 10 #define WLAN_STATUS_REASSOC_NO_ASSOC 11 #define WLAN_STATUS_ASSOC_DENIED_UNSPEC 12 #define WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG 13 #define WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION 14 #define WLAN_STATUS_CHALLENGE_FAIL 15 #define WLAN_STATUS_AUTH_TIMEOUT 16 #define WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA 17 #define WLAN_STATUS_ASSOC_DENIED_RATES 18 /* 802.11b */ #define WLAN_STATUS_ASSOC_DENIED_NOSHORT 19 #define WLAN_STATUS_ASSOC_DENIED_NOPBCC 20 #define WLAN_STATUS_ASSOC_DENIED_NOAGILITY 21 /* Reason codes */ #define WLAN_REASON_UNSPECIFIED 1 #define WLAN_REASON_PREV_AUTH_NOT_VALID 2 #define WLAN_REASON_DEAUTH_LEAVING 3 #define WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY 4 #define WLAN_REASON_DISASSOC_AP_BUSY 5 #define WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA 6 #define WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA 7 #define WLAN_REASON_DISASSOC_STA_HAS_LEFT 8 #define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9 #define WLAN_REASON_ACTIVE_ROAM 65533 #define WLAN_REASON_JOIN_WRONG_CHANNEL 65534 #define WLAN_REASON_EXPIRATION_CHK 65535 /* Information Element IDs */ #define WLAN_EID_SSID 0 #define WLAN_EID_SUPP_RATES 1 #define WLAN_EID_FH_PARAMS 2 #define WLAN_EID_DS_PARAMS 3 #define WLAN_EID_CF_PARAMS 4 #define WLAN_EID_TIM 5 #define WLAN_EID_IBSS_PARAMS 6 #define WLAN_EID_CHALLENGE 16 /* EIDs defined by IEEE 802.11h - START */ #define WLAN_EID_PWR_CONSTRAINT 32 #define WLAN_EID_PWR_CAPABILITY 33 #define WLAN_EID_TPC_REQUEST 34 #define WLAN_EID_TPC_REPORT 35 #define WLAN_EID_SUPPORTED_CHANNELS 36 #define WLAN_EID_CHANNEL_SWITCH 37 #define WLAN_EID_MEASURE_REQUEST 38 #define WLAN_EID_MEASURE_REPORT 39 #define WLAN_EID_QUITE 40 #define WLAN_EID_IBSS_DFS 41 /* EIDs defined by IEEE 802.11h - END */ #define WLAN_EID_ERP_INFO 42 #define WLAN_EID_HT_CAP 45 #define WLAN_EID_RSN 48 #define WLAN_EID_EXT_SUPP_RATES 50 #define WLAN_EID_MOBILITY_DOMAIN 54 #define WLAN_EID_FAST_BSS_TRANSITION 55 #define WLAN_EID_TIMEOUT_INTERVAL 56 #define WLAN_EID_RIC_DATA 57 #define WLAN_EID_HT_OPERATION 61 #define WLAN_EID_SECONDARY_CHANNEL_OFFSET 62 #define WLAN_EID_20_40_BSS_COEXISTENCE 72 #define WLAN_EID_20_40_BSS_INTOLERANT 73 #define WLAN_EID_OVERLAPPING_BSS_SCAN_PARAMS 74 #define WLAN_EID_MMIE 76 #define WLAN_EID_VENDOR_SPECIFIC 221 #define WLAN_EID_GENERIC (WLAN_EID_VENDOR_SPECIFIC) #define WLAN_EID_VHT_CAPABILITY 191 #define WLAN_EID_VHT_OPERATION 192 #define WLAN_EID_VHT_OP_MODE_NOTIFY 199 #define IEEE80211_MGMT_HDR_LEN 24 #define IEEE80211_DATA_HDR3_LEN 24 #define IEEE80211_DATA_HDR4_LEN 30 #define IEEE80211_STATMASK_SIGNAL (1<<0) #define IEEE80211_STATMASK_RSSI (1<<1) #define IEEE80211_STATMASK_NOISE (1<<2) #define IEEE80211_STATMASK_RATE (1<<3) #define IEEE80211_STATMASK_WEMASK 0x7 #define IEEE80211_CCK_MODULATION (1<<0) #define IEEE80211_OFDM_MODULATION (1<<1) #define IEEE80211_24GHZ_BAND (1<<0) #define IEEE80211_52GHZ_BAND (1<<1) #define IEEE80211_CCK_RATE_LEN 4 #define IEEE80211_NUM_OFDM_RATESLEN 8 #define IEEE80211_CCK_RATE_1MB 0x02 #define IEEE80211_CCK_RATE_2MB 0x04 #define IEEE80211_CCK_RATE_5MB 0x0B #define IEEE80211_CCK_RATE_11MB 0x16 #define IEEE80211_OFDM_RATE_LEN 8 #define IEEE80211_OFDM_RATE_6MB 0x0C #define IEEE80211_OFDM_RATE_9MB 0x12 #define IEEE80211_OFDM_RATE_12MB 0x18 #define IEEE80211_OFDM_RATE_18MB 0x24 #define IEEE80211_OFDM_RATE_24MB 0x30 #define IEEE80211_OFDM_RATE_36MB 0x48 #define IEEE80211_OFDM_RATE_48MB 0x60 #define IEEE80211_OFDM_RATE_54MB 0x6C #define IEEE80211_BASIC_RATE_MASK 0x80 #define IEEE80211_CCK_RATE_1MB_MASK (1<<0) #define IEEE80211_CCK_RATE_2MB_MASK (1<<1) #define IEEE80211_CCK_RATE_5MB_MASK (1<<2) #define IEEE80211_CCK_RATE_11MB_MASK (1<<3) #define IEEE80211_OFDM_RATE_6MB_MASK (1<<4) #define IEEE80211_OFDM_RATE_9MB_MASK (1<<5) #define IEEE80211_OFDM_RATE_12MB_MASK (1<<6) #define IEEE80211_OFDM_RATE_18MB_MASK (1<<7) #define IEEE80211_OFDM_RATE_24MB_MASK (1<<8) #define IEEE80211_OFDM_RATE_36MB_MASK (1<<9) #define IEEE80211_OFDM_RATE_48MB_MASK (1<<10) #define IEEE80211_OFDM_RATE_54MB_MASK (1<<11) #define IEEE80211_CCK_RATES_MASK 0x0000000F #define IEEE80211_CCK_BASIC_RATES_MASK (IEEE80211_CCK_RATE_1MB_MASK | \ IEEE80211_CCK_RATE_2MB_MASK) #define IEEE80211_CCK_DEFAULT_RATES_MASK (IEEE80211_CCK_BASIC_RATES_MASK | \ IEEE80211_CCK_RATE_5MB_MASK | \ IEEE80211_CCK_RATE_11MB_MASK) #define IEEE80211_OFDM_RATES_MASK 0x00000FF0 #define IEEE80211_OFDM_BASIC_RATES_MASK (IEEE80211_OFDM_RATE_6MB_MASK | \ IEEE80211_OFDM_RATE_12MB_MASK | \ IEEE80211_OFDM_RATE_24MB_MASK) #define IEEE80211_OFDM_DEFAULT_RATES_MASK (IEEE80211_OFDM_BASIC_RATES_MASK | \ IEEE80211_OFDM_RATE_9MB_MASK | \ IEEE80211_OFDM_RATE_18MB_MASK | \ IEEE80211_OFDM_RATE_36MB_MASK | \ IEEE80211_OFDM_RATE_48MB_MASK | \ IEEE80211_OFDM_RATE_54MB_MASK) #define IEEE80211_DEFAULT_RATES_MASK (IEEE80211_OFDM_DEFAULT_RATES_MASK | \ IEEE80211_CCK_DEFAULT_RATES_MASK) #define IEEE80211_NUM_OFDM_RATES 8 #define IEEE80211_NUM_CCK_RATES 4 #define IEEE80211_OFDM_SHIFT_MASK_A 4 enum MGN_RATE{ MGN_1M = 0x02, MGN_2M = 0x04, MGN_5_5M = 0x0B, MGN_6M = 0x0C, MGN_9M = 0x12, MGN_11M = 0x16, MGN_12M = 0x18, MGN_18M = 0x24, MGN_24M = 0x30, MGN_36M = 0x48, MGN_48M = 0x60, MGN_54M = 0x6C, MGN_MCS32 = 0x7F, MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3, MGN_MCS4, MGN_MCS5, MGN_MCS6, MGN_MCS7, MGN_MCS8, MGN_MCS9, MGN_MCS10, MGN_MCS11, MGN_MCS12, MGN_MCS13, MGN_MCS14, MGN_MCS15, MGN_MCS16, MGN_MCS17, MGN_MCS18, MGN_MCS19, MGN_MCS20, MGN_MCS21, MGN_MCS22, MGN_MCS23, MGN_MCS24, MGN_MCS25, MGN_MCS26, MGN_MCS27, MGN_MCS28, MGN_MCS29, MGN_MCS30, MGN_MCS31, MGN_VHT1SS_MCS0, MGN_VHT1SS_MCS1, MGN_VHT1SS_MCS2, MGN_VHT1SS_MCS3, MGN_VHT1SS_MCS4, MGN_VHT1SS_MCS5, MGN_VHT1SS_MCS6, MGN_VHT1SS_MCS7, MGN_VHT1SS_MCS8, MGN_VHT1SS_MCS9, MGN_VHT2SS_MCS0, MGN_VHT2SS_MCS1, MGN_VHT2SS_MCS2, MGN_VHT2SS_MCS3, MGN_VHT2SS_MCS4, MGN_VHT2SS_MCS5, MGN_VHT2SS_MCS6, MGN_VHT2SS_MCS7, MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9, MGN_VHT3SS_MCS0, MGN_VHT3SS_MCS1, MGN_VHT3SS_MCS2, MGN_VHT3SS_MCS3, MGN_VHT3SS_MCS4, MGN_VHT3SS_MCS5, MGN_VHT3SS_MCS6, MGN_VHT3SS_MCS7, MGN_VHT3SS_MCS8, MGN_VHT3SS_MCS9, MGN_VHT4SS_MCS0, MGN_VHT4SS_MCS1, MGN_VHT4SS_MCS2, MGN_VHT4SS_MCS3, MGN_VHT4SS_MCS4, MGN_VHT4SS_MCS5, MGN_VHT4SS_MCS6, MGN_VHT4SS_MCS7, MGN_VHT4SS_MCS8, MGN_VHT4SS_MCS9, MGN_UNKNOWN }; #define IS_HT_RATE(_rate) (_rate >= MGN_MCS0 && _rate <= MGN_MCS31) #define IS_VHT_RATE(_rate) (_rate >= MGN_VHT1SS_MCS0 && _rate <= MGN_VHT4SS_MCS9) #define IS_CCK_RATE(_rate) (MGN_1M == _rate || _rate == MGN_2M || _rate == MGN_5_5M || _rate == MGN_11M ) #define IS_OFDM_RATE(_rate) (MGN_6M <= _rate && _rate <= MGN_54M && _rate != MGN_11M) /* NOTE: This data is for statistical purposes; not all hardware provides this * information for frames received. Not setting these will not cause * any adverse affects. */ struct ieee80211_rx_stats { //u32 mac_time[2]; s8 rssi; u8 signal; u8 noise; u8 received_channel; u16 rate; /* in 100 kbps */ //u8 control; u8 mask; u8 freq; u16 len; }; /* IEEE 802.11 requires that STA supports concurrent reception of at least * three fragmented frames. This define can be increased to support more * concurrent frames, but it should be noted that each entry can consume about * 2 kB of RAM and increasing cache size will slow down frame reassembly. */ #define IEEE80211_FRAG_CACHE_LEN 4 struct ieee80211_frag_entry { u32 first_frag_time; uint seq; uint last_frag; uint qos; //jackson uint tid; //jackson struct sk_buff *skb; u8 src_addr[ETH_ALEN]; u8 dst_addr[ETH_ALEN]; }; #ifndef PLATFORM_FREEBSD //Baron BSD has already defined struct ieee80211_stats { uint tx_unicast_frames; uint tx_multicast_frames; uint tx_fragments; uint tx_unicast_octets; uint tx_multicast_octets; uint tx_deferred_transmissions; uint tx_single_retry_frames; uint tx_multiple_retry_frames; uint tx_retry_limit_exceeded; uint tx_discards; uint rx_unicast_frames; uint rx_multicast_frames; uint rx_fragments; uint rx_unicast_octets; uint rx_multicast_octets; uint rx_fcs_errors; uint rx_discards_no_buffer; uint tx_discards_wrong_sa; uint rx_discards_undecryptable; uint rx_message_in_msg_fragments; uint rx_message_in_bad_msg_fragments; }; #endif //PLATFORM_FREEBSD struct ieee80211_softmac_stats{ uint rx_ass_ok; uint rx_ass_err; uint rx_probe_rq; uint tx_probe_rs; uint tx_beacons; uint rx_auth_rq; uint rx_auth_rs_ok; uint rx_auth_rs_err; uint tx_auth_rq; uint no_auth_rs; uint no_ass_rs; uint tx_ass_rq; uint rx_ass_rq; uint tx_probe_rq; uint reassoc; uint swtxstop; uint swtxawake; }; #define SEC_KEY_1 (1<<0) #define SEC_KEY_2 (1<<1) #define SEC_KEY_3 (1<<2) #define SEC_KEY_4 (1<<3) #define SEC_ACTIVE_KEY (1<<4) #define SEC_AUTH_MODE (1<<5) #define SEC_UNICAST_GROUP (1<<6) #define SEC_LEVEL (1<<7) #define SEC_ENABLED (1<<8) #define SEC_LEVEL_0 0 /* None */ #define SEC_LEVEL_1 1 /* WEP 40 and 104 bit */ #define SEC_LEVEL_2 2 /* Level 1 + TKIP */ #define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */ #define SEC_LEVEL_3 4 /* Level 2 + CCMP */ #define WEP_KEYS 4 #define WEP_KEY_LEN 13 #ifdef CONFIG_IEEE80211W #define BIP_MAX_KEYID 5 #define BIP_AAD_SIZE 20 #endif //CONFIG_IEEE80211W #if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) struct ieee80211_security { u16 active_key:2, enabled:1, auth_mode:2, auth_algo:4, unicast_uses_group:1; u8 key_sizes[WEP_KEYS]; u8 keys[WEP_KEYS][WEP_KEY_LEN]; u8 level; u16 flags; } __attribute__ ((packed)); #endif #ifdef PLATFORM_WINDOWS #pragma pack(1) struct ieee80211_security { u16 active_key:2, enabled:1, auth_mode:2, auth_algo:4, unicast_uses_group:1; u8 key_sizes[WEP_KEYS]; u8 keys[WEP_KEYS][WEP_KEY_LEN]; u8 level; u16 flags; } ; #pragma pack() #endif /* 802.11 data frame from AP ,-------------------------------------------------------------------. Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 | |------|------|---------|---------|---------|------|---------|------| Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs | | | tion | (BSSID) | | | ence | data | | `-------------------------------------------------------------------' Total: 28-2340 bytes */ struct ieee80211_header_data { u16 frame_ctl; u16 duration_id; u8 addr1[6]; u8 addr2[6]; u8 addr3[6]; u16 seq_ctrl; }; #define BEACON_PROBE_SSID_ID_POSITION 12 /* Management Frame Information Element Types */ #define MFIE_TYPE_SSID 0 #define MFIE_TYPE_RATES 1 #define MFIE_TYPE_FH_SET 2 #define MFIE_TYPE_DS_SET 3 #define MFIE_TYPE_CF_SET 4 #define MFIE_TYPE_TIM 5 #define MFIE_TYPE_IBSS_SET 6 #define MFIE_TYPE_CHALLENGE 16 #define MFIE_TYPE_ERP 42 #define MFIE_TYPE_RSN 48 #define MFIE_TYPE_RATES_EX 50 #define MFIE_TYPE_GENERIC 221 #if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) struct ieee80211_info_element_hdr { u8 id; u8 len; } __attribute__ ((packed)); struct ieee80211_info_element { u8 id; u8 len; u8 data[0]; } __attribute__ ((packed)); #endif #ifdef PLATFORM_WINDOWS #pragma pack(1) struct ieee80211_info_element_hdr { u8 id; u8 len; } ; struct ieee80211_info_element { u8 id; u8 len; u8 data[0]; } ; #pragma pack() #endif /* * These are the data types that can make up management packets * u16 auth_algorithm; u16 auth_sequence; u16 beacon_interval; u16 capability; u8 current_ap[ETH_ALEN]; u16 listen_interval; struct { u16 association_id:14, reserved:2; } __attribute__ ((packed)); u32 time_stamp[2]; u16 reason; u16 status; */ #define IEEE80211_DEFAULT_TX_ESSID "Penguin" #define IEEE80211_DEFAULT_BASIC_RATE 10 #if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) struct ieee80211_authentication { struct ieee80211_header_data header; u16 algorithm; u16 transaction; u16 status; //struct ieee80211_info_element_hdr info_element; } __attribute__ ((packed)); struct ieee80211_probe_response { struct ieee80211_header_data header; u32 time_stamp[2]; u16 beacon_interval; u16 capability; struct ieee80211_info_element info_element; } __attribute__ ((packed)); struct ieee80211_probe_request { struct ieee80211_header_data header; /*struct ieee80211_info_element info_element;*/ } __attribute__ ((packed)); struct ieee80211_assoc_request_frame { struct rtw_ieee80211_hdr_3addr header; u16 capability; u16 listen_interval; //u8 current_ap[ETH_ALEN]; struct ieee80211_info_element_hdr info_element; } __attribute__ ((packed)); struct ieee80211_assoc_response_frame { struct rtw_ieee80211_hdr_3addr header; u16 capability; u16 status; u16 aid; // struct ieee80211_info_element info_element; /* supported rates */ } __attribute__ ((packed)); #endif #ifdef PLATFORM_WINDOWS #pragma pack(1) struct ieee80211_authentication { struct ieee80211_header_data header; u16 algorithm; u16 transaction; u16 status; //struct ieee80211_info_element_hdr info_element; } ; struct ieee80211_probe_response { struct ieee80211_header_data header; u32 time_stamp[2]; u16 beacon_interval; u16 capability; struct ieee80211_info_element info_element; } ; struct ieee80211_probe_request { struct ieee80211_header_data header; /*struct ieee80211_info_element info_element;*/ } ; struct ieee80211_assoc_request_frame { struct rtw_ieee80211_hdr_3addr header; u16 capability; u16 listen_interval; //u8 current_ap[ETH_ALEN]; struct ieee80211_info_element_hdr info_element; } ; struct ieee80211_assoc_response_frame { struct rtw_ieee80211_hdr_3addr header; u16 capability; u16 status; u16 aid; // struct ieee80211_info_element info_element; /* supported rates */ }; #pragma pack() #endif struct ieee80211_txb { u8 nr_frags; u8 encrypted; u16 reserved; u16 frag_size; u16 payload_size; struct sk_buff *fragments[0]; }; /* SWEEP TABLE ENTRIES NUMBER*/ #define MAX_SWEEP_TAB_ENTRIES 42 #define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7 /* MAX_RATES_LENGTH needs to be 12. The spec says 8, and many APs * only use 8, and then use extended rates for the remaining supported * rates. Other APs, however, stick all of their supported rates on the * main rates information element... */ #define MAX_RATES_LENGTH ((u8)12) #define MAX_RATES_EX_LENGTH ((u8)16) #define MAX_NETWORK_COUNT 128 #define MAX_CHANNEL_NUMBER 161 #define IEEE80211_SOFTMAC_SCAN_TIME 400 //(HZ / 2) #define IEEE80211_SOFTMAC_ASSOC_RETRY_TIME (HZ * 2) #define CRC_LENGTH 4U #define MAX_WPA_IE_LEN (256) #define MAX_WPS_IE_LEN (512) #define MAX_P2P_IE_LEN (256) #define MAX_WFD_IE_LEN (128) #define NETWORK_EMPTY_ESSID (1<<0) #define NETWORK_HAS_OFDM (1<<1) #define NETWORK_HAS_CCK (1<<2) #define IEEE80211_DTIM_MBCAST 4 #define IEEE80211_DTIM_UCAST 2 #define IEEE80211_DTIM_VALID 1 #define IEEE80211_DTIM_INVALID 0 #define IEEE80211_PS_DISABLED 0 #define IEEE80211_PS_UNICAST IEEE80211_DTIM_UCAST #define IEEE80211_PS_MBCAST IEEE80211_DTIM_MBCAST #define IW_ESSID_MAX_SIZE 32 #if 0 struct ieee80211_network { /* These entries are used to identify a unique network */ u8 bssid[ETH_ALEN]; u8 channel; /* Ensure null-terminated for any debug msgs */ u8 ssid[IW_ESSID_MAX_SIZE + 1]; u8 ssid_len; u8 rssi; //relative signal strength u8 sq; //signal quality /* These are network statistics */ //struct ieee80211_rx_stats stats; u16 capability; u16 aid; u8 rates[MAX_RATES_LENGTH]; u8 rates_len; u8 rates_ex[MAX_RATES_EX_LENGTH]; u8 rates_ex_len; u8 edca_parmsets[18]; u8 mode; u8 flags; u8 time_stamp[8]; u16 beacon_interval; u16 listen_interval; u16 atim_window; u8 wpa_ie[MAX_WPA_IE_LEN]; size_t wpa_ie_len; u8 rsn_ie[MAX_WPA_IE_LEN]; size_t rsn_ie_len; u8 country[6]; u8 dtim_period; u8 dtim_data; u8 power_constraint; u8 qosinfo; u8 qbssload[5]; u8 network_type; int join_res; unsigned long last_scanned; }; #endif /* join_res: -1: authentication fail -2: association fail > 0: TID */ #ifndef PLATFORM_FREEBSD //Baron BSD has already defined enum ieee80211_state { /* the card is not linked at all */ IEEE80211_NOLINK = 0, /* IEEE80211_ASSOCIATING* are for BSS client mode * the driver shall not perform RX filtering unless * the state is LINKED. * The driver shall just check for the state LINKED and * defaults to NOLINK for ALL the other states (including * LINKED_SCANNING) */ /* the association procedure will start (wq scheduling)*/ IEEE80211_ASSOCIATING, IEEE80211_ASSOCIATING_RETRY, /* the association procedure is sending AUTH request*/ IEEE80211_ASSOCIATING_AUTHENTICATING, /* the association procedure has successfully authentcated * and is sending association request */ IEEE80211_ASSOCIATING_AUTHENTICATED, /* the link is ok. the card associated to a BSS or linked * to a ibss cell or acting as an AP and creating the bss */ IEEE80211_LINKED, /* same as LINKED, but the driver shall apply RX filter * rules as we are in NO_LINK mode. As the card is still * logically linked, but it is doing a syncro site survey * then it will be back to LINKED state. */ IEEE80211_LINKED_SCANNING, }; #endif //PLATFORM_FREEBSD #define DEFAULT_MAX_SCAN_AGE (15 * HZ) #define DEFAULT_FTS 2346 #define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" #define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5] #define IP_FMT "%d.%d.%d.%d" #define IP_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3] #ifdef PLATFORM_FREEBSD //Baron change func to macro #define is_multicast_mac_addr(Addr) ((((Addr[0]) & 0x01) == 0x01) && ((Addr[0]) != 0xff)) #define is_broadcast_mac_addr(Addr) ((((Addr[0]) & 0xff) == 0xff) && (((Addr[1]) & 0xff) == 0xff) && \ (((Addr[2]) & 0xff) == 0xff) && (((Addr[3]) & 0xff) == 0xff) && (((Addr[4]) & 0xff) == 0xff) && \ (((Addr[5]) & 0xff) == 0xff)) #else extern __inline int is_multicast_mac_addr(const u8 *addr) { return ((addr[0] != 0xff) && (0x01 & addr[0])); } extern __inline int is_broadcast_mac_addr(const u8 *addr) { return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) && \ (addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff)); } extern __inline int is_zero_mac_addr(const u8 *addr) { return ((addr[0] == 0x00) && (addr[1] == 0x00) && (addr[2] == 0x00) && \ (addr[3] == 0x00) && (addr[4] == 0x00) && (addr[5] == 0x00)); } #endif //PLATFORM_FREEBSD #define CFG_IEEE80211_RESERVE_FCS (1<<0) #define CFG_IEEE80211_COMPUTE_FCS (1<<1) typedef struct tx_pending_t{ int frag; struct ieee80211_txb *txb; }tx_pending_t; #define MAXTID 16 #define IEEE_A (1<<0) #define IEEE_B (1<<1) #define IEEE_G (1<<2) #define IEEE_MODE_MASK (IEEE_A|IEEE_B|IEEE_G) //Baron move to ieee80211.c int ieee80211_is_empty_essid(const char *essid, int essid_len); int ieee80211_get_hdrlen(u16 fc); #if 0 /* Action frame categories (IEEE 802.11-2007, 7.3.1.11, Table 7-24) */ #define WLAN_ACTION_SPECTRUM_MGMT 0 #define WLAN_ACTION_QOS 1 #define WLAN_ACTION_DLS 2 #define WLAN_ACTION_BLOCK_ACK 3 #define WLAN_ACTION_RADIO_MEASUREMENT 5 #define WLAN_ACTION_FT 6 #define WLAN_ACTION_SA_QUERY 8 #define WLAN_ACTION_WMM 17 #endif /* Action category code */ enum rtw_ieee80211_category { RTW_WLAN_CATEGORY_SPECTRUM_MGMT = 0, RTW_WLAN_CATEGORY_QOS = 1, RTW_WLAN_CATEGORY_DLS = 2, RTW_WLAN_CATEGORY_BACK = 3, RTW_WLAN_CATEGORY_PUBLIC = 4, //IEEE 802.11 public action frames RTW_WLAN_CATEGORY_RADIO_MEASUREMENT = 5, RTW_WLAN_CATEGORY_FT = 6, RTW_WLAN_CATEGORY_HT = 7, RTW_WLAN_CATEGORY_SA_QUERY = 8, RTW_WLAN_CATEGORY_UNPROTECTED_WNM = 11, // add for CONFIG_IEEE80211W, none 11w also can use RTW_WLAN_CATEGORY_TDLS = 12, RTW_WLAN_CATEGORY_SELF_PROTECTED = 15, // add for CONFIG_IEEE80211W, none 11w also can use RTW_WLAN_CATEGORY_WMM = 17, RTW_WLAN_CATEGORY_VHT = 21, RTW_WLAN_CATEGORY_P2P = 0x7f,//P2P action frames }; /* SPECTRUM_MGMT action code */ enum rtw_ieee80211_spectrum_mgmt_actioncode { RTW_WLAN_ACTION_SPCT_MSR_REQ = 0, RTW_WLAN_ACTION_SPCT_MSR_RPRT = 1, RTW_WLAN_ACTION_SPCT_TPC_REQ = 2, RTW_WLAN_ACTION_SPCT_TPC_RPRT = 3, RTW_WLAN_ACTION_SPCT_CHL_SWITCH = 4, RTW_WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5, }; enum _PUBLIC_ACTION{ ACT_PUBLIC_BSSCOEXIST = 0, // 20/40 BSS Coexistence ACT_PUBLIC_DSE_ENABLE = 1, ACT_PUBLIC_DSE_DEENABLE = 2, ACT_PUBLIC_DSE_REG_LOCATION = 3, ACT_PUBLIC_EXT_CHL_SWITCH = 4, ACT_PUBLIC_DSE_MSR_REQ = 5, ACT_PUBLIC_DSE_MSR_RPRT = 6, ACT_PUBLIC_MP = 7, // Measurement Pilot ACT_PUBLIC_DSE_PWR_CONSTRAINT = 8, ACT_PUBLIC_VENDOR = 9, // for WIFI_DIRECT ACT_PUBLIC_GAS_INITIAL_REQ = 10, ACT_PUBLIC_GAS_INITIAL_RSP = 11, ACT_PUBLIC_GAS_COMEBACK_REQ = 12, ACT_PUBLIC_GAS_COMEBACK_RSP = 13, ACT_PUBLIC_TDLS_DISCOVERY_RSP = 14, ACT_PUBLIC_LOCATION_TRACK = 15, ACT_PUBLIC_MAX }; #ifdef CONFIG_TDLS enum TDLS_ACTION_FIELD{ TDLS_SETUP_REQUEST = 0, TDLS_SETUP_RESPONSE = 1, TDLS_SETUP_CONFIRM = 2, TDLS_TEARDOWN = 3, TDLS_PEER_TRAFFIC_INDICATION = 4, TDLS_CHANNEL_SWITCH_REQUEST = 5, TDLS_CHANNEL_SWITCH_RESPONSE = 6, TDLS_PEER_PSM_REQUEST = 7, TDLS_PEER_PSM_RESPONSE = 8, TDLS_PEER_TRAFFIC_RESPONSE = 9, TDLS_DISCOVERY_REQUEST = 10, TDLS_DISCOVERY_RESPONSE = 14, //it's used in public action frame }; #define TUNNELED_PROBE_REQ 15 #define TUNNELED_PROBE_RSP 16 #endif //CONFIG_TDLS /* BACK action code */ enum rtw_ieee80211_back_actioncode { RTW_WLAN_ACTION_ADDBA_REQ = 0, RTW_WLAN_ACTION_ADDBA_RESP = 1, RTW_WLAN_ACTION_DELBA = 2, }; /* HT features action code */ enum rtw_ieee80211_ht_actioncode { RTW_WLAN_ACTION_HT_NOTI_CHNL_WIDTH = 0, RTW_WLAN_ACTION_HT_SM_PS = 1, RTW_WLAN_ACTION_HT_PSMP = 2, RTW_WLAN_ACTION_HT_SET_PCO_PHASE = 3, RTW_WLAN_ACTION_HT_CSI = 4, RTW_WLAN_ACTION_HT_NON_COMPRESS_BEAMFORMING = 5, RTW_WLAN_ACTION_HT_COMPRESS_BEAMFORMING = 6, RTW_WLAN_ACTION_HT_ASEL_FEEDBACK = 7, }; /* BACK (block-ack) parties */ enum rtw_ieee80211_back_parties { RTW_WLAN_BACK_RECIPIENT = 0, RTW_WLAN_BACK_INITIATOR = 1, RTW_WLAN_BACK_TIMER = 2, }; /* VHT features action code */ enum rtw_ieee80211_vht_actioncode{ RTW_WLAN_ACTION_VHT_COMPRESSED_BEAMFORMING = 0, RTW_WLAN_ACTION_VHT_GROUPID_MANAGEMENT = 1, RTW_WLAN_ACTION_VHT_OPMODE_NOTIFICATION = 2, }; #define OUI_MICROSOFT 0x0050f2 /* Microsoft (also used in Wi-Fi specs) * 00:50:F2 */ #ifndef PLATFORM_FREEBSD //Baron BSD has defined #define WME_OUI_TYPE 2 #endif //PLATFORM_FREEBSD #define WME_OUI_SUBTYPE_INFORMATION_ELEMENT 0 #define WME_OUI_SUBTYPE_PARAMETER_ELEMENT 1 #define WME_OUI_SUBTYPE_TSPEC_ELEMENT 2 #define WME_VERSION 1 #define WME_ACTION_CODE_SETUP_REQUEST 0 #define WME_ACTION_CODE_SETUP_RESPONSE 1 #define WME_ACTION_CODE_TEARDOWN 2 #define WME_SETUP_RESPONSE_STATUS_ADMISSION_ACCEPTED 0 #define WME_SETUP_RESPONSE_STATUS_INVALID_PARAMETERS 1 #define WME_SETUP_RESPONSE_STATUS_REFUSED 3 #define WME_TSPEC_DIRECTION_UPLINK 0 #define WME_TSPEC_DIRECTION_DOWNLINK 1 #define WME_TSPEC_DIRECTION_BI_DIRECTIONAL 3 #define OUI_BROADCOM 0x00904c /* Broadcom (Epigram) */ #define VENDOR_HT_CAPAB_OUI_TYPE 0x33 /* 00-90-4c:0x33 */ /** * enum rtw_ieee80211_channel_flags - channel flags * * Channel flags set by the regulatory control code. * * @RTW_IEEE80211_CHAN_DISABLED: This channel is disabled. * @RTW_IEEE80211_CHAN_PASSIVE_SCAN: Only passive scanning is permitted * on this channel. * @RTW_IEEE80211_CHAN_NO_IBSS: IBSS is not allowed on this channel. * @RTW_IEEE80211_CHAN_RADAR: Radar detection is required on this channel. * @RTW_IEEE80211_CHAN_NO_HT40PLUS: extension channel above this channel * is not permitted. * @RTW_IEEE80211_CHAN_NO_HT40MINUS: extension channel below this channel * is not permitted. */ enum rtw_ieee80211_channel_flags { RTW_IEEE80211_CHAN_DISABLED = 1<<0, RTW_IEEE80211_CHAN_PASSIVE_SCAN = 1<<1, RTW_IEEE80211_CHAN_NO_IBSS = 1<<2, RTW_IEEE80211_CHAN_RADAR = 1<<3, RTW_IEEE80211_CHAN_NO_HT40PLUS = 1<<4, RTW_IEEE80211_CHAN_NO_HT40MINUS = 1<<5, }; #define RTW_IEEE80211_CHAN_NO_HT40 \ (RTW_IEEE80211_CHAN_NO_HT40PLUS | RTW_IEEE80211_CHAN_NO_HT40MINUS) /* Represent channel details, subset of ieee80211_channel */ struct rtw_ieee80211_channel { //enum ieee80211_band band; //u16 center_freq; u16 hw_value; u32 flags; //int max_antenna_gain; //int max_power; //int max_reg_power; //bool beacon_found; //u32 orig_flags; //int orig_mag; //int orig_mpwr; }; #define CHAN_FMT \ /*"band:%d, "*/ \ /*"center_freq:%u, "*/ \ "hw_value:%u, " \ "flags:0x%08x" \ /*"max_antenna_gain:%d\n"*/ \ /*"max_power:%d\n"*/ \ /*"max_reg_power:%d\n"*/ \ /*"beacon_found:%u\n"*/ \ /*"orig_flags:0x%08x\n"*/ \ /*"orig_mag:%d\n"*/ \ /*"orig_mpwr:%d\n"*/ #define CHAN_ARG(channel) \ /*(channel)->band*/ \ /*, (channel)->center_freq*/ \ (channel)->hw_value \ , (channel)->flags \ /*, (channel)->max_antenna_gain*/ \ /*, (channel)->max_power*/ \ /*, (channel)->max_reg_power*/ \ /*, (channel)->beacon_found*/ \ /*, (channel)->orig_flags*/ \ /*, (channel)->orig_mag*/ \ /*, (channel)->orig_mpwr*/ \ /* Parsed Information Elements */ struct rtw_ieee802_11_elems { u8 *ssid; u8 ssid_len; u8 *supp_rates; u8 supp_rates_len; u8 *fh_params; u8 fh_params_len; u8 *ds_params; u8 ds_params_len; u8 *cf_params; u8 cf_params_len; u8 *tim; u8 tim_len; u8 *ibss_params; u8 ibss_params_len; u8 *challenge; u8 challenge_len; u8 *erp_info; u8 erp_info_len; u8 *ext_supp_rates; u8 ext_supp_rates_len; u8 *wpa_ie; u8 wpa_ie_len; u8 *rsn_ie; u8 rsn_ie_len; u8 *wme; u8 wme_len; u8 *wme_tspec; u8 wme_tspec_len; u8 *wps_ie; u8 wps_ie_len; u8 *power_cap; u8 power_cap_len; u8 *supp_channels; u8 supp_channels_len; u8 *mdie; u8 mdie_len; u8 *ftie; u8 ftie_len; u8 *timeout_int; u8 timeout_int_len; u8 *ht_capabilities; u8 ht_capabilities_len; u8 *ht_operation; u8 ht_operation_len; u8 *vendor_ht_cap; u8 vendor_ht_cap_len; u8 *vht_capabilities; u8 vht_capabilities_len; u8 *vht_operation; u8 vht_operation_len; u8 *vht_op_mode_notify; u8 vht_op_mode_notify_len; }; typedef enum { ParseOK = 0, ParseUnknown = 1, ParseFailed = -1 } ParseRes; ParseRes rtw_ieee802_11_parse_elems(u8 *start, uint len, struct rtw_ieee802_11_elems *elems, int show_errors); u8 *rtw_set_fixed_ie(unsigned char *pbuf, unsigned int len, unsigned char *source, unsigned int *frlen); u8 *rtw_set_ie(u8 *pbuf, sint index, uint len, u8 *source, uint *frlen); enum secondary_ch_offset { SCN = 0, /* no secondary channel */ SCA = 1, /* secondary channel above */ SCB = 3, /* secondary channel below */ }; u8 secondary_ch_offset_to_hal_ch_offset(u8 ch_offset); u8 hal_ch_offset_to_secondary_ch_offset(u8 ch_offset); u8 *rtw_set_ie_ch_switch(u8 *buf, u32 *buf_len, u8 ch_switch_mode, u8 new_ch, u8 ch_switch_cnt); u8 *rtw_set_ie_secondary_ch_offset(u8 *buf, u32 *buf_len, u8 secondary_ch_offset); u8 *rtw_set_ie_mesh_ch_switch_parm(u8 *buf, u32 *buf_len, u8 ttl, u8 flags, u16 reason, u16 precedence); u8 *rtw_get_ie(u8*pbuf, sint index, sint *len, sint limit); u8 *rtw_get_ie_ex(u8 *in_ie, uint in_len, u8 eid, u8 *oui, u8 oui_len, u8 *ie, uint *ielen); int rtw_ies_remove_ie(u8 *ies, uint *ies_len, uint offset, u8 eid, u8 *oui, u8 oui_len); void rtw_set_supported_rate(u8* SupportedRates, uint mode) ; unsigned char *rtw_get_wpa_ie(unsigned char *pie, int *wpa_ie_len, int limit); unsigned char *rtw_get_wpa2_ie(unsigned char *pie, int *rsn_ie_len, int limit); int rtw_get_wpa_cipher_suite(u8 *s); int rtw_get_wpa2_cipher_suite(u8 *s); int rtw_get_wapi_ie(u8 *in_ie,uint in_len,u8 *wapi_ie,u16 *wapi_len); int rtw_parse_wpa_ie(u8* wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher, int *is_8021x); int rtw_parse_wpa2_ie(u8* wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher, int *is_8021x); int rtw_get_sec_ie(u8 *in_ie,uint in_len,u8 *rsn_ie,u16 *rsn_len,u8 *wpa_ie,u16 *wpa_len); u8 rtw_is_wps_ie(u8 *ie_ptr, uint *wps_ielen); u8 *rtw_get_wps_ie_from_scan_queue(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen, u8 frame_type); u8 *rtw_get_wps_ie(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen); u8 *rtw_get_wps_attr(u8 *wps_ie, uint wps_ielen, u16 target_attr_id ,u8 *buf_attr, u32 *len_attr); u8 *rtw_get_wps_attr_content(u8 *wps_ie, uint wps_ielen, u16 target_attr_id ,u8 *buf_content, uint *len_content); /** * for_each_ie - iterate over continuous IEs * @ie: * @buf: * @buf_len: */ #define for_each_ie(ie, buf, buf_len) \ for (ie = (void*)buf; (((u8*)ie) - ((u8*)buf) + 1) < buf_len; ie = (void*)(((u8*)ie) + *(((u8*)ie)+1) + 2)) void dump_ies(void *sel, u8 *buf, u32 buf_len); #ifdef CONFIG_80211N_HT void dump_ht_cap_ie_content(void *sel, u8 *buf, u32 buf_len); #endif void dump_wps_ie(void *sel, u8 *ie, u32 ie_len); #ifdef CONFIG_P2P u32 rtw_get_p2p_merged_ies_len(u8 *in_ie, u32 in_len); int rtw_p2p_merge_ies(u8 *in_ie, u32 in_len, u8 *merge_ie); void dump_p2p_ie(void *sel, u8 *ie, u32 ie_len); u8 *rtw_get_p2p_ie(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen); u8 *rtw_get_p2p_ie_from_scan_queue(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen, u8 frame_type); u8 *rtw_get_p2p_attr(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id ,u8 *buf_attr, u32 *len_attr); u8 *rtw_get_p2p_attr_content(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id ,u8 *buf_content, uint *len_content); u32 rtw_set_p2p_attr_content(u8 *pbuf, u8 attr_id, u16 attr_len, u8 *pdata_attr); void rtw_WLAN_BSSID_EX_remove_p2p_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id); #endif #ifdef CONFIG_WFD void dump_wfd_ie(void *sel, u8 *ie, u32 ie_len); int rtw_get_wfd_ie(u8 *in_ie, int in_len, u8 *wfd_ie, uint *wfd_ielen); int rtw_get_wfd_ie_from_scan_queue(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen, u8 frame_type); int rtw_get_wfd_attr_content(u8 *wfd_ie, uint wfd_ielen, u8 target_attr_id ,u8 *attr_content, uint *attr_contentlen); #endif // CONFIG_WFD uint rtw_get_rateset_len(u8 *rateset); struct registry_priv; int rtw_generate_ie(struct registry_priv *pregistrypriv); int rtw_get_bit_value_from_ieee_value(u8 val); uint rtw_is_cckrates_included(u8 *rate); uint rtw_is_cckratesonly_included(u8 *rate); int rtw_check_network_type(unsigned char *rate, int ratelen, int channel); void rtw_get_bcn_info(struct wlan_network *pnetwork); void rtw_macaddr_cfg(u8 *mac_addr); u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI, unsigned char * MCS_rate); int rtw_action_frame_parse(const u8 *frame, u32 frame_len, u8* category, u8 *action); const char *action_public_str(u8 action); #endif /* IEEE80211_H */ rtl8812au-4.3.8.12175.20140902+dfsg/include/ieee80211_ext.h000066400000000000000000000256231261122257400214660ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __IEEE80211_EXT_H #define __IEEE80211_EXT_H #include #include #include #define WMM_OUI_TYPE 2 #define WMM_OUI_SUBTYPE_INFORMATION_ELEMENT 0 #define WMM_OUI_SUBTYPE_PARAMETER_ELEMENT 1 #define WMM_OUI_SUBTYPE_TSPEC_ELEMENT 2 #define WMM_VERSION 1 #define WPA_PROTO_WPA BIT(0) #define WPA_PROTO_RSN BIT(1) #define WPA_KEY_MGMT_IEEE8021X BIT(0) #define WPA_KEY_MGMT_PSK BIT(1) #define WPA_KEY_MGMT_NONE BIT(2) #define WPA_KEY_MGMT_IEEE8021X_NO_WPA BIT(3) #define WPA_KEY_MGMT_WPA_NONE BIT(4) #define WPA_CAPABILITY_PREAUTH BIT(0) #define WPA_CAPABILITY_MGMT_FRAME_PROTECTION BIT(6) #define WPA_CAPABILITY_PEERKEY_ENABLED BIT(9) #define PMKID_LEN 16 #ifdef PLATFORM_LINUX struct wpa_ie_hdr { u8 elem_id; u8 len; u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ u8 version[2]; /* little endian */ }__attribute__ ((packed)); struct rsn_ie_hdr { u8 elem_id; /* WLAN_EID_RSN */ u8 len; u8 version[2]; /* little endian */ }__attribute__ ((packed)); struct wme_ac_parameter { #if defined(CONFIG_LITTLE_ENDIAN) /* byte 1 */ u8 aifsn:4, acm:1, aci:2, reserved:1; /* byte 2 */ u8 eCWmin:4, eCWmax:4; #elif defined(CONFIG_BIG_ENDIAN) /* byte 1 */ u8 reserved:1, aci:2, acm:1, aifsn:4; /* byte 2 */ u8 eCWmax:4, eCWmin:4; #else #error "Please fix " #endif /* bytes 3 & 4 */ u16 txopLimit; } __attribute__ ((packed)); struct wme_parameter_element { /* required fields for WME version 1 */ u8 oui[3]; u8 oui_type; u8 oui_subtype; u8 version; u8 acInfo; u8 reserved; struct wme_ac_parameter ac[4]; } __attribute__ ((packed)); #endif #ifdef PLATFORM_WINDOWS #pragma pack(1) struct wpa_ie_hdr { u8 elem_id; u8 len; u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ u8 version[2]; /* little endian */ }; struct rsn_ie_hdr { u8 elem_id; /* WLAN_EID_RSN */ u8 len; u8 version[2]; /* little endian */ }; #pragma pack() #endif #define WPA_PUT_LE16(a, val) \ do { \ (a)[1] = ((u16) (val)) >> 8; \ (a)[0] = ((u16) (val)) & 0xff; \ } while (0) #define WPA_PUT_BE32(a, val) \ do { \ (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \ (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \ (a)[3] = (u8) (((u32) (val)) & 0xff); \ } while (0) #define WPA_PUT_LE32(a, val) \ do { \ (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \ (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \ (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ (a)[0] = (u8) (((u32) (val)) & 0xff); \ } while (0) #define RSN_SELECTOR_PUT(a, val) WPA_PUT_BE32((u8 *) (a), (val)) //#define RSN_SELECTOR_PUT(a, val) WPA_PUT_LE32((u8 *) (a), (val)) /* Action category code */ enum ieee80211_category { WLAN_CATEGORY_SPECTRUM_MGMT = 0, WLAN_CATEGORY_QOS = 1, WLAN_CATEGORY_DLS = 2, WLAN_CATEGORY_BACK = 3, WLAN_CATEGORY_HT = 7, WLAN_CATEGORY_WMM = 17, }; /* SPECTRUM_MGMT action code */ enum ieee80211_spectrum_mgmt_actioncode { WLAN_ACTION_SPCT_MSR_REQ = 0, WLAN_ACTION_SPCT_MSR_RPRT = 1, WLAN_ACTION_SPCT_TPC_REQ = 2, WLAN_ACTION_SPCT_TPC_RPRT = 3, WLAN_ACTION_SPCT_CHL_SWITCH = 4, WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5, }; /* BACK action code */ enum ieee80211_back_actioncode { WLAN_ACTION_ADDBA_REQ = 0, WLAN_ACTION_ADDBA_RESP = 1, WLAN_ACTION_DELBA = 2, }; /* HT features action code */ enum ieee80211_ht_actioncode { WLAN_ACTION_NOTIFY_CH_WIDTH = 0, WLAN_ACTION_SM_PS = 1, WLAN_ACTION_PSPM = 2, WLAN_ACTION_PCO_PHASE = 3, WLAN_ACTION_MIMO_CSI_MX = 4, WLAN_ACTION_MIMO_NONCP_BF = 5, WLAN_ACTION_MIMP_CP_BF = 6, WLAN_ACTION_ASEL_INDICATES_FB = 7, WLAN_ACTION_HI_INFO_EXCHG = 8, }; /* BACK (block-ack) parties */ enum ieee80211_back_parties { WLAN_BACK_RECIPIENT = 0, WLAN_BACK_INITIATOR = 1, WLAN_BACK_TIMER = 2, }; #ifdef PLATFORM_LINUX struct ieee80211_mgmt { u16 frame_control; u16 duration; u8 da[6]; u8 sa[6]; u8 bssid[6]; u16 seq_ctrl; union { struct { u16 auth_alg; u16 auth_transaction; u16 status_code; /* possibly followed by Challenge text */ u8 variable[0]; } __attribute__ ((packed)) auth; struct { u16 reason_code; } __attribute__ ((packed)) deauth; struct { u16 capab_info; u16 listen_interval; /* followed by SSID and Supported rates */ u8 variable[0]; } __attribute__ ((packed)) assoc_req; struct { u16 capab_info; u16 status_code; u16 aid; /* followed by Supported rates */ u8 variable[0]; } __attribute__ ((packed)) assoc_resp, reassoc_resp; struct { u16 capab_info; u16 listen_interval; u8 current_ap[6]; /* followed by SSID and Supported rates */ u8 variable[0]; } __attribute__ ((packed)) reassoc_req; struct { u16 reason_code; } __attribute__ ((packed)) disassoc; struct { __le64 timestamp; u16 beacon_int; u16 capab_info; /* followed by some of SSID, Supported rates, * FH Params, DS Params, CF Params, IBSS Params, TIM */ u8 variable[0]; } __attribute__ ((packed)) beacon; struct { /* only variable items: SSID, Supported rates */ u8 variable[0]; } __attribute__ ((packed)) probe_req; struct { __le64 timestamp; u16 beacon_int; u16 capab_info; /* followed by some of SSID, Supported rates, * FH Params, DS Params, CF Params, IBSS Params */ u8 variable[0]; } __attribute__ ((packed)) probe_resp; struct { u8 category; union { struct { u8 action_code; u8 dialog_token; u8 status_code; u8 variable[0]; } __attribute__ ((packed)) wme_action; #if 0 struct{ u8 action_code; u8 element_id; u8 length; struct ieee80211_channel_sw_ie sw_elem; } __attribute__ ((packed)) chan_switch; struct{ u8 action_code; u8 dialog_token; u8 element_id; u8 length; struct ieee80211_msrment_ie msr_elem; } __attribute__ ((packed)) measurement; #endif struct{ u8 action_code; u8 dialog_token; u16 capab; u16 timeout; u16 start_seq_num; } __attribute__ ((packed)) addba_req; struct{ u8 action_code; u8 dialog_token; u16 status; u16 capab; u16 timeout; } __attribute__ ((packed)) addba_resp; struct{ u8 action_code; u16 params; u16 reason_code; } __attribute__ ((packed)) delba; struct{ u8 action_code; /* capab_info for open and confirm, * reason for close */ u16 aux; /* Followed in plink_confirm by status * code, AID and supported rates, * and directly by supported rates in * plink_open and plink_close */ u8 variable[0]; } __attribute__ ((packed)) plink_action; struct{ u8 action_code; u8 variable[0]; } __attribute__ ((packed)) mesh_action; } __attribute__ ((packed)) u; } __attribute__ ((packed)) action; } __attribute__ ((packed)) u; }__attribute__ ((packed)); #endif #ifdef PLATFORM_WINDOWS #pragma pack(1) struct ieee80211_mgmt { u16 frame_control; u16 duration; u8 da[6]; u8 sa[6]; u8 bssid[6]; u16 seq_ctrl; union { struct { u16 auth_alg; u16 auth_transaction; u16 status_code; /* possibly followed by Challenge text */ u8 variable[0]; } auth; struct { u16 reason_code; } deauth; struct { u16 capab_info; u16 listen_interval; /* followed by SSID and Supported rates */ u8 variable[0]; } assoc_req; struct { u16 capab_info; u16 status_code; u16 aid; /* followed by Supported rates */ u8 variable[0]; } assoc_resp, reassoc_resp; struct { u16 capab_info; u16 listen_interval; u8 current_ap[6]; /* followed by SSID and Supported rates */ u8 variable[0]; } reassoc_req; struct { u16 reason_code; } disassoc; #if 0 struct { __le64 timestamp; u16 beacon_int; u16 capab_info; /* followed by some of SSID, Supported rates, * FH Params, DS Params, CF Params, IBSS Params, TIM */ u8 variable[0]; } beacon; struct { /* only variable items: SSID, Supported rates */ u8 variable[0]; } probe_req; struct { __le64 timestamp; u16 beacon_int; u16 capab_info; /* followed by some of SSID, Supported rates, * FH Params, DS Params, CF Params, IBSS Params */ u8 variable[0]; } probe_resp; #endif struct { u8 category; union { struct { u8 action_code; u8 dialog_token; u8 status_code; u8 variable[0]; } wme_action; /* struct{ u8 action_code; u8 element_id; u8 length; struct ieee80211_channel_sw_ie sw_elem; } chan_switch; struct{ u8 action_code; u8 dialog_token; u8 element_id; u8 length; struct ieee80211_msrment_ie msr_elem; } measurement; */ struct{ u8 action_code; u8 dialog_token; u16 capab; u16 timeout; u16 start_seq_num; } addba_req; struct{ u8 action_code; u8 dialog_token; u16 status; u16 capab; u16 timeout; } addba_resp; struct{ u8 action_code; u16 params; u16 reason_code; } delba; struct{ u8 action_code; /* capab_info for open and confirm, * reason for close */ u16 aux; /* Followed in plink_confirm by status * code, AID and supported rates, * and directly by supported rates in * plink_open and plink_close */ u8 variable[0]; } plink_action; struct{ u8 action_code; u8 variable[0]; } mesh_action; } u; } action; } u; } ; #pragma pack() #endif /* mgmt header + 1 byte category code */ #define IEEE80211_MIN_ACTION_SIZE FIELD_OFFSET(struct ieee80211_mgmt, u.action.u) #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/if_ether.h000066400000000000000000000114151261122257400210620ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _LINUX_IF_ETHER_H #define _LINUX_IF_ETHER_H /* * IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble * and FCS/CRC (frame check sequence). */ #define ETH_ALEN 6 /* Octets in one ethernet addr */ #define ETH_HLEN 14 /* Total octets in header. */ #define ETH_ZLEN 60 /* Min. octets in frame sans FCS */ #define ETH_DATA_LEN 1500 /* Max. octets in payload */ #define ETH_FRAME_LEN 1514 /* Max. octets in frame sans FCS */ /* * These are the defined Ethernet Protocol ID's. */ #define ETH_P_LOOP 0x0060 /* Ethernet Loopback packet */ #define ETH_P_PUP 0x0200 /* Xerox PUP packet */ #define ETH_P_PUPAT 0x0201 /* Xerox PUP Addr Trans packet */ #define ETH_P_IP 0x0800 /* Internet Protocol packet */ #define ETH_P_X25 0x0805 /* CCITT X.25 */ #define ETH_P_ARP 0x0806 /* Address Resolution packet */ #define ETH_P_BPQ 0x08FF /* G8BPQ AX.25 Ethernet Packet [ NOT AN OFFICIALLY REGISTERED ID ] */ #define ETH_P_IEEEPUP 0x0a00 /* Xerox IEEE802.3 PUP packet */ #define ETH_P_IEEEPUPAT 0x0a01 /* Xerox IEEE802.3 PUP Addr Trans packet */ #define ETH_P_DEC 0x6000 /* DEC Assigned proto */ #define ETH_P_DNA_DL 0x6001 /* DEC DNA Dump/Load */ #define ETH_P_DNA_RC 0x6002 /* DEC DNA Remote Console */ #define ETH_P_DNA_RT 0x6003 /* DEC DNA Routing */ #define ETH_P_LAT 0x6004 /* DEC LAT */ #define ETH_P_DIAG 0x6005 /* DEC Diagnostics */ #define ETH_P_CUST 0x6006 /* DEC Customer use */ #define ETH_P_SCA 0x6007 /* DEC Systems Comms Arch */ #define ETH_P_RARP 0x8035 /* Reverse Addr Res packet */ #define ETH_P_ATALK 0x809B /* Appletalk DDP */ #define ETH_P_AARP 0x80F3 /* Appletalk AARP */ #define ETH_P_8021Q 0x8100 /* 802.1Q VLAN Extended Header */ #define ETH_P_IPX 0x8137 /* IPX over DIX */ #define ETH_P_IPV6 0x86DD /* IPv6 over bluebook */ #define ETH_P_PPP_DISC 0x8863 /* PPPoE discovery messages */ #define ETH_P_PPP_SES 0x8864 /* PPPoE session messages */ #define ETH_P_ATMMPOA 0x884c /* MultiProtocol Over ATM */ #define ETH_P_ATMFATE 0x8884 /* Frame-based ATM Transport * over Ethernet */ /* * Non DIX types. Won't clash for 1500 types. */ #define ETH_P_802_3 0x0001 /* Dummy type for 802.3 frames */ #define ETH_P_AX25 0x0002 /* Dummy protocol id for AX.25 */ #define ETH_P_ALL 0x0003 /* Every packet (be careful!!!) */ #define ETH_P_802_2 0x0004 /* 802.2 frames */ #define ETH_P_SNAP 0x0005 /* Internal only */ #define ETH_P_DDCMP 0x0006 /* DEC DDCMP: Internal only */ #define ETH_P_WAN_PPP 0x0007 /* Dummy type for WAN PPP frames*/ #define ETH_P_PPP_MP 0x0008 /* Dummy type for PPP MP frames */ #define ETH_P_LOCALTALK 0x0009 /* Localtalk pseudo type */ #define ETH_P_PPPTALK 0x0010 /* Dummy type for Atalk over PPP*/ #define ETH_P_TR_802_2 0x0011 /* 802.2 frames */ #define ETH_P_MOBITEX 0x0015 /* Mobitex (kaz@cafe.net) */ #define ETH_P_CONTROL 0x0016 /* Card specific control frames */ #define ETH_P_IRDA 0x0017 /* Linux-IrDA */ #define ETH_P_ECONET 0x0018 /* Acorn Econet */ /* * This is an Ethernet frame header. */ struct ethhdr { unsigned char h_dest[ETH_ALEN]; /* destination eth addr */ unsigned char h_source[ETH_ALEN]; /* source ether addr */ unsigned short h_proto; /* packet type ID field */ }; struct _vlan { unsigned short h_vlan_TCI; // Encapsulates priority and VLAN ID unsigned short h_vlan_encapsulated_proto; }; #define get_vlan_id(pvlan) ((ntohs((unsigned short )pvlan->h_vlan_TCI)) & 0xfff) #define get_vlan_priority(pvlan) ((ntohs((unsigned short )pvlan->h_vlan_TCI))>>13) #define get_vlan_encap_proto(pvlan) (ntohs((unsigned short )pvlan->h_vlan_encapsulated_proto)) #endif /* _LINUX_IF_ETHER_H */ rtl8812au-4.3.8.12175.20140902+dfsg/include/ip.h000066400000000000000000000104621261122257400177060ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _LINUX_IP_H #define _LINUX_IP_H /* SOL_IP socket options */ #define IPTOS_TOS_MASK 0x1E #define IPTOS_TOS(tos) ((tos)&IPTOS_TOS_MASK) #define IPTOS_LOWDELAY 0x10 #define IPTOS_THROUGHPUT 0x08 #define IPTOS_RELIABILITY 0x04 #define IPTOS_MINCOST 0x02 #define IPTOS_PREC_MASK 0xE0 #define IPTOS_PREC(tos) ((tos)&IPTOS_PREC_MASK) #define IPTOS_PREC_NETCONTROL 0xe0 #define IPTOS_PREC_INTERNETCONTROL 0xc0 #define IPTOS_PREC_CRITIC_ECP 0xa0 #define IPTOS_PREC_FLASHOVERRIDE 0x80 #define IPTOS_PREC_FLASH 0x60 #define IPTOS_PREC_IMMEDIATE 0x40 #define IPTOS_PREC_PRIORITY 0x20 #define IPTOS_PREC_ROUTINE 0x00 /* IP options */ #define IPOPT_COPY 0x80 #define IPOPT_CLASS_MASK 0x60 #define IPOPT_NUMBER_MASK 0x1f #define IPOPT_COPIED(o) ((o)&IPOPT_COPY) #define IPOPT_CLASS(o) ((o)&IPOPT_CLASS_MASK) #define IPOPT_NUMBER(o) ((o)&IPOPT_NUMBER_MASK) #define IPOPT_CONTROL 0x00 #define IPOPT_RESERVED1 0x20 #define IPOPT_MEASUREMENT 0x40 #define IPOPT_RESERVED2 0x60 #define IPOPT_END (0 |IPOPT_CONTROL) #define IPOPT_NOOP (1 |IPOPT_CONTROL) #define IPOPT_SEC (2 |IPOPT_CONTROL|IPOPT_COPY) #define IPOPT_LSRR (3 |IPOPT_CONTROL|IPOPT_COPY) #define IPOPT_TIMESTAMP (4 |IPOPT_MEASUREMENT) #define IPOPT_RR (7 |IPOPT_CONTROL) #define IPOPT_SID (8 |IPOPT_CONTROL|IPOPT_COPY) #define IPOPT_SSRR (9 |IPOPT_CONTROL|IPOPT_COPY) #define IPOPT_RA (20|IPOPT_CONTROL|IPOPT_COPY) #define IPVERSION 4 #define MAXTTL 255 #define IPDEFTTL 64 /* struct timestamp, struct route and MAX_ROUTES are removed. REASONS: it is clear that nobody used them because: - MAX_ROUTES value was wrong. - "struct route" was wrong. - "struct timestamp" had fatally misaligned bitfields and was completely unusable. */ #define IPOPT_OPTVAL 0 #define IPOPT_OLEN 1 #define IPOPT_OFFSET 2 #define IPOPT_MINOFF 4 #define MAX_IPOPTLEN 40 #define IPOPT_NOP IPOPT_NOOP #define IPOPT_EOL IPOPT_END #define IPOPT_TS IPOPT_TIMESTAMP #define IPOPT_TS_TSONLY 0 /* timestamps only */ #define IPOPT_TS_TSANDADDR 1 /* timestamps and addresses */ #define IPOPT_TS_PRESPEC 3 /* specified modules only */ #ifdef PLATFORM_LINUX struct ip_options { __u32 faddr; /* Saved first hop address */ unsigned char optlen; unsigned char srr; unsigned char rr; unsigned char ts; unsigned char is_setbyuser:1, /* Set by setsockopt? */ is_data:1, /* Options in __data, rather than skb */ is_strictroute:1, /* Strict source route */ srr_is_hit:1, /* Packet destination addr was our one */ is_changed:1, /* IP checksum more not valid */ rr_needaddr:1, /* Need to record addr of outgoing dev */ ts_needtime:1, /* Need to record timestamp */ ts_needaddr:1; /* Need to record addr of outgoing dev */ unsigned char router_alert; unsigned char __pad1; unsigned char __pad2; unsigned char __data[0]; }; #define optlength(opt) (sizeof(struct ip_options) + opt->optlen) #endif struct iphdr { #if defined(__LITTLE_ENDIAN_BITFIELD) __u8 ihl:4, version:4; #elif defined (__BIG_ENDIAN_BITFIELD) __u8 version:4, ihl:4; #else #error "Please fix " #endif __u8 tos; __u16 tot_len; __u16 id; __u16 frag_off; __u8 ttl; __u8 protocol; __u16 check; __u32 saddr; __u32 daddr; /*The options start here. */ }; #endif /* _LINUX_IP_H */ rtl8812au-4.3.8.12175.20140902+dfsg/include/linux/000077500000000000000000000000001261122257400202615ustar00rootroot00000000000000rtl8812au-4.3.8.12175.20140902+dfsg/include/linux/wireless.h000066400000000000000000000055251261122257400222760ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _LINUX_WIRELESS_H #define _LINUX_WIRELESS_H /***************************** INCLUDES *****************************/ #if 0 #include /* for __u* and __s* typedefs */ #include /* for "struct sockaddr" et al */ #include /* for IFNAMSIZ and co... */ #else #define __user //typedef uint16_t __u16; #include /* for "struct sockaddr" et al */ #include /* for IFNAMSIZ and co... */ #endif /****************************** TYPES ******************************/ /* --------------------------- SUBTYPES --------------------------- */ /* * For all data larger than 16 octets, we need to use a * pointer to memory allocated in user space. */ struct iw_point { void __user *pointer; /* Pointer to the data (in user space) */ __u16 length; /* number of fields or size in bytes */ __u16 flags; /* Optional params */ }; /* ------------------------ IOCTL REQUEST ------------------------ */ /* * This structure defines the payload of an ioctl, and is used * below. * * Note that this structure should fit on the memory footprint * of iwreq (which is the same as ifreq), which mean a max size of * 16 octets = 128 bits. Warning, pointers might be 64 bits wide... * You should check this when increasing the structures defined * above in this file... */ union iwreq_data { /* Config - generic */ char name[IFNAMSIZ]; /* Name : used to verify the presence of wireless extensions. * Name of the protocol/provider... */ struct iw_point data; /* Other large parameters */ }; /* * The structure to exchange data for ioctl. * This structure is the same as 'struct ifreq', but (re)defined for * convenience... * Do I need to remind you about structure size (32 octets) ? */ struct iwreq { union { char ifrn_name[IFNAMSIZ]; /* if name, e.g. "eth0" */ } ifr_ifrn; /* Data part (defined just above) */ union iwreq_data u; }; #endif /* _LINUX_WIRELESS_H */ rtl8812au-4.3.8.12175.20140902+dfsg/include/mlme_osdep.h000066400000000000000000000027061261122257400214240ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __MLME_OSDEP_H_ #define __MLME_OSDEP_H_ #if defined(PLATFORM_WINDOWS) || defined(PLATFORM_MPIXEL) extern int time_after(u32 now, u32 old); #endif extern void rtw_init_mlme_timer(_adapter *padapter); extern void rtw_os_indicate_disconnect( _adapter *adapter ); extern void rtw_os_indicate_connect( _adapter *adapter ); void rtw_os_indicate_scan_done( _adapter *padapter, bool aborted); extern void rtw_report_sec_ie(_adapter *adapter,u8 authmode,u8 *sec_ie); void rtw_reset_securitypriv( _adapter *adapter ); #endif //_MLME_OSDEP_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/mp_custom_oid.h000066400000000000000000000340751261122257400221450ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __CUSTOM_OID_H #define __CUSTOM_OID_H // by Owen // 0xFF818000 - 0xFF81802F RTL8180 Mass Production Kit // 0xFF818500 - 0xFF81850F RTL8185 Setup Utility // 0xFF818580 - 0xFF81858F RTL8185 Phy Status Utility // // by Owen for Production Kit // For Production Kit with Agilent Equipments // in order to make our custom oids hopefully somewhat unique // we will use 0xFF (indicating implementation specific OID) // 81(first byte of non zero Realtek unique identifier) // 80 (second byte of non zero Realtek unique identifier) // XX (the custom OID number - providing 255 possible custom oids) #define OID_RT_PRO_RESET_DUT 0xFF818000 #define OID_RT_PRO_SET_DATA_RATE 0xFF818001 #define OID_RT_PRO_START_TEST 0xFF818002 #define OID_RT_PRO_STOP_TEST 0xFF818003 #define OID_RT_PRO_SET_PREAMBLE 0xFF818004 #define OID_RT_PRO_SET_SCRAMBLER 0xFF818005 #define OID_RT_PRO_SET_FILTER_BB 0xFF818006 #define OID_RT_PRO_SET_MANUAL_DIVERSITY_BB 0xFF818007 #define OID_RT_PRO_SET_CHANNEL_DIRECT_CALL 0xFF818008 #define OID_RT_PRO_SET_SLEEP_MODE_DIRECT_CALL 0xFF818009 #define OID_RT_PRO_SET_WAKE_MODE_DIRECT_CALL 0xFF81800A #define OID_RT_PRO_SET_TX_ANTENNA_BB 0xFF81800D #define OID_RT_PRO_SET_ANTENNA_BB 0xFF81800E #define OID_RT_PRO_SET_CR_SCRAMBLER 0xFF81800F #define OID_RT_PRO_SET_CR_NEW_FILTER 0xFF818010 #define OID_RT_PRO_SET_TX_POWER_CONTROL 0xFF818011 #define OID_RT_PRO_SET_CR_TX_CONFIG 0xFF818012 #define OID_RT_PRO_GET_TX_POWER_CONTROL 0xFF818013 #define OID_RT_PRO_GET_CR_SIGNAL_QUALITY 0xFF818014 #define OID_RT_PRO_SET_CR_SETPOINT 0xFF818015 #define OID_RT_PRO_SET_INTEGRATOR 0xFF818016 #define OID_RT_PRO_SET_SIGNAL_QUALITY 0xFF818017 #define OID_RT_PRO_GET_INTEGRATOR 0xFF818018 #define OID_RT_PRO_GET_SIGNAL_QUALITY 0xFF818019 #define OID_RT_PRO_QUERY_EEPROM_TYPE 0xFF81801A #define OID_RT_PRO_WRITE_MAC_ADDRESS 0xFF81801B #define OID_RT_PRO_READ_MAC_ADDRESS 0xFF81801C #define OID_RT_PRO_WRITE_CIS_DATA 0xFF81801D #define OID_RT_PRO_READ_CIS_DATA 0xFF81801E #define OID_RT_PRO_WRITE_POWER_CONTROL 0xFF81801F #define OID_RT_PRO_READ_POWER_CONTROL 0xFF818020 #define OID_RT_PRO_WRITE_EEPROM 0xFF818021 #define OID_RT_PRO_READ_EEPROM 0xFF818022 #define OID_RT_PRO_RESET_TX_PACKET_SENT 0xFF818023 #define OID_RT_PRO_QUERY_TX_PACKET_SENT 0xFF818024 #define OID_RT_PRO_RESET_RX_PACKET_RECEIVED 0xFF818025 #define OID_RT_PRO_QUERY_RX_PACKET_RECEIVED 0xFF818026 #define OID_RT_PRO_QUERY_RX_PACKET_CRC32_ERROR 0xFF818027 #define OID_RT_PRO_QUERY_CURRENT_ADDRESS 0xFF818028 #define OID_RT_PRO_QUERY_PERMANENT_ADDRESS 0xFF818029 #define OID_RT_PRO_SET_PHILIPS_RF_PARAMETERS 0xFF81802A #define OID_RT_PRO_RECEIVE_PACKET 0xFF81802C // added by Owen on 04/08/03 for Cameo's request #define OID_RT_PRO_WRITE_EEPROM_BYTE 0xFF81802D #define OID_RT_PRO_READ_EEPROM_BYTE 0xFF81802E #define OID_RT_PRO_SET_MODULATION 0xFF81802F // //Sean #define OID_RT_DRIVER_OPTION 0xFF818080 #define OID_RT_RF_OFF 0xFF818081 #define OID_RT_AUTH_STATUS 0xFF818082 //======================================================================== #define OID_RT_PRO_SET_CONTINUOUS_TX 0xFF81800B #define OID_RT_PRO_SET_SINGLE_CARRIER_TX 0xFF81800C #define OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX 0xFF81802B #define OID_RT_PRO_SET_SINGLE_TONE_TX 0xFF818043 //======================================================================== // by Owen for RTL8185 Phy Status Report Utility #define OID_RT_UTILITY_FALSE_ALARM_COUNTERS 0xFF818580 #define OID_RT_UTILITY_SELECT_DEBUG_MODE 0xFF818581 #define OID_RT_UTILITY_SELECT_SUBCARRIER_NUMBER 0xFF818582 #define OID_RT_UTILITY_GET_RSSI_STATUS 0xFF818583 #define OID_RT_UTILITY_GET_FRAME_DETECTION_STATUS 0xFF818584 #define OID_RT_UTILITY_GET_AGC_AND_FREQUENCY_OFFSET_ESTIMATION_STATUS 0xFF818585 #define OID_RT_UTILITY_GET_CHANNEL_ESTIMATION_STATUS 0xFF818586 // // by Owen on 03/09/19-03/09/22 for RTL8185 #define OID_RT_WIRELESS_MODE 0xFF818500 #define OID_RT_SUPPORTED_RATES 0xFF818501 #define OID_RT_DESIRED_RATES 0xFF818502 #define OID_RT_WIRELESS_MODE_STARTING_ADHOC 0xFF818503 // #define OID_RT_GET_CONNECT_STATE 0xFF030001 #define OID_RT_RESCAN 0xFF030002 #define OID_RT_SET_KEY_LENGTH 0xFF030003 #define OID_RT_SET_DEFAULT_KEY_ID 0xFF030004 #define OID_RT_SET_CHANNEL 0xFF010182 #define OID_RT_SET_SNIFFER_MODE 0xFF010183 #define OID_RT_GET_SIGNAL_QUALITY 0xFF010184 #define OID_RT_GET_SMALL_PACKET_CRC 0xFF010185 #define OID_RT_GET_MIDDLE_PACKET_CRC 0xFF010186 #define OID_RT_GET_LARGE_PACKET_CRC 0xFF010187 #define OID_RT_GET_TX_RETRY 0xFF010188 #define OID_RT_GET_RX_RETRY 0xFF010189 #define OID_RT_PRO_SET_FW_DIG_STATE 0xFF01018A//S #define OID_RT_PRO_SET_FW_RA_STATE 0xFF01018B//S #define OID_RT_GET_RX_TOTAL_PACKET 0xFF010190 #define OID_RT_GET_TX_BEACON_OK 0xFF010191 #define OID_RT_GET_TX_BEACON_ERR 0xFF010192 #define OID_RT_GET_RX_ICV_ERR 0xFF010193 #define OID_RT_SET_ENCRYPTION_ALGORITHM 0xFF010194 #define OID_RT_SET_NO_AUTO_RESCAN 0xFF010195 #define OID_RT_GET_PREAMBLE_MODE 0xFF010196 #define OID_RT_GET_DRIVER_UP_DELTA_TIME 0xFF010197 #define OID_RT_GET_AP_IP 0xFF010198 #define OID_RT_GET_CHANNELPLAN 0xFF010199 #define OID_RT_SET_PREAMBLE_MODE 0xFF01019A #define OID_RT_SET_BCN_INTVL 0xFF01019B #define OID_RT_GET_RF_VENDER 0xFF01019C #define OID_RT_DEDICATE_PROBE 0xFF01019D #define OID_RT_PRO_RX_FILTER_PATTERN 0xFF01019E #define OID_RT_GET_DCST_CURRENT_THRESHOLD 0xFF01019F #define OID_RT_GET_CCA_ERR 0xFF0101A0 #define OID_RT_GET_CCA_UPGRADE_THRESHOLD 0xFF0101A1 #define OID_RT_GET_CCA_FALLBACK_THRESHOLD 0xFF0101A2 #define OID_RT_GET_CCA_UPGRADE_EVALUATE_TIMES 0xFF0101A3 #define OID_RT_GET_CCA_FALLBACK_EVALUATE_TIMES 0xFF0101A4 // by Owen on 03/31/03 for Cameo's request #define OID_RT_SET_RATE_ADAPTIVE 0xFF0101A5 // #define OID_RT_GET_DCST_EVALUATE_PERIOD 0xFF0101A5 #define OID_RT_GET_DCST_TIME_UNIT_INDEX 0xFF0101A6 #define OID_RT_GET_TOTAL_TX_BYTES 0xFF0101A7 #define OID_RT_GET_TOTAL_RX_BYTES 0xFF0101A8 #define OID_RT_CURRENT_TX_POWER_LEVEL 0xFF0101A9 #define OID_RT_GET_ENC_KEY_MISMATCH_COUNT 0xFF0101AA #define OID_RT_GET_ENC_KEY_MATCH_COUNT 0xFF0101AB #define OID_RT_GET_CHANNEL 0xFF0101AC #define OID_RT_SET_CHANNELPLAN 0xFF0101AD #define OID_RT_GET_HARDWARE_RADIO_OFF 0xFF0101AE #define OID_RT_CHANNELPLAN_BY_COUNTRY 0xFF0101AF #define OID_RT_SCAN_AVAILABLE_BSSID 0xFF0101B0 #define OID_RT_GET_HARDWARE_VERSION 0xFF0101B1 #define OID_RT_GET_IS_ROAMING 0xFF0101B2 #define OID_RT_GET_IS_PRIVACY 0xFF0101B3 #define OID_RT_GET_KEY_MISMATCH 0xFF0101B4 #define OID_RT_SET_RSSI_ROAM_TRAFFIC_TH 0xFF0101B5 #define OID_RT_SET_RSSI_ROAM_SIGNAL_TH 0xFF0101B6 #define OID_RT_RESET_LOG 0xFF0101B7 #define OID_RT_GET_LOG 0xFF0101B8 #define OID_RT_SET_INDICATE_HIDDEN_AP 0xFF0101B9 #define OID_RT_GET_HEADER_FAIL 0xFF0101BA #define OID_RT_SUPPORTED_WIRELESS_MODE 0xFF0101BB #define OID_RT_GET_CHANNEL_LIST 0xFF0101BC #define OID_RT_GET_SCAN_IN_PROGRESS 0xFF0101BD #define OID_RT_GET_TX_INFO 0xFF0101BE #define OID_RT_RF_READ_WRITE_OFFSET 0xFF0101BF #define OID_RT_RF_READ_WRITE 0xFF0101C0 // For Netgear request. 2005.01.13, by rcnjko. #define OID_RT_FORCED_DATA_RATE 0xFF0101C1 #define OID_RT_WIRELESS_MODE_FOR_SCAN_LIST 0xFF0101C2 // For Netgear request. 2005.02.17, by rcnjko. #define OID_RT_GET_BSS_WIRELESS_MODE 0xFF0101C3 // For AZ project. 2005.06.27, by rcnjko. #define OID_RT_SCAN_WITH_MAGIC_PACKET 0xFF0101C4 // Vincent 8185MP #define OID_RT_PRO_RX_FILTER 0xFF0111C0 //Andy TEST //#define OID_RT_PRO_WRITE_REGISTRY 0xFF0111C1 //#define OID_RT_PRO_READ_REGISTRY 0xFF0111C2 #define OID_CE_USB_WRITE_REGISTRY 0xFF0111C1 #define OID_CE_USB_READ_REGISTRY 0xFF0111C2 #define OID_RT_PRO_SET_INITIAL_GAIN 0xFF0111C3 #define OID_RT_PRO_SET_BB_RF_STANDBY_MODE 0xFF0111C4 #define OID_RT_PRO_SET_BB_RF_SHUTDOWN_MODE 0xFF0111C5 #define OID_RT_PRO_SET_TX_CHARGE_PUMP 0xFF0111C6 #define OID_RT_PRO_SET_RX_CHARGE_PUMP 0xFF0111C7 #define OID_RT_PRO_RF_WRITE_REGISTRY 0xFF0111C8 #define OID_RT_PRO_RF_READ_REGISTRY 0xFF0111C9 #define OID_RT_PRO_QUERY_RF_TYPE 0xFF0111CA // AP OID #define OID_RT_AP_GET_ASSOCIATED_STATION_LIST 0xFF010300 #define OID_RT_AP_GET_CURRENT_TIME_STAMP 0xFF010301 #define OID_RT_AP_SWITCH_INTO_AP_MODE 0xFF010302 #define OID_RT_AP_SET_DTIM_PERIOD 0xFF010303 #define OID_RT_AP_SUPPORTED 0xFF010304 // Determine if driver supports AP mode. 2004.08.27, by rcnjko. #define OID_RT_AP_SET_PASSPHRASE 0xFF010305 // Set WPA-PSK passphrase into authenticator. 2005.07.08, byrcnjko. // 8187MP. 2004.09.06, by rcnjko. #define OID_RT_PRO8187_WI_POLL 0xFF818780 #define OID_RT_PRO_WRITE_BB_REG 0xFF818781 #define OID_RT_PRO_READ_BB_REG 0xFF818782 #define OID_RT_PRO_WRITE_RF_REG 0xFF818783 #define OID_RT_PRO_READ_RF_REG 0xFF818784 // Meeting House. added by Annie, 2005-07-20. #define OID_RT_MH_VENDER_ID 0xFFEDC100 //8711 MP OID added 20051230. #define OID_RT_PRO8711_JOIN_BSS 0xFF871100//S #define OID_RT_PRO_READ_REGISTER 0xFF871101 //Q #define OID_RT_PRO_WRITE_REGISTER 0xFF871102 //S #define OID_RT_PRO_BURST_READ_REGISTER 0xFF871103 //Q #define OID_RT_PRO_BURST_WRITE_REGISTER 0xFF871104 //S #define OID_RT_PRO_WRITE_TXCMD 0xFF871105 //S #define OID_RT_PRO_READ16_EEPROM 0xFF871106 //Q #define OID_RT_PRO_WRITE16_EEPROM 0xFF871107 //S #define OID_RT_PRO_H2C_SET_COMMAND 0xFF871108 //S #define OID_RT_PRO_H2C_QUERY_RESULT 0xFF871109 //Q #define OID_RT_PRO8711_WI_POLL 0xFF87110A //Q #define OID_RT_PRO8711_PKT_LOSS 0xFF87110B //Q #define OID_RT_RD_ATTRIB_MEM 0xFF87110C//Q #define OID_RT_WR_ATTRIB_MEM 0xFF87110D//S //Method 2 for H2C/C2H #define OID_RT_PRO_H2C_CMD_MODE 0xFF871110 //S #define OID_RT_PRO_H2C_CMD_RSP_MODE 0xFF871111 //Q #define OID_RT_PRO_H2C_CMD_EVENT_MODE 0xFF871112 //S #define OID_RT_PRO_WAIT_C2H_EVENT 0xFF871113 //Q #define OID_RT_PRO_RW_ACCESS_PROTOCOL_TEST 0xFF871114//Q #define OID_RT_PRO_SCSI_ACCESS_TEST 0xFF871115 //Q, S #define OID_RT_PRO_SCSI_TCPIPOFFLOAD_OUT 0xFF871116 //S #define OID_RT_PRO_SCSI_TCPIPOFFLOAD_IN 0xFF871117 //Q,S #define OID_RT_RRO_RX_PKT_VIA_IOCTRL 0xFF871118 //Q #define OID_RT_RRO_RX_PKTARRAY_VIA_IOCTRL 0xFF871119 //Q #define OID_RT_RPO_SET_PWRMGT_TEST 0xFF87111A //S #define OID_RT_PRO_QRY_PWRMGT_TEST 0XFF87111B //Q #define OID_RT_RPO_ASYNC_RWIO_TEST 0xFF87111C //S #define OID_RT_RPO_ASYNC_RWIO_POLL 0xFF87111D //Q #define OID_RT_PRO_SET_RF_INTFS 0xFF87111E //S #define OID_RT_POLL_RX_STATUS 0xFF87111F //Q #define OID_RT_PRO_CFG_DEBUG_MESSAGE 0xFF871120 //Q,S #define OID_RT_PRO_SET_DATA_RATE_EX 0xFF871121//S #define OID_RT_PRO_SET_BASIC_RATE 0xFF871122//S #define OID_RT_PRO_READ_TSSI 0xFF871123//S #define OID_RT_PRO_SET_POWER_TRACKING 0xFF871124//S #define OID_RT_PRO_QRY_PWRSTATE 0xFF871150 //Q #define OID_RT_PRO_SET_PWRSTATE 0xFF871151 //S //Method 2 , using workitem #define OID_RT_SET_READ_REG 0xFF871181 //S #define OID_RT_SET_WRITE_REG 0xFF871182 //S #define OID_RT_SET_BURST_READ_REG 0xFF871183 //S #define OID_RT_SET_BURST_WRITE_REG 0xFF871184 //S #define OID_RT_SET_WRITE_TXCMD 0xFF871185 //S #define OID_RT_SET_READ16_EEPROM 0xFF871186 //S #define OID_RT_SET_WRITE16_EEPROM 0xFF871187 //S #define OID_RT_QRY_POLL_WKITEM 0xFF871188 //Q //For SDIO INTERFACE only #define OID_RT_PRO_SYNCPAGERW_SRAM 0xFF8711A0 //Q, S #define OID_RT_PRO_871X_DRV_EXT 0xFF8711A1 //For USB INTERFACE only #define OID_RT_PRO_USB_VENDOR_REQ 0xFF8711B0 //Q, S #define OID_RT_PRO_SCSI_AUTO_TEST 0xFF8711B1 //S #define OID_RT_PRO_USB_MAC_AC_FIFO_WRITE 0xFF8711B2 //S #define OID_RT_PRO_USB_MAC_RX_FIFO_READ 0xFF8711B3 //Q #define OID_RT_PRO_USB_MAC_RX_FIFO_POLLING 0xFF8711B4 //Q #define OID_RT_PRO_H2C_SET_RATE_TABLE 0xFF8711FB //S #define OID_RT_PRO_H2C_GET_RATE_TABLE 0xFF8711FC //S #define OID_RT_PRO_H2C_C2H_LBK_TEST 0xFF8711FE #define OID_RT_PRO_ENCRYPTION_CTRL 0xFF871200 //Q, S #define OID_RT_PRO_ADD_STA_INFO 0xFF871201 //S #define OID_RT_PRO_DELE_STA_INFO 0xFF871202 //S #define OID_RT_PRO_QUERY_DR_VARIABLE 0xFF871203 //Q #define OID_RT_PRO_RX_PACKET_TYPE 0xFF871204 //Q, S #define OID_RT_PRO_READ_EFUSE 0xFF871205 //Q #define OID_RT_PRO_WRITE_EFUSE 0xFF871206 //S #define OID_RT_PRO_RW_EFUSE_PGPKT 0xFF871207 //Q, S #define OID_RT_GET_EFUSE_CURRENT_SIZE 0xFF871208 //Q #define OID_RT_SET_BANDWIDTH 0xFF871209 //S #define OID_RT_SET_CRYSTAL_CAP 0xFF87120A //S #define OID_RT_SET_RX_PACKET_TYPE 0xFF87120B //S #define OID_RT_GET_EFUSE_MAX_SIZE 0xFF87120C //Q #define OID_RT_PRO_SET_TX_AGC_OFFSET 0xFF87120D //S #define OID_RT_PRO_SET_PKT_TEST_MODE 0xFF87120E //S #define OID_RT_PRO_FOR_EVM_TEST_SETTING 0xFF87120F //S #define OID_RT_PRO_GET_THERMAL_METER 0xFF871210 //Q #define OID_RT_RESET_PHY_RX_PACKET_COUNT 0xFF871211 //S #define OID_RT_GET_PHY_RX_PACKET_RECEIVED 0xFF871212 //Q #define OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR 0xFF871213 //Q #define OID_RT_SET_POWER_DOWN 0xFF871214 //S #define OID_RT_GET_POWER_MODE 0xFF871215 //Q #define OID_RT_PRO_EFUSE 0xFF871216 //Q, S #define OID_RT_PRO_EFUSE_MAP 0xFF871217 //Q, S #endif //#ifndef __CUSTOM_OID_H rtl8812au-4.3.8.12175.20140902+dfsg/include/nic_spec.h000066400000000000000000000027511261122257400210630ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __NIC_SPEC_H__ #define __NIC_SPEC_H__ #include #define RTL8711_MCTRL_ (0x20000) #define RTL8711_UART_ (0x30000) #define RTL8711_TIMER_ (0x40000) #define RTL8711_FINT_ (0x50000) #define RTL8711_HINT_ (0x50000) #define RTL8711_GPIO_ (0x60000) #define RTL8711_WLANCTRL_ (0x200000) #define RTL8711_WLANFF_ (0xe00000) #define RTL8711_HCICTRL_ (0x600000) #define RTL8711_SYSCFG_ (0x620000) #define RTL8711_SYSCTRL_ (0x620000) #define RTL8711_MCCTRL_ (0x020000) #include #include #endif // __RTL8711_SPEC_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/osdep_intf.h000066400000000000000000000107331261122257400214310ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __OSDEP_INTF_H_ #define __OSDEP_INTF_H_ struct intf_priv { u8 *intf_dev; u32 max_iosz; //USB2.0: 128, USB1.1: 64, SDIO:64 u32 max_xmitsz; //USB2.0: unlimited, SDIO:512 u32 max_recvsz; //USB2.0: unlimited, SDIO:512 volatile u8 *io_rwmem; volatile u8 *allocated_io_rwmem; u32 io_wsz; //unit: 4bytes u32 io_rsz;//unit: 4bytes u8 intf_status; void (*_bus_io)(u8 *priv); /* Under Sync. IRP (SDIO/USB) A protection mechanism is necessary for the io_rwmem(read/write protocol) Under Async. IRP (SDIO/USB) The protection mechanism is through the pending queue. */ _mutex ioctl_mutex; #ifdef PLATFORM_LINUX #ifdef CONFIG_USB_HCI // when in USB, IO is through interrupt in/out endpoints struct usb_device *udev; PURB piorw_urb; u8 io_irp_cnt; u8 bio_irp_pending; _sema io_retevt; _timer io_timer; u8 bio_irp_timeout; u8 bio_timer_cancel; #endif #endif #ifdef PLATFORM_OS_XP #ifdef CONFIG_SDIO_HCI // below is for io_rwmem... PMDL pmdl; PSDBUS_REQUEST_PACKET sdrp; PSDBUS_REQUEST_PACKET recv_sdrp; PSDBUS_REQUEST_PACKET xmit_sdrp; PIRP piorw_irp; #endif #ifdef CONFIG_USB_HCI PURB piorw_urb; PIRP piorw_irp; u8 io_irp_cnt; u8 bio_irp_pending; _sema io_retevt; #endif #endif }; #ifdef CONFIG_R871X_TEST int rtw_start_pseudo_adhoc(_adapter *padapter); int rtw_stop_pseudo_adhoc(_adapter *padapter); #endif struct dvobj_priv *devobj_init(void); void devobj_deinit(struct dvobj_priv *pdvobj); u8 rtw_init_drv_sw(_adapter *padapter); u8 rtw_free_drv_sw(_adapter *padapter); u8 rtw_reset_drv_sw(_adapter *padapter); void rtw_dev_unload(PADAPTER padapter); u32 rtw_start_drv_threads(_adapter *padapter); void rtw_stop_drv_threads (_adapter *padapter); #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) void rtw_cancel_dynamic_chk_timer(_adapter *padapter); #endif void rtw_cancel_all_timer(_adapter *padapter); #ifdef PLATFORM_LINUX int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname); struct net_device *rtw_init_netdev(_adapter *padapter); void rtw_unregister_netdevs(struct dvobj_priv *dvobj); #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) u16 rtw_recv_select_queue(struct sk_buff *skb); #endif //LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35) int rtw_ndev_notifier_register(void); void rtw_ndev_notifier_unregister(void); #include "../os_dep/linux/rtw_proc.h" #ifdef CONFIG_IOCTL_CFG80211 #include "../os_dep/linux/ioctl_cfg80211.h" #endif //CONFIG_IOCTL_CFG80211 #endif //PLATFORM_LINUX #ifdef PLATFORM_FREEBSD extern int rtw_ioctl(struct ifnet * ifp, u_long cmd, caddr_t data); #endif void rtw_ips_dev_unload(_adapter *padapter); #ifdef CONFIG_IPS int rtw_ips_pwr_up(_adapter *padapter); void rtw_ips_pwr_down(_adapter *padapter); #endif #ifdef CONFIG_CONCURRENT_MODE struct _io_ops; _adapter *rtw_drv_if2_init(_adapter *primary_padapter, void (*set_intf_ops)(_adapter *primary_padapter,struct _io_ops *pops)); void rtw_drv_if2_free(_adapter *if2); void rtw_drv_if2_stop(_adapter *if2); #ifdef CONFIG_MULTI_VIR_IFACES struct dvobj_priv; _adapter *rtw_drv_add_vir_if(_adapter *primary_padapter, void (*set_intf_ops)(_adapter *primary_padapter,struct _io_ops *pops)); void rtw_drv_stop_vir_ifaces(struct dvobj_priv *dvobj); void rtw_drv_free_vir_ifaces(struct dvobj_priv *dvobj); #endif //CONFIG_MULTI_VIR_IFACES #endif int rtw_drv_register_netdev(_adapter *padapter); void rtw_ndev_destructor(_nic_hdl ndev); #ifdef CONFIG_ARP_KEEP_ALIVE int rtw_gw_addr_query(_adapter *padapter); #endif int rtw_suspend_common(_adapter *padapter); int rtw_resume_common(_adapter *padapter); #endif //_OSDEP_INTF_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/osdep_service.h000066400000000000000000000512411261122257400221300ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __OSDEP_SERVICE_H_ #define __OSDEP_SERVICE_H_ #define _FAIL 0 #define _SUCCESS 1 #define RTW_RX_HANDLED 2 //#define RTW_STATUS_TIMEDOUT -110 #undef _TRUE #define _TRUE 1 #undef _FALSE #define _FALSE 0 #ifdef PLATFORM_FREEBSD #include #endif #ifdef PLATFORM_LINUX #include #endif #ifdef PLATFORM_OS_XP #include #endif #ifdef PLATFORM_OS_CE #include #endif #define RTW_TIMER_HDL_NAME(name) rtw_##name##_timer_hdl #define RTW_DECLARE_TIMER_HDL(name) void RTW_TIMER_HDL_NAME(name)(RTW_TIMER_HDL_ARGS) //#include #ifndef BIT #define BIT(x) ( 1 << (x)) #endif #define BIT0 0x00000001 #define BIT1 0x00000002 #define BIT2 0x00000004 #define BIT3 0x00000008 #define BIT4 0x00000010 #define BIT5 0x00000020 #define BIT6 0x00000040 #define BIT7 0x00000080 #define BIT8 0x00000100 #define BIT9 0x00000200 #define BIT10 0x00000400 #define BIT11 0x00000800 #define BIT12 0x00001000 #define BIT13 0x00002000 #define BIT14 0x00004000 #define BIT15 0x00008000 #define BIT16 0x00010000 #define BIT17 0x00020000 #define BIT18 0x00040000 #define BIT19 0x00080000 #define BIT20 0x00100000 #define BIT21 0x00200000 #define BIT22 0x00400000 #define BIT23 0x00800000 #define BIT24 0x01000000 #define BIT25 0x02000000 #define BIT26 0x04000000 #define BIT27 0x08000000 #define BIT28 0x10000000 #define BIT29 0x20000000 #define BIT30 0x40000000 #define BIT31 0x80000000 #define BIT32 0x0100000000 #define BIT33 0x0200000000 #define BIT34 0x0400000000 #define BIT35 0x0800000000 #define BIT36 0x1000000000 extern int RTW_STATUS_CODE(int error_code); #ifndef RTK_DMP_PLATFORM #define CONFIG_USE_VMALLOC #endif /* flags used for rtw_mstat_update() */ enum mstat_f { /* type: 0x00ff */ MSTAT_TYPE_VIR = 0x00, MSTAT_TYPE_PHY= 0x01, MSTAT_TYPE_SKB = 0x02, MSTAT_TYPE_USB = 0x03, MSTAT_TYPE_MAX = 0x04, /* func: 0xff00 */ MSTAT_FUNC_UNSPECIFIED = 0x00<<8, MSTAT_FUNC_IO = 0x01<<8, MSTAT_FUNC_TX_IO = 0x02<<8, MSTAT_FUNC_RX_IO = 0x03<<8, MSTAT_FUNC_TX = 0x04<<8, MSTAT_FUNC_RX = 0x05<<8, MSTAT_FUNC_CFG_VENDOR = 0x06<<8, MSTAT_FUNC_MAX = 0x07<<8, }; #define mstat_tf_idx(flags) ((flags)&0xff) #define mstat_ff_idx(flags) (((flags)&0xff00) >> 8) typedef enum mstat_status{ MSTAT_ALLOC_SUCCESS = 0, MSTAT_ALLOC_FAIL, MSTAT_FREE } MSTAT_STATUS; #ifdef DBG_MEM_ALLOC void rtw_mstat_update(const enum mstat_f flags, const MSTAT_STATUS status, u32 sz); void rtw_mstat_dump (void *sel); u8* dbg_rtw_vmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line); u8* dbg_rtw_zvmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line); void dbg_rtw_vmfree(u8 *pbuf, const enum mstat_f flags, u32 sz, const char *func, const int line); u8* dbg_rtw_malloc(u32 sz, const enum mstat_f flags, const char *func, const int line); u8* dbg_rtw_zmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line); void dbg_rtw_mfree(u8 *pbuf, const enum mstat_f flags, u32 sz, const char *func, const int line); struct sk_buff * dbg_rtw_skb_alloc(unsigned int size, const enum mstat_f flags, const char *func, const int line); void dbg_rtw_skb_free(struct sk_buff *skb, const enum mstat_f flags, const char *func, const int line); struct sk_buff *dbg_rtw_skb_copy(const struct sk_buff *skb, const enum mstat_f flags, const char *func, const int line); struct sk_buff *dbg_rtw_skb_clone(struct sk_buff *skb, const enum mstat_f flags, const char *func, const int line); int dbg_rtw_netif_rx(_nic_hdl ndev, struct sk_buff *skb, const enum mstat_f flags, const char *func, int line); void dbg_rtw_skb_queue_purge(struct sk_buff_head *list, enum mstat_f flags, const char *func, int line); #ifdef CONFIG_USB_HCI void *dbg_rtw_usb_buffer_alloc(struct usb_device *dev, size_t size, dma_addr_t *dma, const enum mstat_f flags, const char *func, const int line); void dbg_rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma, const enum mstat_f flags, const char *func, const int line); #endif /* CONFIG_USB_HCI */ #ifdef CONFIG_USE_VMALLOC #define rtw_vmalloc(sz) dbg_rtw_vmalloc((sz), MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) #define rtw_zvmalloc(sz) dbg_rtw_zvmalloc((sz), MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) #define rtw_vmfree(pbuf, sz) dbg_rtw_vmfree((pbuf), (sz), MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) #define rtw_vmalloc_f(sz, mstat_f) dbg_rtw_vmalloc((sz), ((mstat_f)&0xff00)|MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) #define rtw_zvmalloc_f(sz, mstat_f) dbg_rtw_zvmalloc((sz), ((mstat_f)&0xff00)|MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) #define rtw_vmfree_f(pbuf, sz, mstat_f) dbg_rtw_vmfree((pbuf), (sz), ((mstat_f)&0xff00)|MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) #else /* CONFIG_USE_VMALLOC */ #define rtw_vmalloc(sz) dbg_rtw_malloc((sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_zvmalloc(sz) dbg_rtw_zmalloc((sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_vmfree(pbuf, sz) dbg_rtw_mfree((pbuf), (sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_vmalloc_f(sz, mstat_f) dbg_rtw_malloc((sz), ((mstat_f)&0xff00)|MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_zvmalloc_f(sz, mstat_f) dbg_rtw_zmalloc((sz), ((mstat_f)&0xff00)|MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_vmfree_f(pbuf, sz, mstat_f) dbg_rtw_mfree((pbuf), (sz), ((mstat_f)&0xff00)|MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #endif /* CONFIG_USE_VMALLOC */ #define rtw_malloc(sz) dbg_rtw_malloc((sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_zmalloc(sz) dbg_rtw_zmalloc((sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_mfree(pbuf, sz) dbg_rtw_mfree((pbuf), (sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_malloc_f(sz, mstat_f) dbg_rtw_malloc((sz), ((mstat_f)&0xff00)|MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_zmalloc_f(sz, mstat_f) dbg_rtw_zmalloc((sz), ((mstat_f)&0xff00)|MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_mfree_f(pbuf, sz, mstat_f) dbg_rtw_mfree((pbuf), (sz), ((mstat_f)&0xff00)|MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) #define rtw_skb_alloc(size) dbg_rtw_skb_alloc((size), MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) #define rtw_skb_free(skb) dbg_rtw_skb_free((skb), MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) #define rtw_skb_alloc_f(size, mstat_f) dbg_rtw_skb_alloc((size), ((mstat_f)&0xff00)|MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) #define rtw_skb_free_f(skb, mstat_f) dbg_rtw_skb_free((skb), ((mstat_f)&0xff00)|MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) #define rtw_skb_copy(skb) dbg_rtw_skb_copy((skb), MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) #define rtw_skb_clone(skb) dbg_rtw_skb_clone((skb), MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) #define rtw_skb_copy_f(skb, mstat_f) dbg_rtw_skb_copy((skb), ((mstat_f)&0xff00)|MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) #define rtw_skb_clone_f(skb, mstat_f) dbg_rtw_skb_clone((skb), ((mstat_f)&0xff00)|MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) #define rtw_netif_rx(ndev, skb) dbg_rtw_netif_rx(ndev, skb, MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) #define rtw_skb_queue_purge(sk_buff_head) dbg_rtw_skb_queue_purge(sk_buff_head, MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) #ifdef CONFIG_USB_HCI #define rtw_usb_buffer_alloc(dev, size, dma) dbg_rtw_usb_buffer_alloc((dev), (size), (dma), MSTAT_TYPE_USB, __FUNCTION__, __LINE__) #define rtw_usb_buffer_free(dev, size, addr, dma) dbg_rtw_usb_buffer_free((dev), (size), (addr), (dma), MSTAT_TYPE_USB, __FUNCTION__, __LINE__) #define rtw_usb_buffer_alloc_f(dev, size, dma, mstat_f) dbg_rtw_usb_buffer_alloc((dev), (size), (dma), ((mstat_f)&0xff00)|MSTAT_TYPE_USB, __FUNCTION__, __LINE__) #define rtw_usb_buffer_free_f(dev, size, addr, dma, mstat_f) dbg_rtw_usb_buffer_free((dev), (size), (addr), (dma), ((mstat_f)&0xff00)|MSTAT_TYPE_USB, __FUNCTION__, __LINE__) #endif /* CONFIG_USB_HCI */ #else /* DBG_MEM_ALLOC */ #define rtw_mstat_update(flag, status, sz) do {} while(0) #define rtw_mstat_dump(sel) do {} while(0) u8* _rtw_vmalloc(u32 sz); u8* _rtw_zvmalloc(u32 sz); void _rtw_vmfree(u8 *pbuf, u32 sz); u8* _rtw_zmalloc(u32 sz); u8* _rtw_malloc(u32 sz); void _rtw_mfree(u8 *pbuf, u32 sz); struct sk_buff *_rtw_skb_alloc(u32 sz); void _rtw_skb_free(struct sk_buff *skb); struct sk_buff *_rtw_skb_copy(const struct sk_buff *skb); struct sk_buff *_rtw_skb_clone(struct sk_buff *skb); int _rtw_netif_rx(_nic_hdl ndev, struct sk_buff *skb); void _rtw_skb_queue_purge(struct sk_buff_head *list); #ifdef CONFIG_USB_HCI void *_rtw_usb_buffer_alloc(struct usb_device *dev, size_t size, dma_addr_t *dma); void _rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma); #endif /* CONFIG_USB_HCI */ #ifdef CONFIG_USE_VMALLOC #define rtw_vmalloc(sz) _rtw_vmalloc((sz)) #define rtw_zvmalloc(sz) _rtw_zvmalloc((sz)) #define rtw_vmfree(pbuf, sz) _rtw_vmfree((pbuf), (sz)) #define rtw_vmalloc_f(sz, mstat_f) _rtw_vmalloc((sz)) #define rtw_zvmalloc_f(sz, mstat_f) _rtw_zvmalloc((sz)) #define rtw_vmfree_f(pbuf, sz, mstat_f) _rtw_vmfree((pbuf), (sz)) #else /* CONFIG_USE_VMALLOC */ #define rtw_vmalloc(sz) _rtw_malloc((sz)) #define rtw_zvmalloc(sz) _rtw_zmalloc((sz)) #define rtw_vmfree(pbuf, sz) _rtw_mfree((pbuf), (sz)) #define rtw_vmalloc_f(sz, mstat_f) _rtw_malloc((sz)) #define rtw_zvmalloc_f(sz, mstat_f) _rtw_zmalloc((sz)) #define rtw_vmfree_f(pbuf, sz, mstat_f) _rtw_mfree((pbuf), (sz)) #endif /* CONFIG_USE_VMALLOC */ #define rtw_malloc(sz) _rtw_malloc((sz)) #define rtw_zmalloc(sz) _rtw_zmalloc((sz)) #define rtw_mfree(pbuf, sz) _rtw_mfree((pbuf), (sz)) #define rtw_malloc_f(sz, mstat_f) _rtw_malloc((sz)) #define rtw_zmalloc_f(sz, mstat_f) _rtw_zmalloc((sz)) #define rtw_mfree_f(pbuf, sz, mstat_f) _rtw_mfree((pbuf), (sz)) #define rtw_skb_alloc(size) _rtw_skb_alloc((size)) #define rtw_skb_free(skb) _rtw_skb_free((skb)) #define rtw_skb_alloc_f(size, mstat_f) _rtw_skb_alloc((size)) #define rtw_skb_free_f(skb, mstat_f) _rtw_skb_free((skb)) #define rtw_skb_copy(skb) _rtw_skb_copy((skb)) #define rtw_skb_clone(skb) _rtw_skb_clone((skb)) #define rtw_skb_copy_f(skb, mstat_f) _rtw_skb_copy((skb)) #define rtw_skb_clone_f(skb, mstat_f) _rtw_skb_clone((skb)) #define rtw_netif_rx(ndev, skb) _rtw_netif_rx(ndev, skb) #define rtw_skb_queue_purge(sk_buff_head) _rtw_skb_queue_purge(sk_buff_head) #ifdef CONFIG_USB_HCI #define rtw_usb_buffer_alloc(dev, size, dma) _rtw_usb_buffer_alloc((dev), (size), (dma)) #define rtw_usb_buffer_free(dev, size, addr, dma) _rtw_usb_buffer_free((dev), (size), (addr), (dma)) #define rtw_usb_buffer_alloc_f(dev, size, dma, mstat_f) _rtw_usb_buffer_alloc((dev), (size), (dma)) #define rtw_usb_buffer_free_f(dev, size, addr, dma, mstat_f) _rtw_usb_buffer_free((dev), (size), (addr), (dma)) #endif /* CONFIG_USB_HCI */ #endif /* DBG_MEM_ALLOC */ extern void* rtw_malloc2d(int h, int w, size_t size); extern void rtw_mfree2d(void *pbuf, int h, int w, int size); extern void _rtw_memcpy(void* dec, void* sour, u32 sz); extern int _rtw_memcmp(void *dst, void *src, u32 sz); extern void _rtw_memset(void *pbuf, int c, u32 sz); extern void _rtw_init_listhead(_list *list); extern u32 rtw_is_list_empty(_list *phead); extern void rtw_list_insert_head(_list *plist, _list *phead); extern void rtw_list_insert_tail(_list *plist, _list *phead); #ifndef PLATFORM_FREEBSD extern void rtw_list_delete(_list *plist); #endif //PLATFORM_FREEBSD extern void _rtw_init_sema(_sema *sema, int init_val); extern void _rtw_free_sema(_sema *sema); extern void _rtw_up_sema(_sema *sema); extern u32 _rtw_down_sema(_sema *sema); extern void _rtw_mutex_init(_mutex *pmutex); extern void _rtw_mutex_free(_mutex *pmutex); #ifndef PLATFORM_FREEBSD extern void _rtw_spinlock_init(_lock *plock); #endif //PLATFORM_FREEBSD extern void _rtw_spinlock_free(_lock *plock); extern void _rtw_spinlock(_lock *plock); extern void _rtw_spinunlock(_lock *plock); extern void _rtw_spinlock_ex(_lock *plock); extern void _rtw_spinunlock_ex(_lock *plock); extern void _rtw_init_queue(_queue *pqueue); extern u32 _rtw_queue_empty(_queue *pqueue); extern u32 rtw_end_of_queue_search(_list *queue, _list *pelement); extern u32 rtw_get_current_time(void); extern u32 rtw_systime_to_ms(u32 systime); extern u32 rtw_ms_to_systime(u32 ms); extern s32 rtw_get_passing_time_ms(u32 start); extern s32 rtw_get_time_interval_ms(u32 start, u32 end); extern void rtw_sleep_schedulable(int ms); extern void rtw_msleep_os(int ms); extern void rtw_usleep_os(int us); extern u32 rtw_atoi(u8* s); #ifdef DBG_DELAY_OS #define rtw_mdelay_os(ms) _rtw_mdelay_os((ms), __FUNCTION__, __LINE__) #define rtw_udelay_os(ms) _rtw_udelay_os((ms), __FUNCTION__, __LINE__) extern void _rtw_mdelay_os(int ms, const char *func, const int line); extern void _rtw_udelay_os(int us, const char *func, const int line); #else extern void rtw_mdelay_os(int ms); extern void rtw_udelay_os(int us); #endif extern void rtw_yield_os(void); extern void rtw_init_timer(_timer *ptimer, void *padapter, void *pfunc); __inline static unsigned char _cancel_timer_ex(_timer *ptimer) { #ifdef PLATFORM_LINUX return del_timer_sync(ptimer); #endif #ifdef PLATFORM_FREEBSD _cancel_timer(ptimer,0); return 0; #endif #ifdef PLATFORM_WINDOWS u8 bcancelled; _cancel_timer(ptimer, &bcancelled); return bcancelled; #endif } static __inline void thread_enter(char *name) { #ifdef PLATFORM_LINUX #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0)) daemonize("%s", name); #endif allow_signal(SIGTERM); #endif #ifdef PLATFORM_FREEBSD printf("%s", "RTKTHREAD_enter"); #endif } __inline static void flush_signals_thread(void) { #ifdef PLATFORM_LINUX if (signal_pending (current)) { flush_signals(current); } #endif } __inline static _OS_STATUS res_to_status(sint res) { #if defined (PLATFORM_LINUX) || defined (PLATFORM_MPIXEL) || defined (PLATFORM_FREEBSD) return res; #endif #ifdef PLATFORM_WINDOWS if (res == _SUCCESS) return NDIS_STATUS_SUCCESS; else return NDIS_STATUS_FAILURE; #endif } __inline static void rtw_dump_stack(void) { #ifdef PLATFORM_LINUX dump_stack(); #endif } #ifdef PLATFORM_LINUX #define rtw_warn_on(condition) WARN_ON(condition) #else #define rtw_warn_on(condition) do {} while (0) #endif __inline static int rtw_bug_check(void *parg1, void *parg2, void *parg3, void *parg4) { int ret = _TRUE; #ifdef PLATFORM_WINDOWS if ( ((uint)parg1) <= 0x7fffffff || ((uint)parg2) <= 0x7fffffff || ((uint)parg3) <= 0x7fffffff || ((uint)parg4) <= 0x7fffffff) { ret = _FALSE; KeBugCheckEx(0x87110000, (ULONG_PTR)parg1, (ULONG_PTR)parg2, (ULONG_PTR)parg3, (ULONG_PTR)parg4); } #endif return ret; } #define _RND(sz, r) ((((sz)+((r)-1))/(r))*(r)) #define RND4(x) (((x >> 2) + (((x & 3) == 0) ? 0: 1)) << 2) __inline static u32 _RND4(u32 sz) { u32 val; val = ((sz >> 2) + ((sz & 3) ? 1: 0)) << 2; return val; } __inline static u32 _RND8(u32 sz) { u32 val; val = ((sz >> 3) + ((sz & 7) ? 1: 0)) << 3; return val; } __inline static u32 _RND128(u32 sz) { u32 val; val = ((sz >> 7) + ((sz & 127) ? 1: 0)) << 7; return val; } __inline static u32 _RND256(u32 sz) { u32 val; val = ((sz >> 8) + ((sz & 255) ? 1: 0)) << 8; return val; } __inline static u32 _RND512(u32 sz) { u32 val; val = ((sz >> 9) + ((sz & 511) ? 1: 0)) << 9; return val; } __inline static u32 bitshift(u32 bitmask) { u32 i; for (i = 0; i <= 31; i++) if (((bitmask>>i) & 0x1) == 1) break; return i; } #define rtw_min(a, b) ((a>b)?b:a) #ifndef MAC_FMT #define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" #endif #ifndef MAC_ARG #define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5] #endif extern void rtw_suspend_lock_init(void); extern void rtw_suspend_lock_uninit(void); extern void rtw_lock_suspend(void); extern void rtw_unlock_suspend(void); extern void rtw_lock_suspend_timeout(u32 timeout_ms); extern void rtw_lock_ext_suspend_timeout(u32 timeout_ms); extern void rtw_lock_rx_suspend_timeout(u32 timeout_ms); extern void rtw_lock_traffic_suspend_timeout(u32 timeout_ms); extern void rtw_lock_resume_scan_timeout(u32 timeout_ms); extern void rtw_resume_lock_suspend(void); extern void rtw_resume_unlock_suspend(void); #ifdef CONFIG_AP_WOWLAN extern void rtw_softap_lock_suspend(void); extern void rtw_softap_unlock_suspend(void); #endif extern void ATOMIC_SET(ATOMIC_T *v, int i); extern int ATOMIC_READ(ATOMIC_T *v); extern void ATOMIC_ADD(ATOMIC_T *v, int i); extern void ATOMIC_SUB(ATOMIC_T *v, int i); extern void ATOMIC_INC(ATOMIC_T *v); extern void ATOMIC_DEC(ATOMIC_T *v); extern int ATOMIC_ADD_RETURN(ATOMIC_T *v, int i); extern int ATOMIC_SUB_RETURN(ATOMIC_T *v, int i); extern int ATOMIC_INC_RETURN(ATOMIC_T *v); extern int ATOMIC_DEC_RETURN(ATOMIC_T *v); //File operation APIs, just for linux now extern int rtw_is_file_readable(char *path); extern int rtw_retrive_from_file(char *path, u8* buf, u32 sz); extern int rtw_store_to_file(char *path, u8* buf, u32 sz); #ifndef PLATFORM_FREEBSD extern void rtw_free_netdev(struct net_device * netdev); #endif //PLATFORM_FREEBSD extern u64 rtw_modular64(u64 x, u64 y); extern u64 rtw_division64(u64 x, u64 y); extern u32 rtw_random32(void); /* Macros for handling unaligned memory accesses */ #define RTW_GET_BE16(a) ((u16) (((a)[0] << 8) | (a)[1])) #define RTW_PUT_BE16(a, val) \ do { \ (a)[0] = ((u16) (val)) >> 8; \ (a)[1] = ((u16) (val)) & 0xff; \ } while (0) #define RTW_GET_LE16(a) ((u16) (((a)[1] << 8) | (a)[0])) #define RTW_PUT_LE16(a, val) \ do { \ (a)[1] = ((u16) (val)) >> 8; \ (a)[0] = ((u16) (val)) & 0xff; \ } while (0) #define RTW_GET_BE24(a) ((((u32) (a)[0]) << 16) | (((u32) (a)[1]) << 8) | \ ((u32) (a)[2])) #define RTW_PUT_BE24(a, val) \ do { \ (a)[0] = (u8) ((((u32) (val)) >> 16) & 0xff); \ (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ (a)[2] = (u8) (((u32) (val)) & 0xff); \ } while (0) #define RTW_GET_BE32(a) ((((u32) (a)[0]) << 24) | (((u32) (a)[1]) << 16) | \ (((u32) (a)[2]) << 8) | ((u32) (a)[3])) #define RTW_PUT_BE32(a, val) \ do { \ (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \ (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \ (a)[3] = (u8) (((u32) (val)) & 0xff); \ } while (0) #define RTW_GET_LE32(a) ((((u32) (a)[3]) << 24) | (((u32) (a)[2]) << 16) | \ (((u32) (a)[1]) << 8) | ((u32) (a)[0])) #define RTW_PUT_LE32(a, val) \ do { \ (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \ (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \ (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ (a)[0] = (u8) (((u32) (val)) & 0xff); \ } while (0) #define RTW_GET_BE64(a) ((((u64) (a)[0]) << 56) | (((u64) (a)[1]) << 48) | \ (((u64) (a)[2]) << 40) | (((u64) (a)[3]) << 32) | \ (((u64) (a)[4]) << 24) | (((u64) (a)[5]) << 16) | \ (((u64) (a)[6]) << 8) | ((u64) (a)[7])) #define RTW_PUT_BE64(a, val) \ do { \ (a)[0] = (u8) (((u64) (val)) >> 56); \ (a)[1] = (u8) (((u64) (val)) >> 48); \ (a)[2] = (u8) (((u64) (val)) >> 40); \ (a)[3] = (u8) (((u64) (val)) >> 32); \ (a)[4] = (u8) (((u64) (val)) >> 24); \ (a)[5] = (u8) (((u64) (val)) >> 16); \ (a)[6] = (u8) (((u64) (val)) >> 8); \ (a)[7] = (u8) (((u64) (val)) & 0xff); \ } while (0) #define RTW_GET_LE64(a) ((((u64) (a)[7]) << 56) | (((u64) (a)[6]) << 48) | \ (((u64) (a)[5]) << 40) | (((u64) (a)[4]) << 32) | \ (((u64) (a)[3]) << 24) | (((u64) (a)[2]) << 16) | \ (((u64) (a)[1]) << 8) | ((u64) (a)[0])) void rtw_buf_free(u8 **buf, u32 *buf_len); void rtw_buf_update(u8 **buf, u32 *buf_len, u8 *src, u32 src_len); struct rtw_cbuf { u32 write; u32 read; u32 size; void *bufs[0]; }; bool rtw_cbuf_full(struct rtw_cbuf *cbuf); bool rtw_cbuf_empty(struct rtw_cbuf *cbuf); bool rtw_cbuf_push(struct rtw_cbuf *cbuf, void *buf); void *rtw_cbuf_pop(struct rtw_cbuf *cbuf); struct rtw_cbuf *rtw_cbuf_alloc(u32 size); void rtw_cbuf_free(struct rtw_cbuf *cbuf); // String handler /* * Write formatted output to sized buffer */ #ifdef PLATFORM_LINUX #define rtw_sprintf(buf, size, format, arg...) snprintf(buf, size, format, ##arg) #else // !PLATFORM_LINUX #error "NOT DEFINE \"rtw_sprintf\"!!" #endif // !PLATFORM_LINUX #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/osdep_service_bsd.h000066400000000000000000000536461261122257400227730ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __OSDEP_BSD_SERVICE_H_ #define __OSDEP_BSD_SERVICE_H_ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "usbdevs.h" #define USB_DEBUG_VAR rum_debug #include #if 1 //Baron porting from linux, it's all temp solution, needs to check again #include #include /* XXX for PCPU_GET */ // typedef struct semaphore _sema; typedef struct sema _sema; // typedef spinlock_t _lock; typedef struct mtx _lock; typedef struct mtx _mutex; typedef struct timer_list _timer; struct list_head { struct list_head *next, *prev; }; struct __queue { struct list_head queue; _lock lock; }; //typedef struct sk_buff _pkt; typedef struct mbuf _pkt; typedef struct mbuf _buffer; typedef struct __queue _queue; typedef struct list_head _list; typedef int _OS_STATUS; //typedef u32 _irqL; typedef unsigned long _irqL; typedef struct ifnet * _nic_hdl; typedef pid_t _thread_hdl_; // typedef struct thread _thread_hdl_; typedef void thread_return; typedef void* thread_context; //#define thread_exit() complete_and_exit(NULL, 0) #define thread_exit() do{printf("%s", "RTKTHREAD_exit");}while(0) typedef void timer_hdl_return; typedef void* timer_hdl_context; typedef struct work_struct _workitem; #define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) /* emulate a modern version */ #define LINUX_VERSION_CODE KERNEL_VERSION(2, 6, 35) #define WIRELESS_EXT -1 #define HZ hz #define spin_lock_irqsave mtx_lock_irqsave #define spin_lock_bh mtx_lock_irqsave #define mtx_lock_irqsave(lock, x) mtx_lock(lock)//{local_irq_save((x)); mtx_lock_spin((lock));} //#define IFT_RTW 0xf9 //ifnet allocate type for RTW #define free_netdev if_free #define LIST_CONTAINOR(ptr, type, member) \ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) #define container_of(p,t,n) (t*)((p)-&(((t*)0)->n)) /* * Linux timers are emulated using FreeBSD callout functions * (and taskqueue functionality). * * Currently no timer stats functionality. * * See (linux_compat) processes.c * */ struct timer_list { /* FreeBSD callout related fields */ struct callout callout; //timeout function void (*function)(void*); //argument void *arg; }; struct workqueue_struct; struct work_struct; typedef void (*work_func_t)(struct work_struct *work); /* Values for the state of an item of work (work_struct) */ typedef enum work_state { WORK_STATE_UNSET = 0, WORK_STATE_CALLOUT_PENDING = 1, WORK_STATE_TASK_PENDING = 2, WORK_STATE_WORK_CANCELLED = 3 } work_state_t; struct work_struct { struct task task; /* FreeBSD task */ work_state_t state; /* the pending or otherwise state of work. */ work_func_t func; }; #define spin_unlock_irqrestore mtx_unlock_irqrestore #define spin_unlock_bh mtx_unlock_irqrestore #define mtx_unlock_irqrestore(lock,x) mtx_unlock(lock); extern void _rtw_spinlock_init(_lock *plock); //modify private structure to match freebsd #define BITS_PER_LONG 32 union ktime { s64 tv64; #if BITS_PER_LONG != 64 && !defined(CONFIG_KTIME_SCALAR) struct { #ifdef __BIG_ENDIAN s32 sec, nsec; #else s32 nsec, sec; #endif } tv; #endif }; #define kmemcheck_bitfield_begin(name) #define kmemcheck_bitfield_end(name) #define CHECKSUM_NONE 0 typedef unsigned char *sk_buff_data_t; typedef union ktime ktime_t; /* Kill this */ void rtw_mtx_lock(_lock *plock); void rtw_mtx_unlock(_lock *plock); /** * struct sk_buff - socket buffer * @next: Next buffer in list * @prev: Previous buffer in list * @sk: Socket we are owned by * @tstamp: Time we arrived * @dev: Device we arrived on/are leaving by * @transport_header: Transport layer header * @network_header: Network layer header * @mac_header: Link layer header * @_skb_refdst: destination entry (with norefcount bit) * @sp: the security path, used for xfrm * @cb: Control buffer. Free for use by every layer. Put private vars here * @len: Length of actual data * @data_len: Data length * @mac_len: Length of link layer header * @hdr_len: writable header length of cloned skb * @csum: Checksum (must include start/offset pair) * @csum_start: Offset from skb->head where checksumming should start * @csum_offset: Offset from csum_start where checksum should be stored * @local_df: allow local fragmentation * @cloned: Head may be cloned (check refcnt to be sure) * @nohdr: Payload reference only, must not modify header * @pkt_type: Packet class * @fclone: skbuff clone status * @ip_summed: Driver fed us an IP checksum * @priority: Packet queueing priority * @users: User count - see {datagram,tcp}.c * @protocol: Packet protocol from driver * @truesize: Buffer size * @head: Head of buffer * @data: Data head pointer * @tail: Tail pointer * @end: End pointer * @destructor: Destruct function * @mark: Generic packet mark * @nfct: Associated connection, if any * @ipvs_property: skbuff is owned by ipvs * @peeked: this packet has been seen already, so stats have been * done for it, don't do them again * @nf_trace: netfilter packet trace flag * @nfctinfo: Relationship of this skb to the connection * @nfct_reasm: netfilter conntrack re-assembly pointer * @nf_bridge: Saved data about a bridged frame - see br_netfilter.c * @skb_iif: ifindex of device we arrived on * @rxhash: the packet hash computed on receive * @queue_mapping: Queue mapping for multiqueue devices * @tc_index: Traffic control index * @tc_verd: traffic control verdict * @ndisc_nodetype: router type (from link layer) * @dma_cookie: a cookie to one of several possible DMA operations * done by skb DMA functions * @secmark: security marking * @vlan_tci: vlan tag control information */ struct sk_buff { /* These two members must be first. */ struct sk_buff *next; struct sk_buff *prev; ktime_t tstamp; struct sock *sk; //struct net_device *dev; struct ifnet *dev; /* * This is the control buffer. It is free to use for every * layer. Please put your private variables there. If you * want to keep them across layers you have to do a skb_clone() * first. This is owned by whoever has the skb queued ATM. */ char cb[48] __aligned(8); unsigned long _skb_refdst; #ifdef CONFIG_XFRM struct sec_path *sp; #endif unsigned int len, data_len; u16 mac_len, hdr_len; union { u32 csum; struct { u16 csum_start; u16 csum_offset; }smbol2; }smbol1; u32 priority; kmemcheck_bitfield_begin(flags1); u8 local_df:1, cloned:1, ip_summed:2, nohdr:1, nfctinfo:3; u8 pkt_type:3, fclone:2, ipvs_property:1, peeked:1, nf_trace:1; kmemcheck_bitfield_end(flags1); u16 protocol; void (*destructor)(struct sk_buff *skb); #if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) struct nf_conntrack *nfct; struct sk_buff *nfct_reasm; #endif #ifdef CONFIG_BRIDGE_NETFILTER struct nf_bridge_info *nf_bridge; #endif int skb_iif; #ifdef CONFIG_NET_SCHED u16 tc_index; /* traffic control index */ #ifdef CONFIG_NET_CLS_ACT u16 tc_verd; /* traffic control verdict */ #endif #endif u32 rxhash; kmemcheck_bitfield_begin(flags2); u16 queue_mapping:16; #ifdef CONFIG_IPV6_NDISC_NODETYPE u8 ndisc_nodetype:2, deliver_no_wcard:1; #else u8 deliver_no_wcard:1; #endif kmemcheck_bitfield_end(flags2); /* 0/14 bit hole */ #ifdef CONFIG_NET_DMA dma_cookie_t dma_cookie; #endif #ifdef CONFIG_NETWORK_SECMARK u32 secmark; #endif union { u32 mark; u32 dropcount; }symbol3; u16 vlan_tci; sk_buff_data_t transport_header; sk_buff_data_t network_header; sk_buff_data_t mac_header; /* These elements must be at the end, see alloc_skb() for details. */ sk_buff_data_t tail; sk_buff_data_t end; unsigned char *head, *data; unsigned int truesize; atomic_t users; }; struct sk_buff_head { /* These two members must be first. */ struct sk_buff *next; struct sk_buff *prev; u32 qlen; _lock lock; }; #define skb_tail_pointer(skb) skb->tail static inline unsigned char *skb_put(struct sk_buff *skb, unsigned int len) { unsigned char *tmp = skb_tail_pointer(skb); //SKB_LINEAR_ASSERT(skb); skb->tail += len; skb->len += len; return tmp; } static inline unsigned char *__skb_pull(struct sk_buff *skb, unsigned int len) { skb->len -= len; if(skb->len < skb->data_len) printf("%s(),%d,error!\n",__FUNCTION__,__LINE__); return skb->data += len; } static inline unsigned char *skb_pull(struct sk_buff *skb, unsigned int len) { #ifdef PLATFORM_FREEBSD return __skb_pull(skb, len); #else return unlikely(len > skb->len) ? NULL : __skb_pull(skb, len); #endif //PLATFORM_FREEBSD } static inline u32 skb_queue_len(const struct sk_buff_head *list_) { return list_->qlen; } static inline void __skb_insert(struct sk_buff *newsk, struct sk_buff *prev, struct sk_buff *next, struct sk_buff_head *list) { newsk->next = next; newsk->prev = prev; next->prev = prev->next = newsk; list->qlen++; } static inline void __skb_queue_before(struct sk_buff_head *list, struct sk_buff *next, struct sk_buff *newsk) { __skb_insert(newsk, next->prev, next, list); } static inline void skb_queue_tail(struct sk_buff_head *list, struct sk_buff *newsk) { mtx_lock(&list->lock); __skb_queue_before(list, (struct sk_buff *)list, newsk); mtx_unlock(&list->lock); } static inline struct sk_buff *skb_peek(struct sk_buff_head *list_) { struct sk_buff *list = ((struct sk_buff *)list_)->next; if (list == (struct sk_buff *)list_) list = NULL; return list; } static inline void __skb_unlink(struct sk_buff *skb, struct sk_buff_head *list) { struct sk_buff *next, *prev; list->qlen--; next = skb->next; prev = skb->prev; skb->next = skb->prev = NULL; next->prev = prev; prev->next = next; } static inline struct sk_buff *skb_dequeue(struct sk_buff_head *list) { mtx_lock(&list->lock); struct sk_buff *skb = skb_peek(list); if (skb) __skb_unlink(skb, list); mtx_unlock(&list->lock); return skb; } static inline void skb_reserve(struct sk_buff *skb, int len) { skb->data += len; skb->tail += len; } static inline void __skb_queue_head_init(struct sk_buff_head *list) { list->prev = list->next = (struct sk_buff *)list; list->qlen = 0; } /* * This function creates a split out lock class for each invocation; * this is needed for now since a whole lot of users of the skb-queue * infrastructure in drivers have different locking usage (in hardirq) * than the networking core (in softirq only). In the long run either the * network layer or drivers should need annotation to consolidate the * main types of usage into 3 classes. */ static inline void skb_queue_head_init(struct sk_buff_head *list) { _rtw_spinlock_init(&list->lock); __skb_queue_head_init(list); } unsigned long copy_from_user(void *to, const void *from, unsigned long n); unsigned long copy_to_user(void *to, const void *from, unsigned long n); struct sk_buff * dev_alloc_skb(unsigned int size); struct sk_buff *skb_clone(const struct sk_buff *skb); void dev_kfree_skb_any(struct sk_buff *skb); #endif //Baron porting from linux, it's all temp solution, needs to check again #if 1 // kenny add Linux compatibility code for Linux USB driver #include #define __init // __attribute ((constructor)) #define __exit // __attribute ((destructor)) /* * Definitions for module_init and module_exit macros. * * These macros will use the SYSINIT framework to call a specified * function (with no arguments) on module loading or unloading. * */ void module_init_exit_wrapper(void *arg); #define module_init(initfn) \ SYSINIT(mod_init_ ## initfn, \ SI_SUB_KLD, SI_ORDER_FIRST, \ module_init_exit_wrapper, initfn) #define module_exit(exitfn) \ SYSUNINIT(mod_exit_ ## exitfn, \ SI_SUB_KLD, SI_ORDER_ANY, \ module_init_exit_wrapper, exitfn) /* * The usb_register and usb_deregister functions are used to register * usb drivers with the usb subsystem. */ int usb_register(struct usb_driver *driver); int usb_deregister(struct usb_driver *driver); /* * usb_get_dev and usb_put_dev - increment/decrement the reference count * of the usb device structure. * * Original body of usb_get_dev: * * if (dev) * get_device(&dev->dev); * return dev; * * Reference counts are not currently used in this compatibility * layer. So these functions will do nothing. */ static inline struct usb_device * usb_get_dev(struct usb_device *dev) { return dev; } static inline void usb_put_dev(struct usb_device *dev) { return; } // rtw_usb_compat_linux int rtw_usb_submit_urb(struct urb *urb, uint16_t mem_flags); int rtw_usb_unlink_urb(struct urb *urb); int rtw_usb_clear_halt(struct usb_device *dev, struct usb_host_endpoint *uhe); int rtw_usb_control_msg(struct usb_device *dev, struct usb_host_endpoint *uhe, uint8_t request, uint8_t requesttype, uint16_t value, uint16_t index, void *data, uint16_t size, usb_timeout_t timeout); int rtw_usb_set_interface(struct usb_device *dev, uint8_t iface_no, uint8_t alt_index); int rtw_usb_setup_endpoint(struct usb_device *dev, struct usb_host_endpoint *uhe, usb_size_t bufsize); struct urb *rtw_usb_alloc_urb(uint16_t iso_packets, uint16_t mem_flags); struct usb_host_endpoint *rtw_usb_find_host_endpoint(struct usb_device *dev, uint8_t type, uint8_t ep); struct usb_host_interface *rtw_usb_altnum_to_altsetting(const struct usb_interface *intf, uint8_t alt_index); struct usb_interface *rtw_usb_ifnum_to_if(struct usb_device *dev, uint8_t iface_no); void *rtw_usbd_get_intfdata(struct usb_interface *intf); void rtw_usb_linux_register(void *arg); void rtw_usb_linux_deregister(void *arg); void rtw_usb_linux_free_device(struct usb_device *dev); void rtw_usb_free_urb(struct urb *urb); void rtw_usb_init_urb(struct urb *urb); void rtw_usb_kill_urb(struct urb *urb); void rtw_usb_set_intfdata(struct usb_interface *intf, void *data); void rtw_usb_fill_bulk_urb(struct urb *urb, struct usb_device *udev, struct usb_host_endpoint *uhe, void *buf, int length, usb_complete_t callback, void *arg); int rtw_usb_bulk_msg(struct usb_device *udev, struct usb_host_endpoint *uhe, void *data, int len, uint16_t *pactlen, usb_timeout_t timeout); void *usb_get_intfdata(struct usb_interface *intf); int usb_linux_init_endpoints(struct usb_device *udev); typedef struct urb * PURB; typedef unsigned gfp_t; #define __GFP_WAIT ((gfp_t)0x10u) /* Can wait and reschedule? */ #define __GFP_HIGH ((gfp_t)0x20u) /* Should access emergency pools? */ #define __GFP_IO ((gfp_t)0x40u) /* Can start physical IO? */ #define __GFP_FS ((gfp_t)0x80u) /* Can call down to low-level FS? */ #define __GFP_COLD ((gfp_t)0x100u) /* Cache-cold page required */ #define __GFP_NOWARN ((gfp_t)0x200u) /* Suppress page allocation failure warning */ #define __GFP_REPEAT ((gfp_t)0x400u) /* Retry the allocation. Might fail */ #define __GFP_NOFAIL ((gfp_t)0x800u) /* Retry for ever. Cannot fail */ #define __GFP_NORETRY ((gfp_t)0x1000u)/* Do not retry. Might fail */ #define __GFP_NO_GROW ((gfp_t)0x2000u)/* Slab internal usage */ #define __GFP_COMP ((gfp_t)0x4000u)/* Add compound page metadata */ #define __GFP_ZERO ((gfp_t)0x8000u)/* Return zeroed page on success */ #define __GFP_NOMEMALLOC ((gfp_t)0x10000u) /* Don't use emergency reserves */ #define __GFP_HARDWALL ((gfp_t)0x20000u) /* Enforce hardwall cpuset memory allocs */ /* This equals 0, but use constants in case they ever change */ #define GFP_NOWAIT (GFP_ATOMIC & ~__GFP_HIGH) /* GFP_ATOMIC means both !wait (__GFP_WAIT not set) and use emergency pool */ #define GFP_ATOMIC (__GFP_HIGH) #define GFP_NOIO (__GFP_WAIT) #define GFP_NOFS (__GFP_WAIT | __GFP_IO) #define GFP_KERNEL (__GFP_WAIT | __GFP_IO | __GFP_FS) #define GFP_USER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL) #define GFP_HIGHUSER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL | \ __GFP_HIGHMEM) #endif // kenny add Linux compatibility code for Linux USB __inline static _list *get_next(_list *list) { return list->next; } __inline static _list *get_list_head(_queue *queue) { return (&(queue->queue)); } #define LIST_CONTAINOR(ptr, type, member) \ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) __inline static void _enter_critical(_lock *plock, _irqL *pirqL) { spin_lock_irqsave(plock, *pirqL); } __inline static void _exit_critical(_lock *plock, _irqL *pirqL) { spin_unlock_irqrestore(plock, *pirqL); } __inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL) { spin_lock_irqsave(plock, *pirqL); } __inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL) { spin_unlock_irqrestore(plock, *pirqL); } __inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) { spin_lock_bh(plock, *pirqL); } __inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) { spin_unlock_bh(plock, *pirqL); } __inline static void _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) { mtx_lock(pmutex); } __inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) { mtx_unlock(pmutex); } static inline void __list_del(struct list_head * prev, struct list_head * next) { next->prev = prev; prev->next = next; } static inline void INIT_LIST_HEAD(struct list_head *list) { list->next = list; list->prev = list; } __inline static void rtw_list_delete(_list *plist) { __list_del(plist->prev, plist->next); INIT_LIST_HEAD(plist); } __inline static void _init_timer(_timer *ptimer,_nic_hdl padapter,void *pfunc,void* cntx) { ptimer->function = pfunc; ptimer->arg = cntx; callout_init(&ptimer->callout, CALLOUT_MPSAFE); } __inline static void _set_timer(_timer *ptimer,u32 delay_time) { // mod_timer(ptimer , (jiffies+(delay_time*HZ/1000))); if(ptimer->function && ptimer->arg){ rtw_mtx_lock(NULL); callout_reset(&ptimer->callout, delay_time,ptimer->function, ptimer->arg); rtw_mtx_unlock(NULL); } } __inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) { // del_timer_sync(ptimer); // *bcancelled= _TRUE;//TRUE ==1; FALSE==0 rtw_mtx_lock(NULL); callout_drain(&ptimer->callout); rtw_mtx_unlock(NULL); } __inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) { printf("%s Not implement yet! \n",__FUNCTION__); } __inline static void _set_workitem(_workitem *pwork) { printf("%s Not implement yet! \n",__FUNCTION__); // schedule_work(pwork); } // // Global Mutex: can only be used at PASSIVE level. // #define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ { \ } #define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ { \ } #define ATOMIC_INIT(i) { (i) } static __inline void thread_enter(char *name); //Atomic integer operations typedef uint32_t ATOMIC_T ; #define rtw_netdev_priv(netdev) (((struct ifnet *)netdev)->if_softc) #define rtw_free_netdev(netdev) if_free((netdev)) #define NDEV_FMT "%s" #define NDEV_ARG(ndev) "" #define ADPT_FMT "%s" #define ADPT_ARG(adapter) "" #define FUNC_NDEV_FMT "%s" #define FUNC_NDEV_ARG(ndev) __func__ #define FUNC_ADPT_FMT "%s" #define FUNC_ADPT_ARG(adapter) __func__ #define STRUCT_PACKED #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/osdep_service_ce.h000066400000000000000000000113301261122257400225720ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __OSDEP_CE_SERVICE_H_ #define __OSDEP_CE_SERVICE_H_ #include #include #ifdef CONFIG_SDIO_HCI #include "SDCardDDK.h" #endif #ifdef CONFIG_USB_HCI #include #endif typedef HANDLE _sema; typedef LIST_ENTRY _list; typedef NDIS_STATUS _OS_STATUS; typedef NDIS_SPIN_LOCK _lock; typedef HANDLE _rwlock; //Mutex typedef u32 _irqL; typedef NDIS_HANDLE _nic_hdl; typedef NDIS_MINIPORT_TIMER _timer; struct __queue { LIST_ENTRY queue; _lock lock; }; typedef NDIS_PACKET _pkt; typedef NDIS_BUFFER _buffer; typedef struct __queue _queue; typedef HANDLE _thread_hdl_; typedef DWORD thread_return; typedef void* thread_context; typedef NDIS_WORK_ITEM _workitem; #define thread_exit() ExitThread(STATUS_SUCCESS); return 0; #define SEMA_UPBND (0x7FFFFFFF) //8192 __inline static _list *get_prev(_list *list) { return list->Blink; } __inline static _list *get_next(_list *list) { return list->Flink; } __inline static _list *get_list_head(_queue *queue) { return (&(queue->queue)); } #define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) __inline static void _enter_critical(_lock *plock, _irqL *pirqL) { NdisAcquireSpinLock(plock); } __inline static void _exit_critical(_lock *plock, _irqL *pirqL) { NdisReleaseSpinLock(plock); } __inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) { NdisDprAcquireSpinLock(plock); } __inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) { NdisDprReleaseSpinLock(plock); } __inline static void _enter_hwio_critical(_rwlock *prwlock, _irqL *pirqL) { WaitForSingleObject(*prwlock, INFINITE ); } __inline static void _exit_hwio_critical(_rwlock *prwlock, _irqL *pirqL) { ReleaseMutex(*prwlock); } __inline static void rtw_list_delete(_list *plist) { RemoveEntryList(plist); InitializeListHead(plist); } #define RTW_TIMER_HDL_ARGS IN PVOID SystemSpecific1, IN PVOID FunctionContext, IN PVOID SystemSpecific2, IN PVOID SystemSpecific3 __inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx) { NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx); } __inline static void _set_timer(_timer *ptimer,u32 delay_time) { NdisMSetTimer(ptimer,delay_time); } __inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) { NdisMCancelTimer(ptimer,bcancelled); } __inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) { NdisInitializeWorkItem(pwork, pfunc, cntx); } __inline static void _set_workitem(_workitem *pwork) { NdisScheduleWorkItem(pwork); } #define ATOMIC_INIT(i) { (i) } // // Global Mutex: can only be used at PASSIVE level. // #define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ { \ while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ { \ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ NdisMSleep(10000); \ } \ } #define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ { \ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ } // limitation of path length #define PATH_LENGTH_MAX MAX_PATH //Atomic integer operations #define ATOMIC_T LONG #define NDEV_FMT "%s" #define NDEV_ARG(ndev) "" #define ADPT_FMT "%s" #define ADPT_ARG(adapter) "" #define FUNC_NDEV_FMT "%s" #define FUNC_NDEV_ARG(ndev) __func__ #define FUNC_ADPT_FMT "%s" #define FUNC_ADPT_ARG(adapter) __func__ #define STRUCT_PACKED #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/osdep_service_linux.h000066400000000000000000000251531261122257400233520ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __OSDEP_LINUX_SERVICE_H_ #define __OSDEP_LINUX_SERVICE_H_ #include #include #include #include #include #include #include #include #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,5)) #include #endif //#include #include #include #include #include #include #include #include #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) #include #else #include #endif #include #include #include #include #include #include #include #include #include // for struct tasklet_struct #include #include #include #include #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,41)) #include #endif #ifdef RTK_DMP_PLATFORM #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) #include #endif #include #endif #ifdef CONFIG_IOCTL_CFG80211 // #include #include #include #endif //CONFIG_IOCTL_CFG80211 #ifdef CONFIG_TCP_CSUM_OFFLOAD_TX #include #include #endif #ifdef CONFIG_HAS_EARLYSUSPEND #include #endif //CONFIG_HAS_EARLYSUSPEND #ifdef CONFIG_EFUSE_CONFIG_FILE #include #endif //CONFIG_EFUSE_CONFIG_FILE #ifdef CONFIG_USB_HCI #include #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) #include #else #include #endif #endif #ifdef CONFIG_USB_HCI typedef struct urb * PURB; #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22)) #ifdef CONFIG_USB_SUSPEND #define CONFIG_AUTOSUSPEND 1 #endif #endif #endif typedef struct semaphore _sema; typedef spinlock_t _lock; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) typedef struct mutex _mutex; #else typedef struct semaphore _mutex; #endif typedef struct timer_list _timer; struct __queue { struct list_head queue; _lock lock; }; typedef struct sk_buff _pkt; typedef unsigned char _buffer; typedef struct __queue _queue; typedef struct list_head _list; typedef int _OS_STATUS; //typedef u32 _irqL; typedef unsigned long _irqL; typedef struct net_device * _nic_hdl; typedef void* _thread_hdl_; typedef int thread_return; typedef void* thread_context; #define thread_exit() complete_and_exit(NULL, 0) typedef void timer_hdl_return; typedef void* timer_hdl_context; #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) typedef struct work_struct _workitem; #else typedef struct tq_struct _workitem; #endif #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) #endif #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)) // Porting from linux kernel, for compatible with old kernel. static inline unsigned char *skb_tail_pointer(const struct sk_buff *skb) { return skb->tail; } static inline void skb_reset_tail_pointer(struct sk_buff *skb) { skb->tail = skb->data; } static inline void skb_set_tail_pointer(struct sk_buff *skb, const int offset) { skb->tail = skb->data + offset; } static inline unsigned char *skb_end_pointer(const struct sk_buff *skb) { return skb->end; } #endif __inline static _list *get_next(_list *list) { return list->next; } __inline static _list *get_list_head(_queue *queue) { return (&(queue->queue)); } #define LIST_CONTAINOR(ptr, type, member) \ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) __inline static void _enter_critical(_lock *plock, _irqL *pirqL) { spin_lock_irqsave(plock, *pirqL); } __inline static void _exit_critical(_lock *plock, _irqL *pirqL) { spin_unlock_irqrestore(plock, *pirqL); } __inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL) { spin_lock_irqsave(plock, *pirqL); } __inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL) { spin_unlock_irqrestore(plock, *pirqL); } __inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) { spin_lock_bh(plock); } __inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) { spin_unlock_bh(plock); } __inline static int _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) { int ret = 0; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) //mutex_lock(pmutex); ret = mutex_lock_interruptible(pmutex); #else ret = down_interruptible(pmutex); #endif return ret; } __inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) mutex_unlock(pmutex); #else up(pmutex); #endif } __inline static void rtw_list_delete(_list *plist) { list_del_init(plist); } #define RTW_TIMER_HDL_ARGS void *FunctionContext __inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,void* cntx) { //setup_timer(ptimer, pfunc,(u32)cntx); ptimer->function = pfunc; ptimer->data = (unsigned long)cntx; init_timer(ptimer); } __inline static void _set_timer(_timer *ptimer,u32 delay_time) { mod_timer(ptimer , (jiffies+(delay_time*HZ/1000))); } __inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) { del_timer_sync(ptimer); *bcancelled= _TRUE;//TRUE ==1; FALSE==0 } __inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) INIT_WORK(pwork, pfunc); #elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) INIT_WORK(pwork, pfunc,pwork); #else INIT_TQUEUE(pwork, pfunc,pwork); #endif } __inline static void _set_workitem(_workitem *pwork) { #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) schedule_work(pwork); #else schedule_task(pwork); #endif } __inline static void _cancel_workitem_sync(_workitem *pwork) { #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22)) cancel_work_sync(pwork); #elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) flush_scheduled_work(); #else flush_scheduled_tasks(); #endif } // // Global Mutex: can only be used at PASSIVE level. // #define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ { \ while (atomic_inc_return((atomic_t *)&(_MutexCounter)) != 1)\ { \ atomic_dec((atomic_t *)&(_MutexCounter)); \ msleep(10); \ } \ } #define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ { \ atomic_dec((atomic_t *)&(_MutexCounter)); \ } static inline int rtw_netif_queue_stopped(struct net_device *pnetdev) { #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) return (netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 0)) && netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 1)) && netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 2)) && netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 3)) ); #else return netif_queue_stopped(pnetdev); #endif } static inline void rtw_netif_wake_queue(struct net_device *pnetdev) { #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) netif_tx_wake_all_queues(pnetdev); #else netif_wake_queue(pnetdev); #endif } static inline void rtw_netif_start_queue(struct net_device *pnetdev) { #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) netif_tx_start_all_queues(pnetdev); #else netif_start_queue(pnetdev); #endif } static inline void rtw_netif_stop_queue(struct net_device *pnetdev) { #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) netif_tx_stop_all_queues(pnetdev); #else netif_stop_queue(pnetdev); #endif } static inline void rtw_merge_string(char *dst, int dst_len, char *src1, char *src2) { int len = 0; len += snprintf(dst+len, dst_len - len, "%s", src1); len += snprintf(dst+len, dst_len - len, "%s", src2); } #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) #define rtw_signal_process(pid, sig) kill_pid(find_vpid((pid)),(sig), 1) #else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) #define rtw_signal_process(pid, sig) kill_proc((pid), (sig), 1) #endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) // Suspend lock prevent system from going suspend #ifdef CONFIG_WAKELOCK #include #elif defined(CONFIG_ANDROID_POWER) #include #endif // limitation of path length #define PATH_LENGTH_MAX PATH_MAX //Atomic integer operations #define ATOMIC_T atomic_t #define rtw_netdev_priv(netdev) ( ((struct rtw_netdev_priv_indicator *)netdev_priv(netdev))->priv ) #define NDEV_FMT "%s" #define NDEV_ARG(ndev) ndev->name #define ADPT_FMT "%s" #define ADPT_ARG(adapter) adapter->pnetdev->name #define FUNC_NDEV_FMT "%s(%s)" #define FUNC_NDEV_ARG(ndev) __func__, ndev->name #define FUNC_ADPT_FMT "%s(%s)" #define FUNC_ADPT_ARG(adapter) __func__, adapter->pnetdev->name struct rtw_netdev_priv_indicator { void *priv; u32 sizeof_priv; }; struct net_device *rtw_alloc_etherdev_with_old_priv(int sizeof_priv, void *old_priv); extern struct net_device * rtw_alloc_etherdev(int sizeof_priv); #define STRUCT_PACKED __attribute__ ((packed)) #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/osdep_service_xp.h000066400000000000000000000120671261122257400226420ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __OSDEP_LINUX_SERVICE_H_ #define __OSDEP_LINUX_SERVICE_H_ #include #include #include #include #ifdef CONFIG_USB_HCI #include #include #include #endif typedef KSEMAPHORE _sema; typedef LIST_ENTRY _list; typedef NDIS_STATUS _OS_STATUS; typedef NDIS_SPIN_LOCK _lock; typedef KMUTEX _mutex; typedef KIRQL _irqL; // USB_PIPE for WINCE , but handle can be use just integer under windows typedef NDIS_HANDLE _nic_hdl; typedef NDIS_MINIPORT_TIMER _timer; struct __queue { LIST_ENTRY queue; _lock lock; }; typedef NDIS_PACKET _pkt; typedef NDIS_BUFFER _buffer; typedef struct __queue _queue; typedef PKTHREAD _thread_hdl_; typedef void thread_return; typedef void* thread_context; typedef NDIS_WORK_ITEM _workitem; #define thread_exit() PsTerminateSystemThread(STATUS_SUCCESS); #define HZ 10000000 #define SEMA_UPBND (0x7FFFFFFF) //8192 __inline static _list *get_next(_list *list) { return list->Flink; } __inline static _list *get_list_head(_queue *queue) { return (&(queue->queue)); } #define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) __inline static _enter_critical(_lock *plock, _irqL *pirqL) { NdisAcquireSpinLock(plock); } __inline static _exit_critical(_lock *plock, _irqL *pirqL) { NdisReleaseSpinLock(plock); } __inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) { NdisDprAcquireSpinLock(plock); } __inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) { NdisDprReleaseSpinLock(plock); } __inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) { NdisDprAcquireSpinLock(plock); } __inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) { NdisDprReleaseSpinLock(plock); } __inline static _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) { KeWaitForSingleObject(pmutex, Executive, KernelMode, FALSE, NULL); } __inline static _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) { KeReleaseMutex(pmutex, FALSE); } __inline static void rtw_list_delete(_list *plist) { RemoveEntryList(plist); InitializeListHead(plist); } #define RTW_TIMER_HDL_ARGS IN PVOID SystemSpecific1, IN PVOID FunctionContext, IN PVOID SystemSpecific2, IN PVOID SystemSpecific3 __inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx) { NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx); } __inline static void _set_timer(_timer *ptimer,u32 delay_time) { NdisMSetTimer(ptimer,delay_time); } __inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) { NdisMCancelTimer(ptimer,bcancelled); } __inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) { NdisInitializeWorkItem(pwork, pfunc, cntx); } __inline static void _set_workitem(_workitem *pwork) { NdisScheduleWorkItem(pwork); } #define ATOMIC_INIT(i) { (i) } // // Global Mutex: can only be used at PASSIVE level. // #define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ { \ while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ { \ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ NdisMSleep(10000); \ } \ } #define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ { \ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ } // limitation of path length #define PATH_LENGTH_MAX MAX_PATH //Atomic integer operations #define ATOMIC_T LONG #define NDEV_FMT "%s" #define NDEV_ARG(ndev) "" #define ADPT_FMT "%s" #define ADPT_ARG(adapter) "" #define FUNC_NDEV_FMT "%s" #define FUNC_NDEV_ARG(ndev) __func__ #define FUNC_ADPT_FMT "%s" #define FUNC_ADPT_ARG(adapter) __func__ #define STRUCT_PACKED #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/pci_hal.h000077500000000000000000000030351261122257400206760ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __PCI_HAL_H__ #define __PCI_HAL_H__ #ifdef CONFIG_RTL8192C void rtl8192ce_set_hal_ops(_adapter * padapter); #endif #ifdef CONFIG_RTL8192D void rtl8192de_set_hal_ops(_adapter * padapter); #endif #ifdef CONFIG_RTL8188E void rtl8188ee_set_hal_ops(_adapter * padapter); #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) void rtl8812ae_set_hal_ops(_adapter * padapter); #endif #if defined(CONFIG_RTL8192E) void rtl8192ee_set_hal_ops(_adapter * padapter); #endif #ifdef CONFIG_RTL8723B void rtl8723be_set_hal_ops(_adapter * padapter); #endif void rtw_set_hal_ops(_adapter *padapter); #endif //__PCIE_HAL_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/pci_ops.h000077500000000000000000000067611261122257400207440ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __PCI_OPS_H_ #define __PCI_OPS_H_ #ifdef CONFIG_RTL8188E u32 rtl8188ee_init_desc_ring(_adapter * padapter); u32 rtl8188ee_free_desc_ring(_adapter * padapter); void rtl8188ee_reset_desc_ring(_adapter * padapter); int rtl8188ee_interrupt(PADAPTER Adapter); void rtl8188ee_xmit_tasklet(void *priv); void rtl8188ee_recv_tasklet(void *priv); void rtl8188ee_prepare_bcn_tasklet(void *priv); void rtl8188ee_set_intf_ops(struct _io_ops *pops); #endif #ifdef CONFIG_RTL8192C u32 rtl8192ce_init_desc_ring(_adapter * padapter); u32 rtl8192ce_free_desc_ring(_adapter * padapter); void rtl8192ce_reset_desc_ring(_adapter * padapter); int rtl8192ce_interrupt(PADAPTER Adapter); void rtl8192ce_xmit_tasklet(void *priv); void rtl8192ce_recv_tasklet(void *priv); void rtl8192ce_prepare_bcn_tasklet(void *priv); void rtl8192ce_set_intf_ops(struct _io_ops *pops); #endif #ifdef CONFIG_RTL8192D u32 rtl8192de_init_desc_ring(_adapter * padapter); u32 rtl8192de_free_desc_ring(_adapter * padapter); void rtl8192de_reset_desc_ring(_adapter * padapter); int rtl8192de_interrupt(PADAPTER Adapter); void rtl8192de_xmit_tasklet(void *priv); void rtl8192de_recv_tasklet(void *priv); void rtl8192de_prepare_bcn_tasklet(void *priv); void rtl8192de_set_intf_ops(struct _io_ops *pops); u32 MpReadPCIDwordDBI8192D(IN PADAPTER Adapter, IN u16 Offset, IN u8 Direct); void MpWritePCIDwordDBI8192D(IN PADAPTER Adapter, IN u16 Offset, IN u32 Value, IN u8 Direct); #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) u32 rtl8812ae_init_desc_ring(_adapter * padapter); u32 rtl8812ae_free_desc_ring(_adapter * padapter); void rtl8812ae_reset_desc_ring(_adapter * padapter); int rtl8812ae_interrupt(PADAPTER Adapter); void rtl8812ae_xmit_tasklet(void *priv); void rtl8812ae_recv_tasklet(void *priv); void rtl8812ae_prepare_bcn_tasklet(void *priv); void rtl8812ae_set_intf_ops(struct _io_ops *pops); #endif #ifdef CONFIG_RTL8192E u32 rtl8192ee_init_desc_ring(_adapter * padapter); u32 rtl8192ee_free_desc_ring(_adapter * padapter); void rtl8192ee_reset_desc_ring(_adapter * padapter); void rtl8192ee_recv_tasklet(void *priv); void rtl8192ee_prepare_bcn_tasklet(void *priv); int rtl8192ee_interrupt(PADAPTER Adapter); void rtl8192ee_set_intf_ops(struct _io_ops *pops); #endif #ifdef CONFIG_RTL8723B u32 rtl8723be_init_desc_ring(_adapter * padapter); u32 rtl8723be_free_desc_ring(_adapter * padapter); void rtl8723be_reset_desc_ring(_adapter * padapter); int rtl8723be_interrupt(PADAPTER Adapter); void rtl8723be_recv_tasklet(void *priv); void rtl8723be_prepare_bcn_tasklet(void *priv); void rtl8723be_set_intf_ops(struct _io_ops *pops); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/pci_osintf.h000066400000000000000000000022651261122257400214350ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __PCI_OSINTF_H #define __PCI_OSINTF_H void rtw_pci_disable_aspm(_adapter *padapter); void rtw_pci_enable_aspm(_adapter *padapter); void PlatformClearPciPMEStatus(PADAPTER Adapter); #ifdef CONFIG_64BIT_DMA u8 PlatformEnableDMA64(PADAPTER Adapter); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/recv_osdep.h000066400000000000000000000047261261122257400214350ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RECV_OSDEP_H_ #define __RECV_OSDEP_H_ extern sint _rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter); extern void _rtw_free_recv_priv (struct recv_priv *precvpriv); extern s32 rtw_recv_entry(union recv_frame *precv_frame); extern int rtw_recv_indicatepkt(_adapter *adapter, union recv_frame *precv_frame); extern void rtw_recv_returnpacket(IN _nic_hdl cnxt, IN _pkt *preturnedpkt); extern void rtw_hostapd_mlme_rx(_adapter *padapter, union recv_frame *precv_frame); extern void rtw_handle_tkip_mic_err(_adapter *padapter,u8 bgroup); int rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter); void rtw_free_recv_priv (struct recv_priv *precvpriv); int rtw_os_recv_resource_init(struct recv_priv *precvpriv, _adapter *padapter); int rtw_os_recv_resource_alloc(_adapter *padapter, union recv_frame *precvframe); void rtw_os_recv_resource_free(struct recv_priv *precvpriv); int rtw_os_alloc_recvframe(_adapter *padapter, union recv_frame *precvframe, u8 *pdata, _pkt *pskb); void rtw_os_free_recvframe(union recv_frame *precvframe); int rtw_os_recvbuf_resource_alloc(_adapter *padapter, struct recv_buf *precvbuf); int rtw_os_recvbuf_resource_free(_adapter *padapter, struct recv_buf *precvbuf); _pkt *rtw_os_alloc_msdu_pkt(union recv_frame *prframe, u16 nSubframe_Length, u8 *pdata); void rtw_os_recv_indicate_pkt(_adapter *padapter, _pkt *pkt, struct rx_pkt_attrib *pattrib); void rtw_os_read_port(_adapter *padapter, struct recv_buf *precvbuf); void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl); #endif // rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8188e_cmd.h000066400000000000000000000206761261122257400214300ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8188E_CMD_H__ #define __RTL8188E_CMD_H__ #if 0 enum cmd_msg_element_id { NONE_CMDMSG_EID, AP_OFFLOAD_EID = 0, SET_PWRMODE_EID = 1, JOINBSS_RPT_EID = 2, RSVD_PAGE_EID = 3, RSSI_4_EID = 4, RSSI_SETTING_EID = 5, MACID_CONFIG_EID = 6, MACID_PS_MODE_EID = 7, P2P_PS_OFFLOAD_EID = 8, SELECTIVE_SUSPEND_ROF_CMD = 9, P2P_PS_CTW_CMD_EID = 32, MAX_CMDMSG_EID }; #else typedef enum _RTL8188E_H2C_CMD_ID { //Class Common H2C_COM_RSVD_PAGE =0x00, H2C_COM_MEDIA_STATUS_RPT =0x01, H2C_COM_SCAN =0x02, H2C_COM_KEEP_ALIVE =0x03, H2C_COM_DISCNT_DECISION =0x04, #ifndef CONFIG_WOWLAN H2C_COM_WWLAN =0x05, #endif H2C_COM_INIT_OFFLOAD =0x06, H2C_COM_REMOTE_WAKE_CTL =0x07, H2C_COM_AP_OFFLOAD =0x08, H2C_COM_BCN_RSVD_PAGE =0x09, H2C_COM_PROB_RSP_RSVD_PAGE =0x0A, //Class PS H2C_PS_PWR_MODE =0x20, H2C_PS_TUNE_PARA =0x21, H2C_PS_TUNE_PARA_2 =0x22, H2C_PS_LPS_PARA =0x23, H2C_PS_P2P_OFFLOAD =0x24, //Class DM H2C_DM_MACID_CFG =0x40, H2C_DM_TXBF =0x41, H2C_RSSI_REPORT =0x42, //Class BT H2C_BT_COEX_MASK =0x60, H2C_BT_COEX_GPIO_MODE =0x61, H2C_BT_DAC_SWING_VAL =0x62, H2C_BT_PSD_RST =0x63, //Class Remote WakeUp #ifdef CONFIG_WOWLAN H2C_COM_WWLAN =0x80, H2C_COM_REMOTE_WAKE_CTRL =0x81, H2C_COM_AOAC_GLOBAL_INFO =0x82, H2C_COM_AOAC_RSVD_PAGE =0x83, #endif //Class //H2C_RESET_TSF =0xc0, }RTL8188E_H2C_CMD_ID; #endif struct cmd_msg_parm { u8 eid; //element id u8 sz; // sz u8 buf[6]; }; enum{ PWRS }; typedef struct _SETPWRMODE_PARM { u8 Mode;//0:Active,1:LPS,2:WMMPS //u8 RLBM:4;//0:Min,1:Max,2: User define u8 SmartPS_RLBM;//LPS=0:PS_Poll,1:PS_Poll,2:NullData,WMM=0:PS_Poll,1:NullData u8 AwakeInterval; // unit: beacon interval u8 bAllQueueUAPSD; u8 PwrState;//AllON(0x0c),RFON(0x04),RFOFF(0x00) } SETPWRMODE_PARM, *PSETPWRMODE_PARM; struct H2C_SS_RFOFF_PARAM{ u8 ROFOn; // 1: on, 0:off u16 gpio_period; // unit: 1024 us }__attribute__ ((packed)); typedef struct JOINBSSRPT_PARM_88E{ u8 OpMode; // RT_MEDIA_STATUS #ifdef CONFIG_WOWLAN u8 MacID; // MACID #endif //CONFIG_WOWLAN }JOINBSSRPT_PARM_88E, *PJOINBSSRPT_PARM_88E; /* move to hal_com_h2c.h typedef struct _RSVDPAGE_LOC_88E { u8 LocProbeRsp; u8 LocPsPoll; u8 LocNullData; u8 LocQosNull; u8 LocBTQosNull; #ifdef CONFIG_WOWLAN u8 LocRemoteCtrlInfo; u8 LocArpRsp; u8 LocNbrAdv; u8 LocGTKRsp; u8 LocGTKInfo; u8 LocProbeReq; u8 LocNetList; #endif //CONFIG_WOWLAN } RSVDPAGE_LOC_88E, *PRSVDPAGE_LOC_88E; */ // host message to firmware cmd void rtl8188e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); void rtl8188e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus); u8 rtl8188e_set_rssi_cmd(PADAPTER padapter, u8 *param); u8 rtl8188e_set_raid_cmd(_adapter*padapter, u32 bitmap, u8* arg); void rtl8188e_Add_RateATid(PADAPTER padapter, u32 bitmap, u8* arg, u8 rssi_level); s32 FillH2CCmd_88E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); //u8 rtl8192c_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period); #ifdef CONFIG_P2P void rtl8188e_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); #endif //CONFIG_P2P void CheckFwRsvdPageContent(PADAPTER padapter); void rtl8188e_set_FwMediaStatus_cmd(PADAPTER padapter, u16 mstatus_rpt ); #ifdef CONFIG_TSF_RESET_OFFLOAD //u8 rtl8188e_reset_tsf(_adapter *padapter, u8 reset_port); int reset_tsf(PADAPTER Adapter, u8 reset_port ); #endif // CONFIG_TSF_RESET_OFFLOAD //#define H2C_8188E_RSVDPAGE_LOC_LEN 5 //#define H2C_8188E_AOAC_RSVDPAGE_LOC_LEN 7 #ifdef CONFIG_WOWLAN typedef struct _SETWOWLAN_PARM{ u8 mode; u8 gpio_index; u8 gpio_duration; u8 second_mode; u8 reserve; }SETWOWLAN_PARM, *PSETWOWLAN_PARM; typedef struct _SETAOAC_GLOBAL_INFO{ u8 pairwiseEncAlg; u8 groupEncAlg; }SETAOAC_GLOBAL_INFO, *PSETAOAC_GLOBAL_INFO; /* move to hal_com_h2c.h #define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 ) #define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5]) #define cpIpAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3]) // // ARP packet // // LLC Header #define GET_ARP_PKT_LLC_TYPE(__pHeader) ReadEF2Byte( ((u8*)(__pHeader)) + 6) //ARP element #define GET_ARP_PKT_OPERATION(__pHeader) ReadEF2Byte( ((u8*)(__pHeader)) + 6) #define GET_ARP_PKT_SENDER_MAC_ADDR(__pHeader, _val) cpMacAddr((u8*)(_val), ((u8*)(__pHeader))+8) #define GET_ARP_PKT_SENDER_IP_ADDR(__pHeader, _val) cpIpAddr((u8*)(_val), ((u8*)(__pHeader))+14) #define GET_ARP_PKT_TARGET_MAC_ADDR(__pHeader, _val) cpMacAddr((u8*)(_val), ((u8*)(__pHeader))+18) #define SET_ARP_PKT_HW(__pHeader, __Value) WriteEF2Byte( ((u8*)(__pHeader)) + 0, __Value) #define SET_ARP_PKT_PROTOCOL(__pHeader, __Value) WriteEF2Byte( ((u8*)(__pHeader)) + 2, __Value) #define SET_ARP_PKT_HW_ADDR_LEN(__pHeader, __Value) WriteEF1Byte( ((u8*)(__pHeader)) + 4, __Value) #define SET_ARP_PKT_PROTOCOL_ADDR_LEN(__pHeader, __Value) WriteEF1Byte( ((u8*)(__pHeader)) + 5, __Value) #define SET_ARP_PKT_OPERATION(__pHeader, __Value) WriteEF2Byte( ((u8*)(__pHeader)) + 6, __Value) #define SET_ARP_PKT_SENDER_MAC_ADDR(__pHeader, _val) cpMacAddr(((u8*)(__pHeader))+8, (u8*)(_val)) #define SET_ARP_PKT_SENDER_IP_ADDR(__pHeader, _val) cpIpAddr(((u8*)(__pHeader))+14, (u8*)(_val)) #define SET_ARP_PKT_TARGET_MAC_ADDR(__pHeader, _val) cpMacAddr(((u8*)(__pHeader))+18, (u8*)(_val)) #define SET_ARP_PKT_TARGET_IP_ADDR(__pHeader, _val) cpIpAddr(((u8*)(__pHeader))+24, (u8*)(_val)) #define FW_WOWLAN_FUN_EN BIT(0) #define FW_WOWLAN_PATTERN_MATCH BIT(1) #define FW_WOWLAN_MAGIC_PKT BIT(2) #define FW_WOWLAN_UNICAST BIT(3) #define FW_WOWLAN_ALL_PKT_DROP BIT(4) #define FW_WOWLAN_GPIO_ACTIVE BIT(5) #define FW_WOWLAN_REKEY_WAKEUP BIT(6) #define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) #define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) #define FW_FW_PARSE_MAGIC_PKT BIT(1) #define FW_WOWLAN_KEEP_ALIVE_EN BIT(0) #define FW_WOWLAN_KEEP_ALIVE_PKT_TYPE BIT(2) #define FW_REMOTE_WAKE_CTRL_EN BIT(0) #define FW_ARP_EN BIT(1) #define FW_REALWOWLAN_EN BIT(5) #define FW_WOW_FW_UNICAST_EN BIT(7) #define FW_ADOPT_USER BIT(1) */ void rtl8188es_set_wowlan_cmd(_adapter* padapter, u8 enable); void SetFwRelatedForWoWLAN8188ES(_adapter* padapter, u8 bHostIsGoingtoSleep); #endif//CONFIG_WOWLAN //---------------------------------------------------------------------------------------------------------// //---------------------------------- H2C CMD CONTENT --------------------------------------------------// //---------------------------------------------------------------------------------------------------------// // /* move to hal_com_h2c.h //_RSVDPAGE_LOC_CMD_0x00 #define SET_8188E_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) #define SET_8188E_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) #define SET_8188E_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) #define SET_8188E_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) // AOAC_RSVDPAGE_LOC_0x83 #define SET_8188E_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 0, 8, __Value) #define SET_8188E_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) */ #endif//__RTL8188E_CMD_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8188e_dm.h000066400000000000000000000026571261122257400212640ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8188E_DM_H__ #define __RTL8188E_DM_H__ void rtl8188e_init_dm_priv(IN PADAPTER Adapter); void rtl8188e_deinit_dm_priv(IN PADAPTER Adapter); void rtl8188e_InitHalDm(IN PADAPTER Adapter); void rtl8188e_HalDmWatchDog(IN PADAPTER Adapter); //VOID rtl8192c_dm_CheckTXPowerTracking(IN PADAPTER Adapter); //void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal); #ifdef CONFIG_ANTENNA_DIVERSITY void AntDivCompare8188E(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); u8 AntDivBeforeLink8188E(PADAPTER Adapter ); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8188e_hal.h000066400000000000000000000274531261122257400214310ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8188E_HAL_H__ #define __RTL8188E_HAL_H__ //#include "hal_com.h" #include "hal_data.h" //include HAL Related header after HAL Related compiling flags #include "rtl8188e_spec.h" #include "Hal8188EPhyReg.h" #include "Hal8188EPhyCfg.h" #include "rtl8188e_rf.h" #include "rtl8188e_dm.h" #include "rtl8188e_recv.h" #include "rtl8188e_xmit.h" #include "rtl8188e_cmd.h" #include "rtl8188e_led.h" #include "Hal8188EPwrSeq.h" #ifdef DBG_CONFIG_ERROR_DETECT #include "rtl8188e_sreset.h" #endif #if 0 // Fw Array #define Rtl8188E_FwImageArray Rtl8188EFwImgArray #define Rtl8188E_FWImgArrayLength Rtl8188EFWImgArrayLength #ifdef CONFIG_WOWLAN #define Rtl8188E_FwWoWImageArray Array_MP_8188E_FW_WoWLAN #define Rtl8188E_FwWoWImgArrayLength ArrayLength_MP_8188E_FW_WoWLAN #endif //CONFIG_WOWLAN #endif #define RTL8188E_FW_IMG "rtl8188e/FW_NIC.bin" #define RTL8188E_FW_WW_IMG "rtl8188e/FW_WoWLAN.bin" #define RTL8188E_PHY_REG "rtl8188e/PHY_REG.txt" #define RTL8188E_PHY_RADIO_A "rtl8188e/RadioA.txt" #define RTL8188E_PHY_RADIO_B "rtl8188e/RadioB.txt" #define RTL8188E_TXPWR_TRACK "rtl8188e/TxPowerTrack.txt" #define RTL8188E_AGC_TAB "rtl8188e/AGC_TAB.txt" #define RTL8188E_PHY_MACREG "rtl8188e/MAC_REG.txt" #define RTL8188E_PHY_REG_PG "rtl8188e/PHY_REG_PG.txt" #define RTL8188E_PHY_REG_MP "rtl8188e/PHY_REG_MP.txt" #define RTL8188E_TXPWR_LMT "rtl8188e/TXPWR_LMT.txt" //--------------------------------------------------------------------- // RTL8188E Power Configuration CMDs for USB/SDIO/PCIE interfaces //--------------------------------------------------------------------- #define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow #define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow #define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow #define Rtl8188E_NIC_ENABLE_FLOW rtl8188E_card_enable_flow #define Rtl8188E_NIC_SUSPEND_FLOW rtl8188E_suspend_flow #define Rtl8188E_NIC_RESUME_FLOW rtl8188E_resume_flow #define Rtl8188E_NIC_PDN_FLOW rtl8188E_hwpdn_flow #define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow #define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow #if 1 // download firmware related data structure #define MAX_FW_8188E_SIZE 0x8000 //32768,32k / 16384,16k #define FW_8188E_SIZE 0x4000 //16384,16k #define FW_8188E_SIZE_2 0x8000 //32768,32k #define FW_8188E_START_ADDRESS 0x1000 #define FW_8188E_END_ADDRESS 0x1FFF //0x5FFF #define IS_FW_HEADER_EXIST_88E(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88E0) typedef struct _RT_FIRMWARE_8188E { FIRMWARE_SOURCE eFWSource; #ifdef CONFIG_EMBEDDED_FWIMG u8* szFwBuffer; #else u8 szFwBuffer[MAX_FW_8188E_SIZE]; #endif u32 ulFwLength; } RT_FIRMWARE_8188E, *PRT_FIRMWARE_8188E; // // This structure must be cared byte-ordering // typedef struct _RT_8188E_FIRMWARE_HDR { // 8-byte alinment required //--- LONG WORD 0 ---- u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut u8 Category; // AP/NIC and USB/PCI u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions u16 Version; // FW Version u8 Subversion; // FW Subversion, default 0x00 u16 Rsvd1; //--- LONG WORD 1 ---- u8 Month; // Release time Month field u8 Date; // Release time Date field u8 Hour; // Release time Hour field u8 Minute; // Release time Minute field u16 RamCodeSize; // The size of RAM code u8 Foundry; u8 Rsvd2; //--- LONG WORD 2 ---- u32 SvnIdx; // The SVN entry index u32 Rsvd3; //--- LONG WORD 3 ---- u32 Rsvd4; u32 Rsvd5; }RT_8188E_FIRMWARE_HDR, *PRT_8188E_FIRMWARE_HDR; #endif // download firmware related data structure #define DRIVER_EARLY_INT_TIME_8188E 0x05 #define BCN_DMA_ATIME_INT_TIME_8188E 0x02 //#define MAX_RX_DMA_BUFFER_SIZE_88E 0x2400 //9k for 88E nornal chip , //MaxRxBuff=10k-max(TxReportSize(64*8), WOLPattern(16*24)) #define MAX_RX_DMA_BUFFER_SIZE_88E(__Adapter) ((!IS_VENDOR_8188E_I_CUT_SERIES(__Adapter))?0x2400:0x3C00) #define MAX_TX_REPORT_BUFFER_SIZE 0x0400 // 1k // Note: We will divide number of page equally for each queue other than public queue! // 22k = 22528 bytes = 176 pages (@page = 128 bytes) // must reserved about 7 pages for LPS => 176-7 = 169 (0xA9) // 2*BCN / 1*ps-poll / 1*null-data /1*prob_rsp /1*QOS null-data /1*BT QOS null-data #define BCNQ_PAGE_NUM_88E 0x08 //For WoWLan , more reserved page #ifdef CONFIG_WOWLAN #define WOWLAN_PAGE_NUM_88E 0x00 #else #define WOWLAN_PAGE_NUM_88E 0x00 #endif #define TX_TOTAL_PAGE_NUMBER_88E(_Adapter) ( (IS_VENDOR_8188E_I_CUT_SERIES(_Adapter)?0x100:0xB0) - BCNQ_PAGE_NUM_88E - WOWLAN_PAGE_NUM_88E) #define TX_PAGE_BOUNDARY_88E(_Adapter) (TX_TOTAL_PAGE_NUMBER_88E(_Adapter) + 1) #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_88E(_Adapter) TX_TOTAL_PAGE_NUMBER_88E(_Adapter) #define WMM_NORMAL_TX_PAGE_BOUNDARY_88E(_Adapter) (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_88E(_Adapter) + 1) // For Normal Chip Setting // (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723B #define NORMAL_PAGE_NUM_HPQ_88E 0x10 #define NORMAL_PAGE_NUM_LPQ_88E 0x10 #define NORMAL_PAGE_NUM_NPQ_88E 0x10 // Note: For Normal Chip Setting, modify later #define WMM_NORMAL_PAGE_NUM_HPQ_88E 0x29 #define WMM_NORMAL_PAGE_NUM_LPQ_88E 0x1C #define WMM_NORMAL_PAGE_NUM_NPQ_88E 0x1C //------------------------------------------------------------------------- // Chip specific //------------------------------------------------------------------------- #define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3) #define CHIP_BONDING_92C_1T2R 0x1 #define CHIP_BONDING_88C_USB_MCARD 0x2 #define CHIP_BONDING_88C_USB_HP 0x1 //------------------------------------------------------------------------- // Channel Plan //------------------------------------------------------------------------- #define EFUSE_REAL_CONTENT_LEN 512 #define EFUSE_MAP_LEN 128 #define EFUSE_MAX_SECTION 16 #define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. #define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN) // // // To prevent out of boundary programming case, // leave 1byte and program full section // 9bytes + 1byt + 5bytes and pre 1byte. // For worst case: // | 1byte|----8bytes----|1byte|--5bytes--| // | | Reserved(14bytes) | // #define EFUSE_OOB_PROTECT_BYTES 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. #define EFUSE_REAL_CONTENT_LEN_88E 256 #define EFUSE_MAP_LEN_88E 512 #define EFUSE_MAX_SECTION_88E 64 #define EFUSE_MAX_WORD_UNIT_88E 4 #define EFUSE_IC_ID_OFFSET_88E 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. #define AVAILABLE_EFUSE_ADDR_88E(addr) (addr < EFUSE_REAL_CONTENT_LEN_88E) // To prevent out of boundary programming case, leave 1byte and program full section // 9bytes + 1byt + 5bytes and pre 1byte. // For worst case: // | 2byte|----8bytes----|1byte|--7bytes--| //92D #define EFUSE_OOB_PROTECT_BYTES_88E 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. #define EFUSE_PROTECT_BYTES_BANK_88E 16 //======================================================== // EFUSE for BT definition //======================================================== #define EFUSE_BT_REAL_CONTENT_LEN 1536 // 512*3 #define EFUSE_BT_MAP_LEN 1024 // 1k bytes #define EFUSE_BT_MAX_SECTION 128 // 1024/8 #define EFUSE_PROTECT_BYTES_BANK 16 #define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) #define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) //#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) //#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) #ifdef CONFIG_PCI_HCI void InterruptRecognized8188EE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent); void UpdateInterruptMask8188EE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); #endif //CONFIG_PCI_HCI // rtl8188e_hal_init.c s32 rtl8188e_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); void _8051Reset88E(PADAPTER padapter); void rtl8188e_InitializeFirmwareVars(PADAPTER padapter); s32 InitLLTTable(PADAPTER padapter, u8 txpktbuf_bndy); // EFuse u8 GetEEPROMSize8188E(PADAPTER padapter); void Hal_InitPGData88E(PADAPTER padapter); void Hal_EfuseParseIDCode88E(PADAPTER padapter, u8 *hwinfo); void Hal_ReadTxPowerInfo88E(PADAPTER padapter,u8* hwinfo,BOOLEAN AutoLoadFail); void Hal_EfuseParseEEPROMVer88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void rtl8188e_EfuseParseChnlPlan(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_EfuseParseCustomerID88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_ReadAntennaDiversity88E (PADAPTER pAdapter,u8*PROMContent,BOOLEAN AutoLoadFail); void Hal_ReadThermalMeter_88E(PADAPTER Adapter,u8* PROMContent,BOOLEAN AutoloadFail); void Hal_EfuseParseXtal_8188E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); void Hal_EfuseParseBoardType88E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); void Hal_ReadPowerSavingMode88E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); BOOLEAN HalDetectPwrDownMode88E(PADAPTER Adapter); #ifdef CONFIG_WOWLAN void Hal_DetectWoWMode(PADAPTER pAdapter); #endif //CONFIG_WOWLAN //RT_CHANNEL_DOMAIN rtl8723a_HalMapChannelPlan(PADAPTER padapter, u8 HalChannelPlan); //VERSION_8192C rtl8723a_ReadChipVersion(PADAPTER padapter); //void rtl8723a_ReadBluetoothCoexistInfo(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoloadFail); void Hal_InitChannelPlan(PADAPTER padapter); #ifdef CONFIG_RF_GAIN_OFFSET void Hal_ReadRFGainOffset(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); #endif //CONFIG_RF_GAIN_OFFSET void rtl8188e_init_default_value(_adapter *adapter); void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc); // register void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); void rtl8188e_start_thread(_adapter *padapter); void rtl8188e_stop_thread(_adapter *padapter); void rtw_IOL_cmd_tx_pkt_buf_dump(ADAPTER *Adapter,int data_len); #ifdef CONFIG_IOL_EFUSE_PATCH s32 rtl8188e_iol_efuse_patch(PADAPTER padapter); #endif//CONFIG_IOL_EFUSE_PATCH void _InitTransferPageSize(PADAPTER padapter); void SetHwReg8188E(PADAPTER padapter, u8 variable, u8 *val); void GetHwReg8188E(PADAPTER padapter, u8 variable, u8 *val); void ResumeTxBeacon(PADAPTER padapter); void StopTxBeacon(PADAPTER padapter); u8 GetHalDefVar8188E( IN PADAPTER Adapter, IN HAL_DEF_VARIABLE eVariable, IN PVOID pValue ); #endif //__RTL8188E_HAL_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8188e_led.h000066400000000000000000000031611261122257400214170ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8188E_LED_H__ #define __RTL8188E_LED_H__ //================================================================================ // Interface to manipulate LED objects. //================================================================================ #ifdef CONFIG_USB_HCI void rtl8188eu_InitSwLeds(PADAPTER padapter); void rtl8188eu_DeInitSwLeds(PADAPTER padapter); #endif #ifdef CONFIG_PCI_HCI void rtl8188ee_InitSwLeds(PADAPTER padapter); void rtl8188ee_DeInitSwLeds(PADAPTER padapter); #endif #if defined (CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) void rtl8188es_InitSwLeds(PADAPTER padapter); void rtl8188es_DeInitSwLeds(PADAPTER padapter); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8188e_recv.h000066400000000000000000000065071261122257400216210ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8188E_RECV_H__ #define __RTL8188E_RECV_H__ #include #define TX_RPT1_PKT_LEN 8 typedef struct rxreport_8188e { //Offset 0 u32 pktlen:14; u32 crc32:1; u32 icverr:1; u32 drvinfosize:4; u32 security:3; u32 qos:1; u32 shift:2; u32 physt:1; u32 swdec:1; u32 ls:1; u32 fs:1; u32 eor:1; u32 own:1; //Offset 4 u32 macid:5; u32 tid:4; u32 hwrsvd:4; u32 amsdu:1; u32 paggr:1; u32 faggr:1; u32 a1fit:4; u32 a2fit:4; u32 pam:1; u32 pwr:1; u32 md:1; u32 mf:1; u32 type:2; u32 mc:1; u32 bc:1; //Offset 8 u32 seq:12; u32 frag:4; u32 nextpktlen:14; u32 nextind:1; u32 rsvd0831:1; //Offset 12 u32 rxmcs:6; u32 rxht:1; u32 gf:1; u32 splcp:1; u32 bw:1; u32 htc:1; u32 eosp:1; u32 bssidfit:2; u32 rpt_sel:2; u32 rsvd1216:13; u32 pattern_match:1; u32 unicastwake:1; u32 magicwake:1; //Offset 16 /* u32 pattern0match:1; u32 pattern1match:1; u32 pattern2match:1; u32 pattern3match:1; u32 pattern4match:1; u32 pattern5match:1; u32 pattern6match:1; u32 pattern7match:1; u32 pattern8match:1; u32 pattern9match:1; u32 patternamatch:1; u32 patternbmatch:1; u32 patterncmatch:1; u32 rsvd1613:19; */ u32 rsvd16; //Offset 20 u32 tsfl; //Offset 24 u32 bassn:12; u32 bavld:1; u32 rsvd2413:19; } RXREPORT, *PRXREPORT; #if defined (CONFIG_SDIO_HCI)||defined(CONFIG_GSPI_HCI) s32 rtl8188es_init_recv_priv(PADAPTER padapter); void rtl8188es_free_recv_priv(PADAPTER padapter); void rtl8188es_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); #endif #ifdef CONFIG_USB_HCI #define INTERRUPT_MSG_FORMAT_LEN 60 void rtl8188eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); s32 rtl8188eu_init_recv_priv(PADAPTER padapter); void rtl8188eu_free_recv_priv(PADAPTER padapter); void rtl8188eu_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); void rtl8188eu_recv_tasklet(void *priv); #endif #ifdef CONFIG_PCI_HCI s32 rtl8188ee_init_recv_priv(PADAPTER padapter); void rtl8188ee_free_recv_priv(PADAPTER padapter); #endif void rtl8188e_query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat); void rtl8188e_process_phy_info(PADAPTER padapter, void *prframe); void update_recvframe_phyinfo_88e(union recv_frame *precvframe,struct phy_stat *pphy_status); void update_recvframe_attrib_88e( union recv_frame *precvframe, struct recv_stat *prxstat); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8188e_rf.h000066400000000000000000000023101261122257400212550ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8188E_RF_H__ #define __RTL8188E_RF_H__ int PHY_RF6052_Config8188E( IN PADAPTER Adapter ); void rtl8188e_RF_ChangeTxPath( IN PADAPTER Adapter, IN u16 DataRate); void rtl8188e_PHY_RF6052SetBandwidth( IN PADAPTER Adapter, IN CHANNEL_WIDTH Bandwidth); #endif//__RTL8188E_RF_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8188e_spec.h000066400000000000000000000131461261122257400216110ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * *******************************************************************************/ #ifndef __RTL8188E_SPEC_H__ #define __RTL8188E_SPEC_H__ //============================================================ // 8188E Regsiter offset definition //============================================================ //============================================================ // //============================================================ //----------------------------------------------------- // // 0x0000h ~ 0x00FFh System Configuration // //----------------------------------------------------- #define REG_BB_PAD_CTRL 0x0064 #define REG_HMEBOX_E0 0x0088 #define REG_HMEBOX_E1 0x008A #define REG_HMEBOX_E2 0x008C #define REG_HMEBOX_E3 0x008E #define REG_HMEBOX_EXT_0 0x01F0 #define REG_HMEBOX_EXT_1 0x01F4 #define REG_HMEBOX_EXT_2 0x01F8 #define REG_HMEBOX_EXT_3 0x01FC #define REG_HIMR_88E 0x00B0 //RTL8188E #define REG_HISR_88E 0x00B4 //RTL8188E #define REG_HIMRE_88E 0x00B8 //RTL8188E #define REG_HISRE_88E 0x00BC //RTL8188E #define REG_MACID_NO_LINK_0 0x0484 #define REG_MACID_NO_LINK_1 0x0488 #define REG_MACID_PAUSE_0 0x048c #define REG_MACID_PAUSE_1 0x0490 //----------------------------------------------------- // // 0x0100h ~ 0x01FFh MACTOP General Configuration // //----------------------------------------------------- #define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) #define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) #define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) #define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN //----------------------------------------------------- // // 0x0200h ~ 0x027Fh TXDMA Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0280h ~ 0x02FFh RXDMA Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0300h ~ 0x03FFh PCIe // //----------------------------------------------------- //----------------------------------------------------- // // 0x0400h ~ 0x047Fh Protocol Configuration // //----------------------------------------------------- #ifdef CONFIG_WOWLAN #define REG_TXPKTBUF_IV_LOW 0x01a4 #define REG_TXPKTBUF_IV_HIGH 0x01a8 #endif //----------------------------------------------------- // // 0x0500h ~ 0x05FFh EDCA Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0600h ~ 0x07FFh WMAC Configuration // //----------------------------------------------------- #ifdef CONFIG_RF_GAIN_OFFSET #define EEPROM_RF_GAIN_OFFSET 0xC1 #define EEPROM_RF_GAIN_VAL 0xF6 #define EEPROM_THERMAL_OFFSET 0xF5 #endif //CONFIG_RF_GAIN_OFFSET //---------------------------------------------------------------------------- // 88E Driver Initialization Offload REG_FDHM0(Offset 0x88, 8 bits) //---------------------------------------------------------------------------- //IOL config for REG_FDHM0(Reg0x88) #define CMD_INIT_LLT BIT0 #define CMD_READ_EFUSE_MAP BIT1 #define CMD_EFUSE_PATCH BIT2 #define CMD_IOCONFIG BIT3 #define CMD_INIT_LLT_ERR BIT4 #define CMD_READ_EFUSE_MAP_ERR BIT5 #define CMD_EFUSE_PATCH_ERR BIT6 #define CMD_IOCONFIG_ERR BIT7 //----------------------------------------------------- // // Redifine register definition for compatibility // //----------------------------------------------------- // TODO: use these definition when using REG_xxx naming rule. // NOTE: DO NOT Remove these definition. Use later. #define ISR_88E REG_HISR_88E #ifdef CONFIG_PCI_HCI //#define IMR_RX_MASK (IMR_ROK_88E|IMR_RDU_88E|IMR_RXFOVW_88E) #define IMR_TX_MASK (IMR_VODOK_88E|IMR_VIDOK_88E|IMR_BEDOK_88E|IMR_BKDOK_88E|IMR_MGNTDOK_88E|IMR_HIGHDOK_88E|IMR_BCNDERR0_88E) #ifdef CONFIG_CONCURRENT_MODE #define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E | IMR_BCNDMAINT_E_88E) #else #define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E) #endif #define RT_AC_INT_MASKS (IMR_VIDOK_88E | IMR_VODOK_88E | IMR_BEDOK_88E|IMR_BKDOK_88E) #endif //======================================================== // General definitions //======================================================== #define MACID_NUM_88E 64 #define CAM_ENTRY_NUM_88E 32 //---------------------------------------------------------------------------- // 8192C EEPROM/EFUSE share register definition. //---------------------------------------------------------------------------- #define EFUSE_ACCESS_ON 0x69 // For RTL8723 only. #define EFUSE_ACCESS_OFF 0x00 // For RTL8723 only. #endif /* __RTL8188E_SPEC_H__ */ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8188e_sreset.h000066400000000000000000000022541261122257400221620ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTL8188E_SRESET_H_ #define _RTL8188E_SRESET_H_ #include #ifdef DBG_CONFIG_ERROR_DETECT extern void rtl8188e_sreset_xmit_status_check(_adapter *padapter); extern void rtl8188e_sreset_linked_status_check(_adapter *padapter); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8188e_xmit.h000066400000000000000000000172341261122257400216420ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8188E_XMIT_H__ #define __RTL8188E_XMIT_H__ //For 88e early mode #define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) #define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) #define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) #define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) #define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) #define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) #define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) // //defined for TX DESC Operation // #define MAX_TID (15) //OFFSET 0 #define OFFSET_SZ 0 #define OFFSET_SHT 16 #define BMC BIT(24) #define LSG BIT(26) #define FSG BIT(27) #define OWN BIT(31) //OFFSET 4 #define PKT_OFFSET_SZ 0 #define QSEL_SHT 8 #define RATE_ID_SHT 16 #define NAVUSEHDR BIT(20) #define SEC_TYPE_SHT 22 #define PKT_OFFSET_SHT 26 //OFFSET 8 #define AGG_EN BIT(12) #define AGG_BK BIT(16) #define AMPDU_DENSITY_SHT 20 #define ANTSEL_A BIT(24) #define ANTSEL_B BIT(25) #define TX_ANT_CCK_SHT 26 #define TX_ANTL_SHT 28 #define TX_ANT_HT_SHT 30 //OFFSET 12 #define SEQ_SHT 16 #define EN_HWSEQ BIT(31) //OFFSET 16 #define QOS BIT(6) #define HW_SSN BIT(7) #define USERATE BIT(8) #define DISDATAFB BIT(10) #define CTS_2_SELF BIT(11) #define RTS_EN BIT(12) #define HW_RTS_EN BIT(13) #define DATA_SHORT BIT(24) #define PWR_STATUS_SHT 15 #define DATA_SC_SHT 20 #define DATA_BW BIT(25) //OFFSET 20 #define RTY_LMT_EN BIT(17) //OFFSET 20 #define SGI BIT(6) #define USB_TXAGG_NUM_SHT 24 typedef struct txdesc_88e { //Offset 0 u32 pktlen:16; u32 offset:8; u32 bmc:1; u32 htc:1; u32 ls:1; u32 fs:1; u32 linip:1; u32 noacm:1; u32 gf:1; u32 own:1; //Offset 4 u32 macid:6; u32 rsvd0406:2; u32 qsel:5; u32 rd_nav_ext:1; u32 lsig_txop_en:1; u32 pifs:1; u32 rate_id:4; u32 navusehdr:1; u32 en_desc_id:1; u32 sectype:2; u32 rsvd0424:2; u32 pkt_offset:5; // unit: 8 bytes u32 rsvd0431:1; //Offset 8 u32 rts_rc:6; u32 data_rc:6; u32 agg_en:1; u32 rd_en:1; u32 bar_rty_th:2; u32 bk:1; u32 morefrag:1; u32 raw:1; u32 ccx:1; u32 ampdu_density:3; u32 bt_null:1; u32 ant_sel_a:1; u32 ant_sel_b:1; u32 tx_ant_cck:2; u32 tx_antl:2; u32 tx_ant_ht:2; //Offset 12 u32 nextheadpage:8; u32 tailpage:8; u32 seq:12; u32 cpu_handle:1; u32 tag1:1; u32 trigger_int:1; u32 hwseq_en:1; //Offset 16 u32 rtsrate:5; u32 ap_dcfe:1; u32 hwseq_sel:2; u32 userate:1; u32 disrtsfb:1; u32 disdatafb:1; u32 cts2self:1; u32 rtsen:1; u32 hw_rts_en:1; u32 port_id:1; u32 pwr_status:3; u32 wait_dcts:1; u32 cts2ap_en:1; u32 data_sc:2; u32 data_stbc:2; u32 data_short:1; u32 data_bw:1; u32 rts_short:1; u32 rts_bw:1; u32 rts_sc:2; u32 vcs_stbc:2; //Offset 20 u32 datarate:6; u32 sgi:1; u32 try_rate:1; u32 data_ratefb_lmt:5; u32 rts_ratefb_lmt:4; u32 rty_lmt_en:1; u32 data_rt_lmt:6; u32 usb_txagg_num:8; //Offset 24 u32 txagg_a:5; u32 txagg_b:5; u32 use_max_len:1; u32 max_agg_num:5; u32 mcsg1_max_len:4; u32 mcsg2_max_len:4; u32 mcsg3_max_len:4; u32 mcs7_sgi_max_len:4; //Offset 28 u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB) u32 sw0:8; /* offset 30 */ u32 sw1:4; u32 mcs15_sgi_max_len:4; }TXDESC_8188E, *PTXDESC_8188E; #define txdesc_set_ccx_sw_88e(txdesc, value) \ do { \ ((struct txdesc_88e *)(txdesc))->sw1 = (((value)>>8) & 0x0f); \ ((struct txdesc_88e *)(txdesc))->sw0 = ((value) & 0xff); \ } while (0) struct txrpt_ccx_88e { /* offset 0 */ u8 tag1:1; u8 pkt_num:3; u8 txdma_underflow:1; u8 int_bt:1; u8 int_tri:1; u8 int_ccx:1; /* offset 1 */ u8 mac_id:6; u8 pkt_ok:1; u8 bmc:1; /* offset 2 */ u8 retry_cnt:6; u8 lifetime_over:1; u8 retry_over:1; /* offset 3 */ u8 ccx_qtime0; u8 ccx_qtime1; /* offset 5 */ u8 final_data_rate; /* offset 6 */ u8 sw1:4; u8 qsel:4; /* offset 7 */ u8 sw0; }; #define txrpt_ccx_sw_88e(txrpt_ccx) ((txrpt_ccx)->sw0 + ((txrpt_ccx)->sw1<<8)) #define txrpt_ccx_qtime_88e(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8)) #define SET_TX_DESC_SEC_TYPE_8188E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) void rtl8188e_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen, u8 IsPsPoll,u8 IsBTQosNull, u8 bDataFrame); #if defined(CONFIG_SDIO_HCI)||defined (CONFIG_GSPI_HCI) s32 rtl8188es_init_xmit_priv(PADAPTER padapter); void rtl8188es_free_xmit_priv(PADAPTER padapter); s32 rtl8188es_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); s32 rtl8188es_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); s32 rtl8188es_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); thread_return rtl8188es_xmit_thread(thread_context context); s32 rtl8188es_xmit_buf_handler(PADAPTER padapter); #ifdef CONFIG_SDIO_TX_TASKLET void rtl8188es_xmit_tasklet(void *priv); #endif #endif #ifdef CONFIG_USB_HCI s32 rtl8188eu_init_xmit_priv(PADAPTER padapter); void rtl8188eu_free_xmit_priv(PADAPTER padapter); s32 rtl8188eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); s32 rtl8188eu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); s32 rtl8188eu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter); void rtl8188eu_xmit_tasklet(void *priv); s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); #endif #ifdef CONFIG_PCI_HCI s32 rtl8188ee_init_xmit_priv(PADAPTER padapter); void rtl8188ee_free_xmit_priv(PADAPTER padapter); void rtl8188ee_xmitframe_resume(_adapter *padapter); s32 rtl8188ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); s32 rtl8188ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); s32 rtl8188ee_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); void rtl8188ee_xmit_tasklet(void *priv); #endif #ifdef CONFIG_TX_EARLY_MODE void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ); #endif #ifdef CONFIG_XMIT_ACK void dump_txrpt_ccx_88e(void *buf); void handle_txrpt_ccx_88e(_adapter *adapter, u8 *buf); #else #define dump_txrpt_ccx_88e(buf) do {} while(0) #define handle_txrpt_ccx_88e(adapter, buf) do {} while(0) #endif //CONFIG_XMIT_ACK void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); #endif //__RTL8188E_XMIT_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192c_cmd.h000066400000000000000000000057251261122257400214170ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8192C_CMD_H_ #define __RTL8192C_CMD_H_ enum cmd_msg_element_id { NONE_CMDMSG_EID, AP_OFFLOAD_EID=0, SET_PWRMODE_EID=1, JOINBSS_RPT_EID=2, RSVD_PAGE_EID=3, RSSI_4_EID = 4, RSSI_SETTING_EID=5, MACID_CONFIG_EID=6, MACID_PS_MODE_EID=7, P2P_PS_OFFLOAD_EID=8, SELECTIVE_SUSPEND_ROF_CMD=9, P2P_PS_CTW_CMD_EID=32, H2C_92C_IO_OFFLOAD=44, H2C_92C_TSF_SYNC=67, H2C_92C_DISABLE_BCN_FUNC=68, H2C_92C_RESET_TSF = 75, H2C_92C_CMD_MAX }; struct cmd_msg_parm { u8 eid; //element id u8 sz; // sz u8 buf[6]; }; typedef struct _SETPWRMODE_PARM{ u8 Mode; u8 SmartPS; u8 BcnPassTime; // unit: 100ms }SETPWRMODE_PARM, *PSETPWRMODE_PARM; struct H2C_SS_RFOFF_PARAM{ u8 ROFOn; // 1: on, 0:off u16 gpio_period; // unit: 1024 us }__attribute__ ((packed)); typedef struct JOINBSSRPT_PARM_92C{ u8 OpMode; // RT_MEDIA_STATUS }JOINBSSRPT_PARM_92C, *PJOINBSSRPT_PARM_92C; typedef struct _RSVDPAGE_LOC_92C{ u8 LocProbeRsp; u8 LocPsPoll; u8 LocNullData; }RSVDPAGE_LOC_92C, *PRSVDPAGE_LOC_92C; // host message to firmware cmd void rtl8192c_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode); void rtl8192c_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus); u8 rtl8192c_set_rssi_cmd(_adapter*padapter, u8 *param); void rtl8192c_set_raid_cmd(_adapter*padapter, u32 mask, u8* arg); void rtl8192c_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8* arg, u8 rssi_level); u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter*padapter,u8 bfwpoll, u16 period); int rtl8192c_FillH2CCmd(_adapter* padapter, u8 ElementID, u32 CmdLen, u8* pCmdBuffer); #ifdef CONFIG_P2P void rtl8192c_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state); #endif //CONFIG_P2P #ifdef CONFIG_IOL int rtl8192c_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt); #endif //CONFIG_IOL #ifdef CONFIG_BEACON_DISABLE_OFFLOAD u8 rtl8192c_dis_beacon_fun_cmd(_adapter* padapter); #endif // CONFIG_BEACON_DISABLE_OFFLOAD #ifdef CONFIG_TSF_RESET_OFFLOAD int reset_tsf(PADAPTER Adapter, u8 reset_port ); #endif // CONFIG_TSF_RESET_OFFLOAD #endif // __RTL8192C_CMD_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192c_dm.h000066400000000000000000000061111261122257400212420ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8192C_DM_H__ #define __RTL8192C_DM_H__ //============================================================ // Description: // // This file is for 92CE/92CU dynamic mechanism only // // //============================================================ //============================================================ // function prototype //============================================================ typedef enum _BT_CurState{ BT_OFF = 0, BT_ON = 1, } BT_CurState, *PBT_CurState; typedef enum _BT_ServiceType{ BT_SCO = 0, BT_A2DP = 1, BT_HID = 2, BT_HID_Idle = 3, BT_Scan = 4, BT_Idle = 5, BT_OtherAction = 6, BT_Busy = 7, BT_OtherBusy = 8, BT_PAN = 9, } BT_ServiceType, *PBT_ServiceType; struct btcoexist_priv { u8 BT_Coexist; u8 BT_Ant_Num; u8 BT_CoexistType; u8 BT_State; u8 BT_CUR_State; //0:on, 1:off u8 BT_Ant_isolation; //0:good, 1:bad u8 BT_PapeCtrl; //0:SW, 1:SW/HW dynamic u8 BT_Service; u8 BT_Ampdu; // 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU. u8 BT_RadioSharedType; u32 Ratio_Tx; u32 Ratio_PRI; u8 BtRfRegOrigin1E; u8 BtRfRegOrigin1F; u8 BtRssiState; u32 BtEdcaUL; u32 BtEdcaDL; u32 BT_EDCA[2]; u8 bCOBT; u8 bInitSet; u8 bBTBusyTraffic; u8 bBTTrafficModeSet; u8 bBTNonTrafficModeSet; //BTTraffic BT21TrafficStatistics; u32 CurrentState; u32 PreviousState; u8 BtPreRssiState; u8 bFWCoexistAllOff; u8 bSWCoexistAllOff; }; //============================================================ // structure and define //============================================================ //============================================================ // function prototype //============================================================ #ifdef CONFIG_BT_COEXIST void rtl8192c_set_dm_bt_coexist(_adapter *padapter, u8 bStart); void rtl8192c_issue_delete_ba(_adapter *padapter, u8 dir); #endif void rtl8192c_init_dm_priv(IN PADAPTER Adapter); void rtl8192c_deinit_dm_priv(IN PADAPTER Adapter); void rtl8192c_InitHalDm( IN PADAPTER Adapter); void rtl8192c_HalDmWatchDog(IN PADAPTER Adapter); #endif //__HAL8190PCIDM_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192c_event.h000066400000000000000000000017611261122257400217710ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTL8192C_EVENT_H_ #define _RTL8192C_EVENT_H_ #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192c_hal.h000066400000000000000000000426161261122257400214200ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8192C_HAL_H__ #define __RTL8192C_HAL_H__ //#include "hal_com.h" #include "hal_data.h" #include "drv_types.h" #include "rtl8192c_spec.h" #include "Hal8192CPhyReg.h" #include "Hal8192CPhyCfg.h" #include "rtl8192c_rf.h" #include "rtl8192c_dm.h" #include "rtl8192c_recv.h" #include "rtl8192c_xmit.h" #include "rtl8192c_cmd.h" #include "rtl8192c_led.h" #ifdef DBG_CONFIG_ERROR_DETECT #include "rtl8192c_sreset.h" #endif #ifdef CONFIG_PCI_HCI #define RTL819X_DEFAULT_RF_TYPE RF_2T2R //#define RTL819X_DEFAULT_RF_TYPE RF_1T2R #define RTL819X_TOTAL_RF_PATH 2 //2TODO: The following need to check!! #define RTL8192C_FW_TSMC_IMG "rtl8192CE\\rtl8192cfwT.bin" #define RTL8192C_FW_UMC_IMG "rtl8192CE\\rtl8192cfwU.bin" #define RTL8192C_FW_UMC_B_IMG "rtl8192CE\\rtl8192cfwU_B.bin" #define RTL8188C_PHY_REG "rtl8192CE\\PHY_REG_1T.txt" #define RTL8188C_PHY_RADIO_A "rtl8192CE\\radio_a_1T.txt" #define RTL8188C_PHY_RADIO_B "rtl8192CE\\radio_b_1T.txt" #define RTL8188C_AGC_TAB "rtl8192CE\\AGC_TAB_1T.txt" #define RTL8188C_PHY_MACREG "rtl8192CE\\MACREG_1T.txt" #define RTL8192C_PHY_REG "rtl8192CE\\PHY_REG_2T.txt" #define RTL8192C_PHY_RADIO_A "rtl8192CE\\radio_a_2T.txt" #define RTL8192C_PHY_RADIO_B "rtl8192CE\\radio_b_2T.txt" #define RTL8192C_AGC_TAB "rtl8192CE\\AGC_TAB_2T.txt" #define RTL8192C_PHY_MACREG "rtl8192CE\\MACREG_2T.txt" #define RTL819X_PHY_MACPHY_REG "rtl8192CE\\MACPHY_reg.txt" #define RTL819X_PHY_MACPHY_REG_PG "rtl8192CE\\MACPHY_reg_PG.txt" #define RTL819X_PHY_MACREG "rtl8192CE\\MAC_REG.txt" #define RTL819X_PHY_REG "rtl8192CE\\PHY_REG.txt" #define RTL819X_PHY_REG_1T2R "rtl8192CE\\PHY_REG_1T2R.txt" #define RTL819X_PHY_REG_to1T1R "rtl8192CE\\phy_to1T1R_a.txt" #define RTL819X_PHY_REG_to1T2R "rtl8192CE\\phy_to1T2R.txt" #define RTL819X_PHY_REG_to2T2R "rtl8192CE\\phy_to2T2R.txt" #define RTL819X_PHY_REG_PG "rtl8192CE\\PHY_REG_PG.txt" #define RTL819X_AGC_TAB "rtl8192CE\\AGC_TAB.txt" #define RTL819X_PHY_RADIO_A "rtl8192CE\\radio_a.txt" #define RTL819X_PHY_RADIO_A_1T "rtl8192CE\\radio_a_1t.txt" #define RTL819X_PHY_RADIO_A_2T "rtl8192CE\\radio_a_2t.txt" #define RTL819X_PHY_RADIO_B "rtl8192CE\\radio_b.txt" #define RTL819X_PHY_RADIO_B_GM "rtl8192CE\\radio_b_gm.txt" #define RTL819X_PHY_RADIO_C "rtl8192CE\\radio_c.txt" #define RTL819X_PHY_RADIO_D "rtl8192CE\\radio_d.txt" #define RTL819X_EEPROM_MAP "rtl8192CE\\8192ce.map" #define RTL819X_EFUSE_MAP "rtl8192CE\\8192ce.map" //--------------------------------------------------------------------- // RTL8723E From file //--------------------------------------------------------------------- // The file name "_2T" is for 92CE, "_1T" is for 88CE. Modified by tynli. 2009.11.24. #define Rtl819XFwTSMCImageArray Rtl8192CEFwTSMCImgArray #define Rtl819XFwUMCACutImageArray Rtl8192CEFwUMCACutImgArray #define Rtl819XFwUMCBCutImageArray Rtl8192CEFwUMCBCutImgArray // #define Rtl8723FwUMCImageArray Rtl8192CEFwUMC8723ImgArray #define Rtl819XMAC_Array Rtl8192CEMAC_2T_Array #define Rtl819XAGCTAB_2TArray Rtl8192CEAGCTAB_2TArray #define Rtl819XAGCTAB_1TArray Rtl8192CEAGCTAB_1TArray #define Rtl819XPHY_REG_2TArray Rtl8192CEPHY_REG_2TArray #define Rtl819XPHY_REG_1TArray Rtl8192CEPHY_REG_1TArray #define Rtl819XRadioA_2TArray Rtl8192CERadioA_2TArray #define Rtl819XRadioA_1TArray Rtl8192CERadioA_1TArray #define Rtl819XRadioB_2TArray Rtl8192CERadioB_2TArray #define Rtl819XRadioB_1TArray Rtl8192CERadioB_1TArray #define Rtl819XPHY_REG_Array_PG Rtl8192CEPHY_REG_Array_PG #define Rtl819XPHY_REG_Array_MP Rtl8192CEPHY_REG_Array_MP #define PHY_REG_2TArrayLength Rtl8192CEPHY_REG_2TArrayLength #define PHY_REG_1TArrayLength Rtl8192CEPHY_REG_1TArrayLength #define PHY_ChangeTo_1T1RArrayLength Rtl8192CEPHY_ChangeTo_1T1RArrayLength #define PHY_ChangeTo_1T2RArrayLength Rtl8192CEPHY_ChangeTo_1T2RArrayLength #define PHY_ChangeTo_2T2RArrayLength Rtl8192CEPHY_ChangeTo_2T2RArrayLength #define PHY_REG_Array_PGLength Rtl8192CEPHY_REG_Array_PGLength //#define PHY_REG_Array_PG_mCardLength Rtl8192CEPHY_REG_Array_PG_mCardLength #define PHY_REG_Array_MPLength Rtl8192CEPHY_REG_Array_MPLength #define PHY_REG_Array_MPLength Rtl8192CEPHY_REG_Array_MPLength //#define PHY_REG_1T_mCardArrayLength Rtl8192CEPHY_REG_1T_mCardArrayLength //#define PHY_REG_2T_mCardArrayLength Rtl8192CEPHY_REG_2T_mCardArrayLength //#define PHY_REG_Array_PG_HPLength Rtl8192CEPHY_REG_Array_PG_HPLength #define RadioA_2TArrayLength Rtl8192CERadioA_2TArrayLength #define RadioB_2TArrayLength Rtl8192CERadioB_2TArrayLength #define RadioA_1TArrayLength Rtl8192CERadioA_1TArrayLength #define RadioB_1TArrayLength Rtl8192CERadioB_1TArrayLength //#define RadioA_1T_mCardArrayLength Rtl8192CERadioA_1T_mCardArrayLength //#define RadioB_1T_mCardArrayLength Rtl8192CERadioB_1T_mCardArrayLength //#define RadioA_1T_HPArrayLength Rtl8192CERadioA_1T_HPArrayLength #define RadioB_GM_ArrayLength Rtl8192CERadioB_GM_ArrayLength #define MAC_2T_ArrayLength Rtl8192CEMAC_2T_ArrayLength #define MACPHY_Array_PGLength Rtl8192CEMACPHY_Array_PGLength #define AGCTAB_2TArrayLength Rtl8192CEAGCTAB_2TArrayLength #define AGCTAB_1TArrayLength Rtl8192CEAGCTAB_1TArrayLength //#define AGCTAB_1T_HPArrayLength Rtl8192CEAGCTAB_1T_HPArrayLength #elif defined(CONFIG_USB_HCI) //2TODO: We should define 8192S firmware related macro settings here!! #define RTL819X_DEFAULT_RF_TYPE RF_1T2R #define RTL819X_TOTAL_RF_PATH 2 //TODO: The following need to check!! #define RTL8192C_FW_TSMC_IMG "rtl8192CU\\rtl8192cfwT.bin" #define RTL8192C_FW_UMC_IMG "rtl8192CU\\rtl8192cfwU.bin" #define RTL8192C_FW_UMC_B_IMG "rtl8192CU\\rtl8192cfwU_B.bin" //#define RTL819X_FW_BOOT_IMG "rtl8192CU\\boot.img" //#define RTL819X_FW_MAIN_IMG "rtl8192CU\\main.img" //#define RTL819X_FW_DATA_IMG "rtl8192CU\\data.img" #define RTL8188C_PHY_REG "rtl8188CU\\PHY_REG.txt" #define RTL8188C_PHY_RADIO_A "rtl8188CU\\radio_a.txt" #define RTL8188C_PHY_RADIO_B "rtl8188CU\\radio_b.txt" #define RTL8188C_PHY_RADIO_A_mCard "rtl8192CU\\radio_a_1T_mCard.txt" #define RTL8188C_PHY_RADIO_B_mCard "rtl8192CU\\radio_b_1T_mCard.txt" #define RTL8188C_PHY_RADIO_A_HP "rtl8192CU\\radio_a_1T_HP.txt" #define RTL8188C_AGC_TAB "rtl8188CU\\AGC_TAB.txt" #define RTL8188C_PHY_MACREG "rtl8188CU\\MACREG.txt" #define RTL8192C_PHY_REG "rtl8192CU\\PHY_REG.txt" #define RTL8192C_PHY_RADIO_A "rtl8192CU\\radio_a.txt" #define RTL8192C_PHY_RADIO_B "rtl8192CU\\radio_b.txt" #define RTL8192C_AGC_TAB "rtl8192CU\\AGC_TAB.txt" #define RTL8192C_PHY_MACREG "rtl8192CU\\MACREG.txt" #define RTL819X_PHY_REG_PG "rtl8192CU\\PHY_REG_PG.txt" //--------------------------------------------------------------------- // RTL8723U From file //--------------------------------------------------------------------- // The file name "_2T" is for 92CU, "_1T" is for 88CU. Modified by tynli. 2009.11.24. #define Rtl819XFwImageArray Rtl8192CUFwTSMCImgArray #define Rtl819XFwTSMCImageArray Rtl8192CUFwTSMCImgArray #define Rtl819XFwUMCACutImageArray Rtl8192CUFwUMCACutImgArray #define Rtl819XFwUMCBCutImageArray Rtl8192CUFwUMCBCutImgArray #define Rtl819XMAC_Array Rtl8192CUMAC_2T_Array #define Rtl819XAGCTAB_2TArray Rtl8192CUAGCTAB_2TArray #define Rtl819XAGCTAB_1TArray Rtl8192CUAGCTAB_1TArray #define Rtl819XAGCTAB_1T_HPArray Rtl8192CUAGCTAB_1T_HPArray #define Rtl819XPHY_REG_2TArray Rtl8192CUPHY_REG_2TArray #define Rtl819XPHY_REG_1TArray Rtl8192CUPHY_REG_1TArray #define Rtl819XPHY_REG_1T_mCardArray Rtl8192CUPHY_REG_1T_mCardArray #define Rtl819XPHY_REG_2T_mCardArray Rtl8192CUPHY_REG_2T_mCardArray #define Rtl819XPHY_REG_1T_HPArray Rtl8192CUPHY_REG_1T_HPArray #define Rtl819XRadioA_2TArray Rtl8192CURadioA_2TArray #define Rtl819XRadioA_1TArray Rtl8192CURadioA_1TArray #define Rtl819XRadioA_1T_mCardArray Rtl8192CURadioA_1T_mCardArray #define Rtl819XRadioB_2TArray Rtl8192CURadioB_2TArray #define Rtl819XRadioB_1TArray Rtl8192CURadioB_1TArray #define Rtl819XRadioB_1T_mCardArray Rtl8192CURadioB_1T_mCardArray #define Rtl819XRadioA_1T_HPArray Rtl8192CURadioA_1T_HPArray #define Rtl819XPHY_REG_Array_PG Rtl8192CUPHY_REG_Array_PG #define Rtl819XPHY_REG_Array_PG_mCard Rtl8192CUPHY_REG_Array_PG_mCard #define Rtl819XPHY_REG_Array_PG_HP Rtl8192CUPHY_REG_Array_PG_HP #define Rtl819XPHY_REG_Array_MP Rtl8192CUPHY_REG_Array_MP #define PHY_REG_2TArrayLength Rtl8192CUPHY_REG_2TArrayLength #define PHY_REG_1TArrayLength Rtl8192CUPHY_REG_1TArrayLength #define PHY_ChangeTo_1T1RArrayLength Rtl8192CUPHY_ChangeTo_1T1RArrayLength #define PHY_ChangeTo_1T2RArrayLength Rtl8192CUPHY_ChangeTo_1T2RArrayLength #define PHY_ChangeTo_2T2RArrayLength Rtl8192CUPHY_ChangeTo_2T2RArrayLength #define PHY_REG_Array_PGLength Rtl8192CUPHY_REG_Array_PGLength #define PHY_REG_Array_PG_mCardLength Rtl8192CUPHY_REG_Array_PG_mCardLength #define PHY_REG_Array_MPLength Rtl8192CUPHY_REG_Array_MPLength #define PHY_REG_Array_MPLength Rtl8192CUPHY_REG_Array_MPLength #define PHY_REG_1T_mCardArrayLength Rtl8192CUPHY_REG_1T_mCardArrayLength #define PHY_REG_2T_mCardArrayLength Rtl8192CUPHY_REG_2T_mCardArrayLength #define PHY_REG_Array_PG_HPLength Rtl8192CUPHY_REG_Array_PG_HPLength #define RadioA_2TArrayLength Rtl8192CURadioA_2TArrayLength #define RadioB_2TArrayLength Rtl8192CURadioB_2TArrayLength #define RadioA_1TArrayLength Rtl8192CURadioA_1TArrayLength #define RadioB_1TArrayLength Rtl8192CURadioB_1TArrayLength #define RadioA_1T_mCardArrayLength Rtl8192CURadioA_1T_mCardArrayLength #define RadioB_1T_mCardArrayLength Rtl8192CURadioB_1T_mCardArrayLength #define RadioA_1T_HPArrayLength Rtl8192CURadioA_1T_HPArrayLength #define RadioB_GM_ArrayLength Rtl8192CURadioB_GM_ArrayLength #define MAC_2T_ArrayLength Rtl8192CUMAC_2T_ArrayLength #define MACPHY_Array_PGLength Rtl8192CUMACPHY_Array_PGLength #define AGCTAB_2TArrayLength Rtl8192CUAGCTAB_2TArrayLength #define AGCTAB_1TArrayLength Rtl8192CUAGCTAB_1TArrayLength #define AGCTAB_1T_HPArrayLength Rtl8192CUAGCTAB_1T_HPArrayLength #define PHY_REG_1T_HPArrayLength Rtl8192CUPHY_REG_1T_HPArrayLength #endif #define FW_8192C_SIZE 16384+32//16k #define FW_8192C_START_ADDRESS 0x1000 //#define FW_8192C_END_ADDRESS 0x3FFF //Filen said this is for test chip #define FW_8192C_END_ADDRESS 0x1FFF #define IS_FW_HEADER_EXIST_92C(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\ (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\ (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x2300) typedef struct _RT_FIRMWARE_8192C{ FIRMWARE_SOURCE eFWSource; u8* szFwBuffer; u32 ulFwLength; } RT_FIRMWARE_8192C, *PRT_FIRMWARE_8192C; // // This structure must be cared byte-ordering // // Added by tynli. 2009.12.04. typedef struct _RT_8192C_FIRMWARE_HDR {//8-byte alinment required //--- LONG WORD 0 ---- u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut u8 Category; // AP/NIC and USB/PCI u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions u16 Version; // FW Version u8 Subversion; // FW Subversion, default 0x00 u16 Rsvd1; //--- LONG WORD 1 ---- u8 Month; // Release time Month field u8 Date; // Release time Date field u8 Hour; // Release time Hour field u8 Minute; // Release time Minute field u16 RamCodeSize; // The size of RAM code u16 Rsvd2; //--- LONG WORD 2 ---- u32 SvnIdx; // The SVN entry index u32 Rsvd3; //--- LONG WORD 3 ---- u32 Rsvd4; u32 Rsvd5; }RT_8192C_FIRMWARE_HDR, *PRT_8192C_FIRMWARE_HDR; #define DRIVER_EARLY_INT_TIME_8192C 0x05 #define BCN_DMA_ATIME_INT_TIME_8192C 0x02 // Note: We will divide number of page equally for each queue other than public queue! #define TX_TOTAL_PAGE_NUMBER_8192C 0xF8 #define TX_PAGE_BOUNDARY (TX_TOTAL_PAGE_NUMBER_8192C + 1) // For Normal Chip Setting // (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8192C #define NORMAL_PAGE_NUM_PUBQ 0xE7 #define NORMAL_PAGE_NUM_HPQ 0x0C #define NORMAL_PAGE_NUM_LPQ 0x02 #define NORMAL_PAGE_NUM_NPQ 0x02 // For Test Chip Setting // (HPQ + LPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8192C #define TEST_PAGE_NUM_PUBQ 0x7E // For Test Chip Setting #define WMM_TEST_TX_TOTAL_PAGE_NUMBER 0xF5 #define WMM_TEST_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6 #define WMM_TEST_PAGE_NUM_PUBQ 0xA3 #define WMM_TEST_PAGE_NUM_HPQ 0x29 #define WMM_TEST_PAGE_NUM_LPQ 0x29 //Note: For Normal Chip Setting ,modify later #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER 0xF5 #define WMM_NORMAL_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6 #define WMM_NORMAL_PAGE_NUM_PUBQ 0xB0 #define WMM_NORMAL_PAGE_NUM_HPQ 0x29 #define WMM_NORMAL_PAGE_NUM_LPQ 0x1C #define WMM_NORMAL_PAGE_NUM_NPQ 0x1C //------------------------------------------------------------------------- // Chip specific //------------------------------------------------------------------------- #define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3) #define CHIP_BONDING_92C_1T2R 0x1 #define CHIP_BONDING_88C_USB_MCARD 0x2 #define CHIP_BONDING_88C_USB_HP 0x1 //------------------------------------------------------------------------- // Channel Plan //------------------------------------------------------------------------- #define EFUSE_REAL_CONTENT_LEN 512 #define EFUSE_MAP_LEN 128 #define EFUSE_MAX_SECTION 16 #define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. #define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN) // // To prevent out of boundary programming case, leave 1byte and program full section // 9bytes + 1byt + 5bytes and pre 1byte. // For worst case: // | 1byte|----8bytes----|1byte|--5bytes--| // | | Reserved(14bytes) | // #define EFUSE_OOB_PROTECT_BYTES 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. #define EFUSE_MAP_LEN_8723 256 #define EFUSE_MAX_SECTION_8723 32 //======================================================== // EFUSE for BT definition //======================================================== #define EFUSE_BT_REAL_CONTENT_LEN 1536 // 512*3 #define EFUSE_BT_MAP_LEN 1024 // 1k bytes #define EFUSE_BT_MAX_SECTION 128 // 1024/8 #define EFUSE_PROTECT_BYTES_BANK 16 enum c2h_id_8192c { C2H_DBG = 0, C2H_TSF = 1, C2H_AP_RPT_RSP = 2, C2H_CCX_TX_RPT = 3, C2H_BT_RSSI = 4, C2H_BT_OP_MODE = 5, C2H_EXT_RA_RPT = 6, C2H_HW_INFO_EXCH = 10, C2H_C2H_H2C_TEST = 11, C2H_BT_INFO = 12, C2H_BT_MP_INFO = 15, MAX_C2HEVENT }; #ifdef CONFIG_PCI_HCI // // Function disabled. // #define DF_TX_BIT BIT0 #define DF_RX_BIT BIT1 #define DF_IO_BIT BIT2 #define DF_IO_D3_BIT BIT3 #define RT_DF_TYPE u32 //#define RT_DISABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions |= ((RT_DF_TYPE)(__FuncBits))) //#define RT_ENABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions &= (~((RT_DF_TYPE)(__FuncBits)))) //#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) #define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) void InterruptRecognized8192CE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent); VOID UpdateInterruptMask8192CE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); #endif #define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) #define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) VOID rtl8192c_FirmwareSelfReset(IN PADAPTER Adapter); int FirmwareDownload92C(IN PADAPTER Adapter); VOID InitializeFirmwareVars92C(PADAPTER Adapter); u8 GetEEPROMSize8192C(PADAPTER Adapter); void rtl8192c_EfuseParseChnlPlan(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); HAL_VERSION rtl8192c_ReadChipVersion(IN PADAPTER Adapter); void rtl8192c_ReadBluetoothCoexistInfo(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); VOID rtl8192c_EfuseParseIDCode(PADAPTER pAdapter, u8 *hwinfo); void rtl8192c_init_default_value(_adapter *adapter); void rtl8192c_set_hal_ops(struct hal_ops *pHalFunc); s32 c2h_id_filter_ccx_8192c(u8 *buf); void SetHwReg8192C(PADAPTER padapter, u8 variable, u8 *val); void GetHwReg8192C(PADAPTER padapter, u8 variable, u8 *val); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192c_led.h000066400000000000000000000026531261122257400214150ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8192C_LED_H_ #define __RTL8192C_LED_H_ //================================================================================ // Interface to manipulate LED objects. //================================================================================ #ifdef CONFIG_USB_HCI void rtl8192cu_InitSwLeds(_adapter *padapter); void rtl8192cu_DeInitSwLeds(_adapter *padapter); #endif #ifdef CONFIG_PCI_HCI void rtl8192ce_InitSwLeds(_adapter *padapter); void rtl8192ce_DeInitSwLeds(_adapter *padapter); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192c_recv.h000066400000000000000000000057221261122257400216100ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTL8192C_RECV_H_ #define _RTL8192C_RECV_H_ #define RECV_BLK_SZ 512 #define RECV_BLK_CNT 16 #define RECV_BLK_TH RECV_BLK_CNT #if defined(CONFIG_USB_HCI) #ifndef MAX_RECVBUF_SZ #ifdef PLATFORM_OS_CE #define MAX_RECVBUF_SZ (8192+1024) // 8K+1k #else #ifndef CONFIG_MINIMAL_MEMORY_USAGE //#define MAX_RECVBUF_SZ (32768) // 32k //#define MAX_RECVBUF_SZ (16384) //16K //#define MAX_RECVBUF_SZ (10240) //10K #ifdef CONFIG_PLATFORM_MSTAR #define MAX_RECVBUF_SZ (8192) // 8K #else #define MAX_RECVBUF_SZ (15360) // 15k < 16k #endif //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k #else #define MAX_RECVBUF_SZ (4000) // about 4K #endif #endif #endif //!MAX_RECVBUF_SZ #elif defined(CONFIG_PCI_HCI) //#ifndef CONFIG_MINIMAL_MEMORY_USAGE // #define MAX_RECVBUF_SZ (9100) //#else #define MAX_RECVBUF_SZ (4000) // about 4K //#endif #elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) #define MAX_RECVBUF_SZ (10240) #endif struct phy_stat { unsigned int phydw0; unsigned int phydw1; unsigned int phydw2; unsigned int phydw3; unsigned int phydw4; unsigned int phydw5; unsigned int phydw6; unsigned int phydw7; }; // Rx smooth factor #define Rx_Smooth_Factor (20) #ifdef CONFIG_USB_HCI typedef struct _INTERRUPT_MSG_FORMAT_EX{ unsigned int C2H_MSG0; unsigned int C2H_MSG1; unsigned int C2H_MSG2; unsigned int C2H_MSG3; unsigned int HISR; // from HISR Reg0x124, read to clear unsigned int HISRE;// from HISRE Reg0x12c, read to clear unsigned int MSG_EX; }INTERRUPT_MSG_FORMAT_EX,*PINTERRUPT_MSG_FORMAT_EX; void rtl8192cu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); int rtl8192cu_init_recv_priv(_adapter * padapter); void rtl8192cu_free_recv_priv(_adapter * padapter); #endif #ifdef CONFIG_PCI_HCI int rtl8192ce_init_recv_priv(_adapter * padapter); void rtl8192ce_free_recv_priv(_adapter * padapter); #endif void rtl8192c_translate_rx_signal_stuff(union recv_frame *precvframe, struct phy_stat *pphy_status); void rtl8192c_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *pdesc); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192c_rf.h000066400000000000000000000031031261122257400212470ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTL8192C_RF_H_ #define _RTL8192C_RF_H_ // // RF RL6052 Series API // void rtl8192c_RF_ChangeTxPath( IN PADAPTER Adapter, IN u16 DataRate); void rtl8192c_PHY_RF6052SetBandwidth( IN PADAPTER Adapter, IN CHANNEL_WIDTH Bandwidth); VOID rtl8192c_PHY_RF6052SetCckTxPower( IN PADAPTER Adapter, IN u8* pPowerlevel); VOID rtl8192c_PHY_RF6052SetOFDMTxPower( IN PADAPTER Adapter, IN u8* pPowerLevel, IN u8 Channel); int PHY_RF6052_Config8192C( IN PADAPTER Adapter ); /*--------------------------Exported Function prototype---------------------*/ #endif/* End of HalRf.h */ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192c_spec.h000066400000000000000000000075641261122257400216110ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8192C_SPEC_H__ #define __RTL8192C_SPEC_H__ #include //============================================================ // 8192C Regsiter offset definition //============================================================ //============================================================ // //============================================================ //----------------------------------------------------- // // 0x0000h ~ 0x00FFh System Configuration // //----------------------------------------------------- #define REG_HMEBOX_EXT_0 0x0088 #define REG_HMEBOX_EXT_1 0x008A #define REG_HMEBOX_EXT_2 0x008C #define REG_HMEBOX_EXT_3 0x008E //----------------------------------------------------- // // 0x0100h ~ 0x01FFh MACTOP General Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0200h ~ 0x027Fh TXDMA Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0280h ~ 0x02FFh RXDMA Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0300h ~ 0x03FFh PCIe // //----------------------------------------------------- //----------------------------------------------------- // // 0x0400h ~ 0x047Fh Protocol Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0500h ~ 0x05FFh EDCA Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0600h ~ 0x07FFh WMAC Configuration // //----------------------------------------------------- //----------------------------------------------------- // // Redifine register definition for compatibility // //----------------------------------------------------- // TODO: use these definition when using REG_xxx naming rule. // NOTE: DO NOT Remove these definition. Use later. #ifdef CONFIG_PCI_HCI #define IMR_RX_MASK (IMR_ROK|IMR_RDU|IMR_RXFOVW) #define IMR_TX_MASK (IMR_VODOK|IMR_VIDOK|IMR_BEDOK|IMR_BKDOK|IMR_MGNTDOK|IMR_HIGHDOK|IMR_BDOK) #define RT_BCN_INT_MASKS (IMR_BcnInt | IMR_TBDOK | IMR_TBDER) #define RT_AC_INT_MASKS (IMR_VIDOK | IMR_VODOK | IMR_BEDOK|IMR_BKDOK) #endif //---------------------------------------------------------------------------- // 8192C EEPROM/EFUSE share register definition. //---------------------------------------------------------------------------- #ifdef CONFIG_PCI_HCI // // Interface type. // #endif #define EFUSE_ACCESS_ON 0x69 // For RTL8723 only. #define EFUSE_ACCESS_OFF 0x00 // For RTL8723 only. //======================================================== // General definitions //======================================================== #define MACID_NUM_92C 32 #define CAM_ENTRY_NUM_92C 32 #include "basic_types.h" #endif /* __RTL8192C_SPEC_H__ */ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192c_sreset.h000066400000000000000000000022541261122257400221530ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTL8192C_SRESET_H_ #define _RTL8192C_SRESET_H_ #include #ifdef DBG_CONFIG_ERROR_DETECT extern void rtl8192c_sreset_xmit_status_check(_adapter *padapter); extern void rtl8192c_sreset_linked_status_check(_adapter *padapter); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192c_xmit.h000066400000000000000000000073011261122257400216250ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTL8192C_XMIT_H_ #define _RTL8192C_XMIT_H_ // //defined for TX DESC Operation // #define MAX_TID (15) //OFFSET 0 #define OFFSET_SZ 0 #define OFFSET_SHT 16 #define BMC BIT(24) #define LSG BIT(26) #define FSG BIT(27) #define OWN BIT(31) //OFFSET 4 #define PKT_OFFSET_SZ 0 #define BK BIT(6) #define QSEL_SHT 8 #define Rate_ID_SHT 16 #define NAVUSEHDR BIT(20) #define PKT_OFFSET_SHT 26 #define HWPC BIT(31) //OFFSET 8 #define AGG_EN BIT(29) //OFFSET 12 #define SEQ_SHT 16 //OFFSET 16 #define QoS BIT(6) #define HW_SEQ_EN BIT(7) #define USERATE BIT(8) #define DISDATAFB BIT(10) #define DATA_SHORT BIT(24) #define DATA_BW BIT(25) //OFFSET 20 #define SGI BIT(6) struct txrpt_ccx_8192c { /* offset 0 */ u8 retry_cnt:6; u8 rsvd_0:2; /* offset 1 */ u8 rts_retry_cnt:6; u8 rsvd_1:2; /* offset 2 */ u8 ccx_qtime0; u8 ccx_qtime1; /* offset 4 */ u8 missed_pkt_num:5; u8 rsvd_4:3; /* offset 5 */ u8 mac_id:5; u8 des1_fragssn:3; /* offset 6 */ u8 rpt_pkt_num:5; u8 pkt_drop:1; u8 lifetime_over:1; u8 retry_over:1; /* offset 7*/ u8 edca_tx_queue:4; u8 rsvd_7:1; u8 bmc:1; u8 pkt_ok:1; u8 int_ccx:1; }; #define txrpt_ccx_qtime_8192c(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8)) #ifdef CONFIG_XMIT_ACK void dump_txrpt_ccx_8192c(void *buf); void handle_txrpt_ccx_8192c(_adapter *adapter, void *buf); #else #define dump_txrpt_ccx_8192c(buf) do {} while(0) #define handle_txrpt_ccx_8192c(adapter, buf) do {} while(0) #endif #ifdef CONFIG_USB_HCI s32 rtl8192cu_init_xmit_priv(_adapter * padapter); void rtl8192cu_free_xmit_priv(_adapter * padapter); void rtl8192cu_cal_txdesc_chksum(struct tx_desc *ptxdesc); s32 rtl8192cu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); s32 rtl8192cu_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); s32 rtl8192cu_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); s32 rtl8192cu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); #ifdef CONFIG_HOSTAPD_MLME s32 rtl8192cu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); #endif #endif #ifdef CONFIG_PCI_HCI s32 rtl8192ce_init_xmit_priv(_adapter * padapter); void rtl8192ce_free_xmit_priv(_adapter * padapter); s32 rtl8192ce_enqueue_xmitbuf(struct rtw_tx_ring *ring, struct xmit_buf *pxmitbuf); struct xmit_buf *rtl8192ce_dequeue_xmitbuf(struct rtw_tx_ring *ring); void rtl8192ce_xmitframe_resume(_adapter *padapter); s32 rtl8192ce_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); s32 rtl8192ce_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); s32 rtl8192ce_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); #ifdef CONFIG_HOSTAPD_MLME s32 rtl8192ce_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); #endif #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192d_cmd.h000066400000000000000000000100061261122257400214040ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8192D_CMD_H_ #define __RTL8192D_CMD_H_ //-------------------------------------------- //3 Host Message Box //-------------------------------------------- // User Define Message [31:8] //_SETPWRMODE_PARM #define SET_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) #define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) #define SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) //JOINBSSRPT_PARM #define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) //_RSVDPAGE_LOC #define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) #define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) #define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) #define SET_H2CCMD_P2P_PS_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) #define SET_H2CCMD_P2P_PS_OFFLOAD_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) #define SET_H2CCMD_P2P_PS_OFFLOAD_CTW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) #define SET_H2CCMD_P2P_PS_OFFLOAD_NOA0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) #define SET_H2CCMD_P2P_PS_OFFLOAD_NOA1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) #define SET_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) #define SET_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) // Description: Determine the types of H2C commands that are the same in driver and Fw. // Fisrt constructed by tynli. 2009.10.09. typedef enum _RTL8192D_H2C_CMD { H2C_92D_AP_OFFLOAD = 0, /*0*/ H2C_SETPWRMODE = 1, /*1*/ H2C_JOINBSSRPT = 2, /*2*/ H2C_RSVDPAGE = 3, H2C_RSSI_REPORT = 5, H2C_RA_MASK = 6, H2C_92D_P2P_PS_OFFLOAD = 8, H2C_MAC_MODE_SEL = 9, H2C_PWRM=15, H2C_P2P_PS_CTW_CMD = 24, H2C_PathDiv = 26, //PathDiv--NeilChen--2011.07.15 H2C_92D_TSF_SYNC=36, H2C_92D_RESET_TSF = 43, H2C_CMD_MAX }RTL8192D_H2C_CMD; struct cmd_msg_parm { u8 eid; //element id u8 sz; // sz u8 buf[6]; }; int FillH2CCmd92D(_adapter* padapter, u8 ElementID, u32 CmdLen, u8* pCmdBuffer); // host message to firmware cmd void rtl8192d_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode); void rtl8192d_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus); u8 rtl8192d_set_rssi_cmd(_adapter*padapter, u8 *param); void rtl8192d_set_raid_cmd(_adapter*padapter, u32 mask, u8* arg); void rtl8192d_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8* arg, u8 rssi_level); #ifdef CONFIG_P2P void rtl8192d_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state); #endif //CONFIG_P2P #ifdef CONFIG_TSF_RESET_OFFLOAD int reset_tsf(PADAPTER Adapter, u8 reset_port ); #endif // CONFIG_TSF_RESET_OFFLOAD #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192d_dm.h000066400000000000000000000040771261122257400212540ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8192D_DM_H__ #define __RTL8192D_DM_H__ //============================================================ // Description: // // This file is for 92CE/92CU dynamic mechanism only // // //============================================================ /*------------------------Export global variable----------------------------*/ /*------------------------Export global variable----------------------------*/ /*------------------------Export Marco Definition---------------------------*/ //#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;} //============================================================ // structure and define //============================================================ #define Rx_index_mapping_NUM 15 #define index_mapping_NUM 13 //============================================================ // function prototype //============================================================ void rtl8192d_init_dm_priv(IN PADAPTER Adapter); void rtl8192d_deinit_dm_priv(IN PADAPTER Adapter); void rtl8192d_InitHalDm(IN PADAPTER Adapter); void rtl8192d_HalDmWatchDog(IN PADAPTER Adapter); #endif //__HAL8190PCIDM_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192d_hal.h000066400000000000000000000371551261122257400214230ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8192D_HAL_H__ #define __RTL8192D_HAL_H__ //#include "hal_com.h" #include "hal_data.h" #include "rtl8192d_spec.h" #include "Hal8192DPhyReg.h" #include "Hal8192DPhyCfg.h" #include "rtl8192d_rf.h" #include "rtl8192d_dm.h" #include "rtl8192d_recv.h" #include "rtl8192d_xmit.h" #include "rtl8192d_cmd.h" #include "rtl8192d_led.h" #ifdef CONFIG_PCI_HCI #define RTL819X_DEFAULT_RF_TYPE RF_2T2R //--------------------------------------------------------------------- // RTL8192DE From file //--------------------------------------------------------------------- #define RTL8192D_FW_IMG "rtl8192DE\\rtl8192dfw.bin" #define RTL8192D_PHY_REG "rtl8192DE\\PHY_REG.txt" #define RTL8192D_PHY_REG_PG "rtl8192DE\\PHY_REG_PG.txt" #define RTL8192D_PHY_REG_MP "rtl8192DE\\PHY_REG_MP.txt" #define RTL8192D_AGC_TAB "rtl8192DE\\AGC_TAB.txt" #define RTL8192D_AGC_TAB_2G "rtl8192DE\\AGC_TAB_2G.txt" #define RTL8192D_AGC_TAB_5G "rtl8192DE\\AGC_TAB_5G.txt" #define RTL8192D_PHY_RADIO_A "rtl8192DE\\radio_a.txt" #define RTL8192D_PHY_RADIO_B "rtl8192DE\\radio_b.txt" #define RTL8192D_PHY_RADIO_A_intPA "rtl8192DE\\radio_a_intPA.txt" #define RTL8192D_PHY_RADIO_B_intPA "rtl8192DE\\radio_b_intPA.txt" #define RTL8192D_PHY_MACREG "rtl8192DE\\MAC_REG.txt" //--------------------------------------------------------------------- // RTL8192DE From header //--------------------------------------------------------------------- // Fw Array #define Rtl8192D_FwImageArray Rtl8192DEFwImgArray // MAC/BB/PHY Array #define Rtl8192D_MAC_Array Rtl8192DEMAC_2T_Array #define Rtl8192D_AGCTAB_Array Rtl8192DEAGCTAB_Array #define Rtl8192D_AGCTAB_5GArray Rtl8192DEAGCTAB_5GArray #define Rtl8192D_AGCTAB_2GArray Rtl8192DEAGCTAB_2GArray #define Rtl8192D_AGCTAB_2TArray Rtl8192DEAGCTAB_2TArray #define Rtl8192D_AGCTAB_1TArray Rtl8192DEAGCTAB_1TArray #define Rtl8192D_PHY_REG_2TArray Rtl8192DEPHY_REG_2TArray #define Rtl8192D_PHY_REG_1TArray Rtl8192DEPHY_REG_1TArray #define Rtl8192D_PHY_REG_Array_PG Rtl8192DEPHY_REG_Array_PG #define Rtl8192D_PHY_REG_Array_MP Rtl8192DEPHY_REG_Array_MP #define Rtl8192D_RadioA_2TArray Rtl8192DERadioA_2TArray #define Rtl8192D_RadioA_1TArray Rtl8192DERadioA_1TArray #define Rtl8192D_RadioB_2TArray Rtl8192DERadioB_2TArray #define Rtl8192D_RadioB_1TArray Rtl8192DERadioB_1TArray #define Rtl8192D_RadioA_2T_intPAArray Rtl8192DERadioA_2T_intPAArray #define Rtl8192D_RadioB_2T_intPAArray Rtl8192DERadioB_2T_intPAArray // Array length #define Rtl8192D_FwImageArrayLength Rtl8192DEImgArrayLength #define Rtl8192D_MAC_ArrayLength Rtl8192DEMAC_2T_ArrayLength #define Rtl8192D_AGCTAB_5GArrayLength Rtl8192DEAGCTAB_5GArrayLength #define Rtl8192D_AGCTAB_2GArrayLength Rtl8192DEAGCTAB_2GArrayLength #define Rtl8192D_AGCTAB_2TArrayLength Rtl8192DEAGCTAB_2TArrayLength #define Rtl8192D_AGCTAB_1TArrayLength Rtl8192DEAGCTAB_1TArrayLength #define Rtl8192D_AGCTAB_ArrayLength Rtl8192DEAGCTAB_ArrayLength #define Rtl8192D_PHY_REG_2TArrayLength Rtl8192DEPHY_REG_2TArrayLength #define Rtl8192D_PHY_REG_1TArrayLength Rtl8192DEPHY_REG_1TArrayLength #define Rtl8192D_PHY_REG_Array_PGLength Rtl8192DEPHY_REG_Array_PGLength #define Rtl8192D_PHY_REG_Array_MPLength Rtl8192DEPHY_REG_Array_MPLength #define Rtl8192D_RadioA_2TArrayLength Rtl8192DERadioA_2TArrayLength #define Rtl8192D_RadioB_2TArrayLength Rtl8192DERadioB_2TArrayLength #define Rtl8192D_RadioA_2T_intPAArrayLength Rtl8192DERadioA_2T_intPAArrayLength #define Rtl8192D_RadioB_2T_intPAArrayLength Rtl8192DERadioB_2T_intPAArrayLength #elif defined(CONFIG_USB_HCI) #define RTL819X_DEFAULT_RF_TYPE RF_1T2R //--------------------------------------------------------------------- // RTL8192DU From file //--------------------------------------------------------------------- #define RTL8192D_FW_IMG "rtl8192DU\\rtl8192dfw.bin" #define RTL8192D_PHY_REG "rtl8192DU\\PHY_REG.txt" #define RTL8192D_PHY_REG_PG "rtl8192DU\\PHY_REG_PG.txt" #define RTL8192D_PHY_REG_MP "rtl8192DU\\PHY_REG_MP.txt" #define RTL8192D_AGC_TAB "rtl8192DU\\AGC_TAB.txt" #define RTL8192D_AGC_TAB_2G "rtl8192DU\\AGC_TAB_2G.txt" #define RTL8192D_AGC_TAB_5G "rtl8192DU\\AGC_TAB_5G.txt" #define RTL8192D_PHY_RADIO_A "rtl8192DU\\radio_a.txt" #define RTL8192D_PHY_RADIO_B "rtl8192DU\\radio_b.txt" #define RTL8192D_PHY_RADIO_A_intPA "rtl8192DU\\radio_a_intPA.txt" #define RTL8192D_PHY_RADIO_B_intPA "rtl8192DU\\radio_b_intPA.txt" #define RTL8192D_PHY_MACREG "rtl8192DU\\MAC_REG.txt" //--------------------------------------------------------------------- // RTL8192DU From header //--------------------------------------------------------------------- // Fw Array #define Rtl8192D_FwImageArray Rtl8192DUFwImgArray // MAC/BB/PHY Array #define Rtl8192D_MAC_Array Rtl8192DUMAC_2T_Array #define Rtl8192D_AGCTAB_Array Rtl8192DUAGCTAB_Array #define Rtl8192D_AGCTAB_5GArray Rtl8192DUAGCTAB_5GArray #define Rtl8192D_AGCTAB_2GArray Rtl8192DUAGCTAB_2GArray #define Rtl8192D_AGCTAB_2TArray Rtl8192DUAGCTAB_2TArray #define Rtl8192D_AGCTAB_1TArray Rtl8192DUAGCTAB_1TArray #define Rtl8192D_PHY_REG_2TArray Rtl8192DUPHY_REG_2TArray #define Rtl8192D_PHY_REG_1TArray Rtl8192DUPHY_REG_1TArray #define Rtl8192D_PHY_REG_Array_PG Rtl8192DUPHY_REG_Array_PG #define Rtl8192D_PHY_REG_Array_MP Rtl8192DUPHY_REG_Array_MP #define Rtl8192D_RadioA_2TArray Rtl8192DURadioA_2TArray #define Rtl8192D_RadioA_1TArray Rtl8192DURadioA_1TArray #define Rtl8192D_RadioB_2TArray Rtl8192DURadioB_2TArray #define Rtl8192D_RadioB_1TArray Rtl8192DURadioB_1TArray #define Rtl8192D_RadioA_2T_intPAArray Rtl8192DURadioA_2T_intPAArray #define Rtl8192D_RadioB_2T_intPAArray Rtl8192DURadioB_2T_intPAArray // Array length #define Rtl8192D_FwImageArrayLength Rtl8192DUImgArrayLength #define Rtl8192D_MAC_ArrayLength Rtl8192DUMAC_2T_ArrayLength #define Rtl8192D_AGCTAB_5GArrayLength Rtl8192DUAGCTAB_5GArrayLength #define Rtl8192D_AGCTAB_2GArrayLength Rtl8192DUAGCTAB_2GArrayLength #define Rtl8192D_AGCTAB_2TArrayLength Rtl8192DUAGCTAB_2TArrayLength #define Rtl8192D_AGCTAB_1TArrayLength Rtl8192DUAGCTAB_1TArrayLength #define Rtl8192D_AGCTAB_ArrayLength Rtl8192DUAGCTAB_ArrayLength #define Rtl8192D_PHY_REG_2TArrayLength Rtl8192DUPHY_REG_2TArrayLength #define Rtl8192D_PHY_REG_1TArrayLength Rtl8192DUPHY_REG_1TArrayLength #define Rtl8192D_PHY_REG_Array_PGLength Rtl8192DUPHY_REG_Array_PGLength #define Rtl8192D_PHY_REG_Array_MPLength Rtl8192DUPHY_REG_Array_MPLength #define Rtl8192D_RadioA_2TArrayLength Rtl8192DURadioA_2TArrayLength #define Rtl8192D_RadioB_2TArrayLength Rtl8192DURadioB_2TArrayLength #define Rtl8192D_RadioA_2T_intPAArrayLength Rtl8192DURadioA_2T_intPAArrayLength #define Rtl8192D_RadioB_2T_intPAArrayLength Rtl8192DURadioB_2T_intPAArrayLength // The file name "_2T" is for 92CU, "_1T" is for 88CU. Modified by tynli. 2009.11.24. /* #define Rtl819XFwImageArray Rtl8192DUFwImgArray #define Rtl819XMAC_Array Rtl8192DUMAC_2TArray #define Rtl819XAGCTAB_Array Rtl8192DUAGCTAB_Array #define Rtl819XAGCTAB_5GArray Rtl8192DUAGCTAB_5GArray #define Rtl819XAGCTAB_2GArray Rtl8192DUAGCTAB_2GArray #define Rtl819XPHY_REG_2TArray Rtl8192DUPHY_REG_2TArray #define Rtl819XPHY_REG_1TArray Rtl8192DUPHY_REG_1TArray #define Rtl819XRadioA_2TArray Rtl8192DURadioA_2TArray #define Rtl819XRadioA_1TArray Rtl8192DURadioA_1TArray #define Rtl819XRadioA_2T_intPAArray Rtl8192DURadioA_2T_intPAArray #define Rtl819XRadioB_2TArray Rtl8192DURadioB_2TArray #define Rtl819XRadioB_1TArray Rtl8192DURadioB_1TArray #define Rtl819XRadioB_2T_intPAArray Rtl8192DURadioB_2T_intPAArray #define Rtl819XPHY_REG_Array_PG Rtl8192DUPHY_REG_Array_PG #define Rtl819XPHY_REG_Array_MP Rtl8192DUPHY_REG_Array_MP #define Rtl819XAGCTAB_2TArray Rtl8192DUAGCTAB_2TArray #define Rtl819XAGCTAB_1TArray Rtl8192DUAGCTAB_1TArray*/ #endif // // Check if FW header exists. We do not consider the lower 4 bits in this case. // By tynli. 2009.12.04. // #define IS_FW_HEADER_EXIST_92D(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\ (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\ (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D0 ||\ (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D1 ||\ (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D2 ||\ (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D3 ) #define FW_8192D_SIZE 0x8020 // Max FW len = 32k + 32(FW header length). #define FW_8192D_START_ADDRESS 0x1000 #define FW_8192D_END_ADDRESS 0x1FFF typedef struct _RT_FIRMWARE_8192D{ FIRMWARE_SOURCE eFWSource; u8* szFwBuffer; u32 ulFwLength; } RT_FIRMWARE_8192D, *PRT_FIRMWARE_8192D; // // This structure must be cared byte-ordering // // Added by tynli. 2009.12.04. typedef struct _RT_8192D_FIRMWARE_HDR {//8-byte alinment required //--- LONG WORD 0 ---- u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut u8 Category; // AP/NIC and USB/PCI u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions u16 Version; // FW Version u8 Subversion; // FW Subversion, default 0x00 u8 Rsvd1; //--- LONG WORD 1 ---- u8 Month; // Release time Month field u8 Date; // Release time Date field u8 Hour; // Release time Hour field u8 Minute; // Release time Minute field u16 RamCodeSize; // The size of RAM code u16 Rsvd2; //--- LONG WORD 2 ---- u32 SvnIdx; // The SVN entry index u32 Rsvd3; //--- LONG WORD 3 ---- u32 Rsvd4; u32 Rsvd5; }RT_8192D_FIRMWARE_HDR, *PRT_8192D_FIRMWARE_HDR; #define DRIVER_EARLY_INT_TIME_8192D 0x05 #define BCN_DMA_ATIME_INT_TIME_8192D 0x02 typedef enum _BT_CurState{ BT_OFF = 0, BT_ON = 1, } BT_CurState, *PBT_CurState; typedef enum _BT_ServiceType{ BT_SCO = 0, BT_A2DP = 1, BT_HID = 2, BT_HID_Idle = 3, BT_Scan = 4, BT_Idle = 5, BT_OtherAction = 6, BT_Busy = 7, BT_OtherBusy = 8, } BT_ServiceType, *PBT_ServiceType; typedef struct _BT_COEXIST_STR{ u8 BluetoothCoexist; u8 BT_Ant_Num; u8 BT_CoexistType; u8 BT_State; u8 BT_CUR_State; //0:on, 1:off u8 BT_Ant_isolation; //0:good, 1:bad u8 BT_PapeCtrl; //0:SW, 1:SW/HW dynamic u8 BT_Service; u8 BT_RadioSharedType; u8 Ratio_Tx; u8 Ratio_PRI; }BT_COEXIST_STR, *PBT_COEXIST_STR; // Note: We will divide number of page equally for each queue other than public queue! #define TX_TOTAL_PAGE_NUMBER_8192D 0xF8 #define TX_PAGE_BOUNDARY (TX_TOTAL_PAGE_NUMBER_8192D + 1) // For Normal Chip Setting // (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8192D #define NORMAL_PAGE_NUM_PUBQ 0x56 // For Test Chip Setting // (HPQ + LPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8192D #define TEST_PAGE_NUM_PUBQ 0x89 #define TX_TOTAL_PAGE_NUMBER_92D_DUAL_MAC 0x7A #define NORMAL_PAGE_NUM_PUBQ_92D_DUAL_MAC 0x5A #define NORMAL_PAGE_NUM_HPQ_92D_DUAL_MAC 0x10 #define NORMAL_PAGE_NUM_LPQ_92D_DUAL_MAC 0x10 #define NORMAL_PAGE_NUM_NORMALQ_92D_DUAL_MAC 0 #define TX_PAGE_BOUNDARY_DUAL_MAC (TX_TOTAL_PAGE_NUMBER_92D_DUAL_MAC + 1) // For Test Chip Setting #define WMM_TEST_TX_TOTAL_PAGE_NUMBER 0xF5 #define WMM_TEST_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6 #define WMM_TEST_PAGE_NUM_PUBQ 0xA3 #define WMM_TEST_PAGE_NUM_HPQ 0x29 #define WMM_TEST_PAGE_NUM_LPQ 0x29 //Note: For Normal Chip Setting ,modify later #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER 0xF5 #define WMM_NORMAL_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6 #define WMM_NORMAL_PAGE_NUM_PUBQ 0xB0 #define WMM_NORMAL_PAGE_NUM_HPQ 0x29 #define WMM_NORMAL_PAGE_NUM_LPQ 0x1C #define WMM_NORMAL_PAGE_NUM_NPQ 0x1C #define WMM_NORMAL_PAGE_NUM_PUBQ_92D 0X65//0x82 #define WMM_NORMAL_PAGE_NUM_HPQ_92D 0X30//0x29 #define WMM_NORMAL_PAGE_NUM_LPQ_92D 0X30 #define WMM_NORMAL_PAGE_NUM_NPQ_92D 0X30 //------------------------------------------------------------------------- // Chip specific //------------------------------------------------------------------------- #define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3) #define CHIP_BONDING_92C_1T2R 0x1 #define CHIP_BONDING_88C_USB_MCARD 0x2 #define CHIP_BONDING_88C_USB_HP 0x1 //------------------------------------------------------------------------- // Channel Plan //------------------------------------------------------------------------- #define EFUSE_REAL_CONTENT_LEN 1024 #define EFUSE_MAP_LEN 256 #define EFUSE_MAX_SECTION 32 #define EFUSE_MAX_SECTION_BASE 16 // To prevent out of boundary programming case, leave 1byte and program full section // 9bytes + 1byt + 5bytes and pre 1byte. // For worst case: // | 2byte|----8bytes----|1byte|--7bytes--| //92D #define EFUSE_OOB_PROTECT_BYTES 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. typedef enum _PA_MODE { PA_MODE_EXTERNAL = 0x00, PA_MODE_INTERNAL_SP3T = 0x01, PA_MODE_INTERNAL_SPDT = 0x02 } PA_MODE; /* Copy from rtl8192c */ enum c2h_id_8192d { C2H_DBG = 0, C2H_TSF = 1, C2H_AP_RPT_RSP = 2, C2H_CCX_TX_RPT = 3, C2H_BT_RSSI = 4, C2H_BT_OP_MODE = 5, C2H_EXT_RA_RPT = 6, C2H_HW_INFO_EXCH = 10, C2H_C2H_H2C_TEST = 11, C2H_BT_INFO = 12, C2H_BT_MP_INFO = 15, MAX_C2HEVENT }; #ifdef CONFIG_PCI_HCI // // Function disabled. // #define DF_TX_BIT BIT0 #define DF_RX_BIT BIT1 #define DF_IO_BIT BIT2 #define DF_IO_D3_BIT BIT3 #define RT_DF_TYPE u32 //#define RT_DISABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions |= ((RT_DF_TYPE)(__FuncBits))) //#define RT_ENABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions &= (~((RT_DF_TYPE)(__FuncBits)))) //#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) void InterruptRecognized8192DE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent); VOID UpdateInterruptMask8192DE(PADAPTER Adapter, u32 AddMSR, u32 RemoveMSR); #endif int FirmwareDownload92D(IN PADAPTER Adapter); VOID rtl8192d_FirmwareSelfReset(IN PADAPTER Adapter); void rtl8192d_ReadChipVersion(IN PADAPTER Adapter); VOID rtl8192d_EfuseParseChnlPlan(PADAPTER Adapter, u8 *hwinfo, BOOLEAN AutoLoadFail); VOID rtl8192d_ReadTxPowerInfo(PADAPTER Adapter, u8* PROMContent, BOOLEAN AutoLoadFail); VOID rtl8192d_ResetDualMacSwitchVariables(IN PADAPTER Adapter); u8 GetEEPROMSize8192D(PADAPTER Adapter); BOOLEAN PHY_CheckPowerOffFor8192D(PADAPTER Adapter); VOID PHY_SetPowerOnFor8192D(PADAPTER Adapter); //void PHY_ConfigMacPhyMode92D(PADAPTER Adapter); void rtl8192d_free_hal_data(_adapter * padapter); void rtl8192d_init_default_value(_adapter *adapter); void rtl8192d_set_hal_ops(struct hal_ops *pHalFunc); void SetHwReg8192D(_adapter *adapter, u8 variable, u8 *val); void GetHwReg8192D(_adapter *adapter, u8 variable, u8 *val); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192d_led.h000066400000000000000000000026541261122257400214170ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8192D_LED_H_ #define __RTL8192D_LED_H_ //================================================================================ // Interface to manipulate LED objects. //================================================================================ #ifdef CONFIG_USB_HCI void rtl8192du_InitSwLeds(_adapter *padapter); void rtl8192du_DeInitSwLeds(_adapter *padapter); #endif #ifdef CONFIG_PCI_HCI void rtl8192de_InitSwLeds(_adapter *padapter); void rtl8192de_DeInitSwLeds(_adapter *padapter); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192d_recv.h000066400000000000000000000055031261122257400216060ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTL8192D_RECV_H_ #define _RTL8192D_RECV_H_ #define RECV_BLK_SZ 512 #define RECV_BLK_CNT 16 #define RECV_BLK_TH RECV_BLK_CNT #if defined(CONFIG_USB_HCI) #ifndef MAX_RECVBUF_SZ #ifdef PLATFORM_OS_CE #define MAX_RECVBUF_SZ (8192+1024) // 8K+1k #else #ifndef CONFIG_MINIMAL_MEMORY_USAGE //#define MAX_RECVBUF_SZ (32768) // 32k //#define MAX_RECVBUF_SZ (16384) //16K //#define MAX_RECVBUF_SZ (10240) //10K #ifdef CONFIG_PLATFORM_MSTAR #define MAX_RECVBUF_SZ (8192) // 8K #else #define MAX_RECVBUF_SZ (15360) // 15k < 16k #endif #else #define MAX_RECVBUF_SZ (4000) // about 4K #endif #endif #endif //!MAX_RECVBUF_SZ #elif defined(CONFIG_PCI_HCI) //#ifndef CONFIG_MINIMAL_MEMORY_USAGE // #define MAX_RECVBUF_SZ (9100) //#else #define MAX_RECVBUF_SZ (4000) // about 4K //#endif #endif struct phy_stat { unsigned int phydw0; unsigned int phydw1; unsigned int phydw2; unsigned int phydw3; unsigned int phydw4; unsigned int phydw5; unsigned int phydw6; unsigned int phydw7; }; // Rx smooth factor #define Rx_Smooth_Factor (20) #ifdef CONFIG_USB_HCI typedef struct _INTERRUPT_MSG_FORMAT_EX{ unsigned int C2H_MSG0; unsigned int C2H_MSG1; unsigned int C2H_MSG2; unsigned int C2H_MSG3; unsigned int HISR; // from HISR Reg0x124, read to clear unsigned int HISRE;// from HISRE Reg0x12c, read to clear unsigned int MSG_EX; }INTERRUPT_MSG_FORMAT_EX,*PINTERRUPT_MSG_FORMAT_EX; void rtl8192du_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); int rtl8192du_init_recv_priv(_adapter * padapter); void rtl8192du_free_recv_priv(_adapter * padapter); #endif #ifdef CONFIG_PCI_HCI int rtl8192de_init_recv_priv(_adapter * padapter); void rtl8192de_free_recv_priv(_adapter * padapter); #endif void rtl8192d_translate_rx_signal_stuff(union recv_frame *precvframe, struct phy_stat *pphy_status); void rtl8192d_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *pdesc); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192d_rf.h000066400000000000000000000033431261122257400212560ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTL8192D_RF_H_ #define _RTL8192D_RF_H_ // // RF RL6052 Series API // void rtl8192d_RF_ChangeTxPath( IN PADAPTER Adapter, IN u16 DataRate); void rtl8192d_PHY_RF6052SetBandwidth( IN PADAPTER Adapter, IN CHANNEL_WIDTH Bandwidth); VOID rtl8192d_PHY_RF6052SetCckTxPower( IN PADAPTER Adapter, IN u8* pPowerlevel); VOID rtl8192d_PHY_RF6052SetOFDMTxPower( IN PADAPTER Adapter, IN u8* pPowerLevel, IN u8 Channel); int PHY_RF6052_Config8192D( IN PADAPTER Adapter ); BOOLEAN rtl8192d_PHY_EnableAnotherPHY(IN PADAPTER Adapter, IN BOOLEAN bMac0); void rtl8192d_PHY_PowerDownAnotherPHY(IN PADAPTER Adapter, IN BOOLEAN bMac0); /*--------------------------Exported Function prototype---------------------*/ #endif/* End of HalRf.h */ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192d_spec.h000066400000000000000000000073001261122257400215760ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8192D_SPEC_H__ #define __RTL8192D_SPEC_H__ #include //============================================================ // 8192D Regsiter offset definition //============================================================ //============================================================ // //============================================================ //----------------------------------------------------- // // 0x0000h ~ 0x00FFh System Configuration // //----------------------------------------------------- #define REG_HMEBOX_EXT_0 0x0088 #define REG_HMEBOX_EXT_1 0x008A #define REG_HMEBOX_EXT_2 0x008C #define REG_HMEBOX_EXT_3 0x008E //#define REG_MAC_PHY_CTRL_NORMAL 0x00F8 #define REG_MAC0 0x0081 #define REG_MAC1 0x0053 #define FW_MAC0_ready 0x18 #define FW_MAC1_ready 0x1A #define MAC0_ON BIT7 #define MAC1_ON BIT0 #define mac0_ready BIT0 #define mac1_ready BIT0 //----------------------------------------------------- // // 0x0100h ~ 0x01FFh MACTOP General Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0200h ~ 0x027Fh TXDMA Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0280h ~ 0x02FFh RXDMA Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0300h ~ 0x03FFh PCIe // //----------------------------------------------------- //----------------------------------------------------- // // 0x0400h ~ 0x047Fh Protocol Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0500h ~ 0x05FFh EDCA Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0600h ~ 0x07FFh WMAC Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0xFE00h ~ 0xFE55h USB Configuration // //----------------------------------------------------- #ifdef CONFIG_PCI_HCI #define RT_BCN_INT_MASKS (IMR_BcnInt | IMR_TBDOK | IMR_TBDER) #define RT_AC_INT_MASKS (IMR_VIDOK | IMR_VODOK | IMR_BEDOK|IMR_BKDOK) #endif //======================================================== // General definitions //======================================================== #define MACID_NUM_92D 32 #define CAM_ENTRY_NUM_92D 32 #include "basic_types.h" #endif /* __RTL8192D_SPEC_H__ */ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192d_xmit.h000066400000000000000000000113421261122257400216260ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTL8192D_XMIT_H_ #define _RTL8192D_XMIT_H_ // //defined for TX DESC Operation // #define MAX_TID (15) //OFFSET 0 #define OFFSET_SZ 0 #define OFFSET_SHT 16 #define BMC BIT(24) #define LSG BIT(26) #define FSG BIT(27) #define OWN BIT(31) //OFFSET 4 #define PKT_OFFSET_SZ 0 #define BK BIT(6) #define QSEL_SHT 8 #define Rate_ID_SHT 16 #define NAVUSEHDR BIT(20) #define PKT_OFFSET_SHT 26 #define HWPC BIT(31) //OFFSET 8 #define AGG_EN BIT(29) //OFFSET 12 #define SEQ_SHT 16 //OFFSET 16 #define QoS BIT(6) #define HW_SEQ_EN BIT(7) #define USERATE BIT(8) #define DISDATAFB BIT(10) #define DATA_SHORT BIT(24) #define DATA_BW BIT(25) //OFFSET 20 #define SGI BIT(6) //Because we open EM for normal case, we just always insert 2*8 bytes.by wl #ifdef USB_PACKET_OFFSET_SZ #define USB_92D_DUMMY_OFFSET (PACKET_OFFSET_SZ/8) #else #define USB_92D_DUMMY_OFFSET 2 #endif #define USB_92D_DUMMY_LENGTH (USB_92D_DUMMY_OFFSET * PACKET_OFFSET_SZ) #define USB_HWDESC_HEADER_LEN (TXDESC_SIZE + USB_92D_DUMMY_LENGTH) //For 92D early mode #define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) #define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) #define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) #define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) #define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) #define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) #define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) /* Copy from rtl8192c */ struct txrpt_ccx_8192d { /* offset 0 */ u8 retry_cnt:6; u8 rsvd_0:2; /* offset 1 */ u8 rts_retry_cnt:6; u8 rsvd_1:2; /* offset 2 */ u8 ccx_qtime0; u8 ccx_qtime1; /* offset 4 */ u8 missed_pkt_num:5; u8 rsvd_4:3; /* offset 5 */ u8 mac_id:5; u8 des1_fragssn:3; /* offset 6 */ u8 rpt_pkt_num:5; u8 pkt_drop:1; u8 lifetime_over:1; u8 retry_over:1; /* offset 7*/ u8 edca_tx_queue:4; u8 rsvd_7:1; u8 bmc:1; u8 pkt_ok:1; u8 int_ccx:1; }; #define txrpt_ccx_qtime_8192d(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8)) #ifdef CONFIG_XMIT_ACK void dump_txrpt_ccx_8192d(void *buf); void handle_txrpt_ccx_8192d(_adapter *adapter, void *buf); #else #define dump_txrpt_ccx_8192d(buf) do {} while(0) #define handle_txrpt_ccx_8192d(adapter, buf) do {} while(0) #endif #ifdef CONFIG_USB_HCI s32 rtl8192du_init_xmit_priv(_adapter * padapter); void rtl8192du_free_xmit_priv(_adapter * padapter); void rtl8192du_cal_txdesc_chksum(struct tx_desc *ptxdesc); s32 rtl8192du_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); s32 rtl8192du_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); s32 rtl8192du_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); s32 rtl8192du_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); #ifdef CONFIG_HOSTAPD_MLME s32 rtl8192du_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); #endif #endif #ifdef CONFIG_PCI_HCI s32 rtl8192de_init_xmit_priv(_adapter * padapter); void rtl8192de_free_xmit_priv(_adapter * padapter); s32 rtl8192de_enqueue_xmitbuf(struct rtw_tx_ring *ring, struct xmit_buf *pxmitbuf); struct xmit_buf *rtl8192de_dequeue_xmitbuf(struct rtw_tx_ring *ring); void rtl8192de_xmitframe_resume(_adapter *padapter); s32 rtl8192de_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); s32 rtl8192de_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); s32 rtl8192de_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); #ifdef CONFIG_HOSTAPD_MLME s32 rtl8192de_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); #endif #endif//end if CONFIG_PCI_HCI #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192e_cmd.h000066400000000000000000000175241261122257400214210ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8192E_CMD_H__ #define __RTL8192E_CMD_H__ typedef enum _RTL8192E_H2C_CMD { H2C_8192E_RSVDPAGE = 0x00, H2C_8192E_MSRRPT = 0x01, H2C_8192E_SCAN = 0x02, H2C_8192E_KEEP_ALIVE_CTRL = 0x03, H2C_8192E_DISCONNECT_DECISION = 0x04, H2C_8192E_INIT_OFFLOAD = 0x06, H2C_8192E_AP_OFFLOAD = 0x08, H2C_8192E_BCN_RSVDPAGE = 0x09, H2C_8192E_PROBERSP_RSVDPAGE = 0x0a, H2C_8192E_AP_WOW_GPIO_CTRL = 0x13, H2C_8192E_SETPWRMODE = 0x20, H2C_8192E_PS_TUNING_PARA = 0x21, H2C_8192E_PS_TUNING_PARA2 = 0x22, H2C_8192E_PS_LPS_PARA = 0x23, H2C_8192E_P2P_PS_OFFLOAD = 0x24, H2C_8192E_SAP_PS = 0x26, H2C_8192E_RA_MASK = 0x40, H2C_8192E_RSSI_REPORT = 0x42, H2C_8192E_WO_WLAN = 0x80, H2C_8192E_REMOTE_WAKE_CTRL = 0x81, H2C_8192E_AOAC_GLOBAL_INFO = 0x82, H2C_8192E_AOAC_RSVDPAGE = 0x83, //Not defined in new 88E H2C CMD Format H2C_8192E_SELECTIVE_SUSPEND_ROF_CMD, H2C_8192E_P2P_PS_MODE, H2C_8192E_PSD_RESULT, MAX_8192E_H2CCMD }RTL8192E_H2C_CMD; typedef enum _RTL8192E_C2H_EVT { C2H_8192E_DBG = 0, C2H_8192E_LB = 1, C2H_8192E_TXBF = 2, C2H_8192E_TX_REPORT = 3, C2H_8192E_BT_INFO = 9, C2H_8192E_FW_SWCHNL = 0x10, C2H_8192E_BT_MP = 11, C2H_8192E_RA_RPT=12, MAX_8192E_C2HEVENT }RTL8192E_C2H_EVT; struct cmd_msg_parm { u8 eid; //element id u8 sz; // sz u8 buf[6]; }; enum{ PWRS }; typedef struct _SETPWRMODE_PARM { u8 Mode;//0:Active,1:LPS,2:WMMPS //u8 RLBM:4;//0:Min,1:Max,2: User define u8 SmartPS_RLBM;//LPS=0:PS_Poll,1:PS_Poll,2:NullData,WMM=0:PS_Poll,1:NullData u8 AwakeInterval; // unit: beacon interval u8 bAllQueueUAPSD; u8 PwrState;//AllON(0x0c),RFON(0x04),RFOFF(0x00) } SETPWRMODE_PARM, *PSETPWRMODE_PARM; struct H2C_SS_RFOFF_PARAM{ u8 ROFOn; // 1: on, 0:off u16 gpio_period; // unit: 1024 us }__attribute__ ((packed)); typedef struct JOINBSSRPT_PARM_92E{ u8 OpMode; // RT_MEDIA_STATUS #ifdef CONFIG_WOWLAN u8 MacID; // MACID #endif //CONFIG_WOWLAN }JOINBSSRPT_PARM_92E, *PJOINBSSRPT_PARM_92E; /* move to hal_com_h2c.h typedef struct _RSVDPAGE_LOC_92E { u8 LocProbeRsp; u8 LocPsPoll; u8 LocNullData; u8 LocQosNull; u8 LocBTQosNull; } RSVDPAGE_LOC_92E, *PRSVDPAGE_LOC_92E; */ //_SETPWRMODE_PARM #define SET_8192E_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) #define SET_8192E_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) #define SET_8192E_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) #define SET_8192E_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) #define SET_8192E_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) #define SET_8192E_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) #define SET_8192E_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+5, 0, 8, __Value) #define GET_8192E_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) //_P2P_PS_OFFLOAD #define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) #define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) #define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_CTWINDOW_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) #define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_NOA0_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) #define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_NOA1_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) #define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) // host message to firmware cmd void rtl8192e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); void rtl8192e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus); u8 rtl8192e_set_rssi_cmd(PADAPTER padapter, u8 *param); void rtl8192e_set_raid_cmd(PADAPTER padapter, u32 bitmap, u8* arg); void rtl8192e_Add_RateATid(PADAPTER padapter, u32 bitmap, u8 *arg, u8 rssi_level); s32 FillH2CCmd_8192E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); //u8 rtl8192c_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period); s32 c2h_handler_8192e(PADAPTER padapter, u8 *buf); #ifdef CONFIG_BT_COEXIST void rtl8192e_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); #endif // CONFIG_BT_COEXIST #ifdef CONFIG_P2P_PS void rtl8192e_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); //void rtl8723a_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); #endif //CONFIG_P2P void CheckFwRsvdPageContent(PADAPTER padapter); void rtl8192e_set_FwMediaStatus_cmd(PADAPTER padapter, u16 mstatus_rpt ); #ifdef CONFIG_TSF_RESET_OFFLOAD //u8 rtl8188e_reset_tsf(_adapter *padapter, u8 reset_port); int reset_tsf(PADAPTER Adapter, u8 reset_port ); #endif // CONFIG_TSF_RESET_OFFLOAD #ifdef CONFIG_WOWLAN typedef struct _SETWOWLAN_PARM{ u8 mode; u8 gpio_index; u8 gpio_duration; u8 second_mode; u8 reserve; }SETWOWLAN_PARM, *PSETWOWLAN_PARM; #define FW_WOWLAN_FUN_EN BIT(0) #define FW_WOWLAN_PATTERN_MATCH BIT(1) #define FW_WOWLAN_MAGIC_PKT BIT(2) #define FW_WOWLAN_UNICAST BIT(3) #define FW_WOWLAN_ALL_PKT_DROP BIT(4) #define FW_WOWLAN_GPIO_ACTIVE BIT(5) #define FW_WOWLAN_REKEY_WAKEUP BIT(6) #define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) #define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) #define FW_FW_PARSE_MAGIC_PKT BIT(1) #define FW_REMOTE_WAKE_CTRL_EN BIT(0) #define FW_REALWOWLAN_EN BIT(5) #endif//CONFIG_WOWLAN #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) void rtl8192e_set_wowlan_cmd(_adapter* padapter, u8 enable); void rtl8192e_set_ap_wowlan_cmd(_adapter* padapter, u8 enable); void rtl8192e_set_ap_ps_wowlan_cmd(_adapter* padapter, u8 enable); void SetFwRelatedForWoWLAN8192E(_adapter* padapter, u8 bHostIsGoingtoSleep); #endif /// TX Feedback Content #define USEC_UNIT_FOR_8192E_C2H_TX_RPT_QUEUE_TIME 256 #define GET_8192E_C2H_TX_RPT_QUEUE_SELECT(_Header) LE_BITS_TO_1BYTE((_Header + 0), 0, 5) #define GET_8192E_C2H_TX_RPT_PKT_BROCAST(_Header) LE_BITS_TO_1BYTE((_Header + 0), 5, 1) #define GET_8192E_C2H_TX_RPT_LIFE_TIME_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 6, 1) #define GET_8192E_C2H_TX_RPT_RETRY_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 7, 1) #define GET_8192E_C2H_TX_RPT_MAC_ID(_Header) LE_BITS_TO_1BYTE((_Header + 1), 0, 8) #define GET_8192E_C2H_TX_RPT_DATA_RETRY_CNT(_Header) LE_BITS_TO_1BYTE((_Header + 2), 0, 6) #define GET_8192E_C2H_TX_RPT_QUEUE_TIME(_Header) LE_BITS_TO_2BYTE((_Header + 3), 0, 16) // In unit of 256 microseconds. #define GET_8192E_C2H_TX_RPT_FINAL_DATA_RATE(_Header) LE_BITS_TO_1BYTE((_Header + 5), 0, 8) void C2HContentParsing8192E( IN PADAPTER Adapter, IN u1Byte c2hCmdId, IN u1Byte c2hCmdLen, IN pu1Byte tmpBuf ); VOID C2HPacketHandler_8192E( IN PADAPTER Adapter, IN pu1Byte Buffer, IN u1Byte Length ); #endif//__RTL8188E_CMD_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192e_dm.h000066400000000000000000000026601261122257400212510ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8192E_DM_H__ #define __RTL8192E_DM_H__ void rtl8192e_init_dm_priv(IN PADAPTER Adapter); void rtl8192e_deinit_dm_priv(IN PADAPTER Adapter); void rtl8192e_InitHalDm(IN PADAPTER Adapter); void rtl8192e_HalDmWatchDog(IN PADAPTER Adapter); //VOID rtl8192c_dm_CheckTXPowerTracking(IN PADAPTER Adapter); //void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal); #ifdef CONFIG_ANTENNA_DIVERSITY void AntDivCompare8192e(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); u8 AntDivBeforeLink8192e(PADAPTER Adapter ); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192e_hal.h000066400000000000000000000314351261122257400214170ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8192E_HAL_H__ #define __RTL8192E_HAL_H__ //#include "hal_com.h" #include "hal_data.h" //include HAL Related header after HAL Related compiling flags #include "rtl8192e_spec.h" #include "rtl8192e_rf.h" #include "rtl8192e_dm.h" #include "rtl8192e_recv.h" #include "rtl8192e_xmit.h" #include "rtl8192e_cmd.h" #include "rtl8192e_led.h" #include "Hal8192EPwrSeq.h" #include "Hal8192EPhyReg.h" #include "Hal8192EPhyCfg.h" #ifdef DBG_CONFIG_ERROR_DETECT #include "rtl8192e_sreset.h" #endif //--------------------------------------------------------------------- // RTL8192E From header //--------------------------------------------------------------------- #define RTL8192E_FW_IMG "rtl8192e/FW_NIC.bin" #define RTL8192E_FW_WW_IMG "rtl8192e/FW_WoWLAN.bin" #define RTL8192E_PHY_REG "rtl8192e/PHY_REG.txt" #define RTL8192E_PHY_RADIO_A "rtl8192e/RadioA.txt" #define RTL8192E_PHY_RADIO_B "rtl8192e/RadioB.txt" #define RTL8192E_TXPWR_TRACK "rtl8192e/TxPowerTrack.txt" #define RTL8192E_AGC_TAB "rtl8192e/AGC_TAB.txt" #define RTL8192E_PHY_MACREG "rtl8192e/MAC_REG.txt" #define RTL8192E_PHY_REG_PG "rtl8192e/PHY_REG_PG.txt" #define RTL8192E_PHY_REG_MP "rtl8192e/PHY_REG_MP.txt" #define RTL8192E_TXPWR_LMT "rtl8192e/TXPWR_LMT.txt" #define RTL8192E_WIFI_ANT_ISOLATION "rtl8192e/wifi_ant_isolation.txt" //--------------------------------------------------------------------- // RTL8192E Power Configuration CMDs for PCIe interface //--------------------------------------------------------------------- #define Rtl8192E_NIC_PWR_ON_FLOW rtl8192E_power_on_flow #define Rtl8192E_NIC_RF_OFF_FLOW rtl8192E_radio_off_flow #define Rtl8192E_NIC_DISABLE_FLOW rtl8192E_card_disable_flow #define Rtl8192E_NIC_ENABLE_FLOW rtl8192E_card_enable_flow #define Rtl8192E_NIC_SUSPEND_FLOW rtl8192E_suspend_flow #define Rtl8192E_NIC_RESUME_FLOW rtl8192E_resume_flow #define Rtl8192E_NIC_PDN_FLOW rtl8192E_hwpdn_flow #define Rtl8192E_NIC_LPS_ENTER_FLOW rtl8192E_enter_lps_flow #define Rtl8192E_NIC_LPS_LEAVE_FLOW rtl8192E_leave_lps_flow #if 1 // download firmware related data structure #define FW_SIZE_8192E 0x8000 // Compatible with RTL8192e Maximal RAM code size 32k #define FW_START_ADDRESS 0x1000 #define FW_END_ADDRESS 0x5FFF #define IS_FW_HEADER_EXIST_8192E(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8192E(_pFwHdr) &0xFFF0) == 0x92E0) typedef struct _RT_FIRMWARE_8192E { FIRMWARE_SOURCE eFWSource; #ifdef CONFIG_EMBEDDED_FWIMG u8* szFwBuffer; #else u8 szFwBuffer[FW_SIZE_8192E]; #endif u32 ulFwLength; } RT_FIRMWARE_8192E, *PRT_FIRMWARE_8192E; // // This structure must be cared byte-ordering // // Added by tynli. 2009.12.04. //===================================================== // Firmware Header(8-byte alinment required) //===================================================== //--- LONG WORD 0 ---- #define GET_FIRMWARE_HDR_SIGNATURE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut #define GET_FIRMWARE_HDR_CATEGORY_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI #define GET_FIRMWARE_HDR_FUNCTION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions #define GET_FIRMWARE_HDR_VERSION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version #define GET_FIRMWARE_HDR_SUB_VER_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00 #define GET_FIRMWARE_HDR_RSVD1_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) //--- LONG WORD 1 ---- #define GET_FIRMWARE_HDR_MONTH_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) // Release time Month field #define GET_FIRMWARE_HDR_DATE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) // Release time Date field #define GET_FIRMWARE_HDR_HOUR_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)// Release time Hour field #define GET_FIRMWARE_HDR_MINUTE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)// Release time Minute field #define GET_FIRMWARE_HDR_ROMCODE_SIZE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)// The size of RAM code #define GET_FIRMWARE_HDR_RSVD2_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16) //--- LONG WORD 2 ---- #define GET_FIRMWARE_HDR_SVN_IDX_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)// The SVN entry index #define GET_FIRMWARE_HDR_RSVD3_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32) //--- LONG WORD 3 ---- #define GET_FIRMWARE_HDR_RSVD4_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32) #define GET_FIRMWARE_HDR_RSVD5_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) #endif // download firmware related data structure #define DRIVER_EARLY_INT_TIME_8192E 0x05 #define BCN_DMA_ATIME_INT_TIME_8192E 0x02 #define MAX_RX_DMA_BUFFER_SIZE_8192E 0x3d00 //0x3E80 //0x3FFF // RX 16K reserved for WOW ? //For General Reserved Page Number(Beacon Queue is reserved page) //Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 #define RSVD_PAGE_NUM_8192E 0x08 //For WoWLan , more reserved page //ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, PNO: 6 #ifdef CONFIG_WOWLAN #define WOWLAN_PAGE_NUM_8192E 0x07 #else #define WOWLAN_PAGE_NUM_8192E 0x00 #endif #ifdef CONFIG_PNO_SUPPORT #undef WOWLAN_PAGE_NUM_8192E #define WOWLAN_PAGE_NUM_8192E 0x0d #endif #define TOTAL_RSVD_PAGE_NUMBER_8192E (RSVD_PAGE_NUM_8192E+WOWLAN_PAGE_NUM_8192E) #define TX_TOTAL_PAGE_NUMBER_8192E (0x100 - TOTAL_RSVD_PAGE_NUMBER_8192E) #define TX_PAGE_BOUNDARY_8192E TX_TOTAL_PAGE_NUMBER_8192E #define TX_PAGE_LOAD_FW_BOUNDARY_8192E 0x47 //0xA5 #define TX_PAGE_BOUNDARY_WOWLAN_8192E 0xE0 // For Normal Chip Setting // (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_92C #define NORMAL_PAGE_NUM_HPQ_8192E 0x10 #define NORMAL_PAGE_NUM_LPQ_8192E 0x10 #define NORMAL_PAGE_NUM_NPQ_8192E 0x10 #define NORMAL_PAGE_NUM_EPQ_8192E 0x00 //Note: For WMM Normal Chip Setting ,modify later #define WMM_NORMAL_PAGE_NUM_HPQ_8192E NORMAL_PAGE_NUM_HPQ_8192E #define WMM_NORMAL_PAGE_NUM_LPQ_8192E NORMAL_PAGE_NUM_LPQ_8192E #define WMM_NORMAL_PAGE_NUM_NPQ_8192E NORMAL_PAGE_NUM_NPQ_8192E //------------------------------------------------------------------------- // Chip specific //------------------------------------------------------------------------- // pic buffer descriptor #define RTL8192EE_SEG_NUM TX_BUFFER_SEG_NUM #define TX_DESC_NUM_92E 128 #define RX_DESC_NUM_92E 128 //------------------------------------------------------------------------- // Channel Plan //------------------------------------------------------------------------- #define HWSET_MAX_SIZE_8192E 512 #define EFUSE_REAL_CONTENT_LEN_8192E 512 #define EFUSE_MAP_LEN_8192E 512 #define EFUSE_MAX_SECTION_8192E 64 #define EFUSE_MAX_WORD_UNIT_8192E 4 #define EFUSE_IC_ID_OFFSET_8192E 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. #define AVAILABLE_EFUSE_ADDR_8192E(addr) (addr < EFUSE_REAL_CONTENT_LEN_8192E) // // To prevent out of boundary programming case, leave 1byte and program full section // 9bytes + 1byt + 5bytes and pre 1byte. // For worst case: // | 1byte|----8bytes----|1byte|--5bytes--| // | | Reserved(14bytes) | // #define EFUSE_OOB_PROTECT_BYTES_8192E 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. //======================================================== // EFUSE for BT definition //======================================================== #define EFUSE_BT_REAL_BANK_CONTENT_LEN_8192E 512 #define EFUSE_BT_REAL_CONTENT_LEN_8192E 1024 // 512*2 #define EFUSE_BT_MAP_LEN_8192E 1024 // 1k bytes #define EFUSE_BT_MAX_SECTION_8192E 128 // 1024/8 #define EFUSE_PROTECT_BYTES_BANK_8192E 16 #define EFUSE_MAX_BANK_8192E 3 //=========================================================== #define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) #define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) //#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) //#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) // rtl8812_hal_init.c void _8051Reset8192E(PADAPTER padapter); s32 FirmwareDownload8192E(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); void InitializeFirmwareVars8192E(PADAPTER padapter); s32 InitLLTTable8192E(PADAPTER padapter, u8 txpktbuf_bndy); // EFuse u8 GetEEPROMSize8192E(PADAPTER padapter); void hal_InitPGData_8192E(PADAPTER padapter, u8* PROMContent); void Hal_EfuseParseIDCode8192E(PADAPTER padapter, u8 *hwinfo); void Hal_ReadPROMVersion8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_ReadPowerSavingMode8192E(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail); void Hal_ReadTxPowerInfo8192E(PADAPTER padapter,u8* hwinfo,BOOLEAN AutoLoadFail); void Hal_ReadBoardType8192E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); void Hal_ReadThermalMeter_8192E(PADAPTER Adapter,u8* PROMContent,BOOLEAN AutoloadFail); void Hal_ReadChannelPlan8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_EfuseParseXtal_8192E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); void Hal_ReadAntennaDiversity8192E(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail); void Hal_ReadPAType_8192E(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); void Hal_EfuseParseBTCoexistInfo8192E(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail); u8 Hal_CrystalAFEAdjust(_adapter * Adapter); BOOLEAN HalDetectPwrDownMode8192E(PADAPTER Adapter); #ifdef CONFIG_WOWLAN void Hal_DetectWoWMode(PADAPTER pAdapter); #endif //CONFIG_WOWLAN /***********************************************************/ // RTL8192E-MAC Setting VOID _InitTxBufferBoundary_8192E(IN PADAPTER Adapter,IN u8 txpktbuf_bndy); VOID _InitPageBoundary_8192E(IN PADAPTER Adapter); //VOID _InitTransferPageSize_8192E(IN PADAPTER Adapter); VOID _InitDriverInfoSize_8192E(IN PADAPTER Adapter,IN u8 drvInfoSize); VOID _InitRxSetting_8192E(PADAPTER Adapter); VOID _InitRDGSetting_8192E(PADAPTER Adapter); void _InitID_8192E(IN PADAPTER Adapter); VOID _InitNetworkType_8192E(IN PADAPTER Adapter); VOID _InitWMACSetting_8192E(IN PADAPTER Adapter); VOID _InitAdaptiveCtrl_8192E(IN PADAPTER Adapter); VOID _InitEDCA_8192E( IN PADAPTER Adapter); VOID _InitRetryFunction_8192E( IN PADAPTER Adapter); VOID _InitBeaconParameters_8192E(IN PADAPTER Adapter); VOID _InitBeaconMaxError_8192E( IN PADAPTER Adapter, IN BOOLEAN InfraMode ); void _BBTurnOnBlock_8192E(PADAPTER padapter); void SetBeaconRelatedRegisters8192E(PADAPTER padapter); VOID hal_ReadRFType_8192E(PADAPTER Adapter); // RTL8192E-MAC Setting /***********************************************************/ void SetHwReg8192E(PADAPTER Adapter, u8 variable, u8* val); void GetHwReg8192E(PADAPTER Adapter, u8 variable, u8* val); u8 SetHalDefVar8192E( IN PADAPTER Adapter, IN HAL_DEF_VARIABLE eVariable, IN PVOID pValue ); u8 GetHalDefVar8192E( IN PADAPTER Adapter, IN HAL_DEF_VARIABLE eVariable, IN PVOID pValue ); void rtl8192e_set_hal_ops(struct hal_ops *pHalFunc); void rtl8192e_init_default_value(_adapter * padapter); // register void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); void rtl8192e_start_thread(_adapter *padapter); void rtl8192e_stop_thread(_adapter *padapter); #ifdef CONFIG_PCI_HCI BOOLEAN InterruptRecognized8192EE(PADAPTER Adapter); u16 get_txdesc_buf_addr(u16 ff_hwaddr); #endif #ifdef CONFIG_BT_COEXIST void rtl8192e_combo_card_WifiOnlyHwInit(PADAPTER Adapter); #endif #endif //__RTL8192E_HAL_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192e_led.h000066400000000000000000000031161261122257400214120ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8192E_LED_H__ #define __RTL8192E_LED_H__ //================================================================================ // Interface to manipulate LED objects. //================================================================================ #ifdef CONFIG_USB_HCI void rtl8192eu_InitSwLeds(PADAPTER padapter); void rtl8192eu_DeInitSwLeds(PADAPTER padapter); #endif #ifdef CONFIG_PCI_HCI void rtl8192ee_InitSwLeds(PADAPTER padapter); void rtl8192ee_DeInitSwLeds(PADAPTER padapter); #endif #ifdef CONFIG_SDIO_HCI void rtl8192es_InitSwLeds(PADAPTER padapter); void rtl8192es_DeInitSwLeds(PADAPTER padapter); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192e_recv.h000066400000000000000000000221531261122257400216070ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8192E_RECV_H__ #define __RTL8192E_RECV_H__ #if defined(CONFIG_USB_HCI) #ifndef MAX_RECVBUF_SZ #ifdef PLATFORM_OS_CE #define MAX_RECVBUF_SZ (8192+1024) // 8K+1k #else #ifdef CONFIG_MINIMAL_MEMORY_USAGE #define MAX_RECVBUF_SZ (4000) // about 4K #else #ifdef CONFIG_PLATFORM_MSTAR #define MAX_RECVBUF_SZ (8192) // 8K #else #define MAX_RECVBUF_SZ (32768) // 32k #endif //#define MAX_RECVBUF_SZ (20480) //20K //#define MAX_RECVBUF_SZ (10240) //10K //#define MAX_RECVBUF_SZ (16384) // 16k - 92E RX BUF :16K //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k #endif #endif #endif //!MAX_RECVBUF_SZ #elif defined(CONFIG_PCI_HCI) //#ifndef CONFIG_MINIMAL_MEMORY_USAGE // #define MAX_RECVBUF_SZ (9100) //#else #define MAX_RECVBUF_SZ (4000) // about 4K //#endif #elif defined(CONFIG_SDIO_HCI) #define MAX_RECVBUF_SZ (10240) #endif // Rx smooth factor #define Rx_Smooth_Factor (20) //============= // [1] Rx Buffer Descriptor (for PCIE) buffer descriptor architecture //DWORD 0 #define SET_RX_BUFFER_DESC_DATA_LENGTH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) #define SET_RX_BUFFER_DESC_LS_92E(__pRxStatusDesc,__Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 15, 1, __Value) #define SET_RX_BUFFER_DESC_FS_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 16, 1, __Value) #define SET_RX_BUFFER_DESC_TOTAL_LENGTH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 16, 15, __Value) #define GET_RX_BUFFER_DESC_OWN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) #define GET_RX_BUFFER_DESC_LS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) #define GET_RX_BUFFER_DESC_FS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 1) #define GET_RX_BUFFER_DESC_TOTAL_LENGTH_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 15) //DWORD 1 #define SET_RX_BUFFER_PHYSICAL_LOW_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc+4, 0, 32, __Value) #define GET_RX_BUFFER_PHYSICAL_LOW_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 0, 32) //DWORD 2 #define SET_RX_BUFFER_PHYSICAL_HIGH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc+8, 0, 32, __Value) //============= // [2] Rx Descriptor //DWORD 0 #define GET_RX_STATUS_DESC_PKT_LEN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) #define GET_RX_STATUS_DESC_CRC32_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) #define GET_RX_STATUS_DESC_ICVERR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) #define GET_RX_STATUS_DESC_DRVINFO_SIZE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) #define GET_RX_STATUS_DESC_SECURITY_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) #define GET_RX_STATUS_DESC_QOS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) #define GET_RX_STATUS_DESC_SHIFT_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) #define GET_RX_STATUS_DESC_PHY_STATUS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) #define GET_RX_STATUS_DESC_SWDEC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) #define GET_RX_STATUS_DESC_EOR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) #define GET_RX_STATUS_DESC_OWN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) #define SET_RX_STATUS_DESC_PKT_LEN_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) #define SET_RX_STATUS_DESC_EOR_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) #define SET_RX_STATUS_DESC_OWN_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) //DWORD 1 #define GET_RX_STATUS_DESC_MACID_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) #define GET_RX_STATUS_DESC_TID_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) #define GET_RX_STATUS_DESC_MACID_VLD_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 12, 1) #define GET_RX_STATUS_DESC_AMSDU_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) #define GET_RX_STATUS_DESC_RXID_MATCH_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) #define GET_RX_STATUS_DESC_PAGGR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 15, 1) #define GET_RX_STATUS_DESC_A1_FITS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 16, 4) #define GET_RX_STATUS_DESC_TCPOFFLOAD_CHKERR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 20, 1) #define GET_RX_STATUS_DESC_TCPOFFLOAD_IPVER_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 21, 1) #define GET_RX_STATUS_DESC_TCPOFFLOAD_IS_TCPUDP_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 22, 1) #define GET_RX_STATUS_DESC_TCPOFFLOAD_CHK_VLD_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 23, 1) #define GET_RX_STATUS_DESC_PAM_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 24, 1) #define GET_RX_STATUS_DESC_PWR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 25, 1) #define GET_RX_STATUS_DESC_MORE_DATA_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 26, 1) #define GET_RX_STATUS_DESC_MORE_FRAG_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 27, 1) #define GET_RX_STATUS_DESC_TYPE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 28, 2) #define GET_RX_STATUS_DESC_MC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 30, 1) #define GET_RX_STATUS_DESC_BC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+4, 31, 1) //DWORD 2 #define GET_RX_STATUS_DESC_SEQ_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) #define GET_RX_STATUS_DESC_FRAG_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) #define GET_RX_STATUS_DESC_RX_IS_QOS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) #define GET_RX_STATUS_DESC_WLANHD_IV_LEN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) #define GET_RX_STATUS_DESC_HWRSVD_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 24, 4) #define GET_RX_STATUS_DESC_FCS_OK_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 31, 1) #define GET_RX_STATUS_DESC_RPT_SEL_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) //DWORD 3 #define GET_RX_STATUS_DESC_RX_RATE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) #define GET_RX_STATUS_DESC_HTC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) #define GET_RX_STATUS_DESC_EOSP_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) #define GET_RX_STATUS_DESC_BSSID_FIT_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) #define GET_RX_STATUS_DESC_DMA_AGG_NUM_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) #define GET_RX_STATUS_DESC_PATTERN_MATCH_92E(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) #define GET_RX_STATUS_DESC_UNICAST_92E(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) #define GET_RX_STATUS_DESC_MAGIC_WAKE_92E(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) //DWORD 5 #define GET_RX_STATUS_DESC_TSFL_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) #define GET_RX_STATUS_DESC_BUFF_ADDR_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) #define GET_RX_STATUS_DESC_BUFF_ADDR64_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) #ifdef CONFIG_SDIO_HCI s32 rtl8812s_init_recv_priv(PADAPTER padapter); void rtl8812s_free_recv_priv(PADAPTER padapter); void rtl8812s_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); #endif #ifdef CONFIG_USB_HCI #define INTERRUPT_MSG_FORMAT_LEN 60 void rtl8192eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); s32 rtl8192eu_init_recv_priv(PADAPTER padapter); void rtl8192eu_free_recv_priv(PADAPTER padapter); void rtl8192eu_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); void rtl8192eu_recv_tasklet(void *priv); #endif #ifdef CONFIG_PCI_HCI s32 rtl8192ee_init_recv_priv(PADAPTER padapter); void rtl8192ee_free_recv_priv(PADAPTER padapter); #endif void rtl8192e_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); void rtl8192e_query_rx_phy_status(union recv_frame *prframe, u8 *pphy_stat); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192e_rf.h000066400000000000000000000021361261122257400212560ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8192E_RF_H__ #define __RTL8192E_RF_H__ VOID PHY_RF6052SetBandwidth8192E( IN PADAPTER Adapter, IN CHANNEL_WIDTH Bandwidth); int PHY_RF6052_Config_8192E( IN PADAPTER Adapter ); #endif//__RTL8192E_RF_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192e_spec.h000066400000000000000000000321371261122257400216050ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * *******************************************************************************/ #ifndef __RTL8192E_SPEC_H__ #define __RTL8192E_SPEC_H__ #include //============================================================ // 8192E Regsiter offset definition //============================================================ //============================================================ // //============================================================ //----------------------------------------------------- // // 0x0000h ~ 0x00FFh System Configuration // //----------------------------------------------------- #define REG_SYS_SWR_CTRL1_8192E 0x0010 // 1 Byte #define REG_SYS_SWR_CTRL2_8192E 0x0014 // 1 Byte #define REG_AFE_CTRL1_8192E 0x0024 #define REG_AFE_CTRL2_8192E 0x0028 #define REG_AFE_CTRL3_8192E 0x002c #define REG_SDIO_CTRL_8192E 0x0070 #define REG_OPT_CTRL_8192E 0x0074 #define REG_RF_B_CTRL_8192E 0x0076 #define REG_AFE_CTRL4_8192E 0x0078 #define REG_LDO_SWR_CTRL 0x007C #define REG_FW_DRV_MSG_8192E 0x0088 #define REG_HMEBOX_E2_E3_8192E 0x008C #define REG_HIMR0_8192E 0x00B0 #define REG_HISR0_8192E 0x00B4 #define REG_HIMR1_8192E 0x00B8 #define REG_HISR1_8192E 0x00BC #define REG_SYS_CFG1_8192E 0x00F0 #define REG_SYS_CFG2_8192E 0x00FC //----------------------------------------------------- // // 0x0100h ~ 0x01FFh MACTOP General Configuration // //----------------------------------------------------- #define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) #define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) #define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) #define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN #define REG_RSVD3_8192E 0x0168 #define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 #define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 #define REG_C2HEVT_CMD_LEN_88XX 0x01AE #define REG_HMEBOX_EXT0_8192E 0x01F0 #define REG_HMEBOX_EXT1_8192E 0x01F4 #define REG_HMEBOX_EXT2_8192E 0x01F8 #define REG_HMEBOX_EXT3_8192E 0x01FC //----------------------------------------------------- // // 0x0200h ~ 0x027Fh TXDMA Configuration // //----------------------------------------------------- #define REG_DWBCN0_CTRL 0x0208 #define REG_DWBCN1_CTRL 0x0228 //----------------------------------------------------- // // 0x0280h ~ 0x02FFh RXDMA Configuration // //----------------------------------------------------- #define REG_RXDMA_8192E 0x0290 #define REG_EARLY_MODE_CONTROL_8192E 0x02BC #define REG_RSVD5_8192E 0x02F0 #define REG_RSVD6_8192E 0x02F4 #define REG_RSVD7_8192E 0x02F8 #define REG_RSVD8_8192E 0x02FC //----------------------------------------------------- // // 0x0300h ~ 0x03FFh PCIe // //----------------------------------------------------- #define REG_PCIE_CTRL_REG_8192E 0x0300 #define REG_INT_MIG_8192E 0x0304 // Interrupt Migration #define REG_BCNQ_TXBD_DESA_8192E 0x0308 // TX Beacon Descriptor Address #define REG_MGQ_TXBD_DESA_8192E 0x0310 // TX Manage Queue Descriptor Address #define REG_VOQ_TXBD_DESA_8192E 0x0318 // TX VO Queue Descriptor Address #define REG_VIQ_TXBD_DESA_8192E 0x0320 // TX VI Queue Descriptor Address #define REG_BEQ_TXBD_DESA_8192E 0x0328 // TX BE Queue Descriptor Address #define REG_BKQ_TXBD_DESA_8192E 0x0330 // TX BK Queue Descriptor Address #define REG_RXQ_RXBD_DESA_8192E 0x0338 // RX Queue Descriptor Address #define REG_HI0Q_TXBD_DESA_8192E 0x0340 #define REG_HI1Q_TXBD_DESA_8192E 0x0348 #define REG_HI2Q_TXBD_DESA_8192E 0x0350 #define REG_HI3Q_TXBD_DESA_8192E 0x0358 #define REG_HI4Q_TXBD_DESA_8192E 0x0360 #define REG_HI5Q_TXBD_DESA_8192E 0x0368 #define REG_HI6Q_TXBD_DESA_8192E 0x0370 #define REG_HI7Q_TXBD_DESA_8192E 0x0378 #define REG_MGQ_TXBD_NUM_8192E 0x0380 #define REG_RX_RXBD_NUM_8192E 0x0382 #define REG_VOQ_TXBD_NUM_8192E 0x0384 #define REG_VIQ_TXBD_NUM_8192E 0x0386 #define REG_BEQ_TXBD_NUM_8192E 0x0388 #define REG_BKQ_TXBD_NUM_8192E 0x038A #define REG_HI0Q_TXBD_NUM_8192E 0x038C #define REG_HI1Q_TXBD_NUM_8192E 0x038E #define REG_HI2Q_TXBD_NUM_8192E 0x0390 #define REG_HI3Q_TXBD_NUM_8192E 0x0392 #define REG_HI4Q_TXBD_NUM_8192E 0x0394 #define REG_HI5Q_TXBD_NUM_8192E 0x0396 #define REG_HI6Q_TXBD_NUM_8192E 0x0398 #define REG_HI7Q_TXBD_NUM_8192E 0x039A #define REG_TSFTIMER_HCI_8192E 0x039C //Read Write Point #define REG_VOQ_TXBD_IDX_8192E 0x03A0 #define REG_VIQ_TXBD_IDX_8192E 0x03A4 #define REG_BEQ_TXBD_IDX_8192E 0x03A8 #define REG_BKQ_TXBD_IDX_8192E 0x03AC #define REG_MGQ_TXBD_IDX_8192E 0x03B0 #define REG_RXQ_TXBD_IDX_8192E 0x03B4 #define REG_HI0Q_TXBD_IDX_8192E 0x03B8 #define REG_HI1Q_TXBD_IDX_8192E 0x03BC #define REG_HI2Q_TXBD_IDX_8192E 0x03C0 #define REG_HI3Q_TXBD_IDX_8192E 0x03C4 #define REG_HI4Q_TXBD_IDX_8192E 0x03C8 #define REG_HI5Q_TXBD_IDX_8192E 0x03CC #define REG_HI6Q_TXBD_IDX_8192E 0x03D0 #define REG_HI7Q_TXBD_IDX_8192E 0x03D4 #define REG_PCIE_HCPWM_8192EE 0x03D8 // ?????? #define REG_PCIE_HRPWM_8192EE 0x03DC //PCIe RPWM // ?????? #define REG_DBI_WDATA_V1_8192E 0x03E8 #define REG_DBI_RDATA_V1_8192E 0x03EC #define REG_DBI_FLAG_V1_8192E 0x03F0 #define REG_MDIO_V1_8192E 0x3F4 #define REG_PCIE_MIX_CFG_8192E 0x3F8 //----------------------------------------------------- // // 0x0400h ~ 0x047Fh Protocol Configuration // //----------------------------------------------------- #define REG_TXBF_CTRL_8192E 0x042C #define REG_ARFR0_8192E 0x0444 #define REG_ARFR1_8192E 0x044C #define REG_CCK_CHECK_8192E 0x0454 #define REG_AMPDU_MAX_TIME_8192E 0x0456 #define REG_BCNQ1_BDNY_8192E 0x0457 #define REG_AMPDU_MAX_LENGTH_8192E 0x0458 #define REG_WMAC_LBK_BUF_HD_8192E 0x045D #define REG_NDPA_OPT_CTRL_8192E 0x045F #define REG_DATA_SC_8192E 0x0483 #define REG_ARFR2_8192E 0x048C #define REG_ARFR3_8192E 0x0494 #define REG_TXRPT_START_OFFSET 0x04AC #define REG_AMPDU_BURST_MODE_8192E 0x04BC #define REG_HT_SINGLE_AMPDU_8192E 0x04C7 #define REG_MACID_PKT_DROP0_8192E 0x04D0 //----------------------------------------------------- // // 0x0500h ~ 0x05FFh EDCA Configuration // //----------------------------------------------------- #define REG_CTWND_8192E 0x0572 #define REG_SECONDARY_CCA_CTRL_8192E 0x0577 #define REG_SCH_TXCMD_8192E 0x05F8 //----------------------------------------------------- // // 0x0600h ~ 0x07FFh WMAC Configuration // //----------------------------------------------------- #define REG_MAC_CR_8192E 0x0600 #define REG_MAC_TX_SM_STATE_8192E 0x06B4 // Power #define REG_BFMER0_INFO_8192E 0x06E4 #define REG_BFMER1_INFO_8192E 0x06EC #define REG_CSI_RPT_PARAM_BW20_8192E 0x06F4 #define REG_CSI_RPT_PARAM_BW40_8192E 0x06F8 #define REG_CSI_RPT_PARAM_BW80_8192E 0x06FC // Hardware Port 2 #define REG_BFMEE_SEL_8192E 0x0714 #define REG_SND_PTCL_CTRL_8192E 0x0718 //----------------------------------------------------- // // Redifine register definition for compatibility // //----------------------------------------------------- // TODO: use these definition when using REG_xxx naming rule. // NOTE: DO NOT Remove these definition. Use later. #define ISR_8192E REG_HISR0_8192E //---------------------------------------------------------------------------- // 8192E IMR/ISR bits (offset 0xB0, 8bits) //---------------------------------------------------------------------------- #define IMR_DISABLED_8192E 0 // IMR DW0(0x00B0-00B3) Bit 0-31 #define IMR_TIMER2_8192E BIT31 // Timeout interrupt 2 #define IMR_TIMER1_8192E BIT30 // Timeout interrupt 1 #define IMR_PSTIMEOUT_8192E BIT29 // Power Save Time Out Interrupt #define IMR_GTINT4_8192E BIT28 // When GTIMER4 expires, this bit is set to 1 #define IMR_GTINT3_8192E BIT27 // When GTIMER3 expires, this bit is set to 1 #define IMR_TXBCN0ERR_8192E BIT26 // Transmit Beacon0 Error #define IMR_TXBCN0OK_8192E BIT25 // Transmit Beacon0 OK #define IMR_TSF_BIT32_TOGGLE_8192E BIT24 // TSF Timer BIT32 toggle indication interrupt #define IMR_BCNDMAINT0_8192E BIT20 // Beacon DMA Interrupt 0 #define IMR_BCNDERR0_8192E BIT16 // Beacon Queue DMA OK0 #define IMR_HSISR_IND_ON_INT_8192E BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) #define IMR_BCNDMAINT_E_8192E BIT14 // Beacon DMA Interrupt Extension for Win7 #define IMR_ATIMEND_8192E BIT12 // CTWidnow End or ATIM Window End #define IMR_C2HCMD_8192E BIT10 // CPU to Host Command INT Status, Write 1 clear #define IMR_CPWM2_8192E BIT9 // CPU power Mode exchange INT Status, Write 1 clear #define IMR_CPWM_8192E BIT8 // CPU power Mode exchange INT Status, Write 1 clear #define IMR_HIGHDOK_8192E BIT7 // High Queue DMA OK #define IMR_MGNTDOK_8192E BIT6 // Management Queue DMA OK #define IMR_BKDOK_8192E BIT5 // AC_BK DMA OK #define IMR_BEDOK_8192E BIT4 // AC_BE DMA OK #define IMR_VIDOK_8192E BIT3 // AC_VI DMA OK #define IMR_VODOK_8192E BIT2 // AC_VO DMA OK #define IMR_RDU_8192E BIT1 // Rx Descriptor Unavailable #define IMR_ROK_8192E BIT0 // Receive DMA OK // IMR DW1(0x00B4-00B7) Bit 0-31 #define IMR_BCNDMAINT7_8192E BIT27 // Beacon DMA Interrupt 7 #define IMR_BCNDMAINT6_8192E BIT26 // Beacon DMA Interrupt 6 #define IMR_BCNDMAINT5_8192E BIT25 // Beacon DMA Interrupt 5 #define IMR_BCNDMAINT4_8192E BIT24 // Beacon DMA Interrupt 4 #define IMR_BCNDMAINT3_8192E BIT23 // Beacon DMA Interrupt 3 #define IMR_BCNDMAINT2_8192E BIT22 // Beacon DMA Interrupt 2 #define IMR_BCNDMAINT1_8192E BIT21 // Beacon DMA Interrupt 1 #define IMR_BCNDOK7_8192E BIT20 // Beacon Queue DMA OK Interrup 7 #define IMR_BCNDOK6_8192E BIT19 // Beacon Queue DMA OK Interrup 6 #define IMR_BCNDOK5_8192E BIT18 // Beacon Queue DMA OK Interrup 5 #define IMR_BCNDOK4_8192E BIT17 // Beacon Queue DMA OK Interrup 4 #define IMR_BCNDOK3_8192E BIT16 // Beacon Queue DMA OK Interrup 3 #define IMR_BCNDOK2_8192E BIT15 // Beacon Queue DMA OK Interrup 2 #define IMR_BCNDOK1_8192E BIT14 // Beacon Queue DMA OK Interrup 1 #define IMR_ATIMEND_E_8192E BIT13 // ATIM Window End Extension for Win7 #define IMR_TXERR_8192E BIT11 // Tx Error Flag Interrupt Status, write 1 clear. #define IMR_RXERR_8192E BIT10 // Rx Error Flag INT Status, Write 1 clear #define IMR_TXFOVW_8192E BIT9 // Transmit FIFO Overflow #define IMR_RXFOVW_8192E BIT8 // Receive FIFO Overflow //---------------------------------------------------------------------------- // 8192E Auto LLT bits (offset 0x224, 8bits) //---------------------------------------------------------------------------- //224 REG_AUTO_LLT // move to hal_com_reg.h //---------------------------------------------------------------------------- // 8192E Auto LLT bits (offset 0x290, 32bits) //---------------------------------------------------------------------------- #define BIT_DMA_MODE BIT1 #define BIT_USB_RXDMA_AGG_EN BIT31 //---------------------------------------------------------------------------- // 8192E REG_SYS_CFG1 (offset 0xF0, 32bits) //---------------------------------------------------------------------------- #define BIT_SPSLDO_SEL BIT24 //---------------------------------------------------------------------------- // 8192E REG_CCK_CHECK (offset 0x454, 8bits) //---------------------------------------------------------------------------- #define BIT_BCN_PORT_SEL BIT5 //============================================================================ // Regsiter Bit and Content definition //============================================================================ //2 ACMHWCTRL 0x05C0 #define AcmHw_HwEn_8192E BIT(0) #define AcmHw_VoqEn_8192E BIT(1) #define AcmHw_ViqEn_8192E BIT(2) #define AcmHw_BeqEn_8192E BIT(3) #define AcmHw_VoqStatus_8192E BIT(5) #define AcmHw_ViqStatus_8192E BIT(6) #define AcmHw_BeqStatus_8192E BIT(7) //======================================================== // General definitions //======================================================== #define MACID_NUM_8192E 128 #define CAM_ENTRY_NUM_8192E 64 #endif //__RTL8192E_SPEC_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192e_sreset.h000066400000000000000000000022551261122257400221560ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTL88812A_SRESET_H_ #define _RTL8812A_SRESET_H_ #include #ifdef DBG_CONFIG_ERROR_DETECT extern void rtl8192e_sreset_xmit_status_check(_adapter *padapter); extern void rtl8192e_sreset_linked_status_check(_adapter *padapter); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8192e_xmit.h000066400000000000000000000454171261122257400216410ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8192E_XMIT_H__ #define __RTL8192E_XMIT_H__ typedef struct txdescriptor_8192e { //Offset 0 u32 pktlen:16; u32 offset:8; u32 bmc:1; u32 htc:1; u32 ls:1; u32 fs:1; u32 linip:1; u32 noacm:1; u32 gf:1; u32 own:1; //Offset 4 u32 macid:6; u32 rsvd0406:2; u32 qsel:5; u32 rd_nav_ext:1; u32 lsig_txop_en:1; u32 pifs:1; u32 rate_id:4; u32 navusehdr:1; u32 en_desc_id:1; u32 sectype:2; u32 rsvd0424:2; u32 pkt_offset:5; // unit: 8 bytes u32 rsvd0431:1; //Offset 8 u32 rts_rc:6; u32 data_rc:6; u32 agg_en:1; u32 rd_en:1; u32 bar_rty_th:2; u32 bk:1; u32 morefrag:1; u32 raw:1; u32 ccx:1; u32 ampdu_density:3; u32 bt_null:1; u32 ant_sel_a:1; u32 ant_sel_b:1; u32 tx_ant_cck:2; u32 tx_antl:2; u32 tx_ant_ht:2; //Offset 12 u32 nextheadpage:8; u32 tailpage:8; u32 seq:12; u32 cpu_handle:1; u32 tag1:1; u32 trigger_int:1; u32 hwseq_en:1; //Offset 16 u32 rtsrate:5; u32 ap_dcfe:1; u32 hwseq_sel:2; u32 userate:1; u32 disrtsfb:1; u32 disdatafb:1; u32 cts2self:1; u32 rtsen:1; u32 hw_rts_en:1; u32 port_id:1; u32 pwr_status:3; u32 wait_dcts:1; u32 cts2ap_en:1; u32 data_sc:2; u32 data_stbc:2; u32 data_short:1; u32 data_bw:1; u32 rts_short:1; u32 rts_bw:1; u32 rts_sc:2; u32 vcs_stbc:2; //Offset 20 u32 datarate:6; u32 sgi:1; u32 try_rate:1; u32 data_ratefb_lmt:5; u32 rts_ratefb_lmt:4; u32 rty_lmt_en:1; u32 data_rt_lmt:6; u32 usb_txagg_num:8; //Offset 24 u32 txagg_a:5; u32 txagg_b:5; u32 use_max_len:1; u32 max_agg_num:5; u32 mcsg1_max_len:4; u32 mcsg2_max_len:4; u32 mcsg3_max_len:4; u32 mcs7_sgi_max_len:4; //Offset 28 u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB) u32 mcsg4_max_len:4; u32 mcsg5_max_len:4; u32 mcsg6_max_len:4; u32 mcs15_sgi_max_len:4; }TXDESC_8192E, *PTXDESC_8192E; //For 88e early mode #define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) #define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) #define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) #define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) #define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) #define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) #define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) // //defined for TX DESC Operation // #define MAX_TID (15) //OFFSET 0 #define OFFSET_SZ 0 #define OFFSET_SHT 16 #define BMC BIT(24) #define LSG BIT(26) #define FSG BIT(27) #define OWN BIT(31) //OFFSET 4 #define PKT_OFFSET_SZ 0 #define QSEL_SHT 8 #define RATE_ID_SHT 16 #define NAVUSEHDR BIT(20) #define SEC_TYPE_SHT 22 #define PKT_OFFSET_SHT 26 //OFFSET 8 #define AGG_EN BIT(12) #define AGG_BK BIT(16) #define AMPDU_DENSITY_SHT 20 #define ANTSEL_A BIT(24) #define ANTSEL_B BIT(25) #define TX_ANT_CCK_SHT 26 #define TX_ANTL_SHT 28 #define TX_ANT_HT_SHT 30 //OFFSET 12 #define SEQ_SHT 16 #define EN_HWSEQ BIT(31) //OFFSET 16 #define QOS BIT(6) #define HW_SSN BIT(7) #define USERATE BIT(8) #define DISDATAFB BIT(10) #define CTS_2_SELF BIT(11) #define RTS_EN BIT(12) #define HW_RTS_EN BIT(13) #define DATA_SHORT BIT(24) #define PWR_STATUS_SHT 15 #define DATA_SC_SHT 20 #define DATA_BW BIT(25) //OFFSET 20 #define RTY_LMT_EN BIT(17) //OFFSET 20 #define SGI BIT(6) #define USB_TXAGG_NUM_SHT 24 //=====Tx Desc Buffer content // config element for each tx buffer /* #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16), 0, 16, __Valeu) #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16), 31, 1, __Valeu) #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+4, 0, 32, __Valeu) #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+8, 0, 32, __Valeu) */ #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu) #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu) #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu) #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+8, 0, 32, __Valeu) // Dword 0 #define SET_TX_BUFF_DESC_LEN_0_92E(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu) #define SET_TX_BUFF_DESC_PSB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) #define SET_TX_BUFF_DESC_OWN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) // Dword 1 #define SET_TX_BUFF_DESC_ADDR_LOW_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) #define GET_TX_DESC_TX_BUFFER_ADDRESS_92E(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0,32) // Dword 2 #define SET_TX_BUFF_DESC_ADDR_HIGH_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 32, __Value) // Dword 3, RESERVED //=====Tx Desc content // Dword 0 #define SET_TX_DESC_PKT_SIZE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) #define SET_TX_DESC_OFFSET_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) #define SET_TX_DESC_BMC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) #define SET_TX_DESC_HTC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) #define SET_TX_DESC_LAST_SEG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) #define SET_TX_DESC_FIRST_SEG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) #define SET_TX_DESC_LINIP_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) #define SET_TX_DESC_NO_ACM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) #define SET_TX_DESC_GF_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) #define SET_TX_DESC_OWN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) #define GET_TX_DESC_OWN_92E(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) // Dword 1 #define SET_TX_DESC_MACID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) #define SET_TX_DESC_QUEUE_SEL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) #define SET_TX_DESC_RDG_NAV_EXT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) #define SET_TX_DESC_LSIG_TXOP_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) #define SET_TX_DESC_PIFS_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) #define SET_TX_DESC_RATE_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) #define SET_TX_DESC_EN_DESC_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) #define SET_TX_DESC_SEC_TYPE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) #define SET_TX_DESC_PKT_OFFSET_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) #define SET_TX_DESC_MORE_DATA_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) #define SET_TX_DESC_TXOP_PS_CAP_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 30, 1, __Value) #define SET_TX_DESC_TXOP_PS_MODE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 31, 1, __Value) // Dword 2 #define SET_TX_DESC_PAID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) #define SET_TX_DESC_CCA_RTS_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) #define SET_TX_DESC_AGG_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) #define SET_TX_DESC_RDG_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) #define SET_TX_DESC_NULL_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) #define SET_TX_DESC_NULL_1_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) #define SET_TX_DESC_BK_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) #define SET_TX_DESC_MORE_FRAG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) #define SET_TX_DESC_RAW_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) #define GET_TX_DESC_MORE_FRAG_92E(__pTxDesc) LE_BITS_TO_4BYTE( __pTxDesc+8, 17, 1) #define SET_TX_DESC_SPE_RPT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) #define SET_TX_DESC_AMPDU_DENSITY_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) #define SET_TX_DESC_BT_NULL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) #define SET_TX_DESC_GID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) // Dword 3 #define SET_TX_DESC_WHEADER_LEN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) #define SET_TX_DESC_CHK_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) #define SET_TX_DESC_EARLY_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) #define SET_TX_DESC_HWSEQ_SEL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) #define SET_TX_DESC_USE_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) #define SET_TX_DESC_DISABLE_RTS_FB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) #define SET_TX_DESC_DISABLE_FB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) #define SET_TX_DESC_CTS2SELF_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) #define SET_TX_DESC_RTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) #define SET_TX_DESC_HW_RTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) #define SET_TX_DESC_HW_PORT_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 1, __Value) #define SET_TX_DESC_NAV_USE_HDR_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) #define SET_TX_DESC_USE_MAX_LEN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) #define SET_TX_DESC_MAX_AGG_NUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) #define SET_TX_DESC_NDPA_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) #define SET_TX_DESC_AMPDU_MAX_TIME_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) // Dword 4 #define SET_TX_DESC_TX_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) #define SET_TX_DESC_TRY_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) #define SET_TX_DESC_DATA_RATE_FB_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) #define SET_TX_DESC_RTS_RATE_FB_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) #define SET_TX_DESC_RETRY_LIMIT_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) #define SET_TX_DESC_DATA_RETRY_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) #define SET_TX_DESC_RTS_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) #define SET_TX_DESC_PCTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) #define SET_TX_DESC_PCTS_MASK_IDX_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) // Dword 5 #define SET_TX_DESC_DATA_SC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) #define SET_TX_DESC_DATA_SHORT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) #define SET_TX_DESC_DATA_BW_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) #define SET_TX_DESC_DATA_LDPC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) #define SET_TX_DESC_DATA_STBC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) #define SET_TX_DESC_VCS_STBC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) #define SET_TX_DESC_RTS_SHORT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) #define SET_TX_DESC_RTS_SC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) #define SET_TX_DESC_TX_ANT_92E(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) #define SET_TX_DESC_TX_POWER_0_PSET_92E(__pTxDesc,__Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) // Dword 6 #define SET_TX_DESC_SW_DEFINE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) #define SET_TX_DESC_MBSSID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) #define SET_TX_DESC_ANTSEL_A_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) #define SET_TX_DESC_ANTSEL_B_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) #define SET_TX_DESC_ANTSEL_C_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) #define SET_TX_DESC_ANTSEL_D_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) // Dword 7 #if(DEV_BUS_TYPE == RT_PCI_INTERFACE) #define SET_TX_DESC_TX_BUFFER_SIZE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) #else #define SET_TX_DESC_TX_DESC_CHECKSUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) #endif #define SET_TX_DESC_USB_TXAGG_NUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) //#define SET_TX_DESC_HWSEQ_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) // Dword 8 #define SET_TX_DESC_RTS_RC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) #define SET_TX_DESC_BAR_RTY_TH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) #define SET_TX_DESC_DATA_RC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) #define SET_TX_DESC_EN_HWSEQ_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) #define SET_TX_DESC_NEXT_HEAD_PAGE_92E(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) #define SET_TX_DESC_TAIL_PAGE_92E(__pTxDesc,__Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) // Dword 9 #define SET_TX_DESC_PADDING_LENGTH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) #define SET_TX_DESC_TXBF_PATH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 11, 1, __Value) #define SET_TX_DESC_SEQ_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) #define SET_TX_DESC_FINAL_DATA_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value) #define SET_EARLYMODE_PKTNUM_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) #define SET_EARLYMODE_LEN0_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) #define SET_EARLYMODE_LEN1_1_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) #define SET_EARLYMODE_LEN1_2_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) #define SET_EARLYMODE_LEN2_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) #define SET_EARLYMODE_LEN3_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) void rtl8192e_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull); #ifdef CONFIG_USB_HCI s32 rtl8192eu_init_xmit_priv(PADAPTER padapter); void rtl8192eu_free_xmit_priv(PADAPTER padapter); s32 rtl8192eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); s32 rtl8192eu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); s32 rtl8192eu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); s32 rtl8192eu_xmit_buf_handler(PADAPTER padapter); #define hal_xmit_handler rtl8192eu_xmit_buf_handler void rtl8192eu_xmit_tasklet(void *priv); s32 rtl8192eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); #endif #ifdef CONFIG_PCI_HCI s32 rtl8192ee_init_xmit_priv(PADAPTER padapter); void rtl8192ee_free_xmit_priv(PADAPTER padapter); struct xmit_buf *rtl8192ee_dequeue_xmitbuf(struct rtw_tx_ring *ring); s32 rtl8192ee_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); void rtl8192ee_xmitframe_resume(_adapter *padapter); s32 rtl8192ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); s32 rtl8192ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); void rtl8192ee_xmit_tasklet(void *priv); #endif struct txrpt_ccx_92e { /* offset 0 */ u8 tag1:1; u8 pkt_num:3; u8 txdma_underflow:1; u8 int_bt:1; u8 int_tri:1; u8 int_ccx:1; /* offset 1 */ u8 mac_id:6; u8 pkt_ok:1; u8 bmc:1; /* offset 2 */ u8 retry_cnt:6; u8 lifetime_over:1; u8 retry_over:1; /* offset 3 */ u8 ccx_qtime0; u8 ccx_qtime1; /* offset 5 */ u8 final_data_rate; /* offset 6 */ u8 sw1:4; u8 qsel:4; /* offset 7 */ u8 sw0; }; #ifdef CONFIG_TX_EARLY_MODE void UpdateEarlyModeInfo8192E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ); #endif void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,u8 *ptxdesc); u8 BWMapping_92E(PADAPTER Adapter, struct pkt_attrib *pattrib); u8 SCMapping_92E(PADAPTER Adapter, struct pkt_attrib *pattrib); #endif //__RTL8192E_XMIT_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723a_cmd.h000066400000000000000000000152111261122257400214040ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8723A_CMD_H__ #define __RTL8723A_CMD_H__ #define H2C_8723A_BT_FW_PATCH_LEN 3 #define H2C_BT_PWR_FORCE_LEN 3 enum cmd_msg_element_id { NONE_CMDMSG_EID, AP_OFFLOAD_EID = 0, SET_PWRMODE_EID = 1, JOINBSS_RPT_EID = 2, RSVD_PAGE_EID = 3, RSSI_4_EID = 4, RSSI_SETTING_EID = 5, MACID_CONFIG_EID = 6, MACID_PS_MODE_EID = 7, P2P_PS_OFFLOAD_EID = 8, SELECTIVE_SUSPEND_ROF_CMD = 9, BT_QUEUE_PKT_EID = 17, BT_ANT_TDMA_EID = 20, BT_2ANT_HID_EID = 21, P2P_PS_CTW_CMD_EID = 32, FORCE_BT_TX_PWR_EID = 33, SET_TDMA_WLAN_ACT_TIME_EID = 34, SET_BT_TX_RETRY_INDEX_EID = 35, HID_PROFILE_ENABLE_EID = 36, BT_IGNORE_WLAN_ACT_EID = 37, BT_PTA_MANAGER_UPDATE_ENABLE_EID = 38, DAC_SWING_VALUE_EID = 41, TRADITIONAL_TDMA_EN_EID = 51, H2C_8723A_BT_FW_PATCH = 54, B_TYPE_TDMA_EID = 58, SCAN_EN_EID = 59, LOWPWR_LPS_EID = 71, H2C_8723A_RESET_TSF = 75, MAX_CMDMSG_EID }; struct cmd_msg_parm { u8 eid; //element id u8 sz; // sz u8 buf[6]; }; typedef struct _SETPWRMODE_PARM { u8 Mode; u8 SmartPS; u8 AwakeInterval; // unit: beacon interval u8 bAllQueueUAPSD; #if 0 u8 LowRxBCN:1; u8 AutoAntSwitch:1; u8 PSAllowBTHighPriority:1; u8 rsvd43:5; #else #define SETPM_LOWRXBCN BIT(0) #define SETPM_AUTOANTSWITCH BIT(1) #define SETPM_PSALLOWBTHIGHPRI BIT(2) u8 BcnAntMode; #endif }__attribute__((__packed__)) SETPWRMODE_PARM, *PSETPWRMODE_PARM; struct H2C_SS_RFOFF_PARAM{ u8 ROFOn; // 1: on, 0:off u16 gpio_period; // unit: 1024 us }__attribute__ ((packed)); typedef struct JOINBSSRPT_PARM_8723A{ u8 OpMode; // RT_MEDIA_STATUS }JOINBSSRPT_PARM_8723A, *PJOINBSSRPT_PARM_8723A; typedef struct _RSVDPAGE_LOC_8723A { u8 LocProbeRsp; u8 LocPsPoll; u8 LocNullData; u8 LocQosNull; u8 LocBTQosNull; } RSVDPAGE_LOC_8723A, *PRSVDPAGE_LOC_8723A; typedef struct _B_TYPE_TDMA_PARM { #if 0 u8 En:1; u8 FixAntennaInBTSide:1; u8 TxPspoll:1; u8 val870:1; // value of 870, when disable u8 AutoWakeUp:1; u8 NoPS:1; u8 WlanHighPriority:1; u8 rsvd07:1; #else #define B_TDMA_EN BIT(0) #define B_TDMA_FIXANTINBT BIT(1) #define B_TDMA_TXPSPOLL BIT(2) #define B_TDMA_VAL870 BIT(3) #define B_TDMA_AUTOWAKEUP BIT(4) #define B_TDMA_NOPS BIT(5) #define B_TDMA_WLANHIGHPRI BIT(6) u8 option; #endif u8 TBTTOnPeriod; u8 MedPeriod; u8 rsvd30; }__attribute__((__packed__)) B_TYPE_TDMA_PARM, *PB_TYPE_TDMA_PARM; typedef struct _SCAN_EN_PARM { #if 0 u8 En:1; u8 rsvd01:7; #else u8 En; #endif }__attribute__((__packed__)) SCAN_EN_PARM, *PSCAN_EN_PARM; // BT_PWR #define SET_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) // BT_FW_PATCH #if 0 #define SET_H2CCMD_BT_FW_PATCH_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) #define SET_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((__pH2CCmd)+1, 0, 16, __Value) #else #define SET_H2CCMD_BT_FW_PATCH_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_4BYTE(__pH2CCmd, 0, 8, __Value) // SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) #define SET_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_4BYTE(__pH2CCmd, 8, 16, __Value) // SET_BITS_TO_LE_2BYTE((__pH2CCmd)+1, 0, 16, __Value) #endif #if 0 /* * H2C_LOWPWR_LPS * h2c cmd = 71 * byte1[6:0]= bcn count : how many bcn not recevied should return to old mechanism * byte1[7] = enable : enable mechanism * byte2=bcn period : bcn recv time of this AP, unit 32 us * byte3= drop threshold : how many pkts be droped, rx dma should be release * byte4 = max early period * byte5 = max bcn timeout period */ #define SET_H2CCMD_LOWPWR_LPS_BCN_COUNT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) #define SET_H2CCMD_LOWPWR_LPS_TB_BCN_THRESH(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 3, __Value) #define SET_H2CCMD_LOWPWR_LPS_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) #define SET_H2CCMD_LOWPWR_LPS_BCN_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) #define SET_H2CCMD_LOWPWR_LPS_BCN_DROP_THRESH(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) #define SET_H2CCMD_LOWPWR_LPS_MAX_EARLY_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) #define SET_H2CCMD_LOWPWR_LPS_MAX_BCN_TO_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) #else typedef struct _LOWPWR_LPS_PARM { u8 bcn_count:4; u8 tb_bcn_threshold:3; u8 enable:1; u8 bcn_interval; u8 drop_threshold; u8 max_early_period; u8 max_bcn_timeout_period; }__attribute__((__packed__)) LOWPWR_LPS_PARM, *PLOWPWR_LPS_PARM; #endif // host message to firmware cmd void rtl8723a_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); void rtl8723a_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus); #ifdef CONFIG_BT_COEXIST void rtl8723a_set_BTCoex_AP_mode_FwRsvdPkt_cmd(PADAPTER padapter); #endif u8 rtl8192c_set_rssi_cmd(PADAPTER padapter, u8 *param); //u8 rtl8723a_set_rssi_cmd(PADAPTER padapter, u8 *param); void rtl8192c_set_raid_cmd(PADAPTER padapter, u32 mask, u8* arg); //u8 rtl8723a_set_raid_cmd(PADAPTER padapter, u32 mask, u8 arg); void rtl8192c_Add_RateATid(PADAPTER padapter, u32 bitmap, u8* arg, u8 rssi_level); //void rtl8723a_Add_RateATid(PADAPTER padapter, u32 bitmap, u8 arg); u8 rtl8192c_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period); //u8 rtl8723a_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period); #ifdef CONFIG_P2P void rtl8192c_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); //void rtl8723a_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); #endif //CONFIG_P2P void CheckFwRsvdPageContent(PADAPTER padapter); #endif #ifdef CONFIG_TSF_RESET_OFFLOAD u8 rtl8723c_reset_tsf(_adapter *padapter, u8 reset_port); #endif // CONFIG_TSF_RESET_OFFLOAD s32 FillH2CCmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723a_dm.h000066400000000000000000000031551261122257400212450ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8723A_DM_H__ #define __RTL8723A_DM_H__ //============================================================ // Description: // // This file is for 8723A dynamic mechanism only // // //============================================================ //============================================================ // structure and define //============================================================ //============================================================ // function prototype //============================================================ void rtl8723a_init_dm_priv(PADAPTER padapter); void rtl8723a_deinit_dm_priv(PADAPTER padapter); void rtl8723a_InitHalDm(PADAPTER padapter); void rtl8723a_HalDmWatchDog(PADAPTER padapter); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723a_hal.h000066400000000000000000000351751261122257400214200ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8723A_HAL_H__ #define __RTL8723A_HAL_H__ //#include "hal_com.h" #include "hal_data.h" #include "rtl8723a_spec.h" #include "rtl8723a_pg.h" #include "Hal8723APhyReg.h" #include "Hal8723APhyCfg.h" #include "rtl8723a_rf.h" #include "rtl8723a_dm.h" #include "rtl8723a_recv.h" #include "rtl8723a_xmit.h" #include "rtl8723a_cmd.h" #include "rtl8723a_led.h" #include "Hal8723PwrSeq.h" #ifdef DBG_CONFIG_ERROR_DETECT #include "rtl8723a_sreset.h" #endif #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) //2TODO: We should define 8192S firmware related macro settings here!! #define RTL819X_DEFAULT_RF_TYPE RF_1T2R #define RTL819X_TOTAL_RF_PATH 2 //--------------------------------------------------------------------- // RTL8723S From file //--------------------------------------------------------------------- #define RTL8723_FW_UMC_IMG "rtl8723S\\rtl8723fw.bin" #define RTL8723_FW_UMC_B_IMG "rtl8723S\\rtl8723fw_B.bin" #define RTL8723_PHY_REG "rtl8723S\\PHY_REG_1T.txt" #define RTL8723_PHY_RADIO_A "rtl8723S\\radio_a_1T.txt" #define RTL8723_PHY_RADIO_B "rtl8723S\\radio_b_1T.txt" #define RTL8723_AGC_TAB "rtl8723S\\AGC_TAB_1T.txt" #define RTL8723_PHY_MACREG "rtl8723S\\MAC_REG.txt" #define RTL8723_PHY_REG_PG "rtl8723S\\PHY_REG_PG.txt" #define RTL8723_PHY_REG_MP "rtl8723S\\PHY_REG_MP.txt" //--------------------------------------------------------------------- // RTL8723S From header //--------------------------------------------------------------------- // Fw Array #define Rtl8723_FwImageArray Rtl8723SFwImgArray #define Rtl8723_FwUMCBCutImageArrayWithBT Rtl8723SFwUMCBCutImgArrayWithBT #define Rtl8723_FwUMCBCutImageArrayWithoutBT Rtl8723SFwUMCBCutImgArrayWithoutBT #define Rtl8723_ImgArrayLength Rtl8723SImgArrayLength #define Rtl8723_UMCBCutImgArrayWithBTLength Rtl8723SUMCBCutImgArrayWithBTLength #define Rtl8723_UMCBCutImgArrayWithoutBTLength Rtl8723SUMCBCutImgArrayWithoutBTLength #define Rtl8723_PHY_REG_Array_PG Rtl8723SPHY_REG_Array_PG #define Rtl8723_PHY_REG_Array_PGLength Rtl8723SPHY_REG_Array_PGLength #if MP_DRIVER == 1 #define Rtl8723E_FwBTImgArray Rtl8723EFwBTImgArray #define Rtl8723E_FwBTImgArrayLength Rtl8723EBTImgArrayLength #define Rtl8723_FwUMCBCutMPImageArray Rtl8723SFwUMCBCutMPImgArray #define Rtl8723_UMCBCutMPImgArrayLength Rtl8723SUMCBCutMPImgArrayLength #define Rtl8723_PHY_REG_Array_MP Rtl8723SPHY_REG_Array_MP #define Rtl8723_PHY_REG_Array_MPLength Rtl8723SPHY_REG_Array_MPLength #endif #endif // CONFIG_SDIO_HCI #ifdef CONFIG_USB_HCI //2TODO: We should define 8192S firmware related macro settings here!! #define RTL819X_DEFAULT_RF_TYPE RF_1T2R #define RTL819X_TOTAL_RF_PATH 2 //TODO: The following need to check!! #define RTL8723_FW_UMC_IMG "rtl8192CU\\rtl8723fw.bin" #define RTL8723_FW_UMC_B_IMG "rtl8192CU\\rtl8723fw_B.bin" #define RTL8723_PHY_REG "rtl8723S\\PHY_REG_1T.txt" #define RTL8723_PHY_RADIO_A "rtl8723S\\radio_a_1T.txt" #define RTL8723_PHY_RADIO_B "rtl8723S\\radio_b_1T.txt" #define RTL8723_AGC_TAB "rtl8723S\\AGC_TAB_1T.txt" #define RTL8723_PHY_MACREG "rtl8723S\\MAC_REG.txt" #define RTL8723_PHY_REG_PG "rtl8723S\\PHY_REG_PG.txt" #define RTL8723_PHY_REG_MP "rtl8723S\\PHY_REG_MP.txt" //--------------------------------------------------------------------- // RTL8723S From header //--------------------------------------------------------------------- // Fw Array #define Rtl8723_FwImageArray Rtl8723UFwImgArray #define Rtl8723_FwUMCBCutImageArrayWithBT Rtl8723UFwUMCBCutImgArrayWithBT #define Rtl8723_FwUMCBCutImageArrayWithoutBT Rtl8723UFwUMCBCutImgArrayWithoutBT #define Rtl8723_ImgArrayLength Rtl8723UImgArrayLength #define Rtl8723_UMCBCutImgArrayWithBTLength Rtl8723UUMCBCutImgArrayWithBTLength #define Rtl8723_UMCBCutImgArrayWithoutBTLength Rtl8723UUMCBCutImgArrayWithoutBTLength #define Rtl8723_PHY_REG_Array_PG Rtl8723UPHY_REG_Array_PG #define Rtl8723_PHY_REG_Array_PGLength Rtl8723UPHY_REG_Array_PGLength #if MP_DRIVER == 1 #define Rtl8723E_FwBTImgArray Rtl8723EFwBTImgArray #define Rtl8723E_FwBTImgArrayLength Rtl8723EBTImgArrayLength #define Rtl8723_FwUMCBCutMPImageArray Rtl8723SFwUMCBCutMPImgArray #define Rtl8723_UMCBCutMPImgArrayLength Rtl8723SUMCBCutMPImgArrayLength #define Rtl8723_PHY_REG_Array_MP Rtl8723UPHY_REG_Array_MP #define Rtl8723_PHY_REG_Array_MPLength Rtl8723UPHY_REG_Array_MPLength #endif #endif #define FW_8723A_SIZE 0x8000 #define FW_8723A_START_ADDRESS 0x1000 #define FW_8723A_END_ADDRESS 0x1FFF //0x5FFF #define IS_FW_HEADER_EXIST_8723A(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\ (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\ (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x2300) typedef struct _RT_FIRMWARE_8723A { FIRMWARE_SOURCE eFWSource; #ifdef CONFIG_EMBEDDED_FWIMG u8* szFwBuffer; #else u8 szFwBuffer[FW_8723A_SIZE]; #endif u32 ulFwLength; } RT_FIRMWARE_8723A, *PRT_FIRMWARE_8723A; // // This structure must be cared byte-ordering // // Added by tynli. 2009.12.04. typedef struct _RT_8723A_FIRMWARE_HDR { // 8-byte alinment required //--- LONG WORD 0 ---- u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut u8 Category; // AP/NIC and USB/PCI u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions u16 Version; // FW Version u8 Subversion; // FW Subversion, default 0x00 u16 Rsvd1; //--- LONG WORD 1 ---- u8 Month; // Release time Month field u8 Date; // Release time Date field u8 Hour; // Release time Hour field u8 Minute; // Release time Minute field u16 RamCodeSize; // The size of RAM code u16 Rsvd2; //--- LONG WORD 2 ---- u32 SvnIdx; // The SVN entry index u32 Rsvd3; //--- LONG WORD 3 ---- u32 Rsvd4; u32 Rsvd5; }RT_8723A_FIRMWARE_HDR, *PRT_8723A_FIRMWARE_HDR; #define DRIVER_EARLY_INT_TIME_8723A 0x05 #define BCN_DMA_ATIME_INT_TIME_8723A 0x02 //For General Reserved Page Number(Beacon Queue is reserved page) //Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 #define BCNQ_PAGE_NUM_8723A 0x08 #define TX_TOTAL_PAGE_NUMBER_8723A (0xFF - BCNQ_PAGE_NUM_8723A) #define TX_PAGE_BOUNDARY_8723A (TX_TOTAL_PAGE_NUMBER_8723A + 1) #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723A TX_TOTAL_PAGE_NUMBER_8723A #define WMM_NORMAL_TX_PAGE_BOUNDARY_8723A (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723A + 1) // For Normal Chip Setting // (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723A #define NORMAL_PAGE_NUM_HPQ_8723A 0x0C #define NORMAL_PAGE_NUM_LPQ_8723A 0x02 #define NORMAL_PAGE_NUM_NPQ_8723A 0x02 // Note: For Normal Chip Setting, modify later #define WMM_NORMAL_PAGE_NUM_HPQ_8723A 0x29 #define WMM_NORMAL_PAGE_NUM_LPQ_8723A 0x1C #define WMM_NORMAL_PAGE_NUM_NPQ_8723A 0x1C //------------------------------------------------------------------------- // Chip specific //------------------------------------------------------------------------- #define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3) #define CHIP_BONDING_92C_1T2R 0x1 #define CHIP_BONDING_88C_USB_MCARD 0x2 #define CHIP_BONDING_88C_USB_HP 0x1 //------------------------------------------------------------------------- // Channel Plan //------------------------------------------------------------------------- #define HAL_EFUSE_MEMORY #define EFUSE_REAL_CONTENT_LEN 512 #define EFUSE_MAP_LEN 128 #define EFUSE_MAX_SECTION 16 #define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. #define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN) // // // To prevent out of boundary programming case, // leave 1byte and program full section // 9bytes + 1byt + 5bytes and pre 1byte. // For worst case: // | 1byte|----8bytes----|1byte|--5bytes--| // | | Reserved(14bytes) | // // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. #define EFUSE_OOB_PROTECT_BYTES 15 #define EFUSE_REAL_CONTENT_LEN_8723A 512 #define EFUSE_MAP_LEN_8723A 256 #define EFUSE_MAX_SECTION_8723A 32 //======================================================== // EFUSE for BT definition //======================================================== #define EFUSE_BT_REAL_BANK_CONTENT_LEN 512 #define EFUSE_BT_REAL_CONTENT_LEN 1536 // 512*3 #define EFUSE_BT_MAP_LEN 1024 // 1k bytes #define EFUSE_BT_MAX_SECTION 128 // 1024/8 #define EFUSE_PROTECT_BYTES_BANK 16 // Description: Determine the types of C2H events that are the same in driver and Fw. // Fisrt constructed by tynli. 2009.10.09. typedef enum _RTL8192C_C2H_EVT { C2H_DBG = 0, C2H_TSF = 1, C2H_AP_RPT_RSP = 2, C2H_CCX_TX_RPT = 3, // The FW notify the report of the specific tx packet. C2H_BT_RSSI = 4, C2H_BT_OP_MODE = 5, C2H_EXT_RA_RPT = 6, C2H_HW_INFO_EXCH = 10, C2H_C2H_H2C_TEST = 11, C2H_BT_INFO = 12, C2H_BT_MP_INFO = 15, MAX_C2HEVENT } RTL8192C_C2H_EVT; #define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) #define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) typedef struct rxreport_8723a { u32 pktlen:14; u32 crc32:1; u32 icverr:1; u32 drvinfosize:4; u32 security:3; u32 qos:1; u32 shift:2; u32 physt:1; u32 swdec:1; u32 ls:1; u32 fs:1; u32 eor:1; u32 own:1; u32 macid:5; u32 tid:4; u32 hwrsvd:4; u32 amsdu:1; u32 paggr:1; u32 faggr:1; u32 a1fit:4; u32 a2fit:4; u32 pam:1; u32 pwr:1; u32 md:1; u32 mf:1; u32 type:2; u32 mc:1; u32 bc:1; u32 seq:12; u32 frag:4; u32 nextpktlen:14; u32 nextind:1; u32 rsvd0831:1; u32 rxmcs:6; u32 rxht:1; u32 gf:1; u32 splcp:1; u32 bw:1; u32 htc:1; u32 eosp:1; u32 bssidfit:2; u32 rsvd1214:16; u32 unicastwake:1; u32 magicwake:1; u32 pattern0match:1; u32 pattern1match:1; u32 pattern2match:1; u32 pattern3match:1; u32 pattern4match:1; u32 pattern5match:1; u32 pattern6match:1; u32 pattern7match:1; u32 pattern8match:1; u32 pattern9match:1; u32 patternamatch:1; u32 patternbmatch:1; u32 patterncmatch:1; u32 rsvd1613:19; u32 tsfl; u32 bassn:12; u32 bavld:1; u32 rsvd2413:19; } RXREPORT, *PRXREPORT; typedef struct phystatus_8723a { u32 rxgain_a:7; u32 trsw_a:1; u32 rxgain_b:7; u32 trsw_b:1; u32 chcorr_l:16; u32 sigqualcck:8; u32 cfo_a:8; u32 cfo_b:8; u32 chcorr_h:8; u32 noisepwrdb_h:8; u32 cfo_tail_a:8; u32 cfo_tail_b:8; u32 rsvd0824:8; u32 rsvd1200:8; u32 rxevm_a:8; u32 rxevm_b:8; u32 rxsnr_a:8; u32 rxsnr_b:8; u32 noisepwrdb_l:8; u32 rsvd1616:8; u32 postsnr_a:8; u32 postsnr_b:8; u32 csi_a:8; u32 csi_b:8; u32 targetcsi_a:8; u32 targetcsi_b:8; u32 sigevm:8; u32 maxexpwr:8; u32 exintflag:1; u32 sgien:1; u32 rxsc:2; u32 idlelong:1; u32 anttrainen:1; u32 antselb:1; u32 antsel:1; } PHYSTATUS, *PPHYSTATUS; // rtl8723a_hal_init.c s32 rtl8723a_FirmwareDownload(PADAPTER padapter); void rtl8723a_FirmwareSelfReset(PADAPTER padapter); void rtl8723a_InitializeFirmwareVars(PADAPTER padapter); void rtl8723a_InitAntenna_Selection(PADAPTER padapter); void rtl8723a_DeinitAntenna_Selection(PADAPTER padapter); void rtl8723a_CheckAntenna_Selection(PADAPTER padapter); void rtl8723a_init_default_value(PADAPTER padapter); s32 InitLLTTable(PADAPTER padapter, u32 boundary); s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); s32 CardDisableWithoutHWSM(PADAPTER padapter); // EFuse u8 GetEEPROMSize8723A(PADAPTER padapter); void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); void Hal_EfuseParseTxPowerInfo_8723A(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail); void Hal_EfuseParseBTCoexistInfo_8723A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_EfuseParseEEPROMVer(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void rtl8723a_EfuseParseChnlPlan(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_EfuseParseCustomerID(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_EfuseParseAntennaDiversity(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_EfuseParseRateIndicationOption(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_EfuseParseXtal_8723A(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); void Hal_EfuseParseThermalMeter_8723A(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); //RT_CHANNEL_DOMAIN rtl8723a_HalMapChannelPlan(PADAPTER padapter, u8 HalChannelPlan); //VERSION_8192C rtl8723a_ReadChipVersion(PADAPTER padapter); //void rtl8723a_ReadBluetoothCoexistInfo(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoloadFail); void Hal_InitChannelPlan(PADAPTER padapter); void rtl8723a_set_hal_ops(struct hal_ops *pHalFunc); void SetHwReg8723A(PADAPTER padapter, u8 variable, u8 *val); void GetHwReg8723A(PADAPTER padapter, u8 variable, u8 *val); u8 GetHalDefVar8723A(PADAPTER Adapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); #ifdef CONFIG_BT_COEXIST void rtl8723a_SingleDualAntennaDetection(PADAPTER padapter); #endif int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); // register void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); void rtl8723a_InitBeaconParameters(PADAPTER padapter); void rtl8723a_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); void rtl8723a_start_thread(_adapter *padapter); void rtl8723a_stop_thread(_adapter *padapter); s32 c2h_id_filter_ccx_8723a(u8 *buf); void _InitTransferPageSize(PADAPTER padapter); #endif// __RTL8723A_HAL_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723a_led.h000066400000000000000000000033161261122257400214100ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8723A_LED_H__ #define __RTL8723A_LED_H__ //================================================================================ // Interface to manipulate LED objects. //================================================================================ #ifdef CONFIG_USB_HCI void rtl8723au_InitSwLeds(PADAPTER padapter); void rtl8723au_DeInitSwLeds(PADAPTER padapter); #endif #ifdef CONFIG_PCI_HCI void rtl8723ae_InitSwLeds(PADAPTER padapter); void rtl8723ae_DeInitSwLeds(PADAPTER padapter); #endif #ifdef CONFIG_SDIO_HCI void rtl8723as_InitSwLeds(PADAPTER padapter); void rtl8723as_DeInitSwLeds(PADAPTER padapter); #endif #ifdef CONFIG_GSPI_HCI void rtl8723as_InitSwLeds(PADAPTER padapter); void rtl8723as_DeInitSwLeds(PADAPTER padapter); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723a_pg.h000066400000000000000000000016711261122257400212540ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8723A_PG_H__ #define __RTL8723A_PG_H__ #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723a_recv.h000066400000000000000000000031641261122257400216040ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8723A_RECV_H__ #define __RTL8723A_RECV_H__ #include #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) #ifdef CONFIG_DIRECT_RECV void rtl8723as_recv(PADAPTER padapter, struct recv_buf *precvbuf); #endif s32 rtl8723as_init_recv_priv(PADAPTER padapter); void rtl8723as_free_recv_priv(PADAPTER padapter); #endif void rtl8192c_query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat); void rtl8192c_process_phy_info(PADAPTER padapter, void *prframe); #ifdef CONFIG_USB_HCI void update_recvframe_attrib(union recv_frame *precvframe, struct recv_stat *prxstat); void update_recvframe_phyinfo(union recv_frame *precvframe, struct phy_stat *pphy_info); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723a_rf.h000066400000000000000000000020071261122257400212470ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8723A_RF_H__ #define __RTL8723A_RF_H__ #include "rtl8192c_rf.h" int PHY_RF6052_Config8723A( IN PADAPTER Adapter ); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723a_spec.h000066400000000000000000000066271261122257400216060ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * *******************************************************************************/ #ifndef __RTL8723A_SPEC_H__ #define __RTL8723A_SPEC_H__ #include //============================================================================ // 8723A Regsiter offset definition //============================================================================ //----------------------------------------------------- // // 0x0000h ~ 0x00FFh System Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0100h ~ 0x01FFh MACTOP General Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0200h ~ 0x027Fh TXDMA Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0280h ~ 0x02FFh RXDMA Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0300h ~ 0x03FFh PCIe // //----------------------------------------------------- //----------------------------------------------------- // // 0x0400h ~ 0x047Fh Protocol Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0500h ~ 0x05FFh EDCA Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0600h ~ 0x07FFh WMAC Configuration // //----------------------------------------------------- #define REG_BT_COEX_TABLE_1 0x06C0 #define REG_BT_COEX_TABLE_2 0x06C4 //============================================================================ // 8723 Regsiter Bit and Content definition //============================================================================ //2 HSISR // interrupt mask which needs to clear #define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ HSISR_SPS_OCP_INT |\ HSISR_RON_INT |\ HSISR_PDNINT |\ HSISR_GPIO9_INT) //---------------------------------------------------------------------------- // 8723 EFUSE //---------------------------------------------------------------------------- //============================================================================ // General definitions //============================================================================ #define MACID_NUM_8723A 32 #define CAM_ENTRY_NUM_8723A 32 #endif /* __RTL8723A_SPEC_H__ */ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723a_sreset.h000066400000000000000000000022541261122257400221510ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTL8723A_SRESET_H_ #define _RTL8723A_SRESET_H_ #include #ifdef DBG_CONFIG_ERROR_DETECT extern void rtl8723a_sreset_xmit_status_check(_adapter *padapter); extern void rtl8723a_sreset_linked_status_check(_adapter *padapter); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723a_xmit.h000066400000000000000000000126421261122257400216270ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8723A_XMIT_H__ #define __RTL8723A_XMIT_H__ #include // //defined for TX DESC Operation // #define MAX_TID (15) //OFFSET 0 #define OFFSET_SZ 0 #define OFFSET_SHT 16 #define BMC BIT(24) #define LSG BIT(26) #define FSG BIT(27) #define OWN BIT(31) //OFFSET 4 #define PKT_OFFSET_SZ 0 #define BK BIT(6) #define QSEL_SHT 8 #define Rate_ID_SHT 16 #define NAVUSEHDR BIT(20) #define PKT_OFFSET_SHT 26 #define HWPC BIT(31) //OFFSET 8 #define AGG_EN BIT(29) #define AMPDU_DENSITY_SHT 20 //OFFSET 12 #define SEQ_SHT 16 //OFFSET 16 #define QoS BIT(6) #define HW_SEQ_EN BIT(7) #define USERATE BIT(8) #define DISDATAFB BIT(10) #define DATA_SHORT BIT(24) #define DATA_BW BIT(25) //OFFSET 20 #define SGI BIT(6) typedef struct txdesc_8723a { u32 pktlen:16; u32 offset:8; u32 bmc:1; u32 htc:1; u32 ls:1; u32 fs:1; u32 linip:1; u32 noacm:1; u32 gf:1; u32 own:1; u32 macid:5; u32 agg_en:1; u32 bk:1; u32 rd_en:1; u32 qsel:5; u32 rd_nav_ext:1; u32 lsig_txop_en:1; u32 pifs:1; u32 rate_id:4; u32 navusehdr:1; u32 en_desc_id:1; u32 sectype:2; u32 rsvd0424:2; u32 pkt_offset:5; // unit: 8 bytes u32 rsvd0431:1; u32 rts_rc:6; u32 data_rc:6; u32 rsvd0812:2; u32 bar_rty_th:2; u32 rsvd0816:1; u32 morefrag:1; u32 raw:1; u32 ccx:1; u32 ampdu_density:3; u32 bt_null:1; u32 ant_sel_a:1; u32 ant_sel_b:1; u32 tx_ant_cck:2; u32 tx_antl:2; u32 tx_ant_ht:2; u32 nextheadpage:8; u32 tailpage:8; u32 seq:12; u32 cpu_handle:1; u32 tag1:1; u32 trigger_int:1; u32 hwseq_en:1; u32 rtsrate:5; u32 ap_dcfe:1; u32 hwseq_sel:2; u32 userate:1; u32 disrtsfb:1; u32 disdatafb:1; u32 cts2self:1; u32 rtsen:1; u32 hw_rts_en:1; u32 port_id:1; u32 rsvd1615:3; u32 wait_dcts:1; u32 cts2ap_en:1; u32 data_sc:2; u32 data_stbc:2; u32 data_short:1; u32 data_bw:1; u32 rts_short:1; u32 rts_bw:1; u32 rts_sc:2; u32 vcs_stbc:2; u32 datarate:6; u32 sgi:1; u32 try_rate:1; u32 data_ratefb_lmt:5; u32 rts_ratefb_lmt:4; u32 rty_lmt_en:1; u32 data_rt_lmt:6; u32 usb_txagg_num:8; u32 txagg_a:5; u32 txagg_b:5; u32 use_max_len:1; u32 max_agg_num:5; u32 mcsg1_max_len:4; u32 mcsg2_max_len:4; u32 mcsg3_max_len:4; u32 mcs7_sgi_max_len:4; u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB) u32 mcsg4_max_len:4; u32 mcsg5_max_len:4; u32 mcsg6_max_len:4; u32 mcs15_sgi_max_len:4; }TXDESC_8723A, *PTXDESC_8723A; #define txdesc_set_ccx_sw_8723a(txdesc, value) \ do { \ ((struct txdesc_8723a *)(txdesc))->mcsg4_max_len = (((value)>>8) & 0x0f); \ ((struct txdesc_8723a *)(txdesc))->mcs15_sgi_max_len= (((value)>>4) & 0x0f); \ ((struct txdesc_8723a *)(txdesc))->mcsg6_max_len = ((value) & 0x0f); \ } while (0) struct txrpt_ccx_8723a { /* offset 0 */ u8 tag1:1; u8 rsvd:4; u8 int_bt:1; u8 int_tri:1; u8 int_ccx:1; /* offset 1 */ u8 mac_id:5; u8 pkt_drop:1; u8 pkt_ok:1; u8 bmc:1; /* offset 2 */ u8 retry_cnt:6; u8 lifetime_over:1; u8 retry_over:1; /* offset 3 */ u8 ccx_qtime0; u8 ccx_qtime1; /* offset 5 */ u8 final_data_rate; /* offset 6 */ u8 sw1:4; u8 qsel:4; /* offset 7 */ u8 sw0; }; #define txrpt_ccx_sw_8723a(txrpt_ccx) ((txrpt_ccx)->sw0 + ((txrpt_ccx)->sw1<<8)) #define txrpt_ccx_qtime_8723a(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8)) #ifdef CONFIG_XMIT_ACK void dump_txrpt_ccx_8723a(void *buf); void handle_txrpt_ccx_8723a(_adapter *adapter, void *buf); #else #define dump_txrpt_ccx_8723a(buf) do {} while(0) #define handle_txrpt_ccx_8723a(adapter, buf) do {} while(0) #endif //CONFIG_XMIT_ACK void rtl8723a_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); void rtl8723a_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull); #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) s32 rtl8723as_init_xmit_priv(PADAPTER padapter); void rtl8723as_free_xmit_priv(PADAPTER padapter); s32 rtl8723as_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); s32 rtl8723as_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); s32 rtl8723as_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); s32 rtl8723as_xmit_buf_handler(PADAPTER padapter); thread_return rtl8723as_xmit_thread(thread_context context); #endif #ifdef CONFIG_USB_HCI s32 rtl8723au_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); s32 rtl8723au_xmit_buf_handler(PADAPTER padapter); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723b_cmd.h000066400000000000000000000513101261122257400214050ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8723B_CMD_H__ #define __RTL8723B_CMD_H__ //---------------------------------------------------------------------------------------------------------// //---------------------------------- H2C CMD DEFINITION ------------------------------------------------// //---------------------------------------------------------------------------------------------------------// enum h2c_cmd_8723B{ //Common Class: 000 H2C_8723B_RSVD_PAGE = 0x00, H2C_8723B_MEDIA_STATUS_RPT = 0x01, H2C_8723B_SCAN_ENABLE = 0x02, H2C_8723B_KEEP_ALIVE = 0x03, H2C_8723B_DISCON_DECISION = 0x04, H2C_8723B_PSD_OFFLOAD = 0x05, H2C_8723B_AP_OFFLOAD = 0x08, H2C_8723B_BCN_RSVDPAGE = 0x09, H2C_8723B_PROBERSP_RSVDPAGE = 0x0A, H2C_8723B_FCS_RSVDPAGE = 0x10, H2C_8723B_FCS_INFO = 0x11, H2C_8723B_AP_WOW_GPIO_CTRL = 0x13, //PoweSave Class: 001 H2C_8723B_SET_PWR_MODE = 0x20, H2C_8723B_PS_TUNING_PARA = 0x21, H2C_8723B_PS_TUNING_PARA2 = 0x22, H2C_8723B_P2P_LPS_PARAM = 0x23, H2C_8723B_P2P_PS_OFFLOAD = 0x24, H2C_8723B_PS_SCAN_ENABLE = 0x25, H2C_8723B_SAP_PS_ = 0x26, H2C_8723B_INACTIVE_PS_ = 0x27, //Inactive_PS H2C_8723B_FWLPS_IN_IPS_ = 0x28, //Dynamic Mechanism Class: 010 H2C_8723B_MACID_CFG = 0x40, H2C_8723B_TXBF = 0x41, H2C_8723B_RSSI_SETTING = 0x42, H2C_8723B_AP_REQ_TXRPT = 0x43, H2C_8723B_INIT_RATE_COLLECT = 0x44, //BT Class: 011 H2C_8723B_B_TYPE_TDMA = 0x60, H2C_8723B_BT_INFO = 0x61, H2C_8723B_FORCE_BT_TXPWR = 0x62, H2C_8723B_BT_IGNORE_WLANACT = 0x63, H2C_8723B_DAC_SWING_VALUE = 0x64, H2C_8723B_ANT_SEL_RSV = 0x65, H2C_8723B_WL_OPMODE = 0x66, H2C_8723B_BT_MP_OPER = 0x67, H2C_8723B_BT_CONTROL = 0x68, H2C_8723B_BT_WIFI_CTRL = 0x69, H2C_8723B_BT_FW_PATCH = 0x6A, H2C_8723B_BT_WLAN_CALIBRATION = 0x6D, //WOWLAN Class: 100 H2C_8723B_WOWLAN = 0x80, H2C_8723B_REMOTE_WAKE_CTRL = 0x81, H2C_8723B_AOAC_GLOBAL_INFO = 0x82, H2C_8723B_AOAC_RSVD_PAGE = 0x83, H2C_8723B_AOAC_RSVD_PAGE2 = 0x84, H2C_8723B_D0_SCAN_OFFLOAD_CTRL = 0x85, H2C_8723B_D0_SCAN_OFFLOAD_INFO = 0x86, H2C_8723B_CHNL_SWITCH_OFFLOAD = 0x87, H2C_8723B_RESET_TSF = 0xC0, H2C_8723B_MAXID, }; /* move to hal_com_h2c.h #define H2C_8723B_RSVDPAGE_LOC_LEN 5 #define H2C_8723B_MEDIA_STATUS_RPT_LEN 3 #define H2C_8723B_KEEP_ALIVE_CTRL_LEN 2 #define H2C_8723B_DISCON_DECISION_LEN 3 #define H2C_8723B_BCN_RSVDPAGE_LEN 5 #define H2C_8723B_PROBERSP_RSVDPAGE_LEN 5 #define H2C_8723B_AP_OFFLOAD_LEN 3 #define H2C_8723B_AP_WOW_GPIO_CTRL_LEN 3 #define H2C_8723B_PWRMODE_LEN 7 #define H2C_8723B_PSTUNEPARAM_LEN 4 #define H2C_8723B_MACID_CFG_LEN 7 #define H2C_8723B_BTMP_OPER_LEN 4 #define H2C_8723B_WOWLAN_LEN 4 #define H2C_8723B_REMOTE_WAKE_CTRL_LEN 3 #define H2C_8723B_AOAC_GLOBAL_INFO_LEN 2 #define H2C_8723B_AOAC_RSVDPAGE_LOC_LEN 7 #define H2C_8723B_SCAN_OFFLOAD_CTRL_LEN 4 #define H2C_8723B_BT_FW_PATCH_LEN 6 #define H2C_8723B_RSSI_SETTING_LEN 4 #define H2C_8723B_AP_REQ_TXRPT_LEN 2 #define H2C_8723B_FORCE_BT_TXPWR_LEN 3 #ifdef CONFIG_WOWLAN #define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 ) #define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5]) #define cpIpAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3]) // // ARP packet // // LLC Header #define GET_ARP_PKT_LLC_TYPE(__pHeader) ReadEF2Byte( ((u8*)(__pHeader)) + 6) //ARP element #define GET_ARP_PKT_OPERATION(__pHeader) ReadEF2Byte( ((u8*)(__pHeader)) + 6) #define GET_ARP_PKT_SENDER_MAC_ADDR(__pHeader, _val) cpMacAddr((u8*)(_val), ((u8*)(__pHeader))+8) #define GET_ARP_PKT_SENDER_IP_ADDR(__pHeader, _val) cpIpAddr((u8*)(_val), ((u8*)(__pHeader))+14) #define GET_ARP_PKT_TARGET_MAC_ADDR(__pHeader, _val) cpMacAddr((u8*)(_val), ((u8*)(__pHeader))+18) #define GET_ARP_PKT_TARGET_IP_ADDR(__pHeader, _val) cpIpAddr((u8*)(_val), ((u8*)(__pHeader))+24) #define SET_ARP_PKT_HW(__pHeader, __Value) WriteEF2Byte( ((u8*)(__pHeader)) + 0, __Value) #define SET_ARP_PKT_PROTOCOL(__pHeader, __Value) WriteEF2Byte( ((u8*)(__pHeader)) + 2, __Value) #define SET_ARP_PKT_HW_ADDR_LEN(__pHeader, __Value) WriteEF1Byte( ((u8*)(__pHeader)) + 4, __Value) #define SET_ARP_PKT_PROTOCOL_ADDR_LEN(__pHeader, __Value) WriteEF1Byte( ((u8*)(__pHeader)) + 5, __Value) #define SET_ARP_PKT_OPERATION(__pHeader, __Value) WriteEF2Byte( ((u8*)(__pHeader)) + 6, __Value) #define SET_ARP_PKT_SENDER_MAC_ADDR(__pHeader, _val) cpMacAddr(((u8*)(__pHeader))+8, (u8*)(_val)) #define SET_ARP_PKT_SENDER_IP_ADDR(__pHeader, _val) cpIpAddr(((u8*)(__pHeader))+14, (u8*)(_val)) #define SET_ARP_PKT_TARGET_MAC_ADDR(__pHeader, _val) cpMacAddr(((u8*)(__pHeader))+18, (u8*)(_val)) #define SET_ARP_PKT_TARGET_IP_ADDR(__pHeader, _val) cpIpAddr(((u8*)(__pHeader))+24, (u8*)(_val)) #define FW_WOWLAN_FUN_EN BIT(0) #define FW_WOWLAN_PATTERN_MATCH BIT(1) #define FW_WOWLAN_MAGIC_PKT BIT(2) #define FW_WOWLAN_UNICAST BIT(3) #define FW_WOWLAN_ALL_PKT_DROP BIT(4) #define FW_WOWLAN_GPIO_ACTIVE BIT(5) #define FW_WOWLAN_REKEY_WAKEUP BIT(6) #define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) #define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) #define FW_FW_PARSE_MAGIC_PKT BIT(1) #define FW_REMOTE_WAKE_CTRL_EN BIT(0) #define FW_REALWOWLAN_EN BIT(5) #endif //CONFIG_WOWLAN */ //---------------------------------------------------------------------------------------------------------// //---------------------------------- H2C CMD CONTENT --------------------------------------------------// //---------------------------------------------------------------------------------------------------------// //_RSVDPAGE_LOC_CMD_0x00 #define SET_8723B_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) #define SET_8723B_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) #define SET_8723B_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) #define SET_8723B_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) #define SET_8723B_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) //_MEDIA_STATUS_RPT_PARM_CMD_0x01 #define SET_8723B_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) #define SET_8723B_H2CCMD_MSRRPT_PARM_MACID_IND(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) #define SET_8723B_H2CCMD_MSRRPT_PARM_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) #define SET_8723B_H2CCMD_MSRRPT_PARM_MACID_END(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+2, 0, 8, __Value) //_KEEP_ALIVE_CMD_0x03 #define SET_8723B_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) #define SET_8723B_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) #define SET_8723B_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) #define SET_8723B_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) //_DISCONNECT_DECISION_CMD_0x04 #define SET_8723B_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) #define SET_8723B_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) #define SET_8723B_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) #define SET_8723B_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+2, 0, 8, __Value) // _PWR_MOD_CMD_0x20 #define SET_8723B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) #define SET_8723B_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) #define SET_8723B_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) #define SET_8723B_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) #define SET_8723B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) #define SET_8723B_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) #define SET_8723B_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+5, 0, 8, __Value) #define GET_8723B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) // _PS_TUNE_PARAM_CMD_0x21 #define SET_8723B_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) #define SET_8723B_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) #define SET_8723B_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) #define SET_8723B_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) #define SET_8723B_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) //_MACID_CFG_CMD_0x40 #define SET_8723B_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) #define SET_8723B_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) #define SET_8723B_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) #define SET_8723B_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) #define SET_8723B_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) #define SET_8723B_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) #define SET_8723B_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) #define SET_8723B_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) #define SET_8723B_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) #define SET_8723B_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) #define SET_8723B_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) #define SET_8723B_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) //_RSSI_SETTING_CMD_0x42 #define SET_8723B_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) #define SET_8723B_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) #define SET_8723B_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) // _AP_REQ_TXRPT_CMD_0x43 #define SET_8723B_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) #define SET_8723B_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) // _FORCE_BT_TXPWR_CMD_0x62 #define SET_8723B_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) // _FORCE_BT_MP_OPER_CMD_0x67 #define SET_8723B_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) #define SET_8723B_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) #define SET_8723B_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) #define SET_8723B_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) #define SET_8723B_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) #define SET_8723B_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) // _BT_FW_PATCH_0x6A #define SET_8723B_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((pu1Byte)(__pH2CCmd), 0, 16, __Value) #define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) #define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) #define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) #define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) /* move to hal_com_h2c.h // _WoWLAN PARAM_CMD_0x80 #define SET_8723B_H2CCMD_WOWLAN_FUNC_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) #define SET_8723B_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) #define SET_8723B_H2CCMD_WOWLAN_MAGIC_PKT_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) #define SET_8723B_H2CCMD_WOWLAN_UNICAST_PKT_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) #define SET_8723B_H2CCMD_WOWLAN_ALL_PKT_DROP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) #define SET_8723B_H2CCMD_WOWLAN_GPIO_ACTIVE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) #define SET_8723B_H2CCMD_WOWLAN_REKEY_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) #define SET_8723B_H2CCMD_WOWLAN_DISCONNECT_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) #define SET_8723B_H2CCMD_WOWLAN_GPIONUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 7, __Value) #define SET_8723B_H2CCMD_WOWLAN_DATAPIN_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 7, 1, __Value) #define SET_8723B_H2CCMD_WOWLAN_GPIO_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) //#define SET_8723B_H2CCMD_WOWLAN_GPIO_PULSE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 1, __Value) #define SET_8723B_H2CCMD_WOWLAN_GPIO_PULSE_COUNT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) // _REMOTE_WAKEUP_CMD_0x81 #define SET_8723B_H2CCMD_REMOTE_WAKECTRL_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) #define SET_8723B_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) #define SET_8723B_H2CCMD_REMOTE_WAKE_CTRL_NDP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) #define SET_8723B_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) #define SET_8723B_H2CCMD_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) #define SET_8723B_H2CCMD_REMOTE_WAKE_CTRL_FW_UNICAST_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) #define SET_8723B_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 1, __Value) // AOAC_GLOBAL_INFO_0x82 #define SET_8723B_H2CCMD_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) #define SET_8723B_H2CCMD_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) // AOAC_RSVDPAGE_LOC_0x83 #define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 0, 8, __Value) #define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) #define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_NEIGHBOR_ADV(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) #define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) #define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) #ifdef CONFIG_GTK_OL #define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) #endif //CONFIG_GTK_OL #ifdef CONFIG_PNO_SUPPORT #define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_NLO_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 0, 8, __Value) #endif #ifdef CONFIG_PNO_SUPPORT // D0_Scan_Offload_Info_0x86 #define SET_8723B_H2CCMD_AOAC_NLO_FUN_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 3, 1, __Value) #define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_PROBE_PACKET(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) #define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_SCAN_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) #define SET_8723B_H2CCMD_AOAC_RSVDPAGE_LOC_SSID_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) #endif //CONFIG_PNO_SUPPORT */ //---------------------------------------------------------------------------------------------------------// //------------------------------------------- Structure --------------------------------------------------// //---------------------------------------------------------------------------------------------------------// /* move to hal_com_h2c.h typedef struct _RSVDPAGE_LOC { u8 LocProbeRsp; u8 LocPsPoll; u8 LocNullData; u8 LocQosNull; u8 LocBTQosNull; #ifdef CONFIG_WOWLAN u8 LocRemoteCtrlInfo; u8 LocArpRsp; u8 LocNbrAdv; u8 LocGTKRsp; u8 LocGTKInfo; u8 LocProbeReq; u8 LocNetList; #ifdef CONFIG_GTK_OL u8 LocGTKEXTMEM; #endif //CONFIG_GTK_OL #ifdef CONFIG_PNO_SUPPORT u8 LocPNOInfo; u8 LocScanInfo; u8 LocSSIDInfo; u8 LocProbePacket; #endif //CONFIG_PNO_SUPPORT #endif //CONFIG_WOWLAN #ifdef CONFIG_AP_WOWLAN u8 LocApOffloadBCN; #endif //CONFIG_AP_WOWLAN } RSVDPAGE_LOC_8723B, *PRSVDPAGE_LOC_8723B; */ //---------------------------------------------------------------------------------------------------------// //---------------------------------- Function Statement --------------------------------------------------// //---------------------------------------------------------------------------------------------------------// // host message to firmware cmd void rtl8723b_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); void rtl8723b_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); void rtl8723b_set_rssi_cmd(PADAPTER padapter, u8 *param); void rtl8723b_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8* arg, u8 rssi_level); void rtl8723b_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack); //s32 rtl8723b_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); void rtl8723b_set_FwPsTuneParam_cmd(PADAPTER padapter); void rtl8723b_set_FwMacIdConfig_cmd(_adapter* padapter, u8 mac_id, u8 raid, u8 bw, u8 sgi, u32 mask); void rtl8723b_set_FwMediaStatusRpt_cmd(PADAPTER padapter, u8 mstatus, u8 macid); void rtl8723b_set_FwBtMpOper_cmd(PADAPTER padapter, u8 idx, u8 ver, u8 reqnum, u8 *param); void rtl8723b_download_rsvd_page(PADAPTER padapter, u8 mstatus); #ifdef CONFIG_BT_COEXIST void rtl8723b_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); #endif // CONFIG_BT_COEXIST #ifdef CONFIG_P2P void rtl8723b_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); #endif //CONFIG_P2P void CheckFwRsvdPageContent(PADAPTER padapter); #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) void rtl8723b_set_wowlan_cmd(_adapter* padapter, u8 enable); void rtl8723b_set_ap_wowlan_cmd(_adapter* padapter, u8 enable); void SetFwRelatedForWoWLAN8723b(_adapter* padapter, u8 bHostIsGoingtoSleep); #endif//CONFIG_WOWLAN void rtl8723b_set_FwPwrModeInIPS_cmd(PADAPTER padapter, u8 cmd_param); #ifdef CONFIG_TSF_RESET_OFFLOAD u8 rtl8723b_reset_tsf(_adapter *padapter, u8 reset_port); #endif // CONFIG_TSF_RESET_OFFLOAD s32 FillH2CCmd8723B(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723b_dm.h000066400000000000000000000033231261122257400212430ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8723B_DM_H__ #define __RTL8723B_DM_H__ //============================================================ // Description: // // This file is for 8723B dynamic mechanism only // // //============================================================ //============================================================ // structure and define //============================================================ //============================================================ // function prototype //============================================================ void rtl8723b_init_dm_priv(PADAPTER padapter); void rtl8723b_deinit_dm_priv(PADAPTER padapter); void rtl8723b_InitHalDm(PADAPTER padapter); void rtl8723b_HalDmWatchDog(PADAPTER padapter); void rtl8723b_HalDmWatchDog_in_LPS(PADAPTER padapter); void rtl8723b_hal_dm_in_lps(PADAPTER padapter); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723b_hal.h000077500000000000000000000275311261122257400214210ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8723B_HAL_H__ #define __RTL8723B_HAL_H__ #include "hal_data.h" #include "rtl8723b_spec.h" #include "rtl8723b_rf.h" #include "rtl8723b_dm.h" #include "rtl8723b_recv.h" #include "rtl8723b_xmit.h" #include "rtl8723b_cmd.h" #include "rtl8723b_led.h" #include "Hal8723BPwrSeq.h" #include "Hal8723BPhyReg.h" #include "Hal8723BPhyCfg.h" #ifdef DBG_CONFIG_ERROR_DETECT #include "rtl8723b_sreset.h" #endif //--------------------------------------------------------------------- // RTL8723B From file //--------------------------------------------------------------------- #define RTL8723B_FW_IMG "rtl8723b/FW_NIC.bin" #define RTL8723B_FW_WW_IMG "rtl8723b/FW_WoWLAN.bin" #define RTL8723B_PHY_REG "rtl8723b/PHY_REG.txt" #define RTL8723B_PHY_RADIO_A "rtl8723b/RadioA.txt" #define RTL8723B_PHY_RADIO_B "rtl8723b/RadioB.txt" #define RTL8723B_TXPWR_TRACK "rtl8723b/TxPowerTrack.txt" #define RTL8723B_AGC_TAB "rtl8723b/AGC_TAB.txt" #define RTL8723B_PHY_MACREG "rtl8723b/MAC_REG.txt" #define RTL8723B_PHY_REG_PG "rtl8723b/PHY_REG_PG.txt" #define RTL8723B_PHY_REG_MP "rtl8723b/PHY_REG_MP.txt" #define RTL8723B_TXPWR_LMT "rtl8723b/TXPWR_LMT.txt" //--------------------------------------------------------------------- // RTL8723B From header //--------------------------------------------------------------------- #if MP_DRIVER == 1 #define Rtl8723B_FwBTImgArray Rtl8723BFwBTImgArray #define Rtl8723B_FwBTImgArrayLength Rtl8723BFwBTImgArrayLength #define Rtl8723B_FwMPImageArray Rtl8723BFwMPImgArray #define Rtl8723B_FwMPImgArrayLength Rtl8723BMPImgArrayLength #define Rtl8723B_PHY_REG_Array_MP Rtl8723B_PHYREG_Array_MP #define Rtl8723B_PHY_REG_Array_MPLength Rtl8723B_PHYREG_Array_MPLength #endif #define FW_8723B_SIZE 0x8000 #define FW_8723B_START_ADDRESS 0x1000 #define FW_8723B_END_ADDRESS 0x1FFF //0x5FFF #define IS_FW_HEADER_EXIST_8723B(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x5300) typedef struct _RT_FIRMWARE { FIRMWARE_SOURCE eFWSource; #ifdef CONFIG_EMBEDDED_FWIMG u8* szFwBuffer; #else u8 szFwBuffer[FW_8723B_SIZE]; #endif u32 ulFwLength; } RT_FIRMWARE_8723B, *PRT_FIRMWARE_8723B; // // This structure must be cared byte-ordering // // Added by tynli. 2009.12.04. typedef struct _RT_8723B_FIRMWARE_HDR { // 8-byte alinment required //--- LONG WORD 0 ---- u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut u8 Category; // AP/NIC and USB/PCI u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions u16 Version; // FW Version u16 Subversion; // FW Subversion, default 0x00 //--- LONG WORD 1 ---- u8 Month; // Release time Month field u8 Date; // Release time Date field u8 Hour; // Release time Hour field u8 Minute; // Release time Minute field u16 RamCodeSize; // The size of RAM code u16 Rsvd2; //--- LONG WORD 2 ---- u32 SvnIdx; // The SVN entry index u32 Rsvd3; //--- LONG WORD 3 ---- u32 Rsvd4; u32 Rsvd5; }RT_8723B_FIRMWARE_HDR, *PRT_8723B_FIRMWARE_HDR; #define DRIVER_EARLY_INT_TIME_8723B 0x05 #define BCN_DMA_ATIME_INT_TIME_8723B 0x02 // for 8723B // TX 32K, RX 16K, Page size 128B for TX, 8B for RX #define PAGE_SIZE_TX_8723B 128 #define PAGE_SIZE_RX_8723B 8 #define RX_DMA_SIZE_8723B 0x4000 // 16K #ifdef CONFIG_FW_C2H_DEBUG #define RX_DMA_RESERVED_SIZE_8723B 0x100 // 256B, reserved for c2h debug message #else #define RX_DMA_RESERVED_SIZE_8723B 0x80 // 128B, reserved for tx report #endif #define RX_DMA_BOUNDARY_8723B (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B - 1) // Note: We will divide number of page equally for each queue other than public queue! //For General Reserved Page Number(Beacon Queue is reserved page) //Beacon:2, PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1 #define BCNQ_PAGE_NUM_8723B 0x08 #ifdef CONFIG_CONCURRENT_MODE #define BCNQ1_PAGE_NUM_8723B 0x08 // 0x04 #else #define BCNQ1_PAGE_NUM_8723B 0x00 #endif #ifdef CONFIG_PNO_SUPPORT #undef BCNQ1_PAGE_NUM_8723B #define BCNQ1_PAGE_NUM_8723B 0x00 // 0x04 #endif #define MAX_RX_DMA_BUFFER_SIZE_8723B 0x2800 // RX 10K //For WoWLan , more reserved page //ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, PNO: 6 #ifdef CONFIG_WOWLAN #define WOWLAN_PAGE_NUM_8723B 0x07 #else #define WOWLAN_PAGE_NUM_8723B 0x00 #endif #ifdef CONFIG_PNO_SUPPORT #undef WOWLAN_PAGE_NUM_8723B #define WOWLAN_PAGE_NUM_8723B 0x15 #endif #ifdef CONFIG_AP_WOWLAN #define AP_WOWLAN_PAGE_NUM_8723B 0x02 #endif #define TX_TOTAL_PAGE_NUMBER_8723B (0xFF - BCNQ_PAGE_NUM_8723B - BCNQ1_PAGE_NUM_8723B - WOWLAN_PAGE_NUM_8723B) #define TX_PAGE_BOUNDARY_8723B (TX_TOTAL_PAGE_NUMBER_8723B + 1) #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723B TX_TOTAL_PAGE_NUMBER_8723B #define WMM_NORMAL_TX_PAGE_BOUNDARY_8723B (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723B + 1) // For Normal Chip Setting // (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723B #define NORMAL_PAGE_NUM_HPQ_8723B 0x0C #define NORMAL_PAGE_NUM_LPQ_8723B 0x02 #define NORMAL_PAGE_NUM_NPQ_8723B 0x02 // Note: For Normal Chip Setting, modify later #define WMM_NORMAL_PAGE_NUM_HPQ_8723B 0x30 #define WMM_NORMAL_PAGE_NUM_LPQ_8723B 0x20 #define WMM_NORMAL_PAGE_NUM_NPQ_8723B 0x20 #include "HalVerDef.h" #include "hal_com.h" #define EFUSE_OOB_PROTECT_BYTES 15 #define HAL_EFUSE_MEMORY #define HWSET_MAX_SIZE_8723B 512 #define EFUSE_REAL_CONTENT_LEN_8723B 512 #define EFUSE_MAP_LEN_8723B 512 #define EFUSE_MAX_SECTION_8723B 64 #define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. #define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8723B) #define EFUSE_ACCESS_ON 0x69 // For RTL8723 only. #define EFUSE_ACCESS_OFF 0x00 // For RTL8723 only. //======================================================== // EFUSE for BT definition //======================================================== #define EFUSE_BT_REAL_BANK_CONTENT_LEN 512 #define EFUSE_BT_REAL_CONTENT_LEN 1536 // 512*3 #define EFUSE_BT_MAP_LEN 1024 // 1k bytes #define EFUSE_BT_MAX_SECTION 128 // 1024/8 #define EFUSE_PROTECT_BYTES_BANK 16 // Description: Determine the types of C2H events that are the same in driver and Fw. // Fisrt constructed by tynli. 2009.10.09. typedef enum _C2H_EVT { C2H_DBG = 0, C2H_TSF = 1, C2H_AP_RPT_RSP = 2, C2H_CCX_TX_RPT = 3, // The FW notify the report of the specific tx packet. C2H_BT_RSSI = 4, C2H_BT_OP_MODE = 5, C2H_EXT_RA_RPT = 6, C2H_8723B_BT_INFO = 9, C2H_HW_INFO_EXCH = 10, C2H_8723B_BT_MP_INFO = 11, #ifdef CONFIG_FW_C2H_DEBUG C2H_8723B_FW_DEBUG = 0xff, #endif //CONFIG_FW_C2H_DEBUG MAX_C2HEVENT } C2H_EVT; typedef struct _C2H_EVT_HDR { u8 CmdID; u8 CmdLen; u8 CmdSeq; } __attribute__((__packed__)) C2H_EVT_HDR, *PC2H_EVT_HDR; typedef enum tag_Package_Definition { PACKAGE_DEFAULT, PACKAGE_QFN68, PACKAGE_TFBGA90, PACKAGE_TFBGA80, PACKAGE_TFBGA79 }PACKAGE_TYPE_E; #define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) #define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) // rtl8723a_hal_init.c s32 rtl8723b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); void rtl8723b_FirmwareSelfReset(PADAPTER padapter); void rtl8723b_InitializeFirmwareVars(PADAPTER padapter); void rtl8723b_InitAntenna_Selection(PADAPTER padapter); void rtl8723b_DeinitAntenna_Selection(PADAPTER padapter); void rtl8723b_CheckAntenna_Selection(PADAPTER padapter); void rtl8723b_init_default_value(PADAPTER padapter); s32 rtl8723b_InitLLTTable(PADAPTER padapter); s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); s32 CardDisableWithoutHWSM(PADAPTER padapter); // EFuse u8 GetEEPROMSize8723B(PADAPTER padapter); void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); void Hal_EfuseParseTxPowerInfo_8723B(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail); void Hal_EfuseParseBTCoexistInfo_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_EfuseParseEEPROMVer_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_EfuseParseChnlPlan_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_EfuseParseCustomerID_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_EfuseParseAntennaDiversity_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_EfuseParseXtal_8723B(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); void Hal_EfuseParseThermalMeter_8723B(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); VOID Hal_EfuseParsePackageType_8723B(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); VOID Hal_EfuseParseVoltage_8723B(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); #ifdef CONFIG_C2H_PACKET_EN void C2HPacketHandler_8723B(PADAPTER padapter, u8 *pbuffer, u16 length); #endif void rtl8723b_set_hal_ops(struct hal_ops *pHalFunc); void SetHwReg8723B(PADAPTER padapter, u8 variable, u8 *val); void GetHwReg8723B(PADAPTER padapter, u8 variable, u8 *val); u8 SetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); u8 GetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); // register void rtl8723b_InitBeaconParameters(PADAPTER padapter); void rtl8723b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); void _InitBurstPktLen_8723BS(PADAPTER Adapter); void _8051Reset8723(PADAPTER padapter); #ifdef CONFIG_WOWLAN void Hal_DetectWoWMode(PADAPTER pAdapter); #endif //CONFIG_WOWLAN void rtl8723b_start_thread(_adapter *padapter); void rtl8723b_stop_thread(_adapter *padapter); #if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) void rtl8723bs_init_checkbthang_workqueue(_adapter * adapter); void rtl8723bs_free_checkbthang_workqueue(_adapter * adapter); void rtl8723bs_cancle_checkbthang_workqueue(_adapter * adapter); void rtl8723bs_hal_check_bt_hang(_adapter * adapter); #endif #ifdef CONFIG_GPIO_WAKEUP void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); #endif int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); void CCX_FwC2HTxRpt_8723b(PADAPTER padapter, u8 *pdata, u8 len); #ifdef CONFIG_FW_C2H_DEBUG void Debug_FwC2H_8723b(PADAPTER padapter, u8 *pdata, u8 len); #endif //CONFIG_FW_C2H_DEBUG s32 c2h_id_filter_ccx_8723b(u8 *buf); s32 c2h_handler_8723b(PADAPTER padapter, u8 *pC2hEvent); u8 MRateToHwRate8723B(u8 rate); u8 HwRateToMRate8723B(u8 rate); #ifdef CONFIG_RF_GAIN_OFFSET void Hal_ReadRFGainOffset(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail); #endif //CONFIG_RF_GAIN_OFFSET #ifdef CONFIG_PCI_HCI BOOLEAN InterruptRecognized8723BE(PADAPTER Adapter); VOID UpdateInterruptMask8723BE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723b_led.h000077500000000000000000000033631261122257400214160ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8723B_LED_H__ #define __RTL8723B_LED_H__ #include #include #include //================================================================================ // Interface to manipulate LED objects. //================================================================================ #ifdef CONFIG_USB_HCI void rtl8723bu_InitSwLeds(PADAPTER padapter); void rtl8723bu_DeInitSwLeds(PADAPTER padapter); #endif #ifdef CONFIG_SDIO_HCI void rtl8723bs_InitSwLeds(PADAPTER padapter); void rtl8723bs_DeInitSwLeds(PADAPTER padapter); #endif #ifdef CONFIG_GSPI_HCI void rtl8723bs_InitSwLeds(PADAPTER padapter); void rtl8723bs_DeInitSwLeds(PADAPTER padapter); #endif #ifdef CONFIG_PCI_HCI void rtl8723be_InitSwLeds(PADAPTER padapter); void rtl8723be_DeInitSwLeds(PADAPTER padapter); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723b_recv.h000077500000000000000000000076451261122257400216200ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8723B_RECV_H__ #define __RTL8723B_RECV_H__ #include #ifdef CONFIG_SDIO_HCI #ifndef CONFIG_SDIO_RX_COPY #undef MAX_RECVBUF_SZ #define MAX_RECVBUF_SZ (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B) #endif // !CONFIG_SDIO_RX_COPY #endif // CONFIG_SDIO_HCI typedef struct rxreport_8723b { //DWORD 0 u32 pktlen:14; u32 crc32:1; u32 icverr:1; u32 drvinfosize:4; u32 security:3; u32 qos:1; u32 shift:2; u32 physt:1; u32 swdec:1; u32 rsvd0028:2; u32 eor:1; u32 rsvd0031:1; //DWORD 1 u32 macid:7; u32 rsvd0407:1; u32 tid:4; u32 macid_vld:1; u32 amsdu:1; u32 rxid_match:1; u32 paggr:1; u32 a1fit:4; u32 chkerr:1; //20 u32 rx_ipv:1; u32 rx_is_tcp_udp:1; u32 chk_vld:1; //23 u32 pam:1; u32 pwr:1; u32 md:1; u32 mf:1; u32 type:2; u32 mc:1; u32 bc:1; //DWORD 2 u32 seq:12; u32 frag:4; u32 rx_is_qos:1; u32 rsvd0817:1; u32 wlanhd_iv_len:6; u32 hwrsvd0824:4; u32 c2h_ind:1; u32 rsvd0829:2; u32 fcs_ok:1; //DWORD 3 u32 rx_rate:7; u32 rsvd1207:3; u32 htc:1; u32 esop:1; u32 bssid_fit:2; u32 rsvd1214:2; u32 dma_agg_num:8; u32 rsvd1224:5; u32 patternmatch:1; u32 unicastwake:1; u32 magicwake:1; //DWORD 4 u32 splcp:1; //Ofdm sgi or cck_splcp u32 ldpc:1; u32 stbc:1; u32 not_sounding:1; u32 bw:2; u32 rsvd1606:26; //DWORD 5 u32 tsfl; } RXREPORT, *PRXREPORT; typedef struct phystatus_8723b { u32 rxgain_a:7; u32 trsw_a:1; u32 rxgain_b:7; u32 trsw_b:1; u32 chcorr_l:16; u32 sigqualcck:8; u32 cfo_a:8; u32 cfo_b:8; u32 chcorr_h:8; u32 noisepwrdb_h:8; u32 cfo_tail_a:8; u32 cfo_tail_b:8; u32 rsvd0824:8; u32 rsvd1200:8; u32 rxevm_a:8; u32 rxevm_b:8; u32 rxsnr_a:8; u32 rxsnr_b:8; u32 noisepwrdb_l:8; u32 rsvd1616:8; u32 postsnr_a:8; u32 postsnr_b:8; u32 csi_a:8; u32 csi_b:8; u32 targetcsi_a:8; u32 targetcsi_b:8; u32 sigevm:8; u32 maxexpwr:8; u32 exintflag:1; u32 sgien:1; u32 rxsc:2; u32 idlelong:1; u32 anttrainen:1; u32 antselb:1; u32 antsel:1; } PHYSTATUS, *PPHYSTATUS; #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) s32 rtl8723bs_init_recv_priv(PADAPTER padapter); void rtl8723bs_free_recv_priv(PADAPTER padapter); #endif void rtl8723b_query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat); void rtl8723b_process_phy_info(PADAPTER padapter, void *prframe); #ifdef CONFIG_USB_HCI void update_recvframe_attrib(PADAPTER padapter, union recv_frame *precvframe, struct recv_stat *prxstat); void update_recvframe_phyinfo(union recv_frame *precvframe, struct phy_stat *pphy_info); int rtl8723bu_init_recv_priv(_adapter *padapter); void rtl8723bu_free_recv_priv (_adapter *padapter); void rtl8723bu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); #endif #ifdef CONFIG_PCI_HCI s32 rtl8723be_init_recv_priv(PADAPTER padapter); void rtl8723be_free_recv_priv(PADAPTER padapter); #endif void rtl8723b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723b_rf.h000066400000000000000000000021431261122257400212510ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8723B_RF_H__ #define __RTL8723B_RF_H__ #include "rtl8192c_rf.h" int PHY_RF6052_Config8723B( IN PADAPTER Adapter ); VOID PHY_RF6052SetBandwidth8723B( IN PADAPTER Adapter, IN CHANNEL_WIDTH Bandwidth); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723b_spec.h000077500000000000000000000270411261122257400216030ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * *******************************************************************************/ #ifndef __RTL8723B_SPEC_H__ #define __RTL8723B_SPEC_H__ #include #define HAL_NAV_UPPER_UNIT_8723B 128 // micro-second //----------------------------------------------------- // // 0x0000h ~ 0x00FFh System Configuration // //----------------------------------------------------- #define REG_RSV_CTRL_8723B 0x001C // 3 Byte #define REG_BT_WIFI_ANTENNA_SWITCH_8723B 0x0038 #define REG_HSISR_8723B 0x005c #define REG_PAD_CTRL1_8723B 0x0064 #define REG_AFE_CTRL_4_8723B 0x0078 #define REG_HMEBOX_DBG_0_8723B 0x0088 #define REG_HMEBOX_DBG_1_8723B 0x008A #define REG_HMEBOX_DBG_2_8723B 0x008C #define REG_HMEBOX_DBG_3_8723B 0x008E #define REG_HIMR0_8723B 0x00B0 #define REG_HISR0_8723B 0x00B4 #define REG_HIMR1_8723B 0x00B8 #define REG_HISR1_8723B 0x00BC #define REG_PMC_DBG_CTRL2_8723B 0x00CC //----------------------------------------------------- // // 0x0100h ~ 0x01FFh MACTOP General Configuration // //----------------------------------------------------- #define REG_C2HEVT_CMD_ID_8723B 0x01A0 #define REG_C2HEVT_CMD_LEN_8723B 0x01AE #define REG_WOWLAN_WAKE_REASON 0x01C7 #define REG_WOWLAN_GTK_DBG1 0x630 #define REG_WOWLAN_GTK_DBG2 0x634 #define REG_HMEBOX_EXT0_8723B 0x01F0 #define REG_HMEBOX_EXT1_8723B 0x01F4 #define REG_HMEBOX_EXT2_8723B 0x01F8 #define REG_HMEBOX_EXT3_8723B 0x01FC //----------------------------------------------------- // // 0x0200h ~ 0x027Fh TXDMA Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0280h ~ 0x02FFh RXDMA Configuration // //----------------------------------------------------- #define REG_RXDMA_CONTROL_8723B 0x0286 // Control the RX DMA. #define REG_RXDMA_MODE_CTRL_8723B 0x0290 //----------------------------------------------------- // // 0x0300h ~ 0x03FFh PCIe // //----------------------------------------------------- #define REG_PCIE_CTRL_REG_8723B 0x0300 #define REG_INT_MIG_8723B 0x0304 // Interrupt Migration #define REG_BCNQ_DESA_8723B 0x0308 // TX Beacon Descriptor Address #define REG_HQ_DESA_8723B 0x0310 // TX High Queue Descriptor Address #define REG_MGQ_DESA_8723B 0x0318 // TX Manage Queue Descriptor Address #define REG_VOQ_DESA_8723B 0x0320 // TX VO Queue Descriptor Address #define REG_VIQ_DESA_8723B 0x0328 // TX VI Queue Descriptor Address #define REG_BEQ_DESA_8723B 0x0330 // TX BE Queue Descriptor Address #define REG_BKQ_DESA_8723B 0x0338 // TX BK Queue Descriptor Address #define REG_RX_DESA_8723B 0x0340 // RX Queue Descriptor Address #define REG_DBI_WDATA_8723B 0x0348 // DBI Write Data #define REG_DBI_RDATA_8723B 0x034C // DBI Read Data #define REG_DBI_ADDR_8723B 0x0350 // DBI Address #define REG_DBI_FLAG_8723B 0x0352 // DBI Read/Write Flag #define REG_MDIO_WDATA_8723B 0x0354 // MDIO for Write PCIE PHY #define REG_MDIO_RDATA_8723B 0x0356 // MDIO for Reads PCIE PHY #define REG_MDIO_CTL_8723B 0x0358 // MDIO for Control #define REG_DBG_SEL_8723B 0x0360 // Debug Selection Register #define REG_PCIE_HRPWM_8723B 0x0361 //PCIe RPWM #define REG_PCIE_HCPWM_8723B 0x0363 //PCIe CPWM #define REG_PCIE_MULTIFET_CTRL_8723B 0x036A //PCIE Multi-Fethc Control //----------------------------------------------------- // // 0x0400h ~ 0x047Fh Protocol Configuration // //----------------------------------------------------- #define REG_TXPKTBUF_BCNQ_BDNY_8723B 0x0424 #define REG_TXPKTBUF_MGQ_BDNY_8723B 0x0425 #define REG_TXPKTBUF_WMAC_LBK_BF_HD_8723B 0x045D #ifdef CONFIG_WOWLAN #define REG_TXPKTBUF_IV_LOW 0x0484 #define REG_TXPKTBUF_IV_HIGH 0x0488 #endif #define REG_AMPDU_BURST_MODE_8723B 0x04BC //----------------------------------------------------- // // 0x0500h ~ 0x05FFh EDCA Configuration // //----------------------------------------------------- #define REG_SECONDARY_CCA_CTRL_8723B 0x0577 //----------------------------------------------------- // // 0x0600h ~ 0x07FFh WMAC Configuration // //----------------------------------------------------- //============================================================ // SDIO Bus Specification //============================================================ //----------------------------------------------------- // SDIO CMD Address Mapping //----------------------------------------------------- //----------------------------------------------------- // I/O bus domain (Host) //----------------------------------------------------- //----------------------------------------------------- // SDIO register //----------------------------------------------------- #define SDIO_REG_HCPWM1_8723B 0x025 // HCI Current Power Mode 1 //============================================================================ // 8723 Regsiter Bit and Content definition //============================================================================ //2 HSISR // interrupt mask which needs to clear #define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ HSISR_SPS_OCP_INT |\ HSISR_RON_INT |\ HSISR_PDNINT |\ HSISR_GPIO9_INT) //----------------------------------------------------- // // 0x0100h ~ 0x01FFh MACTOP General Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0200h ~ 0x027Fh TXDMA Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0280h ~ 0x02FFh RXDMA Configuration // //----------------------------------------------------- #define BIT_USB_RXDMA_AGG_EN BIT(31) #define RXDMA_AGG_MODE_EN BIT(1) #ifdef CONFIG_WOWLAN #define RXPKT_RELEASE_POLL BIT(16) #define RXDMA_IDLE BIT(17) #define RW_RELEASE_EN BIT(18) #endif //----------------------------------------------------- // // 0x0400h ~ 0x047Fh Protocol Configuration // //----------------------------------------------------- //---------------------------------------------------------------------------- // 8723B REG_CCK_CHECK (offset 0x454) //---------------------------------------------------------------------------- #define BIT_BCN_PORT_SEL BIT5 //----------------------------------------------------- // // 0x0500h ~ 0x05FFh EDCA Configuration // //----------------------------------------------------- //----------------------------------------------------- // // 0x0600h ~ 0x07FFh WMAC Configuration // //----------------------------------------------------- #ifdef CONFIG_RF_GAIN_OFFSET #ifdef CONFIG_RTL8723B #define EEPROM_RF_GAIN_OFFSET 0xC1 #endif #define EEPROM_RF_GAIN_VAL 0x1F6 #endif //CONFIG_RF_GAIN_OFFSET //---------------------------------------------------------------------------- // 8195 IMR/ISR bits (offset 0xB0, 8bits) //---------------------------------------------------------------------------- #define IMR_DISABLED_8723B 0 // IMR DW0(0x00B0-00B3) Bit 0-31 #define IMR_TIMER2_8723B BIT31 // Timeout interrupt 2 #define IMR_TIMER1_8723B BIT30 // Timeout interrupt 1 #define IMR_PSTIMEOUT_8723B BIT29 // Power Save Time Out Interrupt #define IMR_GTINT4_8723B BIT28 // When GTIMER4 expires, this bit is set to 1 #define IMR_GTINT3_8723B BIT27 // When GTIMER3 expires, this bit is set to 1 #define IMR_TXBCN0ERR_8723B BIT26 // Transmit Beacon0 Error #define IMR_TXBCN0OK_8723B BIT25 // Transmit Beacon0 OK #define IMR_TSF_BIT32_TOGGLE_8723B BIT24 // TSF Timer BIT32 toggle indication interrupt #define IMR_BCNDMAINT0_8723B BIT20 // Beacon DMA Interrupt 0 #define IMR_BCNDERR0_8723B BIT16 // Beacon Queue DMA OK0 #define IMR_HSISR_IND_ON_INT_8723B BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) #define IMR_BCNDMAINT_E_8723B BIT14 // Beacon DMA Interrupt Extension for Win7 #define IMR_ATIMEND_8723B BIT12 // CTWidnow End or ATIM Window End #define IMR_C2HCMD_8723B BIT10 // CPU to Host Command INT Status, Write 1 clear #define IMR_CPWM2_8723B BIT9 // CPU power Mode exchange INT Status, Write 1 clear #define IMR_CPWM_8723B BIT8 // CPU power Mode exchange INT Status, Write 1 clear #define IMR_HIGHDOK_8723B BIT7 // High Queue DMA OK #define IMR_MGNTDOK_8723B BIT6 // Management Queue DMA OK #define IMR_BKDOK_8723B BIT5 // AC_BK DMA OK #define IMR_BEDOK_8723B BIT4 // AC_BE DMA OK #define IMR_VIDOK_8723B BIT3 // AC_VI DMA OK #define IMR_VODOK_8723B BIT2 // AC_VO DMA OK #define IMR_RDU_8723B BIT1 // Rx Descriptor Unavailable #define IMR_ROK_8723B BIT0 // Receive DMA OK // IMR DW1(0x00B4-00B7) Bit 0-31 #define IMR_BCNDMAINT7_8723B BIT27 // Beacon DMA Interrupt 7 #define IMR_BCNDMAINT6_8723B BIT26 // Beacon DMA Interrupt 6 #define IMR_BCNDMAINT5_8723B BIT25 // Beacon DMA Interrupt 5 #define IMR_BCNDMAINT4_8723B BIT24 // Beacon DMA Interrupt 4 #define IMR_BCNDMAINT3_8723B BIT23 // Beacon DMA Interrupt 3 #define IMR_BCNDMAINT2_8723B BIT22 // Beacon DMA Interrupt 2 #define IMR_BCNDMAINT1_8723B BIT21 // Beacon DMA Interrupt 1 #define IMR_BCNDOK7_8723B BIT20 // Beacon Queue DMA OK Interrup 7 #define IMR_BCNDOK6_8723B BIT19 // Beacon Queue DMA OK Interrup 6 #define IMR_BCNDOK5_8723B BIT18 // Beacon Queue DMA OK Interrup 5 #define IMR_BCNDOK4_8723B BIT17 // Beacon Queue DMA OK Interrup 4 #define IMR_BCNDOK3_8723B BIT16 // Beacon Queue DMA OK Interrup 3 #define IMR_BCNDOK2_8723B BIT15 // Beacon Queue DMA OK Interrup 2 #define IMR_BCNDOK1_8723B BIT14 // Beacon Queue DMA OK Interrup 1 #define IMR_ATIMEND_E_8723B BIT13 // ATIM Window End Extension for Win7 #define IMR_TXERR_8723B BIT11 // Tx Error Flag Interrupt Status, write 1 clear. #define IMR_RXERR_8723B BIT10 // Rx Error Flag INT Status, Write 1 clear #define IMR_TXFOVW_8723B BIT9 // Transmit FIFO Overflow #define IMR_RXFOVW_8723B BIT8 // Receive FIFO Overflow #ifdef CONFIG_PCI_HCI //#define IMR_RX_MASK (IMR_ROK_8723B|IMR_RDU_8723B|IMR_RXFOVW_8723B) #define IMR_TX_MASK (IMR_VODOK_8723B|IMR_VIDOK_8723B|IMR_BEDOK_8723B|IMR_BKDOK_8723B|IMR_MGNTDOK_8723B|IMR_HIGHDOK_8723B) #define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8723B | IMR_TXBCN0OK_8723B | IMR_TXBCN0ERR_8723B | IMR_BCNDERR0_8723B) #define RT_AC_INT_MASKS (IMR_VIDOK_8723B | IMR_VODOK_8723B | IMR_BEDOK_8723B|IMR_BKDOK_8723B) #endif //======================================================== // General definitions //======================================================== #define MACID_NUM_8723B 128 #define CAM_ENTRY_NUM_8723B 64 #endif /* __RTL8723B_SPEC_H__ */ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723b_sreset.h000066400000000000000000000022041261122257400221450ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTL8723B_SRESET_H_ #define _RTL8723B_SRESET_H_ #include #ifdef DBG_CONFIG_ERROR_DETECT extern void rtl8723b_sreset_xmit_status_check(_adapter *padapter); extern void rtl8723b_sreset_linked_status_check(_adapter *padapter); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8723b_xmit.h000077500000000000000000000542371261122257400216410ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8723B_XMIT_H__ #define __RTL8723B_XMIT_H__ #define MAX_TID (15) //OFFSET 0 #define OFFSET_SZ 0 #define OFFSET_SHT 16 #define BMC BIT(24) #define LSG BIT(26) #define FSG BIT(27) #define OWN BIT(31) //OFFSET 4 #define PKT_OFFSET_SZ 0 #define BK BIT(6) #define QSEL_SHT 8 #define Rate_ID_SHT 16 #define NAVUSEHDR BIT(20) #define PKT_OFFSET_SHT 26 #define HWPC BIT(31) //OFFSET 8 #define AGG_EN BIT(29) //OFFSET 12 #define SEQ_SHT 16 //OFFSET 16 #define QoS BIT(6) #define HW_SEQ_EN BIT(7) #define USERATE BIT(8) #define DISDATAFB BIT(10) #define DATA_SHORT BIT(24) #define DATA_BW BIT(25) //OFFSET 20 #define SGI BIT(6) // //defined for TX DESC Operation // typedef struct txdesc_8723b { // Offset 0 u32 pktlen:16; u32 offset:8; u32 bmc:1; u32 htc:1; u32 rsvd0026:1; u32 rsvd0027:1; u32 linip:1; u32 noacm:1; u32 gf:1; u32 rsvd0031:1; // Offset 4 u32 macid:7; u32 rsvd0407:1; u32 qsel:5; u32 rdg_nav_ext:1; u32 lsig_txop_en:1; u32 pifs:1; u32 rate_id:5; u32 en_desc_id:1; u32 sectype:2; u32 pkt_offset:5; // unit: 8 bytes u32 moredata:1; u32 txop_ps_cap:1; u32 txop_ps_mode:1; // Offset 8 u32 p_aid:9; u32 rsvd0809:1; u32 cca_rts:2; u32 agg_en:1; u32 rdg_en:1; u32 null_0:1; u32 null_1:1; u32 bk:1; u32 morefrag:1; u32 raw:1; u32 spe_rpt:1; u32 ampdu_density:3; u32 bt_null:1; u32 g_id:6; u32 rsvd0830:2; // Offset 12 u32 wheader_len:4; u32 chk_en:1; u32 early_rate:1; u32 hw_ssn_sel:2; u32 userate:1; u32 disrtsfb:1; u32 disdatafb:1; u32 cts2self:1; u32 rtsen:1; u32 hw_rts_en:1; u32 port_id:1; u32 navusehdr:1; u32 use_max_len:1; u32 max_agg_num:5; u32 ndpa:2; u32 ampdu_max_time:8; // Offset 16 u32 datarate:7; u32 try_rate:1; u32 data_ratefb_lmt:5; u32 rts_ratefb_lmt:4; u32 rty_lmt_en:1; u32 data_rt_lmt:6; u32 rtsrate:5; u32 pcts_en:1; u32 pcts_mask_idx:2; // Offset 20 u32 data_sc:4; u32 data_short:1; u32 data_bw:2; u32 data_ldpc:1; u32 data_stbc:2; u32 vcs_stbc:2; u32 rts_short:1; u32 rts_sc:4; u32 rsvd2016:7; u32 tx_ant:4; u32 txpwr_offset:3; u32 rsvd2031:1; // Offset 24 u32 sw_define:12; u32 mbssid:4; u32 antsel_A:3; u32 antsel_B:3; u32 antsel_C:3; u32 antsel_D:3; u32 rsvd2428:4; // Offset 28 u32 checksum:16; u32 rsvd2816:8; u32 usb_txagg_num:8; // Offset 32 u32 rts_rc:6; u32 bar_rty_th:2; u32 data_rc:6; u32 rsvd3214:1; u32 en_hwseq:1; u32 nextneadpage:8; u32 tailpage:8; // Offset 36 u32 padding_len:11; u32 txbf_path:1; u32 seq:12; u32 final_data_rate:8; }TXDESC_8723B, *PTXDESC_8723B; #ifndef __INC_HAL8723BDESC_H #define __INC_HAL8723BDESC_H #define RX_STATUS_DESC_SIZE_8723B 24 #define RX_DRV_INFO_SIZE_UNIT_8723B 8 //DWORD 0 #define SET_RX_STATUS_DESC_PKT_LEN_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) #define SET_RX_STATUS_DESC_EOR_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) #define SET_RX_STATUS_DESC_OWN_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) #define GET_RX_STATUS_DESC_PKT_LEN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) #define GET_RX_STATUS_DESC_CRC32_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) #define GET_RX_STATUS_DESC_ICV_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) #define GET_RX_STATUS_DESC_DRVINFO_SIZE_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) #define GET_RX_STATUS_DESC_SECURITY_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) #define GET_RX_STATUS_DESC_QOS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) #define GET_RX_STATUS_DESC_SHIFT_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) #define GET_RX_STATUS_DESC_PHY_STATUS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) #define GET_RX_STATUS_DESC_SWDEC_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) #define GET_RX_STATUS_DESC_LAST_SEG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 28, 1) #define GET_RX_STATUS_DESC_FIRST_SEG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 29, 1) #define GET_RX_STATUS_DESC_EOR_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) #define GET_RX_STATUS_DESC_OWN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) //DWORD 1 #define GET_RX_STATUS_DESC_MACID_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) #define GET_RX_STATUS_DESC_TID_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) #define GET_RX_STATUS_DESC_AMSDU_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) #define GET_RX_STATUS_DESC_RXID_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 14, 1) #define GET_RX_STATUS_DESC_PAGGR_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 15, 1) #define GET_RX_STATUS_DESC_A1_FIT_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 16, 4) #define GET_RX_STATUS_DESC_CHKERR_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 20, 1) #define GET_RX_STATUS_DESC_IPVER_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) #define GET_RX_STATUS_DESC_IS_TCPUDP__8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) #define GET_RX_STATUS_DESC_CHK_VLD_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) #define GET_RX_STATUS_DESC_PAM_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 24, 1) #define GET_RX_STATUS_DESC_PWR_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 25, 1) #define GET_RX_STATUS_DESC_MORE_DATA_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 26, 1) #define GET_RX_STATUS_DESC_MORE_FRAG_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 27, 1) #define GET_RX_STATUS_DESC_TYPE_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 28, 2) #define GET_RX_STATUS_DESC_MC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 30, 1) #define GET_RX_STATUS_DESC_BC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 31, 1) //DWORD 2 #define GET_RX_STATUS_DESC_SEQ_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) #define GET_RX_STATUS_DESC_FRAG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) #define GET_RX_STATUS_DESC_RX_IS_QOS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) #define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) #define GET_RX_STATUS_DESC_RPT_SEL_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) //DWORD 3 #define GET_RX_STATUS_DESC_RX_RATE_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) #define GET_RX_STATUS_DESC_HTC_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) #define GET_RX_STATUS_DESC_EOSP_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) #define GET_RX_STATUS_DESC_BSSID_FIT_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) #ifdef CONFIG_USB_RX_AGGREGATION #define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) #endif #define GET_RX_STATUS_DESC_PATTERN_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) #define GET_RX_STATUS_DESC_UNICAST_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) #define GET_RX_STATUS_DESC_MAGIC_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) //DWORD 6 #define GET_RX_STATUS_DESC_SPLCP_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 0, 1) #define GET_RX_STATUS_DESC_LDPC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 1, 1) #define GET_RX_STATUS_DESC_STBC_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 2, 1) #define GET_RX_STATUS_DESC_BW_8723B(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 4, 2) //DWORD 5 #define GET_RX_STATUS_DESC_TSFL_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) #define GET_RX_STATUS_DESC_BUFF_ADDR_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) #define GET_RX_STATUS_DESC_BUFF_ADDR64_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) #define SET_RX_STATUS_DESC_BUFF_ADDR_8723B(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) // Dword 0 #define GET_TX_DESC_OWN_8723B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) #define SET_TX_DESC_PKT_SIZE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) #define SET_TX_DESC_OFFSET_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) #define SET_TX_DESC_BMC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) #define SET_TX_DESC_HTC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) #define SET_TX_DESC_LAST_SEG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) #define SET_TX_DESC_FIRST_SEG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) #define SET_TX_DESC_LINIP_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) #define SET_TX_DESC_NO_ACM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) #define SET_TX_DESC_GF_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) #define SET_TX_DESC_OWN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) // Dword 1 #define SET_TX_DESC_MACID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) #define SET_TX_DESC_QUEUE_SEL_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) #define SET_TX_DESC_RDG_NAV_EXT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) #define SET_TX_DESC_LSIG_TXOP_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) #define SET_TX_DESC_PIFS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) #define SET_TX_DESC_RATE_ID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) #define SET_TX_DESC_EN_DESC_ID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) #define SET_TX_DESC_SEC_TYPE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) #define SET_TX_DESC_PKT_OFFSET_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) // Dword 2 #define SET_TX_DESC_PAID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) #define SET_TX_DESC_CCA_RTS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) #define SET_TX_DESC_AGG_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) #define SET_TX_DESC_RDG_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) #define SET_TX_DESC_AGG_BREAK_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) #define SET_TX_DESC_MORE_FRAG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) #define SET_TX_DESC_RAW_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) #define SET_TX_DESC_SPE_RPT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) #define SET_TX_DESC_AMPDU_DENSITY_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) #define SET_TX_DESC_BT_INT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) #define SET_TX_DESC_GID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) // Dword 3 #define SET_TX_DESC_WHEADER_LEN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) #define SET_TX_DESC_CHK_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) #define SET_TX_DESC_EARLY_MODE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) #define SET_TX_DESC_HWSEQ_SEL_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) #define SET_TX_DESC_USE_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) #define SET_TX_DESC_DISABLE_RTS_FB_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) #define SET_TX_DESC_DISABLE_FB_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) #define SET_TX_DESC_CTS2SELF_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) #define SET_TX_DESC_RTS_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) #define SET_TX_DESC_HW_RTS_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) #define SET_TX_DESC_NAV_USE_HDR_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) #define SET_TX_DESC_USE_MAX_LEN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) #define SET_TX_DESC_MAX_AGG_NUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) #define SET_TX_DESC_NDPA_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) #define SET_TX_DESC_AMPDU_MAX_TIME_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) // Dword 4 #define SET_TX_DESC_TX_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) #define SET_TX_DESC_DATA_RATE_FB_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) #define SET_TX_DESC_RTS_RATE_FB_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) #define SET_TX_DESC_RETRY_LIMIT_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) #define SET_TX_DESC_DATA_RETRY_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) #define SET_TX_DESC_RTS_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) // Dword 5 #define SET_TX_DESC_DATA_SC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) #define SET_TX_DESC_DATA_SHORT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) #define SET_TX_DESC_DATA_BW_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) #define SET_TX_DESC_DATA_LDPC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) #define SET_TX_DESC_DATA_STBC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) #define SET_TX_DESC_CTROL_STBC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) #define SET_TX_DESC_RTS_SHORT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) #define SET_TX_DESC_RTS_SC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) // Dword 6 #define SET_TX_DESC_SW_DEFINE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) #define SET_TX_DESC_ANTSEL_A_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) #define SET_TX_DESC_ANTSEL_B_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) #define SET_TX_DESC_ANTSEL_C_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) #define SET_TX_DESC_ANTSEL_D_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) // Dword 7 #if(DEV_BUS_TYPE == RT_PCI_INTERFACE) #define SET_TX_DESC_TX_BUFFER_SIZE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) #else #define SET_TX_DESC_TX_DESC_CHECKSUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) #endif #define SET_TX_DESC_USB_TXAGG_NUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) #if(DEV_BUS_TYPE == RT_SDIO_INTERFACE) #define SET_TX_DESC_SDIO_TXSEQ_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) #endif // Dword 8 #define SET_TX_DESC_HWSEQ_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) // Dword 9 #define SET_TX_DESC_SEQ_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) // Dword 10 #define SET_TX_DESC_TX_BUFFER_ADDRESS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) #define GET_TX_DESC_TX_BUFFER_ADDRESS_8723B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) // Dword 11 #define SET_TX_DESC_NEXT_DESC_ADDRESS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) #define SET_EARLYMODE_PKTNUM_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) #define SET_EARLYMODE_LEN0_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) #define SET_EARLYMODE_LEN1_1_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) #define SET_EARLYMODE_LEN1_2_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) #define SET_EARLYMODE_LEN2_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) #define SET_EARLYMODE_LEN3_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) #endif //----------------------------------------------------------- // // Rate // //----------------------------------------------------------- // CCK Rates, TxHT = 0 #define DESC8723B_RATE1M 0x00 #define DESC8723B_RATE2M 0x01 #define DESC8723B_RATE5_5M 0x02 #define DESC8723B_RATE11M 0x03 // OFDM Rates, TxHT = 0 #define DESC8723B_RATE6M 0x04 #define DESC8723B_RATE9M 0x05 #define DESC8723B_RATE12M 0x06 #define DESC8723B_RATE18M 0x07 #define DESC8723B_RATE24M 0x08 #define DESC8723B_RATE36M 0x09 #define DESC8723B_RATE48M 0x0a #define DESC8723B_RATE54M 0x0b // MCS Rates, TxHT = 1 #define DESC8723B_RATEMCS0 0x0c #define DESC8723B_RATEMCS1 0x0d #define DESC8723B_RATEMCS2 0x0e #define DESC8723B_RATEMCS3 0x0f #define DESC8723B_RATEMCS4 0x10 #define DESC8723B_RATEMCS5 0x11 #define DESC8723B_RATEMCS6 0x12 #define DESC8723B_RATEMCS7 0x13 #define DESC8723B_RATEMCS8 0x14 #define DESC8723B_RATEMCS9 0x15 #define DESC8723B_RATEMCS10 0x16 #define DESC8723B_RATEMCS11 0x17 #define DESC8723B_RATEMCS12 0x18 #define DESC8723B_RATEMCS13 0x19 #define DESC8723B_RATEMCS14 0x1a #define DESC8723B_RATEMCS15 0x1b #define DESC8723B_RATEVHTSS1MCS0 0x2c #define DESC8723B_RATEVHTSS1MCS1 0x2d #define DESC8723B_RATEVHTSS1MCS2 0x2e #define DESC8723B_RATEVHTSS1MCS3 0x2f #define DESC8723B_RATEVHTSS1MCS4 0x30 #define DESC8723B_RATEVHTSS1MCS5 0x31 #define DESC8723B_RATEVHTSS1MCS6 0x32 #define DESC8723B_RATEVHTSS1MCS7 0x33 #define DESC8723B_RATEVHTSS1MCS8 0x34 #define DESC8723B_RATEVHTSS1MCS9 0x35 #define DESC8723B_RATEVHTSS2MCS0 0x36 #define DESC8723B_RATEVHTSS2MCS1 0x37 #define DESC8723B_RATEVHTSS2MCS2 0x38 #define DESC8723B_RATEVHTSS2MCS3 0x39 #define DESC8723B_RATEVHTSS2MCS4 0x3a #define DESC8723B_RATEVHTSS2MCS5 0x3b #define DESC8723B_RATEVHTSS2MCS6 0x3c #define DESC8723B_RATEVHTSS2MCS7 0x3d #define DESC8723B_RATEVHTSS2MCS8 0x3e #define DESC8723B_RATEVHTSS2MCS9 0x3f #define RX_HAL_IS_CCK_RATE_8723B(pDesc)\ (GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE1M ||\ GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE2M ||\ GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE5_5M ||\ GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE11M) void rtl8723b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); void rtl8723b_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) s32 rtl8723bs_init_xmit_priv(PADAPTER padapter); void rtl8723bs_free_xmit_priv(PADAPTER padapter); s32 rtl8723bs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); s32 rtl8723bs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); s32 rtl8723bs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); s32 rtl8723bs_xmit_buf_handler(PADAPTER padapter); thread_return rtl8723bs_xmit_thread(thread_context context); #define hal_xmit_handler rtl8723bs_xmit_buf_handler #endif #ifdef CONFIG_USB_HCI s32 rtl8723bu_xmit_buf_handler(PADAPTER padapter); #define hal_xmit_handler rtl8723bu_xmit_buf_handler s32 rtl8723bu_init_xmit_priv(PADAPTER padapter); void rtl8723bu_free_xmit_priv(PADAPTER padapter); s32 rtl8723bu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); s32 rtl8723bu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); s32 rtl8723bu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); //s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); void rtl8723bu_xmit_tasklet(void *priv); s32 rtl8723bu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); #endif #ifdef CONFIG_PCI_HCI s32 rtl8723be_init_xmit_priv(PADAPTER padapter); void rtl8723be_free_xmit_priv(PADAPTER padapter); struct xmit_buf *rtl8723be_dequeue_xmitbuf(struct rtw_tx_ring *ring); void rtl8723be_xmitframe_resume(_adapter *padapter); s32 rtl8723be_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); s32 rtl8723be_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); s32 rtl8723be_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); void rtl8723be_xmit_tasklet(void *priv); #endif u8 BWMapping_8723B(PADAPTER Adapter, struct pkt_attrib *pattrib); u8 SCMapping_8723B(PADAPTER Adapter, struct pkt_attrib *pattrib); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8812a_cmd.h000066400000000000000000000216301261122257400214050ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8812A_CMD_H__ #define __RTL8812A_CMD_H__ typedef enum _RTL8812_H2C_CMD { H2C_8812_RSVDPAGE = 0, H2C_8812_MSRRPT = 1, H2C_8812_SCAN = 2, H2C_8812_KEEP_ALIVE_CTRL = 3, H2C_8812_DISCONNECT_DECISION = 4, H2C_8812_INIT_OFFLOAD = 6, H2C_8812_AP_OFFLOAD = 8, H2C_8812_BCN_RSVDPAGE = 9, H2C_8812_PROBERSP_RSVDPAGE = 10, H2C_8812_SETPWRMODE = 0x20, H2C_8812_PS_TUNING_PARA = 0x21, H2C_8812_PS_TUNING_PARA2 = 0x22, H2C_8812_PS_LPS_PARA = 0x23, H2C_8812_P2P_PS_OFFLOAD = 0x24, H2C_8812_RA_MASK = 0x40, H2C_8812_TxBF = 0x41, H2C_8812_RSSI_REPORT = 0x42, H2C_8812_IQ_CALIBRATION = 0x45, H2C_8812_BT_FW_PATCH = 0x6a, H2C_8812_WO_WLAN = 0x80, H2C_8812_REMOTE_WAKE_CTRL = 0x81, H2C_8812_AOAC_GLOBAL_INFO = 0x82, H2C_8812_AOAC_RSVDPAGE = 0x83, H2C_8812_FW_SWCHANNL = 0x87, H2C_8812_TSF_RESET = 0xC0, MAX_8812_H2CCMD }RTL8812_H2C_CMD; typedef enum _RTL8812_C2H_EVT { C2H_8812_DBG = 0, C2H_8812_LB = 1, C2H_8812_TXBF = 2, C2H_8812_TX_REPORT = 3, C2H_8812_BT_INFO = 9, C2H_8812_BT_MP = 11, C2H_8812_RA_RPT=12, C2H_8812_FW_SWCHNL = 0x10, C2H_8812_IQK_FINISH = 0x11, C2H_8812_MAILBOX_STATUS = 0x15, MAX_8812_C2HEVENT }RTL8812_C2H_EVT; struct cmd_msg_parm { u8 eid; //element id u8 sz; // sz u8 buf[6]; }; enum{ PWRS }; struct H2C_SS_RFOFF_PARAM{ u8 ROFOn; // 1: on, 0:off u16 gpio_period; // unit: 1024 us }__attribute__ ((packed)); //_RSVDPAGE_LOC_CMD0 #define SET_8812_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) #define SET_8812_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) #define SET_8812_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) #define SET_8812_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) #define SET_8812_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) //_MEDIA_STATUS_RPT_PARM_CMD1 #define SET_8812_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) #define SET_8812_H2CCMD_MSRRPT_PARM_MACID_IND(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) #define SET_8812_H2CCMD_MSRRPT_PARM_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) #define SET_8812_H2CCMD_MSRRPT_PARM_MACID_END(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+2, 0, 8, __Value) //_SETPWRMODE_PARM #define SET_8812_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) #define SET_8812_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) #define SET_8812_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) #define SET_8812_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) #define SET_8812_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) #define SET_8812_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) #define SET_8812_H2CCMD_PWRMODE_PARM_BYTE5(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+5, 0, 8, __Value) #define GET_8812_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) //_P2P_PS_OFFLOAD #define SET_8812_H2CCMD_P2P_PS_OFFLOAD_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) #define SET_8812_H2CCMD_P2P_PS_OFFLOAD_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) #define SET_8812_H2CCMD_P2P_PS_OFFLOAD_CTWINDOW_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) #define SET_8812_H2CCMD_P2P_PS_OFFLOAD_NOA0_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) #define SET_8812_H2CCMD_P2P_PS_OFFLOAD_NOA1_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) #define SET_8812_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) #define SET_8812_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) void Set_RA_LDPC_8812(struct sta_info *psta, BOOLEAN bLDPC); // host message to firmware cmd s32 FillH2CCmd_8812(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); void rtl8812_set_FwPwrMode_cmd(PADAPTER padapter, u8 PSMode); void rtl8812_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus); u8 rtl8812_set_rssi_cmd(PADAPTER padapter, u8 *param); void rtl8812_set_raid_cmd(PADAPTER padapter, u32 bitmap, u8* arg); void rtl8812_Add_RateATid(PADAPTER padapter, u32 bitmap, u8* arg, u8 rssi_level); void rtl8812_set_wowlan_cmd(_adapter* padapter, u8 enable); s32 FillH2CCmd_8812(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); #ifdef CONFIG_P2P_PS void rtl8812_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); #endif //CONFIG_P2P void CheckFwRsvdPageContent(PADAPTER padapter); void rtl8812_set_FwMediaStatus_cmd(PADAPTER padapter, u16 mstatus_rpt ); #ifdef CONFIG_TSF_RESET_OFFLOAD int reset_tsf(PADAPTER Adapter, u8 reset_port ); #endif // CONFIG_TSF_RESET_OFFLOAD #ifdef CONFIG_WOWLAN typedef struct _SETWOWLAN_PARM{ u8 mode; u8 gpio_index; u8 gpio_duration; u8 second_mode; u8 reserve; }SETWOWLAN_PARM, *PSETWOWLAN_PARM; #define FW_WOWLAN_FUN_EN BIT(0) #define FW_WOWLAN_PATTERN_MATCH BIT(1) #define FW_WOWLAN_MAGIC_PKT BIT(2) #define FW_WOWLAN_UNICAST BIT(3) #define FW_WOWLAN_ALL_PKT_DROP BIT(4) #define FW_WOWLAN_GPIO_ACTIVE BIT(5) #define FW_WOWLAN_REKEY_WAKEUP BIT(6) #define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) #define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) #define FW_FW_PARSE_MAGIC_PKT BIT(1) #define FW_REMOTE_WAKE_CTRL_EN BIT(0) #define FW_REALWOWLAN_EN BIT(5) void rtl8812a_set_wowlan_cmd(_adapter* padapter, u8 enable); void SetFwRelatedForWoWLAN8812(_adapter* padapter, u8 bHostIsGoingtoSleep); #endif//CONFIG_WOWLAN //------------------------------------ // C2H format //------------------------------------ // TX Beamforming #define GET_8812_C2H_TXBF_ORIGINATE(_Header) LE_BITS_TO_1BYTE(_Header, 0, 8) #define GET_8812_C2H_TXBF_MACID(_Header) LE_BITS_TO_1BYTE((_Header + 1), 0, 8) /// TX Feedback Content #define USEC_UNIT_FOR_8812_C2H_TX_RPT_QUEUE_TIME 256 #define GET_8812_C2H_TX_RPT_QUEUE_SELECT(_Header) LE_BITS_TO_1BYTE((_Header + 0), 0, 5) #define GET_8812_C2H_TX_RPT_PKT_BROCAST(_Header) LE_BITS_TO_1BYTE((_Header + 0), 5, 1) #define GET_8812_C2H_TX_RPT_LIFE_TIME_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 6, 1) #define GET_8812_C2H_TX_RPT_RETRY_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 7, 1) #define GET_8812_C2H_TX_RPT_MAC_ID(_Header) LE_BITS_TO_1BYTE((_Header + 1), 0, 8) #define GET_8812_C2H_TX_RPT_DATA_RETRY_CNT(_Header) LE_BITS_TO_1BYTE((_Header + 2), 0, 6) #define GET_8812_C2H_TX_RPT_QUEUE_TIME(_Header) LE_BITS_TO_2BYTE((_Header + 3), 0, 16) // In unit of 256 microseconds. #define GET_8812_C2H_TX_RPT_FINAL_DATA_RATE(_Header) LE_BITS_TO_1BYTE((_Header + 5), 0, 8) // BT_FW_PATCH #define SET_8812_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((pu1Byte)(__pH2CCmd), 0, 16, __Value) #define SET_8812_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((pu1Byte)(__pH2CCmd)+2, 0, 8, __Value) #define SET_8812_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((pu1Byte)(__pH2CCmd)+3, 0, 8, __Value) #define SET_8812_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((pu1Byte)(__pH2CCmd)+4, 0, 8, __Value) #define SET_8812_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((pu1Byte)(__pH2CCmd)+5, 0, 8, __Value) int rtl8812_iqk_wait(_adapter* padapter, u32 timeout_ms); void rtl8812_iqk_done(_adapter* padapter); s32 _C2HContentParsing8812( IN PADAPTER Adapter, IN u8 c2hCmdId, IN u8 c2hCmdLen, IN u8 *tmpBuf ); void C2HPacketHandler_8812(PADAPTER Adapter, u8 *Buffer, u8 Length); #endif//__RTL8812A_CMD_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8812a_dm.h000066400000000000000000000026511261122257400212440ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8812A_DM_H__ #define __RTL8812A_DM_H__ void rtl8812_init_dm_priv(IN PADAPTER Adapter); void rtl8812_deinit_dm_priv(IN PADAPTER Adapter); void rtl8812_InitHalDm(IN PADAPTER Adapter); void rtl8812_HalDmWatchDog(IN PADAPTER Adapter); //VOID rtl8192c_dm_CheckTXPowerTracking(IN PADAPTER Adapter); //void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal); #ifdef CONFIG_ANTENNA_DIVERSITY void AntDivCompare8812(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); u8 AntDivBeforeLink8812(PADAPTER Adapter ); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8812a_hal.h000066400000000000000000000347021261122257400214120ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8812A_HAL_H__ #define __RTL8812A_HAL_H__ //#include "hal_com.h" #include "hal_data.h" //include HAL Related header after HAL Related compiling flags #include "rtl8812a_spec.h" #include "rtl8812a_rf.h" #include "rtl8812a_dm.h" #include "rtl8812a_recv.h" #include "rtl8812a_xmit.h" #include "rtl8812a_cmd.h" #include "rtl8812a_led.h" #include "Hal8812PwrSeq.h" #include "Hal8821APwrSeq.h" //for 8821A/8811A #include "Hal8812PhyReg.h" #include "Hal8812PhyCfg.h" #ifdef DBG_CONFIG_ERROR_DETECT #include "rtl8812a_sreset.h" #endif //--------------------------------------------------------------------- // RTL8812AU From header //--------------------------------------------------------------------- #define RTL8812_FW_IMG "rtl8812a/FW_NIC.bin" #define RTL8812_FW_WW_IMG "rtl8812a/FW_WoWLAN.bin" #define RTL8812_PHY_REG "rtl8812a/PHY_REG.txt" #define RTL8812_PHY_RADIO_A "rtl8812a/RadioA.txt" #define RTL8812_PHY_RADIO_B "rtl8812a/RadioB.txt" #define RTL8812_TXPWR_TRACK "rtl8812a/TxPowerTrack.txt" #define RTL8812_AGC_TAB "rtl8812a/AGC_TAB.txt" #define RTL8812_PHY_MACREG "rtl8812a/MAC_REG.txt" #define RTL8812_PHY_REG_PG "rtl8812a/PHY_REG_PG.txt" #define RTL8812_PHY_REG_MP "rtl8812a/PHY_REG_MP.txt" #define RTL8812_TXPWR_LMT "rtl8812a/TXPWR_LMT.txt" //--------------------------------------------------------------------- // RTL8821U From file //--------------------------------------------------------------------- #define RTL8821_FW_IMG "rtl8821a/FW_NIC.bin" #define RTL8821_FW_WW_IMG "rtl8821a/FW_WoWLAN.bin" #define RTL8821_PHY_REG "rtl8821a/PHY_REG.txt" #define RTL8821_PHY_RADIO_A "rtl8821a/RadioA.txt" #define RTL8821_PHY_RADIO_B "rtl8821a/RadioB.txt" #define RTL8821_TXPWR_TRACK "rtl8821a/TxPowerTrack.txt" #define RTL8821_AGC_TAB "rtl8821a/AGC_TAB.txt" #define RTL8821_PHY_MACREG "rtl8821a/MAC_REG.txt" #define RTL8821_PHY_REG_PG "rtl8821a/PHY_REG_PG.txt" #define RTL8821_PHY_REG_MP "rtl8821a/PHY_REG_MP.txt" #define RTL8821_TXPWR_LMT "rtl8821a/TXPWR_LMT.txt" //--------------------------------------------------------------------- // RTL8812 Power Configuration CMDs for PCIe interface //--------------------------------------------------------------------- #define Rtl8812_NIC_PWR_ON_FLOW rtl8812_power_on_flow #define Rtl8812_NIC_RF_OFF_FLOW rtl8812_radio_off_flow #define Rtl8812_NIC_DISABLE_FLOW rtl8812_card_disable_flow #define Rtl8812_NIC_ENABLE_FLOW rtl8812_card_enable_flow #define Rtl8812_NIC_SUSPEND_FLOW rtl8812_suspend_flow #define Rtl8812_NIC_RESUME_FLOW rtl8812_resume_flow #define Rtl8812_NIC_PDN_FLOW rtl8812_hwpdn_flow #define Rtl8812_NIC_LPS_ENTER_FLOW rtl8812_enter_lps_flow #define Rtl8812_NIC_LPS_LEAVE_FLOW rtl8812_leave_lps_flow //--------------------------------------------------------------------- // RTL8821 Power Configuration CMDs for PCIe interface //--------------------------------------------------------------------- #define Rtl8821A_NIC_PWR_ON_FLOW rtl8821A_power_on_flow #define Rtl8821A_NIC_RF_OFF_FLOW rtl8821A_radio_off_flow #define Rtl8821A_NIC_DISABLE_FLOW rtl8821A_card_disable_flow #define Rtl8821A_NIC_ENABLE_FLOW rtl8821A_card_enable_flow #define Rtl8821A_NIC_SUSPEND_FLOW rtl8821A_suspend_flow #define Rtl8821A_NIC_RESUME_FLOW rtl8821A_resume_flow #define Rtl8821A_NIC_PDN_FLOW rtl8821A_hwpdn_flow #define Rtl8821A_NIC_LPS_ENTER_FLOW rtl8821A_enter_lps_flow #define Rtl8821A_NIC_LPS_LEAVE_FLOW rtl8821A_leave_lps_flow #if 1 // download firmware related data structure #define FW_SIZE_8812 0x8000 // Compatible with RTL8723 Maximal RAM code size 24K. modified to 32k, TO compatible with 92d maximal fw size 32k #define FW_START_ADDRESS 0x1000 #define FW_END_ADDRESS 0x5FFF typedef struct _RT_FIRMWARE_8812 { FIRMWARE_SOURCE eFWSource; #ifdef CONFIG_EMBEDDED_FWIMG u8* szFwBuffer; #else u8 szFwBuffer[FW_SIZE_8812]; #endif u32 ulFwLength; } RT_FIRMWARE_8812, *PRT_FIRMWARE_8812; // // This structure must be cared byte-ordering // // Added by tynli. 2009.12.04. #define IS_FW_HEADER_EXIST_8812(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) &0xFFF0) == 0x9500) #define IS_FW_HEADER_EXIST_8821(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) &0xFFF0) == 0x2100) //===================================================== // Firmware Header(8-byte alinment required) //===================================================== //--- LONG WORD 0 ---- #define GET_FIRMWARE_HDR_SIGNATURE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut #define GET_FIRMWARE_HDR_CATEGORY_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI #define GET_FIRMWARE_HDR_FUNCTION_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions #define GET_FIRMWARE_HDR_VERSION_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version #define GET_FIRMWARE_HDR_SUB_VER_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00 #define GET_FIRMWARE_HDR_RSVD1_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) //--- LONG WORD 1 ---- #define GET_FIRMWARE_HDR_MONTH_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) // Release time Month field #define GET_FIRMWARE_HDR_DATE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) // Release time Date field #define GET_FIRMWARE_HDR_HOUR_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)// Release time Hour field #define GET_FIRMWARE_HDR_MINUTE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)// Release time Minute field #define GET_FIRMWARE_HDR_ROMCODE_SIZE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)// The size of RAM code #define GET_FIRMWARE_HDR_RSVD2_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16) //--- LONG WORD 2 ---- #define GET_FIRMWARE_HDR_SVN_IDX_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)// The SVN entry index #define GET_FIRMWARE_HDR_RSVD3_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32) //--- LONG WORD 3 ---- #define GET_FIRMWARE_HDR_RSVD4_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32) #define GET_FIRMWARE_HDR_RSVD5_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) #endif // download firmware related data structure #define DRIVER_EARLY_INT_TIME_8812 0x05 #define BCN_DMA_ATIME_INT_TIME_8812 0x02 //for 8812 // TX 128K, RX 16K, Page size 512B for TX, 128B for RX #define MAX_RX_DMA_BUFFER_SIZE_8812 0x3E80 //0x3FFF // RX 16K #define BCNQ_PAGE_NUM_8812 0x07 //For WoWLan , more reserved page //ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6 #ifdef CONFIG_WOWLAN #define WOWLAN_PAGE_NUM_8812 0x05 #else #define WOWLAN_PAGE_NUM_8812 0x00 #endif #define TX_TOTAL_PAGE_NUMBER_8812 (0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812) #define TX_PAGE_BOUNDARY_8812 (TX_TOTAL_PAGE_NUMBER_8812 + 1) #define TX_PAGE_BOUNDARY_WOWLAN_8812 0xE0 #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 TX_PAGE_BOUNDARY_8812 #define WMM_NORMAL_TX_PAGE_BOUNDARY_8812 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 + 1) // For Normal Chip Setting // (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8812 #define NORMAL_PAGE_NUM_LPQ_8812 0x10 #define NORMAL_PAGE_NUM_HPQ_8812 0x10 #define NORMAL_PAGE_NUM_NPQ_8812 0x00 #define WMM_NORMAL_PAGE_NUM_HPQ_8812 0x30 #define WMM_NORMAL_PAGE_NUM_LPQ_8812 0x20 #define WMM_NORMAL_PAGE_NUM_NPQ_8812 0x20 // for 8821A // TX 64K, RX 16K, Page size 256B for TX, 128B for RX #define PAGE_SIZE_TX_8821A 256 #define PAGE_SIZE_RX_8821A 128 #define MAX_RX_DMA_BUFFER_SIZE_8821 0x3E80 // RX 16K #define BCNQ_PAGE_NUM_8821 0x08 #ifdef CONFIG_CONCURRENT_MODE #define BCNQ1_PAGE_NUM_8821 0x04 #else #define BCNQ1_PAGE_NUM_8821 0x00 #endif //For WoWLan , more reserved page //ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6 #ifdef CONFIG_WOWLAN #define WOWLAN_PAGE_NUM_8821 0x06 #else #define WOWLAN_PAGE_NUM_8821 0x00 #endif #define TX_TOTAL_PAGE_NUMBER_8821 (0xFF - BCNQ_PAGE_NUM_8821 - BCNQ1_PAGE_NUM_8821 - WOWLAN_PAGE_NUM_8821) #define TX_PAGE_BOUNDARY_8821 (TX_TOTAL_PAGE_NUMBER_8821 + 1) //#define TX_PAGE_BOUNDARY_WOWLAN_8821 0xE0 #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 TX_TOTAL_PAGE_NUMBER_8821 #define WMM_NORMAL_TX_PAGE_BOUNDARY_8821 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 + 1) // (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER #define NORMAL_PAGE_NUM_LPQ_8821 0x08//0x10 #define NORMAL_PAGE_NUM_HPQ_8821 0x08//0x10 #define NORMAL_PAGE_NUM_NPQ_8821 0x00 #define WMM_NORMAL_PAGE_NUM_HPQ_8821 0x30 #define WMM_NORMAL_PAGE_NUM_LPQ_8821 0x20 #define WMM_NORMAL_PAGE_NUM_NPQ_8821 0x20 #define EFUSE_HIDDEN_812AU 0 #define EFUSE_HIDDEN_812AU_VS 1 #define EFUSE_HIDDEN_812AU_VL 2 #define EFUSE_HIDDEN_812AU_VN 3 #ifdef CONFIG_PCI_HCI #define EFUSE_REAL_CONTENT_LEN_JAGUAR 1024 #define HWSET_MAX_SIZE_JAGUAR 1024 #else #define EFUSE_REAL_CONTENT_LEN_JAGUAR 512 #define HWSET_MAX_SIZE_JAGUAR 512 #endif #define EFUSE_MAX_BANK_8812A 2 #define EFUSE_MAP_LEN_JAGUAR 512 #define EFUSE_MAX_SECTION_JAGUAR 64 #define EFUSE_MAX_WORD_UNIT_JAGUAR 4 #define EFUSE_IC_ID_OFFSET_JAGUAR 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. #define AVAILABLE_EFUSE_ADDR_8812(addr) (addr < EFUSE_REAL_CONTENT_LEN_JAGUAR) // To prevent out of boundary programming case, leave 1byte and program full section // 9bytes + 1byt + 5bytes and pre 1byte. // For worst case: // | 2byte|----8bytes----|1byte|--7bytes--| //92D #define EFUSE_OOB_PROTECT_BYTES_JAGUAR 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. #define EFUSE_PROTECT_BYTES_BANK_JAGUAR 16 // Added for different registry settings to adjust TxPwr index. added by Roger, 2010.03.09. typedef enum _TX_PWR_PERCENTAGE{ TX_PWR_PERCENTAGE_0 = 0x01, // 12.5% TX_PWR_PERCENTAGE_1 = 0x02, // 25% TX_PWR_PERCENTAGE_2 = 0x04, // 50% TX_PWR_PERCENTAGE_3 = 0x08, //100%, default target output power. } TX_PWR_PERCENTAGE; #define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) #define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) //#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) //#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) // rtl8812_hal_init.c void _8051Reset8812(PADAPTER padapter); s32 FirmwareDownload8812(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); void InitializeFirmwareVars8812(PADAPTER padapter); s32 _LLTWrite_8812A(PADAPTER Adapter, u32 address, u32 data); s32 InitLLTTable8812A(PADAPTER padapter, u8 txpktbuf_bndy); void InitRDGSetting8812A(PADAPTER padapter); void CheckAutoloadState8812A(PADAPTER padapter); // EFuse u8 GetEEPROMSize8812A(PADAPTER padapter); void InitPGData8812A(PADAPTER padapter); void Hal_EfuseParseIDCode8812A(PADAPTER padapter, u8 *hwinfo); void Hal_ReadPROMVersion8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_ReadTxPowerInfo8812A(PADAPTER padapter, u8* hwinfo,BOOLEAN AutoLoadFail); void Hal_ReadBoardType8812A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail); void Hal_ReadThermalMeter_8812A(PADAPTER Adapter, u8* PROMContent,BOOLEAN AutoloadFail); void Hal_ReadChannelPlan8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); void Hal_EfuseParseXtal_8812A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail); void Hal_ReadAntennaDiversity8812A(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail); void Hal_ReadAntennaDiversity8821A(PADAPTER pAdapter, u8* PROMContent, BOOLEAN AutoLoadFail); void Hal_ReadAmplifierType_8812A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); void Hal_ReadPAType_8821A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); void Hal_ReadRFEType_8812A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail); void Hal_EfuseParseBTCoexistInfo8812A(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail); void hal_ReadUsbType_8812AU(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); void Hal_ReadRemoteWakeup_8812A(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail); BOOLEAN HalDetectPwrDownMode8812(PADAPTER Adapter); #ifdef CONFIG_WOWLAN void Hal_DetectWoWMode(PADAPTER pAdapter); #endif //CONFIG_WOWLAN void _InitBeaconParameters_8812A(PADAPTER padapter); void SetBeaconRelatedRegisters8812A(PADAPTER padapter); void ReadRFType8812A(PADAPTER padapter); void InitDefaultValue8821A(PADAPTER padapter); void SetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval); void GetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval); u8 SetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); u8 GetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); s32 c2h_id_filter_ccx_8812a(u8 *buf); void rtl8812_set_hal_ops(struct hal_ops *pHalFunc); // register void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); void rtl8812_start_thread(PADAPTER padapter); void rtl8812_stop_thread(PADAPTER padapter); #ifdef CONFIG_PCI_HCI BOOLEAN InterruptRecognized8812AE(PADAPTER Adapter); VOID UpdateInterruptMask8812AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); #endif #endif //__RTL8188E_HAL_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8812a_led.h000066400000000000000000000031141261122257400214030ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8812A_LED_H__ #define __RTL8812A_LED_H__ //================================================================================ // Interface to manipulate LED objects. //================================================================================ #ifdef CONFIG_USB_HCI void rtl8812au_InitSwLeds(PADAPTER padapter); void rtl8812au_DeInitSwLeds(PADAPTER padapter); #endif #ifdef CONFIG_PCI_HCI void rtl8812ae_InitSwLeds(PADAPTER padapter); void rtl8812ae_DeInitSwLeds(PADAPTER padapter); #endif #ifdef CONFIG_SDIO_HCI void rtl8812s_InitSwLeds(PADAPTER padapter); void rtl8812s_DeInitSwLeds(PADAPTER padapter); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8812a_recv.h000066400000000000000000000201661261122257400216040ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8812A_RECV_H__ #define __RTL8812A_RECV_H__ #if defined(CONFIG_USB_HCI) #ifndef MAX_RECVBUF_SZ #ifdef PLATFORM_OS_CE #define MAX_RECVBUF_SZ (8192+1024) // 8K+1k #else #ifndef CONFIG_MINIMAL_MEMORY_USAGE #ifdef CONFIG_PLATFORM_MSTAR #define MAX_RECVBUF_SZ (8192) // 8K #else #define MAX_RECVBUF_SZ (32768) // 32k #endif //#define MAX_RECVBUF_SZ (24576) // 24k //#define MAX_RECVBUF_SZ (20480) //20K //#define MAX_RECVBUF_SZ (10240) //10K //#define MAX_RECVBUF_SZ (15360) // 15k < 16k //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k #else #define MAX_RECVBUF_SZ (4000) // about 4K #endif #endif #endif //!MAX_RECVBUF_SZ #elif defined(CONFIG_PCI_HCI) //#ifndef CONFIG_MINIMAL_MEMORY_USAGE // #define MAX_RECVBUF_SZ (9100) //#else #define MAX_RECVBUF_SZ (4000) // about 4K //#endif #elif defined(CONFIG_SDIO_HCI) #ifdef CONFIG_SDIO_RX_COPY #define MAX_RECVBUF_SZ (10240) #else // !CONFIG_SDIO_RX_COPY #define MAX_RECVBUF_SZ MAX_RX_DMA_BUFFER_SIZE_8821 #endif // !CONFIG_SDIO_RX_COPY #endif // Rx smooth factor #define Rx_Smooth_Factor (20) //DWORD 0 #define SET_RX_STATUS_DESC_PKT_LEN_8812(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 0, 14, __Value) #define SET_RX_STATUS_DESC_EOR_8812(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 30, 1, __Value) #define SET_RX_STATUS_DESC_OWN_8812(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE( __pRxStatusDesc, 31, 1, __Value) #define GET_RX_STATUS_DESC_PKT_LEN_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 0, 14) #define GET_RX_STATUS_DESC_CRC32_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 14, 1) #define GET_RX_STATUS_DESC_ICV_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 15, 1) #define GET_RX_STATUS_DESC_DRVINFO_SIZE_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 16, 4) #define GET_RX_STATUS_DESC_SECURITY_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 20, 3) #define GET_RX_STATUS_DESC_QOS_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1) #define GET_RX_STATUS_DESC_SHIFT_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 24, 2) #define GET_RX_STATUS_DESC_PHY_STATUS_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 26, 1) #define GET_RX_STATUS_DESC_SWDEC_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 27, 1) #define GET_RX_STATUS_DESC_LAST_SEG_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 28, 1) #define GET_RX_STATUS_DESC_FIRST_SEG_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 29, 1) #define GET_RX_STATUS_DESC_EOR_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 30, 1) #define GET_RX_STATUS_DESC_OWN_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 31, 1) //DWORD 1 #define GET_RX_STATUS_DESC_MACID_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) #define GET_RX_STATUS_DESC_TID_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) #define GET_RX_STATUS_DESC_AMSDU_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) #define GET_RX_STATUS_DESC_RXID_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 14, 1) #define GET_RX_STATUS_DESC_PAGGR_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 15, 1) #define GET_RX_STATUS_DESC_A1_FIT_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 16, 4) #define GET_RX_STATUS_DESC_CHKERR_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 20, 1) #define GET_RX_STATUS_DESC_IPVER_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) #define GET_RX_STATUS_DESC_IS_TCPUDP__8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) #define GET_RX_STATUS_DESC_CHK_VLD_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) #define GET_RX_STATUS_DESC_PAM_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 24, 1) #define GET_RX_STATUS_DESC_PWR_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 25, 1) #define GET_RX_STATUS_DESC_MORE_DATA_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 26, 1) #define GET_RX_STATUS_DESC_MORE_FRAG_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 27, 1) #define GET_RX_STATUS_DESC_TYPE_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 28, 2) #define GET_RX_STATUS_DESC_MC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 30, 1) #define GET_RX_STATUS_DESC_BC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+4, 31, 1) //DWORD 2 #define GET_RX_STATUS_DESC_SEQ_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 0, 12) #define GET_RX_STATUS_DESC_FRAG_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 12, 4) #define GET_RX_STATUS_DESC_RX_IS_QOS_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 16, 1) #define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 18, 6) #define GET_RX_STATUS_DESC_RPT_SEL_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+8, 28, 1) //DWORD 3 #define GET_RX_STATUS_DESC_RX_RATE_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 0, 7) #define GET_RX_STATUS_DESC_HTC_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 10, 1) #define GET_RX_STATUS_DESC_EOSP_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 11, 1) #define GET_RX_STATUS_DESC_BSSID_FIT_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 12, 2) #ifdef CONFIG_USB_RX_AGGREGATION #define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+12, 16, 8) #endif #define GET_RX_STATUS_DESC_PATTERN_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 29, 1) #define GET_RX_STATUS_DESC_UNICAST_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 30, 1) #define GET_RX_STATUS_DESC_MAGIC_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+12, 31, 1) //DWORD 6 #define GET_RX_STATUS_DESC_SPLCP_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 0, 1) #define GET_RX_STATUS_DESC_LDPC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 1, 1) #define GET_RX_STATUS_DESC_STBC_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 2, 1) #define GET_RX_STATUS_DESC_BW_8812(__pRxDesc) LE_BITS_TO_4BYTE( __pRxDesc+16, 4, 2) //DWORD 5 #define GET_RX_STATUS_DESC_TSFL_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc+20, 0, 32) #define GET_RX_STATUS_DESC_BUFF_ADDR_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) #define GET_RX_STATUS_DESC_BUFF_ADDR64_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) #define SET_RX_STATUS_DESC_BUFF_ADDR_8812(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) #ifdef CONFIG_SDIO_HCI s32 InitRecvPriv8821AS(PADAPTER padapter); void FreeRecvPriv8821AS(PADAPTER padapter); #endif // CONFIG_SDIO_HCI #ifdef CONFIG_USB_HCI #define INTERRUPT_MSG_FORMAT_LEN 60 void rtl8812au_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); s32 rtl8812au_init_recv_priv(PADAPTER padapter); void rtl8812au_free_recv_priv(PADAPTER padapter); void rtl8812au_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf); void rtl8812au_recv_tasklet(void *priv); #endif #ifdef CONFIG_PCI_HCI s32 rtl8812ae_init_recv_priv(PADAPTER padapter); void rtl8812ae_free_recv_priv(PADAPTER padapter); #endif void rtl8812_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); void rtl8812_query_rx_phy_status(union recv_frame *prframe, u8 *pphy_stat); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8812a_rf.h000066400000000000000000000021341261122257400212470ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8812A_RF_H__ #define __RTL8812A_RF_H__ VOID PHY_RF6052SetBandwidth8812( IN PADAPTER Adapter, IN CHANNEL_WIDTH Bandwidth); int PHY_RF6052_Config_8812( IN PADAPTER Adapter ); #endif//__RTL8188E_RF_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8812a_spec.h000066400000000000000000000245211261122257400215760ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * *******************************************************************************/ #ifndef __RTL8812A_SPEC_H__ #define __RTL8812A_SPEC_H__ #include //============================================================ // 8812 Regsiter offset definition //============================================================ //============================================================ // //============================================================ //----------------------------------------------------- // // 0x0000h ~ 0x00FFh System Configuration // //----------------------------------------------------- #define REG_HSIMR_8812 0x0058 #define REG_HSISR_8812 0x005c #define REG_GPIO_EXT_CTRL 0x0060 #define REG_GPIO_STATUS_8812 0x006C #define REG_SDIO_CTRL_8812 0x0070 #define REG_OPT_CTRL_8812 0x0074 #define REG_RF_B_CTRL_8812 0x0076 #define REG_FW_DRV_MSG_8812 0x0088 #define REG_HMEBOX_E2_E3_8812 0x008C #define REG_HIMR0_8812 0x00B0 #define REG_HISR0_8812 0x00B4 #define REG_HIMR1_8812 0x00B8 #define REG_HISR1_8812 0x00BC #define REG_EFUSE_BURN_GNT_8812 0x00CF #define REG_SYS_CFG1_8812 0x00FC //----------------------------------------------------- // // 0x0100h ~ 0x01FFh MACTOP General Configuration // //----------------------------------------------------- #define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) #define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) #define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) #define REG_RSVD3_8812 0x0168 #define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 #define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 #define REG_C2HEVT_CMD_LEN_88XX 0x01AE #define REG_HMEBOX_EXT0_8812 0x01F0 #define REG_HMEBOX_EXT1_8812 0x01F4 #define REG_HMEBOX_EXT2_8812 0x01F8 #define REG_HMEBOX_EXT3_8812 0x01FC //----------------------------------------------------- // // 0x0200h ~ 0x027Fh TXDMA Configuration // //----------------------------------------------------- #define REG_DWBCN0_CTRL_8812 REG_TDECTRL #define REG_DWBCN1_CTRL_8812 0x0228 //----------------------------------------------------- // // 0x0280h ~ 0x02FFh RXDMA Configuration // //----------------------------------------------------- #define REG_RXDMA_CONTROL_8812 0x0286 // Control the RX DMA. #define REG_RXDMA_PRO_8812 0x0290 #define REG_EARLY_MODE_CONTROL_8812 0x02BC #define REG_RSVD5_8812 0x02F0 #define REG_RSVD6_8812 0x02F4 #define REG_RSVD7_8812 0x02F8 #define REG_RSVD8_8812 0x02FC //----------------------------------------------------- // // 0x0300h ~ 0x03FFh PCIe // //----------------------------------------------------- #define REG_DBI_WDATA_8812 0x0348 // DBI Write Data #define REG_DBI_RDATA_8812 0x034C // DBI Read Data #define REG_DBI_ADDR_8812 0x0350 // DBI Address #define REG_DBI_FLAG_8812 0x0352 // DBI Read/Write Flag #define REG_MDIO_WDATA_8812 0x0354 // MDIO for Write PCIE PHY #define REG_MDIO_RDATA_8812 0x0356 // MDIO for Reads PCIE PHY #define REG_MDIO_CTL_8812 0x0358 // MDIO for Control #define REG_PCIE_MULTIFET_CTRL_8812 0x036A //PCIE Multi-Fethc Control //----------------------------------------------------- // // 0x0400h ~ 0x047Fh Protocol Configuration // //----------------------------------------------------- #define REG_TXBF_CTRL_8812 0x042C #define REG_ARFR0_8812 0x0444 #define REG_ARFR1_8812 0x044C #define REG_CCK_CHECK_8812 0x0454 #define REG_AMPDU_MAX_TIME_8812 0x0456 #define REG_TXPKTBUF_BCNQ_BDNY1_8812 0x0457 #define REG_AMPDU_MAX_LENGTH_8812 0x0458 #define REG_TXPKTBUF_WMAC_LBK_BF_HD_8812 0x045D #define REG_NDPA_OPT_CTRL_8812 0x045F #define REG_DATA_SC_8812 0x0483 #define REG_ARFR2_8812 0x048C #define REG_ARFR3_8812 0x0494 #define REG_TXRPT_START_OFFSET 0x04AC #define REG_AMPDU_BURST_MODE_8812 0x04BC #define REG_HT_SINGLE_AMPDU_8812 0x04C7 #define REG_MACID_PKT_DROP0_8812 0x04D0 //----------------------------------------------------- // // 0x0500h ~ 0x05FFh EDCA Configuration // //----------------------------------------------------- #define REG_CTWND_8812 0x0572 #define REG_SECONDARY_CCA_CTRL_8812 0x0577 #define REG_SCH_TXCMD_8812 0x05F8 //----------------------------------------------------- // // 0x0600h ~ 0x07FFh WMAC Configuration // //----------------------------------------------------- #define REG_MAC_CR_8812 0x0600 #define REG_MAC_TX_SM_STATE_8812 0x06B4 // Power #define REG_BFMER0_INFO_8812 0x06E4 #define REG_BFMER1_INFO_8812 0x06EC #define REG_CSI_RPT_PARAM_BW20_8812 0x06F4 #define REG_CSI_RPT_PARAM_BW40_8812 0x06F8 #define REG_CSI_RPT_PARAM_BW80_8812 0x06FC // Hardware Port 2 #define REG_BFMEE_SEL_8812 0x0714 #define REG_SND_PTCL_CTRL_8812 0x0718 //----------------------------------------------------- // // Redifine register definition for compatibility // //----------------------------------------------------- // TODO: use these definition when using REG_xxx naming rule. // NOTE: DO NOT Remove these definition. Use later. #define ISR_8812 REG_HISR0_8812 //---------------------------------------------------------------------------- // 8195 IMR/ISR bits (offset 0xB0, 8bits) //---------------------------------------------------------------------------- #define IMR_DISABLED_8812 0 // IMR DW0(0x00B0-00B3) Bit 0-31 #define IMR_TIMER2_8812 BIT31 // Timeout interrupt 2 #define IMR_TIMER1_8812 BIT30 // Timeout interrupt 1 #define IMR_PSTIMEOUT_8812 BIT29 // Power Save Time Out Interrupt #define IMR_GTINT4_8812 BIT28 // When GTIMER4 expires, this bit is set to 1 #define IMR_GTINT3_8812 BIT27 // When GTIMER3 expires, this bit is set to 1 #define IMR_TXBCN0ERR_8812 BIT26 // Transmit Beacon0 Error #define IMR_TXBCN0OK_8812 BIT25 // Transmit Beacon0 OK #define IMR_TSF_BIT32_TOGGLE_8812 BIT24 // TSF Timer BIT32 toggle indication interrupt #define IMR_BCNDMAINT0_8812 BIT20 // Beacon DMA Interrupt 0 #define IMR_BCNDERR0_8812 BIT16 // Beacon Queue DMA OK0 #define IMR_HSISR_IND_ON_INT_8812 BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) #define IMR_BCNDMAINT_E_8812 BIT14 // Beacon DMA Interrupt Extension for Win7 #define IMR_ATIMEND_8812 BIT12 // CTWidnow End or ATIM Window End #define IMR_C2HCMD_8812 BIT10 // CPU to Host Command INT Status, Write 1 clear #define IMR_CPWM2_8812 BIT9 // CPU power Mode exchange INT Status, Write 1 clear #define IMR_CPWM_8812 BIT8 // CPU power Mode exchange INT Status, Write 1 clear #define IMR_HIGHDOK_8812 BIT7 // High Queue DMA OK #define IMR_MGNTDOK_8812 BIT6 // Management Queue DMA OK #define IMR_BKDOK_8812 BIT5 // AC_BK DMA OK #define IMR_BEDOK_8812 BIT4 // AC_BE DMA OK #define IMR_VIDOK_8812 BIT3 // AC_VI DMA OK #define IMR_VODOK_8812 BIT2 // AC_VO DMA OK #define IMR_RDU_8812 BIT1 // Rx Descriptor Unavailable #define IMR_ROK_8812 BIT0 // Receive DMA OK // IMR DW1(0x00B4-00B7) Bit 0-31 #define IMR_BCNDMAINT7_8812 BIT27 // Beacon DMA Interrupt 7 #define IMR_BCNDMAINT6_8812 BIT26 // Beacon DMA Interrupt 6 #define IMR_BCNDMAINT5_8812 BIT25 // Beacon DMA Interrupt 5 #define IMR_BCNDMAINT4_8812 BIT24 // Beacon DMA Interrupt 4 #define IMR_BCNDMAINT3_8812 BIT23 // Beacon DMA Interrupt 3 #define IMR_BCNDMAINT2_8812 BIT22 // Beacon DMA Interrupt 2 #define IMR_BCNDMAINT1_8812 BIT21 // Beacon DMA Interrupt 1 #define IMR_BCNDOK7_8812 BIT20 // Beacon Queue DMA OK Interrup 7 #define IMR_BCNDOK6_8812 BIT19 // Beacon Queue DMA OK Interrup 6 #define IMR_BCNDOK5_8812 BIT18 // Beacon Queue DMA OK Interrup 5 #define IMR_BCNDOK4_8812 BIT17 // Beacon Queue DMA OK Interrup 4 #define IMR_BCNDOK3_8812 BIT16 // Beacon Queue DMA OK Interrup 3 #define IMR_BCNDOK2_8812 BIT15 // Beacon Queue DMA OK Interrup 2 #define IMR_BCNDOK1_8812 BIT14 // Beacon Queue DMA OK Interrup 1 #define IMR_ATIMEND_E_8812 BIT13 // ATIM Window End Extension for Win7 #define IMR_TXERR_8812 BIT11 // Tx Error Flag Interrupt Status, write 1 clear. #define IMR_RXERR_8812 BIT10 // Rx Error Flag INT Status, Write 1 clear #define IMR_TXFOVW_8812 BIT9 // Transmit FIFO Overflow #define IMR_RXFOVW_8812 BIT8 // Receive FIFO Overflow #ifdef CONFIG_PCI_HCI //#define IMR_RX_MASK (IMR_ROK_8812|IMR_RDU_8812|IMR_RXFOVW_8812) #define IMR_TX_MASK (IMR_VODOK_8812|IMR_VIDOK_8812|IMR_BEDOK_8812|IMR_BKDOK_8812|IMR_MGNTDOK_8812|IMR_HIGHDOK_8812) #define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8812 | IMR_TXBCN0OK_8812 | IMR_TXBCN0ERR_8812 | IMR_BCNDERR0_8812) #define RT_AC_INT_MASKS (IMR_VIDOK_8812 | IMR_VODOK_8812 | IMR_BEDOK_8812|IMR_BKDOK_8812) #endif //============================================================================ // Regsiter Bit and Content definition //============================================================================ //2 ACMHWCTRL 0x05C0 #define AcmHw_HwEn_8812 BIT(0) #define AcmHw_VoqEn_8812 BIT(1) #define AcmHw_ViqEn_8812 BIT(2) #define AcmHw_BeqEn_8812 BIT(3) #define AcmHw_VoqStatus_8812 BIT(5) #define AcmHw_ViqStatus_8812 BIT(6) #define AcmHw_BeqStatus_8812 BIT(7) //======================================================== // General definitions //======================================================== #define MACID_NUM_8812A 128 #define CAM_ENTRY_NUM_8812A 64 #endif /* __RTL8812A_SPEC_H__ */ #ifdef CONFIG_RTL8821A #include "rtl8821a_spec.h" #endif /* CONFIG_RTL8821A */ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8812a_sreset.h000066400000000000000000000022531261122257400221470ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTL88812A_SRESET_H_ #define _RTL8812A_SRESET_H_ #include #ifdef DBG_CONFIG_ERROR_DETECT extern void rtl8812_sreset_xmit_status_check(_adapter *padapter); extern void rtl8812_sreset_linked_status_check(_adapter *padapter); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8812a_xmit.h000066400000000000000000000366021261122257400216300ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8812A_XMIT_H__ #define __RTL8812A_XMIT_H__ //For 88e early mode #define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) #define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) #define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) #define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) #define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) #define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) #define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) // //defined for TX DESC Operation // #define MAX_TID (15) //OFFSET 0 #define OFFSET_SZ 0 #define OFFSET_SHT 16 #define BMC BIT(24) #define LSG BIT(26) #define FSG BIT(27) #define OWN BIT(31) //OFFSET 4 #define PKT_OFFSET_SZ 0 #define QSEL_SHT 8 #define RATE_ID_SHT 16 #define NAVUSEHDR BIT(20) #define SEC_TYPE_SHT 22 #define PKT_OFFSET_SHT 26 //OFFSET 8 #define AGG_EN BIT(12) #define AGG_BK BIT(16) #define AMPDU_DENSITY_SHT 20 #define ANTSEL_A BIT(24) #define ANTSEL_B BIT(25) #define TX_ANT_CCK_SHT 26 #define TX_ANTL_SHT 28 #define TX_ANT_HT_SHT 30 //OFFSET 12 #define SEQ_SHT 16 #define EN_HWSEQ BIT(31) //OFFSET 16 #define QOS BIT(6) #define HW_SSN BIT(7) #define USERATE BIT(8) #define DISDATAFB BIT(10) #define CTS_2_SELF BIT(11) #define RTS_EN BIT(12) #define HW_RTS_EN BIT(13) #define DATA_SHORT BIT(24) #define PWR_STATUS_SHT 15 #define DATA_SC_SHT 20 #define DATA_BW BIT(25) //OFFSET 20 #define RTY_LMT_EN BIT(17) //OFFSET 20 #define SGI BIT(6) #define USB_TXAGG_NUM_SHT 24 typedef struct txdescriptor_8812 { // Offset 0 u32 pktlen:16; u32 offset:8; u32 bmc:1; u32 htc:1; u32 ls:1; u32 fs:1; u32 linip:1; u32 noacm:1; u32 gf:1; u32 own:1; // Offset 4 u32 macid:6; u32 rsvd0406:2; u32 qsel:5; u32 rd_nav_ext:1; u32 lsig_txop_en:1; u32 pifs:1; u32 rate_id:4; u32 navusehdr:1; u32 en_desc_id:1; u32 sectype:2; u32 rsvd0424:2; u32 pkt_offset:5; // unit: 8 bytes u32 rsvd0431:1; // Offset 8 u32 rts_rc:6; u32 data_rc:6; u32 agg_en:1; u32 rd_en:1; u32 bar_rty_th:2; u32 bk:1; u32 morefrag:1; u32 raw:1; u32 ccx:1; u32 ampdu_density:3; u32 bt_null:1; u32 ant_sel_a:1; u32 ant_sel_b:1; u32 tx_ant_cck:2; u32 tx_antl:2; u32 tx_ant_ht:2; // Offset 12 u32 nextheadpage:8; u32 tailpage:8; u32 seq:12; u32 cpu_handle:1; u32 tag1:1; u32 trigger_int:1; u32 hwseq_en:1; // Offset 16 u32 rtsrate:5; u32 ap_dcfe:1; u32 hwseq_sel:2; u32 userate:1; u32 disrtsfb:1; u32 disdatafb:1; u32 cts2self:1; u32 rtsen:1; u32 hw_rts_en:1; u32 port_id:1; u32 pwr_status:3; u32 wait_dcts:1; u32 cts2ap_en:1; u32 data_sc:2; u32 data_stbc:2; u32 data_short:1; u32 data_bw:1; u32 rts_short:1; u32 rts_bw:1; u32 rts_sc:2; u32 vcs_stbc:2; // Offset 20 u32 datarate:6; u32 sgi:1; u32 try_rate:1; u32 data_ratefb_lmt:5; u32 rts_ratefb_lmt:4; u32 rty_lmt_en:1; u32 data_rt_lmt:6; u32 usb_txagg_num:8; // Offset 24 u32 txagg_a:5; u32 txagg_b:5; u32 use_max_len:1; u32 max_agg_num:5; u32 mcsg1_max_len:4; u32 mcsg2_max_len:4; u32 mcsg3_max_len:4; u32 mcs7_sgi_max_len:4; // Offset 28 u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB) u32 mcsg4_max_len:4; u32 mcsg5_max_len:4; u32 mcsg6_max_len:4; u32 mcs15_sgi_max_len:4; // Offset 32 u32 rsvd32; // Offset 36 u32 rsvd36; }TXDESC_8812, *PTXDESC_8812; // Dword 0 #define GET_TX_DESC_OWN_8812(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) #define SET_TX_DESC_PKT_SIZE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) #define SET_TX_DESC_OFFSET_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) #define SET_TX_DESC_BMC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) #define SET_TX_DESC_HTC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) #define SET_TX_DESC_LAST_SEG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) #define SET_TX_DESC_FIRST_SEG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) #define SET_TX_DESC_LINIP_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) #define SET_TX_DESC_NO_ACM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) #define SET_TX_DESC_GF_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) #define SET_TX_DESC_OWN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) // Dword 1 #define SET_TX_DESC_MACID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) #define SET_TX_DESC_QUEUE_SEL_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) #define SET_TX_DESC_RDG_NAV_EXT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) #define SET_TX_DESC_LSIG_TXOP_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) #define SET_TX_DESC_PIFS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) #define SET_TX_DESC_RATE_ID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) #define SET_TX_DESC_EN_DESC_ID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) #define SET_TX_DESC_SEC_TYPE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) #define SET_TX_DESC_PKT_OFFSET_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) // Dword 2 #define SET_TX_DESC_PAID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) #define SET_TX_DESC_CCA_RTS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) #define SET_TX_DESC_AGG_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) #define SET_TX_DESC_RDG_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) #define SET_TX_DESC_AGG_BREAK_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) #define SET_TX_DESC_MORE_FRAG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) #define SET_TX_DESC_RAW_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) #define SET_TX_DESC_SPE_RPT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) #define SET_TX_DESC_AMPDU_DENSITY_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) #define SET_TX_DESC_BT_INT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) #define SET_TX_DESC_GID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) // Dword 3 #define SET_TX_DESC_WHEADER_LEN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) #define SET_TX_DESC_CHK_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) #define SET_TX_DESC_EARLY_MODE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) #define SET_TX_DESC_HWSEQ_SEL_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) #define SET_TX_DESC_USE_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) #define SET_TX_DESC_DISABLE_RTS_FB_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) #define SET_TX_DESC_DISABLE_FB_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) #define SET_TX_DESC_CTS2SELF_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) #define SET_TX_DESC_RTS_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) #define SET_TX_DESC_HW_RTS_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) #define SET_TX_DESC_NAV_USE_HDR_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) #define SET_TX_DESC_USE_MAX_LEN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) #define SET_TX_DESC_MAX_AGG_NUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) #define SET_TX_DESC_NDPA_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) #define SET_TX_DESC_AMPDU_MAX_TIME_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) // Dword 4 #define SET_TX_DESC_TX_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) #define SET_TX_DESC_DATA_RATE_FB_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) #define SET_TX_DESC_RTS_RATE_FB_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) #define SET_TX_DESC_RETRY_LIMIT_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) #define SET_TX_DESC_DATA_RETRY_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) #define SET_TX_DESC_RTS_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) // Dword 5 #define SET_TX_DESC_DATA_SC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) #define SET_TX_DESC_DATA_SHORT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) #define SET_TX_DESC_DATA_BW_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) #define SET_TX_DESC_DATA_LDPC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) #define SET_TX_DESC_DATA_STBC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) #define SET_TX_DESC_CTROL_STBC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) #define SET_TX_DESC_RTS_SHORT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) #define SET_TX_DESC_RTS_SC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) #define SET_TX_DESC_TX_ANT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) // Dword 6 #define SET_TX_DESC_SW_DEFINE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) #define SET_TX_DESC_ANTSEL_A_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) #define SET_TX_DESC_ANTSEL_B_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) #define SET_TX_DESC_ANTSEL_C_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) #define SET_TX_DESC_ANTSEL_D_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) #define SET_TX_DESC_MBSSID_8821(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) // Dword 7 #define SET_TX_DESC_TX_BUFFER_SIZE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) #define SET_TX_DESC_TX_DESC_CHECKSUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) #define SET_TX_DESC_USB_TXAGG_NUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) #ifdef CONFIG_SDIO_HCI #define SET_TX_DESC_SDIO_TXSEQ_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) #endif // Dword 8 #define SET_TX_DESC_HWSEQ_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) // Dword 9 #define SET_TX_DESC_SEQ_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) // Dword 10 #define SET_TX_DESC_TX_BUFFER_ADDRESS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) #define GET_TX_DESC_TX_BUFFER_ADDRESS_8812(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) // Dword 11 #define SET_TX_DESC_NEXT_DESC_ADDRESS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) #define SET_EARLYMODE_PKTNUM_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) #define SET_EARLYMODE_LEN0_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) #define SET_EARLYMODE_LEN1_1_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) #define SET_EARLYMODE_LEN1_2_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) #define SET_EARLYMODE_LEN2_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) #define SET_EARLYMODE_LEN3_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) #ifdef CONFIG_TX_EARLY_MODE #define USB_DUMMY_OFFSET 2 #else #define USB_DUMMY_OFFSET 1 #endif #define USB_DUMMY_LENGTH (USB_DUMMY_OFFSET * PACKET_OFFSET_SZ) void rtl8812a_cal_txdesc_chksum(u8 *ptxdesc); void rtl8812a_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull, u8 bDataFrame); void rtl8812a_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc); void rtl8812a_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); void rtl8812a_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); #ifdef CONFIG_USB_HCI s32 rtl8812au_init_xmit_priv(PADAPTER padapter); void rtl8812au_free_xmit_priv(PADAPTER padapter); s32 rtl8812au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); s32 rtl8812au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); s32 rtl8812au_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); void rtl8812au_xmit_tasklet(void *priv); s32 rtl8812au_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); #endif #ifdef CONFIG_PCI_HCI s32 rtl8812ae_init_xmit_priv(PADAPTER padapter); void rtl8812ae_free_xmit_priv(PADAPTER padapter); struct xmit_buf *rtl8812ae_dequeue_xmitbuf(struct rtw_tx_ring *ring); void rtl8812ae_xmitframe_resume(_adapter *padapter); s32 rtl8812ae_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); s32 rtl8812ae_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); s32 rtl8812ae_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); void rtl8812ae_xmit_tasklet(void *priv); #endif #ifdef CONFIG_TX_EARLY_MODE void UpdateEarlyModeInfo8812(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ); #endif void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,u8 *ptxdesc); u8 BWMapping_8812(PADAPTER Adapter, struct pkt_attrib *pattrib); u8 SCMapping_8812(PADAPTER Adapter, struct pkt_attrib *pattrib); #endif //__RTL8812_XMIT_H__ #ifdef CONFIG_RTL8821A #include "rtl8821a_xmit.h" #endif // CONFIG_RTL8821A rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8821a_spec.h000066400000000000000000000074421261122257400216010ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * *******************************************************************************/ #ifndef __RTL8821A_SPEC_H__ #define __RTL8821A_SPEC_H__ #include // This file should based on "hal_com_reg.h" #include // Because 8812a and 8821a is the same serial, // most of 8821a register definitions are the same as 8812a. #include //============================================================ // 8821A Regsiter offset definition //============================================================ //============================================================ // MAC register //============================================================ //----------------------------------------------------- // 0x0000h ~ 0x00FFh System Configuration //----------------------------------------------------- //----------------------------------------------------- // 0x0100h ~ 0x01FFh MACTOP General Configuration //----------------------------------------------------- //----------------------------------------------------- // 0x0200h ~ 0x027Fh TXDMA Configuration //----------------------------------------------------- //----------------------------------------------------- // 0x0280h ~ 0x02FFh RXDMA Configuration //----------------------------------------------------- //----------------------------------------------------- // 0x0300h ~ 0x03FFh PCIe //----------------------------------------------------- //----------------------------------------------------- // 0x0400h ~ 0x047Fh Protocol Configuration //----------------------------------------------------- //----------------------------------------------------- // 0x0500h ~ 0x05FFh EDCA Configuration //----------------------------------------------------- //----------------------------------------------------- // 0x0600h ~ 0x07FFh WMAC Configuration //----------------------------------------------------- //============================================================ // SDIO Bus Specification //============================================================ //----------------------------------------------------- // SDIO CMD Address Mapping //----------------------------------------------------- //----------------------------------------------------- // I/O bus domain (Host) //----------------------------------------------------- //----------------------------------------------------- // SDIO register //----------------------------------------------------- #undef SDIO_REG_HCPWM1 #define SDIO_REG_FREE_TXPG2 0x024 #define SDIO_REG_HCPWM1 0x025 //============================================================ // Regsiter Bit and Content definition //============================================================ //======================================================== // General definitions //======================================================== #define MACID_NUM_8821A 128 #define CAM_ENTRY_NUM_8821A 64 #endif /* __RTL8821A_SPEC_H__ */ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtl8821a_xmit.h000066400000000000000000000110041261122257400216150ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTL8821A_XMIT_H__ #define __RTL8821A_XMIT_H__ #include typedef struct txdescriptor_8821a { // Offset 0 u32 pktlen:16; u32 offset:8; u32 bmc:1; u32 htc:1; u32 rsvd0026:1; u32 rsvd0027:1; u32 linip:1; u32 noacm:1; u32 gf:1; u32 rsvd0031:1; // Offset 4 u32 macid:7; u32 rsvd0407:1; u32 qsel:5; u32 rdg_nav_ext:1; u32 lsig_txop_en:1; u32 pifs:1; u32 rate_id:5; u32 en_desc_id:1; u32 sectype:2; u32 pkt_offset:5; // unit: 8 bytes u32 moredata:1; u32 txop_ps_cap:1; u32 txop_ps_mode:1; // Offset 8 u32 p_aid:9; u32 rsvd0809:1; u32 cca_rts:2; u32 agg_en:1; u32 rdg_en:1; u32 null_0:1; u32 null_1:1; u32 bk:1; u32 morefrag:1; u32 raw:1; u32 spe_rpt:1; u32 ampdu_density:3; u32 bt_null:1; u32 g_id:6; u32 rsvd0830:2; // Offset 12 u32 wheader_len:4; u32 chk_en:1; u32 early_rate:1; u32 hw_ssn_sel:2; u32 userate:1; u32 disrtsfb:1; u32 disdatafb:1; u32 cts2self:1; u32 rtsen:1; u32 hw_rts_en:1; u32 port_id:1; u32 navusehdr:1; u32 use_max_len:1; u32 max_agg_num:5; u32 ndpa:2; u32 ampdu_max_time:8; // Offset 16 u32 datarate:7; u32 try_rate:1; u32 data_ratefb_lmt:5; u32 rts_ratefb_lmt:4; u32 rty_lmt_en:1; u32 data_rt_lmt:6; u32 rtsrate:5; u32 pcts_en:1; u32 pcts_mask_idx:2; // Offset 20 u32 data_sc:4; u32 data_short:1; u32 data_bw:2; u32 data_ldpc:1; u32 data_stbc:2; u32 vcs_stbc:2; u32 rts_short:1; u32 rts_sc:4; u32 rsvd2016:7; u32 tx_ant:4; u32 txpwr_offset:3; u32 rsvd2031:1; // Offset 24 u32 sw_define:12; u32 mbssid:4; u32 antsel_A:3; u32 antsel_B:3; u32 antsel_C:3; u32 antsel_D:3; u32 rsvd2428:4; // Offset 28 u32 checksum:16; u32 rsvd2816:8; u32 usb_txagg_num:8; // Offset 32 u32 rts_rc:6; u32 bar_rty_th:2; u32 data_rc:6; u32 rsvd3214:1; u32 en_hwseq:1; u32 nextneadpage:8; u32 tailpage:8; // Offset 36 u32 padding_len:11; u32 txbf_path:1; u32 seq:12; u32 final_data_rate:8; }TXDESC_8821A, *PTXDESC_8821A; #ifdef CONFIG_SDIO_HCI s32 InitXmitPriv8821AS(PADAPTER padapter); void FreeXmitPriv8821AS(PADAPTER padapter); s32 XmitBufHandler8821AS(PADAPTER padapter); s32 MgntXmit8821AS(PADAPTER padapter, struct xmit_frame *pmgntframe); s32 HalXmitNoLock8821AS(PADAPTER padapter, struct xmit_frame *pxmitframe); s32 HalXmit8821AS(PADAPTER padapter, struct xmit_frame *pxmitframe); #ifndef CONFIG_SDIO_TX_TASKLET thread_return XmitThread8821AS(thread_context context); #endif // !CONFIG_SDIO_TX_TASKLET #endif // CONFIG_SDIO_HCI #if 0 #ifdef CONFIG_USB_HCI s32 rtl8821au_init_xmit_priv(PADAPTER padapter); void rtl8821au_free_xmit_priv(PADAPTER padapter); s32 rtl8821au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); s32 rtl8821au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); s32 rtl8821au_hal_xmitframe_enqueue(PADAPTER padapter, struct xmit_frame *pxmitframe); s32 rtl8821au_xmit_buf_handler(PADAPTER padapter); void rtl8821au_xmit_tasklet(void *priv); s32 rtl8821au_xmitframe_complete(PADAPTER padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); #endif // CONFIG_USB_HCI #ifdef CONFIG_PCI_HCI s32 rtl8821e_init_xmit_priv(PADAPTER padapter); void rtl8821e_free_xmit_priv(PADAPTER padapter); struct xmit_buf* rtl8821e_dequeue_xmitbuf(struct rtw_tx_ring *ring); void rtl8821e_xmitframe_resume(PADAPTER padapter); s32 rtl8821e_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); s32 rtl8821e_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); void rtl8821e_xmit_tasklet(void *priv); #endif // CONFIG_PCI_HCI #endif #endif //__RTL8821_XMIT_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_android.h000066400000000000000000000065351261122257400216200ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_ANDROID_H__ #define __RTW_ANDROID_H__ enum ANDROID_WIFI_CMD { ANDROID_WIFI_CMD_START, ANDROID_WIFI_CMD_STOP, ANDROID_WIFI_CMD_SCAN_ACTIVE, ANDROID_WIFI_CMD_SCAN_PASSIVE, ANDROID_WIFI_CMD_RSSI, ANDROID_WIFI_CMD_LINKSPEED, ANDROID_WIFI_CMD_RXFILTER_START, ANDROID_WIFI_CMD_RXFILTER_STOP, ANDROID_WIFI_CMD_RXFILTER_ADD, ANDROID_WIFI_CMD_RXFILTER_REMOVE, ANDROID_WIFI_CMD_BTCOEXSCAN_START, ANDROID_WIFI_CMD_BTCOEXSCAN_STOP, ANDROID_WIFI_CMD_BTCOEXMODE, ANDROID_WIFI_CMD_SETSUSPENDOPT, ANDROID_WIFI_CMD_P2P_DEV_ADDR, ANDROID_WIFI_CMD_SETFWPATH, ANDROID_WIFI_CMD_SETBAND, ANDROID_WIFI_CMD_GETBAND, ANDROID_WIFI_CMD_COUNTRY, ANDROID_WIFI_CMD_P2P_SET_NOA, ANDROID_WIFI_CMD_P2P_GET_NOA, ANDROID_WIFI_CMD_P2P_SET_PS, ANDROID_WIFI_CMD_SET_AP_WPS_P2P_IE, ANDROID_WIFI_CMD_MIRACAST, #ifdef CONFIG_PNO_SUPPORT ANDROID_WIFI_CMD_PNOSSIDCLR_SET, ANDROID_WIFI_CMD_PNOSETUP_SET, ANDROID_WIFI_CMD_PNOENABLE_SET, ANDROID_WIFI_CMD_PNODEBUG_SET, #endif ANDROID_WIFI_CMD_MACADDR, ANDROID_WIFI_CMD_BLOCK, ANDROID_WIFI_CMD_WFD_ENABLE, ANDROID_WIFI_CMD_WFD_DISABLE, ANDROID_WIFI_CMD_WFD_SET_TCPPORT, ANDROID_WIFI_CMD_WFD_SET_MAX_TPUT, ANDROID_WIFI_CMD_WFD_SET_DEVTYPE, ANDROID_WIFI_CMD_CHANGE_DTIM, ANDROID_WIFI_CMD_HOSTAPD_SET_MACADDR_ACL, ANDROID_WIFI_CMD_HOSTAPD_ACL_ADD_STA, ANDROID_WIFI_CMD_HOSTAPD_ACL_REMOVE_STA, #ifdef CONFIG_GTK_OL ANDROID_WIFI_CMD_GTK_REKEY_OFFLOAD, #endif //CONFIG_GTK_OL ANDROID_WIFI_CMD_P2P_DISABLE, ANDROID_WIFI_CMD_MAX }; int rtw_android_cmdstr_to_num(char *cmdstr); int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd); #if defined(CONFIG_PNO_SUPPORT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) int rtw_android_pno_enable(struct net_device *net, int pno_enable); int rtw_android_cfg80211_pno_setup(struct net_device *net, struct cfg80211_ssid *ssid, int n_ssids, int interval); #endif #if defined(RTW_ENABLE_WIFI_CONTROL_FUNC) int rtw_android_wifictrl_func_add(void); void rtw_android_wifictrl_func_del(void); void* wl_android_prealloc(int section, unsigned long size); int wifi_get_irq_number(unsigned long *irq_flags_ptr); int wifi_set_power(int on, unsigned long msec); int wifi_get_mac_addr(unsigned char *buf); void *wifi_get_country_code(char *ccode); #else static int rtw_android_wifictrl_func_add(void) { return 0; } static void rtw_android_wifictrl_func_del(void) {} #endif /* defined(RTW_ENABLE_WIFI_CONTROL_FUNC) */ #endif //__RTW_ANDROID_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_ap.h000066400000000000000000000067041261122257400205760ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_AP_H_ #define __RTW_AP_H_ #ifdef CONFIG_AP_MODE //external function extern void rtw_indicate_sta_assoc_event(_adapter *padapter, struct sta_info *psta); extern void rtw_indicate_sta_disassoc_event(_adapter *padapter, struct sta_info *psta); void init_mlme_ap_info(_adapter *padapter); void free_mlme_ap_info(_adapter *padapter); //void update_BCNTIM(_adapter *padapter); void rtw_add_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index, u8 *data, u8 len); void rtw_remove_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index); void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, const char *tag); #define update_beacon(adapter, ie_id, oui, tx) _update_beacon((adapter), (ie_id), (oui), (tx), __func__) void add_RATid(_adapter *padapter, struct sta_info *psta, u8 rssi_level); void expire_timeout_chk(_adapter *padapter); void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta); void start_bss_network(_adapter *padapter, u8 *pbuf); int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len); void rtw_ap_restore_network(_adapter *padapter); void rtw_set_macaddr_acl(_adapter *padapter, int mode); int rtw_acl_add_sta(_adapter *padapter, u8 *addr); int rtw_acl_remove_sta(_adapter *padapter, u8 *addr); u8 rtw_ap_set_pairwise_key(_adapter *padapter, struct sta_info *psta); int rtw_ap_set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid); int rtw_ap_set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid, u8 set_tx); #ifdef CONFIG_NATIVEAP_MLME void associated_clients_update(_adapter *padapter, u8 updated); void bss_cap_update_on_sta_join(_adapter *padapter, struct sta_info *psta); u8 bss_cap_update_on_sta_leave(_adapter *padapter, struct sta_info *psta); void sta_info_update(_adapter *padapter, struct sta_info *psta); void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta); u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reason); int rtw_sta_flush(_adapter *padapter); int rtw_ap_inform_ch_switch(_adapter *padapter, u8 new_ch, u8 ch_offset); void start_ap_mode(_adapter *padapter); void stop_ap_mode(_adapter *padapter); #endif #ifdef CONFIG_CONCURRENT_MODE void concurrent_set_ap_chbw(_adapter *padapter, u8 channel, u8 channel_offset, u8 bwmode); #endif //CONFIG_CONCURRENT_MODE #ifdef CONFIG_AUTO_AP_MODE extern void rtw_start_auto_ap(_adapter *adapter); #endif //CONFIG_AUTO_AP_MODE #endif //end of CONFIG_AP_MODE #endif void update_bmc_sta(_adapter *padapter); rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_beamforming.h000066400000000000000000000111141261122257400224530ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_BEAMFORMING_H_ #define __RTW_BEAMFORMING_H_ #define BEAMFORMING_ENTRY_NUM 2 #define GET_BEAMFORM_INFO(_pmlmepriv) ((struct beamforming_info *)(&(_pmlmepriv)->beamforming_info)) typedef enum _BEAMFORMING_ENTRY_STATE { BEAMFORMING_ENTRY_STATE_UNINITIALIZE, BEAMFORMING_ENTRY_STATE_INITIALIZEING, BEAMFORMING_ENTRY_STATE_INITIALIZED, BEAMFORMING_ENTRY_STATE_PROGRESSING, BEAMFORMING_ENTRY_STATE_PROGRESSED, }BEAMFORMING_ENTRY_STATE, *PBEAMFORMING_ENTRY_STATE; typedef enum _BEAMFORMING_STATE { BEAMFORMING_STATE_IDLE, BEAMFORMING_STATE_START, BEAMFORMING_STATE_END, }BEAMFORMING_STATE, *PBEAMFORMING_STATE; typedef enum _BEAMFORMING_CAP { BEAMFORMING_CAP_NONE = 0x0, BEAMFORMER_CAP_HT_EXPLICIT = 0x1, BEAMFORMEE_CAP_HT_EXPLICIT = 0x2, BEAMFORMER_CAP_VHT_SU = 0x4, // Self has er Cap, because Reg er & peer ee BEAMFORMEE_CAP_VHT_SU = 0x8, // Self has ee Cap, because Reg ee & peer er BEAMFORMER_CAP = 0x10, BEAMFORMEE_CAP = 0x20, }BEAMFORMING_CAP, *PBEAMFORMING_CAP; typedef enum _SOUNDING_MODE { SOUNDING_SW_VHT_TIMER = 0x0, SOUNDING_SW_HT_TIMER = 0x1, SOUNDING_STOP_All_TIMER = 0x2, SOUNDING_HW_VHT_TIMER = 0x3, SOUNDING_HW_HT_TIMER = 0x4, SOUNDING_STOP_OID_TIMER = 0x5, SOUNDING_AUTO_VHT_TIMER = 0x6, SOUNDING_AUTO_HT_TIMER = 0x7, SOUNDING_FW_VHT_TIMER = 0x8, SOUNDING_FW_HT_TIMER = 0x9, }SOUNDING_MODE, *PSOUNDING_MODE; enum BEAMFORMING_CTRL_TYPE { BEAMFORMING_CTRL_ENTER = 0, BEAMFORMING_CTRL_LEAVE = 1, BEAMFORMING_CTRL_START_PERIOD = 2, BEAMFORMING_CTRL_END_PERIOD = 3, BEAMFORMING_CTRL_SOUNDING_FAIL=4, BEAMFORMING_CTRL_SOUNDING_CLK=5, }; struct beamforming_entry { BOOLEAN bUsed; BOOLEAN bSound; u16 aid; // Used to construct AID field of NDPA packet. u16 mac_id; // Used to Set Reg42C in IBSS mode. u16 p_aid; // Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. u8 mac_addr[6];// Used to fill Reg6E4 to fill Mac address of CSI report frame. CHANNEL_WIDTH sound_bw; // Sounding BandWidth u16 sound_period; BEAMFORMING_CAP beamforming_entry_cap; BEAMFORMING_ENTRY_STATE beamforming_entry_state; u8 LogSeq; u8 LogRetryCnt; u8 LogSuccessCnt; u8 LogStatusFailCnt; u8 PreCsiReport[327]; u8 DefaultCsiCnt; BOOLEAN bDefaultCSI; }; struct sounding_info { u8 sound_idx; CHANNEL_WIDTH sound_bw; SOUNDING_MODE sound_mode; u16 sound_period; }; struct beamforming_info { BEAMFORMING_CAP beamforming_cap; BEAMFORMING_STATE beamforming_state; struct beamforming_entry beamforming_entry[BEAMFORMING_ENTRY_NUM]; u8 beamforming_cur_idx; u8 beamforming_in_progress; u8 sounding_sequence; struct sounding_info sounding_info; }; struct rtw_ndpa_sta_info { u16 aid:12; u16 feedback_type:1; u16 nc_index:3; }; BEAMFORMING_CAP beamforming_get_entry_beam_cap_by_mac_id(PVOID pmlmepriv ,u8 mac_id); void beamforming_notify(PADAPTER adapter); BEAMFORMING_CAP beamforming_get_beamform_cap(struct beamforming_info *pBeamInfo); u32 beamforming_get_report_frame(PADAPTER Adapter, union recv_frame *precv_frame); void beamforming_get_ndpa_frame(PADAPTER Adapter, union recv_frame *precv_frame); BOOLEAN beamforming_send_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx); BOOLEAN beamforming_send_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH bw, u8 qidx); void beamforming_check_sounding_success(PADAPTER Adapter,BOOLEAN status); void beamforming_watchdog(PADAPTER Adapter); void beamforming_wk_hdl(_adapter *padapter, u8 type, u8 *pbuf); u8 beamforming_wk_cmd(_adapter*padapter, s32 type, u8 *pbuf, s32 size, u8 enqueue); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_br_ext.h000066400000000000000000000043321261122257400214540ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTW_BR_EXT_H_ #define _RTW_BR_EXT_H_ #if 1 // rtw_wifi_driver #define CL_IPV6_PASS 1 #define MACADDRLEN 6 #define _DEBUG_ERR DBG_8192C #define _DEBUG_INFO //DBG_8192C #define DEBUG_WARN DBG_8192C #define DEBUG_INFO //DBG_8192C #define DEBUG_ERR DBG_8192C //#define GET_MY_HWADDR ((GET_MIB(priv))->dot11OperationEntry.hwaddr) #define GET_MY_HWADDR(padapter) ((padapter)->eeprompriv.mac_addr) #endif // rtw_wifi_driver #define NAT25_HASH_BITS 4 #define NAT25_HASH_SIZE (1 << NAT25_HASH_BITS) #define NAT25_AGEING_TIME 300 #ifdef CL_IPV6_PASS #define MAX_NETWORK_ADDR_LEN 17 #else #define MAX_NETWORK_ADDR_LEN 11 #endif struct nat25_network_db_entry { struct nat25_network_db_entry *next_hash; struct nat25_network_db_entry **pprev_hash; atomic_t use_count; unsigned char macAddr[6]; unsigned long ageing_timer; unsigned char networkAddr[MAX_NETWORK_ADDR_LEN]; }; enum NAT25_METHOD { NAT25_MIN, NAT25_CHECK, NAT25_INSERT, NAT25_LOOKUP, NAT25_PARSE, NAT25_MAX }; struct br_ext_info { unsigned int nat25_disable; unsigned int macclone_enable; unsigned int dhcp_bcst_disable; int addPPPoETag; // 1: Add PPPoE relay-SID, 0: disable unsigned char nat25_dmzMac[MACADDRLEN]; unsigned int nat25sc_disable; }; void nat25_db_cleanup(_adapter *priv); #endif // _RTW_BR_EXT_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_bt_mp.h000066400000000000000000000234561261122257400213020ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_BT_MP_H #define __RTW_BT_MP_H #if(MP_DRIVER == 1) #pragma pack(1) // definition for BT_UP_OP_BT_READY #define MP_BT_NOT_READY 0 #define MP_BT_READY 1 // definition for BT_UP_OP_BT_SET_MODE typedef enum _MP_BT_MODE{ MP_BT_MODE_RF_TXRX_TEST_MODE = 0, MP_BT_MODE_BT20_DUT_TEST_MODE = 1, MP_BT_MODE_BT40_DIRECT_TEST_MODE = 2, MP_BT_MODE_CONNECT_TEST_MODE = 3, MP_BT_MODE_MAX }MP_BT_MODE,*PMP_BT_MODE; // definition for BT_UP_OP_BT_SET_TX_RX_PARAMETER typedef struct _BT_TXRX_PARAMETERS{ u1Byte txrxChannel; u4Byte txrxTxPktCnt; u1Byte txrxTxPktInterval; u1Byte txrxPayloadType; u1Byte txrxPktType; u2Byte txrxPayloadLen; u4Byte txrxPktHeader; u1Byte txrxWhitenCoeff; u1Byte txrxBdaddr[6]; u1Byte txrxTxGainIndex; } BT_TXRX_PARAMETERS, *PBT_TXRX_PARAMETERS; // txrxPktType typedef enum _MP_BT_PKT_TYPE{ MP_BT_PKT_DH1 = 0, MP_BT_PKT_DH3 = 1, MP_BT_PKT_DH5 = 2, MP_BT_PKT_2DH1 = 3, MP_BT_PKT_2DH3 = 4, MP_BT_PKT_2DH5 = 5, MP_BT_PKT_3DH1 = 6, MP_BT_PKT_3DH3 = 7, MP_BT_PKT_3DH5 = 8, MP_BT_PKT_LE = 9, MP_BT_PKT_MAX }MP_BT_PKT_TYPE,*PMP_BT_PKT_TYPE; // txrxPayloadType typedef enum _MP_BT_PAYLOAD_TYPE{ MP_BT_PAYLOAD_01010101 = 0, MP_BT_PAYLOAD_ALL_1 = 1, MP_BT_PAYLOAD_ALL_0 = 2, MP_BT_PAYLOAD_11110000 = 3, MP_BT_PAYLOAD_PRBS9 = 4, MP_BT_PAYLOAD_MAX = 8, }MP_BT_PAYLOAD_TYPE,*PMP_BT_PAYLOAD_TYPE; // definition for BT_UP_OP_BT_TEST_CTRL typedef enum _MP_BT_TEST_CTRL{ MP_BT_TEST_STOP_ALL_TESTS = 0, MP_BT_TEST_START_RX_TEST = 1, MP_BT_TEST_START_PACKET_TX_TEST = 2, MP_BT_TEST_START_CONTINUOUS_TX_TEST = 3, MP_BT_TEST_START_INQUIRY_SCAN_TEST = 4, MP_BT_TEST_START_PAGE_SCAN_TEST = 5, MP_BT_TEST_START_INQUIRY_PAGE_SCAN_TEST = 6, MP_BT_TEST_START_LEGACY_CONNECT_TEST = 7, MP_BT_TEST_START_LE_CONNECT_TEST_INITIATOR = 8, MP_BT_TEST_START_LE_CONNECT_TEST_ADVERTISER = 9, MP_BT_TEST_MAX }MP_BT_TEST_CTRL,*PMP_BT_TEST_CTRL; typedef enum _RTL_EXT_C2H_EVT { EXT_C2H_WIFI_FW_ACTIVE_RSP = 0, EXT_C2H_TRIG_BY_BT_FW = 1, MAX_EXT_C2HEVENT }RTL_EXT_C2H_EVT; // return status definition to the user layer typedef enum _BT_CTRL_STATUS{ BT_STATUS_SUCCESS = 0x00, // Success BT_STATUS_BT_OP_SUCCESS = 0x01, // bt fw op execution success BT_STATUS_H2C_SUCCESS = 0x02, // H2c success BT_STATUS_H2C_TIMTOUT = 0x03, // H2c timeout BT_STATUS_H2C_BT_NO_RSP = 0x04, // H2c sent, bt no rsp BT_STATUS_C2H_SUCCESS = 0x05, // C2h success BT_STATUS_C2H_REQNUM_MISMATCH = 0x06, // bt fw wrong rsp BT_STATUS_OPCODE_U_VERSION_MISMATCH = 0x07, // Upper layer OP code version mismatch. BT_STATUS_OPCODE_L_VERSION_MISMATCH = 0x08, // Lower layer OP code version mismatch. BT_STATUS_UNKNOWN_OPCODE_U = 0x09, // Unknown Upper layer OP code BT_STATUS_UNKNOWN_OPCODE_L = 0x0a, // Unknown Lower layer OP code BT_STATUS_PARAMETER_FORMAT_ERROR_U = 0x0b, // Wrong parameters sent by upper layer. BT_STATUS_PARAMETER_FORMAT_ERROR_L = 0x0c, // bt fw parameter format is not consistency BT_STATUS_PARAMETER_OUT_OF_RANGE_U = 0x0d, // uppery layer parameter value is out of range BT_STATUS_PARAMETER_OUT_OF_RANGE_L = 0x0e, // bt fw parameter value is out of range BT_STATUS_UNKNOWN_STATUS_L = 0x0f, // bt returned an defined status code BT_STATUS_UNKNOWN_STATUS_H = 0x10, // driver need to do error handle or not handle-well. BT_STATUS_WRONG_LEVEL = 0x11, // should be under passive level BT_STATUS_MAX }BT_CTRL_STATUS,*PBT_CTRL_STATUS; // OP codes definition between the user layer and driver typedef enum _BT_CTRL_OPCODE_UPPER{ BT_UP_OP_BT_READY = 0x00, BT_UP_OP_BT_SET_MODE = 0x01, BT_UP_OP_BT_SET_TX_RX_PARAMETER = 0x02, BT_UP_OP_BT_SET_GENERAL = 0x03, BT_UP_OP_BT_GET_GENERAL = 0x04, BT_UP_OP_BT_TEST_CTRL = 0x05, BT_UP_OP_TEST_BT = 0x06, BT_UP_OP_MAX }BT_CTRL_OPCODE_UPPER,*PBT_CTRL_OPCODE_UPPER; typedef enum _BT_SET_GENERAL{ BT_GSET_REG = 0x00, BT_GSET_RESET = 0x01, BT_GSET_TARGET_BD_ADDR = 0x02, BT_GSET_TX_PWR_FINETUNE = 0x03, BT_SET_TRACKING_INTERVAL = 0x04, BT_SET_THERMAL_METER = 0x05, BT_ENABLE_CFO_TRACKING = 0x06, BT_GSET_UPDATE_BT_PATCH = 0x07, BT_GSET_MAX }BT_SET_GENERAL,*PBT_SET_GENERAL; typedef enum _BT_GET_GENERAL{ BT_GGET_REG = 0x00, BT_GGET_STATUS = 0x01, BT_GGET_REPORT = 0x02, BT_GGET_AFH_MAP = 0x03, BT_GGET_AFH_STATUS = 0x04, BT_GGET_MAX }BT_GET_GENERAL,*PBT_GET_GENERAL; // definition for BT_UP_OP_BT_SET_GENERAL typedef enum _BT_REG_TYPE{ BT_REG_RF = 0, BT_REG_MODEM = 1, BT_REG_BLUEWIZE = 2, BT_REG_VENDOR = 3, BT_REG_LE = 4, BT_REG_MAX }BT_REG_TYPE,*PBT_REG_TYPE; // definition for BT_LO_OP_GET_AFH_MAP typedef enum _BT_AFH_MAP_TYPE{ BT_AFH_MAP_RESULT = 0, BT_AFH_MAP_WIFI_PSD_ONLY = 1, BT_AFH_MAP_WIFI_CH_BW_ONLY = 2, BT_AFH_MAP_BT_PSD_ONLY = 3, BT_AFH_MAP_HOST_CLASSIFICATION_ONLY = 4, BT_AFH_MAP_MAX }BT_AFH_MAP_TYPE,*PBT_AFH_MAP_TYPE; // definition for BT_UP_OP_BT_GET_GENERAL typedef enum _BT_REPORT_TYPE{ BT_REPORT_RX_PACKET_CNT = 0, BT_REPORT_RX_ERROR_BITS = 1, BT_REPORT_RSSI = 2, BT_REPORT_CFO_HDR_QUALITY = 3, BT_REPORT_CONNECT_TARGET_BD_ADDR = 4, BT_REPORT_MAX }BT_REPORT_TYPE,*PBT_REPORT_TYPE; VOID MPTBT_Test( IN PADAPTER Adapter, IN u1Byte opCode, IN u1Byte byte1, IN u1Byte byte2, IN u1Byte byte3 ); NDIS_STATUS MPTBT_SendOidBT( IN PADAPTER pAdapter, IN PVOID InformationBuffer, IN ULONG InformationBufferLength, OUT PULONG BytesRead, OUT PULONG BytesNeeded ); VOID MPTBT_FwC2hBtMpCtrl( PADAPTER Adapter, pu1Byte tmpBuf, u1Byte length ); void MPh2c_timeout_handle(void *FunctionContext); VOID mptbt_BtControlProcess( PADAPTER Adapter, PVOID pInBuf ); #define BT_H2C_MAX_RETRY 1 #define BT_MAX_C2H_LEN 20 typedef struct _BT_REQ_CMD{ UCHAR opCodeVer; UCHAR OpCode; USHORT paraLength; UCHAR pParamStart[100]; } BT_REQ_CMD, *PBT_REQ_CMD; typedef struct _BT_RSP_CMD{ USHORT status; USHORT paraLength; UCHAR pParamStart[100]; } BT_RSP_CMD, *PBT_RSP_CMD; typedef struct _BT_H2C{ u1Byte opCodeVer:4; u1Byte reqNum:4; u1Byte opCode; u1Byte buf[100]; }BT_H2C, *PBT_H2C; typedef struct _BT_EXT_C2H{ u1Byte extendId; u1Byte statusCode:4; u1Byte retLen:4; u1Byte opCodeVer:4; u1Byte reqNum:4; u1Byte buf[100]; }BT_EXT_C2H, *PBT_EXT_C2H; typedef enum _BT_OPCODE_STATUS{ BT_OP_STATUS_SUCCESS = 0x00, // Success BT_OP_STATUS_VERSION_MISMATCH = 0x01, BT_OP_STATUS_UNKNOWN_OPCODE = 0x02, BT_OP_STATUS_ERROR_PARAMETER = 0x03, BT_OP_STATUS_MAX }BT_OPCODE_STATUS,*PBT_OPCODE_STATUS; //OP codes definition between driver and bt fw typedef enum _BT_CTRL_OPCODE_LOWER{ BT_LO_OP_GET_BT_VERSION = 0x00, BT_LO_OP_RESET = 0x01, BT_LO_OP_TEST_CTRL = 0x02, BT_LO_OP_SET_BT_MODE = 0x03, BT_LO_OP_SET_CHNL_TX_GAIN = 0x04, BT_LO_OP_SET_PKT_TYPE_LEN = 0x05, BT_LO_OP_SET_PKT_CNT_L_PL_TYPE = 0x06, BT_LO_OP_SET_PKT_CNT_H_PKT_INTV = 0x07, BT_LO_OP_SET_PKT_HEADER = 0x08, BT_LO_OP_SET_WHITENCOEFF = 0x09, BT_LO_OP_SET_BD_ADDR_L = 0x0a, BT_LO_OP_SET_BD_ADDR_H = 0x0b, BT_LO_OP_WRITE_REG_ADDR = 0x0c, BT_LO_OP_WRITE_REG_VALUE = 0x0d, BT_LO_OP_GET_BT_STATUS = 0x0e, BT_LO_OP_GET_BD_ADDR_L = 0x0f, BT_LO_OP_GET_BD_ADDR_H = 0x10, BT_LO_OP_READ_REG = 0x11, BT_LO_OP_SET_TARGET_BD_ADDR_L = 0x12, BT_LO_OP_SET_TARGET_BD_ADDR_H = 0x13, BT_LO_OP_SET_TX_POWER_CALIBRATION = 0x14, BT_LO_OP_GET_RX_PKT_CNT_L = 0x15, BT_LO_OP_GET_RX_PKT_CNT_H = 0x16, BT_LO_OP_GET_RX_ERROR_BITS_L = 0x17, BT_LO_OP_GET_RX_ERROR_BITS_H = 0x18, BT_LO_OP_GET_RSSI = 0x19, BT_LO_OP_GET_CFO_HDR_QUALITY_L = 0x1a, BT_LO_OP_GET_CFO_HDR_QUALITY_H = 0x1b, BT_LO_OP_GET_TARGET_BD_ADDR_L = 0x1c, BT_LO_OP_GET_TARGET_BD_ADDR_H = 0x1d, BT_LO_OP_GET_AFH_MAP_L = 0x1e, BT_LO_OP_GET_AFH_MAP_M = 0x1f, BT_LO_OP_GET_AFH_MAP_H = 0x20, BT_LO_OP_GET_AFH_STATUS = 0x21, BT_LO_OP_SET_TRACKING_INTERVAL = 0x22, BT_LO_OP_SET_THERMAL_METER = 0x23, BT_LO_OP_ENABLE_CFO_TRACKING = 0x24, BT_LO_OP_MAX }BT_CTRL_OPCODE_LOWER,*PBT_CTRL_OPCODE_LOWER; #endif /* #if(MP_DRIVER == 1) */ #endif // #ifndef __INC_MPT_BT_H rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_btcoex.h000066400000000000000000000062031261122257400214540ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_BTCOEX_H__ #define __RTW_BTCOEX_H__ #include #define PACKET_NORMAL 0 #define PACKET_DHCP 1 #define PACKET_ARP 2 #define PACKET_EAPOL 3 void rtw_btcoex_Initialize(PADAPTER); void rtw_btcoex_PowerOnSetting(PADAPTER padapter); void rtw_btcoex_PreLoadFirmware(PADAPTER padapter); void rtw_btcoex_HAL_Initialize(PADAPTER padapter, u8 bWifiOnly); void rtw_btcoex_IpsNotify(PADAPTER, u8 type); void rtw_btcoex_LpsNotify(PADAPTER, u8 type); void rtw_btcoex_ScanNotify(PADAPTER, u8 type); void rtw_btcoex_ConnectNotify(PADAPTER, u8 action); void rtw_btcoex_MediaStatusNotify(PADAPTER, u8 mediaStatus); void rtw_btcoex_SpecialPacketNotify(PADAPTER, u8 pktType); void rtw_btcoex_IQKNotify(PADAPTER padapter, u8 state); void rtw_btcoex_BtInfoNotify(PADAPTER, u8 length, u8 *tmpBuf); void rtw_btcoex_SuspendNotify(PADAPTER, u8 state); void rtw_btcoex_HaltNotify(PADAPTER); void rtw_btcoex_SwitchBtTRxMask(PADAPTER); void rtw_btcoex_Switch(PADAPTER, u8 enable); u8 rtw_btcoex_IsBtDisabled(PADAPTER); void rtw_btcoex_Handler(PADAPTER); s32 rtw_btcoex_IsBTCoexCtrlAMPDUSize(PADAPTER); u32 rtw_btcoex_GetAMPDUSize(PADAPTER); void rtw_btcoex_SetManualControl(PADAPTER, u8 bmanual); u8 rtw_btcoex_1Ant(PADAPTER); u8 rtw_btcoex_IsBtControlLps(PADAPTER); u8 rtw_btcoex_IsLpsOn(PADAPTER); u8 rtw_btcoex_RpwmVal(PADAPTER); u8 rtw_btcoex_LpsVal(PADAPTER); void rtw_btcoex_SetBTCoexist(PADAPTER, u8 bBtExist); void rtw_btcoex_SetChipType(PADAPTER, u8 chipType); void rtw_btcoex_SetPGAntNum(PADAPTER, u8 antNum); u8 rtw_btcoex_GetPGAntNum(PADAPTER); void rtw_btcoex_SetSingleAntPath(PADAPTER padapter, u8 singleAntPath); u32 rtw_btcoex_GetRaMask(PADAPTER); void rtw_btcoex_RecordPwrMode(PADAPTER, u8 *pCmdBuf, u8 cmdLen); void rtw_btcoex_DisplayBtCoexInfo(PADAPTER, u8 *pbuf, u32 bufsize); void rtw_btcoex_SetDBG(PADAPTER, u32 *pDbgModule); u32 rtw_btcoex_GetDBG(PADAPTER, u8 *pStrBuf, u32 bufSize); u8 rtw_btcoex_IncreaseScanDeviceNum(PADAPTER); u8 rtw_btcoex_IsBtLinkExist(PADAPTER); // ================================================== // Below Functions are called by BT-Coex // ================================================== void rtw_btcoex_RejectApAggregatedPacket(PADAPTER, u8 enable); void rtw_btcoex_LPS_Enter(PADAPTER); void rtw_btcoex_LPS_Leave(PADAPTER); #endif // __RTW_BTCOEX_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_byteorder.h000066400000000000000000000026151261122257400221720ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTL871X_BYTEORDER_H_ #define _RTL871X_BYTEORDER_H_ #if defined (CONFIG_LITTLE_ENDIAN) && defined (CONFIG_BIG_ENDIAN) #error "Shall be CONFIG_LITTLE_ENDIAN or CONFIG_BIG_ENDIAN, but not both!\n" #endif #if defined (CONFIG_LITTLE_ENDIAN) #ifndef CONFIG_PLATFORM_MSTAR389 # include #endif #elif defined (CONFIG_BIG_ENDIAN) # include #else # error "Must be LITTLE/BIG Endian Host" #endif #endif /* _RTL871X_BYTEORDER_H_ */ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_cmd.h000066400000000000000000000640611261122257400207410ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_CMD_H_ #define __RTW_CMD_H_ #define C2H_MEM_SZ (16*1024) #ifndef CONFIG_RTL8711FW #define FREE_CMDOBJ_SZ 128 #define MAX_CMDSZ 1024 #define MAX_RSPSZ 512 #define MAX_EVTSZ 1024 #ifdef PLATFORM_OS_CE #define CMDBUFF_ALIGN_SZ 4 #else #define CMDBUFF_ALIGN_SZ 512 #endif struct cmd_obj { _adapter *padapter; u16 cmdcode; u8 res; u8 *parmbuf; u32 cmdsz; u8 *rsp; u32 rspsz; struct submit_ctx *sctx; //_sema cmd_sem; _list list; }; /* cmd flags */ enum { RTW_CMDF_DIRECTLY = BIT0, RTW_CMDF_WAIT_ACK = BIT1, }; struct cmd_priv { _sema cmd_queue_sema; //_sema cmd_done_sema; _sema terminate_cmdthread_sema; _queue cmd_queue; u8 cmd_seq; u8 *cmd_buf; //shall be non-paged, and 4 bytes aligned u8 *cmd_allocated_buf; u8 *rsp_buf; //shall be non-paged, and 4 bytes aligned u8 *rsp_allocated_buf; u32 cmd_issued_cnt; u32 cmd_done_cnt; u32 rsp_cnt; ATOMIC_T cmdthd_running; //u8 cmdthd_running; u8 stop_req; _adapter *padapter; _mutex sctx_mutex; }; #ifdef CONFIG_EVENT_THREAD_MODE struct evt_obj { u16 evtcode; u8 res; u8 *parmbuf; u32 evtsz; _list list; }; #endif struct evt_priv { #ifdef CONFIG_EVENT_THREAD_MODE _sema evt_notify; _sema terminate_evtthread_sema; _queue evt_queue; #endif #define CONFIG_C2H_WK #ifdef CONFIG_C2H_WK _workitem c2h_wk; bool c2h_wk_alive; struct rtw_cbuf *c2h_queue; #define C2H_QUEUE_MAX_LEN 10 #endif #ifdef CONFIG_H2CLBK _sema lbkevt_done; u8 lbkevt_limit; u8 lbkevt_num; u8 *cmdevt_parm; #endif ATOMIC_T event_seq; u8 *evt_buf; //shall be non-paged, and 4 bytes aligned u8 *evt_allocated_buf; u32 evt_done_cnt; #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) u8 *c2h_mem; u8 *allocated_c2h_mem; #ifdef PLATFORM_OS_XP PMDL pc2h_mdl; #endif #endif }; #define init_h2fwcmd_w_parm_no_rsp(pcmd, pparm, code) \ do {\ _rtw_init_listhead(&pcmd->list);\ pcmd->cmdcode = code;\ pcmd->parmbuf = (u8 *)(pparm);\ pcmd->cmdsz = sizeof (*pparm);\ pcmd->rsp = NULL;\ pcmd->rspsz = 0;\ } while(0) #define init_h2fwcmd_w_parm_no_parm_rsp(pcmd, code) \ do {\ _rtw_init_listhead(&pcmd->list);\ pcmd->cmdcode = code;\ pcmd->parmbuf = NULL;\ pcmd->cmdsz = 0;\ pcmd->rsp = NULL;\ pcmd->rspsz = 0;\ } while(0) struct c2h_evt_hdr { u8 id:4; u8 plen:4; u8 seq; u8 payload[0]; }; struct c2h_evt_hdr_88xx { u8 id; u8 seq; u8 payload[12]; u8 plen; u8 trigger; }; #define c2h_evt_valid(c2h_evt) ((c2h_evt)->id || (c2h_evt)->plen) struct P2P_PS_Offload_t { u8 Offload_En:1; u8 role:1; // 1: Owner, 0: Client u8 CTWindow_En:1; u8 NoA0_En:1; u8 NoA1_En:1; u8 AllStaSleep:1; // Only valid in Owner u8 discovery:1; u8 rsvd:1; }; struct P2P_PS_CTWPeriod_t { u8 CTWPeriod; //TU }; extern u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *obj); extern struct cmd_obj *rtw_dequeue_cmd(struct cmd_priv *pcmdpriv); extern void rtw_free_cmd_obj(struct cmd_obj *pcmd); #ifdef CONFIG_EVENT_THREAD_MODE extern u32 rtw_enqueue_evt(struct evt_priv *pevtpriv, struct evt_obj *obj); extern struct evt_obj *rtw_dequeue_evt(_queue *queue); extern void rtw_free_evt_obj(struct evt_obj *pcmd); #endif void rtw_stop_cmd_thread(_adapter *adapter); thread_return rtw_cmd_thread(thread_context context); extern u32 rtw_init_cmd_priv (struct cmd_priv *pcmdpriv); extern void rtw_free_cmd_priv (struct cmd_priv *pcmdpriv); extern u32 rtw_init_evt_priv (struct evt_priv *pevtpriv); extern void rtw_free_evt_priv (struct evt_priv *pevtpriv); extern void rtw_cmd_clr_isr(struct cmd_priv *pcmdpriv); extern void rtw_evt_notify_isr(struct evt_priv *pevtpriv); #ifdef CONFIG_P2P u8 p2p_protocol_wk_cmd(_adapter*padapter, int intCmdType ); #endif //CONFIG_P2P #else //#include #endif /* CONFIG_RTL8711FW */ enum rtw_drvextra_cmd_id { NONE_WK_CID, DYNAMIC_CHK_WK_CID, DM_CTRL_WK_CID, PBC_POLLING_WK_CID, POWER_SAVING_CTRL_WK_CID,//IPS,AUTOSuspend LPS_CTRL_WK_CID, ANT_SELECT_WK_CID, P2P_PS_WK_CID, P2P_PROTO_WK_CID, CHECK_HIQ_WK_CID,//for softap mode, check hi queue if empty INTEl_WIDI_WK_CID, C2H_WK_CID, RTP_TIMER_CFG_WK_CID, RESET_SECURITYPRIV, // add for CONFIG_IEEE80211W, none 11w also can use FREE_ASSOC_RESOURCES, // add for CONFIG_IEEE80211W, none 11w also can use DM_IN_LPS_WK_CID, DM_RA_MSK_WK_CID, //add for STA update RAMask when bandwith change. BEAMFORMING_WK_CID, LPS_CHANGE_DTIM_CID, BTINFO_WK_CID, MAX_WK_CID }; enum LPS_CTRL_TYPE { LPS_CTRL_SCAN=0, LPS_CTRL_JOINBSS=1, LPS_CTRL_CONNECT=2, LPS_CTRL_DISCONNECT=3, LPS_CTRL_SPECIAL_PACKET=4, LPS_CTRL_LEAVE=5, LPS_CTRL_TRAFFIC_BUSY = 6, }; enum RFINTFS { SWSI, HWSI, HWPI, }; /* Caller Mode: Infra, Ad-HoC(C) Notes: To enter USB suspend mode Command Mode */ struct usb_suspend_parm { u32 action;// 1: sleep, 0:resume }; /* Caller Mode: Infra, Ad-HoC Notes: To join a known BSS. Command-Event Mode */ /* Caller Mode: Infra, Ad-Hoc Notes: To join the specified bss Command Event Mode */ struct joinbss_parm { WLAN_BSSID_EX network; }; /* Caller Mode: Infra, Ad-HoC(C) Notes: To disconnect the current associated BSS Command Mode */ struct disconnect_parm { u32 deauth_timeout_ms; }; /* Caller Mode: AP, Ad-HoC(M) Notes: To create a BSS Command Mode */ struct createbss_parm { WLAN_BSSID_EX network; }; /* Caller Mode: AP, Ad-HoC, Infra Notes: To set the NIC mode of RTL8711 Command Mode The definition of mode: #define IW_MODE_AUTO 0 // Let the driver decides which AP to join #define IW_MODE_ADHOC 1 // Single cell network (Ad-Hoc Clients) #define IW_MODE_INFRA 2 // Multi cell network, roaming, .. #define IW_MODE_MASTER 3 // Synchronisation master or Access Point #define IW_MODE_REPEAT 4 // Wireless Repeater (forwarder) #define IW_MODE_SECOND 5 // Secondary master/repeater (backup) #define IW_MODE_MONITOR 6 // Passive monitor (listen only) */ struct setopmode_parm { u8 mode; u8 rsvd[3]; }; /* Caller Mode: AP, Ad-HoC, Infra Notes: To ask RTL8711 performing site-survey Command-Event Mode */ #define RTW_SSID_SCAN_AMOUNT 9 // for WEXT_CSCAN_AMOUNT 9 #define RTW_CHANNEL_SCAN_AMOUNT (14+37) struct sitesurvey_parm { sint scan_mode; //active: 1, passive: 0 /* sint bsslimit; // 1 ~ 48 */ u8 ssid_num; u8 ch_num; NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; struct rtw_ieee80211_channel ch[RTW_CHANNEL_SCAN_AMOUNT]; }; /* Caller Mode: Any Notes: To set the auth type of RTL8711. open/shared/802.1x Command Mode */ struct setauth_parm { u8 mode; //0: legacy open, 1: legacy shared 2: 802.1x u8 _1x; //0: PSK, 1: TLS u8 rsvd[2]; }; /* Caller Mode: Infra a. algorithm: wep40, wep104, tkip & aes b. keytype: grp key/unicast key c. key contents when shared key ==> keyid is the camid when 802.1x ==> keyid [0:1] ==> grp key when 802.1x ==> keyid > 2 ==> unicast key */ struct setkey_parm { u8 algorithm; // encryption algorithm, could be none, wep40, TKIP, CCMP, wep104 u8 keyid; u8 grpkey; // 1: this is the grpkey for 802.1x. 0: this is the unicast key for 802.1x u8 set_tx; // 1: main tx key for wep. 0: other key. u8 key[16]; // this could be 40 or 104 }; /* When in AP or Ad-Hoc mode, this is used to allocate an sw/hw entry for a newly associated sta. Command when shared key ==> algorithm/keyid */ struct set_stakey_parm { u8 addr[ETH_ALEN]; u8 algorithm; u8 keyid; u8 key[16]; }; struct set_stakey_rsp { u8 addr[ETH_ALEN]; u8 keyid; u8 rsvd; }; /* Caller Ad-Hoc/AP Command -Rsp(AID == CAMID) mode This is to force fw to add an sta_data entry per driver's request. FW will write an cam entry associated with it. */ struct set_assocsta_parm { u8 addr[ETH_ALEN]; }; struct set_assocsta_rsp { u8 cam_id; u8 rsvd[3]; }; /* Caller Ad-Hoc/AP Command mode This is to force fw to del an sta_data entry per driver's request FW will invalidate the cam entry associated with it. */ struct del_assocsta_parm { u8 addr[ETH_ALEN]; }; /* Caller Mode: AP/Ad-HoC(M) Notes: To notify fw that given staid has changed its power state Command Mode */ struct setstapwrstate_parm { u8 staid; u8 status; u8 hwaddr[6]; }; /* Caller Mode: Any Notes: To setup the basic rate of RTL8711 Command Mode */ struct setbasicrate_parm { u8 basicrates[NumRates]; }; /* Caller Mode: Any Notes: To read the current basic rate Command-Rsp Mode */ struct getbasicrate_parm { u32 rsvd; }; struct getbasicrate_rsp { u8 basicrates[NumRates]; }; /* Caller Mode: Any Notes: To setup the data rate of RTL8711 Command Mode */ struct setdatarate_parm { #ifdef MP_FIRMWARE_OFFLOAD u32 curr_rateidx; #else u8 mac_id; u8 datarates[NumRates]; #endif }; /* Caller Mode: Any Notes: To read the current data rate Command-Rsp Mode */ struct getdatarate_parm { u32 rsvd; }; struct getdatarate_rsp { u8 datarates[NumRates]; }; /* Caller Mode: Any AP: AP can use the info for the contents of beacon frame Infra: STA can use the info when sitesurveying Ad-HoC(M): Like AP Ad-HoC(C): Like STA Notes: To set the phy capability of the NIC Command Mode */ struct setphyinfo_parm { struct regulatory_class class_sets[NUM_REGULATORYS]; u8 status; }; struct getphyinfo_parm { u32 rsvd; }; struct getphyinfo_rsp { struct regulatory_class class_sets[NUM_REGULATORYS]; u8 status; }; /* Caller Mode: Any Notes: To set the channel/modem/band This command will be used when channel/modem/band is changed. Command Mode */ struct setphy_parm { u8 rfchannel; u8 modem; }; /* Caller Mode: Any Notes: To get the current setting of channel/modem/band Command-Rsp Mode */ struct getphy_parm { u32 rsvd; }; struct getphy_rsp { u8 rfchannel; u8 modem; }; struct readBB_parm { u8 offset; }; struct readBB_rsp { u8 value; }; struct readTSSI_parm { u8 offset; }; struct readTSSI_rsp { u8 value; }; struct writeBB_parm { u8 offset; u8 value; }; struct readRF_parm { u8 offset; }; struct readRF_rsp { u32 value; }; struct writeRF_parm { u32 offset; u32 value; }; struct getrfintfs_parm { u8 rfintfs; }; struct Tx_Beacon_param { WLAN_BSSID_EX network; }; /* Notes: This command is used for H2C/C2H loopback testing mac[0] == 0 ==> CMD mode, return H2C_SUCCESS. The following condition must be ture under CMD mode mac[1] == mac[4], mac[2] == mac[3], mac[0]=mac[5]= 0; s0 == 0x1234, s1 == 0xabcd, w0 == 0x78563412, w1 == 0x5aa5def7; s2 == (b1 << 8 | b0); mac[0] == 1 ==> CMD_RSP mode, return H2C_SUCCESS_RSP The rsp layout shall be: rsp: parm: mac[0] = mac[5]; mac[1] = mac[4]; mac[2] = mac[3]; mac[3] = mac[2]; mac[4] = mac[1]; mac[5] = mac[0]; s0 = s1; s1 = swap16(s0); w0 = swap32(w1); b0 = b1 s2 = s0 + s1 b1 = b0 w1 = w0 mac[0] == 2 ==> CMD_EVENT mode, return H2C_SUCCESS The event layout shall be: event: parm: mac[0] = mac[5]; mac[1] = mac[4]; mac[2] = event's sequence number, starting from 1 to parm's marc[3] mac[3] = mac[2]; mac[4] = mac[1]; mac[5] = mac[0]; s0 = swap16(s0) - event.mac[2]; s1 = s1 + event.mac[2]; w0 = swap32(w0); b0 = b1 s2 = s0 + event.mac[2] b1 = b0 w1 = swap32(w1) - event.mac[2]; parm->mac[3] is the total event counts that host requested. event will be the same with the cmd's param. */ #ifdef CONFIG_H2CLBK struct seth2clbk_parm { u8 mac[6]; u16 s0; u16 s1; u32 w0; u8 b0; u16 s2; u8 b1; u32 w1; }; struct geth2clbk_parm { u32 rsv; }; struct geth2clbk_rsp { u8 mac[6]; u16 s0; u16 s1; u32 w0; u8 b0; u16 s2; u8 b1; u32 w1; }; #endif /* CONFIG_H2CLBK */ // CMD param Formart for driver extra cmd handler struct drvextra_cmd_parm { int ec_id; //extra cmd id int type; // Can use this field as the type id or command size int size; //buffer size unsigned char *pbuf; }; /*------------------- Below are used for RF/BB tunning ---------------------*/ struct setantenna_parm { u8 tx_antset; u8 rx_antset; u8 tx_antenna; u8 rx_antenna; }; struct enrateadaptive_parm { u32 en; }; struct settxagctbl_parm { u32 txagc[MAX_RATES_LENGTH]; }; struct gettxagctbl_parm { u32 rsvd; }; struct gettxagctbl_rsp { u32 txagc[MAX_RATES_LENGTH]; }; struct setagcctrl_parm { u32 agcctrl; // 0: pure hw, 1: fw }; struct setssup_parm { u32 ss_ForceUp[MAX_RATES_LENGTH]; }; struct getssup_parm { u32 rsvd; }; struct getssup_rsp { u8 ss_ForceUp[MAX_RATES_LENGTH]; }; struct setssdlevel_parm { u8 ss_DLevel[MAX_RATES_LENGTH]; }; struct getssdlevel_parm { u32 rsvd; }; struct getssdlevel_rsp { u8 ss_DLevel[MAX_RATES_LENGTH]; }; struct setssulevel_parm { u8 ss_ULevel[MAX_RATES_LENGTH]; }; struct getssulevel_parm { u32 rsvd; }; struct getssulevel_rsp { u8 ss_ULevel[MAX_RATES_LENGTH]; }; struct setcountjudge_parm { u8 count_judge[MAX_RATES_LENGTH]; }; struct getcountjudge_parm { u32 rsvd; }; struct getcountjudge_rsp { u8 count_judge[MAX_RATES_LENGTH]; }; struct setratable_parm { u8 ss_ForceUp[NumRates]; u8 ss_ULevel[NumRates]; u8 ss_DLevel[NumRates]; u8 count_judge[NumRates]; }; struct getratable_parm { uint rsvd; }; struct getratable_rsp { u8 ss_ForceUp[NumRates]; u8 ss_ULevel[NumRates]; u8 ss_DLevel[NumRates]; u8 count_judge[NumRates]; }; //to get TX,RX retry count struct gettxretrycnt_parm{ unsigned int rsvd; }; struct gettxretrycnt_rsp{ unsigned long tx_retrycnt; }; struct getrxretrycnt_parm{ unsigned int rsvd; }; struct getrxretrycnt_rsp{ unsigned long rx_retrycnt; }; //to get BCNOK,BCNERR count struct getbcnokcnt_parm{ unsigned int rsvd; }; struct getbcnokcnt_rsp{ unsigned long bcnokcnt; }; struct getbcnerrcnt_parm{ unsigned int rsvd; }; struct getbcnerrcnt_rsp{ unsigned long bcnerrcnt; }; // to get current TX power level struct getcurtxpwrlevel_parm{ unsigned int rsvd; }; struct getcurtxpwrlevel_rsp{ unsigned short tx_power; }; struct setprobereqextraie_parm { unsigned char e_id; unsigned char ie_len; unsigned char ie[0]; }; struct setassocreqextraie_parm { unsigned char e_id; unsigned char ie_len; unsigned char ie[0]; }; struct setproberspextraie_parm { unsigned char e_id; unsigned char ie_len; unsigned char ie[0]; }; struct setassocrspextraie_parm { unsigned char e_id; unsigned char ie_len; unsigned char ie[0]; }; struct addBaReq_parm { unsigned int tid; u8 addr[ETH_ALEN]; }; /*H2C Handler index: 46 */ struct set_ch_parm { u8 ch; u8 bw; u8 ch_offset; }; #ifdef MP_FIRMWARE_OFFLOAD /*H2C Handler index: 47 */ struct SetTxPower_parm { u8 TxPower; }; /*H2C Handler index: 48 */ struct SwitchAntenna_parm { u16 antenna_tx; u16 antenna_rx; // R_ANTENNA_SELECT_CCK cck_txrx; u8 cck_txrx; }; /*H2C Handler index: 49 */ struct SetCrystalCap_parm { u32 curr_crystalcap; }; /*H2C Handler index: 50 */ struct SetSingleCarrierTx_parm { u8 bStart; }; /*H2C Handler index: 51 */ struct SetSingleToneTx_parm { u8 bStart; u8 curr_rfpath; }; /*H2C Handler index: 52 */ struct SetCarrierSuppressionTx_parm { u8 bStart; u32 curr_rateidx; }; /*H2C Handler index: 53 */ struct SetContinuousTx_parm { u8 bStart; u8 CCK_flag; /*1:CCK 2:OFDM*/ u32 curr_rateidx; }; /*H2C Handler index: 54 */ struct SwitchBandwidth_parm { u8 curr_bandwidth; }; #endif /* MP_FIRMWARE_OFFLOAD */ /*H2C Handler index: 59 */ struct SetChannelPlan_param { u8 channel_plan; }; /*H2C Handler index: 60 */ struct LedBlink_param { PVOID pLed; }; /*H2C Handler index: 61 */ struct SetChannelSwitch_param { u8 new_ch_no; }; /*H2C Handler index: 62 */ struct TDLSoption_param { u8 addr[ETH_ALEN]; u8 option; }; /*H2C Handler index: 64 */ struct RunInThread_param { void (*func)(void*); void *context; }; #define GEN_CMD_CODE(cmd) cmd ## _CMD_ /* Result: 0x00: success 0x01: sucess, and check Response. 0x02: cmd ignored due to duplicated sequcne number 0x03: cmd dropped due to invalid cmd code 0x04: reserved. */ #define H2C_RSP_OFFSET 512 #define H2C_SUCCESS 0x00 #define H2C_SUCCESS_RSP 0x01 #define H2C_DUPLICATED 0x02 #define H2C_DROPPED 0x03 #define H2C_PARAMETERS_ERROR 0x04 #define H2C_REJECTED 0x05 #define H2C_CMD_OVERFLOW 0x06 #define H2C_RESERVED 0x07 extern u8 rtw_setassocsta_cmd(_adapter *padapter, u8 *mac_addr); extern u8 rtw_setstandby_cmd(_adapter *padapter, uint action); u8 rtw_sitesurvey_cmd(_adapter *padapter, NDIS_802_11_SSID *ssid, int ssid_num, struct rtw_ieee80211_channel *ch, int ch_num); extern u8 rtw_createbss_cmd(_adapter *padapter); extern u8 rtw_createbss_cmd_ex(_adapter *padapter, unsigned char *pbss, unsigned int sz); u8 rtw_startbss_cmd(_adapter *padapter, int flags); extern u8 rtw_setphy_cmd(_adapter *padapter, u8 modem, u8 ch); struct sta_info; extern u8 rtw_setstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 unicast_key, bool enqueue); extern u8 rtw_clearstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 enqueue); extern u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network* pnetwork); u8 rtw_disassoc_cmd(_adapter *padapter, u32 deauth_timeout_ms, bool enqueue); extern u8 rtw_setopmode_cmd(_adapter *padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype, bool enqueue); extern u8 rtw_setdatarate_cmd(_adapter *padapter, u8 *rateset); extern u8 rtw_setbasicrate_cmd(_adapter *padapter, u8 *rateset); extern u8 rtw_setbbreg_cmd(_adapter * padapter, u8 offset, u8 val); extern u8 rtw_setrfreg_cmd(_adapter * padapter, u8 offset, u32 val); extern u8 rtw_getbbreg_cmd(_adapter * padapter, u8 offset, u8 * pval); extern u8 rtw_getrfreg_cmd(_adapter * padapter, u8 offset, u8 * pval); extern u8 rtw_setrfintfs_cmd(_adapter *padapter, u8 mode); extern u8 rtw_setrttbl_cmd(_adapter *padapter, struct setratable_parm *prate_table); extern u8 rtw_getrttbl_cmd(_adapter *padapter, struct getratable_rsp *pval); extern u8 rtw_gettssi_cmd(_adapter *padapter, u8 offset,u8 *pval); extern u8 rtw_setfwdig_cmd(_adapter*padapter, u8 type); extern u8 rtw_setfwra_cmd(_adapter*padapter, u8 type); extern u8 rtw_addbareq_cmd(_adapter*padapter, u8 tid, u8 *addr); // add for CONFIG_IEEE80211W, none 11w also can use extern u8 rtw_reset_securitypriv_cmd(_adapter*padapter); extern u8 rtw_free_assoc_resources_cmd(_adapter *padapter); extern u8 rtw_dynamic_chk_wk_cmd(_adapter *adapter); u8 rtw_lps_ctrl_wk_cmd(_adapter*padapter, u8 lps_ctrl_type, u8 enqueue); u8 rtw_dm_in_lps_wk_cmd(_adapter*padapter); u8 rtw_lps_change_dtim_cmd(_adapter*padapter, u8 dtim); #if (RATE_ADAPTIVE_SUPPORT==1) u8 rtw_rpt_timer_cfg_cmd(_adapter*padapter, u16 minRptTime); #endif #ifdef CONFIG_ANTENNA_DIVERSITY extern u8 rtw_antenna_select_cmd(_adapter*padapter, u8 antenna,u8 enqueue); #endif u8 rtw_dm_ra_mask_wk_cmd(_adapter*padapter, u8 *psta); extern u8 rtw_ps_cmd(_adapter*padapter); #ifdef CONFIG_AP_MODE u8 rtw_chk_hi_queue_cmd(_adapter*padapter); #endif #ifdef CONFIG_BT_COEXIST u8 rtw_btinfo_cmd(PADAPTER padapter, u8 *pbuf, u16 length); #endif u8 rtw_set_ch_cmd(_adapter*padapter, u8 ch, u8 bw, u8 ch_offset, u8 enqueue); extern u8 rtw_set_chplan_cmd(_adapter*padapter, u8 chplan, u8 enqueue, u8 swconfig); extern u8 rtw_led_blink_cmd(_adapter*padapter, PVOID pLed); extern u8 rtw_set_csa_cmd(_adapter*padapter, u8 new_ch_no); extern u8 rtw_tdls_cmd(_adapter*padapter, u8 *addr, u8 option); //#ifdef CONFIG_C2H_PACKET_EN extern u8 rtw_c2h_packet_wk_cmd(PADAPTER padapter, u8 *pbuf, u16 length); //#else extern u8 rtw_c2h_wk_cmd(PADAPTER padapter, u8 *c2h_evt); //#endif u8 rtw_run_in_thread_cmd(PADAPTER padapter, void (*func)(void*), void* context); u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf); extern void rtw_survey_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); extern void rtw_disassoc_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); extern void rtw_joinbss_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); extern void rtw_createbss_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); extern void rtw_getbbrfreg_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); extern void rtw_readtssi_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd); extern void rtw_setstaKey_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); extern void rtw_setassocsta_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); extern void rtw_getrttbl_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); struct _cmd_callback { u32 cmd_code; void (*callback)(_adapter *padapter, struct cmd_obj *cmd); }; enum rtw_h2c_cmd { GEN_CMD_CODE(_Read_MACREG) , /*0*/ GEN_CMD_CODE(_Write_MACREG) , GEN_CMD_CODE(_Read_BBREG) , GEN_CMD_CODE(_Write_BBREG) , GEN_CMD_CODE(_Read_RFREG) , GEN_CMD_CODE(_Write_RFREG) , /*5*/ GEN_CMD_CODE(_Read_EEPROM) , GEN_CMD_CODE(_Write_EEPROM) , GEN_CMD_CODE(_Read_EFUSE) , GEN_CMD_CODE(_Write_EFUSE) , GEN_CMD_CODE(_Read_CAM) , /*10*/ GEN_CMD_CODE(_Write_CAM) , GEN_CMD_CODE(_setBCNITV), GEN_CMD_CODE(_setMBIDCFG), GEN_CMD_CODE(_JoinBss), /*14*/ GEN_CMD_CODE(_DisConnect) , /*15*/ GEN_CMD_CODE(_CreateBss) , GEN_CMD_CODE(_SetOpMode) , GEN_CMD_CODE(_SiteSurvey), /*18*/ GEN_CMD_CODE(_SetAuth) , GEN_CMD_CODE(_SetKey) , /*20*/ GEN_CMD_CODE(_SetStaKey) , GEN_CMD_CODE(_SetAssocSta) , GEN_CMD_CODE(_DelAssocSta) , GEN_CMD_CODE(_SetStaPwrState) , GEN_CMD_CODE(_SetBasicRate) , /*25*/ GEN_CMD_CODE(_GetBasicRate) , GEN_CMD_CODE(_SetDataRate) , GEN_CMD_CODE(_GetDataRate) , GEN_CMD_CODE(_SetPhyInfo) , GEN_CMD_CODE(_GetPhyInfo) , /*30*/ GEN_CMD_CODE(_SetPhy) , GEN_CMD_CODE(_GetPhy) , GEN_CMD_CODE(_readRssi) , GEN_CMD_CODE(_readGain) , GEN_CMD_CODE(_SetAtim) , /*35*/ GEN_CMD_CODE(_SetPwrMode) , GEN_CMD_CODE(_JoinbssRpt), GEN_CMD_CODE(_SetRaTable) , GEN_CMD_CODE(_GetRaTable) , GEN_CMD_CODE(_GetCCXReport), /*40*/ GEN_CMD_CODE(_GetDTMReport), GEN_CMD_CODE(_GetTXRateStatistics), GEN_CMD_CODE(_SetUsbSuspend), GEN_CMD_CODE(_SetH2cLbk), GEN_CMD_CODE(_AddBAReq) , /*45*/ GEN_CMD_CODE(_SetChannel), /*46*/ GEN_CMD_CODE(_SetTxPower), GEN_CMD_CODE(_SwitchAntenna), GEN_CMD_CODE(_SetCrystalCap), GEN_CMD_CODE(_SetSingleCarrierTx), /*50*/ GEN_CMD_CODE(_SetSingleToneTx),/*51*/ GEN_CMD_CODE(_SetCarrierSuppressionTx), GEN_CMD_CODE(_SetContinuousTx), GEN_CMD_CODE(_SwitchBandwidth), /*54*/ GEN_CMD_CODE(_TX_Beacon), /*55*/ GEN_CMD_CODE(_Set_MLME_EVT), /*56*/ GEN_CMD_CODE(_Set_Drv_Extra), /*57*/ GEN_CMD_CODE(_Set_H2C_MSG), /*58*/ GEN_CMD_CODE(_SetChannelPlan), /*59*/ GEN_CMD_CODE(_LedBlink), /*60*/ GEN_CMD_CODE(_SetChannelSwitch), /*61*/ GEN_CMD_CODE(_TDLS), /*62*/ GEN_CMD_CODE(_ChkBMCSleepq), /*63*/ GEN_CMD_CODE(_RunInThreadCMD), /*64*/ MAX_H2CCMD }; #define _GetBBReg_CMD_ _Read_BBREG_CMD_ #define _SetBBReg_CMD_ _Write_BBREG_CMD_ #define _GetRFReg_CMD_ _Read_RFREG_CMD_ #define _SetRFReg_CMD_ _Write_RFREG_CMD_ #ifdef _RTW_CMD_C_ struct _cmd_callback rtw_cmd_callback[] = { {GEN_CMD_CODE(_Read_MACREG), NULL}, /*0*/ {GEN_CMD_CODE(_Write_MACREG), NULL}, {GEN_CMD_CODE(_Read_BBREG), &rtw_getbbrfreg_cmdrsp_callback}, {GEN_CMD_CODE(_Write_BBREG), NULL}, {GEN_CMD_CODE(_Read_RFREG), &rtw_getbbrfreg_cmdrsp_callback}, {GEN_CMD_CODE(_Write_RFREG), NULL}, /*5*/ {GEN_CMD_CODE(_Read_EEPROM), NULL}, {GEN_CMD_CODE(_Write_EEPROM), NULL}, {GEN_CMD_CODE(_Read_EFUSE), NULL}, {GEN_CMD_CODE(_Write_EFUSE), NULL}, {GEN_CMD_CODE(_Read_CAM), NULL}, /*10*/ {GEN_CMD_CODE(_Write_CAM), NULL}, {GEN_CMD_CODE(_setBCNITV), NULL}, {GEN_CMD_CODE(_setMBIDCFG), NULL}, {GEN_CMD_CODE(_JoinBss), &rtw_joinbss_cmd_callback}, /*14*/ {GEN_CMD_CODE(_DisConnect), &rtw_disassoc_cmd_callback}, /*15*/ {GEN_CMD_CODE(_CreateBss), &rtw_createbss_cmd_callback}, {GEN_CMD_CODE(_SetOpMode), NULL}, {GEN_CMD_CODE(_SiteSurvey), &rtw_survey_cmd_callback}, /*18*/ {GEN_CMD_CODE(_SetAuth), NULL}, {GEN_CMD_CODE(_SetKey), NULL}, /*20*/ {GEN_CMD_CODE(_SetStaKey), &rtw_setstaKey_cmdrsp_callback}, {GEN_CMD_CODE(_SetAssocSta), &rtw_setassocsta_cmdrsp_callback}, {GEN_CMD_CODE(_DelAssocSta), NULL}, {GEN_CMD_CODE(_SetStaPwrState), NULL}, {GEN_CMD_CODE(_SetBasicRate), NULL}, /*25*/ {GEN_CMD_CODE(_GetBasicRate), NULL}, {GEN_CMD_CODE(_SetDataRate), NULL}, {GEN_CMD_CODE(_GetDataRate), NULL}, {GEN_CMD_CODE(_SetPhyInfo), NULL}, {GEN_CMD_CODE(_GetPhyInfo), NULL}, /*30*/ {GEN_CMD_CODE(_SetPhy), NULL}, {GEN_CMD_CODE(_GetPhy), NULL}, {GEN_CMD_CODE(_readRssi), NULL}, {GEN_CMD_CODE(_readGain), NULL}, {GEN_CMD_CODE(_SetAtim), NULL}, /*35*/ {GEN_CMD_CODE(_SetPwrMode), NULL}, {GEN_CMD_CODE(_JoinbssRpt), NULL}, {GEN_CMD_CODE(_SetRaTable), NULL}, {GEN_CMD_CODE(_GetRaTable) , NULL}, {GEN_CMD_CODE(_GetCCXReport), NULL}, /*40*/ {GEN_CMD_CODE(_GetDTMReport), NULL}, {GEN_CMD_CODE(_GetTXRateStatistics), NULL}, {GEN_CMD_CODE(_SetUsbSuspend), NULL}, {GEN_CMD_CODE(_SetH2cLbk), NULL}, {GEN_CMD_CODE(_AddBAReq), NULL}, /*45*/ {GEN_CMD_CODE(_SetChannel), NULL}, /*46*/ {GEN_CMD_CODE(_SetTxPower), NULL}, {GEN_CMD_CODE(_SwitchAntenna), NULL}, {GEN_CMD_CODE(_SetCrystalCap), NULL}, {GEN_CMD_CODE(_SetSingleCarrierTx), NULL}, /*50*/ {GEN_CMD_CODE(_SetSingleToneTx), NULL}, /*51*/ {GEN_CMD_CODE(_SetCarrierSuppressionTx), NULL}, {GEN_CMD_CODE(_SetContinuousTx), NULL}, {GEN_CMD_CODE(_SwitchBandwidth), NULL}, /*54*/ {GEN_CMD_CODE(_TX_Beacon), NULL},/*55*/ {GEN_CMD_CODE(_Set_MLME_EVT), NULL},/*56*/ {GEN_CMD_CODE(_Set_Drv_Extra), NULL},/*57*/ {GEN_CMD_CODE(_Set_H2C_MSG), NULL},/*58*/ {GEN_CMD_CODE(_SetChannelPlan), NULL},/*59*/ {GEN_CMD_CODE(_LedBlink), NULL},/*60*/ {GEN_CMD_CODE(_SetChannelSwitch), NULL},/*61*/ {GEN_CMD_CODE(_TDLS), NULL},/*62*/ {GEN_CMD_CODE(_ChkBMCSleepq), NULL}, /*63*/ {GEN_CMD_CODE(_RunInThreadCMD), NULL},/*64*/ }; #endif #endif // _CMD_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_debug.h000066400000000000000000000404541261122257400212640ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_DEBUG_H__ #define __RTW_DEBUG_H__ #define _drv_always_ 1 #define _drv_emerg_ 2 #define _drv_alert_ 3 #define _drv_crit_ 4 #define _drv_err_ 5 #define _drv_warning_ 6 #define _drv_notice_ 7 #define _drv_info_ 8 #define _drv_dump_ 9 #define _drv_debug_ 10 #define _module_rtl871x_xmit_c_ BIT(0) #define _module_xmit_osdep_c_ BIT(1) #define _module_rtl871x_recv_c_ BIT(2) #define _module_recv_osdep_c_ BIT(3) #define _module_rtl871x_mlme_c_ BIT(4) #define _module_mlme_osdep_c_ BIT(5) #define _module_rtl871x_sta_mgt_c_ BIT(6) #define _module_rtl871x_cmd_c_ BIT(7) #define _module_cmd_osdep_c_ BIT(8) #define _module_rtl871x_io_c_ BIT(9) #define _module_io_osdep_c_ BIT(10) #define _module_os_intfs_c_ BIT(11) #define _module_rtl871x_security_c_ BIT(12) #define _module_rtl871x_eeprom_c_ BIT(13) #define _module_hal_init_c_ BIT(14) #define _module_hci_hal_init_c_ BIT(15) #define _module_rtl871x_ioctl_c_ BIT(16) #define _module_rtl871x_ioctl_set_c_ BIT(17) #define _module_rtl871x_ioctl_query_c_ BIT(18) #define _module_rtl871x_pwrctrl_c_ BIT(19) #define _module_hci_intfs_c_ BIT(20) #define _module_hci_ops_c_ BIT(21) #define _module_osdep_service_c_ BIT(22) #define _module_mp_ BIT(23) #define _module_hci_ops_os_c_ BIT(24) #define _module_rtl871x_ioctl_os_c BIT(25) #define _module_rtl8712_cmd_c_ BIT(26) //#define _module_efuse_ BIT(27) #define _module_rtl8192c_xmit_c_ BIT(28) #define _module_hal_xmit_c_ BIT(28) #define _module_efuse_ BIT(29) #define _module_rtl8712_recv_c_ BIT(30) #define _module_rtl8712_led_c_ BIT(31) #undef _MODULE_DEFINE_ #if defined _RTW_XMIT_C_ #define _MODULE_DEFINE_ _module_rtl871x_xmit_c_ #elif defined _XMIT_OSDEP_C_ #define _MODULE_DEFINE_ _module_xmit_osdep_c_ #elif defined _RTW_RECV_C_ #define _MODULE_DEFINE_ _module_rtl871x_recv_c_ #elif defined _RECV_OSDEP_C_ #define _MODULE_DEFINE_ _module_recv_osdep_c_ #elif defined _RTW_MLME_C_ #define _MODULE_DEFINE_ _module_rtl871x_mlme_c_ #elif defined _MLME_OSDEP_C_ #define _MODULE_DEFINE_ _module_mlme_osdep_c_ #elif defined _RTW_MLME_EXT_C_ #define _MODULE_DEFINE_ 1 #elif defined _RTW_STA_MGT_C_ #define _MODULE_DEFINE_ _module_rtl871x_sta_mgt_c_ #elif defined _RTW_CMD_C_ #define _MODULE_DEFINE_ _module_rtl871x_cmd_c_ #elif defined _CMD_OSDEP_C_ #define _MODULE_DEFINE_ _module_cmd_osdep_c_ #elif defined _RTW_IO_C_ #define _MODULE_DEFINE_ _module_rtl871x_io_c_ #elif defined _IO_OSDEP_C_ #define _MODULE_DEFINE_ _module_io_osdep_c_ #elif defined _OS_INTFS_C_ #define _MODULE_DEFINE_ _module_os_intfs_c_ #elif defined _RTW_SECURITY_C_ #define _MODULE_DEFINE_ _module_rtl871x_security_c_ #elif defined _RTW_EEPROM_C_ #define _MODULE_DEFINE_ _module_rtl871x_eeprom_c_ #elif defined _HAL_INTF_C_ #define _MODULE_DEFINE_ _module_hal_init_c_ #elif (defined _HCI_HAL_INIT_C_) || (defined _SDIO_HALINIT_C_) #define _MODULE_DEFINE_ _module_hci_hal_init_c_ #elif defined _RTL871X_IOCTL_C_ #define _MODULE_DEFINE_ _module_rtl871x_ioctl_c_ #elif defined _RTL871X_IOCTL_SET_C_ #define _MODULE_DEFINE_ _module_rtl871x_ioctl_set_c_ #elif defined _RTL871X_IOCTL_QUERY_C_ #define _MODULE_DEFINE_ _module_rtl871x_ioctl_query_c_ #elif defined _RTL871X_PWRCTRL_C_ #define _MODULE_DEFINE_ _module_rtl871x_pwrctrl_c_ #elif defined _RTW_PWRCTRL_C_ #define _MODULE_DEFINE_ 1 #elif defined _HCI_INTF_C_ #define _MODULE_DEFINE_ _module_hci_intfs_c_ #elif defined _HCI_OPS_C_ #define _MODULE_DEFINE_ _module_hci_ops_c_ #elif defined _SDIO_OPS_C_ #define _MODULE_DEFINE_ 1 #elif defined _OSDEP_HCI_INTF_C_ #define _MODULE_DEFINE_ _module_hci_intfs_c_ #elif defined _OSDEP_SERVICE_C_ #define _MODULE_DEFINE_ _module_osdep_service_c_ #elif defined _HCI_OPS_OS_C_ #define _MODULE_DEFINE_ _module_hci_ops_os_c_ #elif defined _RTL871X_IOCTL_LINUX_C_ #define _MODULE_DEFINE_ _module_rtl871x_ioctl_os_c #elif defined _RTL8712_CMD_C_ #define _MODULE_DEFINE_ _module_rtl8712_cmd_c_ #elif defined _RTL8192C_XMIT_C_ #define _MODULE_DEFINE_ 1 #elif defined _RTL8723AS_XMIT_C_ #define _MODULE_DEFINE_ 1 #elif defined _RTL8712_RECV_C_ #define _MODULE_DEFINE_ _module_rtl8712_recv_c_ #elif defined _RTL8192CU_RECV_C_ #define _MODULE_DEFINE_ _module_rtl8712_recv_c_ #elif defined _RTL871X_MLME_EXT_C_ #define _MODULE_DEFINE_ _module_mlme_osdep_c_ #elif defined _RTW_MP_C_ #define _MODULE_DEFINE_ _module_mp_ #elif defined _RTW_MP_IOCTL_C_ #define _MODULE_DEFINE_ _module_mp_ #elif defined _RTW_EFUSE_C_ #define _MODULE_DEFINE_ _module_efuse_ #endif #ifdef PLATFORM_OS_CE extern void rtl871x_cedbg(const char *fmt, ...); #endif #define RT_TRACE(_Comp, _Level, Fmt) do{}while(0) #define _func_enter_ do{}while(0) #define _func_exit_ do{}while(0) #define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen) do{}while(0) #ifdef PLATFORM_WINDOWS #define DBG_871X do {} while(0) #define MSG_8192C do {} while(0) #define DBG_8192C do {} while(0) #define DBG_871X_LEVEL do {} while(0) #else #define DBG_871X(x, ...) do {} while(0) #define MSG_8192C(x, ...) do {} while(0) #define DBG_8192C(x,...) do {} while(0) #define DBG_871X_LEVEL(x,...) do {} while(0) #endif #undef _dbgdump #undef _seqdump #ifndef _RTL871X_DEBUG_C_ extern u32 GlobalDebugLevel; extern u64 GlobalDebugComponents; #endif #if defined(PLATFORM_WINDOWS) && defined(PLATFORM_OS_XP) #define _dbgdump DbgPrint #define _seqdump(sel, fmt, arg...) _dbgdump(fmt, ##arg) #elif defined(PLATFORM_WINDOWS) && defined(PLATFORM_OS_CE) #define _dbgdump rtl871x_cedbg #define _seqdump(sel, fmt, arg...) _dbgdump(fmt, ##arg) #elif defined PLATFORM_LINUX #define _dbgdump printk #define _seqdump seq_printf #elif defined PLATFORM_FREEBSD #define _dbgdump printf #define _seqdump(sel, fmt, arg...) _dbgdump(fmt, ##arg) #endif #define DRIVER_PREFIX "RTL871X: " #if defined(_dbgdump) #define DBG_871X_EXP(level, EXP) do { if (level <= GlobalDebugLevel) EXP; } while (0) /* with driver-defined prefix */ #undef DBG_871X_LEVEL #define DBG_871X_LEVEL(level, fmt, arg...) \ do {\ if (level <= GlobalDebugLevel) {\ if (level <= _drv_err_ && level > _drv_always_) \ _dbgdump(DRIVER_PREFIX"ERROR " fmt, ##arg);\ else \ _dbgdump(DRIVER_PREFIX fmt, ##arg);\ }\ }while(0) /* without driver-defined prefix */ #undef _DBG_871X_LEVEL #define _DBG_871X_LEVEL(level, fmt, arg...) \ do {\ if (level <= GlobalDebugLevel) {\ if (level <= _drv_err_ && level > _drv_always_) \ _dbgdump("ERROR " fmt, ##arg);\ else \ _dbgdump(fmt, ##arg);\ }\ }while(0) #if defined(_seqdump) #define RTW_DBGDUMP 0 /* 'stream' for _dbgdump */ /* dump message to selected 'stream' */ #define DBG_871X_SEL(sel, fmt, arg...) \ do {\ if (sel == RTW_DBGDUMP)\ _DBG_871X_LEVEL(_drv_always_, fmt, ##arg); \ else {\ if(_seqdump(sel, fmt, ##arg)) /*rtw_warn_on(1)*/; \ } \ }while(0) /* dump message to selected 'stream' with driver-defined prefix */ #define DBG_871X_SEL_NL(sel, fmt, arg...) \ do {\ if (sel == RTW_DBGDUMP)\ DBG_871X_LEVEL(_drv_always_, fmt, ##arg); \ else {\ if(_seqdump(sel, fmt, ##arg)) /*rtw_warn_on(1)*/; \ } \ }while(0) #endif /* defined(_seqdump) */ #endif /* defined(_dbgdump) */ #ifdef CONFIG_DEBUG #if defined(_dbgdump) #undef DBG_871X #define DBG_871X(...) do {\ _dbgdump(DRIVER_PREFIX __VA_ARGS__);\ }while(0) #undef MSG_8192C #define MSG_8192C(...) do {\ _dbgdump(DRIVER_PREFIX __VA_ARGS__);\ }while(0) #undef DBG_8192C #define DBG_8192C(...) do {\ _dbgdump(DRIVER_PREFIX __VA_ARGS__);\ }while(0) #endif /* defined(_dbgdump) */ #endif /* CONFIG_DEBUG */ #ifdef CONFIG_DEBUG_RTL871X #if defined(_dbgdump) && defined(_MODULE_DEFINE_) #undef RT_TRACE #define RT_TRACE(_Comp, _Level, Fmt)\ do {\ if((_Comp & GlobalDebugComponents) && (_Level <= GlobalDebugLevel)) {\ _dbgdump("%s [0x%08x,%d]", DRIVER_PREFIX, (unsigned int)_Comp, _Level);\ _dbgdump Fmt;\ }\ }while(0) #endif /* defined(_dbgdump) && defined(_MODULE_DEFINE_) */ #if defined(_dbgdump) #undef _func_enter_ #define _func_enter_ \ do { \ if (GlobalDebugLevel >= _drv_debug_) \ { \ _dbgdump("\n %s : %s enters at %d\n", DRIVER_PREFIX, __FUNCTION__, __LINE__);\ } \ } while(0) #undef _func_exit_ #define _func_exit_ \ do { \ if (GlobalDebugLevel >= _drv_debug_) \ { \ _dbgdump("\n %s : %s exits at %d\n", DRIVER_PREFIX, __FUNCTION__, __LINE__); \ } \ } while(0) #undef RT_PRINT_DATA #define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen) \ if(((_Comp) & GlobalDebugComponents) && (_Level <= GlobalDebugLevel)) \ { \ int __i; \ u8 *ptr = (u8 *)_HexData; \ _dbgdump("%s", DRIVER_PREFIX); \ _dbgdump(_TitleString); \ for( __i=0; __i<(int)_HexDataLen; __i++ ) \ { \ _dbgdump("%02X%s", ptr[__i], (((__i + 1) % 4) == 0)?" ":" "); \ if (((__i + 1) % 16) == 0) _dbgdump("\n"); \ } \ _dbgdump("\n"); \ } #endif /* defined(_dbgdump) */ #endif /* CONFIG_DEBUG_RTL871X */ #ifdef CONFIG_DBG_COUNTER #define DBG_COUNTER(counter) counter++ #else #define DBG_COUNTER(counter) #endif void dump_drv_version(void *sel); void dump_log_level(void *sel); #ifdef CONFIG_SDIO_HCI void sd_f0_reg_dump(void *sel, _adapter *adapter); #endif /* CONFIG_SDIO_HCI */ void mac_reg_dump(void *sel, _adapter *adapter); void bb_reg_dump(void *sel, _adapter *adapter); void rf_reg_dump(void *sel, _adapter *adapter); bool rtw_fwdl_test_trigger_chksum_fail(void); bool rtw_fwdl_test_trigger_wintint_rdy_fail(void); u32 rtw_get_wait_hiq_empty_ms(void); void rtw_sink_rtp_seq_dbg( _adapter *adapter,_pkt *pkt); #ifdef CONFIG_PROC_DEBUG ssize_t proc_set_write_reg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_read_reg(struct seq_file *m, void *v); ssize_t proc_set_read_reg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_fwstate(struct seq_file *m, void *v); int proc_get_sec_info(struct seq_file *m, void *v); int proc_get_mlmext_state(struct seq_file *m, void *v); #ifdef CONFIG_LAYER2_ROAMING int proc_get_roam_flags(struct seq_file *m, void *v); ssize_t proc_set_roam_flags(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_roam_param(struct seq_file *m, void *v); ssize_t proc_set_roam_param(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); ssize_t proc_set_roam_tgt_addr(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); #endif /* CONFIG_LAYER2_ROAMING */ int proc_get_qos_option(struct seq_file *m, void *v); int proc_get_ht_option(struct seq_file *m, void *v); int proc_get_rf_info(struct seq_file *m, void *v); int proc_get_survey_info(struct seq_file *m, void *v); int proc_get_ap_info(struct seq_file *m, void *v); int proc_get_adapter_state(struct seq_file *m, void *v); int proc_get_trx_info(struct seq_file *m, void *v); int proc_get_rate_ctl(struct seq_file *m, void *v); int proc_get_wifi_spec(struct seq_file *m, void *v); ssize_t proc_set_rate_ctl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_dis_pwt(struct seq_file *m, void *v); ssize_t proc_set_dis_pwt(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_suspend_resume_info(struct seq_file *m, void *v); ssize_t proc_set_fwdl_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); ssize_t proc_set_wait_hiq_empty(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); #ifdef CONFIG_AP_MODE int proc_get_all_sta_info(struct seq_file *m, void *v); #endif /* CONFIG_AP_MODE */ #ifdef DBG_MEMORY_LEAK int proc_get_malloc_cnt(struct seq_file *m, void *v); #endif /* DBG_MEMORY_LEAK */ #ifdef CONFIG_FIND_BEST_CHANNEL int proc_get_best_channel(struct seq_file *m, void *v); ssize_t proc_set_best_channel(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); #endif /* CONFIG_FIND_BEST_CHANNEL */ int proc_get_rx_signal(struct seq_file *m, void *v); ssize_t proc_set_rx_signal(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_hw_status(struct seq_file *m, void *v); #ifdef CONFIG_80211N_HT int proc_get_ht_enable(struct seq_file *m, void *v); ssize_t proc_set_ht_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_bw_mode(struct seq_file *m, void *v); ssize_t proc_set_bw_mode(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_ampdu_enable(struct seq_file *m, void *v); ssize_t proc_set_ampdu_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_rx_ampdu(struct seq_file *m, void *v); ssize_t proc_set_rx_ampdu(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_rx_stbc(struct seq_file *m, void *v); ssize_t proc_set_rx_stbc(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_rx_ampdu_factor(struct seq_file *m, void *v); ssize_t proc_set_rx_ampdu_factor(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_rx_ampdu_density(struct seq_file *m, void *v); ssize_t proc_set_rx_ampdu_density(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_tx_ampdu_density(struct seq_file *m, void *v); ssize_t proc_set_tx_ampdu_density(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); #endif /* CONFIG_80211N_HT */ int proc_get_en_fwps(struct seq_file *m, void *v); ssize_t proc_set_en_fwps(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); //int proc_get_two_path_rssi(struct seq_file *m, void *v); //int proc_get_rssi_disp(struct seq_file *m, void *v); //ssize_t proc_set_rssi_disp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); #ifdef CONFIG_BT_COEXIST int proc_get_btcoex_dbg(struct seq_file *m, void *v); ssize_t proc_set_btcoex_dbg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_btcoex_info(struct seq_file *m, void *v); #endif /* CONFIG_BT_COEXIST */ #if defined(DBG_CONFIG_ERROR_DETECT) int proc_get_sreset(struct seq_file *m, void *v); ssize_t proc_set_sreset(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); #endif /* DBG_CONFIG_ERROR_DETECT */ int proc_get_odm_dbg_comp(struct seq_file *m, void *v); ssize_t proc_set_odm_dbg_comp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_odm_dbg_level(struct seq_file *m, void *v); ssize_t proc_set_odm_dbg_level(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); int proc_get_odm_adaptivity(struct seq_file *m, void *v); ssize_t proc_set_odm_adaptivity(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); #ifdef CONFIG_DBG_COUNTER int proc_get_rx_logs(struct seq_file *m, void *v); int proc_get_tx_logs(struct seq_file *m, void *v); int proc_get_int_logs(struct seq_file *m, void *v); #endif #ifdef CONFIG_PCI_HCI int proc_get_rx_ring(struct seq_file *m, void *v); int proc_get_tx_ring(struct seq_file *m, void *v); #endif int proc_get_new_bcn_max(struct seq_file *m, void *v); ssize_t proc_set_new_bcn_max(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); #endif /* CONFIG_PROC_DEBUG */ #endif //__RTW_DEBUG_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_eeprom.h000066400000000000000000000114301261122257400214550ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_EEPROM_H__ #define __RTW_EEPROM_H__ #define RTL8712_EEPROM_ID 0x8712 //#define EEPROM_MAX_SIZE 256 #define HWSET_MAX_SIZE_128 128 #define HWSET_MAX_SIZE_256 256 #define HWSET_MAX_SIZE_512 512 #define EEPROM_MAX_SIZE HWSET_MAX_SIZE_512 #define CLOCK_RATE 50 //100us //- EEPROM opcodes #define EEPROM_READ_OPCODE 06 #define EEPROM_WRITE_OPCODE 05 #define EEPROM_ERASE_OPCODE 07 #define EEPROM_EWEN_OPCODE 19 // Erase/write enable #define EEPROM_EWDS_OPCODE 16 // Erase/write disable //Country codes #define USA 0x555320 #define EUROPE 0x1 //temp, should be provided later #define JAPAN 0x2 //temp, should be provided later #ifdef CONFIG_SDIO_HCI #define eeprom_cis0_sz 17 #define eeprom_cis1_sz 50 #endif // // Customer ID, note that: // This variable is initiailzed through EEPROM or registry, // however, its definition may be different with that in EEPROM for // EEPROM size consideration. So, we have to perform proper translation between them. // Besides, CustomerID of registry has precedence of that of EEPROM. // defined below. 060703, by rcnjko. // typedef enum _RT_CUSTOMER_ID { RT_CID_DEFAULT = 0, RT_CID_8187_ALPHA0 = 1, RT_CID_8187_SERCOMM_PS = 2, RT_CID_8187_HW_LED = 3, RT_CID_8187_NETGEAR = 4, RT_CID_WHQL = 5, RT_CID_819x_CAMEO = 6, RT_CID_819x_RUNTOP = 7, RT_CID_819x_Senao = 8, RT_CID_TOSHIBA = 9, // Merge by Jacken, 2008/01/31. RT_CID_819x_Netcore = 10, RT_CID_Nettronix = 11, RT_CID_DLINK = 12, RT_CID_PRONET = 13, RT_CID_COREGA = 14, RT_CID_CHINA_MOBILE = 15, RT_CID_819x_ALPHA = 16, RT_CID_819x_Sitecom = 17, RT_CID_CCX = 18, // It's set under CCX logo test and isn't demanded for CCX functions, but for test behavior like retry limit and tx report. By Bruce, 2009-02-17. RT_CID_819x_Lenovo = 19, RT_CID_819x_QMI = 20, RT_CID_819x_Edimax_Belkin = 21, RT_CID_819x_Sercomm_Belkin = 22, RT_CID_819x_CAMEO1 = 23, RT_CID_819x_MSI = 24, RT_CID_819x_Acer = 25, RT_CID_819x_AzWave_ASUS = 26, RT_CID_819x_AzWave = 27, // For AzWave in PCIe, The ID is AzWave use and not only Asus RT_CID_819x_HP = 28, RT_CID_819x_WNC_COREGA = 29, RT_CID_819x_Arcadyan_Belkin = 30, RT_CID_819x_SAMSUNG = 31, RT_CID_819x_CLEVO = 32, RT_CID_819x_DELL = 33, RT_CID_819x_PRONETS = 34, RT_CID_819x_Edimax_ASUS = 35, RT_CID_NETGEAR = 36, RT_CID_PLANEX = 37, RT_CID_CC_C = 38, RT_CID_819x_Xavi = 39, RT_CID_LENOVO_CHINA = 40, RT_CID_INTEL_CHINA = 41, RT_CID_TPLINK_HPWR = 42, RT_CID_819x_Sercomm_Netgear = 43, RT_CID_819x_ALPHA_Dlink = 44,//add by ylb 20121012 for customer led for alpha RT_CID_WNC_NEC = 45,//add by page for NEC RT_CID_DNI_BUFFALO = 46,//add by page for NEC }RT_CUSTOMER_ID, *PRT_CUSTOMER_ID; struct eeprom_priv { u8 bautoload_fail_flag; u8 bloadfile_fail_flag; u8 bloadmac_fail_flag; u8 EepromOrEfuse; u8 mac_addr[6]; //PermanentAddress u16 channel_plan; u16 CustomerID; u8 efuse_eeprom_data[EEPROM_MAX_SIZE]; //92C:256bytes, 88E:512bytes, we use union set (512bytes) u8 adjuseVoltageVal; #ifdef CONFIG_RF_GAIN_OFFSET u8 EEPROMRFGainOffset; u8 EEPROMRFGainVal; #endif //CONFIG_RF_GAIN_OFFSET #ifdef CONFIG_SDIO_HCI u8 sdio_setting; u32 ocr; u8 cis0[eeprom_cis0_sz]; u8 cis1[eeprom_cis1_sz]; #endif }; extern void eeprom_write16(_adapter *padapter, u16 reg, u16 data); extern u16 eeprom_read16(_adapter *padapter, u16 reg); extern void read_eeprom_content(_adapter *padapter); extern void eeprom_read_sz(_adapter * padapter, u16 reg,u8* data, u32 sz); extern void read_eeprom_content_by_attrib(_adapter * padapter ); #ifdef PLATFORM_LINUX #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE extern int isAdaptorInfoFileValid(void); extern int storeAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv); extern int retriveAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv); #endif //CONFIG_ADAPTOR_INFO_CACHING_FILE #endif //PLATFORM_LINUX #endif //__RTL871X_EEPROM_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_efuse.h000066400000000000000000000127661261122257400213120ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_EFUSE_H__ #define __RTW_EFUSE_H__ #define EFUSE_ERROE_HANDLE 1 #define PG_STATE_HEADER 0x01 #define PG_STATE_WORD_0 0x02 #define PG_STATE_WORD_1 0x04 #define PG_STATE_WORD_2 0x08 #define PG_STATE_WORD_3 0x10 #define PG_STATE_DATA 0x20 #define PG_SWBYTE_H 0x01 #define PG_SWBYTE_L 0x02 #define PGPKT_DATA_SIZE 8 #define EFUSE_WIFI 0 #define EFUSE_BT 1 enum _EFUSE_DEF_TYPE { TYPE_EFUSE_MAX_SECTION = 0, TYPE_EFUSE_REAL_CONTENT_LEN = 1, TYPE_AVAILABLE_EFUSE_BYTES_BANK = 2, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL = 3, TYPE_EFUSE_MAP_LEN = 4, TYPE_EFUSE_PROTECT_BYTES_BANK = 5, TYPE_EFUSE_CONTENT_LEN_BANK = 6, }; #define EFUSE_MAX_MAP_LEN 512 #define EFUSE_MAX_HW_SIZE 512 #define EFUSE_MAX_SECTION_BASE 16 #define EXT_HEADER(header) ((header & 0x1F ) == 0x0F) #define ALL_WORDS_DISABLED(wde) ((wde & 0x0F) == 0x0F) #define GET_HDR_OFFSET_2_0(header) ( (header & 0xE0) >> 5) #define EFUSE_REPEAT_THRESHOLD_ 3 //============================================= // The following is for BT Efuse definition //============================================= #define EFUSE_BT_MAX_MAP_LEN 1024 #define EFUSE_MAX_BANK 4 #define EFUSE_MAX_BT_BANK (EFUSE_MAX_BANK-1) //============================================= /*--------------------------Define Parameters-------------------------------*/ #define EFUSE_MAX_WORD_UNIT 4 /*------------------------------Define structure----------------------------*/ typedef struct PG_PKT_STRUCT_A{ u8 offset; u8 word_en; u8 data[8]; u8 word_cnts; }PGPKT_STRUCT,*PPGPKT_STRUCT; /*------------------------------Define structure----------------------------*/ typedef struct _EFUSE_HAL{ u8 fakeEfuseBank; u32 fakeEfuseUsedBytes; u8 fakeEfuseContent[EFUSE_MAX_HW_SIZE]; u8 fakeEfuseInitMap[EFUSE_MAX_MAP_LEN]; u8 fakeEfuseModifiedMap[EFUSE_MAX_MAP_LEN]; u16 BTEfuseUsedBytes; u8 BTEfuseUsedPercentage; u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; u8 BTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN]; u8 BTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN]; u16 fakeBTEfuseUsedBytes; u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; u8 fakeBTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN]; u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN]; }EFUSE_HAL, *PEFUSE_HAL; /*------------------------Export global variable----------------------------*/ extern u8 fakeEfuseBank; extern u32 fakeEfuseUsedBytes; extern u8 fakeEfuseContent[]; extern u8 fakeEfuseInitMap[]; extern u8 fakeEfuseModifiedMap[]; extern u32 BTEfuseUsedBytes; extern u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; extern u8 BTEfuseInitMap[]; extern u8 BTEfuseModifiedMap[]; extern u32 fakeBTEfuseUsedBytes; extern u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; extern u8 fakeBTEfuseInitMap[]; extern u8 fakeBTEfuseModifiedMap[]; /*------------------------Export global variable----------------------------*/ u8 efuse_GetCurrentSize(PADAPTER padapter, u16 *size); u16 efuse_GetMaxSize(PADAPTER padapter); u8 rtw_efuse_access(PADAPTER padapter, u8 bRead, u16 start_addr, u16 cnts, u8 *data); u8 rtw_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data); u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data); u8 rtw_BT_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data); u8 rtw_BT_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data); u16 Efuse_GetCurrentSize(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest); u8 Efuse_CalculateWordCnts(u8 word_en); void ReadEFuseByte(PADAPTER Adapter, u16 _offset, u8 *pbuf, BOOLEAN bPseudoTest) ; void EFUSE_GetEfuseDefinition(PADAPTER pAdapter, u8 efuseType, u8 type, void *pOut, BOOLEAN bPseudoTest); u8 efuse_OneByteRead(PADAPTER pAdapter, u16 addr, u8 *data, BOOLEAN bPseudoTest); u8 efuse_OneByteWrite(PADAPTER pAdapter, u16 addr, u8 data, BOOLEAN bPseudoTest); void BTEfuse_PowerSwitch(PADAPTER pAdapter,u8 bWrite,u8 PwrState); void Efuse_PowerSwitch(PADAPTER pAdapter,u8 bWrite,u8 PwrState); int Efuse_PgPacketRead(PADAPTER pAdapter, u8 offset, u8 *data, BOOLEAN bPseudoTest); int Efuse_PgPacketWrite(PADAPTER pAdapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest); void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata); u8 Efuse_WordEnableDataWrite(PADAPTER pAdapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest); u8 EFUSE_Read1Byte(PADAPTER pAdapter, u16 Address); void EFUSE_ShadowMapUpdate(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest); void EFUSE_ShadowRead(PADAPTER pAdapter, u8 Type, u16 Offset, u32 *Value); void Rtw_Hal_ReadMACAddrFromFile(PADAPTER padapter); u32 Rtw_Hal_readPGDataFromConfigFile(PADAPTER padapter); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_event.h000066400000000000000000000052121261122257400213100ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTW_EVENT_H_ #define _RTW_EVENT_H_ #ifdef CONFIG_H2CLBK #include #endif /* Used to report a bss has been scanned */ struct survey_event { WLAN_BSSID_EX bss; }; /* Used to report that the requested site survey has been done. bss_cnt indicates the number of bss that has been reported. */ struct surveydone_event { unsigned int bss_cnt; }; /* Used to report the link result of joinning the given bss join_res: -1: authentication fail -2: association fail > 0: TID */ struct joinbss_event { struct wlan_network network; }; /* Used to report a given STA has joinned the created BSS. It is used in AP/Ad-HoC(M) mode. */ struct stassoc_event { unsigned char macaddr[6]; unsigned char rsvd[2]; int cam_id; }; struct stadel_event { unsigned char macaddr[6]; unsigned char rsvd[2]; //for reason int mac_id; }; struct addba_event { unsigned int tid; }; struct wmm_event { unsigned char wmm; }; #ifdef CONFIG_H2CLBK struct c2hlbk_event{ unsigned char mac[6]; unsigned short s0; unsigned short s1; unsigned int w0; unsigned char b0; unsigned short s2; unsigned char b1; unsigned int w1; }; #endif//CONFIG_H2CLBK #define GEN_EVT_CODE(event) event ## _EVT_ struct fwevent { u32 parmsize; void (*event_callback)(_adapter *dev, u8 *pbuf); }; #define C2HEVENT_SZ 32 struct event_node{ unsigned char *node; unsigned char evt_code; unsigned short evt_sz; volatile int *caller_ff_tail; int caller_ff_sz; }; struct c2hevent_queue { volatile int head; volatile int tail; struct event_node nodes[C2HEVENT_SZ]; unsigned char seq; }; #define NETWORK_QUEUE_SZ 4 struct network_queue { volatile int head; volatile int tail; WLAN_BSSID_EX networks[NETWORK_QUEUE_SZ]; }; #endif // _WLANEVENT_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_ht.h000066400000000000000000000172751261122257400206160ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTW_HT_H_ #define _RTW_HT_H_ struct ht_priv { u8 ht_option; u8 ampdu_enable;//for enable Tx A-MPDU u8 tx_amsdu_enable;//for enable Tx A-MSDU u8 bss_coexist;//for 20/40 Bss coexist //u8 baddbareq_issued[16]; u32 tx_amsdu_maxlen; // 1: 8k, 0:4k ; default:8k, for tx u32 rx_ampdu_maxlen; //for rx reordering ctrl win_sz, updated when join_callback. u8 rx_ampdu_min_spacing; u8 ch_offset;//PRIME_CHNL_OFFSET u8 sgi_20m; u8 sgi_40m; //for processing Tx A-MPDU u8 agg_enable_bitmap; //u8 ADDBA_retry_count; u8 candidate_tid_bitmap; u8 ldpc_cap; u8 stbc_cap; u8 beamform_cap; struct rtw_ieee80211_ht_cap ht_cap; }; typedef enum AGGRE_SIZE{ HT_AGG_SIZE_8K = 0, HT_AGG_SIZE_16K = 1, HT_AGG_SIZE_32K = 2, HT_AGG_SIZE_64K = 3, VHT_AGG_SIZE_128K = 4, VHT_AGG_SIZE_256K = 5, VHT_AGG_SIZE_512K = 6, VHT_AGG_SIZE_1024K = 7, }AGGRE_SIZE_E, *PAGGRE_SIZE_E; typedef enum _RT_HT_INF0_CAP{ RT_HT_CAP_USE_TURBO_AGGR = 0x01, RT_HT_CAP_USE_LONG_PREAMBLE = 0x02, RT_HT_CAP_USE_AMPDU = 0x04, RT_HT_CAP_USE_WOW = 0x8, RT_HT_CAP_USE_SOFTAP = 0x10, RT_HT_CAP_USE_92SE = 0x20, RT_HT_CAP_USE_88C_92C = 0x40, RT_HT_CAP_USE_AP_CLIENT_MODE = 0x80, // AP team request to reserve this bit, by Emily }RT_HT_INF0_CAPBILITY, *PRT_HT_INF0_CAPBILITY; typedef enum _RT_HT_INF1_CAP{ RT_HT_CAP_USE_VIDEO_CLIENT = 0x01, RT_HT_CAP_USE_JAGUAR_BCUT = 0x02, RT_HT_CAP_USE_JAGUAR_CCUT = 0x04, }RT_HT_INF1_CAPBILITY, *PRT_HT_INF1_CAPBILITY; #define LDPC_HT_ENABLE_RX BIT0 #define LDPC_HT_ENABLE_TX BIT1 #define LDPC_HT_TEST_TX_ENABLE BIT2 #define LDPC_HT_CAP_TX BIT3 #define STBC_HT_ENABLE_RX BIT0 #define STBC_HT_ENABLE_TX BIT1 #define STBC_HT_TEST_TX_ENABLE BIT2 #define STBC_HT_CAP_TX BIT3 #define BEAMFORMING_HT_BEAMFORMER_ENABLE BIT0 // Declare our NIC supports beamformer #define BEAMFORMING_HT_BEAMFORMEE_ENABLE BIT1 // Declare our NIC supports beamformee #define BEAMFORMING_HT_BEAMFORMER_TEST BIT2 // Transmiting Beamforming no matter the target supports it or not //------------------------------------------------------------ // The HT Control field //------------------------------------------------------------ #define SET_HT_CTRL_CSI_STEERING(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_pEleStart))+2, 6, 2, _val) #define SET_HT_CTRL_NDP_ANNOUNCEMENT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_pEleStart))+3, 0, 1, _val) #define GET_HT_CTRL_NDP_ANNOUNCEMENT(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+3, 0, 1) // 20/40 BSS Coexist #define SET_EXT_CAPABILITY_ELE_BSS_COEXIST(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_pEleStart)), 0, 1, _val) #define GET_EXT_CAPABILITY_ELE_BSS_COEXIST(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart)), 0, 1) /* HT Capabilities Info field */ #define HT_CAP_ELE_CAP_INFO(_pEleStart) ((u8*)(_pEleStart)) #define GET_HT_CAP_ELE_LDPC_CAP(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart)), 0, 1) #define GET_HT_CAP_ELE_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart)), 1, 1) #define GET_HT_CAP_ELE_SM_PS(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart)), 2, 2) #define GET_HT_CAP_ELE_GREENFIELD(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart)), 4, 1) #define GET_HT_CAP_ELE_SHORT_GI20M(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart)), 5, 1) #define GET_HT_CAP_ELE_SHORT_GI40M(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart)), 6, 1) #define GET_HT_CAP_ELE_TX_STBC(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart)), 7, 1) #define GET_HT_CAP_ELE_RX_STBC(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+1, 0, 2) #define GET_HT_CAP_ELE_DELAYED_BA(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+1, 2, 1) #define GET_HT_CAP_ELE_MAX_AMSDU_LENGTH(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+1, 3, 1) #define GET_HT_CAP_ELE_DSSS_CCK_40M(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+1, 4, 1) #define GET_HT_CAP_ELE_FORTY_INTOLERANT(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+1, 6, 1) #define GET_HT_CAP_ELE_LSIG_TXOP_PROTECT(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+1, 7, 1) #define SET_HT_CAP_ELE_FORTY_INTOLERANT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_pEleStart))+1, 6, 1, _val) /* A-MPDU Parameters field */ #define HT_CAP_ELE_AMPDU_PARA(_pEleStart) (((u8*)(_pEleStart))+2) #define GET_HT_CAP_ELE_MAX_AMPDU_LEN_EXP(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+2, 0, 2) #define GET_HT_CAP_ELE_MIN_MPDU_S_SPACE(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+2, 2, 3) #define HT_AMPDU_PARA_FMT "%02x " \ "MAX AMPDU len:%u bytes, MIN MPDU Start Spacing:%u" #define HT_AMPDU_PARA_ARG(x) \ *((u8*)(x)) \ , (1 << (13+GET_HT_CAP_ELE_MAX_AMPDU_LEN_EXP(((u8*)x)-2)))-1 \ , GET_HT_CAP_ELE_MIN_MPDU_S_SPACE(((u8*)x)-2) /* Supported MCS Set field */ #define HT_CAP_ELE_SUP_MCS_SET(_pEleStart) (((u8*)(_pEleStart))+3) #define HT_CAP_ELE_RX_MCS_MAP(_pEleStart) HT_CAP_ELE_SUP_MCS_SET(_pEleStart) #define GET_HT_CAP_ELE_RX_HIGHEST_DATA_RATE(_pEleStart) LE_BITS_TO_2BYTE(((u8*)(_pEleStart))+13, 0, 10) #define GET_HT_CAP_ELE_TX_MCS_DEF(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+15, 0, 1) #define GET_HT_CAP_ELE_TRX_MCS_NEQ(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+15, 1, 1) #define GET_HT_CAP_ELE_TX_MAX_SS(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+15, 2, 2) #define GET_HT_CAP_ELE_TX_UEQM(_pEleStart) LE_BITS_TO_1BYTE(((u8*)(_pEleStart))+15, 4, 1) #define HT_SUP_MCS_SET_FMT "%02x %02x %02x %02x %02x%02x%02x%02x%02x%02x" \ /* "\n%02x%02x%02x%02x%02x%02x" */\ " %uMbps %s%s%s" #define HT_SUP_MCS_SET_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5], \ ((u8*)(x))[6],((u8*)(x))[7],((u8*)(x))[8],((u8*)(x))[9] \ /*,((u8*)(x))[10],((u8*)(x))[11], ((u8*)(x))[12],((u8*)(x))[13],((u8*)(x))[14],((u8*)(x))[15] */\ , GET_HT_CAP_ELE_RX_HIGHEST_DATA_RATE(((u8*)x)-3) \ , GET_HT_CAP_ELE_TX_MCS_DEF(((u8*)x)-3) ? "TX_MCS_DEF " : "" \ , GET_HT_CAP_ELE_TRX_MCS_NEQ(((u8*)x)-3) ? "TRX_MCS_NEQ " : "" \ , GET_HT_CAP_ELE_TX_UEQM(((u8*)x)-3) ? "TX_UEQM " : "" //TXBF Capabilities #define SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE( ((u8*)(_pEleStart))+21, 3, 1, ((u8)_val) ) #define SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE( ((u8*)(_pEleStart))+21, 4, 1, ((u8)_val) ) #define SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE( ((u8*)(_pEleStart))+21, 10, 1, ((u8)_val) ) #define SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE( ((u8*)(_pEleStart))+21, 15, 2, ((u8)_val) ) #define SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(_pEleStart, _val) SET_BITS_TO_LE_4BYTE( ((u8 *)(_pEleStart))+21, 23, 2, ((u8)_val) ) #define GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(_pEleStart) LE_BITS_TO_4BYTE(((u8*)(_pEleStart))+21, 10, 1) #define GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(_pEleStart) LE_BITS_TO_4BYTE(((u8*)(_pEleStart))+21, 15, 2) #endif //_RTL871X_HT_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_io.h000066400000000000000000000377561261122257400206200ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTW_IO_H_ #define _RTW_IO_H_ #define NUM_IOREQ 8 #ifdef PLATFORM_WINDOWS #define MAX_PROT_SZ 64 #endif #ifdef PLATFORM_LINUX #define MAX_PROT_SZ (64-16) #endif #define _IOREADY 0 #define _IO_WAIT_COMPLETE 1 #define _IO_WAIT_RSP 2 // IO COMMAND TYPE #define _IOSZ_MASK_ (0x7F) #define _IO_WRITE_ BIT(7) #define _IO_FIXED_ BIT(8) #define _IO_BURST_ BIT(9) #define _IO_BYTE_ BIT(10) #define _IO_HW_ BIT(11) #define _IO_WORD_ BIT(12) #define _IO_SYNC_ BIT(13) #define _IO_CMDMASK_ (0x1F80) /* For prompt mode accessing, caller shall free io_req Otherwise, io_handler will free io_req */ // IO STATUS TYPE #define _IO_ERR_ BIT(2) #define _IO_SUCCESS_ BIT(1) #define _IO_DONE_ BIT(0) #define IO_RD32 (_IO_SYNC_ | _IO_WORD_) #define IO_RD16 (_IO_SYNC_ | _IO_HW_) #define IO_RD8 (_IO_SYNC_ | _IO_BYTE_) #define IO_RD32_ASYNC (_IO_WORD_) #define IO_RD16_ASYNC (_IO_HW_) #define IO_RD8_ASYNC (_IO_BYTE_) #define IO_WR32 (_IO_WRITE_ | _IO_SYNC_ | _IO_WORD_) #define IO_WR16 (_IO_WRITE_ | _IO_SYNC_ | _IO_HW_) #define IO_WR8 (_IO_WRITE_ | _IO_SYNC_ | _IO_BYTE_) #define IO_WR32_ASYNC (_IO_WRITE_ | _IO_WORD_) #define IO_WR16_ASYNC (_IO_WRITE_ | _IO_HW_) #define IO_WR8_ASYNC (_IO_WRITE_ | _IO_BYTE_) /* Only Sync. burst accessing is provided. */ #define IO_WR_BURST(x) (_IO_WRITE_ | _IO_SYNC_ | _IO_BURST_ | ( (x) & _IOSZ_MASK_)) #define IO_RD_BURST(x) (_IO_SYNC_ | _IO_BURST_ | ( (x) & _IOSZ_MASK_)) //below is for the intf_option bit defition... #define _INTF_ASYNC_ BIT(0) //support async io struct intf_priv; struct intf_hdl; struct io_queue; struct _io_ops { u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr); u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr); u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr); int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val); int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val); int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val); int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata); int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val); int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val); int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val); void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); void (*_sync_irp_protocol_rw)(struct io_queue *pio_q); u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr); u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); u32 (*_write_scsi)(struct intf_hdl *pintfhdl,u32 cnt, u8 *pmem); void (*_read_port_cancel)(struct intf_hdl *pintfhdl); void (*_write_port_cancel)(struct intf_hdl *pintfhdl); #ifdef CONFIG_SDIO_HCI u8 (*_sd_f0_read8)(struct intf_hdl *pintfhdl, u32 addr); #endif }; struct io_req { _list list; u32 addr; volatile u32 val; u32 command; u32 status; u8 *pbuf; _sema sema; #ifdef PLATFORM_OS_CE #ifdef CONFIG_USB_HCI // URB handler for rtw_write_mem USB_TRANSFER usb_transfer_write_mem; #endif #endif void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt); u8 *cnxt; #ifdef PLATFORM_OS_XP PMDL pmdl; PIRP pirp; #ifdef CONFIG_SDIO_HCI PSDBUS_REQUEST_PACKET sdrp; #endif #endif }; struct intf_hdl { /* u32 intf_option; u32 bus_status; u32 do_flush; u8 *adapter; u8 *intf_dev; struct intf_priv *pintfpriv; u8 cnt; void (*intf_hdl_init)(u8 *priv); void (*intf_hdl_unload)(u8 *priv); void (*intf_hdl_open)(u8 *priv); void (*intf_hdl_close)(u8 *priv); struct _io_ops io_ops; //u8 intf_status;//moved to struct intf_priv u16 len; u16 done_len; */ _adapter *padapter; struct dvobj_priv *pintf_dev;// pointer to &(padapter->dvobjpriv); struct _io_ops io_ops; }; struct reg_protocol_rd { #ifdef CONFIG_LITTLE_ENDIAN //DW1 u32 NumOfTrans:4; u32 Reserved1:4; u32 Reserved2:24; //DW2 u32 ByteCount:7; u32 WriteEnable:1; //0:read, 1:write u32 FixOrContinuous:1; //0:continuous, 1: Fix u32 BurstMode:1; u32 Byte1Access:1; u32 Byte2Access:1; u32 Byte4Access:1; u32 Reserved3:3; u32 Reserved4:16; //DW3 u32 BusAddress; //DW4 //u32 Value; #else //DW1 u32 Reserved1 :4; u32 NumOfTrans :4; u32 Reserved2 :24; //DW2 u32 WriteEnable : 1; u32 ByteCount :7; u32 Reserved3 : 3; u32 Byte4Access : 1; u32 Byte2Access : 1; u32 Byte1Access : 1; u32 BurstMode :1 ; u32 FixOrContinuous : 1; u32 Reserved4 : 16; //DW3 u32 BusAddress; //DW4 //u32 Value; #endif }; struct reg_protocol_wt { #ifdef CONFIG_LITTLE_ENDIAN //DW1 u32 NumOfTrans:4; u32 Reserved1:4; u32 Reserved2:24; //DW2 u32 ByteCount:7; u32 WriteEnable:1; //0:read, 1:write u32 FixOrContinuous:1; //0:continuous, 1: Fix u32 BurstMode:1; u32 Byte1Access:1; u32 Byte2Access:1; u32 Byte4Access:1; u32 Reserved3:3; u32 Reserved4:16; //DW3 u32 BusAddress; //DW4 u32 Value; #else //DW1 u32 Reserved1 :4; u32 NumOfTrans :4; u32 Reserved2 :24; //DW2 u32 WriteEnable : 1; u32 ByteCount :7; u32 Reserved3 : 3; u32 Byte4Access : 1; u32 Byte2Access : 1; u32 Byte1Access : 1; u32 BurstMode :1 ; u32 FixOrContinuous : 1; u32 Reserved4 : 16; //DW3 u32 BusAddress; //DW4 u32 Value; #endif }; #ifdef CONFIG_PCI_HCI #define MAX_CONTINUAL_IO_ERR 4 #endif #ifdef CONFIG_USB_HCI #define MAX_CONTINUAL_IO_ERR 4 #endif #ifdef CONFIG_SDIO_HCI #define SD_IO_TRY_CNT (8) #define MAX_CONTINUAL_IO_ERR SD_IO_TRY_CNT #endif #ifdef CONFIG_GSPI_HCI #define SD_IO_TRY_CNT (8) #define MAX_CONTINUAL_IO_ERR SD_IO_TRY_CNT #endif int rtw_inc_and_chk_continual_io_error(struct dvobj_priv *dvobj); void rtw_reset_continual_io_error(struct dvobj_priv *dvobj); /* Below is the data structure used by _io_handler */ struct io_queue { _lock lock; _list free_ioreqs; _list pending; //The io_req list that will be served in the single protocol read/write. _list processing; u8 *free_ioreqs_buf; // 4-byte aligned u8 *pallocated_free_ioreqs_buf; struct intf_hdl intf; }; struct io_priv{ _adapter *padapter; struct intf_hdl intf; }; extern uint ioreq_flush(_adapter *adapter, struct io_queue *ioqueue); extern void sync_ioreq_enqueue(struct io_req *preq,struct io_queue *ioqueue); extern uint sync_ioreq_flush(_adapter *adapter, struct io_queue *ioqueue); extern uint free_ioreq(struct io_req *preq, struct io_queue *pio_queue); extern struct io_req *alloc_ioreq(struct io_queue *pio_q); extern uint register_intf_hdl(u8 *dev, struct intf_hdl *pintfhdl); extern void unregister_intf_hdl(struct intf_hdl *pintfhdl); extern void _rtw_attrib_read(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); extern void _rtw_attrib_write(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); extern u8 _rtw_read8(_adapter *adapter, u32 addr); extern u16 _rtw_read16(_adapter *adapter, u32 addr); extern u32 _rtw_read32(_adapter *adapter, u32 addr); extern void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); extern void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); extern void _rtw_read_port_cancel(_adapter *adapter); extern int _rtw_write8(_adapter *adapter, u32 addr, u8 val); extern int _rtw_write16(_adapter *adapter, u32 addr, u16 val); extern int _rtw_write32(_adapter *adapter, u32 addr, u32 val); extern int _rtw_writeN(_adapter *adapter, u32 addr, u32 length, u8 *pdata); extern u8 _rtw_sd_f0_read8(_adapter *adapter, u32 addr); extern int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val); extern int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val); extern int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val); extern void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); extern u32 _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms); extern void _rtw_write_port_cancel(_adapter *adapter); #ifdef DBG_IO bool match_read_sniff_ranges(u16 addr, u16 len); bool match_write_sniff_ranges(u16 addr, u16 len); extern u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line); extern u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line); extern u32 dbg_rtw_read32(_adapter *adapter, u32 addr, const char *caller, const int line); extern int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line); extern int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line); extern int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line); extern int dbg_rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *data, const char *caller, const int line); #define rtw_read8(adapter, addr) dbg_rtw_read8((adapter), (addr), __FUNCTION__, __LINE__) #define rtw_read16(adapter, addr) dbg_rtw_read16((adapter), (addr), __FUNCTION__, __LINE__) #define rtw_read32(adapter, addr) dbg_rtw_read32((adapter), (addr), __FUNCTION__, __LINE__) #define rtw_read_mem(adapter, addr, cnt, mem) _rtw_read_mem((adapter), (addr), (cnt), (mem)) #define rtw_read_port(adapter, addr, cnt, mem) _rtw_read_port((adapter), (addr), (cnt), (mem)) #define rtw_read_port_cancel(adapter) _rtw_read_port_cancel((adapter)) #define rtw_write8(adapter, addr, val) dbg_rtw_write8((adapter), (addr), (val), __FUNCTION__, __LINE__) #define rtw_write16(adapter, addr, val) dbg_rtw_write16((adapter), (addr), (val), __FUNCTION__, __LINE__) #define rtw_write32(adapter, addr, val) dbg_rtw_write32((adapter), (addr), (val), __FUNCTION__, __LINE__) #define rtw_writeN(adapter, addr, length, data) dbg_rtw_writeN((adapter), (addr), (length), (data), __FUNCTION__, __LINE__) #define rtw_write8_async(adapter, addr, val) _rtw_write8_async((adapter), (addr), (val)) #define rtw_write16_async(adapter, addr, val) _rtw_write16_async((adapter), (addr), (val)) #define rtw_write32_async(adapter, addr, val) _rtw_write32_async((adapter), (addr), (val)) #define rtw_write_mem(adapter, addr, cnt, mem) _rtw_write_mem((adapter), addr, cnt, mem) #define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port(adapter, addr, cnt, mem) #define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms)) #define rtw_write_port_cancel(adapter) _rtw_write_port_cancel(adapter) #else //DBG_IO #define rtw_read8(adapter, addr) _rtw_read8((adapter), (addr)) #define rtw_read16(adapter, addr) _rtw_read16((adapter), (addr)) #define rtw_read32(adapter, addr) _rtw_read32((adapter), (addr)) #define rtw_read_mem(adapter, addr, cnt, mem) _rtw_read_mem((adapter), (addr), (cnt), (mem)) #define rtw_read_port(adapter, addr, cnt, mem) _rtw_read_port((adapter), (addr), (cnt), (mem)) #define rtw_read_port_cancel(adapter) _rtw_read_port_cancel((adapter)) #define rtw_write8(adapter, addr, val) _rtw_write8((adapter), (addr), (val)) #define rtw_write16(adapter, addr, val) _rtw_write16((adapter), (addr), (val)) #define rtw_write32(adapter, addr, val) _rtw_write32((adapter), (addr), (val)) #define rtw_writeN(adapter, addr, length, data) _rtw_writeN((adapter), (addr), (length), (data)) #define rtw_write8_async(adapter, addr, val) _rtw_write8_async((adapter), (addr), (val)) #define rtw_write16_async(adapter, addr, val) _rtw_write16_async((adapter), (addr), (val)) #define rtw_write32_async(adapter, addr, val) _rtw_write32_async((adapter), (addr), (val)) #define rtw_write_mem(adapter, addr, cnt, mem) _rtw_write_mem((adapter), (addr), (cnt), (mem)) #define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port((adapter), (addr), (cnt), (mem)) #define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms)) #define rtw_write_port_cancel(adapter) _rtw_write_port_cancel((adapter)) #endif //DBG_IO #define rtw_sd_f0_read8(adapter, addr) _rtw_sd_f0_read8((adapter), (addr)) extern void rtw_write_scsi(_adapter *adapter, u32 cnt, u8 *pmem); //ioreq extern void ioreq_read8(_adapter *adapter, u32 addr, u8 *pval); extern void ioreq_read16(_adapter *adapter, u32 addr, u16 *pval); extern void ioreq_read32(_adapter *adapter, u32 addr, u32 *pval); extern void ioreq_write8(_adapter *adapter, u32 addr, u8 val); extern void ioreq_write16(_adapter *adapter, u32 addr, u16 val); extern void ioreq_write32(_adapter *adapter, u32 addr, u32 val); extern uint async_read8(_adapter *adapter, u32 addr, u8 *pbuff, void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); extern uint async_read16(_adapter *adapter, u32 addr, u8 *pbuff, void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); extern uint async_read32(_adapter *adapter, u32 addr, u8 *pbuff, void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); extern void async_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); extern void async_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); extern void async_write8(_adapter *adapter, u32 addr, u8 val, void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); extern void async_write16(_adapter *adapter, u32 addr, u16 val, void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); extern void async_write32(_adapter *adapter, u32 addr, u32 val, void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); extern void async_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); extern void async_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); int rtw_init_io_priv(_adapter *padapter, void (*set_intf_ops)(_adapter *padapter,struct _io_ops *pops)); extern uint alloc_io_queue(_adapter *adapter); extern void free_io_queue(_adapter *adapter); extern void async_bus_io(struct io_queue *pio_q); extern void bus_sync_io(struct io_queue *pio_q); extern u32 _ioreq2rwmem(struct io_queue *pio_q); extern void dev_power_down(_adapter * Adapter, u8 bpwrup); /* #define RTL_R8(reg) rtw_read8(padapter, reg) #define RTL_R16(reg) rtw_read16(padapter, reg) #define RTL_R32(reg) rtw_read32(padapter, reg) #define RTL_W8(reg, val8) rtw_write8(padapter, reg, val8) #define RTL_W16(reg, val16) rtw_write16(padapter, reg, val16) #define RTL_W32(reg, val32) rtw_write32(padapter, reg, val32) */ /* #define RTL_W8_ASYNC(reg, val8) rtw_write32_async(padapter, reg, val8) #define RTL_W16_ASYNC(reg, val16) rtw_write32_async(padapter, reg, val16) #define RTL_W32_ASYNC(reg, val32) rtw_write32_async(padapter, reg, val32) #define RTL_WRITE_BB(reg, val32) phy_SetUsbBBReg(padapter, reg, val32) #define RTL_READ_BB(reg) phy_QueryUsbBBReg(padapter, reg) */ #define PlatformEFIOWrite1Byte(_a,_b,_c) \ rtw_write8(_a,_b,_c) #define PlatformEFIOWrite2Byte(_a,_b,_c) \ rtw_write16(_a,_b,_c) #define PlatformEFIOWrite4Byte(_a,_b,_c) \ rtw_write32(_a,_b,_c) #define PlatformEFIORead1Byte(_a,_b) \ rtw_read8(_a,_b) #define PlatformEFIORead2Byte(_a,_b) \ rtw_read16(_a,_b) #define PlatformEFIORead4Byte(_a,_b) \ rtw_read32(_a,_b) #endif //_RTL8711_IO_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_ioctl.h000066400000000000000000000343521261122257400213100ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTW_IOCTL_H_ #define _RTW_IOCTL_H_ #ifndef PLATFORM_WINDOWS // 00 - Success // 11 - Error #define STATUS_SUCCESS (0x00000000L) #define STATUS_PENDING (0x00000103L) #define STATUS_UNSUCCESSFUL (0xC0000001L) #define STATUS_INSUFFICIENT_RESOURCES (0xC000009AL) #define STATUS_NOT_SUPPORTED (0xC00000BBL) #define NDIS_STATUS_SUCCESS ((NDIS_STATUS)STATUS_SUCCESS) #define NDIS_STATUS_PENDING ((NDIS_STATUS)STATUS_PENDING) #define NDIS_STATUS_NOT_RECOGNIZED ((NDIS_STATUS)0x00010001L) #define NDIS_STATUS_NOT_COPIED ((NDIS_STATUS)0x00010002L) #define NDIS_STATUS_NOT_ACCEPTED ((NDIS_STATUS)0x00010003L) #define NDIS_STATUS_CALL_ACTIVE ((NDIS_STATUS)0x00010007L) #define NDIS_STATUS_FAILURE ((NDIS_STATUS)STATUS_UNSUCCESSFUL) #define NDIS_STATUS_RESOURCES ((NDIS_STATUS)STATUS_INSUFFICIENT_RESOURCES) #define NDIS_STATUS_CLOSING ((NDIS_STATUS)0xC0010002L) #define NDIS_STATUS_BAD_VERSION ((NDIS_STATUS)0xC0010004L) #define NDIS_STATUS_BAD_CHARACTERISTICS ((NDIS_STATUS)0xC0010005L) #define NDIS_STATUS_ADAPTER_NOT_FOUND ((NDIS_STATUS)0xC0010006L) #define NDIS_STATUS_OPEN_FAILED ((NDIS_STATUS)0xC0010007L) #define NDIS_STATUS_DEVICE_FAILED ((NDIS_STATUS)0xC0010008L) #define NDIS_STATUS_MULTICAST_FULL ((NDIS_STATUS)0xC0010009L) #define NDIS_STATUS_MULTICAST_EXISTS ((NDIS_STATUS)0xC001000AL) #define NDIS_STATUS_MULTICAST_NOT_FOUND ((NDIS_STATUS)0xC001000BL) #define NDIS_STATUS_REQUEST_ABORTED ((NDIS_STATUS)0xC001000CL) #define NDIS_STATUS_RESET_IN_PROGRESS ((NDIS_STATUS)0xC001000DL) #define NDIS_STATUS_CLOSING_INDICATING ((NDIS_STATUS)0xC001000EL) #define NDIS_STATUS_NOT_SUPPORTED ((NDIS_STATUS)STATUS_NOT_SUPPORTED) #define NDIS_STATUS_INVALID_PACKET ((NDIS_STATUS)0xC001000FL) #define NDIS_STATUS_OPEN_LIST_FULL ((NDIS_STATUS)0xC0010010L) #define NDIS_STATUS_ADAPTER_NOT_READY ((NDIS_STATUS)0xC0010011L) #define NDIS_STATUS_ADAPTER_NOT_OPEN ((NDIS_STATUS)0xC0010012L) #define NDIS_STATUS_NOT_INDICATING ((NDIS_STATUS)0xC0010013L) #define NDIS_STATUS_INVALID_LENGTH ((NDIS_STATUS)0xC0010014L) #define NDIS_STATUS_INVALID_DATA ((NDIS_STATUS)0xC0010015L) #define NDIS_STATUS_BUFFER_TOO_SHORT ((NDIS_STATUS)0xC0010016L) #define NDIS_STATUS_INVALID_OID ((NDIS_STATUS)0xC0010017L) #define NDIS_STATUS_ADAPTER_REMOVED ((NDIS_STATUS)0xC0010018L) #define NDIS_STATUS_UNSUPPORTED_MEDIA ((NDIS_STATUS)0xC0010019L) #define NDIS_STATUS_GROUP_ADDRESS_IN_USE ((NDIS_STATUS)0xC001001AL) #define NDIS_STATUS_FILE_NOT_FOUND ((NDIS_STATUS)0xC001001BL) #define NDIS_STATUS_ERROR_READING_FILE ((NDIS_STATUS)0xC001001CL) #define NDIS_STATUS_ALREADY_MAPPED ((NDIS_STATUS)0xC001001DL) #define NDIS_STATUS_RESOURCE_CONFLICT ((NDIS_STATUS)0xC001001EL) #define NDIS_STATUS_NO_CABLE ((NDIS_STATUS)0xC001001FL) #define NDIS_STATUS_INVALID_SAP ((NDIS_STATUS)0xC0010020L) #define NDIS_STATUS_SAP_IN_USE ((NDIS_STATUS)0xC0010021L) #define NDIS_STATUS_INVALID_ADDRESS ((NDIS_STATUS)0xC0010022L) #define NDIS_STATUS_VC_NOT_ACTIVATED ((NDIS_STATUS)0xC0010023L) #define NDIS_STATUS_DEST_OUT_OF_ORDER ((NDIS_STATUS)0xC0010024L) // cause 27 #define NDIS_STATUS_VC_NOT_AVAILABLE ((NDIS_STATUS)0xC0010025L) // cause 35,45 #define NDIS_STATUS_CELLRATE_NOT_AVAILABLE ((NDIS_STATUS)0xC0010026L) // cause 37 #define NDIS_STATUS_INCOMPATABLE_QOS ((NDIS_STATUS)0xC0010027L) // cause 49 #define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED ((NDIS_STATUS)0xC0010028L) // cause 93 #define NDIS_STATUS_NO_ROUTE_TO_DESTINATION ((NDIS_STATUS)0xC0010029L) // cause 3 #endif /* #ifndef PLATFORM_WINDOWS */ #ifndef OID_802_11_CAPABILITY #define OID_802_11_CAPABILITY 0x0d010122 #endif #ifndef OID_802_11_PMKID #define OID_802_11_PMKID 0x0d010123 #endif // For DDK-defined OIDs #define OID_NDIS_SEG1 0x00010100 #define OID_NDIS_SEG2 0x00010200 #define OID_NDIS_SEG3 0x00020100 #define OID_NDIS_SEG4 0x01010100 #define OID_NDIS_SEG5 0x01020100 #define OID_NDIS_SEG6 0x01020200 #define OID_NDIS_SEG7 0xFD010100 #define OID_NDIS_SEG8 0x0D010100 #define OID_NDIS_SEG9 0x0D010200 #define OID_NDIS_SEG10 0x0D020200 #define SZ_OID_NDIS_SEG1 23 #define SZ_OID_NDIS_SEG2 3 #define SZ_OID_NDIS_SEG3 6 #define SZ_OID_NDIS_SEG4 6 #define SZ_OID_NDIS_SEG5 4 #define SZ_OID_NDIS_SEG6 8 #define SZ_OID_NDIS_SEG7 7 #define SZ_OID_NDIS_SEG8 36 #define SZ_OID_NDIS_SEG9 24 #define SZ_OID_NDIS_SEG10 19 // For Realtek-defined OIDs #define OID_MP_SEG1 0xFF871100 #define OID_MP_SEG2 0xFF818000 #define OID_MP_SEG3 0xFF818700 #define OID_MP_SEG4 0xFF011100 #define DEBUG_OID(dbg, str) \ if((!dbg)) \ { \ RT_TRACE(_module_rtl871x_ioctl_c_,_drv_info_,("%s(%d): %s", __FUNCTION__, __LINE__, str)); \ } enum oid_type { QUERY_OID, SET_OID }; struct oid_funs_node { unsigned int oid_start; //the starting number for OID unsigned int oid_end; //the ending number for OID struct oid_obj_priv *node_array; unsigned int array_sz; //the size of node_array int query_counter; //count the number of query hits for this segment int set_counter; //count the number of set hits for this segment }; struct oid_par_priv { void *adapter_context; NDIS_OID oid; void *information_buf; u32 information_buf_len; u32 *bytes_rw; u32 *bytes_needed; enum oid_type type_of_oid; u32 dbg; }; struct oid_obj_priv { unsigned char dbg; // 0: without OID debug message 1: with OID debug message NDIS_STATUS (*oidfuns)(struct oid_par_priv *poid_par_priv); }; #if (defined(CONFIG_MP_INCLUDED) && defined(_RTW_MP_IOCTL_C_)) || \ (defined(PLATFORM_WINDOWS) && defined(_RTW_IOCTL_RTL_C_)) static NDIS_STATUS oid_null_function(struct oid_par_priv* poid_par_priv) { _func_enter_; _func_exit_; return NDIS_STATUS_SUCCESS; } #endif #ifdef PLATFORM_WINDOWS int TranslateNdisPsToRtPs(IN NDIS_802_11_POWER_MODE ndisPsMode); //OID Handler for Segment 1 NDIS_STATUS oid_gen_supported_list_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_hardware_status_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_media_supported_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_media_in_use_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_maximum_lookahead_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_maximum_frame_size_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_link_speed_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_transmit_buffer_space_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_receive_buffer_space_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_transmit_block_size_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_receive_block_size_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_vendor_id_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_vendor_description_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_current_packet_filter_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_current_lookahead_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_driver_version_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_maximum_total_size_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_protocol_options_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_mac_options_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_media_connect_status_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_maximum_send_packets_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_vendor_driver_version_hdl(struct oid_par_priv* poid_par_priv); //OID Handler for Segment 2 NDIS_STATUS oid_gen_physical_medium_hdl(struct oid_par_priv* poid_par_priv); //OID Handler for Segment 3 NDIS_STATUS oid_gen_xmit_ok_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_rcv_ok_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_xmit_error_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_rcv_error_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_gen_rcv_no_buffer_hdl(struct oid_par_priv* poid_par_priv); //OID Handler for Segment 4 NDIS_STATUS oid_802_3_permanent_address_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_3_current_address_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_3_multicast_list_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_3_maximum_list_size_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_3_mac_options_hdl(struct oid_par_priv* poid_par_priv); //OID Handler for Segment 5 NDIS_STATUS oid_802_3_rcv_error_alignment_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_3_xmit_one_collision_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_3_xmit_more_collisions_hdl(struct oid_par_priv* poid_par_priv); //OID Handler for Segment 6 NDIS_STATUS oid_802_3_xmit_deferred_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_3_xmit_max_collisions_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_3_rcv_overrun_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_3_xmit_underrun_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_3_xmit_heartbeat_failure_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_3_xmit_times_crs_lost_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_3_xmit_late_collisions_hdl(struct oid_par_priv* poid_par_priv); //OID Handler for Segment 7 NDIS_STATUS oid_pnp_capabilities_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_pnp_set_power_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_pnp_query_power_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_pnp_add_wake_up_pattern_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_pnp_remove_wake_up_pattern_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_pnp_wake_up_pattern_list_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_pnp_enable_wake_up_hdl(struct oid_par_priv* poid_par_priv); //OID Handler for Segment 8 NDIS_STATUS oid_802_11_bssid_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_ssid_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_infrastructure_mode_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_add_wep_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_remove_wep_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_disassociate_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_authentication_mode_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_privacy_filter_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_bssid_list_scan_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_encryption_status_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_reload_defaults_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_add_key_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_remove_key_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_association_information_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_test_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_media_stream_mode_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_capability_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_pmkid_hdl(struct oid_par_priv* poid_par_priv); //OID Handler for Segment 9 NDIS_STATUS oid_802_11_network_types_supported_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_network_type_in_use_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_tx_power_level_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_rssi_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_rssi_trigger_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_fragmentation_threshold_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_rts_threshold_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_number_of_antennas_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_rx_antenna_selected_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_tx_antenna_selected_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_supported_rates_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_desired_rates_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_configuration_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_power_mode_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_802_11_bssid_list_hdl(struct oid_par_priv* poid_par_priv); //OID Handler for Segment 10 NDIS_STATUS oid_802_11_statistics_hdl(struct oid_par_priv* poid_par_priv); //OID Handler for Segment ED NDIS_STATUS oid_rt_mh_vender_id_hdl(struct oid_par_priv* poid_par_priv); void Set_802_3_MULTICAST_LIST(ADAPTER *pAdapter, UCHAR *MCListbuf, ULONG MCListlen, BOOLEAN bAcceptAllMulticast); #endif// end of PLATFORM_WINDOWS #if defined(PLATFORM_LINUX) && defined(CONFIG_WIRELESS_EXT) extern struct iw_handler_def rtw_handlers_def; #endif extern void rtw_request_wps_pbc_event(_adapter *padapter); extern NDIS_STATUS drv_query_info( IN _nic_hdl MiniportAdapterContext, IN NDIS_OID Oid, IN void * InformationBuffer, IN u32 InformationBufferLength, OUT u32* BytesWritten, OUT u32* BytesNeeded ); extern NDIS_STATUS drv_set_info( IN _nic_hdl MiniportAdapterContext, IN NDIS_OID Oid, IN void * InformationBuffer, IN u32 InformationBufferLength, OUT u32* BytesRead, OUT u32* BytesNeeded ); #endif // #ifndef __INC_CEINFO_ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_ioctl_query.h000066400000000000000000000023041261122257400225250ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTW_IOCTL_QUERY_H_ #define _RTW_IOCTL_QUERY_H_ #ifdef PLATFORM_WINDOWS u8 query_802_11_capability(_adapter* padapter,u8* pucBuf,u32 * pulOutLen); u8 query_802_11_association_information (_adapter * padapter, PNDIS_802_11_ASSOCIATION_INFORMATION pAssocInfo); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_ioctl_rtl.h000066400000000000000000000110401261122257400221560ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTW_IOCTL_RTL_H_ #define _RTW_IOCTL_RTL_H_ //************** oid_rtl_seg_01_01 ************** NDIS_STATUS oid_rt_get_signal_quality_hdl(struct oid_par_priv* poid_par_priv);//84 NDIS_STATUS oid_rt_get_small_packet_crc_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_middle_packet_crc_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_large_packet_crc_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_tx_retry_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_rx_retry_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_rx_total_packet_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_tx_beacon_ok_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_tx_beacon_err_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_set_fw_dig_state_hdl(struct oid_par_priv* poid_par_priv); //8a NDIS_STATUS oid_rt_pro_set_fw_ra_state_hdl(struct oid_par_priv* poid_par_priv); //8b NDIS_STATUS oid_rt_get_rx_icv_err_hdl(struct oid_par_priv* poid_par_priv);//93 NDIS_STATUS oid_rt_set_encryption_algorithm_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_preamble_mode_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_ap_ip_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_channelplan_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_set_channelplan_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_set_preamble_mode_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_set_bcn_intvl_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_dedicate_probe_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_total_tx_bytes_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_total_rx_bytes_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_current_tx_power_level_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_enc_key_mismatch_count_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_enc_key_match_count_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_channel_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_hardware_radio_off_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_key_mismatch_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_supported_wireless_mode_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_channel_list_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_scan_in_progress_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_forced_data_rate_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_wireless_mode_for_scan_list_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_bss_wireless_mode_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_scan_with_magic_packet_hdl(struct oid_par_priv* poid_par_priv); //************** oid_rtl_seg_01_03 section start ************** NDIS_STATUS oid_rt_ap_get_associated_station_list_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_ap_switch_into_ap_mode_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_ap_supported_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_ap_set_passphrase_hdl(struct oid_par_priv* poid_par_priv); // oid_rtl_seg_01_11 NDIS_STATUS oid_rt_pro_rf_write_registry_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_rf_read_registry_hdl(struct oid_par_priv* poid_par_priv); //************** oid_rtl_seg_03_00 section start ************** NDIS_STATUS oid_rt_get_connect_state_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_set_default_key_id_hdl(struct oid_par_priv* poid_par_priv); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_ioctl_set.h000066400000000000000000000057001261122257400221560ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_IOCTL_SET_H_ #define __RTW_IOCTL_SET_H_ typedef u8 NDIS_802_11_PMKID_VALUE[16]; typedef struct _BSSIDInfo { NDIS_802_11_MAC_ADDRESS BSSID; NDIS_802_11_PMKID_VALUE PMKID; } BSSIDInfo, *PBSSIDInfo; #ifdef PLATFORM_OS_XP typedef struct _NDIS_802_11_PMKID { u32 Length; u32 BSSIDInfoCount; BSSIDInfo BSSIDInfo[1]; } NDIS_802_11_PMKID, *PNDIS_802_11_PMKID; #endif #ifdef PLATFORM_WINDOWS u8 rtw_set_802_11_reload_defaults(_adapter * padapter, NDIS_802_11_RELOAD_DEFAULTS reloadDefaults); u8 rtw_set_802_11_test(_adapter * padapter, NDIS_802_11_TEST * test); u8 rtw_set_802_11_pmkid(_adapter *pdapter, NDIS_802_11_PMKID *pmkid); u8 rtw_pnp_set_power_sleep(_adapter* padapter); u8 rtw_pnp_set_power_wakeup(_adapter* padapter); void rtw_pnp_resume_wk(void *context); void rtw_pnp_sleep_wk(void * context); #endif u8 rtw_set_802_11_add_key(_adapter * padapter, NDIS_802_11_KEY * key); u8 rtw_set_802_11_authentication_mode(_adapter *pdapter, NDIS_802_11_AUTHENTICATION_MODE authmode); u8 rtw_set_802_11_bssid(_adapter* padapter, u8 *bssid); u8 rtw_set_802_11_add_wep(_adapter * padapter, NDIS_802_11_WEP * wep); u8 rtw_set_802_11_disassociate(_adapter * padapter); u8 rtw_set_802_11_bssid_list_scan(_adapter* padapter, NDIS_802_11_SSID *pssid, int ssid_max_num); u8 rtw_set_802_11_infrastructure_mode(_adapter * padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype); u8 rtw_set_802_11_remove_wep(_adapter * padapter, u32 keyindex); u8 rtw_set_802_11_ssid(_adapter * padapter, NDIS_802_11_SSID * ssid); u8 rtw_set_802_11_connect(_adapter* padapter, u8 *bssid, NDIS_802_11_SSID *ssid); u8 rtw_set_802_11_remove_key(_adapter * padapter, NDIS_802_11_REMOVE_KEY * key); u8 rtw_validate_bssid(u8 *bssid); u8 rtw_validate_ssid(NDIS_802_11_SSID *ssid); u16 rtw_get_cur_max_rate(_adapter *adapter); int rtw_set_scan_mode(_adapter *adapter, RT_SCAN_TYPE scan_mode); int rtw_set_channel_plan(_adapter *adapter, u8 channel_plan); int rtw_set_country(_adapter *adapter, const char *country_code); int rtw_set_band(_adapter *adapter, enum _BAND band); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_iol.h000066400000000000000000000133621261122257400207570ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_IOL_H_ #define __RTW_IOL_H_ struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter); int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len); int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary); int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt); bool rtw_IOL_applied(ADAPTER *adapter); int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us); int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms); int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame); #ifdef CONFIG_IOL_NEW_GENERATION #define IOREG_CMD_END_LEN 4 struct ioreg_cfg{ u8 length; u8 cmd_id; u16 address; u32 data; u32 mask; }; enum ioreg_cmd{ IOREG_CMD_LLT = 0x01, IOREG_CMD_REFUSE = 0x02, IOREG_CMD_EFUSE_PATH = 0x03, IOREG_CMD_WB_REG = 0x04, IOREG_CMD_WW_REG = 0x05, IOREG_CMD_WD_REG = 0x06, IOREG_CMD_W_RF = 0x07, IOREG_CMD_DELAY_US = 0x10, IOREG_CMD_DELAY_MS = 0x11, IOREG_CMD_END = 0xFF, }; void read_efuse_from_txpktbuf(ADAPTER *adapter, int bcnhead, u8 *content, u16 *size); int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, u8 mask); int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, u16 mask); int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, u32 mask); int _rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path, u16 addr, u32 value, u32 mask); #define rtw_IOL_append_WB_cmd(xmit_frame, addr, value,mask) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value) ,(mask)) #define rtw_IOL_append_WW_cmd(xmit_frame, addr, value,mask) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value),(mask)) #define rtw_IOL_append_WD_cmd(xmit_frame, addr, value,mask) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value),(mask)) #define rtw_IOL_append_WRF_cmd(xmit_frame, rf_path, addr, value,mask) _rtw_IOL_append_WRF_cmd((xmit_frame),(rf_path), (addr), (value),(mask)) u8 rtw_IOL_cmd_boundary_handle(struct xmit_frame *pxmit_frame); void rtw_IOL_cmd_buf_dump(ADAPTER *Adapter,int buf_len,u8 *pbuf); #ifdef CONFIG_IOL_IOREG_CFG_DBG struct cmd_cmp{ u16 addr; u32 value; }; #endif #else //CONFIG_IOL_NEW_GENERATION typedef struct _io_offload_cmd { u8 rsvd0; u8 cmd; u16 address; u32 value; } IO_OFFLOAD_CMD, IOL_CMD; #define IOL_CMD_LLT 0x00 //#define IOL_CMD_R_EFUSE 0x01 #define IOL_CMD_WB_REG 0x02 #define IOL_CMD_WW_REG 0x03 #define IOL_CMD_WD_REG 0x04 //#define IOL_CMD_W_RF 0x05 #define IOL_CMD_DELAY_US 0x80 #define IOL_CMD_DELAY_MS 0x81 //#define IOL_CMD_DELAY_S 0x82 #define IOL_CMD_END 0x83 /***************************************************** CMD Address Value (B1) (B2/B3:H/L addr) (B4:B7 : MSB:LSB) ****************************************************** IOL_CMD_LLT - B7: PGBNDY //IOL_CMD_R_EFUSE - - IOL_CMD_WB_REG 0x0~0xFFFF B7 IOL_CMD_WW_REG 0x0~0xFFFF B6~B7 IOL_CMD_WD_REG 0x0~0xFFFF B4~B7 //IOL_CMD_W_RF RF Reg B5~B7 IOL_CMD_DELAY_US - B6~B7 IOL_CMD_DELAY_MS - B6~B7 //IOL_CMD_DELAY_S - B6~B7 IOL_CMD_END - - ******************************************************/ int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value); int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value); int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value); int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms); int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms); #ifdef DBG_IO int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line); int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line); int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line); #define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) #define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) #define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) #else #define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value)) #define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value)) #define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value)) #endif // DBG_IO #endif // CONFIG_IOL_NEW_GENERATION #endif //__RTW_IOL_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_mem.h000066400000000000000000000024721261122257400207520ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_MEM_H__ #define __RTW_MEM_H__ #include #include #include #ifndef MAX_RECVBUF_SZ #define MAX_RECVBUF_SZ (32768-RECVBUFF_ALIGN_SZ) // 32k #endif struct u8* rtw_alloc_revcbuf_premem(void); struct sk_buff *rtw_alloc_skb_premem(void); int rtw_free_skb_premem(struct sk_buff *pskb); #endif //__RTW_MEM_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_mlme.h000066400000000000000000000747071261122257400211400ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_MLME_H_ #define __RTW_MLME_H_ #define MAX_BSS_CNT 128 //#define MAX_JOIN_TIMEOUT 2000 //#define MAX_JOIN_TIMEOUT 2500 #define MAX_JOIN_TIMEOUT 6500 // Commented by Albert 20101105 // Increase the scanning timeout because of increasing the SURVEY_TO value. #define SCANNING_TIMEOUT 8000 #ifdef PALTFORM_OS_WINCE #define SCANQUEUE_LIFETIME 12000000 // unit:us #else #define SCANQUEUE_LIFETIME 20000 // 20sec, unit:msec #endif #define WIFI_NULL_STATE 0x00000000 #define WIFI_ASOC_STATE 0x00000001 // Under Linked state... #define WIFI_REASOC_STATE 0x00000002 #define WIFI_SLEEP_STATE 0x00000004 #define WIFI_STATION_STATE 0x00000008 #define WIFI_AP_STATE 0x00000010 #define WIFI_ADHOC_STATE 0x00000020 #define WIFI_ADHOC_MASTER_STATE 0x00000040 #define WIFI_UNDER_LINKING 0x00000080 #define WIFI_UNDER_WPS 0x00000100 //#define WIFI_UNDER_CMD 0x00000200 //#define WIFI_UNDER_P2P 0x00000400 #define WIFI_STA_ALIVE_CHK_STATE 0x00000400 #define WIFI_SITE_MONITOR 0x00000800 //to indicate the station is under site surveying #ifdef WDS #define WIFI_WDS 0x00001000 #define WIFI_WDS_RX_BEACON 0x00002000 // already rx WDS AP beacon #endif #ifdef AUTO_CONFIG #define WIFI_AUTOCONF 0x00004000 #define WIFI_AUTOCONF_IND 0x00008000 #endif /* // ========== P2P Section Start =============== #define WIFI_P2P_LISTEN_STATE 0x00010000 #define WIFI_P2P_GROUP_FORMATION_STATE 0x00020000 // ========== P2P Section End =============== */ //#ifdef UNDER_MPTEST #define WIFI_MP_STATE 0x00010000 #define WIFI_MP_CTX_BACKGROUND 0x00020000 // in continous tx background #define WIFI_MP_CTX_ST 0x00040000 // in continous tx with single-tone #define WIFI_MP_CTX_BACKGROUND_PENDING 0x00080000 // pending in continous tx background due to out of skb #define WIFI_MP_CTX_CCK_HW 0x00100000 // in continous tx #define WIFI_MP_CTX_CCK_CS 0x00200000 // in continous tx with carrier suppression #define WIFI_MP_LPBK_STATE 0x00400000 //#endif //#define _FW_UNDER_CMD WIFI_UNDER_CMD #define _FW_UNDER_LINKING WIFI_UNDER_LINKING #define _FW_LINKED WIFI_ASOC_STATE #define _FW_UNDER_SURVEY WIFI_SITE_MONITOR enum dot11AuthAlgrthmNum { dot11AuthAlgrthm_Open = 0, dot11AuthAlgrthm_Shared, dot11AuthAlgrthm_8021X, dot11AuthAlgrthm_Auto, dot11AuthAlgrthm_WAPI, dot11AuthAlgrthm_MaxNum }; // Scan type including active and passive scan. typedef enum _RT_SCAN_TYPE { SCAN_PASSIVE, SCAN_ACTIVE, SCAN_MIX, }RT_SCAN_TYPE, *PRT_SCAN_TYPE; enum _BAND { GHZ24_50 = 0, GHZ_50, GHZ_24, GHZ_MAX, }; #define rtw_band_valid(band) ((band) >= GHZ24_50 && (band) < GHZ_MAX) enum DriverInterface { DRIVER_WEXT = 1, DRIVER_CFG80211 = 2 }; enum SCAN_RESULT_TYPE { SCAN_RESULT_P2P_ONLY = 0, // Will return all the P2P devices. SCAN_RESULT_ALL = 1, // Will return all the scanned device, include AP. SCAN_RESULT_WFD_TYPE = 2 // Will just return the correct WFD device. // If this device is Miracast sink device, it will just return all the Miracast source devices. }; /* there are several "locks" in mlme_priv, since mlme_priv is a shared resource between many threads, like ISR/Call-Back functions, the OID handlers, and even timer functions. Each _queue has its own locks, already. Other items are protected by mlme_priv.lock. To avoid possible dead lock, any thread trying to modifiying mlme_priv SHALL not lock up more than one locks at a time! */ #define traffic_threshold 10 #define traffic_scan_period 500 struct sitesurvey_ctrl { u64 last_tx_pkts; uint last_rx_pkts; sint traffic_busy; _timer sitesurvey_ctrl_timer; }; typedef struct _RT_LINK_DETECT_T{ u32 NumTxOkInPeriod; u32 NumRxOkInPeriod; u32 NumRxUnicastOkInPeriod; BOOLEAN bBusyTraffic; BOOLEAN bTxBusyTraffic; BOOLEAN bRxBusyTraffic; BOOLEAN bHigherBusyTraffic; // For interrupt migration purpose. BOOLEAN bHigherBusyRxTraffic; // We may disable Tx interrupt according as Rx traffic. BOOLEAN bHigherBusyTxTraffic; // We may disable Tx interrupt according as Tx traffic. //u8 TrafficBusyState; u8 TrafficTransitionCount; u32 LowPowerTransitionCount; }RT_LINK_DETECT_T, *PRT_LINK_DETECT_T; struct profile_info { u8 ssidlen; u8 ssid[ WLAN_SSID_MAXLEN ]; u8 peermac[ ETH_ALEN ]; }; struct tx_invite_req_info{ u8 token; u8 benable; u8 go_ssid[ WLAN_SSID_MAXLEN ]; u8 ssidlen; u8 go_bssid[ ETH_ALEN ]; u8 peer_macaddr[ ETH_ALEN ]; u8 operating_ch; // This information will be set by using the p2p_set op_ch=x u8 peer_ch; // The listen channel for peer P2P device }; struct tx_invite_resp_info{ u8 token; // Used to record the dialog token of p2p invitation request frame. }; #ifdef CONFIG_WFD struct wifi_display_info{ u16 wfd_enable; // Eanble/Disable the WFD function. u16 rtsp_ctrlport; // TCP port number at which the this WFD device listens for RTSP messages u16 peer_rtsp_ctrlport; // TCP port number at which the peer WFD device listens for RTSP messages // This filed should be filled when receiving the gropu negotiation request u8 peer_session_avail; // WFD session is available or not for the peer wfd device. // This variable will be set when sending the provisioning discovery request to peer WFD device. // And this variable will be reset when it is read by using the iwpriv p2p_get wfd_sa command. u8 ip_address[4]; u8 peer_ip_address[4]; u8 wfd_pc; // WFD preferred connection // 0 -> Prefer to use the P2P for WFD connection on peer side. // 1 -> Prefer to use the TDLS for WFD connection on peer side. u8 wfd_device_type; // WFD Device Type // 0 -> WFD Source Device // 1 -> WFD Primary Sink Device enum SCAN_RESULT_TYPE scan_result_type; // Used when P2P is enable. This parameter will impact the scan result. }; #endif //CONFIG_WFD struct tx_provdisc_req_info{ u16 wps_config_method_request; // Used when sending the provisioning request frame u16 peer_channel_num[2]; // The channel number which the receiver stands. NDIS_802_11_SSID ssid; u8 peerDevAddr[ ETH_ALEN ]; // Peer device address u8 peerIFAddr[ ETH_ALEN ]; // Peer interface address u8 benable; // This provision discovery request frame is trigger to send or not }; struct rx_provdisc_req_info{ //When peer device issue prov_disc_req first, we should store the following informations u8 peerDevAddr[ ETH_ALEN ]; // Peer device address u8 strconfig_method_desc_of_prov_disc_req[4]; // description for the config method located in the provisioning discovery request frame. // The UI must know this information to know which config method the remote p2p device is requiring. }; struct tx_nego_req_info{ u16 peer_channel_num[2]; // The channel number which the receiver stands. u8 peerDevAddr[ ETH_ALEN ]; // Peer device address u8 benable; // This negoitation request frame is trigger to send or not }; struct group_id_info{ u8 go_device_addr[ ETH_ALEN ]; // The GO's device address of this P2P group u8 ssid[ WLAN_SSID_MAXLEN ]; // The SSID of this P2P group }; struct scan_limit_info{ u8 scan_op_ch_only; // When this flag is set, the driver should just scan the operation channel #ifndef CONFIG_P2P_OP_CHK_SOCIAL_CH u8 operation_ch[2]; // Store the operation channel of invitation request frame #else u8 operation_ch[5]; // Store additional channel 1,6,11 for Android 4.2 IOT & Nexus 4 #endif //CONFIG_P2P_OP_CHK_SOCIAL_CH }; #ifdef CONFIG_IOCTL_CFG80211 struct cfg80211_wifidirect_info{ _timer remain_on_ch_timer; u8 restore_channel; struct ieee80211_channel remain_on_ch_channel; enum nl80211_channel_type remain_on_ch_type; u64 remain_on_ch_cookie; bool not_indic_ro_ch_exp; bool is_ro_ch; u32 last_ro_ch_time; /* this will be updated at the beginning and end of ro_ch */ }; #endif //CONFIG_IOCTL_CFG80211 struct wifidirect_info{ _adapter* padapter; _timer find_phase_timer; _timer restore_p2p_state_timer; // Used to do the scanning. After confirming the peer is availalble, the driver transmits the P2P frame to peer. _timer pre_tx_scan_timer; _timer reset_ch_sitesurvey; _timer reset_ch_sitesurvey2; // Just for resetting the scan limit function by using p2p nego #ifdef CONFIG_CONCURRENT_MODE // Used to switch the channel between legacy AP and listen state. _timer ap_p2p_switch_timer; #endif struct tx_provdisc_req_info tx_prov_disc_info; struct rx_provdisc_req_info rx_prov_disc_info; struct tx_invite_req_info invitereq_info; struct profile_info profileinfo[ P2P_MAX_PERSISTENT_GROUP_NUM ]; // Store the profile information of persistent group struct tx_invite_resp_info inviteresp_info; struct tx_nego_req_info nego_req_info; struct group_id_info groupid_info; // Store the group id information when doing the group negotiation handshake. struct scan_limit_info rx_invitereq_info; // Used for get the limit scan channel from the Invitation procedure struct scan_limit_info p2p_info; // Used for get the limit scan channel from the P2P negotiation handshake #ifdef CONFIG_WFD struct wifi_display_info *wfd_info; #endif enum P2P_ROLE role; enum P2P_STATE pre_p2p_state; enum P2P_STATE p2p_state; u8 device_addr[ETH_ALEN]; // The device address should be the mac address of this device. u8 interface_addr[ETH_ALEN]; u8 social_chan[4]; u8 listen_channel; u8 operating_channel; u8 listen_dwell; // This value should be between 1 and 3 u8 support_rate[8]; u8 p2p_wildcard_ssid[P2P_WILDCARD_SSID_LEN]; u8 intent; // should only include the intent value. u8 p2p_peer_interface_addr[ ETH_ALEN ]; u8 p2p_peer_device_addr[ ETH_ALEN ]; u8 peer_intent; // Included the intent value and tie breaker value. u8 device_name[ WPS_MAX_DEVICE_NAME_LEN ]; // Device name for displaying on searching device screen u8 device_name_len; u8 profileindex; // Used to point to the index of profileinfo array u8 peer_operating_ch; u8 find_phase_state_exchange_cnt; u16 device_password_id_for_nego; // The device password ID for group negotation u8 negotiation_dialog_token; u8 nego_ssid[ WLAN_SSID_MAXLEN ]; // SSID information for group negotitation u8 nego_ssidlen; u8 p2p_group_ssid[WLAN_SSID_MAXLEN]; u8 p2p_group_ssid_len; u8 persistent_supported; // Flag to know the persistent function should be supported or not. // In the Sigma test, the Sigma will provide this enable from the sta_set_p2p CAPI. // 0: disable // 1: enable u8 session_available; // Flag to set the WFD session available to enable or disable "by Sigma" // In the Sigma test, the Sigma will disable the session available by using the sta_preset CAPI. // 0: disable // 1: enable u8 wfd_tdls_enable; // Flag to enable or disable the TDLS by WFD Sigma // 0: disable // 1: enable u8 wfd_tdls_weaksec; // Flag to enable or disable the weak security function for TDLS by WFD Sigma // 0: disable // In this case, the driver can't issue the tdsl setup request frame. // 1: enable // In this case, the driver can issue the tdls setup request frame // even the current security is weak security. enum P2P_WPSINFO ui_got_wps_info; // This field will store the WPS value (PIN value or PBC) that UI had got from the user. u16 supported_wps_cm; // This field describes the WPS config method which this driver supported. // The value should be the combination of config method defined in page104 of WPS v2.0 spec. u8 external_uuid; // UUID flag u8 uuid[16]; // UUID uint channel_list_attr_len; // This field will contain the length of body of P2P Channel List attribute of group negotitation response frame. u8 channel_list_attr[100]; // This field will contain the body of P2P Channel List attribute of group negotitation response frame. // We will use the channel_cnt and channel_list fields when constructing the group negotitation confirm frame. u8 driver_interface; // Indicate DRIVER_WEXT or DRIVER_CFG80211 #ifdef CONFIG_CONCURRENT_MODE u16 ext_listen_interval; // The interval to be available with legacy AP (ms) u16 ext_listen_period; // The time period to be available for P2P listen state (ms) #endif #ifdef CONFIG_P2P_PS enum P2P_PS_MODE p2p_ps_mode; // indicate p2p ps mode enum P2P_PS_STATE p2p_ps_state; // indicate p2p ps state u8 noa_index; // Identifies and instance of Notice of Absence timing. u8 ctwindow; // Client traffic window. A period of time in TU after TBTT. u8 opp_ps; // opportunistic power save. u8 noa_num; // number of NoA descriptor in P2P IE. u8 noa_count[P2P_MAX_NOA_NUM]; // Count for owner, Type of client. u32 noa_duration[P2P_MAX_NOA_NUM]; // Max duration for owner, preferred or min acceptable duration for client. u32 noa_interval[P2P_MAX_NOA_NUM]; // Length of interval for owner, preferred or max acceptable interval of client. u32 noa_start_time[P2P_MAX_NOA_NUM]; // schedule expressed in terms of the lower 4 bytes of the TSF timer. #endif // CONFIG_P2P_PS }; struct tdls_ss_record{ //signal strength record u8 macaddr[ETH_ALEN]; u8 RxPWDBAll; u8 is_tdls_sta; // _TRUE: direct link sta, _FALSE: else }; struct tdls_info{ u8 ap_prohibited; u8 link_established; u8 sta_cnt; u8 sta_maximum; // 1:tdls sta is equal (NUM_STA-1), reach max direct link number; 0: else; struct tdls_ss_record ss_record; u8 ch_sensing; u8 cur_channel; u8 candidate_ch; u8 collect_pkt_num[MAX_CHANNEL_NUM]; _lock cmd_lock; _lock hdl_lock; u8 watchdog_count; u8 dev_discovered; //WFD_TDLS: for sigma test u8 tdls_enable; u8 external_setup; // _TRUE: setup is handled by wpa_supplicant #ifdef CONFIG_WFD struct wifi_display_info *wfd_info; #endif }; struct tdls_txmgmt { u8 peer[ETH_ALEN]; u8 action_code; u8 dialog_token; u16 status_code; u8 *buf; size_t len; u8 external_support; }; /* used for mlme_priv.roam_flags */ enum { RTW_ROAM_ON_EXPIRED = BIT0, RTW_ROAM_ON_RESUME = BIT1, RTW_ROAM_ACTIVE = BIT2, }; struct beacon_keys { u8 ssid[IW_ESSID_MAX_SIZE]; u32 ssid_len; u8 bcn_channel; u16 ht_cap_info; u8 ht_info_infos_0_sco; // bit0 & bit1 in infos[0] is second channel offset int encryp_protocol; int pairwise_cipher; int group_cipher; int is_8021x; }; struct mlme_priv { _lock lock; sint fw_state; //shall we protect this variable? maybe not necessarily... u8 bScanInProcess; u8 to_join; //flag #ifdef CONFIG_LAYER2_ROAMING u8 to_roam; /* roaming trying times */ struct wlan_network *roam_network; /* the target of active roam */ u8 roam_flags; u8 roam_rssi_diff_th; /* rssi difference threshold for active scan candidate selection */ u32 roam_scan_int_ms; /* scan interval for active roam */ u32 roam_scanr_exp_ms; /* scan result expire time in ms for roam */ u8 roam_tgt_addr[ETH_ALEN]; /* request to roam to speicific target without other consideration */ #endif u8 *nic_hdl; u8 not_indic_disco; _list *pscanned; _queue free_bss_pool; _queue scanned_queue; u8 *free_bss_buf; u32 num_of_scanned; NDIS_802_11_SSID assoc_ssid; u8 assoc_bssid[6]; struct wlan_network cur_network; struct wlan_network *cur_network_scanned; // bcn check info struct beacon_keys cur_beacon_keys; // save current beacon keys struct beacon_keys new_beacon_keys; // save new beacon keys u8 new_beacon_cnts; // if new_beacon_cnts >= threshold, ap beacon is changed #ifdef CONFIG_ARP_KEEP_ALIVE // for arp offload keep alive u8 gw_mac_addr[6]; u8 gw_ip[4]; #endif //uint wireless_mode; no used, remove it u32 auto_scan_int_ms; _timer assoc_timer; uint assoc_by_bssid; uint assoc_by_rssi; _timer scan_to_timer; // driver itself handles scan_timeout status. u32 scan_start_time; // used to evaluate the time spent in scanning #ifdef CONFIG_SET_SCAN_DENY_TIMER _timer set_scan_deny_timer; ATOMIC_T set_scan_deny; //0: allowed, 1: deny #endif struct qos_priv qospriv; #ifdef CONFIG_80211N_HT /* Number of non-HT AP/stations */ int num_sta_no_ht; /* Number of HT AP/stations 20 MHz */ //int num_sta_ht_20mhz; int num_FortyMHzIntolerant; struct ht_priv htpriv; #endif #ifdef CONFIG_80211AC_VHT struct vht_priv vhtpriv; #endif #ifdef CONFIG_BEAMFORMING struct beamforming_info beamforming_info; #endif #ifdef CONFIG_DFS u8 handle_dfs; #endif //CONFIG_DFS RT_LINK_DETECT_T LinkDetectInfo; _timer dynamic_chk_timer; //dynamic/periodic check timer u8 acm_mask; // for wmm acm mask u8 ChannelPlan; RT_SCAN_TYPE scan_mode; // active: 1, passive: 0 u8 *wps_probe_req_ie; u32 wps_probe_req_ie_len; #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) /* Number of associated Non-ERP stations (i.e., stations using 802.11b * in 802.11g BSS) */ int num_sta_non_erp; /* Number of associated stations that do not support Short Slot Time */ int num_sta_no_short_slot_time; /* Number of associated stations that do not support Short Preamble */ int num_sta_no_short_preamble; int olbc; /* Overlapping Legacy BSS Condition */ /* Number of HT associated stations that do not support greenfield */ int num_sta_ht_no_gf; /* Number of associated non-HT stations */ //int num_sta_no_ht; /* Number of HT associated stations 20 MHz */ int num_sta_ht_20mhz; /* Overlapping BSS information */ int olbc_ht; #ifdef CONFIG_80211N_HT u16 ht_op_mode; #endif /* CONFIG_80211N_HT */ u8 *assoc_req; u32 assoc_req_len; u8 *assoc_rsp; u32 assoc_rsp_len; u8 *wps_beacon_ie; //u8 *wps_probe_req_ie; u8 *wps_probe_resp_ie; u8 *wps_assoc_resp_ie; // for CONFIG_IOCTL_CFG80211, this IE could include p2p ie / wfd ie u32 wps_beacon_ie_len; //u32 wps_probe_req_ie_len; u32 wps_probe_resp_ie_len; u32 wps_assoc_resp_ie_len; // for CONFIG_IOCTL_CFG80211, this IE len could include p2p ie / wfd ie u8 *p2p_beacon_ie; u8 *p2p_probe_req_ie; u8 *p2p_probe_resp_ie; u8 *p2p_go_probe_resp_ie; //for GO u8 *p2p_assoc_req_ie; u32 p2p_beacon_ie_len; u32 p2p_probe_req_ie_len; u32 p2p_probe_resp_ie_len; u32 p2p_go_probe_resp_ie_len; //for GO u32 p2p_assoc_req_ie_len; /* #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) //u8 *wps_p2p_beacon_ie; u8 *p2p_beacon_ie; u8 *wps_p2p_probe_resp_ie; u8 *wps_p2p_assoc_resp_ie; //u32 wps_p2p_beacon_ie_len; u32 p2p_beacon_ie_len; u32 wps_p2p_probe_resp_ie_len; u32 wps_p2p_assoc_resp_ie_len; #endif */ _lock bcn_update_lock; u8 update_bcn; #endif //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) #if defined(CONFIG_WFD) && defined(CONFIG_IOCTL_CFG80211) u8 *wfd_beacon_ie; u8 *wfd_probe_req_ie; u8 *wfd_probe_resp_ie; u8 *wfd_go_probe_resp_ie; //for GO u8 *wfd_assoc_req_ie; u32 wfd_beacon_ie_len; u32 wfd_probe_req_ie_len; u32 wfd_probe_resp_ie_len; u32 wfd_go_probe_resp_ie_len; //for GO u32 wfd_assoc_req_ie_len; #endif #ifdef RTK_DMP_PLATFORM // DMP kobject_hotplug function signal need in passive level _workitem Linkup_workitem; _workitem Linkdown_workitem; #endif #ifdef CONFIG_INTEL_WIDI int widi_state; int listen_state; _timer listen_timer; ATOMIC_T rx_probe_rsp; // 1:receive probe respone from RDS source. u8 *l2sdTaBuffer; u8 channel_idx; u8 group_cnt; //In WiDi 3.5, they specified another scan algo. for WFD/RDS co-existed u8 sa_ext[L2SDTA_SERVICE_VE_LEN]; u8 widi_enable; /** * For WiDi 4; upper layer would set * p2p_primary_device_type_category_id * p2p_primary_device_type_sub_category_id * p2p_secondary_device_type_category_id * p2p_secondary_device_type_sub_category_id */ u16 p2p_pdt_cid; u16 p2p_pdt_scid; u8 num_p2p_sdt; u16 p2p_sdt_cid[MAX_NUM_P2P_SDT]; u16 p2p_sdt_scid[MAX_NUM_P2P_SDT]; u8 p2p_reject_disable; //When starting NL80211 wpa_supplicant/hostapd, it will call netdev_close //such that it will cause p2p disabled. Use this flag to reject. #endif // CONFIG_INTEL_WIDI #ifdef CONFIG_CONCURRENT_MODE u8 scanning_via_buddy_intf; #endif // u8 NumOfBcnInfoChkFail; // u32 timeBcnInfoChkStart; }; #define rtw_mlme_set_auto_scan_int(adapter, ms) \ do { \ adapter->mlmepriv.auto_scan_int_ms = ms; \ while (0) void rtw_mlme_reset_auto_scan_int(_adapter *adapter); #ifdef CONFIG_AP_MODE struct hostapd_priv { _adapter *padapter; #ifdef CONFIG_HOSTAPD_MLME struct net_device *pmgnt_netdev; struct usb_anchor anchored; #endif }; extern int hostapd_mode_init(_adapter *padapter); extern void hostapd_mode_unload(_adapter *padapter); #endif extern void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf); extern void rtw_survey_event_callback(_adapter *adapter, u8 *pbuf); extern void rtw_surveydone_event_callback(_adapter *adapter, u8 *pbuf); extern void rtw_joinbss_event_callback(_adapter *adapter, u8 *pbuf); extern void rtw_stassoc_event_callback(_adapter *adapter, u8 *pbuf); extern void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf); extern void rtw_atimdone_event_callback(_adapter *adapter, u8 *pbuf); extern void rtw_cpwm_event_callback(_adapter *adapter, u8 *pbuf); extern void rtw_wmm_event_callback(PADAPTER padapter, u8 *pbuf); extern void rtw_join_timeout_handler(RTW_TIMER_HDL_ARGS); extern void _rtw_scan_timeout_handler(RTW_TIMER_HDL_ARGS); thread_return event_thread(thread_context context); extern void rtw_free_network_queue(_adapter *adapter,u8 isfreeall); extern int rtw_init_mlme_priv(_adapter *adapter);// (struct mlme_priv *pmlmepriv); extern void rtw_free_mlme_priv (struct mlme_priv *pmlmepriv); extern sint rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv); extern sint rtw_set_key(_adapter *adapter,struct security_priv *psecuritypriv,sint keyid, u8 set_tx, bool enqueue); extern sint rtw_set_auth(_adapter *adapter,struct security_priv *psecuritypriv); __inline static u8 *get_bssid(struct mlme_priv *pmlmepriv) { //if sta_mode:pmlmepriv->cur_network.network.MacAddress=> bssid // if adhoc_mode:pmlmepriv->cur_network.network.MacAddress=> ibss mac address return pmlmepriv->cur_network.network.MacAddress; } __inline static sint check_fwstate(struct mlme_priv *pmlmepriv, sint state) { if (pmlmepriv->fw_state & state) return _TRUE; return _FALSE; } __inline static sint get_fwstate(struct mlme_priv *pmlmepriv) { return pmlmepriv->fw_state; } /* * No Limit on the calling context, * therefore set it to be the critical section... * * ### NOTE:#### (!!!!) * MUST TAKE CARE THAT BEFORE CALLING THIS FUNC, YOU SHOULD HAVE LOCKED pmlmepriv->lock */ __inline static void set_fwstate(struct mlme_priv *pmlmepriv, sint state) { pmlmepriv->fw_state |= state; //FOR HW integration if(_FW_UNDER_SURVEY==state){ pmlmepriv->bScanInProcess = _TRUE; } } __inline static void _clr_fwstate_(struct mlme_priv *pmlmepriv, sint state) { pmlmepriv->fw_state &= ~state; //FOR HW integration if(_FW_UNDER_SURVEY==state){ pmlmepriv->bScanInProcess = _FALSE; } } /* * No Limit on the calling context, * therefore set it to be the critical section... */ __inline static void clr_fwstate(struct mlme_priv *pmlmepriv, sint state) { _irqL irqL; _enter_critical_bh(&pmlmepriv->lock, &irqL); if (check_fwstate(pmlmepriv, state) == _TRUE) pmlmepriv->fw_state ^= state; _exit_critical_bh(&pmlmepriv->lock, &irqL); } __inline static void clr_fwstate_ex(struct mlme_priv *pmlmepriv, sint state) { _irqL irqL; _enter_critical_bh(&pmlmepriv->lock, &irqL); _clr_fwstate_(pmlmepriv, state); _exit_critical_bh(&pmlmepriv->lock, &irqL); } __inline static void up_scanned_network(struct mlme_priv *pmlmepriv) { _irqL irqL; _enter_critical_bh(&pmlmepriv->lock, &irqL); pmlmepriv->num_of_scanned++; _exit_critical_bh(&pmlmepriv->lock, &irqL); } #ifdef CONFIG_CONCURRENT_MODE sint rtw_buddy_adapter_up(_adapter *padapter); sint check_buddy_fwstate(_adapter *padapter, sint state); u8 rtw_get_buddy_bBusyTraffic(_adapter *padapter); #endif //CONFIG_CONCURRENT_MODE __inline static void down_scanned_network(struct mlme_priv *pmlmepriv) { _irqL irqL; _enter_critical_bh(&pmlmepriv->lock, &irqL); pmlmepriv->num_of_scanned--; _exit_critical_bh(&pmlmepriv->lock, &irqL); } __inline static void set_scanned_network_val(struct mlme_priv *pmlmepriv, sint val) { _irqL irqL; _enter_critical_bh(&pmlmepriv->lock, &irqL); pmlmepriv->num_of_scanned = val; _exit_critical_bh(&pmlmepriv->lock, &irqL); } extern u16 rtw_get_capability(WLAN_BSSID_EX *bss); extern void rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target); extern void rtw_disconnect_hdl_under_linked(_adapter* adapter, struct sta_info *psta, u8 free_assoc); extern void rtw_generate_random_ibss(u8 *pibss); extern struct wlan_network* rtw_find_network(_queue *scanned_queue, u8 *addr); extern struct wlan_network* rtw_get_oldest_wlan_network(_queue *scanned_queue); struct wlan_network *_rtw_find_same_network(_queue *scanned_queue, struct wlan_network *network); struct wlan_network *rtw_find_same_network(_queue *scanned_queue, struct wlan_network *network); extern void rtw_free_assoc_resources(_adapter* adapter, int lock_scanned_queue); extern void rtw_indicate_disconnect(_adapter* adapter); extern void rtw_indicate_connect(_adapter* adapter); void rtw_indicate_scan_done( _adapter *padapter, bool aborted); void rtw_scan_abort(_adapter *adapter); extern int rtw_restruct_sec_ie(_adapter *adapter,u8 *in_ie,u8 *out_ie,uint in_len); extern int rtw_restruct_wmm_ie(_adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_len, uint initial_out_len); extern void rtw_init_registrypriv_dev_network(_adapter *adapter); extern void rtw_update_registrypriv_dev_network(_adapter *adapter); extern void rtw_get_encrypt_decrypt_from_registrypriv(_adapter *adapter); extern void _rtw_join_timeout_handler(_adapter *adapter); extern void rtw_scan_timeout_handler(_adapter *adapter); extern void rtw_dynamic_check_timer_handlder(_adapter *adapter); #ifdef CONFIG_SET_SCAN_DENY_TIMER bool rtw_is_scan_deny(_adapter *adapter); void rtw_clear_scan_deny(_adapter *adapter); void rtw_set_scan_deny_timer_hdl(_adapter *adapter); void rtw_set_scan_deny(_adapter *adapter, u32 ms); #else #define rtw_is_scan_deny(adapter) _FALSE #define rtw_clear_scan_deny(adapter) do {} while (0) #define rtw_set_scan_deny_timer_hdl(adapter) do {} while (0) #define rtw_set_scan_deny(adapter, ms) do {} while (0) #endif extern int _rtw_init_mlme_priv(_adapter *padapter); void rtw_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv); extern void _rtw_free_mlme_priv(struct mlme_priv *pmlmepriv); extern int _rtw_enqueue_network(_queue *queue, struct wlan_network *pnetwork); //extern struct wlan_network* _rtw_dequeue_network(_queue *queue); extern struct wlan_network* _rtw_alloc_network(struct mlme_priv *pmlmepriv); extern void _rtw_free_network(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork, u8 isfreeall); extern void _rtw_free_network_nolock(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork); extern struct wlan_network* _rtw_find_network(_queue *scanned_queue, u8 *addr); extern void _rtw_free_network_queue(_adapter* padapter, u8 isfreeall); extern sint rtw_if_up(_adapter *padapter); sint rtw_linked_check(_adapter *padapter); u8 *rtw_get_capability_from_ie(u8 *ie); u8 *rtw_get_timestampe_from_ie(u8 *ie); u8 *rtw_get_beacon_interval_from_ie(u8 *ie); void rtw_joinbss_reset(_adapter *padapter); #ifdef CONFIG_80211N_HT void rtw_ht_use_default_setting(_adapter *padapter); void rtw_build_wmm_ie_ht(_adapter *padapter, u8 *out_ie, uint *pout_len); unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len, u8 channel); void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len, u8 channel); void rtw_issue_addbareq_cmd(_adapter *padapter, struct xmit_frame *pxmitframe); void rtw_append_exented_cap(_adapter *padapter, u8 *out_ie, uint *pout_len); #endif int rtw_is_same_ibss(_adapter *adapter, struct wlan_network *pnetwork); int is_same_network(WLAN_BSSID_EX *src, WLAN_BSSID_EX *dst, u8 feature); #ifdef CONFIG_LAYER2_ROAMING #define rtw_roam_flags(adapter) ((adapter)->mlmepriv.roam_flags) #define rtw_chk_roam_flags(adapter, flags) ((adapter)->mlmepriv.roam_flags & flags) #define rtw_clr_roam_flags(adapter, flags) \ do { \ ((adapter)->mlmepriv.roam_flags &= ~flags); \ } while (0) #define rtw_set_roam_flags(adapter, flags) \ do { \ ((adapter)->mlmepriv.roam_flags |= flags); \ } while (0) #define rtw_assign_roam_flags(adapter, flags) \ do { \ ((adapter)->mlmepriv.roam_flags = flags); \ } while (0) void _rtw_roaming(_adapter *adapter, struct wlan_network *tgt_network); void rtw_roaming(_adapter *adapter, struct wlan_network *tgt_network); void rtw_set_to_roam(_adapter *adapter, u8 to_roam); u8 rtw_dec_to_roam(_adapter *adapter); u8 rtw_to_roam(_adapter *adapter); int rtw_select_roaming_candidate(struct mlme_priv *pmlmepriv); #else #define rtw_roam_flags(adapter) 0 #define rtw_chk_roam_flags(adapter, flags) 0 #define rtw_clr_roam_flags(adapter, flags) do {} while (0) #define rtw_set_roam_flags(adapter, flags) do {} while (0) #define rtw_assign_roam_flags(adapter, flags) do {} while (0) #define _rtw_roaming(adapter, tgt_network) do {} while(0) #define rtw_roaming(adapter, tgt_network) do {} while(0) #define rtw_set_to_roam(adapter, to_roam) do {} while(0) #define rtw_dec_to_roam(adapter) 0 #define rtw_to_roam(adapter) 0 #define rtw_select_roaming_candidate(mlme) _FAIL #endif /* CONFIG_LAYER2_ROAMING */ void rtw_sta_media_status_rpt(_adapter *adapter,struct sta_info *psta, u32 mstatus); #ifdef CONFIG_INTEL_PROXIM void rtw_proxim_enable(_adapter *padapter); void rtw_proxim_disable(_adapter *padapter); void rtw_proxim_send_packet(_adapter *padapter,u8 *pbuf,u16 len,u8 hw_rate); #endif //CONFIG_INTEL_PROXIM #endif //__RTL871X_MLME_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_mlme_ext.h000066400000000000000000001206161261122257400220070ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_MLME_EXT_H_ #define __RTW_MLME_EXT_H_ // Commented by Albert 20101105 // Increase the SURVEY_TO value from 100 to 150 ( 100ms to 150ms ) // The Realtek 8188CE SoftAP will spend around 100ms to send the probe response after receiving the probe request. // So, this driver tried to extend the dwell time for each scanning channel. // This will increase the chance to receive the probe response from SoftAP. #define SURVEY_TO (100) #define REAUTH_TO (300) //(50) #define REASSOC_TO (300) //(50) //#define DISCONNECT_TO (3000) #define ADDBA_TO (2000) #define LINKED_TO (1) //unit:2 sec, 1x2=2 sec #define REAUTH_LIMIT (4) #define REASSOC_LIMIT (4) #define READDBA_LIMIT (2) #ifdef CONFIG_GSPI_HCI #define ROAMING_LIMIT 5 #else #define ROAMING_LIMIT 8 #endif //#define IOCMD_REG0 0x10250370 //#define IOCMD_REG1 0x10250374 //#define IOCMD_REG2 0x10250378 //#define FW_DYNAMIC_FUN_SWITCH 0x10250364 //#define WRITE_BB_CMD 0xF0000001 //#define SET_CHANNEL_CMD 0xF3000000 //#define UPDATE_RA_CMD 0xFD0000A2 #define DYNAMIC_FUNC_DISABLE (0x0) // ====== ODM_ABILITY_E ======== // BB ODM section BIT 0-15 #define DYNAMIC_BB_DIG BIT0 //ODM_BB_DIG #define DYNAMIC_BB_RA_MASK BIT1 //ODM_BB_RA_MASK #define DYNAMIC_BB_DYNAMIC_TXPWR BIT2 //ODM_BB_DYNAMIC_TXPWR #define DYNAMIC_BB_BB_FA_CNT BIT3 //ODM_BB_FA_CNT #define DYNAMIC_BB_RSSI_MONITOR BIT4 //ODM_BB_RSSI_MONITOR #define DYNAMIC_BB_CCK_PD BIT5 //ODM_BB_CCK_PD #define DYNAMIC_BB_ANT_DIV BIT6 //ODM_BB_ANT_DIV #define DYNAMIC_BB_PWR_SAVE BIT7 //ODM_BB_PWR_SAVE #define DYNAMIC_BB_PWR_TRAIN BIT8 //ODM_BB_PWR_TRAIN #define DYNAMIC_BB_RATE_ADAPTIVE BIT9 //ODM_BB_RATE_ADAPTIVE #define DYNAMIC_BB_PATH_DIV BIT10//ODM_BB_PATH_DIV #define DYNAMIC_BB_PSD BIT11//ODM_BB_PSD #define DYNAMIC_BB_RXHP BIT12//ODM_BB_RXHP #define DYNAMIC_BB_ADAPTIVITY BIT13//ODM_BB_ADAPTIVITY #define DYNAMIC_BB_DYNAMIC_ATC BIT14//ODM_BB_DYNAMIC_ATC // MAC DM section BIT 16-23 #define DYNAMIC_MAC_EDCA_TURBO BIT16//ODM_MAC_EDCA_TURBO #define DYNAMIC_MAC_EARLY_MODE BIT17//ODM_MAC_EARLY_MODE // RF ODM section BIT 24-31 #define DYNAMIC_RF_TX_PWR_TRACK BIT24//ODM_RF_TX_PWR_TRACK #define DYNAMIC_RF_RX_GAIN_TRACK BIT25//ODM_RF_RX_GAIN_TRACK #define DYNAMIC_RF_CALIBRATION BIT26//ODM_RF_CALIBRATION #define DYNAMIC_ALL_FUNC_ENABLE 0xFFFFFFF #define _HW_STATE_NOLINK_ 0x00 #define _HW_STATE_ADHOC_ 0x01 #define _HW_STATE_STATION_ 0x02 #define _HW_STATE_AP_ 0x03 #define _1M_RATE_ 0 #define _2M_RATE_ 1 #define _5M_RATE_ 2 #define _11M_RATE_ 3 #define _6M_RATE_ 4 #define _9M_RATE_ 5 #define _12M_RATE_ 6 #define _18M_RATE_ 7 #define _24M_RATE_ 8 #define _36M_RATE_ 9 #define _48M_RATE_ 10 #define _54M_RATE_ 11 /******************************************************** MCS rate definitions *********************************************************/ #define MCS_RATE_1R (0x000000ff) #define MCS_RATE_2R (0x0000ffff) #define MCS_RATE_3R (0x00ffffff) #define MCS_RATE_4R (0xffffffff) #define MCS_RATE_2R_13TO15_OFF (0x00001fff) extern unsigned char RTW_WPA_OUI[]; extern unsigned char WMM_OUI[]; extern unsigned char WPS_OUI[]; extern unsigned char WFD_OUI[]; extern unsigned char P2P_OUI[]; extern unsigned char WMM_INFO_OUI[]; extern unsigned char WMM_PARA_OUI[]; // // Channel Plan Type. // Note: // We just add new channel plan when the new channel plan is different from any of the following // channel plan. // If you just wnat to customize the acitions(scan period or join actions) about one of the channel plan, // customize them in RT_CHANNEL_INFO in the RT_CHANNEL_LIST. // typedef enum _RT_CHANNEL_DOMAIN { //===== old channel plan mapping =====// RT_CHANNEL_DOMAIN_FCC = 0x00, RT_CHANNEL_DOMAIN_IC = 0x01, RT_CHANNEL_DOMAIN_ETSI = 0x02, RT_CHANNEL_DOMAIN_SPAIN = 0x03, RT_CHANNEL_DOMAIN_FRANCE = 0x04, RT_CHANNEL_DOMAIN_MKK = 0x05, RT_CHANNEL_DOMAIN_MKK1 = 0x06, RT_CHANNEL_DOMAIN_ISRAEL = 0x07, RT_CHANNEL_DOMAIN_TELEC = 0x08, RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN = 0x09, RT_CHANNEL_DOMAIN_WORLD_WIDE_13 = 0x0A, RT_CHANNEL_DOMAIN_TAIWAN = 0x0B, RT_CHANNEL_DOMAIN_CHINA = 0x0C, RT_CHANNEL_DOMAIN_SINGAPORE_INDIA_MEXICO = 0x0D, RT_CHANNEL_DOMAIN_KOREA = 0x0E, RT_CHANNEL_DOMAIN_TURKEY = 0x0F, RT_CHANNEL_DOMAIN_JAPAN = 0x10, RT_CHANNEL_DOMAIN_FCC_NO_DFS = 0x11, RT_CHANNEL_DOMAIN_JAPAN_NO_DFS = 0x12, RT_CHANNEL_DOMAIN_WORLD_WIDE_5G = 0x13, RT_CHANNEL_DOMAIN_TAIWAN_NO_DFS = 0x14, //===== new channel plan mapping, (2GDOMAIN_5GDOMAIN) =====// RT_CHANNEL_DOMAIN_WORLD_NULL = 0x20, RT_CHANNEL_DOMAIN_ETSI1_NULL = 0x21, RT_CHANNEL_DOMAIN_FCC1_NULL = 0x22, RT_CHANNEL_DOMAIN_MKK1_NULL = 0x23, RT_CHANNEL_DOMAIN_ETSI2_NULL = 0x24, RT_CHANNEL_DOMAIN_FCC1_FCC1 = 0x25, RT_CHANNEL_DOMAIN_WORLD_ETSI1 = 0x26, RT_CHANNEL_DOMAIN_MKK1_MKK1 = 0x27, RT_CHANNEL_DOMAIN_WORLD_KCC1 = 0x28, RT_CHANNEL_DOMAIN_WORLD_FCC2 = 0x29, RT_CHANNEL_DOMAIN_WORLD_FCC3 = 0x30, RT_CHANNEL_DOMAIN_WORLD_FCC4 = 0x31, RT_CHANNEL_DOMAIN_WORLD_FCC5 = 0x32, RT_CHANNEL_DOMAIN_WORLD_FCC6 = 0x33, RT_CHANNEL_DOMAIN_FCC1_FCC7 = 0x34, RT_CHANNEL_DOMAIN_WORLD_ETSI2 = 0x35, RT_CHANNEL_DOMAIN_WORLD_ETSI3 = 0x36, RT_CHANNEL_DOMAIN_MKK1_MKK2 = 0x37, RT_CHANNEL_DOMAIN_MKK1_MKK3 = 0x38, RT_CHANNEL_DOMAIN_FCC1_NCC1 = 0x39, RT_CHANNEL_DOMAIN_FCC1_NCC2 = 0x40, RT_CHANNEL_DOMAIN_GLOBAL_NULL = 0x41, RT_CHANNEL_DOMAIN_ETSI1_ETSI4 = 0x42, RT_CHANNEL_DOMAIN_FCC1_FCC2 = 0x43, RT_CHANNEL_DOMAIN_FCC1_NCC3 = 0x44, RT_CHANNEL_DOMAIN_WORLD_ETSI5 = 0x45, RT_CHANNEL_DOMAIN_FCC1_FCC8 = 0x46, RT_CHANNEL_DOMAIN_WORLD_ETSI6 = 0x47, RT_CHANNEL_DOMAIN_WORLD_ETSI7 = 0x48, RT_CHANNEL_DOMAIN_WORLD_ETSI8 = 0x49, RT_CHANNEL_DOMAIN_WORLD_ETSI9 = 0x50, RT_CHANNEL_DOMAIN_WORLD_ETSI10 = 0x51, RT_CHANNEL_DOMAIN_WORLD_ETSI11 = 0x52, RT_CHANNEL_DOMAIN_FCC1_NCC4 = 0x53, RT_CHANNEL_DOMAIN_WORLD_ETSI12 = 0x54, RT_CHANNEL_DOMAIN_FCC1_FCC9 = 0x55, RT_CHANNEL_DOMAIN_WORLD_ETSI13 = 0x56, RT_CHANNEL_DOMAIN_FCC1_FCC10 = 0x57, RT_CHANNEL_DOMAIN_WORLD_MKK4 = 0x58, //===== Add new channel plan above this line===============// RT_CHANNEL_DOMAIN_MAX, RT_CHANNEL_DOMAIN_REALTEK_DEFINE = 0x7F, }RT_CHANNEL_DOMAIN, *PRT_CHANNEL_DOMAIN; typedef enum _RT_CHANNEL_DOMAIN_2G { RT_CHANNEL_DOMAIN_2G_WORLD = 0x00, //Worldwird 13 RT_CHANNEL_DOMAIN_2G_ETSI1 = 0x01, //Europe RT_CHANNEL_DOMAIN_2G_FCC1 = 0x02, //US RT_CHANNEL_DOMAIN_2G_MKK1 = 0x03, //Japan RT_CHANNEL_DOMAIN_2G_ETSI2 = 0x04, //France RT_CHANNEL_DOMAIN_2G_GLOBAL = 0x05, //Global domain RT_CHANNEL_DOMAIN_2G_NULL = 0x06, //===== Add new channel plan above this line===============// RT_CHANNEL_DOMAIN_2G_MAX, }RT_CHANNEL_DOMAIN_2G, *PRT_CHANNEL_DOMAIN_2G; typedef enum _RT_CHANNEL_DOMAIN_5G { RT_CHANNEL_DOMAIN_5G_NULL = 0x00, RT_CHANNEL_DOMAIN_5G_ETSI1 = 0x01, //Europe RT_CHANNEL_DOMAIN_5G_ETSI2 = 0x02, //Australia, New Zealand RT_CHANNEL_DOMAIN_5G_ETSI3 = 0x03, //Russia RT_CHANNEL_DOMAIN_5G_FCC1 = 0x04, //US RT_CHANNEL_DOMAIN_5G_FCC2 = 0x05, //FCC o/w DFS Channels RT_CHANNEL_DOMAIN_5G_FCC3 = 0x06, //India, Mexico RT_CHANNEL_DOMAIN_5G_FCC4 = 0x07, //Venezuela RT_CHANNEL_DOMAIN_5G_FCC5 = 0x08, //China RT_CHANNEL_DOMAIN_5G_FCC6 = 0x09, //Israel RT_CHANNEL_DOMAIN_5G_FCC7_IC1 = 0x0A, //US, Canada RT_CHANNEL_DOMAIN_5G_KCC1 = 0x0B, //Korea RT_CHANNEL_DOMAIN_5G_MKK1 = 0x0C, //Japan RT_CHANNEL_DOMAIN_5G_MKK2 = 0x0D, //Japan (W52, W53) RT_CHANNEL_DOMAIN_5G_MKK3 = 0x0E, //Japan (W56) RT_CHANNEL_DOMAIN_5G_NCC1 = 0x0F, //Taiwan RT_CHANNEL_DOMAIN_5G_NCC2 = 0x10, //Taiwan o/w DFS RT_CHANNEL_DOMAIN_5G_NCC3 = 0x11, //Taiwan w/o DFS, Band4 only RT_CHANNEL_DOMAIN_5G_ETSI4 = 0x12, //Europe w/o DFS, Band1 only RT_CHANNEL_DOMAIN_5G_ETSI5 = 0x13, //Australia, New Zealand(w/o Weather radar) RT_CHANNEL_DOMAIN_5G_FCC8 = 0x14, //Latin America RT_CHANNEL_DOMAIN_5G_ETSI6 = 0x15, //Israel, Bahrain, Egypt, India, China, Malaysia RT_CHANNEL_DOMAIN_5G_ETSI7 = 0x16, //China RT_CHANNEL_DOMAIN_5G_ETSI8 = 0x17, //Jordan RT_CHANNEL_DOMAIN_5G_ETSI9 = 0x18, //Lebanon RT_CHANNEL_DOMAIN_5G_ETSI10 = 0x19, //Qatar RT_CHANNEL_DOMAIN_5G_ETSI11 = 0x1A, //Russia RT_CHANNEL_DOMAIN_5G_NCC4 = 0x1B, //Taiwan, (w/o Weather radar) RT_CHANNEL_DOMAIN_5G_ETSI12 = 0x1C, //Indonesia RT_CHANNEL_DOMAIN_5G_FCC9 = 0x1D, //(w/o Weather radar) RT_CHANNEL_DOMAIN_5G_ETSI13 = 0x1E, //(w/o Weather radar) RT_CHANNEL_DOMAIN_5G_FCC10 = 0x1F, //Argentina (w/o Weather radar) RT_CHANNEL_DOMAIN_5G_KCC2 = 0x20, //Korea 5G RT_CHANNEL_DOMAIN_5G_FCC11 = 0x21, //US/Canada RT_CHANNEL_DOMAIN_5G_NCC5 = 0x22, //Taiwan RT_CHANNEL_DOMAIN_5G_MKK4 = 0x23, //Japan W52 //===== Add new channel plan above this line===============// //===== Driver Self Defined =====// RT_CHANNEL_DOMAIN_5G_FCC = 0x30, RT_CHANNEL_DOMAIN_5G_JAPAN_NO_DFS = 0x31, RT_CHANNEL_DOMAIN_5G_FCC4_NO_DFS = 0x32, RT_CHANNEL_DOMAIN_5G_MAX, }RT_CHANNEL_DOMAIN_5G, *PRT_CHANNEL_DOMAIN_5G; #define rtw_is_channel_plan_valid(chplan) (chplansurvey_timer, (ms)); \ } while(0) #define set_link_timer(mlmeext, ms) \ do { \ /*DBG_871X("%s set_link_timer(%p, %d)\n", __FUNCTION__, (mlmeext), (ms));*/ \ _set_timer(&(mlmeext)->link_timer, (ms)); \ } while(0) #ifdef CONFIG_IEEE80211W #define set_sa_query_timer(mlmeext, ms) \ do { \ DBG_871X("%s set_sa_query_timer(%p, %d)\n", __FUNCTION__, (mlmeext), (ms)); \ _set_timer(&(mlmeext)->sa_query_timer, (ms)); \ } while(0) #endif //CONFIG_IEEE80211W extern int cckrates_included(unsigned char *rate, int ratelen); extern int cckratesonly_included(unsigned char *rate, int ratelen); extern void process_addba_req(_adapter *padapter, u8 *paddba_req, u8 *addr); extern void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len); extern void correct_TSF(_adapter *padapter, struct mlme_ext_priv *pmlmeext); extern void adaptive_early_32k(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len); extern u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer); #ifdef CONFIG_CONCURRENT_MODE sint check_buddy_mlmeinfo_state(_adapter *padapter, u32 state); void concurrent_chk_joinbss_done(_adapter *padapter, int join_res); #endif //CONFIG_CONCURRENT_MODE #ifdef CONFIG_DUALMAC_CONCURRENT void dc_SelectChannel(_adapter *padapter, unsigned char channel); void dc_SetBWMode(_adapter *padapter, unsigned short bwmode, unsigned char channel_offset); void dc_set_channel_bwmode_disconnect(_adapter *padapter); u8 dc_handle_join_request(_adapter *padapter, u8 *ch, u8 *bw, u8 *offset); void dc_handle_join_done(_adapter *padapter, u8 join_res); sint dc_check_fwstate(_adapter *padapter, sint fw_state); u8 dc_handle_site_survey(_adapter *padapter); void dc_report_survey_event(_adapter *padapter, union recv_frame *precv_frame); void dc_set_channel_bwmode_survey_done(_adapter *padapter); void dc_set_ap_channel_bandwidth(_adapter *padapter, u8 channel, u8 channel_offset, u8 bwmode); void dc_resume_xmit(_adapter *padapter); u8 dc_check_xmit(_adapter *padapter); #endif int rtw_chk_start_clnt_join(_adapter *padapter, u8 *ch, u8 *bw, u8 *offset); int rtw_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset); struct cmd_hdl { uint parmsize; u8 (*h2cfuns)(struct _ADAPTER *padapter, u8 *pbuf); }; u8 read_macreg_hdl(_adapter *padapter, u8 *pbuf); u8 write_macreg_hdl(_adapter *padapter, u8 *pbuf); u8 read_bbreg_hdl(_adapter *padapter, u8 *pbuf); u8 write_bbreg_hdl(_adapter *padapter, u8 *pbuf); u8 read_rfreg_hdl(_adapter *padapter, u8 *pbuf); u8 write_rfreg_hdl(_adapter *padapter, u8 *pbuf); u8 NULL_hdl(_adapter *padapter, u8 *pbuf); u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf); u8 disconnect_hdl(_adapter *padapter, u8 *pbuf); u8 createbss_hdl(_adapter *padapter, u8 *pbuf); u8 setopmode_hdl(_adapter *padapter, u8 *pbuf); u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf); u8 setauth_hdl(_adapter *padapter, u8 *pbuf); u8 setkey_hdl(_adapter *padapter, u8 *pbuf); u8 set_stakey_hdl(_adapter *padapter, u8 *pbuf); u8 set_assocsta_hdl(_adapter *padapter, u8 *pbuf); u8 del_assocsta_hdl(_adapter *padapter, u8 *pbuf); u8 add_ba_hdl(_adapter *padapter, unsigned char *pbuf); u8 mlme_evt_hdl(_adapter *padapter, unsigned char *pbuf); u8 h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf); u8 chk_bmc_sleepq_hdl(_adapter *padapter, unsigned char *pbuf); u8 tx_beacon_hdl(_adapter *padapter, unsigned char *pbuf); u8 set_ch_hdl(_adapter *padapter, u8 *pbuf); u8 set_chplan_hdl(_adapter *padapter, unsigned char *pbuf); u8 led_blink_hdl(_adapter *padapter, unsigned char *pbuf); u8 set_csa_hdl(_adapter *padapter, unsigned char *pbuf); //Kurt: Handling DFS channel switch announcement ie. u8 tdls_hdl(_adapter *padapter, unsigned char *pbuf); u8 run_in_thread_hdl(_adapter *padapter, u8 *pbuf); #define GEN_DRV_CMD_HANDLER(size, cmd) {size, &cmd ## _hdl}, #define GEN_MLME_EXT_HANDLER(size, cmd) {size, cmd}, #ifdef _RTW_CMD_C_ struct cmd_hdl wlancmds[] = { GEN_DRV_CMD_HANDLER(0, NULL) /*0*/ GEN_DRV_CMD_HANDLER(0, NULL) GEN_DRV_CMD_HANDLER(0, NULL) GEN_DRV_CMD_HANDLER(0, NULL) GEN_DRV_CMD_HANDLER(0, NULL) GEN_DRV_CMD_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) /*10*/ GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(sizeof (struct joinbss_parm), join_cmd_hdl) /*14*/ GEN_MLME_EXT_HANDLER(sizeof (struct disconnect_parm), disconnect_hdl) GEN_MLME_EXT_HANDLER(sizeof (struct createbss_parm), createbss_hdl) GEN_MLME_EXT_HANDLER(sizeof (struct setopmode_parm), setopmode_hdl) GEN_MLME_EXT_HANDLER(sizeof (struct sitesurvey_parm), sitesurvey_cmd_hdl) /*18*/ GEN_MLME_EXT_HANDLER(sizeof (struct setauth_parm), setauth_hdl) GEN_MLME_EXT_HANDLER(sizeof (struct setkey_parm), setkey_hdl) /*20*/ GEN_MLME_EXT_HANDLER(sizeof (struct set_stakey_parm), set_stakey_hdl) GEN_MLME_EXT_HANDLER(sizeof (struct set_assocsta_parm), NULL) GEN_MLME_EXT_HANDLER(sizeof (struct del_assocsta_parm), NULL) GEN_MLME_EXT_HANDLER(sizeof (struct setstapwrstate_parm), NULL) GEN_MLME_EXT_HANDLER(sizeof (struct setbasicrate_parm), NULL) GEN_MLME_EXT_HANDLER(sizeof (struct getbasicrate_parm), NULL) GEN_MLME_EXT_HANDLER(sizeof (struct setdatarate_parm), NULL) GEN_MLME_EXT_HANDLER(sizeof (struct getdatarate_parm), NULL) GEN_MLME_EXT_HANDLER(sizeof (struct setphyinfo_parm), NULL) GEN_MLME_EXT_HANDLER(sizeof (struct getphyinfo_parm), NULL) /*30*/ GEN_MLME_EXT_HANDLER(sizeof (struct setphy_parm), NULL) GEN_MLME_EXT_HANDLER(sizeof (struct getphy_parm), NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) /*40*/ GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(sizeof(struct addBaReq_parm), add_ba_hdl) GEN_MLME_EXT_HANDLER(sizeof(struct set_ch_parm), set_ch_hdl) /* 46 */ GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) /*50*/ GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(0, NULL) GEN_MLME_EXT_HANDLER(sizeof(struct Tx_Beacon_param), tx_beacon_hdl) /*55*/ GEN_MLME_EXT_HANDLER(0, mlme_evt_hdl) /*56*/ GEN_MLME_EXT_HANDLER(0, rtw_drvextra_cmd_hdl) /*57*/ GEN_MLME_EXT_HANDLER(0, h2c_msg_hdl) /*58*/ GEN_MLME_EXT_HANDLER(sizeof(struct SetChannelPlan_param), set_chplan_hdl) /*59*/ GEN_MLME_EXT_HANDLER(sizeof(struct LedBlink_param), led_blink_hdl) /*60*/ GEN_MLME_EXT_HANDLER(sizeof(struct SetChannelSwitch_param), set_csa_hdl) /*61*/ GEN_MLME_EXT_HANDLER(sizeof(struct TDLSoption_param), tdls_hdl) /*62*/ GEN_MLME_EXT_HANDLER(0, chk_bmc_sleepq_hdl) /*63*/ GEN_MLME_EXT_HANDLER(sizeof(struct RunInThread_param), run_in_thread_hdl) /*64*/ }; #endif struct C2HEvent_Header { #ifdef CONFIG_LITTLE_ENDIAN unsigned int len:16; unsigned int ID:8; unsigned int seq:8; #elif defined(CONFIG_BIG_ENDIAN) unsigned int seq:8; unsigned int ID:8; unsigned int len:16; #else # error "Must be LITTLE or BIG Endian" #endif unsigned int rsvd; }; void rtw_dummy_event_callback(_adapter *adapter , u8 *pbuf); void rtw_fwdbg_event_callback(_adapter *adapter , u8 *pbuf); enum rtw_c2h_event { GEN_EVT_CODE(_Read_MACREG)=0, /*0*/ GEN_EVT_CODE(_Read_BBREG), GEN_EVT_CODE(_Read_RFREG), GEN_EVT_CODE(_Read_EEPROM), GEN_EVT_CODE(_Read_EFUSE), GEN_EVT_CODE(_Read_CAM), /*5*/ GEN_EVT_CODE(_Get_BasicRate), GEN_EVT_CODE(_Get_DataRate), GEN_EVT_CODE(_Survey), /*8*/ GEN_EVT_CODE(_SurveyDone), /*9*/ GEN_EVT_CODE(_JoinBss) , /*10*/ GEN_EVT_CODE(_AddSTA), GEN_EVT_CODE(_DelSTA), GEN_EVT_CODE(_AtimDone) , GEN_EVT_CODE(_TX_Report), GEN_EVT_CODE(_CCX_Report), /*15*/ GEN_EVT_CODE(_DTM_Report), GEN_EVT_CODE(_TX_Rate_Statistics), GEN_EVT_CODE(_C2HLBK), GEN_EVT_CODE(_FWDBG), GEN_EVT_CODE(_C2HFEEDBACK), /*20*/ GEN_EVT_CODE(_ADDBA), GEN_EVT_CODE(_C2HBCN), GEN_EVT_CODE(_ReportPwrState), //filen: only for PCIE, USB GEN_EVT_CODE(_CloseRF), //filen: only for PCIE, work around ASPM GEN_EVT_CODE(_WMM), /*25*/ MAX_C2HEVT }; #ifdef _RTW_MLME_EXT_C_ static struct fwevent wlanevents[] = { {0, rtw_dummy_event_callback}, /*0*/ {0, NULL}, {0, NULL}, {0, NULL}, {0, NULL}, {0, NULL}, {0, NULL}, {0, NULL}, {0, &rtw_survey_event_callback}, /*8*/ {sizeof (struct surveydone_event), &rtw_surveydone_event_callback}, /*9*/ {0, &rtw_joinbss_event_callback}, /*10*/ {sizeof(struct stassoc_event), &rtw_stassoc_event_callback}, {sizeof(struct stadel_event), &rtw_stadel_event_callback}, {0, &rtw_atimdone_event_callback}, {0, rtw_dummy_event_callback}, {0, NULL}, /*15*/ {0, NULL}, {0, NULL}, {0, NULL}, {0, rtw_fwdbg_event_callback}, {0, NULL}, /*20*/ {0, NULL}, {0, NULL}, {0, &rtw_cpwm_event_callback}, {0, NULL}, {0, &rtw_wmm_event_callback}, }; #endif//_RTL8192C_CMD_C_ #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_mp.h000066400000000000000000000507411261122257400206120ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTW_MP_H_ #define _RTW_MP_H_ #if 0 #define MPT_NOOP 0 #define MPT_READ_MAC_1BYTE 1 #define MPT_READ_MAC_2BYTE 2 #define MPT_READ_MAC_4BYTE 3 #define MPT_WRITE_MAC_1BYTE 4 #define MPT_WRITE_MAC_2BYTE 5 #define MPT_WRITE_MAC_4BYTE 6 #define MPT_READ_BB_CCK 7 #define MPT_WRITE_BB_CCK 8 #define MPT_READ_BB_OFDM 9 #define MPT_WRITE_BB_OFDM 10 #define MPT_READ_RF 11 #define MPT_WRITE_RF 12 #define MPT_READ_EEPROM_1BYTE 13 #define MPT_WRITE_EEPROM_1BYTE 14 #define MPT_READ_EEPROM_2BYTE 15 #define MPT_WRITE_EEPROM_2BYTE 16 #define MPT_SET_CSTHRESHOLD 21 #define MPT_SET_INITGAIN 22 #define MPT_SWITCH_BAND 23 #define MPT_SWITCH_CHANNEL 24 #define MPT_SET_DATARATE 25 #define MPT_SWITCH_ANTENNA 26 #define MPT_SET_TX_POWER 27 #define MPT_SET_CONT_TX 28 #define MPT_SET_SINGLE_CARRIER 29 #define MPT_SET_CARRIER_SUPPRESSION 30 #define MPT_GET_RATE_TABLE 31 #define MPT_READ_TSSI 32 #define MPT_GET_THERMAL_METER 33 #endif #define MAX_MP_XMITBUF_SZ 2048 #define NR_MP_XMITFRAME 8 struct mp_xmit_frame { _list list; struct pkt_attrib attrib; _pkt *pkt; int frame_tag; _adapter *padapter; #ifdef CONFIG_USB_HCI //insert urb, irp, and irpcnt info below... //max frag_cnt = 8 u8 *mem_addr; u32 sz[8]; #if defined(PLATFORM_OS_XP) || defined(PLATFORM_LINUX) PURB pxmit_urb[8]; #endif #ifdef PLATFORM_OS_XP PIRP pxmit_irp[8]; #endif u8 bpending[8]; sint ac_tag[8]; sint last[8]; uint irpcnt; uint fragcnt; #endif /* CONFIG_USB_HCI */ uint mem[(MAX_MP_XMITBUF_SZ >> 2)]; }; struct mp_wiparam { u32 bcompleted; u32 act_type; u32 io_offset; u32 io_value; }; typedef void(*wi_act_func)(void* padapter); #ifdef PLATFORM_WINDOWS struct mp_wi_cntx { u8 bmpdrv_unload; // Work Item NDIS_WORK_ITEM mp_wi; NDIS_EVENT mp_wi_evt; _lock mp_wi_lock; u8 bmp_wi_progress; wi_act_func curractfunc; // Variable needed in each implementation of CurrActFunc. struct mp_wiparam param; }; #endif struct mp_tx { u8 stop; u32 count, sended; u8 payload; struct pkt_attrib attrib; //struct tx_desc desc; //u8 resvdtx[7]; u8 desc[TXDESC_SIZE]; u8 *pallocated_buf; u8 *buf; u32 buf_size, write_size; _thread_hdl_ PktTxThread; }; #if defined(CONFIG_RTL8192C) || defined(CONFIG_RTL8192D) || defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ||defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8723B) #define MP_MAX_LINES 1000 #define MP_MAX_LINES_BYTES 256 #define u1Byte u8 #define s1Byte s8 #define u4Byte u32 #define s4Byte s32 #define u1Byte u8 #define pu1Byte u8* #define u2Byte u16 #define pu2Byte u16* #define u4Byte u32 #define pu4Byte u32* #define u8Byte u64 #define pu8Byte u64* #define s1Byte s8 #define ps1Byte s8* #define s2Byte s16 #define ps2Byte s16* #define s4Byte s32 #define ps4Byte s32* #define s8Byte s64 #define ps8Byte s64* #define UCHAR u8 #define USHORT u16 #define UINT u32 #define ULONG u32 #define PULONG u32* typedef VOID (*MPT_WORK_ITEM_HANDLER)(IN PVOID Adapter); typedef struct _MPT_CONTEXT { // Indicate if we have started Mass Production Test. BOOLEAN bMassProdTest; // Indicate if the driver is unloading or unloaded. BOOLEAN bMptDrvUnload; _sema MPh2c_Sema; _timer MPh2c_timeout_timer; // Event used to sync H2c for BT control BOOLEAN MptH2cRspEvent; BOOLEAN MptBtC2hEvent; BOOLEAN bMPh2c_timeout; /* 8190 PCI does not support NDIS_WORK_ITEM. */ // Work Item for Mass Production Test. //NDIS_WORK_ITEM MptWorkItem; // RT_WORK_ITEM MptWorkItem; // Event used to sync the case unloading driver and MptWorkItem is still in progress. // NDIS_EVENT MptWorkItemEvent; // To protect the following variables. // NDIS_SPIN_LOCK MptWorkItemSpinLock; // Indicate a MptWorkItem is scheduled and not yet finished. BOOLEAN bMptWorkItemInProgress; // An instance which implements function and context of MptWorkItem. MPT_WORK_ITEM_HANDLER CurrMptAct; // 1=Start, 0=Stop from UI. ULONG MptTestStart; // _TEST_MODE, defined in MPT_Req2.h ULONG MptTestItem; // Variable needed in each implementation of CurrMptAct. ULONG MptActType; // Type of action performed in CurrMptAct. // The Offset of IO operation is depend of MptActType. ULONG MptIoOffset; // The Value of IO operation is depend of MptActType. ULONG MptIoValue; // The RfPath of IO operation is depend of MptActType. ULONG MptRfPath; WIRELESS_MODE MptWirelessModeToSw; // Wireless mode to switch. u8 MptChannelToSw; // Channel to switch. u8 MptInitGainToSet; // Initial gain to set. //ULONG bMptAntennaA; // TRUE if we want to use antenna A. ULONG MptBandWidth; // bandwidth to switch. ULONG MptRateIndex; // rate index. // Register value kept for Single Carrier Tx test. u8 btMpCckTxPower; // Register value kept for Single Carrier Tx test. u8 btMpOfdmTxPower; // For MP Tx Power index u8 TxPwrLevel[2]; // rf-A, rf-B u32 RegTxPwrLimit; // Content of RCR Regsiter for Mass Production Test. ULONG MptRCR; // TRUE if we only receive packets with specific pattern. BOOLEAN bMptFilterPattern; // Rx OK count, statistics used in Mass Production Test. ULONG MptRxOkCnt; // Rx CRC32 error count, statistics used in Mass Production Test. ULONG MptRxCrcErrCnt; BOOLEAN bCckContTx; // TRUE if we are in CCK Continuous Tx test. BOOLEAN bOfdmContTx; // TRUE if we are in OFDM Continuous Tx test. BOOLEAN bStartContTx; // TRUE if we have start Continuous Tx test. // TRUE if we are in Single Carrier Tx test. BOOLEAN bSingleCarrier; // TRUE if we are in Carrier Suppression Tx Test. BOOLEAN bCarrierSuppression; //TRUE if we are in Single Tone Tx test. BOOLEAN bSingleTone; // ACK counter asked by K.Y.. BOOLEAN bMptEnableAckCounter; ULONG MptAckCounter; // SD3 Willis For 8192S to save 1T/2T RF table for ACUT Only fro ACUT delete later ~~~! //s1Byte BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT]; //s1Byte BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES]; //s4Byte RfReadLine[2]; u8 APK_bound[2]; //for APK path A/path B BOOLEAN bMptIndexEven; u8 backup0xc50; u8 backup0xc58; u8 backup0xc30; u8 backup0x52_RF_A; u8 backup0x52_RF_B; u4Byte backup0x58_RF_A; u4Byte backup0x58_RF_B; u1Byte h2cReqNum; u1Byte c2hBuf[32]; u1Byte btInBuf[100]; ULONG mptOutLen; u1Byte mptOutBuf[100]; }MPT_CONTEXT, *PMPT_CONTEXT; #endif //#endif /* E-Fuse */ #ifdef CONFIG_RTL8192D #define EFUSE_MAP_SIZE 256 #endif #ifdef CONFIG_RTL8192C #define EFUSE_MAP_SIZE 128 #endif #ifdef CONFIG_RTL8723A #define EFUSE_MAP_SIZE 256 #endif #ifdef CONFIG_RTL8188E #define EFUSE_MAP_SIZE 512 #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) #define EFUSE_MAP_SIZE 512 #endif #ifdef CONFIG_RTL8192E #define EFUSE_MAP_SIZE 512 #endif #ifdef CONFIG_RTL8723B #define EFUSE_MAP_SIZE 512 #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) #define EFUSE_MAX_SIZE 1024 #elif defined(CONFIG_RTL8188E) #define EFUSE_MAX_SIZE 256 #else #define EFUSE_MAX_SIZE 512 #endif /* end of E-Fuse */ //#define RTPRIV_IOCTL_MP ( SIOCIWFIRSTPRIV + 0x17) enum { WRITE_REG = 1, READ_REG, WRITE_RF, READ_RF, MP_START, MP_STOP, MP_RATE, MP_CHANNEL, MP_BANDWIDTH, MP_TXPOWER, MP_ANT_TX, MP_ANT_RX, MP_CTX, MP_QUERY, MP_ARX, MP_PSD, MP_PWRTRK, MP_THER, MP_IOCTL, EFUSE_GET, EFUSE_SET, MP_RESET_STATS, MP_DUMP, MP_PHYPARA, MP_SetRFPathSwh, MP_QueryDrvStats, MP_SetBT, CTA_TEST, MP_DISABLE_BT_COEXIST, MP_PwrCtlDM, #ifdef CONFIG_WOWLAN MP_WOW_ENABLE, #endif #ifdef CONFIG_AP_WOWLAN MP_AP_WOW_ENABLE, #endif MP_NULL, MP_GET_TXPOWER_INX, }; struct mp_priv { _adapter *papdater; //Testing Flag u32 mode;//0 for normal type packet, 1 for loopback packet (16bytes TXCMD) u32 prev_fw_state; //OID cmd handler struct mp_wiparam workparam; // u8 act_in_progress; //Tx Section u8 TID; u32 tx_pktcount; u32 pktInterval; struct mp_tx tx; //Rx Section u32 rx_bssidpktcount; u32 rx_pktcount; u32 rx_pktcount_filter_out; u32 rx_crcerrpktcount; u32 rx_pktloss; BOOLEAN rx_bindicatePkt; struct recv_stat rxstat; //RF/BB relative u8 channel; u8 bandwidth; u8 prime_channel_offset; u8 txpoweridx; u8 txpoweridx_b; u8 rateidx; u32 preamble; // u8 modem; u32 CrystalCap; // u32 curr_crystalcap; u16 antenna_tx; u16 antenna_rx; // u8 curr_rfpath; u8 check_mp_pkt; u8 bSetTxPower; // uint ForcedDataRate; u8 mp_dm; u8 mac_filter[ETH_ALEN]; u8 bmac_filter; struct wlan_network mp_network; NDIS_802_11_MAC_ADDRESS network_macaddr; #ifdef PLATFORM_WINDOWS u32 rx_testcnt; u32 rx_testcnt1; u32 rx_testcnt2; u32 tx_testcnt; u32 tx_testcnt1; struct mp_wi_cntx wi_cntx; u8 h2c_result; u8 h2c_seqnum; u16 h2c_cmdcode; u8 h2c_resp_parambuf[512]; _lock h2c_lock; _lock wkitm_lock; u32 h2c_cmdcnt; NDIS_EVENT h2c_cmd_evt; NDIS_EVENT c2h_set; NDIS_EVENT h2c_clr; NDIS_EVENT cpwm_int; NDIS_EVENT scsir_full_evt; NDIS_EVENT scsiw_empty_evt; #endif u8 *pallocated_mp_xmitframe_buf; u8 *pmp_xmtframe_buf; _queue free_mp_xmitqueue; u32 free_mp_xmitframe_cnt; BOOLEAN bSetRxBssid; BOOLEAN bTxBufCkFail; MPT_CONTEXT MptCtx; u8 *TXradomBuffer; }; typedef struct _IOCMD_STRUCT_ { u8 cmdclass; u16 value; u8 index; }IOCMD_STRUCT; struct rf_reg_param { u32 path; u32 offset; u32 value; }; struct bb_reg_param { u32 offset; u32 value; }; typedef struct _MP_FIRMWARE { FIRMWARE_SOURCE eFWSource; #ifdef CONFIG_EMBEDDED_FWIMG u8* szFwBuffer; #else u8 szFwBuffer[0x8000]; #endif u32 ulFwLength; } RT_MP_FIRMWARE, *PRT_MP_FIRMWARE; //======================================================================= #define LOWER _TRUE #define RAISE _FALSE /* Hardware Registers */ #if 0 #if 0 #define IOCMD_CTRL_REG 0x102502C0 #define IOCMD_DATA_REG 0x102502C4 #else #define IOCMD_CTRL_REG 0x10250370 #define IOCMD_DATA_REG 0x10250374 #endif #define IOCMD_GET_THERMAL_METER 0xFD000028 #define IOCMD_CLASS_BB_RF 0xF0 #define IOCMD_BB_READ_IDX 0x00 #define IOCMD_BB_WRITE_IDX 0x01 #define IOCMD_RF_READ_IDX 0x02 #define IOCMD_RF_WRIT_IDX 0x03 #endif #define BB_REG_BASE_ADDR 0x800 /* MP variables */ #if 0 #define _2MAC_MODE_ 0 #define _LOOPBOOK_MODE_ 1 #endif typedef enum _MP_MODE_ { MP_OFF, MP_ON, MP_ERR, MP_CONTINUOUS_TX, MP_SINGLE_CARRIER_TX, MP_CARRIER_SUPPRISSION_TX, MP_SINGLE_TONE_TX, MP_PACKET_TX, MP_PACKET_RX } MP_MODE; #define MAX_RF_PATH_NUMS RF_PATH_MAX extern u8 mpdatarate[NumRates]; /* MP set force data rate base on the definition. */ typedef enum _MPT_RATE_INDEX { /* CCK rate. */ MPT_RATE_1M =0 , /* 0 */ MPT_RATE_2M, MPT_RATE_55M, MPT_RATE_11M, /* 3 */ /* OFDM rate. */ MPT_RATE_6M, /* 4 */ MPT_RATE_9M, MPT_RATE_12M, MPT_RATE_18M, MPT_RATE_24M, MPT_RATE_36M, MPT_RATE_48M, MPT_RATE_54M, /* 11 */ /* HT rate. */ MPT_RATE_MCS0, /* 12 */ MPT_RATE_MCS1, MPT_RATE_MCS2, MPT_RATE_MCS3, MPT_RATE_MCS4, MPT_RATE_MCS5, MPT_RATE_MCS6, MPT_RATE_MCS7, /* 19 */ MPT_RATE_MCS8, MPT_RATE_MCS9, MPT_RATE_MCS10, MPT_RATE_MCS11, MPT_RATE_MCS12, MPT_RATE_MCS13, MPT_RATE_MCS14, MPT_RATE_MCS15, /* 27 */ MPT_RATE_MCS16, MPT_RATE_MCS17, // #29 MPT_RATE_MCS18, MPT_RATE_MCS19, MPT_RATE_MCS20, MPT_RATE_MCS21, MPT_RATE_MCS22, // #34 MPT_RATE_MCS23, MPT_RATE_MCS24, MPT_RATE_MCS25, MPT_RATE_MCS26, MPT_RATE_MCS27, // #39 MPT_RATE_MCS28, // #40 MPT_RATE_MCS29, // #41 MPT_RATE_MCS30, // #42 MPT_RATE_MCS31, // #43 /* VHT rate. Total: 20*/ MPT_RATE_VHT1SS_MCS0,// #44 MPT_RATE_VHT1SS_MCS1, // # MPT_RATE_VHT1SS_MCS2, MPT_RATE_VHT1SS_MCS3, MPT_RATE_VHT1SS_MCS4, MPT_RATE_VHT1SS_MCS5, MPT_RATE_VHT1SS_MCS6, // # MPT_RATE_VHT1SS_MCS7, MPT_RATE_VHT1SS_MCS8, MPT_RATE_VHT1SS_MCS9, //#53 MPT_RATE_VHT2SS_MCS0, //#54 MPT_RATE_VHT2SS_MCS1, MPT_RATE_VHT2SS_MCS2, MPT_RATE_VHT2SS_MCS3, MPT_RATE_VHT2SS_MCS4, MPT_RATE_VHT2SS_MCS5, MPT_RATE_VHT2SS_MCS6, MPT_RATE_VHT2SS_MCS7, MPT_RATE_VHT2SS_MCS8, MPT_RATE_VHT2SS_MCS9, //#63 MPT_RATE_VHT3SS_MCS0, MPT_RATE_VHT3SS_MCS1, MPT_RATE_VHT3SS_MCS2, MPT_RATE_VHT3SS_MCS3, MPT_RATE_VHT3SS_MCS4, MPT_RATE_VHT3SS_MCS5, MPT_RATE_VHT3SS_MCS6, // #126 MPT_RATE_VHT3SS_MCS7, MPT_RATE_VHT3SS_MCS8, MPT_RATE_VHT3SS_MCS9, MPT_RATE_VHT4SS_MCS0, MPT_RATE_VHT4SS_MCS1, // #131 MPT_RATE_VHT4SS_MCS2, MPT_RATE_VHT4SS_MCS3, MPT_RATE_VHT4SS_MCS4, MPT_RATE_VHT4SS_MCS5, MPT_RATE_VHT4SS_MCS6, // #136 MPT_RATE_VHT4SS_MCS7, MPT_RATE_VHT4SS_MCS8, MPT_RATE_VHT4SS_MCS9, MPT_RATE_LAST }MPT_RATE_E, *PMPT_RATE_E; #define MAX_TX_PWR_INDEX_N_MODE 64 // 0x3F typedef enum _POWER_MODE_ { POWER_LOW = 0, POWER_NORMAL }POWER_MODE; // The following enumeration is used to define the value of Reg0xD00[30:28] or JaguarReg0x914[18:16]. typedef enum _OFDM_TX_MODE { OFDM_ALL_OFF = 0, OFDM_ContinuousTx = 1, OFDM_SingleCarrier = 2, OFDM_SingleTone = 4, } OFDM_TX_MODE; #define RX_PKT_BROADCAST 1 #define RX_PKT_DEST_ADDR 2 #define RX_PKT_PHY_MATCH 3 #if 0 #define RPTMaxCount 0x000FFFFF; // parameter 1 : BitMask // bit 0 : OFDM PPDU // bit 1 : OFDM False Alarm // bit 2 : OFDM MPDU OK // bit 3 : OFDM MPDU Fail // bit 4 : CCK PPDU // bit 5 : CCK False Alarm // bit 6 : CCK MPDU ok // bit 7 : CCK MPDU fail // bit 8 : HT PPDU counter // bit 9 : HT false alarm // bit 10 : HT MPDU total // bit 11 : HT MPDU OK // bit 12 : HT MPDU fail // bit 15 : RX full drop typedef enum _RXPHY_BITMASK_ { OFDM_PPDU_BIT = 0, OFDM_FALSE_BIT, OFDM_MPDU_OK_BIT, OFDM_MPDU_FAIL_BIT, CCK_PPDU_BIT, CCK_FALSE_BIT, CCK_MPDU_OK_BIT, CCK_MPDU_FAIL_BIT, HT_PPDU_BIT, HT_FALSE_BIT, HT_MPDU_BIT, HT_MPDU_OK_BIT, HT_MPDU_FAIL_BIT, } RXPHY_BITMASK; #endif #define Mac_OFDM_OK 0x00000000 #define Mac_OFDM_Fail 0x10000000 #define Mac_OFDM_FasleAlarm 0x20000000 #define Mac_CCK_OK 0x30000000 #define Mac_CCK_Fail 0x40000000 #define Mac_CCK_FasleAlarm 0x50000000 #define Mac_HT_OK 0x60000000 #define Mac_HT_Fail 0x70000000 #define Mac_HT_FasleAlarm 0x90000000 #define Mac_DropPacket 0xA0000000 typedef enum _ENCRY_CTRL_STATE_ { HW_CONTROL, //hw encryption& decryption SW_CONTROL, //sw encryption& decryption HW_ENCRY_SW_DECRY, //hw encryption & sw decryption SW_ENCRY_HW_DECRY //sw encryption & hw decryption }ENCRY_CTRL_STATE; typedef enum _MPT_TXPWR_DEF{ MPT_CCK, MPT_OFDM, // L and HT OFDM MPT_VHT_OFDM }MPT_TXPWR_DEF; #ifdef CONFIG_RF_GAIN_OFFSET #if defined(CONFIG_RTL8723A) #define REG_RF_BB_GAIN_OFFSET_CCK 0x0d #define REG_RF_BB_GAIN_OFFSET_OFDM 0x0e #define RF_GAIN_OFFSET_MASK 0xfffff #elif defined(CONFIG_RTL8723B) #define REG_RF_BB_GAIN_OFFSET 0x7f #define RF_GAIN_OFFSET_MASK 0xfffff #elif defined(CONFIG_RTL8188E) #define REG_RF_BB_GAIN_OFFSET 0x55 #define RF_GAIN_OFFSET_MASK 0xfffff #else #define REG_RF_BB_GAIN_OFFSET 0x55 #define RF_GAIN_OFFSET_MASK 0xfffff #endif //CONFIG_RTL8723A #endif //CONFIG_RF_GAIN_OFFSET //======================================================================= //extern struct mp_xmit_frame *alloc_mp_xmitframe(struct mp_priv *pmp_priv); //extern int free_mp_xmitframe(struct xmit_priv *pxmitpriv, struct mp_xmit_frame *pmp_xmitframe); extern s32 init_mp_priv(PADAPTER padapter); extern void free_mp_priv(struct mp_priv *pmp_priv); extern s32 MPT_InitializeAdapter(PADAPTER padapter, u8 Channel); extern void MPT_DeInitAdapter(PADAPTER padapter); extern s32 mp_start_test(PADAPTER padapter); extern void mp_stop_test(PADAPTER padapter); //======================================================================= //extern void IQCalibrateBcut(PADAPTER pAdapter); //extern u32 bb_reg_read(PADAPTER Adapter, u16 offset); //extern u8 bb_reg_write(PADAPTER Adapter, u16 offset, u32 value); //extern u32 rf_reg_read(PADAPTER Adapter, u8 path, u8 offset); //extern u8 rf_reg_write(PADAPTER Adapter, u8 path, u8 offset, u32 value); //extern u32 get_bb_reg(PADAPTER Adapter, u16 offset, u32 bitmask); //extern u8 set_bb_reg(PADAPTER Adapter, u16 offset, u32 bitmask, u32 value); //extern u32 get_rf_reg(PADAPTER Adapter, u8 path, u8 offset, u32 bitmask); //extern u8 set_rf_reg(PADAPTER Adapter, u8 path, u8 offset, u32 bitmask, u32 value); extern u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask); extern void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val); extern u32 read_macreg(_adapter *padapter, u32 addr, u32 sz); extern void write_macreg(_adapter *padapter, u32 addr, u32 val, u32 sz); extern u32 read_bbreg(_adapter *padapter, u32 addr, u32 bitmask); extern void write_bbreg(_adapter *padapter, u32 addr, u32 bitmask, u32 val); extern u32 read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr); extern void write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 val); extern void SetChannel(PADAPTER pAdapter); extern void SetBandwidth(PADAPTER pAdapter); extern int SetTxPower(PADAPTER pAdapter); extern void SetAntennaPathPower(PADAPTER pAdapter); //extern void SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset); extern void SetDataRate(PADAPTER pAdapter); extern void SetAntenna(PADAPTER pAdapter); //extern void SetCrystalCap(PADAPTER pAdapter); extern s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther); extern void GetThermalMeter(PADAPTER pAdapter, u8 *value); extern void SetContinuousTx(PADAPTER pAdapter, u8 bStart); extern void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart); extern void SetSingleToneTx(PADAPTER pAdapter, u8 bStart); extern void SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart); extern void PhySetTxPowerLevel(PADAPTER pAdapter); extern void fill_txdesc_for_mp(PADAPTER padapter, u8 *ptxdesc); extern void SetPacketTx(PADAPTER padapter); extern void SetPacketRx(PADAPTER pAdapter, u8 bStartRx); extern void ResetPhyRxPktCount(PADAPTER pAdapter); extern u32 GetPhyRxPktReceived(PADAPTER pAdapter); extern u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter); extern s32 SetPowerTracking(PADAPTER padapter, u8 enable); extern void GetPowerTracking(PADAPTER padapter, u8 *enable); extern u32 mp_query_psd(PADAPTER pAdapter, u8 *data); extern void Hal_SetAntenna(PADAPTER pAdapter); extern void Hal_SetBandwidth(PADAPTER pAdapter); extern void Hal_SetTxPower(PADAPTER pAdapter); extern void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart); extern void Hal_SetSingleToneTx ( PADAPTER pAdapter , u8 bStart ); extern void Hal_SetSingleCarrierTx (PADAPTER pAdapter, u8 bStart); extern void Hal_SetContinuousTx (PADAPTER pAdapter, u8 bStart); extern void Hal_SetBandwidth(PADAPTER pAdapter); extern void Hal_SetDataRate(PADAPTER pAdapter); extern void Hal_SetChannel(PADAPTER pAdapter); extern void Hal_SetAntennaPathPower(PADAPTER pAdapter); extern s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther); extern s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable); extern void Hal_GetPowerTracking(PADAPTER padapter, u8 * enable); extern void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value); extern void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter); extern void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14); extern void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven); extern void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 * TxPower); extern void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 * TxPower); extern void Hal_TriggerRFThermalMeter(PADAPTER pAdapter); extern u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter); extern void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart); extern void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart); extern void Hal_ProSetCrystalCap (PADAPTER pAdapter , u32 CrystalCapVal); //extern void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv); extern void MP_PHY_SetRFPathSwitch(PADAPTER pAdapter ,BOOLEAN bMain); extern ULONG mpt_ProQueryCalTxPower(PADAPTER pAdapter,u8 RfPath); extern void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart); extern u8 MptToMgntRate(u32 MptRateIdx); extern u8 rtw_mpRateParseFunc(PADAPTER pAdapter, u8 *targetStr); #endif //_RTW_MP_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_mp_ioctl.h000066400000000000000000000556161261122257400220120ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTW_MP_IOCTL_H_ #define _RTW_MP_IOCTL_H_ #include #include #if 0 #define TESTFWCMDNUMBER 1000000 #define TEST_H2CINT_WAIT_TIME 500 #define TEST_C2HINT_WAIT_TIME 500 #define HCI_TEST_SYSCFG_HWMASK 1 #define _BUSCLK_40M (4 << 2) #endif //------------------------------------------------------------------------------ typedef struct CFG_DBG_MSG_STRUCT { u32 DebugLevel; u32 DebugComponent_H32; u32 DebugComponent_L32; }CFG_DBG_MSG_STRUCT,*PCFG_DBG_MSG_STRUCT; typedef struct _RW_REG { u32 offset; u32 width; u32 value; }mp_rw_reg,RW_Reg, *pRW_Reg; //for OID_RT_PRO_READ16_EEPROM & OID_RT_PRO_WRITE16_EEPROM typedef struct _EEPROM_RW_PARAM { u32 offset; u16 value; }eeprom_rw_param,EEPROM_RWParam, *pEEPROM_RWParam; typedef struct _EFUSE_ACCESS_STRUCT_ { u16 start_addr; u16 cnts; u8 data[0]; }EFUSE_ACCESS_STRUCT, *PEFUSE_ACCESS_STRUCT; typedef struct _BURST_RW_REG { u32 offset; u32 len; u8 Data[256]; }burst_rw_reg,Burst_RW_Reg, *pBurst_RW_Reg; typedef struct _USB_VendorReq{ u8 bRequest; u16 wValue; u16 wIndex; u16 wLength; u8 u8Dir;//0:OUT, 1:IN u8 u8InData; }usb_vendor_req, USB_VendorReq, *pUSB_VendorReq; typedef struct _DR_VARIABLE_STRUCT_ { u8 offset; u32 variable; }DR_VARIABLE_STRUCT; //int mp_start_joinbss(_adapter *padapter, NDIS_802_11_SSID *pssid); //void _irqlevel_changed_(_irqL *irqlevel, /*BOOLEAN*/unsigned char bLower); #ifdef PLATFORM_OS_XP static void _irqlevel_changed_(_irqL *irqlevel, u8 bLower) { if (bLower == LOWER) { *irqlevel = KeGetCurrentIrql(); if (*irqlevel > PASSIVE_LEVEL) { KeLowerIrql(PASSIVE_LEVEL); } } else { if (KeGetCurrentIrql() == PASSIVE_LEVEL) { KeRaiseIrql(DISPATCH_LEVEL, irqlevel); } } } #else #define _irqlevel_changed_(a,b) #endif //oid_rtl_seg_81_80_00 NDIS_STATUS oid_rt_pro_set_data_rate_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_start_test_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_stop_test_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_set_channel_direct_call_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_set_antenna_bb_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_set_tx_power_control_hdl(struct oid_par_priv* poid_par_priv); //oid_rtl_seg_81_80_20 NDIS_STATUS oid_rt_pro_query_tx_packet_sent_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_query_rx_packet_received_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_query_rx_packet_crc32_error_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_reset_tx_packet_sent_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_reset_rx_packet_received_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_set_modulation_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_set_continuous_tx_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_set_single_carrier_tx_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_set_carrier_suppression_tx_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_set_single_tone_tx_hdl(struct oid_par_priv* poid_par_priv); //oid_rtl_seg_81_87 NDIS_STATUS oid_rt_pro_write_bb_reg_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_read_bb_reg_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_write_rf_reg_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_read_rf_reg_hdl(struct oid_par_priv* poid_par_priv); //oid_rtl_seg_81_85 NDIS_STATUS oid_rt_wireless_mode_hdl(struct oid_par_priv* poid_par_priv); // oid_rtl_seg_87_11_00 NDIS_STATUS oid_rt_pro8711_join_bss_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_read_register_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_write_register_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_burst_read_register_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_burst_write_register_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_write_txcmd_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_read16_eeprom_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_write16_eeprom_hdl (struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro8711_wi_poll_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro8711_pkt_loss_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_rd_attrib_mem_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_wr_attrib_mem_hdl (struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_set_rf_intfs_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_poll_rx_status_hdl(struct oid_par_priv* poid_par_priv); // oid_rtl_seg_87_11_20 NDIS_STATUS oid_rt_pro_cfg_debug_message_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_set_data_rate_ex_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_set_basic_rate_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_read_tssi_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_set_power_tracking_hdl(struct oid_par_priv* poid_par_priv); //oid_rtl_seg_87_11_50 NDIS_STATUS oid_rt_pro_qry_pwrstate_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_set_pwrstate_hdl(struct oid_par_priv* poid_par_priv); //oid_rtl_seg_87_11_F0 NDIS_STATUS oid_rt_pro_h2c_set_rate_table_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_h2c_get_rate_table_hdl(struct oid_par_priv* poid_par_priv); //oid_rtl_seg_87_12_00 NDIS_STATUS oid_rt_pro_encryption_ctrl_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_add_sta_info_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_dele_sta_info_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_query_dr_variable_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_rx_packet_type_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_read_efuse_hdl(struct oid_par_priv *poid_par_priv); NDIS_STATUS oid_rt_pro_write_efuse_hdl(struct oid_par_priv *poid_par_priv); NDIS_STATUS oid_rt_pro_rw_efuse_pgpkt_hdl(struct oid_par_priv *poid_par_priv); NDIS_STATUS oid_rt_get_efuse_current_size_hdl(struct oid_par_priv *poid_par_priv); NDIS_STATUS oid_rt_pro_efuse_hdl(struct oid_par_priv *poid_par_priv); NDIS_STATUS oid_rt_pro_efuse_map_hdl(struct oid_par_priv *poid_par_priv); NDIS_STATUS oid_rt_set_bandwidth_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_set_crystal_cap_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_set_rx_packet_type_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_efuse_max_size_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_set_tx_agc_offset_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_set_pkt_test_mode_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_thermal_meter_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_reset_phy_rx_packet_count_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_phy_rx_packet_received_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_phy_rx_packet_crc32_error_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_set_power_down_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_get_power_mode_hdl(struct oid_par_priv* poid_par_priv); NDIS_STATUS oid_rt_pro_trigger_gpio_hdl(struct oid_par_priv *poid_par_priv); #ifdef _RTW_MP_IOCTL_C_ const struct oid_obj_priv oid_rtl_seg_81_80_00[] = { {1, &oid_null_function}, //0x00 OID_RT_PRO_RESET_DUT {1, &oid_rt_pro_set_data_rate_hdl}, //0x01 {1, &oid_rt_pro_start_test_hdl}, //0x02 {1, &oid_rt_pro_stop_test_hdl}, //0x03 {1, &oid_null_function}, //0x04 OID_RT_PRO_SET_PREAMBLE {1, &oid_null_function}, //0x05 OID_RT_PRO_SET_SCRAMBLER {1, &oid_null_function}, //0x06 OID_RT_PRO_SET_FILTER_BB {1, &oid_null_function}, //0x07 OID_RT_PRO_SET_MANUAL_DIVERSITY_BB {1, &oid_rt_pro_set_channel_direct_call_hdl}, //0x08 {1, &oid_null_function}, //0x09 OID_RT_PRO_SET_SLEEP_MODE_DIRECT_CALL {1, &oid_null_function}, //0x0A OID_RT_PRO_SET_WAKE_MODE_DIRECT_CALL {1, &oid_rt_pro_set_continuous_tx_hdl}, //0x0B OID_RT_PRO_SET_TX_CONTINUOUS_DIRECT_CALL {1, &oid_rt_pro_set_single_carrier_tx_hdl}, //0x0C OID_RT_PRO_SET_SINGLE_CARRIER_TX_CONTINUOUS {1, &oid_null_function}, //0x0D OID_RT_PRO_SET_TX_ANTENNA_BB {1, &oid_rt_pro_set_antenna_bb_hdl}, //0x0E {1, &oid_null_function}, //0x0F OID_RT_PRO_SET_CR_SCRAMBLER {1, &oid_null_function}, //0x10 OID_RT_PRO_SET_CR_NEW_FILTER {1, &oid_rt_pro_set_tx_power_control_hdl}, //0x11 OID_RT_PRO_SET_TX_POWER_CONTROL {1, &oid_null_function}, //0x12 OID_RT_PRO_SET_CR_TX_CONFIG {1, &oid_null_function}, //0x13 OID_RT_PRO_GET_TX_POWER_CONTROL {1, &oid_null_function}, //0x14 OID_RT_PRO_GET_CR_SIGNAL_QUALITY {1, &oid_null_function}, //0x15 OID_RT_PRO_SET_CR_SETPOINT {1, &oid_null_function}, //0x16 OID_RT_PRO_SET_INTEGRATOR {1, &oid_null_function}, //0x17 OID_RT_PRO_SET_SIGNAL_QUALITY {1, &oid_null_function}, //0x18 OID_RT_PRO_GET_INTEGRATOR {1, &oid_null_function}, //0x19 OID_RT_PRO_GET_SIGNAL_QUALITY {1, &oid_null_function}, //0x1A OID_RT_PRO_QUERY_EEPROM_TYPE {1, &oid_null_function}, //0x1B OID_RT_PRO_WRITE_MAC_ADDRESS {1, &oid_null_function}, //0x1C OID_RT_PRO_READ_MAC_ADDRESS {1, &oid_null_function}, //0x1D OID_RT_PRO_WRITE_CIS_DATA {1, &oid_null_function}, //0x1E OID_RT_PRO_READ_CIS_DATA {1, &oid_null_function} //0x1F OID_RT_PRO_WRITE_POWER_CONTROL }; const struct oid_obj_priv oid_rtl_seg_81_80_20[] = { {1, &oid_null_function}, //0x20 OID_RT_PRO_READ_POWER_CONTROL {1, &oid_null_function}, //0x21 OID_RT_PRO_WRITE_EEPROM {1, &oid_null_function}, //0x22 OID_RT_PRO_READ_EEPROM {1, &oid_rt_pro_reset_tx_packet_sent_hdl}, //0x23 {1, &oid_rt_pro_query_tx_packet_sent_hdl}, //0x24 {1, &oid_rt_pro_reset_rx_packet_received_hdl}, //0x25 {1, &oid_rt_pro_query_rx_packet_received_hdl}, //0x26 {1, &oid_rt_pro_query_rx_packet_crc32_error_hdl}, //0x27 {1, &oid_null_function}, //0x28 OID_RT_PRO_QUERY_CURRENT_ADDRESS {1, &oid_null_function}, //0x29 OID_RT_PRO_QUERY_PERMANENT_ADDRESS {1, &oid_null_function}, //0x2A OID_RT_PRO_SET_PHILIPS_RF_PARAMETERS {1, &oid_rt_pro_set_carrier_suppression_tx_hdl},//0x2B OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX {1, &oid_null_function}, //0x2C OID_RT_PRO_RECEIVE_PACKET {1, &oid_null_function}, //0x2D OID_RT_PRO_WRITE_EEPROM_BYTE {1, &oid_null_function}, //0x2E OID_RT_PRO_READ_EEPROM_BYTE {1, &oid_rt_pro_set_modulation_hdl} //0x2F }; const struct oid_obj_priv oid_rtl_seg_81_80_40[] = { {1, &oid_null_function}, //0x40 {1, &oid_null_function}, //0x41 {1, &oid_null_function}, //0x42 {1, &oid_rt_pro_set_single_tone_tx_hdl}, //0x43 {1, &oid_null_function}, //0x44 {1, &oid_null_function} //0x45 }; const struct oid_obj_priv oid_rtl_seg_81_80_80[] = { {1, &oid_null_function}, //0x80 OID_RT_DRIVER_OPTION {1, &oid_null_function}, //0x81 OID_RT_RF_OFF {1, &oid_null_function} //0x82 OID_RT_AUTH_STATUS }; const struct oid_obj_priv oid_rtl_seg_81_85[] = { {1, &oid_rt_wireless_mode_hdl} //0x00 OID_RT_WIRELESS_MODE }; struct oid_obj_priv oid_rtl_seg_81_87[] = { {1, &oid_null_function}, //0x80 OID_RT_PRO8187_WI_POLL {1, &oid_rt_pro_write_bb_reg_hdl}, //0x81 {1, &oid_rt_pro_read_bb_reg_hdl}, //0x82 {1, &oid_rt_pro_write_rf_reg_hdl}, //0x82 {1, &oid_rt_pro_read_rf_reg_hdl} //0x83 }; struct oid_obj_priv oid_rtl_seg_87_11_00[] = { {1, &oid_rt_pro8711_join_bss_hdl}, //0x00 //S {1, &oid_rt_pro_read_register_hdl}, //0x01 {1, &oid_rt_pro_write_register_hdl}, //0x02 {1, &oid_rt_pro_burst_read_register_hdl}, //0x03 {1, &oid_rt_pro_burst_write_register_hdl}, //0x04 {1, &oid_rt_pro_write_txcmd_hdl}, //0x05 {1, &oid_rt_pro_read16_eeprom_hdl}, //0x06 {1, &oid_rt_pro_write16_eeprom_hdl}, //0x07 {1, &oid_null_function}, //0x08 OID_RT_PRO_H2C_SET_COMMAND {1, &oid_null_function}, //0x09 OID_RT_PRO_H2C_QUERY_RESULT {1, &oid_rt_pro8711_wi_poll_hdl}, //0x0A {1, &oid_rt_pro8711_pkt_loss_hdl}, //0x0B {1, &oid_rt_rd_attrib_mem_hdl}, //0x0C {1, &oid_rt_wr_attrib_mem_hdl}, //0x0D {1, &oid_null_function}, //0x0E {1, &oid_null_function}, //0x0F {1, &oid_null_function}, //0x10 OID_RT_PRO_H2C_CMD_MODE {1, &oid_null_function}, //0x11 OID_RT_PRO_H2C_CMD_RSP_MODE {1, &oid_null_function}, //0X12 OID_RT_PRO_WAIT_C2H_EVENT {1, &oid_null_function}, //0X13 OID_RT_PRO_RW_ACCESS_PROTOCOL_TEST {1, &oid_null_function}, //0X14 OID_RT_PRO_SCSI_ACCESS_TEST {1, &oid_null_function}, //0X15 OID_RT_PRO_SCSI_TCPIPOFFLOAD_OUT {1, &oid_null_function}, //0X16 OID_RT_PRO_SCSI_TCPIPOFFLOAD_IN {1, &oid_null_function}, //0X17 OID_RT_RRO_RX_PKT_VIA_IOCTRL {1, &oid_null_function}, //0X18 OID_RT_RRO_RX_PKTARRAY_VIA_IOCTRL {1, &oid_null_function}, //0X19 OID_RT_RPO_SET_PWRMGT_TEST {1, &oid_null_function}, //0X1A {1, &oid_null_function}, //0X1B OID_RT_PRO_QRY_PWRMGT_TEST {1, &oid_null_function}, //0X1C OID_RT_RPO_ASYNC_RWIO_TEST {1, &oid_null_function}, //0X1D OID_RT_RPO_ASYNC_RWIO_POLL {1, &oid_rt_pro_set_rf_intfs_hdl}, //0X1E {1, &oid_rt_poll_rx_status_hdl} //0X1F }; struct oid_obj_priv oid_rtl_seg_87_11_20[] = { {1, &oid_rt_pro_cfg_debug_message_hdl}, //0x20 {1, &oid_rt_pro_set_data_rate_ex_hdl}, //0x21 {1, &oid_rt_pro_set_basic_rate_hdl}, //0x22 {1, &oid_rt_pro_read_tssi_hdl}, //0x23 {1, &oid_rt_pro_set_power_tracking_hdl} //0x24 }; struct oid_obj_priv oid_rtl_seg_87_11_50[] = { {1, &oid_rt_pro_qry_pwrstate_hdl}, //0x50 {1, &oid_rt_pro_set_pwrstate_hdl} //0x51 }; struct oid_obj_priv oid_rtl_seg_87_11_80[] = { {1, &oid_null_function} //0x80 }; struct oid_obj_priv oid_rtl_seg_87_11_B0[] = { {1, &oid_null_function} //0xB0 }; struct oid_obj_priv oid_rtl_seg_87_11_F0[] = { {1, &oid_null_function}, //0xF0 {1, &oid_null_function}, //0xF1 {1, &oid_null_function}, //0xF2 {1, &oid_null_function}, //0xF3 {1, &oid_null_function}, //0xF4 {1, &oid_null_function}, //0xF5 {1, &oid_null_function}, //0xF6 {1, &oid_null_function}, //0xF7 {1, &oid_null_function}, //0xF8 {1, &oid_null_function}, //0xF9 {1, &oid_null_function}, //0xFA {1, &oid_rt_pro_h2c_set_rate_table_hdl}, //0xFB {1, &oid_rt_pro_h2c_get_rate_table_hdl}, //0xFC {1, &oid_null_function}, //0xFD {1, &oid_null_function}, //0xFE OID_RT_PRO_H2C_C2H_LBK_TEST {1, &oid_null_function} //0xFF }; struct oid_obj_priv oid_rtl_seg_87_12_00[]= { {1, &oid_rt_pro_encryption_ctrl_hdl}, //0x00 Q&S {1, &oid_rt_pro_add_sta_info_hdl}, //0x01 S {1, &oid_rt_pro_dele_sta_info_hdl}, //0x02 S {1, &oid_rt_pro_query_dr_variable_hdl}, //0x03 Q {1, &oid_rt_pro_rx_packet_type_hdl}, //0x04 Q,S {1, &oid_rt_pro_read_efuse_hdl}, //0x05 Q OID_RT_PRO_READ_EFUSE {1, &oid_rt_pro_write_efuse_hdl}, //0x06 S OID_RT_PRO_WRITE_EFUSE {1, &oid_rt_pro_rw_efuse_pgpkt_hdl}, //0x07 Q,S {1, &oid_rt_get_efuse_current_size_hdl}, //0x08 Q {1, &oid_rt_set_bandwidth_hdl}, //0x09 {1, &oid_rt_set_crystal_cap_hdl}, //0x0a {1, &oid_rt_set_rx_packet_type_hdl}, //0x0b S {1, &oid_rt_get_efuse_max_size_hdl}, //0x0c {1, &oid_rt_pro_set_tx_agc_offset_hdl}, //0x0d {1, &oid_rt_pro_set_pkt_test_mode_hdl}, //0x0e {1, &oid_null_function}, //0x0f OID_RT_PRO_FOR_EVM_TEST_SETTING {1, &oid_rt_get_thermal_meter_hdl}, //0x10 Q OID_RT_PRO_GET_THERMAL_METER {1, &oid_rt_reset_phy_rx_packet_count_hdl}, //0x11 S OID_RT_RESET_PHY_RX_PACKET_COUNT {1, &oid_rt_get_phy_rx_packet_received_hdl}, //0x12 Q OID_RT_GET_PHY_RX_PACKET_RECEIVED {1, &oid_rt_get_phy_rx_packet_crc32_error_hdl}, //0x13 Q OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR {1, &oid_rt_set_power_down_hdl}, //0x14 Q OID_RT_SET_POWER_DOWN {1, &oid_rt_get_power_mode_hdl} //0x15 Q OID_RT_GET_POWER_MODE }; #else /* _RTL871X_MP_IOCTL_C_ */ extern struct oid_obj_priv oid_rtl_seg_81_80_00[32]; extern struct oid_obj_priv oid_rtl_seg_81_80_20[16]; extern struct oid_obj_priv oid_rtl_seg_81_80_40[6]; extern struct oid_obj_priv oid_rtl_seg_81_80_80[3]; extern struct oid_obj_priv oid_rtl_seg_81_85[1]; extern struct oid_obj_priv oid_rtl_seg_81_87[5]; extern struct oid_obj_priv oid_rtl_seg_87_11_00[32]; extern struct oid_obj_priv oid_rtl_seg_87_11_20[5]; extern struct oid_obj_priv oid_rtl_seg_87_11_50[2]; extern struct oid_obj_priv oid_rtl_seg_87_11_80[1]; extern struct oid_obj_priv oid_rtl_seg_87_11_B0[1]; extern struct oid_obj_priv oid_rtl_seg_87_11_F0[16]; extern struct oid_obj_priv oid_rtl_seg_87_12_00[32]; #endif /* _RTL871X_MP_IOCTL_C_ */ struct rwreg_param{ u32 offset; u32 width; u32 value; }; struct bbreg_param{ u32 offset; u32 phymask; u32 value; }; /* struct rfchannel_param{ u32 ch; u32 modem; }; */ struct txpower_param{ u32 pwr_index; }; struct datarate_param{ u32 rate_index; }; struct rfintfs_parm { u32 rfintfs; }; typedef struct _mp_xmit_parm_ { u8 enable; u32 count; u16 length; u8 payload_type; u8 da[ETH_ALEN]; }MP_XMIT_PARM, *PMP_XMIT_PARM; struct mp_xmit_packet { u32 len; u32 mem[MAX_MP_XMITBUF_SZ >> 2]; }; struct psmode_param { u32 ps_mode; u32 smart_ps; }; //for OID_RT_PRO_READ16_EEPROM & OID_RT_PRO_WRITE16_EEPROM struct eeprom_rw_param { u32 offset; u16 value; }; struct mp_ioctl_handler { u32 paramsize; u32 (*handler)(struct oid_par_priv* poid_par_priv); u32 oid; }; struct mp_ioctl_param{ u32 subcode; u32 len; u8 data[0]; }; #define GEN_MP_IOCTL_SUBCODE(code) _MP_IOCTL_ ## code ## _CMD_ enum RTL871X_MP_IOCTL_SUBCODE { GEN_MP_IOCTL_SUBCODE(MP_START), /*0*/ GEN_MP_IOCTL_SUBCODE(MP_STOP), GEN_MP_IOCTL_SUBCODE(READ_REG), GEN_MP_IOCTL_SUBCODE(WRITE_REG), GEN_MP_IOCTL_SUBCODE(READ_BB_REG), GEN_MP_IOCTL_SUBCODE(WRITE_BB_REG), /*5*/ GEN_MP_IOCTL_SUBCODE(READ_RF_REG), GEN_MP_IOCTL_SUBCODE(WRITE_RF_REG), GEN_MP_IOCTL_SUBCODE(SET_CHANNEL), GEN_MP_IOCTL_SUBCODE(SET_TXPOWER), GEN_MP_IOCTL_SUBCODE(SET_DATARATE), /*10*/ GEN_MP_IOCTL_SUBCODE(SET_BANDWIDTH), GEN_MP_IOCTL_SUBCODE(SET_ANTENNA), GEN_MP_IOCTL_SUBCODE(CNTU_TX), GEN_MP_IOCTL_SUBCODE(SC_TX), GEN_MP_IOCTL_SUBCODE(CS_TX), /*15*/ GEN_MP_IOCTL_SUBCODE(ST_TX), GEN_MP_IOCTL_SUBCODE(IOCTL_XMIT_PACKET), GEN_MP_IOCTL_SUBCODE(SET_RX_PKT_TYPE), GEN_MP_IOCTL_SUBCODE(RESET_PHY_RX_PKT_CNT), GEN_MP_IOCTL_SUBCODE(GET_PHY_RX_PKT_RECV), /*20*/ GEN_MP_IOCTL_SUBCODE(GET_PHY_RX_PKT_ERROR), GEN_MP_IOCTL_SUBCODE(READ16_EEPROM), GEN_MP_IOCTL_SUBCODE(WRITE16_EEPROM), GEN_MP_IOCTL_SUBCODE(EFUSE), GEN_MP_IOCTL_SUBCODE(EFUSE_MAP), /*25*/ GEN_MP_IOCTL_SUBCODE(GET_EFUSE_MAX_SIZE), GEN_MP_IOCTL_SUBCODE(GET_EFUSE_CURRENT_SIZE), GEN_MP_IOCTL_SUBCODE(GET_THERMAL_METER), GEN_MP_IOCTL_SUBCODE(SET_PTM), GEN_MP_IOCTL_SUBCODE(SET_POWER_DOWN), /*30*/ GEN_MP_IOCTL_SUBCODE(TRIGGER_GPIO), GEN_MP_IOCTL_SUBCODE(SET_DM_BT), /*32*/ GEN_MP_IOCTL_SUBCODE(DEL_BA), /*33*/ GEN_MP_IOCTL_SUBCODE(GET_WIFI_STATUS), /*34*/ MAX_MP_IOCTL_SUBCODE, }; u32 mp_ioctl_xmit_packet_hdl(struct oid_par_priv* poid_par_priv); #ifdef _RTW_MP_IOCTL_C_ #define GEN_MP_IOCTL_HANDLER(sz, hdl, oid) {sz, hdl, oid}, #define EXT_MP_IOCTL_HANDLER(sz, subcode, oid) {sz, mp_ioctl_ ## subcode ## _hdl, oid}, struct mp_ioctl_handler mp_ioctl_hdl[] = { /*0*/ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_start_test_hdl, OID_RT_PRO_START_TEST) GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_stop_test_hdl, OID_RT_PRO_STOP_TEST) GEN_MP_IOCTL_HANDLER(sizeof(struct rwreg_param), oid_rt_pro_read_register_hdl, OID_RT_PRO_READ_REGISTER) GEN_MP_IOCTL_HANDLER(sizeof(struct rwreg_param), oid_rt_pro_write_register_hdl, OID_RT_PRO_WRITE_REGISTER) GEN_MP_IOCTL_HANDLER(sizeof(struct bb_reg_param), oid_rt_pro_read_bb_reg_hdl, OID_RT_PRO_READ_BB_REG) /*5*/ GEN_MP_IOCTL_HANDLER(sizeof(struct bb_reg_param), oid_rt_pro_write_bb_reg_hdl, OID_RT_PRO_WRITE_BB_REG) GEN_MP_IOCTL_HANDLER(sizeof(struct rf_reg_param), oid_rt_pro_read_rf_reg_hdl, OID_RT_PRO_RF_READ_REGISTRY) GEN_MP_IOCTL_HANDLER(sizeof(struct rf_reg_param), oid_rt_pro_write_rf_reg_hdl, OID_RT_PRO_RF_WRITE_REGISTRY) GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_channel_direct_call_hdl, OID_RT_PRO_SET_CHANNEL_DIRECT_CALL) GEN_MP_IOCTL_HANDLER(sizeof(struct txpower_param), oid_rt_pro_set_tx_power_control_hdl, OID_RT_PRO_SET_TX_POWER_CONTROL) /*10*/ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_data_rate_hdl, OID_RT_PRO_SET_DATA_RATE) GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_set_bandwidth_hdl, OID_RT_SET_BANDWIDTH) GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_antenna_bb_hdl, OID_RT_PRO_SET_ANTENNA_BB) GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_continuous_tx_hdl, OID_RT_PRO_SET_CONTINUOUS_TX) GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_single_carrier_tx_hdl, OID_RT_PRO_SET_SINGLE_CARRIER_TX) /*15*/ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_carrier_suppression_tx_hdl, OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX) GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_single_tone_tx_hdl, OID_RT_PRO_SET_SINGLE_TONE_TX) EXT_MP_IOCTL_HANDLER(0, xmit_packet, 0) GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_set_rx_packet_type_hdl, OID_RT_SET_RX_PACKET_TYPE) GEN_MP_IOCTL_HANDLER(0, oid_rt_reset_phy_rx_packet_count_hdl, OID_RT_RESET_PHY_RX_PACKET_COUNT) /*20*/ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_phy_rx_packet_received_hdl, OID_RT_GET_PHY_RX_PACKET_RECEIVED) GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_phy_rx_packet_crc32_error_hdl, OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR) GEN_MP_IOCTL_HANDLER(sizeof(struct eeprom_rw_param), NULL, 0) GEN_MP_IOCTL_HANDLER(sizeof(struct eeprom_rw_param), NULL, 0) GEN_MP_IOCTL_HANDLER(sizeof(EFUSE_ACCESS_STRUCT), oid_rt_pro_efuse_hdl, OID_RT_PRO_EFUSE) /*25*/ GEN_MP_IOCTL_HANDLER(0, oid_rt_pro_efuse_map_hdl, OID_RT_PRO_EFUSE_MAP) GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_efuse_max_size_hdl, OID_RT_GET_EFUSE_MAX_SIZE) GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_efuse_current_size_hdl, OID_RT_GET_EFUSE_CURRENT_SIZE) GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_thermal_meter_hdl, OID_RT_PRO_GET_THERMAL_METER) GEN_MP_IOCTL_HANDLER(sizeof(u8), oid_rt_pro_set_power_tracking_hdl, OID_RT_PRO_SET_POWER_TRACKING) /*30*/ GEN_MP_IOCTL_HANDLER(sizeof(u8), oid_rt_set_power_down_hdl, OID_RT_SET_POWER_DOWN) /*31*/ GEN_MP_IOCTL_HANDLER(0, oid_rt_pro_trigger_gpio_hdl, 0) GEN_MP_IOCTL_HANDLER(0, NULL, 0) GEN_MP_IOCTL_HANDLER(0, NULL, 0) GEN_MP_IOCTL_HANDLER(0, NULL, 0) }; #else /* _RTW_MP_IOCTL_C_ */ extern struct mp_ioctl_handler mp_ioctl_hdl[]; #endif /* _RTW_MP_IOCTL_C_ */ #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_mp_phy_regdef.h000066400000000000000000001204021261122257400227760ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ /***************************************************************************** * * Module: __RTW_MP_PHY_REGDEF_H_ * * * Note: 1. Define PMAC/BB register map * 2. Define RF register map * 3. PMAC/BB register bit mask. * 4. RF reg bit mask. * 5. Other BB/RF relative definition. * * * Export: Constants, macro, functions(API), global variables(None). * * Abbrev: * * History: * Data Who Remark * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. * 2. Reorganize code architecture. * 09/25/2008 MH 1. Add RL6052 register definition * *****************************************************************************/ #ifndef __RTW_MP_PHY_REGDEF_H_ #define __RTW_MP_PHY_REGDEF_H_ /*--------------------------Define Parameters-------------------------------*/ //============================================================ // 8192S Regsiter offset definition //============================================================ // // BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF // 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF // 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 // 3. RF register 0x00-2E // 4. Bit Mask for BB/RF register // 5. Other defintion for BB/RF R/W // // // 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF // 1. Page1(0x100) // #define rPMAC_Reset 0x100 #define rPMAC_TxStart 0x104 #define rPMAC_TxLegacySIG 0x108 #define rPMAC_TxHTSIG1 0x10c #define rPMAC_TxHTSIG2 0x110 #define rPMAC_PHYDebug 0x114 #define rPMAC_TxPacketNum 0x118 #define rPMAC_TxIdle 0x11c #define rPMAC_TxMACHeader0 0x120 #define rPMAC_TxMACHeader1 0x124 #define rPMAC_TxMACHeader2 0x128 #define rPMAC_TxMACHeader3 0x12c #define rPMAC_TxMACHeader4 0x130 #define rPMAC_TxMACHeader5 0x134 #define rPMAC_TxDataType 0x138 #define rPMAC_TxRandomSeed 0x13c #define rPMAC_CCKPLCPPreamble 0x140 #define rPMAC_CCKPLCPHeader 0x144 #define rPMAC_CCKCRC16 0x148 #define rPMAC_OFDMRxCRC32OK 0x170 #define rPMAC_OFDMRxCRC32Er 0x174 #define rPMAC_OFDMRxParityEr 0x178 #define rPMAC_OFDMRxCRC8Er 0x17c #define rPMAC_CCKCRxRC16Er 0x180 #define rPMAC_CCKCRxRC32Er 0x184 #define rPMAC_CCKCRxRC32OK 0x188 #define rPMAC_TxStatus 0x18c // // 2. Page2(0x200) // // The following two definition are only used for USB interface. //#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. //#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. // // 3. Page8(0x800) // #define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? #define rFPGA0_TxInfo 0x804 // Status report?? #define rFPGA0_PSDFunction 0x808 #define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? #define rFPGA0_RFTiming1 0x810 // Useless now #define rFPGA0_RFTiming2 0x814 //#define rFPGA0_XC_RFTiming 0x818 //#define rFPGA0_XD_RFTiming 0x81c #define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register #define rFPGA0_XA_HSSIParameter2 0x824 #define rFPGA0_XB_HSSIParameter1 0x828 #define rFPGA0_XB_HSSIParameter2 0x82c #define rFPGA0_XC_HSSIParameter1 0x830 #define rFPGA0_XC_HSSIParameter2 0x834 #define rFPGA0_XD_HSSIParameter1 0x838 #define rFPGA0_XD_HSSIParameter2 0x83c #define rFPGA0_XA_LSSIParameter 0x840 #define rFPGA0_XB_LSSIParameter 0x844 #define rFPGA0_XC_LSSIParameter 0x848 #define rFPGA0_XD_LSSIParameter 0x84c #define rFPGA0_RFWakeUpParameter 0x850 // Useless now #define rFPGA0_RFSleepUpParameter 0x854 #define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch #define rFPGA0_XCD_SwitchControl 0x85c #define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch #define rFPGA0_XB_RFInterfaceOE 0x864 #define rFPGA0_XC_RFInterfaceOE 0x868 #define rFPGA0_XD_RFInterfaceOE 0x86c #define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control #define rFPGA0_XCD_RFInterfaceSW 0x874 #define rFPGA0_XAB_RFParameter 0x878 // RF Parameter #define rFPGA0_XCD_RFParameter 0x87c #define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? #define rFPGA0_AnalogParameter2 0x884 #define rFPGA0_AnalogParameter3 0x888 // Useless now #define rFPGA0_AnalogParameter4 0x88c #define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback #define rFPGA0_XB_LSSIReadBack 0x8a4 #define rFPGA0_XC_LSSIReadBack 0x8a8 #define rFPGA0_XD_LSSIReadBack 0x8ac #define rFPGA0_PSDReport 0x8b4 // Useless now #define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value #define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now // // 4. Page9(0x900) // #define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? #define rFPGA1_TxBlock 0x904 // Useless now #define rFPGA1_DebugSelect 0x908 // Useless now #define rFPGA1_TxInfo 0x90c // Useless now // Status report?? #define rS0S1_PathSwitch 0x948 // // 5. PageA(0xA00) // // Set Control channel to upper or lower. These settings are required only for 40MHz #define rCCK0_System 0xa00 #define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI #define rCCK0_CCA 0xa08 // Disable init gain now // Init gain #define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series #define rCCK0_RxAGC2 0xa10 //AGC & DAGC #define rCCK0_RxHP 0xa14 #define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold #define rCCK0_DSPParameter2 0xa1c //SQ threshold #define rCCK0_TxFilter1 0xa20 #define rCCK0_TxFilter2 0xa24 #define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 #define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report #define rCCK0_TRSSIReport 0xa50 #define rCCK0_RxReport 0xa54 //0xa57 #define rCCK0_FACounterLower 0xa5c //0xa5b #define rCCK0_FACounterUpper 0xa58 //0xa5c // // 6. PageC(0xC00) // #define rOFDM0_LSTF 0xc00 #define rOFDM0_TRxPathEnable 0xc04 #define rOFDM0_TRMuxPar 0xc08 #define rOFDM0_TRSWIsolation 0xc0c #define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter #define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix #define rOFDM0_XBRxAFE 0xc18 #define rOFDM0_XBRxIQImbalance 0xc1c #define rOFDM0_XCRxAFE 0xc20 #define rOFDM0_XCRxIQImbalance 0xc24 #define rOFDM0_XDRxAFE 0xc28 #define rOFDM0_XDRxIQImbalance 0xc2c #define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain #define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. #define rOFDM0_RxDetector3 0xc38 //Frame Sync. #define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI #define rOFDM0_RxDSP 0xc40 //Rx Sync Path #define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC #define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold #define rOFDM0_ECCAThreshold 0xc4c // energy CCA #define rOFDM0_XAAGCCore1 0xc50 // DIG #define rOFDM0_XAAGCCore2 0xc54 #define rOFDM0_XBAGCCore1 0xc58 #define rOFDM0_XBAGCCore2 0xc5c #define rOFDM0_XCAGCCore1 0xc60 #define rOFDM0_XCAGCCore2 0xc64 #define rOFDM0_XDAGCCore1 0xc68 #define rOFDM0_XDAGCCore2 0xc6c #define rOFDM0_AGCParameter1 0xc70 #define rOFDM0_AGCParameter2 0xc74 #define rOFDM0_AGCRSSITable 0xc78 #define rOFDM0_HTSTFAGC 0xc7c #define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG #define rOFDM0_XATxAFE 0xc84 #define rOFDM0_XBTxIQImbalance 0xc88 #define rOFDM0_XBTxAFE 0xc8c #define rOFDM0_XCTxIQImbalance 0xc90 #define rOFDM0_XCTxAFE 0xc94 #define rOFDM0_XDTxIQImbalance 0xc98 #define rOFDM0_XDTxAFE 0xc9c #define rOFDM0_RxIQExtAnta 0xca0 #define rOFDM0_RxHPParameter 0xce0 #define rOFDM0_TxPseudoNoiseWgt 0xce4 #define rOFDM0_FrameSync 0xcf0 #define rOFDM0_DFSReport 0xcf4 #define rOFDM0_TxCoeff1 0xca4 #define rOFDM0_TxCoeff2 0xca8 #define rOFDM0_TxCoeff3 0xcac #define rOFDM0_TxCoeff4 0xcb0 #define rOFDM0_TxCoeff5 0xcb4 #define rOFDM0_TxCoeff6 0xcb8 // // 7. PageD(0xD00) // #define rOFDM1_LSTF 0xd00 #define rOFDM1_TRxPathEnable 0xd04 #define rOFDM1_CFO 0xd08 // No setting now #define rOFDM1_CSI1 0xd10 #define rOFDM1_SBD 0xd14 #define rOFDM1_CSI2 0xd18 #define rOFDM1_CFOTracking 0xd2c #define rOFDM1_TRxMesaure1 0xd34 #define rOFDM1_IntfDet 0xd3c #define rOFDM1_PseudoNoiseStateAB 0xd50 #define rOFDM1_PseudoNoiseStateCD 0xd54 #define rOFDM1_RxPseudoNoiseWgt 0xd58 #define rOFDM_PHYCounter1 0xda0 //cca, parity fail #define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail #define rOFDM_PHYCounter3 0xda8 //MCS not support #define rOFDM_ShortCFOAB 0xdac // No setting now #define rOFDM_ShortCFOCD 0xdb0 #define rOFDM_LongCFOAB 0xdb4 #define rOFDM_LongCFOCD 0xdb8 #define rOFDM_TailCFOAB 0xdbc #define rOFDM_TailCFOCD 0xdc0 #define rOFDM_PWMeasure1 0xdc4 #define rOFDM_PWMeasure2 0xdc8 #define rOFDM_BWReport 0xdcc #define rOFDM_AGCReport 0xdd0 #define rOFDM_RxSNR 0xdd4 #define rOFDM_RxEVMCSI 0xdd8 #define rOFDM_SIGReport 0xddc // // 8. PageE(0xE00) // #define rTxAGC_Rate18_06 0xe00 #define rTxAGC_Rate54_24 0xe04 #define rTxAGC_CCK_Mcs32 0xe08 #define rTxAGC_Mcs03_Mcs00 0xe10 #define rTxAGC_Mcs07_Mcs04 0xe14 #define rTxAGC_Mcs11_Mcs08 0xe18 #define rTxAGC_Mcs15_Mcs12 0xe1c // Analog- control in RX_WAIT_CCA : REG: EE0 [Analog- Power & Control Register] #define rRx_Wait_CCCA 0xe70 #define rAnapar_Ctrl_BB 0xee0 // // 7. RF Register 0x00-0x2E (RF 8256) // RF-0222D 0x00-3F // //Zebra1 #define RTL92SE_FPGA_VERIFY 0 #define rZebra1_HSSIEnable 0x0 // Useless now #define rZebra1_TRxEnable1 0x1 #define rZebra1_TRxEnable2 0x2 #define rZebra1_AGC 0x4 #define rZebra1_ChargePump 0x5 //#if (RTL92SE_FPGA_VERIFY == 1) #define rZebra1_Channel 0x7 // RF channel switch //#else //#endif #define rZebra1_TxGain 0x8 // Useless now #define rZebra1_TxLPF 0x9 #define rZebra1_RxLPF 0xb #define rZebra1_RxHPFCorner 0xc //Zebra4 #define rGlobalCtrl 0 // Useless now #define rRTL8256_TxLPF 19 #define rRTL8256_RxLPF 11 //RTL8258 #define rRTL8258_TxLPF 0x11 // Useless now #define rRTL8258_RxLPF 0x13 #define rRTL8258_RSSILPF 0xa // // RL6052 Register definition // #define RF_AC 0x00 // #define RF_IQADJ_G1 0x01 // #define RF_IQADJ_G2 0x02 // #define RF_POW_TRSW 0x05 // #define RF_GAIN_RX 0x06 // #define RF_GAIN_TX 0x07 // #define RF_TXM_IDAC 0x08 // #define RF_BS_IQGEN 0x0F // #define RF_MODE1 0x10 // #define RF_MODE2 0x11 // #define RF_RX_AGC_HP 0x12 // #define RF_TX_AGC 0x13 // #define RF_BIAS 0x14 // #define RF_IPA 0x15 // #define RF_TXBIAS 0x16 // #define RF_POW_ABILITY 0x17 // #define RF_MODE_AG 0x18 // #define rRfChannel 0x18 // RF channel and BW switch #define RF_CHNLBW 0x18 // RF channel and BW switch #define RF_TOP 0x19 // #define RF_RX_G1 0x1A // #define RF_RX_G2 0x1B // #define RF_RX_BB2 0x1C // #define RF_RX_BB1 0x1D // #define RF_RCK1 0x1E // #define RF_RCK2 0x1F // #define RF_TX_G1 0x20 // #define RF_TX_G2 0x21 // #define RF_TX_G3 0x22 // #define RF_TX_BB1 0x23 // #define RF_T_METER 0x24 // #define RF_SYN_G1 0x25 // RF TX Power control #define RF_SYN_G2 0x26 // RF TX Power control #define RF_SYN_G3 0x27 // RF TX Power control #define RF_SYN_G4 0x28 // RF TX Power control #define RF_SYN_G5 0x29 // RF TX Power control #define RF_SYN_G6 0x2A // RF TX Power control #define RF_SYN_G7 0x2B // RF TX Power control #define RF_SYN_G8 0x2C // RF TX Power control #define RF_RCK_OS 0x30 // RF TX PA control #define RF_TXPA_G1 0x31 // RF TX PA control #define RF_TXPA_G2 0x32 // RF TX PA control #define RF_TXPA_G3 0x33 // RF TX PA control // //Bit Mask // // 1. Page1(0x100) #define bBBResetB 0x100 // Useless now? #define bGlobalResetB 0x200 #define bOFDMTxStart 0x4 #define bCCKTxStart 0x8 #define bCRC32Debug 0x100 #define bPMACLoopback 0x10 #define bTxLSIG 0xffffff #define bOFDMTxRate 0xf #define bOFDMTxReserved 0x10 #define bOFDMTxLength 0x1ffe0 #define bOFDMTxParity 0x20000 #define bTxHTSIG1 0xffffff #define bTxHTMCSRate 0x7f #define bTxHTBW 0x80 #define bTxHTLength 0xffff00 #define bTxHTSIG2 0xffffff #define bTxHTSmoothing 0x1 #define bTxHTSounding 0x2 #define bTxHTReserved 0x4 #define bTxHTAggreation 0x8 #define bTxHTSTBC 0x30 #define bTxHTAdvanceCoding 0x40 #define bTxHTShortGI 0x80 #define bTxHTNumberHT_LTF 0x300 #define bTxHTCRC8 0x3fc00 #define bCounterReset 0x10000 #define bNumOfOFDMTx 0xffff #define bNumOfCCKTx 0xffff0000 #define bTxIdleInterval 0xffff #define bOFDMService 0xffff0000 #define bTxMACHeader 0xffffffff #define bTxDataInit 0xff #define bTxHTMode 0x100 #define bTxDataType 0x30000 #define bTxRandomSeed 0xffffffff #define bCCKTxPreamble 0x1 #define bCCKTxSFD 0xffff0000 #define bCCKTxSIG 0xff #define bCCKTxService 0xff00 #define bCCKLengthExt 0x8000 #define bCCKTxLength 0xffff0000 #define bCCKTxCRC16 0xffff #define bCCKTxStatus 0x1 #define bOFDMTxStatus 0x2 #define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) // 2. Page8(0x800) #define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD #define bJapanMode 0x2 #define bCCKTxSC 0x30 #define bCCKEn 0x1000000 #define bOFDMEn 0x2000000 #define bOFDMRxADCPhase 0x10000 // Useless now #define bOFDMTxDACPhase 0x40000 #define bXATxAGC 0x3f #define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage #define bXCTxAGC 0xf000 #define bXDTxAGC 0xf0000 #define bPAStart 0xf0000000 // Useless now #define bTRStart 0x00f00000 #define bRFStart 0x0000f000 #define bBBStart 0x000000f0 #define bBBCCKStart 0x0000000f #define bPAEnd 0xf //Reg0x814 #define bTREnd 0x0f000000 #define bRFEnd 0x000f0000 #define bCCAMask 0x000000f0 //T2R #define bR2RCCAMask 0x00000f00 #define bHSSI_R2TDelay 0xf8000000 #define bHSSI_T2RDelay 0xf80000 #define bContTxHSSI 0x400 //chane gain at continue Tx #define bIGFromCCK 0x200 #define bAGCAddress 0x3f #define bRxHPTx 0x7000 #define bRxHPT2R 0x38000 #define bRxHPCCKIni 0xc0000 #define bAGCTxCode 0xc00000 #define bAGCRxCode 0x300000 #define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 #define b3WireAddressLength 0x400 #define b3WireRFPowerDown 0x1 // Useless now //#define bHWSISelect 0x8 #define b5GPAPEPolarity 0x40000000 #define b2GPAPEPolarity 0x80000000 #define bRFSW_TxDefaultAnt 0x3 #define bRFSW_TxOptionAnt 0x30 #define bRFSW_RxDefaultAnt 0x300 #define bRFSW_RxOptionAnt 0x3000 #define bRFSI_3WireData 0x1 #define bRFSI_3WireClock 0x2 #define bRFSI_3WireLoad 0x4 #define bRFSI_3WireRW 0x8 #define bRFSI_3Wire 0xf #define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW #define bRFSI_TRSW 0x20 // Useless now #define bRFSI_TRSWB 0x40 #define bRFSI_ANTSW 0x100 #define bRFSI_ANTSWB 0x200 #define bRFSI_PAPE 0x400 #define bRFSI_PAPE5G 0x800 #define bBandSelect 0x1 #define bHTSIG2_GI 0x80 #define bHTSIG2_Smoothing 0x01 #define bHTSIG2_Sounding 0x02 #define bHTSIG2_Aggreaton 0x08 #define bHTSIG2_STBC 0x30 #define bHTSIG2_AdvCoding 0x40 #define bHTSIG2_NumOfHTLTF 0x300 #define bHTSIG2_CRC8 0x3fc #define bHTSIG1_MCS 0x7f #define bHTSIG1_BandWidth 0x80 #define bHTSIG1_HTLength 0xffff #define bLSIG_Rate 0xf #define bLSIG_Reserved 0x10 #define bLSIG_Length 0x1fffe #define bLSIG_Parity 0x20 #define bCCKRxPhase 0x4 #if (RTL92SE_FPGA_VERIFY == 1) #define bLSSIReadAddress 0x3f000000 //LSSI "Read" Address // Reg 0x824 rFPGA0_XA_HSSIParameter2 #else #define bLSSIReadAddress 0x7f800000 // T65 RF #endif #define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal #if (RTL92SE_FPGA_VERIFY == 1) #define bLSSIReadBackData 0xfff // Reg 0x8a0 rFPGA0_XA_LSSIReadBack #else #define bLSSIReadBackData 0xfffff // T65 RF #endif #define bLSSIReadOKFlag 0x1000 // Useless now #define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz #define bRegulator0Standby 0x1 #define bRegulatorPLLStandby 0x2 #define bRegulator1Standby 0x4 #define bPLLPowerUp 0x8 #define bDPLLPowerUp 0x10 #define bDA10PowerUp 0x20 #define bAD7PowerUp 0x200 #define bDA6PowerUp 0x2000 #define bXtalPowerUp 0x4000 #define b40MDClkPowerUP 0x8000 #define bDA6DebugMode 0x20000 #define bDA6Swing 0x380000 #define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ #define b80MClkDelay 0x18000000 // Useless #define bAFEWatchDogEnable 0x20000000 #define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap #define bXtalCap23 0x3 #define bXtalCap92x 0x0f000000 #define bXtalCap 0x0f000000 #define bIntDifClkEnable 0x400 // Useless #define bExtSigClkEnable 0x800 #define bBandgapMbiasPowerUp 0x10000 #define bAD11SHGain 0xc0000 #define bAD11InputRange 0x700000 #define bAD11OPCurrent 0x3800000 #define bIPathLoopback 0x4000000 #define bQPathLoopback 0x8000000 #define bAFELoopback 0x10000000 #define bDA10Swing 0x7e0 #define bDA10Reverse 0x800 #define bDAClkSource 0x1000 #define bAD7InputRange 0x6000 #define bAD7Gain 0x38000 #define bAD7OutputCMMode 0x40000 #define bAD7InputCMMode 0x380000 #define bAD7Current 0xc00000 #define bRegulatorAdjust 0x7000000 #define bAD11PowerUpAtTx 0x1 #define bDA10PSAtTx 0x10 #define bAD11PowerUpAtRx 0x100 #define bDA10PSAtRx 0x1000 #define bCCKRxAGCFormat 0x200 #define bPSDFFTSamplepPoint 0xc000 #define bPSDAverageNum 0x3000 #define bIQPathControl 0xc00 #define bPSDFreq 0x3ff #define bPSDAntennaPath 0x30 #define bPSDIQSwitch 0x40 #define bPSDRxTrigger 0x400000 #define bPSDTxTrigger 0x80000000 #define bPSDSineToneScale 0x7f000000 #define bPSDReport 0xffff // 3. Page9(0x900) #define bOFDMTxSC 0x30000000 // Useless #define bCCKTxOn 0x1 #define bOFDMTxOn 0x2 #define bDebugPage 0xfff //reset debug page and also HWord, LWord #define bDebugItem 0xff //reset debug page and LWord #define bAntL 0x10 #define bAntNonHT 0x100 #define bAntHT1 0x1000 #define bAntHT2 0x10000 #define bAntHT1S1 0x100000 #define bAntNonHTS1 0x1000000 // 4. PageA(0xA00) #define bCCKBBMode 0x3 // Useless #define bCCKTxPowerSaving 0x80 #define bCCKRxPowerSaving 0x40 #define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch #define bCCKScramble 0x8 // Useless #define bCCKAntDiversity 0x8000 #define bCCKCarrierRecovery 0x4000 #define bCCKTxRate 0x3000 #define bCCKDCCancel 0x0800 #define bCCKISICancel 0x0400 #define bCCKMatchFilter 0x0200 #define bCCKEqualizer 0x0100 #define bCCKPreambleDetect 0x800000 #define bCCKFastFalseCCA 0x400000 #define bCCKChEstStart 0x300000 #define bCCKCCACount 0x080000 #define bCCKcs_lim 0x070000 #define bCCKBistMode 0x80000000 #define bCCKCCAMask 0x40000000 #define bCCKTxDACPhase 0x4 #define bCCKRxADCPhase 0x20000000 //r_rx_clk #define bCCKr_cp_mode0 0x0100 #define bCCKTxDCOffset 0xf0 #define bCCKRxDCOffset 0xf #define bCCKCCAMode 0xc000 #define bCCKFalseCS_lim 0x3f00 #define bCCKCS_ratio 0xc00000 #define bCCKCorgBit_sel 0x300000 #define bCCKPD_lim 0x0f0000 #define bCCKNewCCA 0x80000000 #define bCCKRxHPofIG 0x8000 #define bCCKRxIG 0x7f00 #define bCCKLNAPolarity 0x800000 #define bCCKRx1stGain 0x7f0000 #define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity #define bCCKRxAGCSatLevel 0x1f000000 #define bCCKRxAGCSatCount 0xe0 #define bCCKRxRFSettle 0x1f //AGCsamp_dly #define bCCKFixedRxAGC 0x8000 //#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 #define bCCKAntennaPolarity 0x2000 #define bCCKTxFilterType 0x0c00 #define bCCKRxAGCReportType 0x0300 #define bCCKRxDAGCEn 0x80000000 #define bCCKRxDAGCPeriod 0x20000000 #define bCCKRxDAGCSatLevel 0x1f000000 #define bCCKTimingRecovery 0x800000 #define bCCKTxC0 0x3f0000 #define bCCKTxC1 0x3f000000 #define bCCKTxC2 0x3f #define bCCKTxC3 0x3f00 #define bCCKTxC4 0x3f0000 #define bCCKTxC5 0x3f000000 #define bCCKTxC6 0x3f #define bCCKTxC7 0x3f00 #define bCCKDebugPort 0xff0000 #define bCCKDACDebug 0x0f000000 #define bCCKFalseAlarmEnable 0x8000 #define bCCKFalseAlarmRead 0x4000 #define bCCKTRSSI 0x7f #define bCCKRxAGCReport 0xfe #define bCCKRxReport_AntSel 0x80000000 #define bCCKRxReport_MFOff 0x40000000 #define bCCKRxRxReport_SQLoss 0x20000000 #define bCCKRxReport_Pktloss 0x10000000 #define bCCKRxReport_Lockedbit 0x08000000 #define bCCKRxReport_RateError 0x04000000 #define bCCKRxReport_RxRate 0x03000000 #define bCCKRxFACounterLower 0xff #define bCCKRxFACounterUpper 0xff000000 #define bCCKRxHPAGCStart 0xe000 #define bCCKRxHPAGCFinal 0x1c00 #define bCCKRxFalseAlarmEnable 0x8000 #define bCCKFACounterFreeze 0x4000 #define bCCKTxPathSel 0x10000000 #define bCCKDefaultRxPath 0xc000000 #define bCCKOptionRxPath 0x3000000 // 5. PageC(0xC00) #define bNumOfSTF 0x3 // Useless #define bShift_L 0xc0 #define bGI_TH 0xc #define bRxPathA 0x1 #define bRxPathB 0x2 #define bRxPathC 0x4 #define bRxPathD 0x8 #define bTxPathA 0x1 #define bTxPathB 0x2 #define bTxPathC 0x4 #define bTxPathD 0x8 #define bTRSSIFreq 0x200 #define bADCBackoff 0x3000 #define bDFIRBackoff 0xc000 #define bTRSSILatchPhase 0x10000 #define bRxIDCOffset 0xff #define bRxQDCOffset 0xff00 #define bRxDFIRMode 0x1800000 #define bRxDCNFType 0xe000000 #define bRXIQImb_A 0x3ff #define bRXIQImb_B 0xfc00 #define bRXIQImb_C 0x3f0000 #define bRXIQImb_D 0xffc00000 #define bDC_dc_Notch 0x60000 #define bRxNBINotch 0x1f000000 #define bPD_TH 0xf #define bPD_TH_Opt2 0xc000 #define bPWED_TH 0x700 #define bIfMF_Win_L 0x800 #define bPD_Option 0x1000 #define bMF_Win_L 0xe000 #define bBW_Search_L 0x30000 #define bwin_enh_L 0xc0000 #define bBW_TH 0x700000 #define bED_TH2 0x3800000 #define bBW_option 0x4000000 #define bRatio_TH 0x18000000 #define bWindow_L 0xe0000000 #define bSBD_Option 0x1 #define bFrame_TH 0x1c #define bFS_Option 0x60 #define bDC_Slope_check 0x80 #define bFGuard_Counter_DC_L 0xe00 #define bFrame_Weight_Short 0x7000 #define bSub_Tune 0xe00000 #define bFrame_DC_Length 0xe000000 #define bSBD_start_offset 0x30000000 #define bFrame_TH_2 0x7 #define bFrame_GI2_TH 0x38 #define bGI2_Sync_en 0x40 #define bSarch_Short_Early 0x300 #define bSarch_Short_Late 0xc00 #define bSarch_GI2_Late 0x70000 #define bCFOAntSum 0x1 #define bCFOAcc 0x2 #define bCFOStartOffset 0xc #define bCFOLookBack 0x70 #define bCFOSumWeight 0x80 #define bDAGCEnable 0x10000 #define bTXIQImb_A 0x3ff #define bTXIQImb_B 0xfc00 #define bTXIQImb_C 0x3f0000 #define bTXIQImb_D 0xffc00000 #define bTxIDCOffset 0xff #define bTxQDCOffset 0xff00 #define bTxDFIRMode 0x10000 #define bTxPesudoNoiseOn 0x4000000 #define bTxPesudoNoise_A 0xff #define bTxPesudoNoise_B 0xff00 #define bTxPesudoNoise_C 0xff0000 #define bTxPesudoNoise_D 0xff000000 #define bCCADropOption 0x20000 #define bCCADropThres 0xfff00000 #define bEDCCA_H 0xf #define bEDCCA_L 0xf0 #define bLambda_ED 0x300 #define bRxInitialGain 0x7f #define bRxAntDivEn 0x80 #define bRxAGCAddressForLNA 0x7f00 #define bRxHighPowerFlow 0x8000 #define bRxAGCFreezeThres 0xc0000 #define bRxFreezeStep_AGC1 0x300000 #define bRxFreezeStep_AGC2 0xc00000 #define bRxFreezeStep_AGC3 0x3000000 #define bRxFreezeStep_AGC0 0xc000000 #define bRxRssi_Cmp_En 0x10000000 #define bRxQuickAGCEn 0x20000000 #define bRxAGCFreezeThresMode 0x40000000 #define bRxOverFlowCheckType 0x80000000 #define bRxAGCShift 0x7f #define bTRSW_Tri_Only 0x80 #define bPowerThres 0x300 #define bRxAGCEn 0x1 #define bRxAGCTogetherEn 0x2 #define bRxAGCMin 0x4 #define bRxHP_Ini 0x7 #define bRxHP_TRLNA 0x70 #define bRxHP_RSSI 0x700 #define bRxHP_BBP1 0x7000 #define bRxHP_BBP2 0x70000 #define bRxHP_BBP3 0x700000 #define bRSSI_H 0x7f0000 //the threshold for high power #define bRSSI_Gen 0x7f000000 //the threshold for ant diversity #define bRxSettle_TRSW 0x7 #define bRxSettle_LNA 0x38 #define bRxSettle_RSSI 0x1c0 #define bRxSettle_BBP 0xe00 #define bRxSettle_RxHP 0x7000 #define bRxSettle_AntSW_RSSI 0x38000 #define bRxSettle_AntSW 0xc0000 #define bRxProcessTime_DAGC 0x300000 #define bRxSettle_HSSI 0x400000 #define bRxProcessTime_BBPPW 0x800000 #define bRxAntennaPowerShift 0x3000000 #define bRSSITableSelect 0xc000000 #define bRxHP_Final 0x7000000 #define bRxHTSettle_BBP 0x7 #define bRxHTSettle_HSSI 0x8 #define bRxHTSettle_RxHP 0x70 #define bRxHTSettle_BBPPW 0x80 #define bRxHTSettle_Idle 0x300 #define bRxHTSettle_Reserved 0x1c00 #define bRxHTRxHPEn 0x8000 #define bRxHTAGCFreezeThres 0x30000 #define bRxHTAGCTogetherEn 0x40000 #define bRxHTAGCMin 0x80000 #define bRxHTAGCEn 0x100000 #define bRxHTDAGCEn 0x200000 #define bRxHTRxHP_BBP 0x1c00000 #define bRxHTRxHP_Final 0xe0000000 #define bRxPWRatioTH 0x3 #define bRxPWRatioEn 0x4 #define bRxMFHold 0x3800 #define bRxPD_Delay_TH1 0x38 #define bRxPD_Delay_TH2 0x1c0 #define bRxPD_DC_COUNT_MAX 0x600 //#define bRxMF_Hold 0x3800 #define bRxPD_Delay_TH 0x8000 #define bRxProcess_Delay 0xf0000 #define bRxSearchrange_GI2_Early 0x700000 #define bRxFrame_Guard_Counter_L 0x3800000 #define bRxSGI_Guard_L 0xc000000 #define bRxSGI_Search_L 0x30000000 #define bRxSGI_TH 0xc0000000 #define bDFSCnt0 0xff #define bDFSCnt1 0xff00 #define bDFSFlag 0xf0000 #define bMFWeightSum 0x300000 #define bMinIdxTH 0x7f000000 #define bDAFormat 0x40000 #define bTxChEmuEnable 0x01000000 #define bTRSWIsolation_A 0x7f #define bTRSWIsolation_B 0x7f00 #define bTRSWIsolation_C 0x7f0000 #define bTRSWIsolation_D 0x7f000000 #define bExtLNAGain 0x7c00 // 6. PageE(0xE00) #define bSTBCEn 0x4 // Useless #define bAntennaMapping 0x10 #define bNss 0x20 #define bCFOAntSumD 0x200 #define bPHYCounterReset 0x8000000 #define bCFOReportGet 0x4000000 #define bOFDMContinueTx 0x10000000 #define bOFDMSingleCarrier 0x20000000 #define bOFDMSingleTone 0x40000000 //#define bRxPath1 0x01 //#define bRxPath2 0x02 //#define bRxPath3 0x04 //#define bRxPath4 0x08 //#define bTxPath1 0x10 //#define bTxPath2 0x20 #define bHTDetect 0x100 #define bCFOEn 0x10000 #define bCFOValue 0xfff00000 #define bSigTone_Re 0x3f #define bSigTone_Im 0x7f00 #define bCounter_CCA 0xffff #define bCounter_ParityFail 0xffff0000 #define bCounter_RateIllegal 0xffff #define bCounter_CRC8Fail 0xffff0000 #define bCounter_MCSNoSupport 0xffff #define bCounter_FastSync 0xffff #define bShortCFO 0xfff #define bShortCFOTLength 12 //total #define bShortCFOFLength 11 //fraction #define bLongCFO 0x7ff #define bLongCFOTLength 11 #define bLongCFOFLength 11 #define bTailCFO 0x1fff #define bTailCFOTLength 13 #define bTailCFOFLength 12 #define bmax_en_pwdB 0xffff #define bCC_power_dB 0xffff0000 #define bnoise_pwdB 0xffff #define bPowerMeasTLength 10 #define bPowerMeasFLength 3 #define bRx_HT_BW 0x1 #define bRxSC 0x6 #define bRx_HT 0x8 #define bNB_intf_det_on 0x1 #define bIntf_win_len_cfg 0x30 #define bNB_Intf_TH_cfg 0x1c0 #define bRFGain 0x3f #define bTableSel 0x40 #define bTRSW 0x80 #define bRxSNR_A 0xff #define bRxSNR_B 0xff00 #define bRxSNR_C 0xff0000 #define bRxSNR_D 0xff000000 #define bSNREVMTLength 8 #define bSNREVMFLength 1 #define bCSI1st 0xff #define bCSI2nd 0xff00 #define bRxEVM1st 0xff0000 #define bRxEVM2nd 0xff000000 #define bSIGEVM 0xff #define bPWDB 0xff00 #define bSGIEN 0x10000 #define bSFactorQAM1 0xf // Useless #define bSFactorQAM2 0xf0 #define bSFactorQAM3 0xf00 #define bSFactorQAM4 0xf000 #define bSFactorQAM5 0xf0000 #define bSFactorQAM6 0xf0000 #define bSFactorQAM7 0xf00000 #define bSFactorQAM8 0xf000000 #define bSFactorQAM9 0xf0000000 #define bCSIScheme 0x100000 #define bNoiseLvlTopSet 0x3 // Useless #define bChSmooth 0x4 #define bChSmoothCfg1 0x38 #define bChSmoothCfg2 0x1c0 #define bChSmoothCfg3 0xe00 #define bChSmoothCfg4 0x7000 #define bMRCMode 0x800000 #define bTHEVMCfg 0x7000000 #define bLoopFitType 0x1 // Useless #define bUpdCFO 0x40 #define bUpdCFOOffData 0x80 #define bAdvUpdCFO 0x100 #define bAdvTimeCtrl 0x800 #define bUpdClko 0x1000 #define bFC 0x6000 #define bTrackingMode 0x8000 #define bPhCmpEnable 0x10000 #define bUpdClkoLTF 0x20000 #define bComChCFO 0x40000 #define bCSIEstiMode 0x80000 #define bAdvUpdEqz 0x100000 #define bUChCfg 0x7000000 #define bUpdEqz 0x8000000 #define bTxAGCRate18_06 0x7f7f7f7f // Useless #define bTxAGCRate54_24 0x7f7f7f7f #define bTxAGCRateMCS32 0x7f #define bTxAGCRateCCK 0x7f00 #define bTxAGCRateMCS3_MCS0 0x7f7f7f7f #define bTxAGCRateMCS7_MCS4 0x7f7f7f7f #define bTxAGCRateMCS11_MCS8 0x7f7f7f7f #define bTxAGCRateMCS15_MCS12 0x7f7f7f7f //Rx Pseduo noise #define bRxPesudoNoiseOn 0x20000000 // Useless #define bRxPesudoNoise_A 0xff #define bRxPesudoNoise_B 0xff00 #define bRxPesudoNoise_C 0xff0000 #define bRxPesudoNoise_D 0xff000000 #define bPesudoNoiseState_A 0xffff #define bPesudoNoiseState_B 0xffff0000 #define bPesudoNoiseState_C 0xffff #define bPesudoNoiseState_D 0xffff0000 //7. RF Register //Zebra1 #define bZebra1_HSSIEnable 0x8 // Useless #define bZebra1_TRxControl 0xc00 #define bZebra1_TRxGainSetting 0x07f #define bZebra1_RxCorner 0xc00 #define bZebra1_TxChargePump 0x38 #define bZebra1_RxChargePump 0x7 #define bZebra1_ChannelNum 0xf80 #define bZebra1_TxLPFBW 0x400 #define bZebra1_RxLPFBW 0x600 //Zebra4 #define bRTL8256RegModeCtrl1 0x100 // Useless #define bRTL8256RegModeCtrl0 0x40 #define bRTL8256_TxLPFBW 0x18 #define bRTL8256_RxLPFBW 0x600 //RTL8258 #define bRTL8258_TxLPFBW 0xc // Useless #define bRTL8258_RxLPFBW 0xc00 #define bRTL8258_RSSILPFBW 0xc0 // // Other Definition // //byte endable for sb_write #define bByte0 0x1 // Useless #define bByte1 0x2 #define bByte2 0x4 #define bByte3 0x8 #define bWord0 0x3 #define bWord1 0xc #define bDWord 0xf //for PutRegsetting & GetRegSetting BitMask #define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f #define bMaskByte1 0xff00 #define bMaskByte2 0xff0000 #define bMaskByte3 0xff000000 #define bMaskHWord 0xffff0000 #define bMaskLWord 0x0000ffff #define bMaskDWord 0xffffffff #define bMaskH4Bits 0xf0000000 #define bMaskH3Bytes 0xffffff00 #define bMaskOFDM_D 0xffc00000 #define bMaskCCK 0x3f3f3f3f #define bMask12Bits 0xfff //for PutRFRegsetting & GetRFRegSetting BitMask #if (RTL92SE_FPGA_VERIFY == 1) //#define bMask12Bits 0xfff // RF Reg mask bits //#define bMask20Bits 0xfff // RF Reg mask bits T65 RF #define bRFRegOffsetMask 0xfff #else //#define bMask12Bits 0xfffff // RF Reg mask bits //#define bMask20Bits 0xfffff // RF Reg mask bits T65 RF #define bRFRegOffsetMask 0xfffff #endif #define bEnable 0x1 // Useless #define bDisable 0x0 #define LeftAntenna 0x0 // Useless #define RightAntenna 0x1 #define tCheckTxStatus 500 //500ms // Useless #define tUpdateRxCounter 100 //100ms #define rateCCK 0 // Useless #define rateOFDM 1 #define rateHT 2 //define Register-End #define bPMAC_End 0x1ff // Useless #define bFPGAPHY0_End 0x8ff #define bFPGAPHY1_End 0x9ff #define bCCKPHY0_End 0xaff #define bOFDMPHY0_End 0xcff #define bOFDMPHY1_End 0xdff //define max debug item in each debug page //#define bMaxItem_FPGA_PHY0 0x9 //#define bMaxItem_FPGA_PHY1 0x3 //#define bMaxItem_PHY_11B 0x16 //#define bMaxItem_OFDM_PHY0 0x29 //#define bMaxItem_OFDM_PHY1 0x0 #define bPMACControl 0x0 // Useless #define bWMACControl 0x1 #define bWNICControl 0x2 #if 0 #define ANTENNA_A 0x1 // Useless #define ANTENNA_B 0x2 #define ANTENNA_AB 0x3 // ANTENNA_A|ANTENNA_B #define ANTENNA_C 0x4 #define ANTENNA_D 0x8 #endif #define RCR_AAP BIT(0) // accept all physical address #define RCR_APM BIT(1) // accept physical match #define RCR_AM BIT(2) // accept multicast #define RCR_AB BIT(3) // accept broadcast #define RCR_ACRC32 BIT(5) // accept error packet #define RCR_9356SEL BIT(6) #define RCR_AICV BIT(9) // Accept ICV error packet #define RCR_RXFTH0 (BIT(13)|BIT(14)|BIT(15)) // Rx FIFO threshold #define RCR_ADF BIT(18) // Accept Data(frame type) frame #define RCR_ACF BIT(19) // Accept control frame #define RCR_AMF BIT(20) // Accept management frame #define RCR_ADD3 BIT(21) #define RCR_APWRMGT BIT(22) // Accept power management packet #define RCR_CBSSID BIT(23) // Accept BSSID match packet #define RCR_ENMARP BIT(28) // enable mac auto reset phy #define RCR_EnCS1 BIT(29) // enable carrier sense method 1 #define RCR_EnCS2 BIT(30) // enable carrier sense method 2 #define RCR_OnlyErlPkt BIT(31) // Rx Early mode is performed for packet size greater than 1536 /*--------------------------Define Parameters-------------------------------*/ #endif //__INC_HAL8192SPHYREG_H rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_odm.h000066400000000000000000000035631261122257400207550ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_ODM_H__ #define __RTW_ODM_H__ #include #include "../hal/OUTSRC/phydm_types.h" /* * This file provides utilities/wrappers for rtw driver to use ODM */ void rtw_odm_dbg_comp_msg(void *sel,_adapter *adapter); void rtw_odm_dbg_comp_set(_adapter *adapter, u64 comps); void rtw_odm_dbg_level_msg(void *sel,_adapter *adapter); void rtw_odm_dbg_level_set(_adapter *adapter, u32 level); void rtw_odm_ability_msg(void *sel, _adapter *adapter); void rtw_odm_ability_set(_adapter *adapter, u32 ability); bool rtw_odm_adaptivity_needed(_adapter *adapter); void rtw_odm_adaptivity_parm_msg(void *sel,_adapter *adapter); void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 TH_L2H_ini, s8 TH_EDCCA_HL_diff, s8 IGI_Base, bool ForceEDCCA, u8 AdapEn_RSSI, u8 IGI_LowerBound); void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter); void rtw_odm_acquirespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type); void rtw_odm_releasespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type); #endif // __RTW_ODM_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_p2p.h000066400000000000000000000164561261122257400207040ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_P2P_H_ #define __RTW_P2P_H_ u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8* pssid, u8 ussidlen, u8* pdev_raddr ); u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status_code); u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); #ifdef CONFIG_WFD u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 tunneled); u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); u32 build_invitation_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); u32 build_invitation_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); #endif //CONFIG_WFD u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len, struct sta_info *psta); u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); u32 process_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); u8 process_p2p_provdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); u8 process_p2p_provdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe); u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ); u8 process_p2p_group_negotation_resp( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ); u8 process_p2p_group_negotation_confirm( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ); u8 process_p2p_presence_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); void p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType); #ifdef CONFIG_P2P_PS void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength); void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state); u8 p2p_ps_wk_cmd(_adapter*padapter, u8 p2p_ps_state, u8 enqueue); #endif // CONFIG_P2P_PS #ifdef CONFIG_IOCTL_CFG80211 void rtw_init_cfg80211_wifidirect_info( _adapter* padapter); int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx); void rtw_append_wfd_ie(_adapter *padapter, u8 *buf, u32 *len); #endif //CONFIG_IOCTL_CFG80211 void reset_global_wifidirect_info( _adapter* padapter ); int rtw_init_wifi_display_info(_adapter* padapter); void rtw_init_wifidirect_timers(_adapter* padapter); void rtw_init_wifidirect_addrs(_adapter* padapter, u8 *dev_addr, u8 *iface_addr); void init_wifidirect_info( _adapter* padapter, enum P2P_ROLE role); int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role); static inline void _rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state) { if(wdinfo->p2p_state != state) { //wdinfo->pre_p2p_state = wdinfo->p2p_state; wdinfo->p2p_state = state; } } static inline void _rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state) { if(wdinfo->pre_p2p_state != state) { wdinfo->pre_p2p_state = state; } } #if 0 static inline void _rtw_p2p_restore_state(struct wifidirect_info *wdinfo) { if(wdinfo->pre_p2p_state != -1) { wdinfo->p2p_state = wdinfo->pre_p2p_state; wdinfo->pre_p2p_state = -1; } } #endif static inline void _rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role) { if(wdinfo->role != role) { wdinfo->role = role; } } static inline int _rtw_p2p_state(struct wifidirect_info *wdinfo) { return wdinfo->p2p_state; } static inline int _rtw_p2p_pre_state(struct wifidirect_info *wdinfo) { return wdinfo->pre_p2p_state; } static inline int _rtw_p2p_role(struct wifidirect_info *wdinfo) { return wdinfo->role; } static inline bool _rtw_p2p_chk_state(struct wifidirect_info *wdinfo, enum P2P_STATE state) { return wdinfo->p2p_state == state; } static inline bool _rtw_p2p_chk_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role) { return wdinfo->role == role; } #ifdef CONFIG_DBG_P2P void dbg_rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line); void dbg_rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line); //void dbg_rtw_p2p_restore_state(struct wifidirect_info *wdinfo, const char *caller, int line); void dbg_rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role, const char *caller, int line); #define rtw_p2p_set_state(wdinfo, state) dbg_rtw_p2p_set_state(wdinfo, state, __FUNCTION__, __LINE__) #define rtw_p2p_set_pre_state(wdinfo, state) dbg_rtw_p2p_set_pre_state(wdinfo, state, __FUNCTION__, __LINE__) #define rtw_p2p_set_role(wdinfo, role) dbg_rtw_p2p_set_role(wdinfo, role, __FUNCTION__, __LINE__) //#define rtw_p2p_restore_state(wdinfo) dbg_rtw_p2p_restore_state(wdinfo, __FUNCTION__, __LINE__) #else //CONFIG_DBG_P2P #define rtw_p2p_set_state(wdinfo, state) _rtw_p2p_set_state(wdinfo, state) #define rtw_p2p_set_pre_state(wdinfo, state) _rtw_p2p_set_pre_state(wdinfo, state) #define rtw_p2p_set_role(wdinfo, role) _rtw_p2p_set_role(wdinfo, role) //#define rtw_p2p_restore_state(wdinfo) _rtw_p2p_restore_state(wdinfo) #endif //CONFIG_DBG_P2P #define rtw_p2p_state(wdinfo) _rtw_p2p_state(wdinfo) #define rtw_p2p_pre_state(wdinfo) _rtw_p2p_pre_state(wdinfo) #define rtw_p2p_role(wdinfo) _rtw_p2p_role(wdinfo) #define rtw_p2p_chk_state(wdinfo, state) _rtw_p2p_chk_state(wdinfo, state) #define rtw_p2p_chk_role(wdinfo, role) _rtw_p2p_chk_role(wdinfo, role) #define rtw_p2p_findphase_ex_set(wdinfo, value) \ (wdinfo)->find_phase_state_exchange_cnt = (value) //is this find phase exchange for social channel scan? #define rtw_p2p_findphase_ex_is_social(wdinfo) \ (wdinfo)->find_phase_state_exchange_cnt >= P2P_FINDPHASE_EX_SOCIAL_FIRST //should we need find phase exchange anymore? #define rtw_p2p_findphase_ex_is_needed(wdinfo) \ ((wdinfo)->find_phase_state_exchange_cnt < P2P_FINDPHASE_EX_MAX && \ (wdinfo)->find_phase_state_exchange_cnt != P2P_FINDPHASE_EX_NONE) #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_pwrctrl.h000066400000000000000000000325541261122257400216750ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_PWRCTRL_H_ #define __RTW_PWRCTRL_H_ #define FW_PWR0 0 #define FW_PWR1 1 #define FW_PWR2 2 #define FW_PWR3 3 #define HW_PWR0 7 #define HW_PWR1 6 #define HW_PWR2 2 #define HW_PWR3 0 #define HW_PWR4 8 #define FW_PWRMSK 0x7 #define XMIT_ALIVE BIT(0) #define RECV_ALIVE BIT(1) #define CMD_ALIVE BIT(2) #define EVT_ALIVE BIT(3) #ifdef CONFIG_BT_COEXIST #define BTCOEX_ALIVE BIT(4) #endif // CONFIG_BT_COEXIST enum Power_Mgnt { PS_MODE_ACTIVE = 0 , PS_MODE_MIN , PS_MODE_MAX , PS_MODE_DTIM , //PS_MODE_SELF_DEFINED PS_MODE_VOIP , PS_MODE_UAPSD_WMM , PS_MODE_UAPSD , PS_MODE_IBSS , PS_MODE_WWLAN , PM_Radio_Off , PM_Card_Disable , PS_MODE_NUM, }; #ifdef CONFIG_PNO_SUPPORT #define MAX_PNO_LIST_COUNT 16 #define MAX_SCAN_LIST_COUNT 14 //2.4G only #define MAX_HIDDEN_AP 8 //8 hidden AP #endif /* BIT[2:0] = HW state BIT[3] = Protocol PS state, 0: register active state , 1: register sleep state BIT[4] = sub-state */ #define PS_DPS BIT(0) #define PS_LCLK (PS_DPS) #define PS_RF_OFF BIT(1) #define PS_ALL_ON BIT(2) #define PS_ST_ACTIVE BIT(3) #define PS_ISR_ENABLE BIT(4) #define PS_IMR_ENABLE BIT(5) #define PS_ACK BIT(6) #define PS_TOGGLE BIT(7) #define PS_STATE_MASK (0x0F) #define PS_STATE_HW_MASK (0x07) #define PS_SEQ_MASK (0xc0) #define PS_STATE(x) (PS_STATE_MASK & (x)) #define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x)) #define PS_SEQ(x) (PS_SEQ_MASK & (x)) #define PS_STATE_S0 (PS_DPS) #define PS_STATE_S1 (PS_LCLK) #define PS_STATE_S2 (PS_RF_OFF) #define PS_STATE_S3 (PS_ALL_ON) #define PS_STATE_S4 ((PS_ST_ACTIVE) | (PS_ALL_ON)) #define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON)) #define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE)) #define CLR_PS_STATE(x) ((x) = ((x) & (0xF0))) struct reportpwrstate_parm { unsigned char mode; unsigned char state; //the CPWM value unsigned short rsvd; }; typedef _sema _pwrlock; __inline static void _init_pwrlock(_pwrlock *plock) { _rtw_init_sema(plock, 1); } __inline static void _free_pwrlock(_pwrlock *plock) { _rtw_free_sema(plock); } __inline static void _enter_pwrlock(_pwrlock *plock) { _rtw_down_sema(plock); } __inline static void _exit_pwrlock(_pwrlock *plock) { _rtw_up_sema(plock); } #define LPS_DELAY_TIME 1*HZ // 1 sec #define EXE_PWR_NONE 0x01 #define EXE_PWR_IPS 0x02 #define EXE_PWR_LPS 0x04 // RF state. typedef enum _rt_rf_power_state { rf_on, // RF is on after RFSleep or RFOff rf_sleep, // 802.11 Power Save mode rf_off, // HW/SW Radio OFF or Inactive Power Save //=====Add the new RF state above this line=====// rf_max }rt_rf_power_state; // RF Off Level for IPS or HW/SW radio off #define RT_RF_OFF_LEVL_ASPM BIT(0) // PCI ASPM #define RT_RF_OFF_LEVL_CLK_REQ BIT(1) // PCI clock request #define RT_RF_OFF_LEVL_PCI_D3 BIT(2) // PCI D3 mode #define RT_RF_OFF_LEVL_HALT_NIC BIT(3) // NIC halt, re-initialize hw parameters #define RT_RF_OFF_LEVL_FREE_FW BIT(4) // FW free, re-download the FW #define RT_RF_OFF_LEVL_FW_32K BIT(5) // FW in 32k #define RT_RF_PS_LEVEL_ALWAYS_ASPM BIT(6) // Always enable ASPM and Clock Req in initialization. #define RT_RF_LPS_DISALBE_2R BIT(30) // When LPS is on, disable 2R if no packet is received or transmittd. #define RT_RF_LPS_LEVEL_ASPM BIT(31) // LPS with ASPM #define RT_IN_PS_LEVEL(ppsc, _PS_FLAG) ((ppsc->cur_ps_level & _PS_FLAG) ? _TRUE : _FALSE) #define RT_CLEAR_PS_LEVEL(ppsc, _PS_FLAG) (ppsc->cur_ps_level &= (~(_PS_FLAG))) #define RT_SET_PS_LEVEL(ppsc, _PS_FLAG) (ppsc->cur_ps_level |= _PS_FLAG) // ASPM OSC Control bit, added by Roger, 2013.03.29. #define RT_PCI_ASPM_OSC_IGNORE 0 // PCI ASPM ignore OSC control in default #define RT_PCI_ASPM_OSC_ENABLE BIT0 // PCI ASPM controlled by OS according to ACPI Spec 5.0 #define RT_PCI_ASPM_OSC_DISABLE BIT1 // PCI ASPM controlled by driver or BIOS, i.e., force enable ASPM enum _PS_BBRegBackup_ { PSBBREG_RF0 = 0, PSBBREG_RF1, PSBBREG_RF2, PSBBREG_AFE0, PSBBREG_TOTALCNT }; enum { // for ips_mode IPS_NONE=0, IPS_NORMAL, IPS_LEVEL_2, IPS_NUM }; // Design for pwrctrl_priv.ips_deny, 32 bits for 32 reasons at most typedef enum _PS_DENY_REASON { PS_DENY_DRV_INITIAL = 0, PS_DENY_SCAN, PS_DENY_JOIN, PS_DENY_DISCONNECT, PS_DENY_SUSPEND, PS_DENY_IOCTL, PS_DENY_MGNT_TX, PS_DENY_DRV_REMOVE = 30, PS_DENY_OTHERS = 31 } PS_DENY_REASON; #ifdef CONFIG_PNO_SUPPORT typedef struct pno_nlo_info { u32 fast_scan_period; //Fast scan period u8 ssid_num; //number of entry u8 hidden_ssid_num; u32 slow_scan_period; //slow scan period u32 fast_scan_iterations; //Fast scan iterations u8 ssid_length[MAX_PNO_LIST_COUNT]; //SSID Length Array u8 ssid_cipher_info[MAX_PNO_LIST_COUNT]; //Cipher information for security u8 ssid_channel_info[MAX_PNO_LIST_COUNT]; //channel information u8 loc_probe_req[MAX_HIDDEN_AP]; //loc_probeReq }pno_nlo_info_t; typedef struct pno_ssid { u32 SSID_len; u8 SSID[32]; } pno_ssid_t; typedef struct pno_ssid_list { pno_ssid_t node[MAX_PNO_LIST_COUNT]; }pno_ssid_list_t; typedef struct pno_scan_channel_info { u8 channel; u8 tx_power; u8 timeout; u8 active; //set 1 means active scan, or pasivite scan. }pno_scan_channel_info_t; typedef struct pno_scan_info { u8 enableRFE; //Enable RFE u8 period_scan_time; //exclusive with fast_scan_period and slow_scan_period u8 periodScan; //exclusive with fast_scan_period and slow_scan_period u8 orig_80_offset; //original channel 80 offset u8 orig_40_offset; //original channel 40 offset u8 orig_bw; //original bandwidth u8 orig_ch; //original channel u8 channel_num; //number of channel u64 rfe_type; //rfe_type && 0x00000000000000ff pno_scan_channel_info_t ssid_channel_info[MAX_SCAN_LIST_COUNT]; }pno_scan_info_t; #endif //CONFIG_PNO_SUPPORT struct pwrctrl_priv { _pwrlock lock; _pwrlock check_32k_lock; volatile u8 rpwm; // requested power state for fw volatile u8 cpwm; // fw current power state. updated when 1. read from HCPWM 2. driver lowers power level volatile u8 tog; // toggling volatile u8 cpwm_tog; // toggling u8 pwr_mode; u8 smart_ps; u8 bcn_ant_mode; u8 dtim; u32 alives; _workitem cpwm_event; #ifdef CONFIG_LPS_RPWM_TIMER u8 brpwmtimeout; _workitem rpwmtimeoutwi; _timer pwr_rpwm_timer; #endif // CONFIG_LPS_RPWM_TIMER u8 bpower_saving; //for LPS/IPS u8 b_hw_radio_off; u8 reg_rfoff; u8 reg_pdnmode; //powerdown mode u32 rfoff_reason; //RF OFF Level u32 cur_ps_level; u32 reg_rfps_level; uint ips_enter_cnts; uint ips_leave_cnts; u8 ips_mode; u8 ips_org_mode; u8 ips_mode_req; // used to accept the mode setting request, will update to ipsmode later uint bips_processing; u32 ips_deny_time; /* will deny IPS when system time is smaller than this */ u8 pre_ips_type;// 0: default flow, 1: carddisbale flow // ps_deny: if 0, power save is free to go; otherwise deny all kinds of power save. // Use PS_DENY_REASON to decide reason. // Don't access this variable directly without control function, // and this variable should be protected by lock. u32 ps_deny; u8 ps_processing; /* temporarily used to mark whether in rtw_ps_processor */ u8 fw_psmode_iface_id; u8 bLeisurePs; u8 LpsIdleCount; u8 power_mgnt; u8 org_power_mgnt; u8 bFwCurrentInPSMode; u32 DelayLPSLastTimeStamp; s32 pnp_current_pwr_state; u8 pnp_bstop_trx; u8 bInternalAutoSuspend; u8 bInSuspend; #ifdef CONFIG_BT_COEXIST u8 bAutoResume; u8 autopm_cnt; #endif u8 bSupportRemoteWakeup; u8 wowlan_wake_reason; u8 wowlan_ap_mode; u8 wowlan_mode; #ifdef CONFIG_WOWLAN u8 wowlan_pattern; u8 wowlan_magic; u8 wowlan_unicast; u8 wowlan_pattern_idx; u8 wowlan_pno_enable; u8 wowlan_from_cmd; #ifdef CONFIG_PNO_SUPPORT u8 pno_in_resume; u8 pno_inited; pno_nlo_info_t *pnlo_info; pno_scan_info_t *pscan_info; pno_ssid_list_t *pno_ssid_list; #endif u32 wowlan_pattern_context[8][5]; u64 wowlan_fw_iv; #endif // CONFIG_WOWLAN _timer pwr_state_check_timer; int pwr_state_check_interval; u8 pwr_state_check_cnts; int ps_flag; /* used by autosuspend */ rt_rf_power_state rf_pwrstate;//cur power state, only for IPS //rt_rf_power_state current_rfpwrstate; rt_rf_power_state change_rfpwrstate; u8 bHWPowerdown; /* power down mode selection. 0:radio off, 1:power down */ u8 bHWPwrPindetect; /* come from registrypriv.hwpwrp_detect. enable power down function. 0:disable, 1:enable */ u8 bkeepfwalive; u8 brfoffbyhw; unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT]; #ifdef CONFIG_RESUME_IN_WORKQUEUE struct workqueue_struct *rtw_workqueue; _workitem resume_work; #endif #ifdef CONFIG_HAS_EARLYSUSPEND struct early_suspend early_suspend; u8 do_late_resume; #endif //CONFIG_HAS_EARLYSUSPEND #ifdef CONFIG_ANDROID_POWER android_early_suspend_t early_suspend; u8 do_late_resume; #endif #ifdef CONFIG_INTEL_PROXIM u8 stored_power_mgnt; #endif }; #define rtw_get_ips_mode_req(pwrctl) \ (pwrctl)->ips_mode_req #define rtw_ips_mode_req(pwrctl, ips_mode) \ (pwrctl)->ips_mode_req = (ips_mode) #define RTW_PWR_STATE_CHK_INTERVAL 2000 #define _rtw_set_pwr_state_check_timer(pwrctl, ms) \ do { \ /*DBG_871X("%s _rtw_set_pwr_state_check_timer(%p, %d)\n", __FUNCTION__, (pwrctl), (ms));*/ \ _set_timer(&(pwrctl)->pwr_state_check_timer, (ms)); \ } while(0) #define rtw_set_pwr_state_check_timer(pwrctl) \ _rtw_set_pwr_state_check_timer((pwrctl), (pwrctl)->pwr_state_check_interval) extern void rtw_init_pwrctrl_priv(_adapter *adapter); extern void rtw_free_pwrctrl_priv(_adapter * adapter); #ifdef CONFIG_LPS_LCLK s32 rtw_register_task_alive(PADAPTER, u32 task); void rtw_unregister_task_alive(PADAPTER, u32 task); extern s32 rtw_register_tx_alive(PADAPTER padapter); extern void rtw_unregister_tx_alive(PADAPTER padapter); extern s32 rtw_register_rx_alive(PADAPTER padapter); extern void rtw_unregister_rx_alive(PADAPTER padapter); extern s32 rtw_register_cmd_alive(PADAPTER padapter); extern void rtw_unregister_cmd_alive(PADAPTER padapter); extern s32 rtw_register_evt_alive(PADAPTER padapter); extern void rtw_unregister_evt_alive(PADAPTER padapter); extern void cpwm_int_hdl(PADAPTER padapter, struct reportpwrstate_parm *preportpwrstate); extern void LPS_Leave_check(PADAPTER padapter); #endif extern void LeaveAllPowerSaveMode(PADAPTER Adapter); extern void LeaveAllPowerSaveModeDirect(PADAPTER Adapter); #ifdef CONFIG_IPS void _ips_enter(_adapter * padapter); void ips_enter(_adapter * padapter); int _ips_leave(_adapter * padapter); int ips_leave(_adapter * padapter); #endif void rtw_ps_processor(_adapter*padapter); #ifdef CONFIG_AUTOSUSPEND int autoresume_enter(_adapter* padapter); #endif #ifdef SUPPORT_HW_RFOFF_DETECTED rt_rf_power_state RfOnOffDetect(IN PADAPTER pAdapter ); #endif int rtw_fw_ps_state(PADAPTER padapter); #ifdef CONFIG_LPS s32 LPS_RF_ON_check(PADAPTER padapter, u32 delay_ms); void LPS_Enter(PADAPTER padapter, const char *msg); void LPS_Leave(PADAPTER padapter, const char *msg); void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets); void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg); void rtw_set_rpwm(_adapter * padapter, u8 val8); #endif #ifdef CONFIG_RESUME_IN_WORKQUEUE void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv); #endif //CONFIG_RESUME_IN_WORKQUEUE #if defined(CONFIG_HAS_EARLYSUSPEND ) || defined(CONFIG_ANDROID_POWER) bool rtw_is_earlysuspend_registered(struct pwrctrl_priv *pwrpriv); bool rtw_is_do_late_resume(struct pwrctrl_priv *pwrpriv); void rtw_set_do_late_resume(struct pwrctrl_priv *pwrpriv, bool enable); void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv); void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv); #else #define rtw_is_earlysuspend_registered(pwrpriv) _FALSE #define rtw_is_do_late_resume(pwrpriv) _FALSE #define rtw_set_do_late_resume(pwrpriv, enable) do {} while (0) #define rtw_register_early_suspend(pwrpriv) do {} while (0) #define rtw_unregister_early_suspend(pwrpriv) do {} while (0) #endif /* CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER */ u8 rtw_interface_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id,u8* val); void rtw_set_ips_deny(_adapter *padapter, u32 ms); int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller); #define rtw_pwr_wakeup(adapter) _rtw_pwr_wakeup(adapter, RTW_PWR_STATE_CHK_INTERVAL, __FUNCTION__) #define rtw_pwr_wakeup_ex(adapter, ips_deffer_ms) _rtw_pwr_wakeup(adapter, ips_deffer_ms, __FUNCTION__) int rtw_pm_set_ips(_adapter *padapter, u8 mode); int rtw_pm_set_lps(_adapter *padapter, u8 mode); void rtw_ps_deny(PADAPTER padapter, PS_DENY_REASON reason); void rtw_ps_deny_cancel(PADAPTER padapter, PS_DENY_REASON reason); u32 rtw_ps_deny_get(PADAPTER padapter); #endif //__RTL871X_PWRCTRL_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_qos.h000066400000000000000000000021271261122257400207730ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTW_QOS_H_ #define _RTW_QOS_H_ struct qos_priv { unsigned int qos_option; //bit mask option: u-apsd, s-apsd, ts, block ack... }; #endif //_RTL871X_QOS_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_recv.h000066400000000000000000000447561261122257400211460ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTW_RECV_H_ #define _RTW_RECV_H_ #ifdef PLATFORM_OS_XP #ifdef CONFIG_SDIO_HCI #define NR_RECVBUFF 1024//512//128 #else #define NR_RECVBUFF (16) #endif #elif defined(PLATFORM_OS_CE) #ifdef CONFIG_SDIO_HCI #define NR_RECVBUFF (128) #else #define NR_RECVBUFF (4) #endif #else //PLATFORM_LINUX /PLATFORM_BSD #ifdef CONFIG_SINGLE_RECV_BUF #define NR_RECVBUFF (1) #else #if defined(CONFIG_GSPI_HCI) #define NR_RECVBUFF (32) #elif defined(CONFIG_SDIO_HCI) #define NR_RECVBUFF (8) #else #define NR_RECVBUFF (8) #endif #endif //CONFIG_SINGLE_RECV_BUF #define NR_PREALLOC_RECV_SKB (8) #endif #define NR_RECVFRAME 256 #define RXFRAME_ALIGN 8 #define RXFRAME_ALIGN_SZ (1<network.PhyInfo.SignalStrength); #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA struct rx_raw_rssi raw_rssi_info; #endif //s8 rxpwdb; s16 noise; //int RxSNRdB[2]; //s8 RxRssi[2]; //int FalseAlmCnt_all; #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS _timer signal_stat_timer; u32 signal_stat_sampling_interval; //u32 signal_stat_converging_constant; struct signal_stat signal_qual_data; struct signal_stat signal_strength_data; #else //CONFIG_NEW_SIGNAL_STAT_PROCESS struct smooth_rssi_data signal_qual_data; struct smooth_rssi_data signal_strength_data; #endif //CONFIG_NEW_SIGNAL_STAT_PROCESS u16 sink_udpport,pre_rtp_rxseq,cur_rtp_rxseq; }; #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS #define rtw_set_signal_stat_timer(recvpriv) _set_timer(&(recvpriv)->signal_stat_timer, (recvpriv)->signal_stat_sampling_interval) #endif //CONFIG_NEW_SIGNAL_STAT_PROCESS struct sta_recv_priv { _lock lock; sint option; //_queue blk_strms[MAX_RX_NUMBLKS]; _queue defrag_q; //keeping the fragment frame until defrag struct stainfo_rxcache rxcache; //uint sta_rx_bytes; //uint sta_rx_pkts; //uint sta_rx_fail; }; struct recv_buf { _list list; _lock recvbuf_lock; u32 ref_cnt; PADAPTER adapter; u8 *pbuf; u8 *pallocated_buf; u32 len; u8 *phead; u8 *pdata; u8 *ptail; u8 *pend; #ifdef CONFIG_USB_HCI #if defined(PLATFORM_OS_XP)||defined(PLATFORM_LINUX)||defined(PLATFORM_FREEBSD) PURB purb; dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */ u32 alloc_sz; #endif #ifdef PLATFORM_OS_XP PIRP pirp; #endif #ifdef PLATFORM_OS_CE USB_TRANSFER usb_transfer_read_port; #endif u8 irp_pending; int transfer_len; #endif #ifdef PLATFORM_LINUX _pkt *pskb; u8 reuse; #endif #ifdef PLATFORM_FREEBSD //skb solution struct sk_buff *pskb; u8 reuse; #endif //PLATFORM_FREEBSD //skb solution }; /* head -----> data -----> payload tail -----> end -----> len = (unsigned int )(tail - data); */ struct recv_frame_hdr { _list list; #ifndef CONFIG_BSD_RX_USE_MBUF struct sk_buff *pkt; struct sk_buff *pkt_newalloc; #else // CONFIG_BSD_RX_USE_MBUF _pkt *pkt; _pkt *pkt_newalloc; #endif // CONFIG_BSD_RX_USE_MBUF _adapter *adapter; u8 fragcnt; int frame_tag; struct rx_pkt_attrib attrib; uint len; u8 *rx_head; u8 *rx_data; u8 *rx_tail; u8 *rx_end; void *precvbuf; // struct sta_info *psta; //for A-MPDU Rx reordering buffer control struct recv_reorder_ctrl *preorder_ctrl; #ifdef CONFIG_WAPI_SUPPORT u8 UserPriority; u8 WapiTempPN[16]; u8 WapiSrcAddr[6]; u8 bWapiCheckPNInDecrypt; u8 bIsWaiPacket; #endif }; union recv_frame{ union{ _list list; struct recv_frame_hdr hdr; uint mem[RECVFRAME_HDR_ALIGN>>2]; }u; //uint mem[MAX_RXSZ>>2]; }; typedef enum _RX_PACKET_TYPE{ NORMAL_RX,//Normal rx packet TX_REPORT1,//CCX TX_REPORT2,//TX RPT HIS_REPORT,// USB HISR RPT C2H_PACKET }RX_PACKET_TYPE, *PRX_PACKET_TYPE; extern union recv_frame *_rtw_alloc_recvframe (_queue *pfree_recv_queue); //get a free recv_frame from pfree_recv_queue extern union recv_frame *rtw_alloc_recvframe (_queue *pfree_recv_queue); //get a free recv_frame from pfree_recv_queue extern void rtw_init_recvframe(union recv_frame *precvframe ,struct recv_priv *precvpriv); extern int rtw_free_recvframe(union recv_frame *precvframe, _queue *pfree_recv_queue); #define rtw_dequeue_recvframe(queue) rtw_alloc_recvframe(queue) extern int _rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue); extern int rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue); extern void rtw_free_recvframe_queue(_queue *pframequeue, _queue *pfree_recv_queue); u32 rtw_free_uc_swdec_pending_queue(_adapter *adapter); sint rtw_enqueue_recvbuf_to_head(struct recv_buf *precvbuf, _queue *queue); sint rtw_enqueue_recvbuf(struct recv_buf *precvbuf, _queue *queue); struct recv_buf *rtw_dequeue_recvbuf (_queue *queue); void rtw_reordering_ctrl_timeout_handler(void *pcontext); __inline static u8 *get_rxmem(union recv_frame *precvframe) { //always return rx_head... if(precvframe==NULL) return NULL; return precvframe->u.hdr.rx_head; } __inline static u8 *get_rx_status(union recv_frame *precvframe) { return get_rxmem(precvframe); } __inline static u8 *get_recvframe_data(union recv_frame *precvframe) { //alwasy return rx_data if(precvframe==NULL) return NULL; return precvframe->u.hdr.rx_data; } __inline static u8 *recvframe_push(union recv_frame *precvframe, sint sz) { // append data before rx_data /* add data to the start of recv_frame * * This function extends the used data area of the recv_frame at the buffer * start. rx_data must be still larger than rx_head, after pushing. */ if(precvframe==NULL) return NULL; precvframe->u.hdr.rx_data -= sz ; if( precvframe->u.hdr.rx_data < precvframe->u.hdr.rx_head ) { precvframe->u.hdr.rx_data += sz ; return NULL; } precvframe->u.hdr.len +=sz; return precvframe->u.hdr.rx_data; } __inline static u8 *recvframe_pull(union recv_frame *precvframe, sint sz) { // rx_data += sz; move rx_data sz bytes hereafter //used for extract sz bytes from rx_data, update rx_data and return the updated rx_data to the caller if(precvframe==NULL) return NULL; precvframe->u.hdr.rx_data += sz; if(precvframe->u.hdr.rx_data > precvframe->u.hdr.rx_tail) { precvframe->u.hdr.rx_data -= sz; return NULL; } precvframe->u.hdr.len -=sz; return precvframe->u.hdr.rx_data; } __inline static u8 *recvframe_put(union recv_frame *precvframe, sint sz) { // rx_tai += sz; move rx_tail sz bytes hereafter //used for append sz bytes from ptr to rx_tail, update rx_tail and return the updated rx_tail to the caller //after putting, rx_tail must be still larger than rx_end. unsigned char * prev_rx_tail; if(precvframe==NULL) return NULL; prev_rx_tail = precvframe->u.hdr.rx_tail; precvframe->u.hdr.rx_tail += sz; if(precvframe->u.hdr.rx_tail > precvframe->u.hdr.rx_end) { precvframe->u.hdr.rx_tail -= sz; return NULL; } precvframe->u.hdr.len +=sz; return precvframe->u.hdr.rx_tail; } __inline static u8 *recvframe_pull_tail(union recv_frame *precvframe, sint sz) { // rmv data from rx_tail (by yitsen) //used for extract sz bytes from rx_end, update rx_end and return the updated rx_end to the caller //after pulling, rx_end must be still larger than rx_data. if(precvframe==NULL) return NULL; precvframe->u.hdr.rx_tail -= sz; if(precvframe->u.hdr.rx_tail < precvframe->u.hdr.rx_data) { precvframe->u.hdr.rx_tail += sz; return NULL; } precvframe->u.hdr.len -=sz; return precvframe->u.hdr.rx_tail; } __inline static _buffer * get_rxbuf_desc(union recv_frame *precvframe) { _buffer * buf_desc; if(precvframe==NULL) return NULL; #ifdef PLATFORM_WINDOWS NdisQueryPacket(precvframe->u.hdr.pkt, NULL, NULL, &buf_desc, NULL); #endif return buf_desc; } __inline static union recv_frame *rxmem_to_recvframe(u8 *rxmem) { //due to the design of 2048 bytes alignment of recv_frame, we can reference the union recv_frame //from any given member of recv_frame. // rxmem indicates the any member/address in recv_frame return (union recv_frame*)(((SIZE_PTR)rxmem >> RXFRAME_ALIGN) << RXFRAME_ALIGN); } __inline static union recv_frame *pkt_to_recvframe(_pkt *pkt) { u8 * buf_star; union recv_frame * precv_frame; #ifdef PLATFORM_WINDOWS _buffer * buf_desc; uint len; NdisQueryPacket(pkt, NULL, NULL, &buf_desc, &len); NdisQueryBufferSafe(buf_desc, &buf_star, &len, HighPagePriority); #endif precv_frame = rxmem_to_recvframe((unsigned char*)buf_star); return precv_frame; } __inline static u8 *pkt_to_recvmem(_pkt *pkt) { // return the rx_head union recv_frame * precv_frame = pkt_to_recvframe(pkt); return precv_frame->u.hdr.rx_head; } __inline static u8 *pkt_to_recvdata(_pkt *pkt) { // return the rx_data union recv_frame * precv_frame =pkt_to_recvframe(pkt); return precv_frame->u.hdr.rx_data; } __inline static sint get_recvframe_len(union recv_frame *precvframe) { return precvframe->u.hdr.len; } __inline static s32 translate_percentage_to_dbm(u32 SignalStrengthIndex) { s32 SignalPower; // in dBm. #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING // Translate to dBm (x=y-100) SignalPower = SignalStrengthIndex - 100; #else // Translate to dBm (x=0.5y-95). SignalPower = (s32)((SignalStrengthIndex + 1) >> 1); SignalPower -= 95; #endif return SignalPower; } struct sta_info; extern void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv); extern void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_rf.h000066400000000000000000000111041261122257400205730ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_RF_H_ #define __RTW_RF_H_ #define OFDM_PHY 1 #define MIXED_PHY 2 #define CCK_PHY 3 #define NumRates (13) // slot time for 11g #define SHORT_SLOT_TIME 9 #define NON_SHORT_SLOT_TIME 20 #define RTL8711_RF_MAX_SENS 6 #define RTL8711_RF_DEF_SENS 4 // // We now define the following channels as the max channels in each channel plan. // 2G, total 14 chnls // {1,2,3,4,5,6,7,8,9,10,11,12,13,14} // 5G, total 24 chnls // {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165} #define MAX_CHANNEL_NUM_2G 14 #define MAX_CHANNEL_NUM_5G 24 #define MAX_CHANNEL_NUM 38//14+24 //#define NUM_REGULATORYS 21 #define NUM_REGULATORYS 1 //Country codes #define USA 0x555320 #define EUROPE 0x1 //temp, should be provided later #define JAPAN 0x2 //temp, should be provided later struct regulatory_class { u32 starting_freq; //MHz, u8 channel_set[MAX_CHANNEL_NUM]; u8 channel_cck_power[MAX_CHANNEL_NUM];//dbm u8 channel_ofdm_power[MAX_CHANNEL_NUM];//dbm u8 txpower_limit; //dbm u8 channel_spacing; //MHz u8 modem; }; typedef enum _CAPABILITY{ cESS = 0x0001, cIBSS = 0x0002, cPollable = 0x0004, cPollReq = 0x0008, cPrivacy = 0x0010, cShortPreamble = 0x0020, cPBCC = 0x0040, cChannelAgility = 0x0080, cSpectrumMgnt = 0x0100, cQos = 0x0200, // For HCCA, use with CF-Pollable and CF-PollReq cShortSlotTime = 0x0400, cAPSD = 0x0800, cRM = 0x1000, // RRM (Radio Request Measurement) cDSSS_OFDM = 0x2000, cDelayedBA = 0x4000, cImmediateBA = 0x8000, }CAPABILITY, *PCAPABILITY; enum _REG_PREAMBLE_MODE{ PREAMBLE_LONG = 1, PREAMBLE_AUTO = 2, PREAMBLE_SHORT = 3, }; enum _RTL8712_RF_MIMO_CONFIG_{ RTL8712_RFCONFIG_1T=0x10, RTL8712_RFCONFIG_2T=0x20, RTL8712_RFCONFIG_1R=0x01, RTL8712_RFCONFIG_2R=0x02, RTL8712_RFCONFIG_1T1R=0x11, RTL8712_RFCONFIG_1T2R=0x12, RTL8712_RFCONFIG_TURBO=0x92, RTL8712_RFCONFIG_2T2R=0x22 }; typedef enum _RF90_RADIO_PATH{ RF90_PATH_A = 0, //Radio Path A RF90_PATH_B = 1, //Radio Path B RF90_PATH_C = 2, //Radio Path C RF90_PATH_D = 3 //Radio Path D //RF90_PATH_MAX //Max RF number 90 support }RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E; // Bandwidth Offset #define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0 #define HAL_PRIME_CHNL_OFFSET_LOWER 1 #define HAL_PRIME_CHNL_OFFSET_UPPER 2 // Represent Channel Width in HT Capabilities // typedef enum _CHANNEL_WIDTH{ CHANNEL_WIDTH_20 = 0, CHANNEL_WIDTH_40 = 1, CHANNEL_WIDTH_80 = 2, CHANNEL_WIDTH_160 = 3, CHANNEL_WIDTH_80_80 = 4, CHANNEL_WIDTH_MAX = 5, }CHANNEL_WIDTH, *PCHANNEL_WIDTH; // // Represent Extention Channel Offset in HT Capabilities // This is available only in 40Mhz mode. // typedef enum _EXTCHNL_OFFSET{ EXTCHNL_OFFSET_NO_EXT = 0, EXTCHNL_OFFSET_UPPER = 1, EXTCHNL_OFFSET_NO_DEF = 2, EXTCHNL_OFFSET_LOWER = 3, }EXTCHNL_OFFSET, *PEXTCHNL_OFFSET; typedef enum _VHT_DATA_SC{ VHT_DATA_SC_DONOT_CARE = 0, VHT_DATA_SC_20_UPPER_OF_80MHZ = 1, VHT_DATA_SC_20_LOWER_OF_80MHZ = 2, VHT_DATA_SC_20_UPPERST_OF_80MHZ = 3, VHT_DATA_SC_20_LOWEST_OF_80MHZ = 4, VHT_DATA_SC_20_RECV1 = 5, VHT_DATA_SC_20_RECV2 = 6, VHT_DATA_SC_20_RECV3 = 7, VHT_DATA_SC_20_RECV4 = 8, VHT_DATA_SC_40_UPPER_OF_80MHZ = 9, VHT_DATA_SC_40_LOWER_OF_80MHZ = 10, }VHT_DATA_SC, *PVHT_DATA_SC_E; typedef enum _PROTECTION_MODE{ PROTECTION_MODE_AUTO = 0, PROTECTION_MODE_FORCE_ENABLE = 1, PROTECTION_MODE_FORCE_DISABLE = 2, }PROTECTION_MODE, *PPROTECTION_MODE; /* 2007/11/15 MH Define different RF type. */ typedef enum _RT_RF_TYPE_DEFINITION { RF_1T2R = 0, RF_2T4R = 1, RF_2T2R = 2, RF_1T1R = 3, RF_2T2R_GREEN = 4, RF_MAX_TYPE = 5, }RT_RF_TYPE_DEF_E; u32 rtw_ch2freq(u32 ch); u32 rtw_freq2ch(u32 freq); #endif //_RTL8711_RF_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_security.h000066400000000000000000000341411261122257400220410ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_SECURITY_H_ #define __RTW_SECURITY_H_ #define _NO_PRIVACY_ 0x0 #define _WEP40_ 0x1 #define _TKIP_ 0x2 #define _TKIP_WTMIC_ 0x3 #define _AES_ 0x4 #define _WEP104_ 0x5 #define _WEP_WPA_MIXED_ 0x07 // WEP + WPA #define _SMS4_ 0x06 #ifdef CONFIG_IEEE80211W #define _BIP_ 0x8 #endif //CONFIG_IEEE80211W #define is_wep_enc(alg) (((alg) == _WEP40_) || ((alg) == _WEP104_)) const char *security_type_str(u8 value); #define _WPA_IE_ID_ 0xdd #define _WPA2_IE_ID_ 0x30 #define SHA256_MAC_LEN 32 #define AES_BLOCK_SIZE 16 #define AES_PRIV_SIZE (4 * 44) #define RTW_KEK_LEN 16 #define RTW_KCK_LEN 16 #define RTW_REPLAY_CTR_LEN 8 typedef enum { ENCRYP_PROTOCOL_OPENSYS, //open system ENCRYP_PROTOCOL_WEP, //WEP ENCRYP_PROTOCOL_WPA, //WPA ENCRYP_PROTOCOL_WPA2, //WPA2 ENCRYP_PROTOCOL_WAPI, //WAPI: Not support in this version ENCRYP_PROTOCOL_MAX }ENCRYP_PROTOCOL_E; #ifndef Ndis802_11AuthModeWPA2 #define Ndis802_11AuthModeWPA2 (Ndis802_11AuthModeWPANone + 1) #endif #ifndef Ndis802_11AuthModeWPA2PSK #define Ndis802_11AuthModeWPA2PSK (Ndis802_11AuthModeWPANone + 2) #endif union pn48 { u64 val; #ifdef CONFIG_LITTLE_ENDIAN struct { u8 TSC0; u8 TSC1; u8 TSC2; u8 TSC3; u8 TSC4; u8 TSC5; u8 TSC6; u8 TSC7; } _byte_; #elif defined(CONFIG_BIG_ENDIAN) struct { u8 TSC7; u8 TSC6; u8 TSC5; u8 TSC4; u8 TSC3; u8 TSC2; u8 TSC1; u8 TSC0; } _byte_; #endif }; union Keytype { u8 skey[16]; u32 lkey[4]; }; typedef struct _RT_PMKID_LIST { u8 bUsed; u8 Bssid[6]; u8 PMKID[16]; u8 SsidBuf[33]; u8* ssid_octet; u16 ssid_length; } RT_PMKID_LIST, *PRT_PMKID_LIST; struct security_priv { u32 dot11AuthAlgrthm; // 802.11 auth, could be open, shared, 8021x and authswitch u32 dot11PrivacyAlgrthm; // This specify the privacy for shared auth. algorithm. /* WEP */ u32 dot11PrivacyKeyIndex; // this is only valid for legendary wep, 0~3 for key id. (tx key index) union Keytype dot11DefKey[4]; // this is only valid for def. key u32 dot11DefKeylen[4]; u8 key_mask; /* use to restore wep key after hal_init */ u32 dot118021XGrpPrivacy; // This specify the privacy algthm. used for Grp key u32 dot118021XGrpKeyid; // key id used for Grp Key ( tx key index) union Keytype dot118021XGrpKey[4]; // 802.1x Group Key, for inx0 and inx1 union Keytype dot118021XGrptxmickey[4]; union Keytype dot118021XGrprxmickey[4]; union pn48 dot11Grptxpn; // PN48 used for Grp Key xmit. union pn48 dot11Grprxpn; // PN48 used for Grp Key recv. #ifdef CONFIG_IEEE80211W u32 dot11wBIPKeyid; // key id used for BIP Key ( tx key index) union Keytype dot11wBIPKey[6]; // BIP Key, for index4 and index5 union pn48 dot11wBIPtxpn; // PN48 used for Grp Key xmit. union pn48 dot11wBIPrxpn; // PN48 used for Grp Key recv. #endif //CONFIG_IEEE80211W #ifdef CONFIG_AP_MODE //extend security capabilities for AP_MODE unsigned int dot8021xalg;//0:disable, 1:psk, 2:802.1x unsigned int wpa_psk;//0:disable, bit(0): WPA, bit(1):WPA2 unsigned int wpa_group_cipher; unsigned int wpa2_group_cipher; unsigned int wpa_pairwise_cipher; unsigned int wpa2_pairwise_cipher; #endif u8 wps_ie[MAX_WPS_IE_LEN];//added in assoc req int wps_ie_len; u8 binstallGrpkey; #ifdef CONFIG_GTK_OL u8 binstallKCK_KEK; #endif //CONFIG_GTK_OL #ifdef CONFIG_IEEE80211W u8 binstallBIPkey; #endif //CONFIG_IEEE80211W u8 busetkipkey; //_timer tkip_timer; u8 bcheck_grpkey; u8 bgrpkey_handshake; //u8 packet_cnt;//unused, removed s32 sw_encrypt;//from registry_priv s32 sw_decrypt;//from registry_priv s32 hw_decrypted;//if the rx packets is hw_decrypted==_FALSE, it means the hw has not been ready. //keeps the auth_type & enc_status from upper layer ioctl(wpa_supplicant or wzc) u32 ndisauthtype; // NDIS_802_11_AUTHENTICATION_MODE u32 ndisencryptstatus; // NDIS_802_11_ENCRYPTION_STATUS WLAN_BSSID_EX sec_bss; //for joinbss (h2c buffer) usage NDIS_802_11_WEP ndiswep; #ifdef PLATFORM_WINDOWS u8 KeyMaterial[16];// variable length depending on above field. #endif u8 assoc_info[600]; u8 szofcapability[256]; //for wpa2 usage u8 oidassociation[512]; //for wpa/wpa2 usage u8 authenticator_ie[256]; //store ap security information element u8 supplicant_ie[256]; //store sta security information element //for tkip countermeasure u32 last_mic_err_time; u8 btkip_countermeasure; u8 btkip_wait_report; u32 btkip_countermeasure_time; //--------------------------------------------------------------------------- // For WPA2 Pre-Authentication. //--------------------------------------------------------------------------- //u8 RegEnablePreAuth; // Default value: Pre-Authentication enabled or not, from registry "EnablePreAuth". Added by Annie, 2005-11-01. //u8 EnablePreAuthentication; // Current Value: Pre-Authentication enabled or not. RT_PMKID_LIST PMKIDList[NUM_PMKID_CACHE]; // Renamed from PreAuthKey[NUM_PRE_AUTH_KEY]. Annie, 2006-10-13. u8 PMKIDIndex; //u32 PMKIDCount; // Added by Annie, 2006-10-13. //u8 szCapability[256]; // For WPA2-PSK using zero-config, by Annie, 2005-09-20. u8 bWepDefaultKeyIdxSet; #define DBG_SW_SEC_CNT #ifdef DBG_SW_SEC_CNT u64 wep_sw_enc_cnt_bc; u64 wep_sw_enc_cnt_mc; u64 wep_sw_enc_cnt_uc; u64 wep_sw_dec_cnt_bc; u64 wep_sw_dec_cnt_mc; u64 wep_sw_dec_cnt_uc; u64 tkip_sw_enc_cnt_bc; u64 tkip_sw_enc_cnt_mc; u64 tkip_sw_enc_cnt_uc; u64 tkip_sw_dec_cnt_bc; u64 tkip_sw_dec_cnt_mc; u64 tkip_sw_dec_cnt_uc; u64 aes_sw_enc_cnt_bc; u64 aes_sw_enc_cnt_mc; u64 aes_sw_enc_cnt_uc; u64 aes_sw_dec_cnt_bc; u64 aes_sw_dec_cnt_mc; u64 aes_sw_dec_cnt_uc; #endif /* DBG_SW_SEC_CNT */ }; struct sha256_state { u64 length; u32 state[8], curlen; u8 buf[64]; }; #define GET_ENCRY_ALGO(psecuritypriv, psta, encry_algo, bmcst)\ do{\ switch(psecuritypriv->dot11AuthAlgrthm)\ {\ case dot11AuthAlgrthm_Open:\ case dot11AuthAlgrthm_Shared:\ case dot11AuthAlgrthm_Auto:\ encry_algo = (u8)psecuritypriv->dot11PrivacyAlgrthm;\ break;\ case dot11AuthAlgrthm_8021X:\ if(bmcst)\ encry_algo = (u8)psecuritypriv->dot118021XGrpPrivacy;\ else\ encry_algo =(u8) psta->dot118021XPrivacy;\ break;\ case dot11AuthAlgrthm_WAPI:\ encry_algo = (u8)psecuritypriv->dot11PrivacyAlgrthm;\ break;\ }\ }while(0) #define _AES_IV_LEN_ 8 #define SET_ICE_IV_LEN( iv_len, icv_len, encrypt)\ do{\ switch(encrypt)\ {\ case _WEP40_:\ case _WEP104_:\ iv_len = 4;\ icv_len = 4;\ break;\ case _TKIP_:\ iv_len = 8;\ icv_len = 4;\ break;\ case _AES_:\ iv_len = 8;\ icv_len = 8;\ break;\ case _SMS4_:\ iv_len = 18;\ icv_len = 16;\ break;\ default:\ iv_len = 0;\ icv_len = 0;\ break;\ }\ }while(0) #define GET_TKIP_PN(iv,dot11txpn)\ do{\ dot11txpn._byte_.TSC0=iv[2];\ dot11txpn._byte_.TSC1=iv[0];\ dot11txpn._byte_.TSC2=iv[4];\ dot11txpn._byte_.TSC3=iv[5];\ dot11txpn._byte_.TSC4=iv[6];\ dot11txpn._byte_.TSC5=iv[7];\ }while(0) #define ROL32( A, n ) ( ((A) << (n)) | ( ((A)>>(32-(n))) & ( (1UL << (n)) - 1 ) ) ) #define ROR32( A, n ) ROL32( (A), 32-(n) ) struct mic_data { u32 K0, K1; // Key u32 L, R; // Current state u32 M; // Message accumulator (single word) u32 nBytesInM; // # bytes in M }; extern const u32 Te0[256]; extern const u32 Te1[256]; extern const u32 Te2[256]; extern const u32 Te3[256]; extern const u32 Te4[256]; extern const u32 Td0[256]; extern const u32 Td1[256]; extern const u32 Td2[256]; extern const u32 Td3[256]; extern const u32 Td4[256]; extern const u32 rcon[10]; extern const u8 Td4s[256]; extern const u8 rcons[10]; #define RCON(i) (rcons[(i)] << 24) static inline u32 rotr(u32 val, int bits) { return (val >> bits) | (val << (32 - bits)); } #define TE0(i) Te0[((i) >> 24) & 0xff] #define TE1(i) rotr(Te0[((i) >> 16) & 0xff], 8) #define TE2(i) rotr(Te0[((i) >> 8) & 0xff], 16) #define TE3(i) rotr(Te0[(i) & 0xff], 24) #define TE41(i) ((Te0[((i) >> 24) & 0xff] << 8) & 0xff000000) #define TE42(i) (Te0[((i) >> 16) & 0xff] & 0x00ff0000) #define TE43(i) (Te0[((i) >> 8) & 0xff] & 0x0000ff00) #define TE44(i) ((Te0[(i) & 0xff] >> 8) & 0x000000ff) #define TE421(i) ((Te0[((i) >> 16) & 0xff] << 8) & 0xff000000) #define TE432(i) (Te0[((i) >> 8) & 0xff] & 0x00ff0000) #define TE443(i) (Te0[(i) & 0xff] & 0x0000ff00) #define TE414(i) ((Te0[((i) >> 24) & 0xff] >> 8) & 0x000000ff) #define TE4(i) ((Te0[(i)] >> 8) & 0x000000ff) #define TD0(i) Td0[((i) >> 24) & 0xff] #define TD1(i) rotr(Td0[((i) >> 16) & 0xff], 8) #define TD2(i) rotr(Td0[((i) >> 8) & 0xff], 16) #define TD3(i) rotr(Td0[(i) & 0xff], 24) #define TD41(i) (Td4s[((i) >> 24) & 0xff] << 24) #define TD42(i) (Td4s[((i) >> 16) & 0xff] << 16) #define TD43(i) (Td4s[((i) >> 8) & 0xff] << 8) #define TD44(i) (Td4s[(i) & 0xff]) #define TD0_(i) Td0[(i) & 0xff] #define TD1_(i) rotr(Td0[(i) & 0xff], 8) #define TD2_(i) rotr(Td0[(i) & 0xff], 16) #define TD3_(i) rotr(Td0[(i) & 0xff], 24) #define GETU32(pt) (((u32)(pt)[0] << 24) ^ ((u32)(pt)[1] << 16) ^ \ ((u32)(pt)[2] << 8) ^ ((u32)(pt)[3])) #define PUTU32(ct, st) { \ (ct)[0] = (u8)((st) >> 24); (ct)[1] = (u8)((st) >> 16); \ (ct)[2] = (u8)((st) >> 8); (ct)[3] = (u8)(st); } #define WPA_GET_BE32(a) ((((u32) (a)[0]) << 24) | (((u32) (a)[1]) << 16) | \ (((u32) (a)[2]) << 8) | ((u32) (a)[3])) #define WPA_PUT_LE16(a, val) \ do { \ (a)[1] = ((u16) (val)) >> 8; \ (a)[0] = ((u16) (val)) & 0xff; \ } while (0) #define WPA_PUT_BE32(a, val) \ do { \ (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \ (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \ (a)[3] = (u8) (((u32) (val)) & 0xff); \ } while (0) #define WPA_PUT_BE64(a, val) \ do { \ (a)[0] = (u8) (((u64) (val)) >> 56); \ (a)[1] = (u8) (((u64) (val)) >> 48); \ (a)[2] = (u8) (((u64) (val)) >> 40); \ (a)[3] = (u8) (((u64) (val)) >> 32); \ (a)[4] = (u8) (((u64) (val)) >> 24); \ (a)[5] = (u8) (((u64) (val)) >> 16); \ (a)[6] = (u8) (((u64) (val)) >> 8); \ (a)[7] = (u8) (((u64) (val)) & 0xff); \ } while (0) /* ===== start - public domain SHA256 implementation ===== */ /* This is based on SHA256 implementation in LibTomCrypt that was released into * public domain by Tom St Denis. */ /* the K array */ static const unsigned long K[64] = { 0x428a2f98UL, 0x71374491UL, 0xb5c0fbcfUL, 0xe9b5dba5UL, 0x3956c25bUL, 0x59f111f1UL, 0x923f82a4UL, 0xab1c5ed5UL, 0xd807aa98UL, 0x12835b01UL, 0x243185beUL, 0x550c7dc3UL, 0x72be5d74UL, 0x80deb1feUL, 0x9bdc06a7UL, 0xc19bf174UL, 0xe49b69c1UL, 0xefbe4786UL, 0x0fc19dc6UL, 0x240ca1ccUL, 0x2de92c6fUL, 0x4a7484aaUL, 0x5cb0a9dcUL, 0x76f988daUL, 0x983e5152UL, 0xa831c66dUL, 0xb00327c8UL, 0xbf597fc7UL, 0xc6e00bf3UL, 0xd5a79147UL, 0x06ca6351UL, 0x14292967UL, 0x27b70a85UL, 0x2e1b2138UL, 0x4d2c6dfcUL, 0x53380d13UL, 0x650a7354UL, 0x766a0abbUL, 0x81c2c92eUL, 0x92722c85UL, 0xa2bfe8a1UL, 0xa81a664bUL, 0xc24b8b70UL, 0xc76c51a3UL, 0xd192e819UL, 0xd6990624UL, 0xf40e3585UL, 0x106aa070UL, 0x19a4c116UL, 0x1e376c08UL, 0x2748774cUL, 0x34b0bcb5UL, 0x391c0cb3UL, 0x4ed8aa4aUL, 0x5b9cca4fUL, 0x682e6ff3UL, 0x748f82eeUL, 0x78a5636fUL, 0x84c87814UL, 0x8cc70208UL, 0x90befffaUL, 0xa4506cebUL, 0xbef9a3f7UL, 0xc67178f2UL }; /* Various logical functions */ #define RORc(x, y) \ ( ((((unsigned long) (x) & 0xFFFFFFFFUL) >> (unsigned long) ((y) & 31)) | \ ((unsigned long) (x) << (unsigned long) (32 - ((y) & 31)))) & 0xFFFFFFFFUL) #define Ch(x,y,z) (z ^ (x & (y ^ z))) #define Maj(x,y,z) (((x | y) & z) | (x & y)) #define S(x, n) RORc((x), (n)) #define R(x, n) (((x)&0xFFFFFFFFUL)>>(n)) #define Sigma0(x) (S(x, 2) ^ S(x, 13) ^ S(x, 22)) #define Sigma1(x) (S(x, 6) ^ S(x, 11) ^ S(x, 25)) #define Gamma0(x) (S(x, 7) ^ S(x, 18) ^ R(x, 3)) #define Gamma1(x) (S(x, 17) ^ S(x, 19) ^ R(x, 10)) #ifndef MIN #define MIN(x, y) (((x) < (y)) ? (x) : (y)) #endif #ifdef CONFIG_IEEE80211W int omac1_aes_128(u8 *key, u8 *data, size_t data_len, u8 *mac); #endif //CONFIG_IEEE80211W void rtw_secmicsetkey(struct mic_data *pmicdata, u8 * key ); void rtw_secmicappendbyte(struct mic_data *pmicdata, u8 b ); void rtw_secmicappend(struct mic_data *pmicdata, u8 * src, u32 nBytes ); void rtw_secgetmic(struct mic_data *pmicdata, u8 * dst ); void rtw_seccalctkipmic( u8 * key, u8 *header, u8 *data, u32 data_len, u8 *Miccode, u8 priority); u32 rtw_aes_encrypt(_adapter *padapter, u8 *pxmitframe); u32 rtw_tkip_encrypt(_adapter *padapter, u8 *pxmitframe); void rtw_wep_encrypt(_adapter *padapter, u8 *pxmitframe); u32 rtw_aes_decrypt(_adapter *padapter, u8 *precvframe); u32 rtw_tkip_decrypt(_adapter *padapter, u8 *precvframe); void rtw_wep_decrypt(_adapter *padapter, u8 *precvframe); #ifdef CONFIG_IEEE80211W u32 rtw_BIP_verify(_adapter *padapter, u8 *precvframe); #endif //CONFIG_IEEE80211W #ifdef CONFIG_TDLS void wpa_tdls_generate_tpk(_adapter *padapter, PVOID sta); int wpa_tdls_ftie_mic(u8 *kck, u8 trans_seq, u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie, u8 *mic); int tdls_verify_mic(u8 *kck, u8 trans_seq, u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie); #endif //CONFIG_TDLS void rtw_use_tkipkey_handler(RTW_TIMER_HDL_ARGS); void rtw_sec_restore_wep_key(_adapter *adapter); u8 rtw_handle_tkip_countermeasure(_adapter* adapter, const char *caller); #endif //__RTL871X_SECURITY_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_sreset.h000066400000000000000000000035771261122257400215100ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTW_SRESET_H_ #define _RTW_SRESET_H_ //#include enum { SRESET_TGP_NULL = 0, SRESET_TGP_XMIT_STATUS = 1, SRESET_TGP_LINK_STATUS = 2, }; struct sreset_priv { _mutex silentreset_mutex; u8 silent_reset_inprogress; u8 Wifi_Error_Status; unsigned long last_tx_time; unsigned long last_tx_complete_time; s32 dbg_trigger_point; }; #define WIFI_STATUS_SUCCESS 0 #define USB_VEN_REQ_CMD_FAIL BIT0 #define USB_READ_PORT_FAIL BIT1 #define USB_WRITE_PORT_FAIL BIT2 #define WIFI_MAC_TXDMA_ERROR BIT3 #define WIFI_TX_HANG BIT4 #define WIFI_RX_HANG BIT5 #define WIFI_IF_NOT_EXIST BIT6 void sreset_init_value(_adapter *padapter); void sreset_reset_value(_adapter *padapter); u8 sreset_get_wifi_status(_adapter *padapter); void sreset_set_wifi_error_status(_adapter *padapter, u32 status); void sreset_set_trigger_point(_adapter *padapter, s32 tgp); bool sreset_inprogress(_adapter *padapter); void sreset_reset(_adapter *padapter); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_tdls.h000066400000000000000000000163411261122257400211420ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_TDLS_H_ #define __RTW_TDLS_H_ #ifdef CONFIG_TDLS /* TDLS STA state */ #define TDLS_STATE_NONE 0x00000000 //default state #define TDLS_INITIATOR_STATE 0x10000000 #define TDLS_RESPONDER_STATE 0x20000000 #define TDLS_LINKED_STATE 0x40000000 #define TDLS_CH_SWITCH_ON_STATE 0x01000000 #define TDLS_PEER_AT_OFF_STATE 0x02000000 //could send pkt on target ch #define TDLS_AT_OFF_CH_STATE 0x04000000 #define TDLS_CH_SW_INITIATOR_STATE 0x08000000 //avoiding duplicated or unconditional ch. switch rsp. #define TDLS_APSD_CHSW_STATE 0x00100000 //in APSD and want to setup channel switch #define TDLS_PEER_SLEEP_STATE 0x00200000 //peer sta is sleeping //[TDLS] UAPSD: will not be used one day #define TDLS_SW_OFF_STATE 0x00400000 //terminate channel swithcing #define TDLS_ALIVE_STATE 0x00010000 //Check if peer sta is alived. #define TDLS_WAIT_PTR_STATE 0x00020000 //Waiting peer's TDLS_PEER_TRAFFIC_RESPONSE frame #define TPK_RESEND_COUNT 301 #define CH_SWITCH_TIME 10 #define CH_SWITCH_TIMEOUT 30 #define TDLS_STAY_TIME 500 #define TDLS_SIGNAL_THRESH 0x20 #define TDLS_WATCHDOG_PERIOD 10 //Periodically sending tdls discovery request in TDLS_WATCHDOG_PERIOD * 2 sec #define TDLS_STAY_TIME 500 #define TDLS_HANDSHAKE_TIME 3000 #define TDLS_PTI_TIME 7000 #define TDLS_ALIVE_COUNT 3 #define TDLS_INI_MACID_ENTRY 6 /* TDLS */ #define TDLS_MIC_LEN 16 #define WPA_NONCE_LEN 32 #define TDLS_TIMEOUT_LEN 4 struct wpa_tdls_ftie { u8 ie_type; /* FTIE */ u8 ie_len; u8 mic_ctrl[2]; u8 mic[TDLS_MIC_LEN]; u8 Anonce[WPA_NONCE_LEN]; /* Responder Nonce in TDLS */ u8 Snonce[WPA_NONCE_LEN]; /* Initiator Nonce in TDLS */ /* followed by optional elements */ } ; struct wpa_tdls_lnkid { u8 ie_type; /* Link Identifier IE */ u8 ie_len; u8 bssid[ETH_ALEN]; u8 init_sta[ETH_ALEN]; u8 resp_sta[ETH_ALEN]; } ; static u8 TDLS_RSNIE[]={ 0x01, 0x00, //version shall be set to 1 0x00, 0x0f, 0xac, 0x07, //group sipher suite 0x01, 0x00, //pairwise cipher suite count 0x00, 0x0f, 0xac, 0x04, //pairwise cipher suite list; CCMP only 0x01, 0x00, //AKM suite count 0x00, 0x0f, 0xac, 0x07, //TPK Handshake 0x0c, 0x02, //PMKID shall not be present }; static u8 TDLS_WMMIE[]={0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00}; //Qos info all set zero static u8 TDLS_EXT_CAPIE[] = {0x00, 0x00, 0x00, 0x50, 0x20, 0x00, 0x00, 0x00}; //bit(28), bit(30), bit(37) // SRC: Supported Regulatory Classes static u8 TDLS_SRC[] = { 0x01, 0x01, 0x02, 0x03, 0x04, 0x0c, 0x16, 0x17, 0x18, 0x19, 0x1b, 0x1c, 0x1d, 0x1e, 0x20, 0x21 }; void rtw_reset_tdls_info(_adapter* padapter); int rtw_init_tdls_info(_adapter* padapter); void rtw_free_tdls_info(struct tdls_info *ptdlsinfo); int issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms); void rtw_init_tdls_timer(_adapter *padapter, struct sta_info *psta); void rtw_free_tdls_timer(struct sta_info *psta); void free_tdls_sta(_adapter *padapter, struct sta_info *ptdls_sta); #ifdef CONFIG_WFD int issue_tunneled_probe_req(_adapter *padapter); int issue_tunneled_probe_rsp(_adapter *padapter, union recv_frame *precv_frame); #endif //CONFIG_WFD int issue_tdls_dis_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt); int issue_tdls_setup_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack); int issue_tdls_setup_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt); int issue_tdls_setup_cfm(_adapter *padapter, struct tdls_txmgmt *ptxmgmt); int issue_tdls_dis_rsp(_adapter * padapter, struct tdls_txmgmt *ptxmgmt, u8 privacy); int issue_tdls_teardown(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 wait_ack); int issue_tdls_peer_traffic_rsp(_adapter *padapter, struct sta_info *psta); int issue_tdls_peer_traffic_indication(_adapter *padapter, struct sta_info *psta); int issue_tdls_ch_switch_req(_adapter *padapter, u8 *mac_addr); int issue_tdls_ch_switch_rsp(_adapter *padapter, u8 *mac_addr); sint On_TDLS_Dis_Rsp(_adapter *adapter, union recv_frame *precv_frame); sint On_TDLS_Setup_Req(_adapter *adapter, union recv_frame *precv_frame); int On_TDLS_Setup_Rsp(_adapter *adapter, union recv_frame *precv_frame); int On_TDLS_Setup_Cfm(_adapter *adapter, union recv_frame *precv_frame); int On_TDLS_Dis_Req(_adapter *adapter, union recv_frame *precv_frame); int On_TDLS_Teardown(_adapter *adapter, union recv_frame *precv_frame); int On_TDLS_Peer_Traffic_Indication(_adapter *adapter, union recv_frame *precv_frame); int On_TDLS_Peer_Traffic_Rsp(_adapter *adapter, union recv_frame *precv_frame); sint On_TDLS_Ch_Switch_Req(_adapter *adapter, union recv_frame *precv_frame); sint On_TDLS_Ch_Switch_Rsp(_adapter *adapter, union recv_frame *precv_frame); void rtw_build_tdls_setup_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); void rtw_build_tdls_setup_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); void rtw_build_tdls_setup_cfm_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); void rtw_build_tdls_teardown_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); void rtw_build_tdls_dis_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); void rtw_build_tdls_dis_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, u8 dialog, u8 privacy); void rtw_build_tdls_peer_traffic_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); void rtw_build_tdls_peer_traffic_indication_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); void rtw_build_tdls_ch_switch_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); void rtw_build_tdls_ch_switch_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); void rtw_build_tunneled_probe_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); void rtw_build_tunneled_probe_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); u8 update_sgi_tdls(_adapter *padapter, struct sta_info *psta); u32 update_mask_tdls(_adapter *padapter, struct sta_info *psta); #endif //CONFIG_TDLS #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_version.h000066400000000000000000000000561261122257400216550ustar00rootroot00000000000000#define DRIVERVERSION "v4.3.8_12175.20140902" rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_vht.h000066400000000000000000000201351261122257400207710ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTW_VHT_H_ #define _RTW_VHT_H_ #define LDPC_VHT_ENABLE_RX BIT0 #define LDPC_VHT_ENABLE_TX BIT1 #define LDPC_VHT_TEST_TX_ENABLE BIT2 #define LDPC_VHT_CAP_TX BIT3 #define STBC_VHT_ENABLE_RX BIT0 #define STBC_VHT_ENABLE_TX BIT1 #define STBC_VHT_TEST_TX_ENABLE BIT2 #define STBC_VHT_CAP_TX BIT3 #define BEAMFORMING_VHT_BEAMFORMER_ENABLE BIT0 // Declare our NIC supports beamformer #define BEAMFORMING_VHT_BEAMFORMEE_ENABLE BIT1 // Declare our NIC supports beamformee #define BEAMFORMING_VHT_BEAMFORMER_TEST BIT2 // Transmiting Beamforming no matter the target supports it or not //VHT capability info #define SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 2, _val) #define SET_VHT_CAPABILITY_ELE_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 2, 2, _val) #define SET_VHT_CAPABILITY_ELE_RX_LDPC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 4, 1, _val) #define SET_VHT_CAPABILITY_ELE_SHORT_GI80M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 5, 1, _val) #define SET_VHT_CAPABILITY_ELE_SHORT_GI160M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 6, 1, _val) #define SET_VHT_CAPABILITY_ELE_TX_STBC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 7, 1, _val) #define SET_VHT_CAPABILITY_ELE_RX_STBC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 0, 3, _val) #define SET_VHT_CAPABILITY_ELE_SU_BFER(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 3, 1, _val) #define SET_VHT_CAPABILITY_ELE_SU_BFEE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 4, 1, _val) #define SET_VHT_CAPABILITY_ELE_BFER_ANT_SUPP(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 5, 3, _val) #define SET_VHT_CAPABILITY_ELE_SOUNDING_DIMENSIONS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 0, 3, _val) #define SET_VHT_CAPABILITY_ELE_MU_BFER(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 3, 1, _val) #define SET_VHT_CAPABILITY_ELE_MU_BFEE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 4, 1, _val) #define SET_VHT_CAPABILITY_ELE_TXOP_PS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 5, 1, _val) #define SET_VHT_CAPABILITY_ELE_HTC_VHT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 6, 1, _val) #define SET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+2, 7, 3, _val) //B23~B25 #define SET_VHT_CAPABILITY_ELE_LINK_ADAPTION(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 2, 2, _val) #define SET_VHT_CAPABILITY_ELE_MCS_RX_MAP(_pEleStart, _val) SET_BITS_TO_LE_2BYTE_16BIT((_pEleStart)+4, 0, 16, _val) //B0~B15 indicate Rx MCS MAP, we write 0 to indicate MCS0~7. by page #define SET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+6, 0, 13, _val) #define SET_VHT_CAPABILITY_ELE_MCS_TX_MAP(_pEleStart, _val) SET_BITS_TO_LE_2BYTE_16BIT((_pEleStart)+8, 0, 16, _val) //B0~B15 indicate Tx MCS MAP, we write 0 to indicate MCS0~7. by page #define SET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+10, 0, 13, _val) #define GET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 2) #define GET_VHT_CAPABILITY_ELE_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 2, 2) #define GET_VHT_CAPABILITY_ELE_RX_LDPC(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 4, 1) #define GET_VHT_CAPABILITY_ELE_SHORT_GI80M(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 5, 1) #define GET_VHT_CAPABILITY_ELE_SHORT_GI160M(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 6, 1) #define GET_VHT_CAPABILITY_ELE_TX_STBC(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 7, 1) #define GET_VHT_CAPABILITY_ELE_RX_STBC(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 0, 3) #define GET_VHT_CAPABILITY_ELE_SU_BFER(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 3, 1) #define GET_VHT_CAPABILITY_ELE_SU_BFEE(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 4, 1) #define GET_VHT_CAPABILITY_ELE_TXOP_PS(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 5, 1) #define GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+2, 7, 3) #define GET_VHT_CAPABILITY_ELE_RX_MCS(_pEleStart) ((_pEleStart)+4) #define GET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+6, 0, 13) #define GET_VHT_CAPABILITY_ELE_TX_MCS(_pEleStart) ((_pEleStart)+8) #define GET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+10, 0, 13) //VHT Operation Information Element #define SET_VHT_OPERATION_ELE_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE_8BIT(_pEleStart, 0, 8, _val) #define SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(_pEleStart, _val) SET_BITS_TO_LE_1BYTE_8BIT(_pEleStart+1, 0, 8, _val) #define SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(_pEleStart, _val) SET_BITS_TO_LE_1BYTE_8BIT(_pEleStart+2, 0, 8, _val) #define SET_VHT_OPERATION_ELE_BASIC_MCS_SET(_pEleStart, _val) SET_BITS_TO_LE_2BYTE_16BIT((_pEleStart)+3, 0, 16, _val) #define GET_VHT_OPERATION_ELE_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart,0,8) #define GET_VHT_OPERATION_ELE_CENTER_FREQ1(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1,0,8) #define GET_VHT_OPERATION_ELE_CENTER_FREQ2(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2,0,8) //VHT Operating Mode #define SET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 2, _val) #define SET_VHT_OPERATING_MODE_FIELD_RX_NSS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 4, 3, _val) #define SET_VHT_OPERATING_MODE_FIELD_RX_NSS_TYPE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 7, 1, _val) #define GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 2) #define GET_VHT_OPERATING_MODE_FIELD_RX_NSS(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 4, 3) #define GET_VHT_OPERATING_MODE_FIELD_RX_NSS_TYPE(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 7, 1) #define SET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+7, 6, 1, _val) #define GET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+7, 6, 1) struct vht_priv { u8 vht_option; u8 ldpc_cap; u8 stbc_cap; u8 beamform_cap; u8 sgi_80m;//short GI u8 ampdu_len; u8 vht_op_mode_notify; u8 vht_highest_rate; u8 vht_mcs_map[2]; u8 vht_cap[32]; }; u8 rtw_get_vht_highest_rate(u8 *pvht_mcs_map); void rtw_get_vht_nss(u8 *pvht_mcs_map); u16 rtw_vht_mcs_to_data_rate(u8 bw, u8 short_GI, u8 vht_mcs_rate); u32 rtw_vht_rate_to_bitmap(u8 *pVHTRate); void rtw_vht_use_default_setting(_adapter *padapter); u32 rtw_build_vht_operation_ie(_adapter *padapter, u8 *pbuf, u8 channel); u32 rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw); u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf); void update_sta_vht_info_apmode(_adapter *padapter, PVOID psta); void update_hw_vht_param(_adapter *padapter); void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); void VHT_operation_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, PVOID sta); u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len); void VHTOnAssocRsp(_adapter *padapter); #endif //_RTW_VHT_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/rtw_xmit.h000066400000000000000000000505131261122257400211540ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTW_XMIT_H_ #define _RTW_XMIT_H_ #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) #ifdef CONFIG_TX_AGGREGATION #define MAX_XMITBUF_SZ (20480) // 20k //#define SDIO_TX_AGG_MAX 5 #else #define MAX_XMITBUF_SZ (1664) #define SDIO_TX_AGG_MAX 1 #endif #if defined CONFIG_SDIO_HCI #define NR_XMITBUFF (16) #endif #if defined(CONFIG_GSPI_HCI) #define NR_XMITBUFF (128) #endif #elif defined (CONFIG_USB_HCI) #ifdef CONFIG_USB_TX_AGGREGATION #if defined(CONFIG_PLATFORM_ARM_SUNxI) || defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) || defined(CONFIG_PLATFORM_ARM_SUN8I) #define MAX_XMITBUF_SZ (12288) //12k 1536*8 #elif defined (CONFIG_PLATFORM_MSTAR) #define MAX_XMITBUF_SZ 7680 // 7.5k #else #define MAX_XMITBUF_SZ (20480) // 20k #endif #else #define MAX_XMITBUF_SZ (2048) #endif #ifdef CONFIG_SINGLE_XMIT_BUF #define NR_XMITBUFF (1) #else #define NR_XMITBUFF (4) #endif //CONFIG_SINGLE_XMIT_BUF #elif defined (CONFIG_PCI_HCI) #define MAX_XMITBUF_SZ (1664) #define NR_XMITBUFF (128) #endif #ifdef PLATFORM_OS_CE #define XMITBUF_ALIGN_SZ 4 #else #ifdef CONFIG_PCI_HCI #define XMITBUF_ALIGN_SZ 4 #else #ifdef USB_XMITBUF_ALIGN_SZ #define XMITBUF_ALIGN_SZ (USB_XMITBUF_ALIGN_SZ) #else #define XMITBUF_ALIGN_SZ 512 #endif #endif #endif // xmit extension buff defination #define MAX_XMIT_EXTBUF_SZ (1536) #ifdef CONFIG_SINGLE_XMIT_BUF #define NR_XMIT_EXTBUFF (1) #else #define NR_XMIT_EXTBUFF (32) #endif #define MAX_CMDBUF_SZ (5120) //(4096) #define MAX_NUMBLKS (1) #define XMIT_VO_QUEUE (0) #define XMIT_VI_QUEUE (1) #define XMIT_BE_QUEUE (2) #define XMIT_BK_QUEUE (3) #define VO_QUEUE_INX 0 #define VI_QUEUE_INX 1 #define BE_QUEUE_INX 2 #define BK_QUEUE_INX 3 #define BCN_QUEUE_INX 4 #define MGT_QUEUE_INX 5 #define HIGH_QUEUE_INX 6 #define TXCMD_QUEUE_INX 7 #define HW_QUEUE_ENTRY 8 #ifdef CONFIG_PCI_HCI //#define TXDESC_NUM 64 #define TXDESC_NUM 128 #define TXDESC_NUM_BE_QUEUE 128 #endif #define WEP_IV(pattrib_iv, dot11txpn, keyidx)\ do{\ pattrib_iv[0] = dot11txpn._byte_.TSC0;\ pattrib_iv[1] = dot11txpn._byte_.TSC1;\ pattrib_iv[2] = dot11txpn._byte_.TSC2;\ pattrib_iv[3] = ((keyidx & 0x3)<<6);\ dot11txpn.val = (dot11txpn.val == 0xffffff) ? 0: (dot11txpn.val+1);\ }while(0) #define TKIP_IV(pattrib_iv, dot11txpn, keyidx)\ do{\ pattrib_iv[0] = dot11txpn._byte_.TSC1;\ pattrib_iv[1] = (dot11txpn._byte_.TSC1 | 0x20) & 0x7f;\ pattrib_iv[2] = dot11txpn._byte_.TSC0;\ pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\ pattrib_iv[4] = dot11txpn._byte_.TSC2;\ pattrib_iv[5] = dot11txpn._byte_.TSC3;\ pattrib_iv[6] = dot11txpn._byte_.TSC4;\ pattrib_iv[7] = dot11txpn._byte_.TSC5;\ dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0: (dot11txpn.val+1);\ }while(0) #define AES_IV(pattrib_iv, dot11txpn, keyidx)\ do{\ pattrib_iv[0] = dot11txpn._byte_.TSC0;\ pattrib_iv[1] = dot11txpn._byte_.TSC1;\ pattrib_iv[2] = 0;\ pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\ pattrib_iv[4] = dot11txpn._byte_.TSC2;\ pattrib_iv[5] = dot11txpn._byte_.TSC3;\ pattrib_iv[6] = dot11txpn._byte_.TSC4;\ pattrib_iv[7] = dot11txpn._byte_.TSC5;\ dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0: (dot11txpn.val+1);\ }while(0) #define HWXMIT_ENTRY 4 // For Buffer Descriptor ring architecture #ifdef BUF_DESC_ARCH #if defined (CONFIG_RTL8192E) #define TX_BUFFER_SEG_NUM 1 // 0:2 seg, 1: 4 seg, 2: 8 seg. #endif #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)|| defined(CONFIG_RTL8723B) #define TXDESC_SIZE 40 //8192EE_TODO #elif defined (CONFIG_RTL8192E) // this section is defined for buffer descriptor ring architecture #ifdef CONFIG_PCI_HCI #define TXDESC_SIZE ((TX_BUFFER_SEG_NUM ==0)?16: ((TX_BUFFER_SEG_NUM ==1)? 32:64) ) #define TX_WIFI_INFO_SIZE 40 #else //USB or SDIO #define TXDESC_SIZE 40 #endif //8192EE_TODO #else #define TXDESC_SIZE 32 #endif #ifdef CONFIG_TX_EARLY_MODE #define EARLY_MODE_INFO_SIZE 8 #endif #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) #define TXDESC_OFFSET TXDESC_SIZE #endif #ifdef CONFIG_USB_HCI #ifdef USB_PACKET_OFFSET_SZ #define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ) #else #define PACKET_OFFSET_SZ (8) #endif #define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ) #endif #ifdef CONFIG_PCI_HCI #if defined(CONFIG_RTL8192E) // this section is defined for buffer descriptor ring architecture #define TXDESC_OFFSET TX_WIFI_INFO_SIZE #else #define TXDESC_OFFSET 0 #endif #define TX_DESC_NEXT_DESC_OFFSET (TXDESC_SIZE + 8) #endif //CONFIG_PCI_HCI enum TXDESC_SC{ SC_DONT_CARE = 0x00, SC_UPPER= 0x01, SC_LOWER=0x02, SC_DUPLICATE=0x03 }; #ifdef CONFIG_PCI_HCI #define TXDESC_64_BYTES #elif defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8723B) #define TXDESC_40_BYTES #endif #if defined(CONFIG_RTL8192E) && defined(CONFIG_PCI_HCI) //8192ee //8192EE_TODO struct tx_desc { unsigned int txdw0; unsigned int txdw1; unsigned int txdw2; unsigned int txdw3; unsigned int txdw4; unsigned int txdw5; unsigned int txdw6; unsigned int txdw7; }; #else struct tx_desc { unsigned int txdw0; unsigned int txdw1; unsigned int txdw2; unsigned int txdw3; unsigned int txdw4; unsigned int txdw5; unsigned int txdw6; unsigned int txdw7; #if defined(TXDESC_40_BYTES) || defined(TXDESC_64_BYTES) unsigned int txdw8; unsigned int txdw9; #endif // TXDESC_40_BYTES #ifdef TXDESC_64_BYTES unsigned int txdw10; unsigned int txdw11; // 2008/05/15 MH Because PCIE HW memory R/W 4K limit. And now, our descriptor // size is 40 bytes. If you use more than 102 descriptor( 103*40>4096), HW will execute // memoryR/W CRC error. And then all DMA fetch will fail. We must decrease descriptor // number or enlarge descriptor size as 64 bytes. unsigned int txdw12; unsigned int txdw13; unsigned int txdw14; unsigned int txdw15; #endif }; #endif union txdesc { struct tx_desc txdesc; unsigned int value[TXDESC_SIZE>>2]; }; #ifdef CONFIG_PCI_HCI #define PCI_MAX_TX_QUEUE_COUNT 8 struct rtw_tx_ring { unsigned char qid; struct tx_desc *desc; dma_addr_t dma; unsigned int idx; unsigned int entries; _queue queue; u32 qlen; }; #endif struct hw_xmit { //_lock xmit_lock; //_list pending; _queue *sta_queue; //struct hw_txqueue *phwtxqueue; //sint txcmdcnt; int accnt; }; #if 0 struct pkt_attrib { u8 type; u8 subtype; u8 bswenc; u8 dhcp_pkt; u16 ether_type; int pktlen; //the original 802.3 pkt raw_data len (not include ether_hdr data) int pkt_hdrlen; //the original 802.3 pkt header len int hdrlen; //the WLAN Header Len int nr_frags; int last_txcmdsz; int encrypt; //when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith u8 iv[8]; int iv_len; u8 icv[8]; int icv_len; int priority; int ack_policy; int mac_id; int vcs_mode; //virtual carrier sense method u8 dst[ETH_ALEN]; u8 src[ETH_ALEN]; u8 ta[ETH_ALEN]; u8 ra[ETH_ALEN]; u8 key_idx; u8 qos_en; u8 ht_en; u8 raid;//rate adpative id u8 bwmode; u8 ch_offset;//PRIME_CHNL_OFFSET u8 sgi;//short GI u8 ampdu_en;//tx ampdu enable u8 mdata;//more data bit u8 eosp; u8 triggered;//for ap mode handling Power Saving sta u32 qsel; u16 seqnum; struct sta_info * psta; #ifdef CONFIG_TCP_CSUM_OFFLOAD_TX u8 hw_tcp_csum; #endif }; #else //reduce size struct pkt_attrib { u8 type; u8 subtype; u8 bswenc; u8 dhcp_pkt; u16 ether_type; u16 seqnum; u16 pkt_hdrlen; //the original 802.3 pkt header len u16 hdrlen; //the WLAN Header Len u32 pktlen; //the original 802.3 pkt raw_data len (not include ether_hdr data) u32 last_txcmdsz; u8 nr_frags; u8 encrypt; //when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith u8 iv_len; u8 icv_len; u8 iv[18]; u8 icv[16]; u8 priority; u8 ack_policy; u8 mac_id; u8 vcs_mode; //virtual carrier sense method u8 dst[ETH_ALEN]; u8 src[ETH_ALEN]; u8 ta[ETH_ALEN]; u8 ra[ETH_ALEN]; u8 key_idx; u8 qos_en; u8 ht_en; u8 raid;//rate adpative id u8 bwmode; u8 ch_offset;//PRIME_CHNL_OFFSET u8 sgi;//short GI u8 ampdu_en;//tx ampdu enable u8 ampdu_spacing; //ampdu_min_spacing for peer sta's rx u8 mdata;//more data bit u8 pctrl;//per packet txdesc control enable u8 triggered;//for ap mode handling Power Saving sta u8 qsel; u8 order;//order bit u8 eosp; u8 rate; u8 intel_proxim; u8 retry_ctrl; u8 mbssid; u8 ldpc; u8 stbc; struct sta_info * psta; #ifdef CONFIG_TCP_CSUM_OFFLOAD_TX u8 hw_tcp_csum; #endif u8 rtsen; u8 cts2self; union Keytype dot11tkiptxmickey; //union Keytype dot11tkiprxmickey; union Keytype dot118021x_UncstKey; #ifdef CONFIG_TDLS u8 direct_link; struct sta_info *ptdls_sta; #endif //CONFIG_TDLS u8 icmp_pkt; }; #endif #ifdef PLATFORM_FREEBSD #define ETH_ALEN 6 /* Octets in one ethernet addr */ #define ETH_HLEN 14 /* Total octets in header. */ #define ETH_P_IP 0x0800 /* Internet Protocol packet */ /*struct rtw_ieee80211_hdr { uint16_t frame_control; uint16_t duration_id; u8 addr1[6]; u8 addr2[6]; u8 addr3[6]; uint16_t seq_ctrl; u8 addr4[6]; } ;*/ #endif //PLATFORM_FREEBSD #define WLANHDR_OFFSET 64 #define NULL_FRAMETAG (0x0) #define DATA_FRAMETAG 0x01 #define L2_FRAMETAG 0x02 #define MGNT_FRAMETAG 0x03 #define AMSDU_FRAMETAG 0x04 #define EII_FRAMETAG 0x05 #define IEEE8023_FRAMETAG 0x06 #define MP_FRAMETAG 0x07 #define TXAGG_FRAMETAG 0x08 enum { XMITBUF_DATA = 0, XMITBUF_MGNT = 1, XMITBUF_CMD = 2, }; struct submit_ctx{ u32 submit_time; /* */ u32 timeout_ms; /* <0: not synchronous, 0: wait forever, >0: up to ms waiting */ int status; /* status for operation */ #ifdef PLATFORM_LINUX struct completion done; #endif }; enum { RTW_SCTX_SUBMITTED = -1, RTW_SCTX_DONE_SUCCESS = 0, RTW_SCTX_DONE_UNKNOWN, RTW_SCTX_DONE_TIMEOUT, RTW_SCTX_DONE_BUF_ALLOC, RTW_SCTX_DONE_BUF_FREE, RTW_SCTX_DONE_WRITE_PORT_ERR, RTW_SCTX_DONE_TX_DESC_NA, RTW_SCTX_DONE_TX_DENY, RTW_SCTX_DONE_CCX_PKT_FAIL, RTW_SCTX_DONE_DRV_STOP, RTW_SCTX_DONE_DEV_REMOVE, RTW_SCTX_DONE_CMD_ERROR, }; void rtw_sctx_init(struct submit_ctx *sctx, int timeout_ms); int rtw_sctx_wait(struct submit_ctx *sctx, const char *msg); void rtw_sctx_done_err(struct submit_ctx **sctx, int status); void rtw_sctx_done(struct submit_ctx **sctx); struct xmit_buf { _list list; _adapter *padapter; u8 *pallocated_buf; u8 *pbuf; void *priv_data; u16 buf_tag; // 0: Normal xmitbuf, 1: extension xmitbuf, 2:cmd xmitbuf u16 flags; u32 alloc_sz; u32 len; struct submit_ctx *sctx; #ifdef CONFIG_USB_HCI //u32 sz[8]; u32 ff_hwaddr; #if defined(PLATFORM_OS_XP)||defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) PURB pxmit_urb[8]; dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */ #endif #ifdef PLATFORM_OS_XP PIRP pxmit_irp[8]; #endif #ifdef PLATFORM_OS_CE USB_TRANSFER usb_transfer_write_port; #endif u8 bpending[8]; sint last[8]; #endif #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) u8 *phead; u8 *pdata; u8 *ptail; u8 *pend; u32 ff_hwaddr; u8 pg_num; u8 agg_num; #ifdef PLATFORM_OS_XP PMDL pxmitbuf_mdl; PIRP pxmitbuf_irp; PSDBUS_REQUEST_PACKET pxmitbuf_sdrp; #endif #endif #ifdef CONFIG_PCI_HCI struct tx_desc *desc; #endif #if defined(DBG_XMIT_BUF )|| defined(DBG_XMIT_BUF_EXT) u8 no; #endif }; struct xmit_frame { _list list; struct pkt_attrib attrib; _pkt *pkt; int frame_tag; _adapter *padapter; u8 *buf_addr; struct xmit_buf *pxmitbuf; #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) u8 pg_num; u8 agg_num; #endif #ifdef CONFIG_USB_HCI #ifdef CONFIG_USB_TX_AGGREGATION u8 agg_num; #endif s8 pkt_offset; #ifdef CONFIG_RTL8192D u8 EMPktNum; u16 EMPktLen[5];//The max value by HW #endif #endif #ifdef CONFIG_XMIT_ACK u8 ack_report; #endif u8 *alloc_addr; /* the actual address this xmitframe allocated */ u8 ext_tag; /* 0:data, 1:mgmt */ }; struct tx_servq { _list tx_pending; _queue sta_pending; int qcnt; }; struct sta_xmit_priv { _lock lock; sint option; sint apsd_setting; //When bit mask is on, the associated edca queue supports APSD. //struct tx_servq blk_q[MAX_NUMBLKS]; struct tx_servq be_q; //priority == 0,3 struct tx_servq bk_q; //priority == 1,2 struct tx_servq vi_q; //priority == 4,5 struct tx_servq vo_q; //priority == 6,7 _list legacy_dz; _list apsd; u16 txseq_tid[16]; //uint sta_tx_bytes; //u64 sta_tx_pkts; //uint sta_tx_fail; }; struct hw_txqueue { volatile sint head; volatile sint tail; volatile sint free_sz; //in units of 64 bytes volatile sint free_cmdsz; volatile sint txsz[8]; uint ff_hwaddr; uint cmd_hwaddr; sint ac_tag; }; struct agg_pkt_info{ u16 offset; u16 pkt_len; }; enum cmdbuf_type { CMDBUF_BEACON = 0x00, CMDBUF_RSVD, CMDBUF_MAX }; struct xmit_priv { _lock lock; _sema xmit_sema; _sema terminate_xmitthread_sema; //_queue blk_strms[MAX_NUMBLKS]; _queue be_pending; _queue bk_pending; _queue vi_pending; _queue vo_pending; _queue bm_pending; //_queue legacy_dz_queue; //_queue apsd_queue; u8 *pallocated_frame_buf; u8 *pxmit_frame_buf; uint free_xmitframe_cnt; _queue free_xmit_queue; //uint mapping_addr; //uint pkt_sz; u8 *xframe_ext_alloc_addr; u8 *xframe_ext; uint free_xframe_ext_cnt; _queue free_xframe_ext_queue; //struct hw_txqueue be_txqueue; //struct hw_txqueue bk_txqueue; //struct hw_txqueue vi_txqueue; //struct hw_txqueue vo_txqueue; //struct hw_txqueue bmc_txqueue; uint frag_len; _adapter *adapter; u8 vcs_setting; u8 vcs; u8 vcs_type; //u16 rts_thresh; u64 tx_bytes; u64 tx_pkts; u64 tx_drop; u64 last_tx_pkts; struct hw_xmit *hwxmits; u8 hwxmit_entry; u8 wmm_para_seq[4];//sequence for wmm ac parameter strength from large to small. it's value is 0->vo, 1->vi, 2->be, 3->bk. #ifdef CONFIG_USB_HCI _sema tx_retevt;//all tx return event; u8 txirp_cnt;// #ifdef PLATFORM_OS_CE USB_TRANSFER usb_transfer_write_port; // USB_TRANSFER usb_transfer_write_mem; #endif #ifdef PLATFORM_LINUX struct tasklet_struct xmit_tasklet; #endif #ifdef PLATFORM_FREEBSD struct task xmit_tasklet; #endif //per AC pending irp int beq_cnt; int bkq_cnt; int viq_cnt; int voq_cnt; #endif #ifdef CONFIG_PCI_HCI // Tx struct rtw_tx_ring tx_ring[PCI_MAX_TX_QUEUE_COUNT]; int txringcount[PCI_MAX_TX_QUEUE_COUNT]; u8 beaconDMAing; //flag of indicating beacon is transmiting to HW by DMA #ifdef PLATFORM_LINUX struct tasklet_struct xmit_tasklet; #endif #endif #if defined (CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) #ifdef CONFIG_SDIO_TX_TASKLET #ifdef PLATFORM_LINUX struct tasklet_struct xmit_tasklet; #endif /* PLATFORM_LINUX */ #else _thread_hdl_ SdioXmitThread; _sema SdioXmitSema; _sema SdioXmitTerminateSema; #endif /* CONFIG_SDIO_TX_TASKLET */ #endif /* CONFIG_SDIO_HCI */ _queue free_xmitbuf_queue; _queue pending_xmitbuf_queue; u8 *pallocated_xmitbuf; u8 *pxmitbuf; uint free_xmitbuf_cnt; _queue free_xmit_extbuf_queue; u8 *pallocated_xmit_extbuf; u8 *pxmit_extbuf; uint free_xmit_extbuf_cnt; struct xmit_buf pcmd_xmitbuf[CMDBUF_MAX]; u16 nqos_ssn; #ifdef CONFIG_TX_EARLY_MODE #ifdef CONFIG_SDIO_HCI #define MAX_AGG_PKT_NUM 20 #else #define MAX_AGG_PKT_NUM 256 //Max tx ampdu coounts #endif struct agg_pkt_info agg_pkt[MAX_AGG_PKT_NUM]; #endif #ifdef CONFIG_XMIT_ACK int ack_tx; _mutex ack_tx_mutex; struct submit_ctx ack_tx_ops; u8 seq_no; #endif _lock lock_sctx; }; extern struct xmit_frame *__rtw_alloc_cmdxmitframe(struct xmit_priv *pxmitpriv, enum cmdbuf_type buf_type); #define rtw_alloc_cmdxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_RSVD) #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_BEACON) extern struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv); extern s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); extern struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv); extern s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); void rtw_count_tx_stats(_adapter *padapter, struct xmit_frame *pxmitframe, int sz); extern void rtw_update_protection(_adapter *padapter, u8 *ie, uint ie_len); static s32 update_attrib_sec_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta); static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta); extern s32 rtw_make_wlanhdr(_adapter *padapter, u8 *hdr, struct pkt_attrib *pattrib); extern s32 rtw_put_snap(u8 *data, u16 h_proto); extern struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv); struct xmit_frame *rtw_alloc_xmitframe_ext(struct xmit_priv *pxmitpriv); struct xmit_frame *rtw_alloc_xmitframe_once(struct xmit_priv *pxmitpriv); extern s32 rtw_free_xmitframe(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe); extern void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, _queue *pframequeue); struct tx_servq *rtw_get_sta_pending(_adapter *padapter, struct sta_info *psta, sint up, u8 *ac); extern s32 rtw_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); extern struct xmit_frame* rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit_i, sint entry); extern s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe); extern u32 rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib); #define rtw_wlan_pkt_size(f) rtw_calculate_wlan_pkt_size_by_attribue(&f->attrib) extern s32 rtw_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe); #ifdef CONFIG_IEEE80211W extern s32 rtw_mgmt_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe); #endif //CONFIG_IEEE80211W #ifdef CONFIG_TDLS extern struct tdls_txmgmt *ptxmgmt; s32 rtw_xmit_tdls_coalesce(_adapter *padapter, struct xmit_frame *pxmitframe, struct tdls_txmgmt *ptxmgmt); s32 update_tdls_attrib(_adapter *padapter, struct pkt_attrib *pattrib); #endif s32 _rtw_init_hw_txqueue(struct hw_txqueue* phw_txqueue, u8 ac_tag); void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv); s32 rtw_txframes_pending(_adapter *padapter); s32 rtw_txframes_sta_ac_pending(_adapter *padapter, struct pkt_attrib *pattrib); void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry); s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter); void _rtw_free_xmit_priv (struct xmit_priv *pxmitpriv); void rtw_alloc_hwxmits(_adapter *padapter); void rtw_free_hwxmits(_adapter *padapter); s32 rtw_xmit(_adapter *padapter, _pkt **pkt); bool xmitframe_hiq_filter(struct xmit_frame *xmitframe); #if defined(CONFIG_AP_MODE) || defined(CONFIG_TDLS) sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe); void stop_sta_xmit(_adapter *padapter, struct sta_info *psta); void wakeup_sta_to_xmit(_adapter *padapter, struct sta_info *psta); void xmit_delivery_enabled_frames(_adapter *padapter, struct sta_info *psta); #endif u8 query_ra_short_GI(struct sta_info *psta); u8 qos_acm(u8 acm_mask, u8 priority); #ifdef CONFIG_XMIT_THREAD_MODE void enqueue_pending_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); void enqueue_pending_xmitbuf_to_head(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); struct xmit_buf* dequeue_pending_xmitbuf(struct xmit_priv *pxmitpriv); struct xmit_buf* dequeue_pending_xmitbuf_under_survey(struct xmit_priv *pxmitpriv); sint check_pending_xmitbuf(struct xmit_priv *pxmitpriv); thread_return rtw_xmit_thread(thread_context context); #endif static void do_queue_select(_adapter * padapter, struct pkt_attrib * pattrib); u32 rtw_get_ff_hwaddr(struct xmit_frame *pxmitframe); #ifdef CONFIG_XMIT_ACK int rtw_ack_tx_wait(struct xmit_priv *pxmitpriv, u32 timeout_ms); void rtw_ack_tx_done(struct xmit_priv *pxmitpriv, int status); #endif //CONFIG_XMIT_ACK //include after declaring struct xmit_buf, in order to avoid warning #include #endif //_RTL871X_XMIT_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/sdio_hal.h000066400000000000000000000027651261122257400210670ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __SDIO_HAL_H__ #define __SDIO_HAL_H__ extern u8 sd_hal_bus_init(PADAPTER padapter); extern u8 sd_hal_bus_deinit(PADAPTER padapter); u8 sd_int_isr(PADAPTER padapter); void sd_int_dpc(PADAPTER padapter); void rtw_set_hal_ops(_adapter *padapter); #ifdef CONFIG_RTL8723A void rtl8723as_set_hal_ops(PADAPTER padapter); #endif #ifdef CONFIG_RTL8188E void rtl8188es_set_hal_ops(PADAPTER padapter); #endif #ifdef CONFIG_RTL8723B void rtl8723bs_set_hal_ops(PADAPTER padapter); #endif #ifdef CONFIG_RTL8821A void rtl8821as_set_hal_ops(PADAPTER padapter); #endif #endif //__SDIO_HAL_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/sdio_ops.h000066400000000000000000000100401261122257400211050ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __SDIO_OPS_H__ #define __SDIO_OPS_H__ #ifdef PLATFORM_LINUX #include #endif #ifdef PLATFORM_WINDOWS #ifdef PLATFORM_OS_XP #include struct async_context { PMDL pmdl; PSDBUS_REQUEST_PACKET sdrp; unsigned char* r_buf; unsigned char* padapter; }; #endif #ifdef PLATFORM_OS_CE #include #endif #endif // PLATFORM_WINDOWS extern void sdio_set_intf_ops(_adapter *padapter,struct _io_ops *pops); //extern void sdio_func1cmd52_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem); //extern void sdio_func1cmd52_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem); extern u8 SdioLocalCmd52Read1Byte(PADAPTER padapter, u32 addr); extern void SdioLocalCmd52Write1Byte(PADAPTER padapter, u32 addr, u8 v); extern s32 _sdio_local_read(PADAPTER padapter, u32 addr, u32 cnt, u8 *pbuf); extern s32 sdio_local_read(PADAPTER padapter, u32 addr, u32 cnt, u8 *pbuf); extern s32 _sdio_local_write(PADAPTER padapter, u32 addr, u32 cnt, u8 *pbuf); extern s32 sdio_local_write(PADAPTER padapter, u32 addr, u32 cnt, u8 *pbuf); u32 _sdio_read32(PADAPTER padapter, u32 addr); s32 _sdio_write32(PADAPTER padapter, u32 addr, u32 val); extern void sd_int_hdl(PADAPTER padapter); extern u8 CheckIPSStatus(PADAPTER padapter); #ifdef CONFIG_RTL8723A extern void InitInterrupt8723ASdio(PADAPTER padapter); extern void InitSysInterrupt8723ASdio(PADAPTER padapter); extern void EnableInterrupt8723ASdio(PADAPTER padapter); extern void DisableInterrupt8723ASdio(PADAPTER padapter); extern u8 HalQueryTxBufferStatus8723ASdio(PADAPTER padapter); #endif // CONFIG_RTL8723A #ifdef CONFIG_RTL8188E extern void InitInterrupt8188ESdio(PADAPTER padapter); extern void EnableInterrupt8188ESdio(PADAPTER padapter); extern void DisableInterrupt8188ESdio(PADAPTER padapter); extern void UpdateInterruptMask8188ESdio(PADAPTER padapter, u32 AddMSR, u32 RemoveMSR); extern u8 HalQueryTxBufferStatus8189ESdio(PADAPTER padapter); extern u8 HalQueryTxOQTBufferStatus8189ESdio(PADAPTER padapter); extern void ClearInterrupt8188ESdio(PADAPTER padapter); #endif // CONFIG_RTL8188E #ifdef CONFIG_RTL8821A extern void InitInterrupt8821AS(PADAPTER padapter); extern void EnableInterrupt8821AS(PADAPTER padapter); extern void DisableInterrupt8821AS(PADAPTER padapter); extern u8 HalQueryTxBufferStatus8821AS(PADAPTER padapter); extern u8 HalQueryTxOQTBufferStatus8821ASdio(PADAPTER padapter); #endif // CONFIG_RTL8188E #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) extern u8 RecvOnePkt(PADAPTER padapter, u32 size); #endif // CONFIG_WOWLAN #ifdef CONFIG_RTL8723B extern void InitInterrupt8723BSdio(PADAPTER padapter); extern void InitSysInterrupt8723BSdio(PADAPTER padapter); extern void EnableInterrupt8723BSdio(PADAPTER padapter); extern void DisableInterrupt8723BSdio(PADAPTER padapter); extern u8 HalQueryTxBufferStatus8723BSdio(PADAPTER padapter); extern u8 HalQueryTxOQTBufferStatus8723BSdio(PADAPTER padapter); #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) extern void DisableInterruptButCpwm28723BSdio(PADAPTER padapter); extern void ClearInterrupt8723BSdio(PADAPTER padapter); #endif //CONFIG_WOWLAN #endif #endif // !__SDIO_OPS_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/sdio_ops_ce.h000066400000000000000000000041241261122257400215620ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _SDIO_OPS_WINCE_H_ #define _SDIO_OPS_WINCE_H_ #include #include #include #include #ifdef PLATFORM_OS_CE extern u8 sdbus_cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); extern void sdbus_cmd52w_ce(struct intf_priv *pintfpriv, u32 addr,u8 val8); uint sdbus_read_blocks_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); extern uint sdbus_read_bytes_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); extern uint sdbus_write_blocks_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf,u8 async); extern uint sdbus_write_bytes_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); extern u8 sdbus_func1cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); extern void sdbus_func1cmd52w_ce(struct intf_priv *pintfpriv, u32 addr, u8 val8); extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); extern void sdio_read_int(_adapter *padapter, u32 addr,u8 sz,void *pdata); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/sdio_ops_linux.h000066400000000000000000000047001261122257400223320ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __SDIO_OPS_LINUX_H__ #define __SDIO_OPS_LINUX_H__ #define SDIO_ERR_VAL8 0xEA #define SDIO_ERR_VAL16 0xEAEA #define SDIO_ERR_VAL32 0xEAEAEAEA u8 sd_f0_read8(struct intf_hdl *pintfhdl, u32 addr, s32 *err); void sd_f0_write8(struct intf_hdl *pintfhdl, u32 addr, u8 v, s32 *err); s32 _sd_cmd52_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pdata); s32 _sd_cmd52_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pdata); s32 sd_cmd52_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pdata); s32 sd_cmd52_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pdata); u8 _sd_read8(struct intf_hdl *pintfhdl, u32 addr, s32 *err); u8 sd_read8(struct intf_hdl *pintfhdl, u32 addr, s32 *err); u16 sd_read16(struct intf_hdl *pintfhdl, u32 addr, s32 *err); u32 _sd_read32(struct intf_hdl *pintfhdl, u32 addr, s32 *err); u32 sd_read32(struct intf_hdl *pintfhdl, u32 addr, s32 *err); s32 _sd_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata); s32 sd_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata); void sd_write8(struct intf_hdl *pintfhdl, u32 addr, u8 v, s32 *err); void sd_write16(struct intf_hdl *pintfhdl, u32 addr, u16 v, s32 *err); void _sd_write32(struct intf_hdl *pintfhdl, u32 addr, u32 v, s32 *err); void sd_write32(struct intf_hdl *pintfhdl, u32 addr, u32 v, s32 *err); s32 _sd_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata); s32 sd_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata); void rtw_sdio_set_irq_thd(struct dvobj_priv *dvobj, _thread_hdl_ thd_hdl); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/sdio_ops_xp.h000066400000000000000000000040511261122257400216210ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _SDIO_OPS_XP_H_ #define _SDIO_OPS_XP_H_ #include #include #include #include #ifdef PLATFORM_OS_XP extern u8 sdbus_cmd52r_xp(struct intf_priv *pintfpriv, u32 addr); extern void sdbus_cmd52w_xp(struct intf_priv *pintfpriv, u32 addr,u8 val8); uint sdbus_read_blocks_to_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); extern uint sdbus_read_bytes_to_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); extern uint sdbus_write_blocks_from_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf,u8 async); extern uint sdbus_write_bytes_from_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); extern u8 sdbus_func1cmd52r_xp(struct intf_priv *pintfpriv, u32 addr); extern void sdbus_func1cmd52w_xp(struct intf_priv *pintfpriv, u32 addr, u8 val8); extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); extern void sdio_read_int(_adapter *padapter, u32 addr,u8 sz,void *pdata); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/sdio_osintf.h000066400000000000000000000024531261122257400216170ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __SDIO_OSINTF_H__ #define __SDIO_OSINTF_H__ u8 sd_hal_bus_init(PADAPTER padapter); u8 sd_hal_bus_deinit(PADAPTER padapter); void sd_c2h_hdl(PADAPTER padapter); #ifdef PLATFORM_OS_CE extern NDIS_STATUS ce_sd_get_dev_hdl(PADAPTER padapter); SD_API_STATUS ce_sd_int_callback(SD_DEVICE_HANDLE hDevice, PADAPTER padapter); extern void sd_setup_irs(PADAPTER padapter); #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/sta_info.h000066400000000000000000000267161261122257400211110ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __STA_INFO_H_ #define __STA_INFO_H_ #define IBSS_START_MAC_ID 2 #define NUM_STA 32 #define NUM_ACL 16 //if mode ==0, then the sta is allowed once the addr is hit. //if mode ==1, then the sta is rejected once the addr is non-hit. struct rtw_wlan_acl_node { _list list; u8 addr[ETH_ALEN]; u8 valid; }; //mode=0, disable //mode=1, accept unless in deny list //mode=2, deny unless in accept list struct wlan_acl_pool { int mode; int num; struct rtw_wlan_acl_node aclnode[NUM_ACL]; _queue acl_node_q; }; typedef struct _RSSI_STA{ s32 UndecoratedSmoothedPWDB; s32 UndecoratedSmoothedCCK; s32 UndecoratedSmoothedOFDM; u64 PacketMap; u8 ValidBit; }RSSI_STA, *PRSSI_STA; struct stainfo_stats { u64 rx_mgnt_pkts; u64 rx_beacon_pkts; u64 rx_probereq_pkts; u64 rx_probersp_pkts; u64 rx_probersp_bm_pkts; u64 rx_probersp_uo_pkts; u64 rx_ctrl_pkts; u64 rx_data_pkts; u64 last_rx_mgnt_pkts; u64 last_rx_beacon_pkts; u64 last_rx_probereq_pkts; u64 last_rx_probersp_pkts; u64 last_rx_probersp_bm_pkts; u64 last_rx_probersp_uo_pkts; u64 last_rx_ctrl_pkts; u64 last_rx_data_pkts; u64 rx_bytes; u64 rx_drops; u64 tx_pkts; u64 tx_bytes; u64 tx_drops; }; #ifdef CONFIG_TDLS struct TDLS_PeerKey { u8 kck[16]; /* TPK-KCK */ u8 tk[16]; /* TPK-TK; only CCMP will be used */ } ; #endif //CONFIG_TDLS struct sta_info { _lock lock; _list list; //free_sta_queue _list hash_list; //sta_hash //_list asoc_list; //20061114 //_list sleep_list;//sleep_q //_list wakeup_list;//wakeup_q _adapter *padapter; struct sta_xmit_priv sta_xmitpriv; struct sta_recv_priv sta_recvpriv; _queue sleep_q; unsigned int sleepq_len; uint state; uint aid; uint mac_id; uint qos_option; u8 hwaddr[ETH_ALEN]; uint ieee8021x_blocked; //0: allowed, 1:blocked uint dot118021XPrivacy; //aes, tkip... union Keytype dot11tkiptxmickey; union Keytype dot11tkiprxmickey; union Keytype dot118021x_UncstKey; union pn48 dot11txpn; // PN48 used for Unicast xmit #ifdef CONFIG_GTK_OL u8 kek[RTW_KEK_LEN]; u8 kck[RTW_KCK_LEN]; u8 replay_ctr[RTW_REPLAY_CTR_LEN]; #endif //CONFIG_GTK_OL #ifdef CONFIG_IEEE80211W union pn48 dot11wtxpn; // PN48 used for Unicast mgmt xmit. #endif //CONFIG_IEEE80211W union pn48 dot11rxpn; // PN48 used for Unicast recv. u8 bssrateset[16]; u32 bssratelen; s32 rssi; s32 signal_quality; u8 cts2self; u8 rtsen; u8 raid; u8 init_rate; u32 ra_mask; u8 wireless_mode; // NETWORK_TYPE u8 bw_mode; u8 ldpc; u8 stbc; struct stainfo_stats sta_stats; #ifdef CONFIG_TDLS u32 tdls_sta_state; u8 dialog; u8 SNonce[32]; u8 ANonce[32]; u32 TDLS_PeerKey_Lifetime; u16 TPK_count; _timer TPK_timer; struct TDLS_PeerKey tpk; u16 stat_code; u8 off_ch; u16 ch_switch_time; u16 ch_switch_timeout; u8 option; _timer option_timer; _timer base_ch_timer; _timer off_ch_timer; _timer handshake_timer; u8 timer_flag; u8 alive_count; _timer pti_timer; u8 TDLS_RSNIE[20]; //Save peer's RSNIE, use for sending TDLS_SETUP_RSP #endif //CONFIG_TDLS //for A-MPDU TX, ADDBA timeout check _timer addba_retry_timer; //for A-MPDU Rx reordering buffer control struct recv_reorder_ctrl recvreorder_ctrl[16]; //for A-MPDU Tx //unsigned char ampdu_txen_bitmap; u16 BA_starting_seqctrl[16]; #ifdef CONFIG_80211N_HT struct ht_priv htpriv; #endif #ifdef CONFIG_80211AC_VHT struct vht_priv vhtpriv; #endif //Notes: //STA_Mode: //curr_network(mlme_priv/security_priv/qos/ht) + sta_info: (STA & AP) CAP/INFO //scan_q: AP CAP/INFO //AP_Mode: //curr_network(mlme_priv/security_priv/qos/ht) : AP CAP/INFO //sta_info: (AP & STA) CAP/INFO #ifdef CONFIG_AP_MODE _list asoc_list; _list auth_list; unsigned int expire_to; unsigned int auth_seq; unsigned int authalg; unsigned char chg_txt[128]; u16 capability; int flags; int dot8021xalg;//0:disable, 1:psk, 2:802.1x int wpa_psk;//0:disable, bit(0): WPA, bit(1):WPA2 int wpa_group_cipher; int wpa2_group_cipher; int wpa_pairwise_cipher; int wpa2_pairwise_cipher; u8 bpairwise_key_installed; #ifdef CONFIG_NATIVEAP_MLME u8 wpa_ie[32]; u8 nonerp_set; u8 no_short_slot_time_set; u8 no_short_preamble_set; u8 no_ht_gf_set; u8 no_ht_set; u8 ht_20mhz_set; #endif // CONFIG_NATIVEAP_MLME #ifdef CONFIG_ATMEL_RC_PATCH u8 flag_atmel_rc; #endif unsigned int tx_ra_bitmap; u8 qos_info; u8 max_sp_len; u8 uapsd_bk;//BIT(0): Delivery enabled, BIT(1): Trigger enabled u8 uapsd_be; u8 uapsd_vi; u8 uapsd_vo; u8 has_legacy_ac; unsigned int sleepq_ac_len; #ifdef CONFIG_P2P //p2p priv data u8 is_p2p_device; u8 p2p_status_code; //p2p client info u8 dev_addr[ETH_ALEN]; //u8 iface_addr[ETH_ALEN];//= hwaddr[ETH_ALEN] u8 dev_cap; u16 config_methods; u8 primary_dev_type[8]; u8 num_of_secdev_type; u8 secdev_types_list[32];// 32/8 == 4; u16 dev_name_len; u8 dev_name[32]; #endif //CONFIG_P2P #ifdef CONFIG_TX_MCAST2UNI u8 under_exist_checking; #endif // CONFIG_TX_MCAST2UNI u8 keep_alive_trycnt; #ifdef CONFIG_AUTO_AP_MODE u8 isrc; //this device is rc u16 pid; // pairing id #endif #endif // CONFIG_AP_MODE #ifdef CONFIG_IOCTL_CFG80211 u8 *passoc_req; u32 assoc_req_len; #endif //for DM RSSI_STA rssi_stat; //ODM_STA_INFO_T // ================ODM Relative Info======================= // Please be care, dont declare too much structure here. It will cost memory * STA support num. // // // 2011/10/20 MH Add for ODM STA info. // // Driver Write u8 bValid; // record the sta status link or not? //u8 WirelessMode; // u8 IOTPeer; // Enum value. HT_IOT_PEER_E // ODM Write //1 PHY_STATUS_INFO u8 RSSI_Path[4]; // u8 RSSI_Ave; u8 RXEVM[4]; u8 RXSNR[4]; u8 rssi_level; //for Refresh RA mask // ODM Write //1 TX_INFO (may changed by IC) //TX_INFO_T pTxInfo; // Define in IC folder. Move lower layer. // // ================ODM Relative Info======================= // /* To store the sequence number of received management frame */ u16 RxMgmtFrameSeqNum; }; #define sta_rx_pkts(sta) \ (sta->sta_stats.rx_mgnt_pkts \ + sta->sta_stats.rx_ctrl_pkts \ + sta->sta_stats.rx_data_pkts) #define sta_last_rx_pkts(sta) \ (sta->sta_stats.last_rx_mgnt_pkts \ + sta->sta_stats.last_rx_ctrl_pkts \ + sta->sta_stats.last_rx_data_pkts) #define sta_rx_data_pkts(sta) \ (sta->sta_stats.rx_data_pkts) #define sta_last_rx_data_pkts(sta) \ (sta->sta_stats.last_rx_data_pkts) #define sta_rx_mgnt_pkts(sta) \ (sta->sta_stats.rx_mgnt_pkts) #define sta_last_rx_mgnt_pkts(sta) \ (sta->sta_stats.last_rx_mgnt_pkts) #define sta_rx_beacon_pkts(sta) \ (sta->sta_stats.rx_beacon_pkts) #define sta_last_rx_beacon_pkts(sta) \ (sta->sta_stats.last_rx_beacon_pkts) #define sta_rx_probereq_pkts(sta) \ (sta->sta_stats.rx_probereq_pkts) #define sta_last_rx_probereq_pkts(sta) \ (sta->sta_stats.last_rx_probereq_pkts) #define sta_rx_probersp_pkts(sta) \ (sta->sta_stats.rx_probersp_pkts) #define sta_last_rx_probersp_pkts(sta) \ (sta->sta_stats.last_rx_probersp_pkts) #define sta_rx_probersp_bm_pkts(sta) \ (sta->sta_stats.rx_probersp_bm_pkts) #define sta_last_rx_probersp_bm_pkts(sta) \ (sta->sta_stats.last_rx_probersp_bm_pkts) #define sta_rx_probersp_uo_pkts(sta) \ (sta->sta_stats.rx_probersp_uo_pkts) #define sta_last_rx_probersp_uo_pkts(sta) \ (sta->sta_stats.last_rx_probersp_uo_pkts) #define sta_update_last_rx_pkts(sta) \ do { \ sta->sta_stats.last_rx_mgnt_pkts = sta->sta_stats.rx_mgnt_pkts; \ sta->sta_stats.last_rx_beacon_pkts = sta->sta_stats.rx_beacon_pkts; \ sta->sta_stats.last_rx_probereq_pkts = sta->sta_stats.rx_probereq_pkts; \ sta->sta_stats.last_rx_probersp_pkts = sta->sta_stats.rx_probersp_pkts; \ sta->sta_stats.last_rx_probersp_bm_pkts = sta->sta_stats.rx_probersp_bm_pkts; \ sta->sta_stats.last_rx_probersp_uo_pkts = sta->sta_stats.rx_probersp_uo_pkts; \ sta->sta_stats.last_rx_ctrl_pkts = sta->sta_stats.rx_ctrl_pkts; \ sta->sta_stats.last_rx_data_pkts = sta->sta_stats.rx_data_pkts; \ } while(0) #define STA_RX_PKTS_ARG(sta) \ sta->sta_stats.rx_mgnt_pkts \ , sta->sta_stats.rx_ctrl_pkts \ , sta->sta_stats.rx_data_pkts #define STA_LAST_RX_PKTS_ARG(sta) \ sta->sta_stats.last_rx_mgnt_pkts \ , sta->sta_stats.last_rx_ctrl_pkts \ , sta->sta_stats.last_rx_data_pkts #define STA_RX_PKTS_DIFF_ARG(sta) \ sta->sta_stats.rx_mgnt_pkts - sta->sta_stats.last_rx_mgnt_pkts \ , sta->sta_stats.rx_ctrl_pkts - sta->sta_stats.last_rx_ctrl_pkts \ , sta->sta_stats.rx_data_pkts -sta->sta_stats.last_rx_data_pkts #define STA_PKTS_FMT "(m:%llu, c:%llu, d:%llu)" struct sta_priv { u8 *pallocated_stainfo_buf; u8 *pstainfo_buf; _queue free_sta_queue; _lock sta_hash_lock; _list sta_hash[NUM_STA]; int asoc_sta_count; _queue sleep_q; _queue wakeup_q; _adapter *padapter; #ifdef CONFIG_AP_MODE _list asoc_list; _list auth_list; _lock asoc_list_lock; _lock auth_list_lock; u8 asoc_list_cnt; u8 auth_list_cnt; unsigned int auth_to; //sec, time to expire in authenticating. unsigned int assoc_to; //sec, time to expire before associating. unsigned int expire_to; //sec , time to expire after associated. /* pointers to STA info; based on allocated AID or NULL if AID free * AID is in the range 1-2007, so sta_aid[0] corresponders to AID 1 * and so on */ struct sta_info *sta_aid[NUM_STA]; u16 sta_dz_bitmap;//only support 15 stations, staion aid bitmap for sleeping sta. u16 tim_bitmap;//only support 15 stations, aid=0~15 mapping bit0~bit15 u16 max_num_sta; struct wlan_acl_pool acl_list; #endif #ifdef CONFIG_ATMEL_RC_PATCH u8 atmel_rc_pattern [6]; #endif }; __inline static u32 wifi_mac_hash(u8 *mac) { u32 x; x = mac[0]; x = (x << 2) ^ mac[1]; x = (x << 2) ^ mac[2]; x = (x << 2) ^ mac[3]; x = (x << 2) ^ mac[4]; x = (x << 2) ^ mac[5]; x ^= x >> 8; x = x & (NUM_STA - 1); return x; } extern u32 _rtw_init_sta_priv(struct sta_priv *pstapriv); extern u32 _rtw_free_sta_priv(struct sta_priv *pstapriv); #define stainfo_offset_valid(offset) (offset < NUM_STA && offset >= 0) int rtw_stainfo_offset(struct sta_priv *stapriv, struct sta_info *sta); struct sta_info *rtw_get_stainfo_by_offset(struct sta_priv *stapriv, int offset); extern struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr); extern u32 rtw_free_stainfo(_adapter *padapter , struct sta_info *psta); extern void rtw_free_all_stainfo(_adapter *padapter); extern struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr); extern u32 rtw_init_bcmc_stainfo(_adapter* padapter); extern struct sta_info* rtw_get_bcmc_stainfo(_adapter* padapter); extern u8 rtw_access_ctrl(_adapter *padapter, u8 *mac_addr); #endif //_STA_INFO_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/usb_hal.h000066400000000000000000000033201261122257400207060ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __USB_HAL_H__ #define __USB_HAL_H__ void rtw_set_hal_ops(_adapter *padapter); #ifdef CONFIG_RTL8192C void rtl8192cu_set_hal_ops(_adapter * padapter); #endif #ifdef CONFIG_RTL8192D void rtl8192du_set_hal_ops(_adapter * padapter); #endif #ifdef CONFIG_RTL8723A void rtl8723au_set_hal_ops(_adapter * padapter); #endif #ifdef CONFIG_RTL8188E void rtl8188eu_set_hal_ops(_adapter * padapter); #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) void rtl8812au_set_hal_ops(_adapter * padapter); #endif #ifdef CONFIG_RTL8192E void rtl8192eu_set_hal_ops(_adapter * padapter); #endif #ifdef CONFIG_RTL8723B void rtl8723bu_set_hal_ops(_adapter * padapter); #endif #ifdef CONFIG_INTEL_PROXIM extern _adapter *rtw_usb_get_sw_pointer(void); #endif //CONFIG_INTEL_PROXIM #endif //__USB_HAL_H__ rtl8812au-4.3.8.12175.20140902+dfsg/include/usb_ops.h000066400000000000000000000113471261122257400207530ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __USB_OPS_H_ #define __USB_OPS_H_ #define REALTEK_USB_VENQT_READ 0xC0 #define REALTEK_USB_VENQT_WRITE 0x40 #define REALTEK_USB_VENQT_CMD_REQ 0x05 #define REALTEK_USB_VENQT_CMD_IDX 0x00 enum{ VENDOR_WRITE = 0x00, VENDOR_READ = 0x01, }; #define ALIGNMENT_UNIT 16 #define MAX_VENDOR_REQ_CMD_SIZE 254 //8188cu SIE Support #define MAX_USB_IO_CTL_SIZE (MAX_VENDOR_REQ_CMD_SIZE +ALIGNMENT_UNIT) #ifdef PLATFORM_LINUX #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)) #define rtw_usb_control_msg(dev, pipe, request, requesttype, value, index, data, size, timeout_ms) \ usb_control_msg((dev), (pipe), (request), (requesttype), (value), (index), (data), (size), (timeout_ms)) #define rtw_usb_bulk_msg(usb_dev, pipe, data, len, actual_length, timeout_ms) \ usb_bulk_msg((usb_dev), (pipe), (data), (len), (actual_length), (timeout_ms)) #else #define rtw_usb_control_msg(dev, pipe, request, requesttype, value, index, data, size,timeout_ms) \ usb_control_msg((dev), (pipe), (request), (requesttype), (value), (index), (data), (size), \ ((timeout_ms) == 0) ||((timeout_ms)*HZ/1000>0)?((timeout_ms)*HZ/1000):1) #define rtw_usb_bulk_msg(usb_dev, pipe, data, len, actual_length, timeout_ms) \ usb_bulk_msg((usb_dev), (pipe), (data), (len), (actual_length), \ ((timeout_ms) == 0) ||((timeout_ms)*HZ/1000>0)?((timeout_ms)*HZ/1000):1) #endif #include #endif //PLATFORM_LINUX #ifdef CONFIG_RTL8192C void rtl8192cu_set_hw_type(_adapter *padapter); void rtl8192cu_set_intf_ops(struct _io_ops *pops); void rtl8192cu_recv_tasklet(void *priv); void rtl8192cu_xmit_tasklet(void *priv); #endif #ifdef CONFIG_RTL8723A void rtl8723au_set_hw_type(_adapter *padapter); void rtl8723au_set_intf_ops(struct _io_ops *pops); void rtl8192cu_recv_tasklet(void *priv); void rtl8192cu_xmit_tasklet(void *priv); #endif #ifdef CONFIG_RTL8192D void rtl8192du_set_hw_type(_adapter *padapter); void rtl8192du_set_intf_ops(struct _io_ops *pops); #ifndef PLATFORM_FREEBSD void rtl8192du_recv_tasklet(void *priv); #else // PLATFORM_FREEBSD void rtl8192du_recv_tasklet(void *priv, int npending); #ifdef CONFIG_RX_INDICATE_QUEUE void rtw_rx_indicate_tasklet(void *priv, int npending); #endif // CONFIG_RX_INDICATE_QUEUE #endif // PLATFORM_FREEBSD void rtl8192du_xmit_tasklet(void *priv); #endif #ifdef CONFIG_RTL8188E void rtl8188eu_set_hw_type(_adapter *padapter); void rtl8188eu_set_intf_ops(struct _io_ops *pops); #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) void rtl8812au_set_hw_type(_adapter *padapter); void rtl8812au_set_intf_ops(struct _io_ops *pops); #endif #ifdef CONFIG_RTL8192E void rtl8192eu_set_hw_type(_adapter *padapter); void rtl8192eu_set_intf_ops(struct _io_ops *pops); #endif #ifdef CONFIG_RTL8723B void rtl8723bu_set_hw_type(_adapter *padapter); void rtl8723bu_set_intf_ops(struct _io_ops *pops); void rtl8723bu_recv_tasklet(void *priv); void rtl8723bu_xmit_tasklet(void *priv); #endif enum RTW_USB_SPEED { RTW_USB_SPEED_UNKNOWN = 0, RTW_USB_SPEED_1_1 = 1, RTW_USB_SPEED_2 = 2, RTW_USB_SPEED_3 = 3, }; #define IS_FULL_SPEED_USB(Adapter) (adapter_to_dvobj(Adapter)->usb_speed == RTW_USB_SPEED_1_1) #define IS_HIGH_SPEED_USB(Adapter) (adapter_to_dvobj(Adapter)->usb_speed == RTW_USB_SPEED_2) #define IS_SUPER_SPEED_USB(Adapter) (adapter_to_dvobj(Adapter)->usb_speed == RTW_USB_SPEED_3) #define USB_SUPER_SPEED_BULK_SIZE 1024 // usb 3.0 #define USB_HIGH_SPEED_BULK_SIZE 512 // usb 2.0 #define USB_FULL_SPEED_BULK_SIZE 64 // usb 1.1 static inline u8 rtw_usb_bulk_size_boundary(_adapter * padapter,int buf_len) { u8 rst = _TRUE; if (IS_SUPER_SPEED_USB(padapter)) rst = (0 == (buf_len) % USB_SUPER_SPEED_BULK_SIZE)?_TRUE:_FALSE; if (IS_HIGH_SPEED_USB(padapter)) rst = (0 == (buf_len) % USB_HIGH_SPEED_BULK_SIZE)?_TRUE:_FALSE; else rst = (0 == (buf_len) % USB_FULL_SPEED_BULK_SIZE)?_TRUE:_FALSE; return rst; } #endif //__USB_OPS_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/usb_ops_linux.h000066400000000000000000000072531261122257400221730ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __USB_OPS_LINUX_H__ #define __USB_OPS_LINUX_H__ #define VENDOR_CMD_MAX_DATA_LEN 254 #define FW_START_ADDRESS 0x1000 #define RTW_USB_CONTROL_MSG_TIMEOUT_TEST 10//ms #define RTW_USB_CONTROL_MSG_TIMEOUT 500//ms #define RECV_BULK_IN_ADDR 0x80//assign by drv,not real address #define RECV_INT_IN_ADDR 0x81//assign by drv,not real address #if defined(CONFIG_VENDOR_REQ_RETRY) && defined(CONFIG_USB_VENDOR_REQ_MUTEX) /* vendor req retry should be in the situation when each vendor req is atomically submitted from others */ #define MAX_USBCTRL_VENDORREQ_TIMES 10 #else #define MAX_USBCTRL_VENDORREQ_TIMES 1 #endif #define RTW_USB_BULKOUT_TIMEOUT 5000//ms #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)) || (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18)) #define _usbctrl_vendorreq_async_callback(urb, regs) _usbctrl_vendorreq_async_callback(urb) #define usb_bulkout_zero_complete(purb, regs) usb_bulkout_zero_complete(purb) #define usb_write_mem_complete(purb, regs) usb_write_mem_complete(purb) #define usb_write_port_complete(purb, regs) usb_write_port_complete(purb) #define usb_read_port_complete(purb, regs) usb_read_port_complete(purb) #define usb_read_interrupt_complete(purb, regs) usb_read_interrupt_complete(purb) #endif #ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ int usb_async_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val); int usb_async_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val); int usb_async_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val); #endif /* CONFIG_USB_SUPPORT_ASYNC_VDN_REQ */ unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr); void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem); void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem); void usb_read_port_cancel(struct intf_hdl *pintfhdl); u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem); void usb_write_port_cancel(struct intf_hdl *pintfhdl); int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype); #ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ int _usbctrl_vendorreq_async_write(struct usb_device *udev, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype); #endif /* CONFIG_USB_SUPPORT_ASYNC_VDN_REQ */ u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr); u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr); u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr); int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val); int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val); int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val); int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata); u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem); void usb_recv_tasklet(void *priv); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/usb_osintf.h000066400000000000000000000024471261122257400214550ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __USB_OSINTF_H #define __USB_OSINTF_H #include #define USBD_HALTED(Status) ((ULONG)(Status) >> 30 == 3) //uint usb_dvobj_init(_adapter * adapter); //void usb_dvobj_deinit(_adapter * adapter); u8 usbvendorrequest(struct dvobj_priv *pdvobjpriv, RT_USB_BREQUEST brequest, RT_USB_WVALUE wvalue, u8 windex, void* data, u8 datalen, u8 isdirectionin); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/usb_vendor_req.h000066400000000000000000000043371261122257400223170ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _USB_VENDOR_REQUEST_H_ #define _USB_VENDOR_REQUEST_H_ //4 Set/Get Register related wIndex/Data #define RT_USB_RESET_MASK_OFF 0 #define RT_USB_RESET_MASK_ON 1 #define RT_USB_SLEEP_MASK_OFF 0 #define RT_USB_SLEEP_MASK_ON 1 #define RT_USB_LDO_ON 1 #define RT_USB_LDO_OFF 0 //4 Set/Get SYSCLK related wValue or Data #define RT_USB_SYSCLK_32KHZ 0 #define RT_USB_SYSCLK_40MHZ 1 #define RT_USB_SYSCLK_60MHZ 2 typedef enum _RT_USB_BREQUEST { RT_USB_SET_REGISTER = 1, RT_USB_SET_SYSCLK = 2, RT_USB_GET_SYSCLK = 3, RT_USB_GET_REGISTER = 4 } RT_USB_BREQUEST; typedef enum _RT_USB_WVALUE { RT_USB_RESET_MASK = 1, RT_USB_SLEEP_MASK = 2, RT_USB_USB_HRCPWM = 3, RT_USB_LDO = 4, RT_USB_BOOT_TYPE = 5 } RT_USB_WVALUE; //BOOLEAN usbvendorrequest(PCE_USB_DEVICE CEdevice, RT_USB_BREQUEST bRequest, RT_USB_WVALUE wValue, UCHAR wIndex, PVOID Data, UCHAR DataLength, BOOLEAN isDirectionIn); //BOOLEAN CEusbGetStatusRequest(PCE_USB_DEVICE CEdevice, IN USHORT Op, IN USHORT Index, PVOID Data); //BOOLEAN CEusbFeatureRequest(PCE_USB_DEVICE CEdevice, IN USHORT Op, IN USHORT FeatureSelector, IN USHORT Index); //BOOLEAN CEusbGetDescriptorRequest(PCE_USB_DEVICE CEdevice, IN short urbLength, IN UCHAR DescriptorType, IN UCHAR Index, IN USHORT LanguageId, IN PVOID TransferBuffer, IN ULONG TransferBufferLength); #endif rtl8812au-4.3.8.12175.20140902+dfsg/include/wifi.h000066400000000000000000001220121261122257400202270ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _WIFI_H_ #define _WIFI_H_ #ifdef BIT //#error "BIT define occurred earlier elsewhere!\n" #undef BIT #endif #define BIT(x) (1 << (x)) #define WLAN_ETHHDR_LEN 14 #define WLAN_ETHADDR_LEN 6 #define WLAN_IEEE_OUI_LEN 3 #define WLAN_ADDR_LEN 6 #define WLAN_CRC_LEN 4 #define WLAN_BSSID_LEN 6 #define WLAN_BSS_TS_LEN 8 #define WLAN_HDR_A3_LEN 24 #define WLAN_HDR_A4_LEN 30 #define WLAN_HDR_A3_QOS_LEN 26 #define WLAN_HDR_A4_QOS_LEN 32 #define WLAN_SSID_MAXLEN 32 #define WLAN_DATA_MAXLEN 2312 #define WLAN_A3_PN_OFFSET 24 #define WLAN_A4_PN_OFFSET 30 #define WLAN_MIN_ETHFRM_LEN 60 #define WLAN_MAX_ETHFRM_LEN 1514 #define WLAN_ETHHDR_LEN 14 #define WLAN_WMM_LEN 24 #define P80211CAPTURE_VERSION 0x80211001 // This value is tested by WiFi 11n Test Plan 5.2.3. // This test verifies the WLAN NIC can update the NAV through sending the CTS with large duration. #define WiFiNavUpperUs 30000 // 30 ms #ifdef GREEN_HILL #pragma pack(1) #endif enum WIFI_FRAME_TYPE { WIFI_MGT_TYPE = (0), WIFI_CTRL_TYPE = (BIT(2)), WIFI_DATA_TYPE = (BIT(3)), WIFI_QOS_DATA_TYPE = (BIT(7)|BIT(3)), //!< QoS Data }; enum WIFI_FRAME_SUBTYPE { // below is for mgt frame WIFI_ASSOCREQ = (0 | WIFI_MGT_TYPE), WIFI_ASSOCRSP = (BIT(4) | WIFI_MGT_TYPE), WIFI_REASSOCREQ = (BIT(5) | WIFI_MGT_TYPE), WIFI_REASSOCRSP = (BIT(5) | BIT(4) | WIFI_MGT_TYPE), WIFI_PROBEREQ = (BIT(6) | WIFI_MGT_TYPE), WIFI_PROBERSP = (BIT(6) | BIT(4) | WIFI_MGT_TYPE), WIFI_BEACON = (BIT(7) | WIFI_MGT_TYPE), WIFI_ATIM = (BIT(7) | BIT(4) | WIFI_MGT_TYPE), WIFI_DISASSOC = (BIT(7) | BIT(5) | WIFI_MGT_TYPE), WIFI_AUTH = (BIT(7) | BIT(5) | BIT(4) | WIFI_MGT_TYPE), WIFI_DEAUTH = (BIT(7) | BIT(6) | WIFI_MGT_TYPE), WIFI_ACTION = (BIT(7) | BIT(6) | BIT(4) | WIFI_MGT_TYPE), WIFI_ACTION_NOACK = (BIT(7) | BIT(6) | BIT(5) | WIFI_MGT_TYPE), // below is for control frame WIFI_NDPA = (BIT(6) | BIT(4) | WIFI_CTRL_TYPE), WIFI_PSPOLL = (BIT(7) | BIT(5) | WIFI_CTRL_TYPE), WIFI_RTS = (BIT(7) | BIT(5) | BIT(4) | WIFI_CTRL_TYPE), WIFI_CTS = (BIT(7) | BIT(6) | WIFI_CTRL_TYPE), WIFI_ACK = (BIT(7) | BIT(6) | BIT(4) | WIFI_CTRL_TYPE), WIFI_CFEND = (BIT(7) | BIT(6) | BIT(5) | WIFI_CTRL_TYPE), WIFI_CFEND_CFACK = (BIT(7) | BIT(6) | BIT(5) | BIT(4) | WIFI_CTRL_TYPE), // below is for data frame WIFI_DATA = (0 | WIFI_DATA_TYPE), WIFI_DATA_CFACK = (BIT(4) | WIFI_DATA_TYPE), WIFI_DATA_CFPOLL = (BIT(5) | WIFI_DATA_TYPE), WIFI_DATA_CFACKPOLL = (BIT(5) | BIT(4) | WIFI_DATA_TYPE), WIFI_DATA_NULL = (BIT(6) | WIFI_DATA_TYPE), WIFI_CF_ACK = (BIT(6) | BIT(4) | WIFI_DATA_TYPE), WIFI_CF_POLL = (BIT(6) | BIT(5) | WIFI_DATA_TYPE), WIFI_CF_ACKPOLL = (BIT(6) | BIT(5) | BIT(4) | WIFI_DATA_TYPE), WIFI_QOS_DATA_NULL = (BIT(6) | WIFI_QOS_DATA_TYPE), }; enum WIFI_REASON_CODE { _RSON_RESERVED_ = 0, _RSON_UNSPECIFIED_ = 1, _RSON_AUTH_NO_LONGER_VALID_ = 2, _RSON_DEAUTH_STA_LEAVING_ = 3, _RSON_INACTIVITY_ = 4, _RSON_UNABLE_HANDLE_ = 5, _RSON_CLS2_ = 6, _RSON_CLS3_ = 7, _RSON_DISAOC_STA_LEAVING_ = 8, _RSON_ASOC_NOT_AUTH_ = 9, // WPA reason _RSON_INVALID_IE_ = 13, _RSON_MIC_FAILURE_ = 14, _RSON_4WAY_HNDSHK_TIMEOUT_ = 15, _RSON_GROUP_KEY_UPDATE_TIMEOUT_ = 16, _RSON_DIFF_IE_ = 17, _RSON_MLTCST_CIPHER_NOT_VALID_ = 18, _RSON_UNICST_CIPHER_NOT_VALID_ = 19, _RSON_AKMP_NOT_VALID_ = 20, _RSON_UNSUPPORT_RSNE_VER_ = 21, _RSON_INVALID_RSNE_CAP_ = 22, _RSON_IEEE_802DOT1X_AUTH_FAIL_ = 23, //belowing are Realtek definition _RSON_PMK_NOT_AVAILABLE_ = 24, _RSON_TDLS_TEAR_TOOFAR_ = 25, _RSON_TDLS_TEAR_UN_RSN_ = 26, }; /* Reason codes (IEEE 802.11-2007, 7.3.1.7, Table 7-22) */ #if 0 #define WLAN_REASON_UNSPECIFIED 1 #define WLAN_REASON_PREV_AUTH_NOT_VALID 2 #define WLAN_REASON_DEAUTH_LEAVING 3 #define WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY 4 #define WLAN_REASON_DISASSOC_AP_BUSY 5 #define WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA 6 #define WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA 7 #define WLAN_REASON_DISASSOC_STA_HAS_LEFT 8 #define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9 #endif /* IEEE 802.11h */ #define WLAN_REASON_PWR_CAPABILITY_NOT_VALID 10 #define WLAN_REASON_SUPPORTED_CHANNEL_NOT_VALID 11 #if 0 /* IEEE 802.11i */ #define WLAN_REASON_INVALID_IE 13 #define WLAN_REASON_MICHAEL_MIC_FAILURE 14 #define WLAN_REASON_4WAY_HANDSHAKE_TIMEOUT 15 #define WLAN_REASON_GROUP_KEY_UPDATE_TIMEOUT 16 #define WLAN_REASON_IE_IN_4WAY_DIFFERS 17 #define WLAN_REASON_GROUP_CIPHER_NOT_VALID 18 #define WLAN_REASON_PAIRWISE_CIPHER_NOT_VALID 19 #define WLAN_REASON_AKMP_NOT_VALID 20 #define WLAN_REASON_UNSUPPORTED_RSN_IE_VERSION 21 #define WLAN_REASON_INVALID_RSN_IE_CAPAB 22 #define WLAN_REASON_IEEE_802_1X_AUTH_FAILED 23 #define WLAN_REASON_CIPHER_SUITE_REJECTED 24 #endif enum WIFI_STATUS_CODE { _STATS_SUCCESSFUL_ = 0, _STATS_FAILURE_ = 1, _STATS_CAP_FAIL_ = 10, _STATS_NO_ASOC_ = 11, _STATS_OTHER_ = 12, _STATS_NO_SUPP_ALG_ = 13, _STATS_OUT_OF_AUTH_SEQ_ = 14, _STATS_CHALLENGE_FAIL_ = 15, _STATS_AUTH_TIMEOUT_ = 16, _STATS_UNABLE_HANDLE_STA_ = 17, _STATS_RATE_FAIL_ = 18, }; /* Status codes (IEEE 802.11-2007, 7.3.1.9, Table 7-23) */ #if 0 #define WLAN_STATUS_SUCCESS 0 #define WLAN_STATUS_UNSPECIFIED_FAILURE 1 #define WLAN_STATUS_CAPS_UNSUPPORTED 10 #define WLAN_STATUS_REASSOC_NO_ASSOC 11 #define WLAN_STATUS_ASSOC_DENIED_UNSPEC 12 #define WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG 13 #define WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION 14 #define WLAN_STATUS_CHALLENGE_FAIL 15 #define WLAN_STATUS_AUTH_TIMEOUT 16 #define WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA 17 #define WLAN_STATUS_ASSOC_DENIED_RATES 18 #endif //entended /* IEEE 802.11b */ #define WLAN_STATUS_ASSOC_DENIED_NOSHORT 19 #define WLAN_STATUS_ASSOC_DENIED_NOPBCC 20 #define WLAN_STATUS_ASSOC_DENIED_NOAGILITY 21 /* IEEE 802.11h */ #define WLAN_STATUS_SPEC_MGMT_REQUIRED 22 #define WLAN_STATUS_PWR_CAPABILITY_NOT_VALID 23 #define WLAN_STATUS_SUPPORTED_CHANNEL_NOT_VALID 24 /* IEEE 802.11g */ #define WLAN_STATUS_ASSOC_DENIED_NO_SHORT_SLOT_TIME 25 #define WLAN_STATUS_ASSOC_DENIED_NO_ER_PBCC 26 #define WLAN_STATUS_ASSOC_DENIED_NO_DSSS_OFDM 27 /* IEEE 802.11w */ #define WLAN_STATUS_ASSOC_REJECTED_TEMPORARILY 30 #define WLAN_STATUS_ROBUST_MGMT_FRAME_POLICY_VIOLATION 31 /* IEEE 802.11i */ #define WLAN_STATUS_INVALID_IE 40 #define WLAN_STATUS_GROUP_CIPHER_NOT_VALID 41 #define WLAN_STATUS_PAIRWISE_CIPHER_NOT_VALID 42 #define WLAN_STATUS_AKMP_NOT_VALID 43 #define WLAN_STATUS_UNSUPPORTED_RSN_IE_VERSION 44 #define WLAN_STATUS_INVALID_RSN_IE_CAPAB 45 #define WLAN_STATUS_CIPHER_REJECTED_PER_POLICY 46 #define WLAN_STATUS_TS_NOT_CREATED 47 #define WLAN_STATUS_DIRECT_LINK_NOT_ALLOWED 48 #define WLAN_STATUS_DEST_STA_NOT_PRESENT 49 #define WLAN_STATUS_DEST_STA_NOT_QOS_STA 50 #define WLAN_STATUS_ASSOC_DENIED_LISTEN_INT_TOO_LARGE 51 /* IEEE 802.11r */ #define WLAN_STATUS_INVALID_FT_ACTION_FRAME_COUNT 52 #define WLAN_STATUS_INVALID_PMKID 53 #define WLAN_STATUS_INVALID_MDIE 54 #define WLAN_STATUS_INVALID_FTIE 55 enum WIFI_REG_DOMAIN { DOMAIN_FCC = 1, DOMAIN_IC = 2, DOMAIN_ETSI = 3, DOMAIN_SPAIN = 4, DOMAIN_FRANCE = 5, DOMAIN_MKK = 6, DOMAIN_ISRAEL = 7, DOMAIN_MKK1 = 8, DOMAIN_MKK2 = 9, DOMAIN_MKK3 = 10, DOMAIN_MAX }; #define _TO_DS_ BIT(8) #define _FROM_DS_ BIT(9) #define _MORE_FRAG_ BIT(10) #define _RETRY_ BIT(11) #define _PWRMGT_ BIT(12) #define _MORE_DATA_ BIT(13) #define _PRIVACY_ BIT(14) #define _ORDER_ BIT(15) #define SetToDs(pbuf) \ do { \ *(unsigned short *)(pbuf) |= cpu_to_le16(_TO_DS_); \ } while(0) #define GetToDs(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_TO_DS_)) != 0) #define ClearToDs(pbuf) \ do { \ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_TO_DS_)); \ } while(0) #define SetFrDs(pbuf) \ do { \ *(unsigned short *)(pbuf) |= cpu_to_le16(_FROM_DS_); \ } while(0) #define GetFrDs(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_FROM_DS_)) != 0) #define ClearFrDs(pbuf) \ do { \ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_FROM_DS_)); \ } while(0) #define get_tofr_ds(pframe) ((GetToDs(pframe) << 1) | GetFrDs(pframe)) #define SetMFrag(pbuf) \ do { \ *(unsigned short *)(pbuf) |= cpu_to_le16(_MORE_FRAG_); \ } while(0) #define GetMFrag(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_MORE_FRAG_)) != 0) #define ClearMFrag(pbuf) \ do { \ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_MORE_FRAG_)); \ } while(0) #define SetRetry(pbuf) \ do { \ *(unsigned short *)(pbuf) |= cpu_to_le16(_RETRY_); \ } while(0) #define GetRetry(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_RETRY_)) != 0) #define ClearRetry(pbuf) \ do { \ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_RETRY_)); \ } while(0) #define SetPwrMgt(pbuf) \ do { \ *(unsigned short *)(pbuf) |= cpu_to_le16(_PWRMGT_); \ } while(0) #define GetPwrMgt(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_PWRMGT_)) != 0) #define ClearPwrMgt(pbuf) \ do { \ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_PWRMGT_)); \ } while(0) #define SetMData(pbuf) \ do { \ *(unsigned short *)(pbuf) |= cpu_to_le16(_MORE_DATA_); \ } while(0) #define GetMData(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_MORE_DATA_)) != 0) #define ClearMData(pbuf) \ do { \ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_MORE_DATA_)); \ } while(0) #define SetPrivacy(pbuf) \ do { \ *(unsigned short *)(pbuf) |= cpu_to_le16(_PRIVACY_); \ } while(0) #define GetPrivacy(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_PRIVACY_)) != 0) #define ClearPrivacy(pbuf) \ do { \ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_PRIVACY_)); \ } while(0) #define GetOrder(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_ORDER_)) != 0) #define GetFrameType(pbuf) (le16_to_cpu(*(unsigned short *)(pbuf)) & (BIT(3) | BIT(2))) #define SetFrameType(pbuf,type) \ do { \ *(unsigned short *)(pbuf) &= __constant_cpu_to_le16(~(BIT(3) | BIT(2))); \ *(unsigned short *)(pbuf) |= __constant_cpu_to_le16(type); \ } while(0) #define GetFrameSubType(pbuf) (cpu_to_le16(*(unsigned short *)(pbuf)) & (BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2))) #define SetFrameSubType(pbuf,type) \ do { \ *(unsigned short *)(pbuf) &= cpu_to_le16(~(BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2))); \ *(unsigned short *)(pbuf) |= cpu_to_le16(type); \ } while(0) #define GetSequence(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) >> 4) #define GetFragNum(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) & 0x0f) #define GetTupleCache(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 22))) #define SetFragNum(pbuf, num) \ do { \ *(unsigned short *)((SIZE_PTR)(pbuf) + 22) = \ ((*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) & le16_to_cpu(~(0x000f))) | \ cpu_to_le16(0x0f & (num)); \ } while(0) #define SetSeqNum(pbuf, num) \ do { \ *(unsigned short *)((SIZE_PTR)(pbuf) + 22) = \ ((*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) & le16_to_cpu((unsigned short)~0xfff0)) | \ le16_to_cpu((unsigned short)(0xfff0 & (num << 4))); \ } while(0) #define SetDuration(pbuf, dur) \ do { \ *(unsigned short *)((SIZE_PTR)(pbuf) + 2) = cpu_to_le16(0xffff & (dur)); \ } while(0) #define SetPriority(pbuf, tid) \ do { \ *(unsigned short *)(pbuf) |= cpu_to_le16(tid & 0xf); \ } while(0) #define GetPriority(pbuf) ((le16_to_cpu(*(unsigned short *)(pbuf))) & 0xf) #define SetEOSP(pbuf, eosp) \ do { \ *(unsigned short *)(pbuf) |= cpu_to_le16( (eosp & 1) << 4); \ } while(0) #define SetAckpolicy(pbuf, ack) \ do { \ *(unsigned short *)(pbuf) |= cpu_to_le16( (ack & 3) << 5); \ } while(0) #define GetAckpolicy(pbuf) (((le16_to_cpu(*(unsigned short *)pbuf)) >> 5) & 0x3) #define GetAMsdu(pbuf) (((le16_to_cpu(*(unsigned short *)pbuf)) >> 7) & 0x1) #define SetAMsdu(pbuf, amsdu) \ do { \ *(unsigned short *)(pbuf) |= cpu_to_le16( (amsdu & 1) << 7); \ } while(0) #define GetAid(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 2)) & 0x3fff) #define GetTid(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + (((GetToDs(pbuf)<<1)|GetFrDs(pbuf))==3?30:24))) & 0x000f) #define GetAddr1Ptr(pbuf) ((unsigned char *)((SIZE_PTR)(pbuf) + 4)) #define GetAddr2Ptr(pbuf) ((unsigned char *)((SIZE_PTR)(pbuf) + 10)) #define GetAddr3Ptr(pbuf) ((unsigned char *)((SIZE_PTR)(pbuf) + 16)) #define GetAddr4Ptr(pbuf) ((unsigned char *)((SIZE_PTR)(pbuf) + 24)) #define MacAddr_isBcst(addr) \ ( \ ( (addr[0] == 0xff) && (addr[1] == 0xff) && \ (addr[2] == 0xff) && (addr[3] == 0xff) && \ (addr[4] == 0xff) && (addr[5] == 0xff) ) ? _TRUE : _FALSE \ ) __inline static int IS_MCAST(unsigned char *da) { if ((*da) & 0x01) return _TRUE; else return _FALSE; } __inline static unsigned char * get_ra(unsigned char *pframe) { unsigned char *ra; ra = GetAddr1Ptr(pframe); return ra; } __inline static unsigned char * get_ta(unsigned char *pframe) { unsigned char *ta; ta = GetAddr2Ptr(pframe); return ta; } __inline static unsigned char * get_da(unsigned char *pframe) { unsigned char *da; unsigned int to_fr_ds = (GetToDs(pframe) << 1) | GetFrDs(pframe); switch (to_fr_ds) { case 0x00: // ToDs=0, FromDs=0 da = GetAddr1Ptr(pframe); break; case 0x01: // ToDs=0, FromDs=1 da = GetAddr1Ptr(pframe); break; case 0x02: // ToDs=1, FromDs=0 da = GetAddr3Ptr(pframe); break; default: // ToDs=1, FromDs=1 da = GetAddr3Ptr(pframe); break; } return da; } __inline static unsigned char * get_sa(unsigned char *pframe) { unsigned char *sa; unsigned int to_fr_ds = (GetToDs(pframe) << 1) | GetFrDs(pframe); switch (to_fr_ds) { case 0x00: // ToDs=0, FromDs=0 sa = GetAddr2Ptr(pframe); break; case 0x01: // ToDs=0, FromDs=1 sa = GetAddr3Ptr(pframe); break; case 0x02: // ToDs=1, FromDs=0 sa = GetAddr2Ptr(pframe); break; default: // ToDs=1, FromDs=1 sa = GetAddr4Ptr(pframe); break; } return sa; } __inline static unsigned char * get_hdr_bssid(unsigned char *pframe) { unsigned char *sa = NULL; unsigned int to_fr_ds = (GetToDs(pframe) << 1) | GetFrDs(pframe); switch (to_fr_ds) { case 0x00: // ToDs=0, FromDs=0 sa = GetAddr3Ptr(pframe); break; case 0x01: // ToDs=0, FromDs=1 sa = GetAddr2Ptr(pframe); break; case 0x02: // ToDs=1, FromDs=0 sa = GetAddr1Ptr(pframe); break; case 0x03: // ToDs=1, FromDs=1 sa = GetAddr1Ptr(pframe); break; } return sa; } __inline static int IsFrameTypeCtrl(unsigned char *pframe) { if(WIFI_CTRL_TYPE == GetFrameType(pframe)) return _TRUE; else return _FALSE; } /*----------------------------------------------------------------------------- Below is for the security related definition ------------------------------------------------------------------------------*/ #define _RESERVED_FRAME_TYPE_ 0 #define _SKB_FRAME_TYPE_ 2 #define _PRE_ALLOCMEM_ 1 #define _PRE_ALLOCHDR_ 3 #define _PRE_ALLOCLLCHDR_ 4 #define _PRE_ALLOCICVHDR_ 5 #define _PRE_ALLOCMICHDR_ 6 #define _SIFSTIME_ ((priv->pmib->dot11BssType.net_work_type&WIRELESS_11A)?16:10) #define _ACKCTSLNG_ 14 //14 bytes long, including crclng #define _CRCLNG_ 4 #define _ASOCREQ_IE_OFFSET_ 4 // excluding wlan_hdr #define _ASOCRSP_IE_OFFSET_ 6 #define _REASOCREQ_IE_OFFSET_ 10 #define _REASOCRSP_IE_OFFSET_ 6 #define _PROBEREQ_IE_OFFSET_ 0 #define _PROBERSP_IE_OFFSET_ 12 #define _AUTH_IE_OFFSET_ 6 #define _DEAUTH_IE_OFFSET_ 0 #define _BEACON_IE_OFFSET_ 12 #define _PUBLIC_ACTION_IE_OFFSET_ 8 #define _FIXED_IE_LENGTH_ _BEACON_IE_OFFSET_ #define _SSID_IE_ 0 #define _SUPPORTEDRATES_IE_ 1 #define _DSSET_IE_ 3 #define _TIM_IE_ 5 #define _IBSS_PARA_IE_ 6 #define _COUNTRY_IE_ 7 #define _CHLGETXT_IE_ 16 #define _SUPPORTED_CH_IE_ 36 #define _CH_SWTICH_ANNOUNCE_ 37 //Secondary Channel Offset #define _RSN_IE_2_ 48 #define _SSN_IE_1_ 221 #define _ERPINFO_IE_ 42 #define _EXT_SUPPORTEDRATES_IE_ 50 #define _HT_CAPABILITY_IE_ 45 #define _FTIE_ 55 #define _TIMEOUT_ITVL_IE_ 56 #define _SRC_IE_ 59 #define _HT_EXTRA_INFO_IE_ 61 #define _HT_ADD_INFO_IE_ 61 //_HT_EXTRA_INFO_IE_ #define _WAPI_IE_ 68 //#define EID_BSSCoexistence 72 // 20/40 BSS Coexistence //#define EID_BSSIntolerantChlReport 73 #define _RIC_Descriptor_IE_ 75 #ifdef CONFIG_IEEE80211W #define _MME_IE_ 76 //802.11w Management MIC element #endif //CONFIG_IEEE80211W #define _LINK_ID_IE_ 101 #define _CH_SWITCH_TIMING_ 104 #define _PTI_BUFFER_STATUS_ 106 #define _EXT_CAP_IE_ 127 #define _VENDOR_SPECIFIC_IE_ 221 #define _RESERVED47_ 47 typedef enum _ELEMENT_ID{ EID_SsId = 0, /* service set identifier (0:32) */ EID_SupRates = 1, /* supported rates (1:8) */ EID_FHParms = 2, /* FH parameter set (5) */ EID_DSParms = 3, /* DS parameter set (1) */ EID_CFParms = 4, /* CF parameter set (6) */ EID_Tim = 5, /* Traffic Information Map (4:254) */ EID_IbssParms = 6, /* IBSS parameter set (2) */ EID_Country = 7, /* */ // Form 7.3.2: Information elements in 802.11E/D13.0, page 46. EID_QBSSLoad = 11, EID_EDCAParms = 12, EID_TSpec = 13, EID_TClass = 14, EID_Schedule = 15, // EID_Ctext = 16, /* challenge text*/ EID_POWER_CONSTRAINT = 32, /* Power Constraint*/ //vivi for WIFITest, 802.11h AP, 20100427 // 2010/12/26 MH The definition we can declare always!! EID_PowerCap = 33, EID_SupportedChannels = 36, EID_ChlSwitchAnnounce = 37, EID_MeasureRequest = 38, // Measurement Request EID_MeasureReport = 39, // Measurement Report EID_ERPInfo = 42, // Form 7.3.2: Information elements in 802.11E/D13.0, page 46. EID_TSDelay = 43, EID_TCLASProc = 44, EID_HTCapability = 45, EID_QoSCap = 46, // EID_WPA2 = 48, EID_ExtSupRates = 50, EID_FTIE = 55, // Defined in 802.11r EID_Timeout = 56, // Defined in 802.11r EID_SupRegulatory = 59, // Supported Requlatory Classes 802.11y EID_HTInfo = 61, EID_SecondaryChnlOffset = 62, EID_BSSCoexistence = 72, // 20/40 BSS Coexistence EID_BSSIntolerantChlReport = 73, EID_OBSS = 74, // Overlapping BSS Scan Parameters EID_LinkIdentifier = 101, // Defined in 802.11z EID_WakeupSchedule = 102, // Defined in 802.11z EID_ChnlSwitchTimeing = 104, // Defined in 802.11z EID_PTIControl = 105, // Defined in 802.11z EID_PUBufferStatus = 106, // Defined in 802.11z EID_EXTCapability = 127, // Extended Capabilities // From S19:Aironet IE and S21:AP IP address IE in CCX v1.13, p16 and p18. EID_Aironet = 133, // 0x85: Aironet Element for Cisco CCX EID_CiscoIP = 149, // 0x95: IP Address IE for Cisco CCX EID_CellPwr = 150, // 0x96: Cell Power Limit IE. Ref. 0x96. EID_CCKM = 156, EID_Vendor = 221, // 0xDD: Vendor Specific EID_WAPI = 68, EID_VHTCapability = 191, // Based on 802.11ac D2.0 EID_VHTOperation = 192, // Based on 802.11ac D2.0 EID_OpModeNotification = 199, // Based on 802.11ac D3.0 }ELEMENT_ID, *PELEMENT_ID; /* --------------------------------------------------------------------------- Below is the fixed elements... -----------------------------------------------------------------------------*/ #define _AUTH_ALGM_NUM_ 2 #define _AUTH_SEQ_NUM_ 2 #define _BEACON_ITERVAL_ 2 #define _CAPABILITY_ 2 #define _CURRENT_APADDR_ 6 #define _LISTEN_INTERVAL_ 2 #define _RSON_CODE_ 2 #define _ASOC_ID_ 2 #define _STATUS_CODE_ 2 #define _TIMESTAMP_ 8 #define AUTH_ODD_TO 0 #define AUTH_EVEN_TO 1 #define WLAN_ETHCONV_ENCAP 1 #define WLAN_ETHCONV_RFC1042 2 #define WLAN_ETHCONV_8021h 3 #define cap_ESS BIT(0) #define cap_IBSS BIT(1) #define cap_CFPollable BIT(2) #define cap_CFRequest BIT(3) #define cap_Privacy BIT(4) #define cap_ShortPremble BIT(5) #define cap_PBCC BIT(6) #define cap_ChAgility BIT(7) #define cap_SpecMgmt BIT(8) #define cap_QoS BIT(9) #define cap_ShortSlot BIT(10) /*----------------------------------------------------------------------------- Below is the definition for 802.11i / 802.1x ------------------------------------------------------------------------------*/ #define _IEEE8021X_MGT_ 1 // WPA #define _IEEE8021X_PSK_ 2 // WPA with pre-shared key /* #define _NO_PRIVACY_ 0 #define _WEP_40_PRIVACY_ 1 #define _TKIP_PRIVACY_ 2 #define _WRAP_PRIVACY_ 3 #define _CCMP_PRIVACY_ 4 #define _WEP_104_PRIVACY_ 5 #define _WEP_WPA_MIXED_PRIVACY_ 6 // WEP + WPA */ #ifdef CONFIG_IEEE80211W #define _MME_IE_LENGTH_ 18 #endif //CONFIG_IEEE80211W /*----------------------------------------------------------------------------- Below is the definition for WMM ------------------------------------------------------------------------------*/ #define _WMM_IE_Length_ 7 // for WMM STA #define _WMM_Para_Element_Length_ 24 /*----------------------------------------------------------------------------- Below is the definition for 802.11n ------------------------------------------------------------------------------*/ //#ifdef CONFIG_80211N_HT #define SetOrderBit(pbuf) \ do { \ *(unsigned short *)(pbuf) |= cpu_to_le16(_ORDER_); \ } while(0) #define GetOrderBit(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_ORDER_)) != 0) #define ACT_CAT_VENDOR 0x7F/* 127 */ /** * struct rtw_ieee80211_bar - HT Block Ack Request * * This structure refers to "HT BlockAckReq" as * described in 802.11n draft section 7.2.1.7.1 */ #if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8712FW) struct rtw_ieee80211_bar { unsigned short frame_control; unsigned short duration; unsigned char ra[6]; unsigned char ta[6]; unsigned short control; unsigned short start_seq_num; } __attribute__((packed)); #endif /* 802.11 BAR control masks */ #define IEEE80211_BAR_CTRL_ACK_POLICY_NORMAL 0x0000 #define IEEE80211_BAR_CTRL_CBMTID_COMPRESSED_BA 0x0004 #if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8712FW) || defined(PLATFORM_FREEBSD) /** * struct rtw_ieee80211_ht_cap - HT capabilities * * This structure refers to "HT capabilities element" as * described in 802.11n draft section 7.3.2.52 */ struct rtw_ieee80211_ht_cap { unsigned short cap_info; unsigned char ampdu_params_info; unsigned char supp_mcs_set[16]; unsigned short extended_ht_cap_info; unsigned int tx_BF_cap_info; unsigned char antenna_selection_info; } __attribute__ ((packed)); /** * struct rtw_ieee80211_ht_cap - HT additional information * * This structure refers to "HT information element" as * described in 802.11n draft section 7.3.2.53 */ struct ieee80211_ht_addt_info { unsigned char control_chan; unsigned char ht_param; unsigned short operation_mode; unsigned short stbc_param; unsigned char basic_set[16]; } __attribute__ ((packed)); struct HT_caps_element { union { struct { unsigned short HT_caps_info; unsigned char AMPDU_para; unsigned char MCS_rate[16]; unsigned short HT_ext_caps; unsigned int Beamforming_caps; unsigned char ASEL_caps; } HT_cap_element; unsigned char HT_cap[26]; }u; } __attribute__ ((packed)); struct HT_info_element { unsigned char primary_channel; unsigned char infos[5]; unsigned char MCS_rate[16]; } __attribute__ ((packed)); struct AC_param { unsigned char ACI_AIFSN; unsigned char CW; unsigned short TXOP_limit; } __attribute__ ((packed)); struct WMM_para_element { unsigned char QoS_info; unsigned char reserved; struct AC_param ac_param[4]; } __attribute__ ((packed)); struct ADDBA_request { unsigned char dialog_token; unsigned short BA_para_set; unsigned short BA_timeout_value; unsigned short BA_starting_seqctrl; } __attribute__ ((packed)); #endif #ifdef PLATFORM_WINDOWS #pragma pack(1) struct rtw_ieee80211_ht_cap { unsigned short cap_info; unsigned char ampdu_params_info; unsigned char supp_mcs_set[16]; unsigned short extended_ht_cap_info; unsigned int tx_BF_cap_info; unsigned char antenna_selection_info; }; struct ieee80211_ht_addt_info { unsigned char control_chan; unsigned char ht_param; unsigned short operation_mode; unsigned short stbc_param; unsigned char basic_set[16]; }; struct HT_caps_element { union { struct { unsigned short HT_caps_info; unsigned char AMPDU_para; unsigned char MCS_rate[16]; unsigned short HT_ext_caps; unsigned int Beamforming_caps; unsigned char ASEL_caps; } HT_cap_element; unsigned char HT_cap[26]; }; }; struct HT_info_element { unsigned char primary_channel; unsigned char infos[5]; unsigned char MCS_rate[16]; }; struct AC_param { unsigned char ACI_AIFSN; unsigned char CW; unsigned short TXOP_limit; }; struct WMM_para_element { unsigned char QoS_info; unsigned char reserved; struct AC_param ac_param[4]; }; struct ADDBA_request { unsigned char dialog_token; unsigned short BA_para_set; unsigned short BA_timeout_value; unsigned short BA_starting_seqctrl; }; #pragma pack() #endif typedef enum _HT_CAP_AMPDU_FACTOR { MAX_AMPDU_FACTOR_8K = 0, MAX_AMPDU_FACTOR_16K = 1, MAX_AMPDU_FACTOR_32K = 2, MAX_AMPDU_FACTOR_64K = 3, }HT_CAP_AMPDU_FACTOR; /* 802.11n HT capabilities masks */ #define IEEE80211_HT_CAP_LDPC_CODING 0x0001 #define IEEE80211_HT_CAP_SUP_WIDTH 0x0002 #define IEEE80211_HT_CAP_SM_PS 0x000C #define IEEE80211_HT_CAP_GRN_FLD 0x0010 #define IEEE80211_HT_CAP_SGI_20 0x0020 #define IEEE80211_HT_CAP_SGI_40 0x0040 #define IEEE80211_HT_CAP_TX_STBC 0x0080 #define IEEE80211_HT_CAP_RX_STBC_1R 0x0100 #define IEEE80211_HT_CAP_RX_STBC_2R 0x0200 #define IEEE80211_HT_CAP_RX_STBC_3R 0x0300 #define IEEE80211_HT_CAP_DELAY_BA 0x0400 #define IEEE80211_HT_CAP_MAX_AMSDU 0x0800 #define IEEE80211_HT_CAP_DSSSCCK40 0x1000 /* 802.11n HT capability AMPDU settings */ #define IEEE80211_HT_CAP_AMPDU_FACTOR 0x03 #define IEEE80211_HT_CAP_AMPDU_DENSITY 0x1C /* 802.11n HT capability MSC set */ #define IEEE80211_SUPP_MCS_SET_UEQM 4 #define IEEE80211_HT_CAP_MAX_STREAMS 4 #define IEEE80211_SUPP_MCS_SET_LEN 10 /* maximum streams the spec allows */ #define IEEE80211_HT_CAP_MCS_TX_DEFINED 0x01 #define IEEE80211_HT_CAP_MCS_TX_RX_DIFF 0x02 #define IEEE80211_HT_CAP_MCS_TX_STREAMS 0x0C #define IEEE80211_HT_CAP_MCS_TX_UEQM 0x10 /* 802.11n HT capability TXBF capability */ #define IEEE80211_HT_CAP_TXBF_RX_NDP 0x00000008 #define IEEE80211_HT_CAP_TXBF_TX_NDP 0x00000010 #define IEEE80211_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP 0x00000400 /* 802.11n HT IE masks */ #define IEEE80211_HT_IE_CHA_SEC_OFFSET 0x03 #define IEEE80211_HT_IE_CHA_SEC_NONE 0x00 #define IEEE80211_HT_IE_CHA_SEC_ABOVE 0x01 #define IEEE80211_HT_IE_CHA_SEC_BELOW 0x03 #define IEEE80211_HT_IE_CHA_WIDTH 0x04 #define IEEE80211_HT_IE_HT_PROTECTION 0x0003 #define IEEE80211_HT_IE_NON_GF_STA_PRSNT 0x0004 #define IEEE80211_HT_IE_NON_HT_STA_PRSNT 0x0010 /* block-ack parameters */ #define IEEE80211_ADDBA_PARAM_POLICY_MASK 0x0002 #define IEEE80211_ADDBA_PARAM_TID_MASK 0x003C #define RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK 0xFFC0 #define IEEE80211_DELBA_PARAM_TID_MASK 0xF000 #define IEEE80211_DELBA_PARAM_INITIATOR_MASK 0x0800 /* * A-PMDU buffer sizes * According to IEEE802.11n spec size varies from 8K to 64K (in powers of 2) */ #define IEEE80211_MIN_AMPDU_BUF 0x8 #define IEEE80211_MAX_AMPDU_BUF 0x40 /* Spatial Multiplexing Power Save Modes */ #define WLAN_HT_CAP_SM_PS_STATIC 0 #define WLAN_HT_CAP_SM_PS_DYNAMIC 1 #define WLAN_HT_CAP_SM_PS_INVALID 2 #define WLAN_HT_CAP_SM_PS_DISABLED 3 #define OP_MODE_PURE 0 #define OP_MODE_MAY_BE_LEGACY_STAS 1 #define OP_MODE_20MHZ_HT_STA_ASSOCED 2 #define OP_MODE_MIXED 3 #define HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK ((u8) BIT(0) | BIT(1)) #define HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE ((u8) BIT(0)) #define HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW ((u8) BIT(0) | BIT(1)) #define HT_INFO_HT_PARAM_REC_TRANS_CHNL_WIDTH ((u8) BIT(2)) #define HT_INFO_HT_PARAM_RIFS_MODE ((u8) BIT(3)) #define HT_INFO_HT_PARAM_CTRL_ACCESS_ONLY ((u8) BIT(4)) #define HT_INFO_HT_PARAM_SRV_INTERVAL_GRANULARITY ((u8) BIT(5)) #define HT_INFO_OPERATION_MODE_OP_MODE_MASK \ ((u16) (0x0001 | 0x0002)) #define HT_INFO_OPERATION_MODE_OP_MODE_OFFSET 0 #define HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT ((u8) BIT(2)) #define HT_INFO_OPERATION_MODE_TRANSMIT_BURST_LIMIT ((u8) BIT(3)) #define HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT ((u8) BIT(4)) #define HT_INFO_STBC_PARAM_DUAL_BEACON ((u16) BIT(6)) #define HT_INFO_STBC_PARAM_DUAL_STBC_PROTECT ((u16) BIT(7)) #define HT_INFO_STBC_PARAM_SECONDARY_BCN ((u16) BIT(8)) #define HT_INFO_STBC_PARAM_LSIG_TXOP_PROTECT_ALLOWED ((u16) BIT(9)) #define HT_INFO_STBC_PARAM_PCO_ACTIVE ((u16) BIT(10)) #define HT_INFO_STBC_PARAM_PCO_PHASE ((u16) BIT(11)) //#endif // ===============WPS Section=============== // For WPSv1.0 #define WPSOUI 0x0050f204 // WPS attribute ID #define WPS_ATTR_VER1 0x104A #define WPS_ATTR_SIMPLE_CONF_STATE 0x1044 #define WPS_ATTR_RESP_TYPE 0x103B #define WPS_ATTR_UUID_E 0x1047 #define WPS_ATTR_MANUFACTURER 0x1021 #define WPS_ATTR_MODEL_NAME 0x1023 #define WPS_ATTR_MODEL_NUMBER 0x1024 #define WPS_ATTR_SERIAL_NUMBER 0x1042 #define WPS_ATTR_PRIMARY_DEV_TYPE 0x1054 #define WPS_ATTR_SEC_DEV_TYPE_LIST 0x1055 #define WPS_ATTR_DEVICE_NAME 0x1011 #define WPS_ATTR_CONF_METHOD 0x1008 #define WPS_ATTR_RF_BANDS 0x103C #define WPS_ATTR_DEVICE_PWID 0x1012 #define WPS_ATTR_REQUEST_TYPE 0x103A #define WPS_ATTR_ASSOCIATION_STATE 0x1002 #define WPS_ATTR_CONFIG_ERROR 0x1009 #define WPS_ATTR_VENDOR_EXT 0x1049 #define WPS_ATTR_SELECTED_REGISTRAR 0x1041 // Value of WPS attribute "WPS_ATTR_DEVICE_NAME #define WPS_MAX_DEVICE_NAME_LEN 32 // Value of WPS Request Type Attribute #define WPS_REQ_TYPE_ENROLLEE_INFO_ONLY 0x00 #define WPS_REQ_TYPE_ENROLLEE_OPEN_8021X 0x01 #define WPS_REQ_TYPE_REGISTRAR 0x02 #define WPS_REQ_TYPE_WLAN_MANAGER_REGISTRAR 0x03 // Value of WPS Response Type Attribute #define WPS_RESPONSE_TYPE_INFO_ONLY 0x00 #define WPS_RESPONSE_TYPE_8021X 0x01 #define WPS_RESPONSE_TYPE_REGISTRAR 0x02 #define WPS_RESPONSE_TYPE_AP 0x03 // Value of WPS WiFi Simple Configuration State Attribute #define WPS_WSC_STATE_NOT_CONFIG 0x01 #define WPS_WSC_STATE_CONFIG 0x02 // Value of WPS Version Attribute #define WPS_VERSION_1 0x10 // Value of WPS Configuration Method Attribute #define WPS_CONFIG_METHOD_FLASH 0x0001 #define WPS_CONFIG_METHOD_ETHERNET 0x0002 #define WPS_CONFIG_METHOD_LABEL 0x0004 #define WPS_CONFIG_METHOD_DISPLAY 0x0008 #define WPS_CONFIG_METHOD_E_NFC 0x0010 #define WPS_CONFIG_METHOD_I_NFC 0x0020 #define WPS_CONFIG_METHOD_NFC 0x0040 #define WPS_CONFIG_METHOD_PBC 0x0080 #define WPS_CONFIG_METHOD_KEYPAD 0x0100 #define WPS_CONFIG_METHOD_VPBC 0x0280 #define WPS_CONFIG_METHOD_PPBC 0x0480 #define WPS_CONFIG_METHOD_VDISPLAY 0x2008 #define WPS_CONFIG_METHOD_PDISPLAY 0x4008 // Value of Category ID of WPS Primary Device Type Attribute #define WPS_PDT_CID_DISPLAYS 0x0007 #define WPS_PDT_CID_MULIT_MEDIA 0x0008 #define WPS_PDT_CID_RTK_WIDI WPS_PDT_CID_MULIT_MEDIA // Value of Sub Category ID of WPS Primary Device Type Attribute #define WPS_PDT_SCID_MEDIA_SERVER 0x0005 #define WPS_PDT_SCID_RTK_DMP WPS_PDT_SCID_MEDIA_SERVER // Value of Device Password ID #define WPS_DPID_PIN 0x0000 #define WPS_DPID_USER_SPEC 0x0001 #define WPS_DPID_MACHINE_SPEC 0x0002 #define WPS_DPID_REKEY 0x0003 #define WPS_DPID_PBC 0x0004 #define WPS_DPID_REGISTRAR_SPEC 0x0005 // Value of WPS RF Bands Attribute #define WPS_RF_BANDS_2_4_GHZ 0x01 #define WPS_RF_BANDS_5_GHZ 0x02 // Value of WPS Association State Attribute #define WPS_ASSOC_STATE_NOT_ASSOCIATED 0x00 #define WPS_ASSOC_STATE_CONNECTION_SUCCESS 0x01 #define WPS_ASSOC_STATE_CONFIGURATION_FAILURE 0x02 #define WPS_ASSOC_STATE_ASSOCIATION_FAILURE 0x03 #define WPS_ASSOC_STATE_IP_FAILURE 0x04 // =====================P2P Section===================== // For P2P #define P2POUI 0x506F9A09 // P2P Attribute ID #define P2P_ATTR_STATUS 0x00 #define P2P_ATTR_MINOR_REASON_CODE 0x01 #define P2P_ATTR_CAPABILITY 0x02 #define P2P_ATTR_DEVICE_ID 0x03 #define P2P_ATTR_GO_INTENT 0x04 #define P2P_ATTR_CONF_TIMEOUT 0x05 #define P2P_ATTR_LISTEN_CH 0x06 #define P2P_ATTR_GROUP_BSSID 0x07 #define P2P_ATTR_EX_LISTEN_TIMING 0x08 #define P2P_ATTR_INTENTED_IF_ADDR 0x09 #define P2P_ATTR_MANAGEABILITY 0x0A #define P2P_ATTR_CH_LIST 0x0B #define P2P_ATTR_NOA 0x0C #define P2P_ATTR_DEVICE_INFO 0x0D #define P2P_ATTR_GROUP_INFO 0x0E #define P2P_ATTR_GROUP_ID 0x0F #define P2P_ATTR_INTERFACE 0x10 #define P2P_ATTR_OPERATING_CH 0x11 #define P2P_ATTR_INVITATION_FLAGS 0x12 // Value of Status Attribute #define P2P_STATUS_SUCCESS 0x00 #define P2P_STATUS_FAIL_INFO_UNAVAILABLE 0x01 #define P2P_STATUS_FAIL_INCOMPATIBLE_PARAM 0x02 #define P2P_STATUS_FAIL_LIMIT_REACHED 0x03 #define P2P_STATUS_FAIL_INVALID_PARAM 0x04 #define P2P_STATUS_FAIL_REQUEST_UNABLE 0x05 #define P2P_STATUS_FAIL_PREVOUS_PROTO_ERR 0x06 #define P2P_STATUS_FAIL_NO_COMMON_CH 0x07 #define P2P_STATUS_FAIL_UNKNOWN_P2PGROUP 0x08 #define P2P_STATUS_FAIL_BOTH_GOINTENT_15 0x09 #define P2P_STATUS_FAIL_INCOMPATIBLE_PROVSION 0x0A #define P2P_STATUS_FAIL_USER_REJECT 0x0B // Value of Inviation Flags Attribute #define P2P_INVITATION_FLAGS_PERSISTENT BIT(0) #define DMP_P2P_DEVCAP_SUPPORT (P2P_DEVCAP_SERVICE_DISCOVERY | \ P2P_DEVCAP_CLIENT_DISCOVERABILITY | \ P2P_DEVCAP_CONCURRENT_OPERATION | \ P2P_DEVCAP_INVITATION_PROC) #define DMP_P2P_GRPCAP_SUPPORT (P2P_GRPCAP_INTRABSS) // Value of Device Capability Bitmap #define P2P_DEVCAP_SERVICE_DISCOVERY BIT(0) #define P2P_DEVCAP_CLIENT_DISCOVERABILITY BIT(1) #define P2P_DEVCAP_CONCURRENT_OPERATION BIT(2) #define P2P_DEVCAP_INFRA_MANAGED BIT(3) #define P2P_DEVCAP_DEVICE_LIMIT BIT(4) #define P2P_DEVCAP_INVITATION_PROC BIT(5) // Value of Group Capability Bitmap #define P2P_GRPCAP_GO BIT(0) #define P2P_GRPCAP_PERSISTENT_GROUP BIT(1) #define P2P_GRPCAP_GROUP_LIMIT BIT(2) #define P2P_GRPCAP_INTRABSS BIT(3) #define P2P_GRPCAP_CROSS_CONN BIT(4) #define P2P_GRPCAP_PERSISTENT_RECONN BIT(5) #define P2P_GRPCAP_GROUP_FORMATION BIT(6) // P2P Public Action Frame ( Management Frame ) #define P2P_PUB_ACTION_ACTION 0x09 // P2P Public Action Frame Type #define P2P_GO_NEGO_REQ 0 #define P2P_GO_NEGO_RESP 1 #define P2P_GO_NEGO_CONF 2 #define P2P_INVIT_REQ 3 #define P2P_INVIT_RESP 4 #define P2P_DEVDISC_REQ 5 #define P2P_DEVDISC_RESP 6 #define P2P_PROVISION_DISC_REQ 7 #define P2P_PROVISION_DISC_RESP 8 // P2P Action Frame Type #define P2P_NOTICE_OF_ABSENCE 0 #define P2P_PRESENCE_REQUEST 1 #define P2P_PRESENCE_RESPONSE 2 #define P2P_GO_DISC_REQUEST 3 #define P2P_MAX_PERSISTENT_GROUP_NUM 10 #define P2P_PROVISIONING_SCAN_CNT 3 #define P2P_WILDCARD_SSID_LEN 7 #define P2P_FINDPHASE_EX_NONE 0 // default value, used when: (1)p2p disabed or (2)p2p enabled but only do 1 scan phase #define P2P_FINDPHASE_EX_FULL 1 // used when p2p enabled and want to do 1 scan phase and P2P_FINDPHASE_EX_MAX-1 find phase #define P2P_FINDPHASE_EX_SOCIAL_FIRST (P2P_FINDPHASE_EX_FULL+1) #define P2P_FINDPHASE_EX_MAX 4 #define P2P_FINDPHASE_EX_SOCIAL_LAST P2P_FINDPHASE_EX_MAX #define P2P_PROVISION_TIMEOUT 5000 // 5 seconds timeout for sending the provision discovery request #define P2P_CONCURRENT_PROVISION_TIMEOUT 3000 // 3 seconds timeout for sending the provision discovery request under concurrent mode #define P2P_GO_NEGO_TIMEOUT 5000 // 5 seconds timeout for receiving the group negotation response #define P2P_CONCURRENT_GO_NEGO_TIMEOUT 3000 // 3 seconds timeout for sending the negotiation request under concurrent mode #define P2P_TX_PRESCAN_TIMEOUT 100 // 100ms #define P2P_INVITE_TIMEOUT 5000 // 5 seconds timeout for sending the invitation request #define P2P_CONCURRENT_INVITE_TIMEOUT 3000 // 3 seconds timeout for sending the invitation request under concurrent mode #define P2P_RESET_SCAN_CH 25000 // 25 seconds timeout to reset the scan channel ( based on channel plan ) #define P2P_MAX_INTENT 15 #define P2P_MAX_NOA_NUM 2 // WPS Configuration Method #define WPS_CM_NONE 0x0000 #define WPS_CM_LABEL 0x0004 #define WPS_CM_DISPLYA 0x0008 #define WPS_CM_EXTERNAL_NFC_TOKEN 0x0010 #define WPS_CM_INTEGRATED_NFC_TOKEN 0x0020 #define WPS_CM_NFC_INTERFACE 0x0040 #define WPS_CM_PUSH_BUTTON 0x0080 #define WPS_CM_KEYPAD 0x0100 #define WPS_CM_SW_PUHS_BUTTON 0x0280 #define WPS_CM_HW_PUHS_BUTTON 0x0480 #define WPS_CM_SW_DISPLAY_PIN 0x2008 #define WPS_CM_LCD_DISPLAY_PIN 0x4008 enum P2P_ROLE { P2P_ROLE_DISABLE = 0, P2P_ROLE_DEVICE = 1, P2P_ROLE_CLIENT = 2, P2P_ROLE_GO = 3 }; enum P2P_STATE { P2P_STATE_NONE = 0, // P2P disable P2P_STATE_IDLE = 1, // P2P had enabled and do nothing P2P_STATE_LISTEN = 2, // In pure listen state P2P_STATE_SCAN = 3, // In scan phase P2P_STATE_FIND_PHASE_LISTEN = 4, // In the listen state of find phase P2P_STATE_FIND_PHASE_SEARCH = 5, // In the search state of find phase P2P_STATE_TX_PROVISION_DIS_REQ = 6, // In P2P provisioning discovery P2P_STATE_RX_PROVISION_DIS_RSP = 7, P2P_STATE_RX_PROVISION_DIS_REQ = 8, P2P_STATE_GONEGO_ING = 9, // Doing the group owner negoitation handshake P2P_STATE_GONEGO_OK = 10, // finish the group negoitation handshake with success P2P_STATE_GONEGO_FAIL = 11, // finish the group negoitation handshake with failure P2P_STATE_RECV_INVITE_REQ_MATCH = 12, // receiving the P2P Inviation request and match with the profile. P2P_STATE_PROVISIONING_ING = 13, // Doing the P2P WPS P2P_STATE_PROVISIONING_DONE = 14, // Finish the P2P WPS P2P_STATE_TX_INVITE_REQ = 15, // Transmit the P2P Invitation request P2P_STATE_RX_INVITE_RESP_OK = 16, // Receiving the P2P Invitation response P2P_STATE_RECV_INVITE_REQ_DISMATCH = 17, // receiving the P2P Inviation request and dismatch with the profile. P2P_STATE_RECV_INVITE_REQ_GO = 18, // receiving the P2P Inviation request and this wifi is GO. P2P_STATE_RECV_INVITE_REQ_JOIN = 19, // receiving the P2P Inviation request to join an existing P2P Group. P2P_STATE_RX_INVITE_RESP_FAIL = 20, // recveing the P2P Inviation response with failure P2P_STATE_RX_INFOR_NOREADY = 21, // receiving p2p negoitation response with information is not available P2P_STATE_TX_INFOR_NOREADY = 22, // sending p2p negoitation response with information is not available }; enum P2P_WPSINFO { P2P_NO_WPSINFO = 0, P2P_GOT_WPSINFO_PEER_DISPLAY_PIN = 1, P2P_GOT_WPSINFO_SELF_DISPLAY_PIN = 2, P2P_GOT_WPSINFO_PBC = 3, }; #define P2P_PRIVATE_IOCTL_SET_LEN 64 enum P2P_PROTO_WK_ID { P2P_FIND_PHASE_WK = 0, P2P_RESTORE_STATE_WK = 1, P2P_PRE_TX_PROVDISC_PROCESS_WK = 2, P2P_PRE_TX_NEGOREQ_PROCESS_WK = 3, P2P_PRE_TX_INVITEREQ_PROCESS_WK = 4, P2P_AP_P2P_CH_SWITCH_PROCESS_WK =5, P2P_RO_CH_WK = 6, }; #ifdef CONFIG_P2P_PS enum P2P_PS_STATE { P2P_PS_DISABLE = 0, P2P_PS_ENABLE = 1, P2P_PS_SCAN = 2, P2P_PS_SCAN_DONE = 3, P2P_PS_ALLSTASLEEP = 4, // for P2P GO }; enum P2P_PS_MODE { P2P_PS_NONE = 0, P2P_PS_CTWINDOW = 1, P2P_PS_NOA = 2, P2P_PS_MIX = 3, // CTWindow and NoA }; #endif // CONFIG_P2P_PS // =====================WFD Section===================== // For Wi-Fi Display #define WFD_ATTR_DEVICE_INFO 0x00 #define WFD_ATTR_ASSOC_BSSID 0x01 #define WFD_ATTR_COUPLED_SINK_INFO 0x06 #define WFD_ATTR_LOCAL_IP_ADDR 0x08 #define WFD_ATTR_SESSION_INFO 0x09 #define WFD_ATTR_ALTER_MAC 0x0a // For WFD Device Information Attribute #define WFD_DEVINFO_SOURCE 0x0000 #define WFD_DEVINFO_PSINK 0x0001 #define WFD_DEVINFO_SSINK 0x0002 #define WFD_DEVINFO_DUAL 0x0003 #define WFD_DEVINFO_SESSION_AVAIL 0x0010 #define WFD_DEVINFO_WSD 0x0040 #define WFD_DEVINFO_PC_TDLS 0x0080 #define WFD_DEVINFO_HDCP_SUPPORT 0x0100 #ifdef CONFIG_TX_MCAST2UNI #define IP_MCAST_MAC(mac) ((mac[0]==0x01)&&(mac[1]==0x00)&&(mac[2]==0x5e)) #define ICMPV6_MCAST_MAC(mac) ((mac[0]==0x33)&&(mac[1]==0x33)&&(mac[2]!=0xff)) #endif // CONFIG_TX_MCAST2UNI #ifdef CONFIG_IOCTL_CFG80211 /* Regulatroy Domain */ struct regd_pair_mapping { u16 reg_dmnenum; u16 reg_5ghz_ctl; u16 reg_2ghz_ctl; }; struct rtw_regulatory { char alpha2[2]; u16 country_code; u16 max_power_level; u32 tp_scale; u16 current_rd; u16 current_rd_ext; int16_t power_limit; struct regd_pair_mapping *regpair; }; #endif #ifdef CONFIG_WAPI_SUPPORT #ifndef IW_AUTH_WAPI_VERSION_1 #define IW_AUTH_WAPI_VERSION_1 0x00000008 #endif #ifndef IW_AUTH_KEY_MGMT_WAPI_PSK #define IW_AUTH_KEY_MGMT_WAPI_PSK 0x04 #endif #ifndef IW_AUTH_WAPI_ENABLED #define IW_AUTH_WAPI_ENABLED 0x20 #endif #ifndef IW_ENCODE_ALG_SM4 #define IW_ENCODE_ALG_SM4 0x20 #endif #endif #endif // _WIFI_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/wlan_bssdef.h000066400000000000000000000533321261122257400215700ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __WLAN_BSSDEF_H__ #define __WLAN_BSSDEF_H__ #define MAX_IE_SZ 768 #ifdef PLATFORM_LINUX #define NDIS_802_11_LENGTH_SSID 32 #define NDIS_802_11_LENGTH_RATES 8 #define NDIS_802_11_LENGTH_RATES_EX 16 typedef unsigned char NDIS_802_11_MAC_ADDRESS[6]; typedef long NDIS_802_11_RSSI; // in dBm typedef unsigned char NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES]; // Set of 8 data rates typedef unsigned char NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX]; // Set of 16 data rates typedef ULONG NDIS_802_11_KEY_INDEX; typedef unsigned long long NDIS_802_11_KEY_RSC; typedef struct _NDIS_802_11_SSID { ULONG SsidLength; UCHAR Ssid[32]; } NDIS_802_11_SSID, *PNDIS_802_11_SSID; typedef enum _NDIS_802_11_NETWORK_TYPE { Ndis802_11FH, Ndis802_11DS, Ndis802_11OFDM5, Ndis802_11OFDM24, Ndis802_11NetworkTypeMax // not a real type, defined as an upper bound } NDIS_802_11_NETWORK_TYPE, *PNDIS_802_11_NETWORK_TYPE; typedef struct _NDIS_802_11_CONFIGURATION_FH { ULONG Length; // Length of structure ULONG HopPattern; // As defined by 802.11, MSB set ULONG HopSet; // to one if non-802.11 ULONG DwellTime; // units are Kusec } NDIS_802_11_CONFIGURATION_FH, *PNDIS_802_11_CONFIGURATION_FH; /* FW will only save the channel number in DSConfig. ODI Handler will convert the channel number to freq. number. */ typedef struct _NDIS_802_11_CONFIGURATION { ULONG Length; // Length of structure ULONG BeaconPeriod; // units are Kusec ULONG ATIMWindow; // units are Kusec ULONG DSConfig; // Frequency, units are kHz NDIS_802_11_CONFIGURATION_FH FHConfig; } NDIS_802_11_CONFIGURATION, *PNDIS_802_11_CONFIGURATION; typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE { Ndis802_11IBSS, Ndis802_11Infrastructure, Ndis802_11AutoUnknown, Ndis802_11InfrastructureMax, // Not a real value, defined as upper bound Ndis802_11APMode } NDIS_802_11_NETWORK_INFRASTRUCTURE, *PNDIS_802_11_NETWORK_INFRASTRUCTURE; typedef struct _NDIS_802_11_FIXED_IEs { UCHAR Timestamp[8]; USHORT BeaconInterval; USHORT Capabilities; } NDIS_802_11_FIXED_IEs, *PNDIS_802_11_FIXED_IEs; typedef struct _NDIS_802_11_VARIABLE_IEs { UCHAR ElementID; UCHAR Length; UCHAR data[1]; } NDIS_802_11_VARIABLE_IEs, *PNDIS_802_11_VARIABLE_IEs; /* Length is the 4 bytes multiples of the sume of sizeof (NDIS_802_11_MAC_ADDRESS) + 2 + sizeof (NDIS_802_11_SSID) + sizeof (ULONG) + sizeof (NDIS_802_11_RSSI) + sizeof (NDIS_802_11_NETWORK_TYPE) + sizeof (NDIS_802_11_CONFIGURATION) + sizeof (NDIS_802_11_RATES_EX) + IELength Except the IELength, all other fields are fixed length. Therefore, we can define a marco to present the partial sum. */ #if 0 typedef struct _NDIS_WLAN_BSSID_EX { ULONG Length; NDIS_802_11_MAC_ADDRESS MacAddress; UCHAR Reserved[2];//[0]: IS beacon frame, [1]:optimum_antenna=>For antenna diversity; NDIS_802_11_SSID Ssid; ULONG Privacy; NDIS_802_11_RSSI Rssi; NDIS_802_11_NETWORK_TYPE NetworkTypeInUse; NDIS_802_11_CONFIGURATION Configuration; NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode; NDIS_802_11_RATES_EX SupportedRates; ULONG IELength; UCHAR IEs[MAX_IE_SZ]; //(timestamp, beacon interval, and capability information) } NDIS_WLAN_BSSID_EX, *PNDIS_WLAN_BSSID_EX; typedef struct _NDIS_802_11_BSSID_LIST_EX { ULONG NumberOfItems; NDIS_WLAN_BSSID_EX Bssid[1]; } NDIS_802_11_BSSID_LIST_EX, *PNDIS_802_11_BSSID_LIST_EX; #endif typedef enum _NDIS_802_11_AUTHENTICATION_MODE { Ndis802_11AuthModeOpen, Ndis802_11AuthModeShared, Ndis802_11AuthModeAutoSwitch, Ndis802_11AuthModeWPA, Ndis802_11AuthModeWPAPSK, Ndis802_11AuthModeWPANone, Ndis802_11AuthModeWAPI, Ndis802_11AuthModeMax // Not a real mode, defined as upper bound } NDIS_802_11_AUTHENTICATION_MODE, *PNDIS_802_11_AUTHENTICATION_MODE; typedef enum _NDIS_802_11_WEP_STATUS { Ndis802_11WEPEnabled, Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled, Ndis802_11WEPDisabled, Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled, Ndis802_11WEPKeyAbsent, Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent, Ndis802_11WEPNotSupported, Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported, Ndis802_11Encryption2Enabled, Ndis802_11Encryption2KeyAbsent, Ndis802_11Encryption3Enabled, Ndis802_11Encryption3KeyAbsent, Ndis802_11_EncrypteionWAPI } NDIS_802_11_WEP_STATUS, *PNDIS_802_11_WEP_STATUS, NDIS_802_11_ENCRYPTION_STATUS, *PNDIS_802_11_ENCRYPTION_STATUS; #define NDIS_802_11_AI_REQFI_CAPABILITIES 1 #define NDIS_802_11_AI_REQFI_LISTENINTERVAL 2 #define NDIS_802_11_AI_REQFI_CURRENTAPADDRESS 4 #define NDIS_802_11_AI_RESFI_CAPABILITIES 1 #define NDIS_802_11_AI_RESFI_STATUSCODE 2 #define NDIS_802_11_AI_RESFI_ASSOCIATIONID 4 typedef struct _NDIS_802_11_AI_REQFI { USHORT Capabilities; USHORT ListenInterval; NDIS_802_11_MAC_ADDRESS CurrentAPAddress; } NDIS_802_11_AI_REQFI, *PNDIS_802_11_AI_REQFI; typedef struct _NDIS_802_11_AI_RESFI { USHORT Capabilities; USHORT StatusCode; USHORT AssociationId; } NDIS_802_11_AI_RESFI, *PNDIS_802_11_AI_RESFI; typedef struct _NDIS_802_11_ASSOCIATION_INFORMATION { ULONG Length; USHORT AvailableRequestFixedIEs; NDIS_802_11_AI_REQFI RequestFixedIEs; ULONG RequestIELength; ULONG OffsetRequestIEs; USHORT AvailableResponseFixedIEs; NDIS_802_11_AI_RESFI ResponseFixedIEs; ULONG ResponseIELength; ULONG OffsetResponseIEs; } NDIS_802_11_ASSOCIATION_INFORMATION, *PNDIS_802_11_ASSOCIATION_INFORMATION; typedef enum _NDIS_802_11_RELOAD_DEFAULTS { Ndis802_11ReloadWEPKeys } NDIS_802_11_RELOAD_DEFAULTS, *PNDIS_802_11_RELOAD_DEFAULTS; // Key mapping keys require a BSSID typedef struct _NDIS_802_11_KEY { ULONG Length; // Length of this structure ULONG KeyIndex; ULONG KeyLength; // length of key in bytes NDIS_802_11_MAC_ADDRESS BSSID; NDIS_802_11_KEY_RSC KeyRSC; UCHAR KeyMaterial[32]; // variable length depending on above field } NDIS_802_11_KEY, *PNDIS_802_11_KEY; typedef struct _NDIS_802_11_REMOVE_KEY { ULONG Length; // Length of this structure ULONG KeyIndex; NDIS_802_11_MAC_ADDRESS BSSID; } NDIS_802_11_REMOVE_KEY, *PNDIS_802_11_REMOVE_KEY; typedef struct _NDIS_802_11_WEP { ULONG Length; // Length of this structure ULONG KeyIndex; // 0 is the per-client key, 1-N are the global keys ULONG KeyLength; // length of key in bytes UCHAR KeyMaterial[16];// variable length depending on above field } NDIS_802_11_WEP, *PNDIS_802_11_WEP; typedef struct _NDIS_802_11_AUTHENTICATION_REQUEST { ULONG Length; // Length of structure NDIS_802_11_MAC_ADDRESS Bssid; ULONG Flags; } NDIS_802_11_AUTHENTICATION_REQUEST, *PNDIS_802_11_AUTHENTICATION_REQUEST; typedef enum _NDIS_802_11_STATUS_TYPE { Ndis802_11StatusType_Authentication, Ndis802_11StatusType_MediaStreamMode, Ndis802_11StatusType_PMKID_CandidateList, Ndis802_11StatusTypeMax // not a real type, defined as an upper bound } NDIS_802_11_STATUS_TYPE, *PNDIS_802_11_STATUS_TYPE; typedef struct _NDIS_802_11_STATUS_INDICATION { NDIS_802_11_STATUS_TYPE StatusType; } NDIS_802_11_STATUS_INDICATION, *PNDIS_802_11_STATUS_INDICATION; // mask for authentication/integrity fields #define NDIS_802_11_AUTH_REQUEST_AUTH_FIELDS 0x0f #define NDIS_802_11_AUTH_REQUEST_REAUTH 0x01 #define NDIS_802_11_AUTH_REQUEST_KEYUPDATE 0x02 #define NDIS_802_11_AUTH_REQUEST_PAIRWISE_ERROR 0x06 #define NDIS_802_11_AUTH_REQUEST_GROUP_ERROR 0x0E // MIC check time, 60 seconds. #define MIC_CHECK_TIME 60000000 typedef struct _NDIS_802_11_AUTHENTICATION_EVENT { NDIS_802_11_STATUS_INDICATION Status; NDIS_802_11_AUTHENTICATION_REQUEST Request[1]; } NDIS_802_11_AUTHENTICATION_EVENT, *PNDIS_802_11_AUTHENTICATION_EVENT; typedef struct _NDIS_802_11_TEST { ULONG Length; ULONG Type; union { NDIS_802_11_AUTHENTICATION_EVENT AuthenticationEvent; NDIS_802_11_RSSI RssiTrigger; }tt; } NDIS_802_11_TEST, *PNDIS_802_11_TEST; #endif //end of #ifdef PLATFORM_LINUX #ifdef PLATFORM_FREEBSD #define NDIS_802_11_LENGTH_SSID 32 #define NDIS_802_11_LENGTH_RATES 8 #define NDIS_802_11_LENGTH_RATES_EX 16 typedef unsigned char NDIS_802_11_MAC_ADDRESS[6]; typedef long NDIS_802_11_RSSI; // in dBm typedef unsigned char NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES]; // Set of 8 data rates typedef unsigned char NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX]; // Set of 16 data rates typedef ULONG NDIS_802_11_KEY_INDEX; typedef unsigned long long NDIS_802_11_KEY_RSC; typedef struct _NDIS_802_11_SSID { ULONG SsidLength; UCHAR Ssid[32]; } NDIS_802_11_SSID, *PNDIS_802_11_SSID; typedef enum _NDIS_802_11_NETWORK_TYPE { Ndis802_11FH, Ndis802_11DS, Ndis802_11OFDM5, Ndis802_11OFDM24, Ndis802_11NetworkTypeMax // not a real type, defined as an upper bound } NDIS_802_11_NETWORK_TYPE, *PNDIS_802_11_NETWORK_TYPE; typedef struct _NDIS_802_11_CONFIGURATION_FH { ULONG Length; // Length of structure ULONG HopPattern; // As defined by 802.11, MSB set ULONG HopSet; // to one if non-802.11 ULONG DwellTime; // units are Kusec } NDIS_802_11_CONFIGURATION_FH, *PNDIS_802_11_CONFIGURATION_FH; /* FW will only save the channel number in DSConfig. ODI Handler will convert the channel number to freq. number. */ typedef struct _NDIS_802_11_CONFIGURATION { ULONG Length; // Length of structure ULONG BeaconPeriod; // units are Kusec ULONG ATIMWindow; // units are Kusec ULONG DSConfig; // Frequency, units are kHz NDIS_802_11_CONFIGURATION_FH FHConfig; } NDIS_802_11_CONFIGURATION, *PNDIS_802_11_CONFIGURATION; typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE { Ndis802_11IBSS, Ndis802_11Infrastructure, Ndis802_11AutoUnknown, Ndis802_11InfrastructureMax, // Not a real value, defined as upper bound Ndis802_11APMode } NDIS_802_11_NETWORK_INFRASTRUCTURE, *PNDIS_802_11_NETWORK_INFRASTRUCTURE; typedef struct _NDIS_802_11_FIXED_IEs { UCHAR Timestamp[8]; USHORT BeaconInterval; USHORT Capabilities; } NDIS_802_11_FIXED_IEs, *PNDIS_802_11_FIXED_IEs; typedef struct _NDIS_802_11_VARIABLE_IEs { UCHAR ElementID; UCHAR Length; UCHAR data[1]; } NDIS_802_11_VARIABLE_IEs, *PNDIS_802_11_VARIABLE_IEs; /* Length is the 4 bytes multiples of the sume of sizeof (NDIS_802_11_MAC_ADDRESS) + 2 + sizeof (NDIS_802_11_SSID) + sizeof (ULONG) + sizeof (NDIS_802_11_RSSI) + sizeof (NDIS_802_11_NETWORK_TYPE) + sizeof (NDIS_802_11_CONFIGURATION) + sizeof (NDIS_802_11_RATES_EX) + IELength Except the IELength, all other fields are fixed length. Therefore, we can define a marco to present the partial sum. */ #if 0 typedef struct _NDIS_WLAN_BSSID_EX { ULONG Length; NDIS_802_11_MAC_ADDRESS MacAddress; UCHAR Reserved[2];//[0]: IS beacon frame, [1]:optimum_antenna=>For antenna diversity; NDIS_802_11_SSID Ssid; ULONG Privacy; NDIS_802_11_RSSI Rssi; NDIS_802_11_NETWORK_TYPE NetworkTypeInUse; NDIS_802_11_CONFIGURATION Configuration; NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode; NDIS_802_11_RATES_EX SupportedRates; ULONG IELength; UCHAR IEs[MAX_IE_SZ]; //(timestamp, beacon interval, and capability information) } NDIS_WLAN_BSSID_EX, *PNDIS_WLAN_BSSID_EX; typedef struct _NDIS_802_11_BSSID_LIST_EX { ULONG NumberOfItems; NDIS_WLAN_BSSID_EX Bssid[1]; } NDIS_802_11_BSSID_LIST_EX, *PNDIS_802_11_BSSID_LIST_EX; #endif typedef enum _NDIS_802_11_AUTHENTICATION_MODE { Ndis802_11AuthModeOpen, Ndis802_11AuthModeShared, Ndis802_11AuthModeAutoSwitch, Ndis802_11AuthModeWPA, Ndis802_11AuthModeWPAPSK, Ndis802_11AuthModeWPANone, Ndis802_11AuthModeMax // Not a real mode, defined as upper bound } NDIS_802_11_AUTHENTICATION_MODE, *PNDIS_802_11_AUTHENTICATION_MODE; typedef enum _NDIS_802_11_WEP_STATUS { Ndis802_11WEPEnabled, Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled, Ndis802_11WEPDisabled, Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled, Ndis802_11WEPKeyAbsent, Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent, Ndis802_11WEPNotSupported, Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported, Ndis802_11Encryption2Enabled, Ndis802_11Encryption2KeyAbsent, Ndis802_11Encryption3Enabled, Ndis802_11Encryption3KeyAbsent } NDIS_802_11_WEP_STATUS, *PNDIS_802_11_WEP_STATUS, NDIS_802_11_ENCRYPTION_STATUS, *PNDIS_802_11_ENCRYPTION_STATUS; #define NDIS_802_11_AI_REQFI_CAPABILITIES 1 #define NDIS_802_11_AI_REQFI_LISTENINTERVAL 2 #define NDIS_802_11_AI_REQFI_CURRENTAPADDRESS 4 #define NDIS_802_11_AI_RESFI_CAPABILITIES 1 #define NDIS_802_11_AI_RESFI_STATUSCODE 2 #define NDIS_802_11_AI_RESFI_ASSOCIATIONID 4 typedef struct _NDIS_802_11_AI_REQFI { USHORT Capabilities; USHORT ListenInterval; NDIS_802_11_MAC_ADDRESS CurrentAPAddress; } NDIS_802_11_AI_REQFI, *PNDIS_802_11_AI_REQFI; typedef struct _NDIS_802_11_AI_RESFI { USHORT Capabilities; USHORT StatusCode; USHORT AssociationId; } NDIS_802_11_AI_RESFI, *PNDIS_802_11_AI_RESFI; typedef struct _NDIS_802_11_ASSOCIATION_INFORMATION { ULONG Length; USHORT AvailableRequestFixedIEs; NDIS_802_11_AI_REQFI RequestFixedIEs; ULONG RequestIELength; ULONG OffsetRequestIEs; USHORT AvailableResponseFixedIEs; NDIS_802_11_AI_RESFI ResponseFixedIEs; ULONG ResponseIELength; ULONG OffsetResponseIEs; } NDIS_802_11_ASSOCIATION_INFORMATION, *PNDIS_802_11_ASSOCIATION_INFORMATION; typedef enum _NDIS_802_11_RELOAD_DEFAULTS { Ndis802_11ReloadWEPKeys } NDIS_802_11_RELOAD_DEFAULTS, *PNDIS_802_11_RELOAD_DEFAULTS; // Key mapping keys require a BSSID typedef struct _NDIS_802_11_KEY { ULONG Length; // Length of this structure ULONG KeyIndex; ULONG KeyLength; // length of key in bytes NDIS_802_11_MAC_ADDRESS BSSID; NDIS_802_11_KEY_RSC KeyRSC; UCHAR KeyMaterial[32]; // variable length depending on above field } NDIS_802_11_KEY, *PNDIS_802_11_KEY; typedef struct _NDIS_802_11_REMOVE_KEY { ULONG Length; // Length of this structure ULONG KeyIndex; NDIS_802_11_MAC_ADDRESS BSSID; } NDIS_802_11_REMOVE_KEY, *PNDIS_802_11_REMOVE_KEY; typedef struct _NDIS_802_11_WEP { ULONG Length; // Length of this structure ULONG KeyIndex; // 0 is the per-client key, 1-N are the global keys ULONG KeyLength; // length of key in bytes UCHAR KeyMaterial[16];// variable length depending on above field } NDIS_802_11_WEP, *PNDIS_802_11_WEP; typedef struct _NDIS_802_11_AUTHENTICATION_REQUEST { ULONG Length; // Length of structure NDIS_802_11_MAC_ADDRESS Bssid; ULONG Flags; } NDIS_802_11_AUTHENTICATION_REQUEST, *PNDIS_802_11_AUTHENTICATION_REQUEST; typedef enum _NDIS_802_11_STATUS_TYPE { Ndis802_11StatusType_Authentication, Ndis802_11StatusType_MediaStreamMode, Ndis802_11StatusType_PMKID_CandidateList, Ndis802_11StatusTypeMax // not a real type, defined as an upper bound } NDIS_802_11_STATUS_TYPE, *PNDIS_802_11_STATUS_TYPE; typedef struct _NDIS_802_11_STATUS_INDICATION { NDIS_802_11_STATUS_TYPE StatusType; } NDIS_802_11_STATUS_INDICATION, *PNDIS_802_11_STATUS_INDICATION; // mask for authentication/integrity fields #define NDIS_802_11_AUTH_REQUEST_AUTH_FIELDS 0x0f #define NDIS_802_11_AUTH_REQUEST_REAUTH 0x01 #define NDIS_802_11_AUTH_REQUEST_KEYUPDATE 0x02 #define NDIS_802_11_AUTH_REQUEST_PAIRWISE_ERROR 0x06 #define NDIS_802_11_AUTH_REQUEST_GROUP_ERROR 0x0E // MIC check time, 60 seconds. #define MIC_CHECK_TIME 60000000 typedef struct _NDIS_802_11_AUTHENTICATION_EVENT { NDIS_802_11_STATUS_INDICATION Status; NDIS_802_11_AUTHENTICATION_REQUEST Request[1]; } NDIS_802_11_AUTHENTICATION_EVENT, *PNDIS_802_11_AUTHENTICATION_EVENT; typedef struct _NDIS_802_11_TEST { ULONG Length; ULONG Type; union { NDIS_802_11_AUTHENTICATION_EVENT AuthenticationEvent; NDIS_802_11_RSSI RssiTrigger; }tt; } NDIS_802_11_TEST, *PNDIS_802_11_TEST; #endif //PLATFORM_FREEBSD #ifndef Ndis802_11APMode #define Ndis802_11APMode (Ndis802_11InfrastructureMax+1) #endif typedef struct _WLAN_PHY_INFO { u8 SignalStrength;//(in percentage) u8 SignalQuality;//(in percentage) u8 Optimum_antenna; //for Antenna diversity u8 Reserved_0; }WLAN_PHY_INFO,*PWLAN_PHY_INFO; typedef struct _WLAN_BCN_INFO { /* these infor get from rtw_get_encrypt_info when * * translate scan to UI */ u8 encryp_protocol;//ENCRYP_PROTOCOL_E: OPEN/WEP/WPA/WPA2/WAPI int group_cipher; //WPA/WPA2 group cipher int pairwise_cipher;////WPA/WPA2/WEP pairwise cipher int is_8021x; /* bwmode 20/40 and ch_offset UP/LOW */ unsigned short ht_cap_info; unsigned char ht_info_infos_0; }WLAN_BCN_INFO,*PWLAN_BCN_INFO; /* temporally add #pragma pack for structure alignment issue of * WLAN_BSSID_EX and get_WLAN_BSSID_EX_sz() */ #ifdef PLATFORM_WINDOWS #pragma pack(push) #pragma pack(1) #endif typedef struct _WLAN_BSSID_EX { ULONG Length; NDIS_802_11_MAC_ADDRESS MacAddress; UCHAR Reserved[2];//[0]: IS beacon frame NDIS_802_11_SSID Ssid; ULONG Privacy; NDIS_802_11_RSSI Rssi;//(in dBM,raw data ,get from PHY) NDIS_802_11_NETWORK_TYPE NetworkTypeInUse; NDIS_802_11_CONFIGURATION Configuration; NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode; NDIS_802_11_RATES_EX SupportedRates; WLAN_PHY_INFO PhyInfo; ULONG IELength; UCHAR IEs[MAX_IE_SZ]; //(timestamp, beacon interval, and capability information) } #ifndef PLATFORM_WINDOWS __attribute__((packed)) #endif WLAN_BSSID_EX, *PWLAN_BSSID_EX; #ifdef PLATFORM_WINDOWS #pragma pack(pop) #endif __inline static uint get_WLAN_BSSID_EX_sz(WLAN_BSSID_EX *bss) { #if 0 uint t_len; t_len = sizeof (ULONG) + sizeof (NDIS_802_11_MAC_ADDRESS) + 2 + sizeof (NDIS_802_11_SSID) + sizeof (ULONG) + sizeof (NDIS_802_11_RSSI) + sizeof (NDIS_802_11_NETWORK_TYPE) + sizeof (NDIS_802_11_CONFIGURATION) + sizeof (NDIS_802_11_NETWORK_INFRASTRUCTURE) + sizeof (NDIS_802_11_RATES_EX) //all new member add here + sizeof(WLAN_PHY_INFO) //all new member add here + sizeof (ULONG) + bss->IELength; return t_len; #else return (sizeof(WLAN_BSSID_EX) -MAX_IE_SZ + bss->IELength); #endif } struct wlan_network { _list list; int network_type; //refer to ieee80211.h for WIRELESS_11A/B/G int fixed; // set to fixed when not to be removed as site-surveying unsigned long last_scanned; //timestamp for the network int aid; //will only be valid when a BSS is joinned. int join_res; WLAN_BSSID_EX network; //must be the last item WLAN_BCN_INFO BcnInfo; #ifdef PLATFORM_WINDOWS unsigned char iebuf[MAX_IE_SZ]; #endif }; enum VRTL_CARRIER_SENSE { DISABLE_VCS, ENABLE_VCS, AUTO_VCS }; enum VCS_TYPE { NONE_VCS, RTS_CTS, CTS_TO_SELF }; #define PWR_CAM 0 #define PWR_MINPS 1 #define PWR_MAXPS 2 #define PWR_UAPSD 3 #define PWR_VOIP 4 enum UAPSD_MAX_SP { NO_LIMIT, TWO_MSDU, FOUR_MSDU, SIX_MSDU }; //john #define NUM_PRE_AUTH_KEY 16 #define NUM_PMKID_CACHE NUM_PRE_AUTH_KEY /* * WPA2 */ #ifndef PLATFORM_OS_CE typedef struct _PMKID_CANDIDATE { NDIS_802_11_MAC_ADDRESS BSSID; ULONG Flags; } PMKID_CANDIDATE, *PPMKID_CANDIDATE; typedef struct _NDIS_802_11_PMKID_CANDIDATE_LIST { ULONG Version; // Version of the structure ULONG NumCandidates; // No. of pmkid candidates PMKID_CANDIDATE CandidateList[1]; } NDIS_802_11_PMKID_CANDIDATE_LIST, *PNDIS_802_11_PMKID_CANDIDATE_LIST; typedef struct _NDIS_802_11_AUTHENTICATION_ENCRYPTION { NDIS_802_11_AUTHENTICATION_MODE AuthModeSupported; NDIS_802_11_ENCRYPTION_STATUS EncryptStatusSupported; } NDIS_802_11_AUTHENTICATION_ENCRYPTION, *PNDIS_802_11_AUTHENTICATION_ENCRYPTION; typedef struct _NDIS_802_11_CAPABILITY { ULONG Length; ULONG Version; ULONG NoOfPMKIDs; ULONG NoOfAuthEncryptPairsSupported; NDIS_802_11_AUTHENTICATION_ENCRYPTION AuthenticationEncryptionSupported[1]; } NDIS_802_11_CAPABILITY, *PNDIS_802_11_CAPABILITY; #endif #endif //#ifndef WLAN_BSSDEF_H_ rtl8812au-4.3.8.12175.20140902+dfsg/include/xmit_osdep.h000066400000000000000000000054411261122257400214520ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __XMIT_OSDEP_H_ #define __XMIT_OSDEP_H_ struct pkt_file { _pkt *pkt; SIZE_T pkt_len; //the remainder length of the open_file _buffer *cur_buffer; u8 *buf_start; u8 *cur_addr; SIZE_T buf_len; }; #ifdef PLATFORM_WINDOWS #ifdef PLATFORM_OS_XP #ifdef CONFIG_USB_HCI #include #include #include #endif #endif #ifdef CONFIG_GSPI_HCI #define NR_XMITFRAME 64 #else #define NR_XMITFRAME 128 #endif #define ETH_ALEN 6 extern NDIS_STATUS rtw_xmit_entry( IN _nic_hdl cnxt, IN NDIS_PACKET *pkt, IN UINT flags ); #endif #ifdef PLATFORM_FREEBSD #define NR_XMITFRAME 256 extern int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev); extern void rtw_xmit_entry_wrap (struct ifnet * pifp); #endif //PLATFORM_FREEBSD #ifdef PLATFORM_LINUX #define NR_XMITFRAME 256 struct xmit_priv; struct pkt_attrib; struct sta_xmit_priv; struct xmit_frame; struct xmit_buf; extern int _rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev); extern int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev); #endif void rtw_os_xmit_schedule(_adapter *padapter); int rtw_os_xmit_resource_alloc(_adapter *padapter, struct xmit_buf *pxmitbuf, u32 alloc_sz, u8 flag); void rtw_os_xmit_resource_free(_adapter *padapter, struct xmit_buf *pxmitbuf, u32 free_sz, u8 flag); extern void rtw_set_tx_chksum_offload(_pkt *pkt, struct pkt_attrib *pattrib); extern uint rtw_remainder_len(struct pkt_file *pfile); extern void _rtw_open_pktfile(_pkt *pkt, struct pkt_file *pfile); extern uint _rtw_pktfile_read (struct pkt_file *pfile, u8 *rmem, uint rlen); extern sint rtw_endofpktfile (struct pkt_file *pfile); extern void rtw_os_pkt_complete(_adapter *padapter, _pkt *pkt); extern void rtw_os_xmit_complete(_adapter *padapter, struct xmit_frame *pxframe); void rtw_os_wake_queue_at_free_stainfo(_adapter *padapter, int *qcnt_freed); void dump_os_queue(void *sel, _adapter *padapter); #endif //__XMIT_OSDEP_H_ rtl8812au-4.3.8.12175.20140902+dfsg/os_dep/000077500000000000000000000000001261122257400167505ustar00rootroot00000000000000rtl8812au-4.3.8.12175.20140902+dfsg/os_dep/linux/000077500000000000000000000000001261122257400201075ustar00rootroot00000000000000rtl8812au-4.3.8.12175.20140902+dfsg/os_dep/linux/custom_gpio_linux.c000066400000000000000000000177261261122257400240370ustar00rootroot00000000000000/****************************************************************************** * Customer code to add GPIO control during WLAN start/stop * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include "drv_types.h" #ifdef CONFIG_PLATFORM_SPRD //gspi func & GPIO define #include //0915 #include #if !(defined ANDROID_2X) #ifdef CONFIG_RTL8188E #include #include #endif // CONFIG_RTL8188E #ifndef GPIO_WIFI_POWER #define GPIO_WIFI_POWER -1 #endif // !GPIO_WIFI_POWER #ifndef GPIO_WIFI_RESET #define GPIO_WIFI_RESET -1 #endif // !GPIO_WIFI_RESET #ifndef GPIO_WIFI_PWDN #define GPIO_WIFI_PWDN -1 #endif // !GPIO_WIFI_RESET #ifdef CONFIG_GSPI_HCI extern unsigned int oob_irq; #endif // CONFIG_GSPI_HCI #ifdef CONFIG_SDIO_HCI extern int rtw_mp_mode; #else // !CONFIG_SDIO_HCI #endif // !CONFIG_SDIO_HCI int rtw_wifi_gpio_init(void) { #ifdef CONFIG_GSPI_HCI if (GPIO_WIFI_IRQ > 0) { gpio_request(GPIO_WIFI_IRQ, "oob_irq"); gpio_direction_input(GPIO_WIFI_IRQ); oob_irq = gpio_to_irq(GPIO_WIFI_IRQ); DBG_8192C("%s oob_irq:%d\n", __func__, oob_irq); } #endif if (GPIO_WIFI_RESET > 0) gpio_request(GPIO_WIFI_RESET , "wifi_rst"); if (GPIO_WIFI_POWER > 0) gpio_request(GPIO_WIFI_POWER, "wifi_power"); #ifdef CONFIG_SDIO_HCI #if (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) && (MP_DRIVER == 1) if(rtw_mp_mode==1){ DBG_871X("%s GPIO_BT_RESET pin special for mp_test\n", __func__); if (GPIO_BT_RESET > 0) gpio_request(GPIO_BT_RESET , "bt_rst"); } #endif #endif return 0; } int rtw_wifi_gpio_deinit(void) { #ifdef CONFIG_GSPI_HCI if (GPIO_WIFI_IRQ > 0) gpio_free(GPIO_WIFI_IRQ); #endif if (GPIO_WIFI_RESET > 0) gpio_free(GPIO_WIFI_RESET ); if (GPIO_WIFI_POWER > 0) gpio_free(GPIO_WIFI_POWER); #ifdef CONFIG_SDIO_HCI #if (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) && (MP_DRIVER == 1) if(rtw_mp_mode==1){ DBG_871X("%s GPIO_BT_RESET pin special for mp_test\n", __func__); if (GPIO_BT_RESET > 0) gpio_free(GPIO_BT_RESET); } #endif #endif return 0; } /* Customer function to control hw specific wlan gpios */ void rtw_wifi_gpio_wlan_ctrl(int onoff) { switch (onoff) { case WLAN_PWDN_OFF: DBG_8192C("%s: call customer specific GPIO(%d) to set wifi power down pin to 0\n", __FUNCTION__, GPIO_WIFI_RESET); #ifndef CONFIG_DONT_BUS_SCAN if (GPIO_WIFI_RESET > 0) gpio_direction_output(GPIO_WIFI_RESET , 0); #endif break; case WLAN_PWDN_ON: DBG_8192C("%s: callc customer specific GPIO(%d) to set wifi power down pin to 1\n", __FUNCTION__, GPIO_WIFI_RESET); if (GPIO_WIFI_RESET > 0) gpio_direction_output(GPIO_WIFI_RESET , 1); break; case WLAN_POWER_OFF: break; case WLAN_POWER_ON: break; #ifdef CONFIG_SDIO_HCI #if (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) && (MP_DRIVER == 1) case WLAN_BT_PWDN_OFF: if(rtw_mp_mode==1) { DBG_871X("%s: call customer specific GPIO to set wifi power down pin to 0\n", __FUNCTION__); if (GPIO_BT_RESET > 0) gpio_direction_output(GPIO_BT_RESET , 0); } break; case WLAN_BT_PWDN_ON: if(rtw_mp_mode==1) { DBG_871X("%s: callc customer specific GPIO to set wifi power down pin to 1 %x\n", __FUNCTION__, GPIO_BT_RESET); if (GPIO_BT_RESET > 0) gpio_direction_output(GPIO_BT_RESET , 1); } break; #endif #endif } } #else //ANDROID_2X #include #ifdef CONFIG_RTL8188E extern int sprd_3rdparty_gpio_wifi_power; #endif extern int sprd_3rdparty_gpio_wifi_pwd; #if (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) extern int sprd_3rdparty_gpio_bt_reset; #endif int rtw_wifi_gpio_init(void) { #if (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) if (sprd_3rdparty_gpio_bt_reset > 0) gpio_direction_output(sprd_3rdparty_gpio_bt_reset, 1); #endif return 0; } int rtw_wifi_gpio_deinit(void) { return 0; } /* Customer function to control hw specific wlan gpios */ void rtw_wifi_gpio_wlan_ctrl(int onoff) { switch (onoff) { case WLAN_PWDN_OFF: DBG_8192C("%s: call customer specific GPIO to set wifi power down pin to 0\n", __FUNCTION__); if (sprd_3rdparty_gpio_wifi_pwd > 0) { gpio_set_value(sprd_3rdparty_gpio_wifi_pwd, 0); } if (sprd_3rdparty_gpio_wifi_pwd == 60) { DBG_8192C("%s: turn off VSIM2 2.8V\n", __func__); LDO_TurnOffLDO(LDO_LDO_SIM2); } break; case WLAN_PWDN_ON: DBG_8192C("%s: callc customer specific GPIO to set wifi power down pin to 1\n", __FUNCTION__); if (sprd_3rdparty_gpio_wifi_pwd == 60) { DBG_8192C("%s: turn on VSIM2 2.8V\n", __func__); LDO_SetVoltLevel(LDO_LDO_SIM2, LDO_VOLT_LEVEL0); LDO_TurnOnLDO(LDO_LDO_SIM2); } if (sprd_3rdparty_gpio_wifi_pwd > 0) { gpio_set_value(sprd_3rdparty_gpio_wifi_pwd, 1); } break; case WLAN_POWER_OFF: #ifdef CONFIG_RTL8188E #ifdef CONFIG_WIF1_LDO DBG_8192C("%s: turn off VDD-WIFI0 1.2V\n", __FUNCTION__); LDO_TurnOffLDO(LDO_LDO_WIF1); #endif //CONFIG_WIF1_LDO DBG_8192C("%s: turn off VDD-WIFI0 3.3V\n", __FUNCTION__); LDO_TurnOffLDO(LDO_LDO_WIF0); DBG_8192C("%s: call customer specific GPIO(%d) to turn off wifi power\n", __FUNCTION__, sprd_3rdparty_gpio_wifi_power); if (sprd_3rdparty_gpio_wifi_power != 65535) gpio_set_value(sprd_3rdparty_gpio_wifi_power, 0); #endif break; case WLAN_POWER_ON: #ifdef CONFIG_RTL8188E DBG_8192C("%s: call customer specific GPIO(%d) to turn on wifi power\n", __FUNCTION__, sprd_3rdparty_gpio_wifi_power); if (sprd_3rdparty_gpio_wifi_power != 65535) gpio_set_value(sprd_3rdparty_gpio_wifi_power, 1); DBG_8192C("%s: turn on VDD-WIFI0 3.3V\n", __FUNCTION__); LDO_TurnOnLDO(LDO_LDO_WIF0); LDO_SetVoltLevel(LDO_LDO_WIF0,LDO_VOLT_LEVEL1); #ifdef CONFIG_WIF1_LDO DBG_8192C("%s: turn on VDD-WIFI1 1.2V\n", __func__); LDO_TurnOnLDO(LDO_LDO_WIF1); LDO_SetVoltLevel(LDO_LDO_WIF1,LDO_VOLT_LEVEL3); #endif //CONFIG_WIF1_LDO #endif break; case WLAN_BT_PWDN_OFF: DBG_8192C("%s: call customer specific GPIO to set bt power down pin to 0\n", __FUNCTION__); #if (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) if (sprd_3rdparty_gpio_bt_reset > 0) gpio_set_value(sprd_3rdparty_gpio_bt_reset, 0); #endif break; case WLAN_BT_PWDN_ON: DBG_8192C("%s: callc customer specific GPIO to set bt power down pin to 1\n", __FUNCTION__); #if (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) if (sprd_3rdparty_gpio_bt_reset > 0) gpio_set_value(sprd_3rdparty_gpio_bt_reset, 1); #endif break; } } #endif //ANDROID_2X #elif defined(CONFIG_PLATFORM_ARM_RK3066) #include #define GPIO_WIFI_IRQ RK30_PIN2_PC2 extern unsigned int oob_irq; int rtw_wifi_gpio_init(void) { #ifdef CONFIG_GSPI_HCI if (GPIO_WIFI_IRQ > 0) { rk30_mux_api_set(GPIO2C2_LCDC1DATA18_SMCBLSN1_HSADCDATA5_NAME, GPIO2C_GPIO2C2);//jacky_test gpio_request(GPIO_WIFI_IRQ, "oob_irq"); gpio_direction_input(GPIO_WIFI_IRQ); oob_irq = gpio_to_irq(GPIO_WIFI_IRQ); DBG_8192C("%s oob_irq:%d\n", __func__, oob_irq); } #endif return 0; } int rtw_wifi_gpio_deinit(void) { #ifdef CONFIG_GSPI_HCI if (GPIO_WIFI_IRQ > 0) gpio_free(GPIO_WIFI_IRQ); #endif return 0; } void rtw_wifi_gpio_wlan_ctrl(int onoff) { } #else int rtw_wifi_gpio_init(void) { return 0; } void rtw_wifi_gpio_wlan_ctrl(int onoff) { } #endif //CONFIG_PLATFORM_SPRD rtl8812au-4.3.8.12175.20140902+dfsg/os_dep/linux/ioctl_cfg80211.c000066400000000000000000005536661261122257400226250ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _IOCTL_CFG80211_C_ #include #ifdef CONFIG_IOCTL_CFG80211 #include #define RTW_MAX_MGMT_TX_CNT (8) #define RTW_SCAN_IE_LEN_MAX 2304 #define RTW_MAX_REMAIN_ON_CHANNEL_DURATION 5000 //ms #define RTW_MAX_NUM_PMKIDS 4 #define RTW_CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band */ #ifdef CONFIG_WAPI_SUPPORT #ifndef WLAN_CIPHER_SUITE_SMS4 #define WLAN_CIPHER_SUITE_SMS4 0x00147201 #endif #ifndef WLAN_AKM_SUITE_WAPI_PSK #define WLAN_AKM_SUITE_WAPI_PSK 0x000FAC04 #endif #ifndef WLAN_AKM_SUITE_WAPI_CERT #define WLAN_AKM_SUITE_WAPI_CERT 0x000FAC12 #endif #ifndef NL80211_WAPI_VERSION_1 #define NL80211_WAPI_VERSION_1 (1 << 2) #endif #endif #ifdef CONFIG_PLATFORM_ARM_SUN8I #define BUSY_TRAFFIC_SCAN_DENY_PERIOD 8000 #else #define BUSY_TRAFFIC_SCAN_DENY_PERIOD 12000 #endif static const u32 rtw_cipher_suites[] = { WLAN_CIPHER_SUITE_WEP40, WLAN_CIPHER_SUITE_WEP104, WLAN_CIPHER_SUITE_TKIP, WLAN_CIPHER_SUITE_CCMP, #ifdef CONFIG_WAPI_SUPPORT WLAN_CIPHER_SUITE_SMS4, #endif // CONFIG_WAPI_SUPPORT #ifdef CONFIG_IEEE80211W WLAN_CIPHER_SUITE_AES_CMAC, #endif //CONFIG_IEEE80211W }; #define RATETAB_ENT(_rate, _rateid, _flags) \ { \ .bitrate = (_rate), \ .hw_value = (_rateid), \ .flags = (_flags), \ } #define CHAN2G(_channel, _freq, _flags) { \ .band = IEEE80211_BAND_2GHZ, \ .center_freq = (_freq), \ .hw_value = (_channel), \ .flags = (_flags), \ .max_antenna_gain = 0, \ .max_power = 30, \ } #define CHAN5G(_channel, _flags) { \ .band = IEEE80211_BAND_5GHZ, \ .center_freq = 5000 + (5 * (_channel)), \ .hw_value = (_channel), \ .flags = (_flags), \ .max_antenna_gain = 0, \ .max_power = 30, \ } #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) /* if wowlan is not supported, kernel generate a disconnect at each suspend * cf: /net/wireless/sysfs.c, so register a stub wowlan. * Moreover wowlan has to be enabled via a the nl80211_set_wowlan callback. * (from user space, e.g. iw phy0 wowlan enable) */ static const struct wiphy_wowlan_support wowlan_stub = { .flags = WIPHY_WOWLAN_ANY, .n_patterns = 0, .pattern_max_len = 0, .pattern_min_len = 0, #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0)) .max_pkt_offset = 0, #endif }; #endif static struct ieee80211_rate rtw_rates[] = { RATETAB_ENT(10, 0x1, 0), RATETAB_ENT(20, 0x2, 0), RATETAB_ENT(55, 0x4, 0), RATETAB_ENT(110, 0x8, 0), RATETAB_ENT(60, 0x10, 0), RATETAB_ENT(90, 0x20, 0), RATETAB_ENT(120, 0x40, 0), RATETAB_ENT(180, 0x80, 0), RATETAB_ENT(240, 0x100, 0), RATETAB_ENT(360, 0x200, 0), RATETAB_ENT(480, 0x400, 0), RATETAB_ENT(540, 0x800, 0), }; #define rtw_a_rates (rtw_rates + 4) #define RTW_A_RATES_NUM 8 #define rtw_g_rates (rtw_rates + 0) #define RTW_G_RATES_NUM 12 #define RTW_2G_CHANNELS_NUM 14 #define RTW_5G_CHANNELS_NUM 37 static struct ieee80211_channel rtw_2ghz_channels[] = { CHAN2G(1, 2412, 0), CHAN2G(2, 2417, 0), CHAN2G(3, 2422, 0), CHAN2G(4, 2427, 0), CHAN2G(5, 2432, 0), CHAN2G(6, 2437, 0), CHAN2G(7, 2442, 0), CHAN2G(8, 2447, 0), CHAN2G(9, 2452, 0), CHAN2G(10, 2457, 0), CHAN2G(11, 2462, 0), CHAN2G(12, 2467, 0), CHAN2G(13, 2472, 0), CHAN2G(14, 2484, 0), }; static struct ieee80211_channel rtw_5ghz_a_channels[] = { CHAN5G(34, 0), CHAN5G(36, 0), CHAN5G(38, 0), CHAN5G(40, 0), CHAN5G(42, 0), CHAN5G(44, 0), CHAN5G(46, 0), CHAN5G(48, 0), CHAN5G(52, 0), CHAN5G(56, 0), CHAN5G(60, 0), CHAN5G(64, 0), CHAN5G(100, 0), CHAN5G(104, 0), CHAN5G(108, 0), CHAN5G(112, 0), CHAN5G(116, 0), CHAN5G(120, 0), CHAN5G(124, 0), CHAN5G(128, 0), CHAN5G(132, 0), CHAN5G(136, 0), CHAN5G(140, 0), CHAN5G(149, 0), CHAN5G(153, 0), CHAN5G(157, 0), CHAN5G(161, 0), CHAN5G(165, 0), CHAN5G(184, 0), CHAN5G(188, 0), CHAN5G(192, 0), CHAN5G(196, 0), CHAN5G(200, 0), CHAN5G(204, 0), CHAN5G(208, 0), CHAN5G(212, 0), CHAN5G(216, 0), }; void rtw_2g_channels_init(struct ieee80211_channel *channels) { _rtw_memcpy((void*)channels, (void*)rtw_2ghz_channels, sizeof(struct ieee80211_channel)*RTW_2G_CHANNELS_NUM ); } void rtw_5g_channels_init(struct ieee80211_channel *channels) { _rtw_memcpy((void*)channels, (void*)rtw_5ghz_a_channels, sizeof(struct ieee80211_channel)*RTW_5G_CHANNELS_NUM ); } void rtw_2g_rates_init(struct ieee80211_rate *rates) { _rtw_memcpy(rates, rtw_g_rates, sizeof(struct ieee80211_rate)*RTW_G_RATES_NUM ); } void rtw_5g_rates_init(struct ieee80211_rate *rates) { _rtw_memcpy(rates, rtw_a_rates, sizeof(struct ieee80211_rate)*RTW_A_RATES_NUM ); } struct ieee80211_supported_band *rtw_spt_band_alloc( enum ieee80211_band band ) { struct ieee80211_supported_band *spt_band = NULL; int n_channels, n_bitrates; if(band == IEEE80211_BAND_2GHZ) { n_channels = RTW_2G_CHANNELS_NUM; n_bitrates = RTW_G_RATES_NUM; } else if(band == IEEE80211_BAND_5GHZ) { n_channels = RTW_5G_CHANNELS_NUM; n_bitrates = RTW_A_RATES_NUM; } else { goto exit; } spt_band = (struct ieee80211_supported_band *)rtw_zmalloc( sizeof(struct ieee80211_supported_band) + sizeof(struct ieee80211_channel)*n_channels + sizeof(struct ieee80211_rate)*n_bitrates ); if(!spt_band) goto exit; spt_band->channels = (struct ieee80211_channel*)(((u8*)spt_band)+sizeof(struct ieee80211_supported_band)); spt_band->bitrates= (struct ieee80211_rate*)(((u8*)spt_band->channels)+sizeof(struct ieee80211_channel)*n_channels); spt_band->band = band; spt_band->n_channels = n_channels; spt_band->n_bitrates = n_bitrates; if(band == IEEE80211_BAND_2GHZ) { rtw_2g_channels_init(spt_band->channels); rtw_2g_rates_init(spt_band->bitrates); } else if(band == IEEE80211_BAND_5GHZ) { rtw_5g_channels_init(spt_band->channels); rtw_5g_rates_init(spt_band->bitrates); } //spt_band.ht_cap exit: return spt_band; } void rtw_spt_band_free(struct ieee80211_supported_band *spt_band) { u32 size = 0; if(!spt_band) return; if(spt_band->band == IEEE80211_BAND_2GHZ) { size = sizeof(struct ieee80211_supported_band) + sizeof(struct ieee80211_channel)*RTW_2G_CHANNELS_NUM + sizeof(struct ieee80211_rate)*RTW_G_RATES_NUM; } else if(spt_band->band == IEEE80211_BAND_5GHZ) { size = sizeof(struct ieee80211_supported_band) + sizeof(struct ieee80211_channel)*RTW_5G_CHANNELS_NUM + sizeof(struct ieee80211_rate)*RTW_A_RATES_NUM; } else { } rtw_mfree((u8*)spt_band, size); } #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) static const struct ieee80211_txrx_stypes rtw_cfg80211_default_mgmt_stypes[NUM_NL80211_IFTYPES] = { [NL80211_IFTYPE_ADHOC] = { .tx = 0xffff, .rx = BIT(IEEE80211_STYPE_ACTION >> 4) }, [NL80211_IFTYPE_STATION] = { .tx = 0xffff, .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | BIT(IEEE80211_STYPE_PROBE_REQ >> 4) }, [NL80211_IFTYPE_AP] = { .tx = 0xffff, .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | BIT(IEEE80211_STYPE_DISASSOC >> 4) | BIT(IEEE80211_STYPE_AUTH >> 4) | BIT(IEEE80211_STYPE_DEAUTH >> 4) | BIT(IEEE80211_STYPE_ACTION >> 4) }, [NL80211_IFTYPE_AP_VLAN] = { /* copy AP */ .tx = 0xffff, .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | BIT(IEEE80211_STYPE_DISASSOC >> 4) | BIT(IEEE80211_STYPE_AUTH >> 4) | BIT(IEEE80211_STYPE_DEAUTH >> 4) | BIT(IEEE80211_STYPE_ACTION >> 4) }, [NL80211_IFTYPE_P2P_CLIENT] = { .tx = 0xffff, .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | BIT(IEEE80211_STYPE_PROBE_REQ >> 4) }, [NL80211_IFTYPE_P2P_GO] = { .tx = 0xffff, .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | BIT(IEEE80211_STYPE_DISASSOC >> 4) | BIT(IEEE80211_STYPE_AUTH >> 4) | BIT(IEEE80211_STYPE_DEAUTH >> 4) | BIT(IEEE80211_STYPE_ACTION >> 4) }, }; #endif static int rtw_ieee80211_channel_to_frequency(int chan, int band) { /* see 802.11 17.3.8.3.2 and Annex J * there are overlapping channel numbers in 5GHz and 2GHz bands */ if (band == IEEE80211_BAND_5GHZ) { if (chan >= 182 && chan <= 196) return 4000 + chan * 5; else return 5000 + chan * 5; } else { /* IEEE80211_BAND_2GHZ */ if (chan == 14) return 2484; else if (chan < 14) return 2407 + chan * 5; else return 0; /* not supported */ } } static u64 rtw_get_systime_us(void) { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,39)) struct timespec ts; get_monotonic_boottime(&ts); return ((u64)ts.tv_sec*1000000) + ts.tv_nsec / 1000; #else struct timeval tv; do_gettimeofday(&tv); return ((u64)tv.tv_sec*1000000) + tv.tv_usec; #endif } #define MAX_BSSINFO_LEN 1000 struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork) { struct ieee80211_channel *notify_channel; struct cfg80211_bss *bss = NULL; //struct ieee80211_supported_band *band; u16 channel; u32 freq; u64 notify_timestamp; u16 notify_capability; u16 notify_interval; u8 *notify_ie; size_t notify_ielen; s32 notify_signal; //u8 buf[MAX_BSSINFO_LEN]; u8 *pbuf; size_t buf_size = MAX_BSSINFO_LEN; size_t len,bssinf_len=0; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; struct wireless_dev *wdev = padapter->rtw_wdev; struct wiphy *wiphy = wdev->wiphy; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); pbuf = rtw_zmalloc(buf_size); if(pbuf == NULL){ DBG_871X("%s pbuf allocate failed !! \n",__FUNCTION__); return bss; } //DBG_8192C("%s\n", __func__); bssinf_len = pnetwork->network.IELength+sizeof (struct rtw_ieee80211_hdr_3addr); if(bssinf_len > buf_size){ DBG_871X("%s IE Length too long > %zu byte \n",__FUNCTION__,buf_size); goto exit; } #ifndef CONFIG_WAPI_SUPPORT { u16 wapi_len = 0; if(rtw_get_wapi_ie(pnetwork->network.IEs, pnetwork->network.IELength, NULL, &wapi_len)>0) { if(wapi_len > 0) { DBG_871X("%s, no support wapi!\n",__FUNCTION__); goto exit; } } } #endif //!CONFIG_WAPI_SUPPORT //To reduce PBC Overlap rate //_enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); if(adapter_wdev_data(padapter)->scan_request != NULL) { u8 *psr=NULL, sr = 0; NDIS_802_11_SSID *pssid = &pnetwork->network.Ssid; struct cfg80211_scan_request *request = adapter_wdev_data(padapter)->scan_request; struct cfg80211_ssid *ssids = request->ssids; u32 wpsielen=0; u8 *wpsie=NULL; wpsie = rtw_get_wps_ie(pnetwork->network.IEs+_FIXED_IE_LENGTH_, pnetwork->network.IELength-_FIXED_IE_LENGTH_, NULL, &wpsielen); if(wpsie && wpsielen>0) psr = rtw_get_wps_attr_content(wpsie, wpsielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); if (sr != 0) { if(request->n_ssids == 1 && request->n_channels == 1) // it means under processing WPS { DBG_8192C("ssid=%s, len=%d\n", pssid->Ssid, pssid->SsidLength); if (ssids[0].ssid_len == 0) { } else if(pssid->SsidLength == ssids[0].ssid_len && _rtw_memcmp(pssid->Ssid, ssids[0].ssid, ssids[0].ssid_len)) { DBG_871X("%s, got sr and ssid match!\n", __func__); } else { if(psr !=NULL) *psr = 0; //clear sr #if 0 WLAN_BSSID_EX *pselect_network = &pnetwork->network; struct cfg80211_bss *pselect_bss = NULL; struct ieee80211_channel *notify_channel = NULL; u32 freq; DBG_871X("%s, got sr, but ssid mismatch, to remove this bss\n", __func__); if (pselect_network->Configuration.DSConfig <= RTW_CH_MAX_2G_CHANNEL) freq = rtw_ieee80211_channel_to_frequency(pselect_network->Configuration.DSConfig, IEEE80211_BAND_2GHZ); else freq = rtw_ieee80211_channel_to_frequency(pselect_network->Configuration.DSConfig, IEEE80211_BAND_5GHZ); notify_channel = ieee80211_get_channel(wiphy, freq); pselect_bss = cfg80211_get_bss(wiphy, NULL/*notify_channel*/, pselect_network->MacAddress, pselect_network->Ssid.Ssid, pselect_network->Ssid.SsidLength, 0/*WLAN_CAPABILITY_ESS*/, 0/*WLAN_CAPABILITY_ESS*/); if(pselect_bss) { DBG_871X("%s, got bss for cfg80211 for unlinking bss\n", __func__); cfg80211_unlink_bss(wiphy, pselect_bss); #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) cfg80211_put_bss(wiphy, pselect_bss); #else cfg80211_put_bss(pselect_bss); #endif } goto exit; #endif } } } } //_exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); channel = pnetwork->network.Configuration.DSConfig; if (channel <= RTW_CH_MAX_2G_CHANNEL) freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); else freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); notify_channel = ieee80211_get_channel(wiphy, freq); if (0) notify_timestamp = le64_to_cpu(*(u64*)rtw_get_timestampe_from_ie(pnetwork->network.IEs)); else notify_timestamp = rtw_get_systime_us(); notify_interval = le16_to_cpu(*(u16*)rtw_get_beacon_interval_from_ie(pnetwork->network.IEs)); notify_capability = le16_to_cpu(*(u16*)rtw_get_capability_from_ie(pnetwork->network.IEs)); notify_ie = pnetwork->network.IEs+_FIXED_IE_LENGTH_; notify_ielen = pnetwork->network.IELength-_FIXED_IE_LENGTH_; //We've set wiphy's signal_type as CFG80211_SIGNAL_TYPE_MBM: signal strength in mBm (100*dBm) if ( check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE && is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network, 0)) { notify_signal = 100*translate_percentage_to_dbm(padapter->recvpriv.signal_strength);//dbm } else { notify_signal = 100*translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength);//dbm } #if 0 DBG_8192C("bssid: "MAC_FMT"\n", MAC_ARG(pnetwork->network.MacAddress)); DBG_8192C("Channel: %d(%d)\n", channel, freq); DBG_8192C("Capability: %X\n", notify_capability); DBG_8192C("Beacon interval: %d\n", notify_interval); DBG_8192C("Signal: %d\n", notify_signal); DBG_8192C("notify_timestamp: %llu\n", notify_timestamp); #endif //pbuf = buf; pwlanhdr = (struct rtw_ieee80211_hdr *)pbuf; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); //pmlmeext->mgnt_seq++; if (pnetwork->network.Reserved[0] == 1) { // WIFI_BEACON _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); SetFrameSubType(pbuf, WIFI_BEACON); } else { _rtw_memcpy(pwlanhdr->addr1, myid(&(padapter->eeprompriv)), ETH_ALEN); SetFrameSubType(pbuf, WIFI_PROBERSP); } _rtw_memcpy(pwlanhdr->addr2, pnetwork->network.MacAddress, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, pnetwork->network.MacAddress, ETH_ALEN); //pbuf += sizeof(struct rtw_ieee80211_hdr_3addr); len = sizeof (struct rtw_ieee80211_hdr_3addr); _rtw_memcpy((pbuf+len), pnetwork->network.IEs, pnetwork->network.IELength); *((u64*)(pbuf+len)) = cpu_to_le64(notify_timestamp); len += pnetwork->network.IELength; //#ifdef CONFIG_P2P //if(rtw_get_p2p_ie(pnetwork->network.IEs+12, pnetwork->network.IELength-12, NULL, NULL)) //{ // DBG_8192C("%s, got p2p_ie\n", __func__); //} //#endif #if 1 bss = cfg80211_inform_bss_frame(wiphy, notify_channel, (struct ieee80211_mgmt *)pbuf, len, notify_signal, GFP_ATOMIC); #else bss = cfg80211_inform_bss(wiphy, notify_channel, (const u8 *)pnetwork->network.MacAddress, notify_timestamp, notify_capability, notify_interval, notify_ie, notify_ielen, notify_signal, GFP_ATOMIC/*GFP_KERNEL*/); #endif if (unlikely(!bss)) { DBG_8192C(FUNC_ADPT_FMT" bss NULL\n", FUNC_ADPT_ARG(padapter)); goto exit; } #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38)) #ifndef COMPAT_KERNEL_RELEASE //patch for cfg80211, update beacon ies to information_elements if (pnetwork->network.Reserved[0] == 1) { // WIFI_BEACON if(bss->len_information_elements != bss->len_beacon_ies) { bss->information_elements = bss->beacon_ies; bss->len_information_elements = bss->len_beacon_ies; } } #endif //COMPAT_KERNEL_RELEASE #endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38) /* { if( bss->information_elements == bss->proberesp_ies) { if( bss->len_information_elements != bss->len_proberesp_ies) { DBG_8192C("error!, len_information_elements != bss->len_proberesp_ies\n"); } } else if(bss->len_information_elements < bss->len_beacon_ies) { bss->information_elements = bss->beacon_ies; bss->len_information_elements = bss->len_beacon_ies; } } */ #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) cfg80211_put_bss(wiphy, bss); #else cfg80211_put_bss(bss); #endif exit: if(pbuf) rtw_mfree(pbuf, buf_size); return bss; } /* Check the given bss is valid by kernel API cfg80211_get_bss() @padapter : the given adapter return _TRUE if bss is valid, _FALSE for not found. */ int rtw_cfg80211_check_bss(_adapter *padapter) { WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); struct cfg80211_bss *bss = NULL; struct ieee80211_channel *notify_channel = NULL; u32 freq; if (!(pnetwork) || !(padapter->rtw_wdev)) return _FALSE; if (pnetwork->Configuration.DSConfig <= RTW_CH_MAX_2G_CHANNEL) freq = rtw_ieee80211_channel_to_frequency(pnetwork->Configuration.DSConfig, IEEE80211_BAND_2GHZ); else freq = rtw_ieee80211_channel_to_frequency(pnetwork->Configuration.DSConfig, IEEE80211_BAND_5GHZ); notify_channel = ieee80211_get_channel(padapter->rtw_wdev->wiphy, freq); bss = cfg80211_get_bss(padapter->rtw_wdev->wiphy, notify_channel, pnetwork->MacAddress, pnetwork->Ssid.Ssid, pnetwork->Ssid.SsidLength, WLAN_CAPABILITY_ESS, WLAN_CAPABILITY_ESS); #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) cfg80211_put_bss(padapter->rtw_wdev->wiphy, bss); #else cfg80211_put_bss(bss); #endif return (bss!=NULL); } void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wlan_network *cur_network = &(pmlmepriv->cur_network); struct wireless_dev *pwdev = padapter->rtw_wdev; struct cfg80211_bss *bss = NULL; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) struct wiphy *wiphy = pwdev->wiphy; int freq = (int)cur_network->network.Configuration.DSConfig; struct ieee80211_channel *chan; #endif DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); if (pwdev->iftype != NL80211_IFTYPE_ADHOC) { return; } if (!rtw_cfg80211_check_bss(padapter)) { WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); struct wlan_network *scanned = pmlmepriv->cur_network_scanned; if(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)==_TRUE) { _rtw_memcpy(&cur_network->network, pnetwork, sizeof(WLAN_BSSID_EX)); if(cur_network) { if (!rtw_cfg80211_inform_bss(padapter,cur_network)) DBG_871X(FUNC_ADPT_FMT" inform fail !!\n", FUNC_ADPT_ARG(padapter)); else DBG_871X(FUNC_ADPT_FMT" inform success !!\n", FUNC_ADPT_ARG(padapter)); } else { DBG_871X("cur_network is not exist!!!\n"); return ; } } else { if(scanned == NULL) rtw_warn_on(1); if (_rtw_memcmp(&(scanned->network.Ssid), &(pnetwork->Ssid), sizeof(NDIS_802_11_SSID)) == _TRUE && _rtw_memcmp(scanned->network.MacAddress, pnetwork->MacAddress, sizeof(NDIS_802_11_MAC_ADDRESS)) == _TRUE ) { if (!rtw_cfg80211_inform_bss(padapter,scanned)) { DBG_871X(FUNC_ADPT_FMT" inform fail !!\n", FUNC_ADPT_ARG(padapter)); } else { //DBG_871X(FUNC_ADPT_FMT" inform success !!\n", FUNC_ADPT_ARG(padapter)); } } else { DBG_871X("scanned & pnetwork compare fail\n"); rtw_warn_on(1); } } if (!rtw_cfg80211_check_bss(padapter)) DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" BSS not found !!\n", FUNC_ADPT_ARG(padapter)); } //notify cfg80211 that device joined an IBSS #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) chan = ieee80211_get_channel(wiphy, freq); cfg80211_ibss_joined(padapter->pnetdev, cur_network->network.MacAddress, chan, GFP_ATOMIC); #else cfg80211_ibss_joined(padapter->pnetdev, cur_network->network.MacAddress, GFP_ATOMIC); #endif } void rtw_cfg80211_indicate_connect(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wlan_network *cur_network = &(pmlmepriv->cur_network); struct wireless_dev *pwdev = padapter->rtw_wdev; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo= &(padapter->wdinfo); #endif struct cfg80211_bss *bss = NULL; DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); if (pwdev->iftype != NL80211_IFTYPE_STATION #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT #endif ) { return; } if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) return; #ifdef CONFIG_P2P if(pwdinfo->driver_interface == DRIVER_CFG80211 ) { if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); DBG_8192C("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); } } #endif //CONFIG_P2P { WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); struct wlan_network *scanned = pmlmepriv->cur_network_scanned; //DBG_871X(FUNC_ADPT_FMT" BSS not found\n", FUNC_ADPT_ARG(padapter)); if(scanned == NULL) { rtw_warn_on(1); goto check_bss; } if (_rtw_memcmp(scanned->network.MacAddress, pnetwork->MacAddress, sizeof(NDIS_802_11_MAC_ADDRESS)) == _TRUE && _rtw_memcmp(&(scanned->network.Ssid), &(pnetwork->Ssid), sizeof(NDIS_802_11_SSID)) == _TRUE ) { if (!rtw_cfg80211_inform_bss(padapter,scanned)) { DBG_871X(FUNC_ADPT_FMT" inform fail !!\n", FUNC_ADPT_ARG(padapter)); } else { //DBG_871X(FUNC_ADPT_FMT" inform success !!\n", FUNC_ADPT_ARG(padapter)); } } else { DBG_871X("scanned: %s("MAC_FMT"), cur: %s("MAC_FMT")\n", scanned->network.Ssid.Ssid, MAC_ARG(scanned->network.MacAddress), pnetwork->Ssid.Ssid, MAC_ARG(pnetwork->MacAddress) ); rtw_warn_on(1); } } check_bss: if (!rtw_cfg80211_check_bss(padapter)) DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" BSS not found !!\n", FUNC_ADPT_ARG(padapter)); if (rtw_to_roam(padapter) > 0) { #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) || defined(COMPAT_KERNEL_RELEASE) struct wiphy *wiphy = pwdev->wiphy; struct ieee80211_channel *notify_channel; u32 freq; u16 channel = cur_network->network.Configuration.DSConfig; if (channel <= RTW_CH_MAX_2G_CHANNEL) freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); else freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); notify_channel = ieee80211_get_channel(wiphy, freq); #endif DBG_871X(FUNC_ADPT_FMT" call cfg80211_roamed\n", FUNC_ADPT_ARG(padapter)); cfg80211_roamed(padapter->pnetdev #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) || defined(COMPAT_KERNEL_RELEASE) , notify_channel #endif , cur_network->network.MacAddress , pmlmepriv->assoc_req+sizeof(struct rtw_ieee80211_hdr_3addr)+2 , pmlmepriv->assoc_req_len-sizeof(struct rtw_ieee80211_hdr_3addr)-2 , pmlmepriv->assoc_rsp+sizeof(struct rtw_ieee80211_hdr_3addr)+6 , pmlmepriv->assoc_rsp_len-sizeof(struct rtw_ieee80211_hdr_3addr)-6 , GFP_ATOMIC); } else { #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) DBG_8192C("pwdev->sme_state(b)=%d\n", pwdev->sme_state); #endif cfg80211_connect_result(padapter->pnetdev, cur_network->network.MacAddress , pmlmepriv->assoc_req+sizeof(struct rtw_ieee80211_hdr_3addr)+2 , pmlmepriv->assoc_req_len-sizeof(struct rtw_ieee80211_hdr_3addr)-2 , pmlmepriv->assoc_rsp+sizeof(struct rtw_ieee80211_hdr_3addr)+6 , pmlmepriv->assoc_rsp_len-sizeof(struct rtw_ieee80211_hdr_3addr)-6 , WLAN_STATUS_SUCCESS, GFP_ATOMIC); #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) DBG_8192C("pwdev->sme_state(a)=%d\n", pwdev->sme_state); #endif } } void rtw_cfg80211_indicate_disconnect(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wireless_dev *pwdev = padapter->rtw_wdev; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo= &(padapter->wdinfo); #endif DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); if (pwdev->iftype != NL80211_IFTYPE_STATION #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT #endif ) { return; } if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) return; #ifdef CONFIG_P2P if( pwdinfo->driver_interface == DRIVER_CFG80211 ) { if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); DBG_8192C("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); } } #endif //CONFIG_P2P if (!padapter->mlmepriv.not_indic_disco) { #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) DBG_8192C("pwdev->sme_state(b)=%d\n", pwdev->sme_state); if(pwdev->sme_state==CFG80211_SME_CONNECTING) cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0, WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC/*GFP_KERNEL*/); else if(pwdev->sme_state==CFG80211_SME_CONNECTED) cfg80211_disconnected(padapter->pnetdev, 0, NULL, 0, GFP_ATOMIC); //else //DBG_8192C("pwdev->sme_state=%d\n", pwdev->sme_state); DBG_8192C("pwdev->sme_state(a)=%d\n", pwdev->sme_state); #else if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) cfg80211_disconnected(padapter->pnetdev, 0, NULL, 0, GFP_ATOMIC); else cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0, WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC/*GFP_KERNEL*/); #endif } } #ifdef CONFIG_AP_MODE static int rtw_cfg80211_ap_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) { int ret = 0; u32 wep_key_idx, wep_key_len,wep_total_len; struct sta_info *psta = NULL, *pbcmc_sta = NULL; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv* psecuritypriv=&(padapter->securitypriv); struct sta_priv *pstapriv = &padapter->stapriv; DBG_8192C("%s\n", __FUNCTION__); param->u.crypt.err = 0; param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; //sizeof(struct ieee_param) = 64 bytes; //if (param_len != (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) if (param_len != sizeof(struct ieee_param) + param->u.crypt.key_len) { ret = -EINVAL; goto exit; } if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) { if (param->u.crypt.idx >= WEP_KEYS) { ret = -EINVAL; goto exit; } } else { psta = rtw_get_stainfo(pstapriv, param->sta_addr); if(!psta) { //ret = -EINVAL; DBG_8192C("rtw_set_encryption(), sta has already been removed or never been added\n"); goto exit; } } if (strcmp(param->u.crypt.alg, "none") == 0 && (psta==NULL)) { //todo:clear default encryption keys DBG_8192C("clear default encryption keys, keyid=%d\n", param->u.crypt.idx); goto exit; } if (strcmp(param->u.crypt.alg, "WEP") == 0 && (psta==NULL)) { DBG_8192C("r871x_set_encryption, crypt.alg = WEP\n"); wep_key_idx = param->u.crypt.idx; wep_key_len = param->u.crypt.key_len; DBG_8192C("r871x_set_encryption, wep_key_idx=%d, len=%d\n", wep_key_idx, wep_key_len); if((wep_key_idx >= WEP_KEYS) || (wep_key_len<=0)) { ret = -EINVAL; goto exit; } if (wep_key_len > 0) { wep_key_len = wep_key_len <= 5 ? 5 : 13; } if (psecuritypriv->bWepDefaultKeyIdxSet == 0) { //wep default key has not been set, so use this key index as default key. psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; psecuritypriv->dot11PrivacyAlgrthm=_WEP40_; psecuritypriv->dot118021XGrpPrivacy=_WEP40_; if(wep_key_len == 13) { psecuritypriv->dot11PrivacyAlgrthm=_WEP104_; psecuritypriv->dot118021XGrpPrivacy=_WEP104_; } psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; } _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), param->u.crypt.key, wep_key_len); psecuritypriv->dot11DefKeylen[wep_key_idx] = wep_key_len; rtw_ap_set_wep_key(padapter, param->u.crypt.key, wep_key_len, wep_key_idx, 1); goto exit; } if(!psta && check_fwstate(pmlmepriv, WIFI_AP_STATE)) // //group key { if(param->u.crypt.set_tx == 0) //group key { if(strcmp(param->u.crypt.alg, "WEP") == 0) { DBG_8192C("%s, set group_key, WEP\n", __FUNCTION__); _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); psecuritypriv->dot118021XGrpPrivacy = _WEP40_; if(param->u.crypt.key_len==13) { psecuritypriv->dot118021XGrpPrivacy = _WEP104_; } } else if(strcmp(param->u.crypt.alg, "TKIP") == 0) { DBG_8192C("%s, set group_key, TKIP\n", __FUNCTION__); psecuritypriv->dot118021XGrpPrivacy = _TKIP_; _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); //set mic key _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); psecuritypriv->busetkipkey = _TRUE; } else if(strcmp(param->u.crypt.alg, "CCMP") == 0) { DBG_8192C("%s, set group_key, CCMP\n", __FUNCTION__); psecuritypriv->dot118021XGrpPrivacy = _AES_; _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); } else { DBG_8192C("%s, set group_key, none\n", __FUNCTION__); psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; } psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; psecuritypriv->binstallGrpkey = _TRUE; psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! rtw_ap_set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); pbcmc_sta=rtw_get_bcmc_stainfo(padapter); if(pbcmc_sta) { pbcmc_sta->ieee8021x_blocked = _FALSE; pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy } } goto exit; } if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) // psk/802_1x { if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { if(param->u.crypt.set_tx ==1) //pairwise key { _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); if(strcmp(param->u.crypt.alg, "WEP") == 0) { DBG_8192C("%s, set pairwise key, WEP\n", __FUNCTION__); psta->dot118021XPrivacy = _WEP40_; if(param->u.crypt.key_len==13) { psta->dot118021XPrivacy = _WEP104_; } } else if(strcmp(param->u.crypt.alg, "TKIP") == 0) { DBG_8192C("%s, set pairwise key, TKIP\n", __FUNCTION__); psta->dot118021XPrivacy = _TKIP_; //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); //set mic key _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); psecuritypriv->busetkipkey = _TRUE; } else if(strcmp(param->u.crypt.alg, "CCMP") == 0) { DBG_8192C("%s, set pairwise key, CCMP\n", __FUNCTION__); psta->dot118021XPrivacy = _AES_; } else { DBG_8192C("%s, set pairwise key, none\n", __FUNCTION__); psta->dot118021XPrivacy = _NO_PRIVACY_; } rtw_ap_set_pairwise_key(padapter, psta); psta->ieee8021x_blocked = _FALSE; psta->bpairwise_key_installed = _TRUE; } else//group key??? { if(strcmp(param->u.crypt.alg, "WEP") == 0) { _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); psecuritypriv->dot118021XGrpPrivacy = _WEP40_; if(param->u.crypt.key_len==13) { psecuritypriv->dot118021XGrpPrivacy = _WEP104_; } } else if(strcmp(param->u.crypt.alg, "TKIP") == 0) { psecuritypriv->dot118021XGrpPrivacy = _TKIP_; _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); //set mic key _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); psecuritypriv->busetkipkey = _TRUE; } else if(strcmp(param->u.crypt.alg, "CCMP") == 0) { psecuritypriv->dot118021XGrpPrivacy = _AES_; _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); } else { psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; } psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; psecuritypriv->binstallGrpkey = _TRUE; psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! rtw_ap_set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); pbcmc_sta=rtw_get_bcmc_stainfo(padapter); if(pbcmc_sta) { pbcmc_sta->ieee8021x_blocked = _FALSE; pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy } } } } exit: return ret; } #endif static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) { int ret = 0; u32 wep_key_idx, wep_key_len,wep_total_len; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; #ifdef CONFIG_P2P struct wifidirect_info* pwdinfo = &padapter->wdinfo; #endif //CONFIG_P2P _func_enter_; DBG_8192C("%s\n", __func__); param->u.crypt.err = 0; param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; if (param_len < (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) { ret = -EINVAL; goto exit; } if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) { if (param->u.crypt.idx >= WEP_KEYS #ifdef CONFIG_IEEE80211W && param->u.crypt.idx > BIP_MAX_KEYID #endif //CONFIG_IEEE80211W ) { ret = -EINVAL; goto exit; } } else { #ifdef CONFIG_WAPI_SUPPORT if (strcmp(param->u.crypt.alg, "SMS4")) #endif { ret = -EINVAL; goto exit; } } if (strcmp(param->u.crypt.alg, "WEP") == 0) { RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("wpa_set_encryption, crypt.alg = WEP\n")); DBG_8192C("wpa_set_encryption, crypt.alg = WEP\n"); wep_key_idx = param->u.crypt.idx; wep_key_len = param->u.crypt.key_len; if ((wep_key_idx > WEP_KEYS) || (wep_key_len <= 0)) { ret = -EINVAL; goto exit; } if (psecuritypriv->bWepDefaultKeyIdxSet == 0) { //wep default key has not been set, so use this key index as default key. wep_key_len = wep_key_len <= 5 ? 5 : 13; psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; psecuritypriv->dot118021XGrpPrivacy = _WEP40_; if(wep_key_len==13) { psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; psecuritypriv->dot118021XGrpPrivacy = _WEP104_; } psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; } _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), param->u.crypt.key, wep_key_len); psecuritypriv->dot11DefKeylen[wep_key_idx] = wep_key_len; rtw_set_key(padapter, psecuritypriv, wep_key_idx, 0, _TRUE); goto exit; } if(padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) // 802_1x { struct sta_info * psta,*pbcmc_sta; struct sta_priv * pstapriv = &padapter->stapriv; //DBG_8192C("%s, : dot11AuthAlgrthm == dot11AuthAlgrthm_8021X \n", __func__); if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_MP_STATE) == _TRUE) //sta mode { psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); if (psta == NULL) { //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); DBG_8192C("%s, : Obtain Sta_info fail \n", __func__); } else { //Jeff: don't disable ieee8021x_blocked while clearing key if (strcmp(param->u.crypt.alg, "none") != 0) psta->ieee8021x_blocked = _FALSE; if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) { psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; } if(param->u.crypt.set_tx ==1)//pairwise key { DBG_8192C("%s, : param->u.crypt.set_tx ==1 \n", __func__); _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); if(strcmp(param->u.crypt.alg, "TKIP") == 0)//set mic key { //DEBUG_ERR(("\nset key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); padapter->securitypriv.busetkipkey=_FALSE; //_set_timer(&padapter->securitypriv.tkip_timer, 50); } //DEBUG_ERR((" param->u.crypt.key_len=%d\n",param->u.crypt.key_len)); DBG_871X(" ~~~~set sta key:unicastkey\n"); rtw_setstakey_cmd(padapter, psta, _TRUE, _TRUE); } else//group key { if(strcmp(param->u.crypt.alg, "TKIP") == 0 || strcmp(param->u.crypt.alg, "CCMP") == 0) { _rtw_memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); _rtw_memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[16]),8); _rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[24]),8); padapter->securitypriv.binstallGrpkey = _TRUE; //DEBUG_ERR((" param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); DBG_871X(" ~~~~set sta key:groupkey\n"); padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; rtw_set_key(padapter,&padapter->securitypriv,param->u.crypt.idx, 1, _TRUE); } #ifdef CONFIG_IEEE80211W else if(strcmp(param->u.crypt.alg, "BIP") == 0) { int no; //DBG_871X("BIP key_len=%d , index=%d @@@@@@@@@@@@@@@@@@\n", param->u.crypt.key_len, param->u.crypt.idx); //save the IGTK key, length 16 bytes _rtw_memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); /*DBG_871X("IGTK key below:\n"); for(no=0;no<16;no++) printk(" %02x ", padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey[no]); DBG_871X("\n");*/ padapter->securitypriv.dot11wBIPKeyid = param->u.crypt.idx; padapter->securitypriv.binstallBIPkey = _TRUE; DBG_871X(" ~~~~set sta key:IGKT\n"); } #endif //CONFIG_IEEE80211W #ifdef CONFIG_P2P if(pwdinfo->driver_interface == DRIVER_CFG80211 ) { if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) { rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_DONE); } } #endif //CONFIG_P2P } } pbcmc_sta=rtw_get_bcmc_stainfo(padapter); if(pbcmc_sta==NULL) { //DEBUG_ERR( ("Set OID_802_11_ADD_KEY: bcmc stainfo is null \n")); } else { //Jeff: don't disable ieee8021x_blocked while clearing key if (strcmp(param->u.crypt.alg, "none") != 0) pbcmc_sta->ieee8021x_blocked = _FALSE; if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) { pbcmc_sta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; } } } else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) //adhoc mode { } } #ifdef CONFIG_WAPI_SUPPORT if (strcmp(param->u.crypt.alg, "SMS4") == 0) { PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; PRT_WAPI_STA_INFO pWapiSta; u8 WapiASUEPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; if(param->u.crypt.set_tx == 1) { list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { if(_rtw_memcmp(pWapiSta->PeerMacAddr,param->sta_addr,6)) { _rtw_memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16); pWapiSta->wapiUsk.bSet = true; _rtw_memcpy(pWapiSta->wapiUsk.dataKey,param->u.crypt.key,16); _rtw_memcpy(pWapiSta->wapiUsk.micKey,param->u.crypt.key+16,16); pWapiSta->wapiUsk.keyId = param->u.crypt.idx ; pWapiSta->wapiUsk.bTxEnable = true; _rtw_memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiAEPNInitialValueSrc,16); _rtw_memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiAEPNInitialValueSrc,16); _rtw_memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiAEPNInitialValueSrc,16); _rtw_memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiAEPNInitialValueSrc,16); _rtw_memcpy(pWapiSta->lastRxUnicastPN,WapiAEPNInitialValueSrc,16); pWapiSta->wapiUskUpdate.bTxEnable = false; pWapiSta->wapiUskUpdate.bSet = false; if (psecuritypriv->sw_encrypt== false || psecuritypriv->sw_decrypt == false) { //set unicast key for ASUE rtw_wapi_set_key(padapter, &pWapiSta->wapiUsk, pWapiSta, false, false); } } } } else { list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { if(_rtw_memcmp(pWapiSta->PeerMacAddr,get_bssid(pmlmepriv),6)) { pWapiSta->wapiMsk.bSet = true; _rtw_memcpy(pWapiSta->wapiMsk.dataKey,param->u.crypt.key,16); _rtw_memcpy(pWapiSta->wapiMsk.micKey,param->u.crypt.key+16,16); pWapiSta->wapiMsk.keyId = param->u.crypt.idx ; pWapiSta->wapiMsk.bTxEnable = false; if(!pWapiSta->bSetkeyOk) pWapiSta->bSetkeyOk = true; pWapiSta->bAuthenticateInProgress = false; _rtw_memcpy(pWapiSta->lastRxMulticastPN, WapiAEMultiCastPNInitialValueSrc, 16); if (psecuritypriv->sw_decrypt == false) { //set rx broadcast key for ASUE rtw_wapi_set_key(padapter, &pWapiSta->wapiMsk, pWapiSta, true, false); } } } } } #endif exit: DBG_8192C("%s, ret=%d\n", __func__, ret); _func_exit_; return ret; } static int cfg80211_rtw_add_key(struct wiphy *wiphy, struct net_device *ndev, #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) u8 key_index, bool pairwise, const u8 *mac_addr, #else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) u8 key_index, const u8 *mac_addr, #endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) struct key_params *params) { char *alg_name; u32 param_len; struct ieee_param *param = NULL; int ret=0; _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); struct wireless_dev *rtw_wdev = padapter->rtw_wdev; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; DBG_871X(FUNC_NDEV_FMT" adding key for %pM\n", FUNC_NDEV_ARG(ndev), mac_addr); DBG_871X("cipher=0x%x\n", params->cipher); DBG_871X("key_len=0x%x\n", params->key_len); DBG_871X("seq_len=0x%x\n", params->seq_len); DBG_871X("key_index=%d\n", key_index); #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) DBG_871X("pairwise=%d\n", pairwise); #endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) param_len = sizeof(struct ieee_param) + params->key_len; param = (struct ieee_param *)rtw_malloc(param_len); if (param == NULL) return -1; _rtw_memset(param, 0, param_len); param->cmd = IEEE_CMD_SET_ENCRYPTION; _rtw_memset(param->sta_addr, 0xff, ETH_ALEN); switch (params->cipher) { case IW_AUTH_CIPHER_NONE: //todo: remove key //remove = 1; alg_name = "none"; break; case WLAN_CIPHER_SUITE_WEP40: case WLAN_CIPHER_SUITE_WEP104: alg_name = "WEP"; break; case WLAN_CIPHER_SUITE_TKIP: alg_name = "TKIP"; break; case WLAN_CIPHER_SUITE_CCMP: alg_name = "CCMP"; break; #ifdef CONFIG_IEEE80211W case WLAN_CIPHER_SUITE_AES_CMAC: alg_name = "BIP"; break; #endif //CONFIG_IEEE80211W #ifdef CONFIG_WAPI_SUPPORT case WLAN_CIPHER_SUITE_SMS4: alg_name= "SMS4"; if(pairwise == NL80211_KEYTYPE_PAIRWISE) { if (key_index != 0 && key_index != 1) { ret = -ENOTSUPP; goto addkey_end; } _rtw_memcpy((void*)param->sta_addr, (void*)mac_addr, ETH_ALEN); } else { DBG_871X("mac_addr is null \n"); } DBG_871X("rtw_wx_set_enc_ext: SMS4 case \n"); break; #endif default: ret = -ENOTSUPP; goto addkey_end; } strncpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); if (!mac_addr || is_broadcast_ether_addr(mac_addr)) { param->u.crypt.set_tx = 0; //for wpa/wpa2 group key } else { param->u.crypt.set_tx = 1; //for wpa/wpa2 pairwise key } //param->u.crypt.idx = key_index - 1; param->u.crypt.idx = key_index; if (params->seq_len && params->seq) { _rtw_memcpy(param->u.crypt.seq, params->seq, params->seq_len); } if(params->key_len && params->key) { param->u.crypt.key_len = params->key_len; _rtw_memcpy(param->u.crypt.key, params->key, params->key_len); } if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) { ret = rtw_cfg80211_set_encryption(ndev, param, param_len); } else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { #ifdef CONFIG_AP_MODE if(mac_addr) _rtw_memcpy(param->sta_addr, (void*)mac_addr, ETH_ALEN); ret = rtw_cfg80211_ap_set_encryption(ndev, param, param_len); #endif } else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) { //DBG_8192C("@@@@@@@@@@ fw_state=0x%x, iftype=%d\n", pmlmepriv->fw_state, rtw_wdev->iftype); ret = rtw_cfg80211_set_encryption(ndev, param, param_len); } else { DBG_8192C("error! fw_state=0x%x, iftype=%d\n", pmlmepriv->fw_state, rtw_wdev->iftype); } addkey_end: if(param) { rtw_mfree((u8*)param, param_len); } return ret; } static int cfg80211_rtw_get_key(struct wiphy *wiphy, struct net_device *ndev, #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) u8 key_index, bool pairwise, const u8 *mac_addr, #else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) u8 key_index, const u8 *mac_addr, #endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) void *cookie, void (*callback)(void *cookie, struct key_params*)) { #if 0 struct iwm_priv *iwm = ndev_to_iwm(ndev); struct iwm_key *key = &iwm->keys[key_index]; struct key_params params; IWM_DBG_WEXT(iwm, DBG, "Getting key %d\n", key_index); memset(¶ms, 0, sizeof(params)); params.cipher = key->cipher; params.key_len = key->key_len; params.seq_len = key->seq_len; params.seq = key->seq; params.key = key->key; callback(cookie, ¶ms); return key->key_len ? 0 : -ENOENT; #endif DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); return 0; } static int cfg80211_rtw_del_key(struct wiphy *wiphy, struct net_device *ndev, #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) u8 key_index, bool pairwise, const u8 *mac_addr) #else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) u8 key_index, const u8 *mac_addr) #endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) { _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); struct security_priv *psecuritypriv = &padapter->securitypriv; DBG_871X(FUNC_NDEV_FMT" key_index=%d\n", FUNC_NDEV_ARG(ndev), key_index); if (key_index == psecuritypriv->dot11PrivacyKeyIndex) { //clear the flag of wep default key set. psecuritypriv->bWepDefaultKeyIdxSet = 0; } return 0; } static int cfg80211_rtw_set_default_key(struct wiphy *wiphy, struct net_device *ndev, u8 key_index #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) , bool unicast, bool multicast #endif ) { _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); struct security_priv *psecuritypriv = &padapter->securitypriv; DBG_871X(FUNC_NDEV_FMT" key_index=%d" #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ", unicast=%d, multicast=%d" #endif ".\n", FUNC_NDEV_ARG(ndev), key_index #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) , unicast, multicast #endif ); if ((key_index < WEP_KEYS) && ((psecuritypriv->dot11PrivacyAlgrthm == _WEP40_) || (psecuritypriv->dot11PrivacyAlgrthm == _WEP104_))) //set wep default key { psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; psecuritypriv->dot11PrivacyKeyIndex = key_index; psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; psecuritypriv->dot118021XGrpPrivacy = _WEP40_; if (psecuritypriv->dot11DefKeylen[key_index] == 13) { psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; psecuritypriv->dot118021XGrpPrivacy = _WEP104_; } psecuritypriv->bWepDefaultKeyIdxSet = 1; //set the flag to represent that wep default key has been set } return 0; } static int cfg80211_rtw_get_station(struct wiphy *wiphy, struct net_device *ndev, u8 *mac, struct station_info *sinfo) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct sta_info *psta = NULL; struct sta_priv *pstapriv = &padapter->stapriv; sinfo->filled = 0; if (!mac) { DBG_871X(FUNC_NDEV_FMT" mac==%p\n", FUNC_NDEV_ARG(ndev), mac); ret = -ENOENT; goto exit; } psta = rtw_get_stainfo(pstapriv, mac); if (psta == NULL) { DBG_8192C("%s, sta_info is null\n", __func__); ret = -ENOENT; goto exit; } #ifdef CONFIG_DEBUG_CFG80211 DBG_871X(FUNC_NDEV_FMT" mac="MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(mac)); #endif //for infra./P2PClient mode if( check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, _FW_LINKED) ) { struct wlan_network *cur_network = &(pmlmepriv->cur_network); if (_rtw_memcmp(mac, cur_network->network.MacAddress, ETH_ALEN) == _FALSE) { DBG_871X("%s, mismatch bssid="MAC_FMT"\n", __func__, MAC_ARG(cur_network->network.MacAddress)); ret = -ENOENT; goto exit; } sinfo->filled |= STATION_INFO_SIGNAL; sinfo->signal = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); sinfo->filled |= STATION_INFO_TX_BITRATE; sinfo->txrate.legacy = rtw_get_cur_max_rate(padapter); sinfo->filled |= STATION_INFO_RX_PACKETS; sinfo->rx_packets = sta_rx_data_pkts(psta); sinfo->filled |= STATION_INFO_TX_PACKETS; sinfo->tx_packets = psta->sta_stats.tx_pkts; } //for Ad-Hoc/AP mode if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) ||check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) ||check_fwstate(pmlmepriv, WIFI_AP_STATE)) && check_fwstate(pmlmepriv, _FW_LINKED) ) { //TODO: should acquire station info... } exit: return ret; } extern int netdev_open(struct net_device *pnetdev); #ifdef CONFIG_CONCURRENT_MODE extern int netdev_if2_open(struct net_device *pnetdev); #endif /* enum nl80211_iftype { NL80211_IFTYPE_UNSPECIFIED, NL80211_IFTYPE_ADHOC, //1 NL80211_IFTYPE_STATION, //2 NL80211_IFTYPE_AP, //3 NL80211_IFTYPE_AP_VLAN, NL80211_IFTYPE_WDS, NL80211_IFTYPE_MONITOR, //6 NL80211_IFTYPE_MESH_POINT, NL80211_IFTYPE_P2P_CLIENT, //8 NL80211_IFTYPE_P2P_GO, //9 //keep last NUM_NL80211_IFTYPES, NL80211_IFTYPE_MAX = NUM_NL80211_IFTYPES - 1 }; */ static int cfg80211_rtw_change_iface(struct wiphy *wiphy, struct net_device *ndev, enum nl80211_iftype type, u32 *flags, struct vif_params *params) { enum nl80211_iftype old_type; NDIS_802_11_NETWORK_INFRASTRUCTURE networkType; _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); struct wireless_dev *rtw_wdev = padapter->rtw_wdev; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo= &(padapter->wdinfo); #endif int ret = 0; u8 change = _FALSE; DBG_871X(FUNC_NDEV_FMT" type=%d\n", FUNC_NDEV_ARG(ndev), type); if(adapter_to_dvobj(padapter)->processing_dev_remove == _TRUE) { ret= -EPERM; goto exit; } #ifdef CONFIG_CONCURRENT_MODE if(padapter->adapter_type == SECONDARY_ADAPTER) { DBG_871X(FUNC_NDEV_FMT" call netdev_if2_open\n", FUNC_NDEV_ARG(ndev)); if(netdev_if2_open(ndev) != 0) { DBG_871X(FUNC_NDEV_FMT" call netdev_if2_open fail\n", FUNC_NDEV_ARG(ndev)); ret= -EPERM; goto exit; } } else if(padapter->adapter_type == PRIMARY_ADAPTER) #endif //CONFIG_CONCURRENT_MODE { DBG_871X(FUNC_NDEV_FMT" call netdev_open\n", FUNC_NDEV_ARG(ndev)); if(netdev_open(ndev) != 0) { DBG_871X(FUNC_NDEV_FMT" call netdev_open fail\n", FUNC_NDEV_ARG(ndev)); ret= -EPERM; goto exit; } } if(_FAIL == rtw_pwr_wakeup(padapter)) { DBG_871X(FUNC_NDEV_FMT" call rtw_pwr_wakeup fail\n", FUNC_NDEV_ARG(ndev)); ret= -EPERM; goto exit; } old_type = rtw_wdev->iftype; DBG_871X(FUNC_NDEV_FMT" old_iftype=%d, new_iftype=%d\n", FUNC_NDEV_ARG(ndev), old_type, type); if(old_type != type) { change = _TRUE; pmlmeext->action_public_rxseq = 0xffff; pmlmeext->action_public_dialog_token = 0xff; } switch (type) { case NL80211_IFTYPE_ADHOC: networkType = Ndis802_11IBSS; break; #if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) case NL80211_IFTYPE_P2P_CLIENT: #endif case NL80211_IFTYPE_STATION: networkType = Ndis802_11Infrastructure; #ifdef CONFIG_P2P if(pwdinfo->driver_interface == DRIVER_CFG80211 ) { if(change && rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { //it means remove GO and change mode from AP(GO) to station(P2P DEVICE) rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); DBG_8192C("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); } } #endif //CONFIG_P2P break; #if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) case NL80211_IFTYPE_P2P_GO: #endif case NL80211_IFTYPE_AP: networkType = Ndis802_11APMode; #ifdef CONFIG_P2P if(pwdinfo->driver_interface == DRIVER_CFG80211 ) { if(change && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { //it means P2P Group created, we will be GO and change mode from P2P DEVICE to AP(GO) rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); } } #endif //CONFIG_P2P break; default: ret = -EOPNOTSUPP; goto exit; } rtw_wdev->iftype = type; if (rtw_set_802_11_infrastructure_mode(padapter, networkType) ==_FALSE) { rtw_wdev->iftype = old_type; ret = -EPERM; goto exit; } rtw_setopmode_cmd(padapter, networkType,_TRUE); exit: DBG_871X(FUNC_NDEV_FMT" ret:%d\n", FUNC_NDEV_ARG(ndev), ret); return ret; } void rtw_cfg80211_indicate_scan_done(_adapter *adapter, bool aborted) { struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); _irqL irqL; _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); if (pwdev_priv->scan_request != NULL) { #ifdef CONFIG_DEBUG_CFG80211 DBG_871X("%s with scan req\n", __FUNCTION__); #endif /* avoid WARN_ON(request != wiphy_to_dev(request->wiphy)->scan_req); */ if(pwdev_priv->scan_request->wiphy != pwdev_priv->rtw_wdev->wiphy) { DBG_8192C("error wiphy compare\n"); } else { cfg80211_scan_done(pwdev_priv->scan_request, aborted); } pwdev_priv->scan_request = NULL; } else { #ifdef CONFIG_DEBUG_CFG80211 DBG_871X("%s without scan req\n", __FUNCTION__); #endif } _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); } void rtw_cfg80211_unlink_bss(_adapter *padapter, struct wlan_network *pnetwork) { struct wireless_dev *pwdev = padapter->rtw_wdev; struct wiphy *wiphy = pwdev->wiphy; struct cfg80211_bss *bss = NULL; WLAN_BSSID_EX select_network = pnetwork->network; bss = cfg80211_get_bss(wiphy, NULL/*notify_channel*/, select_network.MacAddress, select_network.Ssid.Ssid, select_network.Ssid.SsidLength, 0/*WLAN_CAPABILITY_ESS*/, 0/*WLAN_CAPABILITY_ESS*/); if (bss) { cfg80211_unlink_bss(wiphy, bss); DBG_8192C("%s(): cfg80211_unlink %s!! () ",__func__,select_network.Ssid.Ssid ); #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) cfg80211_put_bss(padapter->rtw_wdev->wiphy, bss); #else cfg80211_put_bss(bss); #endif } return; } void rtw_cfg80211_surveydone_event_callback(_adapter *padapter) { _irqL irqL; _list *plist, *phead; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; u32 cnt=0; u32 wait_for_surveydone; sint wait_status; #ifdef CONFIG_P2P struct wifidirect_info* pwdinfo = &padapter->wdinfo; #endif //CONFIG_P2P struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("%s\n", __func__); #endif _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); phead = get_list_head(queue); plist = get_next(phead); while(1) { if (rtw_end_of_queue_search(phead,plist)== _TRUE) break; pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); //report network only if the current channel set contains the channel to which this network belongs if(rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig) >= 0 && rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid)) ) { //ev=translate_scan(padapter, a, pnetwork, ev, stop); rtw_cfg80211_inform_bss(padapter, pnetwork); } /* //check ralink testbed RSN IE length { if(_rtw_memcmp(pnetwork->network.Ssid.Ssid, "Ralink_11n_AP",13)) { uint ie_len=0; u8 *p=NULL; p = rtw_get_ie(pnetwork->network.IEs + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pnetwork->network.IELength - _BEACON_IE_OFFSET_)); DBG_871X("ie_len=%d\n", ie_len); } }*/ plist = get_next(plist); } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); } static int rtw_cfg80211_set_probe_req_wpsp2pie(_adapter *padapter, char *buf, int len) { int ret = 0; uint wps_ielen = 0; u8 *wps_ie; u32 p2p_ielen = 0; u8 *p2p_ie; u32 wfd_ielen = 0; u8 *wfd_ie; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("%s, ielen=%d\n", __func__, len); #endif if(len>0) { if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) { #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("probe_req_wps_ielen=%d\n", wps_ielen); #endif if(pmlmepriv->wps_probe_req_ie) { u32 free_len = pmlmepriv->wps_probe_req_ie_len; pmlmepriv->wps_probe_req_ie_len = 0; rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); pmlmepriv->wps_probe_req_ie = NULL; } pmlmepriv->wps_probe_req_ie = rtw_malloc(wps_ielen); if ( pmlmepriv->wps_probe_req_ie == NULL) { DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } _rtw_memcpy(pmlmepriv->wps_probe_req_ie, wps_ie, wps_ielen); pmlmepriv->wps_probe_req_ie_len = wps_ielen; } //buf += wps_ielen; //len -= wps_ielen; #ifdef CONFIG_P2P if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) { struct wifidirect_info *wdinfo = &padapter->wdinfo; u32 attr_contentlen = 0; u8 listen_ch_attr[5]; #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("probe_req_p2p_ielen=%d\n", p2p_ielen); #endif if(pmlmepriv->p2p_probe_req_ie) { u32 free_len = pmlmepriv->p2p_probe_req_ie_len; pmlmepriv->p2p_probe_req_ie_len = 0; rtw_mfree(pmlmepriv->p2p_probe_req_ie, free_len); pmlmepriv->p2p_probe_req_ie = NULL; } pmlmepriv->p2p_probe_req_ie = rtw_malloc(p2p_ielen); if ( pmlmepriv->p2p_probe_req_ie == NULL) { DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } _rtw_memcpy(pmlmepriv->p2p_probe_req_ie, p2p_ie, p2p_ielen); pmlmepriv->p2p_probe_req_ie_len = p2p_ielen; if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_LISTEN_CH, (u8*)listen_ch_attr, (uint*) &attr_contentlen) && attr_contentlen == 5) { if (wdinfo->listen_channel != listen_ch_attr[4]) { DBG_871X(FUNC_ADPT_FMT" listen channel - country:%c%c%c, class:%u, ch:%u\n", FUNC_ADPT_ARG(padapter), listen_ch_attr[0], listen_ch_attr[1], listen_ch_attr[2], listen_ch_attr[3], listen_ch_attr[4]); wdinfo->listen_channel = listen_ch_attr[4]; } } } #endif //CONFIG_P2P //buf += p2p_ielen; //len -= p2p_ielen; #ifdef CONFIG_WFD if(rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen)) { #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("probe_req_wfd_ielen=%d\n", wfd_ielen); #endif if(pmlmepriv->wfd_probe_req_ie) { u32 free_len = pmlmepriv->wfd_probe_req_ie_len; pmlmepriv->wfd_probe_req_ie_len = 0; rtw_mfree(pmlmepriv->wfd_probe_req_ie, free_len); pmlmepriv->wfd_probe_req_ie = NULL; } pmlmepriv->wfd_probe_req_ie = rtw_malloc(wfd_ielen); if ( pmlmepriv->wfd_probe_req_ie == NULL) { DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } rtw_get_wfd_ie(buf, len, pmlmepriv->wfd_probe_req_ie, &pmlmepriv->wfd_probe_req_ie_len); } #endif //CONFIG_WFD } return ret; } static int cfg80211_rtw_scan(struct wiphy *wiphy #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) , struct net_device *ndev #endif , struct cfg80211_scan_request *request) { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) struct net_device *ndev = wdev_to_ndev(request->wdev); #endif int i; u8 _status = _FALSE; int ret = 0; NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; struct rtw_ieee80211_channel ch[RTW_CHANNEL_SCAN_AMOUNT]; _irqL irqL; u8 *wps_ie=NULL; uint wps_ielen=0; u8 *p2p_ie=NULL; uint p2p_ielen=0; u8 survey_times=3; u8 survey_times_for_one_ch=6; struct cfg80211_ssid *ssids = request->ssids; int social_channel = 0, j = 0; bool need_indicate_scan_done = _FALSE; _adapter *padapter; struct rtw_wdev_priv *pwdev_priv; struct mlme_priv *pmlmepriv; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo; #endif //CONFIG_P2P #ifdef CONFIG_CONCURRENT_MODE PADAPTER pbuddy_adapter = NULL; struct mlme_priv *pbuddy_mlmepriv = NULL; #endif //CONFIG_CONCURRENT_MODE if (ndev == NULL) { ret = -EINVAL; goto exit; } padapter = (_adapter *)rtw_netdev_priv(ndev); pwdev_priv = adapter_wdev_data(padapter); pmlmepriv= &padapter->mlmepriv; #ifdef CONFIG_P2P pwdinfo= &(padapter->wdinfo); #endif //CONFIG_P2P //#ifdef CONFIG_DEBUG_CFG80211 DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); //#endif #ifdef CONFIG_CONCURRENT_MODE if (padapter->pbuddy_adapter) { pbuddy_adapter = padapter->pbuddy_adapter; pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); } #endif //CONFIG_CONCURRENT_MODE #ifdef CONFIG_MP_INCLUDED if (padapter->registrypriv.mp_mode == 1) { DBG_871X(FUNC_ADPT_FMT ": MP mode block Scan request\n", FUNC_ADPT_ARG(padapter)); ret = -EPERM; goto exit; } #ifdef CONFIG_CONCURRENT_MODE if (padapter->pbuddy_adapter) { if (padapter->pbuddy_adapter->registrypriv.mp_mode == 1) { DBG_871X(FUNC_ADPT_FMT ": MP mode block Scan request\n", FUNC_ADPT_ARG(padapter->pbuddy_adapter)); ret = -EPERM; goto exit; } } #endif //CONFIG_CONCURRENT_MODE #endif _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); pwdev_priv->scan_request = request; _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { #ifdef CONFIG_DEBUG_CFG80211 DBG_871X("%s under WIFI_AP_STATE\n", __FUNCTION__); #endif if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS|_FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) { DBG_8192C("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) { DBG_8192C("AP mode process WPS \n"); } need_indicate_scan_done = _TRUE; goto check_need_indicate_scan_done; } } rtw_ps_deny(padapter, PS_DENY_SCAN); if(_FAIL == rtw_pwr_wakeup(padapter)) { need_indicate_scan_done = _TRUE; goto check_need_indicate_scan_done; } #ifdef CONFIG_P2P if( pwdinfo->driver_interface == DRIVER_CFG80211 ) { if(ssids->ssid != NULL && _rtw_memcmp(ssids->ssid, "DIRECT-", 7) && rtw_get_p2p_ie((u8 *)request->ie, request->ie_len, NULL, NULL) ) { if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); adapter_wdev_data(padapter)->p2p_enabled = _TRUE; } else { rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); #endif } rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); if(request->n_channels == 3 && request->channels[0]->hw_value == 1 && request->channels[1]->hw_value == 6 && request->channels[2]->hw_value == 11 ) { social_channel = 1; } } } #endif //CONFIG_P2P if(request->ie && request->ie_len>0) { rtw_cfg80211_set_probe_req_wpsp2pie(padapter, (u8 *)request->ie, request->ie_len ); } if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { DBG_8192C("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); need_indicate_scan_done = _TRUE; goto check_need_indicate_scan_done; } else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { DBG_8192C("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); ret = -EBUSY; goto check_need_indicate_scan_done; } if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) { #if 1 // Miracast can't do AP scan static u32 lastscantime = 0; u32 passtime; passtime = rtw_get_passing_time_ms(lastscantime); lastscantime = rtw_get_current_time(); if (passtime > BUSY_TRAFFIC_SCAN_DENY_PERIOD) #endif { DBG_871X("%s: bBusyTraffic == _TRUE\n", __FUNCTION__); need_indicate_scan_done = _TRUE; goto check_need_indicate_scan_done; } } if (rtw_is_scan_deny(padapter)){ DBG_871X(FUNC_ADPT_FMT ": scan deny\n", FUNC_ADPT_ARG(padapter)); need_indicate_scan_done = _TRUE; goto check_need_indicate_scan_done; } #ifdef CONFIG_CONCURRENT_MODE if(pbuddy_mlmepriv && (pbuddy_mlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE)) { #if 1 // Miracast can't do AP scan static u32 buddylastscantime = 0; u32 passtime; passtime = rtw_get_passing_time_ms(buddylastscantime); buddylastscantime = rtw_get_current_time(); if ((passtime > BUSY_TRAFFIC_SCAN_DENY_PERIOD) //#ifdef CONFIG_P2P // ||(!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) //#endif //CONFIG_P2P ) #endif { DBG_871X("%s: bBusyTraffic == _TRUE at buddy_intf\n", __FUNCTION__); need_indicate_scan_done = _TRUE; goto check_need_indicate_scan_done; } } if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) { DBG_871X("buddy_intf's mlme state:0x%x\n", pbuddy_mlmepriv->fw_state); need_indicate_scan_done = _TRUE; goto check_need_indicate_scan_done; } else if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY)) { bool scan_via_buddy = _FALSE; struct rtw_wdev_priv *buddy_wdev_priv = adapter_wdev_data(pbuddy_adapter); _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); _enter_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL); if (buddy_wdev_priv->scan_request) { DBG_871X("scan via buddy\n"); pmlmepriv->scanning_via_buddy_intf = _TRUE; _enter_critical_bh(&pmlmepriv->lock, &irqL); set_fwstate(pmlmepriv, _FW_UNDER_SURVEY); _exit_critical_bh(&pmlmepriv->lock, &irqL); scan_via_buddy = _TRUE; } _exit_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL); _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); if (scan_via_buddy == _FALSE) need_indicate_scan_done = _TRUE; goto check_need_indicate_scan_done; } #endif /* CONFIG_CONCURRENT_MODE */ #ifdef CONFIG_P2P if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) { rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); rtw_free_network_queue(padapter, _TRUE); if(social_channel == 0) rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); else rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_SOCIAL_LAST); } #endif //CONFIG_P2P _rtw_memset(ssid, 0, sizeof(NDIS_802_11_SSID)*RTW_SSID_SCAN_AMOUNT); //parsing request ssids, n_ssids for (i = 0; i < request->n_ssids && i < RTW_SSID_SCAN_AMOUNT; i++) { #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("ssid=%s, len=%d\n", ssids[i].ssid, ssids[i].ssid_len); #endif _rtw_memcpy(ssid[i].Ssid, ssids[i].ssid, ssids[i].ssid_len); ssid[i].SsidLength = ssids[i].ssid_len; } /* parsing channels, n_channels */ _rtw_memset(ch, 0, sizeof(struct rtw_ieee80211_channel)*RTW_CHANNEL_SCAN_AMOUNT); for (i=0;in_channels && ichannels[i])); #endif ch[i].hw_value = request->channels[i]->hw_value; ch[i].flags = request->channels[i]->flags; } _enter_critical_bh(&pmlmepriv->lock, &irqL); if (request->n_channels == 1) { for(i=1;in_channels <= 4) { for(j=request->n_channels-1;j>=0;j--) for(i=0;in_channels); } else { _status = rtw_sitesurvey_cmd(padapter, ssid, RTW_SSID_SCAN_AMOUNT, NULL, 0); } _exit_critical_bh(&pmlmepriv->lock, &irqL); if(_status == _FALSE) { ret = -1; } check_need_indicate_scan_done: if (_TRUE == need_indicate_scan_done) { rtw_cfg80211_surveydone_event_callback(padapter); rtw_cfg80211_indicate_scan_done(padapter, _FALSE); } cancel_ps_deny: rtw_ps_deny_cancel(padapter, PS_DENY_SCAN); exit: return ret; } static int cfg80211_rtw_set_wiphy_params(struct wiphy *wiphy, u32 changed) { #if 0 struct iwm_priv *iwm = wiphy_to_iwm(wiphy); if (changed & WIPHY_PARAM_RTS_THRESHOLD && (iwm->conf.rts_threshold != wiphy->rts_threshold)) { int ret; iwm->conf.rts_threshold = wiphy->rts_threshold; ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, CFG_RTS_THRESHOLD, iwm->conf.rts_threshold); if (ret < 0) return ret; } if (changed & WIPHY_PARAM_FRAG_THRESHOLD && (iwm->conf.frag_threshold != wiphy->frag_threshold)) { int ret; iwm->conf.frag_threshold = wiphy->frag_threshold; ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_FA_CFG_FIX, CFG_FRAG_THRESHOLD, iwm->conf.frag_threshold); if (ret < 0) return ret; } #endif DBG_8192C("%s\n", __func__); return 0; } static int rtw_cfg80211_set_wpa_version(struct security_priv *psecuritypriv, u32 wpa_version) { DBG_8192C("%s, wpa_version=%d\n", __func__, wpa_version); if (!wpa_version) { psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; return 0; } if (wpa_version & (NL80211_WPA_VERSION_1 | NL80211_WPA_VERSION_2)) { psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPAPSK; } /* if (wpa_version & NL80211_WPA_VERSION_2) { psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; } */ #ifdef CONFIG_WAPI_SUPPORT if (wpa_version & NL80211_WAPI_VERSION_1) { psecuritypriv->ndisauthtype = Ndis802_11AuthModeWAPI; } #endif return 0; } static int rtw_cfg80211_set_auth_type(struct security_priv *psecuritypriv, enum nl80211_auth_type sme_auth_type) { DBG_8192C("%s, nl80211_auth_type=%d\n", __func__, sme_auth_type); switch (sme_auth_type) { case NL80211_AUTHTYPE_AUTOMATIC: psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; break; case NL80211_AUTHTYPE_OPEN_SYSTEM: psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; if(psecuritypriv->ndisauthtype>Ndis802_11AuthModeWPA) psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; #ifdef CONFIG_WAPI_SUPPORT if(psecuritypriv->ndisauthtype == Ndis802_11AuthModeWAPI) psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; #endif break; case NL80211_AUTHTYPE_SHARED_KEY: psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Shared; psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; break; default: psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //return -ENOTSUPP; } return 0; } static int rtw_cfg80211_set_cipher(struct security_priv *psecuritypriv, u32 cipher, bool ucast) { u32 ndisencryptstatus = Ndis802_11EncryptionDisabled; u32 *profile_cipher = ucast ? &psecuritypriv->dot11PrivacyAlgrthm : &psecuritypriv->dot118021XGrpPrivacy; DBG_8192C("%s, ucast=%d, cipher=0x%x\n", __func__, ucast, cipher); if (!cipher) { *profile_cipher = _NO_PRIVACY_; psecuritypriv->ndisencryptstatus = ndisencryptstatus; return 0; } switch (cipher) { case IW_AUTH_CIPHER_NONE: *profile_cipher = _NO_PRIVACY_; ndisencryptstatus = Ndis802_11EncryptionDisabled; #ifdef CONFIG_WAPI_SUPPORT if(psecuritypriv->dot11PrivacyAlgrthm ==_SMS4_ ) { *profile_cipher = _SMS4_; } #endif break; case WLAN_CIPHER_SUITE_WEP40: *profile_cipher = _WEP40_; ndisencryptstatus = Ndis802_11Encryption1Enabled; break; case WLAN_CIPHER_SUITE_WEP104: *profile_cipher = _WEP104_; ndisencryptstatus = Ndis802_11Encryption1Enabled; break; case WLAN_CIPHER_SUITE_TKIP: *profile_cipher = _TKIP_; ndisencryptstatus = Ndis802_11Encryption2Enabled; break; case WLAN_CIPHER_SUITE_CCMP: *profile_cipher = _AES_; ndisencryptstatus = Ndis802_11Encryption3Enabled; break; #ifdef CONFIG_WAPI_SUPPORT case WLAN_CIPHER_SUITE_SMS4: *profile_cipher = _SMS4_; ndisencryptstatus = Ndis802_11_EncrypteionWAPI; break; #endif default: DBG_8192C("Unsupported cipher: 0x%x\n", cipher); return -ENOTSUPP; } if(ucast) { psecuritypriv->ndisencryptstatus = ndisencryptstatus; //if(psecuritypriv->dot11PrivacyAlgrthm >= _AES_) // psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; } return 0; } static int rtw_cfg80211_set_key_mgt(struct security_priv *psecuritypriv, u32 key_mgt) { DBG_8192C("%s, key_mgt=0x%x\n", __func__, key_mgt); if (key_mgt == WLAN_AKM_SUITE_8021X) //*auth_type = UMAC_AUTH_TYPE_8021X; psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; else if (key_mgt == WLAN_AKM_SUITE_PSK) { psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; } #ifdef CONFIG_WAPI_SUPPORT else if(key_mgt ==WLAN_AKM_SUITE_WAPI_PSK){ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; } else if(key_mgt ==WLAN_AKM_SUITE_WAPI_CERT){ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; } #endif else { DBG_8192C("Invalid key mgt: 0x%x\n", key_mgt); //return -EINVAL; } return 0; } static int rtw_cfg80211_set_wpa_ie(_adapter *padapter, u8 *pie, size_t ielen) { u8 *buf=NULL, *pos=NULL; u32 left; int group_cipher = 0, pairwise_cipher = 0; int ret = 0; int wpa_ielen=0; int wpa2_ielen=0; u8 *pwpa, *pwpa2; u8 null_addr[]= {0,0,0,0,0,0}; if (pie == NULL || !ielen) { /* Treat this as normal case, but need to clear WIFI_UNDER_WPS */ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); goto exit; } if (ielen > MAX_WPA_IE_LEN+MAX_WPS_IE_LEN+MAX_P2P_IE_LEN) { ret = -EINVAL; goto exit; } buf = rtw_zmalloc(ielen); if (buf == NULL){ ret = -ENOMEM; goto exit; } _rtw_memcpy(buf, pie , ielen); //dump { int i; DBG_8192C("set wpa_ie(length:%zu):\n", ielen); for(i=0;i0) { if(rtw_parse_wpa_ie(pwpa, wpa_ielen+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) { padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPAPSK; _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa[0], wpa_ielen+2); DBG_8192C("got wpa_ie, wpa_ielen:%u\n", wpa_ielen); } } pwpa2 = rtw_get_wpa2_ie(buf, &wpa2_ielen, ielen); if(pwpa2 && wpa2_ielen>0) { if(rtw_parse_wpa2_ie(pwpa2, wpa2_ielen+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) { padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPA2PSK; _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa2[0], wpa2_ielen+2); DBG_8192C("got wpa2_ie, wpa2_ielen:%u\n", wpa2_ielen); } } if (group_cipher == 0) { group_cipher = WPA_CIPHER_NONE; } if (pairwise_cipher == 0) { pairwise_cipher = WPA_CIPHER_NONE; } switch(group_cipher) { case WPA_CIPHER_NONE: padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; break; case WPA_CIPHER_WEP40: padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; break; case WPA_CIPHER_TKIP: padapter->securitypriv.dot118021XGrpPrivacy=_TKIP_; padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; break; case WPA_CIPHER_CCMP: padapter->securitypriv.dot118021XGrpPrivacy=_AES_; padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; break; case WPA_CIPHER_WEP104: padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; break; } switch(pairwise_cipher) { case WPA_CIPHER_NONE: padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; break; case WPA_CIPHER_WEP40: padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; break; case WPA_CIPHER_TKIP: padapter->securitypriv.dot11PrivacyAlgrthm=_TKIP_; padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; break; case WPA_CIPHER_CCMP: padapter->securitypriv.dot11PrivacyAlgrthm=_AES_; padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; break; case WPA_CIPHER_WEP104: padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; break; } {/* handle wps_ie */ uint wps_ielen; u8 *wps_ie; wps_ie = rtw_get_wps_ie(buf, ielen, NULL, &wps_ielen); if (wps_ie && wps_ielen > 0) { DBG_8192C("got wps_ie, wps_ielen:%u\n", wps_ielen); padapter->securitypriv.wps_ie_len = wps_ielensecuritypriv.wps_ie, wps_ie, padapter->securitypriv.wps_ie_len); set_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS); } else { _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); } } #ifdef CONFIG_P2P {//check p2p_ie for assoc req; uint p2p_ielen=0; u8 *p2p_ie; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); if((p2p_ie=rtw_get_p2p_ie(buf, ielen, NULL, &p2p_ielen))) { #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("%s p2p_assoc_req_ielen=%d\n", __FUNCTION__, p2p_ielen); #endif if(pmlmepriv->p2p_assoc_req_ie) { u32 free_len = pmlmepriv->p2p_assoc_req_ie_len; pmlmepriv->p2p_assoc_req_ie_len = 0; rtw_mfree(pmlmepriv->p2p_assoc_req_ie, free_len); pmlmepriv->p2p_assoc_req_ie = NULL; } pmlmepriv->p2p_assoc_req_ie = rtw_malloc(p2p_ielen); if ( pmlmepriv->p2p_assoc_req_ie == NULL) { DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); goto exit; } _rtw_memcpy(pmlmepriv->p2p_assoc_req_ie, p2p_ie, p2p_ielen); pmlmepriv->p2p_assoc_req_ie_len = p2p_ielen; } } #endif //CONFIG_P2P #ifdef CONFIG_WFD {//check wfd_ie for assoc req; uint wfd_ielen=0; u8 *wfd_ie; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); if(rtw_get_wfd_ie(buf, ielen, NULL, &wfd_ielen)) { #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("%s wfd_assoc_req_ielen=%d\n", __FUNCTION__, wfd_ielen); #endif if(pmlmepriv->wfd_assoc_req_ie) { u32 free_len = pmlmepriv->wfd_assoc_req_ie_len; pmlmepriv->wfd_assoc_req_ie_len = 0; rtw_mfree(pmlmepriv->wfd_assoc_req_ie, free_len); pmlmepriv->wfd_assoc_req_ie = NULL; } pmlmepriv->wfd_assoc_req_ie = rtw_malloc(wfd_ielen); if ( pmlmepriv->wfd_assoc_req_ie == NULL) { DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); goto exit; } rtw_get_wfd_ie(buf, ielen, pmlmepriv->wfd_assoc_req_ie, &pmlmepriv->wfd_assoc_req_ie_len); } } #endif //CONFIG_WFD //TKIP and AES disallow multicast packets until installing group key if(padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_ || padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_WTMIC_ || padapter->securitypriv.dot11PrivacyAlgrthm == _AES_) //WPS open need to enable multicast //|| check_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS) == _TRUE) rtw_hal_set_hwreg(padapter, HW_VAR_OFF_RCR_AM, null_addr); RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ("rtw_set_wpa_ie: pairwise_cipher=0x%08x padapter->securitypriv.ndisencryptstatus=%d padapter->securitypriv.ndisauthtype=%d\n", pairwise_cipher, padapter->securitypriv.ndisencryptstatus, padapter->securitypriv.ndisauthtype)); exit: if (buf) rtw_mfree(buf, ielen); if (ret) _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); return ret; } static int cfg80211_rtw_join_ibss(struct wiphy *wiphy, struct net_device *ndev, struct cfg80211_ibss_params *params) { _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); NDIS_802_11_SSID ndis_ssid; struct security_priv *psecuritypriv = &padapter->securitypriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; int ret=0; if(_FAIL == rtw_pwr_wakeup(padapter)) { ret= -EPERM; goto exit; } if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { ret = -EPERM; goto exit; } #ifdef CONFIG_CONCURRENT_MODE if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING) == _TRUE) { DBG_8192C("%s, but buddy_intf is under linking\n", __FUNCTION__); ret = -EINVAL; goto exit; } if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY) == _TRUE) { rtw_scan_abort(padapter->pbuddy_adapter); } #endif //CONFIG_CONCURRENT_MODE if (!params->ssid || !params->ssid_len) { ret = -EINVAL; goto exit; } if (params->ssid_len > IW_ESSID_MAX_SIZE){ ret= -E2BIG; goto exit; } _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); ndis_ssid.SsidLength = params->ssid_len; _rtw_memcpy(ndis_ssid.Ssid, params->ssid, params->ssid_len); //DBG_8192C("ssid=%s, len=%zu\n", ndis_ssid.Ssid, params->ssid_len); psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled; psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //open system psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; ret = rtw_cfg80211_set_auth_type(psecuritypriv, NL80211_AUTHTYPE_OPEN_SYSTEM); rtw_set_802_11_authentication_mode(padapter, psecuritypriv->ndisauthtype); if (rtw_set_802_11_ssid(padapter, &ndis_ssid) == _FALSE) { ret = -1; goto exit; } exit: return ret; } static int cfg80211_rtw_leave_ibss(struct wiphy *wiphy, struct net_device *ndev) { _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); struct wireless_dev *rtw_wdev = padapter->rtw_wdev; enum nl80211_iftype old_type; int ret = 0; DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); padapter->mlmepriv.not_indic_disco = _TRUE; old_type = rtw_wdev->iftype; rtw_set_to_roam(padapter, 0); if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) { rtw_scan_abort(padapter); LeaveAllPowerSaveMode(padapter); rtw_wdev->iftype = NL80211_IFTYPE_STATION; if (rtw_set_802_11_infrastructure_mode(padapter, Ndis802_11Infrastructure) ==_FALSE) { rtw_wdev->iftype = old_type; ret = -EPERM; goto leave_ibss; } rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure,_TRUE); } leave_ibss: padapter->mlmepriv.not_indic_disco = _FALSE; return 0; } static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *ndev, struct cfg80211_connect_params *sme) { int ret=0; _irqL irqL; _list *phead; struct wlan_network *pnetwork = NULL; NDIS_802_11_AUTHENTICATION_MODE authmode; NDIS_802_11_SSID ndis_ssid; u8 *dst_ssid, *src_ssid; u8 *dst_bssid, *src_bssid; //u8 matched_by_bssid=_FALSE; //u8 matched_by_ssid=_FALSE; u8 matched=_FALSE; _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; _queue *queue = &pmlmepriv->scanned_queue; padapter->mlmepriv.not_indic_disco = _TRUE; DBG_871X("=>"FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); DBG_871X("privacy=%d, key=%p, key_len=%d, key_idx=%d\n", sme->privacy, sme->key, sme->key_len, sme->key_idx); if(adapter_wdev_data(padapter)->block == _TRUE) { ret = -EBUSY; DBG_871X("%s wdev_priv.block is set\n", __FUNCTION__); goto exit; } #ifdef CONFIG_PLATFORM_MSTAR_SCAN_BEFORE_CONNECT printk("MStar Android!\n"); if(adapter_wdev_data(padapter)->bandroid_scan == _FALSE) { #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo= &(padapter->wdinfo); if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) #endif //CONFIG_P2P { ret = -EBUSY; printk("Android hasn't attached yet!\n"); goto exit; } } #endif rtw_ps_deny(padapter, PS_DENY_JOIN); if(_FAIL == rtw_pwr_wakeup(padapter)) { ret= -EPERM; goto exit; } if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { ret = -EPERM; goto exit; } #ifdef CONFIG_CONCURRENT_MODE if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING) == _TRUE) { DBG_8192C("%s, but buddy_intf is under linking\n", __FUNCTION__); ret = -EINVAL; goto exit; } if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY) == _TRUE) { rtw_scan_abort(padapter->pbuddy_adapter); } #endif if (!sme->ssid || !sme->ssid_len) { ret = -EINVAL; goto exit; } if (sme->ssid_len > IW_ESSID_MAX_SIZE){ ret= -E2BIG; goto exit; } _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); ndis_ssid.SsidLength = sme->ssid_len; _rtw_memcpy(ndis_ssid.Ssid, (u8 *)sme->ssid, sme->ssid_len); DBG_8192C("ssid=%s, len=%zu\n", ndis_ssid.Ssid, sme->ssid_len); if (sme->bssid) DBG_8192C("bssid="MAC_FMT"\n", MAC_ARG(sme->bssid)); if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { ret = -EBUSY; DBG_8192C("%s, fw_state=0x%x, goto exit\n", __FUNCTION__, pmlmepriv->fw_state); goto exit; } if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { rtw_scan_abort(padapter); } psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled; psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //open system psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; #ifdef CONFIG_WAPI_SUPPORT padapter->wapiInfo.bWapiEnable = false; #endif ret = rtw_cfg80211_set_wpa_version(psecuritypriv, sme->crypto.wpa_versions); if (ret < 0) goto exit; #ifdef CONFIG_WAPI_SUPPORT if(sme->crypto.wpa_versions & NL80211_WAPI_VERSION_1) { padapter->wapiInfo.bWapiEnable = true; padapter->wapiInfo.extra_prefix_len = WAPI_EXT_LEN; padapter->wapiInfo.extra_postfix_len = SMS4_MIC_LEN; } #endif ret = rtw_cfg80211_set_auth_type(psecuritypriv, sme->auth_type); #ifdef CONFIG_WAPI_SUPPORT if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_WAPI) padapter->mlmeextpriv.mlmext_info.auth_algo = psecuritypriv->dot11AuthAlgrthm; #endif if (ret < 0) goto exit; DBG_8192C("%s, ie_len=%zu\n", __func__, sme->ie_len); ret = rtw_cfg80211_set_wpa_ie(padapter, (u8 *)sme->ie, sme->ie_len); if (ret < 0) goto exit; if (sme->crypto.n_ciphers_pairwise) { ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.ciphers_pairwise[0], _TRUE); if (ret < 0) goto exit; } //For WEP Shared auth if((psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_Shared || psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_Auto) && sme->key ) { u32 wep_key_idx, wep_key_len,wep_total_len; NDIS_802_11_WEP *pwep = NULL; DBG_871X("%s(): Shared/Auto WEP\n",__FUNCTION__); wep_key_idx = sme->key_idx; wep_key_len = sme->key_len; if (sme->key_idx > WEP_KEYS) { ret = -EINVAL; goto exit; } if (wep_key_len > 0) { wep_key_len = wep_key_len <= 5 ? 5 : 13; wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); pwep =(NDIS_802_11_WEP *) rtw_malloc(wep_total_len); if(pwep == NULL){ DBG_871X(" wpa_set_encryption: pwep allocate fail !!!\n"); ret = -ENOMEM; goto exit; } _rtw_memset(pwep, 0, wep_total_len); pwep->KeyLength = wep_key_len; pwep->Length = wep_total_len; if(wep_key_len==13) { padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; } } else { ret = -EINVAL; goto exit; } pwep->KeyIndex = wep_key_idx; pwep->KeyIndex |= 0x80000000; _rtw_memcpy(pwep->KeyMaterial, (void *)sme->key, pwep->KeyLength); if(rtw_set_802_11_add_wep(padapter, pwep) == (u8)_FAIL) { ret = -EOPNOTSUPP ; } if (pwep) { rtw_mfree((u8 *)pwep,wep_total_len); } if(ret < 0) goto exit; } ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.cipher_group, _FALSE); if (ret < 0) return ret; if (sme->crypto.n_akm_suites) { ret = rtw_cfg80211_set_key_mgt(psecuritypriv, sme->crypto.akm_suites[0]); if (ret < 0) goto exit; } #ifdef CONFIG_WAPI_SUPPORT if(sme->crypto.akm_suites[0] ==WLAN_AKM_SUITE_WAPI_PSK){ padapter->wapiInfo.bWapiPSK = true; } else if(sme->crypto.akm_suites[0] ==WLAN_AKM_SUITE_WAPI_CERT){ padapter->wapiInfo.bWapiPSK = false; } #endif authmode = psecuritypriv->ndisauthtype; rtw_set_802_11_authentication_mode(padapter, authmode); //rtw_set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); if (rtw_set_802_11_connect(padapter, (u8 *)sme->bssid, &ndis_ssid) == _FALSE) { ret = -1; goto exit; } DBG_8192C("set ssid:dot11AuthAlgrthm=%d, dot11PrivacyAlgrthm=%d, dot118021XGrpPrivacy=%d\n", psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, psecuritypriv->dot118021XGrpPrivacy); exit: rtw_ps_deny_cancel(padapter, PS_DENY_JOIN); DBG_8192C("<=%s, ret %d\n",__FUNCTION__, ret); padapter->mlmepriv.not_indic_disco = _FALSE; return ret; } static int cfg80211_rtw_disconnect(struct wiphy *wiphy, struct net_device *ndev, u16 reason_code) { _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); padapter->mlmepriv.not_indic_disco = _TRUE; rtw_set_to_roam(padapter, 0); //if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) { rtw_scan_abort(padapter); LeaveAllPowerSaveMode(padapter); rtw_disassoc_cmd(padapter, 500, _FALSE); DBG_871X("%s...call rtw_indicate_disconnect\n", __FUNCTION__); rtw_indicate_disconnect(padapter); rtw_free_assoc_resources(padapter, 1); rtw_pwr_wakeup(padapter); } padapter->mlmepriv.not_indic_disco = _FALSE; DBG_871X(FUNC_NDEV_FMT" return 0\n", FUNC_NDEV_ARG(ndev)); return 0; } static int cfg80211_rtw_set_txpower(struct wiphy *wiphy, #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0)) struct wireless_dev *wdev, #endif #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)) || defined(COMPAT_KERNEL_RELEASE) enum nl80211_tx_power_setting type, int mbm) #else enum tx_power_setting type, int dbm) #endif { #if 0 struct iwm_priv *iwm = wiphy_to_iwm(wiphy); int ret; switch (type) { case NL80211_TX_POWER_AUTOMATIC: return 0; case NL80211_TX_POWER_FIXED: if (mbm < 0 || (mbm % 100)) return -EOPNOTSUPP; if (!test_bit(IWM_STATUS_READY, &iwm->status)) return 0; ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, CFG_TX_PWR_LIMIT_USR, MBM_TO_DBM(mbm) * 2); if (ret < 0) return ret; return iwm_tx_power_trigger(iwm); default: IWM_ERR(iwm, "Unsupported power type: %d\n", type); return -EOPNOTSUPP; } #endif DBG_8192C("%s\n", __func__); return 0; } static int cfg80211_rtw_get_txpower(struct wiphy *wiphy, #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0)) struct wireless_dev *wdev, #endif int *dbm) { DBG_8192C("%s\n", __func__); *dbm = (12); return 0; } inline bool rtw_cfg80211_pwr_mgmt(_adapter *adapter) { struct rtw_wdev_priv *rtw_wdev_priv = adapter_wdev_data(adapter); return rtw_wdev_priv->power_mgmt; } static int cfg80211_rtw_set_power_mgmt(struct wiphy *wiphy, struct net_device *ndev, bool enabled, int timeout) { _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); struct rtw_wdev_priv *rtw_wdev_priv = adapter_wdev_data(padapter); DBG_871X(FUNC_NDEV_FMT" enabled:%u, timeout:%d\n", FUNC_NDEV_ARG(ndev), enabled, timeout); rtw_wdev_priv->power_mgmt = enabled; #ifdef CONFIG_LPS if (!enabled) LPS_Leave(padapter, "CFG80211_PWRMGMT"); #endif return 0; } static int cfg80211_rtw_set_pmksa(struct wiphy *wiphy, struct net_device *ndev, struct cfg80211_pmksa *pmksa) { u8 index,blInserted = _FALSE; _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); struct mlme_priv *mlme = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; u8 strZeroMacAddress[ ETH_ALEN ] = { 0x00 }; DBG_871X(FUNC_NDEV_FMT" "MAC_FMT" "KEY_FMT"\n", FUNC_NDEV_ARG(ndev) , MAC_ARG(pmksa->bssid), KEY_ARG(pmksa->pmkid)); if ( _rtw_memcmp( pmksa->bssid, strZeroMacAddress, ETH_ALEN ) == _TRUE ) { return -EINVAL; } if (check_fwstate(mlme, _FW_LINKED) == _FALSE) { DBG_871X(FUNC_NDEV_FMT" not set pmksa cause not in linked state\n", FUNC_NDEV_ARG(ndev)); return -EINVAL; } blInserted = _FALSE; //overwrite PMKID for(index=0 ; indexPMKIDList[index].Bssid, pmksa->bssid, ETH_ALEN) ==_TRUE ) { // BSSID is matched, the same AP => rewrite with new PMKID. DBG_871X(FUNC_NDEV_FMT" BSSID exists in the PMKList.\n", FUNC_NDEV_ARG(ndev)); _rtw_memcpy( psecuritypriv->PMKIDList[index].PMKID, pmksa->pmkid, WLAN_PMKID_LEN); psecuritypriv->PMKIDList[index].bUsed = _TRUE; psecuritypriv->PMKIDIndex = index+1; blInserted = _TRUE; break; } } if(!blInserted) { // Find a new entry DBG_871X(FUNC_NDEV_FMT" Use the new entry index = %d for this PMKID.\n", FUNC_NDEV_ARG(ndev), psecuritypriv->PMKIDIndex ); _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].Bssid, pmksa->bssid, ETH_ALEN); _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].PMKID, pmksa->pmkid, WLAN_PMKID_LEN); psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].bUsed = _TRUE; psecuritypriv->PMKIDIndex++ ; if(psecuritypriv->PMKIDIndex==16) { psecuritypriv->PMKIDIndex =0; } } return 0; } static int cfg80211_rtw_del_pmksa(struct wiphy *wiphy, struct net_device *ndev, struct cfg80211_pmksa *pmksa) { u8 index, bMatched = _FALSE; _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); struct security_priv *psecuritypriv = &padapter->securitypriv; DBG_871X(FUNC_NDEV_FMT" "MAC_FMT" "KEY_FMT"\n", FUNC_NDEV_ARG(ndev) , MAC_ARG(pmksa->bssid), KEY_ARG(pmksa->pmkid)); for(index=0 ; indexPMKIDList[index].Bssid, pmksa->bssid, ETH_ALEN) ==_TRUE ) { // BSSID is matched, the same AP => Remove this PMKID information and reset it. _rtw_memset( psecuritypriv->PMKIDList[index].Bssid, 0x00, ETH_ALEN ); _rtw_memset( psecuritypriv->PMKIDList[index].PMKID, 0x00, WLAN_PMKID_LEN ); psecuritypriv->PMKIDList[index].bUsed = _FALSE; bMatched = _TRUE; DBG_871X(FUNC_NDEV_FMT" clear id:%hhu\n", FUNC_NDEV_ARG(ndev), index); break; } } if(_FALSE == bMatched) { DBG_871X(FUNC_NDEV_FMT" do not have matched BSSID\n" , FUNC_NDEV_ARG(ndev)); return -EINVAL; } return 0; } static int cfg80211_rtw_flush_pmksa(struct wiphy *wiphy, struct net_device *ndev) { _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); struct security_priv *psecuritypriv = &padapter->securitypriv; DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); _rtw_memset( &psecuritypriv->PMKIDList[ 0 ], 0x00, sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE ); psecuritypriv->PMKIDIndex = 0; return 0; } #ifdef CONFIG_AP_MODE void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) { s32 freq; int channel; struct wireless_dev *pwdev = padapter->rtw_wdev; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct net_device *ndev = padapter->pnetdev; DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); #if defined(RTW_USE_CFG80211_STA_EVENT) || defined(COMPAT_KERNEL_RELEASE) { struct station_info sinfo; u8 ie_offset; if (GetFrameSubType(pmgmt_frame) == WIFI_ASSOCREQ) ie_offset = _ASOCREQ_IE_OFFSET_; else // WIFI_REASSOCREQ ie_offset = _REASOCREQ_IE_OFFSET_; sinfo.filled = 0; sinfo.filled = STATION_INFO_ASSOC_REQ_IES; sinfo.assoc_req_ies = pmgmt_frame + WLAN_HDR_A3_LEN + ie_offset; sinfo.assoc_req_ies_len = frame_len - WLAN_HDR_A3_LEN - ie_offset; cfg80211_new_sta(ndev, GetAddr2Ptr(pmgmt_frame), &sinfo, GFP_ATOMIC); } #else /* defined(RTW_USE_CFG80211_STA_EVENT) */ channel = pmlmeext->cur_channel; if (channel <= RTW_CH_MAX_2G_CHANNEL) freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); else freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); #ifdef COMPAT_KERNEL_RELEASE rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); #else //COMPAT_KERNEL_RELEASE { //to avoid WARN_ON(wdev->iftype != NL80211_IFTYPE_STATION) when calling cfg80211_send_rx_assoc() #ifndef CONFIG_PLATFORM_MSTAR pwdev->iftype = NL80211_IFTYPE_STATION; #endif //CONFIG_PLATFORM_MSTAR DBG_8192C("iftype=%d before call cfg80211_send_rx_assoc()\n", pwdev->iftype); rtw_cfg80211_send_rx_assoc(padapter, NULL, pmgmt_frame, frame_len); DBG_8192C("iftype=%d after call cfg80211_send_rx_assoc()\n", pwdev->iftype); pwdev->iftype = NL80211_IFTYPE_AP; //cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); } #endif //COMPAT_KERNEL_RELEASE #endif /* defined(RTW_USE_CFG80211_STA_EVENT) */ } void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason) { s32 freq; int channel; u8 *pmgmt_frame; uint frame_len; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; u8 mgmt_buf[128] = {0}; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct net_device *ndev = padapter->pnetdev; DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); #if defined(RTW_USE_CFG80211_STA_EVENT) || defined(COMPAT_KERNEL_RELEASE) cfg80211_del_sta(ndev, da, GFP_ATOMIC); #else /* defined(RTW_USE_CFG80211_STA_EVENT) */ channel = pmlmeext->cur_channel; if (channel <= RTW_CH_MAX_2G_CHANNEL) freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); else freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); pmgmt_frame = mgmt_buf; pwlanhdr = (struct rtw_ieee80211_hdr *)pmgmt_frame; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; //_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); //_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr1, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, da, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pmgmt_frame, WIFI_DEAUTH); pmgmt_frame += sizeof(struct rtw_ieee80211_hdr_3addr); frame_len = sizeof(struct rtw_ieee80211_hdr_3addr); reason = cpu_to_le16(reason); pmgmt_frame = rtw_set_fixed_ie(pmgmt_frame, _RSON_CODE_ , (unsigned char *)&reason, &frame_len); #ifdef COMPAT_KERNEL_RELEASE rtw_cfg80211_rx_mgmt(padapter, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC); #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) rtw_cfg80211_rx_mgmt(padapter, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC); #else //COMPAT_KERNEL_RELEASE cfg80211_send_disassoc(padapter->pnetdev, mgmt_buf, frame_len); //cfg80211_rx_action(padapter->pnetdev, freq, mgmt_buf, frame_len, GFP_ATOMIC); #endif //COMPAT_KERNEL_RELEASE #endif /* defined(RTW_USE_CFG80211_STA_EVENT) */ } static int rtw_cfg80211_monitor_if_open(struct net_device *ndev) { int ret = 0; DBG_8192C("%s\n", __func__); return ret; } static int rtw_cfg80211_monitor_if_close(struct net_device *ndev) { int ret = 0; DBG_8192C("%s\n", __func__); return ret; } static int rtw_cfg80211_monitor_if_xmit_entry(struct sk_buff *skb, struct net_device *ndev) { int ret = 0; int rtap_len; int qos_len = 0; int dot11_hdr_len = 24; int snap_len = 6; unsigned char *pdata; u16 frame_ctl; unsigned char src_mac_addr[6]; unsigned char dst_mac_addr[6]; struct ieee80211_hdr *dot11_hdr; struct ieee80211_radiotap_header *rtap_hdr; _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); if (skb) rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize); if (unlikely(skb->len < sizeof(struct ieee80211_radiotap_header))) goto fail; rtap_hdr = (struct ieee80211_radiotap_header *)skb->data; if (unlikely(rtap_hdr->it_version)) goto fail; rtap_len = ieee80211_get_radiotap_len(skb->data); if (unlikely(skb->len < rtap_len)) goto fail; if(rtap_len != 14) { DBG_8192C("radiotap len (should be 14): %d\n", rtap_len); goto fail; } /* Skip the ratio tap header */ skb_pull(skb, rtap_len); dot11_hdr = (struct ieee80211_hdr *)skb->data; frame_ctl = le16_to_cpu(dot11_hdr->frame_control); /* Check if the QoS bit is set */ if ((frame_ctl & RTW_IEEE80211_FCTL_FTYPE) == RTW_IEEE80211_FTYPE_DATA) { /* Check if this ia a Wireless Distribution System (WDS) frame * which has 4 MAC addresses */ if (dot11_hdr->frame_control & 0x0080) qos_len = 2; if ((dot11_hdr->frame_control & 0x0300) == 0x0300) dot11_hdr_len += 6; memcpy(dst_mac_addr, dot11_hdr->addr1, sizeof(dst_mac_addr)); memcpy(src_mac_addr, dot11_hdr->addr2, sizeof(src_mac_addr)); /* Skip the 802.11 header, QoS (if any) and SNAP, but leave spaces for * for two MAC addresses */ skb_pull(skb, dot11_hdr_len + qos_len + snap_len - sizeof(src_mac_addr) * 2); pdata = (unsigned char*)skb->data; memcpy(pdata, dst_mac_addr, sizeof(dst_mac_addr)); memcpy(pdata + sizeof(dst_mac_addr), src_mac_addr, sizeof(src_mac_addr)); DBG_8192C("should be eapol packet\n"); /* Use the real net device to transmit the packet */ ret = _rtw_xmit_entry(skb, padapter->pnetdev); return ret; } else if ((frame_ctl & (RTW_IEEE80211_FCTL_FTYPE|RTW_IEEE80211_FCTL_STYPE)) == (RTW_IEEE80211_FTYPE_MGMT|RTW_IEEE80211_STYPE_ACTION) ) { //only for action frames struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; //u8 category, action, OUI_Subtype, dialogToken=0; //unsigned char *frame_body; struct rtw_ieee80211_hdr *pwlanhdr; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); u8 *buf = skb->data; u32 len = skb->len; u8 category, action; int type = -1; if (rtw_action_frame_parse(buf, len, &category, &action) == _FALSE) { DBG_8192C(FUNC_NDEV_FMT" frame_control:0x%x\n", FUNC_NDEV_ARG(ndev), le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl)); goto fail; } DBG_8192C("RTW_Tx:da="MAC_FMT" via "FUNC_NDEV_FMT"\n", MAC_ARG(GetAddr1Ptr(buf)), FUNC_NDEV_ARG(ndev)); #ifdef CONFIG_P2P if((type = rtw_p2p_check_frames(padapter, buf, len, _TRUE)) >= 0) goto dump; #endif if (category == RTW_WLAN_CATEGORY_PUBLIC) DBG_871X("RTW_Tx:%s\n", action_public_str(action)); else DBG_871X("RTW_Tx:category(%u), action(%u)\n", category, action); dump: //starting alloc mgmt frame to dump it if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { goto fail; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); pattrib->retry_ctrl = _FALSE; _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; _rtw_memcpy(pframe, (void*)buf, len); #ifdef CONFIG_WFD if (type >= 0) { struct wifi_display_info *pwfd_info; pwfd_info = padapter->wdinfo.wfd_info; if ( _TRUE == pwfd_info->wfd_enable ) { rtw_append_wfd_ie( padapter, pframe, &len ); } } #endif // CONFIG_WFD pattrib->pktlen = len; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; //update seq number pmlmeext->mgnt_seq = GetSequence(pwlanhdr); pattrib->seqnum = pmlmeext->mgnt_seq; pmlmeext->mgnt_seq++; pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); } else { DBG_8192C("frame_ctl=0x%x\n", frame_ctl & (RTW_IEEE80211_FCTL_FTYPE|RTW_IEEE80211_FCTL_STYPE)); } fail: rtw_skb_free(skb); return 0; } static void rtw_cfg80211_monitor_if_set_multicast_list(struct net_device *ndev) { DBG_8192C("%s\n", __func__); } static int rtw_cfg80211_monitor_if_set_mac_address(struct net_device *ndev, void *addr) { int ret = 0; DBG_8192C("%s\n", __func__); return ret; } #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) static const struct net_device_ops rtw_cfg80211_monitor_if_ops = { .ndo_open = rtw_cfg80211_monitor_if_open, .ndo_stop = rtw_cfg80211_monitor_if_close, .ndo_start_xmit = rtw_cfg80211_monitor_if_xmit_entry, #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0)) .ndo_set_multicast_list = rtw_cfg80211_monitor_if_set_multicast_list, #endif .ndo_set_mac_address = rtw_cfg80211_monitor_if_set_mac_address, }; #endif static int rtw_cfg80211_add_monitor_if(_adapter *padapter, char *name, struct net_device **ndev) { int ret = 0; struct net_device* mon_ndev = NULL; struct wireless_dev* mon_wdev = NULL; struct rtw_netdev_priv_indicator *pnpi; struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); if (!name ) { DBG_871X(FUNC_ADPT_FMT" without specific name\n", FUNC_ADPT_ARG(padapter)); ret = -EINVAL; goto out; } if (pwdev_priv->pmon_ndev) { DBG_871X(FUNC_ADPT_FMT" monitor interface exist: "NDEV_FMT"\n", FUNC_ADPT_ARG(padapter), NDEV_ARG(pwdev_priv->pmon_ndev)); ret = -EBUSY; goto out; } mon_ndev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator)); if (!mon_ndev) { DBG_871X(FUNC_ADPT_FMT" allocate ndev fail\n", FUNC_ADPT_ARG(padapter)); ret = -ENOMEM; goto out; } mon_ndev->type = ARPHRD_IEEE80211_RADIOTAP; strncpy(mon_ndev->name, name, IFNAMSIZ); mon_ndev->name[IFNAMSIZ - 1] = 0; mon_ndev->destructor = rtw_ndev_destructor; #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) mon_ndev->netdev_ops = &rtw_cfg80211_monitor_if_ops; #else mon_ndev->open = rtw_cfg80211_monitor_if_open; mon_ndev->stop = rtw_cfg80211_monitor_if_close; mon_ndev->hard_start_xmit = rtw_cfg80211_monitor_if_xmit_entry; mon_ndev->set_mac_address = rtw_cfg80211_monitor_if_set_mac_address; #endif pnpi = netdev_priv(mon_ndev); pnpi->priv = padapter; pnpi->sizeof_priv = sizeof(_adapter); /* wdev */ mon_wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev)); if (!mon_wdev) { DBG_871X(FUNC_ADPT_FMT" allocate mon_wdev fail\n", FUNC_ADPT_ARG(padapter)); ret = -ENOMEM; goto out; } mon_wdev->wiphy = padapter->rtw_wdev->wiphy; mon_wdev->netdev = mon_ndev; mon_wdev->iftype = NL80211_IFTYPE_MONITOR; mon_ndev->ieee80211_ptr = mon_wdev; ret = register_netdevice(mon_ndev); if (ret) { goto out; } *ndev = pwdev_priv->pmon_ndev = mon_ndev; _rtw_memcpy(pwdev_priv->ifname_mon, name, IFNAMSIZ+1); out: if (ret && mon_wdev) { rtw_mfree((u8*)mon_wdev, sizeof(struct wireless_dev)); mon_wdev = NULL; } if (ret && mon_ndev) { free_netdev(mon_ndev); *ndev = mon_ndev = NULL; } return ret; } #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) static struct wireless_dev * #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) static struct net_device * #else static int #endif cfg80211_rtw_add_virtual_intf( struct wiphy *wiphy, #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0)) const char *name, #else char *name, #endif enum nl80211_iftype type, u32 *flags, struct vif_params *params) { int ret = 0; struct net_device* ndev = NULL; _adapter *padapter = wiphy_to_adapter(wiphy); DBG_871X(FUNC_ADPT_FMT " wiphy:%s, name:%s, type:%d\n", FUNC_ADPT_ARG(padapter), wiphy_name(wiphy), name, type); switch (type) { case NL80211_IFTYPE_ADHOC: case NL80211_IFTYPE_AP_VLAN: case NL80211_IFTYPE_WDS: case NL80211_IFTYPE_MESH_POINT: ret = -ENODEV; break; case NL80211_IFTYPE_MONITOR: ret = rtw_cfg80211_add_monitor_if(padapter, (char *)name, &ndev); break; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) case NL80211_IFTYPE_P2P_CLIENT: #endif case NL80211_IFTYPE_STATION: ret = -ENODEV; break; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) case NL80211_IFTYPE_P2P_GO: #endif case NL80211_IFTYPE_AP: ret = -ENODEV; break; default: ret = -ENODEV; DBG_871X("Unsupported interface type\n"); break; } DBG_871X(FUNC_ADPT_FMT" ndev:%p, ret:%d\n", FUNC_ADPT_ARG(padapter), ndev, ret); #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) return ndev ? ndev->ieee80211_ptr : ERR_PTR(ret); #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) return ndev ? ndev : ERR_PTR(ret); #else return ret; #endif } static int cfg80211_rtw_del_virtual_intf(struct wiphy *wiphy, #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) struct wireless_dev *wdev #else struct net_device *ndev #endif ) { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) struct net_device *ndev = wdev_to_ndev(wdev); #endif int ret = 0; _adapter *adapter; struct rtw_wdev_priv *pwdev_priv; if (!ndev) { ret = -EINVAL; goto exit; } adapter = (_adapter *)rtw_netdev_priv(ndev); pwdev_priv = adapter_wdev_data(adapter); unregister_netdevice(ndev); if (ndev == pwdev_priv->pmon_ndev) { pwdev_priv->pmon_ndev = NULL; pwdev_priv->ifname_mon[0] = '\0'; DBG_871X(FUNC_NDEV_FMT" remove monitor interface\n", FUNC_NDEV_ARG(ndev)); } exit: return ret; } static int rtw_add_beacon(_adapter *adapter, const u8 *head, size_t head_len, const u8 *tail, size_t tail_len) { int ret=0; u8 *pbuf = NULL; uint len, wps_ielen=0; uint p2p_ielen=0; u8 *p2p_ie; u8 got_p2p_ie = _FALSE; struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); //struct sta_priv *pstapriv = &padapter->stapriv; DBG_8192C("%s beacon_head_len=%zu, beacon_tail_len=%zu\n", __FUNCTION__, head_len, tail_len); if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) return -EINVAL; if(head_len<24) return -EINVAL; pbuf = rtw_zmalloc(head_len+tail_len); if(!pbuf) return -ENOMEM; //_rtw_memcpy(&pstapriv->max_num_sta, param->u.bcn_ie.reserved, 2); //if((pstapriv->max_num_sta>NUM_STA) || (pstapriv->max_num_sta<=0)) // pstapriv->max_num_sta = NUM_STA; _rtw_memcpy(pbuf, (void *)head+24, head_len-24);// 24=beacon header len. _rtw_memcpy(pbuf+head_len-24, (void *)tail, tail_len); len = head_len+tail_len-24; //check wps ie if inclued if(rtw_get_wps_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &wps_ielen)) DBG_8192C("add bcn, wps_ielen=%d\n", wps_ielen); #ifdef CONFIG_P2P if( adapter->wdinfo.driver_interface == DRIVER_CFG80211 ) { //check p2p if enable if(rtw_get_p2p_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &p2p_ielen)) { struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; struct wifidirect_info *pwdinfo= &(adapter->wdinfo); DBG_8192C("got p2p_ie, len=%d\n", p2p_ielen); got_p2p_ie = _TRUE; if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { DBG_8192C("Enable P2P function for the first time\n"); rtw_p2p_enable(adapter, P2P_ROLE_GO); adapter_wdev_data(adapter)->p2p_enabled = _TRUE; adapter->stapriv.expire_to = 3; // 3x2 = 6 sec in p2p mode } else { DBG_8192C("enter GO Mode, p2p_ielen=%d\n", p2p_ielen); rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); pwdinfo->intent = 15; } } } #endif // CONFIG_P2P /* pbss_network->IEs will not include p2p_ie, wfd ie */ rtw_ies_remove_ie(pbuf, &len, _BEACON_IE_OFFSET_, _VENDOR_SPECIFIC_IE_, P2P_OUI, 4); rtw_ies_remove_ie(pbuf, &len, _BEACON_IE_OFFSET_, _VENDOR_SPECIFIC_IE_, WFD_OUI, 4); if (rtw_check_beacon_data(adapter, pbuf, len) == _SUCCESS) { #ifdef CONFIG_P2P //check p2p if enable if(got_p2p_ie == _TRUE) { struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; struct wifidirect_info *pwdinfo= &(adapter->wdinfo); pwdinfo->operating_channel = pmlmeext->cur_channel; } #endif //CONFIG_P2P ret = 0; } else { ret = -EINVAL; } rtw_mfree(pbuf, head_len+tail_len); return ret; } #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) static int cfg80211_rtw_add_beacon(struct wiphy *wiphy, struct net_device *ndev, struct beacon_parameters *info) { int ret=0; _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ret = rtw_add_beacon(adapter, info->head, info->head_len, info->tail, info->tail_len); return ret; } static int cfg80211_rtw_set_beacon(struct wiphy *wiphy, struct net_device *ndev, struct beacon_parameters *info) { _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); pmlmeext->bstart_bss = _TRUE; cfg80211_rtw_add_beacon(wiphy, ndev, info); return 0; } static int cfg80211_rtw_del_beacon(struct wiphy *wiphy, struct net_device *ndev) { DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); return 0; } #else static int cfg80211_rtw_start_ap(struct wiphy *wiphy, struct net_device *ndev, struct cfg80211_ap_settings *settings) { int ret = 0; _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); DBG_871X(FUNC_NDEV_FMT" hidden_ssid:%d, auth_type:%d\n", FUNC_NDEV_ARG(ndev), settings->hidden_ssid, settings->auth_type); ret = rtw_add_beacon(adapter, settings->beacon.head, settings->beacon.head_len, settings->beacon.tail, settings->beacon.tail_len); adapter->mlmeextpriv.mlmext_info.hidden_ssid_mode = settings->hidden_ssid; if (settings->ssid && settings->ssid_len) { WLAN_BSSID_EX *pbss_network = &adapter->mlmepriv.cur_network.network; WLAN_BSSID_EX *pbss_network_ext = &adapter->mlmeextpriv.mlmext_info.network; if(0) DBG_871X(FUNC_ADPT_FMT" ssid:(%s,%zu), from ie:(%s,%d)\n", FUNC_ADPT_ARG(adapter), settings->ssid, settings->ssid_len, pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength); _rtw_memcpy(pbss_network->Ssid.Ssid, (void *)settings->ssid, settings->ssid_len); pbss_network->Ssid.SsidLength = settings->ssid_len; _rtw_memcpy(pbss_network_ext->Ssid.Ssid, (void *)settings->ssid, settings->ssid_len); pbss_network_ext->Ssid.SsidLength = settings->ssid_len; if(0) DBG_871X(FUNC_ADPT_FMT" after ssid:(%s,%d), (%s,%d)\n", FUNC_ADPT_ARG(adapter), pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength, pbss_network_ext->Ssid.Ssid, pbss_network_ext->Ssid.SsidLength); } return ret; } static int cfg80211_rtw_change_beacon(struct wiphy *wiphy, struct net_device *ndev, struct cfg80211_beacon_data *info) { int ret = 0; _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ret = rtw_add_beacon(adapter, info->head, info->head_len, info->tail, info->tail_len); return ret; } static int cfg80211_rtw_stop_ap(struct wiphy *wiphy, struct net_device *ndev) { DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); return 0; } #endif //(LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) static int cfg80211_rtw_add_station(struct wiphy *wiphy, struct net_device *ndev, u8 *mac, struct station_parameters *params) { DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); return 0; } static int cfg80211_rtw_del_station(struct wiphy *wiphy, struct net_device *ndev, u8 *mac) { int ret=0; _irqL irqL; _list *phead, *plist; u8 updated = _FALSE; struct sta_info *psta = NULL; _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct sta_priv *pstapriv = &padapter->stapriv; DBG_871X("+"FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) { DBG_8192C("%s, fw_state != FW_LINKED|WIFI_AP_STATE\n", __func__); return -EINVAL; } if(!mac) { DBG_8192C("flush all sta, and cam_entry\n"); flush_all_cam_entry(padapter); //clear CAM ret = rtw_sta_flush(padapter); return ret; } DBG_8192C("free sta macaddr =" MAC_FMT "\n", MAC_ARG(mac)); if (mac[0] == 0xff && mac[1] == 0xff && mac[2] == 0xff && mac[3] == 0xff && mac[4] == 0xff && mac[5] == 0xff) { return -EINVAL; } _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); phead = &pstapriv->asoc_list; plist = get_next(phead); //check asoc_queue while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); plist = get_next(plist); if(_rtw_memcmp(mac, psta->hwaddr, ETH_ALEN)) { if(psta->dot8021xalg == 1 && psta->bpairwise_key_installed == _FALSE) { DBG_8192C("%s, sta's dot8021xalg = 1 and key_installed = _FALSE\n", __func__); } else { DBG_8192C("free psta=%p, aid=%d\n", psta, psta->aid); rtw_list_delete(&psta->asoc_list); pstapriv->asoc_list_cnt--; //_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING); //_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); psta = NULL; break; } } } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); associated_clients_update(padapter, updated); DBG_871X("-"FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); return ret; } static int cfg80211_rtw_change_station(struct wiphy *wiphy, struct net_device *ndev, u8 *mac, struct station_parameters *params) { DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); return 0; } struct sta_info *rtw_sta_info_get_by_idx(const int idx, struct sta_priv *pstapriv) { _list *phead, *plist; struct sta_info *psta = NULL; int i = 0; phead = &pstapriv->asoc_list; plist = get_next(phead); //check asoc_queue while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { if(idx == i) psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); plist = get_next(plist); i++; } return psta; } static int cfg80211_rtw_dump_station(struct wiphy *wiphy, struct net_device *ndev, int idx, u8 *mac, struct station_info *sinfo) { int ret = 0; _irqL irqL; _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); struct sta_info *psta = NULL; struct sta_priv *pstapriv = &padapter->stapriv; DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); psta = rtw_sta_info_get_by_idx(idx, pstapriv); _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); if(NULL == psta) { DBG_871X("Station is not found\n"); ret = -ENOENT; goto exit; } _rtw_memcpy(mac, psta->hwaddr, ETH_ALEN); sinfo->filled = 0; sinfo->filled |= STATION_INFO_SIGNAL; sinfo->signal = psta->rssi; exit: return ret; } static int cfg80211_rtw_change_bss(struct wiphy *wiphy, struct net_device *ndev, struct bss_parameters *params) { u8 i; DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); /* DBG_8192C("use_cts_prot=%d\n", params->use_cts_prot); DBG_8192C("use_short_preamble=%d\n", params->use_short_preamble); DBG_8192C("use_short_slot_time=%d\n", params->use_short_slot_time); DBG_8192C("ap_isolate=%d\n", params->ap_isolate); DBG_8192C("basic_rates_len=%d\n", params->basic_rates_len); for(i=0; ibasic_rates_len; i++) { DBG_8192C("basic_rates=%d\n", params->basic_rates[i]); } */ return 0; } static int cfg80211_rtw_set_channel(struct wiphy *wiphy #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) , struct net_device *ndev #endif , struct ieee80211_channel *chan, enum nl80211_channel_type channel_type) { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); #endif return 0; } static int cfg80211_rtw_auth(struct wiphy *wiphy, struct net_device *ndev, struct cfg80211_auth_request *req) { DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); return 0; } static int cfg80211_rtw_assoc(struct wiphy *wiphy, struct net_device *ndev, struct cfg80211_assoc_request *req) { DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); return 0; } #endif //CONFIG_AP_MODE void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) { int type; s32 freq; int channel; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); u8 category, action; channel = rtw_get_oper_ch(padapter); DBG_8192C("RTW_Rx:cur_ch=%d\n", channel); #ifdef CONFIG_P2P type = rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE); if (type >= 0) goto indicate; #endif rtw_action_frame_parse(pmgmt_frame, frame_len, &category, &action); DBG_871X("RTW_Rx:category(%u), action(%u)\n", category, action); indicate: if (channel <= RTW_CH_MAX_2G_CHANNEL) freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); else freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); #else cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); #endif } void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) { int type; s32 freq; int channel; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); u8 category, action; channel = rtw_get_oper_ch(padapter); DBG_8192C("RTW_Rx:cur_ch=%d\n", channel); #ifdef CONFIG_P2P type = rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE); if (type >= 0) { switch (type) { case P2P_GO_NEGO_CONF: case P2P_PROVISION_DISC_RESP: case P2P_INVIT_RESP: rtw_set_scan_deny(padapter, 2000); rtw_clear_scan_deny(padapter); } goto indicate; } #endif rtw_action_frame_parse(pmgmt_frame, frame_len, &category, &action); DBG_871X("RTW_Rx:category(%u), action(%u)\n", category, action); indicate: if (channel <= RTW_CH_MAX_2G_CHANNEL) freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); else freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); #else cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); #endif } void rtw_cfg80211_rx_action(_adapter *adapter, u8 *frame, uint frame_len, const char*msg) { s32 freq; int channel; struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); u8 category, action; channel = rtw_get_oper_ch(adapter); rtw_action_frame_parse(frame, frame_len, &category, &action); DBG_8192C("RTW_Rx:cur_ch=%d\n", channel); if (msg) DBG_871X("RTW_Rx:%s\n", msg); else DBG_871X("RTW_Rx:category(%u), action(%u)\n", category, action); if (channel <= RTW_CH_MAX_2G_CHANNEL) freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); else freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) rtw_cfg80211_rx_mgmt(adapter, freq, 0, frame, frame_len, GFP_ATOMIC); #else cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC); #endif } #ifdef CONFIG_P2P void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len) { u16 wps_devicepassword_id = 0x0000; uint wps_devicepassword_id_len = 0; u8 wpsie[ 255 ] = { 0x00 }, p2p_ie[ 255 ] = { 0x00 }; uint p2p_ielen = 0; uint wpsielen = 0; u32 devinfo_contentlen = 0; u8 devinfo_content[64] = { 0x00 }; u16 capability = 0; uint capability_len = 0; unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; u8 action = P2P_PUB_ACTION_ACTION; u8 dialogToken = 1; u32 p2poui = cpu_to_be32(P2POUI); u8 oui_subtype = P2P_PROVISION_DISC_REQ; u32 p2pielen = 0; #ifdef CONFIG_WFD u32 wfdielen = 0; #endif //CONFIG_WFD struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; struct rtw_ieee80211_hdr *pwlanhdr; unsigned short *fctrl; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct wifidirect_info *pwdinfo = &(padapter->wdinfo); u8 *frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); size_t frame_body_len = len - sizeof(struct rtw_ieee80211_hdr_3addr); DBG_871X( "[%s] In\n", __FUNCTION__ ); //prepare for building provision_request frame _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerIFAddr, GetAddr1Ptr(buf), ETH_ALEN); _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerDevAddr, GetAddr1Ptr(buf), ETH_ALEN); pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; rtw_get_wps_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, wpsie, &wpsielen); rtw_get_wps_attr_content( wpsie, wpsielen, WPS_ATTR_DEVICE_PWID, (u8*) &wps_devicepassword_id, &wps_devicepassword_id_len); wps_devicepassword_id = be16_to_cpu( wps_devicepassword_id ); switch(wps_devicepassword_id) { case WPS_DPID_PIN: pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_LABEL; break; case WPS_DPID_USER_SPEC: pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_DISPLYA; break; case WPS_DPID_MACHINE_SPEC: break; case WPS_DPID_REKEY: break; case WPS_DPID_PBC: pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; break; case WPS_DPID_REGISTRAR_SPEC: pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_KEYPAD; break; default: break; } if ( rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, p2p_ie, &p2p_ielen ) ) { rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, devinfo_content, &devinfo_contentlen); rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&capability, &capability_len); } //start to build provision_request frame _rtw_memset(wpsie, 0, sizeof(wpsie)); _rtw_memset(p2p_ie, 0, sizeof(p2p_ie)); p2p_ielen = 0; if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { return; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; fctrl = &(pwlanhdr->frame_ctl); *(fctrl) = 0; _rtw_memcpy(pwlanhdr->addr1, pwdinfo->tx_prov_disc_info.peerDevAddr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, pwdinfo->tx_prov_disc_info.peerDevAddr, ETH_ALEN); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); pmlmeext->mgnt_seq++; SetFrameSubType(pframe, WIFI_ACTION); pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); //build_prov_disc_request_p2p_ie // P2P OUI p2pielen = 0; p2p_ie[ p2pielen++ ] = 0x50; p2p_ie[ p2pielen++ ] = 0x6F; p2p_ie[ p2pielen++ ] = 0x9A; p2p_ie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 // Commented by Albert 20110301 // According to the P2P Specification, the provision discovery request frame should contain 3 P2P attributes // 1. P2P Capability // 2. Device Info // 3. Group ID ( When joining an operating P2P Group ) // P2P Capability ATTR // Type: p2p_ie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; // Length: //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); RTW_PUT_LE16(p2p_ie + p2pielen, 0x0002); p2pielen += 2; // Value: // Device Capability Bitmap, 1 byte // Group Capability Bitmap, 1 byte _rtw_memcpy(p2p_ie + p2pielen, &capability, 2); p2pielen += 2; // Device Info ATTR // Type: p2p_ie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; // Length: // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); RTW_PUT_LE16(p2p_ie + p2pielen, devinfo_contentlen); p2pielen += 2; // Value: _rtw_memcpy(p2p_ie + p2pielen, devinfo_content, devinfo_contentlen); p2pielen += devinfo_contentlen; pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2p_ie, &p2p_ielen); //p2pielen = build_prov_disc_request_p2p_ie( pwdinfo, pframe, NULL, 0, pwdinfo->tx_prov_disc_info.peerDevAddr); //pframe += p2pielen; pattrib->pktlen += p2p_ielen; wpsielen = 0; // WPS OUI *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); wpsielen += 4; // WPS version // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); wpsielen += 2; // Value: wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 // Config Method // Type: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); wpsielen += 2; // Length: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); wpsielen += 2; // Value: *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->tx_prov_disc_info.wps_config_method_request ); wpsielen += 2; pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); #ifdef CONFIG_WFD wfdielen = build_provdisc_req_wfd_ie(pwdinfo, pframe); pframe += wfdielen; pattrib->pktlen += wfdielen; #endif //CONFIG_WFD pattrib->last_txcmdsz = pattrib->pktlen; //dump_mgntframe(padapter, pmgntframe); if (dump_mgntframe_and_wait_ack(padapter, pmgntframe) != _SUCCESS) DBG_8192C("%s, ack to\n", __func__); //if(wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC) //{ // DBG_8192C("waiting for p2p peer key-in PIN CODE\n"); // rtw_msleep_os(15000); // 15 sec for key in PIN CODE, workaround for GS2 before issuing Nego Req. //} } static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy, #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) struct wireless_dev *wdev, #else struct net_device *ndev, #endif struct ieee80211_channel * channel, #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) enum nl80211_channel_type channel_type, #endif unsigned int duration, u64 *cookie) { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) struct net_device *ndev = wdev_to_ndev(wdev); #endif s32 err = 0; u8 remain_ch = (u8) ieee80211_frequency_to_channel(channel->center_freq); u8 ready_on_channel = _FALSE; _adapter *padapter; struct rtw_wdev_priv *pwdev_priv; struct mlme_ext_priv *pmlmeext; struct wifidirect_info *pwdinfo; struct cfg80211_wifidirect_info *pcfg80211_wdinfo; u8 is_p2p_find = _FALSE; if (ndev == NULL) { return -EINVAL; } padapter = (_adapter *)rtw_netdev_priv(ndev); pwdev_priv = adapter_wdev_data(padapter); pmlmeext = &padapter->mlmeextpriv; pwdinfo = &padapter->wdinfo; pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; #ifdef CONFIG_CONCURRENT_MODE is_p2p_find=(duration < (pwdinfo->ext_listen_interval))? _TRUE : _FALSE; #endif DBG_871X(FUNC_ADPT_FMT" ch:%u duration:%d\n", FUNC_ADPT_ARG(padapter), remain_ch, duration); if(pcfg80211_wdinfo->is_ro_ch == _TRUE) { pcfg80211_wdinfo->not_indic_ro_ch_exp = _TRUE; DBG_8192C("%s, cancel ro ch timer\n", __func__); _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); #ifdef CONFIG_CONCURRENT_MODE ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); #endif //CONFIG_CONCURRENT_MODE p2p_protocol_wk_hdl(padapter, P2P_RO_CH_WK); pcfg80211_wdinfo->not_indic_ro_ch_exp = _FALSE; } pcfg80211_wdinfo->is_ro_ch = _TRUE; pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time(); if(_FAIL == rtw_pwr_wakeup(padapter)) { err = -EFAULT; goto exit; } _rtw_memcpy(&pcfg80211_wdinfo->remain_on_ch_channel, channel, sizeof(struct ieee80211_channel)); #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) pcfg80211_wdinfo->remain_on_ch_type= channel_type; #endif pcfg80211_wdinfo->remain_on_ch_cookie= *cookie; rtw_scan_abort(padapter); #ifdef CONFIG_CONCURRENT_MODE if ((rtw_buddy_adapter_up(padapter)) && is_p2p_find) //don't scan_abort during p2p_listen. rtw_scan_abort(padapter->pbuddy_adapter); #endif //CONFIG_CONCURRENT_MODE if (check_fwstate(&padapter->mlmepriv, _FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) { DBG_871X("mlme state:0x%x\n", get_fwstate(&padapter->mlmepriv)); remain_ch = padapter->mlmeextpriv.cur_channel; } #ifdef CONFIG_CONCURRENT_MODE if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) { DBG_871X("buddy_intf's mlme state:0x%x\n", get_fwstate(&(padapter->pbuddy_adapter->mlmepriv))); remain_ch = padapter->pbuddy_adapter->mlmeextpriv.cur_channel; } #endif /* CONFIG_CONCURRENT_MODE */ //if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); adapter_wdev_data(padapter)->p2p_enabled = _TRUE; padapter->wdinfo.listen_channel = remain_ch; } else { rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); #endif } rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); if(duration < 400) duration = duration*3;//extend from exper. #ifdef CONFIG_CONCURRENT_MODE if (check_buddy_fwstate(padapter, _FW_LINKED)) { if (is_p2p_find) // p2p_find , duration<1000 duration = duration + pwdinfo->ext_listen_interval; else // p2p_listen, duration=5000 duration = pwdinfo->ext_listen_interval + (pwdinfo->ext_listen_interval/4); } #endif pcfg80211_wdinfo->restore_channel = rtw_get_oper_ch(padapter); if(rtw_ch_set_search_ch(pmlmeext->channel_set, remain_ch) >= 0) { #ifdef CONFIG_CONCURRENT_MODE if ( check_buddy_fwstate(padapter, _FW_LINKED) ) { PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; if((remain_ch != pbuddy_mlmeext->cur_channel) && !check_fwstate(&padapter->mlmepriv, _FW_LINKED)) { if(ATOMIC_READ(&pwdev_priv->switch_ch_to)==1 || (remain_ch != pmlmeext->cur_channel)) { DBG_8192C("%s, issue nulldata pwrbit=1\n", __func__); issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500); ATOMIC_SET(&pwdev_priv->switch_ch_to, 0); DBG_8192C("%s, set switch ch timer, duration=%d\n", __func__, duration-pwdinfo->ext_listen_interval); _set_timer(&pwdinfo->ap_p2p_switch_timer, duration-pwdinfo->ext_listen_interval); } } ready_on_channel = _TRUE; //pmlmeext->cur_channel = remain_ch; //set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); }else #endif //CONFIG_CONCURRENT_MODE if(remain_ch != rtw_get_oper_ch(padapter) ) { ready_on_channel = _TRUE; //pmlmeext->cur_channel = remain_ch; //set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); } } else { DBG_871X("%s remain_ch:%u not in channel plan!!!!\n", __FUNCTION__, remain_ch); } //call this after other things have been done #ifdef CONFIG_CONCURRENT_MODE if(ATOMIC_READ(&pwdev_priv->ro_ch_to)==1 || (remain_ch != rtw_get_oper_ch(padapter))) { u8 co_channel = 0xff; ATOMIC_SET(&pwdev_priv->ro_ch_to, 0); #endif if(ready_on_channel == _TRUE) { if ( !check_fwstate(&padapter->mlmepriv, _FW_LINKED ) ) { pmlmeext->cur_channel = remain_ch; #ifdef CONFIG_CONCURRENT_MODE co_channel = rtw_get_oper_ch(padapter); if(co_channel !=remain_ch) #endif { //if (!padapter->mlmepriv.LinkDetectInfo.bBusyTraffic) set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); } } } DBG_8192C("%s, set ro ch timer, duration=%d\n", __func__, duration); _set_timer( &pcfg80211_wdinfo->remain_on_ch_timer, duration); #ifdef CONFIG_CONCURRENT_MODE } #endif rtw_cfg80211_ready_on_channel(padapter, *cookie, channel, channel_type, duration, GFP_KERNEL); exit: if (err) { pcfg80211_wdinfo->is_ro_ch = _FALSE; pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time(); } return err; } static s32 cfg80211_rtw_cancel_remain_on_channel(struct wiphy *wiphy, #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) struct wireless_dev *wdev, #else struct net_device *ndev, #endif u64 cookie) { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) struct net_device *ndev = wdev_to_ndev(wdev); #endif s32 err = 0; _adapter *padapter; struct rtw_wdev_priv *pwdev_priv; struct wifidirect_info *pwdinfo; struct cfg80211_wifidirect_info *pcfg80211_wdinfo; if (ndev == NULL) { err = -EINVAL; goto exit; } padapter = (_adapter *)rtw_netdev_priv(ndev); pwdev_priv = adapter_wdev_data(padapter); pwdinfo = &padapter->wdinfo; pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); if (pcfg80211_wdinfo->is_ro_ch == _TRUE) { pcfg80211_wdinfo->not_indic_ro_ch_exp = _TRUE; DBG_8192C("%s, cancel ro ch timer\n", __func__); _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); #ifdef CONFIG_CONCURRENT_MODE ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); #endif p2p_protocol_wk_hdl(padapter, P2P_RO_CH_WK); pcfg80211_wdinfo->not_indic_ro_ch_exp = _FALSE; } #if 0 // Disable P2P Listen State if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); _rtw_memset(pwdinfo, 0x00, sizeof(struct wifidirect_info)); } } else #endif { rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); #endif } pcfg80211_wdinfo->is_ro_ch = _FALSE; pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time(); exit: return err; } #endif //CONFIG_P2P static int _cfg80211_rtw_mgmt_tx(_adapter *padapter, u8 tx_ch, const u8 *buf, size_t len) { struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; unsigned char *pframe; int ret = _FAIL; bool ack = _TRUE; struct rtw_ieee80211_hdr *pwlanhdr; struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &padapter->wdinfo; #endif //CONFIG_P2P //struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; rtw_set_scan_deny(padapter, 1000); rtw_scan_abort(padapter); #ifdef CONFIG_CONCURRENT_MODE if(rtw_buddy_adapter_up(padapter)) rtw_scan_abort(padapter->pbuddy_adapter); #endif /* CONFIG_CONCURRENT_MODE */ #ifdef CONFIG_P2P if (padapter->cfg80211_wdinfo.is_ro_ch == _TRUE) { //DBG_8192C("%s, cancel ro ch timer\n", __func__); //_cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); //padapter->cfg80211_wdinfo.is_ro_ch = _FALSE; #ifdef CONFIG_CONCURRENT_MODE if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED )) { DBG_8192C("%s, extend ro ch time\n", __func__); _set_timer( &padapter->cfg80211_wdinfo.remain_on_ch_timer, pwdinfo->ext_listen_period); } #endif //CONFIG_CONCURRENT_MODE } #endif //CONFIG_P2P #ifdef CONFIG_CONCURRENT_MODE if (check_buddy_fwstate(padapter, _FW_LINKED )) { u8 co_channel=0xff; PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; co_channel = rtw_get_oper_ch(padapter); if (tx_ch != pbuddy_mlmeext->cur_channel) { u16 ext_listen_period; if (ATOMIC_READ(&pwdev_priv->switch_ch_to)==1) { DBG_8192C("%s, issue nulldata pwrbit=1\n", __func__); issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500); ATOMIC_SET(&pwdev_priv->switch_ch_to, 0); //DBG_8192C("%s, set switch ch timer, period=%d\n", __func__, pwdinfo->ext_listen_period); //_set_timer(&pwdinfo->ap_p2p_switch_timer, pwdinfo->ext_listen_period); } if (check_fwstate(&padapter->mlmepriv, _FW_LINKED )) { ext_listen_period = 500;// 500ms } else { ext_listen_period = pwdinfo->ext_listen_period; } DBG_8192C("%s, set switch ch timer, period=%d\n", __func__, ext_listen_period); _set_timer(&pwdinfo->ap_p2p_switch_timer, ext_listen_period); } if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED )) pmlmeext->cur_channel = tx_ch; if (tx_ch != co_channel) set_channel_bwmode(padapter, tx_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); }else #endif //CONFIG_CONCURRENT_MODE //if (tx_ch != pmlmeext->cur_channel) { if(tx_ch != rtw_get_oper_ch(padapter)) { if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED )) pmlmeext->cur_channel = tx_ch; set_channel_bwmode(padapter, tx_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); } //starting alloc mgmt frame to dump it if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { //ret = -ENOMEM; ret = _FAIL; goto exit; } //update attribute pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); pattrib->retry_ctrl = _FALSE; _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; _rtw_memcpy(pframe, (void*)buf, len); pattrib->pktlen = len; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; //update seq number pmlmeext->mgnt_seq = GetSequence(pwlanhdr); pattrib->seqnum = pmlmeext->mgnt_seq; pmlmeext->mgnt_seq++; #ifdef CONFIG_WFD { struct wifi_display_info *pwfd_info; pwfd_info = padapter->wdinfo.wfd_info; if ( _TRUE == pwfd_info->wfd_enable ) { rtw_append_wfd_ie( padapter, pframe, &pattrib->pktlen ); } } #endif // CONFIG_WFD pattrib->last_txcmdsz = pattrib->pktlen; if (dump_mgntframe_and_wait_ack(padapter, pmgntframe) != _SUCCESS) { ack = _FALSE; ret = _FAIL; #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("%s, ack == _FAIL\n", __func__); #endif } else { #ifdef CONFIG_XMIT_ACK rtw_msleep_os(50); #endif #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("%s, ack=%d, ok!\n", __func__, ack); #endif ret = _SUCCESS; } exit: #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("%s, ret=%d\n", __func__, ret); #endif return ret; } static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) struct wireless_dev *wdev, #else struct net_device *ndev, #endif #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0)) || defined(COMPAT_KERNEL_RELEASE) struct ieee80211_channel *chan, #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) bool offchan, #endif #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) enum nl80211_channel_type channel_type, #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) bool channel_type_valid, #endif #endif #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) unsigned int wait, #endif const u8 *buf, size_t len, #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) bool no_cck, #endif #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0)) bool dont_wait_for_ack, #endif #else struct cfg80211_mgmt_tx_params *params, #endif u64 *cookie) { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) struct net_device *ndev = wdev_to_ndev(wdev); #endif #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)) || defined(COMPAT_KERNEL_RELEASE) struct ieee80211_channel *chan = params->chan; bool offchan = params->offchan; unsigned int wait = params->wait; const u8 *buf = params->buf; size_t len = params->len; bool no_cck = params->no_cck; bool dont_wait_for_ack = params->dont_wait_for_ack; #endif int ret = 0; int tx_ret; u32 dump_limit = RTW_MAX_MGMT_TX_CNT; u32 dump_cnt = 0; bool ack = _TRUE; u8 tx_ch = (u8)ieee80211_frequency_to_channel(chan->center_freq); u8 category, action; int type = (-1); u32 start = rtw_get_current_time(); _adapter *padapter; struct rtw_wdev_priv *pwdev_priv; if (ndev == NULL) { ret = -EINVAL; goto exit; } padapter = (_adapter *)rtw_netdev_priv(ndev); pwdev_priv = adapter_wdev_data(padapter); /* cookie generation */ *cookie = (unsigned long) buf; #ifdef CONFIG_DEBUG_CFG80211 DBG_871X(FUNC_ADPT_FMT" len=%zu, ch=%d" #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ", ch_type=%d" #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ", channel_type_valid=%d" #endif #endif "\n", FUNC_ADPT_ARG(padapter), len, tx_ch #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) , channel_type #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) , channel_type_valid #endif #endif ); #endif /* CONFIG_DEBUG_CFG80211 */ /* indicate ack before issue frame to avoid racing with rsp frame */ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) rtw_cfg80211_mgmt_tx_status(padapter, *cookie, buf, len, ack, GFP_KERNEL); #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) cfg80211_action_tx_status(ndev, *cookie, buf, len, ack, GFP_KERNEL); #endif if (rtw_action_frame_parse(buf, len, &category, &action) == _FALSE) { DBG_8192C(FUNC_ADPT_FMT" frame_control:0x%x\n", FUNC_ADPT_ARG(padapter), le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl)); goto exit; } DBG_8192C("RTW_Tx:tx_ch=%d, da="MAC_FMT"\n", tx_ch, MAC_ARG(GetAddr1Ptr(buf))); #ifdef CONFIG_P2P if((type = rtw_p2p_check_frames(padapter, buf, len, _TRUE)) >= 0) { goto dump; } #endif if (category == RTW_WLAN_CATEGORY_PUBLIC) DBG_871X("RTW_Tx:%s\n", action_public_str(action)); else DBG_871X("RTW_Tx:category(%u), action(%u)\n", category, action); dump: rtw_ps_deny(padapter, PS_DENY_MGNT_TX); if(_FAIL == rtw_pwr_wakeup(padapter)) { ret = -EFAULT; goto cancel_ps_deny; } do { dump_cnt++; tx_ret = _cfg80211_rtw_mgmt_tx(padapter, tx_ch, buf, len); } while (dump_cnt < dump_limit && tx_ret != _SUCCESS); if (tx_ret != _SUCCESS || dump_cnt > 1) { DBG_871X(FUNC_ADPT_FMT" %s (%d/%d) in %d ms\n", FUNC_ADPT_ARG(padapter), tx_ret==_SUCCESS?"OK":"FAIL", dump_cnt, dump_limit, rtw_get_passing_time_ms(start)); } switch (type) { case P2P_GO_NEGO_CONF: rtw_clear_scan_deny(padapter); break; case P2P_INVIT_RESP: if (pwdev_priv->invit_info.flags & BIT(0) && pwdev_priv->invit_info.status == 0) { DBG_871X(FUNC_ADPT_FMT" agree with invitation of persistent group\n", FUNC_ADPT_ARG(padapter)); rtw_set_scan_deny(padapter, 5000); rtw_pwr_wakeup_ex(padapter, 5000); rtw_clear_scan_deny(padapter); } break; } cancel_ps_deny: rtw_ps_deny_cancel(padapter, PS_DENY_MGNT_TX); exit: return ret; } static void cfg80211_rtw_mgmt_frame_register(struct wiphy *wiphy, #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) struct wireless_dev *wdev, #else struct net_device *ndev, #endif u16 frame_type, bool reg) { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) struct net_device *ndev = wdev_to_ndev(wdev); #endif _adapter *adapter; if (ndev == NULL) goto exit; adapter = (_adapter *)rtw_netdev_priv(ndev); #ifdef CONFIG_DEBUG_CFG80211 DBG_871X(FUNC_ADPT_FMT" frame_type:%x, reg:%d\n", FUNC_ADPT_ARG(adapter), frame_type, reg); #endif if (frame_type != (IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_PROBE_REQ)) return; exit: return; } #if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) static int cfg80211_rtw_tdls_mgmt(struct wiphy *wiphy, struct net_device *ndev, u8 *peer, u8 action_code, u8 dialog_token, u16 status_code, const u8 *buf, size_t len) { _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); int ret = 0; struct tdls_txmgmt txmgmt; //TDLS: discard wpa_supplicant's frame mgmt DBG_871X("%s %d\n", __FUNCTION__, __LINE__); return 0; _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); _rtw_memcpy(txmgmt.peer, peer, ETH_ALEN); txmgmt.action_code = action_code; txmgmt.dialog_token= dialog_token; txmgmt.status_code = status_code; txmgmt.len = len; txmgmt.buf = (u8 *)rtw_malloc(txmgmt.len); if (txmgmt.buf == NULL) { ret = -ENOMEM; goto bad; } _rtw_memcpy(txmgmt.buf, (void*)buf, txmgmt.len); txmgmt.external_support = _TRUE; //TDLS: Debug purpose #if 0 DBG_871X("%s %d\n", __FUNCTION__, __LINE__); DBG_871X("peer:"MAC_FMT" ", MAC_ARG(txmgmt.peer)); DBG_871X("action code:%d ", txmgmt.action_code); DBG_871X("dialog:%d ", txmgmt.dialog_token); DBG_871X("status code:%d\n", txmgmt.status_code); if( txmgmt.len > 0 ) { int i=0; for(;i < len; i++) DBG_871X("%02x ", *(txmgmt.buf+i)); DBG_871X("\n len:%d\n", txmgmt.len); } #endif switch(txmgmt.action_code) { case TDLS_SETUP_REQUEST: issue_tdls_setup_req(padapter, &txmgmt, _TRUE); break; case TDLS_SETUP_RESPONSE: issue_tdls_setup_rsp(padapter, &txmgmt); break; case TDLS_SETUP_CONFIRM: issue_tdls_setup_cfm(padapter, &txmgmt); break; case TDLS_TEARDOWN: break; case TDLS_DISCOVERY_REQUEST: issue_tdls_dis_req(padapter, &txmgmt); break; } bad: if (txmgmt.buf) { rtw_mfree(txmgmt.buf, txmgmt.len); } return ret; } static int cfg80211_rtw_tdls_oper(struct wiphy *wiphy, struct net_device *ndev, u8 *peer, enum nl80211_tdls_operation oper) { _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); struct tdls_txmgmt txmgmt; struct sta_info *ptdls_sta = NULL; DBG_871X(FUNC_NDEV_FMT", nl80211_tdls_operation:%d\n", FUNC_NDEV_ARG(ndev), oper); #ifdef CONFIG_LPS rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1); #endif //CONFIG_LPS _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); if(peer) _rtw_memcpy(txmgmt.peer, peer, ETH_ALEN); #if 0 CFG80211_TDLS_DISCOVERY_REQ, CFG80211_TDLS_SETUP, CFG80211_TDLS_TEARDOWN, CFG80211_TDLS_ENABLE_LINK, CFG80211_TDLS_DISABLE_LINK, CFG80211_TDLS_ENABLE, CFG80211_TDLS_DISABLE #endif switch(oper) { case NL80211_TDLS_DISCOVERY_REQ: issue_tdls_dis_req(padapter, &txmgmt); break; case NL80211_TDLS_SETUP: #ifdef CONFIG_WFD if ( _AES_ != padapter->securitypriv.dot11PrivacyAlgrthm ) { if ( padapter->wdinfo.wfd_tdls_weaksec == _TRUE) issue_tdls_setup_req(padapter, &txmgmt, _TRUE); else DBG_871X( "[%s] Current link is not AES, SKIP sending the tdls setup request!!\n", __FUNCTION__ ); } else #endif // CONFIG_WFD { issue_tdls_setup_req(padapter, &txmgmt, _TRUE); } break; case NL80211_TDLS_TEARDOWN: ptdls_sta = rtw_get_stainfo( &(padapter->stapriv), txmgmt.peer); if(ptdls_sta != NULL) { txmgmt.status_code = _RSON_TDLS_TEAR_UN_RSN_; issue_tdls_teardown(padapter, &txmgmt, _FALSE); } else DBG_871X( "TDLS peer not found\n"); break; case NL80211_TDLS_ENABLE_LINK: break; case NL80211_TDLS_DISABLE_LINK: break; } return 0; } #endif /* CONFIG_TDLS */ #if defined(CONFIG_PNO_SUPPORT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) static int cfg80211_rtw_sched_scan_start(struct wiphy *wiphy, struct net_device *dev, struct cfg80211_sched_scan_request *request) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); u8 ret; if (padapter->bup == _FALSE) { DBG_871X("%s: net device is down.\n", __func__); return -EIO; } if(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE || check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE || check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { DBG_871X("%s: device is busy.\n", __func__); rtw_scan_abort(padapter); } if (request == NULL) { DBG_871X("%s: invalid cfg80211_requests parameters.\n", __func__); return -EINVAL; } ret = rtw_android_cfg80211_pno_setup(dev, request->ssids, request->n_ssids, request->interval); if (ret < 0) { DBG_871X("%s ret: %d\n", __func__, ret); goto exit; } ret = rtw_android_pno_enable(dev, _TRUE); if (ret < 0) { DBG_871X("%s ret: %d\n", __func__, ret); goto exit; } exit: return ret; } static int cfg80211_rtw_sched_scan_stop(struct wiphy *wiphy, struct net_device *dev) { return rtw_android_pno_enable(dev, _FALSE); } #endif /* CONFIG_PNO_SUPPORT */ static int rtw_cfg80211_set_beacon_wpsp2pie(struct net_device *ndev, char *buf, int len) { int ret = 0; uint wps_ielen = 0; u8 *wps_ie; u32 p2p_ielen = 0; u8 wps_oui[8]={0x0,0x50,0xf2,0x04}; u8 *p2p_ie; u32 wfd_ielen = 0; u8 *wfd_ie; _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); DBG_871X(FUNC_NDEV_FMT" ielen=%d\n", FUNC_NDEV_ARG(ndev), len); if(len>0) { if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) { #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("bcn_wps_ielen=%d\n", wps_ielen); #endif if(pmlmepriv->wps_beacon_ie) { u32 free_len = pmlmepriv->wps_beacon_ie_len; pmlmepriv->wps_beacon_ie_len = 0; rtw_mfree(pmlmepriv->wps_beacon_ie, free_len); pmlmepriv->wps_beacon_ie = NULL; } pmlmepriv->wps_beacon_ie = rtw_malloc(wps_ielen); if ( pmlmepriv->wps_beacon_ie == NULL) { DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } _rtw_memcpy(pmlmepriv->wps_beacon_ie, wps_ie, wps_ielen); pmlmepriv->wps_beacon_ie_len = wps_ielen; update_beacon(padapter, _VENDOR_SPECIFIC_IE_, wps_oui, _TRUE); } //buf += wps_ielen; //len -= wps_ielen; #ifdef CONFIG_P2P if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) { #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("bcn_p2p_ielen=%d\n", p2p_ielen); #endif if(pmlmepriv->p2p_beacon_ie) { u32 free_len = pmlmepriv->p2p_beacon_ie_len; pmlmepriv->p2p_beacon_ie_len = 0; rtw_mfree(pmlmepriv->p2p_beacon_ie, free_len); pmlmepriv->p2p_beacon_ie = NULL; } pmlmepriv->p2p_beacon_ie = rtw_malloc(p2p_ielen); if ( pmlmepriv->p2p_beacon_ie == NULL) { DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } _rtw_memcpy(pmlmepriv->p2p_beacon_ie, p2p_ie, p2p_ielen); pmlmepriv->p2p_beacon_ie_len = p2p_ielen; } #endif //CONFIG_P2P //buf += p2p_ielen; //len -= p2p_ielen; #ifdef CONFIG_WFD if(rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen)) { #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("bcn_wfd_ielen=%d\n", wfd_ielen); #endif if(pmlmepriv->wfd_beacon_ie) { u32 free_len = pmlmepriv->wfd_beacon_ie_len; pmlmepriv->wfd_beacon_ie_len = 0; rtw_mfree(pmlmepriv->wfd_beacon_ie, free_len); pmlmepriv->wfd_beacon_ie = NULL; } pmlmepriv->wfd_beacon_ie = rtw_malloc(wfd_ielen); if ( pmlmepriv->wfd_beacon_ie == NULL) { DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } rtw_get_wfd_ie(buf, len, pmlmepriv->wfd_beacon_ie, &pmlmepriv->wfd_beacon_ie_len); } #endif //CONFIG_WFD pmlmeext->bstart_bss = _TRUE; } return ret; } static int rtw_cfg80211_set_probe_resp_wpsp2pie(struct net_device *net, char *buf, int len) { int ret = 0; uint wps_ielen = 0; u8 *wps_ie; u32 p2p_ielen = 0; u8 *p2p_ie; u32 wfd_ielen = 0; u8 *wfd_ie; _adapter *padapter = (_adapter *)rtw_netdev_priv(net); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("%s, ielen=%d\n", __func__, len); #endif if(len>0) { if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) { uint attr_contentlen = 0; u16 uconfig_method, *puconfig_method = NULL; #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("probe_resp_wps_ielen=%d\n", wps_ielen); #endif if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) { u8 sr = 0; rtw_get_wps_attr_content(wps_ie, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); if (sr != 0) { DBG_871X("%s, got sr\n", __func__); } else { DBG_8192C("GO mode process WPS under site-survey, sr no set\n"); return ret; } } if(pmlmepriv->wps_probe_resp_ie) { u32 free_len = pmlmepriv->wps_probe_resp_ie_len; pmlmepriv->wps_probe_resp_ie_len = 0; rtw_mfree(pmlmepriv->wps_probe_resp_ie, free_len); pmlmepriv->wps_probe_resp_ie = NULL; } pmlmepriv->wps_probe_resp_ie = rtw_malloc(wps_ielen); if ( pmlmepriv->wps_probe_resp_ie == NULL) { DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } //add PUSH_BUTTON config_method by driver self in wpsie of probe_resp at GO Mode if ( (puconfig_method = (u16*)rtw_get_wps_attr_content( wps_ie, wps_ielen, WPS_ATTR_CONF_METHOD , NULL, &attr_contentlen)) != NULL ) { //struct registry_priv *pregistrypriv = &padapter->registrypriv; struct wireless_dev *wdev = padapter->rtw_wdev; #ifdef CONFIG_DEBUG_CFG80211 //printk("config_method in wpsie of probe_resp = 0x%x\n", be16_to_cpu(*puconfig_method)); #endif //if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) if(wdev->iftype != NL80211_IFTYPE_P2P_GO) //for WIFI-DIRECT LOGO 4.2.2, AUTO GO can't set PUSH_BUTTON flags { uconfig_method = WPS_CM_PUSH_BUTTON; uconfig_method = cpu_to_be16( uconfig_method ); *puconfig_method |= uconfig_method; } #endif } _rtw_memcpy(pmlmepriv->wps_probe_resp_ie, wps_ie, wps_ielen); pmlmepriv->wps_probe_resp_ie_len = wps_ielen; } //buf += wps_ielen; //len -= wps_ielen; #ifdef CONFIG_P2P if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) { u8 is_GO = _FALSE; u32 attr_contentlen = 0; u16 cap_attr=0; #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("probe_resp_p2p_ielen=%d\n", p2p_ielen); #endif //Check P2P Capability ATTR if( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*) &attr_contentlen) ) { u8 grp_cap=0; //DBG_8192C( "[%s] Got P2P Capability Attr!!\n", __FUNCTION__ ); cap_attr = le16_to_cpu(cap_attr); grp_cap = (u8)((cap_attr >> 8)&0xff); is_GO = (grp_cap&BIT(0)) ? _TRUE:_FALSE; if(is_GO) DBG_8192C("Got P2P Capability Attr, grp_cap=0x%x, is_GO\n", grp_cap); } if(is_GO == _FALSE) { if(pmlmepriv->p2p_probe_resp_ie) { u32 free_len = pmlmepriv->p2p_probe_resp_ie_len; pmlmepriv->p2p_probe_resp_ie_len = 0; rtw_mfree(pmlmepriv->p2p_probe_resp_ie, free_len); pmlmepriv->p2p_probe_resp_ie = NULL; } pmlmepriv->p2p_probe_resp_ie = rtw_malloc(p2p_ielen); if ( pmlmepriv->p2p_probe_resp_ie == NULL) { DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } _rtw_memcpy(pmlmepriv->p2p_probe_resp_ie, p2p_ie, p2p_ielen); pmlmepriv->p2p_probe_resp_ie_len = p2p_ielen; } else { if(pmlmepriv->p2p_go_probe_resp_ie) { u32 free_len = pmlmepriv->p2p_go_probe_resp_ie_len; pmlmepriv->p2p_go_probe_resp_ie_len = 0; rtw_mfree(pmlmepriv->p2p_go_probe_resp_ie, free_len); pmlmepriv->p2p_go_probe_resp_ie = NULL; } pmlmepriv->p2p_go_probe_resp_ie = rtw_malloc(p2p_ielen); if ( pmlmepriv->p2p_go_probe_resp_ie == NULL) { DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } _rtw_memcpy(pmlmepriv->p2p_go_probe_resp_ie, p2p_ie, p2p_ielen); pmlmepriv->p2p_go_probe_resp_ie_len = p2p_ielen; } } #endif //CONFIG_P2P //buf += p2p_ielen; //len -= p2p_ielen; #ifdef CONFIG_WFD if(rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen)) { #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("probe_resp_wfd_ielen=%d\n", wfd_ielen); #endif if(pmlmepriv->wfd_probe_resp_ie) { u32 free_len = pmlmepriv->wfd_probe_resp_ie_len; pmlmepriv->wfd_probe_resp_ie_len = 0; rtw_mfree(pmlmepriv->wfd_probe_resp_ie, free_len); pmlmepriv->wfd_probe_resp_ie = NULL; } pmlmepriv->wfd_probe_resp_ie = rtw_malloc(wfd_ielen); if ( pmlmepriv->wfd_probe_resp_ie == NULL) { DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } rtw_get_wfd_ie(buf, len, pmlmepriv->wfd_probe_resp_ie, &pmlmepriv->wfd_probe_resp_ie_len); } #endif //CONFIG_WFD } return ret; } static int rtw_cfg80211_set_assoc_resp_wpsp2pie(struct net_device *net, char *buf, int len) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(net); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); DBG_8192C("%s, ielen=%d\n", __func__, len); if(len>0) { if(pmlmepriv->wps_assoc_resp_ie) { u32 free_len = pmlmepriv->wps_assoc_resp_ie_len; pmlmepriv->wps_assoc_resp_ie_len = 0; rtw_mfree(pmlmepriv->wps_assoc_resp_ie, free_len); pmlmepriv->wps_assoc_resp_ie = NULL; } pmlmepriv->wps_assoc_resp_ie = rtw_malloc(len); if ( pmlmepriv->wps_assoc_resp_ie == NULL) { DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } _rtw_memcpy(pmlmepriv->wps_assoc_resp_ie, buf, len); pmlmepriv->wps_assoc_resp_ie_len = len; } return ret; } int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, int type) { int ret = 0; uint wps_ielen = 0; u32 p2p_ielen = 0; #ifdef CONFIG_DEBUG_CFG80211 DBG_8192C("%s, ielen=%d\n", __func__, len); #endif if( (rtw_get_wps_ie(buf, len, NULL, &wps_ielen) && (wps_ielen>0)) #ifdef CONFIG_P2P || (rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen) && (p2p_ielen>0)) #endif ) { if (net != NULL) { switch (type) { case 0x1: //BEACON ret = rtw_cfg80211_set_beacon_wpsp2pie(net, buf, len); break; case 0x2: //PROBE_RESP ret = rtw_cfg80211_set_probe_resp_wpsp2pie(net, buf, len); break; case 0x4: //ASSOC_RESP ret = rtw_cfg80211_set_assoc_resp_wpsp2pie(net, buf, len); break; } } } return ret; } static void rtw_cfg80211_init_ht_capab(struct ieee80211_sta_ht_cap *ht_cap, enum ieee80211_band band, u8 rf_type) { #define MAX_BIT_RATE_40MHZ_MCS15 300 /* Mbps */ #define MAX_BIT_RATE_40MHZ_MCS7 150 /* Mbps */ ht_cap->ht_supported = _TRUE; ht_cap->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_SGI_20 | IEEE80211_HT_CAP_DSSSCCK40 | IEEE80211_HT_CAP_MAX_AMSDU; /* *Maximum length of AMPDU that the STA can receive. *Length = 2 ^ (13 + max_ampdu_length_exp) - 1 (octets) */ ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; /*Minimum MPDU start spacing , */ ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16; ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; /* *hw->wiphy->bands[IEEE80211_BAND_2GHZ] *base on ant_num *rx_mask: RX mask *if rx_ant =1 rx_mask[0]=0xff;==>MCS0-MCS7 *if rx_ant =2 rx_mask[1]=0xff;==>MCS8-MCS15 *if rx_ant >=3 rx_mask[2]=0xff; *if BW_40 rx_mask[4]=0x01; *highest supported RX rate */ if(rf_type == RF_1T1R) { ht_cap->mcs.rx_mask[0] = 0xFF; ht_cap->mcs.rx_mask[1] = 0x00; ht_cap->mcs.rx_mask[4] = 0x01; ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS7; } else if((rf_type == RF_1T2R) || (rf_type==RF_2T2R)) { ht_cap->mcs.rx_mask[0] = 0xFF; ht_cap->mcs.rx_mask[1] = 0xFF; ht_cap->mcs.rx_mask[4] = 0x01; ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS15; } else { DBG_8192C("%s, error rf_type=%d\n", __func__, rf_type); } } void rtw_cfg80211_init_wiphy(_adapter *padapter) { u8 rf_type; struct ieee80211_supported_band *bands; struct wireless_dev *pwdev = padapter->rtw_wdev; struct wiphy *wiphy = pwdev->wiphy; rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); DBG_8192C("%s:rf_type=%d\n", __func__, rf_type); /* if (padapter->registrypriv.wireless_mode & WIRELESS_11G) */ { bands = wiphy->bands[IEEE80211_BAND_2GHZ]; if(bands) rtw_cfg80211_init_ht_capab(&bands->ht_cap, IEEE80211_BAND_2GHZ, rf_type); } /* if (padapter->registrypriv.wireless_mode & WIRELESS_11A) */ { bands = wiphy->bands[IEEE80211_BAND_5GHZ]; if(bands) rtw_cfg80211_init_ht_capab(&bands->ht_cap, IEEE80211_BAND_5GHZ, rf_type); } /* init regulary domain */ rtw_regd_init(padapter); /* copy mac_addr to wiphy */ _rtw_memcpy(wiphy->perm_addr, padapter->eeprompriv.mac_addr, ETH_ALEN); } /* struct ieee80211_iface_limit rtw_limits[] = { { .max = 1, .types = BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC) #ifdef CONFIG_AP_MODE | BIT(NL80211_IFTYPE_AP) #endif #if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) | BIT(NL80211_IFTYPE_P2P_CLIENT) | BIT(NL80211_IFTYPE_P2P_GO) #endif }, {.max = 1, .types = BIT(NL80211_IFTYPE_MONITOR)}, }; struct ieee80211_iface_combination rtw_combinations = { .limits = rtw_limits, .n_limits = ARRAY_SIZE(rtw_limits), .max_interfaces = 2, .num_different_channels = 1, }; */ static void rtw_cfg80211_preinit_wiphy(_adapter *padapter, struct wiphy *wiphy) { wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM; wiphy->max_scan_ssids = RTW_SSID_SCAN_AMOUNT; wiphy->max_scan_ie_len = RTW_SCAN_IE_LEN_MAX; wiphy->max_num_pmkids = RTW_MAX_NUM_PMKIDS; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) wiphy->max_remain_on_channel_duration = RTW_MAX_REMAIN_ON_CHANNEL_DURATION; #endif wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC) #ifdef CONFIG_AP_MODE | BIT(NL80211_IFTYPE_AP) | BIT(NL80211_IFTYPE_MONITOR) #endif #if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) | BIT(NL80211_IFTYPE_P2P_CLIENT) | BIT(NL80211_IFTYPE_P2P_GO) #endif ; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) #ifdef CONFIG_AP_MODE wiphy->mgmt_stypes = rtw_cfg80211_default_mgmt_stypes; #endif //CONFIG_AP_MODE #endif #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) wiphy->software_iftypes |= BIT(NL80211_IFTYPE_MONITOR); #endif /* wiphy->iface_combinations = &rtw_combinations; wiphy->n_iface_combinations = 1; */ wiphy->cipher_suites = rtw_cipher_suites; wiphy->n_cipher_suites = ARRAY_SIZE(rtw_cipher_suites); /* if (padapter->registrypriv.wireless_mode & WIRELESS_11G) */ wiphy->bands[IEEE80211_BAND_2GHZ] = rtw_spt_band_alloc(IEEE80211_BAND_2GHZ); /* if (padapter->registrypriv.wireless_mode & WIRELESS_11A) */ wiphy->bands[IEEE80211_BAND_5GHZ] = rtw_spt_band_alloc(IEEE80211_BAND_5GHZ); #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38) && LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)) wiphy->flags |= WIPHY_FLAG_SUPPORTS_SEPARATE_DEFAULT_KEYS; #endif #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0)) wiphy->flags |= WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL; wiphy->flags |= WIPHY_FLAG_OFFCHAN_TX | WIPHY_FLAG_HAVE_AP_SME; #endif #if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN; #ifdef CONFIG_PNO_SUPPORT wiphy->max_sched_scan_ssids = MAX_PNO_LIST_COUNT; #endif #endif #if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,11,0)) wiphy->wowlan = wowlan_stub; #else wiphy->wowlan = &wowlan_stub; #endif #endif #if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS; //wiphy->flags |= WIPHY_FLAG_TDLS_EXTERNAL_SETUP; #endif /* CONFIG_TDLS */ if(padapter->registrypriv.power_mgnt != PS_MODE_ACTIVE) wiphy->flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT; else wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) //wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM; #endif #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) rtw_cfgvendor_attach(wiphy); #endif } static struct cfg80211_ops rtw_cfg80211_ops = { .change_virtual_intf = cfg80211_rtw_change_iface, .add_key = cfg80211_rtw_add_key, .get_key = cfg80211_rtw_get_key, .del_key = cfg80211_rtw_del_key, .set_default_key = cfg80211_rtw_set_default_key, .get_station = cfg80211_rtw_get_station, .scan = cfg80211_rtw_scan, .set_wiphy_params = cfg80211_rtw_set_wiphy_params, .connect = cfg80211_rtw_connect, .disconnect = cfg80211_rtw_disconnect, .join_ibss = cfg80211_rtw_join_ibss, .leave_ibss = cfg80211_rtw_leave_ibss, .set_tx_power = cfg80211_rtw_set_txpower, .get_tx_power = cfg80211_rtw_get_txpower, .set_power_mgmt = cfg80211_rtw_set_power_mgmt, .set_pmksa = cfg80211_rtw_set_pmksa, .del_pmksa = cfg80211_rtw_del_pmksa, .flush_pmksa = cfg80211_rtw_flush_pmksa, #ifdef CONFIG_AP_MODE .add_virtual_intf = cfg80211_rtw_add_virtual_intf, .del_virtual_intf = cfg80211_rtw_del_virtual_intf, #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 4, 0)) && !defined(COMPAT_KERNEL_RELEASE) .add_beacon = cfg80211_rtw_add_beacon, .set_beacon = cfg80211_rtw_set_beacon, .del_beacon = cfg80211_rtw_del_beacon, #else .start_ap = cfg80211_rtw_start_ap, .change_beacon = cfg80211_rtw_change_beacon, .stop_ap = cfg80211_rtw_stop_ap, #endif .add_station = cfg80211_rtw_add_station, .del_station = cfg80211_rtw_del_station, .change_station = cfg80211_rtw_change_station, .dump_station = cfg80211_rtw_dump_station, .change_bss = cfg80211_rtw_change_bss, #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) .set_channel = cfg80211_rtw_set_channel, #endif //.auth = cfg80211_rtw_auth, //.assoc = cfg80211_rtw_assoc, #endif //CONFIG_AP_MODE #ifdef CONFIG_P2P .remain_on_channel = cfg80211_rtw_remain_on_channel, .cancel_remain_on_channel = cfg80211_rtw_cancel_remain_on_channel, #endif #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) .mgmt_tx = cfg80211_rtw_mgmt_tx, .mgmt_frame_register = cfg80211_rtw_mgmt_frame_register, #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) .action = cfg80211_rtw_mgmt_tx, #endif #if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) .tdls_mgmt = cfg80211_rtw_tdls_mgmt, .tdls_oper = cfg80211_rtw_tdls_oper, #endif /* CONFIG_TDLS */ #if defined(CONFIG_PNO_SUPPORT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) .sched_scan_start = cfg80211_rtw_sched_scan_start, .sched_scan_stop = cfg80211_rtw_sched_scan_stop, #endif /* CONFIG_PNO_SUPPORT */ }; int rtw_wdev_alloc(_adapter *padapter, struct device *dev) { int ret = 0; struct wiphy *wiphy; struct wireless_dev *wdev; struct rtw_wdev_priv *pwdev_priv; struct net_device *pnetdev = padapter->pnetdev; DBG_8192C("%s(padapter=%p)\n", __func__, padapter); /* wiphy */ wiphy = wiphy_new(&rtw_cfg80211_ops, sizeof(_adapter*)); if (!wiphy) { DBG_8192C("Couldn't allocate wiphy device\n"); ret = -ENOMEM; goto exit; } set_wiphy_dev(wiphy, dev); *((_adapter**)wiphy_priv(wiphy)) = padapter; rtw_cfg80211_preinit_wiphy(padapter, wiphy); ret = wiphy_register(wiphy); if (ret < 0) { DBG_8192C("Couldn't register wiphy device\n"); goto free_wiphy; } /* wdev */ wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev)); if (!wdev) { DBG_8192C("Couldn't allocate wireless device\n"); ret = -ENOMEM; goto unregister_wiphy; } wdev->wiphy = wiphy; wdev->netdev = pnetdev; wdev->iftype = NL80211_IFTYPE_STATION; // will be init in rtw_hal_init() // Must sync with _rtw_init_mlme_priv() // pmlmepriv->fw_state = WIFI_STATION_STATE //wdev->iftype = NL80211_IFTYPE_MONITOR; // for rtw_setopmode_cmd() in cfg80211_rtw_change_iface() padapter->rtw_wdev = wdev; pnetdev->ieee80211_ptr = wdev; //init pwdev_priv pwdev_priv = adapter_wdev_data(padapter); pwdev_priv->rtw_wdev = wdev; pwdev_priv->pmon_ndev = NULL; pwdev_priv->ifname_mon[0] = '\0'; pwdev_priv->padapter = padapter; pwdev_priv->scan_request = NULL; _rtw_spinlock_init(&pwdev_priv->scan_req_lock); pwdev_priv->p2p_enabled = _FALSE; pwdev_priv->provdisc_req_issued = _FALSE; rtw_wdev_invit_info_init(&pwdev_priv->invit_info); rtw_wdev_nego_info_init(&pwdev_priv->nego_info); pwdev_priv->bandroid_scan = _FALSE; if(padapter->registrypriv.power_mgnt != PS_MODE_ACTIVE) pwdev_priv->power_mgmt = _TRUE; else pwdev_priv->power_mgmt = _FALSE; #ifdef CONFIG_CONCURRENT_MODE ATOMIC_SET(&pwdev_priv->switch_ch_to, 1); ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); #endif return ret; rtw_mfree((u8*)wdev, sizeof(struct wireless_dev)); unregister_wiphy: wiphy_unregister(wiphy); free_wiphy: wiphy_free(wiphy); exit: return ret; } void rtw_wdev_free(struct wireless_dev *wdev) { DBG_8192C("%s(wdev=%p)\n", __func__, wdev); if (!wdev) return; rtw_spt_band_free(wdev->wiphy->bands[IEEE80211_BAND_2GHZ]); rtw_spt_band_free(wdev->wiphy->bands[IEEE80211_BAND_5GHZ]); wiphy_free(wdev->wiphy); rtw_mfree((u8*)wdev, sizeof(struct wireless_dev)); } void rtw_wdev_unregister(struct wireless_dev *wdev) { struct net_device *ndev; _adapter *adapter; struct rtw_wdev_priv *pwdev_priv; DBG_8192C("%s(wdev=%p)\n", __func__, wdev); if (!wdev) return; if(!(ndev = wdev_to_ndev(wdev))) return; adapter = (_adapter *)rtw_netdev_priv(ndev); pwdev_priv = adapter_wdev_data(adapter); rtw_cfg80211_indicate_scan_done(adapter, _TRUE); if (pwdev_priv->pmon_ndev) { DBG_8192C("%s, unregister monitor interface\n", __func__); unregister_netdev(pwdev_priv->pmon_ndev); } #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) rtw_cfgvendor_detach(wdev->wiphy); #endif wiphy_unregister(wdev->wiphy); } #endif //CONFIG_IOCTL_CFG80211 rtl8812au-4.3.8.12175.20140902+dfsg/os_dep/linux/ioctl_cfg80211.h000066400000000000000000000160601261122257400226100ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __IOCTL_CFG80211_H__ #define __IOCTL_CFG80211_H__ #if defined(RTW_USE_CFG80211_STA_EVENT) #undef CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER #endif struct rtw_wdev_invit_info { u8 state; /* 0: req, 1:rep */ u8 peer_mac[ETH_ALEN]; u8 active; u8 token; u8 flags; u8 status; u8 req_op_ch; u8 rsp_op_ch; }; #define rtw_wdev_invit_info_init(invit_info) \ do { \ (invit_info)->state = 0xff; \ _rtw_memset((invit_info)->peer_mac, 0, ETH_ALEN); \ (invit_info)->active = 0xff; \ (invit_info)->token = 0; \ (invit_info)->flags = 0x00; \ (invit_info)->status = 0xff; \ (invit_info)->req_op_ch = 0; \ (invit_info)->rsp_op_ch = 0; \ } while (0) struct rtw_wdev_nego_info { u8 state; /* 0: req, 1:rep, 2:conf */ u8 peer_mac[ETH_ALEN]; u8 active; u8 token; u8 status; u8 req_intent; u8 req_op_ch; u8 req_listen_ch; u8 rsp_intent; u8 rsp_op_ch; u8 conf_op_ch; }; #define rtw_wdev_nego_info_init(nego_info) \ do { \ (nego_info)->state = 0xff; \ _rtw_memset((nego_info)->peer_mac, 0, ETH_ALEN); \ (nego_info)->active = 0xff; \ (nego_info)->token = 0; \ (nego_info)->status = 0xff; \ (nego_info)->req_intent = 0xff; \ (nego_info)->req_op_ch = 0; \ (nego_info)->req_listen_ch = 0; \ (nego_info)->rsp_intent = 0xff; \ (nego_info)->rsp_op_ch = 0; \ (nego_info)->conf_op_ch = 0; \ } while (0) struct rtw_wdev_priv { struct wireless_dev *rtw_wdev; _adapter *padapter; struct cfg80211_scan_request *scan_request; _lock scan_req_lock; struct net_device *pmon_ndev;//for monitor interface char ifname_mon[IFNAMSIZ + 1]; //interface name for monitor interface u8 p2p_enabled; u8 provdisc_req_issued; struct rtw_wdev_invit_info invit_info; struct rtw_wdev_nego_info nego_info; u8 bandroid_scan; bool block; bool power_mgmt; #ifdef CONFIG_CONCURRENT_MODE ATOMIC_T ro_ch_to; ATOMIC_T switch_ch_to; #endif }; #define wiphy_to_adapter(x) (*((_adapter**)wiphy_priv(x))) #define wdev_to_ndev(w) ((w)->netdev) int rtw_wdev_alloc(_adapter *padapter, struct device *dev); void rtw_wdev_free(struct wireless_dev *wdev); void rtw_wdev_unregister(struct wireless_dev *wdev); void rtw_cfg80211_init_wiphy(_adapter *padapter); void rtw_cfg80211_unlink_bss(_adapter *padapter, struct wlan_network *pnetwork); void rtw_cfg80211_surveydone_event_callback(_adapter *padapter); struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork); int rtw_cfg80211_check_bss(_adapter *padapter); void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter); void rtw_cfg80211_indicate_connect(_adapter *padapter); void rtw_cfg80211_indicate_disconnect(_adapter *padapter); void rtw_cfg80211_indicate_scan_done(_adapter *adapter, bool aborted); #ifdef CONFIG_AP_MODE void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason); #endif //CONFIG_AP_MODE void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len); void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); void rtw_cfg80211_rx_action(_adapter *adapter, u8 *frame, uint frame_len, const char*msg); int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, int type); bool rtw_cfg80211_pwr_mgmt(_adapter *adapter); #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) #define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->pnetdev, freq, buf, len, gfp) #elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) #define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->pnetdev, freq, sig_dbm, buf, len, gfp) #elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,12,0)) #define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev, freq, sig_dbm, buf, len, gfp) #else #define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev, freq, sig_dbm, buf, len,0,gfp) #endif #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) #define rtw_cfg80211_send_rx_assoc(adapter, bss, buf, len) cfg80211_send_rx_assoc((adapter)->pnetdev, buf, len) #else #define rtw_cfg80211_send_rx_assoc(adapter, bss, buf, len) cfg80211_send_rx_assoc((adapter)->pnetdev, bss, buf, len) #endif #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) #define rtw_cfg80211_mgmt_tx_status(adapter, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status((adapter)->pnetdev, cookie, buf, len, ack, gfp) #else #define rtw_cfg80211_mgmt_tx_status(adapter, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status((adapter)->rtw_wdev, cookie, buf, len, ack, gfp) #endif #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) #define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->pnetdev, cookie, chan, channel_type, duration, gfp) #define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->pnetdev, cookie, chan, chan_type, gfp) #elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) #define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->rtw_wdev, cookie, chan, channel_type, duration, gfp) #define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->rtw_wdev, cookie, chan, chan_type, gfp) #else #define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->rtw_wdev, cookie, chan, duration, gfp) #define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->rtw_wdev, cookie, chan, gfp) #endif #include "rtw_cfgvendor.h" #endif //__IOCTL_CFG80211_H__ rtl8812au-4.3.8.12175.20140902+dfsg/os_dep/linux/ioctl_linux.c000066400000000000000000014633141261122257400226200ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _IOCTL_LINUX_C_ #include //#ifdef CONFIG_MP_INCLUDED #include #include "../../hal/OUTSRC/phydm_precomp.h" //#endif #if defined(CONFIG_RTL8723A) #include "rtl8723a_hal.h" #include #endif #if defined(CONFIG_RTL8723B) #include #endif #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)) #define iwe_stream_add_event(a, b, c, d, e) iwe_stream_add_event(b, c, d, e) #define iwe_stream_add_point(a, b, c, d, e) iwe_stream_add_point(b, c, d, e) #endif #ifdef CONFIG_80211N_HT extern int rtw_ht_enable; #endif #define RTL_IOCTL_WPA_SUPPLICANT SIOCIWFIRSTPRIV+30 #define SCAN_ITEM_SIZE 768 #define MAX_CUSTOM_LEN 64 #define RATE_COUNT 4 #ifdef CONFIG_GLOBAL_UI_PID extern int ui_pid[3]; #endif // combo scan #define WEXT_CSCAN_AMOUNT 9 #define WEXT_CSCAN_BUF_LEN 360 #define WEXT_CSCAN_HEADER "CSCAN S\x01\x00\x00S\x00" #define WEXT_CSCAN_HEADER_SIZE 12 #define WEXT_CSCAN_SSID_SECTION 'S' #define WEXT_CSCAN_CHANNEL_SECTION 'C' #define WEXT_CSCAN_NPROBE_SECTION 'N' #define WEXT_CSCAN_ACTV_DWELL_SECTION 'A' #define WEXT_CSCAN_PASV_DWELL_SECTION 'P' #define WEXT_CSCAN_HOME_DWELL_SECTION 'H' #define WEXT_CSCAN_TYPE_SECTION 'T' extern u8 key_2char2num(u8 hch, u8 lch); extern u8 str_2char2num(u8 hch, u8 lch); extern void macstr2num(u8 *dst, u8 *src); extern u8 convert_ip_addr(u8 hch, u8 mch, u8 lch); u32 rtw_rates[] = {1000000,2000000,5500000,11000000, 6000000,9000000,12000000,18000000,24000000,36000000,48000000,54000000}; static const char * const iw_operation_mode[] = { "Auto", "Ad-Hoc", "Managed", "Master", "Repeater", "Secondary", "Monitor" }; static int hex2num_i(char c) { if (c >= '0' && c <= '9') return c - '0'; if (c >= 'a' && c <= 'f') return c - 'a' + 10; if (c >= 'A' && c <= 'F') return c - 'A' + 10; return -1; } static int hex2byte_i(const char *hex) { int a, b; a = hex2num_i(*hex++); if (a < 0) return -1; b = hex2num_i(*hex++); if (b < 0) return -1; return (a << 4) | b; } /** * hwaddr_aton - Convert ASCII string to MAC address * @txt: MAC address as a string (e.g., "00:11:22:33:44:55") * @addr: Buffer for the MAC address (ETH_ALEN = 6 bytes) * Returns: 0 on success, -1 on failure (e.g., string not a MAC address) */ static int hwaddr_aton_i(const char *txt, u8 *addr) { int i; for (i = 0; i < 6; i++) { int a, b; a = hex2num_i(*txt++); if (a < 0) return -1; b = hex2num_i(*txt++); if (b < 0) return -1; *addr++ = (a << 4) | b; if (i < 5 && *txt++ != ':') return -1; } return 0; } static void indicate_wx_custom_event(_adapter *padapter, char *msg) { u8 *buff, *p; union iwreq_data wrqu; if (strlen(msg) > IW_CUSTOM_MAX) { DBG_871X("%s strlen(msg):%zu > IW_CUSTOM_MAX:%u\n", __FUNCTION__ , strlen(msg), IW_CUSTOM_MAX); return; } buff = rtw_zmalloc(IW_CUSTOM_MAX+1); if(!buff) return; _rtw_memcpy(buff, msg, strlen(msg)); _rtw_memset(&wrqu,0,sizeof(wrqu)); wrqu.data.length = strlen(msg); DBG_871X("%s %s\n", __FUNCTION__, buff); #ifndef CONFIG_IOCTL_CFG80211 wireless_send_event(padapter->pnetdev, IWEVCUSTOM, &wrqu, buff); #endif rtw_mfree(buff, IW_CUSTOM_MAX+1); } static void request_wps_pbc_event(_adapter *padapter) { u8 *buff, *p; union iwreq_data wrqu; buff = rtw_malloc(IW_CUSTOM_MAX); if(!buff) return; _rtw_memset(buff, 0, IW_CUSTOM_MAX); p=buff; p+=sprintf(p, "WPS_PBC_START.request=TRUE"); _rtw_memset(&wrqu,0,sizeof(wrqu)); wrqu.data.length = p-buff; wrqu.data.length = (wrqu.data.lengthpnetdev, IWEVCUSTOM, &wrqu, buff); #endif if(buff) { rtw_mfree(buff, IW_CUSTOM_MAX); } } #ifdef CONFIG_SUPPORT_HW_WPS_PBC void rtw_request_wps_pbc_event(_adapter *padapter) { #ifdef RTK_DMP_PLATFORM #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_NET_PBC); #else kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_NET_PBC); #endif #else if ( padapter->pid[0] == 0 ) { // 0 is the default value and it means the application monitors the HW PBC doesn't privde its pid to driver. return; } rtw_signal_process(padapter->pid[0], SIGUSR1); #endif rtw_led_control(padapter, LED_CTL_START_WPS_BOTTON); } #endif//#ifdef CONFIG_SUPPORT_HW_WPS_PBC void indicate_wx_scan_complete_event(_adapter *padapter) { union iwreq_data wrqu; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _rtw_memset(&wrqu, 0, sizeof(union iwreq_data)); //DBG_871X("+rtw_indicate_wx_scan_complete_event\n"); #ifndef CONFIG_IOCTL_CFG80211 wireless_send_event(padapter->pnetdev, SIOCGIWSCAN, &wrqu, NULL); #endif } void rtw_indicate_wx_assoc_event(_adapter *padapter) { union iwreq_data wrqu; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); _rtw_memset(&wrqu, 0, sizeof(union iwreq_data)); wrqu.ap_addr.sa_family = ARPHRD_ETHER; if(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)==_TRUE ) _rtw_memcpy(wrqu.ap_addr.sa_data, pnetwork->MacAddress, ETH_ALEN); else _rtw_memcpy(wrqu.ap_addr.sa_data, pmlmepriv->cur_network.network.MacAddress, ETH_ALEN); DBG_871X_LEVEL(_drv_always_, "assoc success\n"); #ifndef CONFIG_IOCTL_CFG80211 wireless_send_event(padapter->pnetdev, SIOCGIWAP, &wrqu, NULL); #endif } void rtw_indicate_wx_disassoc_event(_adapter *padapter) { union iwreq_data wrqu; _rtw_memset(&wrqu, 0, sizeof(union iwreq_data)); wrqu.ap_addr.sa_family = ARPHRD_ETHER; _rtw_memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN); #ifndef CONFIG_IOCTL_CFG80211 DBG_871X_LEVEL(_drv_always_, "indicate disassoc\n"); wireless_send_event(padapter->pnetdev, SIOCGIWAP, &wrqu, NULL); #endif } /* uint rtw_is_cckrates_included(u8 *rate) { u32 i = 0; while(rate[i]!=0) { if ( (((rate[i]) & 0x7f) == 2) || (((rate[i]) & 0x7f) == 4) || (((rate[i]) & 0x7f) == 11) || (((rate[i]) & 0x7f) == 22) ) return _TRUE; i++; } return _FALSE; } uint rtw_is_cckratesonly_included(u8 *rate) { u32 i = 0; while(rate[i]!=0) { if ( (((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) && (((rate[i]) & 0x7f) != 11) && (((rate[i]) & 0x7f) != 22) ) return _FALSE; i++; } return _TRUE; } */ static int search_p2p_wfd_ie(_adapter *padapter, struct iw_request_info* info, struct wlan_network *pnetwork, char *start, char *stop) { #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &padapter->wdinfo; #ifdef CONFIG_WFD if ( SCAN_RESULT_ALL == pwdinfo->wfd_info->scan_result_type ) { } else if ( ( SCAN_RESULT_P2P_ONLY == pwdinfo->wfd_info->scan_result_type ) || ( SCAN_RESULT_WFD_TYPE == pwdinfo->wfd_info->scan_result_type ) ) #endif // CONFIG_WFD { if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { u32 blnGotP2PIE = _FALSE; // User is doing the P2P device discovery // The prefix of SSID should be "DIRECT-" and the IE should contains the P2P IE. // If not, the driver should ignore this AP and go to the next AP. // Verifying the SSID if ( _rtw_memcmp( pnetwork->network.Ssid.Ssid, pwdinfo->p2p_wildcard_ssid, P2P_WILDCARD_SSID_LEN ) ) { u32 p2pielen = 0; // Verifying the P2P IE if (rtw_get_p2p_ie_from_scan_queue(&pnetwork->network.IEs[0], pnetwork->network.IELength, NULL, &p2pielen, pnetwork->network.Reserved[0])) { blnGotP2PIE = _TRUE; } } if ( blnGotP2PIE == _FALSE ) { return _FALSE; } } } #ifdef CONFIG_WFD if ( SCAN_RESULT_WFD_TYPE == pwdinfo->wfd_info->scan_result_type ) { u32 blnGotWFD = _FALSE; u8 wfd_ie[ 128 ] = { 0x00 }; uint wfd_ielen = 0; if ( rtw_get_wfd_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, wfd_ie, &wfd_ielen, pnetwork->network.Reserved[0]) ) { u8 wfd_devinfo[ 6 ] = { 0x00 }; uint wfd_devlen = 6; if ( rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, wfd_devinfo, &wfd_devlen) ) { if ( pwdinfo->wfd_info->wfd_device_type == WFD_DEVINFO_PSINK ) { // the first two bits will indicate the WFD device type if ( ( wfd_devinfo[ 1 ] & 0x03 ) == WFD_DEVINFO_SOURCE ) { // If this device is Miracast PSink device, the scan reuslt should just provide the Miracast source. blnGotWFD = _TRUE; } } else if ( pwdinfo->wfd_info->wfd_device_type == WFD_DEVINFO_SOURCE ) { // the first two bits will indicate the WFD device type if ( ( wfd_devinfo[ 1 ] & 0x03 ) == WFD_DEVINFO_PSINK ) { // If this device is Miracast source device, the scan reuslt should just provide the Miracast PSink. // Todo: How about the SSink?! blnGotWFD = _TRUE; } } } } if ( blnGotWFD == _FALSE ) { return _FALSE; } } #endif // CONFIG_WFD #endif //CONFIG_P2P return _TRUE; } static inline char *iwe_stream_mac_addr_proess(_adapter *padapter, struct iw_request_info* info, struct wlan_network *pnetwork, char *start, char *stop,struct iw_event *iwe) { /* AP MAC address */ iwe->cmd = SIOCGIWAP; iwe->u.ap_addr.sa_family = ARPHRD_ETHER; _rtw_memcpy(iwe->u.ap_addr.sa_data, pnetwork->network.MacAddress, ETH_ALEN); start = iwe_stream_add_event(info, start, stop, iwe, IW_EV_ADDR_LEN); return start; } static inline char * iwe_stream_essid_proess(_adapter *padapter, struct iw_request_info* info, struct wlan_network *pnetwork, char *start, char *stop,struct iw_event *iwe) { /* Add the ESSID */ iwe->cmd = SIOCGIWESSID; iwe->u.data.flags = 1; iwe->u.data.length = min((u16)pnetwork->network.Ssid.SsidLength, (u16)32); start = iwe_stream_add_point(info, start, stop, iwe, pnetwork->network.Ssid.Ssid); return start; } static inline char * iwe_stream_chan_process(_adapter *padapter, struct iw_request_info* info, struct wlan_network *pnetwork, char *start, char *stop,struct iw_event *iwe) { if(pnetwork->network.Configuration.DSConfig<1 /*|| pnetwork->network.Configuration.DSConfig>14*/) pnetwork->network.Configuration.DSConfig = 1; /* Add frequency/channel */ iwe->cmd = SIOCGIWFREQ; iwe->u.freq.m = rtw_ch2freq(pnetwork->network.Configuration.DSConfig) * 100000; iwe->u.freq.e = 1; iwe->u.freq.i = pnetwork->network.Configuration.DSConfig; start = iwe_stream_add_event(info, start, stop, iwe, IW_EV_FREQ_LEN); return start; } static inline char * iwe_stream_mode_process(_adapter *padapter, struct iw_request_info* info, struct wlan_network *pnetwork, char *start, char *stop,struct iw_event *iwe,u16 cap) { /* Add mode */ if(cap & (WLAN_CAPABILITY_IBSS |WLAN_CAPABILITY_BSS)){ iwe->cmd = SIOCGIWMODE; if (cap & WLAN_CAPABILITY_BSS) iwe->u.mode = IW_MODE_MASTER; else iwe->u.mode = IW_MODE_ADHOC; start = iwe_stream_add_event(info, start, stop, iwe, IW_EV_UINT_LEN); } return start; } static inline char * iwe_stream_encryption_process(_adapter *padapter, struct iw_request_info* info, struct wlan_network *pnetwork, char *start, char *stop,struct iw_event *iwe,u16 cap) { /* Add encryption capability */ iwe->cmd = SIOCGIWENCODE; if (cap & WLAN_CAPABILITY_PRIVACY) iwe->u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY; else iwe->u.data.flags = IW_ENCODE_DISABLED; iwe->u.data.length = 0; start = iwe_stream_add_point(info, start, stop, iwe, pnetwork->network.Ssid.Ssid); return start; } static inline char * iwe_stream_protocol_process(_adapter *padapter, struct iw_request_info* info, struct wlan_network *pnetwork, char *start, char *stop,struct iw_event *iwe) { u16 ht_cap=_FALSE,vht_cap = _FALSE; u32 ht_ielen = 0, vht_ielen = 0; char *p; u8 ie_offset = (pnetwork->network.Reserved[0] == 2? 0:12);// Probe Request //parsing HT_CAP_IE p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength-ie_offset); if(p && ht_ielen>0) ht_cap = _TRUE; #ifdef CONFIG_80211AC_VHT //parsing VHT_CAP_IE p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], EID_VHTCapability, &vht_ielen, pnetwork->network.IELength-ie_offset); if(p && vht_ielen>0) vht_cap = _TRUE; #endif /* Add the protocol name */ iwe->cmd = SIOCGIWNAME; if ((rtw_is_cckratesonly_included((u8*)&pnetwork->network.SupportedRates)) == _TRUE) { if(ht_cap == _TRUE) snprintf(iwe->u.name, IFNAMSIZ, "IEEE 802.11bn"); else snprintf(iwe->u.name, IFNAMSIZ, "IEEE 802.11b"); } else if ((rtw_is_cckrates_included((u8*)&pnetwork->network.SupportedRates)) == _TRUE) { if(ht_cap == _TRUE) snprintf(iwe->u.name, IFNAMSIZ, "IEEE 802.11bgn"); else snprintf(iwe->u.name, IFNAMSIZ, "IEEE 802.11bg"); } else { if(pnetwork->network.Configuration.DSConfig > 14) { #ifdef CONFIG_80211AC_VHT if(vht_cap == _TRUE){ snprintf(iwe->u.name, IFNAMSIZ, "IEEE 802.11AC"); } else #endif { if(ht_cap == _TRUE) snprintf(iwe->u.name, IFNAMSIZ, "IEEE 802.11an"); else snprintf(iwe->u.name, IFNAMSIZ, "IEEE 802.11a"); } } else { if(ht_cap == _TRUE) snprintf(iwe->u.name, IFNAMSIZ, "IEEE 802.11gn"); else snprintf(iwe->u.name, IFNAMSIZ, "IEEE 802.11g"); } } start = iwe_stream_add_event(info, start, stop, iwe, IW_EV_CHAR_LEN); return start; } static inline char * iwe_stream_rate_process(_adapter *padapter, struct iw_request_info* info, struct wlan_network *pnetwork, char *start, char *stop,struct iw_event *iwe) { u32 ht_ielen = 0, vht_ielen = 0; char *p; u16 max_rate=0, rate, ht_cap=_FALSE, vht_cap = _FALSE; u32 i = 0; u8 bw_40MHz=0, short_GI=0, bw_160MHz=0, vht_highest_rate = 0; u16 mcs_rate=0, vht_data_rate=0; char custom[MAX_CUSTOM_LEN]={0}; u8 ie_offset = (pnetwork->network.Reserved[0] == 2? 0:12);// Probe Request //parsing HT_CAP_IE p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength-ie_offset); if(p && ht_ielen>0) { struct rtw_ieee80211_ht_cap *pht_capie; ht_cap = _TRUE; pht_capie = (struct rtw_ieee80211_ht_cap *)(p+2); _rtw_memcpy(&mcs_rate , pht_capie->supp_mcs_set, 2); bw_40MHz = (pht_capie->cap_info&IEEE80211_HT_CAP_SUP_WIDTH) ? 1:0; short_GI = (pht_capie->cap_info&(IEEE80211_HT_CAP_SGI_20|IEEE80211_HT_CAP_SGI_40)) ? 1:0; } #ifdef CONFIG_80211AC_VHT //parsing VHT_CAP_IE p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], EID_VHTCapability, &vht_ielen, pnetwork->network.IELength-ie_offset); if(p && vht_ielen>0) { u8 mcs_map[2]; vht_cap = _TRUE; bw_160MHz = GET_VHT_CAPABILITY_ELE_CHL_WIDTH(p+2); if(bw_160MHz) short_GI = GET_VHT_CAPABILITY_ELE_SHORT_GI160M(p+2); else short_GI = GET_VHT_CAPABILITY_ELE_SHORT_GI80M(p+2); _rtw_memcpy(mcs_map, GET_VHT_CAPABILITY_ELE_TX_MCS(p+2), 2); vht_highest_rate = rtw_get_vht_highest_rate(mcs_map); vht_data_rate = rtw_vht_mcs_to_data_rate(CHANNEL_WIDTH_80, short_GI, vht_highest_rate); } #endif /*Add basic and extended rates */ p = custom; p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), " Rates (Mb/s): "); while(pnetwork->network.SupportedRates[i]!=0) { rate = pnetwork->network.SupportedRates[i]&0x7F; if (rate > max_rate) max_rate = rate; p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), "%d%s ", rate >> 1, (rate & 1) ? ".5" : ""); i++; } #ifdef CONFIG_80211AC_VHT if(vht_cap == _TRUE) { max_rate = vht_data_rate; } else #endif if(ht_cap == _TRUE) { if(mcs_rate&0x8000)//MCS15 { max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130); } else if(mcs_rate&0x0080)//MCS7 { max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65); } else//default MCS7 { //DBG_871X("wx_get_scan, mcs_rate_bitmap=0x%x\n", mcs_rate); max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65); } max_rate = max_rate*2;//Mbps/2; } iwe->cmd = SIOCGIWRATE; iwe->u.bitrate.fixed = iwe->u.bitrate.disabled = 0; iwe->u.bitrate.value = max_rate * 500000; start =iwe_stream_add_event(info, start, stop, iwe, IW_EV_PARAM_LEN); return start ; } static inline char * iwe_stream_wpa_wpa2_process(_adapter *padapter, struct iw_request_info* info, struct wlan_network *pnetwork, char *start, char *stop,struct iw_event *iwe) { int buf_size = MAX_WPA_IE_LEN*2; //u8 pbuf[buf_size]={0}; u8 *pbuf = rtw_zmalloc(buf_size); u8 wpa_ie[255]={0},rsn_ie[255]={0}; u16 i, wpa_len=0,rsn_len=0; u8 *p; sint out_len=0; if(pbuf){ p=pbuf; //parsing WPA/WPA2 IE if (pnetwork->network.Reserved[0] != 2) // Probe Request { out_len=rtw_get_sec_ie(pnetwork->network.IEs ,pnetwork->network.IELength,rsn_ie,&rsn_len,wpa_ie,&wpa_len); RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_scan: ssid=%s\n",pnetwork->network.Ssid.Ssid)); RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_scan: wpa_len=%d rsn_len=%d\n",wpa_len,rsn_len)); if (wpa_len > 0){ _rtw_memset(pbuf, 0, buf_size); p += sprintf(p, "wpa_ie="); for (i = 0; i < wpa_len; i++) { p += sprintf(p, "%02x", wpa_ie[i]); } if (wpa_len > 100) { printk("-----------------Len %d----------------\n", wpa_len); for (i = 0; i < wpa_len; i++) { printk("%02x ", wpa_ie[i]); } printk("\n"); printk("-----------------Len %d----------------\n", wpa_len); } _rtw_memset(iwe, 0, sizeof(*iwe)); iwe->cmd = IWEVCUSTOM; iwe->u.data.length = strlen(pbuf); start = iwe_stream_add_point(info, start, stop, iwe,pbuf); _rtw_memset(iwe, 0, sizeof(*iwe)); iwe->cmd =IWEVGENIE; iwe->u.data.length = wpa_len; start = iwe_stream_add_point(info, start, stop, iwe, wpa_ie); } if (rsn_len > 0){ _rtw_memset(pbuf, 0, buf_size); p += sprintf(p, "rsn_ie="); for (i = 0; i < rsn_len; i++) { p += sprintf(p, "%02x", rsn_ie[i]); } _rtw_memset(iwe, 0, sizeof(*iwe)); iwe->cmd = IWEVCUSTOM; iwe->u.data.length = strlen(pbuf); start = iwe_stream_add_point(info, start, stop, iwe,pbuf); _rtw_memset(iwe, 0, sizeof(*iwe)); iwe->cmd =IWEVGENIE; iwe->u.data.length = rsn_len; start = iwe_stream_add_point(info, start, stop, iwe, rsn_ie); } } rtw_mfree(pbuf, buf_size); } return start; } static inline char * iwe_stream_wps_process(_adapter *padapter, struct iw_request_info* info, struct wlan_network *pnetwork, char *start, char *stop,struct iw_event *iwe) { //parsing WPS IE uint cnt = 0,total_ielen; u8 *wpsie_ptr=NULL; uint wps_ielen = 0; u8 ie_offset = (pnetwork->network.Reserved[0] == 2? 0:12); u8 *ie_ptr = pnetwork->network.IEs + ie_offset; total_ielen= pnetwork->network.IELength - ie_offset; if (pnetwork->network.Reserved[0] == 2) // Probe Request { ie_ptr = pnetwork->network.IEs; total_ielen = pnetwork->network.IELength; } else // Beacon or Probe Respones { ie_ptr = pnetwork->network.IEs + _FIXED_IE_LENGTH_; total_ielen = pnetwork->network.IELength - _FIXED_IE_LENGTH_; } while(cnt < total_ielen) { if(rtw_is_wps_ie(&ie_ptr[cnt], &wps_ielen) && (wps_ielen>2)) { wpsie_ptr = &ie_ptr[cnt]; iwe->cmd =IWEVGENIE; iwe->u.data.length = (u16)wps_ielen; start = iwe_stream_add_point(info, start, stop,iwe, wpsie_ptr); } cnt+=ie_ptr[cnt+1]+2; //goto next } return start; } static inline char * iwe_stream_wapi_process(_adapter *padapter, struct iw_request_info* info, struct wlan_network *pnetwork, char *start, char *stop,struct iw_event *iwe) { #ifdef CONFIG_WAPI_SUPPORT char *p; if (pnetwork->network.Reserved[0] != 2) // Probe Request { sint out_len_wapi=0; /* here use static for stack size */ static u8 buf_wapi[MAX_WAPI_IE_LEN*2]={0}; static u8 wapi_ie[MAX_WAPI_IE_LEN]={0}; u16 wapi_len=0; u16 i; out_len_wapi=rtw_get_wapi_ie(pnetwork->network.IEs ,pnetwork->network.IELength,wapi_ie,&wapi_len); RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_scan: ssid=%s\n",pnetwork->network.Ssid.Ssid)); RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_scan: wapi_len=%d \n",wapi_len)); DBG_871X("rtw_wx_get_scan: %s ",pnetwork->network.Ssid.Ssid); DBG_871X("rtw_wx_get_scan: ssid = %d ",wapi_len); if (wapi_len > 0) { p=buf_wapi; //_rtw_memset(buf_wapi, 0, MAX_WAPI_IE_LEN*2); p += sprintf(p, "wapi_ie="); for (i = 0; i < wapi_len; i++) { p += sprintf(p, "%02x", wapi_ie[i]); } _rtw_memset(iwe, 0, sizeof(*iwe)); iwe->cmd = IWEVCUSTOM; iwe->u.data.length = strlen(buf_wapi); start = iwe_stream_add_point(info, start, stop, iwe,buf_wapi); _rtw_memset(iwe, 0, sizeof(*iwe)); iwe->cmd =IWEVGENIE; iwe->u.data.length = wapi_len; start = iwe_stream_add_point(info, start, stop, iwe, wapi_ie); } } #endif//#ifdef CONFIG_WAPI_SUPPORT return start; } static inline char * iwe_stream_rssi_process(_adapter *padapter, struct iw_request_info* info, struct wlan_network *pnetwork, char *start, char *stop,struct iw_event *iwe) { u8 ss, sq; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); /* Add quality statistics */ iwe->cmd = IWEVQUAL; iwe->u.qual.updated = IW_QUAL_QUAL_UPDATED | IW_QUAL_LEVEL_UPDATED #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) | IW_QUAL_NOISE_UPDATED #else | IW_QUAL_NOISE_INVALID #endif #ifdef CONFIG_SIGNAL_DISPLAY_DBM | IW_QUAL_DBM #endif ; if ( check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE && is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network, 0)){ ss = padapter->recvpriv.signal_strength; sq = padapter->recvpriv.signal_qual; } else { ss = pnetwork->network.PhyInfo.SignalStrength; sq = pnetwork->network.PhyInfo.SignalQuality; } #ifdef CONFIG_SIGNAL_DISPLAY_DBM iwe->u.qual.level = (u8) translate_percentage_to_dbm(ss);//dbm #else #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING { /* Do signal scale mapping when using percentage as the unit of signal strength, since the scale mapping is skipped in odm */ HAL_DATA_TYPE *pHal = GET_HAL_DATA(padapter); iwe->u.qual.level = (u8)odm_SignalScaleMapping(&pHal->odmpriv, ss); } #else iwe->u.qual.level = (u8)ss;//% #endif #endif iwe->u.qual.qual = (u8)sq; // signal quality #ifdef CONFIG_PLATFORM_ROCKCHIPS iwe->u.qual.noise = -100; // noise level suggest by zhf@rockchips #else #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) { s16 tmp_noise=0; rtw_hal_get_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&(pnetwork->network.Configuration.DSConfig), &(tmp_noise)); iwe->u.qual.noise = tmp_noise ; } #else iwe->u.qual.noise = 0; // noise level #endif #endif //CONFIG_PLATFORM_ROCKCHIPS //DBG_871X("iqual=%d, ilevel=%d, inoise=%d, iupdated=%d\n", iwe.u.qual.qual, iwe.u.qual.level , iwe.u.qual.noise, iwe.u.qual.updated); start = iwe_stream_add_event(info, start, stop, iwe, IW_EV_QUAL_LEN); return start; } static inline char * iwe_stream_net_rsv_process(_adapter *padapter, struct iw_request_info* info, struct wlan_network *pnetwork, char *start, char *stop,struct iw_event *iwe) { u8 buf[32] = {0}; u8 * p,*pos; int len; p = buf; pos = pnetwork->network.Reserved; p += sprintf(p, "fm=%02X%02X", pos[1], pos[0]); _rtw_memset(iwe, 0, sizeof(*iwe)); iwe->cmd = IWEVCUSTOM; iwe->u.data.length = strlen(buf); start = iwe_stream_add_point(info, start, stop,iwe, buf); return start; } #if 1 static char *translate_scan(_adapter *padapter, struct iw_request_info* info, struct wlan_network *pnetwork, char *start, char *stop) { struct iw_event iwe; u16 cap = 0; _rtw_memset(&iwe, 0, sizeof(iwe)); if(_FALSE == search_p2p_wfd_ie(padapter,info,pnetwork,start,stop)) return start; start = iwe_stream_mac_addr_proess(padapter,info,pnetwork,start,stop,&iwe); start = iwe_stream_essid_proess(padapter,info,pnetwork,start,stop,&iwe); start = iwe_stream_protocol_process(padapter,info,pnetwork,start,stop,&iwe); if (pnetwork->network.Reserved[0] == 2) // Probe Request { cap = 0; } else { _rtw_memcpy((u8 *)&cap, rtw_get_capability_from_ie(pnetwork->network.IEs), 2); cap = le16_to_cpu(cap); } start = iwe_stream_mode_process(padapter,info,pnetwork,start,stop,&iwe,cap); start = iwe_stream_chan_process(padapter,info,pnetwork,start,stop,&iwe); start = iwe_stream_encryption_process(padapter,info,pnetwork,start,stop,&iwe,cap); start = iwe_stream_rate_process(padapter,info,pnetwork,start,stop,&iwe); start = iwe_stream_wpa_wpa2_process(padapter,info,pnetwork,start,stop,&iwe); start = iwe_stream_wps_process(padapter,info,pnetwork,start,stop,&iwe); start = iwe_stream_wapi_process(padapter,info,pnetwork,start,stop,&iwe); start = iwe_stream_rssi_process(padapter,info,pnetwork,start,stop,&iwe); start = iwe_stream_net_rsv_process(padapter,info,pnetwork,start,stop,&iwe); return start; } #else static char *translate_scan(_adapter *padapter, struct iw_request_info* info, struct wlan_network *pnetwork, char *start, char *stop) { struct iw_event iwe; u16 cap; u32 ht_ielen = 0, vht_ielen = 0; char custom[MAX_CUSTOM_LEN]; char *p; u16 max_rate=0, rate, ht_cap=_FALSE, vht_cap = _FALSE; u32 i = 0; char *current_val; long rssi; u8 bw_40MHz=0, short_GI=0, bw_160MHz=0, vht_highest_rate = 0; u16 mcs_rate=0, vht_data_rate=0; u8 ie_offset = (pnetwork->network.Reserved[0] == 2? 0:12); struct registry_priv *pregpriv = &padapter->registrypriv; if(_FALSE == search_p2p_wfd_ie(padapter,info,pnetwork,start,stop)) return start; /* AP MAC address */ iwe.cmd = SIOCGIWAP; iwe.u.ap_addr.sa_family = ARPHRD_ETHER; _rtw_memcpy(iwe.u.ap_addr.sa_data, pnetwork->network.MacAddress, ETH_ALEN); start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_ADDR_LEN); /* Add the ESSID */ iwe.cmd = SIOCGIWESSID; iwe.u.data.flags = 1; iwe.u.data.length = min((u16)pnetwork->network.Ssid.SsidLength, (u16)32); start = iwe_stream_add_point(info, start, stop, &iwe, pnetwork->network.Ssid.Ssid); //parsing HT_CAP_IE if (pnetwork->network.Reserved[0] == 2) // Probe Request { p = rtw_get_ie(&pnetwork->network.IEs[0], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength); } else { p = rtw_get_ie(&pnetwork->network.IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength-12); } if(p && ht_ielen>0) { struct rtw_ieee80211_ht_cap *pht_capie; ht_cap = _TRUE; pht_capie = (struct rtw_ieee80211_ht_cap *)(p+2); _rtw_memcpy(&mcs_rate , pht_capie->supp_mcs_set, 2); bw_40MHz = (pht_capie->cap_info&IEEE80211_HT_CAP_SUP_WIDTH) ? 1:0; short_GI = (pht_capie->cap_info&(IEEE80211_HT_CAP_SGI_20|IEEE80211_HT_CAP_SGI_40)) ? 1:0; } #ifdef CONFIG_80211AC_VHT //parsing VHT_CAP_IE p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], EID_VHTCapability, &vht_ielen, pnetwork->network.IELength-ie_offset); if(p && vht_ielen>0) { u8 mcs_map[2]; vht_cap = _TRUE; bw_160MHz = GET_VHT_CAPABILITY_ELE_CHL_WIDTH(p+2); if(bw_160MHz) short_GI = GET_VHT_CAPABILITY_ELE_SHORT_GI160M(p+2); else short_GI = GET_VHT_CAPABILITY_ELE_SHORT_GI80M(p+2); _rtw_memcpy(mcs_map, GET_VHT_CAPABILITY_ELE_TX_MCS(p+2), 2); vht_highest_rate = rtw_get_vht_highest_rate(mcs_map); vht_data_rate = rtw_vht_mcs_to_data_rate(CHANNEL_WIDTH_80, short_GI, vht_highest_rate); } #endif /* Add the protocol name */ iwe.cmd = SIOCGIWNAME; if ((rtw_is_cckratesonly_included((u8*)&pnetwork->network.SupportedRates)) == _TRUE) { if(ht_cap == _TRUE) snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11bn"); else snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11b"); } else if ((rtw_is_cckrates_included((u8*)&pnetwork->network.SupportedRates)) == _TRUE) { if(ht_cap == _TRUE) snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11bgn"); else snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11bg"); } else { if(pnetwork->network.Configuration.DSConfig > 14) { if(vht_cap == _TRUE) snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11AC"); else if(ht_cap == _TRUE) snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11an"); else snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11a"); } else { if(ht_cap == _TRUE) snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11gn"); else snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11g"); } } start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_CHAR_LEN); /* Add mode */ if (pnetwork->network.Reserved[0] == 2) // Probe Request { cap = 0; } else { iwe.cmd = SIOCGIWMODE; _rtw_memcpy((u8 *)&cap, rtw_get_capability_from_ie(pnetwork->network.IEs), 2); cap = le16_to_cpu(cap); } if(cap & (WLAN_CAPABILITY_IBSS |WLAN_CAPABILITY_BSS)){ if (cap & WLAN_CAPABILITY_BSS) iwe.u.mode = IW_MODE_MASTER; else iwe.u.mode = IW_MODE_ADHOC; start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_UINT_LEN); } if(pnetwork->network.Configuration.DSConfig<1 /*|| pnetwork->network.Configuration.DSConfig>14*/) pnetwork->network.Configuration.DSConfig = 1; /* Add frequency/channel */ iwe.cmd = SIOCGIWFREQ; iwe.u.freq.m = rtw_ch2freq(pnetwork->network.Configuration.DSConfig) * 100000; iwe.u.freq.e = 1; iwe.u.freq.i = pnetwork->network.Configuration.DSConfig; start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_FREQ_LEN); /* Add encryption capability */ iwe.cmd = SIOCGIWENCODE; if (cap & WLAN_CAPABILITY_PRIVACY) iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY; else iwe.u.data.flags = IW_ENCODE_DISABLED; iwe.u.data.length = 0; start = iwe_stream_add_point(info, start, stop, &iwe, pnetwork->network.Ssid.Ssid); /*Add basic and extended rates */ max_rate = 0; p = custom; p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), " Rates (Mb/s): "); while(pnetwork->network.SupportedRates[i]!=0) { rate = pnetwork->network.SupportedRates[i]&0x7F; if (rate > max_rate) max_rate = rate; p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), "%d%s ", rate >> 1, (rate & 1) ? ".5" : ""); i++; } if(vht_cap == _TRUE) { max_rate = vht_data_rate; } else if(ht_cap == _TRUE) { if(mcs_rate&0x8000)//MCS15 { max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130); } else if(mcs_rate&0x0080)//MCS7 { max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65); } else//default MCS7 { //DBG_871X("wx_get_scan, mcs_rate_bitmap=0x%x\n", mcs_rate); max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65); } max_rate = max_rate*2;//Mbps/2; } iwe.cmd = SIOCGIWRATE; iwe.u.bitrate.fixed = iwe.u.bitrate.disabled = 0; iwe.u.bitrate.value = max_rate * 500000; start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_PARAM_LEN); //parsing WPA/WPA2 IE if (pnetwork->network.Reserved[0] != 2) // Probe Request { u8 buf[MAX_WPA_IE_LEN*2]; u8 wpa_ie[255],rsn_ie[255]; u16 wpa_len=0,rsn_len=0; u8 *p; sint out_len=0; out_len=rtw_get_sec_ie(pnetwork->network.IEs ,pnetwork->network.IELength,rsn_ie,&rsn_len,wpa_ie,&wpa_len); RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_scan: ssid=%s\n",pnetwork->network.Ssid.Ssid)); RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_scan: wpa_len=%d rsn_len=%d\n",wpa_len,rsn_len)); if (wpa_len > 0) { p=buf; _rtw_memset(buf, 0, MAX_WPA_IE_LEN*2); p += sprintf(p, "wpa_ie="); for (i = 0; i < wpa_len; i++) { p += sprintf(p, "%02x", wpa_ie[i]); } if (wpa_len > 100) { printk("-----------------Len %d----------------\n", wpa_len); for (i = 0; i < wpa_len; i++) { printk("%02x ", wpa_ie[i]); } printk("\n"); printk("-----------------Len %d----------------\n", wpa_len); } _rtw_memset(&iwe, 0, sizeof(iwe)); iwe.cmd = IWEVCUSTOM; iwe.u.data.length = strlen(buf); start = iwe_stream_add_point(info, start, stop, &iwe,buf); _rtw_memset(&iwe, 0, sizeof(iwe)); iwe.cmd =IWEVGENIE; iwe.u.data.length = wpa_len; start = iwe_stream_add_point(info, start, stop, &iwe, wpa_ie); } if (rsn_len > 0) { p = buf; _rtw_memset(buf, 0, MAX_WPA_IE_LEN*2); p += sprintf(p, "rsn_ie="); for (i = 0; i < rsn_len; i++) { p += sprintf(p, "%02x", rsn_ie[i]); } _rtw_memset(&iwe, 0, sizeof(iwe)); iwe.cmd = IWEVCUSTOM; iwe.u.data.length = strlen(buf); start = iwe_stream_add_point(info, start, stop, &iwe,buf); _rtw_memset(&iwe, 0, sizeof(iwe)); iwe.cmd =IWEVGENIE; iwe.u.data.length = rsn_len; start = iwe_stream_add_point(info, start, stop, &iwe, rsn_ie); } } { //parsing WPS IE uint cnt = 0,total_ielen; u8 *wpsie_ptr=NULL; uint wps_ielen = 0; u8 *ie_ptr = pnetwork->network.IEs + ie_offset; total_ielen= pnetwork->network.IELength - ie_offset; if (pnetwork->network.Reserved[0] == 2) // Probe Request { ie_ptr = pnetwork->network.IEs; total_ielen = pnetwork->network.IELength; } else // Beacon or Probe Respones { ie_ptr = pnetwork->network.IEs + _FIXED_IE_LENGTH_; total_ielen = pnetwork->network.IELength - _FIXED_IE_LENGTH_; } while(cnt < total_ielen) { if(rtw_is_wps_ie(&ie_ptr[cnt], &wps_ielen) && (wps_ielen>2)) { wpsie_ptr = &ie_ptr[cnt]; iwe.cmd =IWEVGENIE; iwe.u.data.length = (u16)wps_ielen; start = iwe_stream_add_point(info, start, stop, &iwe, wpsie_ptr); } cnt+=ie_ptr[cnt+1]+2; //goto next } } #ifdef CONFIG_WAPI_SUPPORT if (pnetwork->network.Reserved[0] != 2) // Probe Request { sint out_len_wapi=0; /* here use static for stack size */ static u8 buf_wapi[MAX_WAPI_IE_LEN*2]; static u8 wapi_ie[MAX_WAPI_IE_LEN]; u16 wapi_len=0; u16 i; _rtw_memset(buf_wapi, 0, MAX_WAPI_IE_LEN); _rtw_memset(wapi_ie, 0, MAX_WAPI_IE_LEN); out_len_wapi=rtw_get_wapi_ie(pnetwork->network.IEs ,pnetwork->network.IELength,wapi_ie,&wapi_len); RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_scan: ssid=%s\n",pnetwork->network.Ssid.Ssid)); RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_scan: wapi_len=%d \n",wapi_len)); DBG_871X("rtw_wx_get_scan: %s ",pnetwork->network.Ssid.Ssid); DBG_871X("rtw_wx_get_scan: ssid = %d ",wapi_len); if (wapi_len > 0) { p=buf_wapi; _rtw_memset(buf_wapi, 0, MAX_WAPI_IE_LEN*2); p += sprintf(p, "wapi_ie="); for (i = 0; i < wapi_len; i++) { p += sprintf(p, "%02x", wapi_ie[i]); } _rtw_memset(&iwe, 0, sizeof(iwe)); iwe.cmd = IWEVCUSTOM; iwe.u.data.length = strlen(buf_wapi); start = iwe_stream_add_point(info, start, stop, &iwe,buf_wapi); _rtw_memset(&iwe, 0, sizeof(iwe)); iwe.cmd =IWEVGENIE; iwe.u.data.length = wapi_len; start = iwe_stream_add_point(info, start, stop, &iwe, wapi_ie); } } #endif { struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); u8 ss, sq; /* Add quality statistics */ iwe.cmd = IWEVQUAL; iwe.u.qual.updated = IW_QUAL_QUAL_UPDATED | IW_QUAL_LEVEL_UPDATED #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) | IW_QUAL_NOISE_UPDATED #else | IW_QUAL_NOISE_INVALID #endif #ifdef CONFIG_SIGNAL_DISPLAY_DBM | IW_QUAL_DBM #endif ; if ( check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE && is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network, 0)){ ss = padapter->recvpriv.signal_strength; sq = padapter->recvpriv.signal_qual; } else { ss = pnetwork->network.PhyInfo.SignalStrength; sq = pnetwork->network.PhyInfo.SignalQuality; } #ifdef CONFIG_SIGNAL_DISPLAY_DBM iwe.u.qual.level = (u8) translate_percentage_to_dbm(ss);//dbm #else #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING { /* Do signal scale mapping when using percentage as the unit of signal strength, since the scale mapping is skipped in odm */ HAL_DATA_TYPE *pHal = GET_HAL_DATA(padapter); iwe.u.qual.level = (u8)odm_SignalScaleMapping(&pHal->odmpriv, ss); } #else iwe.u.qual.level = (u8)ss;//% #endif #endif iwe.u.qual.qual = (u8)sq; // signal quality #ifdef CONFIG_PLATFORM_ROCKCHIPS iwe.u.qual.noise = -100; // noise level suggest by zhf@rockchips #else #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) { s16 tmp_noise=0; rtw_hal_get_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&(pnetwork->network.Configuration.DSConfig), &(tmp_noise)); iwe.u.qual.noise = tmp_noise ; } #else iwe.u.qual.noise = 0; // noise level #endif #endif //CONFIG_PLATFORM_ROCKCHIPS //DBG_871X("iqual=%d, ilevel=%d, inoise=%d, iupdated=%d\n", iwe.u.qual.qual, iwe.u.qual.level , iwe.u.qual.noise, iwe.u.qual.updated); start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_QUAL_LEN); } { u8 buf[MAX_WPA_IE_LEN]; u8 * p,*pos; int len; p = buf; pos = pnetwork->network.Reserved; _rtw_memset(buf, 0, MAX_WPA_IE_LEN); p += sprintf(p, "fm=%02X%02X", pos[1], pos[0]); _rtw_memset(&iwe, 0, sizeof(iwe)); iwe.cmd = IWEVCUSTOM; iwe.u.data.length = strlen(buf); start = iwe_stream_add_point(info, start, stop, &iwe, buf); } return start; } #endif static int wpa_set_auth_algs(struct net_device *dev, u32 value) { _adapter *padapter = (_adapter *) rtw_netdev_priv(dev); int ret = 0; if ((value & AUTH_ALG_SHARED_KEY)&&(value & AUTH_ALG_OPEN_SYSTEM)) { DBG_871X("wpa_set_auth_algs, AUTH_ALG_SHARED_KEY and AUTH_ALG_OPEN_SYSTEM [value:0x%x]\n",value); padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeAutoSwitch; padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; } else if (value & AUTH_ALG_SHARED_KEY) { DBG_871X("wpa_set_auth_algs, AUTH_ALG_SHARED_KEY [value:0x%x]\n",value); padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; #ifdef CONFIG_PLATFORM_MT53XX padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeAutoSwitch; padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; #else padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeShared; padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Shared; #endif } else if(value & AUTH_ALG_OPEN_SYSTEM) { DBG_871X("wpa_set_auth_algs, AUTH_ALG_OPEN_SYSTEM\n"); //padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled; if(padapter->securitypriv.ndisauthtype < Ndis802_11AuthModeWPAPSK) { #ifdef CONFIG_PLATFORM_MT53XX padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeAutoSwitch; padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; #else padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Open; #endif } } else if(value & AUTH_ALG_LEAP) { DBG_871X("wpa_set_auth_algs, AUTH_ALG_LEAP\n"); } else { DBG_871X("wpa_set_auth_algs, error!\n"); ret = -EINVAL; } return ret; } static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) { int ret = 0; u32 wep_key_idx, wep_key_len,wep_total_len; NDIS_802_11_WEP *pwep = NULL; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; #ifdef CONFIG_P2P struct wifidirect_info* pwdinfo = &padapter->wdinfo; #endif //CONFIG_P2P _func_enter_; param->u.crypt.err = 0; param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; if (param_len < (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) { ret = -EINVAL; goto exit; } if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) { if (param->u.crypt.idx >= WEP_KEYS #ifdef CONFIG_IEEE80211W && param->u.crypt.idx > BIP_MAX_KEYID #endif //CONFIG_IEEE80211W ) { ret = -EINVAL; goto exit; } } else { #ifdef CONFIG_WAPI_SUPPORT if (strcmp(param->u.crypt.alg, "SMS4")) #endif { ret = -EINVAL; goto exit; } } if (strcmp(param->u.crypt.alg, "WEP") == 0) { RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("wpa_set_encryption, crypt.alg = WEP\n")); DBG_871X("wpa_set_encryption, crypt.alg = WEP\n"); padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; wep_key_idx = param->u.crypt.idx; wep_key_len = param->u.crypt.key_len; RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("(1)wep_key_idx=%d\n", wep_key_idx)); DBG_871X("(1)wep_key_idx=%d\n", wep_key_idx); if (wep_key_idx > WEP_KEYS) return -EINVAL; RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("(2)wep_key_idx=%d\n", wep_key_idx)); if (wep_key_len > 0) { wep_key_len = wep_key_len <= 5 ? 5 : 13; wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); pwep =(NDIS_802_11_WEP *) rtw_malloc(wep_total_len); if(pwep == NULL){ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,(" wpa_set_encryption: pwep allocate fail !!!\n")); goto exit; } _rtw_memset(pwep, 0, wep_total_len); pwep->KeyLength = wep_key_len; pwep->Length = wep_total_len; if(wep_key_len==13) { padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; } } else { ret = -EINVAL; goto exit; } pwep->KeyIndex = wep_key_idx; pwep->KeyIndex |= 0x80000000; _rtw_memcpy(pwep->KeyMaterial, param->u.crypt.key, pwep->KeyLength); if(param->u.crypt.set_tx) { DBG_871X("wep, set_tx=1\n"); if(rtw_set_802_11_add_wep(padapter, pwep) == (u8)_FAIL) { ret = -EOPNOTSUPP ; } } else { DBG_871X("wep, set_tx=0\n"); //don't update "psecuritypriv->dot11PrivacyAlgrthm" and //"psecuritypriv->dot11PrivacyKeyIndex=keyid", but can rtw_set_key to fw/cam if (wep_key_idx >= WEP_KEYS) { ret = -EOPNOTSUPP ; goto exit; } _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); psecuritypriv->dot11DefKeylen[wep_key_idx]=pwep->KeyLength; rtw_set_key(padapter, psecuritypriv, wep_key_idx, 0, _TRUE); } goto exit; } if(padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) // 802_1x { struct sta_info * psta,*pbcmc_sta; struct sta_priv * pstapriv = &padapter->stapriv; if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_MP_STATE) == _TRUE) //sta mode { psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); if (psta == NULL) { //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); } else { //Jeff: don't disable ieee8021x_blocked while clearing key if (strcmp(param->u.crypt.alg, "none") != 0) psta->ieee8021x_blocked = _FALSE; if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) { psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; } if(param->u.crypt.set_tx ==1)//pairwise key { _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); if(strcmp(param->u.crypt.alg, "TKIP") == 0)//set mic key { //DEBUG_ERR(("\nset key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); padapter->securitypriv.busetkipkey=_FALSE; //_set_timer(&padapter->securitypriv.tkip_timer, 50); } //DEBUG_ERR((" param->u.crypt.key_len=%d\n",param->u.crypt.key_len)); DBG_871X(" ~~~~set sta key:unicastkey\n"); rtw_setstakey_cmd(padapter, psta, _TRUE, _TRUE); } else//group key { if(strcmp(param->u.crypt.alg, "TKIP") == 0 || strcmp(param->u.crypt.alg, "CCMP") == 0) { _rtw_memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); //only TKIP group key need to install this if(param->u.crypt.key_len > 16) { _rtw_memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[16]),8); _rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[24]),8); } padapter->securitypriv.binstallGrpkey = _TRUE; //DEBUG_ERR((" param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); DBG_871X(" ~~~~set sta key:groupkey\n"); padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; rtw_set_key(padapter,&padapter->securitypriv,param->u.crypt.idx, 1, _TRUE); } #ifdef CONFIG_IEEE80211W else if(strcmp(param->u.crypt.alg, "BIP") == 0) { int no; //printk("BIP key_len=%d , index=%d @@@@@@@@@@@@@@@@@@\n", param->u.crypt.key_len, param->u.crypt.idx); //save the IGTK key, length 16 bytes _rtw_memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); /*printk("IGTK key below:\n"); for(no=0;no<16;no++) printk(" %02x ", padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey[no]); printk("\n");*/ padapter->securitypriv.dot11wBIPKeyid = param->u.crypt.idx; padapter->securitypriv.binstallBIPkey = _TRUE; DBG_871X(" ~~~~set sta key:IGKT\n"); } #endif //CONFIG_IEEE80211W #ifdef CONFIG_P2P if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) { rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_DONE); } #endif //CONFIG_P2P } } pbcmc_sta=rtw_get_bcmc_stainfo(padapter); if(pbcmc_sta==NULL) { //DEBUG_ERR( ("Set OID_802_11_ADD_KEY: bcmc stainfo is null \n")); } else { //Jeff: don't disable ieee8021x_blocked while clearing key if (strcmp(param->u.crypt.alg, "none") != 0) pbcmc_sta->ieee8021x_blocked = _FALSE; if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) { pbcmc_sta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; } } } else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) //adhoc mode { } } #ifdef CONFIG_WAPI_SUPPORT if (strcmp(param->u.crypt.alg, "SMS4") == 0) { PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; PRT_WAPI_STA_INFO pWapiSta; u8 WapiASUEPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; if(param->u.crypt.set_tx == 1) { list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { if(_rtw_memcmp(pWapiSta->PeerMacAddr,param->sta_addr,6)) { _rtw_memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16); pWapiSta->wapiUsk.bSet = true; _rtw_memcpy(pWapiSta->wapiUsk.dataKey,param->u.crypt.key,16); _rtw_memcpy(pWapiSta->wapiUsk.micKey,param->u.crypt.key+16,16); pWapiSta->wapiUsk.keyId = param->u.crypt.idx ; pWapiSta->wapiUsk.bTxEnable = true; _rtw_memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiAEPNInitialValueSrc,16); _rtw_memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiAEPNInitialValueSrc,16); _rtw_memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiAEPNInitialValueSrc,16); _rtw_memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiAEPNInitialValueSrc,16); _rtw_memcpy(pWapiSta->lastRxUnicastPN,WapiAEPNInitialValueSrc,16); pWapiSta->wapiUskUpdate.bTxEnable = false; pWapiSta->wapiUskUpdate.bSet = false; if (psecuritypriv->sw_encrypt== false || psecuritypriv->sw_decrypt == false) { //set unicast key for ASUE rtw_wapi_set_key(padapter, &pWapiSta->wapiUsk, pWapiSta, false, false); } } } } else { list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { if(_rtw_memcmp(pWapiSta->PeerMacAddr,get_bssid(pmlmepriv),6)) { pWapiSta->wapiMsk.bSet = true; _rtw_memcpy(pWapiSta->wapiMsk.dataKey,param->u.crypt.key,16); _rtw_memcpy(pWapiSta->wapiMsk.micKey,param->u.crypt.key+16,16); pWapiSta->wapiMsk.keyId = param->u.crypt.idx ; pWapiSta->wapiMsk.bTxEnable = false; if(!pWapiSta->bSetkeyOk) pWapiSta->bSetkeyOk = true; pWapiSta->bAuthenticateInProgress = false; _rtw_memcpy(pWapiSta->lastRxMulticastPN, WapiAEMultiCastPNInitialValueSrc, 16); if (psecuritypriv->sw_decrypt == false) { //set rx broadcast key for ASUE rtw_wapi_set_key(padapter, &pWapiSta->wapiMsk, pWapiSta, true, false); } } } } } #endif exit: if (pwep) { rtw_mfree((u8 *)pwep, wep_total_len); } _func_exit_; return ret; } static int rtw_set_wpa_ie(_adapter *padapter, char *pie, unsigned short ielen) { u8 *buf=NULL, *pos=NULL; u32 left; int group_cipher = 0, pairwise_cipher = 0; int ret = 0; u8 null_addr[]= {0,0,0,0,0,0}; #ifdef CONFIG_P2P struct wifidirect_info* pwdinfo = &padapter->wdinfo; #endif //CONFIG_P2P if((ielen > MAX_WPA_IE_LEN) || (pie == NULL)){ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); if(pie == NULL) return ret; else return -EINVAL; } if(ielen) { buf = rtw_zmalloc(ielen); if (buf == NULL){ ret = -ENOMEM; goto exit; } _rtw_memcpy(buf, pie , ielen); //dump { int i; DBG_871X("\n wpa_ie(length:%d):\n", ielen); for(i=0;i= RSN_SELECTOR_LEN){ pos += RSN_SELECTOR_LEN; left -= RSN_SELECTOR_LEN; } else if (left > 0){ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("Ie length mismatch, %u too much \n", left)); ret =-1; goto exit; } #endif if(rtw_parse_wpa_ie(buf, ielen, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) { padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPAPSK; _rtw_memcpy(padapter->securitypriv.supplicant_ie, &buf[0], ielen); } if(rtw_parse_wpa2_ie(buf, ielen, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) { padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPA2PSK; _rtw_memcpy(padapter->securitypriv.supplicant_ie, &buf[0], ielen); } if (group_cipher == 0) { group_cipher = WPA_CIPHER_NONE; } if (pairwise_cipher == 0) { pairwise_cipher = WPA_CIPHER_NONE; } switch(group_cipher) { case WPA_CIPHER_NONE: padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; break; case WPA_CIPHER_WEP40: padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; break; case WPA_CIPHER_TKIP: padapter->securitypriv.dot118021XGrpPrivacy=_TKIP_; padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; break; case WPA_CIPHER_CCMP: padapter->securitypriv.dot118021XGrpPrivacy=_AES_; padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; break; case WPA_CIPHER_WEP104: padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; break; } switch(pairwise_cipher) { case WPA_CIPHER_NONE: padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; break; case WPA_CIPHER_WEP40: padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; break; case WPA_CIPHER_TKIP: padapter->securitypriv.dot11PrivacyAlgrthm=_TKIP_; padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; break; case WPA_CIPHER_CCMP: padapter->securitypriv.dot11PrivacyAlgrthm=_AES_; padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; break; case WPA_CIPHER_WEP104: padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; break; } _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); {//set wps_ie u16 cnt = 0; u8 eid, wps_oui[4]={0x0,0x50,0xf2,0x04}; while( cnt < ielen ) { eid = buf[cnt]; if((eid==_VENDOR_SPECIFIC_IE_)&&(_rtw_memcmp(&buf[cnt+2], wps_oui, 4)==_TRUE)) { DBG_871X("SET WPS_IE\n"); padapter->securitypriv.wps_ie_len = ((buf[cnt+1]+2) < MAX_WPS_IE_LEN) ? (buf[cnt+1]+2):MAX_WPS_IE_LEN; _rtw_memcpy(padapter->securitypriv.wps_ie, &buf[cnt], padapter->securitypriv.wps_ie_len); set_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS); #ifdef CONFIG_P2P if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_OK)) { rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_ING); } #endif //CONFIG_P2P cnt += buf[cnt+1]+2; break; } else { cnt += buf[cnt+1]+2; //goto next } } } } //TKIP and AES disallow multicast packets until installing group key if(padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_ || padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_WTMIC_ || padapter->securitypriv.dot11PrivacyAlgrthm == _AES_) //WPS open need to enable multicast //|| check_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS) == _TRUE) rtw_hal_set_hwreg(padapter, HW_VAR_OFF_RCR_AM, null_addr); RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ("rtw_set_wpa_ie: pairwise_cipher=0x%08x padapter->securitypriv.ndisencryptstatus=%d padapter->securitypriv.ndisauthtype=%d\n", pairwise_cipher, padapter->securitypriv.ndisencryptstatus, padapter->securitypriv.ndisauthtype)); exit: if (buf) rtw_mfree(buf, ielen); return ret; } static int rtw_wx_get_name(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); u16 cap; u32 ht_ielen = 0; char *p; u8 ht_cap=_FALSE, vht_cap=_FALSE; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; NDIS_802_11_RATES_EX* prates = NULL; RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("cmd_code=%x\n", info->cmd)); _func_enter_; if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE) == _TRUE) { //parsing HT_CAP_IE p = rtw_get_ie(&pcur_bss->IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pcur_bss->IELength-12); if(p && ht_ielen>0) { ht_cap = _TRUE; } #ifdef CONFIG_80211AC_VHT if(pmlmepriv->vhtpriv.vht_option == _TRUE) vht_cap = _TRUE; #endif prates = &pcur_bss->SupportedRates; if (rtw_is_cckratesonly_included((u8*)prates) == _TRUE) { if(ht_cap == _TRUE) snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bn"); else snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11b"); } else if ((rtw_is_cckrates_included((u8*)prates)) == _TRUE) { if(ht_cap == _TRUE) snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bgn"); else snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bg"); } else { if(pcur_bss->Configuration.DSConfig > 14) { #ifdef CONFIG_80211AC_VHT if(vht_cap == _TRUE){ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11AC"); } else #endif { if(ht_cap == _TRUE) snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11an"); else snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11a"); } } else { if(ht_cap == _TRUE) snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11gn"); else snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11g"); } } } else { //prates = &padapter->registrypriv.dev_network.SupportedRates; //snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11g"); snprintf(wrqu->name, IFNAMSIZ, "unassociated"); } _func_exit_; return 0; } static int rtw_wx_set_freq(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { _func_enter_; RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+rtw_wx_set_freq\n")); _func_exit_; return 0; } static int rtw_wx_get_freq(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { //wrqu->freq.m = ieee80211_wlan_frequencies[pcur_bss->Configuration.DSConfig-1] * 100000; wrqu->freq.m = rtw_ch2freq(pcur_bss->Configuration.DSConfig) * 100000; wrqu->freq.e = 1; wrqu->freq.i = pcur_bss->Configuration.DSConfig; } else{ wrqu->freq.m = rtw_ch2freq(padapter->mlmeextpriv.cur_channel) * 100000; wrqu->freq.e = 1; wrqu->freq.i = padapter->mlmeextpriv.cur_channel; } return 0; } static int rtw_wx_set_mode(struct net_device *dev, struct iw_request_info *a, union iwreq_data *wrqu, char *b) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); NDIS_802_11_NETWORK_INFRASTRUCTURE networkType ; int ret = 0; _func_enter_; if(_FAIL == rtw_pwr_wakeup(padapter)) { ret= -EPERM; goto exit; } if (padapter->hw_init_completed==_FALSE){ ret = -EPERM; goto exit; } switch(wrqu->mode) { case IW_MODE_AUTO: networkType = Ndis802_11AutoUnknown; DBG_871X("set_mode = IW_MODE_AUTO\n"); break; case IW_MODE_ADHOC: networkType = Ndis802_11IBSS; DBG_871X("set_mode = IW_MODE_ADHOC\n"); break; case IW_MODE_MASTER: networkType = Ndis802_11APMode; DBG_871X("set_mode = IW_MODE_MASTER\n"); //rtw_setopmode_cmd(padapter, networkType,_TRUE); break; case IW_MODE_INFRA: networkType = Ndis802_11Infrastructure; DBG_871X("set_mode = IW_MODE_INFRA\n"); break; default : ret = -EINVAL;; RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("\n Mode: %s is not supported \n", iw_operation_mode[wrqu->mode])); goto exit; } /* if(Ndis802_11APMode == networkType) { rtw_setopmode_cmd(padapter, networkType,_TRUE); } else { rtw_setopmode_cmd(padapter, Ndis802_11AutoUnknown,_TRUE); } */ if (rtw_set_802_11_infrastructure_mode(padapter, networkType) ==_FALSE){ ret = -EPERM; goto exit; } rtw_setopmode_cmd(padapter, networkType,_TRUE); exit: _func_exit_; return ret; } static int rtw_wx_get_mode(struct net_device *dev, struct iw_request_info *a, union iwreq_data *wrqu, char *b) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,(" rtw_wx_get_mode \n")); _func_enter_; if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) { wrqu->mode = IW_MODE_INFRA; } else if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) { wrqu->mode = IW_MODE_ADHOC; } else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { wrqu->mode = IW_MODE_MASTER; } else { wrqu->mode = IW_MODE_AUTO; } _func_exit_; return 0; } static int rtw_wx_set_pmkid(struct net_device *dev, struct iw_request_info *a, union iwreq_data *wrqu, char *extra) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); u8 j,blInserted = _FALSE; int intReturn = _FALSE; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; struct iw_pmksa* pPMK = ( struct iw_pmksa* ) extra; u8 strZeroMacAddress[ ETH_ALEN ] = { 0x00 }; u8 strIssueBssid[ ETH_ALEN ] = { 0x00 }; /* struct iw_pmksa { __u32 cmd; struct sockaddr bssid; __u8 pmkid[IW_PMKID_LEN]; //IW_PMKID_LEN=16 } There are the BSSID information in the bssid.sa_data array. If cmd is IW_PMKSA_FLUSH, it means the wpa_suppplicant wants to clear all the PMKID information. If cmd is IW_PMKSA_ADD, it means the wpa_supplicant wants to add a PMKID/BSSID to driver. If cmd is IW_PMKSA_REMOVE, it means the wpa_supplicant wants to remove a PMKID/BSSID from driver. */ _rtw_memcpy( strIssueBssid, pPMK->bssid.sa_data, ETH_ALEN); if ( pPMK->cmd == IW_PMKSA_ADD ) { DBG_871X( "[rtw_wx_set_pmkid] IW_PMKSA_ADD!\n" ); if ( _rtw_memcmp( strIssueBssid, strZeroMacAddress, ETH_ALEN ) == _TRUE ) { return( intReturn ); } else { intReturn = _TRUE; } blInserted = _FALSE; //overwrite PMKID for(j=0 ; jPMKIDList[j].Bssid, strIssueBssid, ETH_ALEN) ==_TRUE ) { // BSSID is matched, the same AP => rewrite with new PMKID. DBG_871X( "[rtw_wx_set_pmkid] BSSID exists in the PMKList.\n" ); _rtw_memcpy( psecuritypriv->PMKIDList[j].PMKID, pPMK->pmkid, IW_PMKID_LEN); psecuritypriv->PMKIDList[ j ].bUsed = _TRUE; psecuritypriv->PMKIDIndex = j+1; blInserted = _TRUE; break; } } if(!blInserted) { // Find a new entry DBG_871X( "[rtw_wx_set_pmkid] Use the new entry index = %d for this PMKID.\n", psecuritypriv->PMKIDIndex ); _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].Bssid, strIssueBssid, ETH_ALEN); _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].PMKID, pPMK->pmkid, IW_PMKID_LEN); psecuritypriv->PMKIDList[ psecuritypriv->PMKIDIndex ].bUsed = _TRUE; psecuritypriv->PMKIDIndex++ ; if(psecuritypriv->PMKIDIndex==16) { psecuritypriv->PMKIDIndex =0; } } } else if ( pPMK->cmd == IW_PMKSA_REMOVE ) { DBG_871X( "[rtw_wx_set_pmkid] IW_PMKSA_REMOVE!\n" ); intReturn = _TRUE; for(j=0 ; jPMKIDList[j].Bssid, strIssueBssid, ETH_ALEN) ==_TRUE ) { // BSSID is matched, the same AP => Remove this PMKID information and reset it. _rtw_memset( psecuritypriv->PMKIDList[ j ].Bssid, 0x00, ETH_ALEN ); psecuritypriv->PMKIDList[ j ].bUsed = _FALSE; break; } } } else if ( pPMK->cmd == IW_PMKSA_FLUSH ) { DBG_871X( "[rtw_wx_set_pmkid] IW_PMKSA_FLUSH!\n" ); _rtw_memset( &psecuritypriv->PMKIDList[ 0 ], 0x00, sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE ); psecuritypriv->PMKIDIndex = 0; intReturn = _TRUE; } return( intReturn ); } static int rtw_wx_get_sens(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { #ifdef CONFIG_PLATFORM_ROCKCHIPS _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); /* * 20110311 Commented by Jeff * For rockchip platform's wpa_driver_wext_get_rssi */ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { //wrqu->sens.value=-padapter->recvpriv.signal_strength; wrqu->sens.value=-padapter->recvpriv.rssi; //DBG_871X("%s: %d\n", __FUNCTION__, wrqu->sens.value); wrqu->sens.fixed = 0; /* no auto select */ } else #endif { wrqu->sens.value = 0; wrqu->sens.fixed = 0; /* no auto select */ wrqu->sens.disabled = 1; } return 0; } static int rtw_wx_get_range(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { struct iw_range *range = (struct iw_range *)extra; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; u16 val; int i; _func_enter_; RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_range. cmd_code=%x\n", info->cmd)); wrqu->data.length = sizeof(*range); _rtw_memset(range, 0, sizeof(*range)); /* Let's try to keep this struct in the same order as in * linux/include/wireless.h */ /* TODO: See what values we can set, and remove the ones we can't * set, or fill them with some default data. */ /* ~5 Mb/s real (802.11b) */ range->throughput = 5 * 1000 * 1000; // TODO: Not used in 802.11b? // range->min_nwid; /* Minimal NWID we are able to set */ // TODO: Not used in 802.11b? // range->max_nwid; /* Maximal NWID we are able to set */ /* Old Frequency (backward compat - moved lower ) */ // range->old_num_channels; // range->old_num_frequency; // range->old_freq[6]; /* Filler to keep "version" at the same offset */ /* signal level threshold range */ //percent values between 0 and 100. range->max_qual.qual = 100; range->max_qual.level = 100; range->max_qual.noise = 100; range->max_qual.updated = 7; /* Updated all three */ range->avg_qual.qual = 92; /* > 8% missed beacons is 'bad' */ /* TODO: Find real 'good' to 'bad' threshol value for RSSI */ range->avg_qual.level = 20 + -98; range->avg_qual.noise = 0; range->avg_qual.updated = 7; /* Updated all three */ range->num_bitrates = RATE_COUNT; for (i = 0; i < RATE_COUNT && i < IW_MAX_BITRATES; i++) { range->bitrate[i] = rtw_rates[i]; } range->min_frag = MIN_FRAG_THRESHOLD; range->max_frag = MAX_FRAG_THRESHOLD; range->pm_capa = 0; range->we_version_compiled = WIRELESS_EXT; range->we_version_source = 16; // range->retry_capa; /* What retry options are supported */ // range->retry_flags; /* How to decode max/min retry limit */ // range->r_time_flags; /* How to decode max/min retry life */ // range->min_retry; /* Minimal number of retries */ // range->max_retry; /* Maximal number of retries */ // range->min_r_time; /* Minimal retry lifetime */ // range->max_r_time; /* Maximal retry lifetime */ for (i = 0, val = 0; i < MAX_CHANNEL_NUM; i++) { // Include only legal frequencies for some countries if(pmlmeext->channel_set[i].ChannelNum != 0) { range->freq[val].i = pmlmeext->channel_set[i].ChannelNum; range->freq[val].m = rtw_ch2freq(pmlmeext->channel_set[i].ChannelNum) * 100000; range->freq[val].e = 1; val++; } if (val == IW_MAX_FREQUENCIES) break; } range->num_channels = val; range->num_frequency = val; // Commented by Albert 2009/10/13 // The following code will proivde the security capability to network manager. // If the driver doesn't provide this capability to network manager, // the WPA/WPA2 routers can't be choosen in the network manager. /* #define IW_SCAN_CAPA_NONE 0x00 #define IW_SCAN_CAPA_ESSID 0x01 #define IW_SCAN_CAPA_BSSID 0x02 #define IW_SCAN_CAPA_CHANNEL 0x04 #define IW_SCAN_CAPA_MODE 0x08 #define IW_SCAN_CAPA_RATE 0x10 #define IW_SCAN_CAPA_TYPE 0x20 #define IW_SCAN_CAPA_TIME 0x40 */ #if WIRELESS_EXT > 17 range->enc_capa = IW_ENC_CAPA_WPA|IW_ENC_CAPA_WPA2| IW_ENC_CAPA_CIPHER_TKIP|IW_ENC_CAPA_CIPHER_CCMP; #endif #ifdef IW_SCAN_CAPA_ESSID //WIRELESS_EXT > 21 range->scan_capa = IW_SCAN_CAPA_ESSID | IW_SCAN_CAPA_TYPE |IW_SCAN_CAPA_BSSID| IW_SCAN_CAPA_CHANNEL|IW_SCAN_CAPA_MODE|IW_SCAN_CAPA_RATE; #endif _func_exit_; return 0; } //set bssid flow //s1. rtw_set_802_11_infrastructure_mode() //s2. rtw_set_802_11_authentication_mode() //s3. set_802_11_encryption_mode() //s4. rtw_set_802_11_bssid() static int rtw_wx_set_wap(struct net_device *dev, struct iw_request_info *info, union iwreq_data *awrq, char *extra) { _irqL irqL; uint ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct sockaddr *temp = (struct sockaddr *)awrq; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); _list *phead; u8 *dst_bssid, *src_bssid; _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; NDIS_802_11_AUTHENTICATION_MODE authmode; _func_enter_; /* #ifdef CONFIG_CONCURRENT_MODE if(padapter->iface_type > PRIMARY_IFACE) { ret = -EINVAL; goto exit; } #endif */ #ifdef CONFIG_CONCURRENT_MODE if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) { DBG_871X("set bssid, but buddy_intf is under scanning or linking\n"); ret = -EINVAL; goto exit; } #endif #ifdef CONFIG_DUALMAC_CONCURRENT if (dc_check_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING)== _TRUE) { DBG_871X("set bssid, but buddy_intf is under scanning or linking\n"); ret = -EINVAL; goto exit; } #endif rtw_ps_deny(padapter, PS_DENY_JOIN); if(_FAIL == rtw_pwr_wakeup(padapter)) { ret= -1; goto exit; } if(!padapter->bup){ ret = -1; goto exit; } if (temp->sa_family != ARPHRD_ETHER){ ret = -EINVAL; goto exit; } authmode = padapter->securitypriv.ndisauthtype; _enter_critical_bh(&queue->lock, &irqL); phead = get_list_head(queue); pmlmepriv->pscanned = get_next(phead); while (1) { if ((rtw_end_of_queue_search(phead, pmlmepriv->pscanned)) == _TRUE) { #if 0 ret = -EINVAL; goto exit; if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) { rtw_set_802_11_bssid(padapter, temp->sa_data); goto exit; } else { ret = -EINVAL; goto exit; } #endif break; } pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list); pmlmepriv->pscanned = get_next(pmlmepriv->pscanned); dst_bssid = pnetwork->network.MacAddress; src_bssid = temp->sa_data; if ((_rtw_memcmp(dst_bssid, src_bssid, ETH_ALEN)) == _TRUE) { if(!rtw_set_802_11_infrastructure_mode(padapter, pnetwork->network.InfrastructureMode)) { ret = -1; _exit_critical_bh(&queue->lock, &irqL); goto exit; } break; } } _exit_critical_bh(&queue->lock, &irqL); rtw_set_802_11_authentication_mode(padapter, authmode); //set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); if (rtw_set_802_11_bssid(padapter, temp->sa_data) == _FALSE) { ret = -1; goto exit; } exit: rtw_ps_deny_cancel(padapter, PS_DENY_JOIN); _func_exit_; return ret; } static int rtw_wx_get_wap(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; wrqu->ap_addr.sa_family = ARPHRD_ETHER; _rtw_memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN); RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_wap\n")); _func_enter_; if ( ((check_fwstate(pmlmepriv, _FW_LINKED)) == _TRUE) || ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) == _TRUE) || ((check_fwstate(pmlmepriv, WIFI_AP_STATE)) == _TRUE) ) { _rtw_memcpy(wrqu->ap_addr.sa_data, pcur_bss->MacAddress, ETH_ALEN); } else { _rtw_memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN); } _func_exit_; return 0; } static int rtw_wx_set_mlme(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { #if 0 /* SIOCSIWMLME data */ struct iw_mlme { __u16 cmd; /* IW_MLME_* */ __u16 reason_code; struct sockaddr addr; }; #endif int ret=0; u16 reason; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_mlme *mlme = (struct iw_mlme *) extra; if(mlme==NULL) return -1; DBG_871X("%s\n", __FUNCTION__); reason = cpu_to_le16(mlme->reason_code); DBG_871X("%s, cmd=%d, reason=%d\n", __FUNCTION__, mlme->cmd, reason); switch (mlme->cmd) { case IW_MLME_DEAUTH: if(!rtw_set_802_11_disassociate(padapter)) ret = -1; break; case IW_MLME_DISASSOC: if(!rtw_set_802_11_disassociate(padapter)) ret = -1; break; default: return -EOPNOTSUPP; } return ret; } static int rtw_wx_set_scan(struct net_device *dev, struct iw_request_info *a, union iwreq_data *wrqu, char *extra) { u8 _status = _FALSE; int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv= &padapter->mlmepriv; NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; _irqL irqL; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo= &(padapter->wdinfo); #endif //CONFIG_P2P RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_set_scan\n")); _func_enter_; #ifdef DBG_IOCTL DBG_871X("DBG_IOCTL %s:%d\n",__FUNCTION__, __LINE__); #endif /* #ifdef CONFIG_CONCURRENT_MODE if(padapter->iface_type > PRIMARY_IFACE) { ret = -1; goto exit; } #endif */ #ifdef CONFIG_MP_INCLUDED if (padapter->registrypriv.mp_mode == 1) { DBG_871X(FUNC_ADPT_FMT ": MP mode block Scan request\n", FUNC_ADPT_ARG(padapter)); ret = -1; goto exit; } #ifdef CONFIG_CONCURRENT_MODE if (padapter->pbuddy_adapter) { if (padapter->pbuddy_adapter->registrypriv.mp_mode == 1) { DBG_871X(FUNC_ADPT_FMT ": MP mode block Scan request\n", FUNC_ADPT_ARG(padapter->pbuddy_adapter)); ret = -1; goto exit; } } #endif //CONFIG_CONCURRENT_MODE #endif rtw_ps_deny(padapter, PS_DENY_SCAN); if(_FAIL == rtw_pwr_wakeup(padapter)) { ret= -1; goto exit; } if(padapter->bDriverStopped){ DBG_871X("bDriverStopped=%d\n", padapter->bDriverStopped); ret= -1; goto exit; } if(!padapter->bup){ ret = -1; goto exit; } if (padapter->hw_init_completed==_FALSE){ ret = -1; goto exit; } // When Busy Traffic, driver do not site survey. So driver return success. // wpa_supplicant will not issue SIOCSIWSCAN cmd again after scan timeout. // modify by thomas 2011-02-22. if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE #ifdef CONFIG_CONCURRENT_MODE || rtw_get_buddy_bBusyTraffic(padapter) == _TRUE #endif //CONFIG_CONCURRENT_MODE ) { indicate_wx_scan_complete_event(padapter); goto exit; } if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) { indicate_wx_scan_complete_event(padapter); goto exit; } #ifdef CONFIG_CONCURRENT_MODE if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) { indicate_wx_scan_complete_event(padapter); goto exit; } #endif #ifdef CONFIG_DUALMAC_CONCURRENT if (dc_check_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING)== _TRUE) { indicate_wx_scan_complete_event(padapter); goto exit; } #endif #ifdef CONFIG_P2P if ( pwdinfo->p2p_state != P2P_STATE_NONE ) { rtw_p2p_set_pre_state( pwdinfo, rtw_p2p_state( pwdinfo ) ); rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_FULL); rtw_free_network_queue(padapter, _TRUE); } #endif //CONFIG_P2P _rtw_memset(ssid, 0, sizeof(NDIS_802_11_SSID)*RTW_SSID_SCAN_AMOUNT); #if WIRELESS_EXT >= 17 if (wrqu->data.length == sizeof(struct iw_scan_req)) { struct iw_scan_req *req = (struct iw_scan_req *)extra; if (wrqu->data.flags & IW_SCAN_THIS_ESSID) { int len = min((int)req->essid_len, IW_ESSID_MAX_SIZE); _rtw_memcpy(ssid[0].Ssid, req->essid, len); ssid[0].SsidLength = len; DBG_871X("IW_SCAN_THIS_ESSID, ssid=%s, len=%d\n", req->essid, req->essid_len); _enter_critical_bh(&pmlmepriv->lock, &irqL); _status = rtw_sitesurvey_cmd(padapter, ssid, 1, NULL, 0); _exit_critical_bh(&pmlmepriv->lock, &irqL); } else if (req->scan_type == IW_SCAN_TYPE_PASSIVE) { DBG_871X("rtw_wx_set_scan, req->scan_type == IW_SCAN_TYPE_PASSIVE\n"); } } else #endif if( wrqu->data.length >= WEXT_CSCAN_HEADER_SIZE && _rtw_memcmp(extra, WEXT_CSCAN_HEADER, WEXT_CSCAN_HEADER_SIZE) == _TRUE ) { int len = wrqu->data.length -WEXT_CSCAN_HEADER_SIZE; char *pos = extra+WEXT_CSCAN_HEADER_SIZE; char section; char sec_len; int ssid_index = 0; //DBG_871X("%s COMBO_SCAN header is recognized\n", __FUNCTION__); while(len >= 1) { section = *(pos++); len-=1; switch(section) { case WEXT_CSCAN_SSID_SECTION: //DBG_871X("WEXT_CSCAN_SSID_SECTION\n"); if(len < 1) { len = 0; break; } sec_len = *(pos++); len-=1; if(sec_len>0 && sec_len<=len) { ssid[ssid_index].SsidLength = sec_len; _rtw_memcpy(ssid[ssid_index].Ssid, pos, ssid[ssid_index].SsidLength); //DBG_871X("%s COMBO_SCAN with specific ssid:%s, %d\n", __FUNCTION__ // , ssid[ssid_index].Ssid, ssid[ssid_index].SsidLength); ssid_index++; } pos+=sec_len; len-=sec_len; break; case WEXT_CSCAN_CHANNEL_SECTION: //DBG_871X("WEXT_CSCAN_CHANNEL_SECTION\n"); pos+=1; len-=1; break; case WEXT_CSCAN_ACTV_DWELL_SECTION: //DBG_871X("WEXT_CSCAN_ACTV_DWELL_SECTION\n"); pos+=2; len-=2; break; case WEXT_CSCAN_PASV_DWELL_SECTION: //DBG_871X("WEXT_CSCAN_PASV_DWELL_SECTION\n"); pos+=2; len-=2; break; case WEXT_CSCAN_HOME_DWELL_SECTION: //DBG_871X("WEXT_CSCAN_HOME_DWELL_SECTION\n"); pos+=2; len-=2; break; case WEXT_CSCAN_TYPE_SECTION: //DBG_871X("WEXT_CSCAN_TYPE_SECTION\n"); pos+=1; len-=1; break; #if 0 case WEXT_CSCAN_NPROBE_SECTION: DBG_871X("WEXT_CSCAN_NPROBE_SECTION\n"); break; #endif default: //DBG_871X("Unknown CSCAN section %c\n", section); len = 0; // stop parsing } //DBG_871X("len:%d\n", len); } //jeff: it has still some scan paramater to parse, we only do this now... _status = rtw_set_802_11_bssid_list_scan(padapter, ssid, RTW_SSID_SCAN_AMOUNT); } else { _status = rtw_set_802_11_bssid_list_scan(padapter, NULL, 0); } if(_status == _FALSE) ret = -1; exit: rtw_ps_deny_cancel(padapter, PS_DENY_SCAN); #ifdef DBG_IOCTL DBG_871X("DBG_IOCTL %s:%d return %d\n",__FUNCTION__, __LINE__, ret); #endif _func_exit_; return ret; } static int rtw_wx_get_scan(struct net_device *dev, struct iw_request_info *a, union iwreq_data *wrqu, char *extra) { _irqL irqL; _list *plist, *phead; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; char *ev = extra; char *stop = ev + wrqu->data.length; u32 ret = 0; u32 cnt=0; u32 wait_for_surveydone; sint wait_status; #ifdef CONFIG_CONCURRENT_MODE //PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; //struct mlme_priv *pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); #endif #ifdef CONFIG_P2P struct wifidirect_info* pwdinfo = &padapter->wdinfo; #endif //CONFIG_P2P RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_scan\n")); RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_, (" Start of Query SIOCGIWSCAN .\n")); _func_enter_; #ifdef DBG_IOCTL DBG_871X("DBG_IOCTL %s:%d\n",__FUNCTION__, __LINE__); #endif /* #ifdef CONFIG_CONCURRENT_MODE if(padapter->iface_type > PRIMARY_IFACE) { ret = -EINVAL; goto exit; } #endif */ if(adapter_to_pwrctl(padapter)->brfoffbyhw && padapter->bDriverStopped) { ret = -EINVAL; goto exit; } #ifdef CONFIG_P2P if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { // P2P is enabled if ( padapter->chip_type == RTL8192D ) wait_for_surveydone = 300; // Because the 8192du supports more channels. else wait_for_surveydone = 200; } else { // P2P is disabled wait_for_surveydone = 100; } #else { wait_for_surveydone = 100; } #endif //CONFIG_P2P #if 1 // Wireless Extension use EAGAIN to try wait_status = _FW_UNDER_SURVEY #ifndef CONFIG_ANDROID | _FW_UNDER_LINKING #endif ; while (check_fwstate(pmlmepriv, wait_status) == _TRUE) { return -EAGAIN; } #else wait_status = _FW_UNDER_SURVEY #ifndef CONFIG_ANDROID |_FW_UNDER_LINKING #endif ; #ifdef CONFIG_DUALMAC_CONCURRENT while(dc_check_fwstate(padapter, wait_status)== _TRUE) { rtw_msleep_os(30); cnt++; if(cnt > wait_for_surveydone ) break; } #endif // CONFIG_DUALMAC_CONCURRENT while(check_fwstate(pmlmepriv, wait_status) == _TRUE) { rtw_msleep_os(30); cnt++; if(cnt > wait_for_surveydone ) break; } #endif _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); phead = get_list_head(queue); plist = get_next(phead); while(1) { if (rtw_end_of_queue_search(phead,plist)== _TRUE) break; if((stop - ev) < SCAN_ITEM_SIZE) { ret = -E2BIG; break; } pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); //report network only if the current channel set contains the channel to which this network belongs if(rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig) >= 0 && rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid)) ) { ev=translate_scan(padapter, a, pnetwork, ev, stop); } plist = get_next(plist); } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); wrqu->data.length = ev-extra; wrqu->data.flags = 0; exit: _func_exit_; #ifdef DBG_IOCTL DBG_871X("DBG_IOCTL %s:%d return %d\n",__FUNCTION__, __LINE__, ret); #endif return ret ; } //set ssid flow //s1. rtw_set_802_11_infrastructure_mode() //s2. set_802_11_authenticaion_mode() //s3. set_802_11_encryption_mode() //s4. rtw_set_802_11_ssid() static int rtw_wx_set_essid(struct net_device *dev, struct iw_request_info *a, union iwreq_data *wrqu, char *extra) { _irqL irqL; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _queue *queue = &pmlmepriv->scanned_queue; _list *phead; s8 status = _TRUE; struct wlan_network *pnetwork = NULL; NDIS_802_11_AUTHENTICATION_MODE authmode; NDIS_802_11_SSID ndis_ssid; u8 *dst_ssid, *src_ssid; uint ret = 0, len; _func_enter_; #ifdef DBG_IOCTL DBG_871X("DBG_IOCTL %s:%d\n",__FUNCTION__, __LINE__); #endif /* #ifdef CONFIG_CONCURRENT_MODE if(padapter->iface_type > PRIMARY_IFACE) { ret = -EINVAL; goto exit; } #endif */ #ifdef CONFIG_CONCURRENT_MODE if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) { DBG_871X("set ssid, but buddy_intf is under scanning or linking\n"); ret = -EINVAL; goto exit; } #endif #ifdef CONFIG_DUALMAC_CONCURRENT if (dc_check_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING)== _TRUE) { DBG_871X("set bssid, but buddy_intf is under scanning or linking\n"); ret = -EINVAL; goto exit; } #endif RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ("+rtw_wx_set_essid: fw_state=0x%08x\n", get_fwstate(pmlmepriv))); rtw_ps_deny(padapter, PS_DENY_JOIN); if(_FAIL == rtw_pwr_wakeup(padapter)) { ret = -1; goto exit; } if(!padapter->bup){ ret = -1; goto exit; } #if WIRELESS_EXT <= 20 if ((wrqu->essid.length-1) > IW_ESSID_MAX_SIZE){ #else if (wrqu->essid.length > IW_ESSID_MAX_SIZE){ #endif ret= -E2BIG; goto exit; } if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { ret = -1; goto exit; } authmode = padapter->securitypriv.ndisauthtype; DBG_871X("=>%s\n",__FUNCTION__); if (wrqu->essid.flags && wrqu->essid.length) { // Commented by Albert 20100519 // We got the codes in "set_info" function of iwconfig source code. // ========================================= // wrq.u.essid.length = strlen(essid) + 1; // if(we_kernel_version > 20) // wrq.u.essid.length--; // ========================================= // That means, if the WIRELESS_EXT less than or equal to 20, the correct ssid len should subtract 1. #if WIRELESS_EXT <= 20 len = ((wrqu->essid.length-1) < IW_ESSID_MAX_SIZE) ? (wrqu->essid.length-1) : IW_ESSID_MAX_SIZE; #else len = (wrqu->essid.length < IW_ESSID_MAX_SIZE) ? wrqu->essid.length : IW_ESSID_MAX_SIZE; #endif if( wrqu->essid.length != 33 ) DBG_871X("ssid=%s, len=%d\n", extra, wrqu->essid.length); _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); ndis_ssid.SsidLength = len; _rtw_memcpy(ndis_ssid.Ssid, extra, len); src_ssid = ndis_ssid.Ssid; RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ("rtw_wx_set_essid: ssid=[%s]\n", src_ssid)); _enter_critical_bh(&queue->lock, &irqL); phead = get_list_head(queue); pmlmepriv->pscanned = get_next(phead); while (1) { if (rtw_end_of_queue_search(phead, pmlmepriv->pscanned) == _TRUE) { #if 0 if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) { rtw_set_802_11_ssid(padapter, &ndis_ssid); goto exit; } else { RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("rtw_wx_set_ssid(): scanned_queue is empty\n")); ret = -EINVAL; goto exit; } #endif RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_warning_, ("rtw_wx_set_essid: scan_q is empty, set ssid to check if scanning again!\n")); break; } pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list); pmlmepriv->pscanned = get_next(pmlmepriv->pscanned); dst_ssid = pnetwork->network.Ssid.Ssid; RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ("rtw_wx_set_essid: dst_ssid=%s\n", pnetwork->network.Ssid.Ssid)); if ((_rtw_memcmp(dst_ssid, src_ssid, ndis_ssid.SsidLength) == _TRUE) && (pnetwork->network.Ssid.SsidLength==ndis_ssid.SsidLength)) { RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ("rtw_wx_set_essid: find match, set infra mode\n")); if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) { if(pnetwork->network.InfrastructureMode != pmlmepriv->cur_network.network.InfrastructureMode) continue; } if (rtw_set_802_11_infrastructure_mode(padapter, pnetwork->network.InfrastructureMode) == _FALSE) { ret = -1; _exit_critical_bh(&queue->lock, &irqL); goto exit; } break; } } _exit_critical_bh(&queue->lock, &irqL); RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ("set ssid: set_802_11_auth. mode=%d\n", authmode)); rtw_set_802_11_authentication_mode(padapter, authmode); //set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); if (rtw_set_802_11_ssid(padapter, &ndis_ssid) == _FALSE) { ret = -1; goto exit; } } exit: rtw_ps_deny_cancel(padapter, PS_DENY_JOIN); DBG_871X("<=%s, ret %d\n",__FUNCTION__, ret); #ifdef DBG_IOCTL DBG_871X("DBG_IOCTL %s:%d return %d\n",__FUNCTION__, __LINE__, ret); #endif _func_exit_; return ret; } static int rtw_wx_get_essid(struct net_device *dev, struct iw_request_info *a, union iwreq_data *wrqu, char *extra) { u32 len,ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_essid\n")); _func_enter_; if ( (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) || (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { len = pcur_bss->Ssid.SsidLength; wrqu->essid.length = len; _rtw_memcpy(extra, pcur_bss->Ssid.Ssid, len); wrqu->essid.flags = 1; } else { ret = -1; goto exit; } exit: _func_exit_; return ret; } static int rtw_wx_set_rate(struct net_device *dev, struct iw_request_info *a, union iwreq_data *wrqu, char *extra) { int i, ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); u8 datarates[NumRates]; u32 target_rate = wrqu->bitrate.value; u32 fixed = wrqu->bitrate.fixed; u32 ratevalue = 0; u8 mpdatarate[NumRates]={11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0xff}; _func_enter_; RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,(" rtw_wx_set_rate \n")); RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("target_rate = %d, fixed = %d\n",target_rate,fixed)); if(target_rate == -1){ ratevalue = 11; goto set_rate; } target_rate = target_rate/100000; switch(target_rate){ case 10: ratevalue = 0; break; case 20: ratevalue = 1; break; case 55: ratevalue = 2; break; case 60: ratevalue = 3; break; case 90: ratevalue = 4; break; case 110: ratevalue = 5; break; case 120: ratevalue = 6; break; case 180: ratevalue = 7; break; case 240: ratevalue = 8; break; case 360: ratevalue = 9; break; case 480: ratevalue = 10; break; case 540: ratevalue = 11; break; default: ratevalue = 11; break; } set_rate: for(i=0; ibitrate.fixed = 0; /* no auto select */ wrqu->bitrate.value = max_rate * 100000; return 0; } static int rtw_wx_set_rts(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); _func_enter_; if (wrqu->rts.disabled) padapter->registrypriv.rts_thresh = 2347; else { if (wrqu->rts.value < 0 || wrqu->rts.value > 2347) return -EINVAL; padapter->registrypriv.rts_thresh = wrqu->rts.value; } DBG_871X("%s, rts_thresh=%d\n", __func__, padapter->registrypriv.rts_thresh); _func_exit_; return 0; } static int rtw_wx_get_rts(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); _func_enter_; DBG_871X("%s, rts_thresh=%d\n", __func__, padapter->registrypriv.rts_thresh); wrqu->rts.value = padapter->registrypriv.rts_thresh; wrqu->rts.fixed = 0; /* no auto select */ //wrqu->rts.disabled = (wrqu->rts.value == DEFAULT_RTS_THRESHOLD); _func_exit_; return 0; } static int rtw_wx_set_frag(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); _func_enter_; if (wrqu->frag.disabled) padapter->xmitpriv.frag_len = MAX_FRAG_THRESHOLD; else { if (wrqu->frag.value < MIN_FRAG_THRESHOLD || wrqu->frag.value > MAX_FRAG_THRESHOLD) return -EINVAL; padapter->xmitpriv.frag_len = wrqu->frag.value & ~0x1; } DBG_871X("%s, frag_len=%d\n", __func__, padapter->xmitpriv.frag_len); _func_exit_; return 0; } static int rtw_wx_get_frag(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); _func_enter_; DBG_871X("%s, frag_len=%d\n", __func__, padapter->xmitpriv.frag_len); wrqu->frag.value = padapter->xmitpriv.frag_len; wrqu->frag.fixed = 0; /* no auto select */ //wrqu->frag.disabled = (wrqu->frag.value == DEFAULT_FRAG_THRESHOLD); _func_exit_; return 0; } static int rtw_wx_get_retry(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { //_adapter *padapter = (_adapter *)rtw_netdev_priv(dev); wrqu->retry.value = 7; wrqu->retry.fixed = 0; /* no auto select */ wrqu->retry.disabled = 1; return 0; } #if 0 #define IW_ENCODE_INDEX 0x00FF /* Token index (if needed) */ #define IW_ENCODE_FLAGS 0xFF00 /* Flags defined below */ #define IW_ENCODE_MODE 0xF000 /* Modes defined below */ #define IW_ENCODE_DISABLED 0x8000 /* Encoding disabled */ #define IW_ENCODE_ENABLED 0x0000 /* Encoding enabled */ #define IW_ENCODE_RESTRICTED 0x4000 /* Refuse non-encoded packets */ #define IW_ENCODE_OPEN 0x2000 /* Accept non-encoded packets */ #define IW_ENCODE_NOKEY 0x0800 /* Key is write only, so not present */ #define IW_ENCODE_TEMP 0x0400 /* Temporary key */ /* iwconfig wlan0 key on -> flags = 0x6001 -> maybe it means auto iwconfig wlan0 key off -> flags = 0x8800 iwconfig wlan0 key open -> flags = 0x2800 iwconfig wlan0 key open 1234567890 -> flags = 0x2000 iwconfig wlan0 key restricted -> flags = 0x4800 iwconfig wlan0 key open [3] 1234567890 -> flags = 0x2003 iwconfig wlan0 key restricted [2] 1234567890 -> flags = 0x4002 iwconfig wlan0 key open [3] -> flags = 0x2803 iwconfig wlan0 key restricted [2] -> flags = 0x4802 */ #endif static int rtw_wx_set_enc(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *keybuf) { u32 key, ret = 0; u32 keyindex_provided; NDIS_802_11_WEP wep; NDIS_802_11_AUTHENTICATION_MODE authmode; struct iw_point *erq = &(wrqu->encoding); _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); DBG_871X("+rtw_wx_set_enc, flags=0x%x\n", erq->flags); _rtw_memset(&wep, 0, sizeof(NDIS_802_11_WEP)); key = erq->flags & IW_ENCODE_INDEX; _func_enter_; if (erq->flags & IW_ENCODE_DISABLED) { DBG_871X("EncryptionDisabled\n"); padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled; padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Open; //open system authmode = Ndis802_11AuthModeOpen; padapter->securitypriv.ndisauthtype=authmode; goto exit; } if (key) { if (key > WEP_KEYS) return -EINVAL; key--; keyindex_provided = 1; } else { keyindex_provided = 0; key = padapter->securitypriv.dot11PrivacyKeyIndex; DBG_871X("rtw_wx_set_enc, key=%d\n", key); } //set authentication mode if(erq->flags & IW_ENCODE_OPEN) { DBG_871X("rtw_wx_set_enc():IW_ENCODE_OPEN\n"); padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;//Ndis802_11EncryptionDisabled; #ifdef CONFIG_PLATFORM_MT53XX padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; #else padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Open; #endif padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; authmode = Ndis802_11AuthModeOpen; padapter->securitypriv.ndisauthtype=authmode; } else if(erq->flags & IW_ENCODE_RESTRICTED) { DBG_871X("rtw_wx_set_enc():IW_ENCODE_RESTRICTED\n"); padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; #ifdef CONFIG_PLATFORM_MT53XX padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; #else padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Shared; #endif padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; authmode = Ndis802_11AuthModeShared; padapter->securitypriv.ndisauthtype=authmode; } else { DBG_871X("rtw_wx_set_enc():erq->flags=0x%x\n", erq->flags); padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;//Ndis802_11EncryptionDisabled; padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Open; //open system padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; authmode = Ndis802_11AuthModeOpen; padapter->securitypriv.ndisauthtype=authmode; } wep.KeyIndex = key; if (erq->length > 0) { wep.KeyLength = erq->length <= 5 ? 5 : 13; wep.Length = wep.KeyLength + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); } else { wep.KeyLength = 0 ; if(keyindex_provided == 1)// set key_id only, no given KeyMaterial(erq->length==0). { padapter->securitypriv.dot11PrivacyKeyIndex = key; DBG_871X("(keyindex_provided == 1), keyid=%d, key_len=%d\n", key, padapter->securitypriv.dot11DefKeylen[key]); switch(padapter->securitypriv.dot11DefKeylen[key]) { case 5: padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; break; case 13: padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; break; default: padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; break; } goto exit; } } wep.KeyIndex |= 0x80000000; _rtw_memcpy(wep.KeyMaterial, keybuf, wep.KeyLength); if (rtw_set_802_11_add_wep(padapter, &wep) == _FALSE) { if(rf_on == pwrpriv->rf_pwrstate ) ret = -EOPNOTSUPP; goto exit; } exit: _func_exit_; return ret; } static int rtw_wx_get_enc(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *keybuf) { uint key, ret =0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *erq = &(wrqu->encoding); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); _func_enter_; if(check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) { if(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) != _TRUE) { erq->length = 0; erq->flags |= IW_ENCODE_DISABLED; return 0; } } key = erq->flags & IW_ENCODE_INDEX; if (key) { if (key > WEP_KEYS) return -EINVAL; key--; } else { key = padapter->securitypriv.dot11PrivacyKeyIndex; } erq->flags = key + 1; //if(padapter->securitypriv.ndisauthtype == Ndis802_11AuthModeOpen) //{ // erq->flags |= IW_ENCODE_OPEN; //} switch(padapter->securitypriv.ndisencryptstatus) { case Ndis802_11EncryptionNotSupported: case Ndis802_11EncryptionDisabled: erq->length = 0; erq->flags |= IW_ENCODE_DISABLED; break; case Ndis802_11Encryption1Enabled: erq->length = padapter->securitypriv.dot11DefKeylen[key]; if(erq->length) { _rtw_memcpy(keybuf, padapter->securitypriv.dot11DefKey[key].skey, padapter->securitypriv.dot11DefKeylen[key]); erq->flags |= IW_ENCODE_ENABLED; if(padapter->securitypriv.ndisauthtype == Ndis802_11AuthModeOpen) { erq->flags |= IW_ENCODE_OPEN; } else if(padapter->securitypriv.ndisauthtype == Ndis802_11AuthModeShared) { erq->flags |= IW_ENCODE_RESTRICTED; } } else { erq->length = 0; erq->flags |= IW_ENCODE_DISABLED; } break; case Ndis802_11Encryption2Enabled: case Ndis802_11Encryption3Enabled: erq->length = 16; erq->flags |= (IW_ENCODE_ENABLED | IW_ENCODE_OPEN | IW_ENCODE_NOKEY); break; default: erq->length = 0; erq->flags |= IW_ENCODE_DISABLED; break; } _func_exit_; return ret; } static int rtw_wx_get_power(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { //_adapter *padapter = (_adapter *)rtw_netdev_priv(dev); wrqu->power.value = 0; wrqu->power.fixed = 0; /* no auto select */ wrqu->power.disabled = 1; return 0; } static int rtw_wx_set_gen_ie(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ret = rtw_set_wpa_ie(padapter, extra, wrqu->data.length); return ret; } static int rtw_wx_set_auth(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_param *param = (struct iw_param*)&(wrqu->param); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u32 value = param->value; int ret = 0; switch (param->flags & IW_AUTH_INDEX) { case IW_AUTH_WPA_VERSION: #ifdef CONFIG_WAPI_SUPPORT #ifndef CONFIG_IOCTL_CFG80211 padapter->wapiInfo.bWapiEnable = false; if(value == IW_AUTH_WAPI_VERSION_1) { padapter->wapiInfo.bWapiEnable = true; psecuritypriv->dot11PrivacyAlgrthm = _SMS4_; psecuritypriv->dot118021XGrpPrivacy = _SMS4_; psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; pmlmeinfo->auth_algo = psecuritypriv->dot11AuthAlgrthm; padapter->wapiInfo.extra_prefix_len = WAPI_EXT_LEN; padapter->wapiInfo.extra_postfix_len = SMS4_MIC_LEN; } #endif #endif break; case IW_AUTH_CIPHER_PAIRWISE: break; case IW_AUTH_CIPHER_GROUP: break; case IW_AUTH_KEY_MGMT: #ifdef CONFIG_WAPI_SUPPORT #ifndef CONFIG_IOCTL_CFG80211 DBG_871X("rtw_wx_set_auth: IW_AUTH_KEY_MGMT case \n"); if(value == IW_AUTH_KEY_MGMT_WAPI_PSK) padapter->wapiInfo.bWapiPSK = true; else padapter->wapiInfo.bWapiPSK = false; DBG_871X("rtw_wx_set_auth: IW_AUTH_KEY_MGMT bwapipsk %d \n",padapter->wapiInfo.bWapiPSK); #endif #endif /* * ??? does not use these parameters */ break; case IW_AUTH_TKIP_COUNTERMEASURES: { if ( param->value ) { // wpa_supplicant is enabling the tkip countermeasure. padapter->securitypriv.btkip_countermeasure = _TRUE; } else { // wpa_supplicant is disabling the tkip countermeasure. padapter->securitypriv.btkip_countermeasure = _FALSE; } break; } case IW_AUTH_DROP_UNENCRYPTED: { /* HACK: * * wpa_supplicant calls set_wpa_enabled when the driver * is loaded and unloaded, regardless of if WPA is being * used. No other calls are made which can be used to * determine if encryption will be used or not prior to * association being expected. If encryption is not being * used, drop_unencrypted is set to false, else true -- we * can use this to determine if the CAP_PRIVACY_ON bit should * be set. */ if(padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption1Enabled) { break;//it means init value, or using wep, ndisencryptstatus = Ndis802_11Encryption1Enabled, // then it needn't reset it; } if(param->value){ padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled; padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Open; //open system padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeOpen; } break; } case IW_AUTH_80211_AUTH_ALG: #if defined(CONFIG_ANDROID) || 1 /* * It's the starting point of a link layer connection using wpa_supplicant */ if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) { LeaveAllPowerSaveMode(padapter); rtw_disassoc_cmd(padapter, 500, _FALSE); DBG_871X("%s...call rtw_indicate_disconnect\n ",__FUNCTION__); rtw_indicate_disconnect(padapter); rtw_free_assoc_resources(padapter, 1); } #endif ret = wpa_set_auth_algs(dev, (u32)param->value); break; case IW_AUTH_WPA_ENABLED: //if(param->value) // padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; //802.1x //else // padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Open;//open system //_disassociate(priv); break; case IW_AUTH_RX_UNENCRYPTED_EAPOL: //ieee->ieee802_1x = param->value; break; case IW_AUTH_PRIVACY_INVOKED: //ieee->privacy_invoked = param->value; break; #ifdef CONFIG_WAPI_SUPPORT #ifndef CONFIG_IOCTL_CFG80211 case IW_AUTH_WAPI_ENABLED: break; #endif #endif default: return -EOPNOTSUPP; } return ret; } static int rtw_wx_set_enc_ext(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { char *alg_name; u32 param_len; struct ieee_param *param = NULL; struct iw_point *pencoding = &wrqu->encoding; struct iw_encode_ext *pext = (struct iw_encode_ext *)extra; int ret=0; param_len = sizeof(struct ieee_param) + pext->key_len; param = (struct ieee_param *)rtw_malloc(param_len); if (param == NULL) return -1; _rtw_memset(param, 0, param_len); param->cmd = IEEE_CMD_SET_ENCRYPTION; _rtw_memset(param->sta_addr, 0xff, ETH_ALEN); switch (pext->alg) { case IW_ENCODE_ALG_NONE: //todo: remove key //remove = 1; alg_name = "none"; break; case IW_ENCODE_ALG_WEP: alg_name = "WEP"; break; case IW_ENCODE_ALG_TKIP: alg_name = "TKIP"; break; case IW_ENCODE_ALG_CCMP: alg_name = "CCMP"; break; #ifdef CONFIG_IEEE80211W case IW_ENCODE_ALG_AES_CMAC: alg_name = "BIP"; break; #endif //CONFIG_IEEE80211W #ifdef CONFIG_WAPI_SUPPORT #ifndef CONFIG_IOCTL_CFG80211 case IW_ENCODE_ALG_SM4: alg_name= "SMS4"; _rtw_memcpy(param->sta_addr, pext->addr.sa_data, ETH_ALEN); DBG_871X("rtw_wx_set_enc_ext: SMS4 case \n"); break; #endif #endif default: ret = -1; goto exit; } strncpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); if (pext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) { param->u.crypt.set_tx = 1; } /* cliW: WEP does not have group key * just not checking GROUP key setting */ if ((pext->alg != IW_ENCODE_ALG_WEP) && ((pext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) #ifdef CONFIG_IEEE80211W || (pext->ext_flags & IW_ENCODE_ALG_AES_CMAC) #endif //CONFIG_IEEE80211W )) { param->u.crypt.set_tx = 0; } param->u.crypt.idx = (pencoding->flags&0x00FF) -1 ; if (pext->ext_flags & IW_ENCODE_EXT_RX_SEQ_VALID) { #ifdef CONFIG_WAPI_SUPPORT #ifndef CONFIG_IOCTL_CFG80211 if(pext->alg == IW_ENCODE_ALG_SM4) _rtw_memcpy(param->u.crypt.seq, pext->rx_seq, 16); else #endif //CONFIG_IOCTL_CFG80211 #endif //CONFIG_WAPI_SUPPORT _rtw_memcpy(param->u.crypt.seq, pext->rx_seq, 8); } if(pext->key_len) { param->u.crypt.key_len = pext->key_len; //_rtw_memcpy(param + 1, pext + 1, pext->key_len); _rtw_memcpy(param->u.crypt.key, pext + 1, pext->key_len); } if (pencoding->flags & IW_ENCODE_DISABLED) { //todo: remove key //remove = 1; } ret = wpa_set_encryption(dev, param, param_len); exit: if(param) { rtw_mfree((u8*)param, param_len); } return ret; } static int rtw_wx_get_nick(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { //_adapter *padapter = (_adapter *)rtw_netdev_priv(dev); //struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); //struct security_priv *psecuritypriv = &padapter->securitypriv; if(extra) { wrqu->data.length = 14; wrqu->data.flags = 1; _rtw_memcpy(extra, "", 14); } //rtw_signal_process(pid, SIGUSR1); //for test //dump debug info here /* u32 dot11AuthAlgrthm; // 802.11 auth, could be open, shared, and 8021x u32 dot11PrivacyAlgrthm; // This specify the privacy for shared auth. algorithm. u32 dot118021XGrpPrivacy; // This specify the privacy algthm. used for Grp key u32 ndisauthtype; u32 ndisencryptstatus; */ //DBG_871X("auth_alg=0x%x, enc_alg=0x%x, auth_type=0x%x, enc_type=0x%x\n", // psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, // psecuritypriv->ndisauthtype, psecuritypriv->ndisencryptstatus); //DBG_871X("enc_alg=0x%x\n", psecuritypriv->dot11PrivacyAlgrthm); //DBG_871X("auth_type=0x%x\n", psecuritypriv->ndisauthtype); //DBG_871X("enc_type=0x%x\n", psecuritypriv->ndisencryptstatus); #if 0 DBG_871X("dbg(0x210)=0x%x\n", rtw_read32(padapter, 0x210)); DBG_871X("dbg(0x608)=0x%x\n", rtw_read32(padapter, 0x608)); DBG_871X("dbg(0x280)=0x%x\n", rtw_read32(padapter, 0x280)); DBG_871X("dbg(0x284)=0x%x\n", rtw_read32(padapter, 0x284)); DBG_871X("dbg(0x288)=0x%x\n", rtw_read32(padapter, 0x288)); DBG_871X("dbg(0x664)=0x%x\n", rtw_read32(padapter, 0x664)); DBG_871X("\n"); DBG_871X("dbg(0x430)=0x%x\n", rtw_read32(padapter, 0x430)); DBG_871X("dbg(0x438)=0x%x\n", rtw_read32(padapter, 0x438)); DBG_871X("dbg(0x440)=0x%x\n", rtw_read32(padapter, 0x440)); DBG_871X("dbg(0x458)=0x%x\n", rtw_read32(padapter, 0x458)); DBG_871X("dbg(0x484)=0x%x\n", rtw_read32(padapter, 0x484)); DBG_871X("dbg(0x488)=0x%x\n", rtw_read32(padapter, 0x488)); DBG_871X("dbg(0x444)=0x%x\n", rtw_read32(padapter, 0x444)); DBG_871X("dbg(0x448)=0x%x\n", rtw_read32(padapter, 0x448)); DBG_871X("dbg(0x44c)=0x%x\n", rtw_read32(padapter, 0x44c)); DBG_871X("dbg(0x450)=0x%x\n", rtw_read32(padapter, 0x450)); #endif return 0; } static int rtw_wx_read32(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { PADAPTER padapter; struct iw_point *p; u16 len; u32 addr; u32 data32; u32 bytes; u8 *ptmp; int ret; ret = 0; padapter = (PADAPTER)rtw_netdev_priv(dev); p = &wrqu->data; len = p->length; if (0 == len) return -EINVAL; ptmp = (u8*)rtw_malloc(len); if (NULL == ptmp) return -ENOMEM; if (copy_from_user(ptmp, p->pointer, len)) { ret = -EFAULT; goto exit; } bytes = 0; addr = 0; sscanf(ptmp, "%d,%x", &bytes, &addr); switch (bytes) { case 1: data32 = rtw_read8(padapter, addr); sprintf(extra, "0x%02X", data32); break; case 2: data32 = rtw_read16(padapter, addr); sprintf(extra, "0x%04X", data32); break; case 4: data32 = rtw_read32(padapter, addr); sprintf(extra, "0x%08X", data32); break; default: DBG_871X(KERN_INFO "%s: usage> read [bytes],[address(hex)]\n", __func__); ret = -EINVAL; goto exit; } DBG_871X(KERN_INFO "%s: addr=0x%08X data=%s\n", __func__, addr, extra); exit: rtw_mfree(ptmp, len); return 0; } static int rtw_wx_write32(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { PADAPTER padapter = (PADAPTER)rtw_netdev_priv(dev); u32 addr; u32 data32; u32 bytes; bytes = 0; addr = 0; data32 = 0; sscanf(extra, "%d,%x,%x", &bytes, &addr, &data32); switch (bytes) { case 1: rtw_write8(padapter, addr, (u8)data32); DBG_871X(KERN_INFO "%s: addr=0x%08X data=0x%02X\n", __func__, addr, (u8)data32); break; case 2: rtw_write16(padapter, addr, (u16)data32); DBG_871X(KERN_INFO "%s: addr=0x%08X data=0x%04X\n", __func__, addr, (u16)data32); break; case 4: rtw_write32(padapter, addr, data32); DBG_871X(KERN_INFO "%s: addr=0x%08X data=0x%08X\n", __func__, addr, data32); break; default: DBG_871X(KERN_INFO "%s: usage> write [bytes],[address(hex)],[data(hex)]\n", __func__); return -EINVAL; } return 0; } static int rtw_wx_read_rf(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); u32 path, addr, data32; path = *(u32*)extra; addr = *((u32*)extra + 1); data32 = rtw_hal_read_rfreg(padapter, path, addr, 0xFFFFF); // DBG_871X("%s: path=%d addr=0x%02x data=0x%05x\n", __func__, path, addr, data32); /* * IMPORTANT!! * Only when wireless private ioctl is at odd order, * "extra" would be copied to user space. */ sprintf(extra, "0x%05x", data32); return 0; } static int rtw_wx_write_rf(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); u32 path, addr, data32; path = *(u32*)extra; addr = *((u32*)extra + 1); data32 = *((u32*)extra + 2); // DBG_871X("%s: path=%d addr=0x%02x data=0x%05x\n", __func__, path, addr, data32); rtw_hal_write_rfreg(padapter, path, addr, 0xFFFFF, data32); return 0; } static int rtw_wx_priv_null(struct net_device *dev, struct iw_request_info *a, union iwreq_data *wrqu, char *b) { return -1; } static int dummy(struct net_device *dev, struct iw_request_info *a, union iwreq_data *wrqu, char *b) { //_adapter *padapter = (_adapter *)rtw_netdev_priv(dev); //struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); //DBG_871X("cmd_code=%x, fwstate=0x%x\n", a->cmd, get_fwstate(pmlmepriv)); return -1; } static int rtw_wx_set_channel_plan(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct registry_priv *pregistrypriv = &padapter->registrypriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; extern int rtw_channel_plan; u8 channel_plan_req = (u8) (*((int *)wrqu)); #if 0 rtw_channel_plan = (int)wrqu->data.pointer; pregistrypriv->channel_plan = rtw_channel_plan; pmlmepriv->ChannelPlan = pregistrypriv->channel_plan; #endif if (_SUCCESS == rtw_set_chplan_cmd(padapter, channel_plan_req, 1, 1)) { DBG_871X("%s set channel_plan = 0x%02X\n", __func__, pmlmepriv->ChannelPlan); } else return -EPERM; return 0; } static int rtw_wx_set_mtk_wps_probe_ie(struct net_device *dev, struct iw_request_info *a, union iwreq_data *wrqu, char *b) { #ifdef CONFIG_PLATFORM_MT53XX _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_notice_, ("WLAN IOCTL: cmd_code=%x, fwstate=0x%x\n", a->cmd, get_fwstate(pmlmepriv))); #endif return 0; } static int rtw_wx_get_sensitivity(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *buf) { #ifdef CONFIG_PLATFORM_MT53XX _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); // Modified by Albert 20110914 // This is in dbm format for MTK platform. wrqu->qual.level = padapter->recvpriv.rssi; DBG_871X(" level = %u\n", wrqu->qual.level ); #endif return 0; } static int rtw_wx_set_mtk_wps_ie(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { #ifdef CONFIG_PLATFORM_MT53XX _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); return rtw_set_wpa_ie(padapter, wrqu->data.pointer, wrqu->data.length); #else return 0; #endif } /* typedef int (*iw_handler)(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra); */ /* * For all data larger than 16 octets, we need to use a * pointer to memory allocated in user space. */ static int rtw_drvext_hdl(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { #if 0 struct iw_point { void __user *pointer; /* Pointer to the data (in user space) */ __u16 length; /* number of fields or size in bytes */ __u16 flags; /* Optional params */ }; #endif #ifdef CONFIG_DRVEXT_MODULE u8 res; struct drvext_handler *phandler; struct drvext_oidparam *poidparam; int ret; u16 len; u8 *pparmbuf, bset; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *p = &wrqu->data; if( (!p->length) || (!p->pointer)){ ret = -EINVAL; goto _rtw_drvext_hdl_exit; } bset = (u8)(p->flags&0xFFFF); len = p->length; pparmbuf = (u8*)rtw_malloc(len); if (pparmbuf == NULL){ ret = -ENOMEM; goto _rtw_drvext_hdl_exit; } if(bset)//set info { if (copy_from_user(pparmbuf, p->pointer,len)) { rtw_mfree(pparmbuf, len); ret = -EFAULT; goto _rtw_drvext_hdl_exit; } } else//query info { } // poidparam = (struct drvext_oidparam *)pparmbuf; RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("drvext set oid subcode [%d], len[%d], InformationBufferLength[%d]\r\n", poidparam->subcode, poidparam->len, len)); //check subcode if ( poidparam->subcode >= MAX_DRVEXT_HANDLERS) { RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("no matching drvext handlers\r\n")); ret = -EINVAL; goto _rtw_drvext_hdl_exit; } if ( poidparam->subcode >= MAX_DRVEXT_OID_SUBCODES) { RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("no matching drvext subcodes\r\n")); ret = -EINVAL; goto _rtw_drvext_hdl_exit; } phandler = drvextoidhandlers + poidparam->subcode; if (poidparam->len != phandler->parmsize) { RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("no matching drvext param size %d vs %d\r\n", poidparam->len , phandler->parmsize)); ret = -EINVAL; goto _rtw_drvext_hdl_exit; } res = phandler->handler(&padapter->drvextpriv, bset, poidparam->data); if(res==0) { ret = 0; if (bset == 0x00) {//query info //_rtw_memcpy(p->pointer, pparmbuf, len); if (copy_to_user(p->pointer, pparmbuf, len)) ret = -EFAULT; } } else ret = -EFAULT; _rtw_drvext_hdl_exit: return ret; #endif return 0; } static void rtw_dbg_mode_hdl(_adapter *padapter, u32 id, u8 *pdata, u32 len) { pRW_Reg RegRWStruct; struct rf_reg_param *prfreg; u8 path; u8 offset; u32 value; DBG_871X("%s\n", __FUNCTION__); switch(id) { case GEN_MP_IOCTL_SUBCODE(MP_START): DBG_871X("871x_driver is only for normal mode, can't enter mp mode\n"); break; case GEN_MP_IOCTL_SUBCODE(READ_REG): RegRWStruct = (pRW_Reg)pdata; switch (RegRWStruct->width) { case 1: RegRWStruct->value = rtw_read8(padapter, RegRWStruct->offset); break; case 2: RegRWStruct->value = rtw_read16(padapter, RegRWStruct->offset); break; case 4: RegRWStruct->value = rtw_read32(padapter, RegRWStruct->offset); break; default: break; } break; case GEN_MP_IOCTL_SUBCODE(WRITE_REG): RegRWStruct = (pRW_Reg)pdata; switch (RegRWStruct->width) { case 1: rtw_write8(padapter, RegRWStruct->offset, (u8)RegRWStruct->value); break; case 2: rtw_write16(padapter, RegRWStruct->offset, (u16)RegRWStruct->value); break; case 4: rtw_write32(padapter, RegRWStruct->offset, (u32)RegRWStruct->value); break; default: break; } break; case GEN_MP_IOCTL_SUBCODE(READ_RF_REG): prfreg = (struct rf_reg_param *)pdata; path = (u8)prfreg->path; offset = (u8)prfreg->offset; value = rtw_hal_read_rfreg(padapter, path, offset, 0xffffffff); prfreg->value = value; break; case GEN_MP_IOCTL_SUBCODE(WRITE_RF_REG): prfreg = (struct rf_reg_param *)pdata; path = (u8)prfreg->path; offset = (u8)prfreg->offset; value = prfreg->value; rtw_hal_write_rfreg(padapter, path, offset, 0xffffffff, value); break; case GEN_MP_IOCTL_SUBCODE(TRIGGER_GPIO): DBG_871X("==> trigger gpio 0\n"); rtw_hal_set_hwreg(padapter, HW_VAR_TRIGGER_GPIO_0, 0); break; #ifdef CONFIG_BT_COEXIST case GEN_MP_IOCTL_SUBCODE(SET_DM_BT): DBG_871X("==> set dm_bt_coexist:%x\n",*(u8 *)pdata); rtw_hal_set_hwreg(padapter, HW_VAR_BT_SET_COEXIST, pdata); break; case GEN_MP_IOCTL_SUBCODE(DEL_BA): DBG_871X("==> delete ba:%x\n",*(u8 *)pdata); rtw_hal_set_hwreg(padapter, HW_VAR_BT_ISSUE_DELBA, pdata); break; #endif #ifdef DBG_CONFIG_ERROR_DETECT case GEN_MP_IOCTL_SUBCODE(GET_WIFI_STATUS): *pdata = rtw_hal_sreset_get_wifi_status(padapter); break; #endif default: break; } } static int rtw_mp_ioctl_hdl(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; u32 BytesRead, BytesWritten, BytesNeeded; struct oid_par_priv oid_par; struct mp_ioctl_handler *phandler; struct mp_ioctl_param *poidparam; uint status=0; u16 len; u8 *pparmbuf = NULL, bset; PADAPTER padapter = (PADAPTER)rtw_netdev_priv(dev); struct iw_point *p = &wrqu->data; //DBG_871X("+rtw_mp_ioctl_hdl\n"); //mutex_lock(&ioctl_mutex); if ((!p->length) || (!p->pointer)) { ret = -EINVAL; goto _rtw_mp_ioctl_hdl_exit; } pparmbuf = NULL; bset = (u8)(p->flags & 0xFFFF); len = p->length; pparmbuf = (u8*)rtw_malloc(len); if (pparmbuf == NULL){ ret = -ENOMEM; goto _rtw_mp_ioctl_hdl_exit; } if (copy_from_user(pparmbuf, p->pointer, len)) { ret = -EFAULT; goto _rtw_mp_ioctl_hdl_exit; } poidparam = (struct mp_ioctl_param *)pparmbuf; RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ("rtw_mp_ioctl_hdl: subcode [%d], len[%d], buffer_len[%d]\r\n", poidparam->subcode, poidparam->len, len)); if (poidparam->subcode >= MAX_MP_IOCTL_SUBCODE) { RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_err_, ("no matching drvext subcodes\r\n")); ret = -EINVAL; goto _rtw_mp_ioctl_hdl_exit; } //DBG_871X("%s: %d\n", __func__, poidparam->subcode); #ifdef CONFIG_MP_INCLUDED if (padapter->registrypriv.mp_mode == 1) { phandler = mp_ioctl_hdl + poidparam->subcode; if ((phandler->paramsize != 0) && (poidparam->len < phandler->paramsize)) { RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_err_, ("no matching drvext param size %d vs %d\r\n", poidparam->len, phandler->paramsize)); ret = -EINVAL; goto _rtw_mp_ioctl_hdl_exit; } if (phandler->handler) { oid_par.adapter_context = padapter; oid_par.oid = phandler->oid; oid_par.information_buf = poidparam->data; oid_par.information_buf_len = poidparam->len; oid_par.dbg = 0; BytesWritten = 0; BytesNeeded = 0; if (bset) { oid_par.bytes_rw = &BytesRead; oid_par.bytes_needed = &BytesNeeded; oid_par.type_of_oid = SET_OID; } else { oid_par.bytes_rw = &BytesWritten; oid_par.bytes_needed = &BytesNeeded; oid_par.type_of_oid = QUERY_OID; } status = phandler->handler(&oid_par); //todo:check status, BytesNeeded, etc. } else { DBG_871X("rtw_mp_ioctl_hdl(): err!, subcode=%d, oid=%d, handler=%p\n", poidparam->subcode, phandler->oid, phandler->handler); ret = -EFAULT; goto _rtw_mp_ioctl_hdl_exit; } } else #endif { rtw_dbg_mode_hdl(padapter, poidparam->subcode, poidparam->data, poidparam->len); } if (bset == 0x00) {//query info if (copy_to_user(p->pointer, pparmbuf, len)) ret = -EFAULT; } if (status) { ret = -EFAULT; goto _rtw_mp_ioctl_hdl_exit; } _rtw_mp_ioctl_hdl_exit: if (pparmbuf) rtw_mfree(pparmbuf, len); //mutex_unlock(&ioctl_mutex); return ret; } static int rtw_get_ap_info(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int bssid_match, ret = 0; u32 cnt=0, wpa_ielen; _irqL irqL; _list *plist, *phead; unsigned char *pbuf; u8 bssid[ETH_ALEN]; char data[32]; struct wlan_network *pnetwork = NULL; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); _queue *queue = &(pmlmepriv->scanned_queue); struct iw_point *pdata = &wrqu->data; DBG_871X("+rtw_get_aplist_info\n"); if((padapter->bDriverStopped) || (pdata==NULL)) { ret= -EINVAL; goto exit; } while((check_fwstate(pmlmepriv, (_FW_UNDER_SURVEY|_FW_UNDER_LINKING))) == _TRUE) { rtw_msleep_os(30); cnt++; if(cnt > 100) break; } //pdata->length = 0;//? pdata->flags = 0; if(pdata->length>=32) { if(copy_from_user(data, pdata->pointer, 32)) { ret= -EINVAL; goto exit; } } else { ret= -EINVAL; goto exit; } _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); phead = get_list_head(queue); plist = get_next(phead); while(1) { if (rtw_end_of_queue_search(phead,plist)== _TRUE) break; pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); //if(hwaddr_aton_i(pdata->pointer, bssid)) if(hwaddr_aton_i(data, bssid)) { DBG_871X("Invalid BSSID '%s'.\n", (u8*)data); _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); return -EINVAL; } if(_rtw_memcmp(bssid, pnetwork->network.MacAddress, ETH_ALEN) == _TRUE)//BSSID match, then check if supporting wpa/wpa2 { DBG_871X("BSSID:" MAC_FMT "\n", MAC_ARG(bssid)); pbuf = rtw_get_wpa_ie(&pnetwork->network.IEs[12], &wpa_ielen, pnetwork->network.IELength-12); if(pbuf && (wpa_ielen>0)) { pdata->flags = 1; break; } pbuf = rtw_get_wpa2_ie(&pnetwork->network.IEs[12], &wpa_ielen, pnetwork->network.IELength-12); if(pbuf && (wpa_ielen>0)) { pdata->flags = 2; break; } } plist = get_next(plist); } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); if(pdata->length>=34) { if(copy_to_user((u8*)pdata->pointer+32, (u8*)&pdata->flags, 1)) { ret= -EINVAL; goto exit; } } exit: return ret; } static int rtw_set_pid(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = rtw_netdev_priv(dev); int *pdata = (int *)wrqu; int selector; if((padapter->bDriverStopped) || (pdata==NULL)) { ret= -EINVAL; goto exit; } selector = *pdata; if(selector < 3 && selector >=0) { padapter->pid[selector] = *(pdata+1); #ifdef CONFIG_GLOBAL_UI_PID ui_pid[selector] = *(pdata+1); #endif DBG_871X("%s set pid[%d]=%d\n", __FUNCTION__, selector ,padapter->pid[selector]); } else DBG_871X("%s selector %d error\n", __FUNCTION__, selector); exit: return ret; } static int rtw_wps_start(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *pdata = &wrqu->data; u32 u32wps_start = 0; unsigned int uintRet = 0; if((_TRUE == padapter->bDriverStopped) ||(_TRUE==padapter->bSurpriseRemoved) || (NULL== pdata)) { ret= -EINVAL; goto exit; } uintRet = copy_from_user( ( void* ) &u32wps_start, pdata->pointer, 4 ); if ( u32wps_start == 0 ) { u32wps_start = *extra; } DBG_871X( "[%s] wps_start = %d\n", __FUNCTION__, u32wps_start ); if ( u32wps_start == 1 ) // WPS Start { rtw_led_control(padapter, LED_CTL_START_WPS); } else if ( u32wps_start == 2 ) // WPS Stop because of wps success { rtw_led_control(padapter, LED_CTL_STOP_WPS); } else if ( u32wps_start == 3 ) // WPS Stop because of wps fail { rtw_led_control(padapter, LED_CTL_STOP_WPS_FAIL); } #ifdef CONFIG_INTEL_WIDI process_intel_widi_wps_status(padapter, u32wps_start); #endif //CONFIG_INTEL_WIDI exit: return ret; } #ifdef CONFIG_P2P static int rtw_wext_p2p_enable(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo= &(padapter->wdinfo); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; enum P2P_ROLE init_role = P2P_ROLE_DISABLE; if(*extra == '0' ) init_role = P2P_ROLE_DISABLE; else if(*extra == '1') init_role = P2P_ROLE_DEVICE; else if(*extra == '2') init_role = P2P_ROLE_CLIENT; else if(*extra == '3') init_role = P2P_ROLE_GO; if(_FAIL == rtw_p2p_enable(padapter, init_role)) { ret = -EFAULT; goto exit; } //set channel/bandwidth if(init_role != P2P_ROLE_DISABLE) { u8 channel, ch_offset; u16 bwmode; if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_LISTEN)) { // Stay at the listen state and wait for discovery. channel = pwdinfo->listen_channel; pwdinfo->operating_channel = pwdinfo->listen_channel; ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; bwmode = CHANNEL_WIDTH_20; } #ifdef CONFIG_CONCURRENT_MODE else if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) { _adapter *pbuddy_adapter = padapter->pbuddy_adapter; //struct wifidirect_info *pbuddy_wdinfo = &pbuddy_adapter->wdinfo; struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; _set_timer( &pwdinfo->ap_p2p_switch_timer, pwdinfo->ext_listen_interval ); if ( check_fwstate( pbuddy_mlmepriv, _FW_LINKED ) ) { pwdinfo->operating_channel = pbuddy_mlmeext->cur_channel; // How about the ch_offset and bwmode ?? } else { pwdinfo->operating_channel = pwdinfo->listen_channel; } channel = pbuddy_mlmeext->cur_channel; ch_offset = pbuddy_mlmeext->cur_ch_offset; bwmode = pbuddy_mlmeext->cur_bwmode; } #endif else { pwdinfo->operating_channel = pmlmeext->cur_channel; channel = pwdinfo->operating_channel; ch_offset = pmlmeext->cur_ch_offset; bwmode = pmlmeext->cur_bwmode; } set_channel_bwmode(padapter, channel, ch_offset, bwmode); } exit: return ret; } static int rtw_p2p_set_go_nego_ssid(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo= &(padapter->wdinfo); DBG_871X( "[%s] ssid = %s, len = %zu\n", __FUNCTION__, extra, strlen( extra ) ); _rtw_memcpy( pwdinfo->nego_ssid, extra, strlen( extra ) ); pwdinfo->nego_ssidlen = strlen( extra ); return ret; } static int rtw_p2p_set_intent(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct wifidirect_info *pwdinfo= &(padapter->wdinfo); u8 intent = pwdinfo->intent; extra[ wrqu->data.length ] = 0x00; intent = rtw_atoi( extra ); if ( intent <= 15 ) { pwdinfo->intent= intent; } else { ret = -1; } DBG_871X( "[%s] intent = %d\n", __FUNCTION__, intent); return ret; } static int rtw_p2p_set_listen_ch(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct wifidirect_info *pwdinfo= &(padapter->wdinfo); u8 listen_ch = pwdinfo->listen_channel; // Listen channel number extra[ wrqu->data.length ] = 0x00; listen_ch = rtw_atoi( extra ); if ( ( listen_ch == 1 ) || ( listen_ch == 6 ) || ( listen_ch == 11 ) ) { pwdinfo->listen_channel = listen_ch; set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); } else { ret = -1; } DBG_871X( "[%s] listen_ch = %d\n", __FUNCTION__, pwdinfo->listen_channel ); return ret; } static int rtw_p2p_set_op_ch(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { // Commented by Albert 20110524 // This function is used to set the operating channel if the driver will become the group owner int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct wifidirect_info *pwdinfo= &(padapter->wdinfo); u8 op_ch = pwdinfo->operating_channel; // Operating channel number extra[ wrqu->data.length ] = 0x00; op_ch = ( u8 ) rtw_atoi( extra ); if ( op_ch > 0 ) { pwdinfo->operating_channel = op_ch; } else { ret = -1; } DBG_871X( "[%s] op_ch = %d\n", __FUNCTION__, pwdinfo->operating_channel ); return ret; } static int rtw_p2p_profilefound(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct wifidirect_info *pwdinfo= &(padapter->wdinfo); // Comment by Albert 2010/10/13 // Input data format: // Ex: 0 // Ex: 1XX:XX:XX:XX:XX:XXYYSSID // 0 => Reflush the profile record list. // 1 => Add the profile list // XX:XX:XX:XX:XX:XX => peer's MAC Address ( ex: 00:E0:4C:00:00:01 ) // YY => SSID Length // SSID => SSID for persistence group DBG_871X( "[%s] In value = %s, len = %d \n", __FUNCTION__, extra, wrqu->data.length -1); // The upper application should pass the SSID to driver by using this rtw_p2p_profilefound function. if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { if ( extra[ 0 ] == '0' ) { // Remove all the profile information of wifidirect_info structure. _rtw_memset( &pwdinfo->profileinfo[ 0 ], 0x00, sizeof( struct profile_info ) * P2P_MAX_PERSISTENT_GROUP_NUM ); pwdinfo->profileindex = 0; } else { if ( pwdinfo->profileindex >= P2P_MAX_PERSISTENT_GROUP_NUM ) { ret = -1; } else { int jj, kk; // Add this profile information into pwdinfo->profileinfo // Ex: 1XX:XX:XX:XX:XX:XXYYSSID for( jj = 0, kk = 1; jj < ETH_ALEN; jj++, kk += 3 ) { pwdinfo->profileinfo[ pwdinfo->profileindex ].peermac[ jj ] = key_2char2num(extra[ kk ], extra[ kk+ 1 ]); } //pwdinfo->profileinfo[ pwdinfo->profileindex ].ssidlen = ( extra[18] - '0' ) * 10 + ( extra[ 19 ] - '0' ); //_rtw_memcpy( pwdinfo->profileinfo[ pwdinfo->profileindex ].ssid, &extra[ 20 ], pwdinfo->profileinfo[ pwdinfo->profileindex ].ssidlen ); pwdinfo->profileindex++; } } } return ret; } static int rtw_p2p_setDN(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct wifidirect_info *pwdinfo= &(padapter->wdinfo); DBG_871X( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); _rtw_memset( pwdinfo->device_name, 0x00, WPS_MAX_DEVICE_NAME_LEN ); _rtw_memcpy( pwdinfo->device_name, extra, wrqu->data.length - 1 ); pwdinfo->device_name_len = wrqu->data.length - 1; return ret; } static int rtw_p2p_get_status(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); #ifdef CONFIG_CONCURRENT_MODE _adapter *pbuddy_adapter = padapter->pbuddy_adapter; struct wifidirect_info *pbuddy_wdinfo = &pbuddy_adapter->wdinfo; struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; #endif if ( padapter->bShowGetP2PState ) { DBG_871X( "[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), pwdinfo->p2p_peer_interface_addr[ 0 ], pwdinfo->p2p_peer_interface_addr[ 1 ], pwdinfo->p2p_peer_interface_addr[ 2 ], pwdinfo->p2p_peer_interface_addr[ 3 ], pwdinfo->p2p_peer_interface_addr[ 4 ], pwdinfo->p2p_peer_interface_addr[ 5 ]); } // Commented by Albert 2010/10/12 // Because of the output size limitation, I had removed the "Role" information. // About the "Role" information, we will use the new private IOCTL to get the "Role" information. sprintf( extra, "\n\nStatus=%.2d\n", rtw_p2p_state(pwdinfo) ); wrqu->data.length = strlen( extra ); return ret; } // Commented by Albert 20110520 // This function will return the config method description // This config method description will show us which config method the remote P2P device is intented to use // by sending the provisioning discovery request frame. static int rtw_p2p_get_req_cm(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); sprintf( extra, "\n\nCM=%s\n", pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req ); wrqu->data.length = strlen( extra ); return ret; } static int rtw_p2p_get_role(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); DBG_871X( "[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), pwdinfo->p2p_peer_interface_addr[ 0 ], pwdinfo->p2p_peer_interface_addr[ 1 ], pwdinfo->p2p_peer_interface_addr[ 2 ], pwdinfo->p2p_peer_interface_addr[ 3 ], pwdinfo->p2p_peer_interface_addr[ 4 ], pwdinfo->p2p_peer_interface_addr[ 5 ]); sprintf( extra, "\n\nRole=%.2d\n", rtw_p2p_role(pwdinfo) ); wrqu->data.length = strlen( extra ); return ret; } static int rtw_p2p_get_peer_ifaddr(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); DBG_871X( "[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), pwdinfo->p2p_peer_interface_addr[ 0 ], pwdinfo->p2p_peer_interface_addr[ 1 ], pwdinfo->p2p_peer_interface_addr[ 2 ], pwdinfo->p2p_peer_interface_addr[ 3 ], pwdinfo->p2p_peer_interface_addr[ 4 ], pwdinfo->p2p_peer_interface_addr[ 5 ]); sprintf( extra, "\nMAC %.2X:%.2X:%.2X:%.2X:%.2X:%.2X", pwdinfo->p2p_peer_interface_addr[ 0 ], pwdinfo->p2p_peer_interface_addr[ 1 ], pwdinfo->p2p_peer_interface_addr[ 2 ], pwdinfo->p2p_peer_interface_addr[ 3 ], pwdinfo->p2p_peer_interface_addr[ 4 ], pwdinfo->p2p_peer_interface_addr[ 5 ]); wrqu->data.length = strlen( extra ); return ret; } static int rtw_p2p_get_peer_devaddr(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); DBG_871X( "[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), pwdinfo->rx_prov_disc_info.peerDevAddr[ 0 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 1 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 2 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 3 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 4 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 5 ]); sprintf( extra, "\n%.2X%.2X%.2X%.2X%.2X%.2X", pwdinfo->rx_prov_disc_info.peerDevAddr[ 0 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 1 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 2 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 3 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 4 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 5 ]); wrqu->data.length = strlen( extra ); return ret; } static int rtw_p2p_get_peer_devaddr_by_invitation(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); DBG_871X( "[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), pwdinfo->p2p_peer_device_addr[ 0 ], pwdinfo->p2p_peer_device_addr[ 1 ], pwdinfo->p2p_peer_device_addr[ 2 ], pwdinfo->p2p_peer_device_addr[ 3 ], pwdinfo->p2p_peer_device_addr[ 4 ], pwdinfo->p2p_peer_device_addr[ 5 ]); sprintf( extra, "\nMAC %.2X:%.2X:%.2X:%.2X:%.2X:%.2X", pwdinfo->p2p_peer_device_addr[ 0 ], pwdinfo->p2p_peer_device_addr[ 1 ], pwdinfo->p2p_peer_device_addr[ 2 ], pwdinfo->p2p_peer_device_addr[ 3 ], pwdinfo->p2p_peer_device_addr[ 4 ], pwdinfo->p2p_peer_device_addr[ 5 ]); wrqu->data.length = strlen( extra ); return ret; } static int rtw_p2p_get_groupid(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); sprintf( extra, "\n%.2X:%.2X:%.2X:%.2X:%.2X:%.2X %s", pwdinfo->groupid_info.go_device_addr[ 0 ], pwdinfo->groupid_info.go_device_addr[ 1 ], pwdinfo->groupid_info.go_device_addr[ 2 ], pwdinfo->groupid_info.go_device_addr[ 3 ], pwdinfo->groupid_info.go_device_addr[ 4 ], pwdinfo->groupid_info.go_device_addr[ 5 ], pwdinfo->groupid_info.ssid); wrqu->data.length = strlen( extra ); return ret; } static int rtw_p2p_get_op_ch(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); DBG_871X( "[%s] Op_ch = %02x\n", __FUNCTION__, pwdinfo->operating_channel); sprintf( extra, "\n\nOp_ch=%.2d\n", pwdinfo->operating_channel ); wrqu->data.length = strlen( extra ); return ret; } static int rtw_p2p_get_wps_configmethod(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra, char *subcmd) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); u8 peerMAC[ETH_ALEN] = { 0x00 }; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _irqL irqL; _list * plist,*phead; _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; u8 blnMatch = 0; u16 attr_content = 0; uint attr_contentlen = 0; u8 attr_content_str[P2P_PRIVATE_IOCTL_SET_LEN] = { 0x00 }; // Commented by Albert 20110727 // The input data is the MAC address which the application wants to know its WPS config method. // After knowing its WPS config method, the application can decide the config method for provisioning discovery. // Format: iwpriv wlanx p2p_get_wpsCM 00:E0:4C:00:00:05 DBG_871X("[%s] data = %s\n", __FUNCTION__, subcmd); macstr2num(peerMAC, subcmd); _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); phead = get_list_head(queue); plist = get_next(phead); while (1) { if (rtw_end_of_queue_search(phead, plist) == _TRUE) break; pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); if (_rtw_memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) { u8 *wpsie; uint wpsie_len = 0; // The mac address is matched. if ( (wpsie=rtw_get_wps_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, NULL, &wpsie_len, pnetwork->network.Reserved[0])) ) { rtw_get_wps_attr_content(wpsie, wpsie_len, WPS_ATTR_CONF_METHOD, (u8 *)&attr_content, &attr_contentlen); if (attr_contentlen) { attr_content = be16_to_cpu(attr_content); sprintf(attr_content_str, "\n\nM=%.4d", attr_content); blnMatch = 1; } } break; } plist = get_next(plist); } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); if (!blnMatch) { sprintf(attr_content_str, "\n\nM=0000"); } wrqu->data.length = strlen(attr_content_str); _rtw_memcpy(extra, attr_content_str, wrqu->data.length); return ret; } #ifdef CONFIG_WFD static int rtw_p2p_get_peer_wfd_port(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); DBG_871X( "[%s] p2p_state = %d\n", __FUNCTION__, rtw_p2p_state(pwdinfo) ); sprintf( extra, "\n\nPort=%d\n", pwdinfo->wfd_info->peer_rtsp_ctrlport ); DBG_871X( "[%s] remote port = %d\n", __FUNCTION__, pwdinfo->wfd_info->peer_rtsp_ctrlport ); wrqu->data.length = strlen( extra ); return ret; } static int rtw_p2p_get_peer_wfd_preferred_connection(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); sprintf( extra, "\n\nwfd_pc=%d\n", pwdinfo->wfd_info->wfd_pc ); DBG_871X( "[%s] wfd_pc = %d\n", __FUNCTION__, pwdinfo->wfd_info->wfd_pc ); wrqu->data.length = strlen( extra ); pwdinfo->wfd_info->wfd_pc = _FALSE; // Reset the WFD preferred connection to P2P return ret; } static int rtw_p2p_get_peer_wfd_session_available(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); sprintf( extra, "\n\nwfd_sa=%d\n", pwdinfo->wfd_info->peer_session_avail ); DBG_871X( "[%s] wfd_sa = %d\n", __FUNCTION__, pwdinfo->wfd_info->peer_session_avail ); wrqu->data.length = strlen( extra ); pwdinfo->wfd_info->peer_session_avail = _TRUE; // Reset the WFD session available return ret; } #endif // CONFIG_WFD static int rtw_p2p_get_go_device_address(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra, char *subcmd) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); u8 peerMAC[ETH_ALEN] = { 0x00 }; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _irqL irqL; _list *plist, *phead; _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; u8 blnMatch = 0; u8 *p2pie; uint p2pielen = 0, attr_contentlen = 0; u8 attr_content[100] = { 0x00 }; u8 go_devadd_str[P2P_PRIVATE_IOCTL_SET_LEN] = { 0x00 }; // Commented by Albert 20121209 // The input data is the GO's interface address which the application wants to know its device address. // Format: iwpriv wlanx p2p_get2 go_devadd=00:E0:4C:00:00:05 DBG_871X("[%s] data = %s\n", __FUNCTION__, subcmd); macstr2num(peerMAC, subcmd); _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); phead = get_list_head(queue); plist = get_next(phead); while (1) { if (rtw_end_of_queue_search(phead, plist) == _TRUE) break; pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); if (_rtw_memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) { // Commented by Albert 2011/05/18 // Match the device address located in the P2P IE // This is for the case that the P2P device address is not the same as the P2P interface address. if ((p2pie = rtw_get_p2p_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, NULL, &p2pielen, pnetwork->network.Reserved[0]))) { while (p2pie) { // The P2P Device ID attribute is included in the Beacon frame. // The P2P Device Info attribute is included in the probe response frame. _rtw_memset(attr_content, 0x00, 100); if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_DEVICE_ID, attr_content, &attr_contentlen)) { // Handle the P2P Device ID attribute of Beacon first blnMatch = 1; break; } else if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_DEVICE_INFO, attr_content, &attr_contentlen)) { // Handle the P2P Device Info attribute of probe response blnMatch = 1; break; } //Get the next P2P IE p2pie = rtw_get_p2p_ie(p2pie + p2pielen, pnetwork->network.IELength - 12 - (p2pie - &pnetwork->network.IEs[12] + p2pielen), NULL, &p2pielen); } } } plist = get_next(plist); } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); if (!blnMatch) { sprintf(go_devadd_str, "\n\ndev_add=NULL"); } else { sprintf(go_devadd_str, "\n\ndev_add=%.2X:%.2X:%.2X:%.2X:%.2X:%.2X", attr_content[0], attr_content[1], attr_content[2], attr_content[3], attr_content[4], attr_content[5]); } wrqu->data.length = strlen(go_devadd_str); _rtw_memcpy(extra, go_devadd_str, wrqu->data.length); return ret; } static int rtw_p2p_get_device_type(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra, char *subcmd) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); u8 peerMAC[ETH_ALEN] = { 0x00 }; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _irqL irqL; _list *plist, *phead; _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; u8 blnMatch = 0; u8 dev_type[8] = { 0x00 }; uint dev_type_len = 0; u8 dev_type_str[P2P_PRIVATE_IOCTL_SET_LEN] = { 0x00 }; // +9 is for the str "dev_type=", we have to clear it at wrqu->data.pointer // Commented by Albert 20121209 // The input data is the MAC address which the application wants to know its device type. // Such user interface could know the device type. // Format: iwpriv wlanx p2p_get2 dev_type=00:E0:4C:00:00:05 DBG_871X("[%s] data = %s\n", __FUNCTION__, subcmd); macstr2num(peerMAC, subcmd); _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); phead = get_list_head(queue); plist = get_next(phead); while (1) { if (rtw_end_of_queue_search(phead, plist) == _TRUE) break; pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); if (_rtw_memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) { u8 *wpsie; uint wpsie_len = 0; // The mac address is matched. if ( (wpsie=rtw_get_wps_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, NULL, &wpsie_len, pnetwork->network.Reserved[0])) ) { rtw_get_wps_attr_content(wpsie, wpsie_len, WPS_ATTR_PRIMARY_DEV_TYPE, dev_type, &dev_type_len); if (dev_type_len) { u16 type = 0; _rtw_memcpy(&type, dev_type, 2); type = be16_to_cpu(type); sprintf(dev_type_str, "\n\nN=%.2d", type); blnMatch = 1; } } break; } plist = get_next(plist); } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); if (!blnMatch) { sprintf(dev_type_str, "\n\nN=00"); } wrqu->data.length = strlen(dev_type_str); _rtw_memcpy(extra, dev_type_str, wrqu->data.length); return ret; } static int rtw_p2p_get_device_name(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra, char *subcmd) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); u8 peerMAC[ETH_ALEN] = { 0x00 }; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _irqL irqL; _list *plist, *phead; _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; u8 blnMatch = 0; u8 dev_name[WPS_MAX_DEVICE_NAME_LEN] = { 0x00 }; uint dev_len = 0; u8 dev_name_str[P2P_PRIVATE_IOCTL_SET_LEN] = { 0x00 }; // Commented by Albert 20121225 // The input data is the MAC address which the application wants to know its device name. // Such user interface could show peer device's device name instead of ssid. // Format: iwpriv wlanx p2p_get2 devN=00:E0:4C:00:00:05 DBG_871X("[%s] data = %s\n", __FUNCTION__, subcmd); macstr2num(peerMAC, subcmd); _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); phead = get_list_head(queue); plist = get_next(phead); while (1) { if (rtw_end_of_queue_search(phead, plist) == _TRUE) break; pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); if (_rtw_memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) { u8 *wpsie; uint wpsie_len = 0; // The mac address is matched. if ( (wpsie=rtw_get_wps_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, NULL, &wpsie_len, pnetwork->network.Reserved[0])) ) { rtw_get_wps_attr_content(wpsie, wpsie_len, WPS_ATTR_DEVICE_NAME, dev_name, &dev_len); if (dev_len) { sprintf(dev_name_str, "\n\nN=%s", dev_name); blnMatch = 1; } } break; } plist = get_next(plist); } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); if (!blnMatch) { sprintf(dev_name_str, "\n\nN=0000"); } wrqu->data.length = strlen(dev_name_str); _rtw_memcpy(extra, dev_name_str, wrqu->data.length); return ret; } static int rtw_p2p_get_invitation_procedure(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra, char *subcmd) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); u8 peerMAC[ETH_ALEN] = { 0x00 }; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _irqL irqL; _list *plist, *phead; _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; u8 blnMatch = 0; u8 *p2pie; uint p2pielen = 0, attr_contentlen = 0; u8 attr_content[2] = { 0x00 }; u8 inv_proc_str[P2P_PRIVATE_IOCTL_SET_LEN] = { 0x00 }; // Commented by Ouden 20121226 // The application wants to know P2P initation procedure is support or not. // Format: iwpriv wlanx p2p_get2 InvProc=00:E0:4C:00:00:05 DBG_871X("[%s] data = %s\n", __FUNCTION__, subcmd); macstr2num(peerMAC, subcmd); _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); phead = get_list_head(queue); plist = get_next(phead); while (1) { if (rtw_end_of_queue_search(phead, plist) == _TRUE) break; pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); if (_rtw_memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) { // Commented by Albert 20121226 // Match the device address located in the P2P IE // This is for the case that the P2P device address is not the same as the P2P interface address. if ((p2pie = rtw_get_p2p_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, NULL, &p2pielen, pnetwork->network.Reserved[0]))) { while (p2pie) { //_rtw_memset( attr_content, 0x00, 2); if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_CAPABILITY, attr_content, &attr_contentlen)) { // Handle the P2P capability attribute blnMatch = 1; break; } //Get the next P2P IE p2pie = rtw_get_p2p_ie(p2pie + p2pielen, pnetwork->network.IELength - 12 - (p2pie - &pnetwork->network.IEs[12] + p2pielen), NULL, &p2pielen); } } } plist = get_next(plist); } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); if (!blnMatch) { sprintf(inv_proc_str, "\nIP=-1"); } else { if (attr_content[0] && 0x20) { sprintf(inv_proc_str, "\nIP=1"); } else { sprintf(inv_proc_str, "\nIP=0"); } } wrqu->data.length = strlen(inv_proc_str); _rtw_memcpy(extra, inv_proc_str, wrqu->data.length); return ret; } static int rtw_p2p_connect(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); u8 peerMAC[ ETH_ALEN ] = { 0x00 }; int jj,kk; u8 peerMACStr[ ETH_ALEN * 2 ] = { 0x00 }; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _irqL irqL; _list *plist, *phead; _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; uint uintPeerChannel = 0; #ifdef CONFIG_CONCURRENT_MODE _adapter *pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; #endif // CONFIG_CONCURRENT_MODE // Commented by Albert 20110304 // The input data contains two informations. // 1. First information is the MAC address which wants to formate with // 2. Second information is the WPS PINCode or "pbc" string for push button method // Format: 00:E0:4C:00:00:05 // Format: 00:E0:4C:00:00:05 DBG_871X( "[%s] data = %s\n", __FUNCTION__, extra ); if ( pwdinfo->p2p_state == P2P_STATE_NONE ) { DBG_871X( "[%s] WiFi Direct is disable!\n", __FUNCTION__ ); return ret; } #ifdef CONFIG_INTEL_WIDI if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { DBG_871X( "[%s] WiFi is under survey!\n", __FUNCTION__ ); return ret; } #endif //CONFIG_INTEL_WIDI if ( pwdinfo->ui_got_wps_info == P2P_NO_WPSINFO ) { return -1; } for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) { peerMAC[ jj ] = key_2char2num( extra[kk], extra[kk+ 1] ); } _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); phead = get_list_head(queue); plist = get_next(phead); while(1) { if (rtw_end_of_queue_search(phead,plist)== _TRUE) break; pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); if ( _rtw_memcmp( pnetwork->network.MacAddress, peerMAC, ETH_ALEN ) ) { uintPeerChannel = pnetwork->network.Configuration.DSConfig; break; } plist = get_next(plist); } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); if ( uintPeerChannel ) { #ifdef CONFIG_CONCURRENT_MODE if ( check_fwstate( pbuddy_mlmepriv, _FW_LINKED ) ) { _cancel_timer_ex( &pwdinfo->ap_p2p_switch_timer ); } #endif // CONFIG_CONCURRENT_MODE _rtw_memset( &pwdinfo->nego_req_info, 0x00, sizeof( struct tx_nego_req_info ) ); _rtw_memset( &pwdinfo->groupid_info, 0x00, sizeof( struct group_id_info ) ); pwdinfo->nego_req_info.peer_channel_num[ 0 ] = uintPeerChannel; _rtw_memcpy( pwdinfo->nego_req_info.peerDevAddr, pnetwork->network.MacAddress, ETH_ALEN ); pwdinfo->nego_req_info.benable = _TRUE; _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); if ( rtw_p2p_state(pwdinfo) != P2P_STATE_GONEGO_OK ) { // Restore to the listen state if the current p2p state is not nego OK rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN ); } rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_ING); #ifdef CONFIG_CONCURRENT_MODE if ( check_fwstate( pbuddy_mlmepriv, _FW_LINKED ) ) { // Have to enter the power saving with the AP set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); issue_nulldata(pbuddy_adapter, NULL, 1, 3, 500); } #endif // CONFIG_CONCURRENT_MODE DBG_871X( "[%s] Start PreTx Procedure!\n", __FUNCTION__ ); _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); #ifdef CONFIG_CONCURRENT_MODE if ( check_fwstate( pbuddy_mlmepriv, _FW_LINKED ) ) { _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_CONCURRENT_GO_NEGO_TIMEOUT ); } else { _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_GO_NEGO_TIMEOUT ); } #else _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_GO_NEGO_TIMEOUT ); #endif // CONFIG_CONCURRENT_MODE } else { DBG_871X( "[%s] Not Found in Scanning Queue~\n", __FUNCTION__ ); #ifdef CONFIG_INTEL_WIDI _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); rtw_free_network_queue(padapter, _TRUE); /** * For WiDi, if we can't find candidate device in scanning queue, * driver will do scanning itself */ _enter_critical_bh(&pmlmepriv->lock, &irqL); rtw_sitesurvey_cmd(padapter, NULL, 0, NULL, 0); _exit_critical_bh(&pmlmepriv->lock, &irqL); #endif //CONFIG_INTEL_WIDI ret = -1; } exit: return ret; } static int rtw_p2p_invite_req(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); int jj,kk; u8 peerMACStr[ ETH_ALEN * 2 ] = { 0x00 }; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _list *plist, *phead; _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; uint uintPeerChannel = 0; u8 attr_content[50] = { 0x00 }, _status = 0; u8 *p2pie; uint p2pielen = 0, attr_contentlen = 0; _irqL irqL; struct tx_invite_req_info* pinvite_req_info = &pwdinfo->invitereq_info; u8 ie_offset = 12; #ifdef CONFIG_CONCURRENT_MODE _adapter *pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; #endif // CONFIG_CONCURRENT_MODE #ifdef CONFIG_WFD struct wifi_display_info* pwfd_info = pwdinfo->wfd_info; #endif // CONFIG_WFD // Commented by Albert 20120321 // The input data contains two informations. // 1. First information is the P2P device address which you want to send to. // 2. Second information is the group id which combines with GO's mac address, space and GO's ssid. // Command line sample: iwpriv wlan0 p2p_set invite="00:11:22:33:44:55 00:E0:4C:00:00:05 DIRECT-xy" // Format: 00:11:22:33:44:55 00:E0:4C:00:00:05 DIRECT-xy DBG_871X( "[%s] data = %s\n", __FUNCTION__, extra ); if ( wrqu->data.length <= 37 ) { DBG_871X( "[%s] Wrong format!\n", __FUNCTION__ ); return ret; } if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { DBG_871X( "[%s] WiFi Direct is disable!\n", __FUNCTION__ ); return ret; } else { // Reset the content of struct tx_invite_req_info pinvite_req_info->benable = _FALSE; _rtw_memset( pinvite_req_info->go_bssid, 0x00, ETH_ALEN ); _rtw_memset( pinvite_req_info->go_ssid, 0x00, WLAN_SSID_MAXLEN ); pinvite_req_info->ssidlen = 0x00; pinvite_req_info->operating_ch = pwdinfo->operating_channel; _rtw_memset( pinvite_req_info->peer_macaddr, 0x00, ETH_ALEN ); pinvite_req_info->token = 3; } for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) { pinvite_req_info->peer_macaddr[ jj ] = key_2char2num( extra[kk], extra[kk+ 1] ); } _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); phead = get_list_head(queue); plist = get_next(phead); while(1) { if (rtw_end_of_queue_search(phead,plist)== _TRUE) break; pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); // Commented by Albert 2011/05/18 // Match the device address located in the P2P IE // This is for the case that the P2P device address is not the same as the P2P interface address. ie_offset = (pnetwork->network.Reserved[0] == 2? 0:12); if ( (p2pie=rtw_get_p2p_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, NULL, &p2pielen, pnetwork->network.Reserved[0]))) { // The P2P Device ID attribute is included in the Beacon frame. // The P2P Device Info attribute is included in the probe response frame. if ( rtw_get_p2p_attr_content( p2pie, p2pielen, P2P_ATTR_DEVICE_ID, attr_content, &attr_contentlen) ) { // Handle the P2P Device ID attribute of Beacon first if ( _rtw_memcmp( attr_content, pinvite_req_info->peer_macaddr, ETH_ALEN ) ) { uintPeerChannel = pnetwork->network.Configuration.DSConfig; break; } } else if ( rtw_get_p2p_attr_content( p2pie, p2pielen, P2P_ATTR_DEVICE_INFO, attr_content, &attr_contentlen) ) { // Handle the P2P Device Info attribute of probe response if ( _rtw_memcmp( attr_content, pinvite_req_info->peer_macaddr, ETH_ALEN ) ) { uintPeerChannel = pnetwork->network.Configuration.DSConfig; break; } } } plist = get_next(plist); } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); #ifdef CONFIG_WFD if ( uintPeerChannel ) { u8 wfd_ie[ 128 ] = { 0x00 }; uint wfd_ielen = 0; if ( rtw_get_wfd_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, wfd_ie, &wfd_ielen, pnetwork->network.Reserved[0]) ) { u8 wfd_devinfo[ 6 ] = { 0x00 }; uint wfd_devlen = 6; DBG_871X( "[%s] Found WFD IE!\n", __FUNCTION__ ); if ( rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, wfd_devinfo, &wfd_devlen ) ) { u16 wfd_devinfo_field = 0; // Commented by Albert 20120319 // The first two bytes are the WFD device information field of WFD device information subelement. // In big endian format. wfd_devinfo_field = RTW_GET_BE16(wfd_devinfo); if ( wfd_devinfo_field & WFD_DEVINFO_SESSION_AVAIL ) { pwfd_info->peer_session_avail = _TRUE; } else { pwfd_info->peer_session_avail = _FALSE; } } } if ( _FALSE == pwfd_info->peer_session_avail ) { DBG_871X( "[%s] WFD Session not avaiable!\n", __FUNCTION__ ); goto exit; } } #endif // CONFIG_WFD if ( uintPeerChannel ) { #ifdef CONFIG_CONCURRENT_MODE if ( check_fwstate( pbuddy_mlmepriv, _FW_LINKED ) ) { _cancel_timer_ex( &pwdinfo->ap_p2p_switch_timer ); } #endif // CONFIG_CONCURRENT_MODE // Store the GO's bssid for( jj = 0, kk = 18; jj < ETH_ALEN; jj++, kk += 3 ) { pinvite_req_info->go_bssid[ jj ] = key_2char2num( extra[kk], extra[kk+ 1] ); } // Store the GO's ssid pinvite_req_info->ssidlen = wrqu->data.length - 36; _rtw_memcpy( pinvite_req_info->go_ssid, &extra[ 36 ], (u32) pinvite_req_info->ssidlen ); pinvite_req_info->benable = _TRUE; pinvite_req_info->peer_ch = uintPeerChannel; rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); rtw_p2p_set_state(pwdinfo, P2P_STATE_TX_INVITE_REQ); #ifdef CONFIG_CONCURRENT_MODE if ( check_fwstate( pbuddy_mlmepriv, _FW_LINKED ) ) { // Have to enter the power saving with the AP set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); issue_nulldata(pbuddy_adapter, NULL, 1, 3, 500); } else { set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); } #else set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); #endif _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); #ifdef CONFIG_CONCURRENT_MODE if ( check_fwstate( pbuddy_mlmepriv, _FW_LINKED ) ) { _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_CONCURRENT_INVITE_TIMEOUT ); } else { _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_INVITE_TIMEOUT ); } #else _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_INVITE_TIMEOUT ); #endif // CONFIG_CONCURRENT_MODE } else { DBG_871X( "[%s] NOT Found in the Scanning Queue!\n", __FUNCTION__ ); } exit: return ret; } static int rtw_p2p_set_persistent(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); int jj,kk; u8 peerMACStr[ ETH_ALEN * 2 ] = { 0x00 }; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _list *plist, *phead; _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; uint uintPeerChannel = 0; u8 attr_content[50] = { 0x00 }, _status = 0; u8 *p2pie; uint p2pielen = 0, attr_contentlen = 0; _irqL irqL; struct tx_invite_req_info* pinvite_req_info = &pwdinfo->invitereq_info; #ifdef CONFIG_CONCURRENT_MODE _adapter *pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; #endif // CONFIG_CONCURRENT_MODE #ifdef CONFIG_WFD struct wifi_display_info* pwfd_info = pwdinfo->wfd_info; #endif // CONFIG_WFD // Commented by Albert 20120328 // The input data is 0 or 1 // 0: disable persistent group functionality // 1: enable persistent group founctionality DBG_871X( "[%s] data = %s\n", __FUNCTION__, extra ); if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { DBG_871X( "[%s] WiFi Direct is disable!\n", __FUNCTION__ ); return ret; } else { if ( extra[ 0 ] == '0' ) // Disable the persistent group function. { pwdinfo->persistent_supported = _FALSE; } else if ( extra[ 0 ] == '1' ) // Enable the persistent group function. { pwdinfo->persistent_supported = _TRUE; } else { pwdinfo->persistent_supported = _FALSE; } } printk( "[%s] persistent_supported = %d\n", __FUNCTION__, pwdinfo->persistent_supported ); exit: return ret; } static int hexstr2bin(const char *hex, u8 *buf, size_t len) { size_t i; int a; const char *ipos = hex; u8 *opos = buf; for (i = 0; i < len; i++) { a = hex2byte_i(ipos); if (a < 0) return -1; *opos++ = a; ipos += 2; } return 0; } static int uuid_str2bin(const char *str, u8 *bin) { const char *pos; u8 *opos; pos = str; opos = bin; if (hexstr2bin(pos, opos, 4)) return -1; pos += 8; opos += 4; if (*pos++ != '-' || hexstr2bin(pos, opos, 2)) return -1; pos += 4; opos += 2; if (*pos++ != '-' || hexstr2bin(pos, opos, 2)) return -1; pos += 4; opos += 2; if (*pos++ != '-' || hexstr2bin(pos, opos, 2)) return -1; pos += 4; opos += 2; if (*pos++ != '-' || hexstr2bin(pos, opos, 6)) return -1; return 0; } static int rtw_p2p_set_wps_uuid(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct wifidirect_info *pwdinfo = &(padapter->wdinfo); DBG_871X("[%s] data = %s\n", __FUNCTION__, extra); if ((36 == strlen(extra)) && (uuid_str2bin(extra, pwdinfo->uuid) == 0)) { pwdinfo->external_uuid = 1; } else { pwdinfo->external_uuid = 0; ret = -EINVAL; } return ret; } #ifdef CONFIG_WFD static int rtw_p2p_set_pc(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); u8 peerMAC[ ETH_ALEN ] = { 0x00 }; int jj,kk; u8 peerMACStr[ ETH_ALEN * 2 ] = { 0x00 }; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _list *plist, *phead; _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; u8 attr_content[50] = { 0x00 }, _status = 0; u8 *p2pie; uint p2pielen = 0, attr_contentlen = 0; _irqL irqL; uint uintPeerChannel = 0; #ifdef CONFIG_CONCURRENT_MODE _adapter *pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; #endif // CONFIG_CONCURRENT_MODE struct wifi_display_info* pwfd_info = pwdinfo->wfd_info; // Commented by Albert 20120512 // 1. Input information is the MAC address which wants to know the Preferred Connection bit (PC bit) // Format: 00:E0:4C:00:00:05 DBG_871X( "[%s] data = %s\n", __FUNCTION__, extra ); if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { DBG_871X( "[%s] WiFi Direct is disable!\n", __FUNCTION__ ); return ret; } for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) { peerMAC[ jj ] = key_2char2num( extra[kk], extra[kk+ 1] ); } _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); phead = get_list_head(queue); plist = get_next(phead); while(1) { if (rtw_end_of_queue_search(phead,plist)== _TRUE) break; pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); // Commented by Albert 2011/05/18 // Match the device address located in the P2P IE // This is for the case that the P2P device address is not the same as the P2P interface address. if ( (p2pie=rtw_get_p2p_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, NULL, &p2pielen, pnetwork->network.Reserved[0]))) { // The P2P Device ID attribute is included in the Beacon frame. // The P2P Device Info attribute is included in the probe response frame. printk( "[%s] Got P2P IE\n", __FUNCTION__ ); if ( rtw_get_p2p_attr_content( p2pie, p2pielen, P2P_ATTR_DEVICE_ID, attr_content, &attr_contentlen) ) { // Handle the P2P Device ID attribute of Beacon first printk( "[%s] P2P_ATTR_DEVICE_ID \n", __FUNCTION__ ); if ( _rtw_memcmp( attr_content, peerMAC, ETH_ALEN ) ) { uintPeerChannel = pnetwork->network.Configuration.DSConfig; break; } } else if ( rtw_get_p2p_attr_content( p2pie, p2pielen, P2P_ATTR_DEVICE_INFO, attr_content, &attr_contentlen) ) { // Handle the P2P Device Info attribute of probe response printk( "[%s] P2P_ATTR_DEVICE_INFO \n", __FUNCTION__ ); if ( _rtw_memcmp( attr_content, peerMAC, ETH_ALEN ) ) { uintPeerChannel = pnetwork->network.Configuration.DSConfig; break; } } } plist = get_next(plist); } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); printk( "[%s] channel = %d\n", __FUNCTION__, uintPeerChannel ); if ( uintPeerChannel ) { u8 wfd_ie[ 128 ] = { 0x00 }; uint wfd_ielen = 0; u8 ie_offset = (pnetwork->network.Reserved[0] == 2 ? 0:12); if ( rtw_get_wfd_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, wfd_ie, &wfd_ielen, pnetwork->network.Reserved[0]) ) { u8 wfd_devinfo[ 6 ] = { 0x00 }; uint wfd_devlen = 6; DBG_871X( "[%s] Found WFD IE!\n", __FUNCTION__ ); if ( rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, wfd_devinfo, &wfd_devlen ) ) { u16 wfd_devinfo_field = 0; // Commented by Albert 20120319 // The first two bytes are the WFD device information field of WFD device information subelement. // In big endian format. wfd_devinfo_field = RTW_GET_BE16(wfd_devinfo); if ( wfd_devinfo_field & WFD_DEVINFO_PC_TDLS ) { pwfd_info->wfd_pc = _TRUE; } else { pwfd_info->wfd_pc = _FALSE; } } } } else { DBG_871X( "[%s] NOT Found in the Scanning Queue!\n", __FUNCTION__ ); } exit: return ret; } static int rtw_p2p_set_wfd_device_type(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); struct wifi_display_info *pwfd_info = pwdinfo->wfd_info; // Commented by Albert 20120328 // The input data is 0 or 1 // 0: specify to Miracast source device // 1 or others: specify to Miracast sink device (display device) DBG_871X( "[%s] data = %s\n", __FUNCTION__, extra ); if ( extra[ 0 ] == '0' ) // Set to Miracast source device. { pwfd_info->wfd_device_type = WFD_DEVINFO_SOURCE; } else // Set to Miracast sink device. { pwfd_info->wfd_device_type = WFD_DEVINFO_PSINK; } exit: return ret; } static int rtw_p2p_set_wfd_enable(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { // Commented by Kurt 20121206 // This function is used to set wfd enabled int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct wifidirect_info *pwdinfo= &(padapter->wdinfo); if(*extra == '0' ) pwdinfo->wfd_info->wfd_enable = _FALSE; else if(*extra == '1') pwdinfo->wfd_info->wfd_enable = _TRUE; DBG_871X( "[%s] wfd_enable = %d\n", __FUNCTION__, pwdinfo->wfd_info->wfd_enable ); return ret; } static int rtw_p2p_set_driver_iface(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { // Commented by Kurt 20121206 // This function is used to set driver iface is WEXT or CFG80211 int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct wifidirect_info *pwdinfo= &(padapter->wdinfo); if(*extra == '1' ) { pwdinfo->driver_interface = DRIVER_WEXT; DBG_871X( "[%s] driver_interface = WEXT\n", __FUNCTION__); } else if(*extra == '2') { pwdinfo->driver_interface = DRIVER_CFG80211; DBG_871X( "[%s] driver_interface = CFG80211\n", __FUNCTION__); } return ret; } // To set the WFD session available to enable or disable static int rtw_p2p_set_sa(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); struct wifi_display_info *pwfd_info = pwdinfo->wfd_info; DBG_871X( "[%s] data = %s\n", __FUNCTION__, extra ); if( 0 ) { DBG_871X( "[%s] WiFi Direct is disable!\n", __FUNCTION__ ); return ret; } else { if ( extra[ 0 ] == '0' ) // Disable the session available. { pwdinfo->session_available = _FALSE; } else if ( extra[ 0 ] == '1' ) // Enable the session available. { pwdinfo->session_available = _TRUE; } else { pwdinfo->session_available = _FALSE; } } printk( "[%s] session available = %d\n", __FUNCTION__, pwdinfo->session_available ); exit: return ret; } #endif // CONFIG_WFD static int rtw_p2p_prov_disc(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); u8 peerMAC[ ETH_ALEN ] = { 0x00 }; int jj,kk; u8 peerMACStr[ ETH_ALEN * 2 ] = { 0x00 }; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _list *plist, *phead; _queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; uint uintPeerChannel = 0; u8 attr_content[100] = { 0x00 }, _status = 0; u8 *p2pie; uint p2pielen = 0, attr_contentlen = 0; _irqL irqL; u8 ie_offset = 12; #ifdef CONFIG_CONCURRENT_MODE _adapter *pbuddy_adapter = padapter->pbuddy_adapter; struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; #endif // CONFIG_CONCURRENT_MODE #ifdef CONFIG_WFD struct wifi_display_info* pwfd_info = pwdinfo->wfd_info; #endif // CONFIG_WFD // Commented by Albert 20110301 // The input data contains two informations. // 1. First information is the MAC address which wants to issue the provisioning discovery request frame. // 2. Second information is the WPS configuration method which wants to discovery // Format: 00:E0:4C:00:00:05_display // Format: 00:E0:4C:00:00:05_keypad // Format: 00:E0:4C:00:00:05_pbc // Format: 00:E0:4C:00:00:05_label DBG_871X( "[%s] data = %s\n", __FUNCTION__, extra ); if ( pwdinfo->p2p_state == P2P_STATE_NONE ) { DBG_871X( "[%s] WiFi Direct is disable!\n", __FUNCTION__ ); return ret; } else { #ifdef CONFIG_INTEL_WIDI if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { DBG_871X( "[%s] WiFi is under survey!\n", __FUNCTION__ ); return ret; } #endif //CONFIG_INTEL_WIDI // Reset the content of struct tx_provdisc_req_info excluded the wps_config_method_request. _rtw_memset( pwdinfo->tx_prov_disc_info.peerDevAddr, 0x00, ETH_ALEN ); _rtw_memset( pwdinfo->tx_prov_disc_info.peerIFAddr, 0x00, ETH_ALEN ); _rtw_memset( &pwdinfo->tx_prov_disc_info.ssid, 0x00, sizeof( NDIS_802_11_SSID ) ); pwdinfo->tx_prov_disc_info.peer_channel_num[ 0 ] = 0; pwdinfo->tx_prov_disc_info.peer_channel_num[ 1 ] = 0; pwdinfo->tx_prov_disc_info.benable = _FALSE; } for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) { peerMAC[ jj ] = key_2char2num( extra[kk], extra[kk+ 1] ); } if ( _rtw_memcmp( &extra[ 18 ], "display", 7 ) ) { pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_DISPLYA; } else if ( _rtw_memcmp( &extra[ 18 ], "keypad", 7 ) ) { pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_KEYPAD; } else if ( _rtw_memcmp( &extra[ 18 ], "pbc", 3 ) ) { pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; } else if ( _rtw_memcmp( &extra[ 18 ], "label", 5 ) ) { pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_LABEL; } else { DBG_871X( "[%s] Unknown WPS config methodn", __FUNCTION__ ); return( ret ); } _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); phead = get_list_head(queue); plist = get_next(phead); while(1) { if (rtw_end_of_queue_search(phead,plist)== _TRUE) break; if( uintPeerChannel != 0 ) break; pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); // Commented by Albert 2011/05/18 // Match the device address located in the P2P IE // This is for the case that the P2P device address is not the same as the P2P interface address. ie_offset = (pnetwork->network.Reserved[0] == 2? 0:12); if ( (p2pie=rtw_get_p2p_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, NULL, &p2pielen, pnetwork->network.Reserved[0]))) { while ( p2pie ) { // The P2P Device ID attribute is included in the Beacon frame. // The P2P Device Info attribute is included in the probe response frame. if ( rtw_get_p2p_attr_content( p2pie, p2pielen, P2P_ATTR_DEVICE_ID, attr_content, &attr_contentlen) ) { // Handle the P2P Device ID attribute of Beacon first if ( _rtw_memcmp( attr_content, peerMAC, ETH_ALEN ) ) { uintPeerChannel = pnetwork->network.Configuration.DSConfig; break; } } else if ( rtw_get_p2p_attr_content( p2pie, p2pielen, P2P_ATTR_DEVICE_INFO, attr_content, &attr_contentlen) ) { // Handle the P2P Device Info attribute of probe response if ( _rtw_memcmp( attr_content, peerMAC, ETH_ALEN ) ) { uintPeerChannel = pnetwork->network.Configuration.DSConfig; break; } } //Get the next P2P IE p2pie = rtw_get_p2p_ie(p2pie+p2pielen, pnetwork->network.IELength - ie_offset -(p2pie -&pnetwork->network.IEs[ie_offset] + p2pielen), NULL, &p2pielen); } } #ifdef CONFIG_INTEL_WIDI // Some Intel WiDi source may not provide P2P IE, // so we could only compare mac addr by 802.11 Source Address if( pmlmepriv->widi_state == INTEL_WIDI_STATE_WFD_CONNECTION && uintPeerChannel == 0 ) { if ( _rtw_memcmp( pnetwork->network.MacAddress, peerMAC, ETH_ALEN ) ) { uintPeerChannel = pnetwork->network.Configuration.DSConfig; break; } } #endif //CONFIG_INTEL_WIDI plist = get_next(plist); } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); if ( uintPeerChannel ) { #ifdef CONFIG_WFD { u8 wfd_ie[ 128 ] = { 0x00 }; uint wfd_ielen = 0; if ( rtw_get_wfd_ie_from_scan_queue( &pnetwork->network.IEs[0], pnetwork->network.IELength, wfd_ie, &wfd_ielen, pnetwork->network.Reserved[0]) ) { u8 wfd_devinfo[ 6 ] = { 0x00 }; uint wfd_devlen = 6; DBG_871X( "[%s] Found WFD IE!\n", __FUNCTION__ ); if ( rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, wfd_devinfo, &wfd_devlen ) ) { u16 wfd_devinfo_field = 0; // Commented by Albert 20120319 // The first two bytes are the WFD device information field of WFD device information subelement. // In big endian format. wfd_devinfo_field = RTW_GET_BE16(wfd_devinfo); if ( wfd_devinfo_field & WFD_DEVINFO_SESSION_AVAIL ) { pwfd_info->peer_session_avail = _TRUE; } else { pwfd_info->peer_session_avail = _FALSE; } } } if ( _FALSE == pwfd_info->peer_session_avail ) { DBG_871X( "[%s] WFD Session not avaiable!\n", __FUNCTION__ ); goto exit; } } #endif // CONFIG_WFD DBG_871X( "[%s] peer channel: %d!\n", __FUNCTION__, uintPeerChannel ); #ifdef CONFIG_CONCURRENT_MODE if ( check_fwstate( pbuddy_mlmepriv, _FW_LINKED ) ) { _cancel_timer_ex( &pwdinfo->ap_p2p_switch_timer ); } #endif // CONFIG_CONCURRENT_MODE _rtw_memcpy( pwdinfo->tx_prov_disc_info.peerIFAddr, pnetwork->network.MacAddress, ETH_ALEN ); _rtw_memcpy( pwdinfo->tx_prov_disc_info.peerDevAddr, peerMAC, ETH_ALEN ); pwdinfo->tx_prov_disc_info.peer_channel_num[0] = ( u16 ) uintPeerChannel; pwdinfo->tx_prov_disc_info.benable = _TRUE; rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); rtw_p2p_set_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ); if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT)) { _rtw_memcpy( &pwdinfo->tx_prov_disc_info.ssid, &pnetwork->network.Ssid, sizeof( NDIS_802_11_SSID ) ); } else if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) || rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { _rtw_memcpy( pwdinfo->tx_prov_disc_info.ssid.Ssid, pwdinfo->p2p_wildcard_ssid, P2P_WILDCARD_SSID_LEN ); pwdinfo->tx_prov_disc_info.ssid.SsidLength= P2P_WILDCARD_SSID_LEN; } #ifdef CONFIG_CONCURRENT_MODE if ( check_fwstate( pbuddy_mlmepriv, _FW_LINKED ) ) { // Have to enter the power saving with the AP set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); issue_nulldata(pbuddy_adapter, NULL, 1, 3, 500); } else { set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); } #else set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); #endif _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); #ifdef CONFIG_CONCURRENT_MODE if ( check_fwstate( pbuddy_mlmepriv, _FW_LINKED ) ) { _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_CONCURRENT_PROVISION_TIMEOUT ); } else { _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT ); } #else _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT ); #endif // CONFIG_CONCURRENT_MODE } else { DBG_871X( "[%s] NOT Found in the Scanning Queue!\n", __FUNCTION__ ); #ifdef CONFIG_INTEL_WIDI _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); rtw_free_network_queue(padapter, _TRUE); _enter_critical_bh(&pmlmepriv->lock, &irqL); rtw_sitesurvey_cmd(padapter, NULL, 0, NULL, 0); _exit_critical_bh(&pmlmepriv->lock, &irqL); #endif //CONFIG_INTEL_WIDI } exit: return ret; } // Added by Albert 20110328 // This function is used to inform the driver the user had specified the pin code value or pbc // to application. static int rtw_p2p_got_wpsinfo(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); DBG_871X( "[%s] data = %s\n", __FUNCTION__, extra ); // Added by Albert 20110328 // if the input data is P2P_NO_WPSINFO -> reset the wpsinfo // if the input data is P2P_GOT_WPSINFO_PEER_DISPLAY_PIN -> the utility just input the PIN code got from the peer P2P device. // if the input data is P2P_GOT_WPSINFO_SELF_DISPLAY_PIN -> the utility just got the PIN code from itself. // if the input data is P2P_GOT_WPSINFO_PBC -> the utility just determine to use the PBC if ( *extra == '0' ) { pwdinfo->ui_got_wps_info = P2P_NO_WPSINFO; } else if ( *extra == '1' ) { pwdinfo->ui_got_wps_info = P2P_GOT_WPSINFO_PEER_DISPLAY_PIN; } else if ( *extra == '2' ) { pwdinfo->ui_got_wps_info = P2P_GOT_WPSINFO_SELF_DISPLAY_PIN; } else if ( *extra == '3' ) { pwdinfo->ui_got_wps_info = P2P_GOT_WPSINFO_PBC; } else { pwdinfo->ui_got_wps_info = P2P_NO_WPSINFO; } return ret; } #endif //CONFIG_P2P static int rtw_p2p_set(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_P2P _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo= &(padapter->wdinfo); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; DBG_871X( "[%s] extra = %s\n", __FUNCTION__, extra ); if ( _rtw_memcmp( extra, "enable=", 7 ) ) { rtw_wext_p2p_enable( dev, info, wrqu, &extra[7] ); } else if ( _rtw_memcmp( extra, "setDN=", 6 ) ) { wrqu->data.length -= 6; rtw_p2p_setDN( dev, info, wrqu, &extra[6] ); } else if ( _rtw_memcmp( extra, "profilefound=", 13 ) ) { wrqu->data.length -= 13; rtw_p2p_profilefound( dev, info, wrqu, &extra[13] ); } else if ( _rtw_memcmp( extra, "prov_disc=", 10 ) ) { wrqu->data.length -= 10; rtw_p2p_prov_disc( dev, info, wrqu, &extra[10] ); } else if ( _rtw_memcmp( extra, "nego=", 5 ) ) { wrqu->data.length -= 5; rtw_p2p_connect( dev, info, wrqu, &extra[5] ); } else if ( _rtw_memcmp( extra, "intent=", 7 ) ) { // Commented by Albert 2011/03/23 // The wrqu->data.length will include the null character // So, we will decrease 7 + 1 wrqu->data.length -= 8; rtw_p2p_set_intent( dev, info, wrqu, &extra[7] ); } else if ( _rtw_memcmp( extra, "ssid=", 5 ) ) { wrqu->data.length -= 5; rtw_p2p_set_go_nego_ssid( dev, info, wrqu, &extra[5] ); } else if ( _rtw_memcmp( extra, "got_wpsinfo=", 12 ) ) { wrqu->data.length -= 12; rtw_p2p_got_wpsinfo( dev, info, wrqu, &extra[12] ); } else if ( _rtw_memcmp( extra, "listen_ch=", 10 ) ) { // Commented by Albert 2011/05/24 // The wrqu->data.length will include the null character // So, we will decrease (10 + 1) wrqu->data.length -= 11; rtw_p2p_set_listen_ch( dev, info, wrqu, &extra[10] ); } else if ( _rtw_memcmp( extra, "op_ch=", 6 ) ) { // Commented by Albert 2011/05/24 // The wrqu->data.length will include the null character // So, we will decrease (6 + 1) wrqu->data.length -= 7; rtw_p2p_set_op_ch( dev, info, wrqu, &extra[6] ); } else if ( _rtw_memcmp( extra, "invite=", 7 ) ) { wrqu->data.length -= 8; rtw_p2p_invite_req( dev, info, wrqu, &extra[7] ); } else if ( _rtw_memcmp( extra, "persistent=", 11 ) ) { wrqu->data.length -= 11; rtw_p2p_set_persistent( dev, info, wrqu, &extra[11] ); } else if ( _rtw_memcmp ( extra, "uuid=", 5) ) { wrqu->data.length -= 5; ret = rtw_p2p_set_wps_uuid( dev, info, wrqu, &extra[5] ); } #ifdef CONFIG_WFD else if ( _rtw_memcmp( extra, "sa=", 3 ) ) { // sa: WFD Session Available information wrqu->data.length -= 3; rtw_p2p_set_sa( dev, info, wrqu, &extra[3] ); } else if ( _rtw_memcmp( extra, "pc=", 3 ) ) { // pc: WFD Preferred Connection wrqu->data.length -= 3; rtw_p2p_set_pc( dev, info, wrqu, &extra[3] ); } else if ( _rtw_memcmp( extra, "wfd_type=", 9 ) ) { // pc: WFD Preferred Connection wrqu->data.length -= 9; rtw_p2p_set_wfd_device_type( dev, info, wrqu, &extra[9] ); } else if ( _rtw_memcmp( extra, "wfd_enable=", 11 ) ) { wrqu->data.length -= 11; rtw_p2p_set_wfd_enable( dev, info, wrqu, &extra[11] ); } else if ( _rtw_memcmp( extra, "driver_iface=", 13 ) ) { wrqu->data.length -= 13; rtw_p2p_set_driver_iface( dev, info, wrqu, &extra[13] ); } #endif //CONFIG_WFD #endif //CONFIG_P2P return ret; } static int rtw_p2p_get(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_P2P _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct iw_point *pdata = &wrqu->data; struct wifidirect_info *pwdinfo= &(padapter->wdinfo); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; if ( padapter->bShowGetP2PState ) { DBG_871X( "[%s] extra = %s\n", __FUNCTION__, (char*) wrqu->data.pointer ); } if ( _rtw_memcmp( wrqu->data.pointer, "status", 6 ) ) { rtw_p2p_get_status( dev, info, wrqu, extra ); } else if ( _rtw_memcmp( wrqu->data.pointer, "role", 4 ) ) { rtw_p2p_get_role( dev, info, wrqu, extra); } else if ( _rtw_memcmp( wrqu->data.pointer, "peer_ifa", 8 ) ) { rtw_p2p_get_peer_ifaddr( dev, info, wrqu, extra); } else if ( _rtw_memcmp( wrqu->data.pointer, "req_cm", 6 ) ) { rtw_p2p_get_req_cm( dev, info, wrqu, extra); } else if ( _rtw_memcmp( wrqu->data.pointer, "peer_deva", 9 ) ) { // Get the P2P device address when receiving the provision discovery request frame. rtw_p2p_get_peer_devaddr( dev, info, wrqu, extra); } else if ( _rtw_memcmp( wrqu->data.pointer, "group_id", 8 ) ) { rtw_p2p_get_groupid( dev, info, wrqu, extra); } else if ( _rtw_memcmp( wrqu->data.pointer, "inv_peer_deva", 13 ) ) { // Get the P2P device address when receiving the P2P Invitation request frame. rtw_p2p_get_peer_devaddr_by_invitation( dev, info, wrqu, extra); } else if ( _rtw_memcmp( wrqu->data.pointer, "op_ch", 5 ) ) { rtw_p2p_get_op_ch( dev, info, wrqu, extra); } #ifdef CONFIG_WFD else if ( _rtw_memcmp( wrqu->data.pointer, "peer_port", 9 ) ) { rtw_p2p_get_peer_wfd_port( dev, info, wrqu, extra ); } else if ( _rtw_memcmp( wrqu->data.pointer, "wfd_sa", 6 ) ) { rtw_p2p_get_peer_wfd_session_available( dev, info, wrqu, extra ); } else if ( _rtw_memcmp( wrqu->data.pointer, "wfd_pc", 6 ) ) { rtw_p2p_get_peer_wfd_preferred_connection( dev, info, wrqu, extra ); } #endif // CONFIG_WFD #endif //CONFIG_P2P return ret; } static int rtw_p2p_get2(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_P2P int length = wrqu->data.length; char *buffer = (u8 *)rtw_malloc(length); if (buffer == NULL) { ret = -ENOMEM; goto bad; } if (copy_from_user(buffer, wrqu->data.pointer, wrqu->data.length)) { ret - EFAULT; goto bad; } DBG_871X("[%s] buffer = %s\n", __FUNCTION__, buffer); if (_rtw_memcmp(buffer, "wpsCM=", 6)) { ret = rtw_p2p_get_wps_configmethod(dev, info, wrqu, extra, &buffer[6]); } else if (_rtw_memcmp(buffer, "devN=", 5)) { ret = rtw_p2p_get_device_name(dev, info, wrqu, extra, &buffer[5]); } else if (_rtw_memcmp(buffer, "dev_type=", 9)) { ret = rtw_p2p_get_device_type(dev, info, wrqu, extra, &buffer[9]); } else if (_rtw_memcmp(buffer, "go_devadd=", 10)) { ret = rtw_p2p_get_go_device_address(dev, info, wrqu, extra, &buffer[10]); } else if (_rtw_memcmp(buffer, "InvProc=", 8)) { ret = rtw_p2p_get_invitation_procedure(dev, info, wrqu, extra, &buffer[8]); } else { snprintf(extra, sizeof("Command not found."), "Command not found."); wrqu->data.length = strlen(extra); } bad: if (buffer) { rtw_mfree(buffer, length); } #endif //CONFIG_P2P return ret; } static int rtw_cta_test_start(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); DBG_871X("%s %s\n", __func__, extra); if (!strcmp(extra, "1")) padapter->in_cta_test = 1; else padapter->in_cta_test = 0; if(padapter->in_cta_test) { u32 v = rtw_read32(padapter, REG_RCR); v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN );//| RCR_ADF rtw_write32(padapter, REG_RCR, v); DBG_871X("enable RCR_ADF\n"); } else { u32 v = rtw_read32(padapter, REG_RCR); v |= RCR_CBSSID_DATA | RCR_CBSSID_BCN ;//| RCR_ADF rtw_write32(padapter, REG_RCR, v); DBG_871X("disable RCR_ADF\n"); } return ret; } extern int rtw_change_ifname(_adapter *padapter, const char *ifname); static int rtw_rereg_nd_name(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = rtw_netdev_priv(dev); struct rereg_nd_name_data *rereg_priv = &padapter->rereg_nd_name_priv; char new_ifname[IFNAMSIZ]; if(rereg_priv->old_ifname[0] == 0) { char *reg_ifname; #ifdef CONFIG_CONCURRENT_MODE if (padapter->isprimary) reg_ifname = padapter->registrypriv.ifname; else #endif reg_ifname = padapter->registrypriv.if2name; strncpy(rereg_priv->old_ifname, reg_ifname, IFNAMSIZ); rereg_priv->old_ifname[IFNAMSIZ-1] = 0; } //DBG_871X("%s wrqu->data.length:%d\n", __FUNCTION__, wrqu->data.length); if(wrqu->data.length > IFNAMSIZ) return -EFAULT; if ( copy_from_user(new_ifname, wrqu->data.pointer, IFNAMSIZ) ) { return -EFAULT; } if( 0 == strcmp(rereg_priv->old_ifname, new_ifname) ) { return ret; } DBG_871X("%s new_ifname:%s\n", __FUNCTION__, new_ifname); if( 0 != (ret = rtw_change_ifname(padapter, new_ifname)) ) { goto exit; } if(_rtw_memcmp(rereg_priv->old_ifname, "disable%d", 9) == _TRUE) { padapter->ledpriv.bRegUseLed= rereg_priv->old_bRegUseLed; rtw_hal_sw_led_init(padapter); //rtw_ips_mode_req(&padapter->pwrctrlpriv, rereg_priv->old_ips_mode); } strncpy(rereg_priv->old_ifname, new_ifname, IFNAMSIZ); rereg_priv->old_ifname[IFNAMSIZ-1] = 0; if(_rtw_memcmp(new_ifname, "disable%d", 9) == _TRUE) { DBG_871X("%s disable\n", __FUNCTION__); // free network queue for Android's timming issue rtw_free_network_queue(padapter, _TRUE); // close led rtw_led_control(padapter, LED_CTL_POWER_OFF); rereg_priv->old_bRegUseLed = padapter->ledpriv.bRegUseLed; padapter->ledpriv.bRegUseLed= _FALSE; rtw_hal_sw_led_deinit(padapter); // the interface is being "disabled", we can do deeper IPS //rereg_priv->old_ips_mode = rtw_get_ips_mode_req(&padapter->pwrctrlpriv); //rtw_ips_mode_req(&padapter->pwrctrlpriv, IPS_NORMAL); } exit: return ret; } #ifdef CONFIG_IOL #include #endif #ifdef DBG_CMD_QUEUE u8 dump_cmd_id=0; #endif static int rtw_dbg_port(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { _irqL irqL; int ret = 0; u8 major_cmd, minor_cmd; u16 arg; u32 extra_arg, *pdata, val32; struct sta_info *psta; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct security_priv *psecuritypriv = &padapter->securitypriv; struct wlan_network *cur_network = &(pmlmepriv->cur_network); struct sta_priv *pstapriv = &padapter->stapriv; pdata = (u32*)&wrqu->data; val32 = *pdata; arg = (u16)(val32&0x0000ffff); major_cmd = (u8)(val32>>24); minor_cmd = (u8)((val32>>16)&0x00ff); extra_arg = *(pdata+1); switch(major_cmd) { case 0x70://read_reg switch(minor_cmd) { case 1: DBG_871X("rtw_read8(0x%x)=0x%02x\n", arg, rtw_read8(padapter, arg)); break; case 2: DBG_871X("rtw_read16(0x%x)=0x%04x\n", arg, rtw_read16(padapter, arg)); break; case 4: DBG_871X("rtw_read32(0x%x)=0x%08x\n", arg, rtw_read32(padapter, arg)); break; } break; case 0x71://write_reg switch(minor_cmd) { case 1: rtw_write8(padapter, arg, extra_arg); DBG_871X("rtw_write8(0x%x)=0x%02x\n", arg, rtw_read8(padapter, arg)); break; case 2: rtw_write16(padapter, arg, extra_arg); DBG_871X("rtw_write16(0x%x)=0x%04x\n", arg, rtw_read16(padapter, arg)); break; case 4: rtw_write32(padapter, arg, extra_arg); DBG_871X("rtw_write32(0x%x)=0x%08x\n", arg, rtw_read32(padapter, arg)); break; } break; case 0x72://read_bb DBG_871X("read_bbreg(0x%x)=0x%x\n", arg, rtw_hal_read_bbreg(padapter, arg, 0xffffffff)); break; case 0x73://write_bb rtw_hal_write_bbreg(padapter, arg, 0xffffffff, extra_arg); DBG_871X("write_bbreg(0x%x)=0x%x\n", arg, rtw_hal_read_bbreg(padapter, arg, 0xffffffff)); break; case 0x74://read_rf DBG_871X("read RF_reg path(0x%02x),offset(0x%x),value(0x%08x)\n",minor_cmd,arg,rtw_hal_read_rfreg(padapter, minor_cmd, arg, 0xffffffff)); break; case 0x75://write_rf rtw_hal_write_rfreg(padapter, minor_cmd, arg, 0xffffffff, extra_arg); DBG_871X("write RF_reg path(0x%02x),offset(0x%x),value(0x%08x)\n",minor_cmd,arg, rtw_hal_read_rfreg(padapter, minor_cmd, arg, 0xffffffff)); break; case 0x76: switch(minor_cmd) { case 0x00: //normal mode, padapter->recvpriv.is_signal_dbg = 0; break; case 0x01: //dbg mode padapter->recvpriv.is_signal_dbg = 1; extra_arg = extra_arg>100?100:extra_arg; extra_arg = extra_arg<0?0:extra_arg; padapter->recvpriv.signal_strength_dbg=extra_arg; break; } break; case 0x78: //IOL test switch(minor_cmd) { #ifdef CONFIG_IOL case 0x04: //LLT table initialization test { u8 page_boundary = 0xf9; { struct xmit_frame *xmit_frame; if((xmit_frame=rtw_IOL_accquire_xmit_frame(padapter)) == NULL) { ret = -ENOMEM; break; } rtw_IOL_append_LLT_cmd(xmit_frame, page_boundary); if(_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 500,0) ) ret = -EPERM; } } break; case 0x05: //blink LED test { u16 reg = 0x4c; u32 blink_num = 50; u32 blink_delay_ms = 200; int i; { struct xmit_frame *xmit_frame; if((xmit_frame=rtw_IOL_accquire_xmit_frame(padapter)) == NULL) { ret = -ENOMEM; break; } for(i=0;inetwork.MacAddress , WLAN_REASON_EXPIRATION_CHK); break; case 0x7F: switch(minor_cmd) { case 0x0: DBG_871X("fwstate=0x%x\n", get_fwstate(pmlmepriv)); break; case 0x01: DBG_871X("auth_alg=0x%x, enc_alg=0x%x, auth_type=0x%x, enc_type=0x%x\n", psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, psecuritypriv->ndisauthtype, psecuritypriv->ndisencryptstatus); break; case 0x02: DBG_871X("pmlmeinfo->state=0x%x\n", pmlmeinfo->state); DBG_871X("DrvBcnEarly=%d\n", pmlmeext->DrvBcnEarly); DBG_871X("DrvBcnTimeOut=%d\n", pmlmeext->DrvBcnTimeOut); break; case 0x03: DBG_871X("qos_option=%d\n", pmlmepriv->qospriv.qos_option); #ifdef CONFIG_80211N_HT DBG_871X("ht_option=%d\n", pmlmepriv->htpriv.ht_option); #endif //CONFIG_80211N_HT break; case 0x04: DBG_871X("cur_ch=%d\n", pmlmeext->cur_channel); DBG_871X("cur_bw=%d\n", pmlmeext->cur_bwmode); DBG_871X("cur_ch_off=%d\n", pmlmeext->cur_ch_offset); DBG_871X("oper_ch=%d\n", rtw_get_oper_ch(padapter)); DBG_871X("oper_bw=%d\n", rtw_get_oper_bw(padapter)); DBG_871X("oper_ch_offet=%d\n", rtw_get_oper_choffset(padapter)); break; case 0x05: psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); if(psta) { int i; struct recv_reorder_ctrl *preorder_ctrl; DBG_871X("SSID=%s\n", cur_network->network.Ssid.Ssid); DBG_871X("sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr)); DBG_871X("cur_channel=%d, cur_bwmode=%d, cur_ch_offset=%d\n", pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); DBG_871X("rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self); DBG_871X("state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid); #ifdef CONFIG_80211N_HT DBG_871X("qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate); DBG_871X("bwmode=%d, ch_offset=%d, sgi_20m=%d,sgi_40m=%d\n", psta->bw_mode, psta->htpriv.ch_offset, psta->htpriv.sgi_20m, psta->htpriv.sgi_40m); DBG_871X("ampdu_enable = %d\n", psta->htpriv.ampdu_enable); DBG_871X("agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap); #endif //CONFIG_80211N_HT for(i=0;i<16;i++) { preorder_ctrl = &psta->recvreorder_ctrl[i]; if(preorder_ctrl->enable) { DBG_871X("tid=%d, indicate_seq=%d\n", i, preorder_ctrl->indicate_seq); } } } else { DBG_871X("can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress)); } break; case 0x06: { u32 ODMFlag; rtw_hal_get_hwreg(padapter, HW_VAR_DM_FLAG, (u8*)(&ODMFlag)); DBG_871X("(B)DMFlag=0x%x, arg=0x%x\n", ODMFlag, arg); ODMFlag = (u32)(0x0f&arg); DBG_871X("(A)DMFlag=0x%x\n", ODMFlag); rtw_hal_set_hwreg(padapter, HW_VAR_DM_FLAG, (u8 *)(&ODMFlag)); } break; case 0x07: DBG_871X("bSurpriseRemoved=%d, bDriverStopped=%d\n", padapter->bSurpriseRemoved, padapter->bDriverStopped); break; case 0x08: { struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct recv_priv *precvpriv = &padapter->recvpriv; DBG_871X("free_xmitbuf_cnt=%d, free_xmitframe_cnt=%d" ", free_xmit_extbuf_cnt=%d, free_xframe_ext_cnt=%d" ", free_recvframe_cnt=%d\n", pxmitpriv->free_xmitbuf_cnt, pxmitpriv->free_xmitframe_cnt, pxmitpriv->free_xmit_extbuf_cnt, pxmitpriv->free_xframe_ext_cnt, precvpriv->free_recvframe_cnt); #ifdef CONFIG_USB_HCI DBG_871X("rx_urb_pending_cn=%d\n", ATOMIC_READ(&(precvpriv->rx_pending_cnt))); #endif } break; case 0x09: { int i, j; _list *plist, *phead; struct recv_reorder_ctrl *preorder_ctrl; #ifdef CONFIG_AP_MODE DBG_871X("sta_dz_bitmap=0x%x, tim_bitmap=0x%x\n", pstapriv->sta_dz_bitmap, pstapriv->tim_bitmap); #endif _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); for(i=0; i< NUM_STA; i++) { phead = &(pstapriv->sta_hash[i]); plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); plist = get_next(plist); if(extra_arg == psta->aid) { DBG_871X("sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr)); DBG_871X("rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self); DBG_871X("state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid); #ifdef CONFIG_80211N_HT DBG_871X("qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate); DBG_871X("bwmode=%d, ch_offset=%d, sgi_20m=%d,sgi_40m=%d\n", psta->bw_mode, psta->htpriv.ch_offset, psta->htpriv.sgi_20m, psta->htpriv.sgi_40m); DBG_871X("ampdu_enable = %d\n", psta->htpriv.ampdu_enable); DBG_871X("agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap); #endif //CONFIG_80211N_HT #ifdef CONFIG_AP_MODE DBG_871X("capability=0x%x\n", psta->capability); DBG_871X("flags=0x%x\n", psta->flags); DBG_871X("wpa_psk=0x%x\n", psta->wpa_psk); DBG_871X("wpa2_group_cipher=0x%x\n", psta->wpa2_group_cipher); DBG_871X("wpa2_pairwise_cipher=0x%x\n", psta->wpa2_pairwise_cipher); DBG_871X("qos_info=0x%x\n", psta->qos_info); #endif DBG_871X("dot118021XPrivacy=0x%x\n", psta->dot118021XPrivacy); for(j=0;j<16;j++) { preorder_ctrl = &psta->recvreorder_ctrl[j]; if(preorder_ctrl->enable) { DBG_871X("tid=%d, indicate_seq=%d\n", j, preorder_ctrl->indicate_seq); } } } } } _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); } break; case 0x0a: { int max_mac_id = 0; max_mac_id = rtw_search_max_mac_id( padapter); printk("%s ==> max_mac_id = %d \n",__FUNCTION__,max_mac_id); } break; case 0x0b: //Enable=1, Disable=0 driver control vrtl_carrier_sense. { //u8 driver_vcs_en; //Enable=1, Disable=0 driver control vrtl_carrier_sense. //u8 driver_vcs_type;//force 0:disable VCS, 1:RTS-CTS, 2:CTS-to-self when vcs_en=1. if(arg == 0){ DBG_871X("disable driver ctrl vcs\n"); padapter->driver_vcs_en = 0; } else if(arg == 1){ DBG_871X("enable driver ctrl vcs = %d\n", extra_arg); padapter->driver_vcs_en = 1; if(extra_arg>2) padapter->driver_vcs_type = 1; else padapter->driver_vcs_type = extra_arg; } } break; case 0x0c://dump rx/tx packet { if(arg == 0){ DBG_871X("dump rx packet (%d)\n",extra_arg); //pHalData->bDumpRxPkt =extra_arg; rtw_hal_set_def_var(padapter, HAL_DEF_DBG_DUMP_RXPKT, &(extra_arg)); } else if(arg==1){ DBG_871X("dump tx packet (%d)\n",extra_arg); rtw_hal_set_def_var(padapter, HAL_DEF_DBG_DUMP_TXPKT, &(extra_arg)); } } break; #if 0 case 0x0d://dump cam { //u8 entry = (u8) extra_arg; u8 entry=0; //dump cam for(entry=0;entry<32;entry++) read_cam(padapter,entry); } break; #endif case 0x0e: { if(arg == 0){ DBG_871X("disable driver ctrl rx_ampdu_factor\n"); padapter->driver_rx_ampdu_factor = 0xFF; } else if(arg == 1){ DBG_871X("enable driver ctrl rx_ampdu_factor = %d\n", extra_arg); if(extra_arg > 0x03) padapter->driver_rx_ampdu_factor = 0xFF; else padapter->driver_rx_ampdu_factor = extra_arg; } } break; #ifdef DBG_CONFIG_ERROR_DETECT case 0x0f: { if(extra_arg == 0){ DBG_871X("###### silent reset test.......#####\n"); rtw_hal_sreset_reset(padapter); } else { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct sreset_priv *psrtpriv = &pHalData->srestpriv; psrtpriv->dbg_trigger_point = extra_arg; } } break; case 0x15: { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); DBG_871X("==>silent resete cnts:%d\n",pwrpriv->ips_enter_cnts); } break; #endif case 0x10:// driver version display dump_drv_version(RTW_DBGDUMP); break; case 0x11://dump linked status { int pre_mode; pre_mode=padapter->bLinkInfoDump; // linked_info_dump(padapter,extra_arg); if(extra_arg==1 || (extra_arg==0 && pre_mode==1) ) //not consider pwr_saving 0: { padapter->bLinkInfoDump = extra_arg; } else if( (extra_arg==2 ) || (extra_arg==0 && pre_mode==2))//consider power_saving { //DBG_871X("linked_info_dump =%s \n", (padapter->bLinkInfoDump)?"enable":"disable") linked_info_dump(padapter,extra_arg); } } break; #ifdef CONFIG_80211N_HT case 0x12: //set rx_stbc { struct registry_priv *pregpriv = &padapter->registrypriv; // 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, 0x3: enable both 2.4g and 5g //default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ if( pregpriv && (extra_arg == 0 || extra_arg == 1|| extra_arg == 2 || extra_arg == 3)) { pregpriv->rx_stbc= extra_arg; DBG_871X("set rx_stbc=%d\n",pregpriv->rx_stbc); } else DBG_871X("get rx_stbc=%d\n",pregpriv->rx_stbc); } break; case 0x13: //set ampdu_enable { struct registry_priv *pregpriv = &padapter->registrypriv; // 0: disable, 0x1:enable (but wifi_spec should be 0), 0x2: force enable (don't care wifi_spec) if( pregpriv && extra_arg < 3 ) { pregpriv->ampdu_enable= extra_arg; DBG_871X("set ampdu_enable=%d\n",pregpriv->ampdu_enable); } else DBG_871X("get ampdu_enable=%d\n",pregpriv->ampdu_enable); } break; #endif case 0x14: //get wifi_spec { struct registry_priv *pregpriv = &padapter->registrypriv; DBG_871X("get wifi_spec=%d\n",pregpriv->wifi_spec); } break; case 0x16: { if(arg == 0xff){ rtw_odm_dbg_comp_msg(RTW_DBGDUMP,padapter); } else{ u64 dbg_comp = (u64)extra_arg; rtw_odm_dbg_comp_set(padapter, dbg_comp); } } break; #ifdef DBG_FIXED_CHAN case 0x17: { struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); printk("===> Fixed channel to %d \n",extra_arg); pmlmeext->fixed_chan = extra_arg; } break; #endif case 0x18: { printk("===> Switch USB Mode %d \n",extra_arg); rtw_hal_set_hwreg(padapter, HW_VAR_USB_MODE, (u8 *)&extra_arg); } break; #ifdef CONFIG_80211N_HT case 0x19: { struct registry_priv *pregistrypriv = &padapter->registrypriv; // extra_arg : // BIT0: Enable VHT LDPC Rx, BIT1: Enable VHT LDPC Tx, // BIT4: Enable HT LDPC Rx, BIT5: Enable HT LDPC Tx if(arg == 0){ DBG_871X("driver disable LDPC\n"); pregistrypriv->ldpc_cap = 0x00; } else if(arg == 1){ DBG_871X("driver set LDPC cap = 0x%x\n", extra_arg); pregistrypriv->ldpc_cap = (u8)(extra_arg&0x33); } } break; case 0x1a: { struct registry_priv *pregistrypriv = &padapter->registrypriv; // extra_arg : // BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx, // BIT4: Enable HT STBC Rx, BIT5: Enable HT STBC Tx if(arg == 0){ DBG_871X("driver disable STBC\n"); pregistrypriv->stbc_cap = 0x00; } else if(arg == 1){ DBG_871X("driver set STBC cap = 0x%x\n", extra_arg); pregistrypriv->stbc_cap = (u8)(extra_arg&0x33); } } break; #endif //CONFIG_80211N_HT case 0x1b: { struct registry_priv *pregistrypriv = &padapter->registrypriv; if(arg == 0){ DBG_871X("disable driver ctrl max_rx_rate, reset to default_rate_set\n"); init_mlme_default_rate_set(padapter); #ifdef CONFIG_80211N_HT pregistrypriv->ht_enable = (u8)rtw_ht_enable; #endif //CONFIG_80211N_HT } else if(arg == 1){ int i; u8 max_rx_rate; DBG_871X("enable driver ctrl max_rx_rate = 0x%x\n", extra_arg); max_rx_rate = (u8)extra_arg; if(max_rx_rate < 0xc) // max_rx_rate < MSC0 -> B or G -> disable HT { #ifdef CONFIG_80211N_HT pregistrypriv->ht_enable = 0; #endif //CONFIG_80211N_HT for(i=0; idatarate[i] > max_rx_rate) pmlmeext->datarate[i] = 0xff; } } #ifdef CONFIG_80211N_HT else if(max_rx_rate < 0x1c) // mcs0~mcs15 { u32 mcs_bitmap=0x0; for(i=0; i<((max_rx_rate+1)-0xc); i++) mcs_bitmap |= BIT(i); set_mcs_rate_by_mask(pmlmeext->default_supported_mcs_set, mcs_bitmap); } #endif //CONFIG_80211N_HT } } break; case 0x1c: //enable/disable driver control AMPDU Density for peer sta's rx { if(arg == 0){ DBG_871X("disable driver ctrl ampdu density\n"); padapter->driver_ampdu_spacing = 0xFF; } else if(arg == 1){ DBG_871X("enable driver ctrl ampdu density = %d\n", extra_arg); if(extra_arg > 0x07) padapter->driver_ampdu_spacing = 0xFF; else padapter->driver_ampdu_spacing = extra_arg; } } break; #ifdef CONFIG_BACKGROUND_NOISE_MONITOR case 0x1e: { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); PDM_ODM_T pDM_Odm = &pHalData->odmpriv; u8 chan = rtw_get_oper_ch(padapter); DBG_871X("===========================================\n"); ODM_InbandNoise_Monitor(pDM_Odm,_TRUE,0x1e,100); DBG_871X("channel(%d),noise_a = %d, noise_b = %d , noise_all:%d \n", chan,pDM_Odm->noise_level.noise[ODM_RF_PATH_A], pDM_Odm->noise_level.noise[ODM_RF_PATH_B], pDM_Odm->noise_level.noise_all); DBG_871X("===========================================\n"); } break; #endif case 0x23: { DBG_871X("turn %s the bNotifyChannelChange Variable\n",(extra_arg==1)?"on":"off"); padapter->bNotifyChannelChange = extra_arg; break; } case 0x24: { #ifdef CONFIG_P2P DBG_871X("turn %s the bShowGetP2PState Variable\n",(extra_arg==1)?"on":"off"); padapter->bShowGetP2PState = extra_arg; #endif // CONFIG_P2P break; } #ifdef CONFIG_GPIO_API case 0x25: //Get GPIO register { /* * dbg 0x7f250000 [gpio_num], Get gpio value, gpio_num:0~7 */ u8 value; DBG_871X("Read GPIO Value extra_arg = %d\n",extra_arg); value = rtw_hal_get_gpio(padapter,extra_arg); DBG_871X("Read GPIO Value = %d\n",value); break; } case 0x26: //Set GPIO direction { /* dbg 0x7f26000x [y], Set gpio direction, * x: gpio_num,4~7 y: indicate direction, 0~1 */ int value; DBG_871X("Set GPIO Direction! arg = %d ,extra_arg=%d\n",arg ,extra_arg); value = rtw_hal_config_gpio(padapter, arg, extra_arg); DBG_871X("Set GPIO Direction %s \n",(value==-1)?"Fail!!!":"Success"); break; } case 0x27: //Set GPIO output direction value { /* * dbg 0x7f27000x [y], Set gpio output direction value, * x: gpio_num,4~7 y: indicate direction, 0~1 */ int value; DBG_871X("Set GPIO Value! arg = %d ,extra_arg=%d\n",arg ,extra_arg); value = rtw_hal_set_gpio_output_value(padapter,arg,extra_arg); DBG_871X("Set GPIO Value %s \n",(value==-1)?"Fail!!!":"Success"); break; } #endif #ifdef DBG_CMD_QUEUE case 0x28: { dump_cmd_id = extra_arg; DBG_871X("dump_cmd_id:%d\n",dump_cmd_id); } break; #endif //DBG_CMD_QUEUE case 0xaa: { if((extra_arg & 0x7F)> 0x3F) extra_arg = 0xFF; DBG_871X("chang data rate to :0x%02x\n",extra_arg); padapter->fix_rate = extra_arg; } break; case 0xdd://registers dump , 0 for mac reg,1 for bb reg, 2 for rf reg { if(extra_arg==0){ mac_reg_dump(RTW_DBGDUMP, padapter); } else if(extra_arg==1){ bb_reg_dump(RTW_DBGDUMP, padapter); } else if(extra_arg==2){ rf_reg_dump(RTW_DBGDUMP, padapter); } } break; case 0xee://turn on/off dynamic funcs { u32 odm_flag; if(0xf==extra_arg){ rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DM_FUNC,&odm_flag); DBG_871X(" === DMFlag(0x%08x) === \n",odm_flag); DBG_871X("extra_arg = 0 - disable all dynamic func \n"); DBG_871X("extra_arg = 1 - disable DIG- BIT(0)\n"); DBG_871X("extra_arg = 2 - disable High power - BIT(1)\n"); DBG_871X("extra_arg = 3 - disable tx power tracking - BIT(2)\n"); DBG_871X("extra_arg = 4 - disable BT coexistence - BIT(3)\n"); DBG_871X("extra_arg = 5 - disable antenna diversity - BIT(4)\n"); DBG_871X("extra_arg = 6 - enable all dynamic func \n"); } else{ /* extra_arg = 0 - disable all dynamic func extra_arg = 1 - disable DIG extra_arg = 2 - disable tx power tracking extra_arg = 3 - turn on all dynamic func */ rtw_hal_set_def_var(padapter, HAL_DEF_DBG_DM_FUNC, &(extra_arg)); rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DM_FUNC,&odm_flag); DBG_871X(" === DMFlag(0x%08x) === \n",odm_flag); } } break; case 0xfd: rtw_write8(padapter, 0xc50, arg); DBG_871X("wr(0xc50)=0x%x\n", rtw_read8(padapter, 0xc50)); rtw_write8(padapter, 0xc58, arg); DBG_871X("wr(0xc58)=0x%x\n", rtw_read8(padapter, 0xc58)); break; case 0xfe: DBG_871X("rd(0xc50)=0x%x\n", rtw_read8(padapter, 0xc50)); DBG_871X("rd(0xc58)=0x%x\n", rtw_read8(padapter, 0xc58)); break; case 0xff: { DBG_871X("dbg(0x210)=0x%x\n", rtw_read32(padapter, 0x210)); DBG_871X("dbg(0x608)=0x%x\n", rtw_read32(padapter, 0x608)); DBG_871X("dbg(0x280)=0x%x\n", rtw_read32(padapter, 0x280)); DBG_871X("dbg(0x284)=0x%x\n", rtw_read32(padapter, 0x284)); DBG_871X("dbg(0x288)=0x%x\n", rtw_read32(padapter, 0x288)); DBG_871X("dbg(0x664)=0x%x\n", rtw_read32(padapter, 0x664)); DBG_871X("\n"); DBG_871X("dbg(0x430)=0x%x\n", rtw_read32(padapter, 0x430)); DBG_871X("dbg(0x438)=0x%x\n", rtw_read32(padapter, 0x438)); DBG_871X("dbg(0x440)=0x%x\n", rtw_read32(padapter, 0x440)); DBG_871X("dbg(0x458)=0x%x\n", rtw_read32(padapter, 0x458)); DBG_871X("dbg(0x484)=0x%x\n", rtw_read32(padapter, 0x484)); DBG_871X("dbg(0x488)=0x%x\n", rtw_read32(padapter, 0x488)); DBG_871X("dbg(0x444)=0x%x\n", rtw_read32(padapter, 0x444)); DBG_871X("dbg(0x448)=0x%x\n", rtw_read32(padapter, 0x448)); DBG_871X("dbg(0x44c)=0x%x\n", rtw_read32(padapter, 0x44c)); DBG_871X("dbg(0x450)=0x%x\n", rtw_read32(padapter, 0x450)); } break; } break; default: DBG_871X("error dbg cmd!\n"); break; } return ret; } static int wpa_set_param(struct net_device *dev, u8 name, u32 value) { uint ret=0; u32 flags; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); switch (name){ case IEEE_PARAM_WPA_ENABLED: padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; //802.1x //ret = ieee80211_wpa_enable(ieee, value); switch((value)&0xff) { case 1 : //WPA padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeWPAPSK; //WPA_PSK padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; break; case 2: //WPA2 padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeWPA2PSK; //WPA2_PSK padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; break; } RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("wpa_set_param:padapter->securitypriv.ndisauthtype=%d\n", padapter->securitypriv.ndisauthtype)); break; case IEEE_PARAM_TKIP_COUNTERMEASURES: //ieee->tkip_countermeasures=value; break; case IEEE_PARAM_DROP_UNENCRYPTED: { /* HACK: * * wpa_supplicant calls set_wpa_enabled when the driver * is loaded and unloaded, regardless of if WPA is being * used. No other calls are made which can be used to * determine if encryption will be used or not prior to * association being expected. If encryption is not being * used, drop_unencrypted is set to false, else true -- we * can use this to determine if the CAP_PRIVACY_ON bit should * be set. */ #if 0 struct ieee80211_security sec = { .flags = SEC_ENABLED, .enabled = value, }; ieee->drop_unencrypted = value; /* We only change SEC_LEVEL for open mode. Others * are set by ipw_wpa_set_encryption. */ if (!value) { sec.flags |= SEC_LEVEL; sec.level = SEC_LEVEL_0; } else { sec.flags |= SEC_LEVEL; sec.level = SEC_LEVEL_1; } if (ieee->set_security) ieee->set_security(ieee->dev, &sec); #endif break; } case IEEE_PARAM_PRIVACY_INVOKED: //ieee->privacy_invoked=value; break; case IEEE_PARAM_AUTH_ALGS: ret = wpa_set_auth_algs(dev, value); break; case IEEE_PARAM_IEEE_802_1X: //ieee->ieee802_1x=value; break; case IEEE_PARAM_WPAX_SELECT: // added for WPA2 mixed mode //DBG_871X(KERN_WARNING "------------------------>wpax value = %x\n", value); /* spin_lock_irqsave(&ieee->wpax_suitlist_lock,flags); ieee->wpax_type_set = 1; ieee->wpax_type_notify = value; spin_unlock_irqrestore(&ieee->wpax_suitlist_lock,flags); */ break; default: ret = -EOPNOTSUPP; break; } return ret; } static int wpa_mlme(struct net_device *dev, u32 command, u32 reason) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); switch (command) { case IEEE_MLME_STA_DEAUTH: if(!rtw_set_802_11_disassociate(padapter)) ret = -1; break; case IEEE_MLME_STA_DISASSOC: if(!rtw_set_802_11_disassociate(padapter)) ret = -1; break; default: ret = -EOPNOTSUPP; break; } return ret; } static int wpa_supplicant_ioctl(struct net_device *dev, struct iw_point *p) { struct ieee_param *param; uint ret=0; //down(&ieee->wx_sem); if (p->length < sizeof(struct ieee_param) || !p->pointer){ ret = -EINVAL; goto out; } param = (struct ieee_param *)rtw_malloc(p->length); if (param == NULL) { ret = -ENOMEM; goto out; } if (copy_from_user(param, p->pointer, p->length)) { rtw_mfree((u8*)param, p->length); ret = -EFAULT; goto out; } switch (param->cmd) { case IEEE_CMD_SET_WPA_PARAM: ret = wpa_set_param(dev, param->u.wpa_param.name, param->u.wpa_param.value); break; case IEEE_CMD_SET_WPA_IE: //ret = wpa_set_wpa_ie(dev, param, p->length); ret = rtw_set_wpa_ie((_adapter *)rtw_netdev_priv(dev), (char*)param->u.wpa_ie.data, (u16)param->u.wpa_ie.len); break; case IEEE_CMD_SET_ENCRYPTION: ret = wpa_set_encryption(dev, param, p->length); break; case IEEE_CMD_MLME: ret = wpa_mlme(dev, param->u.mlme.command, param->u.mlme.reason_code); break; default: DBG_871X("Unknown WPA supplicant request: %d\n", param->cmd); ret = -EOPNOTSUPP; break; } if (ret == 0 && copy_to_user(p->pointer, param, p->length)) ret = -EFAULT; rtw_mfree((u8 *)param, p->length); out: //up(&ieee->wx_sem); return ret; } #ifdef CONFIG_AP_MODE static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) { int ret = 0; u32 wep_key_idx, wep_key_len,wep_total_len; NDIS_802_11_WEP *pwep = NULL; struct sta_info *psta = NULL, *pbcmc_sta = NULL; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv* psecuritypriv=&(padapter->securitypriv); struct sta_priv *pstapriv = &padapter->stapriv; DBG_871X("%s\n", __FUNCTION__); param->u.crypt.err = 0; param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; //sizeof(struct ieee_param) = 64 bytes; //if (param_len != (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) if (param_len != sizeof(struct ieee_param) + param->u.crypt.key_len) { ret = -EINVAL; goto exit; } if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) { if (param->u.crypt.idx >= WEP_KEYS) { ret = -EINVAL; goto exit; } } else { psta = rtw_get_stainfo(pstapriv, param->sta_addr); if(!psta) { //ret = -EINVAL; DBG_871X("rtw_set_encryption(), sta has already been removed or never been added\n"); goto exit; } } if (strcmp(param->u.crypt.alg, "none") == 0 && (psta==NULL)) { //todo:clear default encryption keys psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled; psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; DBG_871X("clear default encryption keys, keyid=%d\n", param->u.crypt.idx); goto exit; } if (strcmp(param->u.crypt.alg, "WEP") == 0 && (psta==NULL)) { DBG_871X("r871x_set_encryption, crypt.alg = WEP\n"); wep_key_idx = param->u.crypt.idx; wep_key_len = param->u.crypt.key_len; DBG_871X("r871x_set_encryption, wep_key_idx=%d, len=%d\n", wep_key_idx, wep_key_len); if((wep_key_idx >= WEP_KEYS) || (wep_key_len<=0)) { ret = -EINVAL; goto exit; } if (wep_key_len > 0) { wep_key_len = wep_key_len <= 5 ? 5 : 13; wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); pwep =(NDIS_802_11_WEP *)rtw_malloc(wep_total_len); if(pwep == NULL){ DBG_871X(" r871x_set_encryption: pwep allocate fail !!!\n"); goto exit; } _rtw_memset(pwep, 0, wep_total_len); pwep->KeyLength = wep_key_len; pwep->Length = wep_total_len; } pwep->KeyIndex = wep_key_idx; _rtw_memcpy(pwep->KeyMaterial, param->u.crypt.key, pwep->KeyLength); if(param->u.crypt.set_tx) { DBG_871X("wep, set_tx=1\n"); psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; psecuritypriv->dot11PrivacyAlgrthm=_WEP40_; psecuritypriv->dot118021XGrpPrivacy=_WEP40_; if(pwep->KeyLength==13) { psecuritypriv->dot11PrivacyAlgrthm=_WEP104_; psecuritypriv->dot118021XGrpPrivacy=_WEP104_; } psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); psecuritypriv->dot11DefKeylen[wep_key_idx]=pwep->KeyLength; rtw_ap_set_wep_key(padapter, pwep->KeyMaterial, pwep->KeyLength, wep_key_idx, 1); } else { DBG_871X("wep, set_tx=0\n"); //don't update "psecuritypriv->dot11PrivacyAlgrthm" and //"psecuritypriv->dot11PrivacyKeyIndex=keyid", but can rtw_set_key to cam _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); psecuritypriv->dot11DefKeylen[wep_key_idx] = pwep->KeyLength; rtw_ap_set_wep_key(padapter, pwep->KeyMaterial, pwep->KeyLength, wep_key_idx, 0); } goto exit; } if(!psta && check_fwstate(pmlmepriv, WIFI_AP_STATE)) // //group key { if(param->u.crypt.set_tx ==1) { if(strcmp(param->u.crypt.alg, "WEP") == 0) { DBG_871X("%s, set group_key, WEP\n", __FUNCTION__); _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); psecuritypriv->dot118021XGrpPrivacy = _WEP40_; if(param->u.crypt.key_len==13) { psecuritypriv->dot118021XGrpPrivacy = _WEP104_; } } else if(strcmp(param->u.crypt.alg, "TKIP") == 0) { DBG_871X("%s, set group_key, TKIP\n", __FUNCTION__); psecuritypriv->dot118021XGrpPrivacy = _TKIP_; _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); //set mic key _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); psecuritypriv->busetkipkey = _TRUE; } else if(strcmp(param->u.crypt.alg, "CCMP") == 0) { DBG_871X("%s, set group_key, CCMP\n", __FUNCTION__); psecuritypriv->dot118021XGrpPrivacy = _AES_; _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); } else { DBG_871X("%s, set group_key, none\n", __FUNCTION__); psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; } psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; psecuritypriv->binstallGrpkey = _TRUE; psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! rtw_ap_set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); pbcmc_sta=rtw_get_bcmc_stainfo(padapter); if(pbcmc_sta) { pbcmc_sta->ieee8021x_blocked = _FALSE; pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy } } goto exit; } if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) // psk/802_1x { if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { if(param->u.crypt.set_tx ==1) { _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); if(strcmp(param->u.crypt.alg, "WEP") == 0) { DBG_871X("%s, set pairwise key, WEP\n", __FUNCTION__); psta->dot118021XPrivacy = _WEP40_; if(param->u.crypt.key_len==13) { psta->dot118021XPrivacy = _WEP104_; } } else if(strcmp(param->u.crypt.alg, "TKIP") == 0) { DBG_871X("%s, set pairwise key, TKIP\n", __FUNCTION__); psta->dot118021XPrivacy = _TKIP_; //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); //set mic key _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); psecuritypriv->busetkipkey = _TRUE; } else if(strcmp(param->u.crypt.alg, "CCMP") == 0) { DBG_871X("%s, set pairwise key, CCMP\n", __FUNCTION__); psta->dot118021XPrivacy = _AES_; } else { DBG_871X("%s, set pairwise key, none\n", __FUNCTION__); psta->dot118021XPrivacy = _NO_PRIVACY_; } rtw_ap_set_pairwise_key(padapter, psta); psta->ieee8021x_blocked = _FALSE; } else//group key??? { if(strcmp(param->u.crypt.alg, "WEP") == 0) { _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); psecuritypriv->dot118021XGrpPrivacy = _WEP40_; if(param->u.crypt.key_len==13) { psecuritypriv->dot118021XGrpPrivacy = _WEP104_; } } else if(strcmp(param->u.crypt.alg, "TKIP") == 0) { psecuritypriv->dot118021XGrpPrivacy = _TKIP_; _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); //set mic key _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); psecuritypriv->busetkipkey = _TRUE; } else if(strcmp(param->u.crypt.alg, "CCMP") == 0) { psecuritypriv->dot118021XGrpPrivacy = _AES_; _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); } else { psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; } psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; psecuritypriv->binstallGrpkey = _TRUE; psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! rtw_ap_set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); pbcmc_sta=rtw_get_bcmc_stainfo(padapter); if(pbcmc_sta) { pbcmc_sta->ieee8021x_blocked = _FALSE; pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy } } } } exit: if(pwep) { rtw_mfree((u8 *)pwep, wep_total_len); } return ret; } static int rtw_set_beacon(struct net_device *dev, struct ieee_param *param, int len) { int ret=0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct sta_priv *pstapriv = &padapter->stapriv; unsigned char *pbuf = param->u.bcn_ie.buf; DBG_871X("%s, len=%d\n", __FUNCTION__, len); if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) return -EINVAL; _rtw_memcpy(&pstapriv->max_num_sta, param->u.bcn_ie.reserved, 2); if((pstapriv->max_num_sta>NUM_STA) || (pstapriv->max_num_sta<=0)) pstapriv->max_num_sta = NUM_STA; if(rtw_check_beacon_data(padapter, pbuf, (len-12-2)) == _SUCCESS)// 12 = param header, 2:no packed ret = 0; else ret = -EINVAL; return ret; } static int rtw_hostapd_sta_flush(struct net_device *dev) { //_irqL irqL; //_list *phead, *plist; int ret=0; //struct sta_info *psta = NULL; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); //struct sta_priv *pstapriv = &padapter->stapriv; DBG_871X("%s\n", __FUNCTION__); flush_all_cam_entry(padapter); //clear CAM ret = rtw_sta_flush(padapter); return ret; } static int rtw_add_sta(struct net_device *dev, struct ieee_param *param) { _irqL irqL; int ret=0; struct sta_info *psta = NULL; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct sta_priv *pstapriv = &padapter->stapriv; DBG_871X("rtw_add_sta(aid=%d)=" MAC_FMT "\n", param->u.add_sta.aid, MAC_ARG(param->sta_addr)); if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) { return -EINVAL; } if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) { return -EINVAL; } /* psta = rtw_get_stainfo(pstapriv, param->sta_addr); if(psta) { DBG_871X("rtw_add_sta(), free has been added psta=%p\n", psta); //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); rtw_free_stainfo(padapter, psta); //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); psta = NULL; } */ //psta = rtw_alloc_stainfo(pstapriv, param->sta_addr); psta = rtw_get_stainfo(pstapriv, param->sta_addr); if(psta) { int flags = param->u.add_sta.flags; //DBG_871X("rtw_add_sta(), init sta's variables, psta=%p\n", psta); psta->aid = param->u.add_sta.aid;//aid=1~2007 _rtw_memcpy(psta->bssrateset, param->u.add_sta.tx_supp_rates, 16); //check wmm cap. if(WLAN_STA_WME&flags) psta->qos_option = 1; else psta->qos_option = 0; if(pmlmepriv->qospriv.qos_option == 0) psta->qos_option = 0; #ifdef CONFIG_80211N_HT //chec 802.11n ht cap. if(WLAN_STA_HT&flags) { psta->htpriv.ht_option = _TRUE; psta->qos_option = 1; _rtw_memcpy((void*)&psta->htpriv.ht_cap, (void*)¶m->u.add_sta.ht_cap, sizeof(struct rtw_ieee80211_ht_cap)); } else { psta->htpriv.ht_option = _FALSE; } if(pmlmepriv->htpriv.ht_option == _FALSE) psta->htpriv.ht_option = _FALSE; #endif update_sta_info_apmode(padapter, psta); } else { ret = -ENOMEM; } return ret; } static int rtw_del_sta(struct net_device *dev, struct ieee_param *param) { _irqL irqL; int ret=0; struct sta_info *psta = NULL; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct sta_priv *pstapriv = &padapter->stapriv; DBG_871X("rtw_del_sta=" MAC_FMT "\n", MAC_ARG(param->sta_addr)); if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) { return -EINVAL; } if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) { return -EINVAL; } psta = rtw_get_stainfo(pstapriv, param->sta_addr); if(psta) { u8 updated=_FALSE; //DBG_871X("free psta=%p, aid=%d\n", psta, psta->aid); _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); if(rtw_is_list_empty(&psta->asoc_list)==_FALSE) { rtw_list_delete(&psta->asoc_list); pstapriv->asoc_list_cnt--; updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING); } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); associated_clients_update(padapter, updated); psta = NULL; } else { DBG_871X("rtw_del_sta(), sta has already been removed or never been added\n"); //ret = -1; } return ret; } static int rtw_ioctl_get_sta_data(struct net_device *dev, struct ieee_param *param, int len) { int ret=0; struct sta_info *psta = NULL; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct sta_priv *pstapriv = &padapter->stapriv; struct ieee_param_ex *param_ex = (struct ieee_param_ex *)param; struct sta_data *psta_data = (struct sta_data *)param_ex->data; DBG_871X("rtw_ioctl_get_sta_info, sta_addr: " MAC_FMT "\n", MAC_ARG(param_ex->sta_addr)); if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) { return -EINVAL; } if (param_ex->sta_addr[0] == 0xff && param_ex->sta_addr[1] == 0xff && param_ex->sta_addr[2] == 0xff && param_ex->sta_addr[3] == 0xff && param_ex->sta_addr[4] == 0xff && param_ex->sta_addr[5] == 0xff) { return -EINVAL; } psta = rtw_get_stainfo(pstapriv, param_ex->sta_addr); if(psta) { #if 0 struct { u16 aid; u16 capability; int flags; u32 sta_set; u8 tx_supp_rates[16]; u32 tx_supp_rates_len; struct rtw_ieee80211_ht_cap ht_cap; u64 rx_pkts; u64 rx_bytes; u64 rx_drops; u64 tx_pkts; u64 tx_bytes; u64 tx_drops; } get_sta; #endif psta_data->aid = (u16)psta->aid; psta_data->capability = psta->capability; psta_data->flags = psta->flags; /* nonerp_set : BIT(0) no_short_slot_time_set : BIT(1) no_short_preamble_set : BIT(2) no_ht_gf_set : BIT(3) no_ht_set : BIT(4) ht_20mhz_set : BIT(5) */ psta_data->sta_set =((psta->nonerp_set) | (psta->no_short_slot_time_set <<1) | (psta->no_short_preamble_set <<2) | (psta->no_ht_gf_set <<3) | (psta->no_ht_set <<4) | (psta->ht_20mhz_set <<5)); psta_data->tx_supp_rates_len = psta->bssratelen; _rtw_memcpy(psta_data->tx_supp_rates, psta->bssrateset, psta->bssratelen); #ifdef CONFIG_80211N_HT _rtw_memcpy(&psta_data->ht_cap, &psta->htpriv.ht_cap, sizeof(struct rtw_ieee80211_ht_cap)); #endif //CONFIG_80211N_HT psta_data->rx_pkts = psta->sta_stats.rx_data_pkts; psta_data->rx_bytes = psta->sta_stats.rx_bytes; psta_data->rx_drops = psta->sta_stats.rx_drops; psta_data->tx_pkts = psta->sta_stats.tx_pkts; psta_data->tx_bytes = psta->sta_stats.tx_bytes; psta_data->tx_drops = psta->sta_stats.tx_drops; } else { ret = -1; } return ret; } static int rtw_get_sta_wpaie(struct net_device *dev, struct ieee_param *param) { int ret=0; struct sta_info *psta = NULL; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct sta_priv *pstapriv = &padapter->stapriv; DBG_871X("rtw_get_sta_wpaie, sta_addr: " MAC_FMT "\n", MAC_ARG(param->sta_addr)); if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) { return -EINVAL; } if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) { return -EINVAL; } psta = rtw_get_stainfo(pstapriv, param->sta_addr); if(psta) { if((psta->wpa_ie[0] == WLAN_EID_RSN) || (psta->wpa_ie[0] == WLAN_EID_GENERIC)) { int wpa_ie_len; int copy_len; wpa_ie_len = psta->wpa_ie[1]; copy_len = ((wpa_ie_len+2) > sizeof(psta->wpa_ie)) ? (sizeof(psta->wpa_ie)):(wpa_ie_len+2); param->u.wpa_ie.len = copy_len; _rtw_memcpy(param->u.wpa_ie.reserved, psta->wpa_ie, copy_len); } else { //ret = -1; DBG_871X("sta's wpa_ie is NONE\n"); } } else { ret = -1; } return ret; } static int rtw_set_wps_beacon(struct net_device *dev, struct ieee_param *param, int len) { int ret=0; unsigned char wps_oui[4]={0x0,0x50,0xf2,0x04}; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); int ie_len; DBG_871X("%s, len=%d\n", __FUNCTION__, len); if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) return -EINVAL; ie_len = len-12-2;// 12 = param header, 2:no packed if(pmlmepriv->wps_beacon_ie) { rtw_mfree(pmlmepriv->wps_beacon_ie, pmlmepriv->wps_beacon_ie_len); pmlmepriv->wps_beacon_ie = NULL; } if(ie_len>0) { pmlmepriv->wps_beacon_ie = rtw_malloc(ie_len); pmlmepriv->wps_beacon_ie_len = ie_len; if ( pmlmepriv->wps_beacon_ie == NULL) { DBG_871X("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } _rtw_memcpy(pmlmepriv->wps_beacon_ie, param->u.bcn_ie.buf, ie_len); update_beacon(padapter, _VENDOR_SPECIFIC_IE_, wps_oui, _TRUE); pmlmeext->bstart_bss = _TRUE; } return ret; } static int rtw_set_wps_probe_resp(struct net_device *dev, struct ieee_param *param, int len) { int ret=0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); int ie_len; DBG_871X("%s, len=%d\n", __FUNCTION__, len); if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) return -EINVAL; ie_len = len-12-2;// 12 = param header, 2:no packed if(pmlmepriv->wps_probe_resp_ie) { rtw_mfree(pmlmepriv->wps_probe_resp_ie, pmlmepriv->wps_probe_resp_ie_len); pmlmepriv->wps_probe_resp_ie = NULL; } if(ie_len>0) { pmlmepriv->wps_probe_resp_ie = rtw_malloc(ie_len); pmlmepriv->wps_probe_resp_ie_len = ie_len; if ( pmlmepriv->wps_probe_resp_ie == NULL) { DBG_871X("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } _rtw_memcpy(pmlmepriv->wps_probe_resp_ie, param->u.bcn_ie.buf, ie_len); } return ret; } static int rtw_set_wps_assoc_resp(struct net_device *dev, struct ieee_param *param, int len) { int ret=0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); int ie_len; DBG_871X("%s, len=%d\n", __FUNCTION__, len); if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) return -EINVAL; ie_len = len-12-2;// 12 = param header, 2:no packed if(pmlmepriv->wps_assoc_resp_ie) { rtw_mfree(pmlmepriv->wps_assoc_resp_ie, pmlmepriv->wps_assoc_resp_ie_len); pmlmepriv->wps_assoc_resp_ie = NULL; } if(ie_len>0) { pmlmepriv->wps_assoc_resp_ie = rtw_malloc(ie_len); pmlmepriv->wps_assoc_resp_ie_len = ie_len; if ( pmlmepriv->wps_assoc_resp_ie == NULL) { DBG_871X("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); return -EINVAL; } _rtw_memcpy(pmlmepriv->wps_assoc_resp_ie, param->u.bcn_ie.buf, ie_len); } return ret; } static int rtw_set_hidden_ssid(struct net_device *dev, struct ieee_param *param, int len) { int ret=0; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *mlmepriv = &(adapter->mlmepriv); struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv); struct mlme_ext_info *mlmeinfo = &(mlmeext->mlmext_info); int ie_len; u8 *ssid_ie; char ssid[NDIS_802_11_LENGTH_SSID + 1]; sint ssid_len; u8 ignore_broadcast_ssid; if(check_fwstate(mlmepriv, WIFI_AP_STATE) != _TRUE) return -EPERM; if (param->u.bcn_ie.reserved[0] != 0xea) return -EINVAL; mlmeinfo->hidden_ssid_mode = ignore_broadcast_ssid = param->u.bcn_ie.reserved[1]; ie_len = len-12-2;// 12 = param header, 2:no packed ssid_ie = rtw_get_ie(param->u.bcn_ie.buf, WLAN_EID_SSID, &ssid_len, ie_len); if (ssid_ie && ssid_len > 0 && ssid_len <= NDIS_802_11_LENGTH_SSID) { WLAN_BSSID_EX *pbss_network = &mlmepriv->cur_network.network; WLAN_BSSID_EX *pbss_network_ext = &mlmeinfo->network; _rtw_memcpy(ssid, ssid_ie+2, ssid_len); ssid[ssid_len] = 0x0; if(0) DBG_871X(FUNC_ADPT_FMT" ssid:(%s,%d), from ie:(%s,%d), (%s,%d)\n", FUNC_ADPT_ARG(adapter), ssid, ssid_len, pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength, pbss_network_ext->Ssid.Ssid, pbss_network_ext->Ssid.SsidLength); _rtw_memcpy(pbss_network->Ssid.Ssid, (void *)ssid, ssid_len); pbss_network->Ssid.SsidLength = ssid_len; _rtw_memcpy(pbss_network_ext->Ssid.Ssid, (void *)ssid, ssid_len); pbss_network_ext->Ssid.SsidLength = ssid_len; if(0) DBG_871X(FUNC_ADPT_FMT" after ssid:(%s,%d), (%s,%d)\n", FUNC_ADPT_ARG(adapter), pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength, pbss_network_ext->Ssid.Ssid, pbss_network_ext->Ssid.SsidLength); } DBG_871X(FUNC_ADPT_FMT" ignore_broadcast_ssid:%d, %s,%d\n", FUNC_ADPT_ARG(adapter), ignore_broadcast_ssid, ssid, ssid_len); return ret; } static int rtw_ioctl_acl_remove_sta(struct net_device *dev, struct ieee_param *param, int len) { int ret=0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) return -EINVAL; if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) { return -EINVAL; } ret = rtw_acl_remove_sta(padapter, param->sta_addr); return ret; } static int rtw_ioctl_acl_add_sta(struct net_device *dev, struct ieee_param *param, int len) { int ret=0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) return -EINVAL; if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) { return -EINVAL; } ret = rtw_acl_add_sta(padapter, param->sta_addr); return ret; } static int rtw_ioctl_set_macaddr_acl(struct net_device *dev, struct ieee_param *param, int len) { int ret=0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) return -EINVAL; rtw_set_macaddr_acl(padapter, param->u.mlme.command); return ret; } static int rtw_hostapd_ioctl(struct net_device *dev, struct iw_point *p) { struct ieee_param *param; int ret=0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); //DBG_871X("%s\n", __FUNCTION__); /* * this function is expect to call in master mode, which allows no power saving * so, we just check hw_init_completed */ if (padapter->hw_init_completed==_FALSE){ ret = -EPERM; goto out; } //if (p->length < sizeof(struct ieee_param) || !p->pointer){ if(!p->pointer){ ret = -EINVAL; goto out; } param = (struct ieee_param *)rtw_malloc(p->length); if (param == NULL) { ret = -ENOMEM; goto out; } if (copy_from_user(param, p->pointer, p->length)) { rtw_mfree((u8*)param, p->length); ret = -EFAULT; goto out; } //DBG_871X("%s, cmd=%d\n", __FUNCTION__, param->cmd); switch (param->cmd) { case RTL871X_HOSTAPD_FLUSH: ret = rtw_hostapd_sta_flush(dev); break; case RTL871X_HOSTAPD_ADD_STA: ret = rtw_add_sta(dev, param); break; case RTL871X_HOSTAPD_REMOVE_STA: ret = rtw_del_sta(dev, param); break; case RTL871X_HOSTAPD_SET_BEACON: ret = rtw_set_beacon(dev, param, p->length); break; case RTL871X_SET_ENCRYPTION: ret = rtw_set_encryption(dev, param, p->length); break; case RTL871X_HOSTAPD_GET_WPAIE_STA: ret = rtw_get_sta_wpaie(dev, param); break; case RTL871X_HOSTAPD_SET_WPS_BEACON: ret = rtw_set_wps_beacon(dev, param, p->length); break; case RTL871X_HOSTAPD_SET_WPS_PROBE_RESP: ret = rtw_set_wps_probe_resp(dev, param, p->length); break; case RTL871X_HOSTAPD_SET_WPS_ASSOC_RESP: ret = rtw_set_wps_assoc_resp(dev, param, p->length); break; case RTL871X_HOSTAPD_SET_HIDDEN_SSID: ret = rtw_set_hidden_ssid(dev, param, p->length); break; case RTL871X_HOSTAPD_GET_INFO_STA: ret = rtw_ioctl_get_sta_data(dev, param, p->length); break; case RTL871X_HOSTAPD_SET_MACADDR_ACL: ret = rtw_ioctl_set_macaddr_acl(dev, param, p->length); break; case RTL871X_HOSTAPD_ACL_ADD_STA: ret = rtw_ioctl_acl_add_sta(dev, param, p->length); break; case RTL871X_HOSTAPD_ACL_REMOVE_STA: ret = rtw_ioctl_acl_remove_sta(dev, param, p->length); break; default: DBG_871X("Unknown hostapd request: %d\n", param->cmd); ret = -EOPNOTSUPP; break; } if (ret == 0 && copy_to_user(p->pointer, param, p->length)) ret = -EFAULT; rtw_mfree((u8 *)param, p->length); out: return ret; } #endif static int rtw_wx_set_priv(struct net_device *dev, struct iw_request_info *info, union iwreq_data *awrq, char *extra) { #ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV char *ext_dbg; #endif int ret = 0; int len = 0; char *ext; int i; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_point *dwrq = (struct iw_point*)awrq; //RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_notice_, ("+rtw_wx_set_priv\n")); if(dwrq->length == 0) return -EFAULT; len = dwrq->length; if (!(ext = rtw_vmalloc(len))) return -ENOMEM; if (copy_from_user(ext, dwrq->pointer, len)) { rtw_vmfree(ext, len); return -EFAULT; } //RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_notice_, // ("rtw_wx_set_priv: %s req=%s\n", // dev->name, ext)); #ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV if (!(ext_dbg = rtw_vmalloc(len))) { rtw_vmfree(ext, len); return -ENOMEM; } _rtw_memcpy(ext_dbg, ext, len); #endif //added for wps2.0 @20110524 if(dwrq->flags == 0x8766 && len > 8) { u32 cp_sz; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); u8 *probereq_wpsie = ext; int probereq_wpsie_len = len; u8 wps_oui[4]={0x0,0x50,0xf2,0x04}; if((_VENDOR_SPECIFIC_IE_ == probereq_wpsie[0]) && (_rtw_memcmp(&probereq_wpsie[2], wps_oui, 4) ==_TRUE)) { cp_sz = probereq_wpsie_len>MAX_WPS_IE_LEN ? MAX_WPS_IE_LEN:probereq_wpsie_len; if(pmlmepriv->wps_probe_req_ie) { u32 free_len = pmlmepriv->wps_probe_req_ie_len; pmlmepriv->wps_probe_req_ie_len = 0; rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); pmlmepriv->wps_probe_req_ie = NULL; } pmlmepriv->wps_probe_req_ie = rtw_malloc(cp_sz); if ( pmlmepriv->wps_probe_req_ie == NULL) { printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ret = -EINVAL; goto FREE_EXT; } _rtw_memcpy(pmlmepriv->wps_probe_req_ie, probereq_wpsie, cp_sz); pmlmepriv->wps_probe_req_ie_len = cp_sz; } goto FREE_EXT; } if( len >= WEXT_CSCAN_HEADER_SIZE && _rtw_memcmp(ext, WEXT_CSCAN_HEADER, WEXT_CSCAN_HEADER_SIZE) == _TRUE ){ ret = rtw_wx_set_scan(dev, info, awrq, ext); goto FREE_EXT; } #ifdef CONFIG_ANDROID //DBG_871X("rtw_wx_set_priv: %s req=%s\n", dev->name, ext); i = rtw_android_cmdstr_to_num(ext); switch(i) { case ANDROID_WIFI_CMD_START : indicate_wx_custom_event(padapter, "START"); break; case ANDROID_WIFI_CMD_STOP : indicate_wx_custom_event(padapter, "STOP"); break; case ANDROID_WIFI_CMD_RSSI : { struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct wlan_network *pcur_network = &pmlmepriv->cur_network; if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { sprintf(ext, "%s rssi %d", pcur_network->network.Ssid.Ssid, padapter->recvpriv.rssi); } else { sprintf(ext, "OK"); } } break; case ANDROID_WIFI_CMD_LINKSPEED : { u16 mbps = rtw_get_cur_max_rate(padapter)/10; sprintf(ext, "LINKSPEED %d", mbps); } break; case ANDROID_WIFI_CMD_MACADDR : sprintf(ext, "MACADDR = " MAC_FMT, MAC_ARG(dev->dev_addr)); break; case ANDROID_WIFI_CMD_SCAN_ACTIVE : { //rtw_set_scan_mode(padapter, SCAN_ACTIVE); sprintf(ext, "OK"); } break; case ANDROID_WIFI_CMD_SCAN_PASSIVE : { //rtw_set_scan_mode(padapter, SCAN_PASSIVE); sprintf(ext, "OK"); } break; case ANDROID_WIFI_CMD_COUNTRY : { char country_code[10]; sscanf(ext, "%*s %s", country_code); rtw_set_country(padapter, country_code); sprintf(ext, "OK"); } break; default : #ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV DBG_871X("%s: %s unknowned req=%s\n", __FUNCTION__, dev->name, ext_dbg); #endif sprintf(ext, "OK"); } if (copy_to_user(dwrq->pointer, ext, min(dwrq->length, (u16)(strlen(ext)+1)) ) ) ret = -EFAULT; #ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV DBG_871X("%s: %s req=%s rep=%s dwrq->length=%d, strlen(ext)+1=%d\n", __FUNCTION__, dev->name, ext_dbg ,ext, dwrq->length, (u16)(strlen(ext)+1)); #endif #endif //end of CONFIG_ANDROID FREE_EXT: rtw_vmfree(ext, len); #ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV rtw_vmfree(ext_dbg, len); #endif //DBG_871X("rtw_wx_set_priv: (SIOCSIWPRIV) %s ret=%d\n", // dev->name, ret); return ret; } #ifdef CONFIG_WOWLAN static int rtw_wowlan_ctrl(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct wowlan_ioctl_param poidparam; struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct net_device *pnetdev = padapter->pnetdev; #ifdef CONFIG_CONCURRENT_MODE struct net_device *pbuddy_netdev = padapter->pbuddy_adapter->pnetdev; #endif struct sta_info *psta = NULL; int ret = 0; u32 start_time = rtw_get_current_time(); poidparam.subcode = 0; DBG_871X("+rtw_wowlan_ctrl: %s\n", extra); if(pwrctrlpriv->bSupportRemoteWakeup==_FALSE){ ret = -EPERM; DBG_871X("+rtw_wowlan_ctrl: Device didn't support the remote wakeup!!\n"); goto _rtw_wowlan_ctrl_exit_free; } if (!check_fwstate(pmlmepriv, _FW_LINKED) && check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { DBG_871X("[%s] WARNING: Please Connect With AP First!!\n", __func__); goto _rtw_wowlan_ctrl_exit_free; } if (_rtw_memcmp( extra, "enable", 6 )) { padapter->registrypriv.mp_mode = 1; pwrctrlpriv->wowlan_from_cmd = _TRUE; rtw_suspend_common(padapter); } else if (_rtw_memcmp( extra, "disable", 6 )) { rtw_resume_common(padapter); pwrctrlpriv->wowlan_from_cmd = _FALSE; padapter->registrypriv.mp_mode = 0; } else { DBG_871X("[%s] Invalid Parameter.\n", __func__); goto _rtw_wowlan_ctrl_exit_free; } //mutex_lock(&ioctl_mutex); _rtw_wowlan_ctrl_exit_free: DBG_871X("-rtw_wowlan_ctrl( subcode = %d)\n", poidparam.subcode); DBG_871X_LEVEL(_drv_always_, "%s in %d ms\n", __func__, rtw_get_passing_time_ms(start_time)); _rtw_wowlan_ctrl_exit: return ret; } #endif //CONFIG_WOWLAN #ifdef CONFIG_AP_WOWLAN static int rtw_ap_wowlan_ctrl(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct wowlan_ioctl_param poidparam; struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct sta_info *psta = NULL; int ret = 0; u32 start_time = rtw_get_current_time(); poidparam.subcode = 0; DBG_871X("+rtw_ap_wowlan_ctrl: %s\n", extra); if(pwrctrlpriv->bSupportRemoteWakeup==_FALSE){ ret = -EPERM; DBG_871X("+rtw_wowlan_ctrl: Device didn't support the remote wakeup!!\n"); goto _rtw_ap_wowlan_ctrl_exit_free; } if (!check_fwstate(pmlmepriv, WIFI_AP_STATE)) { DBG_871X("[%s] It is not AP mode!!\n", __func__); goto _rtw_ap_wowlan_ctrl_exit_free; } if (_rtw_memcmp( extra, "enable", 6 )) { pwrctrlpriv->wowlan_ap_mode = _TRUE; while (pwrctrlpriv->bips_processing == _TRUE) rtw_msleep_os(1); rtw_cancel_all_timer(padapter); padapter->bDriverStopped = _TRUE; //for stop thread rtw_stop_drv_threads(padapter); padapter->bDriverStopped = _FALSE; //for 32k command #ifdef CONFIG_LPS LeaveAllPowerSaveModeDirect(padapter); #endif rtw_hal_disable_interrupt(padapter); // It need wait for leaving 32K. // 2.1 clean interupt if (padapter->HalFunc.clear_interrupt) padapter->HalFunc.clear_interrupt(padapter); poidparam.subcode = WOWLAN_AP_ENABLE; rtw_hal_set_hwreg(padapter, HW_VAR_AP_WOWLAN,(u8 *)&poidparam); } else if (_rtw_memcmp( extra, "disable", 6 )) { #ifdef CONFIG_LPS LeaveAllPowerSaveModeDirect(padapter); #endif //CONFIG_LPS pwrctrlpriv->bFwCurrentInPSMode = _FALSE; rtw_hal_disable_interrupt(padapter); if (padapter->HalFunc.clear_interrupt) padapter->HalFunc.clear_interrupt(padapter); poidparam.subcode = WOWLAN_AP_ENABLE; rtw_hal_set_hwreg(padapter, HW_VAR_AP_WOWLAN,(u8 *)&poidparam); pwrctrlpriv->wowlan_ap_mode = _FALSE; psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv)); if (psta) { set_sta_rate(padapter, psta); } padapter->bDriverStopped = _FALSE; DBG_871X("%s: wowmode resuming, DriverStopped:%d\n", __func__, padapter->bDriverStopped); rtw_start_drv_threads(padapter); rtw_hal_enable_interrupt(padapter); _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); pwrctrlpriv->bips_processing = _FALSE; rtw_set_pwr_state_check_timer(pwrctrlpriv); } else { DBG_871X("[%s] Invalid Parameter.\n", __func__); goto _rtw_ap_wowlan_ctrl_exit_free; } //mutex_lock(&ioctl_mutex); _rtw_ap_wowlan_ctrl_exit_free: DBG_871X("-rtw_ap_wowlan_ctrl( subcode = %d)\n", poidparam.subcode); DBG_871X_LEVEL(_drv_always_, "%s in %d ms\n", __func__, rtw_get_passing_time_ms(start_time)); _rtw_ap_wowlan_ctrl_exit: return ret; } #endif //CONFIG_AP_WOWLAN static int rtw_pm_set(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; unsigned mode = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); DBG_871X( "[%s] extra = %s\n", __FUNCTION__, extra ); if ( _rtw_memcmp( extra, "lps=", 4 ) ) { sscanf(extra+4, "%u", &mode); ret = rtw_pm_set_lps(padapter,mode); } else if ( _rtw_memcmp( extra, "ips=", 4 ) ) { sscanf(extra+4, "%u", &mode); ret = rtw_pm_set_ips(padapter,mode); } else{ ret = -EINVAL; } return ret; } static int rtw_mp_efuse_get(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wdata, char *extra) { PADAPTER padapter = rtw_netdev_priv(dev); EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); PEFUSE_HAL pEfuseHal; struct iw_point *wrqu; u8 *PROMContent = pEEPROM->efuse_eeprom_data; u8 ips_mode = IPS_NUM; // init invalid value u8 lps_mode = PS_MODE_NUM; // init invalid value struct pwrctrl_priv *pwrctrlpriv ; u8 *data = NULL; u8 *rawdata = NULL; char *pch, *ptmp, *token, *tmp[3]={0x00,0x00,0x00}; u16 i=0, j=0, mapLen=0, addr=0, cnts=0; u16 max_available_size=0, raw_cursize=0, raw_maxsize=0; int err; #ifdef CONFIG_IOL u8 org_fw_iol = padapter->registrypriv.fw_iol;// 0:Disable, 1:enable, 2:by usb speed #endif wrqu = (struct iw_point*)wdata; pwrctrlpriv = adapter_to_pwrctl(padapter); pEfuseHal = &pHalData->EfuseHal; err = 0; data = rtw_zmalloc(EFUSE_BT_MAX_MAP_LEN); if (data == NULL) { err = -ENOMEM; goto exit; } rawdata = rtw_zmalloc(EFUSE_BT_MAX_MAP_LEN); if (rawdata == NULL) { err = -ENOMEM; goto exit; } if (copy_from_user(extra, wrqu->pointer, wrqu->length)) { err = -EFAULT; goto exit; } #ifdef CONFIG_LPS lps_mode = pwrctrlpriv->power_mgnt;//keep org value rtw_pm_set_lps(padapter,PS_MODE_ACTIVE); #endif #ifdef CONFIG_IPS ips_mode = pwrctrlpriv->ips_mode;//keep org value rtw_pm_set_ips(padapter,IPS_NONE); #endif pch = extra; DBG_871X("%s: in=%s\n", __FUNCTION__, extra); i = 0; //mac 16 "00e04c871200" rmap,00,2 while ((token = strsep(&pch, ",")) != NULL) { if (i > 2) break; tmp[i] = token; i++; } #ifdef CONFIG_IOL padapter->registrypriv.fw_iol = 0;// 0:Disable, 1:enable, 2:by usb speed #endif if(strcmp(tmp[0], "status") == 0){ sprintf(extra, "Load File efuse=%s,Load File MAC=%s",(pEEPROM->bloadfile_fail_flag? "FAIL" : "OK"),(pEEPROM->bloadmac_fail_flag? "FAIL" : "OK")); goto exit; } else if (strcmp(tmp[0], "drvmap") == 0) { mapLen = EFUSE_MAP_SIZE; sprintf(extra, "\n"); for (i = 0; i < EFUSE_MAP_SIZE; i += 16) { // DBG_871X("0x%02x\t", i); sprintf(extra, "%s0x%02x\t", extra, i); for (j=0; j<8; j++) { // DBG_871X("%02X ", data[i+j]); sprintf(extra, "%s%02X ", extra, PROMContent[i+j]); } // DBG_871X("\t"); sprintf(extra, "%s\t", extra); for (; j<16; j++) { // DBG_871X("%02X ", data[i+j]); sprintf(extra, "%s%02X ", extra, PROMContent[i+j]); } // DBG_871X("\n"); sprintf(extra,"%s\n",extra); } // DBG_871X("\n"); } else if (strcmp(tmp[0], "realmap") == 0) { mapLen = EFUSE_MAP_SIZE; if (rtw_efuse_map_read(padapter, EFUSE_WIFI , mapLen, pEfuseHal->fakeEfuseInitMap) == _FAIL) { DBG_871X("%s: read realmap Fail!!\n", __FUNCTION__); err = -EFAULT; goto exit; } // DBG_871X("OFFSET\tVALUE(hex)\n"); sprintf(extra, "\n"); for (i = 0; i < EFUSE_MAP_SIZE; i += 16) { // DBG_871X("0x%02x\t", i); sprintf(extra, "%s0x%02x\t", extra, i); for (j=0; j<8; j++) { // DBG_871X("%02X ", data[i+j]); sprintf(extra, "%s%02X ", extra, pEfuseHal->fakeEfuseInitMap[i+j]); } // DBG_871X("\t"); sprintf(extra, "%s\t", extra); for (; j<16; j++) { // DBG_871X("%02X ", data[i+j]); sprintf(extra, "%s%02X ", extra, pEfuseHal->fakeEfuseInitMap[i+j]); } // DBG_871X("\n"); sprintf(extra,"%s\n",extra); } // DBG_871X("\n"); } else if (strcmp(tmp[0], "rmap") == 0) { if ((tmp[1]==NULL) || (tmp[2]==NULL)) { DBG_871X("%s: rmap Fail!! Parameters error!\n", __FUNCTION__); err = -EINVAL; goto exit; } // rmap addr cnts addr = simple_strtoul(tmp[1], &ptmp, 16); DBG_871X("%s: addr=%x\n", __FUNCTION__, addr); cnts = simple_strtoul(tmp[2], &ptmp, 10); if (cnts == 0) { DBG_871X("%s: rmap Fail!! cnts error!\n", __FUNCTION__); err = -EINVAL; goto exit; } DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN , (PVOID)&max_available_size, _FALSE); if ((addr+ cnts) > max_available_size) { DBG_871X("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); err = -EINVAL; goto exit; } if (rtw_efuse_map_read(padapter, addr, cnts, data) == _FAIL) { DBG_871X("%s: rtw_efuse_map_read error!\n", __FUNCTION__); err = -EFAULT; goto exit; } // DBG_871X("%s: data={", __FUNCTION__); *extra = 0; for (i=0; iinterfaceIndex == 0) addr = EEPROM_MAC_ADDR_MAC0_92DU; else addr = EEPROM_MAC_ADDR_MAC1_92DU; #else if (pHalData->interfaceIndex == 0) addr = EEPROM_MAC_ADDR_MAC0_92DE; else addr = EEPROM_MAC_ADDR_MAC1_92DE; #endif #endif // CONFIG_RTL8192D #ifdef CONFIG_RTL8723A #ifdef CONFIG_SDIO_HCI addr = EEPROM_MAC_ADDR_8723AS; #endif #ifdef CONFIG_GSPI_HCI addr = EEPROM_MAC_ADDR_8723AS; #endif #ifdef CONFIG_USB_HCI addr = EEPROM_MAC_ADDR_8723AU; #endif #endif // CONFIG_RTL8723A #ifdef CONFIG_RTL8188E #ifdef CONFIG_USB_HCI addr = EEPROM_MAC_ADDR_88EU; #endif #ifdef CONFIG_SDIO_HCI addr = EEPROM_MAC_ADDR_88ES; #endif #ifdef CONFIG_PCI_HCI addr = EEPROM_MAC_ADDR_88EE; #endif #endif // CONFIG_RTL8188E #ifdef CONFIG_RTL8192E #ifdef CONFIG_USB_HCI addr = EEPROM_MAC_ADDR_8192EU; #endif #ifdef CONFIG_SDIO_HCI addr = EEPROM_MAC_ADDR_8192ES; #endif #ifdef CONFIG_PCI_HCI addr = EEPROM_MAC_ADDR_8192EE; #endif #endif #ifdef CONFIG_RTL8723B #ifdef CONFIG_SDIO_HCI addr = EEPROM_MAC_ADDR_8723BS; #endif #ifdef CONFIG_GSPI_HCI addr = EEPROM_MAC_ADDR_8723BS; #endif #ifdef CONFIG_USB_HCI addr = EEPROM_MAC_ADDR_8723BU; #endif #endif // CONFIG_RTL8723B cnts = 6; EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); if ((addr + cnts) > max_available_size) { DBG_871X("%s: addr(0x%02x)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); err = -EFAULT; goto exit; } if (rtw_efuse_map_read(padapter, addr, cnts, data) == _FAIL) { DBG_871X("%s: rtw_efuse_map_read error!\n", __FUNCTION__); err = -EFAULT; goto exit; } // DBG_871X("%s: MAC address={", __FUNCTION__); *extra = 0; for (i=0; i max_available_size) { DBG_871X("%s: addr(0x%02x)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); err = -EFAULT; goto exit; } if (rtw_efuse_map_read(padapter, addr, cnts, data) == _FAIL) { DBG_871X("%s: rtw_efuse_access error!!\n", __FUNCTION__); err = -EFAULT; goto exit; } // DBG_871X("%s: {VID,PID}={", __FUNCTION__); *extra = 0; for (i=0; iBTEfuseInitMap) == _FAIL) { DBG_871X("%s: rtw_BT_efuse_map_read Fail!!\n", __FUNCTION__); err = -EFAULT; goto exit; } // DBG_871X("OFFSET\tVALUE(hex)\n"); sprintf(extra, "\n"); for (i=0; i<512; i+=16) // set 512 because the iwpriv's extra size have limit 0x7FF { // DBG_871X("0x%03x\t", i); sprintf(extra, "%s0x%03x\t", extra, i); for (j=0; j<8; j++) { // DBG_871X("%02X ", pEfuseHal->BTEfuseInitMap[i+j]); sprintf(extra, "%s%02X ", extra, pEfuseHal->BTEfuseInitMap[i+j]); } // DBG_871X("\t"); sprintf(extra,"%s\t",extra); for (; j<16; j++) { // DBG_871X("%02X ", pEfuseHal->BTEfuseInitMap[i+j]); sprintf(extra, "%s%02X ", extra, pEfuseHal->BTEfuseInitMap[i+j]); } // DBG_871X("\n"); sprintf(extra, "%s\n", extra); } // DBG_871X("\n"); } else if (strcmp(tmp[0],"btbmap") == 0) { BTEfuse_PowerSwitch(padapter,1,_TRUE); mapLen = EFUSE_BT_MAX_MAP_LEN; if (rtw_BT_efuse_map_read(padapter, 0, mapLen, pEfuseHal->BTEfuseInitMap) == _FAIL) { DBG_871X("%s: rtw_BT_efuse_map_read Fail!!\n", __FUNCTION__); err = -EFAULT; goto exit; } // DBG_871X("OFFSET\tVALUE(hex)\n"); sprintf(extra, "\n"); for (i=512; i<1024 ; i+=16) { // DBG_871X("0x%03x\t", i); sprintf(extra, "%s0x%03x\t", extra, i); for (j=0; j<8; j++) { // DBG_871X("%02X ", data[i+j]); sprintf(extra, "%s%02X ", extra, pEfuseHal->BTEfuseInitMap[i+j]); } // DBG_871X("\t"); sprintf(extra,"%s\t",extra); for (; j<16; j++) { // DBG_871X("%02X ", data[i+j]); sprintf(extra, "%s%02X ", extra, pEfuseHal->BTEfuseInitMap[i+j]); } // DBG_871X("\n"); sprintf(extra, "%s\n", extra); } // DBG_871X("\n"); } else if (strcmp(tmp[0],"btrmap") == 0) { if ((tmp[1]==NULL) || (tmp[2]==NULL)) { err = -EINVAL; goto exit; } BTEfuse_PowerSwitch(padapter,1,_TRUE); // rmap addr cnts addr = simple_strtoul(tmp[1], &ptmp, 16); DBG_871X("%s: addr=0x%X\n", __FUNCTION__, addr); cnts = simple_strtoul(tmp[2], &ptmp, 10); if (cnts == 0) { DBG_871X("%s: btrmap Fail!! cnts error!\n", __FUNCTION__); err = -EINVAL; goto exit; } DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); if ((addr + cnts) > max_available_size) { DBG_871X("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); err = -EFAULT; goto exit; } if (rtw_BT_efuse_map_read(padapter, addr, cnts, data) == _FAIL) { DBG_871X("%s: rtw_BT_efuse_map_read error!!\n", __FUNCTION__); err = -EFAULT; goto exit; } *extra = 0; // DBG_871X("%s: bt efuse data={", __FUNCTION__); for (i=0; ifakeBTEfuseModifiedMap[i+j]); sprintf(extra, "%s%02X ", extra, pEfuseHal->fakeBTEfuseModifiedMap[i+j]); } // DBG_871X("\t"); sprintf(extra, "%s\t", extra); for (; j<16; j++) { // DBG_871X("%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]); sprintf(extra, "%s%02X ", extra, pEfuseHal->fakeBTEfuseModifiedMap[i+j]); } // DBG_871X("\n"); sprintf(extra, "%s\n", extra); } // DBG_871X("\n"); } else if (strcmp(tmp[0],"btbfake") == 0) { // DBG_871X("OFFSET\tVALUE(hex)\n"); sprintf(extra, "\n"); for (i=512; i<1024; i+=16) { // DBG_871X("0x%03x\t", i); sprintf(extra, "%s0x%03x\t", extra, i); for (j=0; j<8; j++) { // DBG_871X("%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]); sprintf(extra, "%s%02X ", extra, pEfuseHal->fakeBTEfuseModifiedMap[i+j]); } // DBG_871X("\t"); sprintf(extra, "%s\t", extra); for (; j<16; j++) { // DBG_871X("%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]); sprintf(extra, "%s%02X ", extra, pEfuseHal->fakeBTEfuseModifiedMap[i+j]); } // DBG_871X("\n"); sprintf(extra, "%s\n", extra); } // DBG_871X("\n"); } else if (strcmp(tmp[0],"wlrfkmap")== 0) { // DBG_871X("OFFSET\tVALUE(hex)\n"); sprintf(extra, "\n"); for (i=0; ifakeEfuseModifiedMap[i+j]); sprintf(extra, "%s%02X ", extra, pEfuseHal->fakeEfuseModifiedMap[i+j]); } // DBG_871X("\t"); sprintf(extra, "%s\t", extra); for (; j<16; j++) { // DBG_871X("%02X ", pEfuseHal->fakeEfuseModifiedMap[i+j]); sprintf(extra, "%s %02X", extra, pEfuseHal->fakeEfuseModifiedMap[i+j]); } // DBG_871X("\n"); sprintf(extra, "%s\n", extra); } // DBG_871X("\n"); } else if (strcmp(tmp[0],"wlrfkrmap")== 0) { if ((tmp[1]==NULL) || (tmp[2]==NULL)) { DBG_871X("%s: rmap Fail!! Parameters error!\n", __FUNCTION__); err = -EINVAL; goto exit; } // rmap addr cnts addr = simple_strtoul(tmp[1], &ptmp, 16); DBG_871X("%s: addr=%x\n", __FUNCTION__, addr); cnts = simple_strtoul(tmp[2], &ptmp, 10); if (cnts == 0) { DBG_871X("%s: rmap Fail!! cnts error!\n", __FUNCTION__); err = -EINVAL; goto exit; } DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); // DBG_871X("%s: data={", __FUNCTION__); *extra = 0; for (i=0; ifakeEfuseModifiedMap[addr+i]); sprintf(extra, "%s0x%02X ", extra, pEfuseHal->fakeEfuseModifiedMap[addr+i]); } } else if (strcmp(tmp[0],"btrfkrmap")== 0) { if ((tmp[1]==NULL) || (tmp[2]==NULL)) { DBG_871X("%s: rmap Fail!! Parameters error!\n", __FUNCTION__); err = -EINVAL; goto exit; } // rmap addr cnts addr = simple_strtoul(tmp[1], &ptmp, 16); DBG_871X("%s: addr=%x\n", __FUNCTION__, addr); cnts = simple_strtoul(tmp[2], &ptmp, 10); if (cnts == 0) { DBG_871X("%s: rmap Fail!! cnts error!\n", __FUNCTION__); err = -EINVAL; goto exit; } DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); // DBG_871X("%s: data={", __FUNCTION__); *extra = 0; for (i=0; ifakeBTEfuseModifiedMap[addr+i]); sprintf(extra, "%s0x%02X ", extra, pEfuseHal->fakeBTEfuseModifiedMap[addr+i]); } } else { sprintf(extra, "Command not found!"); } exit: if (data) rtw_mfree(data, EFUSE_BT_MAX_MAP_LEN); if (rawdata) rtw_mfree(rawdata, EFUSE_BT_MAX_MAP_LEN); if (!err) wrqu->length = strlen(extra); if (padapter->registrypriv.mp_mode == 0) { #ifdef CONFIG_IPS rtw_pm_set_ips(padapter, ips_mode); #endif // CONFIG_IPS #ifdef CONFIG_LPS rtw_pm_set_lps(padapter, lps_mode); #endif // CONFIG_LPS } #ifdef CONFIG_IOL padapter->registrypriv.fw_iol = org_fw_iol;// 0:Disable, 1:enable, 2:by usb speed #endif return err; } static int rtw_mp_efuse_set(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wdata, char *extra) { struct iw_point *wrqu; PADAPTER padapter; struct pwrctrl_priv *pwrctrlpriv ; PHAL_DATA_TYPE pHalData; PEFUSE_HAL pEfuseHal; u8 ips_mode = IPS_NUM; // init invalid value u8 lps_mode = PS_MODE_NUM; // init invalid value u32 i=0,j=0, jj, kk; u8 *setdata = NULL; u8 *ShadowMapBT = NULL; u8 *ShadowMapWiFi = NULL; u8 *setrawdata = NULL; char *pch, *ptmp, *token, *tmp[3]={0x00,0x00,0x00}; u16 addr=0xFF, cnts=0, BTStatus=0 , max_available_size=0; int err; wrqu = (struct iw_point*)wdata; padapter = rtw_netdev_priv(dev); pwrctrlpriv = adapter_to_pwrctl(padapter); pHalData = GET_HAL_DATA(padapter); pEfuseHal = &pHalData->EfuseHal; err = 0; if (copy_from_user(extra, wrqu->pointer, wrqu->length)) return -EFAULT; setdata = rtw_zmalloc(1024); if (setdata == NULL) { err = -ENOMEM; goto exit; } ShadowMapBT = rtw_malloc(EFUSE_BT_MAX_MAP_LEN); if (ShadowMapBT == NULL) { err = -ENOMEM; goto exit; } ShadowMapWiFi = rtw_malloc(EFUSE_MAP_SIZE); if (ShadowMapWiFi == NULL) { err = -ENOMEM; goto exit; } setrawdata = rtw_malloc(EFUSE_MAX_SIZE); if (setrawdata == NULL) { err = -ENOMEM; goto exit; } #ifdef CONFIG_LPS lps_mode = pwrctrlpriv->power_mgnt;//keep org value rtw_pm_set_lps(padapter,PS_MODE_ACTIVE); #endif #ifdef CONFIG_IPS ips_mode = pwrctrlpriv->ips_mode;//keep org value rtw_pm_set_ips(padapter,IPS_NONE); #endif pch = extra; DBG_871X("%s: in=%s\n", __FUNCTION__, extra); i = 0; while ((token = strsep(&pch, ",")) != NULL) { if (i > 2) break; tmp[i] = token; i++; } // tmp[0],[1],[2] // wmap,addr,00e04c871200 if (strcmp(tmp[0], "wmap") == 0) { if ((tmp[1]==NULL) || (tmp[2]==NULL)) { err = -EINVAL; goto exit; } #if 1 // unknown bug workaround, need to fix later addr=0x1ff; rtw_write8(padapter, EFUSE_CTRL+1, (addr & 0xff)); rtw_msleep_os(10); rtw_write8(padapter, EFUSE_CTRL+2, ((addr >> 8) & 0x03)); rtw_msleep_os(10); rtw_write8(padapter, EFUSE_CTRL+3, 0x72); rtw_msleep_os(10); rtw_read8(padapter, EFUSE_CTRL); #endif addr = simple_strtoul(tmp[1], &ptmp, 16); addr &= 0xFFF; cnts = strlen(tmp[2]); if (cnts%2) { err = -EINVAL; goto exit; } cnts /= 2; if (cnts == 0) { err = -EINVAL; goto exit; } DBG_871X("%s: addr=0x%X\n", __FUNCTION__, addr); DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); DBG_871X("%s: map data=%s\n", __FUNCTION__, tmp[2]); for (jj=0, kk=0; jj max_available_size) { DBG_871X("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); err = -EFAULT; goto exit; } if (rtw_efuse_map_write(padapter, addr, cnts, setdata) == _FAIL) { DBG_871X("%s: rtw_efuse_map_write error!!\n", __FUNCTION__); err = -EFAULT; goto exit; } *extra = 0; DBG_871X("%s: after rtw_BT_efuse_map_write to _rtw_memcmp \n", __FUNCTION__); if ( (rtw_efuse_map_read(padapter, addr, cnts, ShadowMapWiFi) == _SUCCESS ) ) { if (_rtw_memcmp((void*)ShadowMapWiFi ,(void*)setdata,cnts)) { DBG_871X("%s: WiFi write map afterf compare success\n", __FUNCTION__); sprintf(extra, "WiFi write map compare OK\n"); err = 0; goto exit; } else { sprintf(extra, "WiFi write map compare FAIL\n"); DBG_871X("%s: WiFi write map compare Fail\n", __FUNCTION__); err = 0; goto exit; } } } else if (strcmp(tmp[0], "wraw") == 0) { if ((tmp[1]==NULL) || (tmp[2]==NULL)) { err = -EINVAL; goto exit; } addr = simple_strtoul( tmp[1], &ptmp, 16 ); addr &= 0xFFF; cnts = strlen(tmp[2]); if (cnts%2) { err = -EINVAL; goto exit; } cnts /= 2; if (cnts == 0) { err = -EINVAL; goto exit; } DBG_871X("%s: addr=0x%X\n", __FUNCTION__, addr); DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); DBG_871X("%s: raw data=%s\n", __FUNCTION__, tmp[2]); for (jj=0, kk=0; jjinterfaceIndex == 0) addr = EEPROM_MAC_ADDR_MAC0_92DU; else addr = EEPROM_MAC_ADDR_MAC1_92DU; #else if (pHalData->interfaceIndex == 0) addr = EEPROM_MAC_ADDR_MAC0_92DE; else addr = EEPROM_MAC_ADDR_MAC1_92DE; #endif #endif #ifdef CONFIG_RTL8723A #ifdef CONFIG_SDIO_HCI addr = EEPROM_MAC_ADDR_8723AS; #endif #ifdef CONFIG_GSPI_HCI addr = EEPROM_MAC_ADDR_8723AS; #endif #ifdef CONFIG_USB_HCI addr = EEPROM_MAC_ADDR_8723AU; #endif #endif // CONFIG_RTL8723A #ifdef CONFIG_RTL8188E #ifdef CONFIG_USB_HCI addr = EEPROM_MAC_ADDR_88EU; #endif #ifdef CONFIG_SDIO_HCI addr = EEPROM_MAC_ADDR_88ES; #endif #ifdef CONFIG_PCI_HCI addr = EEPROM_MAC_ADDR_88EE; #endif #endif //#ifdef CONFIG_RTL8188E #ifdef CONFIG_RTL8192E #ifdef CONFIG_USB_HCI addr = EEPROM_MAC_ADDR_8192EU; #endif #ifdef CONFIG_SDIO_HCI addr = EEPROM_MAC_ADDR_8192ES; #endif #ifdef CONFIG_PCI_HCI addr = EEPROM_MAC_ADDR_8192EE; #endif #endif //#ifdef CONFIG_RTL8192E #ifdef CONFIG_RTL8723B #ifdef CONFIG_SDIO_HCI addr = EEPROM_MAC_ADDR_8723BS; #endif #ifdef CONFIG_GSPI_HCI addr = EEPROM_MAC_ADDR_8723BS; #endif #ifdef CONFIG_USB_HCI addr = EEPROM_MAC_ADDR_8723BU; #endif #endif // CONFIG_RTL8723B #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) #ifdef CONFIG_SDIO_HCI addr = EEPROM_MAC_ADDR_8821AS; #endif #ifdef CONFIG_PCI_HCI addr = EEPROM_MAC_ADDR_8821AE; #endif #ifdef CONFIG_USB_HCI addr = EEPROM_MAC_ADDR_8821AU; #endif #endif // CONFIG_RTL8812A/CONFIG_RTL8821A cnts = strlen(tmp[1]); if (cnts%2) { err = -EINVAL; goto exit; } cnts /= 2; if (cnts == 0) { err = -EINVAL; goto exit; } if (cnts > 6) { DBG_871X("%s: error data for mac addr=\"%s\"\n", __FUNCTION__, tmp[1]); err = -EFAULT; goto exit; } DBG_871X("%s: addr=0x%X\n", __FUNCTION__, addr); DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); DBG_871X("%s: MAC address=%s\n", __FUNCTION__, tmp[1]); for (jj=0, kk=0; jj max_available_size) { DBG_871X("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); err = -EFAULT; goto exit; } if (rtw_efuse_map_write(padapter, addr, cnts, setdata) == _FAIL) { DBG_871X("%s: rtw_efuse_map_write error!!\n", __FUNCTION__); err = -EFAULT; goto exit; } } else if (strcmp(tmp[0], "vidpid") == 0) { if (tmp[1]==NULL) { err = -EINVAL; goto exit; } // pidvid,da0b7881 #ifdef CONFIG_RTL8192C addr = EEPROM_VID_92C; #endif // CONFIG_RTL8192C #ifdef CONFIG_RTL8192D #ifdef CONFIG_USB_HCI addr = EEPROM_VID_92DU; #else addr = EEPROM_VID_92DE; #endif #endif // CONFIG_RTL8192D #ifdef CONFIG_RTL8723A #ifdef CONFIG_USB_HCI addr = EEPROM_VID_8723AU; #endif #endif // CONFIG_RTL8723A #ifdef CONFIG_RTL8188E #ifdef CONFIG_USB_HCI addr = EEPROM_VID_88EU; #endif #ifdef CONFIG_PCI_HCI addr = EEPROM_VID_88EE; #endif #endif // CONFIG_RTL8188E #ifdef CONFIG_RTL8192E #ifdef CONFIG_USB_HCI addr = EEPROM_VID_8192EU; #endif #ifdef CONFIG_PCI_HCI addr = EEPROM_VID_8192EE; #endif #endif // CONFIG_RTL8188E #ifdef CONFIG_RTL8723B addr = EEPROM_VID_8723BU; #endif cnts = strlen(tmp[1]); if (cnts%2) { err = -EINVAL; goto exit; } cnts /= 2; if (cnts == 0) { err = -EINVAL; goto exit; } DBG_871X("%s: addr=0x%X\n", __FUNCTION__, addr); DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); DBG_871X("%s: VID/PID=%s\n", __FUNCTION__, tmp[1]); for (jj=0, kk=0; jj max_available_size) { DBG_871X("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); err = -EFAULT; goto exit; } if (rtw_efuse_map_write(padapter, addr, cnts, setdata) == _FAIL) { DBG_871X("%s: rtw_efuse_map_write error!!\n", __FUNCTION__); err = -EFAULT; goto exit; } } else if (strcmp(tmp[0], "wldumpfake") == 0) { if (rtw_efuse_map_read(padapter, 0, EFUSE_MAP_SIZE, pEfuseHal->fakeEfuseModifiedMap) == _SUCCESS) { DBG_871X("%s: WiFi hw efuse dump to Fake map success \n", __FUNCTION__); } else { DBG_871X("%s: WiFi hw efuse dump to Fake map Fail \n", __FUNCTION__); err = -EFAULT; } } else if (strcmp(tmp[0], "btwmap") == 0) { rtw_write8(padapter, 0xa3, 0x05); //For 8723AB ,8821S ? BTStatus=rtw_read8(padapter, 0xa0); DBG_871X("%s: btwmap before read 0xa0 BT Status =0x%x \n", __FUNCTION__,BTStatus); if (BTStatus != 0x04) { sprintf(extra, "BT Status not Active Write FAIL\n"); goto exit; } if ((tmp[1]==NULL) || (tmp[2]==NULL)) { err = -EINVAL; goto exit; } BTEfuse_PowerSwitch(padapter,1,_TRUE); addr=0x1ff; rtw_write8(padapter, EFUSE_CTRL+1, (addr & 0xff)); rtw_msleep_os(10); rtw_write8(padapter, EFUSE_CTRL+2, ((addr >> 8) & 0x03)); rtw_msleep_os(10); rtw_write8(padapter, EFUSE_CTRL+3, 0x72); rtw_msleep_os(10); rtw_read8(padapter, EFUSE_CTRL); addr = simple_strtoul(tmp[1], &ptmp, 16); addr &= 0xFFF; cnts = strlen(tmp[2]); if (cnts%2) { err = -EINVAL; goto exit; } cnts /= 2; if (cnts == 0) { err = -EINVAL; goto exit; } DBG_871X("%s: addr=0x%X\n", __FUNCTION__, addr); DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); DBG_871X("%s: BT data=%s\n", __FUNCTION__, tmp[2]); for (jj=0, kk=0; jj max_available_size) { DBG_871X("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); err = -EFAULT; goto exit; } if (rtw_BT_efuse_map_write(padapter, addr, cnts, setdata) == _FAIL) { DBG_871X("%s: rtw_BT_efuse_map_write error!!\n", __FUNCTION__); err = -EFAULT; goto exit; } *extra = 0; DBG_871X("%s: after rtw_BT_efuse_map_write to _rtw_memcmp \n", __FUNCTION__); if ( (rtw_BT_efuse_map_read(padapter, addr, cnts, ShadowMapBT ) == _SUCCESS ) ) { if (_rtw_memcmp((void*)ShadowMapBT ,(void*)setdata,cnts)) { DBG_871X("%s: BT write map compare OK BTStatus=0x%x\n", __FUNCTION__,BTStatus); sprintf(extra, "BT write map compare OK"); err = 0; goto exit; } else { sprintf(extra, "BT write map compare FAIL"); DBG_871X("%s: BT write map compare FAIL BTStatus=0x%x\n", __FUNCTION__,BTStatus); err = 0; goto exit; } } } else if (strcmp(tmp[0], "btwfake") == 0) { if ((tmp[1]==NULL) || (tmp[2]==NULL)) { err = -EINVAL; goto exit; } addr = simple_strtoul(tmp[1], &ptmp, 16); addr &= 0xFFF; cnts = strlen(tmp[2]); if (cnts%2) { err = -EINVAL; goto exit; } cnts /= 2; if (cnts == 0) { err = -EINVAL; goto exit; } DBG_871X("%s: addr=0x%X\n", __FUNCTION__, addr); DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); DBG_871X("%s: BT tmp data=%s\n", __FUNCTION__, tmp[2]); for (jj=0, kk=0; jjfakeBTEfuseModifiedMap[addr+jj] = key_2char2num(tmp[2][kk], tmp[2][kk+1]); } } else if (strcmp(tmp[0], "btdumpfake") == 0) { if (rtw_BT_efuse_map_read(padapter, 0, EFUSE_BT_MAX_MAP_LEN, pEfuseHal->fakeBTEfuseModifiedMap) == _SUCCESS) { DBG_871X("%s: BT read all map success\n", __FUNCTION__); } else { DBG_871X("%s: BT read all map Fail!\n", __FUNCTION__); err = -EFAULT; } } else if (strcmp(tmp[0], "btfk2map") == 0) { rtw_write8(padapter, 0xa3, 0x05); BTStatus=rtw_read8(padapter, 0xa0); DBG_871X("%s: btwmap before read 0xa0 BT Status =0x%x \n", __FUNCTION__,BTStatus); if (BTStatus != 0x04) { sprintf(extra, "BT Status not Active Write FAIL\n"); goto exit; } BTEfuse_PowerSwitch(padapter,1,_TRUE); addr=0x1ff; rtw_write8(padapter, EFUSE_CTRL+1, (addr & 0xff)); rtw_msleep_os(10); rtw_write8(padapter, EFUSE_CTRL+2, ((addr >> 8) & 0x03)); rtw_msleep_os(10); rtw_write8(padapter, EFUSE_CTRL+3, 0x72); rtw_msleep_os(10); rtw_read8(padapter, EFUSE_CTRL); _rtw_memcpy(pEfuseHal->BTEfuseModifiedMap, pEfuseHal->fakeBTEfuseModifiedMap, EFUSE_BT_MAX_MAP_LEN); EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); if (max_available_size < 1) { err = -EFAULT; goto exit; } if (rtw_BT_efuse_map_write(padapter, 0x00, EFUSE_BT_MAX_MAP_LEN, pEfuseHal->fakeBTEfuseModifiedMap) == _FAIL) { DBG_871X("%s: rtw_BT_efuse_map_write error!\n", __FUNCTION__); err = -EFAULT; goto exit; } DBG_871X("pEfuseHal->fakeBTEfuseModifiedMap OFFSET\tVALUE(hex)\n"); for (i = 0; i < EFUSE_BT_MAX_MAP_LEN; i += 16) { printk("0x%02x\t", i); for (j=0; j<8; j++) { printk("%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]); } printk("\t"); for (; j<16; j++) { printk("%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]); } printk("\n"); } printk("\n"); #if 1 err = -EFAULT; DBG_871X("%s: rtw_BT_efuse_map_read _rtw_memcmp \n", __FUNCTION__); if ( (rtw_BT_efuse_map_read(padapter, 0x00, EFUSE_BT_MAX_MAP_LEN, pEfuseHal->fakeBTEfuseInitMap) == _SUCCESS ) ) { if (_rtw_memcmp((void*)pEfuseHal->fakeBTEfuseModifiedMap,(void*)pEfuseHal->fakeBTEfuseInitMap,EFUSE_BT_MAX_MAP_LEN)) { sprintf(extra, "BT write map compare OK"); DBG_871X("%s: BT write map afterf compare success BTStatus=0x%x \n", __FUNCTION__,BTStatus); err = 0; goto exit; } else { sprintf(extra, "BT write map compare FAIL"); if (rtw_BT_efuse_map_write(padapter, 0x00, EFUSE_BT_MAX_MAP_LEN, pEfuseHal->fakeBTEfuseModifiedMap) == _FAIL) { DBG_871X("%s: rtw_BT_efuse_map_write compare error,retry = %d!\n", __FUNCTION__,i); } if (rtw_BT_efuse_map_read(padapter, EFUSE_BT, EFUSE_BT_MAX_MAP_LEN, pEfuseHal->fakeBTEfuseInitMap) == _SUCCESS) { DBG_871X("pEfuseHal->fakeBTEfuseInitMap OFFSET\tVALUE(hex)\n"); for (i = 0; i < EFUSE_BT_MAX_MAP_LEN; i += 16) { printk("0x%02x\t", i); for (j=0; j<8; j++) { printk("%02X ", pEfuseHal->fakeBTEfuseInitMap[i+j]); } printk("\t"); for (; j<16; j++) { printk("%02X ", pEfuseHal->fakeBTEfuseInitMap[i+j]); } printk("\n"); } printk("\n"); } DBG_871X("%s: BT write map afterf compare not match to write efuse try write Map again , BTStatus=0x%x\n", __FUNCTION__,BTStatus); goto exit; } } #endif } else if (strcmp(tmp[0], "wlfk2map") == 0) { EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); if (max_available_size < 1) { err = -EFAULT; goto exit; } if (rtw_efuse_map_write(padapter, 0x00, EFUSE_MAP_SIZE, pEfuseHal->fakeEfuseModifiedMap) == _FAIL) { DBG_871X("%s: rtw_efuse_map_write fakeEfuseModifiedMap error!\n", __FUNCTION__); err = -EFAULT; goto exit; } *extra = 0; DBG_871X("%s: after rtw_BT_efuse_map_write to _rtw_memcmp \n", __FUNCTION__); if ( (rtw_efuse_map_read(padapter, 0x00, EFUSE_MAP_SIZE, ShadowMapWiFi) == _SUCCESS ) ) { if (_rtw_memcmp((void*)ShadowMapWiFi ,(void*)setdata,cnts)) { DBG_871X("%s: WiFi write map afterf compare OK\n", __FUNCTION__); sprintf(extra, "WiFi write map compare OK\n"); err = 0; goto exit; } else { sprintf(extra, "WiFi write map compare FAIL\n"); DBG_871X("%s: WiFi write map compare Fail\n", __FUNCTION__); err = 0; goto exit; } } } else if (strcmp(tmp[0], "wlwfake") == 0) { if ((tmp[1]==NULL) || (tmp[2]==NULL)) { err = -EINVAL; goto exit; } addr = simple_strtoul(tmp[1], &ptmp, 16); addr &= 0xFFF; cnts = strlen(tmp[2]); if (cnts%2) { err = -EINVAL; goto exit; } cnts /= 2; if (cnts == 0) { err = -EINVAL; goto exit; } DBG_871X("%s: addr=0x%X\n", __FUNCTION__, addr); DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); DBG_871X("%s: map tmp data=%s\n", __FUNCTION__, tmp[2]); for (jj=0, kk=0; jjfakeEfuseModifiedMap[addr+jj] = key_2char2num(tmp[2][kk], tmp[2][kk+1]); } } exit: if (setdata) rtw_mfree(setdata, 1024); if (ShadowMapBT) rtw_mfree(ShadowMapBT, EFUSE_BT_MAX_MAP_LEN); if (ShadowMapWiFi) rtw_mfree(ShadowMapWiFi, EFUSE_MAP_SIZE); if (setrawdata) rtw_mfree(setrawdata, EFUSE_MAX_SIZE); wrqu->length = strlen(extra); if (padapter->registrypriv.mp_mode == 0) { #ifdef CONFIG_IPS rtw_pm_set_ips(padapter, ips_mode); #endif // CONFIG_IPS #ifdef CONFIG_LPS rtw_pm_set_lps(padapter, lps_mode); #endif // CONFIG_LPS } return err; } #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_MP_IWPRIV_SUPPORT) /* * Input Format: %s,%d,%d * %s is width, could be * "b" for 1 byte * "w" for WORD (2 bytes) * "dw" for DWORD (4 bytes) * 1st %d is address(offset) * 2st %d is data to write */ static int rtw_mp_write_reg(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { char *pch, *pnext, *ptmp; char *width_str; char width; u32 addr, data; int ret; PADAPTER padapter = rtw_netdev_priv(dev); char input[wrqu->length]; if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; _rtw_memset(extra, 0, wrqu->length); pch = input; pnext = strpbrk(pch, " ,.-"); if (pnext == NULL) return -EINVAL; *pnext = 0; width_str = pch; pch = pnext + 1; pnext = strpbrk(pch, " ,.-"); if (pnext == NULL) return -EINVAL; *pnext = 0; addr = simple_strtoul(pch, &ptmp, 16); if (addr > 0x3FFF) return -EINVAL; pch = pnext + 1; if ((pch - extra) >= wrqu->length) return -EINVAL; data = simple_strtoul(pch, &ptmp, 16); ret = 0; width = width_str[0]; switch (width) { case 'b': // 1 byte if (data > 0xFF) { ret = -EINVAL; break; } rtw_write8(padapter, addr, data); break; case 'w': // 2 bytes if (data > 0xFFFF) { ret = -EINVAL; break; } rtw_write16(padapter, addr, data); break; case 'd': // 4 bytes rtw_write32(padapter, addr, data); break; default: ret = -EINVAL; break; } return ret; } /* * Input Format: %s,%d * %s is width, could be * "b" for 1 byte * "w" for WORD (2 bytes) * "dw" for DWORD (4 bytes) * %d is address(offset) * * Return: * %d for data readed */ static int rtw_mp_read_reg(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { char input[wrqu->length]; char *pch, *pnext, *ptmp; char *width_str; char width; char data[20],tmp[20]; u32 addr; //u32 *data = (u32*)extra; u32 ret, i=0, j=0, strtout=0; PADAPTER padapter = rtw_netdev_priv(dev); if (wrqu->length > 128) return -EFAULT; if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; _rtw_memset(data, 0, 20); _rtw_memset(tmp, 0, 20); _rtw_memset(extra, 0, wrqu->length); pch = input; pnext = strpbrk(pch, " ,.-"); if (pnext == NULL) return -EINVAL; *pnext = 0; width_str = pch; pch = pnext + 1; if ((pch - input) >= wrqu->length) return -EINVAL; addr = simple_strtoul(pch, &ptmp, 16); if (addr > 0x3FFF) return -EINVAL; ret = 0; width = width_str[0]; switch (width) { case 'b': // 1 byte // *(u8*)data = rtw_read8(padapter, addr); sprintf(extra, "%d\n", rtw_read8(padapter, addr)); wrqu->length = strlen(extra); break; case 'w': // 2 bytes //*(u16*)data = rtw_read16(padapter, addr); sprintf(data, "%04x\n", rtw_read16(padapter, addr)); for( i=0 ; i <= strlen(data) ; i++) { if( i%2==0 ) { tmp[j]=' '; j++; } if ( data[i] != '\0' ) tmp[j] = data[i]; j++; } pch = tmp; DBG_871X("pch=%s",pch); while( *pch != '\0' ) { pnext = strpbrk(pch, " "); if (!pnext) break; pnext++; if ( *pnext != '\0' ) { strtout = simple_strtoul (pnext , &ptmp, 16); sprintf( extra, "%s %d" ,extra ,strtout ); } else{ break; } pch = pnext; } wrqu->length = 7; break; case 'd': // 4 bytes //*data = rtw_read32(padapter, addr); sprintf(data, "%08x", rtw_read32(padapter, addr)); //add read data format blank for( i=0 ; i <= strlen(data) ; i++) { if( i%2==0 ) { tmp[j]=' '; j++; } if ( data[i] != '\0' ) tmp[j] = data[i]; j++; } pch = tmp; DBG_871X("pch=%s",pch); while( *pch != '\0' ) { pnext = strpbrk(pch, " "); if (!pnext) break; pnext++; if ( *pnext != '\0' ) { strtout = simple_strtoul (pnext , &ptmp, 16); sprintf( extra, "%s %d" ,extra ,strtout ); } else{ break; } pch = pnext; } wrqu->length = strlen(extra); break; default: wrqu->length = 0; ret = -EINVAL; break; } return ret; } /* * Input Format: %d,%x,%x * %d is RF path, should be smaller than MAX_RF_PATH_NUMS * 1st %x is address(offset) * 2st %x is data to write */ static int rtw_mp_write_rf(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { /*static int rtw_mp_write_rf(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) */ u32 path, addr, data; int ret; PADAPTER padapter = rtw_netdev_priv(dev); char input[wrqu->length]; if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; ret = sscanf(input, "%d,%x,%x", &path, &addr, &data); if (ret < 3) return -EINVAL; if (path >= GET_HAL_RFPATH_NUM(padapter)) return -EINVAL; if (addr > 0xFF) return -EINVAL; if (data > 0xFFFFF) return -EINVAL; _rtw_memset(extra, 0, wrqu->length); write_rfreg(padapter, path, addr, data); sprintf(extra, "write_rf completed \n"); wrqu->length = strlen(extra); return 0; } /* * Input Format: %d,%x * %d is RF path, should be smaller than MAX_RF_PATH_NUMS * %x is address(offset) * * Return: * %d for data readed */ static int rtw_mp_read_rf(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { char input[wrqu->length]; char *pch, *pnext, *ptmp; char data[20],tmp[20]; //u32 *data = (u32*)extra; u32 path, addr; u32 ret,i=0 ,j=0,strtou=0; PADAPTER padapter = rtw_netdev_priv(dev); if (wrqu->length > 128) return -EFAULT; if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; ret = sscanf(input, "%d,%x", &path, &addr); if (ret < 2) return -EINVAL; if (path >= GET_HAL_RFPATH_NUM(padapter)) return -EINVAL; if (addr > 0xFF) return -EINVAL; _rtw_memset(extra, 0, wrqu->length); //*data = read_rfreg(padapter, path, addr); sprintf(data, "%08x", read_rfreg(padapter, path, addr)); //add read data format blank for( i=0 ; i <= strlen(data) ; i++) { if( i%2==0 ) { tmp[j]=' '; j++; } tmp[j] = data[i]; j++; } pch = tmp; DBG_871X("pch=%s",pch); while( *pch != '\0' ) { pnext = strpbrk(pch, " "); if (!pnext) break; pnext++; if ( *pnext != '\0' ) { strtou = simple_strtoul (pnext , &ptmp, 16); sprintf( extra, "%s %d" ,extra ,strtou ); } else{ break; } pch = pnext; } wrqu->length = strlen(extra); return 0; } static int rtw_mp_start(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { u8 val8; PADAPTER padapter = rtw_netdev_priv(dev); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; struct hal_ops *pHalFunc = &padapter->HalFunc; rtw_pm_set_ips(padapter,IPS_NONE); LeaveAllPowerSaveMode(padapter); if(padapter->registrypriv.mp_mode ==0) { #ifdef CONFIG_BT_COEXIST pdmpriv->DMFlag &= ~DYNAMIC_FUNC_BT; #endif pHalFunc->hal_deinit(padapter); padapter->registrypriv.mp_mode =1; pHalFunc->hal_init(padapter); rtw_pm_set_ips(padapter,IPS_NONE); LeaveAllPowerSaveMode(padapter); } if (padapter->registrypriv.mp_mode == 0) return -EPERM; if (padapter->mppriv.mode == MP_OFF) { if (mp_start_test(padapter) == _FAIL) return -EPERM; padapter->mppriv.mode = MP_ON; MPT_PwrCtlDM(padapter,0); } padapter->mppriv.bmac_filter = _FALSE; #ifdef CONFIG_RTL8723B #ifdef CONFIG_USB_HCI rtw_write32(padapter, 0x765, 0x0000); rtw_write32(padapter, 0x948, 0x0280); #else rtw_write32(padapter, 0x765, 0x0000); rtw_write32(padapter, 0x948, 0x0000); #endif #ifdef CONFIG_FOR_RTL8723BS_VQ0 rtw_write32(padapter, 0x765, 0x0000); rtw_write32(padapter, 0x948, 0x0280); #endif rtw_write8(padapter, 0x66, 0x27); //Open BT uart Log rtw_write8(padapter, 0xc50, 0x20); //for RX init Gain #endif ODM_Write_DIG(&pHalData->odmpriv,0x20); return 0; } static int rtw_mp_stop(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { PADAPTER padapter = rtw_netdev_priv(dev); struct hal_ops *pHalFunc = &padapter->HalFunc; if(padapter->registrypriv.mp_mode ==1) { MPT_DeInitAdapter(padapter); pHalFunc->hal_deinit(padapter); padapter->registrypriv.mp_mode=0; pHalFunc->hal_init(padapter); } if (padapter->mppriv.mode != MP_OFF) { mp_stop_test(padapter); padapter->mppriv.mode = MP_OFF; } return 0; } extern int wifirate2_ratetbl_inx(unsigned char rate); static int rtw_mp_rate(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { u32 rate = MPT_RATE_1M; u8 input[wrqu->length]; PADAPTER padapter = rtw_netdev_priv(dev); if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; rate = rtw_mpRateParseFunc(padapter,input); if (rate ==0 && strcmp(input,"1M")!=0) { rate = rtw_atoi(input); if(rate <= 0x7f) rate = wifirate2_ratetbl_inx( (u8)rate); else if (rate < 0xC8) rate =(rate - 0x80 + MPT_RATE_MCS0); //HT rate 0x80(MCS0) ~ 0x8F(MCS15) ~ 0x9F(MCS31) 128~159 //VHT1SS~2SS rate 0xA0 (VHT1SS_MCS0 44) ~ 0xB3 (VHT2SS_MCS9 #63) 160~179 //VHT rate 0xB4 (VHT3SS_MCS0 64) ~ 0xC7 (VHT2SS_MCS9 #83) 180~199 //else //VHT rate 0x90(VHT1SS_MCS0) ~ 0x99(VHT1SS_MCS9) 144~153 // rate =(rate - MPT_RATE_VHT1SS_MCS0); } _rtw_memset(extra, 0, wrqu->length); sprintf( extra, "Set data rate to %s index %d" ,input,rate ); DBG_871X("%s: %s rate index=%d \n", __func__,input,rate); if (rate >= MPT_RATE_LAST ) return -EINVAL; padapter->mppriv.rateidx = rate; Hal_SetDataRate(padapter); wrqu->length = strlen(extra); return 0; } static int rtw_mp_channel(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { PADAPTER padapter = rtw_netdev_priv(dev); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); u8 input[wrqu->length]; u32 channel = 1; int cur_ch_offset; if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; channel = rtw_atoi(input); //DBG_871X("%s: channel=%d\n", __func__, channel); _rtw_memset(extra, 0, wrqu->length); sprintf( extra, "Change channel %d to channel %d", padapter->mppriv.channel , channel ); padapter->mppriv.channel = channel; Hal_SetChannel(padapter); pHalData->CurrentChannel = channel; wrqu->length = strlen(extra); return 0; } static int rtw_mp_bandwidth(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { u32 bandwidth=0, sg=0; int cur_ch_offset; //u8 buffer[40]; PADAPTER padapter = rtw_netdev_priv(dev); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); //if (copy_from_user(buffer, (void*)wrqu->data.pointer, wrqu->data.length)) // return -EFAULT; //DBG_871X("%s:iwpriv in=%s\n", __func__, extra); sscanf(extra, "40M=%d,shortGI=%d", &bandwidth, &sg); if (bandwidth == 1) bandwidth=CHANNEL_WIDTH_40; else if (bandwidth == 2) bandwidth=CHANNEL_WIDTH_80; DBG_871X("%s: bw=%d sg=%d \n", __func__, bandwidth , sg); padapter->mppriv.bandwidth = (u8)bandwidth; padapter->mppriv.preamble = sg; SetBandwidth(padapter); pHalData->CurrentChannelBW = bandwidth; //cur_ch_offset = rtw_get_offset_by_ch(padapter->mppriv.channel); //set_channel_bwmode(padapter, padapter->mppriv.channel, cur_ch_offset, bandwidth); return 0; } static int rtw_mp_txpower_index(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { PADAPTER padapter = rtw_netdev_priv(dev); char input[wrqu->length]; u32 rfpath; u32 txpower_inx; if (wrqu->length > 128) return -EFAULT; if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; rfpath = rtw_atoi(input); txpower_inx = mpt_ProQueryCalTxPower(padapter, rfpath); sprintf(extra, " %d", txpower_inx); wrqu->length = strlen(extra); return 0; } static int rtw_mp_txpower(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { u32 idx_a=0,idx_b=0,MsetPower=1; u8 input[wrqu->length]; PADAPTER padapter = rtw_netdev_priv(dev); if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; MsetPower = strncmp(input, "off", 3); sscanf(input,"patha=%d,pathb=%d",&idx_a,&idx_b); //DBG_871X("%s: tx_pwr_idx_a=%x b=%x\n", __func__, idx_a, idx_b); if(MsetPower==0) { padapter->mppriv.bSetTxPower = 0; sprintf( extra, "MP Set power off"); } else { sprintf( extra, "Set power level path_A:%d path_B:%d", idx_a , idx_b ); padapter->mppriv.txpoweridx = (u8)idx_a; padapter->mppriv.txpoweridx_b = (u8)idx_b; padapter->mppriv.bSetTxPower = 1; Hal_SetAntennaPathPower(padapter); } wrqu->length = strlen(extra); return 0; } static int rtw_mp_ant_tx(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { u8 i; u8 input[wrqu->length]; u16 antenna = 0; PADAPTER padapter = rtw_netdev_priv(dev); if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; //DBG_871X("%s: input=%s\n", __func__, input); sprintf( extra, "switch Tx antenna to %s", input); for (i=0; i < strlen(input); i++) { switch(input[i]) { case 'a' : antenna|=ANTENNA_A; break; case 'b': antenna|=ANTENNA_B; break; } } //antenna |= BIT(extra[i]-'a'); //DBG_871X("%s: antenna=0x%x\n", __func__, antenna); padapter->mppriv.antenna_tx = antenna; padapter->mppriv.antenna_rx = antenna; //DBG_871X("%s:mppriv.antenna_rx=%d\n", __func__, padapter->mppriv.antenna_tx); Hal_SetAntenna(padapter); wrqu->length = strlen(extra); return 0; } static int rtw_mp_ant_rx(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { u8 i; u16 antenna = 0; u8 input[wrqu->length]; PADAPTER padapter = rtw_netdev_priv(dev); if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; //DBG_871X("%s: input=%s\n", __func__, input); _rtw_memset(extra, 0, wrqu->length); sprintf( extra, "switch Rx antenna to %s", input ); for (i=0; i < strlen(input); i++) { switch( input[i] ) { case 'a' : antenna|=ANTENNA_A; break; case 'b': antenna|=ANTENNA_B; break; case 'c' : antenna|=ANTENNA_C; break; } } //DBG_871X("%s: antenna=0x%x\n", __func__, antenna); padapter->mppriv.antenna_tx = antenna; padapter->mppriv.antenna_rx = antenna; //DBG_871X("%s:mppriv.antenna_rx=%d\n", __func__, padapter->mppriv.antenna_rx); Hal_SetAntenna(padapter); wrqu->length = strlen(extra); return 0; } static int rtw_mp_ctx(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { u32 pkTx = 1, countPkTx = 1, cotuTx = 1, CarrSprTx = 1, scTx = 1, sgleTx = 1, stop = 1; u32 bStartTest = 1; u32 count = 0,pktinterval=0; struct mp_priv *pmp_priv; struct pkt_attrib *pattrib; PADAPTER padapter = rtw_netdev_priv(dev); pmp_priv = &padapter->mppriv; if (copy_from_user(extra, wrqu->pointer, wrqu->length)) return -EFAULT; DBG_871X("%s: in=%s\n", __func__, extra); countPkTx = strncmp(extra, "count=", 5); // strncmp TRUE is 0 cotuTx = strncmp(extra, "background", 20); CarrSprTx = strncmp(extra, "background,cs", 20); scTx = strncmp(extra, "background,sc", 20); sgleTx = strncmp(extra, "background,stone", 20); pkTx = strncmp(extra, "background,pkt", 20); stop = strncmp(extra, "stop", 4); sscanf(extra, "count=%d,pkt", &count); sscanf(extra, "pktinterval=%d", &pktinterval); //DBG_871X("%s: count=%d countPkTx=%d cotuTx=%d CarrSprTx=%d scTx=%d sgleTx=%d pkTx=%d stop=%d\n", __func__, count, countPkTx, cotuTx, CarrSprTx, pkTx, sgleTx, scTx, stop); _rtw_memset(extra, '\0', sizeof(extra)); if( pktinterval !=0 ) { sprintf( extra, "Pkt Interval = %d",pktinterval); padapter->mppriv.pktInterval = pktinterval; wrqu->length = strlen(extra); return 0; } if (stop == 0) { bStartTest = 0; // To set Stop pmp_priv->tx.stop = 1; sprintf( extra, "Stop continuous Tx"); } else { bStartTest = 1; if (pmp_priv->mode != MP_ON) { if (pmp_priv->tx.stop != 1) { DBG_871X("%s: MP_MODE != ON %d\n", __func__, pmp_priv->mode); return -EFAULT; } } } if (pkTx == 0 || countPkTx == 0) pmp_priv->mode = MP_PACKET_TX; if (sgleTx == 0) pmp_priv->mode = MP_SINGLE_TONE_TX; if (cotuTx == 0) pmp_priv->mode = MP_CONTINUOUS_TX; if (CarrSprTx == 0) pmp_priv->mode = MP_CARRIER_SUPPRISSION_TX; if (scTx == 0) pmp_priv->mode = MP_SINGLE_CARRIER_TX; switch (pmp_priv->mode) { case MP_PACKET_TX: //DBG_871X("%s:pkTx %d\n", __func__,bStartTest); if (bStartTest == 0) { pmp_priv->tx.stop = 1; pmp_priv->mode = MP_ON; sprintf( extra, "Stop continuous Tx"); } else if (pmp_priv->tx.stop == 1) { sprintf( extra, "Start continuous DA=ffffffffffff len=1500 count=%u,\n",count); //DBG_871X("%s:countPkTx %d\n", __func__,count); pmp_priv->tx.stop = 0; pmp_priv->tx.count = count; pmp_priv->tx.payload = 2; #ifdef CONFIG_80211N_HT pmp_priv->tx.attrib.ht_en = 1; #endif #ifdef CONFIG_80211AC_VHT pmp_priv->tx.attrib.raid = RATEID_IDX_VHT_1SS; //10 #endif pattrib = &pmp_priv->tx.attrib; pattrib->pktlen = 1000; _rtw_memset(pattrib->dst, 0xFF, ETH_ALEN); SetPacketTx(padapter); } else { //DBG_871X("%s: pkTx not stop\n", __func__); return -EFAULT; } wrqu->length = strlen(extra); return 0; case MP_SINGLE_TONE_TX: //DBG_871X("%s: sgleTx %d \n", __func__, bStartTest); if (bStartTest != 0){ sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes."); } Hal_SetSingleToneTx(padapter, (u8)bStartTest); break; case MP_CONTINUOUS_TX: //DBG_871X("%s: cotuTx %d\n", __func__, bStartTest); if (bStartTest != 0){ sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes."); } Hal_SetContinuousTx(padapter, (u8)bStartTest); break; case MP_CARRIER_SUPPRISSION_TX: //DBG_871X("%s: CarrSprTx %d\n", __func__, bStartTest); if (bStartTest != 0){ if( pmp_priv->rateidx <= MPT_RATE_11M ) { sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes."); }else sprintf( extra, "Specify carrier suppression but not CCK rate"); } Hal_SetCarrierSuppressionTx(padapter, (u8)bStartTest); break; case MP_SINGLE_CARRIER_TX: //DBG_871X("%s: scTx %d\n", __func__, bStartTest); if (bStartTest != 0){ sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes."); } Hal_SetSingleCarrierTx(padapter, (u8)bStartTest); break; default: //DBG_871X("%s:No Match MP_MODE\n", __func__); sprintf( extra, "Error! Continuous-Tx is not on-going."); return -EFAULT; } if ( bStartTest==1 && pmp_priv->mode != MP_ON) { struct mp_priv *pmp_priv = &padapter->mppriv; if (pmp_priv->tx.stop == 0) { pmp_priv->tx.stop = 1; //DBG_871X("%s: pkt tx is running...\n", __func__); rtw_msleep_os(5); } #ifdef CONFIG_80211N_HT pmp_priv->tx.attrib.ht_en = 1; #endif #ifdef CONFIG_80211AC_VHT pmp_priv->tx.attrib.raid = RATEID_IDX_VHT_1SS; //10 #endif pmp_priv->tx.stop = 0; pmp_priv->tx.count = 1; SetPacketTx(padapter); } else { pmp_priv->mode = MP_ON; } wrqu->length = strlen(extra); return 0; } static int rtw_mp_disable_bt_coexist(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { PADAPTER padapter = (PADAPTER)rtw_netdev_priv(dev); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; struct hal_ops *pHalFunc = &padapter->HalFunc; u8 input[wrqu->data.length]; u32 bt_coexist; if (copy_from_user(input, wrqu->data.pointer, wrqu->data.length)) return -EFAULT; bt_coexist = rtw_atoi(input); if( bt_coexist == 0 ) { RT_TRACE(_module_mp_, _drv_info_, ("Set OID_RT_SET_DISABLE_BT_COEXIST: disable BT_COEXIST\n")); DBG_871X("Set OID_RT_SET_DISABLE_BT_COEXIST: disable BT_COEXIST\n"); #ifdef CONFIG_BT_COEXIST rtw_btcoex_HaltNotify(padapter); rtw_btcoex_SetManualControl(padapter, _TRUE); pdmpriv->DMFlag &= ~DYNAMIC_FUNC_BT; // Force to switch Antenna to WiFi rtw_write16(padapter, 0x870, 0x300); rtw_write16(padapter, 0x860, 0x110); #endif // CONFIG_BT_COEXIST } else { RT_TRACE(_module_mp_, _drv_info_, ("Set OID_RT_SET_DISABLE_BT_COEXIST: enable BT_COEXIST\n")); #ifdef CONFIG_BT_COEXIST pdmpriv->DMFlag |= DYNAMIC_FUNC_BT; rtw_btcoex_SetManualControl(padapter, _FALSE); #endif } return 0; } static int rtw_mp_arx(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { u8 bStartRx=0,bStopRx=0,bQueryPhy=0,bQueryMac=0,bSetBssid=0; u8 bmac_filter = 0,bfilter_init=0; u32 cckok=0,cckcrc=0,ofdmok=0,ofdmcrc=0,htok=0,htcrc=0,OFDM_FA=0,CCK_FA=0,DropPacket=0,vht_ok=0,vht_err=0; u32 mac_cck_ok=0, mac_ofdm_ok=0, mac_ht_ok=0, mac_vht_ok=0; u32 mac_cck_err=0, mac_ofdm_err=0, mac_ht_err=0, mac_vht_err=0; u8 input[wrqu->length]; char *pch, *ptmp, *token, *tmp[2]={0x00,0x00}; u32 i=0,ii=0,jj=0,kk=0,cnts=0,bmon=0; PADAPTER padapter = rtw_netdev_priv(dev); struct mp_priv *pmppriv = &padapter->mppriv; if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; DBG_871X("%s: %s\n", __func__, input); bStartRx = (strncmp(input, "start", 5)==0)?1:0; // strncmp TRUE is 0 bStopRx = (strncmp(input, "stop", 5)==0)?1:0; // strncmp TRUE is 0 bQueryPhy = (strncmp(input, "phy", 3)==0)?1:0; // strncmp TRUE is 0 bQueryMac = (strncmp(input, "mac", 3)==0)?1:0; // strncmp TRUE is 0 bSetBssid = (strncmp(input, "setbssid=", 8)==0)?1:0; // strncmp TRUE is 0 //bfilter_init = (strncmp(input, "filter_init",11)==0)?1:0; bmac_filter = (strncmp(input, "accept_mac",10)==0)?1:0; bmon = (strncmp(input, "mon=",4)==0)?1:0; if(bSetBssid==1){ pch = input; while ((token = strsep(&pch, "=")) != NULL) { if (i > 1) break; tmp[i] = token; i++; } if ((tmp[0]==NULL) && (tmp[1]==NULL)){ return -EFAULT; } else{ cnts = strlen(tmp[1])/2; if (cnts<1) return -EFAULT; DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); DBG_871X("%s: data=%s\n", __FUNCTION__, tmp[1]); for (jj=0, kk=0; jj < cnts ; jj++, kk+=2){ pmppriv->network_macaddr[jj] = key_2char2num(tmp[1][kk], tmp[1][kk+1]); DBG_871X("network_macaddr[%d]=%x \n",jj, pmppriv->network_macaddr[jj]); } } pmppriv->bSetRxBssid = _TRUE; } if(bmac_filter) { pmppriv->bmac_filter = bmac_filter; pch = input; while ((token = strsep(&pch, "=")) != NULL) { if (i > 1) break; tmp[i] = token; i++; } if ((tmp[0]==NULL) && (tmp[1]==NULL)){ return -EFAULT; } else{ cnts = strlen(tmp[1])/2; if (cnts<1) return -EFAULT; DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); DBG_871X("%s: data=%s\n", __FUNCTION__, tmp[1]); for (jj=0, kk=0; jj < cnts ; jj++, kk+=2){ pmppriv->mac_filter[jj] = key_2char2num(tmp[1][kk], tmp[1][kk+1]); DBG_871X("%s mac_filter[%d]=%x \n",__FUNCTION__,jj, pmppriv->mac_filter[jj]); } } } if(bStartRx) { sprintf( extra, "start"); SetPacketRx(padapter, bStartRx); } else if(bStopRx) { SetPacketRx(padapter, 0); pmppriv->bmac_filter = _FALSE; sprintf( extra, "Received packet OK:%d CRC error:%d ,Filter out:%d",padapter->mppriv.rx_pktcount,padapter->mppriv.rx_crcerrpktcount,padapter->mppriv.rx_pktcount_filter_out); } else if(bQueryPhy) { if (IS_HARDWARE_TYPE_JAGUAR(padapter)) { cckok = PHY_QueryBBReg(padapter, 0xF04, 0x3FFF); // [13:0] ofdmok = PHY_QueryBBReg(padapter, 0xF14, 0x3FFF); // [13:0] htok = PHY_QueryBBReg(padapter, 0xF10, 0x3FFF); // [13:0] vht_ok = PHY_QueryBBReg(padapter, 0xF0C, 0x3FFF); // [13:0] cckcrc = PHY_QueryBBReg(padapter, 0xF04, 0x3FFF0000); // [29:16] ofdmcrc = PHY_QueryBBReg(padapter, 0xF14, 0x3FFF0000); // [29:16] htcrc = PHY_QueryBBReg(padapter, 0xF10, 0x3FFF0000); // [29:16] vht_err = PHY_QueryBBReg(padapter, 0xF0C, 0x3FFF0000); // [29:16] CCK_FA = PHY_QueryBBReg(padapter, 0xa5c, bMaskLWord); OFDM_FA = PHY_QueryBBReg(padapter, 0xF48, bMaskLWord); } else { cckok = PHY_QueryBBReg(padapter, 0xF88, bMaskDWord); ofdmok = PHY_QueryBBReg(padapter, 0xF94, bMaskLWord); htok = PHY_QueryBBReg(padapter, 0xF90, bMaskLWord); vht_ok = 0; cckcrc = PHY_QueryBBReg(padapter, 0xF84, bMaskDWord); ofdmcrc = PHY_QueryBBReg(padapter, 0xF94, bMaskHWord); htcrc = PHY_QueryBBReg(padapter, 0xF90, bMaskHWord); vht_err = 0; OFDM_FA = PHY_QueryBBReg(padapter, 0xCF0, bMaskLWord) + PHY_QueryBBReg(padapter, 0xCF2, bMaskLWord) + PHY_QueryBBReg(padapter, 0xDA2, bMaskLWord)+ PHY_QueryBBReg(padapter, 0xDA4, bMaskLWord) + PHY_QueryBBReg(padapter, 0xDA6, bMaskLWord) + PHY_QueryBBReg(padapter, 0xDA8, bMaskLWord); CCK_FA=(rtw_read8(padapter, 0xa5b )<<8 ) | (rtw_read8(padapter, 0xa5c)); } DBG_871X("%s: OFDM_FA =%d\n", __FUNCTION__, OFDM_FA); DBG_871X("%s: CCK_FA =%d\n", __FUNCTION__, CCK_FA); sprintf( extra, "Phy Received packet OK:%d CRC error:%d FA Counter: %d",cckok+ofdmok+htok+vht_ok,cckcrc+ofdmcrc+htcrc+vht_err,OFDM_FA+CCK_FA); } else if(bQueryMac) { // for 8723A { PHY_SetMacReg(padapter, 0x664, BIT28|BIT29|BIT30|BIT31, 0x3); mac_cck_ok = PHY_QueryMacReg(padapter, 0x664, bMaskLWord); // [15:0] PHY_SetMacReg(padapter, 0x664, BIT28|BIT29|BIT30|BIT31, 0x0); mac_ofdm_ok = PHY_QueryMacReg(padapter, 0x664, bMaskLWord); // [15:0] PHY_SetMacReg(padapter, 0x664, BIT28|BIT29|BIT30|BIT31, 0x6); mac_ht_ok = PHY_QueryMacReg(padapter, 0x664, bMaskLWord); // [15:0] mac_vht_ok = 0; PHY_SetMacReg(padapter, 0x664, BIT28|BIT29|BIT30|BIT31, 0x4); mac_cck_err = PHY_QueryMacReg(padapter, 0x664, bMaskLWord); // [15:0] PHY_SetMacReg(padapter, 0x664, BIT28|BIT29|BIT30|BIT31, 0x1); mac_ofdm_err = PHY_QueryMacReg(padapter, 0x664, bMaskLWord); // [15:0] PHY_SetMacReg(padapter, 0x664, BIT28|BIT29|BIT30|BIT31, 0x7); mac_ht_err = PHY_QueryMacReg(padapter, 0x664, bMaskLWord); // [15:0] mac_vht_err = 0; //Mac_DropPacket rtw_write32(padapter, 0x664, (rtw_read32(padapter, 0x0664)& 0x0FFFFFFF)| Mac_DropPacket); DropPacket = rtw_read32(padapter, 0x664)& 0x0000FFFF; } sprintf( extra, "Mac Received packet OK: %d , CRC error: %d , Drop Packets: %d\n", mac_cck_ok+mac_ofdm_ok+mac_ht_ok+mac_vht_ok,mac_cck_err+mac_ofdm_err+mac_ht_err+mac_vht_err,DropPacket); } if( bmon==1 ) { sscanf(input, "mon=%d", &bmon); if(bmon==1) { pmppriv->rx_bindicatePkt= _TRUE; sprintf( extra, "Indicating Receive Packet to network start\n"); }else { pmppriv->rx_bindicatePkt= _FALSE; sprintf( extra, "Indicating Receive Packet to network Stop\n"); } } wrqu->length = strlen(extra) + 1; return 0; } static int rtw_mp_trx_query(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { u32 txok,txfail,rxok,rxfail,rxfilterout; PADAPTER padapter = rtw_netdev_priv(dev); //if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) // return -EFAULT; txok=padapter->mppriv.tx.sended; txfail=0; rxok = padapter->mppriv.rx_pktcount; rxfail = padapter->mppriv.rx_crcerrpktcount; rxfilterout = padapter->mppriv.rx_pktcount_filter_out; _rtw_memset(extra, '\0', 128); sprintf(extra, "Tx OK:%d, Tx Fail:%d, Rx OK:%d, CRC error:%d ,Rx Filter out:%d \n", txok, txfail,rxok,rxfail,rxfilterout); wrqu->length=strlen(extra)+1; return 0; } static int rtw_mp_pwrtrk(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { u8 enable; u32 thermal; s32 ret; PADAPTER padapter = rtw_netdev_priv(dev); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); u8 input[wrqu->length]; if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; _rtw_memset(extra, 0, wrqu->length); enable = 1; if (wrqu->length > 1) { // not empty string if (strncmp(input, "stop", 4) == 0) { enable = 0; sprintf(extra, "mp tx power tracking stop"); pHalData->TxPowerTrackControl = _FALSE; } else if (sscanf(input, "ther=%d", &thermal)) { pHalData->TxPowerTrackControl = _TRUE; ret = Hal_SetThermalMeter(padapter, (u8)thermal); if (ret == _FAIL) return -EPERM; sprintf(extra, "mp tx power tracking start,target value=%d ok ",thermal); }else{ return -EINVAL; } } ret = Hal_SetPowerTracking(padapter, enable); if (ret == _FAIL) return -EPERM; wrqu->length = strlen(extra); return 0; } static int rtw_mp_psd(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { PADAPTER padapter = rtw_netdev_priv(dev); u8 input[wrqu->length]; if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; strcpy(extra,input); wrqu->length = mp_query_psd(padapter, extra); return 0; } static int rtw_mp_thermal(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { u8 val; int bwrite=1; #ifdef CONFIG_RTL8192C u16 addr=EEPROM_THERMAL_METER_92C; #endif #ifdef CONFIG_RTL8192D u16 addr=EEPROM_THERMAL_METER_92D; #endif #ifdef CONFIG_RTL8723A u16 addr=EEPROM_THERMAL_METER_8723A; #endif #ifdef CONFIG_RTL8188E u16 addr=EEPROM_THERMAL_METER_88E; #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) u16 addr=EEPROM_THERMAL_METER_8812; #endif #ifdef CONFIG_RTL8192E u16 addr=EEPROM_THERMAL_METER_8192E; #endif #ifdef CONFIG_RTL8723B u16 addr=EEPROM_THERMAL_METER_8723B; #endif u16 cnt=1; u16 max_available_size=0; PADAPTER padapter = rtw_netdev_priv(dev); if (copy_from_user(extra, wrqu->pointer, wrqu->length)) return -EFAULT; //DBG_871X("print extra %s \n",extra); bwrite = strncmp(extra, "write", 6); // strncmp TRUE is 0 Hal_GetThermalMeter(padapter, &val); if( bwrite == 0 ) { //DBG_871X("to write val:%d",val); EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); if( 2 > max_available_size ) { DBG_871X("no available efuse!\n"); return -EFAULT; } if ( rtw_efuse_map_write(padapter, addr, cnt, &val) == _FAIL ) { DBG_871X("rtw_efuse_map_write error \n"); return -EFAULT; } else { sprintf(extra, " efuse write ok :%d", val); } } else { sprintf(extra, "%d", val); } wrqu->length = strlen(extra); return 0; } static int rtw_mp_reset_stats(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { struct mp_priv *pmp_priv; struct pkt_attrib *pattrib; PADAPTER padapter = rtw_netdev_priv(dev); pmp_priv = &padapter->mppriv; pmp_priv->tx.sended = 0; pmp_priv->tx_pktcount = 0; pmp_priv->rx_pktcount = 0; pmp_priv->rx_pktcount_filter_out=0; pmp_priv->rx_crcerrpktcount = 0; //reset phy counter if (IS_HARDWARE_TYPE_JAGUAR(padapter)) { write_bbreg(padapter, 0xB58, BIT0, 0x1); write_bbreg(padapter, 0xB58, BIT0, 0x0); write_bbreg(padapter, 0x9A4, BIT17, 0x1);//reset OFDA FA counter write_bbreg(padapter, 0x9A4, BIT17, 0x0); write_bbreg(padapter, 0xA5C, BIT15, 0x0);//reset CCK FA counter write_bbreg(padapter, 0xA5C, BIT15, 0x1); } else { write_bbreg(padapter, 0xF14, BIT16, 0x1); rtw_msleep_os(10); write_bbreg(padapter, 0xF14, BIT16, 0x0); write_bbreg(padapter, 0xD00, BIT27, 0x1);//reset OFDA FA counter write_bbreg(padapter, 0xC0C, BIT31, 0x1);//reset OFDA FA counter write_bbreg(padapter, 0xD00, BIT27, 0x0); write_bbreg(padapter, 0xC0C, BIT31, 0x0); write_bbreg(padapter, 0xA2C, BIT15, 0x0);//reset CCK FA counter write_bbreg(padapter, 0xA2C, BIT15, 0x1); } //reset mac counter PHY_SetMacReg(padapter, 0x664, BIT27, 0x1); PHY_SetMacReg(padapter, 0x664, BIT27, 0x0); return 0; } static int rtw_mp_dump(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { struct mp_priv *pmp_priv; struct pkt_attrib *pattrib; u32 value; u8 input[wrqu->length]; u8 rf_type,path_nums = 0; u32 i,j=1,path; PADAPTER padapter = rtw_netdev_priv(dev); pmp_priv = &padapter->mppriv; if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; if ( strncmp(input, "all", 4)==0 ) { mac_reg_dump(RTW_DBGDUMP, padapter); bb_reg_dump(RTW_DBGDUMP, padapter); rf_reg_dump(RTW_DBGDUMP, padapter); } return 0; } static int rtw_mp_phypara(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { PADAPTER padapter = rtw_netdev_priv(dev); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); char input[wrqu->length]; u32 valxcap; if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; DBG_871X("%s:iwpriv in=%s\n", __func__, input); sscanf(input, "xcap=%d", &valxcap); pHalData->CrystalCap = (u8)valxcap; Hal_ProSetCrystalCap( padapter , valxcap ); sprintf( extra, "Set xcap=%d",valxcap ); wrqu->length = strlen(extra) + 1; return 0; } static int rtw_mp_SetRFPath(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { PADAPTER padapter = rtw_netdev_priv(dev); char input[wrqu->data.length]; s32 bMain=1,bTurnoff=1; if (copy_from_user(input, wrqu->data.pointer, wrqu->data.length)) return -EFAULT; DBG_871X("%s:iwpriv in=%s\n", __func__, input); bMain = strncmp(input, "1", 2); // strncmp TRUE is 0 bTurnoff = strncmp(input, "0", 3); // strncmp TRUE is 0 if(bMain==0) { MP_PHY_SetRFPathSwitch(padapter,_TRUE); DBG_871X("%s:PHY_SetRFPathSwitch=TRUE\n", __func__); } else if(bTurnoff==0) { MP_PHY_SetRFPathSwitch(padapter,_FALSE); DBG_871X("%s:PHY_SetRFPathSwitch=FALSE\n", __func__); } return 0; } static int rtw_mp_QueryDrv(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { PADAPTER padapter = rtw_netdev_priv(dev); char input[wrqu->data.length]; s32 qAutoLoad=1; EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); if (copy_from_user(input, wrqu->data.pointer, wrqu->data.length)) return -EFAULT; DBG_871X("%s:iwpriv in=%s\n", __func__, input); qAutoLoad = strncmp(input, "autoload", 8); // strncmp TRUE is 0 if(qAutoLoad==0) { DBG_871X("%s:qAutoLoad\n", __func__); if(pEEPROM->bautoload_fail_flag) sprintf(extra, "fail"); else sprintf(extra, "ok"); } wrqu->data.length = strlen(extra) + 1; return 0; } /* update Tx AGC offset */ static int rtw_mp_antBdiff(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { // MPT_ProSetTxAGCOffset return 0; } static int rtw_mp_PwrCtlDM(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) { PADAPTER padapter = rtw_netdev_priv(dev); u8 input[wrqu->length]; int bstart=1; if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; bstart = strncmp(input, "start", 5); // strncmp TRUE is 0 if(bstart==0){ sprintf(extra, "PwrCtlDM start \n"); MPT_PwrCtlDM(padapter,1); }else{ sprintf(extra, "PwrCtlDM stop \n"); MPT_PwrCtlDM(padapter,0); } wrqu->length = strlen(extra); return 0; } #if (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) /* update Tx AGC offset */ static int rtw_mp_SetBT(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { PADAPTER padapter = rtw_netdev_priv(dev); struct hal_ops *pHalFunc = &padapter->HalFunc; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); BT_REQ_CMD BtReq; PMPT_CONTEXT pMptCtx=&(padapter->mppriv.MptCtx); PBT_RSP_CMD pBtRsp=(PBT_RSP_CMD)&pMptCtx->mptOutBuf[0]; char input[128]; char *pch, *ptmp, *token, *tmp[2]={0x00,0x00}; u8 setdata[100]; u8 resetbt=0x00; u8 tempval,BTStatus; u8 H2cSetbtmac[6]; u8 u1H2CBtMpOperParm[4]={0x01}; u16 testmode=1,ready=1,trxparam=1,setgen=1,getgen=1,testctrl=1,testbt=1,readtherm=1,setbtmac=1; u32 i=0,ii=0,jj=0,kk=0,cnts=0,status=0; PRT_MP_FIRMWARE pBTFirmware = NULL; if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) return -EFAULT; if(strlen(extra)<1) return -EFAULT; DBG_871X("%s:iwpriv in=%s\n", __FUNCTION__, extra); ready = strncmp(extra, "ready", 5); testmode = strncmp(extra, "testmode", 8); // strncmp TRUE is 0 trxparam = strncmp(extra, "trxparam", 8); setgen = strncmp(extra, "setgen", 6); getgen = strncmp(extra, "getgen", 6); testctrl = strncmp(extra, "testctrl", 8); testbt = strncmp(extra, "testbt", 6); readtherm = strncmp(extra, "readtherm", 9); setbtmac = strncmp(extra, "setbtmac", 8); if ( strncmp(extra, "dlbt", 4) == 0) { pHalData->LastHMEBoxNum=0; padapter->bBTFWReady = _FALSE; rtw_write8(padapter, 0xa3, 0x05); BTStatus=rtw_read8(padapter, 0xa0); DBG_871X("%s: btwmap before read 0xa0 BT Status =0x%x \n", __FUNCTION__,BTStatus); if (BTStatus != 0x04) { sprintf(extra, "BT Status not Active DLFW FAIL\n"); goto exit; } tempval = rtw_read8(padapter, 0x6B); tempval |= BIT7; rtw_write8(padapter, 0x6B, tempval); // Attention!! Between 0x6A[14] and 0x6A[15] setting need 100us delay // So don't wirte 0x6A[14]=1 and 0x6A[15]=0 together! rtw_usleep_os(100); // disable BT power cut // 0x6A[14] = 0 tempval = rtw_read8(padapter, 0x6B); tempval &= ~BIT6; rtw_write8(padapter, 0x6B, tempval); rtw_usleep_os(100); MPT_PwrCtlDM(padapter,0); rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc)| 0x00000004)); rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b)& 0xFFFFFFEF)); rtw_msleep_os(600); rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b)| 0x00000010)); rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc)& 0xFFFFFFFB)); rtw_msleep_os(1200); pBTFirmware = (PRT_MP_FIRMWARE)rtw_zmalloc(sizeof(RT_MP_FIRMWARE)); if(pBTFirmware==NULL) goto exit; padapter->bBTFWReady = _FALSE; FirmwareDownloadBT(padapter, pBTFirmware); if (pBTFirmware) rtw_mfree((u8*)pBTFirmware, sizeof(RT_MP_FIRMWARE)); DBG_871X("Wait for FirmwareDownloadBT fw boot!\n"); rtw_msleep_os(2000); _rtw_memset(extra,'\0', wrqu->data.length); BtReq.opCodeVer = 1; BtReq.OpCode = 0; BtReq.paraLength = 0; mptbt_BtControlProcess(padapter, &BtReq); rtw_msleep_os(100); DBG_8192C("FirmwareDownloadBT ready = 0x%x 0x%x", pMptCtx->mptOutBuf[4],pMptCtx->mptOutBuf[5]); if( (pMptCtx->mptOutBuf[4]==0x00) && (pMptCtx->mptOutBuf[5]==0x00)) { if(padapter->mppriv.bTxBufCkFail==_TRUE) sprintf(extra, "check TxBuf Fail.\n"); else sprintf(extra, "download FW Fail.\n"); } else { sprintf(extra, "download FW OK.\n"); goto exit; } goto exit; goto exit; } if ( strncmp(extra, "dlfw", 4) == 0) { pHalData->LastHMEBoxNum=0; padapter->bBTFWReady = _FALSE; rtw_write8(padapter, 0xa3, 0x05); BTStatus=rtw_read8(padapter, 0xa0); DBG_871X("%s: btwmap before read 0xa0 BT Status =0x%x \n", __FUNCTION__,BTStatus); if (BTStatus != 0x04) { sprintf(extra, "BT Status not Active DLFW FAIL\n"); goto exit; } tempval = rtw_read8(padapter, 0x6B); tempval |= BIT7; rtw_write8(padapter, 0x6B, tempval); // Attention!! Between 0x6A[14] and 0x6A[15] setting need 100us delay // So don't wirte 0x6A[14]=1 and 0x6A[15]=0 together! rtw_usleep_os(100); // disable BT power cut // 0x6A[14] = 0 tempval = rtw_read8(padapter, 0x6B); tempval &= ~BIT6; rtw_write8(padapter, 0x6B, tempval); rtw_usleep_os(100); MPT_PwrCtlDM(padapter,0); rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc)| 0x00000004)); rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b)& 0xFFFFFFEF)); rtw_msleep_os(600); rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b)| 0x00000010)); rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc)& 0xFFFFFFFB)); rtw_msleep_os(1200); #if defined(CONFIG_PLATFORM_SPRD) && (MP_DRIVER == 1) // Pull up BT reset pin. DBG_871X("%s: pull up BT reset pin when bt start mp test\n", __FUNCTION__); rtw_wifi_gpio_wlan_ctrl(WLAN_BT_PWDN_ON); #endif DBG_871X(" rtl8723a_FirmwareDownload!\n"); #ifdef CONFIG_RTL8723A status = rtl8723a_FirmwareDownload(padapter); #elif defined(CONFIG_RTL8723B) status = rtl8723b_FirmwareDownload(padapter, _FALSE); #endif DBG_871X("Wait for FirmwareDownloadBT fw boot!\n"); rtw_msleep_os(1000); #ifdef CONFIG_BT_COEXIST rtw_btcoex_HaltNotify(padapter); DBG_871X("SetBT btcoex HaltNotify !\n"); //hal_btcoex1ant_SetAntPath(padapter); rtw_btcoex_SetManualControl(padapter, _TRUE); #endif _rtw_memset(extra,'\0', wrqu->data.length); BtReq.opCodeVer = 1; BtReq.OpCode = 0; BtReq.paraLength = 0; mptbt_BtControlProcess(padapter, &BtReq); rtw_msleep_os(200); DBG_8192C("FirmwareDownloadBT ready = 0x%x 0x%x", pMptCtx->mptOutBuf[4],pMptCtx->mptOutBuf[5]); if( (pMptCtx->mptOutBuf[4]==0x00) && (pMptCtx->mptOutBuf[5]==0x00)) { if(padapter->mppriv.bTxBufCkFail==_TRUE) sprintf(extra, "check TxBuf Fail.\n"); else sprintf(extra, "download FW Fail.\n"); } else { #ifdef CONFIG_BT_COEXIST rtw_btcoex_SwitchBtTRxMask(padapter); #endif rtw_msleep_os(200); sprintf(extra, "download FW OK.\n"); goto exit; } goto exit; } if ( strncmp(extra, "down", 4) == 0){ DBG_871X("SetBT down for to hal_init !\n"); #ifdef CONFIG_BT_COEXIST rtw_btcoex_SetManualControl(padapter, _FALSE); rtw_btcoex_Initialize(padapter); #endif pHalFunc->read_adapter_info(padapter); pHalFunc->hal_deinit(padapter); pHalFunc->hal_init(padapter); rtw_pm_set_ips(padapter,IPS_NONE); LeaveAllPowerSaveMode(padapter); MPT_PwrCtlDM(padapter,0); rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc)| 0x00000004)); rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b)& 0xFFFFFFEF)); rtw_msleep_os(600); //rtw_write32(padapter, 0x6a, (rtw_read32(padapter, 0x6a)& 0xFFFFFFFE)); rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b)| 0x00000010)); rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc)& 0xFFFFFFFB)); rtw_msleep_os(1200); goto exit; } if ( strncmp(extra, "disable", 7) == 0){ DBG_871X("SetBT disable !\n"); rtw_write32(padapter, 0x6a, (rtw_read32(padapter, 0x6a)& 0xFFFFFFFB)); rtw_msleep_os(500); goto exit; } if ( strncmp(extra, "enable", 6) == 0){ DBG_871X("SetBT enable !\n"); rtw_write32(padapter, 0x6a, (rtw_read32(padapter, 0x6a)| 0x00000004)); rtw_msleep_os(500); goto exit; } if ( strncmp(extra, "h2c", 3) == 0){ DBG_871X("SetBT h2c !\n"); padapter->bBTFWReady = _TRUE; rtw_hal_fill_h2c_cmd(padapter, 0x63, 1, u1H2CBtMpOperParm); goto exit; } if ( strncmp(extra, "2ant", 4) == 0){ DBG_871X("Set BT 2ant use!\n"); PHY_SetMacReg(padapter,0x67,BIT5,0x1); rtw_write32(padapter, 0x948, 0000); goto exit; } if( ready!=0 && testmode!=0 && trxparam!=0 && setgen!=0 && getgen!=0 && testctrl!=0 && testbt!=0 && readtherm!=0 &&setbtmac!=0) return -EFAULT; if( testbt==0 ) { BtReq.opCodeVer=1; BtReq.OpCode=6; BtReq.paraLength=cnts/2; goto todo; } if( ready==0 ) { BtReq.opCodeVer=1; BtReq.OpCode=0; BtReq.paraLength=0; goto todo; } pch = extra; i = 0; while ((token = strsep(&pch, ",")) != NULL) { if (i > 1) break; tmp[i] = token; i++; } if ((tmp[0]==NULL) && (tmp[1]==NULL)) { return -EFAULT; } else { cnts = strlen(tmp[1]); if (cnts<1) return -EFAULT; DBG_871X("%s: cnts=%d\n", __FUNCTION__, cnts); DBG_871X("%s: data=%s\n", __FUNCTION__, tmp[1]); for (jj=0, kk=0; jjdata.length); if (padapter->bBTFWReady == _FALSE) { sprintf(extra, "BTFWReady = FALSE.\n"); goto exit; } mptbt_BtControlProcess(padapter, &BtReq); if (readtherm == 0) { sprintf(extra, "BT thermal="); for (i=4; imptOutLen; i++) { if ((pMptCtx->mptOutBuf[i]==0x00) && (pMptCtx->mptOutBuf[i+1]==0x00)) goto exit; #ifdef CONFIG_RTL8723A sprintf(extra, "%s %d ", extra, (pMptCtx->mptOutBuf[i]& 0x3f)); #else sprintf(extra, "%s %d ", extra, (pMptCtx->mptOutBuf[i]& 0x1f)); #endif } } else { for (i=4; imptOutLen; i++) { sprintf(extra, "%s 0x%x ", extra, pMptCtx->mptOutBuf[i]); } } exit: wrqu->data.length = strlen(extra) + 1; DBG_871X("-%s: output len=%d data=%s\n", __FUNCTION__, wrqu->data.length, extra); return status; } #endif //#ifdef CONFIG_RTL8723A static int rtw_mp_set(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wdata, char *extra) { struct iw_point *wrqu = (struct iw_point *)wdata; u32 subcmd = wrqu->flags; PADAPTER padapter = rtw_netdev_priv(dev); if (padapter == NULL) { return -ENETDOWN; } if((padapter->bup == _FALSE )) { DBG_871X(" %s fail =>(padapter->bup == _FALSE )\n",__FUNCTION__); return -ENETDOWN; } if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) { DBG_871X("%s fail =>(padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE) \n",__FUNCTION__); return -ENETDOWN; } //_rtw_memset(extra, 0x00, IW_PRIV_SIZE_MASK); if (extra == NULL) { wrqu->length = 0; return -EIO; } switch(subcmd) { case MP_START: DBG_871X("set case mp_start \n"); rtw_mp_start (dev,info,wrqu,extra); break; case MP_STOP: DBG_871X("set case mp_stop \n"); rtw_mp_stop (dev,info,wrqu,extra); break; case MP_BANDWIDTH: DBG_871X("set case mp_bandwidth \n"); rtw_mp_bandwidth (dev,info,wrqu,extra); break; case MP_RESET_STATS: DBG_871X("set case MP_RESET_STATS \n"); rtw_mp_reset_stats (dev,info,wrqu,extra); break; case MP_SetRFPathSwh: DBG_871X("set MP_SetRFPathSwitch \n"); rtw_mp_SetRFPath (dev,info,wdata,extra); break; case CTA_TEST: DBG_871X("set CTA_TEST\n"); rtw_cta_test_start (dev, info, wdata, extra); break; case MP_DISABLE_BT_COEXIST: DBG_871X("set case MP_DISABLE_BT_COEXIST \n"); rtw_mp_disable_bt_coexist(dev, info, wdata, extra); break; #ifdef CONFIG_WOWLAN case MP_WOW_ENABLE: DBG_871X("set case MP_WOW_ENABLE: %s \n", extra); rtw_wowlan_ctrl(dev, info, wdata, extra); break; #endif #ifdef CONFIG_AP_WOWLAN case MP_AP_WOW_ENABLE: DBG_871X("set case MP_AP_WOW_ENABLE: %s \n", extra); rtw_ap_wowlan_ctrl(dev, info, wdata, extra); break; #endif } return 0; } static int rtw_mp_get(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wdata, char *extra) { struct iw_point *wrqu = (struct iw_point *)wdata; u32 subcmd = wrqu->flags; PADAPTER padapter = rtw_netdev_priv(dev); //DBG_871X("in mp_get extra= %s \n",extra); if (padapter == NULL) { return -ENETDOWN; } if((padapter->bup == _FALSE )) { DBG_871X(" %s fail =>(padapter->bup == _FALSE )\n",__FUNCTION__); return -ENETDOWN; } if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) { DBG_871X("%s fail =>(padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE) \n",__FUNCTION__); return -ENETDOWN; } if (extra == NULL) { wrqu->length = 0; return -EIO; } switch(subcmd) { case WRITE_REG : rtw_mp_write_reg (dev,info,wrqu,extra); break; case WRITE_RF: rtw_mp_write_rf (dev,info,wrqu,extra); break; case MP_PHYPARA: DBG_871X("mp_get MP_PHYPARA \n"); rtw_mp_phypara(dev,info,wrqu,extra); break; case MP_CHANNEL: DBG_871X("set case mp_channel \n"); rtw_mp_channel (dev,info,wrqu,extra); break; case READ_REG: DBG_871X("mp_get READ_REG \n"); rtw_mp_read_reg (dev,info,wrqu,extra); break; case READ_RF: DBG_871X("mp_get READ_RF \n"); rtw_mp_read_rf (dev,info,wrqu,extra); break; case MP_RATE: DBG_871X("set case mp_rate \n"); rtw_mp_rate (dev,info,wrqu,extra); break; case MP_TXPOWER: DBG_871X("set case MP_TXPOWER \n"); rtw_mp_txpower (dev,info,wrqu,extra); break; case MP_ANT_TX: DBG_871X("set case MP_ANT_TX \n"); rtw_mp_ant_tx (dev,info,wrqu,extra); break; case MP_ANT_RX: DBG_871X("set case MP_ANT_RX \n"); rtw_mp_ant_rx (dev,info,wrqu,extra); break; case MP_QUERY: //DBG_871X("mp_get mp_query MP_QUERY \n"); rtw_mp_trx_query(dev,info,wrqu,extra); break; case MP_CTX: DBG_871X("set case MP_CTX \n"); rtw_mp_ctx (dev,info,wrqu,extra); break; case MP_ARX: DBG_871X("set case MP_ARX \n"); rtw_mp_arx (dev,info,wrqu,extra); break; case EFUSE_GET: DBG_871X("efuse get EFUSE_GET \n"); rtw_mp_efuse_get(dev,info,wdata,extra); break; case MP_DUMP: DBG_871X("set case MP_DUMP \n"); rtw_mp_dump (dev,info,wrqu,extra); break; case MP_PSD: DBG_871X("set case MP_PSD \n"); rtw_mp_psd (dev,info,wrqu,extra); break; case MP_THER: DBG_871X("set case MP_THER \n"); rtw_mp_thermal (dev,info,wrqu,extra); break; case MP_PwrCtlDM: DBG_871X("set MP_PwrCtlDM\n"); rtw_mp_PwrCtlDM (dev,info,wrqu,extra); break; case MP_QueryDrvStats: DBG_871X("mp_get MP_QueryDrvStats \n"); rtw_mp_QueryDrv(dev,info,wdata,extra); break; case MP_PWRTRK: DBG_871X("set case MP_PWRTRK \n"); rtw_mp_pwrtrk(dev,info,wrqu,extra); break; case EFUSE_SET: DBG_871X("set case efuse set \n"); rtw_mp_efuse_set(dev,info,wdata,extra); break; case MP_GET_TXPOWER_INX: DBG_871X("mp_get MP_GET_TXPOWER_INX \n"); rtw_mp_txpower_index(dev,info,wrqu,extra); break; #if defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B) case MP_SetBT: DBG_871X("set MP_SetBT \n"); rtw_mp_SetBT(dev,info,wdata,extra); break; #endif } rtw_msleep_os(10); //delay 5ms for sending pkt before exit adb shell operation return 0; } #endif //#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_MP_IWPRIV_SUPPORT) static int rtw_wfd_tdls_enable(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_TDLS #ifdef CONFIG_WFD _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); printk( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); if ( extra[ 0 ] == '0' ) { padapter->wdinfo.wfd_tdls_enable = 0; } else { padapter->wdinfo.wfd_tdls_enable = 1; } #endif //CONFIG_WFD #endif //CONFIG_TDLS return ret; } static int rtw_tdls_weaksec(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_TDLS u8 i, j; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); DBG_871X( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); if ( extra[ 0 ] == '0' ) { padapter->wdinfo.wfd_tdls_weaksec = 0; } else { padapter->wdinfo.wfd_tdls_weaksec = 1; } #endif return ret; } static int rtw_tdls_enable(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_TDLS _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; _irqL irqL; _list *plist, *phead; s32 index; struct sta_info *psta = NULL; struct sta_priv *pstapriv = &padapter->stapriv; u8 tdls_sta[NUM_STA][ETH_ALEN]; u8 empty_hwaddr[ETH_ALEN] = { 0x00 }; struct tdls_txmgmt txmgmt; printk( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); _rtw_memset(tdls_sta, 0x00, sizeof(tdls_sta)); _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); if ( extra[ 0 ] == '0' ) { ptdlsinfo->tdls_enable = 0; if(pstapriv->asoc_sta_count==1) return ret; _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); for(index=0; index< NUM_STA; index++) { phead = &(pstapriv->sta_hash[index]); plist = get_next(phead); while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info ,hash_list); plist = get_next(plist); if(psta->tdls_sta_state != TDLS_STATE_NONE) { _rtw_memcpy(tdls_sta[index], psta->hwaddr, ETH_ALEN); } } } _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); for(index=0; index< NUM_STA; index++) { if( !_rtw_memcmp(tdls_sta[index], empty_hwaddr, ETH_ALEN) ) { printk("issue tear down to "MAC_FMT"\n", MAC_ARG(tdls_sta[index])); txmgmt.status_code = _RSON_TDLS_TEAR_UN_RSN_; _rtw_memcpy(txmgmt.peer, tdls_sta[index], ETH_ALEN); issue_tdls_teardown(padapter, &txmgmt, _FALSE); } } rtw_tdls_cmd(padapter, myid(&(padapter->eeprompriv)), TDLS_RS_RCR); rtw_reset_tdls_info(padapter); } else if ( extra[ 0 ] == '1' ) { ptdlsinfo->tdls_enable = 1; } #endif //CONFIG_TDLS return ret; } static int rtw_tdls_setup(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_TDLS u8 i, j; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct tdls_txmgmt txmgmt; #ifdef CONFIG_WFD struct wifidirect_info *pwdinfo= &(padapter->wdinfo); #endif // CONFIG_WFD printk( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); if(wrqu->data.length - 1 != 17 ) { printk( "[%s] length:%d != 17\n", __FUNCTION__, (wrqu->data.length -1) ); return ret; } _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ txmgmt.peer[i]=key_2char2num(*(extra+j), *(extra+j+1)); } #ifdef CONFIG_WFD if ( _AES_ != padapter->securitypriv.dot11PrivacyAlgrthm ) { // Weak Security situation with AP. if ( 0 == pwdinfo->wfd_tdls_weaksec ) { // Can't send the tdls setup request out!! DBG_871X( "[%s] Current link is not AES, SKIP sending the tdls setup request!!\n", __FUNCTION__ ); } else { issue_tdls_setup_req(padapter, &txmgmt, _TRUE); } } else #endif // CONFIG_WFD { issue_tdls_setup_req(padapter, &txmgmt, _TRUE); } #endif return ret; } static int rtw_tdls_teardown(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_TDLS u8 i,j; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct sta_info *ptdls_sta = NULL; struct tdls_txmgmt txmgmt; DBG_871X( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); if(wrqu->data.length - 1 != 17 && wrqu->data.length - 1 != 19) { printk( "[%s] length:%d != 17 or 19\n", __FUNCTION__, (wrqu->data.length -1) ); return ret; } _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ txmgmt.peer[i]=key_2char2num(*(extra+j), *(extra+j+1)); } ptdls_sta = rtw_get_stainfo( &(padapter->stapriv), txmgmt.peer); if(ptdls_sta != NULL) { txmgmt.status_code = _RSON_TDLS_TEAR_UN_RSN_; if(wrqu->data.length - 1 == 17) issue_tdls_teardown(padapter, &txmgmt, _FALSE); else if(wrqu->data.length - 1 == 19) issue_tdls_teardown(padapter, &txmgmt, _TRUE); } else DBG_871X( "TDLS peer not found\n"); #endif //CONFIG_TDLS return ret; } static int rtw_tdls_discovery(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_TDLS _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct tdls_txmgmt txmgmt; int i = 0, j=0; DBG_871X( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ txmgmt.peer[i]=key_2char2num(*(extra+j), *(extra+j+1)); } issue_tdls_dis_req(padapter, &txmgmt); #endif //CONFIG_TDLS return ret; } static int rtw_tdls_ch_switch(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_TDLS _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; u8 i, j, mac_addr[ETH_ALEN]; struct sta_info *ptdls_sta = NULL; DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); } ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); if( ptdls_sta == NULL ) return ret; // ptdlsinfo->ch_sensing=1; // rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_INIT_CH_SEN); #endif //CONFIG_TDLS return ret; } static int rtw_tdls_pson(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_TDLS _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 i, j, mac_addr[ETH_ALEN]; struct sta_info *ptdls_sta = NULL; DBG_871X( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); } ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta->hwaddr, 1, 3, 500); #endif //CONFIG_TDLS return ret; } static int rtw_tdls_psoff(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_TDLS _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u8 i, j, mac_addr[ETH_ALEN]; struct sta_info *ptdls_sta = NULL; DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); } ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); if(ptdls_sta) { //issue_tdls_peer_traffic_rsp(padapter, ptdls_sta); issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta->hwaddr, 0, 3, 500); } #endif //CONFIG_TDLS return ret; } static int rtw_tdls_setip(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_TDLS #ifdef CONFIG_WFD _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; struct wifi_display_info *pwfd_info = ptdlsinfo->wfd_info; u8 i=0, j=0, k=0, tag=0, ip[3] = { 0xff }, *ptr = extra; printk( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length - 1 ); while( i < 4 ) { for( j=0; j < 4; j++) { if( *( extra + j + tag ) == '.' || *( extra + j + tag ) == '\0' ) { if( j == 1 ) pwfd_info->ip_address[i]=convert_ip_addr( '0', '0', *(extra+(j-1)+tag)); if( j == 2 ) pwfd_info->ip_address[i]=convert_ip_addr( '0', *(extra+(j-2)+tag), *(extra+(j-1)+tag)); if( j == 3 ) pwfd_info->ip_address[i]=convert_ip_addr( *(extra+(j-3)+tag), *(extra+(j-2)+tag), *(extra+(j-1)+tag)); tag += j + 1; break; } } i++; } printk( "[%s] Set IP = %u.%u.%u.%u \n", __FUNCTION__, ptdlsinfo->wfd_info->ip_address[0], ptdlsinfo->wfd_info->ip_address[1], ptdlsinfo->wfd_info->ip_address[2], ptdlsinfo->wfd_info->ip_address[3] ); #endif //CONFIG_WFD #endif //CONFIG_TDLS return ret; } static int rtw_tdls_getip(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_TDLS #ifdef CONFIG_WFD _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; struct wifi_display_info *pwfd_info = ptdlsinfo->wfd_info; printk( "[%s]\n", __FUNCTION__); sprintf( extra, "\n\n%u.%u.%u.%u\n", pwfd_info->peer_ip_address[0], pwfd_info->peer_ip_address[1], pwfd_info->peer_ip_address[2], pwfd_info->peer_ip_address[3] ); printk( "[%s] IP=%u.%u.%u.%u\n", __FUNCTION__, pwfd_info->peer_ip_address[0], pwfd_info->peer_ip_address[1], pwfd_info->peer_ip_address[2], pwfd_info->peer_ip_address[3] ); wrqu->data.length = strlen( extra ); #endif //CONFIG_WFD #endif //CONFIG_TDLS return ret; } static int rtw_tdls_getport(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_TDLS #ifdef CONFIG_WFD _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; struct wifi_display_info *pwfd_info = ptdlsinfo->wfd_info; printk( "[%s]\n", __FUNCTION__); sprintf( extra, "\n\n%d\n", pwfd_info->peer_rtsp_ctrlport ); printk( "[%s] remote port = %d\n", __FUNCTION__, pwfd_info->peer_rtsp_ctrlport ); wrqu->data.length = strlen( extra ); #endif //CONFIG_WFD #endif //CONFIG_TDLS return ret; } //WFDTDLS, for sigma test static int rtw_tdls_dis_result(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_TDLS #ifdef CONFIG_WFD _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; struct wifi_display_info *pwfd_info = ptdlsinfo->wfd_info; printk( "[%s]\n", __FUNCTION__); if(ptdlsinfo->dev_discovered == 1 ) { sprintf( extra, "\n\nDis=1\n" ); ptdlsinfo->dev_discovered = 0; } wrqu->data.length = strlen( extra ); #endif //CONFIG_WFD #endif //CONFIG_TDLS return ret; } //WFDTDLS, for sigma test static int rtw_wfd_tdls_status(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_TDLS _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; printk( "[%s]\n", __FUNCTION__); sprintf( extra, "\nlink_established:0x%08x \n" "sta_cnt:%d \n" "sta_maximum:%d \n" "cur_channel:%d \n" "tdls_enable:%d", ptdlsinfo->link_established, ptdlsinfo->sta_cnt, ptdlsinfo->sta_maximum, ptdlsinfo->cur_channel, ptdlsinfo->tdls_enable ); wrqu->data.length = strlen( extra ); #endif //CONFIG_TDLS return ret; } static int rtw_tdls_getsta(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_TDLS u8 i, j; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); u8 addr[ETH_ALEN] = {0}; char charmac[17]; struct sta_info *ptdls_sta = NULL; printk( "[%s] %s %d\n", __FUNCTION__, (char *)wrqu->data.pointer, wrqu->data.length -1 ); if(copy_from_user(charmac, wrqu->data.pointer+9, 17)){ ret = -EFAULT; goto exit; } printk("[%s] %d, charmac:%s\n", __FUNCTION__, __LINE__, charmac); for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ addr[i]=key_2char2num(*(charmac+j), *(charmac+j+1)); } printk("[%s] %d, charmac:%s, addr:"MAC_FMT"\n", __FUNCTION__, __LINE__, charmac, MAC_ARG(addr)); ptdls_sta = rtw_get_stainfo(&padapter->stapriv, addr); if(ptdls_sta) { sprintf(extra, "\n\ntdls_sta_state=%d\n", ptdls_sta->tdls_sta_state); printk("\n\ntdls_sta_state=%d\n", ptdls_sta->tdls_sta_state); } else { sprintf(extra, "\n\nNot found this sta\n"); printk("\n\nNot found this sta\n"); } wrqu->data.length = strlen( extra ); #endif //CONFIG_TDLS exit: return ret; } static int rtw_tdls_ch_switch_off(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_TDLS _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); u8 i, j, mac_addr[ETH_ALEN]; struct sta_info *ptdls_sta = NULL; DBG_871X( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); } ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); ptdls_sta->tdls_sta_state |= TDLS_SW_OFF_STATE; /* if((ptdls_sta->tdls_sta_state & TDLS_AT_OFF_CH_STATE) && (ptdls_sta->tdls_sta_state & TDLS_PEER_AT_OFF_STATE)){ pmlmeinfo->tdls_candidate_ch= pmlmeext->cur_channel; issue_tdls_ch_switch_req(padapter, mac_addr); DBG_871X("issue tdls ch switch req back to base channel\n"); } */ #endif //CONFIG_TDLS return ret; } static int rtw_tdls(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_TDLS _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); DBG_871X( "[%s] extra = %s\n", __FUNCTION__, extra ); // WFD Sigma will use the tdls enable command to let the driver know we want to test the tdls now! if ( _rtw_memcmp( extra, "wfdenable=", 10 ) ) { wrqu->data.length -=10; rtw_wfd_tdls_enable( dev, info, wrqu, &extra[10] ); return ret; } else if ( _rtw_memcmp( extra, "weaksec=", 8 ) ) { wrqu->data.length -=8; rtw_tdls_weaksec( dev, info, wrqu, &extra[8] ); return ret; } else if ( _rtw_memcmp( extra, "tdlsenable=", 11 ) ) { wrqu->data.length -=11; rtw_tdls_enable( dev, info, wrqu, &extra[11] ); return ret; } if( padapter->tdlsinfo.tdls_enable == 0 ) { printk("tdls haven't enabled\n"); return 0; } if ( _rtw_memcmp( extra, "setup=", 6 ) ) { wrqu->data.length -=6; rtw_tdls_setup( dev, info, wrqu, &extra[6] ); } else if (_rtw_memcmp( extra, "tear=", 5 ) ) { wrqu->data.length -= 5; rtw_tdls_teardown( dev, info, wrqu, &extra[5] ); } else if (_rtw_memcmp( extra, "dis=", 4 ) ) { wrqu->data.length -= 4; rtw_tdls_discovery( dev, info, wrqu, &extra[4] ); } else if (_rtw_memcmp( extra, "sw=", 3 ) ) { wrqu->data.length -= 3; rtw_tdls_ch_switch( dev, info, wrqu, &extra[3] ); } else if (_rtw_memcmp( extra, "swoff=", 6 ) ) { wrqu->data.length -= 6; rtw_tdls_ch_switch_off( dev, info, wrqu, &extra[6] ); } else if (_rtw_memcmp( extra, "pson=", 5 ) ) { wrqu->data.length -= 5; rtw_tdls_pson( dev, info, wrqu, &extra[5] ); } else if (_rtw_memcmp( extra, "psoff=", 6 ) ) { wrqu->data.length -= 6; rtw_tdls_psoff( dev, info, wrqu, &extra[6] ); } #ifdef CONFIG_WFD else if (_rtw_memcmp( extra, "setip=", 6 ) ) { wrqu->data.length -= 6; rtw_tdls_setip( dev, info, wrqu, &extra[6] ); } else if (_rtw_memcmp( extra, "tprobe=", 6 ) ) { issue_tunneled_probe_req((_adapter *)rtw_netdev_priv(dev)); } #endif //CONFIG_WFD #endif //CONFIG_TDLS return ret; } static int rtw_tdls_get(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; #ifdef CONFIG_WFD DBG_871X( "[%s] extra = %s\n", __FUNCTION__, (char*) wrqu->data.pointer ); if ( _rtw_memcmp( wrqu->data.pointer, "ip", 2 ) ) { rtw_tdls_getip( dev, info, wrqu, extra ); } if ( _rtw_memcmp( wrqu->data.pointer, "port", 4 ) ) { rtw_tdls_getport( dev, info, wrqu, extra ); } //WFDTDLS, for sigma test if ( _rtw_memcmp( wrqu->data.pointer, "dis", 3 ) ) { rtw_tdls_dis_result( dev, info, wrqu, extra ); } if ( _rtw_memcmp( wrqu->data.pointer, "status", 6 ) ) { rtw_wfd_tdls_status( dev, info, wrqu, extra ); } if ( _rtw_memcmp( wrqu->data.pointer, "tdls_sta=", 9 ) ) { rtw_tdls_getsta( dev, info, wrqu, extra ); } #endif //CONFIG_WFD return ret; } #ifdef CONFIG_INTEL_WIDI static int rtw_widi_set(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); process_intel_widi_cmd(padapter, extra); return ret; } static int rtw_widi_set_probe_request(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { int ret = 0; u8 *pbuf = NULL; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); pbuf = rtw_malloc(sizeof(l2_msg_t)); if(pbuf) { if ( copy_from_user(pbuf, wrqu->data.pointer, wrqu->data.length) ) ret = -EFAULT; //_rtw_memcpy(pbuf, wrqu->data.pointer, wrqu->data.length); if( wrqu->data.flags == 0 ) intel_widi_wk_cmd(padapter, INTEL_WIDI_ISSUE_PROB_WK, pbuf, sizeof(l2_msg_t)); else if( wrqu->data.flags == 1 ) rtw_set_wfd_rds_sink_info( padapter, (l2_msg_t *)pbuf ); } return ret; } #endif // CONFIG_INTEL_WIDI #ifdef CONFIG_MAC_LOOPBACK_DRIVER #ifdef CONFIG_RTL8723A extern void rtl8723a_cal_txdesc_chksum(struct tx_desc *ptxdesc); #define cal_txdesc_chksum rtl8723a_cal_txdesc_chksum extern void rtl8723a_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf); #define fill_default_txdesc rtl8723a_fill_default_txdesc #endif #if defined(CONFIG_RTL8188E) #include extern void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc); #define cal_txdesc_chksum rtl8188e_cal_txdesc_chksum #ifdef CONFIG_SDIO_HCI || defined(CONFIG_GSPI_HCI) extern void rtl8188es_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf); #define fill_default_txdesc rtl8188es_fill_default_txdesc #endif // CONFIG_SDIO_HCI #endif // CONFIG_RTL8188E #if defined(CONFIG_RTL8723B) extern void rtl8723b_cal_txdesc_chksum(struct tx_desc *ptxdesc); #define cal_txdesc_chksum rtl8723b_cal_txdesc_chksum extern void rtl8723b_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf); #define fill_default_txdesc rtl8723b_fill_default_txdesc #endif // CONFIG_RTL8723B static s32 initLoopback(PADAPTER padapter) { PLOOPBACKDATA ploopback; if (padapter->ploopback == NULL) { ploopback = (PLOOPBACKDATA)rtw_zmalloc(sizeof(LOOPBACKDATA)); if (ploopback == NULL) return -ENOMEM; _rtw_init_sema(&ploopback->sema, 0); ploopback->bstop = _TRUE; ploopback->cnt = 0; ploopback->size = 300; _rtw_memset(ploopback->msg, 0, sizeof(ploopback->msg)); padapter->ploopback = ploopback; } return 0; } static void freeLoopback(PADAPTER padapter) { PLOOPBACKDATA ploopback; ploopback = padapter->ploopback; if (ploopback) { rtw_mfree((u8*)ploopback, sizeof(LOOPBACKDATA)); padapter->ploopback = NULL; } } static s32 initpseudoadhoc(PADAPTER padapter) { NDIS_802_11_NETWORK_INFRASTRUCTURE networkType; s32 err; networkType = Ndis802_11IBSS; err = rtw_set_802_11_infrastructure_mode(padapter, networkType); if (err == _FALSE) return _FAIL; err = rtw_setopmode_cmd(padapter, networkType,_TRUE); if (err == _FAIL) return _FAIL; return _SUCCESS; } static s32 createpseudoadhoc(PADAPTER padapter) { NDIS_802_11_AUTHENTICATION_MODE authmode; struct mlme_priv *pmlmepriv; NDIS_802_11_SSID *passoc_ssid; WLAN_BSSID_EX *pdev_network; u8 *pibss; u8 ssid[] = "pseduo_ad-hoc"; s32 err; _irqL irqL; pmlmepriv = &padapter->mlmepriv; authmode = Ndis802_11AuthModeOpen; err = rtw_set_802_11_authentication_mode(padapter, authmode); if (err == _FALSE) return _FAIL; passoc_ssid = &pmlmepriv->assoc_ssid; _rtw_memset(passoc_ssid, 0, sizeof(NDIS_802_11_SSID)); passoc_ssid->SsidLength = sizeof(ssid) - 1; _rtw_memcpy(passoc_ssid->Ssid, ssid, passoc_ssid->SsidLength); pdev_network = &padapter->registrypriv.dev_network; pibss = padapter->registrypriv.dev_network.MacAddress; _rtw_memcpy(&pdev_network->Ssid, passoc_ssid, sizeof(NDIS_802_11_SSID)); rtw_update_registrypriv_dev_network(padapter); rtw_generate_random_ibss(pibss); _enter_critical_bh(&pmlmepriv->lock, &irqL); pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE; _exit_critical_bh(&pmlmepriv->lock, &irqL); #if 0 err = rtw_createbss_cmd(padapter); if (err == _FAIL) return _FAIL; #else { struct wlan_network *pcur_network; struct sta_info *psta; //3 create a new psta pcur_network = &pmlmepriv->cur_network; //clear psta in the cur_network, if any psta = rtw_get_stainfo(&padapter->stapriv, pcur_network->network.MacAddress); if (psta) rtw_free_stainfo(padapter, psta); psta = rtw_alloc_stainfo(&padapter->stapriv, pibss); if (psta == NULL) return _FAIL; //3 join psudo AdHoc pcur_network->join_res = 1; pcur_network->aid = psta->aid = 1; _rtw_memcpy(&pcur_network->network, pdev_network, get_WLAN_BSSID_EX_sz(pdev_network)); // set msr to WIFI_FW_ADHOC_STATE #if 0 Set_NETYPE0_MSR(padapter, WIFI_FW_ADHOC_STATE); #else { u8 val8; val8 = rtw_read8(padapter, MSR); val8 &= 0xFC; // clear NETYPE0 val8 |= WIFI_FW_ADHOC_STATE & 0x3; rtw_write8(padapter, MSR, val8); } #endif } #endif return _SUCCESS; } static struct xmit_frame* createloopbackpkt(PADAPTER padapter, u32 size) { struct xmit_priv *pxmitpriv; struct xmit_frame *pframe; struct xmit_buf *pxmitbuf; struct pkt_attrib *pattrib; struct tx_desc *desc; u8 *pkt_start, *pkt_end, *ptr; struct rtw_ieee80211_hdr *hdr; s32 bmcast; _irqL irqL; if ((TXDESC_SIZE + WLANHDR_OFFSET + size) > MAX_XMITBUF_SZ) return NULL; pxmitpriv = &padapter->xmitpriv; pframe = NULL; //2 1. allocate xmit frame pframe = rtw_alloc_xmitframe(pxmitpriv); if (pframe == NULL) return NULL; pframe->padapter = padapter; //2 2. allocate xmit buffer _enter_critical_bh(&pxmitpriv->lock, &irqL); pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); _exit_critical_bh(&pxmitpriv->lock, &irqL); if (pxmitbuf == NULL) { rtw_free_xmitframe(pxmitpriv, pframe); return NULL; } pframe->pxmitbuf = pxmitbuf; pframe->buf_addr = pxmitbuf->pbuf; pxmitbuf->priv_data = pframe; //2 3. update_attrib() pattrib = &pframe->attrib; // init xmitframe attribute _rtw_memset(pattrib, 0, sizeof(struct pkt_attrib)); pattrib->ether_type = 0x8723; _rtw_memcpy(pattrib->src, padapter->eeprompriv.mac_addr, ETH_ALEN); _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); _rtw_memset(pattrib->dst, 0xFF, ETH_ALEN); _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); // pattrib->dhcp_pkt = 0; // pattrib->pktlen = 0; pattrib->ack_policy = 0; // pattrib->pkt_hdrlen = ETH_HLEN; pattrib->hdrlen = WLAN_HDR_A3_LEN; pattrib->subtype = WIFI_DATA; pattrib->priority = 0; pattrib->qsel = pattrib->priority; // do_queue_select(padapter, pattrib); pattrib->nr_frags = 1; pattrib->encrypt = 0; pattrib->bswenc = _FALSE; pattrib->qos_en = _FALSE; bmcast = IS_MCAST(pattrib->ra); if (bmcast) { pattrib->mac_id = 1; pattrib->psta = rtw_get_bcmc_stainfo(padapter); } else { pattrib->mac_id = 0; pattrib->psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv)); } pattrib->pktlen = size; pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->pktlen; //2 4. fill TX descriptor desc = (struct tx_desc*)pframe->buf_addr; _rtw_memset(desc, 0, TXDESC_SIZE); fill_default_txdesc(pframe, (u8*)desc); // Hw set sequence number ((PTXDESC)desc)->hwseq_en = 0; // HWSEQ_EN, 0:disable, 1:enable // ((PTXDESC)desc)->hwseq_sel = 0; // HWSEQ_SEL ((PTXDESC)desc)->disdatafb = 1; // convert to little endian desc->txdw0 = cpu_to_le32(desc->txdw0); desc->txdw1 = cpu_to_le32(desc->txdw1); desc->txdw2 = cpu_to_le32(desc->txdw2); desc->txdw3 = cpu_to_le32(desc->txdw3); desc->txdw4 = cpu_to_le32(desc->txdw4); desc->txdw5 = cpu_to_le32(desc->txdw5); desc->txdw6 = cpu_to_le32(desc->txdw6); desc->txdw7 = cpu_to_le32(desc->txdw7); #ifdef CONFIG_PCI_HCI desc->txdw8 = cpu_to_le32(desc->txdw8); desc->txdw9 = cpu_to_le32(desc->txdw9); desc->txdw10 = cpu_to_le32(desc->txdw10); desc->txdw11 = cpu_to_le32(desc->txdw11); desc->txdw12 = cpu_to_le32(desc->txdw12); desc->txdw13 = cpu_to_le32(desc->txdw13); desc->txdw14 = cpu_to_le32(desc->txdw14); desc->txdw15 = cpu_to_le32(desc->txdw15); #endif cal_txdesc_chksum(desc); //2 5. coalesce pkt_start = pframe->buf_addr + TXDESC_SIZE; pkt_end = pkt_start + pattrib->last_txcmdsz; //3 5.1. make wlan header, make_wlanhdr() hdr = (struct rtw_ieee80211_hdr *)pkt_start; SetFrameSubType(&hdr->frame_ctl, pattrib->subtype); _rtw_memcpy(hdr->addr1, pattrib->dst, ETH_ALEN); // DA _rtw_memcpy(hdr->addr2, pattrib->src, ETH_ALEN); // SA _rtw_memcpy(hdr->addr3, get_bssid(&padapter->mlmepriv), ETH_ALEN); // RA, BSSID //3 5.2. make payload ptr = pkt_start + pattrib->hdrlen; get_random_bytes(ptr, pkt_end - ptr); pxmitbuf->len = TXDESC_SIZE + pattrib->last_txcmdsz; pxmitbuf->ptail += pxmitbuf->len; return pframe; } static void freeloopbackpkt(PADAPTER padapter, struct xmit_frame *pframe) { struct xmit_priv *pxmitpriv; struct xmit_buf *pxmitbuf; pxmitpriv = &padapter->xmitpriv; pxmitbuf = pframe->pxmitbuf; rtw_free_xmitframe(pxmitpriv, pframe); rtw_free_xmitbuf(pxmitpriv, pxmitbuf); } static void printdata(u8 *pbuf, u32 len) { u32 i, val; for (i = 0; (i+4) <= len; i+=4) { printk("%08X", *(u32*)(pbuf + i)); if ((i+4) & 0x1F) printk(" "); else printk("\n"); } if (i < len) { #ifdef CONFIG_BIG_ENDIAN for (; i < len, i++) printk("%02X", pbuf+i); #else // CONFIG_LITTLE_ENDIAN #if 0 val = 0; _rtw_memcpy(&val, pbuf + i, len - i); printk("%8X", val); #else u8 str[9]; u8 n; val = 0; n = len - i; _rtw_memcpy(&val, pbuf+i, n); sprintf(str, "%08X", val); n = (4 - n) * 2; printk("%8s", str+n); #endif #endif // CONFIG_LITTLE_ENDIAN } printk("\n"); } static u8 pktcmp(PADAPTER padapter, u8 *txbuf, u32 txsz, u8 *rxbuf, u32 rxsz) { PHAL_DATA_TYPE phal; struct recv_stat *prxstat; struct recv_stat report; PRXREPORT prxreport; u32 drvinfosize; u32 rxpktsize; u8 fcssize; u8 ret = _FALSE; prxstat = (struct recv_stat*)rxbuf; report.rxdw0 = le32_to_cpu(prxstat->rxdw0); report.rxdw1 = le32_to_cpu(prxstat->rxdw1); report.rxdw2 = le32_to_cpu(prxstat->rxdw2); report.rxdw3 = le32_to_cpu(prxstat->rxdw3); report.rxdw4 = le32_to_cpu(prxstat->rxdw4); report.rxdw5 = le32_to_cpu(prxstat->rxdw5); prxreport = (PRXREPORT)&report; drvinfosize = prxreport->drvinfosize << 3; rxpktsize = prxreport->pktlen; phal = GET_HAL_DATA(padapter); if (phal->ReceiveConfig & RCR_APPFCS) fcssize = IEEE80211_FCS_LEN; else fcssize = 0; if ((txsz - TXDESC_SIZE) != (rxpktsize - fcssize)) { DBG_8192C("%s: ERROR! size not match tx/rx=%d/%d !\n", __func__, txsz - TXDESC_SIZE, rxpktsize - fcssize); ret = _FALSE; } else { ret = _rtw_memcmp(txbuf + TXDESC_SIZE,\ rxbuf + RXDESC_SIZE + drvinfosize,\ txsz - TXDESC_SIZE); if (ret == _FALSE) { DBG_8192C("%s: ERROR! pkt content mismatch!\n", __func__); } } if (ret == _FALSE) { DBG_8192C("\n%s: TX PKT total=%d, desc=%d, content=%d\n", __func__, txsz, TXDESC_SIZE, txsz - TXDESC_SIZE); DBG_8192C("%s: TX DESC size=%d\n", __func__, TXDESC_SIZE); printdata(txbuf, TXDESC_SIZE); DBG_8192C("%s: TX content size=%d\n", __func__, txsz - TXDESC_SIZE); printdata(txbuf + TXDESC_SIZE, txsz - TXDESC_SIZE); DBG_8192C("\n%s: RX PKT read=%d offset=%d(%d,%d) content=%d\n", __func__, rxsz, RXDESC_SIZE + drvinfosize, RXDESC_SIZE, drvinfosize, rxpktsize); if (rxpktsize != 0) { DBG_8192C("%s: RX DESC size=%d\n", __func__, RXDESC_SIZE); printdata(rxbuf, RXDESC_SIZE); DBG_8192C("%s: RX drvinfo size=%d\n", __func__, drvinfosize); printdata(rxbuf + RXDESC_SIZE, drvinfosize); DBG_8192C("%s: RX content size=%d\n", __func__, rxpktsize); printdata(rxbuf + RXDESC_SIZE + drvinfosize, rxpktsize); } else { DBG_8192C("%s: RX data size=%d\n", __func__, rxsz); printdata(rxbuf, rxsz); } } return ret; } thread_return lbk_thread(thread_context context) { s32 err; PADAPTER padapter; PLOOPBACKDATA ploopback; struct xmit_frame *pxmitframe; u32 cnt, ok, fail, headerlen; u32 pktsize; u32 ff_hwaddr; padapter = (PADAPTER)context; ploopback = padapter->ploopback; if (ploopback == NULL) return -1; cnt = 0; ok = 0; fail = 0; daemonize("%s", "RTW_LBK_THREAD"); allow_signal(SIGTERM); do { if (ploopback->size == 0) { get_random_bytes(&pktsize, 4); pktsize = (pktsize % 1535) + 1; // 1~1535 } else pktsize = ploopback->size; pxmitframe = createloopbackpkt(padapter, pktsize); if (pxmitframe == NULL) { sprintf(ploopback->msg, "loopback FAIL! 3. create Packet FAIL!"); break; } ploopback->txsize = TXDESC_SIZE + pxmitframe->attrib.last_txcmdsz; _rtw_memcpy(ploopback->txbuf, pxmitframe->buf_addr, ploopback->txsize); ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe); cnt++; DBG_8192C("%s: wirte port cnt=%d size=%d\n", __func__, cnt, ploopback->txsize); pxmitframe->pxmitbuf->pdata = ploopback->txbuf; rtw_write_port(padapter, ff_hwaddr, ploopback->txsize, (u8 *)pxmitframe->pxmitbuf); // wait for rx pkt _rtw_down_sema(&ploopback->sema); err = pktcmp(padapter, ploopback->txbuf, ploopback->txsize, ploopback->rxbuf, ploopback->rxsize); if (err == _TRUE) ok++; else fail++; ploopback->txsize = 0; _rtw_memset(ploopback->txbuf, 0, 0x8000); ploopback->rxsize = 0; _rtw_memset(ploopback->rxbuf, 0, 0x8000); freeloopbackpkt(padapter, pxmitframe); pxmitframe = NULL; if (signal_pending(current)) { flush_signals(current); } if ((ploopback->bstop == _TRUE) || ((ploopback->cnt != 0) && (ploopback->cnt == cnt))) { u32 ok_rate, fail_rate, all; all = cnt; ok_rate = (ok*100)/all; fail_rate = (fail*100)/all; sprintf(ploopback->msg,\ "loopback result: ok=%d%%(%d/%d),error=%d%%(%d/%d)",\ ok_rate, ok, all, fail_rate, fail, all); break; } } while (1); ploopback->bstop = _TRUE; thread_exit(); } static void loopbackTest(PADAPTER padapter, u32 cnt, u32 size, u8* pmsg) { PLOOPBACKDATA ploopback; u32 len; s32 err; ploopback = padapter->ploopback; if (ploopback) { if (ploopback->bstop == _FALSE) { ploopback->bstop = _TRUE; _rtw_up_sema(&ploopback->sema); } len = 0; do { len = strlen(ploopback->msg); if (len) break; rtw_msleep_os(1); } while (1); _rtw_memcpy(pmsg, ploopback->msg, len+1); freeLoopback(padapter); return; } // disable dynamic algorithm { u32 DMFlag = DYNAMIC_FUNC_DISABLE; rtw_hal_get_hwreg(padapter, HW_VAR_DM_FLAG, (u8*)&DMFlag); } // create pseudo ad-hoc connection err = initpseudoadhoc(padapter); if (err == _FAIL) { sprintf(pmsg, "loopback FAIL! 1.1 init ad-hoc FAIL!"); return; } err = createpseudoadhoc(padapter); if (err == _FAIL) { sprintf(pmsg, "loopback FAIL! 1.2 create ad-hoc master FAIL!"); return; } err = initLoopback(padapter); if (err) { sprintf(pmsg, "loopback FAIL! 2. init FAIL! error code=%d", err); return; } ploopback = padapter->ploopback; ploopback->bstop = _FALSE; ploopback->cnt = cnt; ploopback->size = size; ploopback->lbkthread = kthread_run(lbk_thread, padapter, "RTW_LBK_THREAD"); if (IS_ERR(padapter->lbkthread)) { freeLoopback(padapter); sprintf(pmsg, "loopback start FAIL! cnt=%d", cnt); return; } sprintf(pmsg, "loopback start! cnt=%d", cnt); } #endif // CONFIG_MAC_LOOPBACK_DRIVER static int rtw_test( struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { u32 len; u8 *pbuf, *pch; char *ptmp; u8 *delim = ","; PADAPTER padapter = rtw_netdev_priv(dev); DBG_871X("+%s\n", __func__); len = wrqu->data.length; pbuf = (u8*)rtw_zmalloc(len); if (pbuf == NULL) { DBG_871X("%s: no memory!\n", __func__); return -ENOMEM; } if (copy_from_user(pbuf, wrqu->data.pointer, len)) { rtw_mfree(pbuf, len); DBG_871X("%s: copy from user fail!\n", __func__); return -EFAULT; } DBG_871X("%s: string=\"%s\"\n", __func__, pbuf); ptmp = (char*)pbuf; pch = strsep(&ptmp, delim); if ((pch == NULL) || (strlen(pch) == 0)) { rtw_mfree(pbuf, len); DBG_871X("%s: parameter error(level 1)!\n", __func__); return -EFAULT; } #ifdef CONFIG_MAC_LOOPBACK_DRIVER if (strcmp(pch, "loopback") == 0) { s32 cnt = 0; u32 size = 64; pch = strsep(&ptmp, delim); if ((pch == NULL) || (strlen(pch) == 0)) { rtw_mfree(pbuf, len); DBG_871X("%s: parameter error(level 2)!\n", __func__); return -EFAULT; } sscanf(pch, "%d", &cnt); DBG_871X("%s: loopback cnt=%d\n", __func__, cnt); pch = strsep(&ptmp, delim); if ((pch == NULL) || (strlen(pch) == 0)) { rtw_mfree(pbuf, len); DBG_871X("%s: parameter error(level 2)!\n", __func__); return -EFAULT; } sscanf(pch, "%d", &size); DBG_871X("%s: loopback size=%d\n", __func__, size); loopbackTest(padapter, cnt, size, extra); wrqu->data.length = strlen(extra) + 1; rtw_mfree(pbuf, len); return 0; } #endif #if 0 //#ifdef CONFIG_RTL8723A if (strcmp(pch, "poweron") == 0) { s32 ret; ret = _InitPowerOn(padapter); DBG_871X("%s: power on %s\n", __func__, (_FAIL==ret) ? "FAIL!":"OK."); sprintf(extra, "Power ON %s", (_FAIL==ret) ? "FAIL!":"OK."); wrqu->data.length = strlen(extra) + 1; rtw_mfree(pbuf, len); return 0; } if (strcmp(pch, "dlfw") == 0) { s32 ret; ret = rtl8723a_FirmwareDownload(padapter); DBG_871X("%s: download FW %s\n", __func__, (_FAIL==ret) ? "FAIL!":"OK."); sprintf(extra, "download FW %s", (_FAIL==ret) ? "FAIL!":"OK."); wrqu->data.length = strlen(extra) + 1; rtw_mfree(pbuf, len); return 0; } #endif #ifdef CONFIG_BT_COEXIST if (strcmp(pch, "bton") == 0) { rtw_btcoex_SetManualControl(padapter, _FALSE); } else if (strcmp(pch, "btoff") == 0) { rtw_btcoex_SetManualControl(padapter, _TRUE); } else if (strcmp(pch, "h2c") == 0) { u8 param[8]; u8 count = 0; u32 tmp; u8 i; u32 pos; s32 ret; do { pch = strsep(&ptmp, delim); if ((pch == NULL) || (strlen(pch) == 0)) break; sscanf(pch, "%x", &tmp); param[count++] = (u8)tmp; } while (count < 8); if (count == 0) { rtw_mfree(pbuf, len); DBG_871X("%s: parameter error(level 2)!\n", __func__); return -EFAULT; } ret = rtw_hal_fill_h2c_cmd(padapter, param[0], count-1, ¶m[1]); pos = sprintf(extra, "H2C ID=0x%02x content=", param[0]); for (i=1; idata.length = strlen(extra) + 1; } else if (strcmp(pch, "ba_rxbuf_sz") == 0) { u8 ba_rxbuf_bz; pch = strsep(&ptmp, delim); if ((pch != NULL) && (strlen(pch) != 0)) { sscanf(pch, "%hhu", &ba_rxbuf_bz); DBG_871X("%s set ba_rxbuf_bz as %u\n", __func__, ba_rxbuf_bz); padapter->fix_ba_rxbuf_bz = ba_rxbuf_bz; rtw_btcoex_RejectApAggregatedPacket(padapter, _TRUE); rtw_btcoex_RejectApAggregatedPacket(padapter, _FALSE); } } #endif // CONFIG_BT_COEXIST rtw_mfree(pbuf, len); return 0; } static iw_handler rtw_handlers[] = { NULL, /* SIOCSIWCOMMIT */ rtw_wx_get_name, /* SIOCGIWNAME */ dummy, /* SIOCSIWNWID */ dummy, /* SIOCGIWNWID */ rtw_wx_set_freq, /* SIOCSIWFREQ */ rtw_wx_get_freq, /* SIOCGIWFREQ */ rtw_wx_set_mode, /* SIOCSIWMODE */ rtw_wx_get_mode, /* SIOCGIWMODE */ dummy, /* SIOCSIWSENS */ rtw_wx_get_sens, /* SIOCGIWSENS */ NULL, /* SIOCSIWRANGE */ rtw_wx_get_range, /* SIOCGIWRANGE */ rtw_wx_set_priv, /* SIOCSIWPRIV */ NULL, /* SIOCGIWPRIV */ NULL, /* SIOCSIWSTATS */ NULL, /* SIOCGIWSTATS */ dummy, /* SIOCSIWSPY */ dummy, /* SIOCGIWSPY */ NULL, /* SIOCGIWTHRSPY */ NULL, /* SIOCWIWTHRSPY */ rtw_wx_set_wap, /* SIOCSIWAP */ rtw_wx_get_wap, /* SIOCGIWAP */ rtw_wx_set_mlme, /* request MLME operation; uses struct iw_mlme */ dummy, /* SIOCGIWAPLIST -- depricated */ rtw_wx_set_scan, /* SIOCSIWSCAN */ rtw_wx_get_scan, /* SIOCGIWSCAN */ rtw_wx_set_essid, /* SIOCSIWESSID */ rtw_wx_get_essid, /* SIOCGIWESSID */ dummy, /* SIOCSIWNICKN */ rtw_wx_get_nick, /* SIOCGIWNICKN */ NULL, /* -- hole -- */ NULL, /* -- hole -- */ rtw_wx_set_rate, /* SIOCSIWRATE */ rtw_wx_get_rate, /* SIOCGIWRATE */ rtw_wx_set_rts, /* SIOCSIWRTS */ rtw_wx_get_rts, /* SIOCGIWRTS */ rtw_wx_set_frag, /* SIOCSIWFRAG */ rtw_wx_get_frag, /* SIOCGIWFRAG */ dummy, /* SIOCSIWTXPOW */ dummy, /* SIOCGIWTXPOW */ dummy, /* SIOCSIWRETRY */ rtw_wx_get_retry, /* SIOCGIWRETRY */ rtw_wx_set_enc, /* SIOCSIWENCODE */ rtw_wx_get_enc, /* SIOCGIWENCODE */ dummy, /* SIOCSIWPOWER */ rtw_wx_get_power, /* SIOCGIWPOWER */ NULL, /*---hole---*/ NULL, /*---hole---*/ rtw_wx_set_gen_ie, /* SIOCSIWGENIE */ NULL, /* SIOCGWGENIE */ rtw_wx_set_auth, /* SIOCSIWAUTH */ NULL, /* SIOCGIWAUTH */ rtw_wx_set_enc_ext, /* SIOCSIWENCODEEXT */ NULL, /* SIOCGIWENCODEEXT */ rtw_wx_set_pmkid, /* SIOCSIWPMKSA */ NULL, /*---hole---*/ }; #if 0 //defined(CONFIG_MP_INCLUDED) && defined(CONFIG_MP_IWPRIV_SUPPORT) static const struct iw_priv_args rtw_private_args[] = { { SIOCIWFIRSTPRIV + 0x00, IW_PRIV_TYPE_CHAR | 1024, 0 , ""}, //set { SIOCIWFIRSTPRIV + 0x01, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , ""},//get /* --- sub-ioctls definitions --- */ { MP_START , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_start" }, //set { MP_PHYPARA, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_phypara" },//get { MP_STOP , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_stop" }, //set { MP_CHANNEL , IW_PRIV_TYPE_CHAR | 1024 , IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_channel" },//get { MP_BANDWIDTH , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_bandwidth"}, //set { MP_RATE , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_rate" },//get { MP_RESET_STATS , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_reset_stats"}, { MP_QUERY , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , "mp_query"}, //get { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set { READ_REG , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "read_reg" }, { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set { MP_RATE , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_rate" }, { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set { READ_RF , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "read_rf" }, { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set { MP_PSD , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_psd"}, { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set { MP_DUMP, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_dump" }, { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set { MP_TXPOWER , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_txpower"}, { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set { MP_ANT_TX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ant_tx"}, { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set { MP_ANT_RX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ant_rx"}, { WRITE_REG, IW_PRIV_TYPE_CHAR | 1024, 0,"write_reg"},//set { MP_NULL, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "NULL" }, { WRITE_RF, IW_PRIV_TYPE_CHAR | 1024, 0,"write_rf"},//set { MP_NULL, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "NULL" }, { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set { MP_CTX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ctx"}, { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set { MP_ARX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_arx"}, { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set { MP_THER , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ther"}, { EFUSE_SET, IW_PRIV_TYPE_CHAR | 1024, 0, "efuse_set" }, { EFUSE_GET, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "efuse_get" }, { MP_PWRTRK , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_pwrtrk"}, { MP_QueryDrvStats, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_drvquery" }, { MP_IOCTL, IW_PRIV_TYPE_CHAR | 1024, 0, "mp_ioctl"}, // mp_ioctl { MP_SetRFPathSwh, IW_PRIV_TYPE_CHAR | 1024, 0, "mp_setrfpath" }, #ifdef CONFIG_RTL8723A { MP_SetBT, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_setbt" }, #endif { SIOCIWFIRSTPRIV + 0x02, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , "test"},//set }; static iw_handler rtw_private_handler[] = { rtw_mp_set, rtw_mp_get, }; #else // not inlucde MP static const struct iw_priv_args rtw_private_args[] = { { SIOCIWFIRSTPRIV + 0x0, IW_PRIV_TYPE_CHAR | 0x7FF, 0, "write" }, { SIOCIWFIRSTPRIV + 0x1, IW_PRIV_TYPE_CHAR | 0x7FF, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | IFNAMSIZ, "read" }, { SIOCIWFIRSTPRIV + 0x2, 0, 0, "driver_ext" }, { SIOCIWFIRSTPRIV + 0x3, 0, 0, "mp_ioctl" }, { SIOCIWFIRSTPRIV + 0x4, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "apinfo" }, { SIOCIWFIRSTPRIV + 0x5, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "setpid" }, { SIOCIWFIRSTPRIV + 0x6, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wps_start" }, //for PLATFORM_MT53XX { SIOCIWFIRSTPRIV + 0x7, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "get_sensitivity" }, { SIOCIWFIRSTPRIV + 0x8, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wps_prob_req_ie" }, { SIOCIWFIRSTPRIV + 0x9, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wps_assoc_req_ie" }, //for RTK_DMP_PLATFORM { SIOCIWFIRSTPRIV + 0xA, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "channel_plan" }, { SIOCIWFIRSTPRIV + 0xB, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "dbg" }, { SIOCIWFIRSTPRIV + 0xC, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 3, 0, "rfw" }, { SIOCIWFIRSTPRIV + 0xD, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | IFNAMSIZ, "rfr" }, #if 0 { SIOCIWFIRSTPRIV + 0xE,0,0, "wowlan_ctrl" }, #endif { SIOCIWFIRSTPRIV + 0x10, IW_PRIV_TYPE_CHAR | 1024, 0, "p2p_set" }, { SIOCIWFIRSTPRIV + 0x11, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , "p2p_get" }, { SIOCIWFIRSTPRIV + 0x12, 0, 0, "NULL" }, { SIOCIWFIRSTPRIV + 0x13, IW_PRIV_TYPE_CHAR | 64, IW_PRIV_TYPE_CHAR | 64 , "p2p_get2" }, { SIOCIWFIRSTPRIV + 0x14, IW_PRIV_TYPE_CHAR | 64, 0, "tdls" }, { SIOCIWFIRSTPRIV + 0x15, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | 1024 , "tdls_get" }, { SIOCIWFIRSTPRIV + 0x16, IW_PRIV_TYPE_CHAR | 64, 0, "pm_set" }, {SIOCIWFIRSTPRIV + 0x18, IW_PRIV_TYPE_CHAR | IFNAMSIZ , 0 , "rereg_nd_name"}, #ifdef CONFIG_MP_INCLUDED {SIOCIWFIRSTPRIV + 0x1A, IW_PRIV_TYPE_CHAR | 1024, 0, "NULL"}, {SIOCIWFIRSTPRIV + 0x1B, IW_PRIV_TYPE_CHAR | 128, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "NULL"}, #else {SIOCIWFIRSTPRIV + 0x1A, IW_PRIV_TYPE_CHAR | 1024, 0, "efuse_set"}, {SIOCIWFIRSTPRIV + 0x1B, IW_PRIV_TYPE_CHAR | 128, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "efuse_get"}, #endif { SIOCIWFIRSTPRIV + 0x1D, IW_PRIV_TYPE_CHAR | 40, IW_PRIV_TYPE_CHAR | 0x7FF, "test" }, #ifdef CONFIG_INTEL_WIDI { SIOCIWFIRSTPRIV + 0x1E, IW_PRIV_TYPE_CHAR | 1024, 0, "widi_set" }, { SIOCIWFIRSTPRIV + 0x1F, IW_PRIV_TYPE_CHAR | 128, 0, "widi_prob_req" }, #endif // CONFIG_INTEL_WIDI #ifdef CONFIG_MP_INCLUDED { SIOCIWFIRSTPRIV + 0x0E, IW_PRIV_TYPE_CHAR | 1024, 0 , ""}, //set { SIOCIWFIRSTPRIV + 0x0F, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , ""},//get /* --- sub-ioctls definitions --- */ { MP_START , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_start" }, //set { MP_PHYPARA, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_phypara" },//get { MP_STOP , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_stop" }, //set { MP_CHANNEL , IW_PRIV_TYPE_CHAR | 1024 , IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_channel" },//get { MP_BANDWIDTH , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_bandwidth"}, //set { MP_RATE , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_rate" },//get { MP_RESET_STATS , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_reset_stats"}, { MP_QUERY , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , "mp_query"}, //get { READ_REG , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "read_reg" }, { MP_RATE , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_rate" }, { READ_RF , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "read_rf" }, { MP_PSD , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_psd"}, { MP_DUMP, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_dump" }, { MP_TXPOWER , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_txpower"}, { MP_ANT_TX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ant_tx"}, { MP_ANT_RX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ant_rx"}, { WRITE_REG , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "write_reg" }, { WRITE_RF , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "write_rf" }, { MP_CTX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ctx"}, { MP_ARX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_arx"}, { MP_THER , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ther"}, { EFUSE_SET, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "efuse_set" }, { EFUSE_GET, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "efuse_get" }, { MP_PWRTRK , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_pwrtrk"}, { MP_QueryDrvStats, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_drvquery" }, { MP_IOCTL, IW_PRIV_TYPE_CHAR | 1024, 0, "mp_ioctl"}, // mp_ioctl { MP_SetRFPathSwh, IW_PRIV_TYPE_CHAR | 1024, 0, "mp_setrfpath" }, { MP_PwrCtlDM, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_pwrctldm" }, { MP_GET_TXPOWER_INX, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_get_txpower" }, #if defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B) { MP_SetBT, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_setbt" }, { MP_DISABLE_BT_COEXIST, IW_PRIV_TYPE_CHAR | 1024, 0, "mp_disa_btcoex"}, #endif { CTA_TEST, IW_PRIV_TYPE_CHAR | 1024, 0, "cta_test"}, #endif #ifdef CONFIG_WOWLAN { MP_WOW_ENABLE , IW_PRIV_TYPE_CHAR | 1024, 0, "wow_mode" }, //set #endif #ifdef CONFIG_AP_WOWLAN { MP_AP_WOW_ENABLE , IW_PRIV_TYPE_CHAR | 1024, 0, "ap_wow_mode" }, //set #endif }; static iw_handler rtw_private_handler[] = { rtw_wx_write32, //0x00 rtw_wx_read32, //0x01 rtw_drvext_hdl, //0x02 rtw_mp_ioctl_hdl, //0x03 // for MM DTV platform rtw_get_ap_info, //0x04 rtw_set_pid, //0x05 rtw_wps_start, //0x06 // for PLATFORM_MT53XX rtw_wx_get_sensitivity, //0x07 rtw_wx_set_mtk_wps_probe_ie, //0x08 rtw_wx_set_mtk_wps_ie, //0x09 // for RTK_DMP_PLATFORM // Set Channel depend on the country code rtw_wx_set_channel_plan, //0x0A rtw_dbg_port, //0x0B rtw_wx_write_rf, //0x0C rtw_wx_read_rf, //0x0D #ifdef CONFIG_MP_INCLUDED rtw_mp_set, //0x0E rtw_mp_get, //0x0F #else rtw_wx_priv_null, //0x0E rtw_wx_priv_null, //0x0F #endif rtw_p2p_set, //0x10 rtw_p2p_get, //0x11 NULL, //0x12 rtw_p2p_get2, //0x13 rtw_tdls, //0x14 rtw_tdls_get, //0x15 rtw_pm_set, //0x16 rtw_wx_priv_null, //0x17 rtw_rereg_nd_name, //0x18 rtw_wx_priv_null, //0x19 #ifdef CONFIG_MP_INCLUDED rtw_wx_priv_null, //0x1A rtw_wx_priv_null, //0x1B #else rtw_mp_efuse_set, //0x1A rtw_mp_efuse_get, //0x1B #endif NULL, // 0x1C is reserved for hostapd rtw_test, // 0x1D #ifdef CONFIG_INTEL_WIDI rtw_widi_set, //0x1E rtw_widi_set_probe_request, //0x1F #endif // CONFIG_INTEL_WIDI }; #endif // #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_MP_IWPRIV_SUPPORT) #if WIRELESS_EXT >= 17 static struct iw_statistics *rtw_get_wireless_stats(struct net_device *dev) { _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct iw_statistics *piwstats=&padapter->iwstats; int tmp_level = 0; int tmp_qual = 0; int tmp_noise = 0; if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) != _TRUE) { piwstats->qual.qual = 0; piwstats->qual.level = 0; piwstats->qual.noise = 0; //DBG_871X("No link level:%d, qual:%d, noise:%d\n", tmp_level, tmp_qual, tmp_noise); } else{ #ifdef CONFIG_SIGNAL_DISPLAY_DBM tmp_level = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); #else #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING { /* Do signal scale mapping when using percentage as the unit of signal strength, since the scale mapping is skipped in odm */ HAL_DATA_TYPE *pHal = GET_HAL_DATA(padapter); tmp_level = (u8)odm_SignalScaleMapping(&pHal->odmpriv, padapter->recvpriv.signal_strength); } #else tmp_level = padapter->recvpriv.signal_strength; #endif #endif tmp_qual = padapter->recvpriv.signal_qual; #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) if(rtw_linked_check(padapter)){ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct noise_info info; info.bPauseDIG = _TRUE; info.IGIValue = 0x1e; info.max_time = 100;//ms info.chan = pmlmeext->cur_channel ;//rtw_get_oper_ch(padapter); rtw_ps_deny(padapter, PS_DENY_IOCTL); LeaveAllPowerSaveModeDirect(padapter); rtw_hal_set_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&info, _FALSE); //ODM_InbandNoise_Monitor(podmpriv,_TRUE,0x20,100); rtw_ps_deny_cancel(padapter, PS_DENY_IOCTL); rtw_hal_get_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&(info.chan), &(padapter->recvpriv.noise)); #ifdef DBG_NOISE_MONITOR DBG_871X("chan:%d,noise_level:%d\n",info.chan,padapter->recvpriv.noise); #endif } #endif tmp_noise = padapter->recvpriv.noise; //DBG_871X("level:%d, qual:%d, noise:%d, rssi (%d)\n", tmp_level, tmp_qual, tmp_noise,padapter->recvpriv.rssi); piwstats->qual.level = tmp_level; piwstats->qual.qual = tmp_qual; piwstats->qual.noise = tmp_noise; } #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,14)) piwstats->qual.updated = IW_QUAL_ALL_UPDATED ;//|IW_QUAL_DBM; #else #ifdef RTK_DMP_PLATFORM //IW_QUAL_DBM= 0x8, if driver use this flag, wireless extension will show value of dbm. //remove this flag for show percentage 0~100 piwstats->qual.updated = 0x07; #else piwstats->qual.updated = 0x0f; #endif #endif #ifdef CONFIG_SIGNAL_DISPLAY_DBM piwstats->qual.updated = piwstats->qual.updated | IW_QUAL_DBM; #endif return &padapter->iwstats; } #endif #ifdef CONFIG_WIRELESS_EXT struct iw_handler_def rtw_handlers_def = { .standard = rtw_handlers, .num_standard = sizeof(rtw_handlers) / sizeof(iw_handler), #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)) || defined(CONFIG_WEXT_PRIV) .private = rtw_private_handler, .private_args = (struct iw_priv_args *)rtw_private_args, .num_private = sizeof(rtw_private_handler) / sizeof(iw_handler), .num_private_args = sizeof(rtw_private_args) / sizeof(struct iw_priv_args), #endif #if WIRELESS_EXT >= 17 .get_wireless_stats = rtw_get_wireless_stats, #endif }; #endif // copy from net/wireless/wext.c start /* ---------------------------------------------------------------- */ /* * Calculate size of private arguments */ static const char iw_priv_type_size[] = { 0, /* IW_PRIV_TYPE_NONE */ 1, /* IW_PRIV_TYPE_BYTE */ 1, /* IW_PRIV_TYPE_CHAR */ 0, /* Not defined */ sizeof(__u32), /* IW_PRIV_TYPE_INT */ sizeof(struct iw_freq), /* IW_PRIV_TYPE_FLOAT */ sizeof(struct sockaddr), /* IW_PRIV_TYPE_ADDR */ 0, /* Not defined */ }; static int get_priv_size(__u16 args) { int num = args & IW_PRIV_SIZE_MASK; int type = (args & IW_PRIV_TYPE_MASK) >> 12; return num * iw_priv_type_size[type]; } // copy from net/wireless/wext.c end static int rtw_ioctl_wext_private(struct net_device *dev, union iwreq_data *wrq_data) { int err = 0; u8 *input = NULL; u32 input_len = 0; const char delim[] = " "; u8 *output = NULL; u32 output_len = 0; u32 count = 0; u8 *buffer= NULL; u32 buffer_len = 0; char *ptr = NULL; u8 cmdname[17] = {0}; // IFNAMSIZ+1 u32 cmdlen; s32 len; u8 *extra = NULL; u32 extra_size = 0; s32 k; const iw_handler *priv; /* Private ioctl */ const struct iw_priv_args *priv_args; /* Private ioctl description */ u32 num_priv; /* Number of ioctl */ u32 num_priv_args; /* Number of descriptions */ iw_handler handler; int temp; int subcmd = 0; /* sub-ioctl index */ int offset = 0; /* Space for sub-ioctl index */ union iwreq_data wdata; _rtw_memcpy(&wdata, wrq_data, sizeof(wdata)); input_len = 2048; input = rtw_zmalloc(input_len); if (NULL == input) return -ENOMEM; if (copy_from_user(input, wdata.data.pointer, input_len)) { err = -EFAULT; goto exit; } ptr = input; len = strlen(input); sscanf(ptr, "%16s", cmdname); cmdlen = strlen(cmdname); DBG_8192C("%s: cmd=%s\n", __func__, cmdname); // skip command string if (cmdlen > 0) cmdlen += 1; // skip one space ptr += cmdlen; len -= cmdlen; DBG_8192C("%s: parameters=%s\n", __func__, ptr); priv = rtw_private_handler; priv_args = rtw_private_args; num_priv = sizeof(rtw_private_handler) / sizeof(iw_handler); num_priv_args = sizeof(rtw_private_args) / sizeof(struct iw_priv_args); if (num_priv_args == 0) { err = -EOPNOTSUPP; goto exit; } /* Search the correct ioctl */ k = -1; while((++k < num_priv_args) && strcmp(priv_args[k].name, cmdname)); /* If not found... */ if (k == num_priv_args) { err = -EOPNOTSUPP; goto exit; } /* Watch out for sub-ioctls ! */ if (priv_args[k].cmd < SIOCDEVPRIVATE) { int j = -1; /* Find the matching *real* ioctl */ while ((++j < num_priv_args) && ((priv_args[j].name[0] != '\0') || (priv_args[j].set_args != priv_args[k].set_args) || (priv_args[j].get_args != priv_args[k].get_args))); /* If not found... */ if (j == num_priv_args) { err = -EINVAL; goto exit; } /* Save sub-ioctl number */ subcmd = priv_args[k].cmd; /* Reserve one int (simplify alignment issues) */ offset = sizeof(__u32); /* Use real ioctl definition from now on */ k = j; } buffer = rtw_zmalloc(4096); if (NULL == buffer) { err = -ENOMEM; goto exit; } /* If we have to set some data */ if ((priv_args[k].set_args & IW_PRIV_TYPE_MASK) && (priv_args[k].set_args & IW_PRIV_SIZE_MASK)) { u8 *str; switch (priv_args[k].set_args & IW_PRIV_TYPE_MASK) { case IW_PRIV_TYPE_BYTE: /* Fetch args */ count = 0; do { str = strsep(&ptr, delim); if (NULL == str) break; sscanf(str, "%i", &temp); buffer[count++] = (u8)temp; } while (1); buffer_len = count; /* Number of args to fetch */ wdata.data.length = count; if (wdata.data.length > (priv_args[k].set_args & IW_PRIV_SIZE_MASK)) wdata.data.length = priv_args[k].set_args & IW_PRIV_SIZE_MASK; break; case IW_PRIV_TYPE_INT: /* Fetch args */ count = 0; do { str = strsep(&ptr, delim); if (NULL == str) break; sscanf(str, "%i", &temp); ((s32*)buffer)[count++] = (s32)temp; } while (1); buffer_len = count * sizeof(s32); /* Number of args to fetch */ wdata.data.length = count; if (wdata.data.length > (priv_args[k].set_args & IW_PRIV_SIZE_MASK)) wdata.data.length = priv_args[k].set_args & IW_PRIV_SIZE_MASK; break; case IW_PRIV_TYPE_CHAR: if (len > 0) { /* Size of the string to fetch */ wdata.data.length = len; if (wdata.data.length > (priv_args[k].set_args & IW_PRIV_SIZE_MASK)) wdata.data.length = priv_args[k].set_args & IW_PRIV_SIZE_MASK; /* Fetch string */ _rtw_memcpy(buffer, ptr, wdata.data.length); } else { wdata.data.length = 1; buffer[0] = '\0'; } buffer_len = wdata.data.length; break; default: DBG_8192C("%s: Not yet implemented...\n", __func__); err = -1; goto exit; } if ((priv_args[k].set_args & IW_PRIV_SIZE_FIXED) && (wdata.data.length != (priv_args[k].set_args & IW_PRIV_SIZE_MASK))) { DBG_8192C("%s: The command %s needs exactly %d argument(s)...\n", __func__, cmdname, priv_args[k].set_args & IW_PRIV_SIZE_MASK); err = -EINVAL; goto exit; } } /* if args to set */ else { wdata.data.length = 0L; } /* Those two tests are important. They define how the driver * will have to handle the data */ if ((priv_args[k].set_args & IW_PRIV_SIZE_FIXED) && ((get_priv_size(priv_args[k].set_args) + offset) <= IFNAMSIZ)) { /* First case : all SET args fit within wrq */ if (offset) wdata.mode = subcmd; _rtw_memcpy(wdata.name + offset, buffer, IFNAMSIZ - offset); } else { if ((priv_args[k].set_args == 0) && (priv_args[k].get_args & IW_PRIV_SIZE_FIXED) && (get_priv_size(priv_args[k].get_args) <= IFNAMSIZ)) { /* Second case : no SET args, GET args fit within wrq */ if (offset) wdata.mode = subcmd; } else { /* Third case : args won't fit in wrq, or variable number of args */ if (copy_to_user(wdata.data.pointer, buffer, buffer_len)) { err = -EFAULT; goto exit; } wdata.data.flags = subcmd; } } rtw_mfree(input, input_len); input = NULL; extra_size = 0; if (IW_IS_SET(priv_args[k].cmd)) { /* Size of set arguments */ extra_size = get_priv_size(priv_args[k].set_args); /* Does it fits in iwr ? */ if ((priv_args[k].set_args & IW_PRIV_SIZE_FIXED) && ((extra_size + offset) <= IFNAMSIZ)) extra_size = 0; } else { /* Size of get arguments */ extra_size = get_priv_size(priv_args[k].get_args); /* Does it fits in iwr ? */ if ((priv_args[k].get_args & IW_PRIV_SIZE_FIXED) && (extra_size <= IFNAMSIZ)) extra_size = 0; } if (extra_size == 0) { extra = (u8*)&wdata; rtw_mfree(buffer, 4096); buffer = NULL; } else extra = buffer; handler = priv[priv_args[k].cmd - SIOCIWFIRSTPRIV]; err = handler(dev, NULL, &wdata, extra); /* If we have to get some data */ if ((priv_args[k].get_args & IW_PRIV_TYPE_MASK) && (priv_args[k].get_args & IW_PRIV_SIZE_MASK)) { int j; int n = 0; /* number of args */ u8 str[20] = {0}; /* Check where is the returned data */ if ((priv_args[k].get_args & IW_PRIV_SIZE_FIXED) && (get_priv_size(priv_args[k].get_args) <= IFNAMSIZ)) n = priv_args[k].get_args & IW_PRIV_SIZE_MASK; else n = wdata.data.length; output = rtw_zmalloc(4096); if (NULL == output) { err = -ENOMEM; goto exit; } switch (priv_args[k].get_args & IW_PRIV_TYPE_MASK) { case IW_PRIV_TYPE_BYTE: /* Display args */ for (j = 0; j < n; j++) { sprintf(str, "%d ", extra[j]); len = strlen(str); output_len = strlen(output); if ((output_len + len + 1) > 4096) { err = -E2BIG; goto exit; } _rtw_memcpy(output+output_len, str, len); } break; case IW_PRIV_TYPE_INT: /* Display args */ for (j = 0; j < n; j++) { sprintf(str, "%d ", ((__s32*)extra)[j]); len = strlen(str); output_len = strlen(output); if ((output_len + len + 1) > 4096) { err = -E2BIG; goto exit; } _rtw_memcpy(output+output_len, str, len); } break; case IW_PRIV_TYPE_CHAR: /* Display args */ _rtw_memcpy(output, extra, n); break; default: DBG_8192C("%s: Not yet implemented...\n", __func__); err = -1; goto exit; } output_len = strlen(output) + 1; wrq_data->data.length = output_len; if (copy_to_user(wrq_data->data.pointer, output, output_len)) { err = -EFAULT; goto exit; } } /* if args to set */ else { wrq_data->data.length = 0; } exit: if (input) rtw_mfree(input, input_len); if (buffer) rtw_mfree(buffer, 4096); if (output) rtw_mfree(output, 4096); return err; } int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) { struct iwreq *wrq = (struct iwreq *)rq; int ret=0; switch (cmd) { case RTL_IOCTL_WPA_SUPPLICANT: ret = wpa_supplicant_ioctl(dev, &wrq->u.data); break; #ifdef CONFIG_AP_MODE case RTL_IOCTL_HOSTAPD: ret = rtw_hostapd_ioctl(dev, &wrq->u.data); break; #ifdef CONFIG_NO_WIRELESS_HANDLERS case SIOCSIWMODE: ret = rtw_wx_set_mode(dev, NULL, &wrq->u, NULL); break; #endif #endif // CONFIG_AP_MODE case SIOCDEVPRIVATE: ret = rtw_ioctl_wext_private(dev, &wrq->u); break; case (SIOCDEVPRIVATE+1): ret = rtw_android_priv_cmd(dev, rq, cmd); break; default: ret = -EOPNOTSUPP; break; } return ret; } rtl8812au-4.3.8.12175.20140902+dfsg/os_dep/linux/mlme_linux.c000066400000000000000000000370701261122257400224330ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _MLME_OSDEP_C_ #include #ifdef RTK_DMP_PLATFORM void Linkup_workitem_callback(struct work_struct *work) { struct mlme_priv *pmlmepriv = container_of(work, struct mlme_priv, Linkup_workitem); _adapter *padapter = container_of(pmlmepriv, _adapter, mlmepriv); _func_enter_; RT_TRACE(_module_mlme_osdep_c_,_drv_info_,("+ Linkup_workitem_callback\n")); #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_LINKUP); #else kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_LINKUP); #endif _func_exit_; } void Linkdown_workitem_callback(struct work_struct *work) { struct mlme_priv *pmlmepriv = container_of(work, struct mlme_priv, Linkdown_workitem); _adapter *padapter = container_of(pmlmepriv, _adapter, mlmepriv); _func_enter_; RT_TRACE(_module_mlme_osdep_c_,_drv_info_,("+ Linkdown_workitem_callback\n")); #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_LINKDOWN); #else kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_LINKDOWN); #endif _func_exit_; } #endif /* void sitesurvey_ctrl_handler(void *FunctionContext) { _adapter *adapter = (_adapter *)FunctionContext; _sitesurvey_ctrl_handler(adapter); _set_timer(&adapter->mlmepriv.sitesurveyctrl.sitesurvey_ctrl_timer, 3000); } */ void rtw_join_timeout_handler (void *FunctionContext) { _adapter *adapter = (_adapter *)FunctionContext; _rtw_join_timeout_handler(adapter); } void _rtw_scan_timeout_handler (void *FunctionContext) { _adapter *adapter = (_adapter *)FunctionContext; rtw_scan_timeout_handler(adapter); } void _dynamic_check_timer_handlder (void *FunctionContext) { _adapter *adapter = (_adapter *)FunctionContext; #if (MP_DRIVER == 1) if (adapter->registrypriv.mp_mode == 1 && adapter->mppriv.mp_dm ==0) //for MP ODM dynamic Tx power tracking { //DBG_871X("_dynamic_check_timer_handlder mp_dm =0 return \n"); _set_timer(&adapter->mlmepriv.dynamic_chk_timer, 2000); return; } #endif #ifdef CONFIG_CONCURRENT_MODE if(adapter->pbuddy_adapter) rtw_dynamic_check_timer_handlder(adapter->pbuddy_adapter); #endif //CONFIG_CONCURRENT_MODE rtw_dynamic_check_timer_handlder(adapter); _set_timer(&adapter->mlmepriv.dynamic_chk_timer, 2000); } #ifdef CONFIG_SET_SCAN_DENY_TIMER void _rtw_set_scan_deny_timer_hdl(void *FunctionContext) { _adapter *adapter = (_adapter *)FunctionContext; rtw_set_scan_deny_timer_hdl(adapter); } #endif void rtw_init_mlme_timer(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _init_timer(&(pmlmepriv->assoc_timer), padapter->pnetdev, rtw_join_timeout_handler, padapter); //_init_timer(&(pmlmepriv->sitesurveyctrl.sitesurvey_ctrl_timer), padapter->pnetdev, sitesurvey_ctrl_handler, padapter); _init_timer(&(pmlmepriv->scan_to_timer), padapter->pnetdev, _rtw_scan_timeout_handler, padapter); _init_timer(&(pmlmepriv->dynamic_chk_timer), padapter->pnetdev, _dynamic_check_timer_handlder, padapter); #ifdef CONFIG_SET_SCAN_DENY_TIMER _init_timer(&(pmlmepriv->set_scan_deny_timer), padapter->pnetdev, _rtw_set_scan_deny_timer_hdl, padapter); #endif #ifdef RTK_DMP_PLATFORM _init_workitem(&(pmlmepriv->Linkup_workitem), Linkup_workitem_callback, padapter); _init_workitem(&(pmlmepriv->Linkdown_workitem), Linkdown_workitem_callback, padapter); #endif } extern void rtw_indicate_wx_assoc_event(_adapter *padapter); extern void rtw_indicate_wx_disassoc_event(_adapter *padapter); void rtw_os_indicate_connect(_adapter *adapter) { struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); _func_enter_; #ifdef CONFIG_IOCTL_CFG80211 if ( (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)==_TRUE ) || (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)==_TRUE ) ) { rtw_cfg80211_ibss_indicate_connect(adapter); } else rtw_cfg80211_indicate_connect(adapter); #endif //CONFIG_IOCTL_CFG80211 rtw_indicate_wx_assoc_event(adapter); netif_carrier_on(adapter->pnetdev); if(adapter->pid[2] !=0) rtw_signal_process(adapter->pid[2], SIGALRM); #ifdef RTK_DMP_PLATFORM _set_workitem(&adapter->mlmepriv.Linkup_workitem); #endif _func_exit_; } extern void indicate_wx_scan_complete_event(_adapter *padapter); void rtw_os_indicate_scan_done( _adapter *padapter, bool aborted) { #ifdef CONFIG_IOCTL_CFG80211 rtw_cfg80211_indicate_scan_done(padapter, aborted); #endif indicate_wx_scan_complete_event(padapter); } static RT_PMKID_LIST backupPMKIDList[ NUM_PMKID_CACHE ]; void rtw_reset_securitypriv( _adapter *adapter ) { u8 backupPMKIDIndex = 0; u8 backupTKIPCountermeasure = 0x00; u32 backupTKIPcountermeasure_time = 0; // add for CONFIG_IEEE80211W, none 11w also can use _irqL irqL; struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; _enter_critical_bh(&adapter->security_key_mutex, &irqL); if(adapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)//802.1x { // Added by Albert 2009/02/18 // We have to backup the PMK information for WiFi PMK Caching test item. // // Backup the btkip_countermeasure information. // When the countermeasure is trigger, the driver have to disconnect with AP for 60 seconds. _rtw_memset( &backupPMKIDList[ 0 ], 0x00, sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE ); _rtw_memcpy( &backupPMKIDList[ 0 ], &adapter->securitypriv.PMKIDList[ 0 ], sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE ); backupPMKIDIndex = adapter->securitypriv.PMKIDIndex; backupTKIPCountermeasure = adapter->securitypriv.btkip_countermeasure; backupTKIPcountermeasure_time = adapter->securitypriv.btkip_countermeasure_time; #ifdef CONFIG_IEEE80211W //reset RX BIP packet number pmlmeext->mgnt_80211w_IPN_rx = 0; #endif //CONFIG_IEEE80211W _rtw_memset((unsigned char *)&adapter->securitypriv, 0, sizeof (struct security_priv)); //_init_timer(&(adapter->securitypriv.tkip_timer),adapter->pnetdev, rtw_use_tkipkey_handler, adapter); // Added by Albert 2009/02/18 // Restore the PMK information to securitypriv structure for the following connection. _rtw_memcpy( &adapter->securitypriv.PMKIDList[ 0 ], &backupPMKIDList[ 0 ], sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE ); adapter->securitypriv.PMKIDIndex = backupPMKIDIndex; adapter->securitypriv.btkip_countermeasure = backupTKIPCountermeasure; adapter->securitypriv.btkip_countermeasure_time = backupTKIPcountermeasure_time; adapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; adapter->securitypriv.ndisencryptstatus = Ndis802_11WEPDisabled; } else //reset values in securitypriv { //if(adapter->mlmepriv.fw_state & WIFI_STATION_STATE) //{ struct security_priv *psec_priv=&adapter->securitypriv; psec_priv->dot11AuthAlgrthm =dot11AuthAlgrthm_Open; //open system psec_priv->dot11PrivacyAlgrthm = _NO_PRIVACY_; psec_priv->dot11PrivacyKeyIndex = 0; psec_priv->dot118021XGrpPrivacy = _NO_PRIVACY_; psec_priv->dot118021XGrpKeyid = 1; psec_priv->ndisauthtype = Ndis802_11AuthModeOpen; psec_priv->ndisencryptstatus = Ndis802_11WEPDisabled; //} } // add for CONFIG_IEEE80211W, none 11w also can use _exit_critical_bh(&adapter->security_key_mutex, &irqL); } void rtw_os_indicate_disconnect( _adapter *adapter ) { //RT_PMKID_LIST backupPMKIDList[ NUM_PMKID_CACHE ]; _func_enter_; netif_carrier_off(adapter->pnetdev); // Do it first for tx broadcast pkt after disconnection issue! #ifdef CONFIG_IOCTL_CFG80211 rtw_cfg80211_indicate_disconnect(adapter); #endif //CONFIG_IOCTL_CFG80211 rtw_indicate_wx_disassoc_event(adapter); #ifdef RTK_DMP_PLATFORM _set_workitem(&adapter->mlmepriv.Linkdown_workitem); #endif //modify for CONFIG_IEEE80211W, none 11w also can use the same command rtw_reset_securitypriv_cmd(adapter); _func_exit_; } void rtw_report_sec_ie(_adapter *adapter,u8 authmode,u8 *sec_ie) { uint len; u8 *buff,*p,i; union iwreq_data wrqu; _func_enter_; RT_TRACE(_module_mlme_osdep_c_,_drv_info_,("+rtw_report_sec_ie, authmode=%d\n", authmode)); buff = NULL; if(authmode==_WPA_IE_ID_) { RT_TRACE(_module_mlme_osdep_c_,_drv_info_,("rtw_report_sec_ie, authmode=%d\n", authmode)); buff = rtw_zmalloc(IW_CUSTOM_MAX); if (NULL == buff) { DBG_871X(FUNC_ADPT_FMT ": alloc memory FAIL!!\n", FUNC_ADPT_ARG(adapter)); return; } p = buff; p+=sprintf(p,"ASSOCINFO(ReqIEs="); len = sec_ie[1]+2; len = (len < IW_CUSTOM_MAX) ? len:IW_CUSTOM_MAX; for(i=0;ipnetdev,IWEVCUSTOM,&wrqu,buff); #endif rtw_mfree(buff, IW_CUSTOM_MAX); } exit: _func_exit_; } void _survey_timer_hdl (void *FunctionContext) { _adapter *padapter = (_adapter *)FunctionContext; survey_timer_hdl(padapter); } void _link_timer_hdl (void *FunctionContext) { _adapter *padapter = (_adapter *)FunctionContext; link_timer_hdl(padapter); } void _addba_timer_hdl(void *FunctionContext) { struct sta_info *psta = (struct sta_info *)FunctionContext; addba_timer_hdl(psta); } #ifdef CONFIG_IEEE80211W void _sa_query_timer_hdl (void *FunctionContext) { _adapter *padapter = (_adapter *)FunctionContext; sa_query_timer_hdl(padapter); } #endif //CONFIG_IEEE80211W void init_addba_retry_timer(_adapter *padapter, struct sta_info *psta) { _init_timer(&psta->addba_retry_timer, padapter->pnetdev, _addba_timer_hdl, psta); } /* void _reauth_timer_hdl(void *FunctionContext) { _adapter *padapter = (_adapter *)FunctionContext; reauth_timer_hdl(padapter); } void _reassoc_timer_hdl(void *FunctionContext) { _adapter *padapter = (_adapter *)FunctionContext; reassoc_timer_hdl(padapter); } */ void init_mlme_ext_timer(_adapter *padapter) { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; _init_timer(&pmlmeext->survey_timer, padapter->pnetdev, _survey_timer_hdl, padapter); _init_timer(&pmlmeext->link_timer, padapter->pnetdev, _link_timer_hdl, padapter); #ifdef CONFIG_IEEE80211W _init_timer(&pmlmeext->sa_query_timer, padapter->pnetdev, _sa_query_timer_hdl, padapter); #endif //CONFIG_IEEE80211W //_init_timer(&pmlmeext->ADDBA_timer, padapter->pnetdev, _addba_timer_hdl, padapter); //_init_timer(&pmlmeext->reauth_timer, padapter->pnetdev, _reauth_timer_hdl, padapter); //_init_timer(&pmlmeext->reassoc_timer, padapter->pnetdev, _reassoc_timer_hdl, padapter); } #ifdef CONFIG_AP_MODE void rtw_indicate_sta_assoc_event(_adapter *padapter, struct sta_info *psta) { union iwreq_data wrqu; struct sta_priv *pstapriv = &padapter->stapriv; if(psta==NULL) return; if(psta->aid > NUM_STA) return; if(pstapriv->sta_aid[psta->aid - 1] != psta) return; wrqu.addr.sa_family = ARPHRD_ETHER; _rtw_memcpy(wrqu.addr.sa_data, psta->hwaddr, ETH_ALEN); DBG_871X("+rtw_indicate_sta_assoc_event\n"); #ifndef CONFIG_IOCTL_CFG80211 wireless_send_event(padapter->pnetdev, IWEVREGISTERED, &wrqu, NULL); #endif } void rtw_indicate_sta_disassoc_event(_adapter *padapter, struct sta_info *psta) { union iwreq_data wrqu; struct sta_priv *pstapriv = &padapter->stapriv; if(psta==NULL) return; if(psta->aid > NUM_STA) return; if(pstapriv->sta_aid[psta->aid - 1] != psta) return; wrqu.addr.sa_family = ARPHRD_ETHER; _rtw_memcpy(wrqu.addr.sa_data, psta->hwaddr, ETH_ALEN); DBG_871X("+rtw_indicate_sta_disassoc_event\n"); #ifndef CONFIG_IOCTL_CFG80211 wireless_send_event(padapter->pnetdev, IWEVEXPIRED, &wrqu, NULL); #endif } #ifdef CONFIG_HOSTAPD_MLME static int mgnt_xmit_entry(struct sk_buff *skb, struct net_device *pnetdev) { struct hostapd_priv *phostapdpriv = rtw_netdev_priv(pnetdev); _adapter *padapter = (_adapter *)phostapdpriv->padapter; //DBG_871X("%s\n", __FUNCTION__); return rtw_hal_hostap_mgnt_xmit_entry(padapter, skb); } static int mgnt_netdev_open(struct net_device *pnetdev) { struct hostapd_priv *phostapdpriv = rtw_netdev_priv(pnetdev); DBG_871X("mgnt_netdev_open: MAC Address:" MAC_FMT "\n", MAC_ARG(pnetdev->dev_addr)); init_usb_anchor(&phostapdpriv->anchored); rtw_netif_wake_queue(pnetdev); netif_carrier_on(pnetdev); //rtw_write16(phostapdpriv->padapter, 0x0116, 0x0100);//only excluding beacon return 0; } static int mgnt_netdev_close(struct net_device *pnetdev) { struct hostapd_priv *phostapdpriv = rtw_netdev_priv(pnetdev); DBG_871X("%s\n", __FUNCTION__); usb_kill_anchored_urbs(&phostapdpriv->anchored); netif_carrier_off(pnetdev); rtw_netif_stop_queue(pnetdev); //rtw_write16(phostapdpriv->padapter, 0x0116, 0x3f3f); return 0; } #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) static const struct net_device_ops rtl871x_mgnt_netdev_ops = { .ndo_open = mgnt_netdev_open, .ndo_stop = mgnt_netdev_close, .ndo_start_xmit = mgnt_xmit_entry, //.ndo_set_mac_address = r871x_net_set_mac_address, //.ndo_get_stats = r871x_net_get_stats, //.ndo_do_ioctl = r871x_mp_ioctl, }; #endif int hostapd_mode_init(_adapter *padapter) { unsigned char mac[ETH_ALEN]; struct hostapd_priv *phostapdpriv; struct net_device *pnetdev; pnetdev = rtw_alloc_etherdev(sizeof(struct hostapd_priv)); if (!pnetdev) return -ENOMEM; //SET_MODULE_OWNER(pnetdev); ether_setup(pnetdev); //pnetdev->type = ARPHRD_IEEE80211; phostapdpriv = rtw_netdev_priv(pnetdev); phostapdpriv->pmgnt_netdev = pnetdev; phostapdpriv->padapter= padapter; padapter->phostapdpriv = phostapdpriv; //pnetdev->init = NULL; #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) DBG_871X("register rtl871x_mgnt_netdev_ops to netdev_ops\n"); pnetdev->netdev_ops = &rtl871x_mgnt_netdev_ops; #else pnetdev->open = mgnt_netdev_open; pnetdev->stop = mgnt_netdev_close; pnetdev->hard_start_xmit = mgnt_xmit_entry; //pnetdev->set_mac_address = r871x_net_set_mac_address; //pnetdev->get_stats = r871x_net_get_stats; //pnetdev->do_ioctl = r871x_mp_ioctl; #endif pnetdev->watchdog_timeo = HZ; /* 1 second timeout */ //pnetdev->wireless_handlers = NULL; #ifdef CONFIG_TCP_CSUM_OFFLOAD_TX pnetdev->features |= NETIF_F_IP_CSUM; #endif if(dev_alloc_name(pnetdev,"mgnt.wlan%d") < 0) { DBG_871X("hostapd_mode_init(): dev_alloc_name, fail! \n"); } //SET_NETDEV_DEV(pnetdev, pintfpriv->udev); mac[0]=0x00; mac[1]=0xe0; mac[2]=0x4c; mac[3]=0x87; mac[4]=0x11; mac[5]=0x12; _rtw_memcpy(pnetdev->dev_addr, mac, ETH_ALEN); netif_carrier_off(pnetdev); /* Tell the network stack we exist */ if (register_netdev(pnetdev) != 0) { DBG_871X("hostapd_mode_init(): register_netdev fail!\n"); if(pnetdev) { rtw_free_netdev(pnetdev); } } return 0; } void hostapd_mode_unload(_adapter *padapter) { struct hostapd_priv *phostapdpriv = padapter->phostapdpriv; struct net_device *pnetdev = phostapdpriv->pmgnt_netdev; unregister_netdev(pnetdev); rtw_free_netdev(pnetdev); } #endif #endif rtl8812au-4.3.8.12175.20140902+dfsg/os_dep/linux/os_intfs.c000066400000000000000000003240231261122257400221030ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _OS_INTFS_C_ #include #include #if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) #error "Shall be Linux or Windows, but not both!\n" #endif MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("Realtek Wireless Lan Driver"); MODULE_AUTHOR("Realtek Semiconductor Corp."); MODULE_VERSION(DRIVERVERSION); /* module param defaults */ int rtw_chip_version = 0x00; int rtw_rfintfs = HWPI; int rtw_lbkmode = 0;//RTL8712_AIR_TRX; int rtw_network_mode = Ndis802_11IBSS;//Ndis802_11Infrastructure;//infra, ad-hoc, auto //NDIS_802_11_SSID ssid; int rtw_channel = 1;//ad-hoc support requirement int rtw_wireless_mode = WIRELESS_MODE_MAX; int rtw_vrtl_carrier_sense = AUTO_VCS; int rtw_vcs_type = RTS_CTS;//* int rtw_rts_thresh = 2347;//* int rtw_frag_thresh = 2346;//* int rtw_preamble = PREAMBLE_LONG;//long, short, auto int rtw_scan_mode = 1;//active, passive int rtw_adhoc_tx_pwr = 1; int rtw_soft_ap = 0; //int smart_ps = 1; #ifdef CONFIG_POWER_SAVING int rtw_power_mgnt = 1; #ifdef CONFIG_IPS_LEVEL_2 int rtw_ips_mode = IPS_LEVEL_2; #else int rtw_ips_mode = IPS_NORMAL; #endif #else int rtw_power_mgnt = PS_MODE_ACTIVE; int rtw_ips_mode = IPS_NONE; #endif module_param(rtw_ips_mode, int, 0644); MODULE_PARM_DESC(rtw_ips_mode,"The default IPS mode"); int rtw_smart_ps = 2; int rtw_check_fw_ps = 1; #ifdef CONFIG_TX_EARLY_MODE int rtw_early_mode=1; #endif int rtw_usb_rxagg_mode = 2;//USB_RX_AGG_DMA =1,USB_RX_AGG_USB=2 module_param(rtw_usb_rxagg_mode, int, 0644); int rtw_radio_enable = 1; int rtw_long_retry_lmt = 7; int rtw_short_retry_lmt = 7; int rtw_busy_thresh = 40; //int qos_enable = 0; //* int rtw_ack_policy = NORMAL_ACK; int rtw_mp_mode = 0; int rtw_software_encrypt = 0; int rtw_software_decrypt = 0; int rtw_acm_method = 0;// 0:By SW 1:By HW. int rtw_wmm_enable = 1;// default is set to enable the wmm. int rtw_uapsd_enable = 0; int rtw_uapsd_max_sp = NO_LIMIT; int rtw_uapsd_acbk_en = 0; int rtw_uapsd_acbe_en = 0; int rtw_uapsd_acvi_en = 0; int rtw_uapsd_acvo_en = 0; #ifdef CONFIG_80211N_HT int rtw_ht_enable = 1; // 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160MHz, 4: 80+80MHz // 2.4G use bit 0 ~ 3, 5G use bit 4 ~ 7 // 0x21 means enable 2.4G 40MHz & 5G 80MHz int rtw_bw_mode = 0x21; int rtw_cbw40_enable = 3; // 0 :diable, bit(0): enable 2.4g, bit(1): enable 5g int rtw_ampdu_enable = 1;//for enable tx_ampdu ,// 0: disable, 0x1:enable (but wifi_spec should be 0), 0x2: force enable (don't care wifi_spec) int rtw_rx_stbc = 1;// 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ int rtw_ampdu_amsdu = 0;// 0: disabled, 1:enabled, 2:auto . There is an IOT issu with DLINK DIR-629 when the flag turn on // Short GI support Bit Map // BIT0 - 20MHz, 0: non-support, 1: support // BIT1 - 40MHz, 0: non-support, 1: support // BIT2 - 80MHz, 0: non-support, 1: support // BIT3 - 160MHz, 0: non-support, 1: support int rtw_short_gi = 0xf; // BIT0: Enable VHT LDPC Rx, BIT1: Enable VHT LDPC Tx, BIT4: Enable HT LDPC Rx, BIT5: Enable HT LDPC Tx int rtw_ldpc_cap = 0x33; // BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx, BIT4: Enable HT STBC Rx, BIT5: Enable HT STBC Tx int rtw_stbc_cap = 0x13; // BIT0: Enable VHT Beamformer, BIT1: Enable VHT Beamformee, BIT4: Enable HT Beamformer, BIT5: Enable HT Beamformee int rtw_beamform_cap = 0x2; #endif //CONFIG_80211N_HT #ifdef CONFIG_80211AC_VHT int rtw_vht_enable = 1; //0:disable, 1:enable, 2:force auto enable int rtw_ampdu_factor = 7; int rtw_vht_rate_sel = 0; #endif //CONFIG_80211AC_VHT int rtw_lowrate_two_xmit = 1;//Use 2 path Tx to transmit MCS0~7 and legacy mode //int rf_config = RF_1T2R; // 1T2R int rtw_rf_config = RF_MAX_TYPE; //auto int rtw_low_power = 0; #ifdef CONFIG_WIFI_TEST int rtw_wifi_spec = 1;//for wifi test #else int rtw_wifi_spec = 0; #endif int rtw_special_rf_path = 0; //0: 2T2R ,1: only turn on path A 1T1R int rtw_channel_plan = RT_CHANNEL_DOMAIN_MAX; #ifdef CONFIG_BT_COEXIST int rtw_btcoex_enable = 1; module_param(rtw_btcoex_enable, int, 0644); MODULE_PARM_DESC(rtw_btcoex_enable, "Enable BT co-existence mechanism"); int rtw_bt_iso = 2;// 0:Low, 1:High, 2:From Efuse int rtw_bt_sco = 3;// 0:Idle, 1:None-SCO, 2:SCO, 3:From Counter, 4.Busy, 5.OtherBusy int rtw_bt_ampdu =1 ;// 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU. int rtw_ant_num = -1; // <0: undefined, >0: Antenna number module_param(rtw_ant_num, int, 0644); MODULE_PARM_DESC(rtw_ant_num, "Antenna number setting"); #endif int rtw_AcceptAddbaReq = _TRUE;// 0:Reject AP's Add BA req, 1:Accept AP's Add BA req. int rtw_antdiv_cfg = 2; // 0:OFF , 1:ON, 2:decide by Efuse config int rtw_antdiv_type = 0 ; //0:decide by efuse 1: for 88EE, 1Tx and 1RxCG are diversity.(2 Ant with SPDT), 2: for 88EE, 1Tx and 2Rx are diversity.( 2 Ant, Tx and RxCG are both on aux port, RxCS is on main port ), 3: for 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) #ifdef CONFIG_USB_AUTOSUSPEND int rtw_enusbss = 1;//0:disable,1:enable #else int rtw_enusbss = 0;//0:disable,1:enable #endif int rtw_hwpdn_mode=2;//0:disable,1:enable,2: by EFUSE config #ifdef CONFIG_HW_PWRP_DETECTION int rtw_hwpwrp_detect = 1; #else int rtw_hwpwrp_detect = 0; //HW power ping detect 0:disable , 1:enable #endif #ifdef CONFIG_USB_HCI int rtw_hw_wps_pbc = 1; #else int rtw_hw_wps_pbc = 0; #endif #ifdef CONFIG_TX_MCAST2UNI int rtw_mc2u_disable = 0; #endif // CONFIG_TX_MCAST2UNI #ifdef CONFIG_DUALMAC_CONCURRENT int rtw_dmsp = 0; #endif // CONFIG_DUALMAC_CONCURRENT #ifdef CONFIG_80211D int rtw_80211d = 0; #endif #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV int rtw_force_ant = 2;//0 :normal, 1:Main ant, 2:Aux ant int rtw_force_igi =0;//0 :normal module_param(rtw_force_ant, int, 0644); module_param(rtw_force_igi, int, 0644); #endif #ifdef CONFIG_QOS_OPTIMIZATION int rtw_qos_opt_enable=1;//0: disable,1:enable #else int rtw_qos_opt_enable=0;//0: disable,1:enable #endif module_param(rtw_qos_opt_enable,int,0644); char* ifname = "wlan%d"; module_param(ifname, charp, 0644); MODULE_PARM_DESC(ifname, "The default name to allocate for first interface"); char* if2name = "wlan%d"; module_param(if2name, charp, 0644); MODULE_PARM_DESC(if2name, "The default name to allocate for second interface"); char* rtw_initmac = 0; // temp mac address if users want to use instead of the mac address in Efuse #ifdef CONFIG_MULTI_VIR_IFACES int rtw_ext_iface_num = 1;//primary/secondary iface is excluded module_param(rtw_ext_iface_num, int, 0644); #endif //CONFIG_MULTI_VIR_IFACES module_param(rtw_initmac, charp, 0644); module_param(rtw_channel_plan, int, 0644); module_param(rtw_special_rf_path, int, 0644); module_param(rtw_chip_version, int, 0644); module_param(rtw_rfintfs, int, 0644); module_param(rtw_lbkmode, int, 0644); module_param(rtw_network_mode, int, 0644); module_param(rtw_channel, int, 0644); module_param(rtw_mp_mode, int, 0644); module_param(rtw_wmm_enable, int, 0644); module_param(rtw_vrtl_carrier_sense, int, 0644); module_param(rtw_vcs_type, int, 0644); module_param(rtw_busy_thresh, int, 0644); #ifdef CONFIG_80211N_HT module_param(rtw_ht_enable, int, 0644); module_param(rtw_bw_mode, int, 0644); module_param(rtw_ampdu_enable, int, 0644); module_param(rtw_rx_stbc, int, 0644); module_param(rtw_ampdu_amsdu, int, 0644); #endif //CONFIG_80211N_HT #ifdef CONFIG_80211AC_VHT module_param(rtw_vht_enable, int, 0644); #endif //CONFIG_80211AC_VHT module_param(rtw_lowrate_two_xmit, int, 0644); module_param(rtw_rf_config, int, 0644); module_param(rtw_power_mgnt, int, 0644); module_param(rtw_smart_ps, int, 0644); module_param(rtw_low_power, int, 0644); module_param(rtw_wifi_spec, int, 0644); module_param(rtw_antdiv_cfg, int, 0644); module_param(rtw_antdiv_type, int, 0644); module_param(rtw_enusbss, int, 0644); module_param(rtw_hwpdn_mode, int, 0644); module_param(rtw_hwpwrp_detect, int, 0644); module_param(rtw_hw_wps_pbc, int, 0644); #ifdef CONFIG_TX_EARLY_MODE module_param(rtw_early_mode, int, 0644); #endif #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE char *rtw_adaptor_info_caching_file_path= "/data/misc/wifi/rtw_cache"; module_param(rtw_adaptor_info_caching_file_path, charp, 0644); MODULE_PARM_DESC(rtw_adaptor_info_caching_file_path, "The path of adapter info cache file"); #endif //CONFIG_ADAPTOR_INFO_CACHING_FILE #ifdef CONFIG_LAYER2_ROAMING uint rtw_max_roaming_times=2; module_param(rtw_max_roaming_times, uint, 0644); MODULE_PARM_DESC(rtw_max_roaming_times,"The max roaming times to try"); #endif //CONFIG_LAYER2_ROAMING #ifdef CONFIG_IOL int rtw_fw_iol=1;// 0:Disable, 1:enable, 2:by usb speed module_param(rtw_fw_iol, int, 0644); MODULE_PARM_DESC(rtw_fw_iol,"FW IOL"); #endif //CONFIG_IOL #ifdef CONFIG_FILE_FWIMG char *rtw_fw_file_path = "/system/etc/firmware/rtlwifi/FW_NIC.BIN"; module_param(rtw_fw_file_path, charp, 0644); MODULE_PARM_DESC(rtw_fw_file_path, "The path of fw image"); char *rtw_fw_wow_file_path = "/system/etc/firmware/rtlwifi/FW_WoWLAN.BIN"; module_param(rtw_fw_wow_file_path, charp, 0644); MODULE_PARM_DESC(rtw_fw_wow_file_path, "The path of fw for Wake on Wireless image"); #ifdef CONFIG_MP_INCLUDED char *rtw_fw_mp_bt_file_path = ""; module_param(rtw_fw_mp_bt_file_path, charp, 0644); MODULE_PARM_DESC(rtw_fw_mp_bt_file_path, "The path of fw for MP-BT image"); #endif // CONFIG_MP_INCLUDED #endif // CONFIG_FILE_FWIMG #ifdef CONFIG_TX_MCAST2UNI module_param(rtw_mc2u_disable, int, 0644); #endif // CONFIG_TX_MCAST2UNI #ifdef CONFIG_DUALMAC_CONCURRENT module_param(rtw_dmsp, int, 0644); #endif // CONFIG_DUALMAC_CONCURRENT #ifdef CONFIG_80211D module_param(rtw_80211d, int, 0644); MODULE_PARM_DESC(rtw_80211d, "Enable 802.11d mechanism"); #endif uint rtw_notch_filter = RTW_NOTCH_FILTER; module_param(rtw_notch_filter, uint, 0644); MODULE_PARM_DESC(rtw_notch_filter, "0:Disable, 1:Enable, 2:Enable only for P2P"); uint rtw_hiq_filter = CONFIG_RTW_HIQ_FILTER; module_param(rtw_hiq_filter, uint, 0644); MODULE_PARM_DESC(rtw_hiq_filter, "0:allow all, 1:allow special, 2:deny all"); uint rtw_adaptivity_en = CONFIG_RTW_ADAPTIVITY_EN; module_param(rtw_adaptivity_en, uint, 0644); MODULE_PARM_DESC(rtw_adaptivity_en, "0:disable, 1:enable, 2:auto"); uint rtw_adaptivity_mode = CONFIG_RTW_ADAPTIVITY_MODE; module_param(rtw_adaptivity_mode, uint, 0644); MODULE_PARM_DESC(rtw_adaptivity_mode, "0:normal, 1:carrier sense"); uint rtw_nhm_en = CONFIG_RTW_NHM_EN; module_param(rtw_nhm_en, uint, 0644); MODULE_PARM_DESC(rtw_nhm_en, "0:disable, 1:enable"); uint rtw_amplifier_type_2g = CONFIG_RTW_AMPLIFIER_TYPE_2G; module_param(rtw_amplifier_type_2g, uint, 0644); MODULE_PARM_DESC(rtw_amplifier_type_2g, "BIT3:2G ext-PA, BIT4:2G ext-LNA"); uint rtw_amplifier_type_5g = CONFIG_RTW_AMPLIFIER_TYPE_5G; module_param(rtw_amplifier_type_5g, uint, 0644); MODULE_PARM_DESC(rtw_amplifier_type_5g, "BIT6:5G ext-PA, BIT7:5G ext-LNA"); uint rtw_RFE_type = 64; module_param(rtw_RFE_type, uint, 0644); MODULE_PARM_DESC(rtw_RFE_type, "default init value:64"); uint rtw_TxBBSwing_2G = 0xFF; module_param(rtw_TxBBSwing_2G, uint, 0644); MODULE_PARM_DESC(rtw_TxBBSwing_2G, "default init value:0xFF"); uint rtw_TxBBSwing_5G = 0xFF; module_param(rtw_TxBBSwing_5G, uint, 0644); MODULE_PARM_DESC(rtw_TxBBSwing_5G, "default init value:0xFF"); #if defined(CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY) //eFuse: Regulatory selection=1 int rtw_tx_pwr_lmt_enable = 1; int rtw_tx_pwr_by_rate = 1; #elif defined(CONFIG_CALIBRATE_TX_POWER_TO_MAX)//eFuse: Regulatory selection=0 int rtw_tx_pwr_lmt_enable = 0; int rtw_tx_pwr_by_rate = 1; #else //eFuse: Regulatory selection=2 #ifdef CONFIG_PCI_HCI int rtw_tx_pwr_lmt_enable = 2; // 2- Depend on efuse int rtw_tx_pwr_by_rate = 2;// 2- Depend on efuse #else // USB & SDIO int rtw_tx_pwr_lmt_enable = 0; int rtw_tx_pwr_by_rate = 0; #endif #endif module_param(rtw_tx_pwr_lmt_enable, int, 0644); MODULE_PARM_DESC(rtw_tx_pwr_lmt_enable,"0:Disable, 1:Enable, 2: Depend on efuse"); module_param(rtw_tx_pwr_by_rate, int, 0644); MODULE_PARM_DESC(rtw_tx_pwr_by_rate,"0:Disable, 1:Enable, 2: Depend on efuse"); #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE char *rtw_phy_file_path = REALTEK_CONFIG_PATH; module_param(rtw_phy_file_path, charp, 0644); MODULE_PARM_DESC(rtw_phy_file_path, "The path of phy parameter"); // PHY FILE Bit Map // BIT0 - MAC, 0: non-support, 1: support // BIT1 - BB, 0: non-support, 1: support // BIT2 - BB_PG, 0: non-support, 1: support // BIT3 - BB_MP, 0: non-support, 1: support // BIT4 - RF, 0: non-support, 1: support // BIT5 - RF_TXPWR_TRACK, 0: non-support, 1: support // BIT6 - RF_TXPWR_LMT, 0: non-support, 1: support int rtw_load_phy_file = (BIT2|BIT6); module_param(rtw_load_phy_file, int, 0644); MODULE_PARM_DESC(rtw_load_phy_file,"PHY File Bit Map"); int rtw_decrypt_phy_file = 0; module_param(rtw_decrypt_phy_file, int, 0644); MODULE_PARM_DESC(rtw_decrypt_phy_file,"Enable Decrypt PHY File"); #endif static uint loadparam(PADAPTER padapter, _nic_hdl pnetdev); int _netdev_open(struct net_device *pnetdev); int netdev_open (struct net_device *pnetdev); static int netdev_close (struct net_device *pnetdev); //#ifdef RTK_DMP_PLATFORM uint loadparam( _adapter *padapter, _nic_hdl pnetdev) { uint status = _SUCCESS; struct registry_priv *registry_par = &padapter->registrypriv; _func_enter_; registry_par->chip_version = (u8)rtw_chip_version; registry_par->rfintfs = (u8)rtw_rfintfs; registry_par->lbkmode = (u8)rtw_lbkmode; //registry_par->hci = (u8)hci; registry_par->network_mode = (u8)rtw_network_mode; _rtw_memcpy(registry_par->ssid.Ssid, "ANY", 3); registry_par->ssid.SsidLength = 3; registry_par->channel = (u8)rtw_channel; registry_par->wireless_mode = (u8)rtw_wireless_mode; if (IsSupported24G(registry_par->wireless_mode) && (!IsSupported5G(registry_par->wireless_mode)) && (registry_par->channel > 14)) { registry_par->channel = 1; } else if (IsSupported5G(registry_par->wireless_mode) && (!IsSupported24G(registry_par->wireless_mode)) && (registry_par->channel <= 14)) { registry_par->channel = 36; } registry_par->vrtl_carrier_sense = (u8)rtw_vrtl_carrier_sense ; registry_par->vcs_type = (u8)rtw_vcs_type; registry_par->rts_thresh=(u16)rtw_rts_thresh; registry_par->frag_thresh=(u16)rtw_frag_thresh; registry_par->preamble = (u8)rtw_preamble; registry_par->scan_mode = (u8)rtw_scan_mode; registry_par->adhoc_tx_pwr = (u8)rtw_adhoc_tx_pwr; registry_par->soft_ap= (u8)rtw_soft_ap; registry_par->smart_ps = (u8)rtw_smart_ps; registry_par->check_fw_ps = (u8)rtw_check_fw_ps; registry_par->power_mgnt = (u8)rtw_power_mgnt; registry_par->ips_mode = (u8)rtw_ips_mode; registry_par->radio_enable = (u8)rtw_radio_enable; registry_par->long_retry_lmt = (u8)rtw_long_retry_lmt; registry_par->short_retry_lmt = (u8)rtw_short_retry_lmt; registry_par->busy_thresh = (u16)rtw_busy_thresh; //registry_par->qos_enable = (u8)rtw_qos_enable; registry_par->ack_policy = (u8)rtw_ack_policy; registry_par->mp_mode = (u8)rtw_mp_mode; registry_par->software_encrypt = (u8)rtw_software_encrypt; registry_par->software_decrypt = (u8)rtw_software_decrypt; registry_par->acm_method = (u8)rtw_acm_method; registry_par->usb_rxagg_mode = (u8)rtw_usb_rxagg_mode; //UAPSD registry_par->wmm_enable = (u8)rtw_wmm_enable; registry_par->uapsd_enable = (u8)rtw_uapsd_enable; registry_par->uapsd_max_sp = (u8)rtw_uapsd_max_sp; registry_par->uapsd_acbk_en = (u8)rtw_uapsd_acbk_en; registry_par->uapsd_acbe_en = (u8)rtw_uapsd_acbe_en; registry_par->uapsd_acvi_en = (u8)rtw_uapsd_acvi_en; registry_par->uapsd_acvo_en = (u8)rtw_uapsd_acvo_en; #ifdef CONFIG_80211N_HT registry_par->ht_enable = (u8)rtw_ht_enable; registry_par->bw_mode = (u8)rtw_bw_mode; registry_par->ampdu_enable = (u8)rtw_ampdu_enable; registry_par->rx_stbc = (u8)rtw_rx_stbc; registry_par->ampdu_amsdu = (u8)rtw_ampdu_amsdu; registry_par->short_gi = (u8)rtw_short_gi; registry_par->ldpc_cap = (u8)rtw_ldpc_cap; registry_par->stbc_cap = (u8)rtw_stbc_cap; registry_par->beamform_cap = (u8)rtw_beamform_cap; #endif #ifdef CONFIG_80211AC_VHT registry_par->vht_enable = (u8)rtw_vht_enable; registry_par->ampdu_factor = (u8)rtw_ampdu_factor; registry_par->vht_rate_sel = (u8)rtw_vht_rate_sel; #endif #ifdef CONFIG_TX_EARLY_MODE registry_par->early_mode = (u8)rtw_early_mode; #endif registry_par->lowrate_two_xmit = (u8)rtw_lowrate_two_xmit; registry_par->rf_config = (u8)rtw_rf_config; registry_par->low_power = (u8)rtw_low_power; registry_par->wifi_spec = (u8)rtw_wifi_spec; registry_par->channel_plan = (u8)rtw_channel_plan; registry_par->special_rf_path = (u8)rtw_special_rf_path; #ifdef CONFIG_BT_COEXIST registry_par->btcoex = (u8)rtw_btcoex_enable; registry_par->bt_iso = (u8)rtw_bt_iso; registry_par->bt_sco = (u8)rtw_bt_sco; registry_par->bt_ampdu = (u8)rtw_bt_ampdu; registry_par->ant_num = (s8)rtw_ant_num; #endif registry_par->bAcceptAddbaReq = (u8)rtw_AcceptAddbaReq; registry_par->antdiv_cfg = (u8)rtw_antdiv_cfg; registry_par->antdiv_type = (u8)rtw_antdiv_type; #ifdef CONFIG_AUTOSUSPEND registry_par->usbss_enable = (u8)rtw_enusbss;//0:disable,1:enable #endif #ifdef SUPPORT_HW_RFOFF_DETECTED registry_par->hwpdn_mode = (u8)rtw_hwpdn_mode;//0:disable,1:enable,2:by EFUSE config registry_par->hwpwrp_detect = (u8)rtw_hwpwrp_detect;//0:disable,1:enable #endif registry_par->hw_wps_pbc = (u8)rtw_hw_wps_pbc; #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE snprintf(registry_par->adaptor_info_caching_file_path, PATH_LENGTH_MAX, "%s", rtw_adaptor_info_caching_file_path); registry_par->adaptor_info_caching_file_path[PATH_LENGTH_MAX-1]=0; #endif #ifdef CONFIG_LAYER2_ROAMING registry_par->max_roaming_times = (u8)rtw_max_roaming_times; #ifdef CONFIG_INTEL_WIDI registry_par->max_roaming_times = (u8)rtw_max_roaming_times + 2; #endif // CONFIG_INTEL_WIDI #endif #ifdef CONFIG_IOL registry_par->fw_iol = rtw_fw_iol; #endif #ifdef CONFIG_DUALMAC_CONCURRENT registry_par->dmsp= (u8)rtw_dmsp; #endif #ifdef CONFIG_80211D registry_par->enable80211d = (u8)rtw_80211d; #endif snprintf(registry_par->ifname, 16, "%s", ifname); snprintf(registry_par->if2name, 16, "%s", if2name); registry_par->notch_filter = (u8)rtw_notch_filter; #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV registry_par->force_ant = (u8)rtw_force_ant; registry_par->force_igi = (u8)rtw_force_igi; #endif #ifdef CONFIG_MULTI_VIR_IFACES registry_par->ext_iface_num = (u8)rtw_ext_iface_num; #endif //CONFIG_MULTI_VIR_IFACES registry_par->RegEnableTxPowerLimit = (u8)rtw_tx_pwr_lmt_enable; registry_par->RegEnableTxPowerByRate = (u8)rtw_tx_pwr_by_rate; registry_par->RegPowerBase = 14; registry_par->TxBBSwing_2G = (s8)rtw_TxBBSwing_2G; registry_par->TxBBSwing_5G = (s8)rtw_TxBBSwing_5G; registry_par->bEn_RFE = 1; registry_par->RFE_Type = (u8)rtw_RFE_type; registry_par->AmplifierType_2G = (u8)rtw_amplifier_type_2g; registry_par->AmplifierType_5G = (u8)rtw_amplifier_type_5g; #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE registry_par->load_phy_file = (u8)rtw_load_phy_file; registry_par->RegDecryptCustomFile = (u8)rtw_decrypt_phy_file; #endif registry_par->qos_opt_enable = (u8)rtw_qos_opt_enable; registry_par->hiq_filter = (u8)rtw_hiq_filter; registry_par->adaptivity_en = (u8)rtw_adaptivity_en; registry_par->adaptivity_mode = (u8)rtw_adaptivity_mode; registry_par->nhm_en = (u8)rtw_nhm_en; _func_exit_; return status; } static int rtw_net_set_mac_address(struct net_device *pnetdev, void *p) { _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); struct sockaddr *addr = p; if(padapter->bup == _FALSE) { //DBG_871X("r8711_net_set_mac_address(), MAC=%x:%x:%x:%x:%x:%x\n", addr->sa_data[0], addr->sa_data[1], addr->sa_data[2], addr->sa_data[3], //addr->sa_data[4], addr->sa_data[5]); _rtw_memcpy(padapter->eeprompriv.mac_addr, addr->sa_data, ETH_ALEN); //_rtw_memcpy(pnetdev->dev_addr, addr->sa_data, ETH_ALEN); //padapter->bset_hwaddr = _TRUE; } return 0; } static struct net_device_stats *rtw_net_get_stats(struct net_device *pnetdev) { _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); struct recv_priv *precvpriv = &(padapter->recvpriv); padapter->stats.tx_packets = pxmitpriv->tx_pkts;//pxmitpriv->tx_pkts++; padapter->stats.rx_packets = precvpriv->rx_pkts;//precvpriv->rx_pkts++; padapter->stats.tx_dropped = pxmitpriv->tx_drop; padapter->stats.rx_dropped = precvpriv->rx_drop; padapter->stats.tx_bytes = pxmitpriv->tx_bytes; padapter->stats.rx_bytes = precvpriv->rx_bytes; return &padapter->stats; } #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) /* * AC to queue mapping * * AC_VO -> queue 0 * AC_VI -> queue 1 * AC_BE -> queue 2 * AC_BK -> queue 3 */ static const u16 rtw_1d_to_queue[8] = { 2, 3, 3, 2, 1, 1, 0, 0 }; /* Given a data frame determine the 802.1p/1d tag to use. */ unsigned int rtw_classify8021d(struct sk_buff *skb) { unsigned int dscp; /* skb->priority values from 256->263 are magic values to * directly indicate a specific 802.1d priority. This is used * to allow 802.1d priority to be passed directly in from VLAN * tags, etc. */ if (skb->priority >= 256 && skb->priority <= 263) return skb->priority - 256; switch (skb->protocol) { case htons(ETH_P_IP): dscp = ip_hdr(skb)->tos & 0xfc; break; default: return 0; } return dscp >> 5; } static u16 rtw_select_queue(struct net_device *dev, struct sk_buff *skb #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 13, 0) , void *accel_priv #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0) , select_queue_fallback_t fallback #endif #endif ) { _adapter *padapter = rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; skb->priority = rtw_classify8021d(skb); if(pmlmepriv->acm_mask != 0) { skb->priority = qos_acm(pmlmepriv->acm_mask, skb->priority); } return rtw_1d_to_queue[skb->priority]; } u16 rtw_recv_select_queue(struct sk_buff *skb) { struct iphdr *piphdr; unsigned int dscp; u16 eth_type; u32 priority; u8 *pdata = skb->data; _rtw_memcpy(ð_type, pdata+(ETH_ALEN<<1), 2); switch (eth_type) { case htons(ETH_P_IP): piphdr = (struct iphdr *)(pdata+ETH_HLEN); dscp = piphdr->tos & 0xfc; priority = dscp >> 5; break; default: priority = 0; } return rtw_1d_to_queue[priority]; } #endif static int rtw_ndev_notifier_call(struct notifier_block * nb, unsigned long state, void *ptr) { #if (LINUX_VERSION_CODE>=KERNEL_VERSION(3,11,0)) struct net_device *dev = netdev_notifier_info_to_dev(ptr); #else struct net_device *dev = ptr; #endif #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) if (dev->netdev_ops->ndo_do_ioctl != rtw_ioctl) #else if (dev->do_ioctl != rtw_ioctl) #endif return NOTIFY_DONE; DBG_871X_LEVEL(_drv_info_, FUNC_NDEV_FMT" state:%lu\n", FUNC_NDEV_ARG(dev), state); switch (state) { case NETDEV_CHANGENAME: rtw_adapter_proc_replace(dev); break; } return NOTIFY_DONE; } static struct notifier_block rtw_ndev_notifier = { .notifier_call = rtw_ndev_notifier_call, }; int rtw_ndev_notifier_register(void) { return register_netdevice_notifier(&rtw_ndev_notifier); } void rtw_ndev_notifier_unregister(void) { unregister_netdevice_notifier(&rtw_ndev_notifier); } int rtw_ndev_init(struct net_device *dev) { _adapter *adapter = rtw_netdev_priv(dev); DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); strncpy(adapter->old_ifname, dev->name, IFNAMSIZ); rtw_adapter_proc_init(dev); return 0; } void rtw_ndev_uninit(struct net_device *dev) { _adapter *adapter = rtw_netdev_priv(dev); DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); rtw_adapter_proc_deinit(dev); } #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) static const struct net_device_ops rtw_netdev_ops = { .ndo_init = rtw_ndev_init, .ndo_uninit = rtw_ndev_uninit, .ndo_open = netdev_open, .ndo_stop = netdev_close, .ndo_start_xmit = rtw_xmit_entry, #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) .ndo_select_queue = rtw_select_queue, #endif .ndo_set_mac_address = rtw_net_set_mac_address, .ndo_get_stats = rtw_net_get_stats, .ndo_do_ioctl = rtw_ioctl, }; #endif int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname) { _adapter *padapter = rtw_netdev_priv(pnetdev); #ifdef CONFIG_EASY_REPLACEMENT struct net_device *TargetNetdev = NULL; _adapter *TargetAdapter = NULL; struct net *devnet = NULL; if(padapter->bDongle == 1) { #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) TargetNetdev = dev_get_by_name("wlan0"); #else #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) devnet = pnetdev->nd_net; #else devnet = dev_net(pnetdev); #endif TargetNetdev = dev_get_by_name(devnet, "wlan0"); #endif if(TargetNetdev) { DBG_871X("Force onboard module driver disappear !!!\n"); TargetAdapter = rtw_netdev_priv(TargetNetdev); TargetAdapter->DriverState = DRIVER_DISAPPEAR; padapter->pid[0] = TargetAdapter->pid[0]; padapter->pid[1] = TargetAdapter->pid[1]; padapter->pid[2] = TargetAdapter->pid[2]; dev_put(TargetNetdev); unregister_netdev(TargetNetdev); padapter->DriverState = DRIVER_REPLACE_DONGLE; } } #endif //CONFIG_EASY_REPLACEMENT if(dev_alloc_name(pnetdev, ifname) < 0) { RT_TRACE(_module_os_intfs_c_,_drv_err_,("dev_alloc_name, fail! \n")); } netif_carrier_off(pnetdev); //rtw_netif_stop_queue(pnetdev); return 0; } struct net_device *rtw_init_netdev(_adapter *old_padapter) { _adapter *padapter; struct net_device *pnetdev; RT_TRACE(_module_os_intfs_c_,_drv_info_,("+init_net_dev\n")); if(old_padapter != NULL) pnetdev = rtw_alloc_etherdev_with_old_priv(sizeof(_adapter), (void *)old_padapter); else pnetdev = rtw_alloc_etherdev(sizeof(_adapter)); if (!pnetdev) return NULL; padapter = rtw_netdev_priv(pnetdev); padapter->pnetdev = pnetdev; #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) SET_MODULE_OWNER(pnetdev); #endif //pnetdev->init = NULL; #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) DBG_871X("register rtw_netdev_ops to netdev_ops\n"); pnetdev->netdev_ops = &rtw_netdev_ops; #else pnetdev->init = rtw_ndev_init; pnetdev->uninit = rtw_ndev_uninit; pnetdev->open = netdev_open; pnetdev->stop = netdev_close; pnetdev->hard_start_xmit = rtw_xmit_entry; pnetdev->set_mac_address = rtw_net_set_mac_address; pnetdev->get_stats = rtw_net_get_stats; pnetdev->do_ioctl = rtw_ioctl; #endif #ifdef CONFIG_TCP_CSUM_OFFLOAD_TX pnetdev->features |= NETIF_F_IP_CSUM; #endif //pnetdev->tx_timeout = NULL; pnetdev->watchdog_timeo = HZ*3; /* 3 second timeout */ #ifdef CONFIG_WIRELESS_EXT pnetdev->wireless_handlers = (struct iw_handler_def *)&rtw_handlers_def; #endif #ifdef WIRELESS_SPY //priv->wireless_data.spy_data = &priv->spy_data; //pnetdev->wireless_data = &priv->wireless_data; #endif //step 2. loadparam(padapter, pnetdev); return pnetdev; } void rtw_unregister_netdevs(struct dvobj_priv *dvobj) { int i; _adapter *padapter = NULL; for(i=0;iiface_nums;i++) { struct net_device *pnetdev = NULL; padapter = dvobj->padapters[i]; if (padapter == NULL) continue; pnetdev = padapter->pnetdev; if((padapter->DriverState != DRIVER_DISAPPEAR) && pnetdev) { unregister_netdev(pnetdev); //will call netdev_close() } #ifdef CONFIG_IOCTL_CFG80211 rtw_wdev_unregister(padapter->rtw_wdev); #endif } } u32 rtw_start_drv_threads(_adapter *padapter) { u32 _status = _SUCCESS; RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_start_drv_threads\n")); #ifdef CONFIG_XMIT_THREAD_MODE #if defined(CONFIG_SDIO_HCI) && defined(CONFIG_CONCURRENT_MODE) if(padapter->adapter_type == PRIMARY_ADAPTER){ #endif padapter->xmitThread = kthread_run(rtw_xmit_thread, padapter, "RTW_XMIT_THREAD"); if(IS_ERR(padapter->xmitThread)) _status = _FAIL; #if defined(CONFIG_SDIO_HCI) && defined(CONFIG_CONCURRENT_MODE) } #endif // CONFIG_SDIO_HCI+CONFIG_CONCURRENT_MODE #endif #ifdef CONFIG_RECV_THREAD_MODE padapter->recvThread = kthread_run(rtw_recv_thread, padapter, "RTW_RECV_THREAD"); if(IS_ERR(padapter->recvThread)) _status = _FAIL; #endif #ifdef CONFIG_CONCURRENT_MODE if(padapter->isprimary == _TRUE) #endif //CONFIG_CONCURRENT_MODE { padapter->cmdThread = kthread_run(rtw_cmd_thread, padapter, "RTW_CMD_THREAD"); if(IS_ERR(padapter->cmdThread)) _status = _FAIL; else _rtw_down_sema(&padapter->cmdpriv.terminate_cmdthread_sema); //wait for cmd_thread to run } #ifdef CONFIG_EVENT_THREAD_MODE padapter->evtThread = kthread_run(event_thread, padapter, "RTW_EVENT_THREAD"); if(IS_ERR(padapter->evtThread)) _status = _FAIL; #endif rtw_hal_start_thread(padapter); return _status; } void rtw_stop_drv_threads (_adapter *padapter) { RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_stop_drv_threads\n")); #ifdef CONFIG_CONCURRENT_MODE if(padapter->isprimary == _TRUE) #endif //CONFIG_CONCURRENT_MODE { rtw_stop_cmd_thread(padapter); } #ifdef CONFIG_EVENT_THREAD_MODE _rtw_up_sema(&padapter->evtpriv.evt_notify); if(padapter->evtThread){ _rtw_down_sema(&padapter->evtpriv.terminate_evtthread_sema); } #endif #ifdef CONFIG_XMIT_THREAD_MODE // Below is to termindate tx_thread... #if defined(CONFIG_SDIO_HCI) && defined(CONFIG_CONCURRENT_MODE) // Only wake-up primary adapter if(padapter->adapter_type == PRIMARY_ADAPTER) #endif //SDIO_HCI + CONCURRENT { _rtw_up_sema(&padapter->xmitpriv.xmit_sema); _rtw_down_sema(&padapter->xmitpriv.terminate_xmitthread_sema); } RT_TRACE(_module_os_intfs_c_,_drv_info_,("\n drv_halt: rtw_xmit_thread can be terminated ! \n")); #endif #ifdef CONFIG_RECV_THREAD_MODE // Below is to termindate rx_thread... _rtw_up_sema(&padapter->recvpriv.recv_sema); _rtw_down_sema(&padapter->recvpriv.terminate_recvthread_sema); RT_TRACE(_module_os_intfs_c_,_drv_info_,("\n drv_halt:recv_thread can be terminated! \n")); #endif rtw_hal_stop_thread(padapter); } u8 rtw_init_default_value(_adapter *padapter); u8 rtw_init_default_value(_adapter *padapter) { u8 ret = _SUCCESS; struct registry_priv* pregistrypriv = &padapter->registrypriv; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct mlme_priv *pmlmepriv= &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; //xmit_priv pxmitpriv->vcs_setting = pregistrypriv->vrtl_carrier_sense; pxmitpriv->vcs = pregistrypriv->vcs_type; pxmitpriv->vcs_type = pregistrypriv->vcs_type; //pxmitpriv->rts_thresh = pregistrypriv->rts_thresh; pxmitpriv->frag_len = pregistrypriv->frag_thresh; //recv_priv //mlme_priv pmlmepriv->scan_mode = SCAN_ACTIVE; //qos_priv //pmlmepriv->qospriv.qos_option = pregistrypriv->wmm_enable; //ht_priv #ifdef CONFIG_80211N_HT pmlmepriv->htpriv.ampdu_enable = _FALSE;//set to disabled #endif //security_priv //rtw_get_encrypt_decrypt_from_registrypriv(padapter); psecuritypriv->binstallGrpkey = _FAIL; #ifdef CONFIG_GTK_OL psecuritypriv->binstallKCK_KEK = _FAIL; #endif //CONFIG_GTK_OL psecuritypriv->sw_encrypt=pregistrypriv->software_encrypt; psecuritypriv->sw_decrypt=pregistrypriv->software_decrypt; psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //open system psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; psecuritypriv->dot11PrivacyKeyIndex = 0; psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; psecuritypriv->dot118021XGrpKeyid = 1; psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; psecuritypriv->ndisencryptstatus = Ndis802_11WEPDisabled; //pwrctrl_priv //registry_priv rtw_init_registrypriv_dev_network(padapter); rtw_update_registrypriv_dev_network(padapter); //hal_priv rtw_hal_def_value_init(padapter); //misc. RTW_ENABLE_FUNC(padapter, DF_RX_BIT); RTW_ENABLE_FUNC(padapter, DF_TX_BIT); padapter->bLinkInfoDump = 0; padapter->bNotifyChannelChange = 0; #ifdef CONFIG_P2P padapter->bShowGetP2PState = 1; #endif //for debug purpose padapter->fix_rate = 0xFF; padapter->driver_ampdu_spacing = 0xFF; padapter->driver_rx_ampdu_factor = 0xFF; padapter->driver_rx_ampdu_spacing = 0xFF; padapter->fix_ba_rxbuf_bz = 0xFF; return ret; } struct dvobj_priv *devobj_init(void) { struct dvobj_priv *pdvobj = NULL; if ((pdvobj = (struct dvobj_priv*)rtw_zmalloc(sizeof(*pdvobj))) == NULL) { return NULL; } _rtw_mutex_init(&pdvobj->hw_init_mutex); _rtw_mutex_init(&pdvobj->h2c_fwcmd_mutex); _rtw_mutex_init(&pdvobj->setch_mutex); _rtw_mutex_init(&pdvobj->setbw_mutex); pdvobj->processing_dev_remove = _FALSE; ATOMIC_SET(&pdvobj->disable_func, 0); rtw_macid_ctl_init(&pdvobj->macid_ctl); _rtw_spinlock_init(&pdvobj->cam_ctl.lock); return pdvobj; } void devobj_deinit(struct dvobj_priv *pdvobj) { if(!pdvobj) return; _rtw_mutex_free(&pdvobj->hw_init_mutex); _rtw_mutex_free(&pdvobj->h2c_fwcmd_mutex); _rtw_mutex_free(&pdvobj->setch_mutex); _rtw_mutex_free(&pdvobj->setbw_mutex); rtw_macid_ctl_deinit(&pdvobj->macid_ctl); _rtw_spinlock_free(&pdvobj->cam_ctl.lock); rtw_mfree((u8*)pdvobj, sizeof(*pdvobj)); } u8 rtw_reset_drv_sw(_adapter *padapter) { u8 ret8=_SUCCESS; struct mlme_priv *pmlmepriv= &padapter->mlmepriv; struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); //hal_priv if( is_primary_adapter(padapter)) rtw_hal_def_value_init(padapter); RTW_ENABLE_FUNC(padapter, DF_RX_BIT); RTW_ENABLE_FUNC(padapter, DF_TX_BIT); padapter->bLinkInfoDump = 0; padapter->xmitpriv.tx_pkts = 0; padapter->recvpriv.rx_pkts = 0; pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; //pmlmepriv->LinkDetectInfo.TrafficBusyState = _FALSE; pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 0; pmlmepriv->LinkDetectInfo.LowPowerTransitionCount = 0; _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY |_FW_UNDER_LINKING); #ifdef CONFIG_AUTOSUSPEND #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,34)) adapter_to_dvobj(padapter)->pusbdev->autosuspend_disabled = 1;//autosuspend disabled by the user #endif #endif #ifdef DBG_CONFIG_ERROR_DETECT if (is_primary_adapter(padapter)) rtw_hal_sreset_reset_value(padapter); #endif pwrctrlpriv->pwr_state_check_cnts = 0; //mlmeextpriv padapter->mlmeextpriv.sitesurvey_res.state= SCAN_DISABLE; #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS rtw_set_signal_stat_timer(&padapter->recvpriv); #endif return ret8; } u8 rtw_init_drv_sw(_adapter *padapter) { u8 ret8=_SUCCESS; _func_enter_; RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_init_drv_sw\n")); ret8 = rtw_init_default_value(padapter); if ((rtw_init_cmd_priv(&padapter->cmdpriv)) == _FAIL) { RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't init cmd_priv\n")); ret8=_FAIL; goto exit; } padapter->cmdpriv.padapter=padapter; if ((rtw_init_evt_priv(&padapter->evtpriv)) == _FAIL) { RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't init evt_priv\n")); ret8=_FAIL; goto exit; } if (rtw_init_mlme_priv(padapter) == _FAIL) { RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't init mlme_priv\n")); ret8=_FAIL; goto exit; } #ifdef CONFIG_P2P rtw_init_wifidirect_timers(padapter); init_wifidirect_info(padapter, P2P_ROLE_DISABLE); reset_global_wifidirect_info(padapter); #ifdef CONFIG_IOCTL_CFG80211 rtw_init_cfg80211_wifidirect_info(padapter); #endif #ifdef CONFIG_WFD if(rtw_init_wifi_display_info(padapter) == _FAIL) RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't init init_wifi_display_info\n")); #endif #endif /* CONFIG_P2P */ if(init_mlme_ext_priv(padapter) == _FAIL) { RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't init mlme_ext_priv\n")); ret8=_FAIL; goto exit; } #ifdef CONFIG_TDLS if(rtw_init_tdls_info(padapter) == _FAIL) { DBG_871X("Can't rtw_init_tdls_info\n"); ret8=_FAIL; goto exit; } #endif //CONFIG_TDLS if(_rtw_init_xmit_priv(&padapter->xmitpriv, padapter) == _FAIL) { DBG_871X("Can't _rtw_init_xmit_priv\n"); ret8=_FAIL; goto exit; } if(_rtw_init_recv_priv(&padapter->recvpriv, padapter) == _FAIL) { DBG_871X("Can't _rtw_init_recv_priv\n"); ret8=_FAIL; goto exit; } // add for CONFIG_IEEE80211W, none 11w also can use _rtw_spinlock_init(&padapter->security_key_mutex); // We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). //_rtw_memset((unsigned char *)&padapter->securitypriv, 0, sizeof (struct security_priv)); //_init_timer(&(padapter->securitypriv.tkip_timer), padapter->pifp, rtw_use_tkipkey_handler, padapter); if(_rtw_init_sta_priv(&padapter->stapriv) == _FAIL) { DBG_871X("Can't _rtw_init_sta_priv\n"); ret8=_FAIL; goto exit; } padapter->stapriv.padapter = padapter; padapter->setband = GHZ24_50; padapter->fix_rate = 0xFF; padapter->fix_ba_rxbuf_bz = 0xFF; rtw_init_bcmc_stainfo(padapter); rtw_init_pwrctrl_priv(padapter); //_rtw_memset((u8 *)&padapter->qospriv, 0, sizeof (struct qos_priv));//move to mlme_priv #ifdef CONFIG_MP_INCLUDED if (init_mp_priv(padapter) == _FAIL) { DBG_871X("%s: initialize MP private data Fail!\n", __func__); } #endif rtw_hal_dm_init(padapter); rtw_hal_sw_led_init(padapter); #ifdef DBG_CONFIG_ERROR_DETECT rtw_hal_sreset_init(padapter); #endif #ifdef CONFIG_INTEL_WIDI if(rtw_init_intel_widi(padapter) == _FAIL) { DBG_871X("Can't rtw_init_intel_widi\n"); ret8=_FAIL; goto exit; } #endif //CONFIG_INTEL_WIDI #ifdef CONFIG_WAPI_SUPPORT padapter->WapiSupport = true; //set true temp, will revise according to Efuse or Registry value later. rtw_wapi_init(padapter); #endif #ifdef CONFIG_BR_EXT _rtw_spinlock_init(&padapter->br_ext_lock); #endif // CONFIG_BR_EXT exit: RT_TRACE(_module_os_intfs_c_,_drv_info_,("-rtw_init_drv_sw\n")); _func_exit_; return ret8; } #ifdef CONFIG_WOWLAN void rtw_cancel_dynamic_chk_timer(_adapter *padapter) { _cancel_timer_ex(&padapter->mlmepriv.dynamic_chk_timer); RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel dynamic_chk_timer! \n")); } #endif void rtw_cancel_all_timer(_adapter *padapter) { RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_cancel_all_timer\n")); _cancel_timer_ex(&padapter->mlmepriv.assoc_timer); RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel association timer complete! \n")); //_cancel_timer_ex(&padapter->securitypriv.tkip_timer); //RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel tkip_timer! \n")); _cancel_timer_ex(&padapter->mlmepriv.scan_to_timer); RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel scan_to_timer! \n")); _cancel_timer_ex(&padapter->mlmepriv.dynamic_chk_timer); RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel dynamic_chk_timer! \n")); // cancel sw led timer rtw_hal_sw_led_deinit(padapter); RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel DeInitSwLeds! \n")); _cancel_timer_ex(&(adapter_to_pwrctl(padapter)->pwr_state_check_timer)); #ifdef CONFIG_IOCTL_CFG80211 #ifdef CONFIG_P2P _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); #endif //CONFIG_P2P #endif //CONFIG_IOCTL_CFG80211 #ifdef CONFIG_SET_SCAN_DENY_TIMER _cancel_timer_ex(&padapter->mlmepriv.set_scan_deny_timer); rtw_clear_scan_deny(padapter); RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel set_scan_deny_timer! \n")); #endif #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS _cancel_timer_ex(&padapter->recvpriv.signal_stat_timer); #endif //cancel dm timer rtw_hal_dm_deinit(padapter); #ifdef CONFIG_PLATFORM_FS_MX61 msleep(50); #endif } u8 rtw_free_drv_sw(_adapter *padapter) { struct net_device *pnetdev = (struct net_device*)padapter->pnetdev; RT_TRACE(_module_os_intfs_c_,_drv_info_,("==>rtw_free_drv_sw")); #ifdef CONFIG_WAPI_SUPPORT rtw_wapi_free(padapter); #endif //we can call rtw_p2p_enable here, but: // 1. rtw_p2p_enable may have IO operation // 2. rtw_p2p_enable is bundled with wext interface #ifdef CONFIG_P2P { struct wifidirect_info *pwdinfo = &padapter->wdinfo; if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { _cancel_timer_ex( &pwdinfo->find_phase_timer ); _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); #ifdef CONFIG_CONCURRENT_MODE _cancel_timer_ex( &pwdinfo->ap_p2p_switch_timer ); #endif // CONFIG_CONCURRENT_MODE rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); } } #endif // add for CONFIG_IEEE80211W, none 11w also can use _rtw_spinlock_free(&padapter->security_key_mutex); #ifdef CONFIG_BR_EXT _rtw_spinlock_free(&padapter->br_ext_lock); #endif // CONFIG_BR_EXT #ifdef CONFIG_INTEL_WIDI rtw_free_intel_widi(padapter); #endif //CONFIG_INTEL_WIDI free_mlme_ext_priv(&padapter->mlmeextpriv); #ifdef CONFIG_TDLS //rtw_free_tdls_info(&padapter->tdlsinfo); #endif //CONFIG_TDLS rtw_free_cmd_priv(&padapter->cmdpriv); rtw_free_evt_priv(&padapter->evtpriv); rtw_free_mlme_priv(&padapter->mlmepriv); //free_io_queue(padapter); _rtw_free_xmit_priv(&padapter->xmitpriv); _rtw_free_sta_priv(&padapter->stapriv); //will free bcmc_stainfo here _rtw_free_recv_priv(&padapter->recvpriv); rtw_free_pwrctrl_priv(padapter); //rtw_mfree((void *)padapter, sizeof (padapter)); #ifdef CONFIG_DRVEXT_MODULE free_drvext(&padapter->drvextpriv); #endif rtw_hal_free_data(padapter); RT_TRACE(_module_os_intfs_c_,_drv_info_,("<==rtw_free_drv_sw\n")); //free the old_pnetdev if(padapter->rereg_nd_name_priv.old_pnetdev) { free_netdev(padapter->rereg_nd_name_priv.old_pnetdev); padapter->rereg_nd_name_priv.old_pnetdev = NULL; } // clear pbuddy_adapter to avoid access wrong pointer. if(padapter->pbuddy_adapter != NULL) { padapter->pbuddy_adapter->pbuddy_adapter = NULL; } RT_TRACE(_module_os_intfs_c_,_drv_info_,("-rtw_free_drv_sw\n")); return _SUCCESS; } #ifdef CONFIG_CONCURRENT_MODE #ifdef CONFIG_MULTI_VIR_IFACES int _netdev_vir_if_open(struct net_device *pnetdev) { _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); _adapter *primary_padapter = GET_PRIMARY_ADAPTER(padapter); DBG_871X(FUNC_NDEV_FMT" enter\n", FUNC_NDEV_ARG(pnetdev)); if(!primary_padapter) goto _netdev_virtual_iface_open_error; if(primary_padapter->bup == _FALSE || primary_padapter->hw_init_completed == _FALSE) { _netdev_open(primary_padapter->pnetdev); } if(padapter->bup == _FALSE && primary_padapter->bup == _TRUE && primary_padapter->hw_init_completed == _TRUE) { int i; padapter->bDriverStopped = _FALSE; padapter->bSurpriseRemoved = _FALSE; padapter->bCardDisableWOHSM = _FALSE; padapter->bFWReady = primary_padapter->bFWReady; if(rtw_start_drv_threads(padapter) == _FAIL) { goto _netdev_virtual_iface_open_error; } #ifdef CONFIG_IOCTL_CFG80211 rtw_cfg80211_init_wiphy(padapter); #endif padapter->bup = _TRUE; } padapter->net_closed = _FALSE; _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); rtw_netif_wake_queue(pnetdev); DBG_871X(FUNC_NDEV_FMT" exit\n", FUNC_NDEV_ARG(pnetdev)); return 0; _netdev_virtual_iface_open_error: padapter->bup = _FALSE; netif_carrier_off(pnetdev); rtw_netif_stop_queue(pnetdev); return (-1); } int netdev_vir_if_open(struct net_device *pnetdev) { int ret; _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); _enter_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); ret = _netdev_vir_if_open(pnetdev); _exit_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); #ifdef CONFIG_AUTO_AP_MODE //if(padapter->iface_id == 2) // rtw_start_auto_ap(padapter); #endif return ret; } static int netdev_vir_if_close(struct net_device *pnetdev) { _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); padapter->net_closed = _TRUE; if(pnetdev) { rtw_netif_stop_queue(pnetdev); } #ifdef CONFIG_IOCTL_CFG80211 rtw_scan_abort(padapter); adapter_wdev_data(padapter)->bandroid_scan = _FALSE; #endif return 0; } #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) static const struct net_device_ops rtw_netdev_vir_if_ops = { .ndo_open = netdev_vir_if_open, .ndo_stop = netdev_vir_if_close, .ndo_start_xmit = rtw_xmit_entry, .ndo_set_mac_address = rtw_net_set_mac_address, .ndo_get_stats = rtw_net_get_stats, .ndo_do_ioctl = rtw_ioctl, #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) .ndo_select_queue = rtw_select_queue, #endif }; #endif _adapter *rtw_drv_add_vir_if(_adapter *primary_padapter, void (*set_intf_ops)(_adapter *primary_padapter,struct _io_ops *pops)) { int res = _FAIL; struct net_device *pnetdev=NULL; _adapter *padapter = NULL; struct dvobj_priv *pdvobjpriv; u8 mac[ETH_ALEN]; /* if((primary_padapter->bup == _FALSE) || (rtw_buddy_adapter_up(primary_padapter) == _FALSE)) { goto error_rtw_drv_add_iface; } */ /****** init netdev ******/ pnetdev = rtw_init_netdev(NULL); if (!pnetdev) goto error_rtw_drv_add_iface; #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) DBG_871X("register rtw_netdev_virtual_iface_ops to netdev_ops\n"); pnetdev->netdev_ops = &rtw_netdev_vir_if_ops; #else pnetdev->open = netdev_vir_if_open; pnetdev->stop = netdev_vir_if_close; #endif #ifdef CONFIG_NO_WIRELESS_HANDLERS pnetdev->wireless_handlers = NULL; #endif /****** init adapter ******/ padapter = rtw_netdev_priv(pnetdev); _rtw_memcpy(padapter, primary_padapter, sizeof(_adapter)); // padapter->bup = _FALSE; padapter->net_closed = _TRUE; padapter->hw_init_completed = _FALSE; padapter->dir_dev = NULL; padapter->dir_odm = NULL; //set adapter_type/iface type padapter->isprimary = _FALSE; padapter->adapter_type = MAX_ADAPTER; padapter->pbuddy_adapter = primary_padapter; #if 0 #ifndef CONFIG_HWPORT_SWAP //Port0 -> Pri , Port1 -> Sec padapter->iface_type = IFACE_PORT1; #else padapter->iface_type = IFACE_PORT0; #endif //CONFIG_HWPORT_SWAP #else //extended virtual interfaces always are set to port0 padapter->iface_type = IFACE_PORT0; #endif // padapter->pnetdev = pnetdev; /****** setup dvobj ******/ pdvobjpriv = adapter_to_dvobj(padapter); padapter->iface_id = pdvobjpriv->iface_nums; pdvobjpriv->padapters[pdvobjpriv->iface_nums++] = padapter; SET_NETDEV_DEV(pnetdev, dvobj_to_dev(pdvobjpriv)); #ifdef CONFIG_IOCTL_CFG80211 rtw_wdev_alloc(padapter, dvobj_to_dev(pdvobjpriv)); #endif //CONFIG_IOCTL_CFG80211 //set interface_type/chip_type/HardwareType padapter->interface_type = primary_padapter->interface_type; padapter->chip_type = primary_padapter->chip_type; padapter->HardwareType = primary_padapter->HardwareType; //step 2. hook HalFunc, allocate HalData //hal_set_hal_ops(padapter); rtw_set_hal_ops(padapter); padapter->HalFunc.inirp_init = NULL; padapter->HalFunc.inirp_deinit = NULL; padapter->intf_start = NULL; padapter->intf_stop = NULL; //step init_io_priv if ((rtw_init_io_priv(padapter, set_intf_ops)) == _FAIL) { RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" \n Can't init io_reqs\n")); } //step read_chip_version rtw_hal_read_chip_version(padapter); //step usb endpoint mapping rtw_hal_chip_configure(padapter); //init drv data if(rtw_init_drv_sw(padapter)!= _SUCCESS) goto error_rtw_drv_add_iface; //get mac address from primary_padapter _rtw_memcpy(mac, primary_padapter->eeprompriv.mac_addr, ETH_ALEN); if (((mac[0]==0xff) &&(mac[1]==0xff) && (mac[2]==0xff) && (mac[3]==0xff) && (mac[4]==0xff) &&(mac[5]==0xff)) || ((mac[0]==0x0) && (mac[1]==0x0) && (mac[2]==0x0) && (mac[3]==0x0) && (mac[4]==0x0) &&(mac[5]==0x0))) { mac[0] = 0x00; mac[1] = 0xe0; mac[2] = 0x4c; mac[3] = 0x87; mac[4] = 0x11; mac[5] = 0x22; } else { //If the BIT1 is 0, the address is universally administered. //If it is 1, the address is locally administered #if 1 //needs enable MBSSID CAM mac[0] |= BIT(1); // locally administered mac[0] |= (padapter->iface_id-1)<<4; #endif } _rtw_memcpy(padapter->eeprompriv.mac_addr, mac, ETH_ALEN); res = _SUCCESS; return padapter; error_rtw_drv_add_iface: if(padapter) rtw_free_drv_sw(padapter); if (pnetdev) rtw_free_netdev(pnetdev); return NULL; } void rtw_drv_stop_vir_if(_adapter *padapter) { struct net_device *pnetdev=NULL; if (padapter == NULL) return; pnetdev = padapter->pnetdev; rtw_cancel_all_timer(padapter); if (padapter->bup == _TRUE) { padapter->bDriverStopped = _TRUE; #ifdef CONFIG_XMIT_ACK if (padapter->xmitpriv.ack_tx) rtw_ack_tx_done(&padapter->xmitpriv, RTW_SCTX_DONE_DRV_STOP); #endif if (padapter->intf_stop) { padapter->intf_stop(padapter); } rtw_stop_drv_threads(padapter); padapter->bup = _FALSE; } } void rtw_drv_free_vir_if(_adapter *padapter) { struct net_device *pnetdev=NULL; if (padapter == NULL) return; padapter->pbuddy_adapter = NULL; pnetdev = padapter->pnetdev; #ifdef CONFIG_IOCTL_CFG80211 rtw_wdev_free(padapter->rtw_wdev); #endif //CONFIG_IOCTL_CFG80211 rtw_free_drv_sw(padapter); rtw_free_netdev(pnetdev); } void rtw_drv_stop_vir_ifaces(struct dvobj_priv *dvobj) { int i; //struct dvobj_priv *dvobj = primary_padapter->dvobj; for(i=2;iiface_nums;i++) { rtw_drv_stop_vir_if(dvobj->padapters[i]); } } void rtw_drv_free_vir_ifaces(struct dvobj_priv *dvobj) { int i; //struct dvobj_priv *dvobj = primary_padapter->dvobj; for(i=2;iiface_nums;i++) { rtw_drv_free_vir_if(dvobj->padapters[i]); } } void rtw_drv_del_vir_if(_adapter *padapter) { rtw_drv_stop_vir_if(padapter); rtw_drv_free_vir_if(padapter); } void rtw_drv_del_vir_ifaces(_adapter *primary_padapter) { int i; struct dvobj_priv *dvobj = primary_padapter->dvobj; for(i=2;iiface_nums;i++) { rtw_drv_del_vir_if(dvobj->padapters[i]); } } #endif //CONFIG_MULTI_VIR_IFACES int _netdev_if2_open(struct net_device *pnetdev) { _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); _adapter *primary_padapter = padapter->pbuddy_adapter; DBG_871X("+871x_drv - if2_open, bup=%d\n", padapter->bup); if(primary_padapter->bup == _FALSE || primary_padapter->hw_init_completed == _FALSE) { _netdev_open(primary_padapter->pnetdev); } if(padapter->bup == _FALSE && primary_padapter->bup == _TRUE && primary_padapter->hw_init_completed == _TRUE) { int i; padapter->bDriverStopped = _FALSE; padapter->bSurpriseRemoved = _FALSE; padapter->bCardDisableWOHSM = _FALSE; padapter->bFWReady = primary_padapter->bFWReady; //if (init_mlme_ext_priv(padapter) == _FAIL) // goto netdev_if2_open_error; if (rtw_start_drv_threads(padapter) == _FAIL) { goto netdev_if2_open_error; } if (padapter->intf_start) { padapter->intf_start(padapter); } #ifdef CONFIG_IOCTL_CFG80211 rtw_cfg80211_init_wiphy(padapter); #endif padapter->bup = _TRUE; } padapter->net_closed = _FALSE; //execute dynamic_chk_timer only on primary interface // secondary interface shares the timer with primary interface. //_set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); rtw_netif_wake_queue(pnetdev); DBG_871X("-871x_drv - if2_open, bup=%d\n", padapter->bup); return 0; netdev_if2_open_error: padapter->bup = _FALSE; netif_carrier_off(pnetdev); rtw_netif_stop_queue(pnetdev); return (-1); } int netdev_if2_open(struct net_device *pnetdev) { int ret; _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); if (pwrctrlpriv->bInSuspend == _TRUE) { DBG_871X("+871x_drv - netdev_if2_open, bInSuspend=%d\n", pwrctrlpriv->bInSuspend); return 0; } _enter_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); ret = _netdev_if2_open(pnetdev); _exit_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); #ifdef CONFIG_AUTO_AP_MODE //if(padapter->iface_id == 2) rtw_start_auto_ap(padapter); #endif return ret; } static int netdev_if2_close(struct net_device *pnetdev) { _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); padapter->net_closed = _TRUE; if(pnetdev) { rtw_netif_stop_queue(pnetdev); } #ifdef CONFIG_P2P rtw_p2p_enable(padapter, P2P_ROLE_DISABLE); #endif #ifdef CONFIG_IOCTL_CFG80211 rtw_scan_abort(padapter); adapter_wdev_data(padapter)->bandroid_scan = _FALSE; #endif return 0; } #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) static const struct net_device_ops rtw_netdev_if2_ops = { .ndo_init = rtw_ndev_init, .ndo_uninit = rtw_ndev_uninit, .ndo_open = netdev_if2_open, .ndo_stop = netdev_if2_close, .ndo_start_xmit = rtw_xmit_entry, .ndo_set_mac_address = rtw_net_set_mac_address, .ndo_get_stats = rtw_net_get_stats, .ndo_do_ioctl = rtw_ioctl, #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) .ndo_select_queue = rtw_select_queue, #endif }; #endif _adapter *rtw_drv_if2_init(_adapter *primary_padapter, void (*set_intf_ops)(_adapter *primary_padapter,struct _io_ops *pops)) { int res = _FAIL; struct net_device *pnetdev = NULL; _adapter *padapter = NULL; struct dvobj_priv *pdvobjpriv; u8 mac[ETH_ALEN]; /****** init netdev ******/ pnetdev = rtw_init_netdev(NULL); if (!pnetdev) goto error_rtw_drv_if2_init; #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) DBG_871X("register rtw_netdev_if2_ops to netdev_ops\n"); pnetdev->netdev_ops = &rtw_netdev_if2_ops; #else pnetdev->init = rtw_ndev_init; pnetdev->uninit = rtw_ndev_uninit; pnetdev->open = netdev_if2_open; pnetdev->stop = netdev_if2_close; #endif #ifdef CONFIG_NO_WIRELESS_HANDLERS pnetdev->wireless_handlers = NULL; #endif /****** init adapter ******/ padapter = rtw_netdev_priv(pnetdev); _rtw_memcpy(padapter, primary_padapter, sizeof(_adapter)); // padapter->bup = _FALSE; padapter->net_closed = _TRUE; padapter->hw_init_completed = _FALSE; padapter->dir_dev = NULL; padapter->dir_odm = NULL; //set adapter_type/iface type padapter->isprimary = _FALSE; padapter->adapter_type = SECONDARY_ADAPTER; padapter->pbuddy_adapter = primary_padapter; padapter->iface_id = IFACE_ID1; #ifndef CONFIG_HWPORT_SWAP //Port0 -> Pri , Port1 -> Sec padapter->iface_type = IFACE_PORT1; #else padapter->iface_type = IFACE_PORT0; #endif //CONFIG_HWPORT_SWAP // padapter->pnetdev = pnetdev; /****** setup dvobj ******/ pdvobjpriv = adapter_to_dvobj(padapter); pdvobjpriv->if2 = padapter; pdvobjpriv->padapters[pdvobjpriv->iface_nums++] = padapter; SET_NETDEV_DEV(pnetdev, dvobj_to_dev(pdvobjpriv)); #ifdef CONFIG_IOCTL_CFG80211 rtw_wdev_alloc(padapter, dvobj_to_dev(pdvobjpriv)); #endif //CONFIG_IOCTL_CFG80211 //set interface_type/chip_type/HardwareType padapter->interface_type = primary_padapter->interface_type; padapter->chip_type = primary_padapter->chip_type; padapter->HardwareType = primary_padapter->HardwareType; //step 2. hook HalFunc, allocate HalData //hal_set_hal_ops(padapter); rtw_set_hal_ops(padapter); padapter->HalFunc.inirp_init = NULL; padapter->HalFunc.inirp_deinit = NULL; // padapter->intf_start = primary_padapter->intf_start; padapter->intf_stop = primary_padapter->intf_stop; //step init_io_priv if ((rtw_init_io_priv(padapter, set_intf_ops)) == _FAIL) { RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" \n Can't init io_reqs\n")); } //step read_chip_version rtw_hal_read_chip_version(padapter); //step usb endpoint mapping rtw_hal_chip_configure(padapter); //init drv data if(rtw_init_drv_sw(padapter)!= _SUCCESS) goto error_rtw_drv_if2_init; //get mac address from primary_padapter _rtw_memcpy(mac, primary_padapter->eeprompriv.mac_addr, ETH_ALEN); if (((mac[0]==0xff) &&(mac[1]==0xff) && (mac[2]==0xff) && (mac[3]==0xff) && (mac[4]==0xff) &&(mac[5]==0xff)) || ((mac[0]==0x0) && (mac[1]==0x0) && (mac[2]==0x0) && (mac[3]==0x0) && (mac[4]==0x0) &&(mac[5]==0x0))) { mac[0] = 0x00; mac[1] = 0xe0; mac[2] = 0x4c; mac[3] = 0x87; mac[4] = 0x11; mac[5] = 0x22; } else { //If the BIT1 is 0, the address is universally administered. //If it is 1, the address is locally administered mac[0] |= BIT(1); // locally administered } _rtw_memcpy(padapter->eeprompriv.mac_addr, mac, ETH_ALEN); rtw_init_wifidirect_addrs(padapter, padapter->eeprompriv.mac_addr, padapter->eeprompriv.mac_addr); primary_padapter->pbuddy_adapter = padapter; res = _SUCCESS; return padapter; error_rtw_drv_if2_init: if(padapter) rtw_free_drv_sw(padapter); if (pnetdev) rtw_free_netdev(pnetdev); return NULL; } void rtw_drv_if2_free(_adapter *if2) { _adapter *padapter = if2; struct net_device *pnetdev = NULL; if (padapter == NULL) return; pnetdev = padapter->pnetdev; #ifdef CONFIG_IOCTL_CFG80211 rtw_wdev_free(padapter->rtw_wdev); #endif /* CONFIG_IOCTL_CFG80211 */ rtw_free_drv_sw(padapter); rtw_free_netdev(pnetdev); } void rtw_drv_if2_stop(_adapter *if2) { _adapter *padapter = if2; struct net_device *pnetdev = NULL; if (padapter == NULL) return; rtw_cancel_all_timer(padapter); if (padapter->bup == _TRUE) { padapter->bDriverStopped = _TRUE; #ifdef CONFIG_XMIT_ACK if (padapter->xmitpriv.ack_tx) rtw_ack_tx_done(&padapter->xmitpriv, RTW_SCTX_DONE_DRV_STOP); #endif if (padapter->intf_stop) { padapter->intf_stop(padapter); } rtw_stop_drv_threads(padapter); padapter->bup = _FALSE; } } #endif //end of CONFIG_CONCURRENT_MODE #ifdef CONFIG_BR_EXT void netdev_br_init(struct net_device *netdev) { _adapter *adapter = (_adapter *)rtw_netdev_priv(netdev); #if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) rcu_read_lock(); #endif // (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) //if(check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) { //struct net_bridge *br = netdev->br_port->br;//->dev->dev_addr; #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) if (netdev->br_port) #else // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) if (rcu_dereference(adapter->pnetdev->rx_handler_data)) #endif // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) { struct net_device *br_netdev; #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) br_netdev = dev_get_by_name(CONFIG_BR_EXT_BRNAME); #else // (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) struct net *devnet = NULL; #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) devnet = netdev->nd_net; #else // (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) devnet = dev_net(netdev); #endif // (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) br_netdev = dev_get_by_name(devnet, CONFIG_BR_EXT_BRNAME); #endif // (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) if (br_netdev) { memcpy(adapter->br_mac, br_netdev->dev_addr, ETH_ALEN); dev_put(br_netdev); } else printk("%s()-%d: dev_get_by_name(%s) failed!", __FUNCTION__, __LINE__, CONFIG_BR_EXT_BRNAME); } adapter->ethBrExtInfo.addPPPoETag = 1; } #if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) rcu_read_unlock(); #endif // (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) } #endif //CONFIG_BR_EXT static int _rtw_drv_register_netdev(_adapter *padapter, char *name) { int ret = _SUCCESS; struct net_device *pnetdev = padapter->pnetdev; /* alloc netdev name */ rtw_init_netdev_name(pnetdev, name); _rtw_memcpy(pnetdev->dev_addr, padapter->eeprompriv.mac_addr, ETH_ALEN); /* Tell the network stack we exist */ if (register_netdev(pnetdev) != 0) { DBG_871X(FUNC_NDEV_FMT "Failed!\n", FUNC_NDEV_ARG(pnetdev)); ret = _FAIL; goto error_register_netdev; } DBG_871X("%s, MAC Address (if%d) = " MAC_FMT "\n", __FUNCTION__, (padapter->iface_id+1), MAC_ARG(pnetdev->dev_addr)); return ret; error_register_netdev: if(padapter->iface_id > IFACE_ID0) { rtw_free_drv_sw(padapter); rtw_free_netdev(pnetdev); } return ret; } int rtw_drv_register_netdev(_adapter *if1) { int i, status = _SUCCESS; struct dvobj_priv *dvobj = if1->dvobj; if(dvobj->iface_nums < IFACE_ID_MAX) { for(i=0; iiface_nums; i++) { _adapter *padapter = dvobj->padapters[i]; if(padapter) { char *name; if(padapter->iface_id == IFACE_ID0) name = if1->registrypriv.ifname; else if(padapter->iface_id == IFACE_ID1) name = if1->registrypriv.if2name; else name = "wlan%d"; if((status = _rtw_drv_register_netdev(padapter, name)) != _SUCCESS) { break; } } } } return status; } int _netdev_open(struct net_device *pnetdev) { uint status; _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); RT_TRACE(_module_os_intfs_c_,_drv_info_,("+871x_drv - dev_open\n")); DBG_871X("+871x_drv - drv_open, bup=%d\n", padapter->bup); padapter->netif_up = _TRUE; if(pwrctrlpriv->ps_flag == _TRUE){ padapter->net_closed = _FALSE; goto netdev_open_normal_process; } if(padapter->bup == _FALSE) { padapter->bDriverStopped = _FALSE; padapter->bSurpriseRemoved = _FALSE; padapter->bCardDisableWOHSM = _FALSE; status = rtw_hal_init(padapter); if (status ==_FAIL) { RT_TRACE(_module_os_intfs_c_,_drv_err_,("rtl871x_hal_init(): Can't init h/w!\n")); goto netdev_open_error; } DBG_871X("MAC Address = "MAC_FMT"\n", MAC_ARG(pnetdev->dev_addr)); status=rtw_start_drv_threads(padapter); if(status ==_FAIL) { DBG_871X("Initialize driver software resource Failed!\n"); goto netdev_open_error; } #ifdef CONFIG_DRVEXT_MODULE init_drvext(padapter); #endif if (padapter->intf_start) { padapter->intf_start(padapter); } #ifdef CONFIG_IOCTL_CFG80211 rtw_cfg80211_init_wiphy(padapter); #endif rtw_led_control(padapter, LED_CTL_NO_LINK); padapter->bup = _TRUE; pwrctrlpriv->bips_processing = _FALSE; } padapter->net_closed = _FALSE; _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); #ifndef CONFIG_IPS_CHECK_IN_WD rtw_set_pwr_state_check_timer(pwrctrlpriv); #endif //netif_carrier_on(pnetdev);//call this func when rtw_joinbss_event_callback return success rtw_netif_wake_queue(pnetdev); #ifdef CONFIG_BR_EXT netdev_br_init(pnetdev); #endif // CONFIG_BR_EXT netdev_open_normal_process: #ifdef CONFIG_CONCURRENT_MODE { _adapter *sec_adapter = padapter->pbuddy_adapter; if(sec_adapter && (sec_adapter->bup == _FALSE)) _netdev_if2_open(sec_adapter->pnetdev); } #endif RT_TRACE(_module_os_intfs_c_,_drv_info_,("-871x_drv - dev_open\n")); DBG_871X("-871x_drv - drv_open, bup=%d\n", padapter->bup); return 0; netdev_open_error: padapter->bup = _FALSE; netif_carrier_off(pnetdev); rtw_netif_stop_queue(pnetdev); RT_TRACE(_module_os_intfs_c_,_drv_err_,("-871x_drv - dev_open, fail!\n")); DBG_871X("-871x_drv - drv_open fail, bup=%d\n", padapter->bup); return (-1); } int netdev_open(struct net_device *pnetdev) { int ret; _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); if (pwrctrlpriv->bInSuspend == _TRUE) { DBG_871X("+871x_drv - drv_open, bInSuspend=%d\n", pwrctrlpriv->bInSuspend); return 0; } _enter_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); ret = _netdev_open(pnetdev); _exit_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); return ret; } #ifdef CONFIG_IPS int ips_netdrv_open(_adapter *padapter) { int status = _SUCCESS; //struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); padapter->net_closed = _FALSE; DBG_871X("===> %s.........\n",__FUNCTION__); padapter->bDriverStopped = _FALSE; padapter->bCardDisableWOHSM = _FALSE; //padapter->bup = _TRUE; status = rtw_hal_init(padapter); if (status ==_FAIL) { RT_TRACE(_module_os_intfs_c_,_drv_err_,("ips_netdrv_open(): Can't init h/w!\n")); goto netdev_open_error; } if (padapter->intf_start) { padapter->intf_start(padapter); } #ifndef CONFIG_IPS_CHECK_IN_WD rtw_set_pwr_state_check_timer(adapter_to_pwrctl(padapter)); #endif _set_timer(&padapter->mlmepriv.dynamic_chk_timer,2000); return _SUCCESS; netdev_open_error: //padapter->bup = _FALSE; DBG_871X("-ips_netdrv_open - drv_open failure, bup=%d\n", padapter->bup); return _FAIL; } int rtw_ips_pwr_up(_adapter *padapter) { int result; PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); #ifdef DBG_CONFIG_ERROR_DETECT struct sreset_priv *psrtpriv = &pHalData->srestpriv; #endif//#ifdef DBG_CONFIG_ERROR_DETECT u32 start_time = rtw_get_current_time(); DBG_871X("===> rtw_ips_pwr_up..............\n"); #if defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) #ifdef DBG_CONFIG_ERROR_DETECT if (psrtpriv->silent_reset_inprogress == _TRUE) #endif//#ifdef DBG_CONFIG_ERROR_DETECT #endif //defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) rtw_reset_drv_sw(padapter); result = ips_netdrv_open(padapter); rtw_led_control(padapter, LED_CTL_NO_LINK); DBG_871X("<=== rtw_ips_pwr_up.............. in %dms\n", rtw_get_passing_time_ms(start_time)); return result; } void rtw_ips_pwr_down(_adapter *padapter) { u32 start_time = rtw_get_current_time(); DBG_871X("===> rtw_ips_pwr_down...................\n"); padapter->bCardDisableWOHSM = _TRUE; padapter->net_closed = _TRUE; rtw_ips_dev_unload(padapter); padapter->bCardDisableWOHSM = _FALSE; DBG_871X("<=== rtw_ips_pwr_down..................... in %dms\n", rtw_get_passing_time_ms(start_time)); } #endif void rtw_ips_dev_unload(_adapter *padapter) { struct net_device *pnetdev= (struct net_device*)padapter->pnetdev; struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); #ifdef DBG_CONFIG_ERROR_DETECT struct sreset_priv *psrtpriv = &pHalData->srestpriv; #endif//#ifdef DBG_CONFIG_ERROR_DETECT DBG_871X("====> %s...\n",__FUNCTION__); #if defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) #ifdef DBG_CONFIG_ERROR_DETECT if (psrtpriv->silent_reset_inprogress == _TRUE) #endif //#ifdef DBG_CONFIG_ERROR_DETECT #endif //defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) { rtw_hal_set_hwreg(padapter, HW_VAR_FIFO_CLEARN_UP, 0); if (padapter->intf_stop) { padapter->intf_stop(padapter); } } if(padapter->bSurpriseRemoved == _FALSE) { rtw_hal_deinit(padapter); } } int pm_netdev_open(struct net_device *pnetdev,u8 bnormal) { int status = 0; _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); if (_TRUE == bnormal) { _enter_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); status = _netdev_open(pnetdev); _exit_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); } #ifdef CONFIG_IPS else status = (_SUCCESS == ips_netdrv_open(padapter))?(0):(-1); #endif return status; } static int netdev_close(struct net_device *pnetdev) { _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); RT_TRACE(_module_os_intfs_c_,_drv_info_,("+871x_drv - drv_close\n")); if(pwrctl->bInternalAutoSuspend == _TRUE) { //rtw_pwr_wakeup(padapter); if(pwrctl->rf_pwrstate == rf_off) pwrctl->ps_flag = _TRUE; } padapter->net_closed = _TRUE; padapter->netif_up = _FALSE; /* if(!padapter->hw_init_completed) { DBG_871X("(1)871x_drv - drv_close, bup=%d, hw_init_completed=%d\n", padapter->bup, padapter->hw_init_completed); padapter->bDriverStopped = _TRUE; rtw_dev_unload(padapter); } else*/ if(pwrctl->rf_pwrstate == rf_on){ DBG_871X("(2)871x_drv - drv_close, bup=%d, hw_init_completed=%d\n", padapter->bup, padapter->hw_init_completed); //s1. if(pnetdev) { rtw_netif_stop_queue(pnetdev); } #ifndef CONFIG_ANDROID //s2. LeaveAllPowerSaveMode(padapter); rtw_disassoc_cmd(padapter, 500, _FALSE); //s2-2. indicate disconnect to os rtw_indicate_disconnect(padapter); //s2-3. rtw_free_assoc_resources(padapter, 1); //s2-4. rtw_free_network_queue(padapter,_TRUE); #endif // Close LED rtw_led_control(padapter, LED_CTL_POWER_OFF); } #ifdef CONFIG_BR_EXT //if (OPMODE & (WIFI_STATION_STATE | WIFI_ADHOC_STATE)) { //void nat25_db_cleanup(_adapter *priv); nat25_db_cleanup(padapter); } #endif // CONFIG_BR_EXT #ifdef CONFIG_P2P rtw_p2p_enable(padapter, P2P_ROLE_DISABLE); #endif //CONFIG_P2P #ifdef CONFIG_IOCTL_CFG80211 rtw_scan_abort(padapter); adapter_wdev_data(padapter)->bandroid_scan = _FALSE; //padapter->rtw_wdev->iftype = NL80211_IFTYPE_MONITOR; //set this at the end #endif //CONFIG_IOCTL_CFG80211 #ifdef CONFIG_WAPI_SUPPORT rtw_wapi_disable_tx(padapter); #endif RT_TRACE(_module_os_intfs_c_,_drv_info_,("-871x_drv - drv_close\n")); DBG_871X("-871x_drv - drv_close, bup=%d\n", padapter->bup); return 0; } int pm_netdev_close(struct net_device *pnetdev,u8 bnormal) { int status = 0; status = netdev_close(pnetdev); return status; } void rtw_ndev_destructor(struct net_device *ndev) { DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); #ifdef CONFIG_IOCTL_CFG80211 if (ndev->ieee80211_ptr) rtw_mfree((u8 *)ndev->ieee80211_ptr, sizeof(struct wireless_dev)); #endif free_netdev(ndev); } #ifdef CONFIG_ARP_KEEP_ALIVE struct route_info { struct in_addr dst_addr; struct in_addr src_addr; struct in_addr gateway; unsigned int dev_index; }; static void parse_routes(struct nlmsghdr *nl_hdr, struct route_info *rt_info) { struct rtmsg *rt_msg; struct rtattr *rt_attr; int rt_len; rt_msg = (struct rtmsg *) NLMSG_DATA(nl_hdr); if ((rt_msg->rtm_family != AF_INET) || (rt_msg->rtm_table != RT_TABLE_MAIN)) return; rt_attr = (struct rtattr *) RTM_RTA(rt_msg); rt_len = RTM_PAYLOAD(nl_hdr); for (; RTA_OK(rt_attr, rt_len); rt_attr = RTA_NEXT(rt_attr, rt_len)) { switch (rt_attr->rta_type) { case RTA_OIF: rt_info->dev_index = *(int *) RTA_DATA(rt_attr); break; case RTA_GATEWAY: rt_info->gateway.s_addr = *(u_int *) RTA_DATA(rt_attr); break; case RTA_PREFSRC: rt_info->src_addr.s_addr = *(u_int *) RTA_DATA(rt_attr); break; case RTA_DST: rt_info->dst_addr.s_addr = *(u_int *) RTA_DATA(rt_attr); break; } } } static int route_dump(u32 *gw_addr ,int* gw_index) { int err = 0; struct socket *sock; struct { struct nlmsghdr nlh; struct rtgenmsg g; } req; struct msghdr msg; struct iovec iov; struct sockaddr_nl nladdr; mm_segment_t oldfs; char *pg; int size = 0; err = sock_create(AF_NETLINK, SOCK_DGRAM, NETLINK_ROUTE, &sock); if (err) { printk( ": Could not create a datagram socket, error = %d\n", -ENXIO); return err; } memset(&nladdr, 0, sizeof(nladdr)); nladdr.nl_family = AF_NETLINK; req.nlh.nlmsg_len = sizeof(req); req.nlh.nlmsg_type = RTM_GETROUTE; req.nlh.nlmsg_flags = NLM_F_ROOT | NLM_F_MATCH | NLM_F_REQUEST; req.nlh.nlmsg_pid = 0; req.g.rtgen_family = AF_INET; iov.iov_base = &req; iov.iov_len = sizeof(req); msg.msg_name = &nladdr; msg.msg_namelen = sizeof(nladdr); msg.msg_iov = &iov; msg.msg_iovlen = 1; msg.msg_control = NULL; msg.msg_controllen = 0; msg.msg_flags = MSG_DONTWAIT; oldfs = get_fs(); set_fs(KERNEL_DS); err = sock_sendmsg(sock, &msg, sizeof(req)); set_fs(oldfs); if (size < 0) goto out_sock; pg = (char *) __get_free_page(GFP_KERNEL); if (pg == NULL) { err = -ENOMEM; goto out_sock; } #if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE) restart: #endif for (;;) { struct nlmsghdr *h; iov.iov_base = pg; iov.iov_len = PAGE_SIZE; oldfs = get_fs(); set_fs(KERNEL_DS); err = sock_recvmsg(sock, &msg, PAGE_SIZE, MSG_DONTWAIT); set_fs(oldfs); if (err < 0) goto out_sock_pg; if (msg.msg_flags & MSG_TRUNC) { err = -ENOBUFS; goto out_sock_pg; } h = (struct nlmsghdr*) pg; while (NLMSG_OK(h, err)) { struct route_info rt_info; if (h->nlmsg_type == NLMSG_DONE) { err = 0; goto done; } if (h->nlmsg_type == NLMSG_ERROR) { struct nlmsgerr *errm = (struct nlmsgerr*) NLMSG_DATA(h); err = errm->error; printk( "NLMSG error: %d\n", errm->error); goto done; } if (h->nlmsg_type == RTM_GETROUTE) { printk( "RTM_GETROUTE: NLMSG: %d\n", h->nlmsg_type); } if (h->nlmsg_type != RTM_NEWROUTE) { printk( "NLMSG: %d\n", h->nlmsg_type); err = -EINVAL; goto done; } memset(&rt_info, 0, sizeof(struct route_info)); parse_routes(h, &rt_info); if(!rt_info.dst_addr.s_addr && rt_info.gateway.s_addr && rt_info.dev_index) { *gw_addr = rt_info.gateway.s_addr; *gw_index = rt_info.dev_index; } h = NLMSG_NEXT(h, err); } if (err) { printk( "!!!Remnant of size %d %d %d\n", err, h->nlmsg_len, h->nlmsg_type); err = -EINVAL; break; } } done: #if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE) if (!err && req.g.rtgen_family == AF_INET) { req.g.rtgen_family = AF_INET6; iov.iov_base = &req; iov.iov_len = sizeof(req); msg.msg_name = &nladdr; msg.msg_namelen = sizeof(nladdr); msg.msg_iov = &iov; msg.msg_iovlen = 1; msg.msg_control = NULL; msg.msg_controllen = 0; msg.msg_flags=MSG_DONTWAIT; oldfs = get_fs(); set_fs(KERNEL_DS); err = sock_sendmsg(sock, &msg, sizeof(req)); set_fs(oldfs); if (err > 0) goto restart; } #endif out_sock_pg: free_page((unsigned long) pg); out_sock: sock_release(sock); return err; } static int arp_query(unsigned char *haddr, u32 paddr, struct net_device *dev) { struct neighbour *neighbor_entry; int ret = 0; neighbor_entry = neigh_lookup(&arp_tbl, &paddr, dev); if (neighbor_entry != NULL) { neighbor_entry->used = jiffies; if (neighbor_entry->nud_state & NUD_VALID) { _rtw_memcpy(haddr, neighbor_entry->ha, dev->addr_len); ret = 1; } neigh_release(neighbor_entry); } return ret; } static int get_defaultgw(u32 *ip_addr ,char mac[]) { int gw_index = 0; // oif device index struct net_device *gw_dev = NULL; //oif device route_dump(ip_addr, &gw_index); if( !(*ip_addr) || !gw_index ) { //DBG_871X("No default GW \n"); return -1; } gw_dev = dev_get_by_index(&init_net, gw_index); if(gw_dev == NULL) { //DBG_871X("get Oif Device Fail \n"); return -1; } if(!arp_query(mac, *ip_addr, gw_dev)) { //DBG_871X( "arp query failed\n"); dev_put(gw_dev); return -1; } dev_put(gw_dev); return 0; } int rtw_gw_addr_query(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); u32 gw_addr = 0; // default gw address unsigned char gw_mac[32] = {0}; // default gw mac int i; int res; if (pwrctl->wowlan_from_cmd == _TRUE) { DBG_871X("%s: return cuz wowlan_from_cmd\n", __func__); return 0; } res = get_defaultgw(&gw_addr, gw_mac); if(!res) { pmlmepriv->gw_ip[0] = gw_addr&0xff; pmlmepriv->gw_ip[1] = (gw_addr&0xff00)>>8; pmlmepriv->gw_ip[2] = (gw_addr&0xff0000)>>16; pmlmepriv->gw_ip[3] = (gw_addr&0xff000000)>>24; _rtw_memcpy(pmlmepriv->gw_mac_addr, gw_mac, 6); DBG_871X("%s Gateway Mac:\t" MAC_FMT "\n", __FUNCTION__, MAC_ARG(pmlmepriv->gw_mac_addr)); DBG_871X("%s Gateway IP:\t" IP_FMT "\n", __FUNCTION__, IP_ARG(pmlmepriv->gw_ip)); } else { DBG_871X("Get Gateway IP/MAC fail!\n"); } return res; } #endif void rtw_dev_unload(PADAPTER padapter) { struct net_device *pnetdev = (struct net_device*)padapter->pnetdev; struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); struct dvobj_priv *pobjpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &pobjpriv->drv_dbg; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 cnt = 0; RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("+%s\n",__FUNCTION__)); if (padapter->bup == _TRUE) { DBG_871X("===> %s\n",__FUNCTION__); padapter->bDriverStopped = _TRUE; #ifdef CONFIG_XMIT_ACK if (padapter->xmitpriv.ack_tx) rtw_ack_tx_done(&padapter->xmitpriv, RTW_SCTX_DONE_DRV_STOP); #endif if (padapter->intf_stop) padapter->intf_stop(padapter); RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("@ rtw_dev_unload: stop intf complete!\n")); if (!pwrctl->bInternalAutoSuspend) rtw_stop_drv_threads(padapter); while(ATOMIC_READ(&(pcmdpriv->cmdthd_running)) == _TRUE){ if (cnt > 5) { DBG_871X("stop cmdthd timeout\n"); break; } else { cnt ++; DBG_871X("cmdthd is running(%d)\n", cnt); rtw_msleep_os(10); } } RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("@ %s: stop thread complete!\n",__FUNCTION__)); //check the status of IPS if(rtw_hal_check_ips_status(padapter) == _TRUE || pwrctl->rf_pwrstate == rf_off) { //check HW status and SW state DBG_871X_LEVEL(_drv_always_, "%s: driver in IPS-FWLPS\n", __func__); pdbgpriv->dbg_dev_unload_inIPS_cnt++; LeaveAllPowerSaveMode(padapter); } else { DBG_871X_LEVEL(_drv_always_, "%s: driver not in IPS\n", __func__); } if (padapter->bSurpriseRemoved == _FALSE) { #ifdef CONFIG_BT_COEXIST rtw_btcoex_IpsNotify(padapter, pwrctl->ips_mode_req); #endif #ifdef CONFIG_WOWLAN if (pwrctl->bSupportRemoteWakeup == _TRUE && pwrctl->wowlan_mode ==_TRUE) { DBG_871X_LEVEL(_drv_always_, "%s bSupportRemoteWakeup==_TRUE do not run rtw_hal_deinit()\n",__FUNCTION__); } else #endif { //amy modify 20120221 for power seq is different between driver open and ips rtw_hal_deinit(padapter); } padapter->bSurpriseRemoved = _TRUE; } RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("@ %s: deinit hal complelt!\n",__FUNCTION__)); padapter->bup = _FALSE; DBG_871X("<=== %s\n",__FUNCTION__); } else { RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("%s: bup==_FALSE\n",__FUNCTION__)); DBG_871X("%s: bup==_FALSE\n",__FUNCTION__); } RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("-%s\n",__FUNCTION__)); } int rtw_suspend_free_assoc_resource(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct net_device *pnetdev = padapter->pnetdev; struct wifidirect_info* pwdinfo = &padapter->wdinfo; DBG_871X("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter)); if (rtw_chk_roam_flags(padapter, RTW_ROAM_ON_RESUME)) { if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, _FW_LINKED) && rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { DBG_871X("%s %s(" MAC_FMT "), length:%d assoc_ssid.length:%d\n",__FUNCTION__, pmlmepriv->cur_network.network.Ssid.Ssid, MAC_ARG(pmlmepriv->cur_network.network.MacAddress), pmlmepriv->cur_network.network.Ssid.SsidLength, pmlmepriv->assoc_ssid.SsidLength); rtw_set_to_roam(padapter, 1); } } if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, _FW_LINKED)) { rtw_disassoc_cmd(padapter, 0, _FALSE); //s2-2. indicate disconnect to os rtw_indicate_disconnect(padapter); } #ifdef CONFIG_AP_MODE else if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { rtw_sta_flush(padapter); } #endif //s2-3. rtw_free_assoc_resources(padapter, 1); //s2-4. #ifdef CONFIG_AUTOSUSPEND if(is_primary_adapter(padapter) && (!adapter_to_pwrctl(padapter)->bInternalAutoSuspend )) #endif rtw_free_network_queue(padapter, _TRUE); if(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) rtw_indicate_scan_done(padapter, 1); if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { DBG_871X_LEVEL(_drv_always_, "%s: fw_under_linking\n", __FUNCTION__); rtw_indicate_disconnect(padapter); } DBG_871X("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); return _SUCCESS; } #ifdef CONFIG_WOWLAN int rtw_suspend_wow(_adapter *padapter) { u8 ch, bw, offset; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct net_device *pnetdev = padapter->pnetdev; #ifdef CONFIG_CONCURRENT_MODE struct net_device *pbuddy_netdev = padapter->pbuddy_adapter->pnetdev; #endif struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct wowlan_ioctl_param poidparam; u8 ps_mode; int ret = _SUCCESS; DBG_871X("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter)); DBG_871X("wowlan_mode: %d\n", pwrpriv->wowlan_mode); DBG_871X("wowlan_pno_enable: %d\n", pwrpriv->wowlan_pno_enable); if (pwrpriv->wowlan_mode == _TRUE) { if(pnetdev) rtw_netif_stop_queue(pnetdev); #ifdef CONFIG_CONCURRENT_MODE if(pbuddy_netdev){ netif_carrier_off(pbuddy_netdev); rtw_netif_stop_queue(pbuddy_netdev); } #endif//CONFIG_CONCURRENT_MODE // 1. stop thread padapter->bDriverStopped = _TRUE; //for stop thread rtw_stop_drv_threads(padapter); padapter->bDriverStopped = _FALSE; //for 32k command #ifdef CONFIG_CONCURRENT_MODE if (rtw_buddy_adapter_up(padapter)) { padapter->pbuddy_adapter->bDriverStopped = _TRUE; //for stop thread rtw_stop_drv_threads(padapter->pbuddy_adapter); padapter->pbuddy_adapter->bDriverStopped = _FALSE; //for 32k command } #endif // CONFIG_CONCURRENT_MODE //#ifdef CONFIG_LPS //rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "WOWLAN"); //#endif #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) // 2. disable interrupt if (padapter->intf_stop) { padapter->intf_stop(padapter); } #ifdef CONFIG_CONCURRENT_MODE if (rtw_buddy_adapter_up(padapter)) { //free buddy adapter's resource padapter->pbuddy_adapter->intf_stop(padapter->pbuddy_adapter); } #endif // 2.1 clean interupt if (padapter->HalFunc.clear_interrupt) padapter->HalFunc.clear_interrupt(padapter); #endif //CONFIG_SDIO_HCI // 2.2 free irq //sdio_free_irq(adapter_to_dvobj(padapter)); if(padapter->intf_free_irq) padapter->intf_free_irq(adapter_to_dvobj(padapter)); #ifdef CONFIG_RUNTIME_PORT_SWITCH if (rtw_port_switch_chk(padapter)) { DBG_871X(" ### PORT SWITCH ### \n"); rtw_hal_set_hwreg(padapter, HW_VAR_PORT_SWITCH, NULL); } #endif poidparam.subcode = WOWLAN_ENABLE; padapter->HalFunc.SetHwRegHandler(padapter,HW_VAR_WOWLAN,(u8 *)&poidparam); if (rtw_chk_roam_flags(padapter, RTW_ROAM_ON_RESUME)) { if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, _FW_LINKED)) { DBG_871X("%s %s(" MAC_FMT "), length:%d assoc_ssid.length:%d\n",__FUNCTION__, pmlmepriv->cur_network.network.Ssid.Ssid, MAC_ARG(pmlmepriv->cur_network.network.MacAddress), pmlmepriv->cur_network.network.Ssid.SsidLength, pmlmepriv->assoc_ssid.SsidLength); rtw_set_to_roam(padapter, 0); } } DBG_871X_LEVEL(_drv_always_, "%s: wowmode suspending\n", __func__); if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { DBG_871X_LEVEL(_drv_always_, "%s: fw_under_survey\n", __func__); rtw_indicate_scan_done(padapter, 1); clr_fwstate(pmlmepriv, _FW_UNDER_SURVEY); } if (rtw_get_ch_setting_union(padapter, &ch, &bw, &offset) != 0) { DBG_871X(FUNC_ADPT_FMT" back to linked/linking union - ch:%u, bw:%u, offset:%u\n", FUNC_ADPT_ARG(padapter), ch, bw, offset); set_channel_bwmode(padapter, ch, offset, bw); } #ifdef CONFIG_CONCURRENT_MODE if(rtw_buddy_adapter_up(padapter)){ //free buddy adapter's resource rtw_suspend_free_assoc_resource(padapter->pbuddy_adapter); } #endif if(pwrpriv->wowlan_pno_enable) DBG_871X_LEVEL(_drv_always_, "%s: pno: %d\n", __func__, pwrpriv->wowlan_pno_enable); #ifdef CONFIG_LPS else rtw_set_ps_mode(padapter, PS_MODE_DTIM, 0, 0, "WOWLAN"); #endif //#ifdef CONFIG_LPS } else { DBG_871X_LEVEL(_drv_always_, "%s: ### ERROR ### wowlan_mode=%d\n", __FUNCTION__, pwrpriv->wowlan_mode); } DBG_871X("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); return ret; } #endif //#ifdef CONFIG_WOWLAN #ifdef CONFIG_AP_WOWLAN int rtw_suspend_ap_wow(_adapter *padapter) { u8 ch, bw, offset; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct net_device *pnetdev = padapter->pnetdev; #ifdef CONFIG_CONCURRENT_MODE struct net_device *pbuddy_netdev; #endif struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct wowlan_ioctl_param poidparam; u8 ps_mode; int ret = _SUCCESS; DBG_871X("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter)); pwrpriv->wowlan_ap_mode = _TRUE; DBG_871X("wowlan_ap_mode: %d\n", pwrpriv->wowlan_ap_mode); if(pnetdev) rtw_netif_stop_queue(pnetdev); #ifdef CONFIG_CONCURRENT_MODE if (rtw_buddy_adapter_up(padapter)) { pbuddy_netdev = padapter->pbuddy_adapter->pnetdev; if (pbuddy_netdev) rtw_netif_stop_queue(pbuddy_netdev); } #endif//CONFIG_CONCURRENT_MODE // 1. stop thread padapter->bDriverStopped = _TRUE; //for stop thread rtw_stop_drv_threads(padapter); padapter->bDriverStopped = _FALSE; //for 32k command #ifdef CONFIG_CONCURRENT_MODE if(rtw_buddy_adapter_up(padapter)){ padapter->pbuddy_adapter->bDriverStopped = _TRUE; //for stop thread rtw_stop_drv_threads(padapter->pbuddy_adapter); padapter->pbuddy_adapter->bDriverStopped = _FALSE; //for 32k command } #endif // CONFIG_CONCURRENT_MODE //#ifdef CONFIG_LPS //rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "WOWLAN"); //#endif #ifdef CONFIG_SDIO_HCI // 2. disable interrupt rtw_hal_disable_interrupt(padapter); // It need wait for leaving 32K. #ifdef CONFIG_CONCURRENT_MODE if (rtw_buddy_adapter_up(padapter)) { //free buddy adapter's resource padapter->pbuddy_adapter->intf_stop(padapter->pbuddy_adapter); } #endif // 2.1 clean interupt if (padapter->HalFunc.clear_interrupt) padapter->HalFunc.clear_interrupt(padapter); #endif //CONFIG_SDIO_HCI // 2.2 free irq //sdio_free_irq(adapter_to_dvobj(padapter)); if(padapter->intf_free_irq) padapter->intf_free_irq(adapter_to_dvobj(padapter)); #ifdef CONFIG_RUNTIME_PORT_SWITCH if (rtw_port_switch_chk(padapter)) { DBG_871X(" ### PORT SWITCH ### \n"); rtw_hal_set_hwreg(padapter, HW_VAR_PORT_SWITCH, NULL); } #endif poidparam.subcode = WOWLAN_AP_ENABLE; padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AP_WOWLAN,(u8 *)&poidparam); DBG_871X_LEVEL(_drv_always_, "%s: wowmode suspending\n", __func__); #ifdef CONFIG_CONCURRENT_MODE if (check_buddy_fwstate(padapter, WIFI_AP_STATE) == _TRUE) { if (rtw_get_ch_setting_union(padapter->pbuddy_adapter, &ch, &bw, &offset) != 0) { DBG_871X(FUNC_ADPT_FMT" back to linked/linking union - ch:%u, bw:%u, offset:%u\n", FUNC_ADPT_ARG(padapter->pbuddy_adapter), ch, bw, offset); set_channel_bwmode(padapter->pbuddy_adapter, ch, offset, bw); } rtw_suspend_free_assoc_resource(padapter); } else { if (rtw_get_ch_setting_union(padapter, &ch, &bw, &offset) != 0) { DBG_871X(FUNC_ADPT_FMT" back to linked/linking union - ch:%u, bw:%u, offset:%u\n", FUNC_ADPT_ARG(padapter), ch, bw, offset); set_channel_bwmode(padapter, ch, offset, bw); } rtw_suspend_free_assoc_resource(padapter->pbuddy_adapter); } #else if (rtw_get_ch_setting_union(padapter, &ch, &bw, &offset) != 0) { DBG_871X(FUNC_ADPT_FMT" back to linked/linking union - ch:%u, bw:%u, offset:%u\n", FUNC_ADPT_ARG(padapter), ch, bw, offset); set_channel_bwmode(padapter, ch, offset, bw); } #endif #ifdef CONFIG_LPS rtw_set_ps_mode(padapter, PS_MODE_MIN, 0, 0, "AP-WOWLAN"); #endif DBG_871X("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); return ret; } #endif //#ifdef CONFIG_AP_WOWLAN int rtw_suspend_normal(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct net_device *pnetdev = padapter->pnetdev; #ifdef CONFIG_CONCURRENT_MODE struct net_device *pbuddy_netdev = padapter->pbuddy_adapter->pnetdev; #endif struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); int ret = _SUCCESS; DBG_871X("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter)); if(pnetdev){ netif_carrier_off(pnetdev); rtw_netif_stop_queue(pnetdev); } #ifdef CONFIG_CONCURRENT_MODE if(rtw_buddy_adapter_up(padapter)){ pbuddy_netdev = padapter->pbuddy_adapter->pnetdev; netif_carrier_off(pbuddy_netdev); rtw_netif_stop_queue(pbuddy_netdev); } #endif rtw_suspend_free_assoc_resource(padapter); #ifdef CONFIG_CONCURRENT_MODE if(rtw_buddy_adapter_up(padapter)){ rtw_suspend_free_assoc_resource(padapter->pbuddy_adapter); } #endif rtw_led_control(padapter, LED_CTL_POWER_OFF); if ((rtw_hal_check_ips_status(padapter) == _TRUE) || (adapter_to_pwrctl(padapter)->rf_pwrstate == rf_off)) { DBG_871X_LEVEL(_drv_always_, "%s: ### ERROR #### driver in IPS ####ERROR###!!!\n", __FUNCTION__); } #ifdef CONFIG_CONCURRENT_MODE if(rtw_buddy_adapter_up(padapter)){ rtw_dev_unload(padapter->pbuddy_adapter); } #endif rtw_dev_unload(padapter); //sdio_deinit(adapter_to_dvobj(padapter)); if(padapter->intf_deinit) padapter->intf_deinit(adapter_to_dvobj(padapter)); DBG_871X("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); return ret; } int rtw_suspend_common(_adapter *padapter) { struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(psdpriv); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; int ret = 0; u32 start_time = rtw_get_current_time(); DBG_871X_LEVEL(_drv_always_, " suspend start\n"); DBG_871X("==> %s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); pdbgpriv->dbg_suspend_cnt++; pwrpriv->bInSuspend = _TRUE; while (pwrpriv->bips_processing == _TRUE) rtw_msleep_os(1); #ifdef CONFIG_IOL_READ_EFUSE_MAP if(!padapter->bup){ u8 bMacPwrCtrlOn = _FALSE; rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); if(bMacPwrCtrlOn) rtw_hal_power_off(padapter); } #endif if((!padapter->bup) || (padapter->bDriverStopped)||(padapter->bSurpriseRemoved)) { DBG_871X("%s bup=%d bDriverStopped=%d bSurpriseRemoved = %d\n", __FUNCTION__ ,padapter->bup, padapter->bDriverStopped,padapter->bSurpriseRemoved); pdbgpriv->dbg_suspend_error_cnt++; goto exit; } rtw_ps_deny(padapter, PS_DENY_SUSPEND); rtw_cancel_all_timer(padapter); #ifdef CONFIG_CONCURRENT_MODE if (padapter->pbuddy_adapter){ rtw_cancel_all_timer(padapter->pbuddy_adapter); } #endif // CONFIG_CONCURRENT_MODE LeaveAllPowerSaveModeDirect(padapter); rtw_stop_cmd_thread(padapter); #ifdef CONFIG_BT_COEXIST // wait for the latest FW to remove this condition. if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { rtw_btcoex_SuspendNotify(padapter, 0); DBG_871X("WIFI_AP_STATE\n"); #ifdef CONFIG_CONCURRENT_MODE } else if (check_buddy_fwstate(padapter, WIFI_AP_STATE)) { rtw_btcoex_SuspendNotify(padapter, 0); DBG_871X("P2P_ROLE_GO\n"); #endif //CONFIG_CONCURRENT_MODE } else if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) { rtw_btcoex_SuspendNotify(padapter, 1); DBG_871X("STATION\n"); } #endif // CONFIG_BT_COEXIST rtw_ps_deny_cancel(padapter, PS_DENY_SUSPEND); if (check_fwstate(pmlmepriv,WIFI_STATION_STATE) == _TRUE #ifdef CONFIG_CONCURRENT_MODE && check_buddy_fwstate(padapter, WIFI_AP_STATE) == _FALSE #endif ) { #ifdef CONFIG_WOWLAN if (check_fwstate(pmlmepriv, _FW_LINKED)) { pwrpriv->wowlan_mode = _TRUE; } else if (pwrpriv->wowlan_pno_enable == _TRUE) { pwrpriv->wowlan_mode |= pwrpriv->wowlan_pno_enable; } if (pwrpriv->wowlan_mode == _TRUE) rtw_suspend_wow(padapter); else rtw_suspend_normal(padapter); #else //CONFIG_WOWLAN rtw_suspend_normal(padapter); #endif //CONFIG_WOWLAN } else if (check_fwstate(pmlmepriv,WIFI_AP_STATE) == _TRUE #ifdef CONFIG_CONCURRENT_MODE && check_buddy_fwstate(padapter, WIFI_AP_STATE) == _FALSE #endif ) { #ifdef CONFIG_AP_WOWLAN rtw_suspend_ap_wow(padapter); #else rtw_suspend_normal(padapter); #endif //CONFIG_AP_WOWLAN #ifdef CONFIG_CONCURRENT_MODE } else if (check_fwstate(pmlmepriv,WIFI_STATION_STATE) == _TRUE && check_buddy_fwstate(padapter, WIFI_AP_STATE) == _TRUE) { #ifdef CONFIG_AP_WOWLAN rtw_suspend_ap_wow(padapter); #else rtw_suspend_normal(padapter); #endif //CONFIG_AP_WOWLAN #endif } else { rtw_suspend_normal(padapter); } DBG_871X_LEVEL(_drv_always_, "rtw suspend success in %d ms\n", rtw_get_passing_time_ms(start_time)); exit: DBG_871X("<=== %s return %d.............. in %dms\n", __FUNCTION__ , ret, rtw_get_passing_time_ms(start_time)); return ret; } #ifdef CONFIG_WOWLAN int rtw_resume_process_wow(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct net_device *pnetdev = padapter->pnetdev; #ifdef CONFIG_CONCURRENT_MODE struct net_device *pbuddy_netdev; #endif struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; struct wowlan_ioctl_param poidparam; struct sta_info *psta = NULL; int ret = _SUCCESS; _func_enter_; DBG_871X("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter)); if (padapter) { pnetdev = padapter->pnetdev; pwrpriv = adapter_to_pwrctl(padapter); } else { pdbgpriv->dbg_resume_error_cnt++; ret = -1; goto exit; } if (padapter->bDriverStopped || padapter->bSurpriseRemoved) { DBG_871X("%s pdapter %p bDriverStopped %d bSurpriseRemoved %d\n", __FUNCTION__, padapter, padapter->bDriverStopped, padapter->bSurpriseRemoved); goto exit; } #ifdef CONFIG_PNO_SUPPORT pwrpriv->pno_in_resume = _TRUE; #endif if (pwrpriv->wowlan_mode == _TRUE){ #ifdef CONFIG_LPS rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "WOWLAN"); #endif //CONFIG_LPS pwrpriv->bFwCurrentInPSMode = _FALSE; #ifdef CONFIG_SDIO_HCI if (padapter->intf_stop) { padapter->intf_stop(padapter); } #ifdef CONFIG_CONCURRENT_MODE if (rtw_buddy_adapter_up(padapter)) { //free buddy adapter's resource padapter->pbuddy_adapter->intf_stop(padapter->pbuddy_adapter); } #endif if (padapter->HalFunc.clear_interrupt) padapter->HalFunc.clear_interrupt(padapter); #endif //CONFIG_SDIO_HCI //if (sdio_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS) { if((padapter->intf_alloc_irq) && (padapter->intf_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS)){ ret = -1; RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("%s: sdio_alloc_irq Failed!!\n", __FUNCTION__)); goto exit; } //Disable WOW, set H2C command poidparam.subcode=WOWLAN_DISABLE; padapter->HalFunc.SetHwRegHandler(padapter,HW_VAR_WOWLAN,(u8 *)&poidparam); #ifdef CONFIG_CONCURRENT_MODE rtw_reset_drv_sw(padapter->pbuddy_adapter); #endif psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv)); if (psta) { set_sta_rate(padapter, psta); } padapter->bDriverStopped = _FALSE; DBG_871X("%s: wowmode resuming, DriverStopped:%d\n", __func__, padapter->bDriverStopped); rtw_start_drv_threads(padapter); #ifdef CONFIG_CONCURRENT_MODE if (padapter->pbuddy_adapter) { padapter->pbuddy_adapter->bDriverStopped = _FALSE; DBG_871X("%s: wowmode resuming, pbuddy_adapter->DriverStopped:%d\n", __FUNCTION__, padapter->pbuddy_adapter->bDriverStopped); rtw_start_drv_threads(padapter->pbuddy_adapter); } #endif // CONFIG_CONCURRENT_MODE if (padapter->intf_start) { padapter->intf_start(padapter); } #ifdef CONFIG_CONCURRENT_MODE if (rtw_buddy_adapter_up(padapter)) { //free buddy adapter's resource padapter->pbuddy_adapter->intf_start(padapter->pbuddy_adapter); } if (rtw_buddy_adapter_up(padapter)) { pbuddy_netdev = padapter->pbuddy_adapter->pnetdev; if(pbuddy_netdev){ netif_device_attach(pbuddy_netdev); netif_carrier_on(pbuddy_netdev); } } #endif // start netif queue if (pnetdev) { rtw_netif_wake_queue(pnetdev); } } else{ DBG_871X_LEVEL(_drv_always_, "%s: ### ERROR ### wowlan_mode=%d\n", __FUNCTION__, pwrpriv->wowlan_mode); } if( padapter->pid[1]!=0) { DBG_871X("pid[1]:%d\n",padapter->pid[1]); rtw_signal_process(padapter->pid[1], SIGUSR2); } if (rtw_chk_roam_flags(padapter, RTW_ROAM_ON_RESUME)) { if (pwrpriv->wowlan_wake_reason == FWDecisionDisconnect || pwrpriv->wowlan_wake_reason == Rx_DisAssoc || pwrpriv->wowlan_wake_reason == Rx_DeAuth) { DBG_871X("%s: disconnect reason: %02x\n", __func__, pwrpriv->wowlan_wake_reason); rtw_indicate_disconnect(padapter); rtw_sta_media_status_rpt(padapter, rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv)), 0); rtw_free_assoc_resources(padapter, 1); pmlmeinfo->state = WIFI_FW_NULL_STATE; } else { DBG_871X("%s: do roaming\n", __func__); rtw_roaming(padapter, NULL); } } if (pwrpriv->wowlan_wake_reason == FWDecisionDisconnect) { rtw_lock_ext_suspend_timeout(2000); } if (pwrpriv->wowlan_wake_reason == Rx_GTK || pwrpriv->wowlan_wake_reason == Rx_DisAssoc || pwrpriv->wowlan_wake_reason == Rx_DeAuth) { rtw_lock_ext_suspend_timeout(8000); } if (pwrpriv->wowlan_wake_reason == RX_PNOWakeUp) { rtw_lock_ext_suspend_timeout(15000); } if (pwrpriv->wowlan_mode == _TRUE) { pwrpriv->bips_processing = _FALSE; _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); #ifndef CONFIG_IPS_CHECK_IN_WD rtw_set_pwr_state_check_timer(pwrpriv); #endif } else { DBG_871X_LEVEL(_drv_always_, "do not reset timer\n"); } pwrpriv->wowlan_mode =_FALSE; //clean driver side wake up reason. pwrpriv->wowlan_wake_reason = 0; exit: DBG_871X("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); _func_exit_; return ret; } #endif //#ifdef CONFIG_WOWLAN #ifdef CONFIG_AP_WOWLAN int rtw_resume_process_ap_wow(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct net_device *pnetdev = padapter->pnetdev; #ifdef CONFIG_CONCURRENT_MODE struct net_device *pbuddy_netdev; #endif struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; struct wowlan_ioctl_param poidparam; struct sta_info *psta = NULL; int ret = _SUCCESS; u8 ch, bw, offset; _func_enter_; DBG_871X("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter)); if (padapter) { pnetdev = padapter->pnetdev; pwrpriv = adapter_to_pwrctl(padapter); } else { pdbgpriv->dbg_resume_error_cnt++; ret = -1; goto exit; } #ifdef CONFIG_LPS rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "AP-WOWLAN"); #endif //CONFIG_LPS pwrpriv->bFwCurrentInPSMode = _FALSE; rtw_hal_disable_interrupt(padapter); if (padapter->HalFunc.clear_interrupt) padapter->HalFunc.clear_interrupt(padapter); //if (sdio_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS) { if((padapter->intf_alloc_irq) && (padapter->intf_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS)){ ret = -1; RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("%s: sdio_alloc_irq Failed!!\n", __FUNCTION__)); goto exit; } //Disable WOW, set H2C command poidparam.subcode = WOWLAN_AP_DISABLE; padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AP_WOWLAN,(u8 *)&poidparam); pwrpriv->wowlan_ap_mode = _FALSE; padapter->bDriverStopped = _FALSE; DBG_871X("%s: wowmode resuming, DriverStopped:%d\n", __func__, padapter->bDriverStopped); rtw_start_drv_threads(padapter); #ifdef CONFIG_CONCURRENT_MODE if (rtw_buddy_adapter_up(padapter)) { padapter->pbuddy_adapter->bDriverStopped = _FALSE; DBG_871X("%s: wowmode resuming, pbuddy_adapter->DriverStopped:%d\n", __FUNCTION__, padapter->pbuddy_adapter->bDriverStopped); rtw_start_drv_threads(padapter->pbuddy_adapter); } #endif // CONFIG_CONCURRENT_MODE #ifdef CONFIG_CONCURRENT_MODE if (rtw_buddy_adapter_up(padapter)) { if (rtw_get_ch_setting_union(padapter->pbuddy_adapter, &ch, &bw, &offset) != 0) { DBG_871X(FUNC_ADPT_FMT" back to linked/linking union - ch:%u, bw:%u, offset:%u\n", FUNC_ADPT_ARG(padapter->pbuddy_adapter), ch, bw, offset); set_channel_bwmode(padapter->pbuddy_adapter, ch, offset, bw); } } else { DBG_871X(FUNC_ADPT_FMT" back to linked/linking union - ch:%u, bw:%u, offset:%u\n", FUNC_ADPT_ARG(padapter), ch, bw, offset); set_channel_bwmode(padapter, ch, offset, bw); rtw_reset_drv_sw(padapter->pbuddy_adapter); } #else if (rtw_get_ch_setting_union(padapter, &ch, &bw, &offset) != 0) { DBG_871X(FUNC_ADPT_FMT" back to linked/linking union - ch:%u, bw:%u, offset:%u\n", FUNC_ADPT_ARG(padapter), ch, bw, offset); set_channel_bwmode(padapter, ch, offset, bw); } #endif if (padapter->intf_start) { padapter->intf_start(padapter); } #ifdef CONFIG_CONCURRENT_MODE if (rtw_buddy_adapter_up(padapter)) { //free buddy adapter's resource padapter->pbuddy_adapter->intf_start(padapter->pbuddy_adapter); } #endif #ifdef CONFIG_CONCURRENT_MODE if (rtw_buddy_adapter_up(padapter)) { pbuddy_netdev = padapter->pbuddy_adapter->pnetdev; if(pbuddy_netdev){ rtw_netif_wake_queue(pbuddy_netdev); } } #endif // start netif queue if (pnetdev) { rtw_netif_wake_queue(pnetdev); } if( padapter->pid[1]!=0) { DBG_871X("pid[1]:%d\n",padapter->pid[1]); rtw_signal_process(padapter->pid[1], SIGUSR2); } #ifdef CONFIG_RESUME_IN_WORKQUEUE //rtw_unlock_suspend(); #endif //CONFIG_RESUME_IN_WORKQUEUE if (pwrpriv->wowlan_wake_reason == AP_WakeUp) rtw_lock_ext_suspend_timeout(8000); pwrpriv->bips_processing = _FALSE; _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); #ifndef CONFIG_IPS_CHECK_IN_WD rtw_set_pwr_state_check_timer(pwrpriv); #endif //clean driver side wake up reason. pwrpriv->wowlan_wake_reason = 0; exit: DBG_871X("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); _func_exit_; return ret; } #endif //#ifdef CONFIG_APWOWLAN int rtw_resume_process_normal(_adapter *padapter) { struct net_device *pnetdev; #ifdef CONFIG_CONCURRENT_MODE struct net_device *pbuddy_netdev; #endif struct pwrctrl_priv *pwrpriv; struct mlme_priv *pmlmepriv; struct dvobj_priv *psdpriv; struct debug_priv *pdbgpriv; int ret = _SUCCESS; _func_enter_; if (!padapter) { ret = -1; goto exit; } pnetdev = padapter->pnetdev; pwrpriv = adapter_to_pwrctl(padapter); pmlmepriv = &padapter->mlmepriv; psdpriv = padapter->dvobj; pdbgpriv = &psdpriv->drv_dbg; DBG_871X("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter)); // interface init //if (sdio_init(adapter_to_dvobj(padapter)) != _SUCCESS) if((padapter->intf_init)&& (padapter->intf_init(adapter_to_dvobj(padapter)) != _SUCCESS)) { ret = -1; RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("%s: initialize SDIO Failed!!\n", __FUNCTION__)); goto exit; } rtw_hal_disable_interrupt(padapter); //if (sdio_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS) if ((padapter->intf_alloc_irq)&&(padapter->intf_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS)) { ret = -1; RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("%s: sdio_alloc_irq Failed!!\n", __FUNCTION__)); goto exit; } rtw_reset_drv_sw(padapter); #ifdef CONFIG_CONCURRENT_MODE rtw_reset_drv_sw(padapter->pbuddy_adapter); #endif pwrpriv->bkeepfwalive = _FALSE; DBG_871X("bkeepfwalive(%x)\n",pwrpriv->bkeepfwalive); if(pm_netdev_open(pnetdev,_TRUE) != 0) { ret = -1; pdbgpriv->dbg_resume_error_cnt++; goto exit; } netif_device_attach(pnetdev); netif_carrier_on(pnetdev); #ifdef CONFIG_CONCURRENT_MODE if(rtw_buddy_adapter_up(padapter)){ pbuddy_netdev = padapter->pbuddy_adapter->pnetdev; netif_device_attach(pbuddy_netdev); netif_carrier_on(pbuddy_netdev); } #endif if( padapter->pid[1]!=0) { DBG_871X("pid[1]:%d\n",padapter->pid[1]); rtw_signal_process(padapter->pid[1], SIGUSR2); } if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_STATION_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(pmlmepriv)); if (rtw_chk_roam_flags(padapter, RTW_ROAM_ON_RESUME)) rtw_roaming(padapter, NULL); } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_AP_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(pmlmepriv)); rtw_ap_restore_network(padapter); } else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) { DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_ADHOC_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(pmlmepriv)); } else { DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - ???\n", FUNC_ADPT_ARG(padapter), get_fwstate(pmlmepriv)); } #ifdef CONFIG_CONCURRENT_MODE if(rtw_buddy_adapter_up(padapter)) { _adapter *buddy = padapter->pbuddy_adapter; struct mlme_priv *buddy_mlme = &padapter->pbuddy_adapter->mlmepriv; if (check_fwstate(buddy_mlme, WIFI_STATION_STATE)) { DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_STATION_STATE\n", FUNC_ADPT_ARG(buddy), get_fwstate(buddy_mlme)); if (rtw_chk_roam_flags(buddy, RTW_ROAM_ON_RESUME)) rtw_roaming(buddy, NULL); } else if (check_fwstate(buddy_mlme, WIFI_AP_STATE)) { DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_AP_STATE\n", FUNC_ADPT_ARG(buddy), get_fwstate(buddy_mlme)); rtw_ap_restore_network(buddy); } else if (check_fwstate(buddy_mlme, WIFI_ADHOC_STATE)) { DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_ADHOC_STATE\n", FUNC_ADPT_ARG(buddy), get_fwstate(buddy_mlme)); } else { DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - ???\n", FUNC_ADPT_ARG(buddy), get_fwstate(buddy_mlme)); } } #endif #ifdef CONFIG_RESUME_IN_WORKQUEUE //rtw_unlock_suspend(); #endif //CONFIG_RESUME_IN_WORKQUEUE DBG_871X("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); exit: _func_exit_; return ret; } int rtw_resume_common(_adapter *padapter) { int ret = 0; u32 start_time = rtw_get_current_time(); struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; _func_enter_; if (pwrpriv->bInSuspend == _FALSE) return 0; DBG_871X_LEVEL(_drv_always_, "resume start\n"); DBG_871X("==> %s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); if (check_fwstate(pmlmepriv,WIFI_STATION_STATE) == _TRUE #ifdef CONFIG_CONCURRENT_MODE && check_buddy_fwstate(padapter, WIFI_AP_STATE) == _FALSE #endif ) { #ifdef CONFIG_WOWLAN if (pwrpriv->wowlan_mode == _TRUE) rtw_resume_process_wow(padapter); else rtw_resume_process_normal(padapter); #else rtw_resume_process_normal(padapter); #endif } else if (check_fwstate(pmlmepriv,WIFI_AP_STATE) == _TRUE #ifdef CONFIG_CONCURRENT_MODE && check_buddy_fwstate(padapter, WIFI_AP_STATE) == _FALSE #endif ) { #ifdef CONFIG_AP_WOWLAN rtw_resume_process_ap_wow(padapter); #else rtw_resume_process_normal(padapter); #endif //CONFIG_AP_WOWLAN #ifdef CONFIG_CONCURRENT_MODE } else if (check_fwstate(pmlmepriv,WIFI_STATION_STATE) == _TRUE && check_buddy_fwstate(padapter, WIFI_AP_STATE) == _TRUE) { #ifdef CONFIG_AP_WOWLAN rtw_resume_process_ap_wow(padapter); #else rtw_resume_process_normal(padapter); #endif //CONFIG_AP_WOWLAN #endif } else { rtw_resume_process_normal(padapter); } #ifdef CONFIG_BT_COEXIST rtw_btcoex_SuspendNotify(padapter, 0); #endif // CONFIG_BT_COEXIST if (pwrpriv) { pwrpriv->bInSuspend = _FALSE; #ifdef CONFIG_PNO_SUPPORT pwrpriv->pno_in_resume = _FALSE; #endif } DBG_871X_LEVEL(_drv_always_, "%s:%d in %d ms\n", __FUNCTION__ ,ret, rtw_get_passing_time_ms(start_time)); _func_exit_; return ret; } #ifdef CONFIG_GPIO_API u8 rtw_get_gpio(struct net_device *netdev, u8 gpio_num) { _adapter *adapter = (_adapter *)rtw_netdev_priv(netdev); return rtw_hal_get_gpio(adapter, gpio_num); } EXPORT_SYMBOL(rtw_get_gpio); int rtw_set_gpio_output_value(struct net_device *netdev, u8 gpio_num, BOOLEAN isHigh) { u8 direction = 0; u8 res = -1; _adapter *adapter = (_adapter *)rtw_netdev_priv(netdev); return rtw_hal_set_gpio_output_value(adapter, gpio_num,isHigh); } EXPORT_SYMBOL(rtw_set_gpio_output_value); int rtw_config_gpio(struct net_device *netdev, u8 gpio_num, BOOLEAN isOutput) { _adapter *adapter = (_adapter *)rtw_netdev_priv(netdev); return rtw_hal_config_gpio(adapter,gpio_num,isOutput); } EXPORT_SYMBOL(rtw_config_gpio); #endif //#ifdef CONFIG_GPIO_API rtl8812au-4.3.8.12175.20140902+dfsg/os_dep/linux/recv_linux.c000066400000000000000000000447111261122257400224400ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _RECV_OSDEP_C_ #include int rtw_os_alloc_recvframe(_adapter *padapter, union recv_frame *precvframe, u8 *pdata, _pkt *pskb) { int res = _SUCCESS; u8 shift_sz = 0; u32 skb_len, alloc_sz; _pkt *pkt_copy = NULL; struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; if(pdata == NULL) { precvframe->u.hdr.pkt = NULL; res = _FAIL; return res; } // Modified by Albert 20101213 // For 8 bytes IP header alignment. shift_sz = pattrib->qos ? 6:0;// Qos data, wireless lan header length is 26 skb_len = pattrib->pkt_len; // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)) { //alloc_sz = 1664; //1664 is 128 alignment. alloc_sz = (skb_len <= 1650) ? 1664:(skb_len + 14); } else { alloc_sz = skb_len; // 6 is for IP header 8 bytes alignment in QoS packet case. // 8 is for skb->data 4 bytes alignment. alloc_sz += 14; } pkt_copy = rtw_skb_alloc(alloc_sz); if(pkt_copy) { pkt_copy->dev = padapter->pnetdev; precvframe->u.hdr.pkt = pkt_copy; precvframe->u.hdr.rx_head = pkt_copy->data; precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz; skb_reserve(pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data) & 7 ));//force pkt_copy->data at 8-byte alignment address skb_reserve(pkt_copy, shift_sz);//force ip_hdr at 8-byte alignment address according to shift_sz. _rtw_memcpy(pkt_copy->data, pdata, skb_len); precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data; } else { #ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX DBG_871X("%s:can not allocate memory for skb copy\n", __FUNCTION__); precvframe->u.hdr.pkt = NULL; //rtw_free_recvframe(precvframe, pfree_recv_queue); //goto _exit_recvbuf2recvframe; res = _FAIL; #else if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)) { DBG_871X("%s: alloc_skb fail , drop frag frame \n", __FUNCTION__); //rtw_free_recvframe(precvframe, pfree_recv_queue); res = _FAIL; goto exit_rtw_os_recv_resource_alloc; } if(pskb == NULL) { res = _FAIL; goto exit_rtw_os_recv_resource_alloc; } precvframe->u.hdr.pkt = rtw_skb_clone(pskb); if(precvframe->u.hdr.pkt) { precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pdata; precvframe->u.hdr.rx_end = pdata + alloc_sz; } else { DBG_871X("%s: rtw_skb_clone fail\n", __FUNCTION__); //rtw_free_recvframe(precvframe, pfree_recv_queue); //goto _exit_recvbuf2recvframe; res = _FAIL; } #endif } exit_rtw_os_recv_resource_alloc: return res; } void rtw_os_free_recvframe(union recv_frame *precvframe) { if(precvframe->u.hdr.pkt) { rtw_skb_free(precvframe->u.hdr.pkt);//free skb by driver precvframe->u.hdr.pkt = NULL; } } //init os related resource in struct recv_priv int rtw_os_recv_resource_init(struct recv_priv *precvpriv, _adapter *padapter) { int res=_SUCCESS; return res; } //alloc os related resource in union recv_frame int rtw_os_recv_resource_alloc(_adapter *padapter, union recv_frame *precvframe) { int res=_SUCCESS; precvframe->u.hdr.pkt_newalloc = precvframe->u.hdr.pkt = NULL; return res; } //free os related resource in union recv_frame void rtw_os_recv_resource_free(struct recv_priv *precvpriv) { sint i; union recv_frame *precvframe; precvframe = (union recv_frame*) precvpriv->precv_frame_buf; for(i=0; i < NR_RECVFRAME; i++) { if(precvframe->u.hdr.pkt) { rtw_skb_free(precvframe->u.hdr.pkt);//free skb by driver precvframe->u.hdr.pkt = NULL; } precvframe++; } } //alloc os related resource in struct recv_buf int rtw_os_recvbuf_resource_alloc(_adapter *padapter, struct recv_buf *precvbuf) { int res=_SUCCESS; #ifdef CONFIG_USB_HCI struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); struct usb_device *pusbd = pdvobjpriv->pusbdev; precvbuf->irp_pending = _FALSE; precvbuf->purb = usb_alloc_urb(0, GFP_KERNEL); if(precvbuf->purb == NULL){ res = _FAIL; } precvbuf->pskb = NULL; precvbuf->reuse = _FALSE; precvbuf->pallocated_buf = precvbuf->pbuf = NULL; precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pend = NULL; precvbuf->transfer_len = 0; precvbuf->len = 0; #ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX precvbuf->pallocated_buf = rtw_usb_buffer_alloc(pusbd, (size_t)precvbuf->alloc_sz, &precvbuf->dma_transfer_addr); precvbuf->pbuf = precvbuf->pallocated_buf; if(precvbuf->pallocated_buf == NULL) return _FAIL; #endif //CONFIG_USE_USB_BUFFER_ALLOC_RX #endif //CONFIG_USB_HCI return res; } //free os related resource in struct recv_buf int rtw_os_recvbuf_resource_free(_adapter *padapter, struct recv_buf *precvbuf) { int ret = _SUCCESS; #ifdef CONFIG_USB_HCI #ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); struct usb_device *pusbd = pdvobjpriv->pusbdev; rtw_usb_buffer_free(pusbd, (size_t)precvbuf->alloc_sz, precvbuf->pallocated_buf, precvbuf->dma_transfer_addr); precvbuf->pallocated_buf = NULL; precvbuf->dma_transfer_addr = 0; #endif //CONFIG_USE_USB_BUFFER_ALLOC_RX if(precvbuf->purb) { //usb_kill_urb(precvbuf->purb); usb_free_urb(precvbuf->purb); } #endif //CONFIG_USB_HCI if(precvbuf->pskb) { #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER if(rtw_free_skb_premem(precvbuf->pskb)!=0) #endif rtw_skb_free(precvbuf->pskb); } return ret; } _pkt *rtw_os_alloc_msdu_pkt(union recv_frame *prframe, u16 nSubframe_Length, u8 *pdata) { u16 eth_type; u8 *data_ptr; _pkt *sub_skb; struct rx_pkt_attrib *pattrib; pattrib = &prframe->u.hdr.attrib; #ifdef CONFIG_SKB_COPY sub_skb = rtw_skb_alloc(nSubframe_Length + 12); if(sub_skb) { skb_reserve(sub_skb, 12); data_ptr = (u8 *)skb_put(sub_skb, nSubframe_Length); _rtw_memcpy(data_ptr, (pdata + ETH_HLEN), nSubframe_Length); } else #endif // CONFIG_SKB_COPY { sub_skb = rtw_skb_clone(prframe->u.hdr.pkt); if(sub_skb) { sub_skb->data = pdata + ETH_HLEN; sub_skb->len = nSubframe_Length; skb_set_tail_pointer(sub_skb, nSubframe_Length); } else { DBG_871X("%s(): rtw_skb_clone() Fail!!!\n",__FUNCTION__); return NULL; } } eth_type = RTW_GET_BE16(&sub_skb->data[6]); if (sub_skb->len >= 8 && ((_rtw_memcmp(sub_skb->data, rtw_rfc1042_header, SNAP_SIZE) && eth_type != ETH_P_AARP && eth_type != ETH_P_IPX) || _rtw_memcmp(sub_skb->data, rtw_bridge_tunnel_header, SNAP_SIZE) )) { /* remove RFC1042 or Bridge-Tunnel encapsulation and replace EtherType */ skb_pull(sub_skb, SNAP_SIZE); _rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pattrib->src, ETH_ALEN); _rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pattrib->dst, ETH_ALEN); } else { u16 len; /* Leave Ethernet header part of hdr and full payload */ len = htons(sub_skb->len); _rtw_memcpy(skb_push(sub_skb, 2), &len, 2); _rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pattrib->src, ETH_ALEN); _rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pattrib->dst, ETH_ALEN); } return sub_skb; } void rtw_os_recv_indicate_pkt(_adapter *padapter, _pkt *pkt, struct rx_pkt_attrib *pattrib) { struct mlme_priv*pmlmepriv = &padapter->mlmepriv; struct recv_priv *precvpriv = &(padapter->recvpriv); #ifdef CONFIG_BR_EXT void *br_port = NULL; #endif int ret; /* Indicat the packets to upper layer */ if (pkt) { if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { _pkt *pskb2=NULL; struct sta_info *psta = NULL; struct sta_priv *pstapriv = &padapter->stapriv; int bmcast = IS_MCAST(pattrib->dst); //DBG_871X("bmcast=%d\n", bmcast); if(_rtw_memcmp(pattrib->dst, myid(&padapter->eeprompriv), ETH_ALEN)==_FALSE) { //DBG_871X("not ap psta=%p, addr=%pM\n", psta, pattrib->dst); if(bmcast) { psta = rtw_get_bcmc_stainfo(padapter); pskb2 = rtw_skb_clone(pkt); } else { psta = rtw_get_stainfo(pstapriv, pattrib->dst); } if(psta) { struct net_device *pnetdev= (struct net_device*)padapter->pnetdev; //DBG_871X("directly forwarding to the rtw_xmit_entry\n"); //skb->ip_summed = CHECKSUM_NONE; pkt->dev = pnetdev; #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) skb_set_queue_mapping(pkt, rtw_recv_select_queue(pkt)); #endif //LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35) _rtw_xmit_entry(pkt, pnetdev); if(bmcast && (pskb2 != NULL) ) { pkt = pskb2; DBG_COUNTER(padapter->rx_logs.os_indicate_ap_mcast); } else { DBG_COUNTER(padapter->rx_logs.os_indicate_ap_forward); return; } } } else// to APself { //DBG_871X("to APSelf\n"); DBG_COUNTER(padapter->rx_logs.os_indicate_ap_self); } } #ifdef CONFIG_BR_EXT // Insert NAT2.5 RX here! #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) br_port = padapter->pnetdev->br_port; #else // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) rcu_read_lock(); br_port = rcu_dereference(padapter->pnetdev->rx_handler_data); rcu_read_unlock(); #endif // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) if( br_port && (check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) ) { int nat25_handle_frame(_adapter *priv, struct sk_buff *skb); if (nat25_handle_frame(padapter, pkt) == -1) { //priv->ext_stats.rx_data_drops++; //DEBUG_ERR("RX DROP: nat25_handle_frame fail!\n"); //return FAIL; #if 1 // bypass this frame to upper layer!! #else rtw_skb_free(sub_skb); continue; #endif } } #endif // CONFIG_BR_EXT if( precvpriv->sink_udpport > 0) rtw_sink_rtp_seq_dbg(padapter,pkt); pkt->protocol = eth_type_trans(pkt, padapter->pnetdev); pkt->dev = padapter->pnetdev; #ifdef CONFIG_TCP_CSUM_OFFLOAD_RX if ( (pattrib->tcpchk_valid == 1) && (pattrib->tcp_chkrpt == 1) ) { pkt->ip_summed = CHECKSUM_UNNECESSARY; } else { pkt->ip_summed = CHECKSUM_NONE; } #else /* !CONFIG_TCP_CSUM_OFFLOAD_RX */ pkt->ip_summed = CHECKSUM_NONE; #endif //CONFIG_TCP_CSUM_OFFLOAD_RX ret = rtw_netif_rx(padapter->pnetdev, pkt); if (ret == NET_RX_SUCCESS) DBG_COUNTER(padapter->rx_logs.os_netif_ok); else DBG_COUNTER(padapter->rx_logs.os_netif_err); } } void rtw_handle_tkip_mic_err(_adapter *padapter,u8 bgroup) { #ifdef CONFIG_IOCTL_CFG80211 enum nl80211_key_type key_type = 0; #endif union iwreq_data wrqu; struct iw_michaelmicfailure ev; struct mlme_priv* pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; u32 cur_time = 0; if( psecuritypriv->last_mic_err_time == 0 ) { psecuritypriv->last_mic_err_time = rtw_get_current_time(); } else { cur_time = rtw_get_current_time(); if( cur_time - psecuritypriv->last_mic_err_time < 60*HZ ) { psecuritypriv->btkip_countermeasure = _TRUE; psecuritypriv->last_mic_err_time = 0; psecuritypriv->btkip_countermeasure_time = cur_time; } else { psecuritypriv->last_mic_err_time = rtw_get_current_time(); } } #ifdef CONFIG_IOCTL_CFG80211 if ( bgroup ) { key_type |= NL80211_KEYTYPE_GROUP; } else { key_type |= NL80211_KEYTYPE_PAIRWISE; } cfg80211_michael_mic_failure(padapter->pnetdev, (u8 *)&pmlmepriv->assoc_bssid[ 0 ], key_type, -1, NULL, GFP_ATOMIC); #endif _rtw_memset( &ev, 0x00, sizeof( ev ) ); if ( bgroup ) { ev.flags |= IW_MICFAILURE_GROUP; } else { ev.flags |= IW_MICFAILURE_PAIRWISE; } ev.src_addr.sa_family = ARPHRD_ETHER; _rtw_memcpy( ev.src_addr.sa_data, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); _rtw_memset( &wrqu, 0x00, sizeof( wrqu ) ); wrqu.data.length = sizeof( ev ); #ifndef CONFIG_IOCTL_CFG80211 wireless_send_event( padapter->pnetdev, IWEVMICHAELMICFAILURE, &wrqu, (char*) &ev ); #endif } void rtw_hostapd_mlme_rx(_adapter *padapter, union recv_frame *precv_frame) { #ifdef CONFIG_HOSTAPD_MLME _pkt *skb; struct hostapd_priv *phostapdpriv = padapter->phostapdpriv; struct net_device *pmgnt_netdev = phostapdpriv->pmgnt_netdev; RT_TRACE(_module_recv_osdep_c_, _drv_info_, ("+rtw_hostapd_mlme_rx\n")); skb = precv_frame->u.hdr.pkt; if (skb == NULL) return; skb->data = precv_frame->u.hdr.rx_data; skb->tail = precv_frame->u.hdr.rx_tail; skb->len = precv_frame->u.hdr.len; //pskb_copy = rtw_skb_copy(skb); // if(skb == NULL) goto _exit; skb->dev = pmgnt_netdev; skb->ip_summed = CHECKSUM_NONE; skb->pkt_type = PACKET_OTHERHOST; //skb->protocol = __constant_htons(0x0019); /*ETH_P_80211_RAW*/ skb->protocol = __constant_htons(0x0003); /*ETH_P_80211_RAW*/ //DBG_871X("(1)data=0x%x, head=0x%x, tail=0x%x, mac_header=0x%x, len=%d\n", skb->data, skb->head, skb->tail, skb->mac_header, skb->len); //skb->mac.raw = skb->data; skb_reset_mac_header(skb); //skb_pull(skb, 24); _rtw_memset(skb->cb, 0, sizeof(skb->cb)); rtw_netif_rx(pmgnt_netdev, skb); precv_frame->u.hdr.pkt = NULL; // set pointer to NULL before rtw_free_recvframe() if call rtw_netif_rx() #endif } #ifdef CONFIG_AUTO_AP_MODE static void rtw_os_ksocket_send(_adapter *padapter, union recv_frame *precv_frame) { _pkt *skb = precv_frame->u.hdr.pkt; struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; struct sta_info *psta = precv_frame->u.hdr.psta; DBG_871X("eth rx: got eth_type=0x%x\n", pattrib->eth_type); if (psta && psta->isrc && psta->pid>0) { u16 rx_pid; rx_pid = *(u16*)(skb->data+ETH_HLEN); DBG_871X("eth rx(pid=0x%x): sta("MAC_FMT") pid=0x%x\n", rx_pid, MAC_ARG(psta->hwaddr), psta->pid); if(rx_pid == psta->pid) { int i; u16 len = *(u16*)(skb->data+ETH_HLEN+2); //u16 ctrl_type = *(u16*)(skb->data+ETH_HLEN+4); //DBG_871X("eth, RC: len=0x%x, ctrl_type=0x%x\n", len, ctrl_type); DBG_871X("eth, RC: len=0x%x\n", len); for(i=0;idata+ETH_HLEN+4+i)); //DBG_871X("0x%x\n", *(skb->data+ETH_HLEN+6+i)); DBG_871X("eth, RC-end\n"); #if 0 //send_sz = ksocket_send(padapter->ksock_send, &padapter->kaddr_send, (skb->data+ETH_HLEN+2), len); rtw_recv_ksocket_send_cmd(padapter, (skb->data+ETH_HLEN+2), len); //DBG_871X("ksocket_send size=%d\n", send_sz); #endif } } } #endif //CONFIG_AUTO_AP_MODE int rtw_recv_indicatepkt(_adapter *padapter, union recv_frame *precv_frame) { struct recv_priv *precvpriv; _queue *pfree_recv_queue; _pkt *skb; struct mlme_priv*pmlmepriv = &padapter->mlmepriv; struct rx_pkt_attrib *pattrib; if(NULL == precv_frame) goto _recv_indicatepkt_drop; DBG_COUNTER(padapter->rx_logs.os_indicate); pattrib = &precv_frame->u.hdr.attrib; precvpriv = &(padapter->recvpriv); pfree_recv_queue = &(precvpriv->free_recv_queue); #ifdef CONFIG_DRVEXT_MODULE if (drvext_rx_handler(padapter, precv_frame->u.hdr.rx_data, precv_frame->u.hdr.len) == _SUCCESS) { goto _recv_indicatepkt_drop; } #endif #ifdef CONFIG_WAPI_SUPPORT if (rtw_wapi_check_for_drop(padapter,precv_frame)) { WAPI_TRACE(WAPI_ERR, "%s(): Rx Reorder Drop case!!\n", __FUNCTION__); goto _recv_indicatepkt_drop; } #endif skb = precv_frame->u.hdr.pkt; if(skb == NULL) { RT_TRACE(_module_recv_osdep_c_,_drv_err_,("rtw_recv_indicatepkt():skb==NULL something wrong!!!!\n")); goto _recv_indicatepkt_drop; } RT_TRACE(_module_recv_osdep_c_,_drv_info_,("rtw_recv_indicatepkt():skb != NULL !!!\n")); RT_TRACE(_module_recv_osdep_c_,_drv_info_,("rtw_recv_indicatepkt():precv_frame->u.hdr.rx_head=%p precv_frame->hdr.rx_data=%p\n", precv_frame->u.hdr.rx_head, precv_frame->u.hdr.rx_data)); RT_TRACE(_module_recv_osdep_c_,_drv_info_,("precv_frame->hdr.rx_tail=%p precv_frame->u.hdr.rx_end=%p precv_frame->hdr.len=%d \n", precv_frame->u.hdr.rx_tail, precv_frame->u.hdr.rx_end, precv_frame->u.hdr.len)); skb->data = precv_frame->u.hdr.rx_data; skb_set_tail_pointer(skb, precv_frame->u.hdr.len); skb->len = precv_frame->u.hdr.len; RT_TRACE(_module_recv_osdep_c_,_drv_info_,("\n skb->head=%p skb->data=%p skb->tail=%p skb->end=%p skb->len=%d\n", skb->head, skb->data, skb_tail_pointer(skb), skb_end_pointer(skb), skb->len)); #ifdef CONFIG_AUTO_AP_MODE #if 1 //for testing #if 1 if (0x8899 == pattrib->eth_type) { rtw_os_ksocket_send(padapter, precv_frame); //goto _recv_indicatepkt_drop; } #else if (0x8899 == pattrib->eth_type) { rtw_auto_ap_mode_rx(padapter, precv_frame); goto _recv_indicatepkt_end; } #endif #endif #endif //CONFIG_AUTO_AP_MODE rtw_os_recv_indicate_pkt(padapter, skb, pattrib); _recv_indicatepkt_end: precv_frame->u.hdr.pkt = NULL; // pointers to NULL before rtw_free_recvframe() rtw_free_recvframe(precv_frame, pfree_recv_queue); RT_TRACE(_module_recv_osdep_c_,_drv_info_,("\n rtw_recv_indicatepkt :after rtw_os_recv_indicate_pkt!!!!\n")); return _SUCCESS; _recv_indicatepkt_drop: //enqueue back to free_recv_queue if(precv_frame) rtw_free_recvframe(precv_frame, pfree_recv_queue); DBG_COUNTER(padapter->rx_logs.os_indicate_err); return _FAIL; } void rtw_os_read_port(_adapter *padapter, struct recv_buf *precvbuf) { struct recv_priv *precvpriv = &padapter->recvpriv; #ifdef CONFIG_USB_HCI precvbuf->ref_cnt--; //free skb in recv_buf rtw_skb_free(precvbuf->pskb); precvbuf->pskb = NULL; precvbuf->reuse = _FALSE; if(precvbuf->irp_pending == _FALSE) { rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); } #endif #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) precvbuf->pskb = NULL; #endif } void _rtw_reordering_ctrl_timeout_handler (void *FunctionContext); void _rtw_reordering_ctrl_timeout_handler (void *FunctionContext) { struct recv_reorder_ctrl *preorder_ctrl = (struct recv_reorder_ctrl *)FunctionContext; rtw_reordering_ctrl_timeout_handler(preorder_ctrl); } void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl) { _adapter *padapter = preorder_ctrl->padapter; _init_timer(&(preorder_ctrl->reordering_ctrl_timer), padapter->pnetdev, _rtw_reordering_ctrl_timeout_handler, preorder_ctrl); } rtl8812au-4.3.8.12175.20140902+dfsg/os_dep/linux/rtw_android.c000066400000000000000000000762461261122257400226060ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifdef CONFIG_GPIO_WAKEUP #include #endif #include #if defined(RTW_ENABLE_WIFI_CONTROL_FUNC) #include #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) #include #else #include #endif #endif /* defined(RTW_ENABLE_WIFI_CONTROL_FUNC) */ #ifdef CONFIG_GPIO_WAKEUP #include #include #endif extern void macstr2num(u8 *dst, u8 *src); const char *android_wifi_cmd_str[ANDROID_WIFI_CMD_MAX] = { "START", "STOP", "SCAN-ACTIVE", "SCAN-PASSIVE", "RSSI", "LINKSPEED", "RXFILTER-START", "RXFILTER-STOP", "RXFILTER-ADD", "RXFILTER-REMOVE", "BTCOEXSCAN-START", "BTCOEXSCAN-STOP", "BTCOEXMODE", "SETSUSPENDOPT", "P2P_DEV_ADDR", "SETFWPATH", "SETBAND", "GETBAND", "COUNTRY", "P2P_SET_NOA", "P2P_GET_NOA", "P2P_SET_PS", "SET_AP_WPS_P2P_IE", "MIRACAST", #ifdef CONFIG_PNO_SUPPORT "PNOSSIDCLR", "PNOSETUP", "PNOFORCE", "PNODEBUG", #endif "MACADDR", "BLOCK", "WFD-ENABLE", "WFD-DISABLE", "WFD-SET-TCPPORT", "WFD-SET-MAXTPUT", "WFD-SET-DEVTYPE", "SET_DTIM", "HOSTAPD_SET_MACADDR_ACL", "HOSTAPD_ACL_ADD_STA", "HOSTAPD_ACL_REMOVE_STA", #ifdef CONFIG_GTK_OL "GTK_REKEY_OFFLOAD", #endif //CONFIG_GTK_OL /* Private command for P2P disable*/ "P2P_DISABLE" }; #ifdef CONFIG_PNO_SUPPORT #define PNO_TLV_PREFIX 'S' #define PNO_TLV_VERSION '1' #define PNO_TLV_SUBVERSION '2' #define PNO_TLV_RESERVED '0' #define PNO_TLV_TYPE_SSID_IE 'S' #define PNO_TLV_TYPE_TIME 'T' #define PNO_TLV_FREQ_REPEAT 'R' #define PNO_TLV_FREQ_EXPO_MAX 'M' typedef struct cmd_tlv { char prefix; char version; char subver; char reserved; } cmd_tlv_t; #ifdef CONFIG_PNO_SET_DEBUG char pno_in_example[] = { 'P', 'N', 'O', 'S', 'E', 'T', 'U', 'P', ' ', 'S', '1', '2', '0', 'S', //1 0x05, 'd', 'l', 'i', 'n', 'k', 'S', //2 0x06, 'B', 'U', 'F', 'B', 'U','F', 'S', //3 0x20, 'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h', 'i', 'j', 'k', 'l', 'm', 'n', 'o', 'p', 'q', 'r', 's', 't', 'u', 'v', 'w', 'x', 'y', 'z', '!', '@', '#', '$', '%', '^', 'S', //4 0x0a, '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', 'T', '0', '5', 'R', '2', 'M', '2', 0x00 }; #endif /* CONFIG_PNO_SET_DEBUG */ #endif /* PNO_SUPPORT */ typedef struct android_wifi_priv_cmd { char *buf; int used_len; int total_len; } android_wifi_priv_cmd; #ifdef CONFIG_COMPAT typedef struct compat_android_wifi_priv_cmd { compat_uptr_t buf; int used_len; int total_len; } compat_android_wifi_priv_cmd; #endif /* CONFIG_COMPAT */ /** * Local (static) functions and variables */ /* Initialize g_wifi_on to 1 so dhd_bus_start will be called for the first * time (only) in dhd_open, subsequential wifi on will be handled by * wl_android_wifi_on */ static int g_wifi_on = _TRUE; unsigned int oob_irq; #ifdef CONFIG_PNO_SUPPORT /* * rtw_android_pno_setup * Description: * This is used for private command. * * Parameter: * net: net_device * command: parameters from private command * total_len: the length of the command. * * */ static int rtw_android_pno_setup(struct net_device *net, char *command, int total_len) { pno_ssid_t pno_ssids_local[MAX_PNO_LIST_COUNT]; int res = -1; int nssid = 0; cmd_tlv_t *cmd_tlv_temp; char *str_ptr; int tlv_size_left; int pno_time = 0; int pno_repeat = 0; int pno_freq_expo_max = 0; int cmdlen = strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_PNOSETUP_SET]) + 1; #ifdef CONFIG_PNO_SET_DEBUG int i; char *p; p = pno_in_example; total_len = sizeof(pno_in_example); str_ptr = p + cmdlen; #else str_ptr = command + cmdlen; #endif if (total_len < (cmdlen + sizeof(cmd_tlv_t))) { DBG_871X("%s argument=%d less min size\n", __func__, total_len); goto exit_proc; } tlv_size_left = total_len - cmdlen; cmd_tlv_temp = (cmd_tlv_t *)str_ptr; memset(pno_ssids_local, 0, sizeof(pno_ssids_local)); if ((cmd_tlv_temp->prefix == PNO_TLV_PREFIX) && (cmd_tlv_temp->version == PNO_TLV_VERSION) && (cmd_tlv_temp->subver == PNO_TLV_SUBVERSION)) { str_ptr += sizeof(cmd_tlv_t); tlv_size_left -= sizeof(cmd_tlv_t); if ((nssid = rtw_parse_ssid_list_tlv(&str_ptr, pno_ssids_local, MAX_PNO_LIST_COUNT, &tlv_size_left)) <= 0) { DBG_871X("SSID is not presented or corrupted ret=%d\n", nssid); goto exit_proc; } else { if ((str_ptr[0] != PNO_TLV_TYPE_TIME) || (tlv_size_left <= 1)) { DBG_871X("%s scan duration corrupted field size %d\n", __func__, tlv_size_left); goto exit_proc; } str_ptr++; pno_time = simple_strtoul(str_ptr, &str_ptr, 16); DBG_871X("%s: pno_time=%d\n", __func__, pno_time); if (str_ptr[0] != 0) { if ((str_ptr[0] != PNO_TLV_FREQ_REPEAT)) { DBG_871X("%s pno repeat : corrupted field\n", __func__); goto exit_proc; } str_ptr++; pno_repeat = simple_strtoul(str_ptr, &str_ptr, 16); DBG_871X("%s :got pno_repeat=%d\n", __FUNCTION__, pno_repeat); if (str_ptr[0] != PNO_TLV_FREQ_EXPO_MAX) { DBG_871X("%s FREQ_EXPO_MAX corrupted field size\n", __func__); goto exit_proc; } str_ptr++; pno_freq_expo_max = simple_strtoul(str_ptr, &str_ptr, 16); DBG_871X("%s: pno_freq_expo_max=%d\n", __func__, pno_freq_expo_max); } } } else { DBG_871X("%s get wrong TLV command\n", __FUNCTION__); goto exit_proc; } res = rtw_dev_pno_set(net, pno_ssids_local, nssid, pno_time, pno_repeat, pno_freq_expo_max); #ifdef CONFIG_PNO_SET_DEBUG rtw_dev_pno_debug(net); #endif exit_proc: return res; } /* * rtw_android_cfg80211_pno_setup * Description: * This is used for cfg80211 sched_scan. * * Parameter: * net: net_device * request: cfg80211_request * */ int rtw_android_cfg80211_pno_setup(struct net_device *net, struct cfg80211_ssid *ssids, int n_ssids, int interval) { int res = -1; int nssid = 0; int pno_time = 0; int pno_repeat = 0; int pno_freq_expo_max = 0; int index = 0; pno_ssid_t pno_ssids_local[MAX_PNO_LIST_COUNT]; if (n_ssids > MAX_PNO_LIST_COUNT || n_ssids < 0) { DBG_871X("%s: nssids(%d) is invalid.\n", __func__, n_ssids); return -EINVAL; } memset(pno_ssids_local, 0, sizeof(pno_ssids_local)); nssid = n_ssids; for (index = 0 ; index < nssid ; index++) { pno_ssids_local[index].SSID_len = ssids[index].ssid_len; memcpy(pno_ssids_local[index].SSID, ssids[index].ssid, ssids[index].ssid_len); } pno_time = (interval / 1000); DBG_871X("%s: nssids: %d, pno_time=%d\n", __func__, nssid, pno_time); res = rtw_dev_pno_set(net, pno_ssids_local, nssid, pno_time, pno_repeat, pno_freq_expo_max); exit_proc: return res; } int rtw_android_pno_enable(struct net_device *net, int pno_enable) { _adapter *padapter = (_adapter *)rtw_netdev_priv(net); struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); if (pwrctl) { pwrctl->wowlan_pno_enable = pno_enable; DBG_871X("%s: wowlan_pno_enable: %d\n", __func__, pwrctl->wowlan_pno_enable); if (pwrctl->wowlan_pno_enable == 0) { if (pwrctl->pnlo_info != NULL) { rtw_mfree((u8 *)pwrctl->pnlo_info, sizeof(pno_nlo_info_t)); pwrctl->pnlo_info = NULL; } if (pwrctl->pno_ssid_list != NULL) { rtw_mfree((u8 *)pwrctl->pno_ssid_list, sizeof(pno_ssid_list_t)); pwrctl->pno_ssid_list = NULL; } if (pwrctl->pscan_info != NULL) { rtw_mfree((u8 *)pwrctl->pscan_info, sizeof(pno_scan_info_t)); pwrctl->pscan_info = NULL; } } return 0; } else { return -1; } } #endif //CONFIG_PNO_SUPPORT int rtw_android_cmdstr_to_num(char *cmdstr) { int cmd_num; for(cmd_num=0 ; cmd_nummlmepriv); struct wlan_network *pcur_network = &pmlmepriv->cur_network; int bytes_written = 0; if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { bytes_written += snprintf(&command[bytes_written], total_len, "%s rssi %d", pcur_network->network.Ssid.Ssid, padapter->recvpriv.rssi); } return bytes_written; } int rtw_android_get_link_speed(struct net_device *net, char *command, int total_len) { _adapter *padapter = (_adapter *)rtw_netdev_priv(net); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct wlan_network *pcur_network = &pmlmepriv->cur_network; int bytes_written = 0; u16 link_speed = 0; link_speed = rtw_get_cur_max_rate(padapter)/10; bytes_written = snprintf(command, total_len, "LinkSpeed %d", link_speed); return bytes_written; } int rtw_android_get_macaddr(struct net_device *net, char *command, int total_len) { _adapter *adapter = (_adapter *)rtw_netdev_priv(net); int bytes_written = 0; bytes_written = snprintf(command, total_len, "Macaddr = "MAC_FMT, MAC_ARG(net->dev_addr)); return bytes_written; } int rtw_android_set_country(struct net_device *net, char *command, int total_len) { _adapter *adapter = (_adapter *)rtw_netdev_priv(net); char *country_code = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_COUNTRY]) + 1; int ret = _FAIL; ret = rtw_set_country(adapter, country_code); return (ret==_SUCCESS)?0:-1; } int rtw_android_get_p2p_dev_addr(struct net_device *net, char *command, int total_len) { int bytes_written = 0; //We use the same address as our HW MAC address _rtw_memcpy(command, net->dev_addr, ETH_ALEN); bytes_written = ETH_ALEN; return bytes_written; } int rtw_android_set_block(struct net_device *net, char *command, int total_len) { _adapter *adapter = (_adapter *)rtw_netdev_priv(net); char *block_value = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_BLOCK]) + 1; #ifdef CONFIG_IOCTL_CFG80211 adapter_wdev_data(adapter)->block = (*block_value=='0')?_FALSE:_TRUE; #endif return 0; } int rtw_android_setband(struct net_device *net, char *command, int total_len) { _adapter *adapter = (_adapter *)rtw_netdev_priv(net); char *arg = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_SETBAND]) + 1; u32 band = GHZ_MAX; int ret = _FAIL; sscanf(arg, "%u", &band); ret = rtw_set_band(adapter, band); return (ret==_SUCCESS)?0:-1; } int rtw_android_getband(struct net_device *net, char *command, int total_len) { _adapter *adapter = (_adapter *)rtw_netdev_priv(net); int bytes_written = 0; bytes_written = snprintf(command, total_len, "%u", adapter->setband); return bytes_written; } enum { MIRACAST_DISABLED = 0, MIRACAST_SOURCE, MIRACAST_SINK, MIRACAST_INVALID, }; static const char *miracast_mode_str[] = { "DISABLED", "SOURCE", "SINK", "INVALID", }; static const char *get_miracast_mode_str(int mode) { if (mode < MIRACAST_DISABLED || mode >= MIRACAST_INVALID) mode = MIRACAST_INVALID; return miracast_mode_str[mode]; } int rtw_android_set_miracast_mode(struct net_device *net, char *command, int total_len) { _adapter *adapter = (_adapter *)rtw_netdev_priv(net); char *arg = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_MIRACAST]) + 1; u8 mode; int num; int ret = _FAIL; num = sscanf(arg, "%hhu", &mode); if (num >= 1) { DBG_871X("Miracast mode: %s(%u)\n", get_miracast_mode_str(mode), mode); ret = _SUCCESS; } return (ret==_SUCCESS)?0:-1; } int get_int_from_command( char* pcmd ) { int i = 0; for( i = 0; i < strlen( pcmd ); i++ ) { if ( pcmd[ i ] == '=' ) { // Skip the '=' and space characters. i += 2; break; } } return ( rtw_atoi( pcmd + i ) ); } #ifdef CONFIG_GTK_OL int rtw_gtk_offload(struct net_device *net, u8 *cmd_ptr) { int i; //u8 *cmd_ptr = priv_cmd.buf; struct sta_info * psta; _adapter *padapter = (_adapter *)rtw_netdev_priv(net); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct sta_priv *pstapriv = &padapter->stapriv; struct security_priv* psecuritypriv=&(padapter->securitypriv); psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); if (psta == NULL) { DBG_8192C("%s, : Obtain Sta_info fail \n", __func__); } else { //string command length of "GTK_REKEY_OFFLOAD" cmd_ptr += 18; _rtw_memcpy(psta->kek, cmd_ptr, RTW_KEK_LEN); cmd_ptr += RTW_KEK_LEN; /* printk("supplicant KEK: "); for(i=0;ikek[i]); printk("\n supplicant KCK: "); */ _rtw_memcpy(psta->kck, cmd_ptr, RTW_KCK_LEN); cmd_ptr += RTW_KCK_LEN; /* for(i=0;ikck[i]); */ _rtw_memcpy(psta->replay_ctr, cmd_ptr, RTW_REPLAY_CTR_LEN); psecuritypriv->binstallKCK_KEK = _TRUE; //printk("\nREPLAY_CTR: "); //for(i=0;ireplay_ctr[i]); } return _SUCCESS; } #endif //CONFIG_GTK_OL int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) { int ret = 0; char *command = NULL; int cmd_num; int bytes_written = 0; #ifdef CONFIG_PNO_SUPPORT uint cmdlen = 0; uint pno_enable = 0; #endif android_wifi_priv_cmd priv_cmd; _adapter* padapter = ( _adapter * ) rtw_netdev_priv(net); #ifdef CONFIG_WFD struct wifi_display_info *pwfd_info; #endif rtw_lock_suspend(); if (!ifr->ifr_data) { ret = -EINVAL; goto exit; } #ifdef CONFIG_COMPAT if (is_compat_task()) { /* User space is 32-bit, use compat ioctl */ compat_android_wifi_priv_cmd compat_priv_cmd; if (copy_from_user(&compat_priv_cmd, ifr->ifr_data, sizeof(compat_android_wifi_priv_cmd))) { ret = -EFAULT; goto exit; } priv_cmd.buf = compat_ptr(compat_priv_cmd.buf); priv_cmd.used_len = compat_priv_cmd.used_len; priv_cmd.total_len = compat_priv_cmd.total_len; } else #endif /* CONFIG_COMPAT */ if (copy_from_user(&priv_cmd, ifr->ifr_data, sizeof(android_wifi_priv_cmd))) { ret = -EFAULT; goto exit; } if ( padapter->registrypriv.mp_mode == 1) { ret = -EFAULT; goto exit; } //DBG_871X("%s priv_cmd.buf=%p priv_cmd.total_len=%d priv_cmd.used_len=%d\n",__func__,priv_cmd.buf,priv_cmd.total_len,priv_cmd.used_len); command = rtw_zmalloc(priv_cmd.total_len); if (!command) { DBG_871X("%s: failed to allocate memory\n", __FUNCTION__); ret = -ENOMEM; goto exit; } if (!access_ok(VERIFY_READ, priv_cmd.buf, priv_cmd.total_len)){ DBG_871X("%s: failed to access memory\n", __FUNCTION__); ret = -EFAULT; goto exit; } if (copy_from_user(command, (void *)priv_cmd.buf, priv_cmd.total_len)) { ret = -EFAULT; goto exit; } DBG_871X("%s: Android private cmd \"%s\" on %s\n" , __FUNCTION__, command, ifr->ifr_name); cmd_num = rtw_android_cmdstr_to_num(command); switch(cmd_num) { case ANDROID_WIFI_CMD_START: //bytes_written = wl_android_wifi_on(net); goto response; case ANDROID_WIFI_CMD_SETFWPATH: goto response; } if (!g_wifi_on) { DBG_871X("%s: Ignore private cmd \"%s\" - iface %s is down\n" ,__FUNCTION__, command, ifr->ifr_name); ret = 0; goto exit; } switch(cmd_num) { case ANDROID_WIFI_CMD_STOP: //bytes_written = wl_android_wifi_off(net); break; case ANDROID_WIFI_CMD_SCAN_ACTIVE: //rtw_set_scan_mode((_adapter *)rtw_netdev_priv(net), SCAN_ACTIVE); #ifdef CONFIG_PLATFORM_MSTAR #ifdef CONFIG_IOCTL_CFG80211 adapter_wdev_data((_adapter *)rtw_netdev_priv(net))->bandroid_scan = _TRUE; #endif //CONFIG_IOCTL_CFG80211 #endif //CONFIG_PLATFORM_MSTAR break; case ANDROID_WIFI_CMD_SCAN_PASSIVE: //rtw_set_scan_mode((_adapter *)rtw_netdev_priv(net), SCAN_PASSIVE); break; case ANDROID_WIFI_CMD_RSSI: bytes_written = rtw_android_get_rssi(net, command, priv_cmd.total_len); break; case ANDROID_WIFI_CMD_LINKSPEED: bytes_written = rtw_android_get_link_speed(net, command, priv_cmd.total_len); break; case ANDROID_WIFI_CMD_MACADDR: bytes_written = rtw_android_get_macaddr(net, command, priv_cmd.total_len); break; case ANDROID_WIFI_CMD_BLOCK: bytes_written = rtw_android_set_block(net, command, priv_cmd.total_len); break; case ANDROID_WIFI_CMD_RXFILTER_START: //bytes_written = net_os_set_packet_filter(net, 1); break; case ANDROID_WIFI_CMD_RXFILTER_STOP: //bytes_written = net_os_set_packet_filter(net, 0); break; case ANDROID_WIFI_CMD_RXFILTER_ADD: //int filter_num = *(command + strlen(CMD_RXFILTER_ADD) + 1) - '0'; //bytes_written = net_os_rxfilter_add_remove(net, TRUE, filter_num); break; case ANDROID_WIFI_CMD_RXFILTER_REMOVE: //int filter_num = *(command + strlen(CMD_RXFILTER_REMOVE) + 1) - '0'; //bytes_written = net_os_rxfilter_add_remove(net, FALSE, filter_num); break; case ANDROID_WIFI_CMD_BTCOEXSCAN_START: /* TBD: BTCOEXSCAN-START */ break; case ANDROID_WIFI_CMD_BTCOEXSCAN_STOP: /* TBD: BTCOEXSCAN-STOP */ break; case ANDROID_WIFI_CMD_BTCOEXMODE: #if 0 uint mode = *(command + strlen(CMD_BTCOEXMODE) + 1) - '0'; if (mode == 1) net_os_set_packet_filter(net, 0); /* DHCP starts */ else net_os_set_packet_filter(net, 1); /* DHCP ends */ #ifdef WL_CFG80211 bytes_written = wl_cfg80211_set_btcoex_dhcp(net, command); #endif #endif break; case ANDROID_WIFI_CMD_SETSUSPENDOPT: //bytes_written = wl_android_set_suspendopt(net, command, priv_cmd.total_len); break; case ANDROID_WIFI_CMD_SETBAND: bytes_written = rtw_android_setband(net, command, priv_cmd.total_len); break; case ANDROID_WIFI_CMD_GETBAND: bytes_written = rtw_android_getband(net, command, priv_cmd.total_len); break; case ANDROID_WIFI_CMD_MIRACAST: bytes_written = rtw_android_set_miracast_mode(net, command, priv_cmd.total_len); break; case ANDROID_WIFI_CMD_COUNTRY: bytes_written = rtw_android_set_country(net, command, priv_cmd.total_len); break; #ifdef CONFIG_PNO_SUPPORT case ANDROID_WIFI_CMD_PNOSSIDCLR_SET: //bytes_written = dhd_dev_pno_reset(net); break; case ANDROID_WIFI_CMD_PNOSETUP_SET: bytes_written = rtw_android_pno_setup(net, command, priv_cmd.total_len); break; case ANDROID_WIFI_CMD_PNOENABLE_SET: cmdlen = strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_PNOENABLE_SET]); pno_enable = *(command + cmdlen + 1) - '0'; bytes_written = rtw_android_pno_enable(net, pno_enable); break; #endif case ANDROID_WIFI_CMD_P2P_DEV_ADDR: bytes_written = rtw_android_get_p2p_dev_addr(net, command, priv_cmd.total_len); break; case ANDROID_WIFI_CMD_P2P_SET_NOA: //int skip = strlen(CMD_P2P_SET_NOA) + 1; //bytes_written = wl_cfg80211_set_p2p_noa(net, command + skip, priv_cmd.total_len - skip); break; case ANDROID_WIFI_CMD_P2P_GET_NOA: //bytes_written = wl_cfg80211_get_p2p_noa(net, command, priv_cmd.total_len); break; case ANDROID_WIFI_CMD_P2P_SET_PS: //int skip = strlen(CMD_P2P_SET_PS) + 1; //bytes_written = wl_cfg80211_set_p2p_ps(net, command + skip, priv_cmd.total_len - skip); break; #ifdef CONFIG_IOCTL_CFG80211 case ANDROID_WIFI_CMD_SET_AP_WPS_P2P_IE: { int skip = strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_SET_AP_WPS_P2P_IE]) + 3; bytes_written = rtw_cfg80211_set_mgnt_wpsp2pie(net, command + skip, priv_cmd.total_len - skip, *(command + skip - 2) - '0'); break; } #endif //CONFIG_IOCTL_CFG80211 #ifdef CONFIG_WFD case ANDROID_WIFI_CMD_WFD_ENABLE: { // Commented by Albert 2012/07/24 // We can enable the WFD function by using the following command: // wpa_cli driver wfd-enable pwfd_info = &padapter->wfd_info; if( padapter->wdinfo.driver_interface == DRIVER_CFG80211 ) pwfd_info->wfd_enable = _TRUE; break; } case ANDROID_WIFI_CMD_WFD_DISABLE: { // Commented by Albert 2012/07/24 // We can disable the WFD function by using the following command: // wpa_cli driver wfd-disable pwfd_info = &padapter->wfd_info; if( padapter->wdinfo.driver_interface == DRIVER_CFG80211 ) pwfd_info->wfd_enable = _FALSE; break; } case ANDROID_WIFI_CMD_WFD_SET_TCPPORT: { // Commented by Albert 2012/07/24 // We can set the tcp port number by using the following command: // wpa_cli driver wfd-set-tcpport = 554 pwfd_info = &padapter->wfd_info; if( padapter->wdinfo.driver_interface == DRIVER_CFG80211 ) { pwfd_info->rtsp_ctrlport = ( u16 ) get_int_from_command( priv_cmd.buf ); } break; } case ANDROID_WIFI_CMD_WFD_SET_MAX_TPUT: { break; } case ANDROID_WIFI_CMD_WFD_SET_DEVTYPE: { // Commented by Albert 2012/08/28 // Specify the WFD device type ( WFD source/primary sink ) pwfd_info = &padapter->wfd_info; if( padapter->wdinfo.driver_interface == DRIVER_CFG80211 ) { pwfd_info->wfd_device_type = ( u8 ) get_int_from_command( priv_cmd.buf ); pwfd_info->wfd_device_type &= WFD_DEVINFO_DUAL; } break; } #endif case ANDROID_WIFI_CMD_CHANGE_DTIM: { #ifdef CONFIG_LPS u8 dtim; u8 *ptr =(u8 *) &priv_cmd.buf; ptr += 9;//string command length of "SET_DTIM"; dtim = rtw_atoi(ptr); DBG_871X("DTIM=%d\n", dtim); rtw_lps_change_dtim_cmd(padapter, dtim); #endif } break; case ANDROID_WIFI_CMD_HOSTAPD_SET_MACADDR_ACL: { padapter->stapriv.acl_list.mode = ( u8 ) get_int_from_command(command); DBG_871X("%s ANDROID_WIFI_CMD_HOSTAPD_SET_MACADDR_ACL mode:%d\n", __FUNCTION__, padapter->stapriv.acl_list.mode); break; } case ANDROID_WIFI_CMD_HOSTAPD_ACL_ADD_STA: { u8 addr[ETH_ALEN] = {0x00}; macstr2num(addr, command+strlen("HOSTAPD_ACL_ADD_STA")+3); // 3 is space bar + "=" + space bar these 3 chars rtw_acl_add_sta(padapter, addr); break; } case ANDROID_WIFI_CMD_HOSTAPD_ACL_REMOVE_STA: { u8 addr[ETH_ALEN] = {0x00}; macstr2num(addr, command+strlen("HOSTAPD_ACL_REMOVE_STA")+3); // 3 is space bar + "=" + space bar these 3 chars rtw_acl_remove_sta(padapter, addr); break; } #ifdef CONFIG_GTK_OL case ANDROID_WIFI_CMD_GTK_REKEY_OFFLOAD: rtw_gtk_offload(net, (u8*)command); break; #endif //CONFIG_GTK_OL case ANDROID_WIFI_CMD_P2P_DISABLE: { struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct wifidirect_info *pwdinfo= &(padapter->wdinfo); u8 channel, ch_offset; u16 bwmode; rtw_p2p_enable(padapter, P2P_ROLE_DISABLE); break; } default: DBG_871X("Unknown PRIVATE command %s - ignored\n", command); snprintf(command, 3, "OK"); bytes_written = strlen("OK"); } response: if (bytes_written >= 0) { if ((bytes_written == 0) && (priv_cmd.total_len > 0)) command[0] = '\0'; if (bytes_written >= priv_cmd.total_len) { DBG_871X("%s: bytes_written = %d\n", __FUNCTION__, bytes_written); bytes_written = priv_cmd.total_len; } else { bytes_written++; } priv_cmd.used_len = bytes_written; if (copy_to_user((void *)priv_cmd.buf, command, bytes_written)) { DBG_871X("%s: failed to copy data to user buffer\n", __FUNCTION__); ret = -EFAULT; } } else { ret = bytes_written; } exit: rtw_unlock_suspend(); if (command) { rtw_mfree(command, priv_cmd.total_len); } return ret; } /** * Functions for Android WiFi card detection */ #if defined(RTW_ENABLE_WIFI_CONTROL_FUNC) static int g_wifidev_registered = 0; static struct semaphore wifi_control_sem; static struct wifi_platform_data *wifi_control_data = NULL; static struct resource *wifi_irqres = NULL; static int wifi_add_dev(void); static void wifi_del_dev(void); int rtw_android_wifictrl_func_add(void) { int ret = 0; sema_init(&wifi_control_sem, 0); ret = wifi_add_dev(); if (ret) { DBG_871X("%s: platform_driver_register failed\n", __FUNCTION__); return ret; } g_wifidev_registered = 1; /* Waiting callback after platform_driver_register is done or exit with error */ if (down_timeout(&wifi_control_sem, msecs_to_jiffies(1000)) != 0) { ret = -EINVAL; DBG_871X("%s: platform_driver_register timeout\n", __FUNCTION__); } return ret; } void rtw_android_wifictrl_func_del(void) { if (g_wifidev_registered) { wifi_del_dev(); g_wifidev_registered = 0; } } void *wl_android_prealloc(int section, unsigned long size) { void *alloc_ptr = NULL; if (wifi_control_data && wifi_control_data->mem_prealloc) { alloc_ptr = wifi_control_data->mem_prealloc(section, size); if (alloc_ptr) { DBG_871X("success alloc section %d\n", section); if (size != 0L) memset(alloc_ptr, 0, size); return alloc_ptr; } } DBG_871X("can't alloc section %d\n", section); return NULL; } int wifi_get_irq_number(unsigned long *irq_flags_ptr) { if (wifi_irqres) { *irq_flags_ptr = wifi_irqres->flags & IRQF_TRIGGER_MASK; return (int)wifi_irqres->start; } #ifdef CUSTOM_OOB_GPIO_NUM return CUSTOM_OOB_GPIO_NUM; #else return -1; #endif } int wifi_set_power(int on, unsigned long msec) { DBG_871X("%s = %d\n", __FUNCTION__, on); if (wifi_control_data && wifi_control_data->set_power) { wifi_control_data->set_power(on); } if (msec) msleep(msec); return 0; } #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) int wifi_get_mac_addr(unsigned char *buf) { DBG_871X("%s\n", __FUNCTION__); if (!buf) return -EINVAL; if (wifi_control_data && wifi_control_data->get_mac_addr) { return wifi_control_data->get_mac_addr(buf); } return -EOPNOTSUPP; } #endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) */ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39)) || defined(COMPAT_KERNEL_RELEASE) void *wifi_get_country_code(char *ccode) { DBG_871X("%s\n", __FUNCTION__); if (!ccode) return NULL; if (wifi_control_data && wifi_control_data->get_country_code) { return wifi_control_data->get_country_code(ccode); } return NULL; } #endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39)) */ static int wifi_set_carddetect(int on) { DBG_871X("%s = %d\n", __FUNCTION__, on); if (wifi_control_data && wifi_control_data->set_carddetect) { wifi_control_data->set_carddetect(on); } return 0; } static int wifi_probe(struct platform_device *pdev) { struct wifi_platform_data *wifi_ctrl = (struct wifi_platform_data *)(pdev->dev.platform_data); int wifi_wake_gpio = 0; DBG_871X("## %s\n", __FUNCTION__); wifi_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "bcmdhd_wlan_irq"); if (wifi_irqres == NULL) wifi_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "bcm4329_wlan_irq"); else wifi_wake_gpio = wifi_irqres->start; #ifdef CONFIG_GPIO_WAKEUP printk("%s: gpio:%d wifi_wake_gpio:%d\n", __func__, wifi_irqres->start, wifi_wake_gpio); if (wifi_wake_gpio > 0) { gpio_request(wifi_wake_gpio, "oob_irq"); gpio_direction_input(wifi_wake_gpio); oob_irq = gpio_to_irq(wifi_wake_gpio); printk("%s oob_irq:%d\n", __func__, oob_irq); } else if(wifi_irqres) { oob_irq = wifi_irqres->start; printk("%s oob_irq:%d\n", __func__, oob_irq); } #endif wifi_control_data = wifi_ctrl; wifi_set_power(1, 0); /* Power On */ wifi_set_carddetect(1); /* CardDetect (0->1) */ up(&wifi_control_sem); return 0; } #ifdef RTW_SUPPORT_PLATFORM_SHUTDOWN extern PADAPTER g_test_adapter; static void shutdown_card(void) { u32 addr; u8 tmp8, cnt=0; if (NULL == g_test_adapter) { DBG_871X("%s: padapter==NULL\n", __FUNCTION__); return; } #ifdef CONFIG_FWLPS_IN_IPS LeaveAllPowerSaveMode(g_test_adapter); #endif // CONFIG_FWLPS_IN_IPS // Leave SDIO HCI Suspend addr = 0x10250086; rtw_write8(g_test_adapter, addr, 0); do { tmp8 = rtw_read8(g_test_adapter, addr); cnt++; DBG_871X(FUNC_ADPT_FMT ": polling SDIO_HSUS_CTRL(0x%x)=0x%x, cnt=%d\n", FUNC_ADPT_ARG(g_test_adapter), addr, tmp8, cnt); if (tmp8 & BIT(1)) break; if (cnt >= 100) { DBG_871X(FUNC_ADPT_FMT ": polling 0x%x[1]==1 FAIL!!\n", FUNC_ADPT_ARG(g_test_adapter), addr); break; } rtw_mdelay_os(10); } while (1); // unlock register I/O rtw_write8(g_test_adapter, 0x1C, 0); // enable power down function // 0x04[4] = 1 // 0x05[7] = 1 addr = 0x04; tmp8 = rtw_read8(g_test_adapter, addr); tmp8 |= BIT(4); rtw_write8(g_test_adapter, addr, tmp8); DBG_871X(FUNC_ADPT_FMT ": read after write 0x%x=0x%x\n", FUNC_ADPT_ARG(g_test_adapter), addr, rtw_read8(g_test_adapter, addr)); addr = 0x05; tmp8 = rtw_read8(g_test_adapter, addr); tmp8 |= BIT(7); rtw_write8(g_test_adapter, addr, tmp8); DBG_871X(FUNC_ADPT_FMT ": read after write 0x%x=0x%x\n", FUNC_ADPT_ARG(g_test_adapter), addr, rtw_read8(g_test_adapter, addr)); // lock register page0 0x0~0xB read/write rtw_write8(g_test_adapter, 0x1C, 0x0E); g_test_adapter->bSurpriseRemoved = _TRUE; DBG_871X(FUNC_ADPT_FMT ": bSurpriseRemoved=%d\n", FUNC_ADPT_ARG(g_test_adapter), g_test_adapter->bSurpriseRemoved); #ifdef CONFIG_CONCURRENT_MODE if (g_test_adapter->pbuddy_adapter) { PADAPTER pbuddy; pbuddy = g_test_adapter->pbuddy_adapter; pbuddy->bSurpriseRemoved = _TRUE; DBG_871X(FUNC_ADPT_FMT ": buddy(" ADPT_FMT ") bSurpriseRemoved=%d\n", FUNC_ADPT_ARG(g_test_adapter), ADPT_ARG(pbuddy), pbuddy->bSurpriseRemoved); } #endif // CONFIG_CONCURRENT_MODE } #endif // RTW_SUPPORT_PLATFORM_SHUTDOWN static int wifi_remove(struct platform_device *pdev) { struct wifi_platform_data *wifi_ctrl = (struct wifi_platform_data *)(pdev->dev.platform_data); DBG_871X("## %s\n", __FUNCTION__); wifi_control_data = wifi_ctrl; wifi_set_power(0, 0); /* Power Off */ wifi_set_carddetect(0); /* CardDetect (1->0) */ up(&wifi_control_sem); return 0; } #ifdef RTW_SUPPORT_PLATFORM_SHUTDOWN static void wifi_shutdown(struct platform_device *pdev) { struct wifi_platform_data *wifi_ctrl = (struct wifi_platform_data *)(pdev->dev.platform_data); DBG_871X("## %s\n", __FUNCTION__); wifi_control_data = wifi_ctrl; shutdown_card(); wifi_set_power(0, 0); /* Power Off */ wifi_set_carddetect(0); /* CardDetect (1->0) */ } #endif // RTW_SUPPORT_PLATFORM_SHUTDOWN static int wifi_suspend(struct platform_device *pdev, pm_message_t state) { DBG_871X("##> %s\n", __FUNCTION__); #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 39)) && defined(OOB_INTR_ONLY) bcmsdh_oob_intr_set(0); #endif return 0; } static int wifi_resume(struct platform_device *pdev) { DBG_871X("##> %s\n", __FUNCTION__); #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 39)) && defined(OOB_INTR_ONLY) if (dhd_os_check_if_up(bcmsdh_get_drvdata())) bcmsdh_oob_intr_set(1); #endif return 0; } /* temporarily use these two */ static struct platform_driver wifi_device = { .probe = wifi_probe, .remove = wifi_remove, .suspend = wifi_suspend, .resume = wifi_resume, #ifdef RTW_SUPPORT_PLATFORM_SHUTDOWN .shutdown = wifi_shutdown, #endif // RTW_SUPPORT_PLATFORM_SHUTDOWN .driver = { .name = "bcmdhd_wlan", } }; static struct platform_driver wifi_device_legacy = { .probe = wifi_probe, .remove = wifi_remove, .suspend = wifi_suspend, .resume = wifi_resume, .driver = { .name = "bcm4329_wlan", } }; static int wifi_add_dev(void) { DBG_871X("## Calling platform_driver_register\n"); platform_driver_register(&wifi_device); platform_driver_register(&wifi_device_legacy); return 0; } static void wifi_del_dev(void) { DBG_871X("## Unregister platform_driver_register\n"); platform_driver_unregister(&wifi_device); platform_driver_unregister(&wifi_device_legacy); } #endif /* defined(RTW_ENABLE_WIFI_CONTROL_FUNC) */ rtl8812au-4.3.8.12175.20140902+dfsg/os_dep/linux/rtw_cfgvendor.c000066400000000000000000001137151261122257400231340ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2014 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include /* #include #include #include #include #include #include #include #include #include #include #include #include */ #include #ifdef CONFIG_IOCTL_CFG80211 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) #ifdef DBG_MEM_ALLOC extern bool match_mstat_sniff_rules(const enum mstat_f flags, const size_t size); struct sk_buff * dbg_rtw_cfg80211_vendor_event_alloc(struct wiphy *wiphy, int len, int event_id, gfp_t gfp , const enum mstat_f flags, const char *func, const int line) { struct sk_buff *skb; unsigned int truesize = 0; skb = cfg80211_vendor_event_alloc(wiphy, len, event_id, gfp); if(skb) truesize = skb->truesize; if(!skb || truesize < len || match_mstat_sniff_rules(flags, truesize)) DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d), skb:%p, truesize=%u\n", func, line, __FUNCTION__, len, skb, truesize); rtw_mstat_update( flags , skb ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL , truesize ); return skb; } void dbg_rtw_cfg80211_vendor_event(struct sk_buff *skb, gfp_t gfp , const enum mstat_f flags, const char *func, const int line) { unsigned int truesize = skb->truesize; if(match_mstat_sniff_rules(flags, truesize)) DBG_871X("DBG_MEM_ALLOC %s:%d %s, truesize=%u\n", func, line, __FUNCTION__, truesize); cfg80211_vendor_event(skb, gfp); rtw_mstat_update( flags , MSTAT_FREE , truesize ); } struct sk_buff *dbg_rtw_cfg80211_vendor_cmd_alloc_reply_skb(struct wiphy *wiphy, int len , const enum mstat_f flags, const char *func, const int line) { struct sk_buff *skb; unsigned int truesize = 0; skb = cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len); if(skb) truesize = skb->truesize; if(!skb || truesize < len || match_mstat_sniff_rules(flags, truesize)) DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d), skb:%p, truesize=%u\n", func, line, __FUNCTION__, len, skb, truesize); rtw_mstat_update( flags , skb ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL , truesize ); return skb; } int dbg_rtw_cfg80211_vendor_cmd_reply(struct sk_buff *skb , const enum mstat_f flags, const char *func, const int line) { unsigned int truesize = skb->truesize; int ret; if(match_mstat_sniff_rules(flags, truesize)) DBG_871X("DBG_MEM_ALLOC %s:%d %s, truesize=%u\n", func, line, __FUNCTION__, truesize); ret = cfg80211_vendor_cmd_reply(skb); rtw_mstat_update( flags , MSTAT_FREE , truesize ); return ret; } #define rtw_cfg80211_vendor_event_alloc(wiphy, len, event_id, gfp) \ dbg_rtw_cfg80211_vendor_event_alloc(wiphy, len, event_id, gfp, MSTAT_FUNC_CFG_VENDOR|MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) #define rtw_cfg80211_vendor_event(skb, gfp) \ dbg_rtw_cfg80211_vendor_event(skb, gfp, MSTAT_FUNC_CFG_VENDOR|MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) #define rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len) \ dbg_rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len, MSTAT_FUNC_CFG_VENDOR|MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) #define rtw_cfg80211_vendor_cmd_reply(skb) \ dbg_rtw_cfg80211_vendor_cmd_reply(skb, MSTAT_FUNC_CFG_VENDOR|MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) #else #define rtw_cfg80211_vendor_event_alloc(wiphy, len, event_id, gfp) \ cfg80211_vendor_event_alloc(wiphy, len, event_id, gfp) #define rtw_cfg80211_vendor_event(skb, gfp) \ cfg80211_vendor_event(skb, gfp) #define rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len) \ cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len) #define rtw_cfg80211_vendor_cmd_reply(skb) \ cfg80211_vendor_cmd_reply(skb) #endif /* DBG_MEM_ALLOC */ /* * This API is to be used for asynchronous vendor events. This * shouldn't be used in response to a vendor command from its * do_it handler context (instead rtw_cfgvendor_send_cmd_reply should * be used). */ int rtw_cfgvendor_send_async_event(struct wiphy *wiphy, struct net_device *dev, int event_id, const void *data, int len) { u16 kflags; struct sk_buff *skb; kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL; /* Alloc the SKB for vendor_event */ skb = rtw_cfg80211_vendor_event_alloc(wiphy, len, event_id, kflags); if (!skb) { DBG_871X_LEVEL(_drv_err_, FUNC_NDEV_FMT" skb alloc failed", FUNC_NDEV_ARG(dev)); return -ENOMEM; } /* Push the data to the skb */ nla_put_nohdr(skb, len, data); rtw_cfg80211_vendor_event(skb, kflags); return 0; } static int rtw_cfgvendor_send_cmd_reply(struct wiphy *wiphy, struct net_device *dev, const void *data, int len) { struct sk_buff *skb; /* Alloc the SKB for vendor_event */ skb = rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len); if (unlikely(!skb)) { DBG_871X_LEVEL(_drv_err_, FUNC_NDEV_FMT" skb alloc failed", FUNC_NDEV_ARG(dev)); return -ENOMEM; } /* Push the data to the skb */ nla_put_nohdr(skb, len, data); return rtw_cfg80211_vendor_cmd_reply(skb); } #define WIFI_FEATURE_INFRA 0x0001 /* Basic infrastructure mode */ #define WIFI_FEATURE_INFRA_5G 0x0002 /* Support for 5 GHz Band */ #define WIFI_FEATURE_HOTSPOT 0x0004 /* Support for GAS/ANQP */ #define WIFI_FEATURE_P2P 0x0008 /* Wifi-Direct */ #define WIFI_FEATURE_SOFT_AP 0x0010 /* Soft AP */ #define WIFI_FEATURE_GSCAN 0x0020 /* Google-Scan APIs */ #define WIFI_FEATURE_NAN 0x0040 /* Neighbor Awareness Networking */ #define WIFI_FEATURE_D2D_RTT 0x0080 /* Device-to-device RTT */ #define WIFI_FEATURE_D2AP_RTT 0x0100 /* Device-to-AP RTT */ #define WIFI_FEATURE_BATCH_SCAN 0x0200 /* Batched Scan (legacy) */ #define WIFI_FEATURE_PNO 0x0400 /* Preferred network offload */ #define WIFI_FEATURE_ADDITIONAL_STA 0x0800 /* Support for two STAs */ #define WIFI_FEATURE_TDLS 0x1000 /* Tunnel directed link setup */ #define WIFI_FEATURE_TDLS_OFFCHANNEL 0x2000 /* Support for TDLS off channel */ #define WIFI_FEATURE_EPR 0x4000 /* Enhanced power reporting */ #define WIFI_FEATURE_AP_STA 0x8000 /* Support for AP STA Concurrency */ #define MAX_FEATURE_SET_CONCURRRENT_GROUPS 3 #include int rtw_dev_get_feature_set(struct net_device *dev) { _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter); HAL_VERSION *hal_ver = &HalData->VersionID; int feature_set = 0; feature_set |= WIFI_FEATURE_INFRA; if(IS_92D(*hal_ver) || IS_8812_SERIES(*hal_ver) || IS_8821_SERIES(*hal_ver)) feature_set |= WIFI_FEATURE_INFRA_5G; feature_set |= WIFI_FEATURE_P2P; feature_set |= WIFI_FEATURE_SOFT_AP; feature_set |= WIFI_FEATURE_ADDITIONAL_STA; return feature_set; } int *rtw_dev_get_feature_set_matrix(struct net_device *dev, int *num) { int feature_set_full, mem_needed; int *ret; *num = 0; mem_needed = sizeof(int) * MAX_FEATURE_SET_CONCURRRENT_GROUPS; ret = (int *)rtw_malloc(mem_needed); if (!ret) { DBG_871X_LEVEL(_drv_err_, FUNC_NDEV_FMT" failed to allocate %d bytes\n" , FUNC_NDEV_ARG(dev), mem_needed); return ret; } feature_set_full = rtw_dev_get_feature_set(dev); ret[0] = (feature_set_full & WIFI_FEATURE_INFRA) | (feature_set_full & WIFI_FEATURE_INFRA_5G) | (feature_set_full & WIFI_FEATURE_NAN) | (feature_set_full & WIFI_FEATURE_D2D_RTT) | (feature_set_full & WIFI_FEATURE_D2AP_RTT) | (feature_set_full & WIFI_FEATURE_PNO) | (feature_set_full & WIFI_FEATURE_BATCH_SCAN) | (feature_set_full & WIFI_FEATURE_GSCAN) | (feature_set_full & WIFI_FEATURE_HOTSPOT) | (feature_set_full & WIFI_FEATURE_ADDITIONAL_STA) | (feature_set_full & WIFI_FEATURE_EPR); ret[1] = (feature_set_full & WIFI_FEATURE_INFRA) | (feature_set_full & WIFI_FEATURE_INFRA_5G) | /* Not yet verified NAN with P2P */ /* (feature_set_full & WIFI_FEATURE_NAN) | */ (feature_set_full & WIFI_FEATURE_P2P) | (feature_set_full & WIFI_FEATURE_D2AP_RTT) | (feature_set_full & WIFI_FEATURE_D2D_RTT) | (feature_set_full & WIFI_FEATURE_EPR); ret[2] = (feature_set_full & WIFI_FEATURE_INFRA) | (feature_set_full & WIFI_FEATURE_INFRA_5G) | (feature_set_full & WIFI_FEATURE_NAN) | (feature_set_full & WIFI_FEATURE_D2D_RTT) | (feature_set_full & WIFI_FEATURE_D2AP_RTT) | (feature_set_full & WIFI_FEATURE_TDLS) | (feature_set_full & WIFI_FEATURE_TDLS_OFFCHANNEL) | (feature_set_full & WIFI_FEATURE_EPR); *num = MAX_FEATURE_SET_CONCURRRENT_GROUPS; return ret; } static int rtw_cfgvendor_get_feature_set(struct wiphy *wiphy, struct wireless_dev *wdev, const void *data, int len) { int err = 0; int reply; reply = rtw_dev_get_feature_set(wdev_to_ndev(wdev)); err = rtw_cfgvendor_send_cmd_reply(wiphy, wdev_to_ndev(wdev), &reply, sizeof(int)); if (unlikely(err)) DBG_871X_LEVEL(_drv_err_, FUNC_NDEV_FMT" Vendor Command reply failed ret:%d \n" , FUNC_NDEV_ARG(wdev_to_ndev(wdev)), err); return err; } static int rtw_cfgvendor_get_feature_set_matrix(struct wiphy *wiphy, struct wireless_dev *wdev, const void *data, int len) { int err = 0; struct sk_buff *skb; int *reply; int num, mem_needed, i; reply = rtw_dev_get_feature_set_matrix(wdev_to_ndev(wdev), &num); if (!reply) { DBG_871X_LEVEL(_drv_err_, FUNC_NDEV_FMT" Could not get feature list matrix\n" , FUNC_NDEV_ARG(wdev_to_ndev(wdev))); err = -EINVAL; return err; } mem_needed = VENDOR_REPLY_OVERHEAD + (ATTRIBUTE_U32_LEN * num) + ATTRIBUTE_U32_LEN; /* Alloc the SKB for vendor_event */ skb = rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, mem_needed); if (unlikely(!skb)) { DBG_871X_LEVEL(_drv_err_, FUNC_NDEV_FMT" skb alloc failed", FUNC_NDEV_ARG(wdev_to_ndev(wdev))); err = -ENOMEM; goto exit; } nla_put_u32(skb, ANDR_WIFI_ATTRIBUTE_NUM_FEATURE_SET, num); for (i = 0; i < num; i++) { nla_put_u32(skb, ANDR_WIFI_ATTRIBUTE_FEATURE_SET, reply[i]); } err = rtw_cfg80211_vendor_cmd_reply(skb); if (unlikely(err)) DBG_871X_LEVEL(_drv_err_, FUNC_NDEV_FMT" Vendor Command reply failed ret:%d \n" , FUNC_NDEV_ARG(wdev_to_ndev(wdev)), err); exit: rtw_mfree((u8*)reply, sizeof(int)*num); return err; } #if defined(GSCAN_SUPPORT) && 0 int wl_cfgvendor_send_hotlist_event(struct wiphy *wiphy, struct net_device *dev, void *data, int len, wl_vendor_event_t event) { u16 kflags; const void *ptr; struct sk_buff *skb; int malloc_len, total, iter_cnt_to_send, cnt; gscan_results_cache_t *cache = (gscan_results_cache_t *)data; total = len/sizeof(wifi_gscan_result_t); while (total > 0) { malloc_len = (total * sizeof(wifi_gscan_result_t)) + VENDOR_DATA_OVERHEAD; if (malloc_len > NLMSG_DEFAULT_SIZE) { malloc_len = NLMSG_DEFAULT_SIZE; } iter_cnt_to_send = (malloc_len - VENDOR_DATA_OVERHEAD)/sizeof(wifi_gscan_result_t); total = total - iter_cnt_to_send; kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL; /* Alloc the SKB for vendor_event */ skb = rtw_cfg80211_vendor_event_alloc(wiphy, malloc_len, event, kflags); if (!skb) { WL_ERR(("skb alloc failed")); return -ENOMEM; } while (cache && iter_cnt_to_send) { ptr = (const void *) &cache->results[cache->tot_consumed]; if (iter_cnt_to_send < (cache->tot_count - cache->tot_consumed)) cnt = iter_cnt_to_send; else cnt = (cache->tot_count - cache->tot_consumed); iter_cnt_to_send -= cnt; cache->tot_consumed += cnt; /* Push the data to the skb */ nla_append(skb, cnt * sizeof(wifi_gscan_result_t), ptr); if (cache->tot_consumed == cache->tot_count) cache = cache->next; } rtw_cfg80211_vendor_event(skb, kflags); } return 0; } static int wl_cfgvendor_gscan_get_capabilities(struct wiphy *wiphy, struct wireless_dev *wdev, const void *data, int len) { int err = 0; struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); dhd_pno_gscan_capabilities_t *reply = NULL; uint32 reply_len = 0; reply = dhd_dev_pno_get_gscan(bcmcfg_to_prmry_ndev(cfg), DHD_PNO_GET_CAPABILITIES, NULL, &reply_len); if (!reply) { WL_ERR(("Could not get capabilities\n")); err = -EINVAL; return err; } err = rtw_cfgvendor_send_cmd_reply(wiphy, bcmcfg_to_prmry_ndev(cfg), reply, reply_len); if (unlikely(err)) WL_ERR(("Vendor Command reply failed ret:%d \n", err)); kfree(reply); return err; } static int wl_cfgvendor_gscan_get_channel_list(struct wiphy *wiphy, struct wireless_dev *wdev, const void *data, int len) { int err = 0, type, band; struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); uint16 *reply = NULL; uint32 reply_len = 0, num_channels, mem_needed; struct sk_buff *skb; type = nla_type(data); if (type == GSCAN_ATTRIBUTE_BAND) { band = nla_get_u32(data); } else { return -1; } reply = dhd_dev_pno_get_gscan(bcmcfg_to_prmry_ndev(cfg), DHD_PNO_GET_CHANNEL_LIST, &band, &reply_len); if (!reply) { WL_ERR(("Could not get channel list\n")); err = -EINVAL; return err; } num_channels = reply_len/ sizeof(uint32); mem_needed = reply_len + VENDOR_REPLY_OVERHEAD + (ATTRIBUTE_U32_LEN * 2); /* Alloc the SKB for vendor_event */ skb = rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, mem_needed); if (unlikely(!skb)) { WL_ERR(("skb alloc failed")); err = -ENOMEM; goto exit; } nla_put_u32(skb, GSCAN_ATTRIBUTE_NUM_CHANNELS, num_channels); nla_put(skb, GSCAN_ATTRIBUTE_CHANNEL_LIST, reply_len, reply); err = rtw_cfg80211_vendor_cmd_reply(skb); if (unlikely(err)) WL_ERR(("Vendor Command reply failed ret:%d \n", err)); exit: kfree(reply); return err; } static int wl_cfgvendor_gscan_get_batch_results(struct wiphy *wiphy, struct wireless_dev *wdev, const void *data, int len) { int err = 0; struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); gscan_results_cache_t *results, *iter; uint32 reply_len, complete = 0, num_results_iter; int32 mem_needed; wifi_gscan_result_t *ptr; uint16 num_scan_ids, num_results; struct sk_buff *skb; struct nlattr *scan_hdr; dhd_dev_wait_batch_results_complete(bcmcfg_to_prmry_ndev(cfg)); dhd_dev_pno_lock_access_batch_results(bcmcfg_to_prmry_ndev(cfg)); results = dhd_dev_pno_get_gscan(bcmcfg_to_prmry_ndev(cfg), DHD_PNO_GET_BATCH_RESULTS, NULL, &reply_len); if (!results) { WL_ERR(("No results to send %d\n", err)); err = rtw_cfgvendor_send_cmd_reply(wiphy, bcmcfg_to_prmry_ndev(cfg), results, 0); if (unlikely(err)) WL_ERR(("Vendor Command reply failed ret:%d \n", err)); dhd_dev_pno_unlock_access_batch_results(bcmcfg_to_prmry_ndev(cfg)); return err; } num_scan_ids = reply_len & 0xFFFF; num_results = (reply_len & 0xFFFF0000) >> 16; mem_needed = (num_results * sizeof(wifi_gscan_result_t)) + (num_scan_ids * GSCAN_BATCH_RESULT_HDR_LEN) + VENDOR_REPLY_OVERHEAD + SCAN_RESULTS_COMPLETE_FLAG_LEN; if (mem_needed > (int32)NLMSG_DEFAULT_SIZE) { mem_needed = (int32)NLMSG_DEFAULT_SIZE; complete = 0; } else { complete = 1; } WL_TRACE(("complete %d mem_needed %d max_mem %d\n", complete, mem_needed, (int)NLMSG_DEFAULT_SIZE)); /* Alloc the SKB for vendor_event */ skb = rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, mem_needed); if (unlikely(!skb)) { WL_ERR(("skb alloc failed")); dhd_dev_pno_unlock_access_batch_results(bcmcfg_to_prmry_ndev(cfg)); return -ENOMEM; } iter = results; nla_put_u32(skb, GSCAN_ATTRIBUTE_SCAN_RESULTS_COMPLETE, complete); mem_needed = mem_needed - (SCAN_RESULTS_COMPLETE_FLAG_LEN + VENDOR_REPLY_OVERHEAD); while (iter && ((mem_needed - GSCAN_BATCH_RESULT_HDR_LEN) > 0)) { scan_hdr = nla_nest_start(skb, GSCAN_ATTRIBUTE_SCAN_RESULTS); nla_put_u32(skb, GSCAN_ATTRIBUTE_SCAN_ID, iter->scan_id); nla_put_u8(skb, GSCAN_ATTRIBUTE_SCAN_FLAGS, iter->flag); num_results_iter = (mem_needed - GSCAN_BATCH_RESULT_HDR_LEN)/sizeof(wifi_gscan_result_t); if ((iter->tot_count - iter->tot_consumed) < num_results_iter) num_results_iter = iter->tot_count - iter->tot_consumed; nla_put_u32(skb, GSCAN_ATTRIBUTE_NUM_OF_RESULTS, num_results_iter); if (num_results_iter) { ptr = &iter->results[iter->tot_consumed]; iter->tot_consumed += num_results_iter; nla_put(skb, GSCAN_ATTRIBUTE_SCAN_RESULTS, num_results_iter * sizeof(wifi_gscan_result_t), ptr); } nla_nest_end(skb, scan_hdr); mem_needed -= GSCAN_BATCH_RESULT_HDR_LEN + (num_results_iter * sizeof(wifi_gscan_result_t)); iter = iter->next; } dhd_dev_gscan_batch_cache_cleanup(bcmcfg_to_prmry_ndev(cfg)); dhd_dev_pno_unlock_access_batch_results(bcmcfg_to_prmry_ndev(cfg)); return rtw_cfg80211_vendor_cmd_reply(skb); } static int wl_cfgvendor_initiate_gscan(struct wiphy *wiphy, struct wireless_dev *wdev, const void *data, int len) { int err = 0; struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); int type, tmp = len; int run = 0xFF; int flush = 0; const struct nlattr *iter; nla_for_each_attr(iter, data, len, tmp) { type = nla_type(iter); if (type == GSCAN_ATTRIBUTE_ENABLE_FEATURE) run = nla_get_u32(iter); else if (type == GSCAN_ATTRIBUTE_FLUSH_FEATURE) flush = nla_get_u32(iter); } if (run != 0xFF) { err = dhd_dev_pno_run_gscan(bcmcfg_to_prmry_ndev(cfg), run, flush); if (unlikely(err)) WL_ERR(("Could not run gscan:%d \n", err)); return err; } else { return -1; } } static int wl_cfgvendor_enable_full_scan_result(struct wiphy *wiphy, struct wireless_dev *wdev, const void *data, int len) { int err = 0; struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); int type; bool real_time = FALSE; type = nla_type(data); if (type == GSCAN_ATTRIBUTE_ENABLE_FULL_SCAN_RESULTS) { real_time = nla_get_u32(data); err = dhd_dev_pno_enable_full_scan_result(bcmcfg_to_prmry_ndev(cfg), real_time); if (unlikely(err)) WL_ERR(("Could not run gscan:%d \n", err)); } else { err = -1; } return err; } static int wl_cfgvendor_set_scan_cfg(struct wiphy *wiphy, struct wireless_dev *wdev, const void *data, int len) { int err = 0; struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); gscan_scan_params_t *scan_param; int j = 0; int type, tmp, tmp1, tmp2, k = 0; const struct nlattr *iter, *iter1, *iter2; struct dhd_pno_gscan_channel_bucket *ch_bucket; scan_param = kzalloc(sizeof(gscan_scan_params_t), GFP_KERNEL); if (!scan_param) { WL_ERR(("Could not set GSCAN scan cfg, mem alloc failure\n")); err = -EINVAL; return err; } scan_param->scan_fr = PNO_SCAN_MIN_FW_SEC; nla_for_each_attr(iter, data, len, tmp) { type = nla_type(iter); if (j >= GSCAN_MAX_CH_BUCKETS) break; switch (type) { case GSCAN_ATTRIBUTE_BASE_PERIOD: scan_param->scan_fr = nla_get_u32(iter)/1000; break; case GSCAN_ATTRIBUTE_NUM_BUCKETS: scan_param->nchannel_buckets = nla_get_u32(iter); break; case GSCAN_ATTRIBUTE_CH_BUCKET_1: case GSCAN_ATTRIBUTE_CH_BUCKET_2: case GSCAN_ATTRIBUTE_CH_BUCKET_3: case GSCAN_ATTRIBUTE_CH_BUCKET_4: case GSCAN_ATTRIBUTE_CH_BUCKET_5: case GSCAN_ATTRIBUTE_CH_BUCKET_6: case GSCAN_ATTRIBUTE_CH_BUCKET_7: nla_for_each_nested(iter1, iter, tmp1) { type = nla_type(iter1); ch_bucket = scan_param->channel_bucket; switch (type) { case GSCAN_ATTRIBUTE_BUCKET_ID: break; case GSCAN_ATTRIBUTE_BUCKET_PERIOD: ch_bucket[j].bucket_freq_multiple = nla_get_u32(iter1)/1000; break; case GSCAN_ATTRIBUTE_BUCKET_NUM_CHANNELS: ch_bucket[j].num_channels = nla_get_u32(iter1); break; case GSCAN_ATTRIBUTE_BUCKET_CHANNELS: nla_for_each_nested(iter2, iter1, tmp2) { if (k >= PFN_SWC_RSSI_WINDOW_MAX) break; ch_bucket[j].chan_list[k] = nla_get_u32(iter2); k++; } k = 0; break; case GSCAN_ATTRIBUTE_BUCKETS_BAND: ch_bucket[j].band = (uint16) nla_get_u32(iter1); break; case GSCAN_ATTRIBUTE_REPORT_EVENTS: ch_bucket[j].report_flag = (uint8) nla_get_u32(iter1); break; } } j++; break; } } if (dhd_dev_pno_set_cfg_gscan(bcmcfg_to_prmry_ndev(cfg), DHD_PNO_SCAN_CFG_ID, scan_param, 0) < 0) { WL_ERR(("Could not set GSCAN scan cfg\n")); err = -EINVAL; } kfree(scan_param); return err; } static int wl_cfgvendor_hotlist_cfg(struct wiphy *wiphy, struct wireless_dev *wdev, const void *data, int len) { int err = 0; struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); gscan_hotlist_scan_params_t *hotlist_params; int tmp, tmp1, tmp2, type, j = 0, dummy; const struct nlattr *outer, *inner, *iter; uint8 flush = 0; struct bssid_t *pbssid; hotlist_params = (gscan_hotlist_scan_params_t *)kzalloc(len, GFP_KERNEL); if (!hotlist_params) { WL_ERR(("Cannot Malloc mem to parse config commands size - %d bytes \n", len)); return -1; } hotlist_params->lost_ap_window = GSCAN_LOST_AP_WINDOW_DEFAULT; nla_for_each_attr(iter, data, len, tmp2) { type = nla_type(iter); switch (type) { case GSCAN_ATTRIBUTE_HOTLIST_BSSIDS: pbssid = hotlist_params->bssid; nla_for_each_nested(outer, iter, tmp) { nla_for_each_nested(inner, outer, tmp1) { type = nla_type(inner); switch (type) { case GSCAN_ATTRIBUTE_BSSID: memcpy(&(pbssid[j].macaddr), nla_data(inner), ETHER_ADDR_LEN); break; case GSCAN_ATTRIBUTE_RSSI_LOW: pbssid[j].rssi_reporting_threshold = (int8) nla_get_u8(inner); break; case GSCAN_ATTRIBUTE_RSSI_HIGH: dummy = (int8) nla_get_u8(inner); break; } } j++; } hotlist_params->nbssid = j; break; case GSCAN_ATTRIBUTE_HOTLIST_FLUSH: flush = nla_get_u8(iter); break; case GSCAN_ATTRIBUTE_LOST_AP_SAMPLE_SIZE: hotlist_params->lost_ap_window = nla_get_u32(iter); break; } } if (dhd_dev_pno_set_cfg_gscan(bcmcfg_to_prmry_ndev(cfg), DHD_PNO_GEOFENCE_SCAN_CFG_ID, hotlist_params, flush) < 0) { WL_ERR(("Could not set GSCAN HOTLIST cfg\n")); err = -EINVAL; goto exit; } exit: kfree(hotlist_params); return err; } static int wl_cfgvendor_set_batch_scan_cfg(struct wiphy *wiphy, struct wireless_dev *wdev, const void *data, int len) { int err = 0, tmp, type; struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); gscan_batch_params_t batch_param; const struct nlattr *iter; batch_param.mscan = batch_param.bestn = 0; batch_param.buffer_threshold = GSCAN_BATCH_NO_THR_SET; nla_for_each_attr(iter, data, len, tmp) { type = nla_type(iter); switch (type) { case GSCAN_ATTRIBUTE_NUM_AP_PER_SCAN: batch_param.bestn = nla_get_u32(iter); break; case GSCAN_ATTRIBUTE_NUM_SCANS_TO_CACHE: batch_param.mscan = nla_get_u32(iter); break; case GSCAN_ATTRIBUTE_REPORT_THRESHOLD: batch_param.buffer_threshold = nla_get_u32(iter); break; } } if (dhd_dev_pno_set_cfg_gscan(bcmcfg_to_prmry_ndev(cfg), DHD_PNO_BATCH_SCAN_CFG_ID, &batch_param, 0) < 0) { WL_ERR(("Could not set batch cfg\n")); err = -EINVAL; return err; } return err; } static int wl_cfgvendor_significant_change_cfg(struct wiphy *wiphy, struct wireless_dev *wdev, const void *data, int len) { int err = 0; struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); gscan_swc_params_t *significant_params; int tmp, tmp1, tmp2, type, j = 0; const struct nlattr *outer, *inner, *iter; uint8 flush = 0; wl_pfn_significant_bssid_t *pbssid; significant_params = (gscan_swc_params_t *) kzalloc(len, GFP_KERNEL); if (!significant_params) { WL_ERR(("Cannot Malloc mem to parse config commands size - %d bytes \n", len)); return -1; } nla_for_each_attr(iter, data, len, tmp2) { type = nla_type(iter); switch (type) { case GSCAN_ATTRIBUTE_SIGNIFICANT_CHANGE_FLUSH: flush = nla_get_u8(iter); break; case GSCAN_ATTRIBUTE_RSSI_SAMPLE_SIZE: significant_params->rssi_window = nla_get_u16(iter); break; case GSCAN_ATTRIBUTE_LOST_AP_SAMPLE_SIZE: significant_params->lost_ap_window = nla_get_u16(iter); break; case GSCAN_ATTRIBUTE_MIN_BREACHING: significant_params->swc_threshold = nla_get_u16(iter); break; case GSCAN_ATTRIBUTE_SIGNIFICANT_CHANGE_BSSIDS: pbssid = significant_params->bssid_elem_list; nla_for_each_nested(outer, iter, tmp) { nla_for_each_nested(inner, outer, tmp1) { switch (nla_type(inner)) { case GSCAN_ATTRIBUTE_BSSID: memcpy(&(pbssid[j].macaddr), nla_data(inner), ETHER_ADDR_LEN); break; case GSCAN_ATTRIBUTE_RSSI_HIGH: pbssid[j].rssi_high_threshold = (int8) nla_get_u8(inner); break; case GSCAN_ATTRIBUTE_RSSI_LOW: pbssid[j].rssi_low_threshold = (int8) nla_get_u8(inner); break; } } j++; } break; } } significant_params->nbssid = j; if (dhd_dev_pno_set_cfg_gscan(bcmcfg_to_prmry_ndev(cfg), DHD_PNO_SIGNIFICANT_SCAN_CFG_ID, significant_params, flush) < 0) { WL_ERR(("Could not set GSCAN significant cfg\n")); err = -EINVAL; goto exit; } exit: kfree(significant_params); return err; } #endif /* GSCAN_SUPPORT */ #if defined(RTT_SUPPORT) && 0 void wl_cfgvendor_rtt_evt(void *ctx, void *rtt_data) { struct wireless_dev *wdev = (struct wireless_dev *)ctx; struct wiphy *wiphy; struct sk_buff *skb; uint32 tot_len = NLMSG_DEFAULT_SIZE, entry_len = 0; gfp_t kflags; rtt_report_t *rtt_report = NULL; rtt_result_t *rtt_result = NULL; struct list_head *rtt_list; wiphy = wdev->wiphy; WL_DBG(("In\n")); /* Push the data to the skb */ if (!rtt_data) { WL_ERR(("rtt_data is NULL\n")); goto exit; } rtt_list = (struct list_head *)rtt_data; kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL; /* Alloc the SKB for vendor_event */ skb = rtw_cfg80211_vendor_event_alloc(wiphy, tot_len, GOOGLE_RTT_COMPLETE_EVENT, kflags); if (!skb) { WL_ERR(("skb alloc failed")); goto exit; } /* fill in the rtt results on each entry */ list_for_each_entry(rtt_result, rtt_list, list) { entry_len = 0; if (rtt_result->TOF_type == TOF_TYPE_ONE_WAY) { entry_len = sizeof(rtt_report_t); rtt_report = kzalloc(entry_len, kflags); if (!rtt_report) { WL_ERR(("rtt_report alloc failed")); goto exit; } rtt_report->addr = rtt_result->peer_mac; rtt_report->num_measurement = 1; /* ONE SHOT */ rtt_report->status = rtt_result->err_code; rtt_report->type = (rtt_result->TOF_type == TOF_TYPE_ONE_WAY) ? RTT_ONE_WAY: RTT_TWO_WAY; rtt_report->peer = rtt_result->target_info->peer; rtt_report->channel = rtt_result->target_info->channel; rtt_report->rssi = rtt_result->avg_rssi; /* tx_rate */ rtt_report->tx_rate = rtt_result->tx_rate; /* RTT */ rtt_report->rtt = rtt_result->meanrtt; rtt_report->rtt_sd = rtt_result->sdrtt; /* convert to centi meter */ if (rtt_result->distance != 0xffffffff) rtt_report->distance = (rtt_result->distance >> 2) * 25; else /* invalid distance */ rtt_report->distance = -1; rtt_report->ts = rtt_result->ts; nla_append(skb, entry_len, rtt_report); kfree(rtt_report); } } rtw_cfg80211_vendor_event(skb, kflags); exit: return; } static int wl_cfgvendor_rtt_set_config(struct wiphy *wiphy, struct wireless_dev *wdev, const void *data, int len) { int err = 0, rem, rem1, rem2, type; rtt_config_params_t rtt_param; rtt_target_info_t* rtt_target = NULL; const struct nlattr *iter, *iter1, *iter2; int8 eabuf[ETHER_ADDR_STR_LEN]; int8 chanbuf[CHANSPEC_STR_LEN]; struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); WL_DBG(("In\n")); err = dhd_dev_rtt_register_noti_callback(wdev->netdev, wdev, wl_cfgvendor_rtt_evt); if (err < 0) { WL_ERR(("failed to register rtt_noti_callback\n")); goto exit; } memset(&rtt_param, 0, sizeof(rtt_param)); nla_for_each_attr(iter, data, len, rem) { type = nla_type(iter); switch (type) { case RTT_ATTRIBUTE_TARGET_CNT: rtt_param.rtt_target_cnt = nla_get_u8(iter); if (rtt_param.rtt_target_cnt > RTT_MAX_TARGET_CNT) { WL_ERR(("exceed max target count : %d\n", rtt_param.rtt_target_cnt)); err = BCME_RANGE; } break; case RTT_ATTRIBUTE_TARGET_INFO: rtt_target = rtt_param.target_info; nla_for_each_nested(iter1, iter, rem1) { nla_for_each_nested(iter2, iter1, rem2) { type = nla_type(iter2); switch (type) { case RTT_ATTRIBUTE_TARGET_MAC: memcpy(&rtt_target->addr, nla_data(iter2), ETHER_ADDR_LEN); break; case RTT_ATTRIBUTE_TARGET_TYPE: rtt_target->type = nla_get_u8(iter2); break; case RTT_ATTRIBUTE_TARGET_PEER: rtt_target->peer= nla_get_u8(iter2); break; case RTT_ATTRIBUTE_TARGET_CHAN: memcpy(&rtt_target->channel, nla_data(iter2), sizeof(rtt_target->channel)); break; case RTT_ATTRIBUTE_TARGET_MODE: rtt_target->continuous = nla_get_u8(iter2); break; case RTT_ATTRIBUTE_TARGET_INTERVAL: rtt_target->interval = nla_get_u32(iter2); break; case RTT_ATTRIBUTE_TARGET_NUM_MEASUREMENT: rtt_target->measure_cnt = nla_get_u32(iter2); break; case RTT_ATTRIBUTE_TARGET_NUM_PKT: rtt_target->ftm_cnt = nla_get_u32(iter2); break; case RTT_ATTRIBUTE_TARGET_NUM_RETRY: rtt_target->retry_cnt = nla_get_u32(iter2); } } /* convert to chanspec value */ rtt_target->chanspec = dhd_rtt_convert_to_chspec(rtt_target->channel); if (rtt_target->chanspec == 0) { WL_ERR(("Channel is not valid \n")); goto exit; } WL_INFORM(("Target addr %s, Channel : %s for RTT \n", bcm_ether_ntoa((const struct ether_addr *)&rtt_target->addr, eabuf), wf_chspec_ntoa(rtt_target->chanspec, chanbuf))); rtt_target++; } break; } } WL_DBG(("leave :target_cnt : %d\n", rtt_param.rtt_target_cnt)); if (dhd_dev_rtt_set_cfg(bcmcfg_to_prmry_ndev(cfg), &rtt_param) < 0) { WL_ERR(("Could not set RTT configuration\n")); err = -EINVAL; } exit: return err; } static int wl_cfgvendor_rtt_cancel_config(struct wiphy *wiphy, struct wireless_dev *wdev, const void *data, int len) { int err = 0, rem, type, target_cnt = 0; const struct nlattr *iter; struct ether_addr *mac_list = NULL, *mac_addr = NULL; struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); nla_for_each_attr(iter, data, len, rem) { type = nla_type(iter); switch (type) { case RTT_ATTRIBUTE_TARGET_CNT: target_cnt = nla_get_u8(iter); mac_list = (struct ether_addr *)kzalloc(target_cnt * ETHER_ADDR_LEN , GFP_KERNEL); if (mac_list == NULL) { WL_ERR(("failed to allocate mem for mac list\n")); goto exit; } mac_addr = &mac_list[0]; break; case RTT_ATTRIBUTE_TARGET_MAC: if (mac_addr) memcpy(mac_addr++, nla_data(iter), ETHER_ADDR_LEN); else { WL_ERR(("mac_list is NULL\n")); goto exit; } break; } if (dhd_dev_rtt_cancel_cfg(bcmcfg_to_prmry_ndev(cfg), mac_list, target_cnt) < 0) { WL_ERR(("Could not cancel RTT configuration\n")); err = -EINVAL; goto exit; } } exit: if (mac_list) kfree(mac_list); return err; } static int wl_cfgvendor_rtt_get_capability(struct wiphy *wiphy, struct wireless_dev *wdev, const void *data, int len) { int err = 0; struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); rtt_capabilities_t capability; err = dhd_dev_rtt_capability(bcmcfg_to_prmry_ndev(cfg), &capability); if (unlikely(err)) { WL_ERR(("Vendor Command reply failed ret:%d \n", err)); goto exit; } err = rtw_cfgvendor_send_cmd_reply(wiphy, bcmcfg_to_prmry_ndev(cfg), &capability, sizeof(capability)); if (unlikely(err)) { WL_ERR(("Vendor Command reply failed ret:%d \n", err)); } exit: return err; } #endif /* RTT_SUPPORT */ static int wl_cfgvendor_priv_string_handler(struct wiphy *wiphy, struct wireless_dev *wdev, const void *data, int len) { int err = 0; u8 resp[1] = {'\0'}; DBG_871X_LEVEL(_drv_always_, FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data); err = rtw_cfgvendor_send_cmd_reply(wiphy, wdev_to_ndev(wdev), resp, 1); if (unlikely(err)) DBG_871X_LEVEL(_drv_err_, FUNC_NDEV_FMT"Vendor Command reply failed ret:%d \n" , FUNC_NDEV_ARG(wdev_to_ndev(wdev)), err); return err; #if 0 struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); int err = 0; int data_len = 0; bzero(cfg->ioctl_buf, WLC_IOCTL_MAXLEN); if (strncmp((char *)data, BRCM_VENDOR_SCMD_CAPA, strlen(BRCM_VENDOR_SCMD_CAPA)) == 0) { err = wldev_iovar_getbuf(bcmcfg_to_prmry_ndev(cfg), "cap", NULL, 0, cfg->ioctl_buf, WLC_IOCTL_MAXLEN, &cfg->ioctl_buf_sync); if (unlikely(err)) { WL_ERR(("error (%d)\n", err)); return err; } data_len = strlen(cfg->ioctl_buf); cfg->ioctl_buf[data_len] = '\0'; } err = rtw_cfgvendor_send_cmd_reply(wiphy, bcmcfg_to_prmry_ndev(cfg), cfg->ioctl_buf, data_len+1); if (unlikely(err)) WL_ERR(("Vendor Command reply failed ret:%d \n", err)); else WL_INFORM(("Vendor Command reply sent successfully!\n")); return err; #endif } static const struct wiphy_vendor_command rtw_vendor_cmds [] = { { { .vendor_id = OUI_BRCM, .subcmd = BRCM_VENDOR_SCMD_PRIV_STR }, .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, .doit = wl_cfgvendor_priv_string_handler }, #if defined(GSCAN_SUPPORT) && 0 { { .vendor_id = OUI_GOOGLE, .subcmd = GSCAN_SUBCMD_GET_CAPABILITIES }, .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, .doit = wl_cfgvendor_gscan_get_capabilities }, { { .vendor_id = OUI_GOOGLE, .subcmd = GSCAN_SUBCMD_SET_CONFIG }, .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, .doit = wl_cfgvendor_set_scan_cfg }, { { .vendor_id = OUI_GOOGLE, .subcmd = GSCAN_SUBCMD_SET_SCAN_CONFIG }, .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, .doit = wl_cfgvendor_set_batch_scan_cfg }, { { .vendor_id = OUI_GOOGLE, .subcmd = GSCAN_SUBCMD_ENABLE_GSCAN }, .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, .doit = wl_cfgvendor_initiate_gscan }, { { .vendor_id = OUI_GOOGLE, .subcmd = GSCAN_SUBCMD_ENABLE_FULL_SCAN_RESULTS }, .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, .doit = wl_cfgvendor_enable_full_scan_result }, { { .vendor_id = OUI_GOOGLE, .subcmd = GSCAN_SUBCMD_SET_HOTLIST }, .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, .doit = wl_cfgvendor_hotlist_cfg }, { { .vendor_id = OUI_GOOGLE, .subcmd = GSCAN_SUBCMD_SET_SIGNIFICANT_CHANGE_CONFIG }, .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, .doit = wl_cfgvendor_significant_change_cfg }, { { .vendor_id = OUI_GOOGLE, .subcmd = GSCAN_SUBCMD_GET_SCAN_RESULTS }, .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, .doit = wl_cfgvendor_gscan_get_batch_results }, { { .vendor_id = OUI_GOOGLE, .subcmd = GSCAN_SUBCMD_GET_CHANNEL_LIST }, .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, .doit = wl_cfgvendor_gscan_get_channel_list }, #endif /* GSCAN_SUPPORT */ #if defined(RTT_SUPPORT) && 0 { { .vendor_id = OUI_GOOGLE, .subcmd = RTT_SUBCMD_SET_CONFIG }, .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, .doit = wl_cfgvendor_rtt_set_config }, { { .vendor_id = OUI_GOOGLE, .subcmd = RTT_SUBCMD_CANCEL_CONFIG }, .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, .doit = wl_cfgvendor_rtt_cancel_config }, { { .vendor_id = OUI_GOOGLE, .subcmd = RTT_SUBCMD_GETCAPABILITY }, .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, .doit = wl_cfgvendor_rtt_get_capability }, #endif /* RTT_SUPPORT */ { { .vendor_id = OUI_GOOGLE, .subcmd = ANDR_WIFI_SUBCMD_GET_FEATURE_SET }, .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, .doit = rtw_cfgvendor_get_feature_set }, { { .vendor_id = OUI_GOOGLE, .subcmd = ANDR_WIFI_SUBCMD_GET_FEATURE_SET_MATRIX }, .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, .doit = rtw_cfgvendor_get_feature_set_matrix } }; static const struct nl80211_vendor_cmd_info rtw_vendor_events [] = { { OUI_BRCM, BRCM_VENDOR_EVENT_UNSPEC }, { OUI_BRCM, BRCM_VENDOR_EVENT_PRIV_STR }, #if defined(GSCAN_SUPPORT) && 0 { OUI_GOOGLE, GOOGLE_GSCAN_SIGNIFICANT_EVENT }, { OUI_GOOGLE, GOOGLE_GSCAN_GEOFENCE_FOUND_EVENT }, { OUI_GOOGLE, GOOGLE_GSCAN_BATCH_SCAN_EVENT }, { OUI_GOOGLE, GOOGLE_SCAN_FULL_RESULTS_EVENT }, #endif /* GSCAN_SUPPORT */ #if defined(RTT_SUPPORT) && 0 { OUI_GOOGLE, GOOGLE_RTT_COMPLETE_EVENT }, #endif /* RTT_SUPPORT */ #if defined(GSCAN_SUPPORT) && 0 { OUI_GOOGLE, GOOGLE_SCAN_COMPLETE_EVENT }, { OUI_GOOGLE, GOOGLE_GSCAN_GEOFENCE_LOST_EVENT } #endif /* GSCAN_SUPPORT */ }; int rtw_cfgvendor_attach(struct wiphy *wiphy) { DBG_871X("Register RTW cfg80211 vendor cmd(0x%x) interface \n", NL80211_CMD_VENDOR); wiphy->vendor_commands = rtw_vendor_cmds; wiphy->n_vendor_commands = ARRAY_SIZE(rtw_vendor_cmds); wiphy->vendor_events = rtw_vendor_events; wiphy->n_vendor_events = ARRAY_SIZE(rtw_vendor_events); return 0; } int rtw_cfgvendor_detach(struct wiphy *wiphy) { DBG_871X("Vendor: Unregister RTW cfg80211 vendor interface \n"); wiphy->vendor_commands = NULL; wiphy->vendor_events = NULL; wiphy->n_vendor_commands = 0; wiphy->n_vendor_events = 0; return 0; } #endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) */ #endif /* CONFIG_IOCTL_CFG80211 */ rtl8812au-4.3.8.12175.20140902+dfsg/os_dep/linux/rtw_cfgvendor.h000066400000000000000000000206441261122257400231370ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2014 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef _RTW_CFGVENDOR_H_ #define _RTW_CFGVENDOR_H_ #define OUI_BRCM 0x001018 #define OUI_GOOGLE 0x001A11 #define BRCM_VENDOR_SUBCMD_PRIV_STR 1 #define ATTRIBUTE_U32_LEN (NLA_HDRLEN + 4) #define VENDOR_ID_OVERHEAD ATTRIBUTE_U32_LEN #define VENDOR_SUBCMD_OVERHEAD ATTRIBUTE_U32_LEN #define VENDOR_DATA_OVERHEAD (NLA_HDRLEN) #define SCAN_RESULTS_COMPLETE_FLAG_LEN ATTRIBUTE_U32_LEN #define SCAN_INDEX_HDR_LEN (NLA_HDRLEN) #define SCAN_ID_HDR_LEN ATTRIBUTE_U32_LEN #define SCAN_FLAGS_HDR_LEN ATTRIBUTE_U32_LEN #define GSCAN_NUM_RESULTS_HDR_LEN ATTRIBUTE_U32_LEN #define GSCAN_RESULTS_HDR_LEN (NLA_HDRLEN) #define GSCAN_BATCH_RESULT_HDR_LEN (SCAN_INDEX_HDR_LEN + SCAN_ID_HDR_LEN + \ SCAN_FLAGS_HDR_LEN + \ GSCAN_NUM_RESULTS_HDR_LEN + \ GSCAN_RESULTS_HDR_LEN) #define VENDOR_REPLY_OVERHEAD (VENDOR_ID_OVERHEAD + \ VENDOR_SUBCMD_OVERHEAD + \ VENDOR_DATA_OVERHEAD) typedef enum { /* don't use 0 as a valid subcommand */ VENDOR_NL80211_SUBCMD_UNSPECIFIED, /* define all vendor startup commands between 0x0 and 0x0FFF */ VENDOR_NL80211_SUBCMD_RANGE_START = 0x0001, VENDOR_NL80211_SUBCMD_RANGE_END = 0x0FFF, /* define all GScan related commands between 0x1000 and 0x10FF */ ANDROID_NL80211_SUBCMD_GSCAN_RANGE_START = 0x1000, ANDROID_NL80211_SUBCMD_GSCAN_RANGE_END = 0x10FF, /* define all NearbyDiscovery related commands between 0x1100 and 0x11FF */ ANDROID_NL80211_SUBCMD_NBD_RANGE_START = 0x1100, ANDROID_NL80211_SUBCMD_NBD_RANGE_END = 0x11FF, /* define all RTT related commands between 0x1100 and 0x11FF */ ANDROID_NL80211_SUBCMD_RTT_RANGE_START = 0x1100, ANDROID_NL80211_SUBCMD_RTT_RANGE_END = 0x11FF, ANDROID_NL80211_SUBCMD_LSTATS_RANGE_START = 0x1200, ANDROID_NL80211_SUBCMD_LSTATS_RANGE_END = 0x12FF, ANDROID_NL80211_SUBCMD_TDLS_RANGE_START = 0x1300, ANDROID_NL80211_SUBCMD_TDLS_RANGE_END = 0x13FF, /* This is reserved for future usage */ } ANDROID_VENDOR_SUB_COMMAND; enum wl_vendor_subcmd { BRCM_VENDOR_SCMD_UNSPEC, BRCM_VENDOR_SCMD_PRIV_STR, GSCAN_SUBCMD_GET_CAPABILITIES = ANDROID_NL80211_SUBCMD_GSCAN_RANGE_START, GSCAN_SUBCMD_SET_CONFIG, GSCAN_SUBCMD_SET_SCAN_CONFIG, GSCAN_SUBCMD_ENABLE_GSCAN, GSCAN_SUBCMD_GET_SCAN_RESULTS, GSCAN_SUBCMD_SCAN_RESULTS, GSCAN_SUBCMD_SET_HOTLIST, GSCAN_SUBCMD_SET_SIGNIFICANT_CHANGE_CONFIG, GSCAN_SUBCMD_ENABLE_FULL_SCAN_RESULTS, GSCAN_SUBCMD_GET_CHANNEL_LIST, ANDR_WIFI_SUBCMD_GET_FEATURE_SET, ANDR_WIFI_SUBCMD_GET_FEATURE_SET_MATRIX, RTT_SUBCMD_SET_CONFIG = ANDROID_NL80211_SUBCMD_RTT_RANGE_START, RTT_SUBCMD_CANCEL_CONFIG, RTT_SUBCMD_GETCAPABILITY, /* Add more sub commands here */ VENDOR_SUBCMD_MAX }; enum gscan_attributes { GSCAN_ATTRIBUTE_NUM_BUCKETS = 10, GSCAN_ATTRIBUTE_BASE_PERIOD, GSCAN_ATTRIBUTE_BUCKETS_BAND, GSCAN_ATTRIBUTE_BUCKET_ID, GSCAN_ATTRIBUTE_BUCKET_PERIOD, GSCAN_ATTRIBUTE_BUCKET_NUM_CHANNELS, GSCAN_ATTRIBUTE_BUCKET_CHANNELS, GSCAN_ATTRIBUTE_NUM_AP_PER_SCAN, GSCAN_ATTRIBUTE_REPORT_THRESHOLD, GSCAN_ATTRIBUTE_NUM_SCANS_TO_CACHE, GSCAN_ATTRIBUTE_BAND = GSCAN_ATTRIBUTE_BUCKETS_BAND, GSCAN_ATTRIBUTE_ENABLE_FEATURE = 20, GSCAN_ATTRIBUTE_SCAN_RESULTS_COMPLETE, GSCAN_ATTRIBUTE_FLUSH_FEATURE, GSCAN_ATTRIBUTE_ENABLE_FULL_SCAN_RESULTS, GSCAN_ATTRIBUTE_REPORT_EVENTS, /* remaining reserved for additional attributes */ GSCAN_ATTRIBUTE_NUM_OF_RESULTS = 30, GSCAN_ATTRIBUTE_FLUSH_RESULTS, GSCAN_ATTRIBUTE_SCAN_RESULTS, /* flat array of wifi_scan_result */ GSCAN_ATTRIBUTE_SCAN_ID, /* indicates scan number */ GSCAN_ATTRIBUTE_SCAN_FLAGS, /* indicates if scan was aborted */ GSCAN_ATTRIBUTE_AP_FLAGS, /* flags on significant change event */ GSCAN_ATTRIBUTE_NUM_CHANNELS, GSCAN_ATTRIBUTE_CHANNEL_LIST, /* remaining reserved for additional attributes */ GSCAN_ATTRIBUTE_SSID = 40, GSCAN_ATTRIBUTE_BSSID, GSCAN_ATTRIBUTE_CHANNEL, GSCAN_ATTRIBUTE_RSSI, GSCAN_ATTRIBUTE_TIMESTAMP, GSCAN_ATTRIBUTE_RTT, GSCAN_ATTRIBUTE_RTTSD, /* remaining reserved for additional attributes */ GSCAN_ATTRIBUTE_HOTLIST_BSSIDS = 50, GSCAN_ATTRIBUTE_RSSI_LOW, GSCAN_ATTRIBUTE_RSSI_HIGH, GSCAN_ATTRIBUTE_HOSTLIST_BSSID_ELEM, GSCAN_ATTRIBUTE_HOTLIST_FLUSH, /* remaining reserved for additional attributes */ GSCAN_ATTRIBUTE_RSSI_SAMPLE_SIZE = 60, GSCAN_ATTRIBUTE_LOST_AP_SAMPLE_SIZE, GSCAN_ATTRIBUTE_MIN_BREACHING, GSCAN_ATTRIBUTE_SIGNIFICANT_CHANGE_BSSIDS, GSCAN_ATTRIBUTE_SIGNIFICANT_CHANGE_FLUSH, GSCAN_ATTRIBUTE_MAX }; enum gscan_bucket_attributes { GSCAN_ATTRIBUTE_CH_BUCKET_1, GSCAN_ATTRIBUTE_CH_BUCKET_2, GSCAN_ATTRIBUTE_CH_BUCKET_3, GSCAN_ATTRIBUTE_CH_BUCKET_4, GSCAN_ATTRIBUTE_CH_BUCKET_5, GSCAN_ATTRIBUTE_CH_BUCKET_6, GSCAN_ATTRIBUTE_CH_BUCKET_7 }; enum gscan_ch_attributes { GSCAN_ATTRIBUTE_CH_ID_1, GSCAN_ATTRIBUTE_CH_ID_2, GSCAN_ATTRIBUTE_CH_ID_3, GSCAN_ATTRIBUTE_CH_ID_4, GSCAN_ATTRIBUTE_CH_ID_5, GSCAN_ATTRIBUTE_CH_ID_6, GSCAN_ATTRIBUTE_CH_ID_7 }; enum rtt_attributes { RTT_ATTRIBUTE_TARGET_CNT, RTT_ATTRIBUTE_TARGET_INFO, RTT_ATTRIBUTE_TARGET_MAC, RTT_ATTRIBUTE_TARGET_TYPE, RTT_ATTRIBUTE_TARGET_PEER, RTT_ATTRIBUTE_TARGET_CHAN, RTT_ATTRIBUTE_TARGET_MODE, RTT_ATTRIBUTE_TARGET_INTERVAL, RTT_ATTRIBUTE_TARGET_NUM_MEASUREMENT, RTT_ATTRIBUTE_TARGET_NUM_PKT, RTT_ATTRIBUTE_TARGET_NUM_RETRY }; typedef enum wl_vendor_event { BRCM_VENDOR_EVENT_UNSPEC, BRCM_VENDOR_EVENT_PRIV_STR, GOOGLE_GSCAN_SIGNIFICANT_EVENT, GOOGLE_GSCAN_GEOFENCE_FOUND_EVENT, GOOGLE_GSCAN_BATCH_SCAN_EVENT, GOOGLE_SCAN_FULL_RESULTS_EVENT, GOOGLE_RTT_COMPLETE_EVENT, GOOGLE_SCAN_COMPLETE_EVENT, GOOGLE_GSCAN_GEOFENCE_LOST_EVENT } wl_vendor_event_t; enum andr_wifi_feature_set_attr { ANDR_WIFI_ATTRIBUTE_NUM_FEATURE_SET, ANDR_WIFI_ATTRIBUTE_FEATURE_SET }; typedef enum wl_vendor_gscan_attribute { ATTR_START_GSCAN, ATTR_STOP_GSCAN, ATTR_SET_SCAN_BATCH_CFG_ID, /* set batch scan params */ ATTR_SET_SCAN_GEOFENCE_CFG_ID, /* set list of bssids to track */ ATTR_SET_SCAN_SIGNIFICANT_CFG_ID, /* set list of bssids, rssi threshold etc.. */ ATTR_SET_SCAN_CFG_ID, /* set common scan config params here */ ATTR_GET_GSCAN_CAPABILITIES_ID, /* Add more sub commands here */ ATTR_GSCAN_MAX } wl_vendor_gscan_attribute_t; typedef enum gscan_batch_attribute { ATTR_GSCAN_BATCH_BESTN, ATTR_GSCAN_BATCH_MSCAN, ATTR_GSCAN_BATCH_BUFFER_THRESHOLD } gscan_batch_attribute_t; typedef enum gscan_geofence_attribute { ATTR_GSCAN_NUM_HOTLIST_BSSID, ATTR_GSCAN_HOTLIST_BSSID } gscan_geofence_attribute_t; typedef enum gscan_complete_event { WIFI_SCAN_BUFFER_FULL, WIFI_SCAN_COMPLETE } gscan_complete_event_t; /* Capture the BRCM_VENDOR_SUBCMD_PRIV_STRINGS* here */ #define BRCM_VENDOR_SCMD_CAPA "cap" #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) extern int rtw_cfgvendor_attach(struct wiphy *wiphy); extern int rtw_cfgvendor_detach(struct wiphy *wiphy); extern int rtw_cfgvendor_send_async_event(struct wiphy *wiphy, struct net_device *dev, int event_id, const void *data, int len); #if defined(GSCAN_SUPPORT) && 0 extern int wl_cfgvendor_send_hotlist_event(struct wiphy *wiphy, struct net_device *dev, void *data, int len, wl_vendor_event_t event); #endif #endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) */ #endif /* _RTW_CFGVENDOR_H_ */ rtl8812au-4.3.8.12175.20140902+dfsg/os_dep/linux/rtw_proc.c000066400000000000000000000717451261122257400221300ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include #include "rtw_proc.h" #ifdef CONFIG_PROC_DEBUG static struct proc_dir_entry *rtw_proc = NULL; inline struct proc_dir_entry *get_rtw_drv_proc(void) { return rtw_proc; } #define RTW_PROC_NAME DRV_NAME #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,9,0)) #define file_inode(file) ((file)->f_dentry->d_inode) #endif #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0)) #define PDE_DATA(inode) PDE((inode))->data #define proc_get_parent_data(inode) PDE((inode))->parent->data #endif #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) #define get_proc_net proc_net #else #define get_proc_net init_net.proc_net #endif inline struct proc_dir_entry *rtw_proc_create_dir(const char *name, struct proc_dir_entry *parent, void *data) { struct proc_dir_entry *entry; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)) entry = proc_mkdir_data(name, S_IRUGO|S_IXUGO, parent, data); #else //entry = proc_mkdir_mode(name, S_IRUGO|S_IXUGO, parent); entry = proc_mkdir(name, parent); if (entry) entry->data = data; #endif return entry; } inline struct proc_dir_entry *rtw_proc_create_entry(const char *name, struct proc_dir_entry *parent, const struct file_operations *fops, void * data) { struct proc_dir_entry *entry; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)) entry = proc_create_data(name, S_IFREG|S_IRUGO, parent, fops, data); #else entry = create_proc_entry(name, S_IFREG|S_IRUGO, parent); if (entry) { entry->data = data; entry->proc_fops = fops; } #endif return entry; } static int proc_get_dummy(struct seq_file *m, void *v) { return 0; } static int proc_get_drv_version(struct seq_file *m, void *v) { dump_drv_version(m); return 0; } static int proc_get_log_level(struct seq_file *m, void *v) { dump_log_level(m); return 0; } static ssize_t proc_set_log_level(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { char tmp[32]; int log_level; if (count < 1) return -EINVAL; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%d ", &log_level); if( log_level >= _drv_always_ && log_level <= _drv_debug_ ) { GlobalDebugLevel= log_level; printk("%d\n", GlobalDebugLevel); } } else { return -EFAULT; } return count; } #ifdef DBG_MEM_ALLOC static int proc_get_mstat(struct seq_file *m, void *v) { rtw_mstat_dump(m); return 0; } #endif /* DBG_MEM_ALLOC */ /* * rtw_drv_proc: * init/deinit when register/unregister driver */ const struct rtw_proc_hdl drv_proc_hdls [] = { {"ver_info", proc_get_drv_version, NULL}, {"log_level", proc_get_log_level, proc_set_log_level}, #ifdef DBG_MEM_ALLOC {"mstat", proc_get_mstat, NULL}, #endif /* DBG_MEM_ALLOC */ }; const int drv_proc_hdls_num = sizeof(drv_proc_hdls) / sizeof(struct rtw_proc_hdl); static int rtw_drv_proc_open(struct inode *inode, struct file *file) { //struct net_device *dev = proc_get_parent_data(inode); ssize_t index = (ssize_t)PDE_DATA(inode); const struct rtw_proc_hdl *hdl = drv_proc_hdls+index; return single_open(file, hdl->show, NULL); } static ssize_t rtw_drv_proc_write(struct file *file, const char __user *buffer, size_t count, loff_t *pos) { ssize_t index = (ssize_t)PDE_DATA(file_inode(file)); const struct rtw_proc_hdl *hdl = drv_proc_hdls+index; ssize_t (*write)(struct file *, const char __user *, size_t, loff_t *, void *) = hdl->write; if (write) return write(file, buffer, count, pos, NULL); return -EROFS; } static const struct file_operations rtw_drv_proc_fops = { .owner = THIS_MODULE, .open = rtw_drv_proc_open, .read = seq_read, .llseek = seq_lseek, .release = single_release, .write = rtw_drv_proc_write, }; int rtw_drv_proc_init(void) { int ret = _FAIL; ssize_t i; struct proc_dir_entry *entry = NULL; if (rtw_proc != NULL) { rtw_warn_on(1); goto exit; } rtw_proc = rtw_proc_create_dir(RTW_PROC_NAME, get_proc_net, NULL); if (rtw_proc == NULL) { rtw_warn_on(1); goto exit; } for (i=0;iprivate; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); sd_f0_reg_dump(m, adapter); return 0; } #endif /* CONFIG_SDIO_HCI */ static int proc_get_mac_reg_dump(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); mac_reg_dump(m, adapter); return 0; } static int proc_get_bb_reg_dump(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); bb_reg_dump(m, adapter); return 0; } static int proc_get_rf_reg_dump(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); rf_reg_dump(m, adapter); return 0; } //gpio setting #ifdef CONFIG_GPIO_API static ssize_t proc_set_config_gpio(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]={0}; int num=0,gpio_pin=0,gpio_mode=0;//gpio_mode:0 input 1:output; if (count < 2) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { num =sscanf(tmp, "%d %d",&gpio_pin,&gpio_mode); DBG_871X("num=%d gpio_pin=%d mode=%d\n",num,gpio_pin,gpio_mode); padapter->pre_gpio_pin=gpio_pin; if(gpio_mode==0 || gpio_mode==1 ) rtw_hal_config_gpio(padapter, gpio_pin,gpio_mode); } return count; } static ssize_t proc_set_gpio_output_value(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]={0}; int num=0,gpio_pin=0,pin_mode=0;//pin_mode: 1 high 0:low if (count < 2) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { num =sscanf(tmp, "%d %d",&gpio_pin,&pin_mode); DBG_871X("num=%d gpio_pin=%d pin_high=%d\n",num,gpio_pin,pin_mode); padapter->pre_gpio_pin=gpio_pin; if(pin_mode==0 || pin_mode==1 ) rtw_hal_set_gpio_output_value(padapter, gpio_pin,pin_mode); } return count; } static int proc_get_gpio(struct seq_file *m, void *v) { u8 gpioreturnvalue=0; struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); if(!padapter) return -EFAULT; gpioreturnvalue = rtw_hal_get_gpio(padapter, padapter->pre_gpio_pin); DBG_871X_SEL_NL(m, "get_gpio %d:%d \n",padapter->pre_gpio_pin ,gpioreturnvalue); return 0; } static ssize_t proc_set_gpio(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]={0}; int num=0,gpio_pin=0; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { num =sscanf(tmp, "%d",&gpio_pin); DBG_871X("num=%d gpio_pin=%d\n",num,gpio_pin); padapter->pre_gpio_pin=gpio_pin; } return count; } #endif static int proc_get_linked_info_dump(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); if(padapter) DBG_871X_SEL_NL(m, "linked_info_dump :%s \n", (padapter->bLinkInfoDump)?"enable":"disable"); return 0; } static ssize_t proc_set_linked_info_dump(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]={0}; int mode=0,pre_mode=0; int num=0; if (count < 1) return -EFAULT; pre_mode=padapter->bLinkInfoDump; DBG_871X("pre_mode=%d \n",pre_mode); if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { num =sscanf(tmp, "%d ", &mode); DBG_871X("num=%d mode=%d\n",num,mode); if(num!=1) { DBG_871X("argument number is wrong\n"); return -EFAULT; } if(mode==1 || (mode==0 && pre_mode==1) ) //not consider pwr_saving 0: { padapter->bLinkInfoDump = mode; } else if( (mode==2 ) || (mode==0 && pre_mode==2))//consider power_saving { //DBG_871X("linked_info_dump =%s \n", (padapter->bLinkInfoDump)?"enable":"disable") linked_info_dump(padapter,mode); } } return count; } int proc_get_rx_info(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; //Counts of packets whose seq_num is less than preorder_ctrl->indicate_seq, Ex delay, retransmission, redundant packets and so on DBG_871X_SEL_NL(m,"Counts of Packets Whose Seq_Num Less Than Reorder Control Seq_Num: %llu\n",(unsigned long long)pdbgpriv->dbg_rx_ampdu_drop_count); //How many times the Rx Reorder Timer is triggered. DBG_871X_SEL_NL(m,"Rx Reorder Time-out Trigger Counts: %llu\n",(unsigned long long)pdbgpriv->dbg_rx_ampdu_forced_indicate_count); //Total counts of packets loss DBG_871X_SEL_NL(m,"Rx Packet Loss Counts: %llu\n",(unsigned long long)pdbgpriv->dbg_rx_ampdu_loss_count); DBG_871X_SEL_NL(m,"Duplicate Management Frame Drop Count: %llu\n",(unsigned long long)pdbgpriv->dbg_rx_dup_mgt_frame_drop_count); DBG_871X_SEL_NL(m,"AMPDU BA window shift Count: %llu\n",(unsigned long long)pdbgpriv->dbg_rx_ampdu_window_shift_cnt); return 0; } static int proc_get_mac_qinfo(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); rtw_hal_get_hwreg(adapter, HW_VAR_DUMP_MAC_QUEUE_INFO, (u8 *)m); return 0; } ssize_t proc_reset_rx_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; char cmd[32]; if (buffer && !copy_from_user(cmd, buffer, sizeof(cmd))) { if('0' == cmd[0]){ pdbgpriv->dbg_rx_ampdu_drop_count = 0; pdbgpriv->dbg_rx_ampdu_forced_indicate_count = 0; pdbgpriv->dbg_rx_ampdu_loss_count = 0; pdbgpriv->dbg_rx_dup_mgt_frame_drop_count = 0; pdbgpriv->dbg_rx_ampdu_window_shift_cnt = 0; } } return count; } int proc_get_wifi_spec(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct registry_priv *pregpriv = &padapter->registrypriv; DBG_871X_SEL_NL(m,"wifi_spec=%d\n",pregpriv->wifi_spec); return 0; } static int proc_get_chan_plan(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); DBG_871X_SEL_NL(m,"Channel plan=0x%02x\n",padapter->mlmepriv.ChannelPlan); return 0; } static ssize_t proc_set_chan_plan(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct SetChannelPlan_param setChannelPlan_param; char tmp[32]; u8 chan_plan = RT_CHANNEL_DOMAIN_REALTEK_DEFINE; if (!padapter) return -EFAULT; if (count < 1) { DBG_871X("argument size is less than 1\n"); return -EFAULT; } if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%hhx", &chan_plan); if (num != 1) { DBG_871X("invalid read_reg parameter!\n"); return count; } } setChannelPlan_param.channel_plan = chan_plan; if( H2C_SUCCESS != set_chplan_hdl(padapter, (unsigned char *)&setChannelPlan_param) ) return -EFAULT; return count; } static int proc_get_udpport(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct recv_priv *precvpriv = &(padapter->recvpriv); DBG_871X_SEL_NL(m,"%d\n",precvpriv->sink_udpport); return 0; } static ssize_t proc_set_udpport(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); struct recv_priv *precvpriv = &(padapter->recvpriv); int sink_udpport = 0; char tmp[32]; if (!padapter) return -EFAULT; if (count < 1) { DBG_871X("argument size is less than 1\n"); return -EFAULT; } if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%d", &sink_udpport); if (num != 1) { DBG_871X("invalid input parameter number!\n"); return count; } } precvpriv->sink_udpport = sink_udpport; return count; } static int proc_get_macid_info(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); u8 i; DBG_871X_SEL_NL(m, "max_num:%u\n", macid_ctl->num); DBG_871X_SEL_NL(m, "\n"); DBG_871X_SEL_NL(m, "used:\n"); dump_macid_map(m, &macid_ctl->used, macid_ctl->num); DBG_871X_SEL_NL(m, "\n"); DBG_871X_SEL_NL(m, "%-3s %-3s %-4s %-4s" "\n" , "id", "bmc", "if_g", "ch_g" ); for (i=0;inum;i++) { if (rtw_macid_is_used(macid_ctl, i)) DBG_871X_SEL_NL(m, "%3u %3u %4d %4d" "\n" , i , rtw_macid_is_bmc(macid_ctl, i) , rtw_macid_get_if_g(macid_ctl, i) , rtw_macid_get_ch_g(macid_ctl, i) ); } return 0; } static int proc_get_cam(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); u8 i; return 0; } static ssize_t proc_set_cam(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *adapter; char tmp[32]; char cmd[4]; u8 id; adapter = (_adapter *)rtw_netdev_priv(dev); if (!adapter) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { /* c : clear specific cam entry */ /* wfc : write specific cam entry from cam cache */ int num = sscanf(tmp, "%s %hhu", cmd, &id); if (num < 2) return count; if (strcmp("c", cmd) == 0) { _clear_cam_entry(adapter, id); adapter->securitypriv.hw_decrypted = _FALSE; /* temporarily set this for TX path to use SW enc */ } else if (strcmp("wfc", cmd) == 0) { write_cam_from_cache(adapter, id); } } return count; } static int proc_get_cam_cache(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); u8 i; DBG_871X_SEL_NL(m, "cam bitmap:0x%016llx\n", dvobj->cam_ctl.bitmap); DBG_871X_SEL_NL(m, "%-2s %-6s %-17s %-32s %-3s %-7s" //" %-2s %-2s %-4s %-5s" "\n" , "id", "ctrl", "addr", "key", "kid", "type" //, "MK", "GK", "MFB", "valid" ); for (i=0;i<32;i++) { if (dvobj->cam_cache[i].ctrl != 0) DBG_871X_SEL_NL(m, "%2u 0x%04x "MAC_FMT" "KEY_FMT" %3u %-7s" //" %2u %2u 0x%02x %5u" "\n", i , dvobj->cam_cache[i].ctrl , MAC_ARG(dvobj->cam_cache[i].mac) , KEY_ARG(dvobj->cam_cache[i].key) , (dvobj->cam_cache[i].ctrl)&0x03 , security_type_str(((dvobj->cam_cache[i].ctrl)>>2)&0x07) //, ((dvobj->cam_cache[i].ctrl)>>5)&0x01 //, ((dvobj->cam_cache[i].ctrl)>>6)&0x01 //, ((dvobj->cam_cache[i].ctrl)>>8)&0x7f //, ((dvobj->cam_cache[i].ctrl)>>15)&0x01 ); } return 0; } #ifdef CONFIG_BT_COEXIST ssize_t proc_set_btinfo_evt(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; u8 btinfo[8]; if (count < 6) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = 0; _rtw_memset(btinfo, 0, 8); num = sscanf(tmp, "%hhx %hhx %hhx %hhx %hhx %hhx %hhx %hhx" , &btinfo[0], &btinfo[1], &btinfo[2], &btinfo[3] , &btinfo[4], &btinfo[5], &btinfo[6], &btinfo[7]); if (num < 6) return -EINVAL; btinfo[1] = num-2; rtw_btinfo_cmd(padapter, btinfo, btinfo[1]+2); } return count; } #endif /* * rtw_adapter_proc: * init/deinit when register/unregister net_device */ const struct rtw_proc_hdl adapter_proc_hdls [] = { {"write_reg", proc_get_dummy, proc_set_write_reg}, {"read_reg", proc_get_read_reg, proc_set_read_reg}, {"fwstate", proc_get_fwstate, NULL}, {"sec_info", proc_get_sec_info, NULL}, {"mlmext_state", proc_get_mlmext_state, NULL}, {"qos_option", proc_get_qos_option, NULL}, {"ht_option", proc_get_ht_option, NULL}, {"rf_info", proc_get_rf_info, NULL}, {"survey_info", proc_get_survey_info, NULL}, {"ap_info", proc_get_ap_info, NULL}, {"adapter_state", proc_get_adapter_state, NULL}, {"trx_info", proc_get_trx_info, NULL}, {"rate_ctl", proc_get_rate_ctl, proc_set_rate_ctl}, {"dis_pwt_ctl", proc_get_dis_pwt, proc_set_dis_pwt}, {"mac_qinfo", proc_get_mac_qinfo, NULL}, {"macid_info", proc_get_macid_info, NULL}, {"cam", proc_get_cam, proc_set_cam}, {"cam_cache", proc_get_cam_cache, NULL}, {"suspend_info", proc_get_suspend_resume_info, NULL}, {"rx_info", proc_get_rx_info, proc_reset_rx_info}, {"wifi_spec",proc_get_wifi_spec,NULL}, #ifdef CONFIG_LAYER2_ROAMING {"roam_flags", proc_get_roam_flags, proc_set_roam_flags}, {"roam_param", proc_get_roam_param, proc_set_roam_param}, {"roam_tgt_addr", proc_get_dummy, proc_set_roam_tgt_addr}, #endif /* CONFIG_LAYER2_ROAMING */ #ifdef CONFIG_SDIO_HCI {"sd_f0_reg_dump", proc_get_sd_f0_reg_dump, NULL}, #endif /* CONFIG_SDIO_HCI */ {"fwdl_test_case", proc_get_dummy, proc_set_fwdl_test_case}, {"wait_hiq_empty", proc_get_dummy, proc_set_wait_hiq_empty}, {"mac_reg_dump", proc_get_mac_reg_dump, NULL}, {"bb_reg_dump", proc_get_bb_reg_dump, NULL}, {"rf_reg_dump", proc_get_rf_reg_dump, NULL}, #ifdef CONFIG_AP_MODE {"all_sta_info", proc_get_all_sta_info, NULL}, #endif /* CONFIG_AP_MODE */ #ifdef DBG_MEMORY_LEAK {"_malloc_cnt", proc_get_malloc_cnt, NULL}, #endif /* DBG_MEMORY_LEAK */ #ifdef CONFIG_FIND_BEST_CHANNEL {"best_channel", proc_get_best_channel, proc_set_best_channel}, #endif {"rx_signal", proc_get_rx_signal, proc_set_rx_signal}, {"hw_info", proc_get_hw_status, NULL}, #ifdef CONFIG_80211N_HT {"ht_enable", proc_get_ht_enable, proc_set_ht_enable}, {"bw_mode", proc_get_bw_mode, proc_set_bw_mode}, {"ampdu_enable", proc_get_ampdu_enable, proc_set_ampdu_enable}, {"rx_stbc", proc_get_rx_stbc, proc_set_rx_stbc}, {"rx_ampdu", proc_get_rx_ampdu, proc_set_rx_ampdu}, {"rx_ampdu_factor",proc_get_rx_ampdu_factor,proc_set_rx_ampdu_factor}, {"rx_ampdu_density",proc_get_rx_ampdu_density,proc_set_rx_ampdu_density}, {"tx_ampdu_density",proc_get_tx_ampdu_density,proc_set_tx_ampdu_density}, #endif /* CONFIG_80211N_HT */ {"en_fwps", proc_get_en_fwps, proc_set_en_fwps}, //{"path_rssi", proc_get_two_path_rssi, NULL}, // {"rssi_disp",proc_get_rssi_disp, proc_set_rssi_disp}, #ifdef CONFIG_BT_COEXIST {"btcoex_dbg", proc_get_btcoex_dbg, proc_set_btcoex_dbg}, {"btcoex", proc_get_btcoex_info, NULL}, {"btinfo_evt", proc_get_dummy, proc_set_btinfo_evt}, #endif /* CONFIG_BT_COEXIST */ #if defined(DBG_CONFIG_ERROR_DETECT) {"sreset", proc_get_sreset, proc_set_sreset}, #endif /* DBG_CONFIG_ERROR_DETECT */ {"linked_info_dump",proc_get_linked_info_dump,proc_set_linked_info_dump}, #ifdef CONFIG_GPIO_API {"get_gpio",proc_get_gpio,proc_set_gpio}, {"set_gpio_output_value",proc_get_dummy,proc_set_gpio_output_value}, {"config_gpio",proc_get_dummy,proc_set_config_gpio}, #endif #ifdef CONFIG_DBG_COUNTER {"rx_logs", proc_get_rx_logs, NULL}, {"tx_logs", proc_get_tx_logs, NULL}, {"int_logs", proc_get_int_logs, NULL}, #endif #ifdef CONFIG_PCI_HCI {"rx_ring", proc_get_rx_ring, NULL}, {"tx_ring", proc_get_tx_ring, NULL}, #endif {"chan_plan",proc_get_chan_plan,proc_set_chan_plan}, {"new_bcn_max", proc_get_new_bcn_max, proc_set_new_bcn_max}, {"sink_udpport",proc_get_udpport,proc_set_udpport}, }; const int adapter_proc_hdls_num = sizeof(adapter_proc_hdls) / sizeof(struct rtw_proc_hdl); static int rtw_adapter_proc_open(struct inode *inode, struct file *file) { ssize_t index = (ssize_t)PDE_DATA(inode); const struct rtw_proc_hdl *hdl = adapter_proc_hdls+index; return single_open(file, hdl->show, proc_get_parent_data(inode)); } static ssize_t rtw_adapter_proc_write(struct file *file, const char __user *buffer, size_t count, loff_t *pos) { ssize_t index = (ssize_t)PDE_DATA(file_inode(file)); const struct rtw_proc_hdl *hdl = adapter_proc_hdls+index; ssize_t (*write)(struct file *, const char __user *, size_t, loff_t *, void *) = hdl->write; if (write) return write(file, buffer, count, pos, ((struct seq_file *)file->private_data)->private); return -EROFS; } static const struct file_operations rtw_adapter_proc_fops = { .owner = THIS_MODULE, .open = rtw_adapter_proc_open, .read = seq_read, .llseek = seq_lseek, .release = single_release, .write = rtw_adapter_proc_write, }; int proc_get_odm_dbg_comp(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); rtw_odm_dbg_comp_msg(m, adapter); return 0; } ssize_t proc_set_odm_dbg_comp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; u64 dbg_comp; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%llx", &dbg_comp); if (num != 1) return count; rtw_odm_dbg_comp_set(adapter, dbg_comp); } return count; } int proc_get_odm_dbg_level(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); rtw_odm_dbg_level_msg(m, adapter); return 0; } ssize_t proc_set_odm_dbg_level(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; u32 dbg_level; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%u", &dbg_level); if (num != 1) return count; rtw_odm_dbg_level_set(adapter, dbg_level); } return count; } int proc_get_odm_ability(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); rtw_odm_ability_msg(m, adapter); return 0; } ssize_t proc_set_odm_ability(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; u32 ability; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%x", &ability); if (num != 1) return count; rtw_odm_ability_set(adapter, ability); } return count; } int proc_get_odm_adaptivity(struct seq_file *m, void *v) { struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); rtw_odm_adaptivity_parm_msg(m, padapter); return 0; } ssize_t proc_set_odm_adaptivity(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); char tmp[32]; u32 TH_L2H_ini; s8 TH_EDCCA_HL_diff; u32 IGI_Base; int ForceEDCCA; u8 AdapEn_RSSI; u8 IGI_LowerBound; if (count < 1) return -EFAULT; if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { int num = sscanf(tmp, "%x %hhd %x %d %hhu %hhu", &TH_L2H_ini, &TH_EDCCA_HL_diff, &IGI_Base, &ForceEDCCA, &AdapEn_RSSI, &IGI_LowerBound); if (num != 6) return count; rtw_odm_adaptivity_parm_set(padapter, (s8)TH_L2H_ini, TH_EDCCA_HL_diff, (s8)IGI_Base, (bool)ForceEDCCA, AdapEn_RSSI, IGI_LowerBound); } return count; } /* * rtw_odm_proc: * init/deinit when register/unregister net_device, along with rtw_adapter_proc */ const struct rtw_proc_hdl odm_proc_hdls [] = { {"dbg_comp", proc_get_odm_dbg_comp, proc_set_odm_dbg_comp}, {"dbg_level", proc_get_odm_dbg_level, proc_set_odm_dbg_level}, {"ability", proc_get_odm_ability, proc_set_odm_ability}, {"adaptivity", proc_get_odm_adaptivity, proc_set_odm_adaptivity}, }; const int odm_proc_hdls_num = sizeof(odm_proc_hdls) / sizeof(struct rtw_proc_hdl); static int rtw_odm_proc_open(struct inode *inode, struct file *file) { ssize_t index = (ssize_t)PDE_DATA(inode); const struct rtw_proc_hdl *hdl = odm_proc_hdls+index; return single_open(file, hdl->show, proc_get_parent_data(inode)); } static ssize_t rtw_odm_proc_write(struct file *file, const char __user *buffer, size_t count, loff_t *pos) { ssize_t index = (ssize_t)PDE_DATA(file_inode(file)); const struct rtw_proc_hdl *hdl = odm_proc_hdls+index; ssize_t (*write)(struct file *, const char __user *, size_t, loff_t *, void *) = hdl->write; if (write) return write(file, buffer, count, pos, ((struct seq_file *)file->private_data)->private); return -EROFS; } static const struct file_operations rtw_odm_proc_fops = { .owner = THIS_MODULE, .open = rtw_odm_proc_open, .read = seq_read, .llseek = seq_lseek, .release = single_release, .write = rtw_odm_proc_write, }; struct proc_dir_entry *rtw_odm_proc_init(struct net_device *dev) { struct proc_dir_entry *dir_odm = NULL; struct proc_dir_entry *entry = NULL; _adapter *adapter = rtw_netdev_priv(dev); ssize_t i; if (adapter->dir_dev == NULL) { rtw_warn_on(1); goto exit; } if (adapter->dir_odm != NULL) { rtw_warn_on(1); goto exit; } dir_odm = rtw_proc_create_dir("odm", adapter->dir_dev, dev); if (dir_odm == NULL) { rtw_warn_on(1); goto exit; } adapter->dir_odm = dir_odm; for (i=0;idir_odm; if (dir_odm == NULL) { rtw_warn_on(1); return; } for (i=0;idir_dev); adapter->dir_odm = NULL; } struct proc_dir_entry *rtw_adapter_proc_init(struct net_device *dev) { struct proc_dir_entry *drv_proc = get_rtw_drv_proc(); struct proc_dir_entry *dir_dev = NULL; struct proc_dir_entry *entry = NULL; _adapter *adapter = rtw_netdev_priv(dev); u8 rf_type; ssize_t i; if (drv_proc == NULL) { rtw_warn_on(1); goto exit; } if (adapter->dir_dev != NULL) { rtw_warn_on(1); goto exit; } dir_dev = rtw_proc_create_dir(dev->name, drv_proc, dev); if (dir_dev == NULL) { rtw_warn_on(1); goto exit; } adapter->dir_dev = dir_dev; for (i=0;idir_dev; if (dir_dev == NULL) { rtw_warn_on(1); return; } for (i=0;iname, drv_proc); adapter->dir_dev = NULL; } void rtw_adapter_proc_replace(struct net_device *dev) { struct proc_dir_entry *drv_proc = get_rtw_drv_proc(); struct proc_dir_entry *dir_dev = NULL; _adapter *adapter = rtw_netdev_priv(dev); int i; dir_dev = adapter->dir_dev; if (dir_dev == NULL) { rtw_warn_on(1); return; } for (i=0;iold_ifname, drv_proc); adapter->dir_dev = NULL; rtw_adapter_proc_init(dev); } #endif /* CONFIG_PROC_DEBUG */ rtl8812au-4.3.8.12175.20140902+dfsg/os_dep/linux/rtw_proc.h000066400000000000000000000034461261122257400221260ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __RTW_PROC_H__ #define __RTW_PROC_H__ #include #include struct rtw_proc_hdl { char *name; int (*show)(struct seq_file *, void *); ssize_t (*write)(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); }; #ifdef CONFIG_PROC_DEBUG struct proc_dir_entry *get_rtw_drv_proc(void); int rtw_drv_proc_init(void); void rtw_drv_proc_deinit(void); struct proc_dir_entry *rtw_adapter_proc_init(struct net_device *dev); void rtw_adapter_proc_deinit(struct net_device *dev); void rtw_adapter_proc_replace(struct net_device *dev); #else //!CONFIG_PROC_DEBUG #define get_rtw_drv_proc() NULL #define rtw_drv_proc_init() 0 #define rtw_drv_proc_deinit() do {} while (0) #define rtw_adapter_proc_init(dev) NULL #define rtw_adapter_proc_deinit(dev) do {} while (0) #define rtw_adapter_proc_replace(dev) do {} while (0) #endif //!CONFIG_PROC_DEBUG #endif //__RTW_PROC_H__ rtl8812au-4.3.8.12175.20140902+dfsg/os_dep/linux/usb_intf.c000066400000000000000000001554221261122257400220750ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _HCI_INTF_C_ #include #include #ifndef CONFIG_USB_HCI #error "CONFIG_USB_HCI shall be on!\n" #endif #if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) #error "Shall be Linux or Windows, but not both!\n" #endif #ifdef CONFIG_80211N_HT extern int rtw_ht_enable; extern int rtw_bw_mode; extern int rtw_ampdu_enable;//for enable tx_ampdu #endif #ifdef CONFIG_GLOBAL_UI_PID int ui_pid[3] = {0, 0, 0}; #endif extern int pm_netdev_open(struct net_device *pnetdev,u8 bnormal); static int rtw_suspend(struct usb_interface *intf, pm_message_t message); static int rtw_resume(struct usb_interface *intf); static int rtw_drv_init(struct usb_interface *pusb_intf,const struct usb_device_id *pdid); static void rtw_dev_remove(struct usb_interface *pusb_intf); static void rtw_dev_shutdown(struct device *dev) { struct usb_interface *usb_intf = container_of(dev, struct usb_interface, dev); struct dvobj_priv *dvobj = NULL; _adapter *adapter = NULL; int i; DBG_871X("%s\n", __func__); if(usb_intf) { dvobj = usb_get_intfdata(usb_intf); if (dvobj) { for (i = 0; iiface_nums; i++) { adapter = dvobj->padapters[i]; if (adapter) { adapter->bSurpriseRemoved = _TRUE; } } ATOMIC_SET(&dvobj->continual_io_error, MAX_CONTINUAL_IO_ERR+1); } } } #if (LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,23)) /* Some useful macros to use to create struct usb_device_id */ #define USB_DEVICE_ID_MATCH_VENDOR 0x0001 #define USB_DEVICE_ID_MATCH_PRODUCT 0x0002 #define USB_DEVICE_ID_MATCH_DEV_LO 0x0004 #define USB_DEVICE_ID_MATCH_DEV_HI 0x0008 #define USB_DEVICE_ID_MATCH_DEV_CLASS 0x0010 #define USB_DEVICE_ID_MATCH_DEV_SUBCLASS 0x0020 #define USB_DEVICE_ID_MATCH_DEV_PROTOCOL 0x0040 #define USB_DEVICE_ID_MATCH_INT_CLASS 0x0080 #define USB_DEVICE_ID_MATCH_INT_SUBCLASS 0x0100 #define USB_DEVICE_ID_MATCH_INT_PROTOCOL 0x0200 #define USB_DEVICE_ID_MATCH_INT_NUMBER 0x0400 #define USB_DEVICE_ID_MATCH_INT_INFO \ (USB_DEVICE_ID_MATCH_INT_CLASS | \ USB_DEVICE_ID_MATCH_INT_SUBCLASS | \ USB_DEVICE_ID_MATCH_INT_PROTOCOL) #define USB_DEVICE_AND_INTERFACE_INFO(vend, prod, cl, sc, pr) \ .match_flags = USB_DEVICE_ID_MATCH_INT_INFO \ | USB_DEVICE_ID_MATCH_DEVICE, \ .idVendor = (vend), \ .idProduct = (prod), \ .bInterfaceClass = (cl), \ .bInterfaceSubClass = (sc), \ .bInterfaceProtocol = (pr) /** * USB_VENDOR_AND_INTERFACE_INFO - describe a specific usb vendor with a class of usb interfaces * @vend: the 16 bit USB Vendor ID * @cl: bInterfaceClass value * @sc: bInterfaceSubClass value * @pr: bInterfaceProtocol value * * This macro is used to create a struct usb_device_id that matches a * specific vendor with a specific class of interfaces. * * This is especially useful when explicitly matching devices that have * vendor specific bDeviceClass values, but standards-compliant interfaces. */ #define USB_VENDOR_AND_INTERFACE_INFO(vend, cl, sc, pr) \ .match_flags = USB_DEVICE_ID_MATCH_INT_INFO \ | USB_DEVICE_ID_MATCH_VENDOR, \ .idVendor = (vend), \ .bInterfaceClass = (cl), \ .bInterfaceSubClass = (sc), \ .bInterfaceProtocol = (pr) /* ----------------------------------------------------------------------- */ #endif #define USB_VENDER_ID_REALTEK 0x0BDA /* DID_USB_v916_20130116 */ static struct usb_device_id rtw_usb_id_tbl[] ={ #ifdef CONFIG_RTL8192C /*=== Realtek demoboard ===*/ /****** 8188CUS ********/ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8176),.driver_info = RTL8188C_8192C},/* 8188cu 1*1 dongole */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8170),.driver_info = RTL8188C_8192C},/* 8188CE-VAU USB minCard */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817E),.driver_info = RTL8188C_8192C},/* 8188CE-VAU USB minCard */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817A),.driver_info = RTL8188C_8192C},/* 8188cu Slim Solo */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817B),.driver_info = RTL8188C_8192C},/* 8188cu Slim Combo */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817D),.driver_info = RTL8188C_8192C},/* 8188RU High-power USB Dongle */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8754),.driver_info = RTL8188C_8192C},/* 8188 Combo for BC4 */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817F),.driver_info = RTL8188C_8192C},/* 8188RU */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x818A),.driver_info = RTL8188C_8192C},/* RTL8188CUS-VL */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x018A),.driver_info = RTL8188C_8192C},/* RTL8188CTV */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x17C0),.driver_info = RTL8188C_8192C},/* RTK demoboard - USB-N10E */ /****** 8192CUS ********/ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8177),.driver_info = RTL8188C_8192C},/* 8191cu 1*2 */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8178),.driver_info = RTL8188C_8192C},/* 8192cu 2*2 */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817C),.driver_info = RTL8188C_8192C},/* 8192CE-VAU USB minCard */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8191),.driver_info = RTL8188C_8192C},/* 8192CU 2*2 */ {USB_DEVICE(0x1058, 0x0631),.driver_info = RTL8188C_8192C},/* Alpha, 8192CU */ /*=== Customer ID ===*/ /****** 8188CUS Dongle ********/ {USB_DEVICE(0x2019, 0xED17),.driver_info = RTL8188C_8192C},/* PCI - Edimax */ {USB_DEVICE(0x0DF6, 0x0052),.driver_info = RTL8188C_8192C},/* Sitecom - Edimax */ {USB_DEVICE(0x7392, 0x7811),.driver_info = RTL8188C_8192C},/* Edimax - Edimax */ {USB_DEVICE(0x07B8, 0x8189),.driver_info = RTL8188C_8192C},/* Abocom - Abocom */ {USB_DEVICE(0x0EB0, 0x9071),.driver_info = RTL8188C_8192C},/* NO Brand - Etop */ {USB_DEVICE(0x06F8, 0xE033),.driver_info = RTL8188C_8192C},/* Hercules - Edimax */ {USB_DEVICE(0x103C, 0x1629),.driver_info = RTL8188C_8192C},/* HP - Lite-On ,8188CUS Slim Combo */ {USB_DEVICE(0x2001, 0x3308),.driver_info = RTL8188C_8192C},/* D-Link - Alpha */ {USB_DEVICE(0x050D, 0x1102),.driver_info = RTL8188C_8192C},/* Belkin - Edimax */ {USB_DEVICE(0x2019, 0xAB2A),.driver_info = RTL8188C_8192C},/* Planex - Abocom */ {USB_DEVICE(0x20F4, 0x648B),.driver_info = RTL8188C_8192C},/* TRENDnet - Cameo */ {USB_DEVICE(0x4855, 0x0090),.driver_info = RTL8188C_8192C},/* - Feixun */ {USB_DEVICE(0x13D3, 0x3357),.driver_info = RTL8188C_8192C},/* - AzureWave */ {USB_DEVICE(0x0DF6, 0x005C),.driver_info = RTL8188C_8192C},/* Sitecom - Edimax */ {USB_DEVICE(0x0BDA, 0x5088),.driver_info = RTL8188C_8192C},/* Thinkware - CC&C */ {USB_DEVICE(0x4856, 0x0091),.driver_info = RTL8188C_8192C},/* NetweeN - Feixun */ {USB_DEVICE(0x0846, 0x9041),.driver_info = RTL8188C_8192C}, /* Netgear - Cameo */ {USB_DEVICE(0x2019, 0x4902),.driver_info = RTL8188C_8192C},/* Planex - Etop */ {USB_DEVICE(0x2019, 0xAB2E),.driver_info = RTL8188C_8192C},/* SW-WF02-AD15 -Abocom */ {USB_DEVICE(0x2001, 0x330B),.driver_info = RTL8188C_8192C}, /* D-LINK - T&W */ {USB_DEVICE(0xCDAB, 0x8010),.driver_info = RTL8188C_8192C}, /* - - compare */ {USB_DEVICE(0x0B05, 0x17BA),.driver_info = RTL8188C_8192C}, /* ASUS - Edimax */ {USB_DEVICE(0x0BDA, 0x1E1E),.driver_info = RTL8188C_8192C}, /* Intel - - */ {USB_DEVICE(0x04BB, 0x094c),.driver_info = RTL8188C_8192C}, /* I-O DATA - Edimax */ /****** 8188CTV ********/ {USB_DEVICE(0xCDAB, 0x8011),.driver_info = RTL8188C_8192C}, /* - - compare */ {USB_DEVICE(0x0BDA, 0x0A8A),.driver_info = RTL8188C_8192C}, /* Sony - Foxconn */ /****** 8188 RU ********/ {USB_DEVICE(0x0BDA, 0x317F),.driver_info = RTL8188C_8192C},/* Netcore,Netcore */ /****** 8188CE-VAU ********/ {USB_DEVICE(0x13D3, 0x3359),.driver_info = RTL8188C_8192C},/* - Azwave */ {USB_DEVICE(0x13D3, 0x3358),.driver_info = RTL8188C_8192C},/* - Azwave */ /****** 8188CUS Slim Solo********/ {USB_DEVICE(0x04F2, 0xAFF7),.driver_info = RTL8188C_8192C},/* XAVI - XAVI */ {USB_DEVICE(0x04F2, 0xAFF9),.driver_info = RTL8188C_8192C},/* XAVI - XAVI */ {USB_DEVICE(0x04F2, 0xAFFA),.driver_info = RTL8188C_8192C},/* XAVI - XAVI */ /****** 8188CUS Slim Combo ********/ {USB_DEVICE(0x04F2, 0xAFF8),.driver_info = RTL8188C_8192C},/* XAVI - XAVI */ {USB_DEVICE(0x04F2, 0xAFFB),.driver_info = RTL8188C_8192C},/* XAVI - XAVI */ {USB_DEVICE(0x04F2, 0xAFFC),.driver_info = RTL8188C_8192C},/* XAVI - XAVI */ {USB_DEVICE(0x2019, 0x1201),.driver_info = RTL8188C_8192C},/* Planex - Vencer */ /****** 8192CUS Dongle ********/ {USB_DEVICE(0x2001, 0x3307),.driver_info = RTL8188C_8192C},/* D-Link - Cameo */ {USB_DEVICE(0x2001, 0x330A),.driver_info = RTL8188C_8192C},/* D-Link - Alpha */ {USB_DEVICE(0x2001, 0x3309),.driver_info = RTL8188C_8192C},/* D-Link - Alpha */ {USB_DEVICE(0x0586, 0x341F),.driver_info = RTL8188C_8192C},/* Zyxel - Abocom */ {USB_DEVICE(0x7392, 0x7822),.driver_info = RTL8188C_8192C},/* Edimax - Edimax */ {USB_DEVICE(0x2019, 0xAB2B),.driver_info = RTL8188C_8192C},/* Planex - Abocom */ {USB_DEVICE(0x07B8, 0x8178),.driver_info = RTL8188C_8192C},/* Abocom - Abocom */ {USB_DEVICE(0x07AA, 0x0056),.driver_info = RTL8188C_8192C},/* ATKK - Gemtek */ {USB_DEVICE(0x4855, 0x0091),.driver_info = RTL8188C_8192C},/* - Feixun */ {USB_DEVICE(0x050D, 0x2102),.driver_info = RTL8188C_8192C},/* Belkin - Sercomm */ {USB_DEVICE(0x050D, 0x2103),.driver_info = RTL8188C_8192C},/* Belkin - Edimax */ {USB_DEVICE(0x20F4, 0x624D),.driver_info = RTL8188C_8192C},/* TRENDnet */ {USB_DEVICE(0x0DF6, 0x0061),.driver_info = RTL8188C_8192C},/* Sitecom - Edimax */ {USB_DEVICE(0x0B05, 0x17AB),.driver_info = RTL8188C_8192C},/* ASUS - Edimax */ {USB_DEVICE(0x0846, 0x9021),.driver_info = RTL8188C_8192C},/* Netgear - Sercomm */ {USB_DEVICE(0x0846, 0xF001),.driver_info = RTL8188C_8192C}, /* Netgear - Sercomm */ {USB_DEVICE(0x0E66, 0x0019),.driver_info = RTL8188C_8192C},/* Hawking,Edimax */ {USB_DEVICE(0x0E66, 0x0020),.driver_info = RTL8188C_8192C}, /* Hawking - Edimax */ {USB_DEVICE(0x050D, 0x1004),.driver_info = RTL8188C_8192C}, /* Belkin - Edimax */ {USB_DEVICE(0x0BDA, 0x2E2E),.driver_info = RTL8188C_8192C}, /* Intel - - */ {USB_DEVICE(0x2357, 0x0100),.driver_info = RTL8188C_8192C}, /* TP-Link - TP-Link */ {USB_DEVICE(0x06F8, 0xE035),.driver_info = RTL8188C_8192C}, /* Hercules - Edimax */ {USB_DEVICE(0x04BB, 0x0950),.driver_info = RTL8188C_8192C}, /* IO-DATA - Edimax */ {USB_DEVICE(0x0DF6, 0x0070),.driver_info = RTL8188C_8192C}, /* Sitecom - Edimax */ {USB_DEVICE(0x0789, 0x016D),.driver_info = RTL8188C_8192C}, /* LOGITEC - Edimax */ /****** 8192CE-VAU ********/ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8186),.driver_info = RTL8188C_8192C},/* Intel-Xavi( Azwave) */ #endif #ifdef CONFIG_RTL8192D /*=== Realtek demoboard ===*/ /****** 8192DU ********/ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8193),.driver_info = RTL8192D},/* 8192DU-VC */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8194),.driver_info = RTL8192D},/* 8192DU-VS */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8111),.driver_info = RTL8192D},/* Realtek 5G dongle for WiFi Display */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x0193),.driver_info = RTL8192D},/* 8192DE-VAU */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8171),.driver_info = RTL8192D},/* 8192DU-VC */ /*=== Customer ID ===*/ /****** 8192DU-VC ********/ {USB_DEVICE(0x2019, 0xAB2C),.driver_info = RTL8192D},/* PCI - Abocm */ {USB_DEVICE(0x2019, 0x4903),.driver_info = RTL8192D},/* PCI - ETOP */ {USB_DEVICE(0x2019, 0x4904),.driver_info = RTL8192D},/* PCI - ETOP */ {USB_DEVICE(0x07B8, 0x8193),.driver_info = RTL8192D},/* Abocom - Abocom */ /****** 8192DU-VS ********/ {USB_DEVICE(0x20F4, 0x664B),.driver_info = RTL8192D},/* TRENDnet */ {USB_DEVICE(0x04DD, 0x954F),.driver_info = RTL8192D}, /* Sharp */ {USB_DEVICE(0x04DD, 0x96A6),.driver_info = RTL8192D}, /* Sharp */ {USB_DEVICE(0x050D, 0x110A),.driver_info = RTL8192D}, /* Belkin - Edimax */ {USB_DEVICE(0x050D, 0x1105),.driver_info = RTL8192D}, /* Belkin - Edimax */ {USB_DEVICE(0x050D, 0x120A),.driver_info = RTL8192D}, /* Belkin - Edimax */ {USB_DEVICE(0x1668, 0x8102),.driver_info = RTL8192D}, /* - */ {USB_DEVICE(0x0BDA, 0xE194),.driver_info = RTL8192D}, /* - Edimax */ /****** 8192DU-WiFi Display Dongle ********/ {USB_DEVICE(0x2019, 0xAB2D),.driver_info = RTL8192D},/* Planex - Abocom ,5G dongle for WiFi Display */ #endif #ifdef CONFIG_RTL8723A {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0x8724,0xff,0xff,0xff),.driver_info = RTL8723A}, /* 8723AU 1*1 */ {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0x1724,0xff,0xff,0xff),.driver_info = RTL8723A}, /* 8723AU 1*1 */ {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0x0724,0xff,0xff,0xff),.driver_info = RTL8723A}, /* 8723AU 1*1 */ #endif #ifdef CONFIG_RTL8188E /*=== Realtek demoboard ===*/ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8179),.driver_info = RTL8188E}, /* 8188EUS */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x0179),.driver_info = RTL8188E}, /* 8188ETV */ /*=== Customer ID ===*/ /****** 8188EUS ********/ {USB_DEVICE(0x07B8, 0x8179),.driver_info = RTL8188E}, /* Abocom - Abocom */ #endif #ifdef CONFIG_RTL8812A /*=== Realtek demoboard ===*/ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8812),.driver_info = RTL8812},/* Default ID */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x881A),.driver_info = RTL8812},/* Default ID */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x881B),.driver_info = RTL8812},/* Default ID */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x881C),.driver_info = RTL8812},/* Default ID */ /*=== Customer ID ===*/ {USB_DEVICE(0x050D, 0x1106),.driver_info = RTL8812}, /* Belkin - sercomm */ {USB_DEVICE(0x2001, 0x330E),.driver_info = RTL8812}, /* D-Link - ALPHA */ {USB_DEVICE(0x7392, 0xA822),.driver_info = RTL8812}, /* Edimax - Edimax */ {USB_DEVICE(0x0DF6, 0x0074),.driver_info = RTL8812}, /* Sitecom - Edimax */ {USB_DEVICE(0x04BB, 0x0952),.driver_info = RTL8812}, /* I-O DATA - Edimax */ {USB_DEVICE(0x0789, 0x016E),.driver_info = RTL8812}, /* Logitec - Edimax */ {USB_DEVICE(0x0409, 0x0408),.driver_info = RTL8812}, /* NEC - */ {USB_DEVICE(0x0B05, 0x17D2),.driver_info = RTL8812}, /* ASUS - Edimax */ {USB_DEVICE(0x0E66, 0x0022),.driver_info = RTL8812}, /* HAWKING - Edimax */ {USB_DEVICE(0x0586, 0x3426),.driver_info = RTL8812}, /* ZyXEL - */ {USB_DEVICE(0x2001, 0x3313),.driver_info = RTL8812}, /* D-Link - ALPHA */ {USB_DEVICE(0x1058, 0x0632),.driver_info = RTL8812}, /* WD - Cybertan*/ {USB_DEVICE(0x1740, 0x0100),.driver_info = RTL8812}, /* EnGenius - EnGenius */ {USB_DEVICE(0x2019, 0xAB30),.driver_info = RTL8812}, /* Planex - Abocom */ {USB_DEVICE(0x07B8, 0x8812),.driver_info = RTL8812}, /* Abocom - Abocom */ {USB_DEVICE(0x2001, 0x3315),.driver_info = RTL8812}, /* D-Link - Cameo */ {USB_DEVICE(0x2001, 0x3316),.driver_info = RTL8812}, /* D-Link - Cameo */ #endif #ifdef CONFIG_RTL8821A /*=== Realtek demoboard ===*/ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x0811),.driver_info = RTL8821},/* Default ID */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x0821),.driver_info = RTL8821},/* Default ID */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8822),.driver_info = RTL8821},/* Default ID */ {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0x0820,0xff,0xff,0xff),.driver_info = RTL8821}, /* 8821AU */ /*=== Customer ID ===*/ {USB_DEVICE(0x7392, 0xA811),.driver_info = RTL8821}, /* Edimax - Edimax */ {USB_DEVICE(0x04BB, 0x0953),.driver_info = RTL8821}, /* I-O DATA - Edimax */ {USB_DEVICE(0x2001, 0x3314),.driver_info = RTL8821}, /* D-Link - Cameo */ {USB_DEVICE(0x2001, 0x3318),.driver_info = RTL8821}, /* D-Link - Cameo */ {USB_DEVICE(0x0E66, 0x0023),.driver_info = RTL8821}, /* HAWKING - Edimax */ #endif #ifdef CONFIG_RTL8192E /*=== Realtek demoboard ===*/ {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0x818B,0xff,0xff,0xff),.driver_info = RTL8192E},/* Default ID */ {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0x818C,0xff,0xff,0xff),.driver_info = RTL8192E},/* Default ID */ #endif #ifdef CONFIG_RTL8723B //*=== Realtek demoboard ===*/ {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xB720,0xff,0xff,0xff),.driver_info = RTL8723B}, /* 8723BU 1*1 */ //{USB_DEVICE(USB_VENDER_ID_REALTEK, 0xB720),.driver_info = RTL8723B}, /* 8723BU */ #endif {} /* Terminating entry */ }; MODULE_DEVICE_TABLE(usb, rtw_usb_id_tbl); int const rtw_usb_id_len = sizeof(rtw_usb_id_tbl) / sizeof(struct usb_device_id); static struct specific_device_id specific_device_id_tbl[] = { {.idVendor=USB_VENDER_ID_REALTEK, .idProduct=0x8177, .flags=SPEC_DEV_ID_DISABLE_HT},//8188cu 1*1 dongole, (b/g mode only) {.idVendor=USB_VENDER_ID_REALTEK, .idProduct=0x817E, .flags=SPEC_DEV_ID_DISABLE_HT},//8188CE-VAU USB minCard (b/g mode only) {.idVendor=0x0b05, .idProduct=0x1791, .flags=SPEC_DEV_ID_DISABLE_HT}, {.idVendor=0x13D3, .idProduct=0x3311, .flags=SPEC_DEV_ID_DISABLE_HT}, {.idVendor=0x13D3, .idProduct=0x3359, .flags=SPEC_DEV_ID_DISABLE_HT},//Russian customer -Azwave (8188CE-VAU g mode) #ifdef RTK_DMP_PLATFORM {.idVendor=USB_VENDER_ID_REALTEK, .idProduct=0x8111, .flags=SPEC_DEV_ID_ASSIGN_IFNAME}, // Realtek 5G dongle for WiFi Display {.idVendor=0x2019, .idProduct=0xAB2D, .flags=SPEC_DEV_ID_ASSIGN_IFNAME}, // PCI-Abocom 5G dongle for WiFi Display #endif /* RTK_DMP_PLATFORM */ {} }; struct rtw_usb_drv { struct usb_driver usbdrv; int drv_registered; u8 hw_type; }; struct rtw_usb_drv usb_drv = { .usbdrv.name =(char*)DRV_NAME, .usbdrv.probe = rtw_drv_init, .usbdrv.disconnect = rtw_dev_remove, .usbdrv.id_table = rtw_usb_id_tbl, .usbdrv.suspend = rtw_suspend, .usbdrv.resume = rtw_resume, #if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 22)) .usbdrv.reset_resume = rtw_resume, #endif #ifdef CONFIG_AUTOSUSPEND .usbdrv.supports_autosuspend = 1, #endif #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19)) .usbdrv.drvwrap.driver.shutdown = rtw_dev_shutdown, #else .usbdrv.driver.shutdown = rtw_dev_shutdown, #endif }; static inline int RT_usb_endpoint_dir_in(const struct usb_endpoint_descriptor *epd) { return ((epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN); } static inline int RT_usb_endpoint_dir_out(const struct usb_endpoint_descriptor *epd) { return ((epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT); } static inline int RT_usb_endpoint_xfer_int(const struct usb_endpoint_descriptor *epd) { return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT); } static inline int RT_usb_endpoint_xfer_bulk(const struct usb_endpoint_descriptor *epd) { return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK); } static inline int RT_usb_endpoint_is_bulk_in(const struct usb_endpoint_descriptor *epd) { return (RT_usb_endpoint_xfer_bulk(epd) && RT_usb_endpoint_dir_in(epd)); } static inline int RT_usb_endpoint_is_bulk_out(const struct usb_endpoint_descriptor *epd) { return (RT_usb_endpoint_xfer_bulk(epd) && RT_usb_endpoint_dir_out(epd)); } static inline int RT_usb_endpoint_is_int_in(const struct usb_endpoint_descriptor *epd) { return (RT_usb_endpoint_xfer_int(epd) && RT_usb_endpoint_dir_in(epd)); } static inline int RT_usb_endpoint_num(const struct usb_endpoint_descriptor *epd) { return epd->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; } static u8 rtw_init_intf_priv(struct dvobj_priv *dvobj) { u8 rst = _SUCCESS; #ifdef CONFIG_USB_VENDOR_REQ_MUTEX _rtw_mutex_init(&dvobj->usb_vendor_req_mutex); #endif #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC dvobj->usb_alloc_vendor_req_buf = rtw_zmalloc(MAX_USB_IO_CTL_SIZE); if (dvobj->usb_alloc_vendor_req_buf == NULL) { DBG_871X("alloc usb_vendor_req_buf failed... /n"); rst = _FAIL; goto exit; } dvobj->usb_vendor_req_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(dvobj->usb_alloc_vendor_req_buf ), ALIGNMENT_UNIT); exit: #endif return rst; } static u8 rtw_deinit_intf_priv(struct dvobj_priv *dvobj) { u8 rst = _SUCCESS; #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC if(dvobj->usb_vendor_req_buf) rtw_mfree(dvobj->usb_alloc_vendor_req_buf, MAX_USB_IO_CTL_SIZE); #endif #ifdef CONFIG_USB_VENDOR_REQ_MUTEX _rtw_mutex_free(&dvobj->usb_vendor_req_mutex); #endif return rst; } static struct dvobj_priv *usb_dvobj_init(struct usb_interface *usb_intf) { int i; u8 val8; int status = _FAIL; struct dvobj_priv *pdvobjpriv; struct usb_device_descriptor *pdev_desc; struct usb_host_config *phost_conf; struct usb_config_descriptor *pconf_desc; struct usb_host_interface *phost_iface; struct usb_interface_descriptor *piface_desc; struct usb_host_endpoint *phost_endp; struct usb_endpoint_descriptor *pendp_desc; struct usb_device *pusbd; _func_enter_; if((pdvobjpriv = devobj_init()) == NULL) { goto exit; } pdvobjpriv->pusbintf = usb_intf ; pusbd = pdvobjpriv->pusbdev = interface_to_usbdev(usb_intf); usb_set_intfdata(usb_intf, pdvobjpriv); pdvobjpriv->RtNumInPipes = 0; pdvobjpriv->RtNumOutPipes = 0; //padapter->EepromAddressSize = 6; //pdvobjpriv->nr_endpoint = 6; pdev_desc = &pusbd->descriptor; #if 0 DBG_871X("\n8712_usb_device_descriptor:\n"); DBG_871X("bLength=%x\n", pdev_desc->bLength); DBG_871X("bDescriptorType=%x\n", pdev_desc->bDescriptorType); DBG_871X("bcdUSB=%x\n", pdev_desc->bcdUSB); DBG_871X("bDeviceClass=%x\n", pdev_desc->bDeviceClass); DBG_871X("bDeviceSubClass=%x\n", pdev_desc->bDeviceSubClass); DBG_871X("bDeviceProtocol=%x\n", pdev_desc->bDeviceProtocol); DBG_871X("bMaxPacketSize0=%x\n", pdev_desc->bMaxPacketSize0); DBG_871X("idVendor=%x\n", pdev_desc->idVendor); DBG_871X("idProduct=%x\n", pdev_desc->idProduct); DBG_871X("bcdDevice=%x\n", pdev_desc->bcdDevice); DBG_871X("iManufacturer=%x\n", pdev_desc->iManufacturer); DBG_871X("iProduct=%x\n", pdev_desc->iProduct); DBG_871X("iSerialNumber=%x\n", pdev_desc->iSerialNumber); DBG_871X("bNumConfigurations=%x\n", pdev_desc->bNumConfigurations); #endif phost_conf = pusbd->actconfig; pconf_desc = &phost_conf->desc; #if 0 DBG_871X("\n8712_usb_configuration_descriptor:\n"); DBG_871X("bLength=%x\n", pconf_desc->bLength); DBG_871X("bDescriptorType=%x\n", pconf_desc->bDescriptorType); DBG_871X("wTotalLength=%x\n", pconf_desc->wTotalLength); DBG_871X("bNumInterfaces=%x\n", pconf_desc->bNumInterfaces); DBG_871X("bConfigurationValue=%x\n", pconf_desc->bConfigurationValue); DBG_871X("iConfiguration=%x\n", pconf_desc->iConfiguration); DBG_871X("bmAttributes=%x\n", pconf_desc->bmAttributes); DBG_871X("bMaxPower=%x\n", pconf_desc->bMaxPower); #endif //DBG_871X("\n/****** num of altsetting = (%d) ******/\n", pusb_interface->num_altsetting); phost_iface = &usb_intf->altsetting[0]; piface_desc = &phost_iface->desc; #if 0 DBG_871X("\n8712_usb_interface_descriptor:\n"); DBG_871X("bLength=%x\n", piface_desc->bLength); DBG_871X("bDescriptorType=%x\n", piface_desc->bDescriptorType); DBG_871X("bInterfaceNumber=%x\n", piface_desc->bInterfaceNumber); DBG_871X("bAlternateSetting=%x\n", piface_desc->bAlternateSetting); DBG_871X("bNumEndpoints=%x\n", piface_desc->bNumEndpoints); DBG_871X("bInterfaceClass=%x\n", piface_desc->bInterfaceClass); DBG_871X("bInterfaceSubClass=%x\n", piface_desc->bInterfaceSubClass); DBG_871X("bInterfaceProtocol=%x\n", piface_desc->bInterfaceProtocol); DBG_871X("iInterface=%x\n", piface_desc->iInterface); #endif pdvobjpriv->NumInterfaces = pconf_desc->bNumInterfaces; pdvobjpriv->InterfaceNumber = piface_desc->bInterfaceNumber; pdvobjpriv->nr_endpoint = piface_desc->bNumEndpoints; //DBG_871X("\ndump usb_endpoint_descriptor:\n"); for (i = 0; i < pdvobjpriv->nr_endpoint; i++) { phost_endp = phost_iface->endpoint + i; if (phost_endp) { pendp_desc = &phost_endp->desc; DBG_871X("\nusb_endpoint_descriptor(%d):\n", i); DBG_871X("bLength=%x\n",pendp_desc->bLength); DBG_871X("bDescriptorType=%x\n",pendp_desc->bDescriptorType); DBG_871X("bEndpointAddress=%x\n",pendp_desc->bEndpointAddress); //DBG_871X("bmAttributes=%x\n",pendp_desc->bmAttributes); DBG_871X("wMaxPacketSize=%d\n",le16_to_cpu(pendp_desc->wMaxPacketSize)); DBG_871X("bInterval=%x\n",pendp_desc->bInterval); //DBG_871X("bRefresh=%x\n",pendp_desc->bRefresh); //DBG_871X("bSynchAddress=%x\n",pendp_desc->bSynchAddress); if (RT_usb_endpoint_is_bulk_in(pendp_desc)) { DBG_871X("RT_usb_endpoint_is_bulk_in = %x\n", RT_usb_endpoint_num(pendp_desc)); pdvobjpriv->RtInPipe[pdvobjpriv->RtNumInPipes] = RT_usb_endpoint_num(pendp_desc); pdvobjpriv->RtNumInPipes++; } else if (RT_usb_endpoint_is_int_in(pendp_desc)) { DBG_871X("RT_usb_endpoint_is_int_in = %x, Interval = %x\n", RT_usb_endpoint_num(pendp_desc),pendp_desc->bInterval); pdvobjpriv->RtInPipe[pdvobjpriv->RtNumInPipes] = RT_usb_endpoint_num(pendp_desc); pdvobjpriv->RtNumInPipes++; } else if (RT_usb_endpoint_is_bulk_out(pendp_desc)) { DBG_871X("RT_usb_endpoint_is_bulk_out = %x\n", RT_usb_endpoint_num(pendp_desc)); pdvobjpriv->RtOutPipe[pdvobjpriv->RtNumOutPipes] = RT_usb_endpoint_num(pendp_desc); pdvobjpriv->RtNumOutPipes++; } pdvobjpriv->ep_num[i] = RT_usb_endpoint_num(pendp_desc); } } DBG_871X("nr_endpoint=%d, in_num=%d, out_num=%d\n\n", pdvobjpriv->nr_endpoint, pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes); switch(pusbd->speed) { case USB_SPEED_LOW: DBG_871X("USB_SPEED_LOW\n"); pdvobjpriv->usb_speed = RTW_USB_SPEED_1_1; break; case USB_SPEED_FULL: DBG_871X("USB_SPEED_FULL\n"); pdvobjpriv->usb_speed = RTW_USB_SPEED_1_1; break; case USB_SPEED_HIGH: DBG_871X("USB_SPEED_HIGH\n"); pdvobjpriv->usb_speed = RTW_USB_SPEED_2; break; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)) case USB_SPEED_SUPER: DBG_871X("USB_SPEED_SUPER\n"); pdvobjpriv->usb_speed = RTW_USB_SPEED_3; break; #endif default: DBG_871X("USB_SPEED_UNKNOWN(%x)\n",pusbd->speed); pdvobjpriv->usb_speed = RTW_USB_SPEED_UNKNOWN; break; } if (pdvobjpriv->usb_speed == RTW_USB_SPEED_UNKNOWN) { DBG_871X("UNKNOWN USB SPEED MODE, ERROR !!!\n"); goto free_dvobj; } if (rtw_init_intf_priv(pdvobjpriv) == _FAIL) { RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't INIT rtw_init_intf_priv\n")); goto free_dvobj; } //.3 misc _rtw_init_sema(&(pdvobjpriv->usb_suspend_sema), 0); rtw_reset_continual_io_error(pdvobjpriv); usb_get_dev(pusbd); status = _SUCCESS; free_dvobj: if (status != _SUCCESS && pdvobjpriv) { usb_set_intfdata(usb_intf, NULL); devobj_deinit(pdvobjpriv); pdvobjpriv = NULL; } exit: _func_exit_; return pdvobjpriv; } static void usb_dvobj_deinit(struct usb_interface *usb_intf) { struct dvobj_priv *dvobj = usb_get_intfdata(usb_intf); _func_enter_; usb_set_intfdata(usb_intf, NULL); if (dvobj) { //Modify condition for 92DU DMDP 2010.11.18, by Thomas if ((dvobj->NumInterfaces != 2 && dvobj->NumInterfaces != 3) || (dvobj->InterfaceNumber == 1)) { if (interface_to_usbdev(usb_intf)->state != USB_STATE_NOTATTACHED) { //If we didn't unplug usb dongle and remove/insert modlue, driver fails on sitesurvey for the first time when device is up . //Reset usb port for sitesurvey fail issue. 2009.8.13, by Thomas DBG_871X("usb attached..., try to reset usb device\n"); usb_reset_device(interface_to_usbdev(usb_intf)); } } rtw_deinit_intf_priv(dvobj); devobj_deinit(dvobj); } //DBG_871X("%s %d\n", __func__, ATOMIC_READ(&usb_intf->dev.kobj.kref.refcount)); usb_put_dev(interface_to_usbdev(usb_intf)); _func_exit_; } static void rtw_decide_chip_type_by_usb_info(_adapter *padapter, const struct usb_device_id *pdid) { padapter->chip_type = pdid->driver_info; #ifdef CONFIG_RTL8192C if(padapter->chip_type == RTL8188C_8192C) rtl8192cu_set_hw_type(padapter); #endif #ifdef CONFIG_RTL8192D if(padapter->chip_type == RTL8192D) rtl8192du_set_hw_type(padapter); #endif #ifdef CONFIG_RTL8723A if(padapter->chip_type == RTL8723A) rtl8723au_set_hw_type(padapter); #endif #ifdef CONFIG_RTL8188E if(padapter->chip_type == RTL8188E) rtl8188eu_set_hw_type(padapter); #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) if(padapter->chip_type == RTL8812 || padapter->chip_type == RTL8821) rtl8812au_set_hw_type(padapter); #endif #ifdef CONFIG_RTL8192E if(padapter->chip_type == RTL8192E) rtl8192eu_set_hw_type(padapter); #endif #ifdef CONFIG_RTL8723B if(padapter->chip_type == RTL8723B) rtl8723bu_set_hw_type(padapter); #endif } void rtw_set_hal_ops(_adapter *padapter) { //alloc memory for HAL DATA rtw_hal_data_init(padapter); #ifdef CONFIG_RTL8192C if(padapter->chip_type == RTL8188C_8192C) rtl8192cu_set_hal_ops(padapter); #endif #ifdef CONFIG_RTL8192D if(padapter->chip_type == RTL8192D) rtl8192du_set_hal_ops(padapter); #endif #ifdef CONFIG_RTL8723A if(padapter->chip_type == RTL8723A) rtl8723au_set_hal_ops(padapter); #endif #ifdef CONFIG_RTL8188E if(padapter->chip_type == RTL8188E) rtl8188eu_set_hal_ops(padapter); #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) if(padapter->chip_type == RTL8812 || padapter->chip_type == RTL8821) rtl8812au_set_hal_ops(padapter); #endif #ifdef CONFIG_RTL8192E if(padapter->chip_type == RTL8192E) rtl8192eu_set_hal_ops(padapter); #endif #ifdef CONFIG_RTL8723B if(padapter->chip_type == RTL8723B) rtl8723bu_set_hal_ops(padapter); #endif } void usb_set_intf_ops(_adapter *padapter,struct _io_ops *pops) { #ifdef CONFIG_RTL8192C if(padapter->chip_type == RTL8188C_8192C) rtl8192cu_set_intf_ops(pops); #endif #ifdef CONFIG_RTL8192D if(padapter->chip_type == RTL8192D) rtl8192du_set_intf_ops(pops); #endif #ifdef CONFIG_RTL8723A if(padapter->chip_type == RTL8723A) rtl8723au_set_intf_ops(pops); #endif #ifdef CONFIG_RTL8188E if(padapter->chip_type == RTL8188E) rtl8188eu_set_intf_ops(pops); #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) if(padapter->chip_type == RTL8812 || padapter->chip_type == RTL8821) rtl8812au_set_intf_ops(pops); #endif #ifdef CONFIG_RTL8192E if(padapter->chip_type == RTL8192E) rtl8192eu_set_intf_ops(pops); #endif #ifdef CONFIG_RTL8723B if(padapter->chip_type == RTL8723B) rtl8723bu_set_intf_ops(pops); #endif } static void usb_intf_start(_adapter *padapter) { RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+usb_intf_start\n")); rtw_hal_inirp_init(padapter); RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-usb_intf_start\n")); } static void usb_intf_stop(_adapter *padapter) { RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+usb_intf_stop\n")); //disabel_hw_interrupt if(padapter->bSurpriseRemoved == _FALSE) { //device still exists, so driver can do i/o operation //TODO: RT_TRACE(_module_hci_intfs_c_,_drv_err_,("SurpriseRemoved==_FALSE\n")); } //cancel in irp rtw_hal_inirp_deinit(padapter); //cancel out irp rtw_write_port_cancel(padapter); //todo:cancel other irps RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-usb_intf_stop\n")); } static void process_spec_devid(const struct usb_device_id *pdid) { u16 vid, pid; u32 flags; int i; int num = sizeof(specific_device_id_tbl)/sizeof(struct specific_device_id); for(i=0; iidVendor==vid) && (pdid->idProduct==pid) && (flags&SPEC_DEV_ID_DISABLE_HT)) { rtw_ht_enable = 0; rtw_bw_mode = 0; rtw_ampdu_enable = 0; } #endif #ifdef RTK_DMP_PLATFORM // Change the ifname to wlan10 when PC side WFD dongle plugin on DMP platform. // It is used to distinguish between normal and PC-side wifi dongle/module. if((pdid->idVendor==vid) && (pdid->idProduct==pid) && (flags&SPEC_DEV_ID_ASSIGN_IFNAME)) { extern char* ifname; strncpy(ifname, "wlan10", 6); //DBG_871X("%s()-%d: ifname=%s, vid=%04X, pid=%04X\n", __FUNCTION__, __LINE__, ifname, vid, pid); } #endif /* RTK_DMP_PLATFORM */ } } #ifdef SUPPORT_HW_RFOFF_DETECTED int rtw_hw_suspend(_adapter *padapter ) { struct pwrctrl_priv *pwrpriv; struct usb_interface *pusb_intf; struct net_device *pnetdev; _func_enter_; if(NULL==padapter) goto error_exit; if((_FALSE==padapter->bup) || (_TRUE == padapter->bDriverStopped)||(_TRUE==padapter->bSurpriseRemoved)) { DBG_871X("padapter->bup=%d bDriverStopped=%d bSurpriseRemoved = %d\n", padapter->bup, padapter->bDriverStopped,padapter->bSurpriseRemoved); goto error_exit; } pwrpriv = adapter_to_pwrctl(padapter); pusb_intf = adapter_to_dvobj(padapter)->pusbintf; pnetdev = padapter->pnetdev; LeaveAllPowerSaveMode(padapter); DBG_871X("==> rtw_hw_suspend\n"); _enter_pwrlock(&pwrpriv->lock); pwrpriv->bips_processing = _TRUE; //padapter->net_closed = _TRUE; //s1. if(pnetdev) { netif_carrier_off(pnetdev); rtw_netif_stop_queue(pnetdev); } //s2. rtw_disassoc_cmd(padapter, 500, _FALSE); //s2-2. indicate disconnect to os //rtw_indicate_disconnect(padapter); { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; if(check_fwstate(pmlmepriv, _FW_LINKED)) { _clr_fwstate_(pmlmepriv, _FW_LINKED); rtw_led_control(padapter, LED_CTL_NO_LINK); rtw_os_indicate_disconnect(padapter); #ifdef CONFIG_LPS //donnot enqueue cmd rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_DISCONNECT, 0); #endif } } //s2-3. rtw_free_assoc_resources(padapter, 1); //s2-4. rtw_free_network_queue(padapter,_TRUE); #ifdef CONFIG_IPS rtw_ips_dev_unload(padapter); #endif pwrpriv->rf_pwrstate = rf_off; pwrpriv->bips_processing = _FALSE; _exit_pwrlock(&pwrpriv->lock); _func_exit_; return 0; error_exit: DBG_871X("%s, failed \n",__FUNCTION__); return (-1); } int rtw_hw_resume(_adapter *padapter) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct usb_interface *pusb_intf = adapter_to_dvobj(padapter)->pusbintf; struct net_device *pnetdev = padapter->pnetdev; _func_enter_; DBG_871X("==> rtw_hw_resume\n"); _enter_pwrlock(&pwrpriv->lock); pwrpriv->bips_processing = _TRUE; rtw_reset_drv_sw(padapter); if(pm_netdev_open(pnetdev,_FALSE) != 0) { _exit_pwrlock(&pwrpriv->lock); goto error_exit; } netif_device_attach(pnetdev); netif_carrier_on(pnetdev); rtw_netif_wake_queue(pnetdev); pwrpriv->bkeepfwalive = _FALSE; pwrpriv->brfoffbyhw = _FALSE; pwrpriv->rf_pwrstate = rf_on; pwrpriv->bips_processing = _FALSE; _exit_pwrlock(&pwrpriv->lock); _func_exit_; return 0; error_exit: DBG_871X("%s, Open net dev failed \n",__FUNCTION__); return (-1); } #endif static int rtw_suspend(struct usb_interface *pusb_intf, pm_message_t message) { struct dvobj_priv *dvobj; struct pwrctrl_priv *pwrpriv; struct debug_priv *pdbgpriv; PADAPTER padapter; int ret = 0; dvobj = usb_get_intfdata(pusb_intf); pwrpriv = dvobj_to_pwrctl(dvobj); pdbgpriv = &dvobj->drv_dbg; padapter = dvobj->if1; if (pwrpriv->bInSuspend == _TRUE) { DBG_871X("%s bInSuspend = %d\n", __FUNCTION__, pwrpriv->bInSuspend); pdbgpriv->dbg_suspend_error_cnt++; goto exit; } if((padapter->bup) || (padapter->bDriverStopped == _FALSE)||(padapter->bSurpriseRemoved == _FALSE)) { #ifdef CONFIG_AUTOSUSPEND if(pwrpriv->bInternalAutoSuspend ){ #ifdef SUPPORT_HW_RFOFF_DETECTED // The FW command register update must after MAC and FW init ready. if((padapter->bFWReady) && (pwrpriv->bHWPwrPindetect ) && (padapter->registrypriv.usbss_enable )) { u8 bOpen = _TRUE; rtw_interface_ps_func(padapter,HAL_USB_SELECT_SUSPEND,&bOpen); //rtl8192c_set_FwSelectSuspend_cmd(padapter,_TRUE ,500);//note fw to support hw power down ping detect } #endif//SUPPORT_HW_RFOFF_DETECTED } #endif//CONFIG_AUTOSUSPEND } ret = rtw_suspend_common(padapter); exit: return ret; } int rtw_resume_process(_adapter *padapter) { int ret,pm_cnt = 0; struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct dvobj_priv *pdvobj = padapter->dvobj; struct debug_priv *pdbgpriv = &pdvobj->drv_dbg; if (pwrpriv->bInSuspend == _FALSE) { pdbgpriv->dbg_resume_error_cnt++; DBG_871X("%s bInSuspend = %d\n", __FUNCTION__, pwrpriv->bInSuspend); return -1; } #if defined(CONFIG_BT_COEXIST) && defined(CONFIG_AUTOSUSPEND) //add by amy for 8723as-vau #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,32)) DBG_871X("%s...pm_usage_cnt(%d) pwrpriv->bAutoResume=%x. ....\n",__func__,atomic_read(&(adapter_to_dvobj(padapter)->pusbintf->pm_usage_cnt)),pwrpriv->bAutoResume); pm_cnt=atomic_read(&(adapter_to_dvobj(padapter)->pusbintf->pm_usage_cnt)); #else // kernel < 2.6.32 DBG_871X("...pm_usage_cnt(%d).....\n", adapter_to_dvobj(padapter)->pusbintf->pm_usage_cnt); pm_cnt = adapter_to_dvobj(padapter)->pusbintf->pm_usage_cnt; #endif // kernel < 2.6.32 DBG_871X("pwrpriv->bAutoResume (%x)\n",pwrpriv->bAutoResume ); if( _TRUE == pwrpriv->bAutoResume ){ pwrpriv->bInternalAutoSuspend = _FALSE; pwrpriv->bAutoResume=_FALSE; DBG_871X("pwrpriv->bAutoResume (%x) pwrpriv->bInternalAutoSuspend(%x)\n",pwrpriv->bAutoResume,pwrpriv->bInternalAutoSuspend ); } #endif //#ifdef CONFIG_BT_COEXIST &CONFIG_AUTOSUSPEND& #if defined (CONFIG_WOWLAN) || defined (CONFIG_AP_WOWLAN) /* * Due to usb wow suspend flow will cancel read/write port via intf_stop and * bReadPortCancel and bWritePortCancel are set _TRUE in intf_stop. * But they will not be clear in intf_start during wow resume flow. * It should move to os_intf in the feature. */ RTW_ENABLE_FUNC(padapter, DF_RX_BIT); RTW_ENABLE_FUNC(padapter, DF_TX_BIT); #endif ret = rtw_resume_common(padapter); #ifdef CONFIG_AUTOSUSPEND if(pwrpriv->bInternalAutoSuspend ) { #ifdef SUPPORT_HW_RFOFF_DETECTED // The FW command register update must after MAC and FW init ready. if((padapter->bFWReady) && (pwrpriv->bHWPwrPindetect) && (padapter->registrypriv.usbss_enable )) { //rtl8192c_set_FwSelectSuspend_cmd(padapter,_FALSE ,500);//note fw to support hw power down ping detect u8 bOpen = _FALSE; rtw_interface_ps_func(padapter,HAL_USB_SELECT_SUSPEND,&bOpen); } #endif #ifdef CONFIG_BT_COEXIST // for 8723as-vau DBG_871X("pwrpriv->bAutoResume (%x)\n",pwrpriv->bAutoResume ); if( _TRUE == pwrpriv->bAutoResume ){ pwrpriv->bInternalAutoSuspend = _FALSE; pwrpriv->bAutoResume=_FALSE; DBG_871X("pwrpriv->bAutoResume (%x) pwrpriv->bInternalAutoSuspend(%x)\n",pwrpriv->bAutoResume,pwrpriv->bInternalAutoSuspend ); } #else //#ifdef CONFIG_BT_COEXIST pwrpriv->bInternalAutoSuspend = _FALSE; #endif //#ifdef CONFIG_BT_COEXIST pwrpriv->brfoffbyhw = _FALSE; } #endif//CONFIG_AUTOSUSPEND return ret; } static int rtw_resume(struct usb_interface *pusb_intf) { struct dvobj_priv *dvobj; struct pwrctrl_priv *pwrpriv; struct debug_priv *pdbgpriv; PADAPTER padapter; struct mlme_ext_priv *pmlmeext; int ret = 0; dvobj = usb_get_intfdata(pusb_intf); pwrpriv = dvobj_to_pwrctl(dvobj); pdbgpriv = &dvobj->drv_dbg; padapter = dvobj->if1; pmlmeext = &padapter->mlmeextpriv; DBG_871X("==> %s (%s:%d)\n", __FUNCTION__, current->comm, current->pid); pdbgpriv->dbg_resume_cnt++; if(pwrpriv->bInternalAutoSuspend) { ret = rtw_resume_process(padapter); } else { if(pwrpriv->wowlan_mode || pwrpriv->wowlan_ap_mode) { rtw_resume_lock_suspend(); ret = rtw_resume_process(padapter); rtw_resume_unlock_suspend(); } else { #ifdef CONFIG_RESUME_IN_WORKQUEUE rtw_resume_in_workqueue(pwrpriv); #else if (rtw_is_earlysuspend_registered(pwrpriv)) { /* jeff: bypass resume here, do in late_resume */ rtw_set_do_late_resume(pwrpriv, _TRUE); } else { rtw_resume_lock_suspend(); ret = rtw_resume_process(padapter); rtw_resume_unlock_suspend(); } #endif } } pmlmeext->last_scan_time = rtw_get_current_time(); DBG_871X("<======== %s return %d\n", __FUNCTION__, ret); return ret; } #ifdef CONFIG_AUTOSUSPEND void autosuspend_enter(_adapter* padapter) { struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); DBG_871X("==>autosuspend_enter...........\n"); pwrpriv->bInternalAutoSuspend = _TRUE; pwrpriv->bips_processing = _TRUE; if(rf_off == pwrpriv->change_rfpwrstate ) { #ifndef CONFIG_BT_COEXIST #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) usb_enable_autosuspend(dvobj->pusbdev); #else dvobj->pusbdev->autosuspend_disabled = 0;//autosuspend disabled by the user #endif #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,33)) usb_autopm_put_interface(dvobj->pusbintf); #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,20)) usb_autopm_enable(dvobj->pusbintf); #else usb_autosuspend_device(dvobj->pusbdev, 1); #endif #else //#ifndef CONFIG_BT_COEXIST if(1==pwrpriv->autopm_cnt){ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) usb_enable_autosuspend(dvobj->pusbdev); #else dvobj->pusbdev->autosuspend_disabled = 0;//autosuspend disabled by the user #endif #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,33)) usb_autopm_put_interface(dvobj->pusbintf); #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,20)) usb_autopm_enable(dvobj->pusbintf); #else usb_autosuspend_device(dvobj->pusbdev, 1); #endif pwrpriv->autopm_cnt --; } else DBG_871X("0!=pwrpriv->autopm_cnt[%d] didn't usb_autopm_put_interface\n", pwrpriv->autopm_cnt); #endif //#ifndef CONFIG_BT_COEXIST } #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,32)) DBG_871X("...pm_usage_cnt(%d).....\n", atomic_read(&(dvobj->pusbintf->pm_usage_cnt))); #else DBG_871X("...pm_usage_cnt(%d).....\n", dvobj->pusbintf->pm_usage_cnt); #endif } int autoresume_enter(_adapter* padapter) { int result = _SUCCESS; struct security_priv* psecuritypriv=&(padapter->securitypriv); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); DBG_871X("====> autoresume_enter \n"); if(rf_off == pwrpriv->rf_pwrstate ) { pwrpriv->ps_flag = _FALSE; #ifndef CONFIG_BT_COEXIST #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,33)) if (usb_autopm_get_interface(dvobj->pusbintf) < 0) { DBG_871X( "can't get autopm: %d\n", result); result = _FAIL; goto error_exit; } #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,20)) usb_autopm_disable(dvobj->pusbintf); #else usb_autoresume_device(dvobj->pusbdev, 1); #endif #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,32)) DBG_871X("...pm_usage_cnt(%d).....\n", atomic_read(&(dvobj->pusbintf->pm_usage_cnt))); #else DBG_871X("...pm_usage_cnt(%d).....\n", dvobj->pusbintf->pm_usage_cnt); #endif #else //#ifndef CONFIG_BT_COEXIST pwrpriv->bAutoResume=_TRUE; if(0==pwrpriv->autopm_cnt){ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,33)) if (usb_autopm_get_interface(dvobj->pusbintf) < 0) { DBG_871X( "can't get autopm: %d\n", result); result = _FAIL; goto error_exit; } #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,20)) usb_autopm_disable(dvobj->pusbintf); #else usb_autoresume_device(dvobj->pusbdev, 1); #endif #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,32)) DBG_871X("...pm_usage_cnt(%d).....\n", atomic_read(&(dvobj->pusbintf->pm_usage_cnt))); #else DBG_871X("...pm_usage_cnt(%d).....\n", dvobj->pusbintf->pm_usage_cnt); #endif pwrpriv->autopm_cnt++; } else DBG_871X("0!=pwrpriv->autopm_cnt[%d] didn't usb_autopm_get_interface\n",pwrpriv->autopm_cnt); #endif //#ifndef CONFIG_BT_COEXIST } DBG_871X("<==== autoresume_enter \n"); error_exit: return result; } #endif #ifdef CONFIG_PLATFORM_RTD2880B extern void rtd2885_wlan_netlink_sendMsg(char *action_string, char *name); #endif /* * drv_init() - a device potentially for us * * notes: drv_init() is called when the bus driver has located a card for us to support. * We accept the new device by returning 0. */ _adapter *rtw_sw_export = NULL; _adapter *rtw_usb_if1_init(struct dvobj_priv *dvobj, struct usb_interface *pusb_intf, const struct usb_device_id *pdid) { _adapter *padapter = NULL; struct net_device *pnetdev = NULL; int status = _FAIL; if ((padapter = (_adapter *)rtw_zvmalloc(sizeof(*padapter))) == NULL) { goto exit; } padapter->dvobj = dvobj; dvobj->if1 = padapter; padapter->bDriverStopped=_TRUE; dvobj->padapters[dvobj->iface_nums++] = padapter; padapter->iface_id = IFACE_ID0; #if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_DUALMAC_CONCURRENT) //set adapter_type/iface type for primary padapter padapter->isprimary = _TRUE; padapter->adapter_type = PRIMARY_ADAPTER; #ifndef CONFIG_HWPORT_SWAP padapter->iface_type = IFACE_PORT0; #else padapter->iface_type = IFACE_PORT1; #endif #endif //step 1-1., decide the chip_type via driver_info padapter->interface_type = RTW_USB; rtw_decide_chip_type_by_usb_info(padapter, pdid); if (rtw_handle_dualmac(padapter, 1) != _SUCCESS) goto free_adapter; if((pnetdev = rtw_init_netdev(padapter)) == NULL) { goto handle_dualmac; } SET_NETDEV_DEV(pnetdev, dvobj_to_dev(dvobj)); padapter = rtw_netdev_priv(pnetdev); #ifdef CONFIG_IOCTL_CFG80211 if(rtw_wdev_alloc(padapter, dvobj_to_dev(dvobj)) != 0) { goto handle_dualmac; } #endif //step 2. hook HalFunc, allocate HalData //hal_set_hal_ops(padapter); rtw_set_hal_ops(padapter); padapter->intf_start=&usb_intf_start; padapter->intf_stop=&usb_intf_stop; //step init_io_priv rtw_init_io_priv(padapter,usb_set_intf_ops); //step read_chip_version rtw_hal_read_chip_version(padapter); //step usb endpoint mapping rtw_hal_chip_configure(padapter); #ifdef CONFIG_BT_COEXIST rtw_btcoex_Initialize(padapter); #endif // CONFIG_BT_COEXIST //step read efuse/eeprom data and get mac_addr rtw_hal_read_chip_info(padapter); //step 5. if(rtw_init_drv_sw(padapter) ==_FAIL) { RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Initialize driver software resource Failed!\n")); goto free_hal_data; } #ifdef CONFIG_PM #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18)) if(dvobj_to_pwrctl(dvobj)->bSupportRemoteWakeup) { dvobj->pusbdev->do_remote_wakeup=1; pusb_intf->needs_remote_wakeup = 1; device_init_wakeup(&pusb_intf->dev, 1); DBG_871X("pwrctrlpriv.bSupportRemoteWakeup~~~~~~\n"); DBG_871X("pwrctrlpriv.bSupportRemoteWakeup~~~[%d]~~~\n",device_may_wakeup(&pusb_intf->dev)); } #endif #endif #ifdef CONFIG_AUTOSUSPEND if( padapter->registrypriv.power_mgnt != PS_MODE_ACTIVE ) { if(padapter->registrypriv.usbss_enable ){ /* autosuspend (2s delay) */ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,38)) dvobj->pusbdev->dev.power.autosuspend_delay = 0 * HZ;//15 * HZ; idle-delay time #else dvobj->pusbdev->autosuspend_delay = 0 * HZ;//15 * HZ; idle-delay time #endif #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) usb_enable_autosuspend(dvobj->pusbdev); #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,34)) padapter->bDisableAutosuspend = dvobj->pusbdev->autosuspend_disabled ; dvobj->pusbdev->autosuspend_disabled = 0;//autosuspend disabled by the user #endif //usb_autopm_get_interface(adapter_to_dvobj(padapter)->pusbintf );//init pm_usage_cnt ,let it start from 1 #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,32)) DBG_871X("%s...pm_usage_cnt(%d).....\n",__FUNCTION__,atomic_read(&(dvobj->pusbintf ->pm_usage_cnt))); #else DBG_871X("%s...pm_usage_cnt(%d).....\n",__FUNCTION__,dvobj->pusbintf ->pm_usage_cnt); #endif } } #endif //2012-07-11 Move here to prevent the 8723AS-VAU BT auto suspend influence #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,33)) if (usb_autopm_get_interface(pusb_intf) < 0) { DBG_871X( "can't get autopm: \n"); } #endif #ifdef CONFIG_BT_COEXIST dvobj_to_pwrctl(dvobj)->autopm_cnt=1; #endif // set mac addr rtw_macaddr_cfg(padapter->eeprompriv.mac_addr); #ifdef CONFIG_P2P rtw_init_wifidirect_addrs(padapter, padapter->eeprompriv.mac_addr, padapter->eeprompriv.mac_addr); #endif // CONFIG_P2P DBG_871X("bDriverStopped:%d, bSurpriseRemoved:%d, bup:%d, hw_init_completed:%d\n" , padapter->bDriverStopped , padapter->bSurpriseRemoved , padapter->bup , padapter->hw_init_completed ); status = _SUCCESS; free_hal_data: if(status != _SUCCESS && padapter->HalData) rtw_mfree(padapter->HalData, sizeof(*(padapter->HalData))); free_wdev: if(status != _SUCCESS) { #ifdef CONFIG_IOCTL_CFG80211 rtw_wdev_unregister(padapter->rtw_wdev); rtw_wdev_free(padapter->rtw_wdev); #endif } handle_dualmac: if (status != _SUCCESS) rtw_handle_dualmac(padapter, 0); free_adapter: if (status != _SUCCESS) { if (pnetdev) rtw_free_netdev(pnetdev); else rtw_vmfree((u8*)padapter, sizeof(*padapter)); padapter = NULL; } exit: return padapter; } static void rtw_usb_if1_deinit(_adapter *if1) { struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(if1); struct net_device *pnetdev = if1->pnetdev; struct mlme_priv *pmlmepriv= &if1->mlmepriv; if(check_fwstate(pmlmepriv, _FW_LINKED)) rtw_disassoc_cmd(if1, 0, _FALSE); #ifdef CONFIG_AP_MODE free_mlme_ap_info(if1); #ifdef CONFIG_HOSTAPD_MLME hostapd_mode_unload(if1); #endif #endif rtw_cancel_all_timer(if1); #ifdef CONFIG_WOWLAN pwrctl->wowlan_mode=_FALSE; #endif //CONFIG_WOWLAN rtw_dev_unload(if1); DBG_871X("+r871xu_dev_remove, hw_init_completed=%d\n", if1->hw_init_completed); rtw_handle_dualmac(if1, 0); #ifdef CONFIG_IOCTL_CFG80211 if(if1->rtw_wdev) { rtw_wdev_free(if1->rtw_wdev); } #endif #ifdef CONFIG_BT_COEXIST if(1 == pwrctl->autopm_cnt){ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,33)) usb_autopm_put_interface(adapter_to_dvobj(if1)->pusbintf); #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,20)) usb_autopm_enable(adapter_to_dvobj(if1)->pusbintf); #else usb_autosuspend_device(adapter_to_dvobj(if1)->pusbdev, 1); #endif pwrctl->autopm_cnt --; } #endif rtw_free_drv_sw(if1); if(pnetdev) rtw_free_netdev(pnetdev); #ifdef CONFIG_PLATFORM_RTD2880B DBG_871X("wlan link down\n"); rtd2885_wlan_netlink_sendMsg("linkdown", "8712"); #endif } static int rtw_drv_init(struct usb_interface *pusb_intf, const struct usb_device_id *pdid) { _adapter *if1 = NULL, *if2 = NULL; int status = _FAIL; struct dvobj_priv *dvobj; #ifdef CONFIG_MULTI_VIR_IFACES int i; #endif //CONFIG_MULTI_VIR_IFACES RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+rtw_drv_init\n")); //DBG_871X("+rtw_drv_init\n"); //step 0. process_spec_devid(pdid); /* Initialize dvobj_priv */ if ((dvobj = usb_dvobj_init(pusb_intf)) == NULL) { RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("initialize device object priv Failed!\n")); goto exit; } if ((if1 = rtw_usb_if1_init(dvobj, pusb_intf, pdid)) == NULL) { DBG_871X("rtw_usb_if1_init Failed!\n"); goto free_dvobj; } #ifdef CONFIG_CONCURRENT_MODE if((if2 = rtw_drv_if2_init(if1, usb_set_intf_ops)) == NULL) { goto free_if1; } #ifdef CONFIG_MULTI_VIR_IFACES for(i=0; iregistrypriv.ext_iface_num;i++) { if(rtw_drv_add_vir_if(if1, usb_set_intf_ops) == NULL) { DBG_871X("rtw_drv_add_iface failed! (%d)\n", i); goto free_if2; } } #endif //CONFIG_MULTI_VIR_IFACES #endif #ifdef CONFIG_INTEL_PROXIM rtw_sw_export=if1; #endif #ifdef CONFIG_GLOBAL_UI_PID if(ui_pid[1]!=0) { DBG_871X("ui_pid[1]:%d\n",ui_pid[1]); rtw_signal_process(ui_pid[1], SIGUSR2); } #endif //dev_alloc_name && register_netdev if((status = rtw_drv_register_netdev(if1)) != _SUCCESS) { goto free_if2; } #ifdef CONFIG_HOSTAPD_MLME hostapd_mode_init(if1); #endif #ifdef CONFIG_PLATFORM_RTD2880B DBG_871X("wlan link up\n"); rtd2885_wlan_netlink_sendMsg("linkup", "8712"); #endif RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-871x_drv - drv_init, success!\n")); status = _SUCCESS; free_if2: if(status != _SUCCESS && if2) { #ifdef CONFIG_CONCURRENT_MODE rtw_drv_if2_stop(if2); rtw_drv_if2_free(if2); #endif } free_if1: if (status != _SUCCESS && if1) { rtw_usb_if1_deinit(if1); } free_dvobj: if (status != _SUCCESS) usb_dvobj_deinit(pusb_intf); exit: return status == _SUCCESS?0:-ENODEV; } /* * dev_remove() - our device is being removed */ //rmmod module & unplug(SurpriseRemoved) will call r871xu_dev_remove() => how to recognize both static void rtw_dev_remove(struct usb_interface *pusb_intf) { struct dvobj_priv *dvobj = usb_get_intfdata(pusb_intf); struct pwrctrl_priv *pwrctl = dvobj_to_pwrctl(dvobj); _adapter *padapter = dvobj->if1; struct net_device *pnetdev = padapter->pnetdev; struct mlme_priv *pmlmepriv= &padapter->mlmepriv; _func_enter_; DBG_871X("+rtw_dev_remove\n"); RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+dev_remove()\n")); dvobj->processing_dev_remove = _TRUE; rtw_unregister_netdevs(dvobj); if(usb_drv.drv_registered == _TRUE) { //DBG_871X("r871xu_dev_remove():padapter->bSurpriseRemoved == _TRUE\n"); padapter->bSurpriseRemoved = _TRUE; } /*else { //DBG_871X("r871xu_dev_remove():module removed\n"); padapter->hw_init_completed = _FALSE; }*/ #if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) rtw_unregister_early_suspend(pwrctl); #endif rtw_pm_set_ips(padapter, IPS_NONE); rtw_pm_set_lps(padapter, PS_MODE_ACTIVE); LeaveAllPowerSaveMode(padapter); #ifdef CONFIG_CONCURRENT_MODE #ifdef CONFIG_MULTI_VIR_IFACES rtw_drv_stop_vir_ifaces(dvobj); #endif //CONFIG_MULTI_VIR_IFACES rtw_drv_if2_stop(dvobj->if2); #endif //CONFIG_CONCURRENT_MODE #ifdef CONFIG_BT_COEXIST rtw_btcoex_HaltNotify(padapter); #endif rtw_usb_if1_deinit(padapter); #ifdef CONFIG_CONCURRENT_MODE #ifdef CONFIG_MULTI_VIR_IFACES rtw_drv_free_vir_ifaces(dvobj); #endif //CONFIG_MULTI_VIR_IFACES rtw_drv_if2_free(dvobj->if2); #endif //CONFIG_CONCURRENT_MODE usb_dvobj_deinit(pusb_intf); RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-dev_remove()\n")); DBG_871X("-r871xu_dev_remove, done\n"); #ifdef CONFIG_INTEL_PROXIM rtw_sw_export=NULL; #endif _func_exit_; return; } #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)) extern int console_suspend_enabled; #endif static int __init rtw_drv_entry(void) { int ret = 0; DBG_871X_LEVEL(_drv_always_, "module init start\n"); dump_drv_version(RTW_DBGDUMP); #ifdef BTCOEXVERSION DBG_871X_LEVEL(_drv_always_, DRV_NAME" BT-Coex version = %s\n", BTCOEXVERSION); #endif // BTCOEXVERSION ret = platform_wifi_power_on(); if(ret != 0) { DBG_871X("%s: power on failed!!(%d)\n", __FUNCTION__, ret); ret = -1; goto exit; } #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)) //console_suspend_enabled=0; #endif usb_drv.drv_registered = _TRUE; rtw_suspend_lock_init(); rtw_drv_proc_init(); rtw_ndev_notifier_register(); ret = usb_register(&usb_drv.usbdrv); if (ret != 0) { usb_drv.drv_registered = _FALSE; rtw_suspend_lock_uninit(); rtw_drv_proc_deinit(); rtw_ndev_notifier_unregister(); goto exit; } exit: DBG_871X_LEVEL(_drv_always_, "module init ret=%d\n", ret); return ret; } static void __exit rtw_drv_halt(void) { DBG_871X_LEVEL(_drv_always_, "module exit start\n"); usb_drv.drv_registered = _FALSE; usb_deregister(&usb_drv.usbdrv); platform_wifi_power_off(); rtw_suspend_lock_uninit(); rtw_drv_proc_deinit(); rtw_ndev_notifier_unregister(); DBG_871X_LEVEL(_drv_always_, "module exit success\n"); rtw_mstat_dump(RTW_DBGDUMP); } module_init(rtw_drv_entry); module_exit(rtw_drv_halt); #ifdef CONFIG_INTEL_PROXIM _adapter *rtw_usb_get_sw_pointer(void) { return rtw_sw_export; } EXPORT_SYMBOL(rtw_usb_get_sw_pointer); #endif //CONFIG_INTEL_PROXIM rtl8812au-4.3.8.12175.20140902+dfsg/os_dep/linux/usb_ops_linux.c000066400000000000000000000755611261122257400231620ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * *******************************************************************************/ #define _USB_OPS_LINUX_C_ #include #include #include #ifdef CONFIG_RTL8192D #include #endif struct rtw_async_write_data { u8 data[VENDOR_CMD_MAX_DATA_LEN]; struct usb_ctrlrequest dr; }; int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype) { _adapter *padapter = pintfhdl->padapter; struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); struct pwrctrl_priv *pwrctl = dvobj_to_pwrctl(pdvobjpriv); struct usb_device *udev=pdvobjpriv->pusbdev; unsigned int pipe; int status = 0; u32 tmp_buflen=0; u8 reqtype; u8 *pIo_buf; int vendorreq_times = 0; #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE u8 *tmp_buf; #else // use stack memory u8 tmp_buf[MAX_USB_IO_CTL_SIZE]; #endif #ifdef CONFIG_CONCURRENT_MODE if(padapter->adapter_type > PRIMARY_ADAPTER) { padapter = padapter->pbuddy_adapter; pdvobjpriv = adapter_to_dvobj(padapter); udev = pdvobjpriv->pusbdev; } #endif //DBG_871X("%s %s:%d\n",__FUNCTION__, current->comm, current->pid); if (RTW_CANNOT_IO(padapter)){ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq:(RTW_CANNOT_IO)!!!\n")); status = -EPERM; goto exit; } if(len>MAX_VENDOR_REQ_CMD_SIZE){ DBG_8192C( "[%s] Buffer len error ,vendor request failed\n", __FUNCTION__ ); status = -EINVAL; goto exit; } #ifdef CONFIG_USB_VENDOR_REQ_MUTEX _enter_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL); #endif // Acquire IO memory for vendorreq #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC pIo_buf = pdvobjpriv->usb_vendor_req_buf; #else #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE tmp_buf = rtw_malloc( (u32) len + ALIGNMENT_UNIT); tmp_buflen = (u32)len + ALIGNMENT_UNIT; #else // use stack memory tmp_buflen = MAX_USB_IO_CTL_SIZE; #endif // Added by Albert 2010/02/09 // For mstar platform, mstar suggests the address for USB IO should be 16 bytes alignment. // Trying to fix it here. pIo_buf = (tmp_buf==NULL)?NULL:tmp_buf + ALIGNMENT_UNIT -((SIZE_PTR)(tmp_buf) & 0x0f ); #endif if ( pIo_buf== NULL) { DBG_8192C( "[%s] pIo_buf == NULL \n", __FUNCTION__ ); status = -ENOMEM; goto release_mutex; } while(++vendorreq_times<= MAX_USBCTRL_VENDORREQ_TIMES) { _rtw_memset(pIo_buf, 0, len); if (requesttype == 0x01) { pipe = usb_rcvctrlpipe(udev, 0);//read_in reqtype = REALTEK_USB_VENQT_READ; } else { pipe = usb_sndctrlpipe(udev, 0);//write_out reqtype = REALTEK_USB_VENQT_WRITE; _rtw_memcpy( pIo_buf, pdata, len); } status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len, RTW_USB_CONTROL_MSG_TIMEOUT); if ( status == len) // Success this control transfer. { rtw_reset_continual_io_error(pdvobjpriv); if ( requesttype == 0x01 ) { // For Control read transfer, we have to copy the read data from pIo_buf to pdata. _rtw_memcpy( pdata, pIo_buf, len ); } } else { // error cases DBG_8192C("reg 0x%x, usb %s %u fail, status:%d value=0x%x, vendorreq_times:%d\n" , value,(requesttype == 0x01)?"read":"write" , len, status, *(u32*)pdata, vendorreq_times); if (status < 0) { if(status == (-ESHUTDOWN) || status == -ENODEV ) { padapter->bSurpriseRemoved = _TRUE; } else { #ifdef DBG_CONFIG_ERROR_DETECT { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); pHalData->srestpriv.Wifi_Error_Status = USB_VEN_REQ_CMD_FAIL; } #endif } } else // status != len && status >= 0 { if(status > 0) { if ( requesttype == 0x01 ) { // For Control read transfer, we have to copy the read data from pIo_buf to pdata. _rtw_memcpy( pdata, pIo_buf, len ); } } } if(rtw_inc_and_chk_continual_io_error(pdvobjpriv) == _TRUE ){ padapter->bSurpriseRemoved = _TRUE; break; } } // firmware download is checksumed, don't retry if( (value >= FW_START_ADDRESS ) || status == len ) break; } // release IO memory used by vendorreq #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE rtw_mfree(tmp_buf, tmp_buflen); #endif release_mutex: #ifdef CONFIG_USB_VENDOR_REQ_MUTEX _exit_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL); #endif exit: return status; } #ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ static void _usbctrl_vendorreq_async_callback(struct urb *urb, struct pt_regs *regs) { if (urb) { if (urb->context) { rtw_mfree(urb->context, sizeof(struct rtw_async_write_data)); } usb_free_urb(urb); } } int _usbctrl_vendorreq_async_write(struct usb_device *udev, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype) { int rc; unsigned int pipe; u8 reqtype; struct usb_ctrlrequest *dr; struct urb *urb; struct rtw_async_write_data *buf; if (requesttype == VENDOR_READ) { pipe = usb_rcvctrlpipe(udev, 0);//read_in reqtype = REALTEK_USB_VENQT_READ; } else { pipe = usb_sndctrlpipe(udev, 0);//write_out reqtype = REALTEK_USB_VENQT_WRITE; } buf = (struct rtl819x_async_write_data *)rtw_zmalloc(sizeof(*buf)); if (!buf) { rc = -ENOMEM; goto exit; } urb = usb_alloc_urb(0, GFP_ATOMIC); if (!urb) { rtw_mfree((u8*)buf, sizeof(*buf)); rc = -ENOMEM; goto exit; } dr = &buf->dr; dr->bRequestType = reqtype; dr->bRequest = request; dr->wValue = cpu_to_le16(value); dr->wIndex = cpu_to_le16(index); dr->wLength = cpu_to_le16(len); _rtw_memcpy(buf, pdata, len); usb_fill_control_urb(urb, udev, pipe, (unsigned char *)dr, buf, len, _usbctrl_vendorreq_async_callback, buf); rc = usb_submit_urb(urb, GFP_ATOMIC); if (rc < 0) { rtw_mfree((u8*)buf, sizeof(*buf)); usb_free_urb(urb); } exit: return rc; } #endif /* CONFIG_USB_SUPPORT_ASYNC_VDN_REQ */ unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr) { unsigned int pipe=0, ep_num=0; struct usb_device *pusbd = pdvobj->pusbdev; if (addr == RECV_BULK_IN_ADDR) { pipe=usb_rcvbulkpipe(pusbd, pdvobj->RtInPipe[0]); } else if (addr == RECV_INT_IN_ADDR) { pipe=usb_rcvintpipe(pusbd, pdvobj->RtInPipe[1]); } else if (addr < HW_QUEUE_ENTRY) { ep_num = pdvobj->Queue2Pipe[addr]; pipe = usb_sndbulkpipe(pusbd, ep_num); } return pipe; } struct zero_bulkout_context{ void *pbuf; void *purb; void *pirp; void *padapter; }; static void usb_bulkout_zero_complete(struct urb *purb, struct pt_regs *regs) { struct zero_bulkout_context *pcontext = (struct zero_bulkout_context *)purb->context; //DBG_8192C("+usb_bulkout_zero_complete\n"); if(pcontext) { if(pcontext->pbuf) { rtw_mfree(pcontext->pbuf, sizeof(int)); } if(pcontext->purb && (pcontext->purb==purb)) { usb_free_urb(pcontext->purb); } rtw_mfree((u8*)pcontext, sizeof(struct zero_bulkout_context)); } } static u32 usb_bulkout_zero(struct intf_hdl *pintfhdl, u32 addr) { int pipe, status, len; u32 ret; unsigned char *pbuf; struct zero_bulkout_context *pcontext; PURB purb = NULL; _adapter *padapter = (_adapter *)pintfhdl->padapter; struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); struct pwrctrl_priv *pwrctl = dvobj_to_pwrctl(pdvobj); struct usb_device *pusbd = pdvobj->pusbdev; //DBG_871X("%s\n", __func__); if (RTW_CANNOT_TX(padapter)) { return _FAIL; } pcontext = (struct zero_bulkout_context *)rtw_zmalloc(sizeof(struct zero_bulkout_context)); if (pcontext == NULL) { return _FAIL; } pbuf = (unsigned char *)rtw_zmalloc(sizeof(int)); purb = usb_alloc_urb(0, GFP_ATOMIC); //translate DMA FIFO addr to pipehandle pipe = ffaddr2pipehdl(pdvobj, addr); len = 0; pcontext->pbuf = pbuf; pcontext->purb = purb; pcontext->pirp = NULL; pcontext->padapter = padapter; //translate DMA FIFO addr to pipehandle //pipe = ffaddr2pipehdl(pdvobj, addr); usb_fill_bulk_urb(purb, pusbd, pipe, pbuf, len, usb_bulkout_zero_complete, pcontext);//context is pcontext status = usb_submit_urb(purb, GFP_ATOMIC); if (!status) { ret= _SUCCESS; } else { ret= _FAIL; } return _SUCCESS; } void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) { } void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) { } void usb_read_port_cancel(struct intf_hdl *pintfhdl) { int i; struct recv_buf *precvbuf; _adapter *padapter = pintfhdl->padapter; precvbuf = (struct recv_buf *)padapter->recvpriv.precv_buf; DBG_871X("%s\n", __func__); for (i=0; i < NR_RECVBUFF ; i++) { precvbuf->reuse = _TRUE; if (precvbuf->purb) { //DBG_8192C("usb_read_port_cancel : usb_kill_urb \n"); usb_kill_urb(precvbuf->purb); } precvbuf++; } #ifdef CONFIG_USB_INTERRUPT_IN_PIPE usb_kill_urb(padapter->recvpriv.int_in_urb); #endif } static void usb_write_port_complete(struct urb *purb, struct pt_regs *regs) { _irqL irqL; int i; struct xmit_buf *pxmitbuf = (struct xmit_buf *)purb->context; //struct xmit_frame *pxmitframe = (struct xmit_frame *)pxmitbuf->priv_data; //_adapter *padapter = pxmitframe->padapter; _adapter *padapter = pxmitbuf->padapter; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; //struct pkt_attrib *pattrib = &pxmitframe->attrib; _func_enter_; switch(pxmitbuf->flags) { case VO_QUEUE_INX: pxmitpriv->voq_cnt--; break; case VI_QUEUE_INX: pxmitpriv->viq_cnt--; break; case BE_QUEUE_INX: pxmitpriv->beq_cnt--; break; case BK_QUEUE_INX: pxmitpriv->bkq_cnt--; break; default: break; } /* _enter_critical(&pxmitpriv->lock, &irqL); pxmitpriv->txirp_cnt--; switch(pattrib->priority) { case 1: case 2: pxmitpriv->bkq_cnt--; //DBG_8192C("pxmitpriv->bkq_cnt=%d\n", pxmitpriv->bkq_cnt); break; case 4: case 5: pxmitpriv->viq_cnt--; //DBG_8192C("pxmitpriv->viq_cnt=%d\n", pxmitpriv->viq_cnt); break; case 6: case 7: pxmitpriv->voq_cnt--; //DBG_8192C("pxmitpriv->voq_cnt=%d\n", pxmitpriv->voq_cnt); break; case 0: case 3: default: pxmitpriv->beq_cnt--; //DBG_8192C("pxmitpriv->beq_cnt=%d\n", pxmitpriv->beq_cnt); break; } _exit_critical(&pxmitpriv->lock, &irqL); if(pxmitpriv->txirp_cnt==0) { RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: txirp_cnt== 0, set allrxreturnevt!\n")); _rtw_up_sema(&(pxmitpriv->tx_retevt)); } */ //rtw_free_xmitframe(pxmitpriv, pxmitframe); if (RTW_CANNOT_TX(padapter)) { RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); DBG_8192C("%s(): TX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) pxmitbuf->buf_tag(%x) \n", __FUNCTION__,padapter->bDriverStopped, padapter->bSurpriseRemoved,pxmitbuf->buf_tag); goto check_completion; } if (purb->status==0) { } else { RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete : purb->status(%d) != 0 \n", purb->status)); DBG_871X("###=> urb_write_port_complete status(%d)\n",purb->status); if((purb->status==-EPIPE)||(purb->status==-EPROTO)) { //usb_clear_halt(pusbdev, purb->pipe); //msleep(10); sreset_set_wifi_error_status(padapter, USB_WRITE_PORT_FAIL); } else if (purb->status == -EINPROGRESS) { RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: EINPROGESS\n")); goto check_completion; } else if (purb->status == -ENOENT) { DBG_871X("%s: -ENOENT\n", __func__); goto check_completion; } else if (purb->status == -ECONNRESET) { DBG_871X("%s: -ECONNRESET\n", __func__); goto check_completion; } else if (purb->status == -ESHUTDOWN) { RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: ESHUTDOWN\n")); padapter->bDriverStopped=_TRUE; RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bDriverStopped=TRUE\n")); goto check_completion; } else { padapter->bSurpriseRemoved=_TRUE; DBG_8192C("bSurpriseRemoved=TRUE\n"); //rtl8192cu_trigger_gpio_0(padapter); RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bSurpriseRemoved=TRUE\n")); goto check_completion; } } #ifdef DBG_CONFIG_ERROR_DETECT { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); pHalData->srestpriv.last_tx_complete_time = rtw_get_current_time(); } #endif check_completion: _enter_critical(&pxmitpriv->lock_sctx, &irqL); rtw_sctx_done_err(&pxmitbuf->sctx, purb->status ? RTW_SCTX_DONE_WRITE_PORT_ERR : RTW_SCTX_DONE_SUCCESS); _exit_critical(&pxmitpriv->lock_sctx, &irqL); rtw_free_xmitbuf(pxmitpriv, pxmitbuf); //if(rtw_txframes_pending(padapter)) { tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); } _func_exit_; } u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) { _irqL irqL; unsigned int pipe; int status; u32 ret = _FAIL, bwritezero = _FALSE; PURB purb = NULL; _adapter *padapter = (_adapter *)pintfhdl->padapter; struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); struct pwrctrl_priv *pwrctl = dvobj_to_pwrctl(pdvobj); struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct xmit_buf *pxmitbuf = (struct xmit_buf *)wmem; struct xmit_frame *pxmitframe = (struct xmit_frame *)pxmitbuf->priv_data; struct usb_device *pusbd = pdvobj->pusbdev; struct pkt_attrib *pattrib = &pxmitframe->attrib; _func_enter_; RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("+usb_write_port\n")); if (RTW_CANNOT_TX(padapter)) { #ifdef DBG_TX DBG_871X(" DBG_TX %s:%d bDriverStopped%d, bSurpriseRemoved:%d\n",__FUNCTION__, __LINE__ ,padapter->bDriverStopped, padapter->bSurpriseRemoved); #endif RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved )!!!\n")); rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_TX_DENY); goto exit; } _enter_critical(&pxmitpriv->lock, &irqL); switch(addr) { case VO_QUEUE_INX: pxmitpriv->voq_cnt++; pxmitbuf->flags = VO_QUEUE_INX; break; case VI_QUEUE_INX: pxmitpriv->viq_cnt++; pxmitbuf->flags = VI_QUEUE_INX; break; case BE_QUEUE_INX: pxmitpriv->beq_cnt++; pxmitbuf->flags = BE_QUEUE_INX; break; case BK_QUEUE_INX: pxmitpriv->bkq_cnt++; pxmitbuf->flags = BK_QUEUE_INX; break; case HIGH_QUEUE_INX: pxmitbuf->flags = HIGH_QUEUE_INX; break; default: pxmitbuf->flags = MGT_QUEUE_INX; break; } _exit_critical(&pxmitpriv->lock, &irqL); purb = pxmitbuf->pxmit_urb[0]; //translate DMA FIFO addr to pipehandle pipe = ffaddr2pipehdl(pdvobj, addr); #ifdef CONFIG_REDUCE_USB_TX_INT if ( (pxmitpriv->free_xmitbuf_cnt%NR_XMITBUFF == 0) || (pxmitbuf->buf_tag > XMITBUF_DATA) ) { purb->transfer_flags &= (~URB_NO_INTERRUPT); } else { purb->transfer_flags |= URB_NO_INTERRUPT; //DBG_8192C("URB_NO_INTERRUPT "); } #endif usb_fill_bulk_urb(purb, pusbd, pipe, pxmitframe->buf_addr, //= pxmitbuf->pbuf cnt, usb_write_port_complete, pxmitbuf);//context is pxmitbuf #ifdef CONFIG_USE_USB_BUFFER_ALLOC_TX purb->transfer_dma = pxmitbuf->dma_transfer_addr; purb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; purb->transfer_flags |= URB_ZERO_PACKET; #endif // CONFIG_USE_USB_BUFFER_ALLOC_TX #ifdef USB_PACKET_OFFSET_SZ #if (USB_PACKET_OFFSET_SZ == 0) purb->transfer_flags |= URB_ZERO_PACKET; #endif #endif #if 0 if (bwritezero) { purb->transfer_flags |= URB_ZERO_PACKET; } #endif status = usb_submit_urb(purb, GFP_ATOMIC); if (!status) { #ifdef DBG_CONFIG_ERROR_DETECT { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); pHalData->srestpriv.last_tx_time = rtw_get_current_time(); } #endif } else { rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_WRITE_PORT_ERR); DBG_871X("usb_write_port, status=%d\n", status); RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port(): usb_submit_urb, status=%x\n", status)); switch (status) { case -ENODEV: padapter->bDriverStopped=_TRUE; break; default: break; } goto exit; } ret= _SUCCESS; // Commented by Albert 2009/10/13 // We add the URB_ZERO_PACKET flag to urb so that the host will send the zero packet automatically. /* if(bwritezero == _TRUE) { usb_bulkout_zero(pintfhdl, addr); } */ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("-usb_write_port\n")); exit: if (ret != _SUCCESS) rtw_free_xmitbuf(pxmitpriv, pxmitbuf); _func_exit_; return ret; } void usb_write_port_cancel(struct intf_hdl *pintfhdl) { int i, j; _adapter *padapter = pintfhdl->padapter; struct xmit_buf *pxmitbuf = (struct xmit_buf *)padapter->xmitpriv.pxmitbuf; DBG_871X("%s \n", __func__); for (i=0; ipxmit_urb[j]) { usb_kill_urb(pxmitbuf->pxmit_urb[j]); } } pxmitbuf++; } pxmitbuf = (struct xmit_buf*)padapter->xmitpriv.pxmit_extbuf; for (i = 0; i < NR_XMIT_EXTBUFF ; i++) { for (j=0; j<8; j++) { if(pxmitbuf->pxmit_urb[j]) { usb_kill_urb(pxmitbuf->pxmit_urb[j]); } } pxmitbuf++; } } void usb_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf) { precvbuf->transfer_len = 0; precvbuf->len = 0; precvbuf->ref_cnt = 0; if(precvbuf->pbuf) { precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pbuf; precvbuf->pend = precvbuf->pdata + MAX_RECVBUF_SZ; } } int recvbuf2recvframe( _adapter *padapter, #ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX struct recv_buf *precvbuf #else _pkt *pskb #endif ); #ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX void usb_recv_tasklet(void *priv) { struct recv_buf *precvbuf = NULL; _adapter *padapter = (_adapter*)priv; struct recv_priv *precvpriv = &padapter->recvpriv; while (NULL != (precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue))) { if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) { DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n"); break; } recvbuf2recvframe(padapter, precvbuf); rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); } } void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) { struct recv_buf *precvbuf = (struct recv_buf *)purb->context; _adapter *padapter =(_adapter *)precvbuf->adapter; struct recv_priv *precvpriv = &padapter->recvpriv; RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n")); ATOMIC_DEC(&(precvpriv->rx_pending_cnt)); if (RTW_CANNOT_RX(padapter)) { RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved)); DBG_8192C("%s() RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) \n", __FUNCTION__,padapter->bDriverStopped, padapter->bSurpriseRemoved); goto exit; } if(purb->status==0)//SUCCESS { if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) { RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n")); rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); } else { rtw_reset_continual_io_error(adapter_to_dvobj(padapter)); precvbuf->transfer_len = purb->actual_length; //rtw_enqueue_rx_transfer_buffer(precvpriv, rx_transfer_buf); rtw_enqueue_recvbuf(precvbuf, &precvpriv->recv_buf_pending_queue); tasklet_schedule(&precvpriv->recv_tasklet); } } else { RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status)); DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status); if(rtw_inc_and_chk_continual_io_error(adapter_to_dvobj(padapter)) == _TRUE ){ padapter->bSurpriseRemoved = _TRUE; } switch(purb->status) { case -EINVAL: case -EPIPE: case -ENODEV: case -ESHUTDOWN: //padapter->bSurpriseRemoved=_TRUE; //RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n")); case -ENOENT: padapter->bDriverStopped=_TRUE; RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n")); break; case -EPROTO: case -EILSEQ: case -ETIME: case -ECOMM: case -EOVERFLOW: #ifdef DBG_CONFIG_ERROR_DETECT { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); pHalData->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL; } #endif rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); break; case -EINPROGRESS: DBG_8192C("ERROR: URB IS IN PROGRESS!/n"); break; default: break; } } exit: _func_exit_; } u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) { int err; unsigned int pipe; u32 ret = _SUCCESS; PURB purb = NULL; struct recv_buf *precvbuf = (struct recv_buf *)rmem; _adapter *adapter = pintfhdl->padapter; struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); struct pwrctrl_priv *pwrctl = dvobj_to_pwrctl(pdvobj); struct recv_priv *precvpriv = &adapter->recvpriv; struct usb_device *pusbd = pdvobj->pusbdev; _func_enter_; if (RTW_CANNOT_RX(adapter) || (precvbuf == NULL)) { RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( RTW_CANNOT_RX ) || precvbuf == NULL!!!\n")); return _FAIL; } usb_init_recvbuf(adapter, precvbuf); if(precvbuf->pbuf) { ATOMIC_INC(&(precvpriv->rx_pending_cnt)); purb = precvbuf->purb; //translate DMA FIFO addr to pipehandle pipe = ffaddr2pipehdl(pdvobj, addr); usb_fill_bulk_urb(purb, pusbd, pipe, precvbuf->pbuf, MAX_RECVBUF_SZ, usb_read_port_complete, precvbuf);//context is precvbuf purb->transfer_dma = precvbuf->dma_transfer_addr; purb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; err = usb_submit_urb(purb, GFP_ATOMIC); if((err) && (err != (-EPERM))) { RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status)); DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status); ret = _FAIL; } } _func_exit_; return ret; } #else // CONFIG_USE_USB_BUFFER_ALLOC_RX void usb_recv_tasklet(void *priv) { _pkt *pskb; _adapter *padapter = (_adapter*)priv; struct recv_priv *precvpriv = &padapter->recvpriv; struct recv_buf *precvbuf = NULL; while (NULL != (pskb = skb_dequeue(&precvpriv->rx_skb_queue))) { if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) { DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n"); #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER if(rtw_free_skb_premem(pskb)!=0) #endif //CONFIG_PREALLOC_RX_SKB_BUFFER rtw_skb_free(pskb); break; } recvbuf2recvframe(padapter, pskb); #ifdef CONFIG_PREALLOC_RECV_SKB skb_reset_tail_pointer(pskb); pskb->len = 0; skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb); #else rtw_skb_free(pskb); #endif if (NULL != (precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue))) { precvbuf->pskb = NULL; precvbuf->reuse = _FALSE; rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); } } } void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) { _irqL irqL; uint isevt, *pbuf; struct recv_buf *precvbuf = (struct recv_buf *)purb->context; _adapter *padapter =(_adapter *)precvbuf->adapter; struct recv_priv *precvpriv = &padapter->recvpriv; RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n")); ATOMIC_DEC(&(precvpriv->rx_pending_cnt)); if(RTW_CANNOT_RX(padapter)) { RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved)); #ifdef CONFIG_PREALLOC_RECV_SKB precvbuf->reuse = _TRUE; #else if(precvbuf->pskb){ DBG_8192C("==> free skb(%p)\n",precvbuf->pskb); rtw_skb_free(precvbuf->pskb); } #endif DBG_8192C("%s() RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) \n", __FUNCTION__,padapter->bDriverStopped, padapter->bSurpriseRemoved); goto exit; } if(purb->status==0)//SUCCESS { if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) { RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n")); precvbuf->reuse = _TRUE; rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); DBG_8192C("%s()-%d: RX Warning!\n", __FUNCTION__, __LINE__); } else { rtw_reset_continual_io_error(adapter_to_dvobj(padapter)); precvbuf->transfer_len = purb->actual_length; skb_put(precvbuf->pskb, purb->actual_length); skb_queue_tail(&precvpriv->rx_skb_queue, precvbuf->pskb); #ifndef CONFIG_FIX_NR_BULKIN_BUFFER if (skb_queue_len(&precvpriv->rx_skb_queue)<=1) #endif tasklet_schedule(&precvpriv->recv_tasklet); precvbuf->pskb = NULL; precvbuf->reuse = _FALSE; rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); } } else { RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status)); DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status); if(rtw_inc_and_chk_continual_io_error(adapter_to_dvobj(padapter)) == _TRUE ){ padapter->bSurpriseRemoved = _TRUE; } switch(purb->status) { case -EINVAL: case -EPIPE: case -ENODEV: case -ESHUTDOWN: //padapter->bSurpriseRemoved=_TRUE; //RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n")); case -ENOENT: padapter->bDriverStopped=_TRUE; RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n")); break; case -EPROTO: case -EILSEQ: case -ETIME: case -ECOMM: case -EOVERFLOW: #ifdef DBG_CONFIG_ERROR_DETECT { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); pHalData->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL; } #endif precvbuf->reuse = _TRUE; rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); break; case -EINPROGRESS: DBG_8192C("ERROR: URB IS IN PROGRESS!/n"); break; default: break; } } exit: _func_exit_; } u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) { _irqL irqL; int err; unsigned int pipe; SIZE_PTR tmpaddr=0; SIZE_PTR alignment=0; u32 ret = _SUCCESS; PURB purb = NULL; struct recv_buf *precvbuf = (struct recv_buf *)rmem; _adapter *adapter = pintfhdl->padapter; struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); struct pwrctrl_priv *pwrctl = dvobj_to_pwrctl(pdvobj); struct recv_priv *precvpriv = &adapter->recvpriv; struct usb_device *pusbd = pdvobj->pusbdev; _func_enter_; if (RTW_CANNOT_RX(adapter) || (precvbuf == NULL)) { RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( RTW_CANNOT_RX ) || precvbuf == NULL!!!\n")); return _FAIL; } #ifdef CONFIG_PREALLOC_RECV_SKB if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL)) { if (NULL != (precvbuf->pskb = skb_dequeue(&precvpriv->free_recv_skb_queue))) { precvbuf->reuse = _TRUE; } } #endif usb_init_recvbuf(adapter, precvbuf); //re-assign for linux based on skb if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL)) { #ifndef CONFIG_FIX_NR_BULKIN_BUFFER precvbuf->pskb = rtw_skb_alloc(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); #endif if(precvbuf->pskb == NULL) { if (0) DBG_8192C("usb_read_port() enqueue precvbuf=%p \n", precvbuf); //enqueue precvbuf and wait for free skb rtw_enqueue_recvbuf(precvbuf, &precvpriv->recv_buf_pending_queue); return _FAIL; } tmpaddr = (SIZE_PTR)precvbuf->pskb->data; alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment)); precvbuf->phead = precvbuf->pskb->head; precvbuf->pdata = precvbuf->pskb->data; precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); precvbuf->pend = skb_end_pointer(precvbuf->pskb); precvbuf->pbuf = precvbuf->pskb->data; } else//reuse skb { precvbuf->phead = precvbuf->pskb->head; precvbuf->pdata = precvbuf->pskb->data; precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); precvbuf->pend = skb_end_pointer(precvbuf->pskb); precvbuf->pbuf = precvbuf->pskb->data; precvbuf->reuse = _FALSE; } ATOMIC_INC(&(precvpriv->rx_pending_cnt)); purb = precvbuf->purb; //translate DMA FIFO addr to pipehandle pipe = ffaddr2pipehdl(pdvobj, addr); usb_fill_bulk_urb(purb, pusbd, pipe, precvbuf->pbuf, MAX_RECVBUF_SZ, usb_read_port_complete, precvbuf);//context is precvbuf err = usb_submit_urb(purb, GFP_ATOMIC); if((err) && (err != (-EPERM))) { RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status)); DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status); ret = _FAIL; } _func_exit_; return ret; } #endif // CONFIG_USE_USB_BUFFER_ALLOC_RX rtl8812au-4.3.8.12175.20140902+dfsg/os_dep/linux/xmit_linux.c000066400000000000000000000336041261122257400224610ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _XMIT_OSDEP_C_ #include #define DBG_DUMP_OS_QUEUE_CTL 0 uint rtw_remainder_len(struct pkt_file *pfile) { return (pfile->buf_len - ((SIZE_PTR)(pfile->cur_addr) - (SIZE_PTR)(pfile->buf_start))); } void _rtw_open_pktfile (_pkt *pktptr, struct pkt_file *pfile) { _func_enter_; pfile->pkt = pktptr; pfile->cur_addr = pfile->buf_start = pktptr->data; pfile->pkt_len = pfile->buf_len = pktptr->len; pfile->cur_buffer = pfile->buf_start ; _func_exit_; } uint _rtw_pktfile_read (struct pkt_file *pfile, u8 *rmem, uint rlen) { uint len = 0; _func_enter_; len = rtw_remainder_len(pfile); len = (rlen > len)? len: rlen; if(rmem) skb_copy_bits(pfile->pkt, pfile->buf_len-pfile->pkt_len, rmem, len); pfile->cur_addr += len; pfile->pkt_len -= len; _func_exit_; return len; } sint rtw_endofpktfile(struct pkt_file *pfile) { _func_enter_; if (pfile->pkt_len == 0) { _func_exit_; return _TRUE; } _func_exit_; return _FALSE; } void rtw_set_tx_chksum_offload(_pkt *pkt, struct pkt_attrib *pattrib) { #ifdef CONFIG_TCP_CSUM_OFFLOAD_TX struct sk_buff *skb = (struct sk_buff *)pkt; pattrib->hw_tcp_csum = 0; if (skb->ip_summed == CHECKSUM_PARTIAL) { if (skb_shinfo(skb)->nr_frags == 0) { const struct iphdr *ip = ip_hdr(skb); if (ip->protocol == IPPROTO_TCP) { // TCP checksum offload by HW DBG_871X("CHECKSUM_PARTIAL TCP\n"); pattrib->hw_tcp_csum = 1; //skb_checksum_help(skb); } else if (ip->protocol == IPPROTO_UDP) { //DBG_871X("CHECKSUM_PARTIAL UDP\n"); #if 1 skb_checksum_help(skb); #else // Set UDP checksum = 0 to skip checksum check struct udphdr *udp = skb_transport_header(skb); udp->check = 0; #endif } else { DBG_871X("%s-%d TCP CSUM offload Error!!\n", __FUNCTION__, __LINE__); WARN_ON(1); /* we need a WARN() */ } } else { // IP fragmentation case DBG_871X("%s-%d nr_frags != 0, using skb_checksum_help(skb);!!\n", __FUNCTION__, __LINE__); skb_checksum_help(skb); } } #endif } int rtw_os_xmit_resource_alloc(_adapter *padapter, struct xmit_buf *pxmitbuf, u32 alloc_sz, u8 flag) { if (alloc_sz > 0) { #ifdef CONFIG_USE_USB_BUFFER_ALLOC_TX struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); struct usb_device *pusbd = pdvobjpriv->pusbdev; pxmitbuf->pallocated_buf = rtw_usb_buffer_alloc(pusbd, (size_t)alloc_sz, &pxmitbuf->dma_transfer_addr); pxmitbuf->pbuf = pxmitbuf->pallocated_buf; if(pxmitbuf->pallocated_buf == NULL) return _FAIL; #else // CONFIG_USE_USB_BUFFER_ALLOC_TX pxmitbuf->pallocated_buf = rtw_zmalloc(alloc_sz); if (pxmitbuf->pallocated_buf == NULL) { return _FAIL; } pxmitbuf->pbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitbuf->pallocated_buf), XMITBUF_ALIGN_SZ); #endif // CONFIG_USE_USB_BUFFER_ALLOC_TX } if (flag) { #ifdef CONFIG_USB_HCI int i; for(i=0; i<8; i++) { pxmitbuf->pxmit_urb[i] = usb_alloc_urb(0, GFP_KERNEL); if(pxmitbuf->pxmit_urb[i] == NULL) { DBG_871X("pxmitbuf->pxmit_urb[i]==NULL"); return _FAIL; } } #endif } return _SUCCESS; } void rtw_os_xmit_resource_free(_adapter *padapter, struct xmit_buf *pxmitbuf,u32 free_sz, u8 flag) { if (flag) { #ifdef CONFIG_USB_HCI int i; for(i=0; i<8; i++) { if(pxmitbuf->pxmit_urb[i]) { //usb_kill_urb(pxmitbuf->pxmit_urb[i]); usb_free_urb(pxmitbuf->pxmit_urb[i]); } } #endif } if (free_sz > 0 ) { #ifdef CONFIG_USE_USB_BUFFER_ALLOC_TX struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); struct usb_device *pusbd = pdvobjpriv->pusbdev; rtw_usb_buffer_free(pusbd, (size_t)free_sz, pxmitbuf->pallocated_buf, pxmitbuf->dma_transfer_addr); pxmitbuf->pallocated_buf = NULL; pxmitbuf->dma_transfer_addr = 0; #else // CONFIG_USE_USB_BUFFER_ALLOC_TX if(pxmitbuf->pallocated_buf) rtw_mfree(pxmitbuf->pallocated_buf, free_sz); #endif // CONFIG_USE_USB_BUFFER_ALLOC_TX } } void dump_os_queue(void *sel, _adapter *padapter) { struct net_device *ndev = padapter->pnetdev; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) int i; for (i=0;i<4;i++) { DBG_871X_SEL_NL(sel, "os_queue[%d]:%s\n" , i, __netif_subqueue_stopped(ndev, i)?"stopped":"waked"); } #else DBG_871X_SEL_NL(sel, "os_queue:%s\n" , netif_queue_stopped(ndev)?"stopped":"waked"); #endif } #define WMM_XMIT_THRESHOLD (NR_XMITFRAME*2/5) inline static bool rtw_os_need_wake_queue(_adapter *padapter, u16 qidx) { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) struct xmit_priv *pxmitpriv = &padapter->xmitpriv; if (padapter->registrypriv.wifi_spec) { if (pxmitpriv->hwxmits[qidx].accnt < WMM_XMIT_THRESHOLD) return _TRUE; } else { return _TRUE; } return _FALSE; #else return _TRUE; #endif } inline static bool rtw_os_need_stop_queue(_adapter *padapter, u16 qidx) { struct xmit_priv *pxmitpriv = &padapter->xmitpriv; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) if (padapter->registrypriv.wifi_spec) { /* No free space for Tx, tx_worker is too slow */ if (pxmitpriv->hwxmits[qidx].accnt > WMM_XMIT_THRESHOLD) return _TRUE; } else { if(pxmitpriv->free_xmitframe_cnt<=4) return _TRUE; } #else if(pxmitpriv->free_xmitframe_cnt<=4) return _TRUE; #endif return _FALSE; } void rtw_os_pkt_complete(_adapter *padapter, _pkt *pkt) { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) u16 qidx; qidx = skb_get_queue_mapping(pkt); if (rtw_os_need_wake_queue(padapter, qidx)) { if (DBG_DUMP_OS_QUEUE_CTL) DBG_871X(FUNC_ADPT_FMT": netif_wake_subqueue[%d]\n", FUNC_ADPT_ARG(padapter), qidx); netif_wake_subqueue(padapter->pnetdev, qidx); } #else if (rtw_os_need_wake_queue(padapter, 0)) { if (DBG_DUMP_OS_QUEUE_CTL) DBG_871X(FUNC_ADPT_FMT": netif_wake_queue\n", FUNC_ADPT_ARG(padapter)); netif_wake_queue(padapter->pnetdev); } #endif rtw_skb_free(pkt); } void rtw_os_xmit_complete(_adapter *padapter, struct xmit_frame *pxframe) { if(pxframe->pkt) rtw_os_pkt_complete(padapter, pxframe->pkt); pxframe->pkt = NULL; } void rtw_os_xmit_schedule(_adapter *padapter) { _adapter *pri_adapter = padapter; #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) if(!padapter) return; #ifdef CONFIG_CONCURRENT_MODE if(padapter->adapter_type > PRIMARY_ADAPTER) pri_adapter = padapter->pbuddy_adapter; #endif if (_rtw_queue_empty(&padapter->xmitpriv.pending_xmitbuf_queue) == _FALSE) _rtw_up_sema(&pri_adapter->xmitpriv.xmit_sema); #else _irqL irqL; struct xmit_priv *pxmitpriv; if(!padapter) return; pxmitpriv = &padapter->xmitpriv; _enter_critical_bh(&pxmitpriv->lock, &irqL); if(rtw_txframes_pending(padapter)) { tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); } _exit_critical_bh(&pxmitpriv->lock, &irqL); #endif } static bool rtw_check_xmit_resource(_adapter *padapter, _pkt *pkt) { bool busy = _FALSE; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) u16 qidx; qidx = skb_get_queue_mapping(pkt); if (rtw_os_need_stop_queue(padapter, qidx)) { if (DBG_DUMP_OS_QUEUE_CTL) DBG_871X(FUNC_ADPT_FMT": netif_stop_subqueue[%d]\n", FUNC_ADPT_ARG(padapter), qidx); netif_stop_subqueue(padapter->pnetdev, qidx); busy = _TRUE; } #else if (rtw_os_need_stop_queue(padapter, 0)) { if (DBG_DUMP_OS_QUEUE_CTL) DBG_871X(FUNC_ADPT_FMT": netif_stop_queue\n", FUNC_ADPT_ARG(padapter)); rtw_netif_stop_queue(padapter->pnetdev); busy = _TRUE; } #endif return busy; } void rtw_os_wake_queue_at_free_stainfo(_adapter *padapter, int *qcnt_freed) { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) int i; for (i=0;i<4;i++) { if (qcnt_freed[i] == 0) continue; if(rtw_os_need_wake_queue(padapter, i)) { if (DBG_DUMP_OS_QUEUE_CTL) DBG_871X(FUNC_ADPT_FMT": netif_wake_subqueue[%d]\n", FUNC_ADPT_ARG(padapter), i); netif_wake_subqueue(padapter->pnetdev, i); } } #else if (qcnt_freed[0] || qcnt_freed[1] || qcnt_freed[2] || qcnt_freed[3]) { if(rtw_os_need_wake_queue(padapter, 0)) { if (DBG_DUMP_OS_QUEUE_CTL) DBG_871X(FUNC_ADPT_FMT": netif_wake_queue\n", FUNC_ADPT_ARG(padapter)); netif_wake_queue(padapter->pnetdev); } } #endif } #ifdef CONFIG_TX_MCAST2UNI int rtw_mlcst2unicst(_adapter *padapter, struct sk_buff *skb) { struct sta_priv *pstapriv = &padapter->stapriv; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; _irqL irqL; _list *phead, *plist; struct sk_buff *newskb; struct sta_info *psta = NULL; u8 chk_alive_num = 0; char chk_alive_list[NUM_STA]; u8 bc_addr[6]={0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; u8 null_addr[6]={0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; int i; s32 res; DBG_COUNTER(padapter->tx_logs.os_tx_m2u); _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); phead = &pstapriv->asoc_list; plist = get_next(phead); //free sta asoc_queue while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { int stainfo_offset; psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); plist = get_next(plist); stainfo_offset = rtw_stainfo_offset(pstapriv, psta); if (stainfo_offset_valid(stainfo_offset)) { chk_alive_list[chk_alive_num++] = stainfo_offset; } } _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); for (i = 0; i < chk_alive_num; i++) { psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); if(!(psta->state &_FW_LINKED)) { DBG_COUNTER(padapter->tx_logs.os_tx_m2u_ignore_fw_linked); continue; } /* avoid come from STA1 and send back STA1 */ if (_rtw_memcmp(psta->hwaddr, &skb->data[6], 6) == _TRUE || _rtw_memcmp(psta->hwaddr, null_addr, 6) == _TRUE || _rtw_memcmp(psta->hwaddr, bc_addr, 6) == _TRUE ) { DBG_COUNTER(padapter->tx_logs.os_tx_m2u_ignore_self); continue; } DBG_COUNTER(padapter->tx_logs.os_tx_m2u_entry); newskb = rtw_skb_copy(skb); if (newskb) { _rtw_memcpy(newskb->data, psta->hwaddr, 6); res = rtw_xmit(padapter, &newskb); if (res < 0) { DBG_COUNTER(padapter->tx_logs.os_tx_m2u_entry_err_xmit); DBG_871X("%s()-%d: rtw_xmit() return error!\n", __FUNCTION__, __LINE__); pxmitpriv->tx_drop++; rtw_skb_free(newskb); } } else { DBG_COUNTER(padapter->tx_logs.os_tx_m2u_entry_err_skb); DBG_871X("%s-%d: rtw_skb_copy() failed!\n", __FUNCTION__, __LINE__); pxmitpriv->tx_drop++; //rtw_skb_free(skb); return _FALSE; // Caller shall tx this multicast frame via normal way. } } rtw_skb_free(skb); return _TRUE; } #endif // CONFIG_TX_MCAST2UNI int _rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev) { _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); struct xmit_priv *pxmitpriv = &padapter->xmitpriv; #ifdef CONFIG_TX_MCAST2UNI struct mlme_priv *pmlmepriv = &padapter->mlmepriv; extern int rtw_mc2u_disable; #endif // CONFIG_TX_MCAST2UNI s32 res = 0; #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) u16 queue; #endif _func_enter_; if(padapter->registrypriv.mp_mode) { DBG_871X("MP_TX_DROP_OS_FRAME\n"); goto drop_packet; } DBG_COUNTER(padapter->tx_logs.os_tx); RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("+xmit_enry\n")); if (rtw_if_up(padapter) == _FALSE) { DBG_COUNTER(padapter->tx_logs.os_tx_err_up); RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("rtw_xmit_entry: rtw_if_up fail\n")); #ifdef DBG_TX_DROP_FRAME DBG_871X("DBG_TX_DROP_FRAME %s if_up fail\n", __FUNCTION__); #endif goto drop_packet; } rtw_check_xmit_resource(padapter, pkt); #ifdef CONFIG_TX_MCAST2UNI if ( !rtw_mc2u_disable && check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE && ( IP_MCAST_MAC(pkt->data) || ICMPV6_MCAST_MAC(pkt->data) #ifdef CONFIG_TX_BCAST2UNI || is_broadcast_mac_addr(pkt->data) #endif ) && (padapter->registrypriv.wifi_spec == 0) ) { if ( pxmitpriv->free_xmitframe_cnt > (NR_XMITFRAME/4) ) { res = rtw_mlcst2unicst(padapter, pkt); if (res == _TRUE) { goto exit; } } else { //DBG_871X("Stop M2U(%d, %d)! ", pxmitpriv->free_xmitframe_cnt, pxmitpriv->free_xmitbuf_cnt); //DBG_871X("!m2u ); DBG_COUNTER(padapter->tx_logs.os_tx_m2u_stop); } } #endif // CONFIG_TX_MCAST2UNI res = rtw_xmit(padapter, &pkt); if (res < 0) { #ifdef DBG_TX_DROP_FRAME DBG_871X("DBG_TX_DROP_FRAME %s rtw_xmit fail\n", __FUNCTION__); #endif goto drop_packet; } RT_TRACE(_module_xmit_osdep_c_, _drv_info_, ("rtw_xmit_entry: tx_pkts=%d\n", (u32)pxmitpriv->tx_pkts)); goto exit; drop_packet: pxmitpriv->tx_drop++; rtw_os_pkt_complete(padapter, pkt); RT_TRACE(_module_xmit_osdep_c_, _drv_notice_, ("rtw_xmit_entry: drop, tx_drop=%d\n", (u32)pxmitpriv->tx_drop)); exit: _func_exit_; return 0; } int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev) { int ret = 0; if (pkt) { rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, pkt->truesize); ret = _rtw_xmit_entry(pkt, pnetdev); } return ret; } rtl8812au-4.3.8.12175.20140902+dfsg/os_dep/osdep_service.c000066400000000000000000001443171261122257400217600ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _OSDEP_SERVICE_C_ #include #define RT_TAG '1178' #ifdef DBG_MEMORY_LEAK #ifdef PLATFORM_LINUX atomic_t _malloc_cnt = ATOMIC_INIT(0); atomic_t _malloc_size = ATOMIC_INIT(0); #endif #endif /* DBG_MEMORY_LEAK */ #if defined(PLATFORM_LINUX) /* * Translate the OS dependent @param error_code to OS independent RTW_STATUS_CODE * @return: one of RTW_STATUS_CODE */ inline int RTW_STATUS_CODE(int error_code){ if(error_code >=0) return _SUCCESS; switch(error_code) { //case -ETIMEDOUT: // return RTW_STATUS_TIMEDOUT; default: return _FAIL; } } #else inline int RTW_STATUS_CODE(int error_code){ return error_code; } #endif u32 rtw_atoi(u8* s) { int num=0,flag=0; int i; for(i=0;i<=strlen(s);i++) { if(s[i] >= '0' && s[i] <= '9') num = num * 10 + s[i] -'0'; else if(s[0] == '-' && i==0) flag =1; else break; } if(flag == 1) num = num * -1; return(num); } inline u8* _rtw_vmalloc(u32 sz) { u8 *pbuf; #ifdef PLATFORM_LINUX pbuf = vmalloc(sz); #endif #ifdef PLATFORM_FREEBSD pbuf = malloc(sz,M_DEVBUF,M_NOWAIT); #endif #ifdef PLATFORM_WINDOWS NdisAllocateMemoryWithTag(&pbuf,sz, RT_TAG); #endif #ifdef DBG_MEMORY_LEAK #ifdef PLATFORM_LINUX if ( pbuf != NULL) { atomic_inc(&_malloc_cnt); atomic_add(sz, &_malloc_size); } #endif #endif /* DBG_MEMORY_LEAK */ return pbuf; } inline u8* _rtw_zvmalloc(u32 sz) { u8 *pbuf; #ifdef PLATFORM_LINUX pbuf = _rtw_vmalloc(sz); if (pbuf != NULL) memset(pbuf, 0, sz); #endif #ifdef PLATFORM_FREEBSD pbuf = malloc(sz,M_DEVBUF,M_ZERO|M_NOWAIT); #endif #ifdef PLATFORM_WINDOWS NdisAllocateMemoryWithTag(&pbuf,sz, RT_TAG); if (pbuf != NULL) NdisFillMemory(pbuf, sz, 0); #endif return pbuf; } inline void _rtw_vmfree(u8 *pbuf, u32 sz) { #ifdef PLATFORM_LINUX vfree(pbuf); #endif #ifdef PLATFORM_FREEBSD free(pbuf,M_DEVBUF); #endif #ifdef PLATFORM_WINDOWS NdisFreeMemory(pbuf,sz, 0); #endif #ifdef DBG_MEMORY_LEAK #ifdef PLATFORM_LINUX atomic_dec(&_malloc_cnt); atomic_sub(sz, &_malloc_size); #endif #endif /* DBG_MEMORY_LEAK */ } u8* _rtw_malloc(u32 sz) { u8 *pbuf=NULL; #ifdef PLATFORM_LINUX #ifdef RTK_DMP_PLATFORM if(sz > 0x4000) pbuf = (u8 *)dvr_malloc(sz); else #endif pbuf = kmalloc(sz,in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); #endif #ifdef PLATFORM_FREEBSD pbuf = malloc(sz,M_DEVBUF,M_NOWAIT); #endif #ifdef PLATFORM_WINDOWS NdisAllocateMemoryWithTag(&pbuf,sz, RT_TAG); #endif #ifdef DBG_MEMORY_LEAK #ifdef PLATFORM_LINUX if ( pbuf != NULL) { atomic_inc(&_malloc_cnt); atomic_add(sz, &_malloc_size); } #endif #endif /* DBG_MEMORY_LEAK */ return pbuf; } u8* _rtw_zmalloc(u32 sz) { #ifdef PLATFORM_FREEBSD return malloc(sz,M_DEVBUF,M_ZERO|M_NOWAIT); #else // PLATFORM_FREEBSD u8 *pbuf = _rtw_malloc(sz); if (pbuf != NULL) { #ifdef PLATFORM_LINUX memset(pbuf, 0, sz); #endif #ifdef PLATFORM_WINDOWS NdisFillMemory(pbuf, sz, 0); #endif } return pbuf; #endif // PLATFORM_FREEBSD } void _rtw_mfree(u8 *pbuf, u32 sz) { #ifdef PLATFORM_LINUX #ifdef RTK_DMP_PLATFORM if(sz > 0x4000) dvr_free(pbuf); else #endif kfree(pbuf); #endif #ifdef PLATFORM_FREEBSD free(pbuf,M_DEVBUF); #endif #ifdef PLATFORM_WINDOWS NdisFreeMemory(pbuf,sz, 0); #endif #ifdef DBG_MEMORY_LEAK #ifdef PLATFORM_LINUX atomic_dec(&_malloc_cnt); atomic_sub(sz, &_malloc_size); #endif #endif /* DBG_MEMORY_LEAK */ } #ifdef PLATFORM_FREEBSD //review again struct sk_buff * dev_alloc_skb(unsigned int size) { struct sk_buff *skb=NULL; u8 *data=NULL; //skb = (struct sk_buff *)_rtw_zmalloc(sizeof(struct sk_buff)); // for skb->len, etc. skb = (struct sk_buff *)_rtw_malloc(sizeof(struct sk_buff)); if(!skb) goto out; data = _rtw_malloc(size); if(!data) goto nodata; skb->head = (unsigned char*)data; skb->data = (unsigned char*)data; skb->tail = (unsigned char*)data; skb->end = (unsigned char*)data + size; skb->len = 0; //printf("%s()-%d: skb=%p, skb->head = %p\n", __FUNCTION__, __LINE__, skb, skb->head); out: return skb; nodata: _rtw_mfree((u8 *)skb, sizeof(struct sk_buff)); skb = NULL; goto out; } void dev_kfree_skb_any(struct sk_buff *skb) { //printf("%s()-%d: skb->head = %p\n", __FUNCTION__, __LINE__, skb->head); if(skb->head) _rtw_mfree(skb->head, 0); //printf("%s()-%d: skb = %p\n", __FUNCTION__, __LINE__, skb); if(skb) _rtw_mfree((u8 *)skb, 0); } struct sk_buff *skb_clone(const struct sk_buff *skb) { return NULL; } #endif /* PLATFORM_FREEBSD */ inline struct sk_buff *_rtw_skb_alloc(u32 sz) { #ifdef PLATFORM_LINUX return __dev_alloc_skb(sz, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); #endif /* PLATFORM_LINUX */ #ifdef PLATFORM_FREEBSD return dev_alloc_skb(sz); #endif /* PLATFORM_FREEBSD */ } inline void _rtw_skb_free(struct sk_buff *skb) { dev_kfree_skb_any(skb); } inline struct sk_buff *_rtw_skb_copy(const struct sk_buff *skb) { #ifdef PLATFORM_LINUX return skb_copy(skb, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); #endif /* PLATFORM_LINUX */ #ifdef PLATFORM_FREEBSD return NULL; #endif /* PLATFORM_FREEBSD */ } inline struct sk_buff *_rtw_skb_clone(struct sk_buff *skb) { #ifdef PLATFORM_LINUX return skb_clone(skb, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); #endif /* PLATFORM_LINUX */ #ifdef PLATFORM_FREEBSD return skb_clone(skb); #endif /* PLATFORM_FREEBSD */ } inline int _rtw_netif_rx(_nic_hdl ndev, struct sk_buff *skb) { #ifdef PLATFORM_LINUX skb->dev = ndev; return netif_rx(skb); #endif /* PLATFORM_LINUX */ #ifdef PLATFORM_FREEBSD return (*ndev->if_input)(ndev, skb); #endif /* PLATFORM_FREEBSD */ } void _rtw_skb_queue_purge(struct sk_buff_head *list) { struct sk_buff *skb; while ((skb = skb_dequeue(list)) != NULL) _rtw_skb_free(skb); } #ifdef CONFIG_USB_HCI inline void *_rtw_usb_buffer_alloc(struct usb_device *dev, size_t size, dma_addr_t *dma) { #ifdef PLATFORM_LINUX #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) return usb_alloc_coherent(dev, size, (in_interrupt() ? GFP_ATOMIC : GFP_KERNEL), dma); #else return usb_buffer_alloc(dev, size, (in_interrupt() ? GFP_ATOMIC : GFP_KERNEL), dma); #endif #endif /* PLATFORM_LINUX */ #ifdef PLATFORM_FREEBSD return (malloc(size, M_USBDEV, M_NOWAIT | M_ZERO)); #endif /* PLATFORM_FREEBSD */ } inline void _rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma) { #ifdef PLATFORM_LINUX #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) usb_free_coherent(dev, size, addr, dma); #else usb_buffer_free(dev, size, addr, dma); #endif #endif /* PLATFORM_LINUX */ #ifdef PLATFORM_FREEBSD free(addr, M_USBDEV); #endif /* PLATFORM_FREEBSD */ } #endif /* CONFIG_USB_HCI */ #if defined(DBG_MEM_ALLOC) struct rtw_mem_stat { ATOMIC_T alloc; // the memory bytes we allocate currently ATOMIC_T peak; // the peak memory bytes we allocate ATOMIC_T alloc_cnt; // the alloc count for alloc currently ATOMIC_T alloc_err_cnt; // the error times we fail to allocate memory }; struct rtw_mem_stat rtw_mem_type_stat[mstat_tf_idx(MSTAT_TYPE_MAX)]; #ifdef RTW_MEM_FUNC_STAT struct rtw_mem_stat rtw_mem_func_stat[mstat_ff_idx(MSTAT_FUNC_MAX)]; #endif char *MSTAT_TYPE_str[] = { "VIR", "PHY", "SKB", "USB", }; #ifdef RTW_MEM_FUNC_STAT char *MSTAT_FUNC_str[] = { "UNSP", "IO", "TXIO", "RXIO", "TX", "RX", }; #endif void rtw_mstat_dump(void *sel) { int i; int value_t[4][mstat_tf_idx(MSTAT_TYPE_MAX)]; #ifdef RTW_MEM_FUNC_STAT int value_f[4][mstat_ff_idx(MSTAT_FUNC_MAX)]; #endif int vir_alloc, vir_peak, vir_alloc_err, phy_alloc, phy_peak, phy_alloc_err; int tx_alloc, tx_peak, tx_alloc_err, rx_alloc, rx_peak, rx_alloc_err; for(i=0;i 5000) { // rtw_mstat_dump(RTW_DBGDUMP); update_time=rtw_get_current_time(); //} } #ifndef SIZE_MAX #define SIZE_MAX (~(size_t)0) #endif struct mstat_sniff_rule { enum mstat_f flags; size_t lb; size_t hb; }; struct mstat_sniff_rule mstat_sniff_rules[] = { {MSTAT_TYPE_PHY, 4097, SIZE_MAX}, }; int mstat_sniff_rule_num = sizeof(mstat_sniff_rules)/sizeof(struct mstat_sniff_rule); bool match_mstat_sniff_rules(const enum mstat_f flags, const size_t size) { int i; for (i = 0; i= size) return _TRUE; } return _FALSE; } inline u8* dbg_rtw_vmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line) { u8 *p; if (match_mstat_sniff_rules(flags, sz)) DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); p=_rtw_vmalloc((sz)); rtw_mstat_update( flags , p ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL , sz ); return p; } inline u8* dbg_rtw_zvmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line) { u8 *p; if (match_mstat_sniff_rules(flags, sz)) DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); p=_rtw_zvmalloc((sz)); rtw_mstat_update( flags , p ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL , sz ); return p; } inline void dbg_rtw_vmfree(u8 *pbuf, u32 sz, const enum mstat_f flags, const char *func, const int line) { if (match_mstat_sniff_rules(flags, sz)) DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); _rtw_vmfree((pbuf), (sz)); rtw_mstat_update( flags , MSTAT_FREE , sz ); } inline u8* dbg_rtw_malloc(u32 sz, const enum mstat_f flags, const char *func, const int line) { u8 *p; if (match_mstat_sniff_rules(flags, sz)) DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); p=_rtw_malloc((sz)); rtw_mstat_update( flags , p ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL , sz ); return p; } inline u8* dbg_rtw_zmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line) { u8 *p; if (match_mstat_sniff_rules(flags, sz)) DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); p = _rtw_zmalloc((sz)); rtw_mstat_update( flags , p ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL , sz ); return p; } inline void dbg_rtw_mfree(u8 *pbuf, u32 sz, const enum mstat_f flags, const char *func, const int line) { if (match_mstat_sniff_rules(flags, sz)) DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); _rtw_mfree((pbuf), (sz)); rtw_mstat_update( flags , MSTAT_FREE , sz ); } inline struct sk_buff * dbg_rtw_skb_alloc(unsigned int size, const enum mstat_f flags, const char *func, int line) { struct sk_buff *skb; unsigned int truesize = 0; skb = _rtw_skb_alloc(size); if(skb) truesize = skb->truesize; if(!skb || truesize < size || match_mstat_sniff_rules(flags, truesize)) DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d), skb:%p, truesize=%u\n", func, line, __FUNCTION__, size, skb, truesize); rtw_mstat_update( flags , skb ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL , truesize ); return skb; } inline void dbg_rtw_skb_free(struct sk_buff *skb, const enum mstat_f flags, const char *func, int line) { unsigned int truesize = skb->truesize; if(match_mstat_sniff_rules(flags, truesize)) DBG_871X("DBG_MEM_ALLOC %s:%d %s, truesize=%u\n", func, line, __FUNCTION__, truesize); _rtw_skb_free(skb); rtw_mstat_update( flags , MSTAT_FREE , truesize ); } inline struct sk_buff *dbg_rtw_skb_copy(const struct sk_buff *skb, const enum mstat_f flags, const char *func, const int line) { struct sk_buff *skb_cp; unsigned int truesize = skb->truesize; unsigned int cp_truesize = 0; skb_cp = _rtw_skb_copy(skb); if(skb_cp) cp_truesize = skb_cp->truesize; if(!skb_cp || cp_truesize < truesize || match_mstat_sniff_rules(flags, cp_truesize)) DBG_871X("DBG_MEM_ALLOC %s:%d %s(%u), skb_cp:%p, cp_truesize=%u\n", func, line, __FUNCTION__, truesize, skb_cp, cp_truesize); rtw_mstat_update( flags , skb_cp ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL , truesize ); return skb_cp; } inline struct sk_buff *dbg_rtw_skb_clone(struct sk_buff *skb, const enum mstat_f flags, const char *func, const int line) { struct sk_buff *skb_cl; unsigned int truesize = skb->truesize; unsigned int cl_truesize = 0; skb_cl = _rtw_skb_clone(skb); if(skb_cl) cl_truesize = skb_cl->truesize; if(!skb_cl || cl_truesize < truesize || match_mstat_sniff_rules(flags, cl_truesize)) DBG_871X("DBG_MEM_ALLOC %s:%d %s(%u), skb_cl:%p, cl_truesize=%u\n", func, line, __FUNCTION__, truesize, skb_cl, cl_truesize); rtw_mstat_update( flags , skb_cl ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL , truesize ); return skb_cl; } inline int dbg_rtw_netif_rx(_nic_hdl ndev, struct sk_buff *skb, const enum mstat_f flags, const char *func, int line) { int ret; unsigned int truesize = skb->truesize; if(match_mstat_sniff_rules(flags, truesize)) DBG_871X("DBG_MEM_ALLOC %s:%d %s, truesize=%u\n", func, line, __FUNCTION__, truesize); ret = _rtw_netif_rx(ndev, skb); rtw_mstat_update( flags , MSTAT_FREE , truesize ); return ret; } inline void dbg_rtw_skb_queue_purge(struct sk_buff_head *list, enum mstat_f flags, const char *func, int line) { struct sk_buff *skb; while ((skb = skb_dequeue(list)) != NULL) dbg_rtw_skb_free(skb, flags, func, line); } #ifdef CONFIG_USB_HCI inline void *dbg_rtw_usb_buffer_alloc(struct usb_device *dev, size_t size, dma_addr_t *dma, const enum mstat_f flags, const char *func, int line) { void *p; if(match_mstat_sniff_rules(flags, size)) DBG_871X("DBG_MEM_ALLOC %s:%d %s(%zu)\n", func, line, __FUNCTION__, size); p = _rtw_usb_buffer_alloc(dev, size, dma); rtw_mstat_update( flags , p ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL , size ); return p; } inline void dbg_rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma, const enum mstat_f flags, const char *func, int line) { if(match_mstat_sniff_rules(flags, size)) DBG_871X("DBG_MEM_ALLOC %s:%d %s(%zu)\n", func, line, __FUNCTION__, size); _rtw_usb_buffer_free(dev, size, addr, dma); rtw_mstat_update( flags , MSTAT_FREE , size ); } #endif /* CONFIG_USB_HCI */ #endif /* defined(DBG_MEM_ALLOC) */ void* rtw_malloc2d(int h, int w, size_t size) { int j; void **a = (void **) rtw_zmalloc( h*sizeof(void *) + h*w*size ); if(a == NULL) { DBG_871X("%s: alloc memory fail!\n", __FUNCTION__); return NULL; } for( j=0; jprev = pnew; pnew->next = pnext; pnew->prev = pprev; pprev->next = pnew; } #endif /* PLATFORM_FREEBSD */ void _rtw_init_listhead(_list *list) { #ifdef PLATFORM_LINUX INIT_LIST_HEAD(list); #endif #ifdef PLATFORM_FREEBSD list->next = list; list->prev = list; #endif #ifdef PLATFORM_WINDOWS NdisInitializeListHead(list); #endif } /* For the following list_xxx operations, caller must guarantee the atomic context. Otherwise, there will be racing condition. */ u32 rtw_is_list_empty(_list *phead) { #ifdef PLATFORM_LINUX if (list_empty(phead)) return _TRUE; else return _FALSE; #endif #ifdef PLATFORM_FREEBSD if (phead->next == phead) return _TRUE; else return _FALSE; #endif #ifdef PLATFORM_WINDOWS if (IsListEmpty(phead)) return _TRUE; else return _FALSE; #endif } void rtw_list_insert_head(_list *plist, _list *phead) { #ifdef PLATFORM_LINUX list_add(plist, phead); #endif #ifdef PLATFORM_FREEBSD __list_add(plist, phead, phead->next); #endif #ifdef PLATFORM_WINDOWS InsertHeadList(phead, plist); #endif } void rtw_list_insert_tail(_list *plist, _list *phead) { #ifdef PLATFORM_LINUX list_add_tail(plist, phead); #endif #ifdef PLATFORM_FREEBSD __list_add(plist, phead->prev, phead); #endif #ifdef PLATFORM_WINDOWS InsertTailList(phead, plist); #endif } void rtw_init_timer(_timer *ptimer, void *padapter, void *pfunc) { _adapter *adapter = (_adapter *)padapter; #ifdef PLATFORM_LINUX _init_timer(ptimer, adapter->pnetdev, pfunc, adapter); #endif #ifdef PLATFORM_FREEBSD _init_timer(ptimer, adapter->pifp, pfunc, adapter->mlmepriv.nic_hdl); #endif #ifdef PLATFORM_WINDOWS _init_timer(ptimer, adapter->hndis_adapter, pfunc, adapter->mlmepriv.nic_hdl); #endif } /* Caller must check if the list is empty before calling rtw_list_delete */ void _rtw_init_sema(_sema *sema, int init_val) { #ifdef PLATFORM_LINUX sema_init(sema, init_val); #endif #ifdef PLATFORM_FREEBSD sema_init(sema, init_val, "rtw_drv"); #endif #ifdef PLATFORM_OS_XP KeInitializeSemaphore(sema, init_val, SEMA_UPBND); // count=0; #endif #ifdef PLATFORM_OS_CE if(*sema == NULL) *sema = CreateSemaphore(NULL, init_val, SEMA_UPBND, NULL); #endif } void _rtw_free_sema(_sema *sema) { #ifdef PLATFORM_FREEBSD sema_destroy(sema); #endif #ifdef PLATFORM_OS_CE CloseHandle(*sema); #endif } void _rtw_up_sema(_sema *sema) { #ifdef PLATFORM_LINUX up(sema); #endif #ifdef PLATFORM_FREEBSD sema_post(sema); #endif #ifdef PLATFORM_OS_XP KeReleaseSemaphore(sema, IO_NETWORK_INCREMENT, 1, FALSE ); #endif #ifdef PLATFORM_OS_CE ReleaseSemaphore(*sema, 1, NULL ); #endif } u32 _rtw_down_sema(_sema *sema) { #ifdef PLATFORM_LINUX if (down_interruptible(sema)) return _FAIL; else return _SUCCESS; #endif #ifdef PLATFORM_FREEBSD sema_wait(sema); return _SUCCESS; #endif #ifdef PLATFORM_OS_XP if(STATUS_SUCCESS == KeWaitForSingleObject(sema, Executive, KernelMode, TRUE, NULL)) return _SUCCESS; else return _FAIL; #endif #ifdef PLATFORM_OS_CE if(WAIT_OBJECT_0 == WaitForSingleObject(*sema, INFINITE )) return _SUCCESS; else return _FAIL; #endif } void _rtw_mutex_init(_mutex *pmutex) { #ifdef PLATFORM_LINUX #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) mutex_init(pmutex); #else init_MUTEX(pmutex); #endif #endif #ifdef PLATFORM_FREEBSD mtx_init(pmutex, "", NULL, MTX_DEF|MTX_RECURSE); #endif #ifdef PLATFORM_OS_XP KeInitializeMutex(pmutex, 0); #endif #ifdef PLATFORM_OS_CE *pmutex = CreateMutex( NULL, _FALSE, NULL); #endif } void _rtw_mutex_free(_mutex *pmutex); void _rtw_mutex_free(_mutex *pmutex) { #ifdef PLATFORM_LINUX #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) mutex_destroy(pmutex); #else #endif #ifdef PLATFORM_FREEBSD sema_destroy(pmutex); #endif #endif #ifdef PLATFORM_OS_XP #endif #ifdef PLATFORM_OS_CE #endif } void _rtw_spinlock_init(_lock *plock) { #ifdef PLATFORM_LINUX spin_lock_init(plock); #endif #ifdef PLATFORM_FREEBSD mtx_init(plock, "", NULL, MTX_DEF|MTX_RECURSE); #endif #ifdef PLATFORM_WINDOWS NdisAllocateSpinLock(plock); #endif } void _rtw_spinlock_free(_lock *plock) { #ifdef PLATFORM_FREEBSD mtx_destroy(plock); #endif #ifdef PLATFORM_WINDOWS NdisFreeSpinLock(plock); #endif } #ifdef PLATFORM_FREEBSD extern PADAPTER prtw_lock; void rtw_mtx_lock(_lock *plock){ if(prtw_lock){ mtx_lock(&prtw_lock->glock); } else{ printf("%s prtw_lock==NULL",__FUNCTION__); } } void rtw_mtx_unlock(_lock *plock){ if(prtw_lock){ mtx_unlock(&prtw_lock->glock); } else{ printf("%s prtw_lock==NULL",__FUNCTION__); } } #endif //PLATFORM_FREEBSD void _rtw_spinlock(_lock *plock) { #ifdef PLATFORM_LINUX spin_lock(plock); #endif #ifdef PLATFORM_FREEBSD mtx_lock(plock); #endif #ifdef PLATFORM_WINDOWS NdisAcquireSpinLock(plock); #endif } void _rtw_spinunlock(_lock *plock) { #ifdef PLATFORM_LINUX spin_unlock(plock); #endif #ifdef PLATFORM_FREEBSD mtx_unlock(plock); #endif #ifdef PLATFORM_WINDOWS NdisReleaseSpinLock(plock); #endif } void _rtw_spinlock_ex(_lock *plock) { #ifdef PLATFORM_LINUX spin_lock(plock); #endif #ifdef PLATFORM_FREEBSD mtx_lock(plock); #endif #ifdef PLATFORM_WINDOWS NdisDprAcquireSpinLock(plock); #endif } void _rtw_spinunlock_ex(_lock *plock) { #ifdef PLATFORM_LINUX spin_unlock(plock); #endif #ifdef PLATFORM_FREEBSD mtx_unlock(plock); #endif #ifdef PLATFORM_WINDOWS NdisDprReleaseSpinLock(plock); #endif } void _rtw_init_queue(_queue *pqueue) { _rtw_init_listhead(&(pqueue->queue)); _rtw_spinlock_init(&(pqueue->lock)); } u32 _rtw_queue_empty(_queue *pqueue) { return (rtw_is_list_empty(&(pqueue->queue))); } u32 rtw_end_of_queue_search(_list *head, _list *plist) { if (head == plist) return _TRUE; else return _FALSE; } u32 rtw_get_current_time(void) { #ifdef PLATFORM_LINUX return jiffies; #endif #ifdef PLATFORM_FREEBSD struct timeval tvp; getmicrotime(&tvp); return tvp.tv_sec; #endif #ifdef PLATFORM_WINDOWS LARGE_INTEGER SystemTime; NdisGetCurrentSystemTime(&SystemTime); return (u32)(SystemTime.LowPart);// count of 100-nanosecond intervals #endif } inline u32 rtw_systime_to_ms(u32 systime) { #ifdef PLATFORM_LINUX return systime * 1000 / HZ; #endif #ifdef PLATFORM_FREEBSD return systime * 1000; #endif #ifdef PLATFORM_WINDOWS return systime / 10000 ; #endif } inline u32 rtw_ms_to_systime(u32 ms) { #ifdef PLATFORM_LINUX return ms * HZ / 1000; #endif #ifdef PLATFORM_FREEBSD return ms /1000; #endif #ifdef PLATFORM_WINDOWS return ms * 10000 ; #endif } // the input parameter start use the same unit as returned by rtw_get_current_time inline s32 rtw_get_passing_time_ms(u32 start) { #ifdef PLATFORM_LINUX return rtw_systime_to_ms(jiffies-start); #endif #ifdef PLATFORM_FREEBSD return rtw_systime_to_ms(rtw_get_current_time()); #endif #ifdef PLATFORM_WINDOWS LARGE_INTEGER SystemTime; NdisGetCurrentSystemTime(&SystemTime); return rtw_systime_to_ms((u32)(SystemTime.LowPart) - start) ; #endif } inline s32 rtw_get_time_interval_ms(u32 start, u32 end) { #ifdef PLATFORM_LINUX return rtw_systime_to_ms(end-start); #endif #ifdef PLATFORM_FREEBSD return rtw_systime_to_ms(rtw_get_current_time()); #endif #ifdef PLATFORM_WINDOWS return rtw_systime_to_ms(end-start); #endif } void rtw_sleep_schedulable(int ms) { #ifdef PLATFORM_LINUX u32 delta; delta = (ms * HZ)/1000;//(ms) if (delta == 0) { delta = 1;// 1 ms } set_current_state(TASK_INTERRUPTIBLE); if (schedule_timeout(delta) != 0) { return ; } return; #endif #ifdef PLATFORM_FREEBSD DELAY(ms*1000); return ; #endif #ifdef PLATFORM_WINDOWS NdisMSleep(ms*1000); //(us)*1000=(ms) #endif } void rtw_msleep_os(int ms) { #ifdef PLATFORM_LINUX #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) if (ms < 20) { unsigned long us = ms * 1000UL; usleep_range(us, us + 1000UL); } else #endif msleep((unsigned int)ms); #endif #ifdef PLATFORM_FREEBSD //Delay for delay microseconds DELAY(ms*1000); return ; #endif #ifdef PLATFORM_WINDOWS NdisMSleep(ms*1000); //(us)*1000=(ms) #endif } void rtw_usleep_os(int us) { #ifdef PLATFORM_LINUX // msleep((unsigned int)us); #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) usleep_range(us, us + 1); #else if ( 1 < (us/1000) ) msleep(1); else msleep( (us/1000) + 1); #endif #endif #ifdef PLATFORM_FREEBSD //Delay for delay microseconds DELAY(us); return ; #endif #ifdef PLATFORM_WINDOWS NdisMSleep(us); //(us) #endif } #ifdef DBG_DELAY_OS void _rtw_mdelay_os(int ms, const char *func, const int line) { #if 0 if(ms>10) DBG_871X("%s:%d %s(%d)\n", func, line, __FUNCTION__, ms); rtw_msleep_os(ms); return; #endif DBG_871X("%s:%d %s(%d)\n", func, line, __FUNCTION__, ms); #if defined(PLATFORM_LINUX) mdelay((unsigned long)ms); #elif defined(PLATFORM_WINDOWS) NdisStallExecution(ms*1000); //(us)*1000=(ms) #endif } void _rtw_udelay_os(int us, const char *func, const int line) { #if 0 if(us > 1000) { DBG_871X("%s:%d %s(%d)\n", func, line, __FUNCTION__, us); rtw_usleep_os(us); return; } #endif DBG_871X("%s:%d %s(%d)\n", func, line, __FUNCTION__, us); #if defined(PLATFORM_LINUX) udelay((unsigned long)us); #elif defined(PLATFORM_WINDOWS) NdisStallExecution(us); //(us) #endif } #else void rtw_mdelay_os(int ms) { #ifdef PLATFORM_LINUX mdelay((unsigned long)ms); #endif #ifdef PLATFORM_FREEBSD DELAY(ms*1000); return ; #endif #ifdef PLATFORM_WINDOWS NdisStallExecution(ms*1000); //(us)*1000=(ms) #endif } void rtw_udelay_os(int us) { #ifdef PLATFORM_LINUX udelay((unsigned long)us); #endif #ifdef PLATFORM_FREEBSD //Delay for delay microseconds DELAY(us); return ; #endif #ifdef PLATFORM_WINDOWS NdisStallExecution(us); //(us) #endif } #endif void rtw_yield_os() { #ifdef PLATFORM_LINUX yield(); #endif #ifdef PLATFORM_FREEBSD yield(); #endif #ifdef PLATFORM_WINDOWS SwitchToThread(); #endif } #define RTW_SUSPEND_LOCK_NAME "rtw_wifi" #define RTW_SUSPEND_EXT_LOCK_NAME "rtw_wifi_ext" #define RTW_SUSPEND_RX_LOCK_NAME "rtw_wifi_rx" #define RTW_SUSPEND_TRAFFIC_LOCK_NAME "rtw_wifi_traffic" #define RTW_SUSPEND_RESUME_LOCK_NAME "rtw_wifi_resume" #define RTW_RESUME_SCAN_LOCK_NAME "rtw_wifi_scan" #ifdef CONFIG_WAKELOCK static struct wake_lock rtw_suspend_lock; static struct wake_lock rtw_suspend_ext_lock; static struct wake_lock rtw_suspend_rx_lock; static struct wake_lock rtw_suspend_traffic_lock; static struct wake_lock rtw_suspend_resume_lock; static struct wake_lock rtw_resume_scan_lock; #elif defined(CONFIG_ANDROID_POWER) static android_suspend_lock_t rtw_suspend_lock ={ .name = RTW_SUSPEND_LOCK_NAME }; static android_suspend_lock_t rtw_suspend_ext_lock ={ .name = RTW_SUSPEND_EXT_LOCK_NAME }; static android_suspend_lock_t rtw_suspend_rx_lock ={ .name = RTW_SUSPEND_RX_LOCK_NAME }; static android_suspend_lock_t rtw_suspend_traffic_lock ={ .name = RTW_SUSPEND_TRAFFIC_LOCK_NAME }; static android_suspend_lock_t rtw_suspend_resume_lock ={ .name = RTW_SUSPEND_RESUME_LOCK_NAME }; static android_suspend_lock_t rtw_resume_scan_lock ={ .name = RTW_RESUME_SCAN_LOCK_NAME }; #endif inline void rtw_suspend_lock_init() { #ifdef CONFIG_WAKELOCK wake_lock_init(&rtw_suspend_lock, WAKE_LOCK_SUSPEND, RTW_SUSPEND_LOCK_NAME); wake_lock_init(&rtw_suspend_ext_lock, WAKE_LOCK_SUSPEND, RTW_SUSPEND_EXT_LOCK_NAME); wake_lock_init(&rtw_suspend_rx_lock, WAKE_LOCK_SUSPEND, RTW_SUSPEND_RX_LOCK_NAME); wake_lock_init(&rtw_suspend_traffic_lock, WAKE_LOCK_SUSPEND, RTW_SUSPEND_TRAFFIC_LOCK_NAME); wake_lock_init(&rtw_suspend_resume_lock, WAKE_LOCK_SUSPEND, RTW_SUSPEND_RESUME_LOCK_NAME); wake_lock_init(&rtw_resume_scan_lock, WAKE_LOCK_SUSPEND, RTW_RESUME_SCAN_LOCK_NAME); #elif defined(CONFIG_ANDROID_POWER) android_init_suspend_lock(&rtw_suspend_lock); android_init_suspend_lock(&rtw_suspend_ext_lock); android_init_suspend_lock(&rtw_suspend_rx_lock); android_init_suspend_lock(&rtw_suspend_traffic_lock); android_init_suspend_lock(&rtw_suspend_resume_lock); android_init_suspend_lock(&rtw_resume_scan_lock); #endif } inline void rtw_suspend_lock_uninit() { #ifdef CONFIG_WAKELOCK wake_lock_destroy(&rtw_suspend_lock); wake_lock_destroy(&rtw_suspend_ext_lock); wake_lock_destroy(&rtw_suspend_rx_lock); wake_lock_destroy(&rtw_suspend_traffic_lock); wake_lock_destroy(&rtw_suspend_resume_lock); wake_lock_destroy(&rtw_resume_scan_lock); #elif defined(CONFIG_ANDROID_POWER) android_uninit_suspend_lock(&rtw_suspend_lock); android_uninit_suspend_lock(&rtw_suspend_ext_lock); android_uninit_suspend_lock(&rtw_suspend_rx_lock); android_uninit_suspend_lock(&rtw_suspend_traffic_lock); android_uninit_suspend_lock(&rtw_suspend_resume_lock); android_uninit_suspend_lock(&rtw_resume_scan_lock); #endif } inline void rtw_lock_suspend(void) { #ifdef CONFIG_WAKELOCK wake_lock(&rtw_suspend_lock); #elif defined(CONFIG_ANDROID_POWER) android_lock_suspend(&rtw_suspend_lock); #endif #if defined(CONFIG_WAKELOCK) || defined(CONFIG_ANDROID_POWER) //DBG_871X("####%s: suspend_lock_count:%d####\n", __FUNCTION__, rtw_suspend_lock.stat.count); #endif } inline void rtw_unlock_suspend(void) { #ifdef CONFIG_WAKELOCK wake_unlock(&rtw_suspend_lock); #elif defined(CONFIG_ANDROID_POWER) android_unlock_suspend(&rtw_suspend_lock); #endif #if defined(CONFIG_WAKELOCK) || defined(CONFIG_ANDROID_POWER) //DBG_871X("####%s: suspend_lock_count:%d####\n", __FUNCTION__, rtw_suspend_lock.stat.count); #endif } inline void rtw_resume_lock_suspend(void) { #ifdef CONFIG_WAKELOCK wake_lock(&rtw_suspend_resume_lock); #elif defined(CONFIG_ANDROID_POWER) android_lock_suspend(&rtw_suspend_resume_lock); #endif #if defined(CONFIG_WAKELOCK) || defined(CONFIG_ANDROID_POWER) //DBG_871X("####%s: suspend_lock_count:%d####\n", __FUNCTION__, rtw_suspend_lock.stat.count); #endif } inline void rtw_resume_unlock_suspend(void) { #ifdef CONFIG_WAKELOCK wake_unlock(&rtw_suspend_resume_lock); #elif defined(CONFIG_ANDROID_POWER) android_unlock_suspend(&rtw_suspend_resume_lock); #endif #if defined(CONFIG_WAKELOCK) || defined(CONFIG_ANDROID_POWER) //DBG_871X("####%s: suspend_lock_count:%d####\n", __FUNCTION__, rtw_suspend_lock.stat.count); #endif } inline void rtw_lock_suspend_timeout(u32 timeout_ms) { #ifdef CONFIG_WAKELOCK wake_lock_timeout(&rtw_suspend_lock, rtw_ms_to_systime(timeout_ms)); #elif defined(CONFIG_ANDROID_POWER) android_lock_suspend_auto_expire(&rtw_suspend_lock, rtw_ms_to_systime(timeout_ms)); #endif } inline void rtw_lock_ext_suspend_timeout(u32 timeout_ms) { #ifdef CONFIG_WAKELOCK wake_lock_timeout(&rtw_suspend_ext_lock, rtw_ms_to_systime(timeout_ms)); #elif defined(CONFIG_ANDROID_POWER) android_lock_suspend_auto_expire(&rtw_suspend_ext_lock, rtw_ms_to_systime(timeout_ms)); #endif //DBG_871X("EXT lock timeout:%d\n", timeout_ms); } inline void rtw_lock_rx_suspend_timeout(u32 timeout_ms) { #ifdef CONFIG_WAKELOCK wake_lock_timeout(&rtw_suspend_rx_lock, rtw_ms_to_systime(timeout_ms)); #elif defined(CONFIG_ANDROID_POWER) android_lock_suspend_auto_expire(&rtw_suspend_rx_lock, rtw_ms_to_systime(timeout_ms)); #endif //DBG_871X("RX lock timeout:%d\n", timeout_ms); } inline void rtw_lock_traffic_suspend_timeout(u32 timeout_ms) { #ifdef CONFIG_WAKELOCK wake_lock_timeout(&rtw_suspend_traffic_lock, rtw_ms_to_systime(timeout_ms)); #elif defined(CONFIG_ANDROID_POWER) android_lock_suspend_auto_expire(&rtw_suspend_traffic_lock, rtw_ms_to_systime(timeout_ms)); #endif //DBG_871X("traffic lock timeout:%d\n", timeout_ms); } inline void rtw_lock_resume_scan_timeout(u32 timeout_ms) { #ifdef CONFIG_WAKELOCK wake_lock_timeout(&rtw_resume_scan_lock, rtw_ms_to_systime(timeout_ms)); #elif defined(CONFIG_ANDROID_POWER) android_lock_suspend_auto_expire(&rtw_resume_scan_lock, rtw_ms_to_systime(timeout_ms)); #endif //DBG_871X("resume scan lock:%d\n", timeout_ms); } inline void ATOMIC_SET(ATOMIC_T *v, int i) { #ifdef PLATFORM_LINUX atomic_set(v,i); #elif defined(PLATFORM_WINDOWS) *v=i;// other choice???? #elif defined(PLATFORM_FREEBSD) atomic_set_int(v,i); #endif } inline int ATOMIC_READ(ATOMIC_T *v) { #ifdef PLATFORM_LINUX return atomic_read(v); #elif defined(PLATFORM_WINDOWS) return *v; // other choice???? #elif defined(PLATFORM_FREEBSD) return atomic_load_acq_32(v); #endif } inline void ATOMIC_ADD(ATOMIC_T *v, int i) { #ifdef PLATFORM_LINUX atomic_add(i,v); #elif defined(PLATFORM_WINDOWS) InterlockedAdd(v,i); #elif defined(PLATFORM_FREEBSD) atomic_add_int(v,i); #endif } inline void ATOMIC_SUB(ATOMIC_T *v, int i) { #ifdef PLATFORM_LINUX atomic_sub(i,v); #elif defined(PLATFORM_WINDOWS) InterlockedAdd(v,-i); #elif defined(PLATFORM_FREEBSD) atomic_subtract_int(v,i); #endif } inline void ATOMIC_INC(ATOMIC_T *v) { #ifdef PLATFORM_LINUX atomic_inc(v); #elif defined(PLATFORM_WINDOWS) InterlockedIncrement(v); #elif defined(PLATFORM_FREEBSD) atomic_add_int(v,1); #endif } inline void ATOMIC_DEC(ATOMIC_T *v) { #ifdef PLATFORM_LINUX atomic_dec(v); #elif defined(PLATFORM_WINDOWS) InterlockedDecrement(v); #elif defined(PLATFORM_FREEBSD) atomic_subtract_int(v,1); #endif } inline int ATOMIC_ADD_RETURN(ATOMIC_T *v, int i) { #ifdef PLATFORM_LINUX return atomic_add_return(i,v); #elif defined(PLATFORM_WINDOWS) return InterlockedAdd(v,i); #elif defined(PLATFORM_FREEBSD) atomic_add_int(v,i); return atomic_load_acq_32(v); #endif } inline int ATOMIC_SUB_RETURN(ATOMIC_T *v, int i) { #ifdef PLATFORM_LINUX return atomic_sub_return(i,v); #elif defined(PLATFORM_WINDOWS) return InterlockedAdd(v,-i); #elif defined(PLATFORM_FREEBSD) atomic_subtract_int(v,i); return atomic_load_acq_32(v); #endif } inline int ATOMIC_INC_RETURN(ATOMIC_T *v) { #ifdef PLATFORM_LINUX return atomic_inc_return(v); #elif defined(PLATFORM_WINDOWS) return InterlockedIncrement(v); #elif defined(PLATFORM_FREEBSD) atomic_add_int(v,1); return atomic_load_acq_32(v); #endif } inline int ATOMIC_DEC_RETURN(ATOMIC_T *v) { #ifdef PLATFORM_LINUX return atomic_dec_return(v); #elif defined(PLATFORM_WINDOWS) return InterlockedDecrement(v); #elif defined(PLATFORM_FREEBSD) atomic_subtract_int(v,1); return atomic_load_acq_32(v); #endif } #ifdef PLATFORM_LINUX /* * Open a file with the specific @param path, @param flag, @param mode * @param fpp the pointer of struct file pointer to get struct file pointer while file opening is success * @param path the path of the file to open * @param flag file operation flags, please refer to linux document * @param mode please refer to linux document * @return Linux specific error code */ static int openFile(struct file **fpp, char *path, int flag, int mode) { struct file *fp; fp=filp_open(path, flag, mode); if(IS_ERR(fp)) { *fpp=NULL; return PTR_ERR(fp); } else { *fpp=fp; return 0; } } /* * Close the file with the specific @param fp * @param fp the pointer of struct file to close * @return always 0 */ static int closeFile(struct file *fp) { filp_close(fp,NULL); return 0; } static int readFile(struct file *fp,char *buf,int len) { int rlen=0, sum=0; if (!fp->f_op || !fp->f_op->read) return -EPERM; while(sumf_op->read(fp,buf+sum,len-sum, &fp->f_pos); if(rlen>0) sum+=rlen; else if(0 != rlen) return rlen; else break; } return sum; } static int writeFile(struct file *fp,char *buf,int len) { int wlen=0, sum=0; if (!fp->f_op || !fp->f_op->write) return -EPERM; while(sumf_op->write(fp,buf+sum,len-sum, &fp->f_pos); if(wlen>0) sum+=wlen; else if(0 != wlen) return wlen; else break; } return sum; } /* * Test if the specifi @param path is a file and readable * @param path the path of the file to test * @return Linux specific error code */ static int isFileReadable(char *path) { struct file *fp; int ret = 0; mm_segment_t oldfs; char buf; fp=filp_open(path, O_RDONLY, 0); if(IS_ERR(fp)) { ret = PTR_ERR(fp); } else { oldfs = get_fs(); set_fs(get_ds()); if(1!=readFile(fp, &buf, 1)) ret = PTR_ERR(fp); set_fs(oldfs); filp_close(fp,NULL); } return ret; } /* * Open the file with @param path and retrive the file content into memory starting from @param buf for @param sz at most * @param path the path of the file to open and read * @param buf the starting address of the buffer to store file content * @param sz how many bytes to read at most * @return the byte we've read, or Linux specific error code */ static int retriveFromFile(char *path, u8* buf, u32 sz) { int ret =-1; mm_segment_t oldfs; struct file *fp; if(path && buf) { if( 0 == (ret=openFile(&fp,path, O_RDONLY, 0)) ){ DBG_871X("%s openFile path:%s fp=%p\n",__FUNCTION__, path ,fp); oldfs = get_fs(); set_fs(get_ds()); ret=readFile(fp, buf, sz); set_fs(oldfs); closeFile(fp); DBG_871X("%s readFile, ret:%d\n",__FUNCTION__, ret); } else { DBG_871X("%s openFile path:%s Fail, ret:%d\n",__FUNCTION__, path, ret); } } else { DBG_871X("%s NULL pointer\n",__FUNCTION__); ret = -EINVAL; } return ret; } /* * Open the file with @param path and wirte @param sz byte of data starting from @param buf into the file * @param path the path of the file to open and write * @param buf the starting address of the data to write into file * @param sz how many bytes to write at most * @return the byte we've written, or Linux specific error code */ static int storeToFile(char *path, u8* buf, u32 sz) { int ret =0; mm_segment_t oldfs; struct file *fp; if(path && buf) { if( 0 == (ret=openFile(&fp, path, O_CREAT|O_WRONLY, 0666)) ) { DBG_871X("%s openFile path:%s fp=%p\n",__FUNCTION__, path ,fp); oldfs = get_fs(); set_fs(get_ds()); ret=writeFile(fp, buf, sz); set_fs(oldfs); closeFile(fp); DBG_871X("%s writeFile, ret:%d\n",__FUNCTION__, ret); } else { DBG_871X("%s openFile path:%s Fail, ret:%d\n",__FUNCTION__, path, ret); } } else { DBG_871X("%s NULL pointer\n",__FUNCTION__); ret = -EINVAL; } return ret; } #endif //PLATFORM_LINUX /* * Test if the specifi @param path is a file and readable * @param path the path of the file to test * @return _TRUE or _FALSE */ int rtw_is_file_readable(char *path) { #ifdef PLATFORM_LINUX if(isFileReadable(path) == 0) return _TRUE; else return _FALSE; #else //Todo... return _FALSE; #endif } /* * Open the file with @param path and retrive the file content into memory starting from @param buf for @param sz at most * @param path the path of the file to open and read * @param buf the starting address of the buffer to store file content * @param sz how many bytes to read at most * @return the byte we've read */ int rtw_retrive_from_file(char *path, u8* buf, u32 sz) { #ifdef PLATFORM_LINUX int ret =retriveFromFile(path, buf, sz); return ret>=0?ret:0; #else //Todo... return 0; #endif } /* * Open the file with @param path and wirte @param sz byte of data starting from @param buf into the file * @param path the path of the file to open and write * @param buf the starting address of the data to write into file * @param sz how many bytes to write at most * @return the byte we've written */ int rtw_store_to_file(char *path, u8* buf, u32 sz) { #ifdef PLATFORM_LINUX int ret =storeToFile(path, buf, sz); return ret>=0?ret:0; #else //Todo... return 0; #endif } #ifdef PLATFORM_LINUX struct net_device *rtw_alloc_etherdev_with_old_priv(int sizeof_priv, void *old_priv) { struct net_device *pnetdev; struct rtw_netdev_priv_indicator *pnpi; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) pnetdev = alloc_etherdev_mq(sizeof(struct rtw_netdev_priv_indicator), 4); #else pnetdev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator)); #endif if (!pnetdev) goto RETURN; pnpi = netdev_priv(pnetdev); pnpi->priv=old_priv; pnpi->sizeof_priv=sizeof_priv; RETURN: return pnetdev; } struct net_device *rtw_alloc_etherdev(int sizeof_priv) { struct net_device *pnetdev; struct rtw_netdev_priv_indicator *pnpi; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) pnetdev = alloc_etherdev_mq(sizeof(struct rtw_netdev_priv_indicator), 4); #else pnetdev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator)); #endif if (!pnetdev) goto RETURN; pnpi = netdev_priv(pnetdev); pnpi->priv = rtw_zvmalloc(sizeof_priv); if (!pnpi->priv) { free_netdev(pnetdev); pnetdev = NULL; goto RETURN; } pnpi->sizeof_priv=sizeof_priv; RETURN: return pnetdev; } void rtw_free_netdev(struct net_device * netdev) { struct rtw_netdev_priv_indicator *pnpi; if(!netdev) goto RETURN; pnpi = netdev_priv(netdev); if(!pnpi->priv) goto RETURN; rtw_vmfree(pnpi->priv, pnpi->sizeof_priv); free_netdev(netdev); RETURN: return; } /* * Jeff: this function should be called under ioctl (rtnl_lock is accquired) while * LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26) */ int rtw_change_ifname(_adapter *padapter, const char *ifname) { struct net_device *pnetdev; struct net_device *cur_pnetdev; struct rereg_nd_name_data *rereg_priv; int ret; if(!padapter) goto error; cur_pnetdev = padapter->pnetdev; rereg_priv = &padapter->rereg_nd_name_priv; //free the old_pnetdev if(rereg_priv->old_pnetdev) { free_netdev(rereg_priv->old_pnetdev); rereg_priv->old_pnetdev = NULL; } #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)) if(!rtnl_is_locked()) unregister_netdev(cur_pnetdev); else #endif unregister_netdevice(cur_pnetdev); rereg_priv->old_pnetdev=cur_pnetdev; pnetdev = rtw_init_netdev(padapter); if (!pnetdev) { ret = -1; goto error; } SET_NETDEV_DEV(pnetdev, dvobj_to_dev(adapter_to_dvobj(padapter))); rtw_init_netdev_name(pnetdev, ifname); _rtw_memcpy(pnetdev->dev_addr, padapter->eeprompriv.mac_addr, ETH_ALEN); #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)) if(!rtnl_is_locked()) ret = register_netdev(pnetdev); else #endif ret = register_netdevice(pnetdev); if ( ret != 0) { RT_TRACE(_module_hci_intfs_c_,_drv_err_,("register_netdev() failed\n")); goto error; } return 0; error: return -1; } #endif #ifdef PLATFORM_FREEBSD /* * Copy a buffer from userspace and write into kernel address * space. * * This emulation just calls the FreeBSD copyin function (to * copy data from user space buffer into a kernel space buffer) * and is designed to be used with the above io_write_wrapper. * * This function should return the number of bytes not copied. * I.e. success results in a zero value. * Negative error values are not returned. */ unsigned long copy_from_user(void *to, const void *from, unsigned long n) { if ( copyin(from, to, n) != 0 ) { /* Any errors will be treated as a failure to copy any of the requested bytes */ return n; } return 0; } unsigned long copy_to_user(void *to, const void *from, unsigned long n) { if ( copyout(from, to, n) != 0 ) { /* Any errors will be treated as a failure to copy any of the requested bytes */ return n; } return 0; } /* * The usb_register and usb_deregister functions are used to register * usb drivers with the usb subsystem. In this compatibility layer * emulation a list of drivers (struct usb_driver) is maintained * and is used for probing/attaching etc. * * usb_register and usb_deregister simply call these functions. */ int usb_register(struct usb_driver *driver) { rtw_usb_linux_register(driver); return 0; } int usb_deregister(struct usb_driver *driver) { rtw_usb_linux_deregister(driver); return 0; } void module_init_exit_wrapper(void *arg) { int (*func)(void) = arg; func(); return; } #endif //PLATFORM_FREEBSD #ifdef CONFIG_PLATFORM_SPRD #ifdef do_div #undef do_div #endif #include #endif u64 rtw_modular64(u64 x, u64 y) { #ifdef PLATFORM_LINUX return do_div(x, y); #elif defined(PLATFORM_WINDOWS) return (x % y); #elif defined(PLATFORM_FREEBSD) return (x %y); #endif } u64 rtw_division64(u64 x, u64 y) { #ifdef PLATFORM_LINUX do_div(x, y); return x; #elif defined(PLATFORM_WINDOWS) return (x / y); #elif defined(PLATFORM_FREEBSD) return (x / y); #endif } inline u32 rtw_random32(void) { #ifdef PLATFORM_LINUX #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0)) return prandom_u32(); #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)) u32 random_int; get_random_bytes( &random_int , 4 ); return random_int; #else return random32(); #endif #elif defined(PLATFORM_WINDOWS) #error "to be implemented\n" #elif defined(PLATFORM_FREEBSD) #error "to be implemented\n" #endif } void rtw_buf_free(u8 **buf, u32 *buf_len) { u32 ori_len; if (!buf || !buf_len) return; ori_len = *buf_len; if (*buf) { u32 tmp_buf_len = *buf_len; *buf_len = 0; rtw_mfree(*buf, tmp_buf_len); *buf = NULL; } } void rtw_buf_update(u8 **buf, u32 *buf_len, u8 *src, u32 src_len) { u32 ori_len = 0, dup_len = 0; u8 *ori = NULL; u8 *dup = NULL; if (!buf || !buf_len) return; if (!src || !src_len) goto keep_ori; /* duplicate src */ dup = rtw_malloc(src_len); if (dup) { dup_len = src_len; _rtw_memcpy(dup, src, dup_len); } keep_ori: ori = *buf; ori_len = *buf_len; /* replace buf with dup */ *buf_len = 0; *buf = dup; *buf_len = dup_len; /* free ori */ if (ori && ori_len > 0) rtw_mfree(ori, ori_len); } /** * rtw_cbuf_full - test if cbuf is full * @cbuf: pointer of struct rtw_cbuf * * Returns: _TRUE if cbuf is full */ inline bool rtw_cbuf_full(struct rtw_cbuf *cbuf) { return (cbuf->write == cbuf->read-1)? _TRUE : _FALSE; } /** * rtw_cbuf_empty - test if cbuf is empty * @cbuf: pointer of struct rtw_cbuf * * Returns: _TRUE if cbuf is empty */ inline bool rtw_cbuf_empty(struct rtw_cbuf *cbuf) { return (cbuf->write == cbuf->read)? _TRUE : _FALSE; } /** * rtw_cbuf_push - push a pointer into cbuf * @cbuf: pointer of struct rtw_cbuf * @buf: pointer to push in * * Lock free operation, be careful of the use scheme * Returns: _TRUE push success */ bool rtw_cbuf_push(struct rtw_cbuf *cbuf, void *buf) { if (rtw_cbuf_full(cbuf)) return _FAIL; if (0) DBG_871X("%s on %u\n", __func__, cbuf->write); cbuf->bufs[cbuf->write] = buf; cbuf->write = (cbuf->write+1)%cbuf->size; return _SUCCESS; } /** * rtw_cbuf_pop - pop a pointer from cbuf * @cbuf: pointer of struct rtw_cbuf * * Lock free operation, be careful of the use scheme * Returns: pointer popped out */ void *rtw_cbuf_pop(struct rtw_cbuf *cbuf) { void *buf; if (rtw_cbuf_empty(cbuf)) return NULL; if (0) DBG_871X("%s on %u\n", __func__, cbuf->read); buf = cbuf->bufs[cbuf->read]; cbuf->read = (cbuf->read+1)%cbuf->size; return buf; } /** * rtw_cbuf_alloc - allocte a rtw_cbuf with given size and do initialization * @size: size of pointer * * Returns: pointer of srtuct rtw_cbuf, NULL for allocation failure */ struct rtw_cbuf *rtw_cbuf_alloc(u32 size) { struct rtw_cbuf *cbuf; cbuf = (struct rtw_cbuf *)rtw_malloc(sizeof(*cbuf) + sizeof(void*)*size); if (cbuf) { cbuf->write = cbuf->read = 0; cbuf->size = size; } return cbuf; } /** * rtw_cbuf_free - free the given rtw_cbuf * @cbuf: pointer of struct rtw_cbuf to free */ void rtw_cbuf_free(struct rtw_cbuf *cbuf) { rtw_mfree((u8*)cbuf, sizeof(*cbuf) + sizeof(void*)*cbuf->size); } rtl8812au-4.3.8.12175.20140902+dfsg/platform/000077500000000000000000000000001261122257400173235ustar00rootroot00000000000000rtl8812au-4.3.8.12175.20140902+dfsg/platform/platform_ARM_SUNnI_sdio.c000066400000000000000000000066411261122257400240530ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ /* * Description: * This file can be applied to following platforms: * CONFIG_PLATFORM_ARM_SUN6I * CONFIG_PLATFORM_ARM_SUN7I * CONFIG_PLATFORM_ARM_SUN8I */ #include #include #ifdef CONFIG_GPIO_WAKEUP #include #endif #ifdef CONFIG_MMC static int sdc_id = -1; static signed int gpio_eint_wlan = -1; static u32 eint_wlan_handle = 0; #if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) extern void sw_mci_rescan_card(unsigned id, unsigned insert); #elif defined(CONFIG_PLATFORM_ARM_SUN8I) extern void sunxi_mci_rescan_card(unsigned id, unsigned insert); #endif extern int wifi_pm_get_mod_type(void); extern void wifi_pm_power(int on); #ifdef CONFIG_GPIO_WAKEUP extern unsigned int oob_irq; #endif #endif // CONFIG_MMC /* * Return: * 0: power on successfully * others: power on failed */ int platform_wifi_power_on(void) { int ret = 0; #ifdef CONFIG_MMC { script_item_u val; script_item_value_type_e type; unsigned int mod_sel = wifi_pm_get_mod_type(); type = script_get_item("wifi_para", "wifi_sdc_id", &val); if (SCIRPT_ITEM_VALUE_TYPE_INT!=type) { DBG_871X("get wifi_sdc_id failed\n"); ret = -1; } else { sdc_id = val.val; DBG_871X("----- %s sdc_id: %d, mod_sel: %d\n", __FUNCTION__, sdc_id, mod_sel); #if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) sw_mci_rescan_card(sdc_id, 1); #elif defined(CONFIG_PLATFORM_ARM_SUN8I) sunxi_mci_rescan_card(sdc_id, 1); #endif mdelay(100); wifi_pm_power(1); DBG_871X("%s: power up, rescan card.\n", __FUNCTION__); } #ifdef CONFIG_GPIO_WAKEUP #ifdef CONFIG_RTL8723B type = script_get_item("wifi_para", "rtl8723bs_wl_host_wake", &val); #endif #ifdef CONFIG_RTL8188E type = script_get_item("wifi_para", "rtl8189es_host_wake", &val); #endif if (SCIRPT_ITEM_VALUE_TYPE_PIO != type) { DBG_871X("No definition of wake up host PIN\n"); ret = -1; } else { gpio_eint_wlan = val.gpio.gpio; #ifdef CONFIG_PLATFORM_ARM_SUN8I oob_irq = gpio_to_irq(gpio_eint_wlan); #endif } #endif // CONFIG_GPIO_WAKEUP } #endif // CONFIG_MMC return ret; } void platform_wifi_power_off(void) { #ifdef CONFIG_MMC #if defined(CONFIG_PLATFORM_ARM_SUN6I) ||defined(CONFIG_PLATFORM_ARM_SUN7I) sw_mci_rescan_card(sdc_id, 0); #elif defined(CONFIG_PLATFORM_ARM_SUN8I) sunxi_mci_rescan_card(sdc_id, 0); #endif mdelay(100); wifi_pm_power(0); DBG_871X("%s: remove card, power off.\n", __FUNCTION__); #endif // CONFIG_MMC } rtl8812au-4.3.8.12175.20140902+dfsg/platform/platform_ARM_SUNxI_sdio.c000066400000000000000000000056261261122257400240670ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include #ifdef CONFIG_MMC_SUNXI_POWER_CONTROL #ifdef CONFIG_WITS_EVB_V13 #define SDIOID 0 #else // !CONFIG_WITS_EVB_V13 #define SDIOID (CONFIG_CHIP_ID==1123 ? 3 : 1) #endif // !CONFIG_WITS_EVB_V13 #define SUNXI_SDIO_WIFI_NUM_RTL8189ES 10 extern void sunximmc_rescan_card(unsigned id, unsigned insert); extern int mmc_pm_get_mod_type(void); extern int mmc_pm_gpio_ctrl(char* name, int level); /* * rtl8189es_shdn = port:PH09<1><0> * rtl8189es_wakeup = port:PH10<1><1> * rtl8189es_vdd_en = port:PH11<1><0> * rtl8189es_vcc_en = port:PH12<1><0> */ int rtl8189es_sdio_powerup(void) { mmc_pm_gpio_ctrl("rtl8189es_vdd_en", 1); udelay(100); mmc_pm_gpio_ctrl("rtl8189es_vcc_en", 1); udelay(50); mmc_pm_gpio_ctrl("rtl8189es_shdn", 1); return 0; } int rtl8189es_sdio_poweroff(void) { mmc_pm_gpio_ctrl("rtl8189es_shdn", 0); mmc_pm_gpio_ctrl("rtl8189es_vcc_en", 0); mmc_pm_gpio_ctrl("rtl8189es_vdd_en", 0); return 0; } #endif // CONFIG_MMC_SUNXI_POWER_CONTROL /* * Return: * 0: power on successfully * others: power on failed */ int platform_wifi_power_on(void) { int ret = 0; #ifdef CONFIG_MMC_SUNXI_POWER_CONTROL unsigned int mod_sel = mmc_pm_get_mod_type(); #endif // CONFIG_MMC_SUNXI_POWER_CONTROL #ifdef CONFIG_MMC_SUNXI_POWER_CONTROL if (mod_sel == SUNXI_SDIO_WIFI_NUM_RTL8189ES) { rtl8189es_sdio_powerup(); sunximmc_rescan_card(SDIOID, 1); printk("[rtl8189es] %s: power up, rescan card.\n", __FUNCTION__); } else { ret = -1; printk("[rtl8189es] %s: mod_sel = %d is incorrect.\n", __FUNCTION__, mod_sel); } #endif // CONFIG_MMC_SUNXI_POWER_CONTROL return ret; } void platform_wifi_power_off(void) { #ifdef CONFIG_MMC_SUNXI_POWER_CONTROL sunximmc_rescan_card(SDIOID, 0); #ifdef CONFIG_RTL8188E rtl8189es_sdio_poweroff(); printk("[rtl8189es] %s: remove card, power off.\n", __FUNCTION__); #endif // CONFIG_RTL8188E #endif // CONFIG_MMC_SUNXI_POWER_CONTROL } rtl8812au-4.3.8.12175.20140902+dfsg/platform/platform_ARM_SUNxI_usb.c000066400000000000000000000102261261122257400237120ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ /* * Description: * This file can be applied to following platforms: * CONFIG_PLATFORM_ARM_SUNXI Series platform * */ #include #include #ifdef CONFIG_PLATFORM_ARM_SUNxI extern int sw_usb_disable_hcd(__u32 usbc_no); extern int sw_usb_enable_hcd(__u32 usbc_no); static int usb_wifi_host = 2; #endif #if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) extern int sw_usb_disable_hcd(__u32 usbc_no); extern int sw_usb_enable_hcd(__u32 usbc_no); extern void wifi_pm_power(int on); static script_item_u item; #endif #ifdef CONFIG_PLATFORM_ARM_SUN8I extern int sunxi_usb_disable_hcd(__u32 usbc_no); extern int sunxi_usb_enable_hcd(__u32 usbc_no); extern void wifi_pm_power(int on); static script_item_u item; #endif int platform_wifi_power_on(void) { int ret = 0; #ifdef CONFIG_PLATFORM_ARM_SUNxI #ifndef CONFIG_RTL8723A { /* ----------get usb_wifi_usbc_num------------- */ ret = script_parser_fetch("usb_wifi_para", "usb_wifi_usbc_num", (int *)&usb_wifi_host, 64); if(ret != 0){ DBG_8192C("ERR: script_parser_fetch usb_wifi_usbc_num failed\n"); ret = -ENOMEM; goto exit; } DBG_8192C("sw_usb_enable_hcd: usbc_num = %d\n", usb_wifi_host); sw_usb_enable_hcd(usb_wifi_host); } #endif //CONFIG_RTL8723A #endif //CONFIG_PLATFORM_ARM_SUNxI #if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) { script_item_value_type_e type; type = script_get_item("wifi_para", "wifi_usbc_id", &item); if(SCIRPT_ITEM_VALUE_TYPE_INT != type){ printk("ERR: script_get_item wifi_usbc_id failed\n"); ret = -ENOMEM; goto exit; } printk("sw_usb_enable_hcd: usbc_num = %d\n", item.val); wifi_pm_power(1); mdelay(10); #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) sw_usb_enable_hcd(item.val); #endif } #endif //defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) #if defined(CONFIG_PLATFORM_ARM_SUN8I) { script_item_value_type_e type; type = script_get_item("wifi_para", "wifi_usbc_id", &item); if(SCIRPT_ITEM_VALUE_TYPE_INT != type){ printk("ERR: script_get_item wifi_usbc_id failed\n"); ret = -ENOMEM; goto exit; } printk("sw_usb_enable_hcd: usbc_num = %d\n", item.val); wifi_pm_power(1); mdelay(10); #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) sunxi_usb_enable_hcd(item.val); #endif } #endif //CONFIG_PLATFORM_ARM_SUN8I exit: return ret; } void platform_wifi_power_off(void) { #ifdef CONFIG_PLATFORM_ARM_SUNxI #ifndef CONFIG_RTL8723A DBG_8192C("sw_usb_disable_hcd: usbc_num = %d\n", usb_wifi_host); sw_usb_disable_hcd(usb_wifi_host); #endif //ifndef CONFIG_RTL8723A #endif //CONFIG_PLATFORM_ARM_SUNxI #if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) sw_usb_disable_hcd(item.val); #endif wifi_pm_power(0); #endif //defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) #if defined(CONFIG_PLATFORM_ARM_SUN8I) #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) sunxi_usb_disable_hcd(item.val); #endif wifi_pm_power(0); #endif //defined(CONFIG_PLATFORM_ARM_SUN8I) } rtl8812au-4.3.8.12175.20140902+dfsg/platform/platform_ARM_WMT_sdio.c000066400000000000000000000034131261122257400235600ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include #include #include extern void wmt_detect_sdio2(void); extern void force_remove_sdio2(void); int platform_wifi_power_on(void) { int err = 0; err = gpio_request(WMT_PIN_GP62_SUSGPIO1, "wifi_chip_en"); if (err < 0){ printk("request gpio for rtl8188eu failed!\n"); return err; } gpio_direction_output(WMT_PIN_GP62_SUSGPIO1, 0);//pull sus_gpio1 to 0 to open vcc_wifi. printk("power on rtl8189.\n"); msleep(500); wmt_detect_sdio2(); printk("[rtl8189es] %s: new card, power on.\n", __FUNCTION__); return err; } void platform_wifi_power_off(void) { force_remove_sdio2(); gpio_direction_output(WMT_PIN_GP62_SUSGPIO1, 1);//pull sus_gpio1 to 1 to close vcc_wifi. printk("power off rtl8189.\n"); gpio_free(WMT_PIN_GP62_SUSGPIO1); printk("[rtl8189es] %s: remove card, power off.\n", __FUNCTION__); } rtl8812au-4.3.8.12175.20140902+dfsg/platform/platform_RTK_DMP_usb.c000066400000000000000000000023061261122257400234050ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include int platform_wifi_power_on(void) { int ret = 0; u32 tmp; tmp=readl((volatile unsigned int*)0xb801a608); tmp &= 0xffffff00; tmp |= 0x55; writel(tmp,(volatile unsigned int*)0xb801a608);//write dummy register for 1055 return ret; } void platform_wifi_power_off(void) { } rtl8812au-4.3.8.12175.20140902+dfsg/platform/platform_ops.c000066400000000000000000000022101261122257400221670ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef CONFIG_PLATFORM_OPS /* * Return: * 0: power on successfully * others: power on failed */ int platform_wifi_power_on(void) { int ret = 0; return ret; } void platform_wifi_power_off(void) { } #endif // !CONFIG_PLATFORM_OPS rtl8812au-4.3.8.12175.20140902+dfsg/platform/platform_ops.h000066400000000000000000000021701261122257400222010ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #ifndef __PLATFORM_OPS_H__ #define __PLATFORM_OPS_H__ /* * Return: * 0: power on successfully * others: power on failed */ int platform_wifi_power_on(void); void platform_wifi_power_off(void); #endif // __PLATFORM_OPS_H__ rtl8812au-4.3.8.12175.20140902+dfsg/platform/platform_sprd_sdio.c000066400000000000000000000044451261122257400233700ustar00rootroot00000000000000/****************************************************************************** * * Copyright(c) 2013 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #include extern void sdhci_bus_scan(void); #ifndef ANDROID_2X extern int sdhci_device_attached(void); #endif /* * Return: * 0: power on successfully * others: power on failed */ int platform_wifi_power_on(void) { int ret = 0; #ifdef CONFIG_RTL8188E rtw_wifi_gpio_wlan_ctrl(WLAN_POWER_ON); #endif // CONFIG_RTL8188E /* Pull up pwd pin, make wifi leave power down mode. */ rtw_wifi_gpio_init(); rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_ON); #if (MP_DRIVER == 1) && (defined(CONFIG_RTL8723A)||defined(CONFIG_RTL8723B)) // Pull up BT reset pin. rtw_wifi_gpio_wlan_ctrl(WLAN_BT_PWDN_ON); #endif rtw_mdelay_os(5); sdhci_bus_scan(); #ifdef CONFIG_RTL8723B //YJ,test,130305 rtw_mdelay_os(1000); #endif #ifdef ANDROID_2X rtw_mdelay_os(200); #else // !ANDROID_2X if (1) { int i = 0; for (i = 0; i <= 50; i++) { msleep(10); if (sdhci_device_attached()) break; printk("%s delay times:%d\n", __func__, i); } } #endif // !ANDROID_2X return ret; } void platform_wifi_power_off(void) { /* Pull down pwd pin, make wifi enter power down mode. */ rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_OFF); rtw_mdelay_os(5); rtw_wifi_gpio_deinit(); #ifdef CONFIG_RTL8188E rtw_wifi_gpio_wlan_ctrl(WLAN_POWER_OFF); #endif // CONFIG_RTL8188E #ifdef CONFIG_WOWLAN if(mmc_host) mmc_host->pm_flags &= ~MMC_PM_KEEP_POWER; #endif // CONFIG_WOWLAN } rtl8812au-4.3.8.12175.20140902+dfsg/runwpa000066400000000000000000000006471261122257400167450ustar00rootroot00000000000000#!/bin/bash if [ "`which iwconfig`" = "" ] ; then echo "WARNING:Wireless tool not exist!" echo " Please install it!" exit else if [ `uname -r | cut -d. -f2` -eq 4 ]; then wpa_supplicant -D ipw -c wpa1.conf -i wlan0 else if [ `iwconfig -v |awk '{print $4}' | head -n 1` -lt 18 ] ; then wpa_supplicant -D ipw -c wpa1.conf -i wlan0 else wpa_supplicant -D wext -c wpa1.conf -i wlan0 fi fi fi rtl8812au-4.3.8.12175.20140902+dfsg/wlan0dhcp000066400000000000000000000004461261122257400173060ustar00rootroot00000000000000#!/bin/bash var0=`ps aux|awk '/dhclient wlan0/'|awk '$11!="awk"{print $2}'` kill $var0 cp ifcfg-wlan0 /etc/sysconfig/network-scripts/ dhclient wlan0 var1=`ifconfig wlan0 |awk '/inet/{print $2}'|awk -F: '{print $2}'` rm -f /etc/sysconfig/network-scripts/ifcfg-wlan0 echo "get ip: $var1"